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Commit | Line | Data |
---|---|---|
f0569246 AC |
1 | 2005-01-12 Andrew Cagney <cagney@gnu.org> |
2 | ||
3 | * configure.ac: Update to use ../common/common.m4. | |
4 | * configure: Re-generate. | |
5 | ||
38f48d72 AC |
6 | 2005-01-11 Andrew Cagney <cagney@localhost.localdomain> |
7 | ||
8 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
9 | ||
b7026657 AC |
10 | 2005-01-07 Andrew Cagney <cagney@gnu.org> |
11 | ||
12 | * configure.ac: Rename configure.in, require autoconf 2.59. | |
13 | * configure: Re-generate. | |
14 | ||
379832de HPN |
15 | 2004-12-08 Hans-Peter Nilsson <hp@axis.com> |
16 | ||
17 | * configure: Regenerate for ../common/aclocal.m4 update. | |
18 | ||
599e0b9e AO |
19 | 2004-06-26 Alexandre Oliva <aoliva@redhat.com> |
20 | ||
c76b4bab AO |
21 | 2000-08-07 Graham Stott <grahams@cygnus.co.uk> |
22 | * am33-2.igen (fmadd, fmsub, fmnadd, fmnsub): Correct typo. | |
23 | 2000-05-29 Alexandre Oliva <aoliva@cygnus.com> | |
24 | * interp.c (fpu_disabled_exception, fpu_unimp_exception, | |
25 | fpu_check_signal_exception): Take additional state arguments. | |
26 | Print exception type and call program_interrupt. Adjust callers. | |
27 | (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div, | |
28 | fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Take additional | |
29 | arguments. | |
30 | * mn10300_sim.h (fpu_disabled_exception, fpu_unimp_exception, | |
31 | fpu_check_signal_exception): Adjust prototypes. | |
32 | (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div, | |
33 | fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Likewise. | |
34 | * am33-2.igen: Adjust calls. | |
35 | 2000-05-19 Alexandre Oliva <aoliva@cygnus.com> | |
36 | * op_utils.c (cmp2fcc): Moved... | |
37 | * interp.c: ... here. | |
38 | 2000-05-18 Alexandre Oliva <aoliva@cygnus.com> | |
39 | * am33-2.igen: Use `unsigned32', `signed32', `unsigned64' or | |
40 | `signed64' where type width is relevant. | |
41 | 2000-05-15 Alexandre Oliva <aoliva@cygnus.com> | |
42 | * mn10300_sim.h: Include sim-fpu.h. | |
43 | (FD2FPU, FPU2FD): Enclose the FD argument in parentheses. | |
44 | (fpu_check_signal_exception): Declare. | |
45 | (struct fp_prec_t, fp_single_prec, fp_double_prec): Likewise. | |
46 | (FP_SINGLE, FP_DOUBLE): Shorthands for fp_*_prec. | |
47 | (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div, | |
48 | fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Declare. | |
49 | * interp.c (fpu_disabled_exception): Document. | |
50 | (fpu_unimp_exception): Likewise. | |
51 | (fpu_check_signal_exception): Define. | |
52 | (reg2val_32, round_32, val2reg_32, fp_single_prec): Likewise. | |
53 | (reg2val_64, round_64, val2reg_64, fp_double_prec): Likewise. | |
54 | (REG2VAL, ROUND, VAL2REG): Define shorthands. | |
55 | (fpu_status_ok): Define. | |
56 | (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div, | |
57 | fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Define. | |
58 | * am33-2.igen (frsqrt, fcmp, fadd, fsub, fmul, fdiv, | |
59 | fmadd, fmsub, fnmadd, fnmsub): Use new functions. | |
60 | 2000-04-27 Alexandre Oliva <aoliva@cygnus.com> | |
61 | * interp.c (sim_create_inferior): Set PSW bit to enable FP insns | |
62 | if architecture is AM33/2.0. | |
63 | * am33.igen: Include am33-2.igen. | |
64 | 2000-04-23 Alexandre Oliva <aoliva@cygnus.com> | |
65 | * mn10300.igen (movm, call, ret, retf): Check for am33_2 too. | |
66 | * am33.igen (movm): Likewise. | |
67 | 2000-04-19 Alexandre Oliva <aoliva@cygnus.com> | |
68 | * am33.igen: Added `*am33_2' to some instructions that were | |
69 | missing it. | |
70 | 2000-04-07 Alexandre Oliva <aoliva@cygnus.com> | |
71 | * am33-2.igen: New file. All insns implemented, but FP flags are | |
72 | only set for fcmp, exceptional conditions are not handled yet. | |
73 | * Makefile.in (IGEN_INSN): Added am33-2.igen. | |
74 | (tmp-igen): Added -M am33_2. | |
75 | * mn10300.igen, am33.igen: Added `*am33_2' to all insns. | |
76 | * gencode.c: Support FMT_D3. | |
77 | * mn10300_sim.h (dword): New type. | |
78 | (struct _state): Added fpregs. | |
79 | (REG_FPCR, FPCR): New define. All assorted bitmaps. | |
80 | (XS2FS, AS2FS, Xf2FD): New macros. | |
81 | (FS2FPU, FD2FPU, FPU2FS, FPU2FD): Likewise. | |
82 | (load_dword, store_dword): New functions or macros. | |
83 | (u642dw, dw2u64): New functions. | |
84 | (fpu_disabled_exception, fpu_unimp_exception): Declared. | |
85 | * interp.c (fpu_disabled_exception): Defined; no actual | |
86 | implementation. | |
87 | (fpu_unimp_exception): Likewise. | |
88 | * op_utils.c (cmp2fcc): New function. | |
89 | ||
489503ee AO |
90 | * interp.c, mn10300_sim.h, op_utils.c: Convert function prototypes |
91 | and definitions to ISO C. | |
92 | ||
622c89b6 AO |
93 | * gencode.c, simops.c: Delete. |
94 | * Makefile.in: Remove non-COMMON dependencies and commands. | |
95 | ||
599e0b9e AO |
96 | * configure.in: Use common simulator always. Don't subst sim_gen |
97 | nor mn10300_common. | |
98 | * configure: Rebuilt. | |
99 | * Makefile.in (WITHOUT_COMMON_OBJS, WITHOUT_COMMON_INTERP_DEP, | |
100 | WITHOUT_COMMON_RUN_OBJS): Remove. | |
101 | (WITH_COMMON_OBJS): Rename to MN10300_OBJS. | |
102 | (WITH_COMMON_INTERP_DEP): Rename to MN10300_INTERP_DEP. | |
103 | (WITH_COMMON_RUN_OBJS): Rename to SIM_RUN_OBJS. | |
104 | (SIM_EXTRA_CFLAGS): Don't use @sim_gen@. | |
105 | * interp.c: Remove non-common bits. | |
106 | * mn10300_sim.h: Likewise. | |
107 | ||
e158f0a0 AC |
108 | 2003-08-28 Andrew Cagney <cagney@redhat.com> |
109 | ||
110 | * dv-mn103ser.c (do_polling_event): Change type of "serial_reg" to | |
111 | "long". | |
112 | (read_status_reg): Cast "serial_reg" to "long". | |
113 | * dv-mn103tim.c (do_counter_event): Change type of "timer_nr" to | |
114 | "long". | |
115 | (do_counter6_event, write_mode_reg, write_tm6md): Ditto. | |
116 | ||
6b4a8935 AC |
117 | 2003-02-27 Andrew Cagney <cagney@redhat.com> |
118 | ||
119 | * interp.c (sim_open, sim_create_inferior, sim_open) | |
120 | (sim_create_inferior): Rename _bfd to bfd. | |
121 | ||
dbd7cd63 AC |
122 | 2003-02-26 Andrew Cagney <cagney@redhat.com> |
123 | ||
124 | * am33.igen: Call sim_engine_abort instead of abort. | |
125 | ||
bb6317d3 DC |
126 | 2003-02-26 David Carlton <carlton@math.stanford.edu> |
127 | ||
128 | * dv-mn103tim.c (read_special_timer6_reg): Add break after | |
129 | empty default: label. | |
130 | (write_special_timer6_reg): Ditto. | |
131 | Update copyright. | |
132 | ||
6c0a25e9 AC |
133 | 2002-11-28 Andrew Cagney <cagney@redhat.com> |
134 | ||
135 | * sim-main.h: Only include "idecode.h" once. | |
136 | * Makefile.in (SIM_EXTRA_DEPS): Define. | |
137 | ||
c8cca39f AC |
138 | 2002-06-16 Andrew Cagney <ac131313@redhat.com> |
139 | ||
140 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
141 | ||
3c25f8c7 AC |
142 | 2002-06-09 Andrew Cagney <cagney@redhat.com> |
143 | ||
144 | * Makefile.in (INCLUDE): Update path to callback.h. | |
145 | * mn10300_sim.h: Include "gdb/callback.h" and "gdb/remote-sim.h". | |
146 | * tconfig.in: Ditto. | |
147 | ||
ff88f59d JB |
148 | 2001-05-06 Jim Blandy <jimb@redhat.com> |
149 | ||
150 | * mn10300.igen: Doc fixes. | |
151 | ||
cc274e7c AO |
152 | 2001-04-26 Alexandre Oliva <aoliva@redhat.com> |
153 | ||
154 | * Makefile.in (idecode.o, op_utils.o, semantics.o, simops.o): | |
155 | Depend on targ-vals.h. | |
156 | ||
d4424ada C |
157 | 2001-04-15 J.T. Conklin <jtc@redback.com> |
158 | ||
159 | * Makefile.in (simops.o): Add simops.h to dependency list. | |
160 | ||
5425ca99 AO |
161 | Wed Aug 9 02:24:53 2000 Graham Stott <grahams@cygnus.co.uk> |
162 | ||
163 | * am33.igen: Warning clean-up. | |
164 | (movm): Initialize PC and mask. | |
165 | (mov, movbu, movhu): Set srcreg2 from RI0. | |
166 | (bsch): Initialize c. | |
167 | (sat16_cmp): Actually do the comparison. | |
168 | (mov_llt): Do not overwrite dstreg with uninitialized variable. | |
169 | ||
eb2d80b4 AC |
170 | Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com> |
171 | ||
172 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
173 | ||
e33c0364 AO |
174 | 2000-05-22 Alexandre Oliva <aoliva@cygnus.com> |
175 | ||
176 | * am33.igen: Fix leading comments of SP-relative offset insns that | |
177 | referred to other registers. Make their offsets unsigned. | |
178 | ||
24a39d88 AO |
179 | 2000-05-18 Alexandre Oliva <aoliva@cygnus.com> |
180 | ||
181 | * mn10300_sim.h (genericAdd, genericSub, genericCmp, genericOr, | |
182 | genericXor, genericBtst): Use `unsigned32'. | |
183 | * op_utils.c: Likewise. | |
184 | * mn10300.igen, am33.igen: Use `unsigned32', `signed32', | |
185 | `unsigned64' or `signed64' where type width is relevant. | |
186 | ||
bfa8561f AO |
187 | 2000-04-25 Alexandre Oliva <aoliva@cygnus.com> |
188 | ||
189 | * am33.igen (inc4 Rn): Use genericAdd so as to modify flags. | |
190 | ||
d8e7020f AO |
191 | 2000-04-09 Alexandre Oliva <aoliva@cygnus.com> |
192 | ||
193 | * am33.igen: Make SP-relative offsets unsigned. Add `*am33' for | |
194 | some instructions that were missing it. | |
195 | ||
a9e3a739 FCE |
196 | 2000-03-03 Alexandre Oliva <oliva@lsd.ic.unicamp.br> |
197 | ||
198 | * Makefile.in (IGEN_INSN): Added am33.igen. | |
199 | ||
d4f3574e SS |
200 | Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com> |
201 | ||
202 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
203 | ||
adf40b2e JM |
204 | Tue Jul 13 13:26:20 1999 Andrew Cagney <cagney@b1.cygnus.com> |
205 | ||
206 | * interp.c: Clarify error message reporting an unknown board. | |
207 | ||
cd0fc7c3 SS |
208 | 1999-05-08 Felix Lee <flee@cygnus.com> |
209 | ||
210 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
211 | ||
7a292a7a SS |
212 | 1999-04-16 Frank Ch. Eigler <fche@cygnus.com> |
213 | ||
214 | * interp.c (program_interrupt): Detect undesired recursion using | |
215 | static flag. Set NMIRC register's SYSEF flag during | |
216 | --board=stdeval1 mode. | |
217 | * dv-mn103-int.c (write_icr): Add backdoor address to allow CPU to | |
218 | set SYSEF flag. | |
219 | ||
220 | 1999-04-02 Keith Seitz <keiths@cygnus.com> | |
221 | ||
222 | * Makefile.in (SIM_EXTRA_CFLAGS): Define a POLL_QUIT_INTERVAL | |
223 | for use in the simulator so that the poll_quit callback is | |
224 | not called too often. | |
225 | ||
226 | Tue Mar 9 21:26:41 1999 Andrew Cagney <cagney@b1.cygnus.com> | |
227 | ||
228 | * dv-mn103int.c (mn103int_ioctl): Return something. | |
229 | * dv-mn103tim.c (write_tm6md): GCC suggested parentheses around && | |
230 | within ||. | |
231 | ||
232 | Tue Feb 16 23:57:17 1999 Jeffrey A Law (law@cygnus.com) | |
233 | ||
234 | * mn10300.igen (retf): Fix return address computation and store | |
235 | the new pc value into nia. | |
236 | ||
c906108c SS |
237 | 1998-12-29 Frank Ch. Eigler <fche@cygnus.com> |
238 | ||
239 | * Makefile.in (WITH_COMMON_OBJS): Build also dv-sockser.o. | |
240 | * interp.c (sim_open): Add stub mn103002 cache control memory regions. | |
241 | Set OPERATING_ENVIRONMENT on "stdeval1" board. | |
242 | (mn10300_core_signal): New function to intercept memory errors. | |
243 | (program_interrupt): New function to dispatch to exception vector | |
244 | (mn10300_exception_*): New functions to snapshot pre/post exception | |
245 | state. | |
246 | * sim-main.h (SIM_CORE_SIGNAL): Define hook - call mn10300_core_signal. | |
247 | (SIM_ENGINE_HALT_HOOK): Do nothing. | |
248 | (SIM_CPU_EXCEPTION*): Define hooks to call mn10300_cpu_exception*(). | |
249 | (_sim_cpu): Add exc_* fields to store register value snapshots. | |
250 | * dv-mn103ser.c (*): Support dv-sockser backend for UART I/O. | |
251 | Various endianness and warning fixes. | |
252 | * mn10300.igen (illegal): Call program_interrupt on error. | |
253 | (break): Call program_interrupt on breakpoint | |
254 | ||
255 | Several changes from <janczyn@cygnus.com> and <cagney@cygnus.com> | |
256 | merged in: | |
257 | * dv-mn103int.c (mn103int_ioctl): New function for NMI | |
258 | generation. (mn103int_finish): Install it as ioctl handler. | |
259 | * dv-mn103tim.c: Support timer 6 specially. Endianness fixes. | |
260 | ||
c2d11a7d JM |
261 | Wed Oct 14 12:11:05 1998 Jeffrey A Law (law@cygnus.com) |
262 | ||
263 | * am33.igen: Allow autoincrement stores using the same register | |
264 | for source and destination operands. | |
265 | ||
266 | Mon Aug 31 10:19:55 1998 Jeffrey A Law (law@cygnus.com) | |
267 | ||
268 | * am33.igen: Reverse HI/LO outputs of 4 operand "mul" and "mulu". | |
269 | ||
c906108c SS |
270 | Fri Aug 28 14:40:49 1998 Joyce Janczyn <janczyn@cygnus.com> |
271 | ||
272 | * interp.c (sim_open): Check for invalid --board option, fix | |
273 | indentation, allocate memory for mem control and DMA regs. | |
274 | ||
275 | Wed Aug 26 09:29:38 1998 Joyce Janczyn <janczyn@cygnus.com> | |
276 | ||
277 | * mn10300.igen (div,divu): Fix divide instructions so divide by 0 | |
278 | behaves like the hardware. | |
279 | ||
280 | Mon Aug 24 11:50:09 1998 Joyce Janczyn <janczyn@cygnus.com> | |
281 | ||
282 | * sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA. | |
283 | ||
c2d11a7d JM |
284 | Wed Aug 12 12:36:07 1998 Jeffrey A Law (law@cygnus.com) |
285 | ||
286 | * am33.igen: Handle case where first DSP operation modifies a | |
287 | register used in the second DSP operation correctly. | |
288 | ||
289 | Tue Jul 28 10:10:25 1998 Jeffrey A Law (law@cygnus.com) | |
290 | ||
291 | * am33.igen: Detect cases where two operands must not match for | |
292 | DSP instructions too. | |
293 | ||
294 | Mon Jul 27 12:04:17 1998 Jeffrey A Law (law@cygnus.com) | |
295 | ||
296 | * am33.igen: Detect cases where two operands must not match in | |
297 | non-DSP instructions. | |
298 | ||
c906108c SS |
299 | Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com> |
300 | ||
301 | * op_utils.c (do_syscall): Rewrite to use common/syscall.c. | |
302 | (syscall_read_mem, syscall_write_mem): New functions for syscall | |
303 | callbacks. | |
304 | * mn10300_sim.h: Add prototypes for syscall_read_mem and | |
305 | syscall_write_mem. | |
306 | * mn10300.igen: Change C++ style comments to C style comments. | |
307 | Check for divide by zero in div and divu ops. | |
308 | ||
c2d11a7d JM |
309 | Fri Jul 24 12:49:28 1998 Jeffrey A Law (law@cygnus.com) |
310 | ||
311 | * am33.igen (translate_xreg): New function. Use it as needed. | |
312 | ||
313 | Thu Jul 23 10:05:28 1998 Jeffrey A Law (law@cygnus.com) | |
314 | ||
315 | * am33.igen: Add some missing instructions. | |
316 | ||
317 | * am33.igen: Autoincrement loads/store fixes. | |
318 | ||
319 | Tue Jul 21 09:48:14 1998 Jeffrey A Law (law@cygnus.com) | |
320 | ||
321 | * am33.igen: Add mov_lCC DSP instructions. | |
322 | ||
323 | * am33.igen: Add most am33 DSP instructions. | |
324 | ||
c906108c SS |
325 | Thu Jul 9 10:06:55 1998 Jeffrey A Law (law@cygnus.com) |
326 | ||
327 | * mn10300.igen: Fix Z bit for addc and subc instructions. | |
328 | Minor fixes in multiply/divide patterns. | |
329 | ||
c2d11a7d JM |
330 | * am33.igen: Add missing mul[u] imm32,Rn. Fix condition code |
331 | handling for many instructions. Fix sign extension for some | |
332 | 24bit immediates. | |
333 | ||
334 | * am33.igen: Fix Z bit for remaining addc/subc instructions. | |
335 | Do not sign extend immediate for mov imm,XRn. | |
336 | More random mul, mac & div fixes. | |
337 | Remove some unused variables. | |
338 | Sign extend 24bit displacement in memory addresses. | |
339 | ||
340 | * am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn. Various | |
341 | fixes to 2 register multiply, divide and mac instructions. Set | |
342 | Z,N correctly for sat16. Sign extend 24 bit immediate for add, | |
343 | and sub instructions. | |
344 | ||
345 | * am33.igen: Add remaining non-DSP instructions. | |
346 | ||
347 | Wed Jul 8 16:29:12 1998 Jeffrey A Law (law@cygnus.com) | |
348 | ||
349 | * am33.igen (translate_rreg): New function. Use it as appropriate. | |
350 | ||
351 | * am33.igen: More am33 instructions. Fix "div". | |
352 | ||
353 | Mon Jul 6 15:39:22 1998 Jeffrey A Law (law@cygnus.com) | |
354 | ||
355 | * mn10300.igen: Add am33 support. | |
356 | ||
357 | * Makefile.in: Use multi-sim to support both a mn10300 and am33 | |
358 | simulator. | |
359 | ||
360 | * am33.igen: Add many more am33 instructions. | |
c906108c SS |
361 | |
362 | Wed Jul 1 17:07:09 1998 Jeffrey A Law (law@cygnus.com) | |
363 | ||
364 | * mn10300_sim.h (FETCH24): Define. | |
365 | ||
c2d11a7d JM |
366 | * mn10300_sim.h: Add defines for some registers found on the AM33. |
367 | * am33.igen: New file with some am33 support. | |
c906108c SS |
368 | |
369 | Tue Jun 30 11:23:20 1998 Jeffrey A Law (law@cygnus.com) | |
370 | ||
371 | * mn10300_sim.h: Include bfd.h | |
372 | (struct state): Add more room for processor specific registers. | |
c2d11a7d | 373 | (REG_E0): Define. |
c906108c SS |
374 | |
375 | Thu Jun 25 10:12:03 1998 Joyce Janczyn <janczyn@cygnus.com> | |
376 | ||
377 | * dv-mn103tim.c: Include sim-assert.h | |
378 | * dv-mn103ser.c (do_polling_event): Check for incoming data on | |
379 | serial line and schedule next polling event. | |
380 | (read_status_reg): schedule events to check for incoming data on | |
381 | serial line and issue interrupt if necessary. | |
382 | ||
383 | Fri Jun 19 16:47:27 1998 Joyce Janczyn <janczyn@cygnus.com> | |
384 | ||
385 | * interp.c (sim_open): hook up serial 1 and 2 ports properly (typo). | |
386 | ||
387 | Fri Jun 19 11:59:26 1998 Joyce Janczyn <janczyn@cygnus.com> | |
388 | ||
389 | * interp.c (board): Rename am32 to stdeval1 as this is the name | |
390 | consistently used to refer to the mn1030002 board. | |
391 | ||
392 | Thu June 18 14:37:14 1998 Joyce Janczyn <janczyn@cygnus.com> | |
393 | * interp.c (sim_open): Fix typo in address of EXTMD register | |
394 | (0x34000280, not 0x3400280). | |
395 | ||
396 | Wed Jun 17 18:00:18 1998 Jeffrey A Law (law@cygnus.com) | |
397 | ||
398 | * simops.c (syscall): Handle change in opcode # for syscall. | |
399 | * mn10300.igen (syscall): Likewise. | |
400 | ||
401 | Tue June 16 09:36:21 1998 Joyce Janczyn <janczyn@cygnus.com> | |
402 | * dv-mn103int.c (mn103int_finish): Regular interrupts (not NMI or | |
403 | reset) are not enabled on reset. | |
404 | ||
405 | Sun June 14 17:04:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
406 | * dv-mn103iop.c (write_*_reg): Check for attempt to write r/o | |
407 | register bits. | |
408 | * dv-mn103ser.c: Fill in methods for reading and writing to serial | |
409 | device registers. | |
410 | * interp.c (sim_open): Make the serial device a polling device. | |
411 | ||
412 | Fri June 12 16:24:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
413 | * dv-mn103iop.c: New file for handling am32 io ports. | |
414 | * configure.in: Add mn103iop to hw_device list. | |
415 | * configure: Re-generate. | |
416 | * interp.c (sim_open): Create io port device. | |
417 | ||
418 | Wed June 10 14:34:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
419 | * dv-mn103int.c (external_group): Use enumerated types to access | |
420 | correct group addresses. | |
421 | * dv-mn103tim.c (do_counter_event): Underflow of cascaded timer | |
422 | triggers an interrupt on the higher-numbered timer's port. | |
423 | ||
424 | Mon June 8 13:30:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
425 | * interp.c: (mn10300_option_handler): New function parses arguments | |
426 | using sim-options. | |
427 | * (board): Add --board option for specifying am32. | |
428 | * (sim_open): Create new timer and serial devices and control | |
429 | configuration of other am32 devices via board option. | |
430 | * dv-mn103tim.c, dv-mn103ser.c: New files for timers and serial devices. | |
431 | * dv-mn103cpu.c: Fix typos in opening comments. | |
432 | * dv-mn103int.c: Adjust interrupt controller settings for am32 instead of am30. | |
433 | * configure.in: Add mn103tim and mn103ser to hw_device list. | |
434 | * configure: Re-generate. | |
435 | ||
436 | Mon May 25 20:50:35 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
437 | ||
438 | * dv-mn103int.c, dv-mn103cpu.c: Rename *_callback to *_method. | |
439 | ||
440 | * dv-mn103cpu.c, dv-mn103int.c: Include hw-main.h and | |
441 | sim-main.h. Declare a struct hw_descriptor instead of struct | |
442 | hw_device_descriptor. | |
443 | ||
444 | Mon May 25 17:33:33 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
445 | ||
446 | * dv-mn103cpu.c (struct mn103cpu): Change type of pending_handler | |
447 | to struct hw_event. | |
448 | ||
449 | Fri May 22 12:17:41 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
450 | ||
451 | * configure.in (SIM_AC_OPTION_HARDWARE): Add argument "yes". | |
452 | ||
453 | Wed May 6 13:29:06 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
454 | ||
455 | * interp.c (sim_open): Create a polling PAL device. | |
456 | ||
457 | Fri May 1 16:39:15 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
458 | ||
459 | * dv-mn103int.c (mn103int_port_event): | |
460 | (mn103int_port_event): | |
461 | (mn103int_io_read_buffer): | |
462 | (mn103int_io_write_buffer): | |
463 | ||
464 | * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Drop CPU/CIA args. | |
465 | (mn103cpu_port_event): Ditto. | |
466 | (mn103cpu_io_read_buffer): Ditto. | |
467 | (mn103cpu_io_write_buffer): Ditto. | |
468 | ||
469 | Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com> | |
470 | ||
471 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
472 | ||
473 | Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche> | |
474 | ||
475 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
476 | * config.in: Ditto. | |
477 | ||
478 | Sun Apr 26 15:19:55 1998 Tom Tromey <tromey@cygnus.com> | |
479 | ||
480 | * acconfig.h: New file. | |
481 | * configure.in: Reverted change of Apr 24; use sinclude again. | |
482 | ||
483 | Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche> | |
484 | ||
485 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
486 | * config.in: Ditto. | |
487 | ||
488 | Fri Apr 24 11:19:07 1998 Tom Tromey <tromey@cygnus.com> | |
489 | ||
490 | * configure.in: Don't call sinclude. | |
491 | ||
492 | Tue Apr 14 10:03:02 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
493 | ||
494 | * mn10300_sim.h: Declare all functions in op_utils.c using | |
495 | INLINE_SIM_MAIN. | |
496 | * op_utils.c: Ditto. | |
497 | * sim-main.c: New file. Include op_utils.c. | |
498 | ||
499 | * mn10300.igen (mov, cmp): Use new igen operators `!' and `=' to | |
500 | differentiate between MOV/CMP immediate/register instructions. | |
501 | ||
502 | * configure.in (SIM_AC_OPTION_INLINE): Add and enable. | |
503 | * configure: Regenerate. | |
504 | ||
505 | Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
506 | ||
507 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
508 | ||
509 | Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
510 | ||
511 | * interp.c (hw): Delete variable, moved to SIM_DESC. | |
512 | (sim_open): Delete calls to hw_tree_create, hw_tree_finish. | |
513 | Handled by sim-module. | |
514 | (sim_open): Do not anotate tree with trace properties, handled by | |
515 | sim-hw.c | |
516 | (sim_open): Call sim_hw_parse instead of hw_tree_parse. | |
517 | ||
518 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
519 | ||
520 | Thu Mar 26 20:46:18 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk> | |
521 | ||
522 | * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Save the entire PC | |
523 | on the stack when delivering interrupts (not just the lower | |
524 | half)... | |
525 | * mn10300.igen (mov (Di,Am),Dn): Fix decode. Registers were | |
526 | specified in the wrong order. | |
527 | ||
528 | Fri Mar 27 00:56:40 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
529 | ||
530 | * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Stop loss of | |
531 | succeeding interrupts, clear pending_handler when the handler | |
532 | isn't re-scheduled. | |
533 | ||
534 | Thu Mar 26 10:11:01 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk> | |
535 | ||
536 | * Makefile.in (tmp-igen): Prefix all usage of move-if-change | |
537 | script with $(SHELL) to make NT native builds happy. | |
538 | * configure: Regenerate because of change to ../common/aclocal.m4. | |
539 | ||
540 | Thu Mar 26 11:22:31 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
541 | ||
542 | * configure.in: Make --enable-sim-common the default. | |
543 | * configure: Re-generate. | |
544 | ||
545 | * sim-main.h (CIA_GET, CIA_SET): Save/restore current instruction | |
546 | address into Sate.regs[REG_PC] instead of common struct. | |
547 | ||
548 | Wed Mar 25 17:42:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
549 | ||
550 | * mn10300.igen (cmp imm8,An): Do not sign extend imm8 value. | |
551 | ||
552 | Wed Mar 25 12:08:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
553 | ||
554 | * simops.c (OP_F0FD): Initialise variable 'sp'. | |
555 | ||
556 | Thu Mar 26 00:21:32 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
557 | ||
558 | * dv-mn103int.c (decode_group): A group register every 4 bytes not | |
559 | 8. | |
560 | (write_icr): Rewrite equation updating request field. | |
561 | (read_iagr): Fix check that interrupt is still pending. | |
562 | ||
563 | Wed Mar 25 16:14:50 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
564 | ||
565 | * interp.c (sim_open): Tidy up device creation. | |
566 | ||
567 | * dv-mn103int.c (mn103int_port_event): Drive NMI with non-zero | |
568 | value. | |
569 | (mn103int_io_read_buffer): Convert absolute address to register | |
570 | block offsets. | |
571 | (read_icr, write_icr): Convert block offset into group offset. | |
572 | ||
573 | Wed Mar 25 15:08:49 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
574 | ||
575 | * interp.c (sim_open): Create second 1mb memory region at | |
576 | 0x40000000. | |
577 | (sim_open): Create a device tree. | |
578 | (sim-hw.h): Include. | |
579 | (do_interrupt): Delete, needs to use dv-mn103cpu.c | |
580 | ||
581 | * dv-mn103int.c, dv-mn103cpu.c: New files. | |
582 | ||
583 | Wed Mar 25 08:47:38 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
584 | ||
585 | * mn10300_sim.h (EXTRACT_PSW_LM, INSERT_PSW_LM, PSW_IE, PSW_LM): | |
586 | Define. | |
587 | (SP): Define. | |
588 | ||
589 | Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
590 | ||
591 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
592 | ||
593 | Wed Mar 25 10:24:48 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
594 | ||
595 | * interp.c (sim-options.h): Include. | |
596 | (sim_kind, myname): Declare when not using common framework. | |
597 | ||
598 | * mn10300_sim.h (do_syscall, generic*): Provide prototypes for | |
599 | functions found in op_utils.c | |
600 | ||
601 | * mn10300.igen (add): Discard unused variables. | |
602 | ||
603 | * configure, config.in: Re-generate with autoconf 2.12.1. | |
604 | ||
605 | Tue Mar 24 15:27:00 1998 Joyce Janczyn <janczyn@cygnus.com> | |
606 | ||
607 | Add support for --enable-sim-common option. | |
608 | * Makefile.in (WITHOUT_COMMON_OBJS): Files included if | |
609 | ! --enable-sim-common | |
610 | (WITH_COMMON_OBJS): Files included if --enable-sim-common. | |
611 | (MN10300_OBJS,MN10300_INTERP_DEP): New variables. | |
612 | (SIM_OBJS): Rewrite. | |
613 | ({WITHOUT,WITH}_COMMON_RUN_OBJS,SIM_RUN_OBJS): New variables. | |
614 | (SIM_EXTRA_CFLAGS): New variable. | |
615 | (clean-extra): Clean up igen files. | |
616 | (../igen/igen,clean-igen,tmp-igen): New rules. | |
617 | * configure.in: Add support for common framework via | |
618 | --enable-sim-common. | |
619 | * configure: Regenerate. | |
620 | * interp.c: #include sim-main if WITH_COMMON, not mn10300_sim.h. | |
621 | (hash,dispatch,sim_size): Don't compile if ! WITH_COMMON. | |
622 | (init_system,sim_write,compare_simops): Likewise. | |
623 | (sim_set_profile,sim_set_profile_size): Likewise. | |
624 | (sim_stop,sim_resume,sim_trace,sim_info): Likewise. | |
625 | (sim_set_callbacks,sim_stop_reason,sim_read,sim_load): Likewise. | |
626 | (enum interrupt_type): New enum. | |
627 | (interrupt_names): New global. | |
628 | (do_interrupt): New function. | |
629 | (sim_open): Define differently if WITH_COMMON. | |
630 | (sim_close,sim_create_inferior,sim_do_command): Likewise. | |
631 | * mn10300_sim.h ({load,store}_{byte,half,word}): Define versions | |
632 | for WITH_COMMON. | |
633 | * mn10300.igen: New file. | |
634 | * mn10300.dc: New file. | |
635 | * op_utils.c: New file. | |
636 | * sim-main.h: New file. | |
637 | ||
638 | Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
639 | ||
640 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
641 | ||
642 | Fri Feb 27 18:36:04 1998 Jeffrey A Law (law@cygnus.com) | |
643 | ||
644 | * simops.c (inc): Fix typo. | |
645 | ||
646 | Wed Feb 25 01:59:29 1998 Jeffrey A Law (law@cygnus.com) | |
647 | ||
648 | * simops.c (signed multiply instructions): Cast input operands to | |
649 | signed32 before casting them to signed64 so that the sign bit | |
650 | is propagated properly. | |
651 | ||
652 | Mon Feb 23 20:23:19 1998 Mark Alexander <marka@cygnus.com> | |
653 | ||
654 | * Makefile.in: Last change was bad. Define NL_TARGET | |
655 | so that targ-vals.h will be used instead of syscall.h. | |
656 | * simops.c: Use targ-vals.h instead of syscall.h. | |
657 | (OP_F020): Disable unsupported system calls. | |
658 | ||
659 | Mon Feb 23 09:44:38 1998 Mark Alexander <marka@cygnus.com> | |
660 | ||
661 | * Makefile.in: Get header files from libgloss/mn10300/sys. | |
662 | ||
663 | Sun Feb 22 16:02:24 1998 Jeffrey A Law (law@cygnus.com) | |
664 | ||
665 | * simops.c: Include sim-types.h. | |
666 | ||
667 | Wed Feb 18 13:07:08 1998 Jeffrey A Law (law@cygnus.com) | |
668 | ||
669 | * simops.c (multiply instructions): Cast input operands to a | |
670 | signed64/unsigned64 type as appropriate. | |
671 | ||
672 | Tue Feb 17 12:47:16 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
673 | ||
674 | * interp.c (sim_store_register, sim_fetch_register): Pass in | |
675 | length parameter. Return -1. | |
676 | ||
677 | Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
678 | ||
679 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
680 | ||
681 | Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
682 | ||
683 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
684 | ||
685 | Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba> | |
686 | ||
687 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
688 | ||
689 | Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
690 | ||
691 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
692 | * config.in: Ditto. | |
693 | ||
694 | Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com> | |
695 | ||
696 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
697 | ||
698 | Tue Nov 11 10:38:52 1997 Jeffrey A Law (law@cygnus.com) | |
699 | ||
700 | * simops.c (call:16 call:32): Stack adjustment is determined solely | |
701 | by the imm8 field. | |
702 | ||
703 | Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
704 | ||
705 | * interp.c (sim_load): Pass lma_p and sim_write args to | |
706 | sim_load_file. | |
707 | ||
708 | Tue Oct 21 10:12:03 1997 Jeffrey A Law (law@cygnus.com) | |
709 | ||
710 | * simops.c: Correctly handle register restores for "ret" and "retf" | |
711 | instructions. | |
712 | ||
713 | Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
714 | ||
715 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
716 | ||
717 | Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
718 | ||
719 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
720 | ||
721 | Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
722 | ||
723 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
724 | ||
725 | Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
726 | ||
727 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
728 | ||
729 | Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
730 | ||
731 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
732 | ||
733 | Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
734 | ||
735 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
736 | ||
737 | Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> | |
738 | ||
739 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
740 | ||
741 | Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
742 | ||
743 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
744 | * config.in: Ditto. | |
745 | ||
746 | Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
747 | ||
748 | * interp.c (sim_kill): Delete. | |
749 | (sim_create_inferior): Add ABFD argument. | |
750 | (sim_load): Move setting of PC from here. | |
751 | (sim_create_inferior): To here. | |
752 | ||
753 | Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
754 | ||
755 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
756 | * config.in: Ditto. | |
757 | ||
758 | Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
759 | ||
760 | * interp.c (sim_open): Add ABFD argument. | |
761 | ||
762 | Tue Jun 24 13:46:20 1997 Jeffrey A Law (law@cygnus.com) | |
763 | ||
764 | * interp.c (sim_resume): Clear State.exited. | |
765 | (sim_stop_reason): If State.exited is nonzero, then indicate that | |
766 | the simulator exited instead of stopped. | |
767 | * mn10300_sim.h (struct _state): Add exited field. | |
768 | * simops.c (syscall): Set State.exited for SYS_exit. | |
769 | ||
770 | Wed Jun 11 22:07:56 1997 Jeffrey A Law (law@cygnus.com) | |
771 | ||
772 | * simops.c: Fix thinko in last change. | |
773 | ||
774 | Tue Jun 10 12:31:32 1997 Jeffrey A Law (law@cygnus.com) | |
775 | ||
776 | * simops.c: "call" stores the callee saved registers into the | |
777 | stack! Update the stack pointer properly when done with | |
778 | register saves. | |
779 | ||
780 | * simops.c: Fix return address computation for "call" instructions. | |
781 | ||
782 | Thu May 22 01:43:11 1997 Jeffrey A Law (law@cygnus.com) | |
783 | ||
784 | * interp.c (sim_open): Fix typo. | |
785 | ||
786 | Wed May 21 23:27:58 1997 Jeffrey A Law (law@cygnus.com) | |
787 | ||
788 | * interp.c (sim_resume): Add missing case in big switch | |
789 | statement (for extb instruction). | |
790 | ||
791 | Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com) | |
792 | ||
793 | * interp.c: Replace all references to load_mem and store_mem | |
794 | with references to load_byte, load_half, load_3_byte, load_word | |
795 | and store_byte, store_half, store_3_byte, store_word. | |
796 | (INLINE): Delete definition. | |
797 | (load_mem_big): Likewise. | |
798 | (max_mem): Make it global. | |
799 | (dispatch): Make this function inline. | |
800 | (load_mem, store_mem): Delete functions. | |
801 | * mn10300_sim.h (INLINE): Define. | |
802 | (RLW): Delete unused definition. | |
803 | (load_mem, store_mem): Delete declarations. | |
804 | (load_mem_big): New definition. | |
805 | (load_byte, load_half, load_3_byte, load_word): New functions. | |
806 | (store_byte, store_half, store_3_byte, store_word): New functions. | |
807 | * simops.c: Replace all references to load_mem and store_mem | |
808 | with references to load_byte, load_half, load_3_byte, load_word | |
809 | and store_byte, store_half, store_3_byte, store_word. | |
810 | ||
811 | Tue May 20 10:21:51 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
812 | ||
813 | * interp.c (sim_open): Add callback to arguments. | |
814 | (sim_set_callbacks): Delete SIM_DESC argument. | |
815 | ||
816 | Mon May 19 13:54:22 1997 Jeffrey A Law (law@cygnus.com) | |
817 | ||
818 | * interp.c (dispatch): Make this an inline function. | |
819 | ||
820 | * simops.c (syscall): Use callback->write regardless of | |
821 | what file descriptor we're writing too. | |
822 | ||
823 | Sun May 18 16:46:31 1997 Jeffrey A Law (law@cygnus.com) | |
824 | ||
825 | * interp.c (load_mem_big): Remove function. It's now a macro | |
826 | defined elsewhere. | |
827 | (compare_simops): New function. | |
828 | (sim_open): Sort the Simops table before inserting entries | |
829 | into the hash table. | |
830 | * mn10300_sim.h: Remove unused #defines. | |
831 | (load_mem_big): Define. | |
832 | ||
833 | Fri May 16 16:36:17 1997 Jeffrey A Law (law@cygnus.com) | |
834 | ||
835 | * interp.c (load_mem): If we get a load from an out of range | |
836 | address, abort. | |
837 | (store_mem): Likewise for stores. | |
838 | (max_mem): New variable. | |
839 | ||
840 | Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com) | |
841 | ||
842 | * mn10300_sim.h: Fix ordering of bits in the PSW. | |
843 | ||
844 | * interp.c: Improve hashing routine to avoid long list | |
845 | traversals for common instructions. Add HASH_STAT support. | |
846 | Rewrite opcode dispatch code using a big switch instead of | |
847 | cascaded if/else statements. Avoid useless calls to load_mem. | |
848 | ||
849 | Mon May 5 18:07:48 1997 Jeffrey A Law (law@cygnus.com) | |
850 | ||
851 | * mn10300_sim.h (struct _state): Add space for mdrq register. | |
852 | (REG_MDRQ): Define. | |
853 | * simops.c: Don't abort for trap. Add support for the extended | |
854 | instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24", | |
855 | and "bsch". | |
856 | ||
857 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> | |
858 | ||
859 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
860 | ||
861 | Fri Apr 18 14:04:04 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
862 | ||
863 | * interp.c (sim_stop): Add stub function. | |
864 | ||
865 | Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com> | |
866 | ||
867 | * Makefile.in (SIM_OBJS): Add sim-load.o. | |
868 | * interp.c (sim_kind, myname): New static locals. | |
869 | (sim_open): Set sim_kind, myname. Ignore -E arg. | |
870 | (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to | |
871 | load file into simulator. Set start address from bfd. | |
872 | (sim_create_inferior): Return SIM_RC. Delete arg start_address. | |
873 | ||
874 | Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
875 | ||
876 | * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime | |
877 | only include if implemented by host. | |
878 | (OP_F020): Typecast arg passed to time function; | |
879 | ||
880 | Mon Apr 7 23:57:49 1997 Jeffrey A Law (law@cygnus.com) | |
881 | ||
882 | * simops.c (syscall): Handle new mn10300 calling conventions. | |
883 | ||
884 | Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
885 | ||
886 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
887 | * config.in: Ditto. | |
888 | ||
889 | Fri Apr 4 20:02:37 1997 Ian Lance Taylor <ian@cygnus.com> | |
890 | ||
891 | * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match | |
892 | corresponding change in opcodes directory. | |
893 | ||
894 | Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> | |
895 | ||
896 | * interp.c (sim_open): New arg `kind'. | |
897 | ||
898 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
899 | ||
900 | Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
901 | ||
902 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
903 | ||
904 | Thu Mar 20 11:58:02 1997 Jeffrey A Law (law@cygnus.com) | |
905 | ||
906 | * simops.c: Fix register extraction for a two "movbu" variants. | |
907 | Somewhat simplify "sub" instructions. | |
908 | Correctly sign extend operands for "mul". Put the correct | |
909 | half of the result in MDR for "mul" and "mulu". | |
910 | Implement remaining instructions. | |
911 | Tweak opcode for "syscall". | |
912 | ||
913 | Tue Mar 18 14:21:21 1997 Jeffrey A Law (law@cygnus.com) | |
914 | ||
915 | * simops.c: Do syscall emulation in "syscall" instruction. Add | |
916 | dummy "trap" instruction. | |
917 | ||
918 | Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
919 | ||
920 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
921 | ||
922 | Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
923 | ||
924 | * configure: Re-generate. | |
925 | ||
926 | Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com> | |
927 | ||
928 | * configure: Regenerate to track ../common/aclocal.m4 changes. | |
929 | ||
930 | Thu Mar 13 12:54:45 1997 Doug Evans <dje@canuck.cygnus.com> | |
931 | ||
932 | * interp.c (sim_open): New SIM_DESC result. Argument is now | |
933 | in argv form. | |
934 | (other sim_*): New SIM_DESC argument. | |
935 | ||
936 | Wed Mar 12 15:04:00 1997 Jeffrey A Law (law@cygnus.com) | |
937 | ||
938 | * simops.c: Fix carry bit computation for "add" instructions. | |
939 | ||
940 | * simops.c: Fix typos in bset insns. Fix arguments to store_mem | |
941 | for bset imm8,(d8,an) and bclr imm8,(d8,an). | |
942 | ||
943 | Wed Mar 5 15:00:10 1997 Jeffrey A Law (law@cygnus.com) | |
944 | ||
945 | * simops.c: Fix register references when computing Z and N bits | |
946 | for lsr imm8,dn. | |
947 | ||
948 | Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com> | |
949 | ||
950 | * Makefile.in (@COMMON_MAKEFILE_FRAG): Use | |
951 | COMMON_{PRE,POST}_CONFIG_FRAG instead. | |
952 | * configure.in: sinclude ../common/aclocal.m4. | |
953 | * configure: Regenerated. | |
954 | ||
955 | Fri Jan 24 10:47:25 1997 Jeffrey A Law (law@cygnus.com) | |
956 | ||
957 | * interp.c (init_system): Allocate 2^19 bytes of space for the | |
958 | simulator. | |
959 | ||
960 | Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com) | |
961 | ||
962 | * configure configure.in Makefile.in: Update to new configure | |
963 | scheme which is more compatible with WinGDB builds. | |
964 | * configure.in: Improve comment on how to run autoconf. | |
965 | * configure: Re-run autoconf to get new ../common/aclocal.m4. | |
966 | * Makefile.in: Use autoconf substitution to install common | |
967 | makefile fragment. | |
968 | ||
969 | Tue Jan 21 15:03:04 1997 Jeffrey A Law (law@cygnus.com) | |
970 | ||
971 | * simops.c: Undo last change to "rol" and "ror", original code | |
972 | was correct! | |
973 | ||
974 | Thu Jan 16 11:28:14 1997 Jeffrey A Law (law@cygnus.com) | |
975 | ||
976 | * simops.c: Fix "rol" and "ror". | |
977 | ||
978 | Wed Jan 15 06:45:58 1997 Jeffrey A Law (law@cygnus.com) | |
979 | ||
980 | * simops.c: Fix typo in last change. | |
981 | ||
982 | Mon Jan 13 13:22:35 1997 Jeffrey A Law (law@cygnus.com) | |
983 | ||
984 | * simops.c: Use REG macros in few places not using them yet. | |
985 | ||
986 | Mon Jan 6 16:21:19 1997 Jeffrey A Law (law@cygnus.com) | |
987 | ||
988 | * mn10300_sim.h (struct _state): Fix number of registers! | |
989 | ||
990 | Tue Dec 31 16:20:41 1996 Jeffrey A Law (law@cygnus.com) | |
991 | ||
992 | * mn10300_sim.h (struct _state): Put all registers into a single | |
993 | array to make gdb implementation easier. | |
994 | (REG_*): Add definitions for all registers in the state array. | |
995 | (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros. | |
996 | * simops.c: Related changes. | |
997 | ||
998 | Wed Dec 18 10:10:45 1996 Jeffrey A Law (law@cygnus.com) | |
999 | ||
1000 | * interp.c (sim_resume): Handle 0xff as a single byte insn. | |
1001 | ||
1002 | * simops.c: Fix overflow computation for "add" and "inc" | |
1003 | instructions. | |
1004 | ||
1005 | Mon Dec 16 10:03:52 1996 Jeffrey A Law (law@cygnus.com) | |
1006 | ||
1007 | * simops.c: Handle "break" instruction. | |
1008 | ||
1009 | * simops.c: Fix restoring the PC for "ret" and "retf" instructions. | |
1010 | ||
1011 | Wed Dec 11 09:53:10 1996 Jeffrey A Law (law@cygnus.com) | |
1012 | ||
1013 | * gencode.c (write_opcodes): Also write out the format of the | |
1014 | opcode. | |
1015 | * mn10300_sim.h (simops): Add "format" field. | |
1016 | * interp.c (sim_resume): Deal with endianness issues here. | |
1017 | ||
1018 | Tue Dec 10 15:05:37 1996 Jeffrey A Law (law@cygnus.com) | |
1019 | ||
1020 | * simops.c (REG0_4): Define. | |
1021 | Use REG0_4 for indexed loads/stores. | |
1022 | ||
1023 | Sat Dec 7 09:50:28 1996 Jeffrey A Law (law@cygnus.com) | |
1024 | ||
1025 | * simops.c (REG0_16): Fix typo. | |
1026 | ||
1027 | Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com) | |
1028 | ||
1029 | * simops.c: Call abort for any instruction that's not currently | |
1030 | simulated. | |
1031 | ||
1032 | * simops.c: Define accessor macros to extract register | |
1033 | values from instructions. Use them consistently. | |
1034 | ||
1035 | * interp.c: Delete unused global variable "OP". | |
1036 | (sim_resume): Remove unused variable "opcode". | |
1037 | * simops.c: Fix some uninitialized variable problems, add | |
1038 | parens to fix various -Wall warnings. | |
1039 | ||
1040 | * gencode.c (write_header): Add "insn" and "extension" arguments | |
1041 | to the OP_* declarations. | |
1042 | (write_template): Similarly for function templates. | |
1043 | * interp.c (insn, extension): Remove global variables. Instead | |
1044 | pass them as arguments to the OP_* functions. | |
1045 | * mn10300_sim.h: Remove decls for "insn" and "extension". | |
1046 | * simops.c (OP_*): Accept "insn" and "extension" as arguments | |
1047 | instead of using globals. | |
1048 | ||
1049 | Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com) | |
1050 | ||
1051 | * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)" | |
1052 | ||
1053 | * simops.c: Fix thinkos in last change to "inc dn". | |
1054 | ||
1055 | Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com) | |
1056 | ||
1057 | * simops.c: "add imm,sp" does not effect the condition codes. | |
1058 | "inc dn" does effect the condition codes. | |
1059 | ||
1060 | Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com) | |
1061 | ||
1062 | * simops.c: Treat both operands as signed values for | |
1063 | "div" instruction. | |
1064 | ||
1065 | * simops.c: Fix simulation of division instructions. | |
1066 | Fix typos/thinkos in several "cmp" and "sub" instructions. | |
1067 | ||
1068 | Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com) | |
1069 | ||
1070 | * simops.c: Fix carry bit handling in "sub" and "cmp" | |
1071 | instructions. | |
1072 | ||
1073 | * simops.c: Fix "mov imm8,an" and "mov imm16,dn". | |
1074 | ||
1075 | Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com) | |
1076 | ||
1077 | * simops.c: Fix overflow computation for many instructions. | |
1078 | ||
1079 | * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)". | |
1080 | ||
1081 | * simops.c: Fix "mov am, dn". | |
1082 | ||
1083 | * simops.c: Fix more bugs in "add imm,an" and | |
1084 | "add imm,dn". | |
1085 | ||
1086 | Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com) | |
1087 | ||
1088 | * simops.c: Fix bugs in "movm" and "add imm,an". | |
1089 | ||
1090 | * simops.c: Don't lose the upper 24 bits of the return | |
1091 | pointer in "call" and "calls" instructions. Rough cut | |
1092 | at emulated system calls. | |
1093 | ||
1094 | * simops.c: Implement the remaining 5, 6 and 7 byte instructions. | |
1095 | ||
1096 | * simops.c: Implement remaining 4 byte instructions. | |
1097 | ||
1098 | * simops.c: Implement remaining 3 byte instructions. | |
1099 | ||
1100 | * simops.c: Implement remaining 2 byte instructions. Call | |
1101 | abort for instructions we're not implementing now. | |
1102 | ||
1103 | Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com) | |
1104 | ||
1105 | * simops.c: Implement lots of random instructions. | |
1106 | ||
1107 | * simops.c: Implement "movm" and "bCC" insns. | |
1108 | ||
1109 | * mn10300_sim.h (_state): Add another register (MDR). | |
1110 | (REG_MDR): Define. | |
1111 | * simops.c: Implement "cmp", "calls", "rets", "jmp" and | |
1112 | a few additional random insns. | |
1113 | ||
1114 | * mn10300_sim.h (PSW_*): Define for CC status tracking. | |
1115 | (REG_D0, REG_A0, REG_SP): Define. | |
1116 | * simops.c: Implement "add", "addc" and a few other random | |
1117 | instructions. | |
1118 | ||
1119 | * gencode.c, interp.c: Snapshot current simulator code. | |
1120 | ||
1121 | Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com) | |
1122 | ||
1123 | * Makefile.in, config.in, configure, configure.in: New files. | |
1124 | * gencode.c, interp.c, mn10300_sim.h, simops.c: New files. | |
1125 |