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sim: unify sim_cia definition
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1/* Simulator for TI MSP430 and MSP430X processors.
2
32d0add0 3 Copyright (C) 2012-2015 Free Software Foundation, Inc.
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4 Contributed by Red Hat, Inc.
5
6 This file is part of simulators.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21#ifndef _MSP430_MAIN_SIM_H_
22#define _MSP430_MAIN_SIM_H_
23
24#include "sim-basics.h"
25#include "sim-signal.h"
26
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27typedef struct _sim_cpu SIM_CPU;
28
29#include "msp430-sim.h"
30#include "sim-base.h"
31
32struct _sim_cpu
33{
34 /* Simulator specific members. */
35 struct msp430_cpu_state state;
36 sim_cpu_base base;
37};
38
39struct sim_state
40{
41 sim_cpu *cpu[MAX_NR_PROCESSORS];
42
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43 asymbol **symbol_table;
44 long number_of_symbols;
45#define STATE_SYMBOL_TABLE(sd) ((sd)->symbol_table)
46#define STATE_NUM_SYMBOLS(sd) ((sd)->number_of_symbols)
47
48 /* Simulator specific members. */
49 sim_state_base base;
50};
51
52#define MSP430_CPU(sd) (STATE_CPU ((sd), 0))
53#define MSP430_CPU_STATE(sd) (MSP430_CPU ((sd)->state))
54
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55#include "sim-config.h"
56#include "sim-types.h"
57#include "sim-engine.h"
58#include "sim-options.h"
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59
60#define MAYBE_TRACE(type, cpu, fmt, ...) \
61 do \
62 { \
63 if (TRACE_##type##_P (cpu)) \
64 trace_generic (CPU_STATE (cpu), cpu, TRACE_##type##_IDX, \
65 fmt, ## __VA_ARGS__); \
66 } \
67 while (0)
68
69#define TRACE_INSN(cpu, fmt, ...) MAYBE_TRACE (INSN, cpu, fmt, ## __VA_ARGS__)
70#define TRACE_DECODE(cpu, fmt, ...) MAYBE_TRACE (DECODE, cpu, fmt, ## __VA_ARGS__)
71#define TRACE_EXTRACT(cpu, fmt, ...) MAYBE_TRACE (EXTRACT, cpu, fmt, ## __VA_ARGS__)
72#define TRACE_SYSCALL(cpu, fmt, ...) MAYBE_TRACE (SYSCALL, cpu, fmt, ## __VA_ARGS__)
73
74#define TRACE_CORE(cpu, addr, size, map, val) \
75 do \
76 { \
77 MAYBE_TRACE (CORE, cpu, "%cBUS %s %i bytes @ 0x%08x: 0x%0*x", \
78 map == exec_map ? 'I' : 'D', \
79 map == write_map ? "STORE" : "FETCH", \
80 size, addr, size * 2, val); \
81 PROFILE_COUNT_CORE (cpu, addr, size, map); \
82 } \
83 while (0)
84
85#define TRACE_EVENTS(cpu, fmt, ...) MAYBE_TRACE (EVENTS, cpu, fmt, ## __VA_ARGS__)
86
87#define TRACE_BRANCH(cpu, oldpc, newpc, fmt, ...) \
88 do \
89 { \
90 MAYBE_TRACE (BRANCH, cpu, fmt " to %#x", ## __VA_ARGS__, newpc); \
91 } \
92 while (0)
93
94extern void trace_register (SIM_DESC, sim_cpu *, const char *, ...)
95 __attribute__((format (printf, 3, 4)));
96
97#define TRACE_REGISTER(cpu, fmt, ...) \
98 do \
99 { \
100 if (TRACE_CORE_P (cpu)) \
101 trace_register (CPU_STATE (cpu), cpu, fmt, ## __VA_ARGS__); \
102 } \
103 while (0)
104
105#define TRACE_REG(cpu, reg, val) \
106 TRACE_REGISTER (cpu, "wrote R%d = %#x", reg, val)
107
108#endif /* _MSP430_MAIN_SIM_H_ */