[thirdparty/binutils-gdb.git] / sim / or1k / Makefile.in

# Makefile template for configure for the or1k simulator
# Copyright (C) 2017-2023 Free Software Foundation, Inc.
#
# This file is part of GDB, the GNU debugger.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program.  If not, see <http://www.gnu.org/licenses/>.

## COMMON_PRE_CONFIG_FRAG

OR1K_OBJS = \
	or1k.o \
	arch.o \
	cpu.o \
	decode.o \
	model.o \
	sem.o \
	mloop.o \
	sim-if.o \
	traps.o

SIM_OBJS = \
	$(SIM_NEW_COMMON_OBJS) \
	cgen-utils.o \
	cgen-trace.o \
	cgen-scache.o \
	cgen-run.o \
	cgen-fpu.o \
	cgen-accfp.o

SIM_OBJS += $(OR1K_OBJS)

SIM_EXTRA_CFLAGS = -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31

## COMMON_POST_CONFIG_FRAG

arch = or1k

or1k.o: or1k.c
	$(COMPILE) $<
	$(POSTCOMPILE)

sim-if.o: sim-if.c
	$(COMPILE) $<
	$(POSTCOMPILE)

traps.o: traps.c
	$(COMPILE) $<
	$(POSTCOMPILE)

stamps: stamp-arch stamp-cpu

# NOTE: Generated source files are specified as full paths,
# e.g. $(srcdir)/arch.c, because make may decide the files live
# in objdir otherwise.

OR1K_CGEN_DEPS = \
	$(CPU_DIR)/or1k.cpu \
	$(CPU_DIR)/or1k.opc \
	$(CPU_DIR)/or1kcommon.cpu \
	$(CPU_DIR)/or1korbis.cpu \
	$(CPU_DIR)/or1korfpx.cpu \
	Makefile

stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(OR1K_CGEN_DEPS)
	$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) \
	  mach=or32,or32nd \
	  archfile=$(CPU_DIR)/or1k.cpu \
	  FLAGS="with-scache"
	$(SILENCE) touch $@
$(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
	@true

stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(OR1K_CGEN_DEPS)
	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
	  cpu=or1k32bf \
	  mach=or32,or32nd \
	  archfile=$(CPU_DIR)/or1k.cpu \
	  FLAGS="with-scache" \
	  EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
	$(SILENCE) touch $@
$(srcdir)/cpu.h $(srcdir)/cpu.c $(srcdir)/model.c $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
	@true
Commit	Line	Data
fa8b7c21	1	# Makefile template for configure for the or1k simulator
213516ef	2	# Copyright (C) 2017-2023 Free Software Foundation, Inc.
fa8b7c21 SH	3	#
	4	# This file is part of GDB, the GNU debugger.
	5	#
	6	# This program is free software; you can redistribute it and/or modify
	7	# it under the terms of the GNU General Public License as published by
	8	# the Free Software Foundation; either version 3 of the License, or
	9	# (at your option) any later version.
	10	#
	11	# This program is distributed in the hope that it will be useful,
	12	# but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	# GNU General Public License for more details.
	15	#
	16	# You should have received a copy of the GNU General Public License
	17	# along with this program. If not, see <http://www.gnu.org/licenses/>.
	18
	19	## COMMON_PRE_CONFIG_FRAG
	20
	21	OR1K_OBJS = \
	22	or1k.o \
	23	arch.o \
	24	cpu.o \
	25	decode.o \
	26	model.o \
	27	sem.o \
	28	mloop.o \
	29	sim-if.o \
	30	traps.o
	31
	32	SIM_OBJS = \
	33	$(SIM_NEW_COMMON_OBJS) \
fa8b7c21 SH	34	cgen-utils.o \
	35	cgen-trace.o \
	36	cgen-scache.o \
	37	cgen-run.o \
	38	cgen-fpu.o \
5e9e2f41	39	cgen-accfp.o
fa8b7c21 SH	40
	41	SIM_OBJS += $(OR1K_OBJS)
	42
763b20ab MF	43	SIM_EXTRA_CFLAGS = -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31
763b20ab MF	44
fa8b7c21 SH	45	## COMMON_POST_CONFIG_FRAG
	46
	47	arch = or1k
	48
9146585a	49	or1k.o: or1k.c
fa8b7c21 SH	50	$(COMPILE) $<
fa8b7c21 SH	51	$(POSTCOMPILE)
fa8b7c21	52
9146585a	53	sim-if.o: sim-if.c
fa8b7c21 SH	54	$(COMPILE) $<
	55	$(POSTCOMPILE)
	56
9146585a	57	traps.o: traps.c
fa8b7c21 SH	58	$(COMPILE) $<
	59	$(POSTCOMPILE)
	60
0a129eb1	61	stamps: stamp-arch stamp-cpu
fa8b7c21 SH	62
	63	# NOTE: Generated source files are specified as full paths,
	64	# e.g. $(srcdir)/arch.c, because make may decide the files live
	65	# in objdir otherwise.
	66
	67	OR1K_CGEN_DEPS = \
	68	$(CPU_DIR)/or1k.cpu \
	69	$(CPU_DIR)/or1k.opc \
	70	$(CPU_DIR)/or1kcommon.cpu \
	71	$(CPU_DIR)/or1korbis.cpu \
	72	$(CPU_DIR)/or1korfpx.cpu \
	73	Makefile
	74
	75	stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(OR1K_CGEN_DEPS)
	76	$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) \
	77	mach=or32,or32nd \
	78	archfile=$(CPU_DIR)/or1k.cpu \
	79	FLAGS="with-scache"
b6143d31	80	$(SILENCE) touch $@
fa8b7c21 SH	81	$(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
	82	@true
	83
	84	stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(OR1K_CGEN_DEPS)
	85	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
	86	cpu=or1k32bf \
	87	mach=or32,or32nd \
	88	archfile=$(CPU_DIR)/or1k.cpu \
	89	FLAGS="with-scache" \
	90	EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
b6143d31	91	$(SILENCE) touch $@
fa8b7c21 SH	92	$(srcdir)/cpu.h $(srcdir)/cpu.c $(srcdir)/model.c $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
fa8b7c21 SH	93	@true