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Commit | Line | Data |
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6e51bfa7 SH |
1 | /* Simulator instruction semantics for or1k32bf. |
2 | ||
3 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
4 | ||
e2882c85 | 5 | Copyright 1996-2018 Free Software Foundation, Inc. |
6e51bfa7 SH |
6 | |
7 | This file is part of the GNU simulators. | |
8 | ||
9 | This file is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 3, or (at your option) | |
12 | any later version. | |
13 | ||
14 | It is distributed in the hope that it will be useful, but WITHOUT | |
15 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
16 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
17 | License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License along | |
20 | with this program; if not, write to the Free Software Foundation, Inc., | |
21 | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. | |
22 | ||
23 | */ | |
24 | ||
25 | #define WANT_CPU or1k32bf | |
26 | #define WANT_CPU_OR1K32BF | |
27 | ||
28 | #include "sim-main.h" | |
29 | #include "cgen-mem.h" | |
30 | #include "cgen-ops.h" | |
31 | ||
32 | #undef GET_ATTR | |
33 | #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) | |
34 | ||
35 | /* This is used so that we can compile two copies of the semantic code, | |
36 | one with full feature support and one without that runs fast(er). | |
37 | FAST_P, when desired, is defined on the command line, -DFAST_P=1. */ | |
38 | #if FAST_P | |
39 | #define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn) | |
40 | #undef CGEN_TRACE_RESULT | |
41 | #define CGEN_TRACE_RESULT(cpu, abuf, name, type, val) | |
42 | #else | |
43 | #define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn) | |
44 | #endif | |
45 | ||
46 | /* x-invalid: --invalid-- */ | |
47 | ||
48 | static SEM_PC | |
49 | SEM_FN_NAME (or1k32bf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
50 | { | |
51 | #define FLD(f) abuf->fields.sfmt_empty.f | |
52 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
53 | int UNUSED written = 0; | |
54 | IADDR UNUSED pc = abuf->addr; | |
55 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
56 | ||
57 | { | |
58 | /* Update the recorded pc in the cpu state struct. | |
59 | Only necessary for WITH_SCACHE case, but to avoid the | |
60 | conditional compilation .... */ | |
61 | SET_H_PC (pc); | |
62 | /* Virtual insns have zero size. Overwrite vpc with address of next insn | |
63 | using the default-insn-bitsize spec. When executing insns in parallel | |
64 | we may want to queue the fault and continue execution. */ | |
65 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
66 | vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); | |
67 | } | |
68 | ||
69 | return vpc; | |
70 | #undef FLD | |
71 | } | |
72 | ||
73 | /* x-after: --after-- */ | |
74 | ||
75 | static SEM_PC | |
76 | SEM_FN_NAME (or1k32bf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
77 | { | |
78 | #define FLD(f) abuf->fields.sfmt_empty.f | |
79 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
80 | int UNUSED written = 0; | |
81 | IADDR UNUSED pc = abuf->addr; | |
82 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
83 | ||
84 | { | |
85 | #if WITH_SCACHE_PBB_OR1K32BF | |
86 | or1k32bf_pbb_after (current_cpu, sem_arg); | |
87 | #endif | |
88 | } | |
89 | ||
90 | return vpc; | |
91 | #undef FLD | |
92 | } | |
93 | ||
94 | /* x-before: --before-- */ | |
95 | ||
96 | static SEM_PC | |
97 | SEM_FN_NAME (or1k32bf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
98 | { | |
99 | #define FLD(f) abuf->fields.sfmt_empty.f | |
100 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
101 | int UNUSED written = 0; | |
102 | IADDR UNUSED pc = abuf->addr; | |
103 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
104 | ||
105 | { | |
106 | #if WITH_SCACHE_PBB_OR1K32BF | |
107 | or1k32bf_pbb_before (current_cpu, sem_arg); | |
108 | #endif | |
109 | } | |
110 | ||
111 | return vpc; | |
112 | #undef FLD | |
113 | } | |
114 | ||
115 | /* x-cti-chain: --cti-chain-- */ | |
116 | ||
117 | static SEM_PC | |
118 | SEM_FN_NAME (or1k32bf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
119 | { | |
120 | #define FLD(f) abuf->fields.sfmt_empty.f | |
121 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
122 | int UNUSED written = 0; | |
123 | IADDR UNUSED pc = abuf->addr; | |
124 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
125 | ||
126 | { | |
127 | #if WITH_SCACHE_PBB_OR1K32BF | |
128 | #ifdef DEFINE_SWITCH | |
129 | vpc = or1k32bf_pbb_cti_chain (current_cpu, sem_arg, | |
130 | pbb_br_type, pbb_br_npc); | |
131 | BREAK (sem); | |
132 | #else | |
133 | /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ | |
134 | vpc = or1k32bf_pbb_cti_chain (current_cpu, sem_arg, | |
135 | CPU_PBB_BR_TYPE (current_cpu), | |
136 | CPU_PBB_BR_NPC (current_cpu)); | |
137 | #endif | |
138 | #endif | |
139 | } | |
140 | ||
141 | return vpc; | |
142 | #undef FLD | |
143 | } | |
144 | ||
145 | /* x-chain: --chain-- */ | |
146 | ||
147 | static SEM_PC | |
148 | SEM_FN_NAME (or1k32bf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
149 | { | |
150 | #define FLD(f) abuf->fields.sfmt_empty.f | |
151 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
152 | int UNUSED written = 0; | |
153 | IADDR UNUSED pc = abuf->addr; | |
154 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
155 | ||
156 | { | |
157 | #if WITH_SCACHE_PBB_OR1K32BF | |
158 | vpc = or1k32bf_pbb_chain (current_cpu, sem_arg); | |
159 | #ifdef DEFINE_SWITCH | |
160 | BREAK (sem); | |
161 | #endif | |
162 | #endif | |
163 | } | |
164 | ||
165 | return vpc; | |
166 | #undef FLD | |
167 | } | |
168 | ||
169 | /* x-begin: --begin-- */ | |
170 | ||
171 | static SEM_PC | |
172 | SEM_FN_NAME (or1k32bf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
173 | { | |
174 | #define FLD(f) abuf->fields.sfmt_empty.f | |
175 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
176 | int UNUSED written = 0; | |
177 | IADDR UNUSED pc = abuf->addr; | |
178 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
179 | ||
180 | { | |
181 | #if WITH_SCACHE_PBB_OR1K32BF | |
182 | #if defined DEFINE_SWITCH || defined FAST_P | |
183 | /* In the switch case FAST_P is a constant, allowing several optimizations | |
184 | in any called inline functions. */ | |
185 | vpc = or1k32bf_pbb_begin (current_cpu, FAST_P); | |
186 | #else | |
187 | #if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ | |
188 | vpc = or1k32bf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); | |
189 | #else | |
190 | vpc = or1k32bf_pbb_begin (current_cpu, 0); | |
191 | #endif | |
192 | #endif | |
193 | #endif | |
194 | } | |
195 | ||
196 | return vpc; | |
197 | #undef FLD | |
198 | } | |
199 | ||
200 | /* l-j: l.j ${disp26} */ | |
201 | ||
202 | static SEM_PC | |
203 | SEM_FN_NAME (or1k32bf,l_j) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
204 | { | |
205 | #define FLD(f) abuf->fields.sfmt_l_j.f | |
206 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
207 | int UNUSED written = 0; | |
208 | IADDR UNUSED pc = abuf->addr; | |
209 | SEM_BRANCH_INIT | |
210 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
211 | ||
212 | { | |
213 | { | |
214 | { | |
215 | USI opval = FLD (i_disp26); | |
216 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
217 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
218 | } | |
219 | } | |
220 | if (GET_H_SYS_CPUCFGR_ND ()) { | |
221 | if (1) | |
222 | SEM_SKIP_INSN (current_cpu, sem_arg, vpc); | |
223 | } | |
224 | } | |
225 | ||
226 | SEM_BRANCH_FINI (vpc); | |
227 | return vpc; | |
228 | #undef FLD | |
229 | } | |
230 | ||
231 | /* l-jal: l.jal ${disp26} */ | |
232 | ||
233 | static SEM_PC | |
234 | SEM_FN_NAME (or1k32bf,l_jal) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
235 | { | |
236 | #define FLD(f) abuf->fields.sfmt_l_j.f | |
237 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
238 | int UNUSED written = 0; | |
239 | IADDR UNUSED pc = abuf->addr; | |
240 | SEM_BRANCH_INIT | |
241 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
242 | ||
243 | { | |
244 | { | |
245 | USI opval = ADDSI (pc, ((GET_H_SYS_CPUCFGR_ND ()) ? (4) : (8))); | |
246 | SET_H_GPR (((UINT) 9), opval); | |
247 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
248 | } | |
249 | { | |
250 | { | |
251 | { | |
252 | USI opval = FLD (i_disp26); | |
253 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
254 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
255 | } | |
256 | } | |
257 | if (GET_H_SYS_CPUCFGR_ND ()) { | |
258 | if (1) | |
259 | SEM_SKIP_INSN (current_cpu, sem_arg, vpc); | |
260 | } | |
261 | } | |
262 | } | |
263 | ||
264 | SEM_BRANCH_FINI (vpc); | |
265 | return vpc; | |
266 | #undef FLD | |
267 | } | |
268 | ||
269 | /* l-jr: l.jr $rB */ | |
270 | ||
271 | static SEM_PC | |
272 | SEM_FN_NAME (or1k32bf,l_jr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
273 | { | |
274 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
275 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
276 | int UNUSED written = 0; | |
277 | IADDR UNUSED pc = abuf->addr; | |
278 | SEM_BRANCH_INIT | |
279 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
280 | ||
281 | { | |
282 | { | |
283 | { | |
284 | USI opval = GET_H_GPR (FLD (f_r3)); | |
285 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
286 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
287 | } | |
288 | } | |
289 | if (GET_H_SYS_CPUCFGR_ND ()) { | |
290 | if (1) | |
291 | SEM_SKIP_INSN (current_cpu, sem_arg, vpc); | |
292 | } | |
293 | } | |
294 | ||
295 | SEM_BRANCH_FINI (vpc); | |
296 | return vpc; | |
297 | #undef FLD | |
298 | } | |
299 | ||
300 | /* l-jalr: l.jalr $rB */ | |
301 | ||
302 | static SEM_PC | |
303 | SEM_FN_NAME (or1k32bf,l_jalr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
304 | { | |
305 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
306 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
307 | int UNUSED written = 0; | |
308 | IADDR UNUSED pc = abuf->addr; | |
309 | SEM_BRANCH_INIT | |
310 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
311 | ||
312 | { | |
313 | { | |
314 | USI opval = ADDSI (pc, ((GET_H_SYS_CPUCFGR_ND ()) ? (4) : (8))); | |
315 | SET_H_GPR (((UINT) 9), opval); | |
316 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
317 | } | |
318 | { | |
319 | { | |
320 | { | |
321 | USI opval = GET_H_GPR (FLD (f_r3)); | |
322 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
323 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
324 | } | |
325 | } | |
326 | if (GET_H_SYS_CPUCFGR_ND ()) { | |
327 | if (1) | |
328 | SEM_SKIP_INSN (current_cpu, sem_arg, vpc); | |
329 | } | |
330 | } | |
331 | } | |
332 | ||
333 | SEM_BRANCH_FINI (vpc); | |
334 | return vpc; | |
335 | #undef FLD | |
336 | } | |
337 | ||
338 | /* l-bnf: l.bnf ${disp26} */ | |
339 | ||
340 | static SEM_PC | |
341 | SEM_FN_NAME (or1k32bf,l_bnf) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
342 | { | |
343 | #define FLD(f) abuf->fields.sfmt_l_j.f | |
344 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
345 | int UNUSED written = 0; | |
346 | IADDR UNUSED pc = abuf->addr; | |
347 | SEM_BRANCH_INIT | |
348 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
349 | ||
350 | { | |
351 | if (NOTSI (GET_H_SYS_SR_F ())) { | |
352 | { | |
353 | { | |
354 | USI opval = FLD (i_disp26); | |
355 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
356 | written |= (1 << 4); | |
357 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
358 | } | |
359 | } | |
360 | } else { | |
361 | if (GET_H_SYS_CPUCFGR_ND ()) { | |
362 | { | |
363 | { | |
364 | USI opval = ADDSI (pc, 4); | |
365 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
366 | written |= (1 << 4); | |
367 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
368 | } | |
369 | } | |
370 | } | |
371 | } | |
372 | if (GET_H_SYS_CPUCFGR_ND ()) { | |
373 | if (1) | |
374 | SEM_SKIP_INSN (current_cpu, sem_arg, vpc); | |
375 | } | |
376 | } | |
377 | ||
378 | abuf->written = written; | |
379 | SEM_BRANCH_FINI (vpc); | |
380 | return vpc; | |
381 | #undef FLD | |
382 | } | |
383 | ||
384 | /* l-bf: l.bf ${disp26} */ | |
385 | ||
386 | static SEM_PC | |
387 | SEM_FN_NAME (or1k32bf,l_bf) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
388 | { | |
389 | #define FLD(f) abuf->fields.sfmt_l_j.f | |
390 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
391 | int UNUSED written = 0; | |
392 | IADDR UNUSED pc = abuf->addr; | |
393 | SEM_BRANCH_INIT | |
394 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
395 | ||
396 | { | |
397 | if (GET_H_SYS_SR_F ()) { | |
398 | { | |
399 | { | |
400 | USI opval = FLD (i_disp26); | |
401 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
402 | written |= (1 << 4); | |
403 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
404 | } | |
405 | } | |
406 | } else { | |
407 | if (GET_H_SYS_CPUCFGR_ND ()) { | |
408 | { | |
409 | { | |
410 | USI opval = ADDSI (pc, 4); | |
411 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
412 | written |= (1 << 4); | |
413 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
414 | } | |
415 | } | |
416 | } | |
417 | } | |
418 | if (GET_H_SYS_CPUCFGR_ND ()) { | |
419 | if (1) | |
420 | SEM_SKIP_INSN (current_cpu, sem_arg, vpc); | |
421 | } | |
422 | } | |
423 | ||
424 | abuf->written = written; | |
425 | SEM_BRANCH_FINI (vpc); | |
426 | return vpc; | |
427 | #undef FLD | |
428 | } | |
429 | ||
430 | /* l-trap: l.trap ${uimm16} */ | |
431 | ||
432 | static SEM_PC | |
433 | SEM_FN_NAME (or1k32bf,l_trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
434 | { | |
435 | #define FLD(f) abuf->fields.sfmt_empty.f | |
436 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
437 | int UNUSED written = 0; | |
438 | IADDR UNUSED pc = abuf->addr; | |
439 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
440 | ||
441 | or1k32bf_exception (current_cpu, pc, EXCEPT_TRAP); | |
442 | ||
443 | return vpc; | |
444 | #undef FLD | |
445 | } | |
446 | ||
447 | /* l-sys: l.sys ${uimm16} */ | |
448 | ||
449 | static SEM_PC | |
450 | SEM_FN_NAME (or1k32bf,l_sys) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
451 | { | |
452 | #define FLD(f) abuf->fields.sfmt_empty.f | |
453 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
454 | int UNUSED written = 0; | |
455 | IADDR UNUSED pc = abuf->addr; | |
456 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
457 | ||
458 | or1k32bf_exception (current_cpu, pc, EXCEPT_SYSCALL); | |
459 | ||
460 | return vpc; | |
461 | #undef FLD | |
462 | } | |
463 | ||
464 | /* l-msync: l.msync */ | |
465 | ||
466 | static SEM_PC | |
467 | SEM_FN_NAME (or1k32bf,l_msync) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
468 | { | |
469 | #define FLD(f) abuf->fields.sfmt_empty.f | |
470 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
471 | int UNUSED written = 0; | |
472 | IADDR UNUSED pc = abuf->addr; | |
473 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
474 | ||
475 | ((void) 0); /*nop*/ | |
476 | ||
477 | return vpc; | |
478 | #undef FLD | |
479 | } | |
480 | ||
481 | /* l-psync: l.psync */ | |
482 | ||
483 | static SEM_PC | |
484 | SEM_FN_NAME (or1k32bf,l_psync) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
485 | { | |
486 | #define FLD(f) abuf->fields.sfmt_empty.f | |
487 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
488 | int UNUSED written = 0; | |
489 | IADDR UNUSED pc = abuf->addr; | |
490 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
491 | ||
492 | ((void) 0); /*nop*/ | |
493 | ||
494 | return vpc; | |
495 | #undef FLD | |
496 | } | |
497 | ||
498 | /* l-csync: l.csync */ | |
499 | ||
500 | static SEM_PC | |
501 | SEM_FN_NAME (or1k32bf,l_csync) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
502 | { | |
503 | #define FLD(f) abuf->fields.sfmt_empty.f | |
504 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
505 | int UNUSED written = 0; | |
506 | IADDR UNUSED pc = abuf->addr; | |
507 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
508 | ||
509 | ((void) 0); /*nop*/ | |
510 | ||
511 | return vpc; | |
512 | #undef FLD | |
513 | } | |
514 | ||
515 | /* l-rfe: l.rfe */ | |
516 | ||
517 | static SEM_PC | |
518 | SEM_FN_NAME (or1k32bf,l_rfe) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
519 | { | |
520 | #define FLD(f) abuf->fields.sfmt_empty.f | |
521 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
522 | int UNUSED written = 0; | |
523 | IADDR UNUSED pc = abuf->addr; | |
524 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
525 | ||
526 | or1k32bf_rfe (current_cpu); | |
527 | ||
528 | return vpc; | |
529 | #undef FLD | |
530 | } | |
531 | ||
532 | /* l-nop-imm: l.nop ${uimm16} */ | |
533 | ||
534 | static SEM_PC | |
535 | SEM_FN_NAME (or1k32bf,l_nop_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
536 | { | |
537 | #define FLD(f) abuf->fields.sfmt_l_mfspr.f | |
538 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
539 | int UNUSED written = 0; | |
540 | IADDR UNUSED pc = abuf->addr; | |
541 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
542 | ||
543 | or1k32bf_nop (current_cpu, ZEXTSISI (FLD (f_uimm16))); | |
544 | ||
545 | return vpc; | |
546 | #undef FLD | |
547 | } | |
548 | ||
549 | /* l-movhi: l.movhi $rD,$uimm16 */ | |
550 | ||
551 | static SEM_PC | |
552 | SEM_FN_NAME (or1k32bf,l_movhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
553 | { | |
554 | #define FLD(f) abuf->fields.sfmt_l_mfspr.f | |
555 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
556 | int UNUSED written = 0; | |
557 | IADDR UNUSED pc = abuf->addr; | |
558 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
559 | ||
560 | { | |
561 | USI opval = SLLSI (ZEXTSISI (FLD (f_uimm16)), 16); | |
562 | SET_H_GPR (FLD (f_r1), opval); | |
563 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
564 | } | |
565 | ||
566 | return vpc; | |
567 | #undef FLD | |
568 | } | |
569 | ||
570 | /* l-macrc: l.macrc $rD */ | |
571 | ||
572 | static SEM_PC | |
573 | SEM_FN_NAME (or1k32bf,l_macrc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
574 | { | |
575 | #define FLD(f) abuf->fields.sfmt_l_slli.f | |
576 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
577 | int UNUSED written = 0; | |
578 | IADDR UNUSED pc = abuf->addr; | |
579 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
580 | ||
581 | { | |
582 | { | |
583 | USI opval = GET_H_MAC_MACLO (); | |
584 | SET_H_GPR (FLD (f_r1), opval); | |
585 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
586 | } | |
587 | { | |
588 | USI opval = 0; | |
589 | SET_H_MAC_MACLO (opval); | |
590 | CGEN_TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval); | |
591 | } | |
592 | { | |
593 | USI opval = 0; | |
594 | SET_H_MAC_MACHI (opval); | |
595 | CGEN_TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval); | |
596 | } | |
597 | } | |
598 | ||
599 | return vpc; | |
600 | #undef FLD | |
601 | } | |
602 | ||
603 | /* l-mfspr: l.mfspr $rD,$rA,${uimm16} */ | |
604 | ||
605 | static SEM_PC | |
606 | SEM_FN_NAME (or1k32bf,l_mfspr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
607 | { | |
608 | #define FLD(f) abuf->fields.sfmt_l_mfspr.f | |
609 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
610 | int UNUSED written = 0; | |
611 | IADDR UNUSED pc = abuf->addr; | |
612 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
613 | ||
614 | { | |
615 | USI opval = or1k32bf_mfspr (current_cpu, ORSI (GET_H_GPR (FLD (f_r2)), ZEXTSISI (FLD (f_uimm16)))); | |
616 | SET_H_GPR (FLD (f_r1), opval); | |
617 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
618 | } | |
619 | ||
620 | return vpc; | |
621 | #undef FLD | |
622 | } | |
623 | ||
624 | /* l-mtspr: l.mtspr $rA,$rB,${uimm16-split} */ | |
625 | ||
626 | static SEM_PC | |
627 | SEM_FN_NAME (or1k32bf,l_mtspr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
628 | { | |
629 | #define FLD(f) abuf->fields.sfmt_l_mtspr.f | |
630 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
631 | int UNUSED written = 0; | |
632 | IADDR UNUSED pc = abuf->addr; | |
633 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
634 | ||
635 | or1k32bf_mtspr (current_cpu, ORSI (GET_H_GPR (FLD (f_r2)), ZEXTSISI (FLD (f_uimm16_split))), GET_H_GPR (FLD (f_r3))); | |
636 | ||
637 | return vpc; | |
638 | #undef FLD | |
639 | } | |
640 | ||
641 | /* l-lwz: l.lwz $rD,${simm16}($rA) */ | |
642 | ||
643 | static SEM_PC | |
644 | SEM_FN_NAME (or1k32bf,l_lwz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
645 | { | |
646 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
647 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
648 | int UNUSED written = 0; | |
649 | IADDR UNUSED pc = abuf->addr; | |
650 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
651 | ||
652 | { | |
653 | USI opval = ZEXTSISI (GETMEMUSI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 4))); | |
654 | SET_H_GPR (FLD (f_r1), opval); | |
655 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
656 | } | |
657 | ||
658 | return vpc; | |
659 | #undef FLD | |
660 | } | |
661 | ||
662 | /* l-lws: l.lws $rD,${simm16}($rA) */ | |
663 | ||
664 | static SEM_PC | |
665 | SEM_FN_NAME (or1k32bf,l_lws) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
666 | { | |
667 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
668 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
669 | int UNUSED written = 0; | |
670 | IADDR UNUSED pc = abuf->addr; | |
671 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
672 | ||
673 | { | |
674 | SI opval = EXTSISI (GETMEMSI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 4))); | |
675 | SET_H_GPR (FLD (f_r1), opval); | |
676 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
677 | } | |
678 | ||
679 | return vpc; | |
680 | #undef FLD | |
681 | } | |
682 | ||
683 | /* l-lwa: l.lwa $rD,${simm16}($rA) */ | |
684 | ||
685 | static SEM_PC | |
686 | SEM_FN_NAME (or1k32bf,l_lwa) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
687 | { | |
688 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
689 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
690 | int UNUSED written = 0; | |
691 | IADDR UNUSED pc = abuf->addr; | |
692 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
693 | ||
694 | { | |
695 | { | |
696 | USI opval = ZEXTSISI (GETMEMUSI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 4))); | |
697 | SET_H_GPR (FLD (f_r1), opval); | |
698 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
699 | } | |
700 | { | |
701 | BI opval = 1; | |
702 | CPU (h_atomic_reserve) = opval; | |
703 | CGEN_TRACE_RESULT (current_cpu, abuf, "atomic-reserve", 'x', opval); | |
704 | } | |
705 | { | |
706 | SI opval = or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 4); | |
707 | CPU (h_atomic_address) = opval; | |
708 | CGEN_TRACE_RESULT (current_cpu, abuf, "atomic-address", 'x', opval); | |
709 | } | |
710 | } | |
711 | ||
712 | return vpc; | |
713 | #undef FLD | |
714 | } | |
715 | ||
716 | /* l-lbz: l.lbz $rD,${simm16}($rA) */ | |
717 | ||
718 | static SEM_PC | |
719 | SEM_FN_NAME (or1k32bf,l_lbz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
720 | { | |
721 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
722 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
723 | int UNUSED written = 0; | |
724 | IADDR UNUSED pc = abuf->addr; | |
725 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
726 | ||
727 | { | |
728 | USI opval = ZEXTQISI (GETMEMUQI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 1))); | |
729 | SET_H_GPR (FLD (f_r1), opval); | |
730 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
731 | } | |
732 | ||
733 | return vpc; | |
734 | #undef FLD | |
735 | } | |
736 | ||
737 | /* l-lbs: l.lbs $rD,${simm16}($rA) */ | |
738 | ||
739 | static SEM_PC | |
740 | SEM_FN_NAME (or1k32bf,l_lbs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
741 | { | |
742 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
743 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
744 | int UNUSED written = 0; | |
745 | IADDR UNUSED pc = abuf->addr; | |
746 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
747 | ||
748 | { | |
749 | SI opval = EXTQISI (GETMEMQI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 1))); | |
750 | SET_H_GPR (FLD (f_r1), opval); | |
751 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
752 | } | |
753 | ||
754 | return vpc; | |
755 | #undef FLD | |
756 | } | |
757 | ||
758 | /* l-lhz: l.lhz $rD,${simm16}($rA) */ | |
759 | ||
760 | static SEM_PC | |
761 | SEM_FN_NAME (or1k32bf,l_lhz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
762 | { | |
763 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
764 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
765 | int UNUSED written = 0; | |
766 | IADDR UNUSED pc = abuf->addr; | |
767 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
768 | ||
769 | { | |
770 | USI opval = ZEXTHISI (GETMEMUHI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 2))); | |
771 | SET_H_GPR (FLD (f_r1), opval); | |
772 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
773 | } | |
774 | ||
775 | return vpc; | |
776 | #undef FLD | |
777 | } | |
778 | ||
779 | /* l-lhs: l.lhs $rD,${simm16}($rA) */ | |
780 | ||
781 | static SEM_PC | |
782 | SEM_FN_NAME (or1k32bf,l_lhs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
783 | { | |
784 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
785 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
786 | int UNUSED written = 0; | |
787 | IADDR UNUSED pc = abuf->addr; | |
788 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
789 | ||
790 | { | |
791 | SI opval = EXTHISI (GETMEMHI (current_cpu, pc, or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 2))); | |
792 | SET_H_GPR (FLD (f_r1), opval); | |
793 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
794 | } | |
795 | ||
796 | return vpc; | |
797 | #undef FLD | |
798 | } | |
799 | ||
800 | /* l-sw: l.sw ${simm16-split}($rA),$rB */ | |
801 | ||
802 | static SEM_PC | |
803 | SEM_FN_NAME (or1k32bf,l_sw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
804 | { | |
805 | #define FLD(f) abuf->fields.sfmt_l_sw.f | |
806 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
807 | int UNUSED written = 0; | |
808 | IADDR UNUSED pc = abuf->addr; | |
809 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
810 | ||
811 | { | |
812 | SI tmp_addr; | |
813 | tmp_addr = or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16_split)), 4); | |
814 | { | |
815 | USI opval = TRUNCSISI (GET_H_GPR (FLD (f_r3))); | |
816 | SETMEMUSI (current_cpu, pc, tmp_addr, opval); | |
817 | CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
818 | } | |
819 | if (EQSI (ANDSI (tmp_addr, 268435452), CPU (h_atomic_address))) { | |
820 | { | |
821 | BI opval = 0; | |
822 | CPU (h_atomic_reserve) = opval; | |
823 | written |= (1 << 4); | |
824 | CGEN_TRACE_RESULT (current_cpu, abuf, "atomic-reserve", 'x', opval); | |
825 | } | |
826 | } | |
827 | } | |
828 | ||
829 | abuf->written = written; | |
830 | return vpc; | |
831 | #undef FLD | |
832 | } | |
833 | ||
834 | /* l-sb: l.sb ${simm16-split}($rA),$rB */ | |
835 | ||
836 | static SEM_PC | |
837 | SEM_FN_NAME (or1k32bf,l_sb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
838 | { | |
839 | #define FLD(f) abuf->fields.sfmt_l_sw.f | |
840 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
841 | int UNUSED written = 0; | |
842 | IADDR UNUSED pc = abuf->addr; | |
843 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
844 | ||
845 | { | |
846 | SI tmp_addr; | |
847 | tmp_addr = or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16_split)), 1); | |
848 | { | |
849 | UQI opval = TRUNCSIQI (GET_H_GPR (FLD (f_r3))); | |
850 | SETMEMUQI (current_cpu, pc, tmp_addr, opval); | |
851 | CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
852 | } | |
853 | if (EQSI (ANDSI (tmp_addr, 268435452), CPU (h_atomic_address))) { | |
854 | { | |
855 | BI opval = 0; | |
856 | CPU (h_atomic_reserve) = opval; | |
857 | written |= (1 << 4); | |
858 | CGEN_TRACE_RESULT (current_cpu, abuf, "atomic-reserve", 'x', opval); | |
859 | } | |
860 | } | |
861 | } | |
862 | ||
863 | abuf->written = written; | |
864 | return vpc; | |
865 | #undef FLD | |
866 | } | |
867 | ||
868 | /* l-sh: l.sh ${simm16-split}($rA),$rB */ | |
869 | ||
870 | static SEM_PC | |
871 | SEM_FN_NAME (or1k32bf,l_sh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
872 | { | |
873 | #define FLD(f) abuf->fields.sfmt_l_sw.f | |
874 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
875 | int UNUSED written = 0; | |
876 | IADDR UNUSED pc = abuf->addr; | |
877 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
878 | ||
879 | { | |
880 | SI tmp_addr; | |
881 | tmp_addr = or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16_split)), 2); | |
882 | { | |
883 | UHI opval = TRUNCSIHI (GET_H_GPR (FLD (f_r3))); | |
884 | SETMEMUHI (current_cpu, pc, tmp_addr, opval); | |
885 | CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
886 | } | |
887 | if (EQSI (ANDSI (tmp_addr, 268435452), CPU (h_atomic_address))) { | |
888 | { | |
889 | BI opval = 0; | |
890 | CPU (h_atomic_reserve) = opval; | |
891 | written |= (1 << 4); | |
892 | CGEN_TRACE_RESULT (current_cpu, abuf, "atomic-reserve", 'x', opval); | |
893 | } | |
894 | } | |
895 | } | |
896 | ||
897 | abuf->written = written; | |
898 | return vpc; | |
899 | #undef FLD | |
900 | } | |
901 | ||
902 | /* l-swa: l.swa ${simm16-split}($rA),$rB */ | |
903 | ||
904 | static SEM_PC | |
905 | SEM_FN_NAME (or1k32bf,l_swa) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
906 | { | |
907 | #define FLD(f) abuf->fields.sfmt_l_sw.f | |
908 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
909 | int UNUSED written = 0; | |
910 | IADDR UNUSED pc = abuf->addr; | |
911 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
912 | ||
913 | { | |
914 | SI tmp_addr; | |
915 | BI tmp_flag; | |
916 | tmp_addr = or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16_split)), 4); | |
917 | { | |
918 | USI opval = ANDBI (CPU (h_atomic_reserve), EQSI (tmp_addr, CPU (h_atomic_address))); | |
919 | SET_H_SYS_SR_F (opval); | |
920 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
921 | } | |
922 | if (GET_H_SYS_SR_F ()) { | |
923 | { | |
924 | USI opval = TRUNCSISI (GET_H_GPR (FLD (f_r3))); | |
925 | SETMEMUSI (current_cpu, pc, tmp_addr, opval); | |
926 | written |= (1 << 7); | |
927 | CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
928 | } | |
929 | } | |
930 | { | |
931 | BI opval = 0; | |
932 | CPU (h_atomic_reserve) = opval; | |
933 | CGEN_TRACE_RESULT (current_cpu, abuf, "atomic-reserve", 'x', opval); | |
934 | } | |
935 | } | |
936 | ||
937 | abuf->written = written; | |
938 | return vpc; | |
939 | #undef FLD | |
940 | } | |
941 | ||
942 | /* l-sll: l.sll $rD,$rA,$rB */ | |
943 | ||
944 | static SEM_PC | |
945 | SEM_FN_NAME (or1k32bf,l_sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
946 | { | |
947 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
948 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
949 | int UNUSED written = 0; | |
950 | IADDR UNUSED pc = abuf->addr; | |
951 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
952 | ||
953 | { | |
954 | USI opval = SLLSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
955 | SET_H_GPR (FLD (f_r1), opval); | |
956 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
957 | } | |
958 | ||
959 | return vpc; | |
960 | #undef FLD | |
961 | } | |
962 | ||
963 | /* l-slli: l.slli $rD,$rA,${uimm6} */ | |
964 | ||
965 | static SEM_PC | |
966 | SEM_FN_NAME (or1k32bf,l_slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
967 | { | |
968 | #define FLD(f) abuf->fields.sfmt_l_slli.f | |
969 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
970 | int UNUSED written = 0; | |
971 | IADDR UNUSED pc = abuf->addr; | |
972 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
973 | ||
974 | { | |
975 | USI opval = SLLSI (GET_H_GPR (FLD (f_r2)), FLD (f_uimm6)); | |
976 | SET_H_GPR (FLD (f_r1), opval); | |
977 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
978 | } | |
979 | ||
980 | return vpc; | |
981 | #undef FLD | |
982 | } | |
983 | ||
984 | /* l-srl: l.srl $rD,$rA,$rB */ | |
985 | ||
986 | static SEM_PC | |
987 | SEM_FN_NAME (or1k32bf,l_srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
988 | { | |
989 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
990 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
991 | int UNUSED written = 0; | |
992 | IADDR UNUSED pc = abuf->addr; | |
993 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
994 | ||
995 | { | |
996 | USI opval = SRLSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
997 | SET_H_GPR (FLD (f_r1), opval); | |
998 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
999 | } | |
1000 | ||
1001 | return vpc; | |
1002 | #undef FLD | |
1003 | } | |
1004 | ||
1005 | /* l-srli: l.srli $rD,$rA,${uimm6} */ | |
1006 | ||
1007 | static SEM_PC | |
1008 | SEM_FN_NAME (or1k32bf,l_srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1009 | { | |
1010 | #define FLD(f) abuf->fields.sfmt_l_slli.f | |
1011 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1012 | int UNUSED written = 0; | |
1013 | IADDR UNUSED pc = abuf->addr; | |
1014 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1015 | ||
1016 | { | |
1017 | USI opval = SRLSI (GET_H_GPR (FLD (f_r2)), FLD (f_uimm6)); | |
1018 | SET_H_GPR (FLD (f_r1), opval); | |
1019 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1020 | } | |
1021 | ||
1022 | return vpc; | |
1023 | #undef FLD | |
1024 | } | |
1025 | ||
1026 | /* l-sra: l.sra $rD,$rA,$rB */ | |
1027 | ||
1028 | static SEM_PC | |
1029 | SEM_FN_NAME (or1k32bf,l_sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1030 | { | |
1031 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
1032 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1033 | int UNUSED written = 0; | |
1034 | IADDR UNUSED pc = abuf->addr; | |
1035 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1036 | ||
1037 | { | |
1038 | USI opval = SRASI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
1039 | SET_H_GPR (FLD (f_r1), opval); | |
1040 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1041 | } | |
1042 | ||
1043 | return vpc; | |
1044 | #undef FLD | |
1045 | } | |
1046 | ||
1047 | /* l-srai: l.srai $rD,$rA,${uimm6} */ | |
1048 | ||
1049 | static SEM_PC | |
1050 | SEM_FN_NAME (or1k32bf,l_srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1051 | { | |
1052 | #define FLD(f) abuf->fields.sfmt_l_slli.f | |
1053 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1054 | int UNUSED written = 0; | |
1055 | IADDR UNUSED pc = abuf->addr; | |
1056 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1057 | ||
1058 | { | |
1059 | USI opval = SRASI (GET_H_GPR (FLD (f_r2)), FLD (f_uimm6)); | |
1060 | SET_H_GPR (FLD (f_r1), opval); | |
1061 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1062 | } | |
1063 | ||
1064 | return vpc; | |
1065 | #undef FLD | |
1066 | } | |
1067 | ||
1068 | /* l-ror: l.ror $rD,$rA,$rB */ | |
1069 | ||
1070 | static SEM_PC | |
1071 | SEM_FN_NAME (or1k32bf,l_ror) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1072 | { | |
1073 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
1074 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1075 | int UNUSED written = 0; | |
1076 | IADDR UNUSED pc = abuf->addr; | |
1077 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1078 | ||
1079 | { | |
1080 | USI opval = RORSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
1081 | SET_H_GPR (FLD (f_r1), opval); | |
1082 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1083 | } | |
1084 | ||
1085 | return vpc; | |
1086 | #undef FLD | |
1087 | } | |
1088 | ||
1089 | /* l-rori: l.rori $rD,$rA,${uimm6} */ | |
1090 | ||
1091 | static SEM_PC | |
1092 | SEM_FN_NAME (or1k32bf,l_rori) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1093 | { | |
1094 | #define FLD(f) abuf->fields.sfmt_l_slli.f | |
1095 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1096 | int UNUSED written = 0; | |
1097 | IADDR UNUSED pc = abuf->addr; | |
1098 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1099 | ||
1100 | { | |
1101 | USI opval = RORSI (GET_H_GPR (FLD (f_r2)), FLD (f_uimm6)); | |
1102 | SET_H_GPR (FLD (f_r1), opval); | |
1103 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1104 | } | |
1105 | ||
1106 | return vpc; | |
1107 | #undef FLD | |
1108 | } | |
1109 | ||
1110 | /* l-and: l.and $rD,$rA,$rB */ | |
1111 | ||
1112 | static SEM_PC | |
1113 | SEM_FN_NAME (or1k32bf,l_and) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1114 | { | |
1115 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
1116 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1117 | int UNUSED written = 0; | |
1118 | IADDR UNUSED pc = abuf->addr; | |
1119 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1120 | ||
1121 | { | |
1122 | USI opval = ANDSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
1123 | SET_H_GPR (FLD (f_r1), opval); | |
1124 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1125 | } | |
1126 | ||
1127 | return vpc; | |
1128 | #undef FLD | |
1129 | } | |
1130 | ||
1131 | /* l-or: l.or $rD,$rA,$rB */ | |
1132 | ||
1133 | static SEM_PC | |
1134 | SEM_FN_NAME (or1k32bf,l_or) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1135 | { | |
1136 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
1137 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1138 | int UNUSED written = 0; | |
1139 | IADDR UNUSED pc = abuf->addr; | |
1140 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1141 | ||
1142 | { | |
1143 | USI opval = ORSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
1144 | SET_H_GPR (FLD (f_r1), opval); | |
1145 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1146 | } | |
1147 | ||
1148 | return vpc; | |
1149 | #undef FLD | |
1150 | } | |
1151 | ||
1152 | /* l-xor: l.xor $rD,$rA,$rB */ | |
1153 | ||
1154 | static SEM_PC | |
1155 | SEM_FN_NAME (or1k32bf,l_xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1156 | { | |
1157 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
1158 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1159 | int UNUSED written = 0; | |
1160 | IADDR UNUSED pc = abuf->addr; | |
1161 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1162 | ||
1163 | { | |
1164 | USI opval = XORSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
1165 | SET_H_GPR (FLD (f_r1), opval); | |
1166 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1167 | } | |
1168 | ||
1169 | return vpc; | |
1170 | #undef FLD | |
1171 | } | |
1172 | ||
1173 | /* l-add: l.add $rD,$rA,$rB */ | |
1174 | ||
1175 | static SEM_PC | |
1176 | SEM_FN_NAME (or1k32bf,l_add) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1177 | { | |
1178 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
1179 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1180 | int UNUSED written = 0; | |
1181 | IADDR UNUSED pc = abuf->addr; | |
1182 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1183 | ||
1184 | { | |
1185 | { | |
1186 | { | |
1187 | BI opval = ADDCFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), 0); | |
1188 | SET_H_SYS_SR_CY (opval); | |
1189 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval); | |
1190 | } | |
1191 | { | |
1192 | BI opval = ADDOFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), 0); | |
1193 | SET_H_SYS_SR_OV (opval); | |
1194 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval); | |
1195 | } | |
1196 | { | |
1197 | USI opval = ADDSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
1198 | SET_H_GPR (FLD (f_r1), opval); | |
1199 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1200 | } | |
1201 | } | |
1202 | if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) { | |
1203 | or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE); | |
1204 | } | |
1205 | } | |
1206 | ||
1207 | return vpc; | |
1208 | #undef FLD | |
1209 | } | |
1210 | ||
1211 | /* l-sub: l.sub $rD,$rA,$rB */ | |
1212 | ||
1213 | static SEM_PC | |
1214 | SEM_FN_NAME (or1k32bf,l_sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1215 | { | |
1216 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
1217 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1218 | int UNUSED written = 0; | |
1219 | IADDR UNUSED pc = abuf->addr; | |
1220 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1221 | ||
1222 | { | |
1223 | { | |
1224 | { | |
1225 | BI opval = SUBCFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), 0); | |
1226 | SET_H_SYS_SR_CY (opval); | |
1227 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval); | |
1228 | } | |
1229 | { | |
1230 | BI opval = SUBOFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), 0); | |
1231 | SET_H_SYS_SR_OV (opval); | |
1232 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval); | |
1233 | } | |
1234 | { | |
1235 | USI opval = SUBSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
1236 | SET_H_GPR (FLD (f_r1), opval); | |
1237 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1238 | } | |
1239 | } | |
1240 | if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) { | |
1241 | or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE); | |
1242 | } | |
1243 | } | |
1244 | ||
1245 | return vpc; | |
1246 | #undef FLD | |
1247 | } | |
1248 | ||
1249 | /* l-addc: l.addc $rD,$rA,$rB */ | |
1250 | ||
1251 | static SEM_PC | |
1252 | SEM_FN_NAME (or1k32bf,l_addc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1253 | { | |
1254 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
1255 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1256 | int UNUSED written = 0; | |
1257 | IADDR UNUSED pc = abuf->addr; | |
1258 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1259 | ||
1260 | { | |
1261 | { | |
1262 | BI tmp_tmp_sys_sr_cy; | |
1263 | tmp_tmp_sys_sr_cy = GET_H_SYS_SR_CY (); | |
1264 | { | |
1265 | BI opval = ADDCFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), tmp_tmp_sys_sr_cy); | |
1266 | SET_H_SYS_SR_CY (opval); | |
1267 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval); | |
1268 | } | |
1269 | { | |
1270 | BI opval = ADDOFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), tmp_tmp_sys_sr_cy); | |
1271 | SET_H_SYS_SR_OV (opval); | |
1272 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval); | |
1273 | } | |
1274 | { | |
1275 | USI opval = ADDCSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)), tmp_tmp_sys_sr_cy); | |
1276 | SET_H_GPR (FLD (f_r1), opval); | |
1277 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1278 | } | |
1279 | } | |
1280 | if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) { | |
1281 | or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE); | |
1282 | } | |
1283 | } | |
1284 | ||
1285 | return vpc; | |
1286 | #undef FLD | |
1287 | } | |
1288 | ||
1289 | /* l-mul: l.mul $rD,$rA,$rB */ | |
1290 | ||
1291 | static SEM_PC | |
1292 | SEM_FN_NAME (or1k32bf,l_mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1293 | { | |
1294 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
1295 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1296 | int UNUSED written = 0; | |
1297 | IADDR UNUSED pc = abuf->addr; | |
1298 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1299 | ||
1300 | { | |
1301 | { | |
1302 | { | |
1303 | BI opval = MUL2OFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
1304 | SET_H_SYS_SR_OV (opval); | |
1305 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval); | |
1306 | } | |
1307 | { | |
1308 | BI opval = MUL1OFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
1309 | SET_H_SYS_SR_CY (opval); | |
1310 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval); | |
1311 | } | |
1312 | { | |
1313 | USI opval = MULSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
1314 | SET_H_GPR (FLD (f_r1), opval); | |
1315 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1316 | } | |
1317 | } | |
1318 | if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) { | |
1319 | or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE); | |
1320 | } | |
1321 | } | |
1322 | ||
1323 | return vpc; | |
1324 | #undef FLD | |
1325 | } | |
1326 | ||
1327 | /* l-mulu: l.mulu $rD,$rA,$rB */ | |
1328 | ||
1329 | static SEM_PC | |
1330 | SEM_FN_NAME (or1k32bf,l_mulu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1331 | { | |
1332 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
1333 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1334 | int UNUSED written = 0; | |
1335 | IADDR UNUSED pc = abuf->addr; | |
1336 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1337 | ||
1338 | { | |
1339 | { | |
1340 | { | |
1341 | BI opval = 0; | |
1342 | SET_H_SYS_SR_OV (opval); | |
1343 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval); | |
1344 | } | |
1345 | { | |
1346 | BI opval = MUL1OFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
1347 | SET_H_SYS_SR_CY (opval); | |
1348 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval); | |
1349 | } | |
1350 | { | |
1351 | USI opval = MULSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
1352 | SET_H_GPR (FLD (f_r1), opval); | |
1353 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1354 | } | |
1355 | } | |
1356 | if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) { | |
1357 | or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE); | |
1358 | } | |
1359 | } | |
1360 | ||
1361 | return vpc; | |
1362 | #undef FLD | |
1363 | } | |
1364 | ||
1365 | /* l-div: l.div $rD,$rA,$rB */ | |
1366 | ||
1367 | static SEM_PC | |
1368 | SEM_FN_NAME (or1k32bf,l_div) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1369 | { | |
1370 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
1371 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1372 | int UNUSED written = 0; | |
1373 | IADDR UNUSED pc = abuf->addr; | |
1374 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1375 | ||
1376 | { | |
1377 | if (NESI (GET_H_GPR (FLD (f_r3)), 0)) { | |
1378 | { | |
1379 | { | |
1380 | BI opval = 0; | |
1381 | SET_H_SYS_SR_CY (opval); | |
1382 | written |= (1 << 6); | |
1383 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval); | |
1384 | } | |
1385 | { | |
1386 | SI opval = DIVSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
1387 | SET_H_GPR (FLD (f_r1), opval); | |
1388 | written |= (1 << 5); | |
1389 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1390 | } | |
1391 | } | |
1392 | } else { | |
1393 | { | |
1394 | BI opval = 1; | |
1395 | SET_H_SYS_SR_CY (opval); | |
1396 | written |= (1 << 6); | |
1397 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval); | |
1398 | } | |
1399 | } | |
1400 | { | |
1401 | BI opval = 0; | |
1402 | SET_H_SYS_SR_OV (opval); | |
1403 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval); | |
1404 | } | |
1405 | if (ANDIF (GET_H_SYS_SR_CY (), GET_H_SYS_SR_OVE ())) { | |
1406 | or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE); | |
1407 | } | |
1408 | } | |
1409 | ||
1410 | abuf->written = written; | |
1411 | return vpc; | |
1412 | #undef FLD | |
1413 | } | |
1414 | ||
1415 | /* l-divu: l.divu $rD,$rA,$rB */ | |
1416 | ||
1417 | static SEM_PC | |
1418 | SEM_FN_NAME (or1k32bf,l_divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1419 | { | |
1420 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
1421 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1422 | int UNUSED written = 0; | |
1423 | IADDR UNUSED pc = abuf->addr; | |
1424 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1425 | ||
1426 | { | |
1427 | if (NESI (GET_H_GPR (FLD (f_r3)), 0)) { | |
1428 | { | |
1429 | { | |
1430 | BI opval = 0; | |
1431 | SET_H_SYS_SR_CY (opval); | |
1432 | written |= (1 << 6); | |
1433 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval); | |
1434 | } | |
1435 | { | |
1436 | USI opval = UDIVSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
1437 | SET_H_GPR (FLD (f_r1), opval); | |
1438 | written |= (1 << 5); | |
1439 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1440 | } | |
1441 | } | |
1442 | } else { | |
1443 | { | |
1444 | BI opval = 1; | |
1445 | SET_H_SYS_SR_CY (opval); | |
1446 | written |= (1 << 6); | |
1447 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval); | |
1448 | } | |
1449 | } | |
1450 | { | |
1451 | BI opval = 0; | |
1452 | SET_H_SYS_SR_OV (opval); | |
1453 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval); | |
1454 | } | |
1455 | if (ANDIF (GET_H_SYS_SR_CY (), GET_H_SYS_SR_OVE ())) { | |
1456 | or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE); | |
1457 | } | |
1458 | } | |
1459 | ||
1460 | abuf->written = written; | |
1461 | return vpc; | |
1462 | #undef FLD | |
1463 | } | |
1464 | ||
1465 | /* l-ff1: l.ff1 $rD,$rA */ | |
1466 | ||
1467 | static SEM_PC | |
1468 | SEM_FN_NAME (or1k32bf,l_ff1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1469 | { | |
1470 | #define FLD(f) abuf->fields.sfmt_l_slli.f | |
1471 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1472 | int UNUSED written = 0; | |
1473 | IADDR UNUSED pc = abuf->addr; | |
1474 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1475 | ||
1476 | { | |
1477 | USI opval = or1k32bf_ff1 (current_cpu, GET_H_GPR (FLD (f_r2))); | |
1478 | SET_H_GPR (FLD (f_r1), opval); | |
1479 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1480 | } | |
1481 | ||
1482 | return vpc; | |
1483 | #undef FLD | |
1484 | } | |
1485 | ||
1486 | /* l-fl1: l.fl1 $rD,$rA */ | |
1487 | ||
1488 | static SEM_PC | |
1489 | SEM_FN_NAME (or1k32bf,l_fl1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1490 | { | |
1491 | #define FLD(f) abuf->fields.sfmt_l_slli.f | |
1492 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1493 | int UNUSED written = 0; | |
1494 | IADDR UNUSED pc = abuf->addr; | |
1495 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1496 | ||
1497 | { | |
1498 | USI opval = or1k32bf_fl1 (current_cpu, GET_H_GPR (FLD (f_r2))); | |
1499 | SET_H_GPR (FLD (f_r1), opval); | |
1500 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1501 | } | |
1502 | ||
1503 | return vpc; | |
1504 | #undef FLD | |
1505 | } | |
1506 | ||
1507 | /* l-andi: l.andi $rD,$rA,$uimm16 */ | |
1508 | ||
1509 | static SEM_PC | |
1510 | SEM_FN_NAME (or1k32bf,l_andi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1511 | { | |
1512 | #define FLD(f) abuf->fields.sfmt_l_mfspr.f | |
1513 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1514 | int UNUSED written = 0; | |
1515 | IADDR UNUSED pc = abuf->addr; | |
1516 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1517 | ||
1518 | { | |
1519 | USI opval = ANDSI (GET_H_GPR (FLD (f_r2)), ZEXTSISI (FLD (f_uimm16))); | |
1520 | SET_H_GPR (FLD (f_r1), opval); | |
1521 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1522 | } | |
1523 | ||
1524 | return vpc; | |
1525 | #undef FLD | |
1526 | } | |
1527 | ||
1528 | /* l-ori: l.ori $rD,$rA,$uimm16 */ | |
1529 | ||
1530 | static SEM_PC | |
1531 | SEM_FN_NAME (or1k32bf,l_ori) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1532 | { | |
1533 | #define FLD(f) abuf->fields.sfmt_l_mfspr.f | |
1534 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1535 | int UNUSED written = 0; | |
1536 | IADDR UNUSED pc = abuf->addr; | |
1537 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1538 | ||
1539 | { | |
1540 | USI opval = ORSI (GET_H_GPR (FLD (f_r2)), ZEXTSISI (FLD (f_uimm16))); | |
1541 | SET_H_GPR (FLD (f_r1), opval); | |
1542 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1543 | } | |
1544 | ||
1545 | return vpc; | |
1546 | #undef FLD | |
1547 | } | |
1548 | ||
1549 | /* l-xori: l.xori $rD,$rA,$simm16 */ | |
1550 | ||
1551 | static SEM_PC | |
1552 | SEM_FN_NAME (or1k32bf,l_xori) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1553 | { | |
1554 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
1555 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1556 | int UNUSED written = 0; | |
1557 | IADDR UNUSED pc = abuf->addr; | |
1558 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1559 | ||
1560 | { | |
1561 | USI opval = XORSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16))); | |
1562 | SET_H_GPR (FLD (f_r1), opval); | |
1563 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1564 | } | |
1565 | ||
1566 | return vpc; | |
1567 | #undef FLD | |
1568 | } | |
1569 | ||
1570 | /* l-addi: l.addi $rD,$rA,$simm16 */ | |
1571 | ||
1572 | static SEM_PC | |
1573 | SEM_FN_NAME (or1k32bf,l_addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1574 | { | |
1575 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
1576 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1577 | int UNUSED written = 0; | |
1578 | IADDR UNUSED pc = abuf->addr; | |
1579 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1580 | ||
1581 | { | |
1582 | { | |
1583 | { | |
1584 | BI opval = ADDCFSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 0); | |
1585 | SET_H_SYS_SR_CY (opval); | |
1586 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval); | |
1587 | } | |
1588 | { | |
1589 | BI opval = ADDOFSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), 0); | |
1590 | SET_H_SYS_SR_OV (opval); | |
1591 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval); | |
1592 | } | |
1593 | { | |
1594 | USI opval = ADDSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16))); | |
1595 | SET_H_GPR (FLD (f_r1), opval); | |
1596 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1597 | } | |
1598 | } | |
1599 | if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) { | |
1600 | or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE); | |
1601 | } | |
1602 | } | |
1603 | ||
1604 | return vpc; | |
1605 | #undef FLD | |
1606 | } | |
1607 | ||
1608 | /* l-addic: l.addic $rD,$rA,$simm16 */ | |
1609 | ||
1610 | static SEM_PC | |
1611 | SEM_FN_NAME (or1k32bf,l_addic) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1612 | { | |
1613 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
1614 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1615 | int UNUSED written = 0; | |
1616 | IADDR UNUSED pc = abuf->addr; | |
1617 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1618 | ||
1619 | { | |
1620 | { | |
1621 | BI tmp_tmp_sys_sr_cy; | |
1622 | tmp_tmp_sys_sr_cy = GET_H_SYS_SR_CY (); | |
1623 | { | |
1624 | BI opval = ADDCFSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), tmp_tmp_sys_sr_cy); | |
1625 | SET_H_SYS_SR_CY (opval); | |
1626 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval); | |
1627 | } | |
1628 | { | |
1629 | BI opval = ADDOFSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), tmp_tmp_sys_sr_cy); | |
1630 | SET_H_SYS_SR_OV (opval); | |
1631 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval); | |
1632 | } | |
1633 | { | |
1634 | SI opval = ADDCSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)), tmp_tmp_sys_sr_cy); | |
1635 | SET_H_GPR (FLD (f_r1), opval); | |
1636 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1637 | } | |
1638 | } | |
1639 | if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) { | |
1640 | or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE); | |
1641 | } | |
1642 | } | |
1643 | ||
1644 | return vpc; | |
1645 | #undef FLD | |
1646 | } | |
1647 | ||
1648 | /* l-muli: l.muli $rD,$rA,$simm16 */ | |
1649 | ||
1650 | static SEM_PC | |
1651 | SEM_FN_NAME (or1k32bf,l_muli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1652 | { | |
1653 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
1654 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1655 | int UNUSED written = 0; | |
1656 | IADDR UNUSED pc = abuf->addr; | |
1657 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1658 | ||
1659 | { | |
1660 | { | |
1661 | { | |
1662 | USI opval = MUL2OFSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16))); | |
1663 | SET_H_SYS_SR_OV (opval); | |
1664 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval); | |
1665 | } | |
1666 | { | |
1667 | USI opval = MUL1OFSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16))); | |
1668 | SET_H_SYS_SR_CY (opval); | |
1669 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval); | |
1670 | } | |
1671 | { | |
1672 | USI opval = MULSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16))); | |
1673 | SET_H_GPR (FLD (f_r1), opval); | |
1674 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1675 | } | |
1676 | } | |
1677 | if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) { | |
1678 | or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE); | |
1679 | } | |
1680 | } | |
1681 | ||
1682 | return vpc; | |
1683 | #undef FLD | |
1684 | } | |
1685 | ||
1686 | /* l-exths: l.exths $rD,$rA */ | |
1687 | ||
1688 | static SEM_PC | |
1689 | SEM_FN_NAME (or1k32bf,l_exths) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1690 | { | |
1691 | #define FLD(f) abuf->fields.sfmt_l_slli.f | |
1692 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1693 | int UNUSED written = 0; | |
1694 | IADDR UNUSED pc = abuf->addr; | |
1695 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1696 | ||
1697 | { | |
1698 | USI opval = EXTHISI (TRUNCSIHI (GET_H_GPR (FLD (f_r2)))); | |
1699 | SET_H_GPR (FLD (f_r1), opval); | |
1700 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1701 | } | |
1702 | ||
1703 | return vpc; | |
1704 | #undef FLD | |
1705 | } | |
1706 | ||
1707 | /* l-extbs: l.extbs $rD,$rA */ | |
1708 | ||
1709 | static SEM_PC | |
1710 | SEM_FN_NAME (or1k32bf,l_extbs) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1711 | { | |
1712 | #define FLD(f) abuf->fields.sfmt_l_slli.f | |
1713 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1714 | int UNUSED written = 0; | |
1715 | IADDR UNUSED pc = abuf->addr; | |
1716 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1717 | ||
1718 | { | |
1719 | USI opval = EXTQISI (TRUNCSIQI (GET_H_GPR (FLD (f_r2)))); | |
1720 | SET_H_GPR (FLD (f_r1), opval); | |
1721 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1722 | } | |
1723 | ||
1724 | return vpc; | |
1725 | #undef FLD | |
1726 | } | |
1727 | ||
1728 | /* l-exthz: l.exthz $rD,$rA */ | |
1729 | ||
1730 | static SEM_PC | |
1731 | SEM_FN_NAME (or1k32bf,l_exthz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1732 | { | |
1733 | #define FLD(f) abuf->fields.sfmt_l_slli.f | |
1734 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1735 | int UNUSED written = 0; | |
1736 | IADDR UNUSED pc = abuf->addr; | |
1737 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1738 | ||
1739 | { | |
1740 | USI opval = ZEXTHISI (TRUNCSIHI (GET_H_GPR (FLD (f_r2)))); | |
1741 | SET_H_GPR (FLD (f_r1), opval); | |
1742 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1743 | } | |
1744 | ||
1745 | return vpc; | |
1746 | #undef FLD | |
1747 | } | |
1748 | ||
1749 | /* l-extbz: l.extbz $rD,$rA */ | |
1750 | ||
1751 | static SEM_PC | |
1752 | SEM_FN_NAME (or1k32bf,l_extbz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1753 | { | |
1754 | #define FLD(f) abuf->fields.sfmt_l_slli.f | |
1755 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1756 | int UNUSED written = 0; | |
1757 | IADDR UNUSED pc = abuf->addr; | |
1758 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1759 | ||
1760 | { | |
1761 | USI opval = ZEXTQISI (TRUNCSIQI (GET_H_GPR (FLD (f_r2)))); | |
1762 | SET_H_GPR (FLD (f_r1), opval); | |
1763 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1764 | } | |
1765 | ||
1766 | return vpc; | |
1767 | #undef FLD | |
1768 | } | |
1769 | ||
1770 | /* l-extws: l.extws $rD,$rA */ | |
1771 | ||
1772 | static SEM_PC | |
1773 | SEM_FN_NAME (or1k32bf,l_extws) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1774 | { | |
1775 | #define FLD(f) abuf->fields.sfmt_l_slli.f | |
1776 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1777 | int UNUSED written = 0; | |
1778 | IADDR UNUSED pc = abuf->addr; | |
1779 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1780 | ||
1781 | { | |
1782 | USI opval = EXTSISI (TRUNCSISI (GET_H_GPR (FLD (f_r2)))); | |
1783 | SET_H_GPR (FLD (f_r1), opval); | |
1784 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1785 | } | |
1786 | ||
1787 | return vpc; | |
1788 | #undef FLD | |
1789 | } | |
1790 | ||
1791 | /* l-extwz: l.extwz $rD,$rA */ | |
1792 | ||
1793 | static SEM_PC | |
1794 | SEM_FN_NAME (or1k32bf,l_extwz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1795 | { | |
1796 | #define FLD(f) abuf->fields.sfmt_l_slli.f | |
1797 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1798 | int UNUSED written = 0; | |
1799 | IADDR UNUSED pc = abuf->addr; | |
1800 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1801 | ||
1802 | { | |
1803 | USI opval = ZEXTSISI (TRUNCSISI (GET_H_GPR (FLD (f_r2)))); | |
1804 | SET_H_GPR (FLD (f_r1), opval); | |
1805 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1806 | } | |
1807 | ||
1808 | return vpc; | |
1809 | #undef FLD | |
1810 | } | |
1811 | ||
1812 | /* l-cmov: l.cmov $rD,$rA,$rB */ | |
1813 | ||
1814 | static SEM_PC | |
1815 | SEM_FN_NAME (or1k32bf,l_cmov) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1816 | { | |
1817 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
1818 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1819 | int UNUSED written = 0; | |
1820 | IADDR UNUSED pc = abuf->addr; | |
1821 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1822 | ||
1823 | if (GET_H_SYS_SR_F ()) { | |
1824 | { | |
1825 | USI opval = GET_H_GPR (FLD (f_r2)); | |
1826 | SET_H_GPR (FLD (f_r1), opval); | |
1827 | written |= (1 << 3); | |
1828 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1829 | } | |
1830 | } else { | |
1831 | { | |
1832 | USI opval = GET_H_GPR (FLD (f_r3)); | |
1833 | SET_H_GPR (FLD (f_r1), opval); | |
1834 | written |= (1 << 3); | |
1835 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1836 | } | |
1837 | } | |
1838 | ||
1839 | abuf->written = written; | |
1840 | return vpc; | |
1841 | #undef FLD | |
1842 | } | |
1843 | ||
1844 | /* l-sfgts: l.sfgts $rA,$rB */ | |
1845 | ||
1846 | static SEM_PC | |
1847 | SEM_FN_NAME (or1k32bf,l_sfgts) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1848 | { | |
1849 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
1850 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1851 | int UNUSED written = 0; | |
1852 | IADDR UNUSED pc = abuf->addr; | |
1853 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1854 | ||
1855 | { | |
1856 | USI opval = GTSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
1857 | SET_H_SYS_SR_F (opval); | |
1858 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
1859 | } | |
1860 | ||
1861 | return vpc; | |
1862 | #undef FLD | |
1863 | } | |
1864 | ||
1865 | /* l-sfgtsi: l.sfgtsi $rA,$simm16 */ | |
1866 | ||
1867 | static SEM_PC | |
1868 | SEM_FN_NAME (or1k32bf,l_sfgtsi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1869 | { | |
1870 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
1871 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1872 | int UNUSED written = 0; | |
1873 | IADDR UNUSED pc = abuf->addr; | |
1874 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1875 | ||
1876 | { | |
1877 | USI opval = GTSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16))); | |
1878 | SET_H_SYS_SR_F (opval); | |
1879 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
1880 | } | |
1881 | ||
1882 | return vpc; | |
1883 | #undef FLD | |
1884 | } | |
1885 | ||
1886 | /* l-sfgtu: l.sfgtu $rA,$rB */ | |
1887 | ||
1888 | static SEM_PC | |
1889 | SEM_FN_NAME (or1k32bf,l_sfgtu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1890 | { | |
1891 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
1892 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1893 | int UNUSED written = 0; | |
1894 | IADDR UNUSED pc = abuf->addr; | |
1895 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1896 | ||
1897 | { | |
1898 | USI opval = GTUSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
1899 | SET_H_SYS_SR_F (opval); | |
1900 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
1901 | } | |
1902 | ||
1903 | return vpc; | |
1904 | #undef FLD | |
1905 | } | |
1906 | ||
1907 | /* l-sfgtui: l.sfgtui $rA,$simm16 */ | |
1908 | ||
1909 | static SEM_PC | |
1910 | SEM_FN_NAME (or1k32bf,l_sfgtui) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1911 | { | |
1912 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
1913 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1914 | int UNUSED written = 0; | |
1915 | IADDR UNUSED pc = abuf->addr; | |
1916 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1917 | ||
1918 | { | |
1919 | USI opval = GTUSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16))); | |
1920 | SET_H_SYS_SR_F (opval); | |
1921 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
1922 | } | |
1923 | ||
1924 | return vpc; | |
1925 | #undef FLD | |
1926 | } | |
1927 | ||
1928 | /* l-sfges: l.sfges $rA,$rB */ | |
1929 | ||
1930 | static SEM_PC | |
1931 | SEM_FN_NAME (or1k32bf,l_sfges) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1932 | { | |
1933 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
1934 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1935 | int UNUSED written = 0; | |
1936 | IADDR UNUSED pc = abuf->addr; | |
1937 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1938 | ||
1939 | { | |
1940 | USI opval = GESI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
1941 | SET_H_SYS_SR_F (opval); | |
1942 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
1943 | } | |
1944 | ||
1945 | return vpc; | |
1946 | #undef FLD | |
1947 | } | |
1948 | ||
1949 | /* l-sfgesi: l.sfgesi $rA,$simm16 */ | |
1950 | ||
1951 | static SEM_PC | |
1952 | SEM_FN_NAME (or1k32bf,l_sfgesi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1953 | { | |
1954 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
1955 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1956 | int UNUSED written = 0; | |
1957 | IADDR UNUSED pc = abuf->addr; | |
1958 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1959 | ||
1960 | { | |
1961 | USI opval = GESI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16))); | |
1962 | SET_H_SYS_SR_F (opval); | |
1963 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
1964 | } | |
1965 | ||
1966 | return vpc; | |
1967 | #undef FLD | |
1968 | } | |
1969 | ||
1970 | /* l-sfgeu: l.sfgeu $rA,$rB */ | |
1971 | ||
1972 | static SEM_PC | |
1973 | SEM_FN_NAME (or1k32bf,l_sfgeu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1974 | { | |
1975 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
1976 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1977 | int UNUSED written = 0; | |
1978 | IADDR UNUSED pc = abuf->addr; | |
1979 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1980 | ||
1981 | { | |
1982 | USI opval = GEUSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
1983 | SET_H_SYS_SR_F (opval); | |
1984 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
1985 | } | |
1986 | ||
1987 | return vpc; | |
1988 | #undef FLD | |
1989 | } | |
1990 | ||
1991 | /* l-sfgeui: l.sfgeui $rA,$simm16 */ | |
1992 | ||
1993 | static SEM_PC | |
1994 | SEM_FN_NAME (or1k32bf,l_sfgeui) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1995 | { | |
1996 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
1997 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1998 | int UNUSED written = 0; | |
1999 | IADDR UNUSED pc = abuf->addr; | |
2000 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2001 | ||
2002 | { | |
2003 | USI opval = GEUSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16))); | |
2004 | SET_H_SYS_SR_F (opval); | |
2005 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
2006 | } | |
2007 | ||
2008 | return vpc; | |
2009 | #undef FLD | |
2010 | } | |
2011 | ||
2012 | /* l-sflts: l.sflts $rA,$rB */ | |
2013 | ||
2014 | static SEM_PC | |
2015 | SEM_FN_NAME (or1k32bf,l_sflts) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2016 | { | |
2017 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
2018 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2019 | int UNUSED written = 0; | |
2020 | IADDR UNUSED pc = abuf->addr; | |
2021 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2022 | ||
2023 | { | |
2024 | USI opval = LTSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
2025 | SET_H_SYS_SR_F (opval); | |
2026 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
2027 | } | |
2028 | ||
2029 | return vpc; | |
2030 | #undef FLD | |
2031 | } | |
2032 | ||
2033 | /* l-sfltsi: l.sfltsi $rA,$simm16 */ | |
2034 | ||
2035 | static SEM_PC | |
2036 | SEM_FN_NAME (or1k32bf,l_sfltsi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2037 | { | |
2038 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
2039 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2040 | int UNUSED written = 0; | |
2041 | IADDR UNUSED pc = abuf->addr; | |
2042 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2043 | ||
2044 | { | |
2045 | USI opval = LTSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16))); | |
2046 | SET_H_SYS_SR_F (opval); | |
2047 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
2048 | } | |
2049 | ||
2050 | return vpc; | |
2051 | #undef FLD | |
2052 | } | |
2053 | ||
2054 | /* l-sfltu: l.sfltu $rA,$rB */ | |
2055 | ||
2056 | static SEM_PC | |
2057 | SEM_FN_NAME (or1k32bf,l_sfltu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2058 | { | |
2059 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
2060 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2061 | int UNUSED written = 0; | |
2062 | IADDR UNUSED pc = abuf->addr; | |
2063 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2064 | ||
2065 | { | |
2066 | USI opval = LTUSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
2067 | SET_H_SYS_SR_F (opval); | |
2068 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
2069 | } | |
2070 | ||
2071 | return vpc; | |
2072 | #undef FLD | |
2073 | } | |
2074 | ||
2075 | /* l-sfltui: l.sfltui $rA,$simm16 */ | |
2076 | ||
2077 | static SEM_PC | |
2078 | SEM_FN_NAME (or1k32bf,l_sfltui) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2079 | { | |
2080 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
2081 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2082 | int UNUSED written = 0; | |
2083 | IADDR UNUSED pc = abuf->addr; | |
2084 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2085 | ||
2086 | { | |
2087 | USI opval = LTUSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16))); | |
2088 | SET_H_SYS_SR_F (opval); | |
2089 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
2090 | } | |
2091 | ||
2092 | return vpc; | |
2093 | #undef FLD | |
2094 | } | |
2095 | ||
2096 | /* l-sfles: l.sfles $rA,$rB */ | |
2097 | ||
2098 | static SEM_PC | |
2099 | SEM_FN_NAME (or1k32bf,l_sfles) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2100 | { | |
2101 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
2102 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2103 | int UNUSED written = 0; | |
2104 | IADDR UNUSED pc = abuf->addr; | |
2105 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2106 | ||
2107 | { | |
2108 | USI opval = LESI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
2109 | SET_H_SYS_SR_F (opval); | |
2110 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
2111 | } | |
2112 | ||
2113 | return vpc; | |
2114 | #undef FLD | |
2115 | } | |
2116 | ||
2117 | /* l-sflesi: l.sflesi $rA,$simm16 */ | |
2118 | ||
2119 | static SEM_PC | |
2120 | SEM_FN_NAME (or1k32bf,l_sflesi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2121 | { | |
2122 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
2123 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2124 | int UNUSED written = 0; | |
2125 | IADDR UNUSED pc = abuf->addr; | |
2126 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2127 | ||
2128 | { | |
2129 | USI opval = LESI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16))); | |
2130 | SET_H_SYS_SR_F (opval); | |
2131 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
2132 | } | |
2133 | ||
2134 | return vpc; | |
2135 | #undef FLD | |
2136 | } | |
2137 | ||
2138 | /* l-sfleu: l.sfleu $rA,$rB */ | |
2139 | ||
2140 | static SEM_PC | |
2141 | SEM_FN_NAME (or1k32bf,l_sfleu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2142 | { | |
2143 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
2144 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2145 | int UNUSED written = 0; | |
2146 | IADDR UNUSED pc = abuf->addr; | |
2147 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2148 | ||
2149 | { | |
2150 | USI opval = LEUSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
2151 | SET_H_SYS_SR_F (opval); | |
2152 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
2153 | } | |
2154 | ||
2155 | return vpc; | |
2156 | #undef FLD | |
2157 | } | |
2158 | ||
2159 | /* l-sfleui: l.sfleui $rA,$simm16 */ | |
2160 | ||
2161 | static SEM_PC | |
2162 | SEM_FN_NAME (or1k32bf,l_sfleui) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2163 | { | |
2164 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
2165 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2166 | int UNUSED written = 0; | |
2167 | IADDR UNUSED pc = abuf->addr; | |
2168 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2169 | ||
2170 | { | |
2171 | USI opval = LEUSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16))); | |
2172 | SET_H_SYS_SR_F (opval); | |
2173 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
2174 | } | |
2175 | ||
2176 | return vpc; | |
2177 | #undef FLD | |
2178 | } | |
2179 | ||
2180 | /* l-sfeq: l.sfeq $rA,$rB */ | |
2181 | ||
2182 | static SEM_PC | |
2183 | SEM_FN_NAME (or1k32bf,l_sfeq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2184 | { | |
2185 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
2186 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2187 | int UNUSED written = 0; | |
2188 | IADDR UNUSED pc = abuf->addr; | |
2189 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2190 | ||
2191 | { | |
2192 | USI opval = EQSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
2193 | SET_H_SYS_SR_F (opval); | |
2194 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
2195 | } | |
2196 | ||
2197 | return vpc; | |
2198 | #undef FLD | |
2199 | } | |
2200 | ||
2201 | /* l-sfeqi: l.sfeqi $rA,$simm16 */ | |
2202 | ||
2203 | static SEM_PC | |
2204 | SEM_FN_NAME (or1k32bf,l_sfeqi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2205 | { | |
2206 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
2207 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2208 | int UNUSED written = 0; | |
2209 | IADDR UNUSED pc = abuf->addr; | |
2210 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2211 | ||
2212 | { | |
2213 | USI opval = EQSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16))); | |
2214 | SET_H_SYS_SR_F (opval); | |
2215 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
2216 | } | |
2217 | ||
2218 | return vpc; | |
2219 | #undef FLD | |
2220 | } | |
2221 | ||
2222 | /* l-sfne: l.sfne $rA,$rB */ | |
2223 | ||
2224 | static SEM_PC | |
2225 | SEM_FN_NAME (or1k32bf,l_sfne) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2226 | { | |
2227 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
2228 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2229 | int UNUSED written = 0; | |
2230 | IADDR UNUSED pc = abuf->addr; | |
2231 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2232 | ||
2233 | { | |
2234 | USI opval = NESI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
2235 | SET_H_SYS_SR_F (opval); | |
2236 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
2237 | } | |
2238 | ||
2239 | return vpc; | |
2240 | #undef FLD | |
2241 | } | |
2242 | ||
2243 | /* l-sfnei: l.sfnei $rA,$simm16 */ | |
2244 | ||
2245 | static SEM_PC | |
2246 | SEM_FN_NAME (or1k32bf,l_sfnei) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2247 | { | |
2248 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
2249 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2250 | int UNUSED written = 0; | |
2251 | IADDR UNUSED pc = abuf->addr; | |
2252 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2253 | ||
2254 | { | |
2255 | USI opval = NESI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16))); | |
2256 | SET_H_SYS_SR_F (opval); | |
2257 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
2258 | } | |
2259 | ||
2260 | return vpc; | |
2261 | #undef FLD | |
2262 | } | |
2263 | ||
2264 | /* l-mac: l.mac $rA,$rB */ | |
2265 | ||
2266 | static SEM_PC | |
2267 | SEM_FN_NAME (or1k32bf,l_mac) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2268 | { | |
2269 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
2270 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2271 | int UNUSED written = 0; | |
2272 | IADDR UNUSED pc = abuf->addr; | |
2273 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2274 | ||
2275 | { | |
2276 | SI tmp_prod; | |
2277 | DI tmp_result; | |
2278 | tmp_prod = MULSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
2279 | tmp_result = ADDDI (JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ()), EXTSIDI (tmp_prod)); | |
2280 | { | |
2281 | SI opval = SUBWORDDISI (tmp_result, 0); | |
2282 | SET_H_MAC_MACHI (opval); | |
2283 | CGEN_TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval); | |
2284 | } | |
2285 | { | |
2286 | SI opval = SUBWORDDISI (tmp_result, 1); | |
2287 | SET_H_MAC_MACLO (opval); | |
2288 | CGEN_TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval); | |
2289 | } | |
2290 | } | |
2291 | ||
2292 | return vpc; | |
2293 | #undef FLD | |
2294 | } | |
2295 | ||
2296 | /* l-msb: l.msb $rA,$rB */ | |
2297 | ||
2298 | static SEM_PC | |
2299 | SEM_FN_NAME (or1k32bf,l_msb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2300 | { | |
2301 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
2302 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2303 | int UNUSED written = 0; | |
2304 | IADDR UNUSED pc = abuf->addr; | |
2305 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2306 | ||
2307 | { | |
2308 | SI tmp_prod; | |
2309 | DI tmp_result; | |
2310 | tmp_prod = MULSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3))); | |
2311 | tmp_result = SUBDI (JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ()), EXTSIDI (tmp_prod)); | |
2312 | { | |
2313 | SI opval = SUBWORDDISI (tmp_result, 0); | |
2314 | SET_H_MAC_MACHI (opval); | |
2315 | CGEN_TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval); | |
2316 | } | |
2317 | { | |
2318 | SI opval = SUBWORDDISI (tmp_result, 1); | |
2319 | SET_H_MAC_MACLO (opval); | |
2320 | CGEN_TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval); | |
2321 | } | |
2322 | } | |
2323 | ||
2324 | return vpc; | |
2325 | #undef FLD | |
2326 | } | |
2327 | ||
2328 | /* l-maci: l.maci $rA,${simm16} */ | |
2329 | ||
2330 | static SEM_PC | |
2331 | SEM_FN_NAME (or1k32bf,l_maci) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2332 | { | |
2333 | #define FLD(f) abuf->fields.sfmt_l_lwz.f | |
2334 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2335 | int UNUSED written = 0; | |
2336 | IADDR UNUSED pc = abuf->addr; | |
2337 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2338 | ||
2339 | { | |
2340 | SI tmp_prod; | |
2341 | DI tmp_result; | |
2342 | tmp_prod = MULSI (EXTSISI (FLD (f_simm16)), GET_H_GPR (FLD (f_r2))); | |
2343 | tmp_result = ADDDI (JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ()), EXTSIDI (tmp_prod)); | |
2344 | { | |
2345 | SI opval = SUBWORDDISI (tmp_result, 0); | |
2346 | SET_H_MAC_MACHI (opval); | |
2347 | CGEN_TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval); | |
2348 | } | |
2349 | { | |
2350 | SI opval = SUBWORDDISI (tmp_result, 1); | |
2351 | SET_H_MAC_MACLO (opval); | |
2352 | CGEN_TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval); | |
2353 | } | |
2354 | } | |
2355 | ||
2356 | return vpc; | |
2357 | #undef FLD | |
2358 | } | |
2359 | ||
2360 | /* l-cust1: l.cust1 */ | |
2361 | ||
2362 | static SEM_PC | |
2363 | SEM_FN_NAME (or1k32bf,l_cust1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2364 | { | |
2365 | #define FLD(f) abuf->fields.sfmt_empty.f | |
2366 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2367 | int UNUSED written = 0; | |
2368 | IADDR UNUSED pc = abuf->addr; | |
2369 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2370 | ||
2371 | ((void) 0); /*nop*/ | |
2372 | ||
2373 | return vpc; | |
2374 | #undef FLD | |
2375 | } | |
2376 | ||
2377 | /* l-cust2: l.cust2 */ | |
2378 | ||
2379 | static SEM_PC | |
2380 | SEM_FN_NAME (or1k32bf,l_cust2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2381 | { | |
2382 | #define FLD(f) abuf->fields.sfmt_empty.f | |
2383 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2384 | int UNUSED written = 0; | |
2385 | IADDR UNUSED pc = abuf->addr; | |
2386 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2387 | ||
2388 | ((void) 0); /*nop*/ | |
2389 | ||
2390 | return vpc; | |
2391 | #undef FLD | |
2392 | } | |
2393 | ||
2394 | /* l-cust3: l.cust3 */ | |
2395 | ||
2396 | static SEM_PC | |
2397 | SEM_FN_NAME (or1k32bf,l_cust3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2398 | { | |
2399 | #define FLD(f) abuf->fields.sfmt_empty.f | |
2400 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2401 | int UNUSED written = 0; | |
2402 | IADDR UNUSED pc = abuf->addr; | |
2403 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2404 | ||
2405 | ((void) 0); /*nop*/ | |
2406 | ||
2407 | return vpc; | |
2408 | #undef FLD | |
2409 | } | |
2410 | ||
2411 | /* l-cust4: l.cust4 */ | |
2412 | ||
2413 | static SEM_PC | |
2414 | SEM_FN_NAME (or1k32bf,l_cust4) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2415 | { | |
2416 | #define FLD(f) abuf->fields.sfmt_empty.f | |
2417 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2418 | int UNUSED written = 0; | |
2419 | IADDR UNUSED pc = abuf->addr; | |
2420 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2421 | ||
2422 | ((void) 0); /*nop*/ | |
2423 | ||
2424 | return vpc; | |
2425 | #undef FLD | |
2426 | } | |
2427 | ||
2428 | /* l-cust5: l.cust5 */ | |
2429 | ||
2430 | static SEM_PC | |
2431 | SEM_FN_NAME (or1k32bf,l_cust5) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2432 | { | |
2433 | #define FLD(f) abuf->fields.sfmt_empty.f | |
2434 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2435 | int UNUSED written = 0; | |
2436 | IADDR UNUSED pc = abuf->addr; | |
2437 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2438 | ||
2439 | ((void) 0); /*nop*/ | |
2440 | ||
2441 | return vpc; | |
2442 | #undef FLD | |
2443 | } | |
2444 | ||
2445 | /* l-cust6: l.cust6 */ | |
2446 | ||
2447 | static SEM_PC | |
2448 | SEM_FN_NAME (or1k32bf,l_cust6) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2449 | { | |
2450 | #define FLD(f) abuf->fields.sfmt_empty.f | |
2451 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2452 | int UNUSED written = 0; | |
2453 | IADDR UNUSED pc = abuf->addr; | |
2454 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2455 | ||
2456 | ((void) 0); /*nop*/ | |
2457 | ||
2458 | return vpc; | |
2459 | #undef FLD | |
2460 | } | |
2461 | ||
2462 | /* l-cust7: l.cust7 */ | |
2463 | ||
2464 | static SEM_PC | |
2465 | SEM_FN_NAME (or1k32bf,l_cust7) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2466 | { | |
2467 | #define FLD(f) abuf->fields.sfmt_empty.f | |
2468 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2469 | int UNUSED written = 0; | |
2470 | IADDR UNUSED pc = abuf->addr; | |
2471 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2472 | ||
2473 | ((void) 0); /*nop*/ | |
2474 | ||
2475 | return vpc; | |
2476 | #undef FLD | |
2477 | } | |
2478 | ||
2479 | /* l-cust8: l.cust8 */ | |
2480 | ||
2481 | static SEM_PC | |
2482 | SEM_FN_NAME (or1k32bf,l_cust8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2483 | { | |
2484 | #define FLD(f) abuf->fields.sfmt_empty.f | |
2485 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2486 | int UNUSED written = 0; | |
2487 | IADDR UNUSED pc = abuf->addr; | |
2488 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2489 | ||
2490 | ((void) 0); /*nop*/ | |
2491 | ||
2492 | return vpc; | |
2493 | #undef FLD | |
2494 | } | |
2495 | ||
2496 | /* lf-add-s: lf.add.s $rDSF,$rASF,$rBSF */ | |
2497 | ||
2498 | static SEM_PC | |
2499 | SEM_FN_NAME (or1k32bf,lf_add_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2500 | { | |
2501 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
2502 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2503 | int UNUSED written = 0; | |
2504 | IADDR UNUSED pc = abuf->addr; | |
2505 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2506 | ||
2507 | { | |
2508 | SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3))); | |
2509 | SET_H_FSR (FLD (f_r1), opval); | |
2510 | CGEN_TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval); | |
2511 | } | |
2512 | ||
2513 | return vpc; | |
2514 | #undef FLD | |
2515 | } | |
2516 | ||
2517 | /* lf-sub-s: lf.sub.s $rDSF,$rASF,$rBSF */ | |
2518 | ||
2519 | static SEM_PC | |
2520 | SEM_FN_NAME (or1k32bf,lf_sub_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2521 | { | |
2522 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
2523 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2524 | int UNUSED written = 0; | |
2525 | IADDR UNUSED pc = abuf->addr; | |
2526 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2527 | ||
2528 | { | |
2529 | SF opval = CGEN_CPU_FPU (current_cpu)->ops->subsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3))); | |
2530 | SET_H_FSR (FLD (f_r1), opval); | |
2531 | CGEN_TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval); | |
2532 | } | |
2533 | ||
2534 | return vpc; | |
2535 | #undef FLD | |
2536 | } | |
2537 | ||
2538 | /* lf-mul-s: lf.mul.s $rDSF,$rASF,$rBSF */ | |
2539 | ||
2540 | static SEM_PC | |
2541 | SEM_FN_NAME (or1k32bf,lf_mul_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2542 | { | |
2543 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
2544 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2545 | int UNUSED written = 0; | |
2546 | IADDR UNUSED pc = abuf->addr; | |
2547 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2548 | ||
2549 | { | |
2550 | SF opval = CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3))); | |
2551 | SET_H_FSR (FLD (f_r1), opval); | |
2552 | CGEN_TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval); | |
2553 | } | |
2554 | ||
2555 | return vpc; | |
2556 | #undef FLD | |
2557 | } | |
2558 | ||
2559 | /* lf-div-s: lf.div.s $rDSF,$rASF,$rBSF */ | |
2560 | ||
2561 | static SEM_PC | |
2562 | SEM_FN_NAME (or1k32bf,lf_div_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2563 | { | |
2564 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
2565 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2566 | int UNUSED written = 0; | |
2567 | IADDR UNUSED pc = abuf->addr; | |
2568 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2569 | ||
2570 | { | |
2571 | SF opval = CGEN_CPU_FPU (current_cpu)->ops->divsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3))); | |
2572 | SET_H_FSR (FLD (f_r1), opval); | |
2573 | CGEN_TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval); | |
2574 | } | |
2575 | ||
2576 | return vpc; | |
2577 | #undef FLD | |
2578 | } | |
2579 | ||
2580 | /* lf-rem-s: lf.rem.s $rDSF,$rASF,$rBSF */ | |
2581 | ||
2582 | static SEM_PC | |
2583 | SEM_FN_NAME (or1k32bf,lf_rem_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2584 | { | |
2585 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
2586 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2587 | int UNUSED written = 0; | |
2588 | IADDR UNUSED pc = abuf->addr; | |
2589 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2590 | ||
2591 | { | |
2592 | SF opval = CGEN_CPU_FPU (current_cpu)->ops->remsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3))); | |
2593 | SET_H_FSR (FLD (f_r1), opval); | |
2594 | CGEN_TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval); | |
2595 | } | |
2596 | ||
2597 | return vpc; | |
2598 | #undef FLD | |
2599 | } | |
2600 | ||
2601 | /* lf-itof-s: lf.itof.s $rDSF,$rA */ | |
2602 | ||
2603 | static SEM_PC | |
2604 | SEM_FN_NAME (or1k32bf,lf_itof_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2605 | { | |
2606 | #define FLD(f) abuf->fields.sfmt_l_slli.f | |
2607 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2608 | int UNUSED written = 0; | |
2609 | IADDR UNUSED pc = abuf->addr; | |
2610 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2611 | ||
2612 | { | |
2613 | SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), (GET_H_SYS_FPCSR_RM () == 0) ? (1) : (GET_H_SYS_FPCSR_RM () == 1) ? (3) : (GET_H_SYS_FPCSR_RM () == 2) ? (4) : (5), TRUNCSISI (GET_H_GPR (FLD (f_r2)))); | |
2614 | SET_H_FSR (FLD (f_r1), opval); | |
2615 | CGEN_TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval); | |
2616 | } | |
2617 | ||
2618 | return vpc; | |
2619 | #undef FLD | |
2620 | } | |
2621 | ||
2622 | /* lf-ftoi-s: lf.ftoi.s $rD,$rASF */ | |
2623 | ||
2624 | static SEM_PC | |
2625 | SEM_FN_NAME (or1k32bf,lf_ftoi_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2626 | { | |
2627 | #define FLD(f) abuf->fields.sfmt_l_slli.f | |
2628 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2629 | int UNUSED written = 0; | |
2630 | IADDR UNUSED pc = abuf->addr; | |
2631 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2632 | ||
2633 | { | |
2634 | SI opval = EXTSISI (CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), (GET_H_SYS_FPCSR_RM () == 0) ? (1) : (GET_H_SYS_FPCSR_RM () == 1) ? (3) : (GET_H_SYS_FPCSR_RM () == 2) ? (4) : (5), GET_H_FSR (FLD (f_r2)))); | |
2635 | SET_H_GPR (FLD (f_r1), opval); | |
2636 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
2637 | } | |
2638 | ||
2639 | return vpc; | |
2640 | #undef FLD | |
2641 | } | |
2642 | ||
2643 | /* lf-eq-s: lf.sfeq.s $rASF,$rBSF */ | |
2644 | ||
2645 | static SEM_PC | |
2646 | SEM_FN_NAME (or1k32bf,lf_eq_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2647 | { | |
2648 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
2649 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2650 | int UNUSED written = 0; | |
2651 | IADDR UNUSED pc = abuf->addr; | |
2652 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2653 | ||
2654 | { | |
2655 | BI opval = CGEN_CPU_FPU (current_cpu)->ops->eqsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3))); | |
2656 | SET_H_SYS_SR_F (opval); | |
2657 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
2658 | } | |
2659 | ||
2660 | return vpc; | |
2661 | #undef FLD | |
2662 | } | |
2663 | ||
2664 | /* lf-ne-s: lf.sfne.s $rASF,$rBSF */ | |
2665 | ||
2666 | static SEM_PC | |
2667 | SEM_FN_NAME (or1k32bf,lf_ne_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2668 | { | |
2669 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
2670 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2671 | int UNUSED written = 0; | |
2672 | IADDR UNUSED pc = abuf->addr; | |
2673 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2674 | ||
2675 | { | |
2676 | BI opval = CGEN_CPU_FPU (current_cpu)->ops->nesf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3))); | |
2677 | SET_H_SYS_SR_F (opval); | |
2678 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
2679 | } | |
2680 | ||
2681 | return vpc; | |
2682 | #undef FLD | |
2683 | } | |
2684 | ||
2685 | /* lf-ge-s: lf.sfge.s $rASF,$rBSF */ | |
2686 | ||
2687 | static SEM_PC | |
2688 | SEM_FN_NAME (or1k32bf,lf_ge_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2689 | { | |
2690 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
2691 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2692 | int UNUSED written = 0; | |
2693 | IADDR UNUSED pc = abuf->addr; | |
2694 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2695 | ||
2696 | { | |
2697 | BI opval = CGEN_CPU_FPU (current_cpu)->ops->gesf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3))); | |
2698 | SET_H_SYS_SR_F (opval); | |
2699 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
2700 | } | |
2701 | ||
2702 | return vpc; | |
2703 | #undef FLD | |
2704 | } | |
2705 | ||
2706 | /* lf-gt-s: lf.sfgt.s $rASF,$rBSF */ | |
2707 | ||
2708 | static SEM_PC | |
2709 | SEM_FN_NAME (or1k32bf,lf_gt_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2710 | { | |
2711 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
2712 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2713 | int UNUSED written = 0; | |
2714 | IADDR UNUSED pc = abuf->addr; | |
2715 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2716 | ||
2717 | { | |
2718 | BI opval = CGEN_CPU_FPU (current_cpu)->ops->gtsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3))); | |
2719 | SET_H_SYS_SR_F (opval); | |
2720 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
2721 | } | |
2722 | ||
2723 | return vpc; | |
2724 | #undef FLD | |
2725 | } | |
2726 | ||
2727 | /* lf-lt-s: lf.sflt.s $rASF,$rBSF */ | |
2728 | ||
2729 | static SEM_PC | |
2730 | SEM_FN_NAME (or1k32bf,lf_lt_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2731 | { | |
2732 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
2733 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2734 | int UNUSED written = 0; | |
2735 | IADDR UNUSED pc = abuf->addr; | |
2736 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2737 | ||
2738 | { | |
2739 | BI opval = CGEN_CPU_FPU (current_cpu)->ops->ltsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3))); | |
2740 | SET_H_SYS_SR_F (opval); | |
2741 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
2742 | } | |
2743 | ||
2744 | return vpc; | |
2745 | #undef FLD | |
2746 | } | |
2747 | ||
2748 | /* lf-le-s: lf.sfle.s $rASF,$rBSF */ | |
2749 | ||
2750 | static SEM_PC | |
2751 | SEM_FN_NAME (or1k32bf,lf_le_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2752 | { | |
2753 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
2754 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2755 | int UNUSED written = 0; | |
2756 | IADDR UNUSED pc = abuf->addr; | |
2757 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2758 | ||
2759 | { | |
2760 | BI opval = CGEN_CPU_FPU (current_cpu)->ops->lesf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3))); | |
2761 | SET_H_SYS_SR_F (opval); | |
2762 | CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-f", 'x', opval); | |
2763 | } | |
2764 | ||
2765 | return vpc; | |
2766 | #undef FLD | |
2767 | } | |
2768 | ||
2769 | /* lf-madd-s: lf.madd.s $rDSF,$rASF,$rBSF */ | |
2770 | ||
2771 | static SEM_PC | |
2772 | SEM_FN_NAME (or1k32bf,lf_madd_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2773 | { | |
2774 | #define FLD(f) abuf->fields.sfmt_l_sll.f | |
2775 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2776 | int UNUSED written = 0; | |
2777 | IADDR UNUSED pc = abuf->addr; | |
2778 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2779 | ||
2780 | { | |
2781 | SF opval = CGEN_CPU_FPU (current_cpu)->ops->addsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->mulsf (CGEN_CPU_FPU (current_cpu), GET_H_FSR (FLD (f_r2)), GET_H_FSR (FLD (f_r3))), GET_H_FSR (FLD (f_r1))); | |
2782 | SET_H_FSR (FLD (f_r1), opval); | |
2783 | CGEN_TRACE_RESULT (current_cpu, abuf, "fsr", 'f', opval); | |
2784 | } | |
2785 | ||
2786 | return vpc; | |
2787 | #undef FLD | |
2788 | } | |
2789 | ||
2790 | /* lf-cust1-s: lf.cust1.s $rASF,$rBSF */ | |
2791 | ||
2792 | static SEM_PC | |
2793 | SEM_FN_NAME (or1k32bf,lf_cust1_s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2794 | { | |
2795 | #define FLD(f) abuf->fields.sfmt_empty.f | |
2796 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2797 | int UNUSED written = 0; | |
2798 | IADDR UNUSED pc = abuf->addr; | |
2799 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2800 | ||
2801 | ((void) 0); /*nop*/ | |
2802 | ||
2803 | return vpc; | |
2804 | #undef FLD | |
2805 | } | |
2806 | ||
2807 | /* Table of all semantic fns. */ | |
2808 | ||
2809 | static const struct sem_fn_desc sem_fns[] = { | |
2810 | { OR1K32BF_INSN_X_INVALID, SEM_FN_NAME (or1k32bf,x_invalid) }, | |
2811 | { OR1K32BF_INSN_X_AFTER, SEM_FN_NAME (or1k32bf,x_after) }, | |
2812 | { OR1K32BF_INSN_X_BEFORE, SEM_FN_NAME (or1k32bf,x_before) }, | |
2813 | { OR1K32BF_INSN_X_CTI_CHAIN, SEM_FN_NAME (or1k32bf,x_cti_chain) }, | |
2814 | { OR1K32BF_INSN_X_CHAIN, SEM_FN_NAME (or1k32bf,x_chain) }, | |
2815 | { OR1K32BF_INSN_X_BEGIN, SEM_FN_NAME (or1k32bf,x_begin) }, | |
2816 | { OR1K32BF_INSN_L_J, SEM_FN_NAME (or1k32bf,l_j) }, | |
2817 | { OR1K32BF_INSN_L_JAL, SEM_FN_NAME (or1k32bf,l_jal) }, | |
2818 | { OR1K32BF_INSN_L_JR, SEM_FN_NAME (or1k32bf,l_jr) }, | |
2819 | { OR1K32BF_INSN_L_JALR, SEM_FN_NAME (or1k32bf,l_jalr) }, | |
2820 | { OR1K32BF_INSN_L_BNF, SEM_FN_NAME (or1k32bf,l_bnf) }, | |
2821 | { OR1K32BF_INSN_L_BF, SEM_FN_NAME (or1k32bf,l_bf) }, | |
2822 | { OR1K32BF_INSN_L_TRAP, SEM_FN_NAME (or1k32bf,l_trap) }, | |
2823 | { OR1K32BF_INSN_L_SYS, SEM_FN_NAME (or1k32bf,l_sys) }, | |
2824 | { OR1K32BF_INSN_L_MSYNC, SEM_FN_NAME (or1k32bf,l_msync) }, | |
2825 | { OR1K32BF_INSN_L_PSYNC, SEM_FN_NAME (or1k32bf,l_psync) }, | |
2826 | { OR1K32BF_INSN_L_CSYNC, SEM_FN_NAME (or1k32bf,l_csync) }, | |
2827 | { OR1K32BF_INSN_L_RFE, SEM_FN_NAME (or1k32bf,l_rfe) }, | |
2828 | { OR1K32BF_INSN_L_NOP_IMM, SEM_FN_NAME (or1k32bf,l_nop_imm) }, | |
2829 | { OR1K32BF_INSN_L_MOVHI, SEM_FN_NAME (or1k32bf,l_movhi) }, | |
2830 | { OR1K32BF_INSN_L_MACRC, SEM_FN_NAME (or1k32bf,l_macrc) }, | |
2831 | { OR1K32BF_INSN_L_MFSPR, SEM_FN_NAME (or1k32bf,l_mfspr) }, | |
2832 | { OR1K32BF_INSN_L_MTSPR, SEM_FN_NAME (or1k32bf,l_mtspr) }, | |
2833 | { OR1K32BF_INSN_L_LWZ, SEM_FN_NAME (or1k32bf,l_lwz) }, | |
2834 | { OR1K32BF_INSN_L_LWS, SEM_FN_NAME (or1k32bf,l_lws) }, | |
2835 | { OR1K32BF_INSN_L_LWA, SEM_FN_NAME (or1k32bf,l_lwa) }, | |
2836 | { OR1K32BF_INSN_L_LBZ, SEM_FN_NAME (or1k32bf,l_lbz) }, | |
2837 | { OR1K32BF_INSN_L_LBS, SEM_FN_NAME (or1k32bf,l_lbs) }, | |
2838 | { OR1K32BF_INSN_L_LHZ, SEM_FN_NAME (or1k32bf,l_lhz) }, | |
2839 | { OR1K32BF_INSN_L_LHS, SEM_FN_NAME (or1k32bf,l_lhs) }, | |
2840 | { OR1K32BF_INSN_L_SW, SEM_FN_NAME (or1k32bf,l_sw) }, | |
2841 | { OR1K32BF_INSN_L_SB, SEM_FN_NAME (or1k32bf,l_sb) }, | |
2842 | { OR1K32BF_INSN_L_SH, SEM_FN_NAME (or1k32bf,l_sh) }, | |
2843 | { OR1K32BF_INSN_L_SWA, SEM_FN_NAME (or1k32bf,l_swa) }, | |
2844 | { OR1K32BF_INSN_L_SLL, SEM_FN_NAME (or1k32bf,l_sll) }, | |
2845 | { OR1K32BF_INSN_L_SLLI, SEM_FN_NAME (or1k32bf,l_slli) }, | |
2846 | { OR1K32BF_INSN_L_SRL, SEM_FN_NAME (or1k32bf,l_srl) }, | |
2847 | { OR1K32BF_INSN_L_SRLI, SEM_FN_NAME (or1k32bf,l_srli) }, | |
2848 | { OR1K32BF_INSN_L_SRA, SEM_FN_NAME (or1k32bf,l_sra) }, | |
2849 | { OR1K32BF_INSN_L_SRAI, SEM_FN_NAME (or1k32bf,l_srai) }, | |
2850 | { OR1K32BF_INSN_L_ROR, SEM_FN_NAME (or1k32bf,l_ror) }, | |
2851 | { OR1K32BF_INSN_L_RORI, SEM_FN_NAME (or1k32bf,l_rori) }, | |
2852 | { OR1K32BF_INSN_L_AND, SEM_FN_NAME (or1k32bf,l_and) }, | |
2853 | { OR1K32BF_INSN_L_OR, SEM_FN_NAME (or1k32bf,l_or) }, | |
2854 | { OR1K32BF_INSN_L_XOR, SEM_FN_NAME (or1k32bf,l_xor) }, | |
2855 | { OR1K32BF_INSN_L_ADD, SEM_FN_NAME (or1k32bf,l_add) }, | |
2856 | { OR1K32BF_INSN_L_SUB, SEM_FN_NAME (or1k32bf,l_sub) }, | |
2857 | { OR1K32BF_INSN_L_ADDC, SEM_FN_NAME (or1k32bf,l_addc) }, | |
2858 | { OR1K32BF_INSN_L_MUL, SEM_FN_NAME (or1k32bf,l_mul) }, | |
2859 | { OR1K32BF_INSN_L_MULU, SEM_FN_NAME (or1k32bf,l_mulu) }, | |
2860 | { OR1K32BF_INSN_L_DIV, SEM_FN_NAME (or1k32bf,l_div) }, | |
2861 | { OR1K32BF_INSN_L_DIVU, SEM_FN_NAME (or1k32bf,l_divu) }, | |
2862 | { OR1K32BF_INSN_L_FF1, SEM_FN_NAME (or1k32bf,l_ff1) }, | |
2863 | { OR1K32BF_INSN_L_FL1, SEM_FN_NAME (or1k32bf,l_fl1) }, | |
2864 | { OR1K32BF_INSN_L_ANDI, SEM_FN_NAME (or1k32bf,l_andi) }, | |
2865 | { OR1K32BF_INSN_L_ORI, SEM_FN_NAME (or1k32bf,l_ori) }, | |
2866 | { OR1K32BF_INSN_L_XORI, SEM_FN_NAME (or1k32bf,l_xori) }, | |
2867 | { OR1K32BF_INSN_L_ADDI, SEM_FN_NAME (or1k32bf,l_addi) }, | |
2868 | { OR1K32BF_INSN_L_ADDIC, SEM_FN_NAME (or1k32bf,l_addic) }, | |
2869 | { OR1K32BF_INSN_L_MULI, SEM_FN_NAME (or1k32bf,l_muli) }, | |
2870 | { OR1K32BF_INSN_L_EXTHS, SEM_FN_NAME (or1k32bf,l_exths) }, | |
2871 | { OR1K32BF_INSN_L_EXTBS, SEM_FN_NAME (or1k32bf,l_extbs) }, | |
2872 | { OR1K32BF_INSN_L_EXTHZ, SEM_FN_NAME (or1k32bf,l_exthz) }, | |
2873 | { OR1K32BF_INSN_L_EXTBZ, SEM_FN_NAME (or1k32bf,l_extbz) }, | |
2874 | { OR1K32BF_INSN_L_EXTWS, SEM_FN_NAME (or1k32bf,l_extws) }, | |
2875 | { OR1K32BF_INSN_L_EXTWZ, SEM_FN_NAME (or1k32bf,l_extwz) }, | |
2876 | { OR1K32BF_INSN_L_CMOV, SEM_FN_NAME (or1k32bf,l_cmov) }, | |
2877 | { OR1K32BF_INSN_L_SFGTS, SEM_FN_NAME (or1k32bf,l_sfgts) }, | |
2878 | { OR1K32BF_INSN_L_SFGTSI, SEM_FN_NAME (or1k32bf,l_sfgtsi) }, | |
2879 | { OR1K32BF_INSN_L_SFGTU, SEM_FN_NAME (or1k32bf,l_sfgtu) }, | |
2880 | { OR1K32BF_INSN_L_SFGTUI, SEM_FN_NAME (or1k32bf,l_sfgtui) }, | |
2881 | { OR1K32BF_INSN_L_SFGES, SEM_FN_NAME (or1k32bf,l_sfges) }, | |
2882 | { OR1K32BF_INSN_L_SFGESI, SEM_FN_NAME (or1k32bf,l_sfgesi) }, | |
2883 | { OR1K32BF_INSN_L_SFGEU, SEM_FN_NAME (or1k32bf,l_sfgeu) }, | |
2884 | { OR1K32BF_INSN_L_SFGEUI, SEM_FN_NAME (or1k32bf,l_sfgeui) }, | |
2885 | { OR1K32BF_INSN_L_SFLTS, SEM_FN_NAME (or1k32bf,l_sflts) }, | |
2886 | { OR1K32BF_INSN_L_SFLTSI, SEM_FN_NAME (or1k32bf,l_sfltsi) }, | |
2887 | { OR1K32BF_INSN_L_SFLTU, SEM_FN_NAME (or1k32bf,l_sfltu) }, | |
2888 | { OR1K32BF_INSN_L_SFLTUI, SEM_FN_NAME (or1k32bf,l_sfltui) }, | |
2889 | { OR1K32BF_INSN_L_SFLES, SEM_FN_NAME (or1k32bf,l_sfles) }, | |
2890 | { OR1K32BF_INSN_L_SFLESI, SEM_FN_NAME (or1k32bf,l_sflesi) }, | |
2891 | { OR1K32BF_INSN_L_SFLEU, SEM_FN_NAME (or1k32bf,l_sfleu) }, | |
2892 | { OR1K32BF_INSN_L_SFLEUI, SEM_FN_NAME (or1k32bf,l_sfleui) }, | |
2893 | { OR1K32BF_INSN_L_SFEQ, SEM_FN_NAME (or1k32bf,l_sfeq) }, | |
2894 | { OR1K32BF_INSN_L_SFEQI, SEM_FN_NAME (or1k32bf,l_sfeqi) }, | |
2895 | { OR1K32BF_INSN_L_SFNE, SEM_FN_NAME (or1k32bf,l_sfne) }, | |
2896 | { OR1K32BF_INSN_L_SFNEI, SEM_FN_NAME (or1k32bf,l_sfnei) }, | |
2897 | { OR1K32BF_INSN_L_MAC, SEM_FN_NAME (or1k32bf,l_mac) }, | |
2898 | { OR1K32BF_INSN_L_MSB, SEM_FN_NAME (or1k32bf,l_msb) }, | |
2899 | { OR1K32BF_INSN_L_MACI, SEM_FN_NAME (or1k32bf,l_maci) }, | |
2900 | { OR1K32BF_INSN_L_CUST1, SEM_FN_NAME (or1k32bf,l_cust1) }, | |
2901 | { OR1K32BF_INSN_L_CUST2, SEM_FN_NAME (or1k32bf,l_cust2) }, | |
2902 | { OR1K32BF_INSN_L_CUST3, SEM_FN_NAME (or1k32bf,l_cust3) }, | |
2903 | { OR1K32BF_INSN_L_CUST4, SEM_FN_NAME (or1k32bf,l_cust4) }, | |
2904 | { OR1K32BF_INSN_L_CUST5, SEM_FN_NAME (or1k32bf,l_cust5) }, | |
2905 | { OR1K32BF_INSN_L_CUST6, SEM_FN_NAME (or1k32bf,l_cust6) }, | |
2906 | { OR1K32BF_INSN_L_CUST7, SEM_FN_NAME (or1k32bf,l_cust7) }, | |
2907 | { OR1K32BF_INSN_L_CUST8, SEM_FN_NAME (or1k32bf,l_cust8) }, | |
2908 | { OR1K32BF_INSN_LF_ADD_S, SEM_FN_NAME (or1k32bf,lf_add_s) }, | |
2909 | { OR1K32BF_INSN_LF_SUB_S, SEM_FN_NAME (or1k32bf,lf_sub_s) }, | |
2910 | { OR1K32BF_INSN_LF_MUL_S, SEM_FN_NAME (or1k32bf,lf_mul_s) }, | |
2911 | { OR1K32BF_INSN_LF_DIV_S, SEM_FN_NAME (or1k32bf,lf_div_s) }, | |
2912 | { OR1K32BF_INSN_LF_REM_S, SEM_FN_NAME (or1k32bf,lf_rem_s) }, | |
2913 | { OR1K32BF_INSN_LF_ITOF_S, SEM_FN_NAME (or1k32bf,lf_itof_s) }, | |
2914 | { OR1K32BF_INSN_LF_FTOI_S, SEM_FN_NAME (or1k32bf,lf_ftoi_s) }, | |
2915 | { OR1K32BF_INSN_LF_EQ_S, SEM_FN_NAME (or1k32bf,lf_eq_s) }, | |
2916 | { OR1K32BF_INSN_LF_NE_S, SEM_FN_NAME (or1k32bf,lf_ne_s) }, | |
2917 | { OR1K32BF_INSN_LF_GE_S, SEM_FN_NAME (or1k32bf,lf_ge_s) }, | |
2918 | { OR1K32BF_INSN_LF_GT_S, SEM_FN_NAME (or1k32bf,lf_gt_s) }, | |
2919 | { OR1K32BF_INSN_LF_LT_S, SEM_FN_NAME (or1k32bf,lf_lt_s) }, | |
2920 | { OR1K32BF_INSN_LF_LE_S, SEM_FN_NAME (or1k32bf,lf_le_s) }, | |
2921 | { OR1K32BF_INSN_LF_MADD_S, SEM_FN_NAME (or1k32bf,lf_madd_s) }, | |
2922 | { OR1K32BF_INSN_LF_CUST1_S, SEM_FN_NAME (or1k32bf,lf_cust1_s) }, | |
2923 | { 0, 0 } | |
2924 | }; | |
2925 | ||
2926 | /* Add the semantic fns to IDESC_TABLE. */ | |
2927 | ||
2928 | void | |
2929 | SEM_FN_NAME (or1k32bf,init_idesc_table) (SIM_CPU *current_cpu) | |
2930 | { | |
2931 | IDESC *idesc_table = CPU_IDESC (current_cpu); | |
2932 | const struct sem_fn_desc *sf; | |
2933 | int mach_num = MACH_NUM (CPU_MACH (current_cpu)); | |
2934 | ||
2935 | for (sf = &sem_fns[0]; sf->fn != 0; ++sf) | |
2936 | { | |
2937 | const CGEN_INSN *insn = idesc_table[sf->index].idata; | |
2938 | int valid_p = (CGEN_INSN_VIRTUAL_P (insn) | |
2939 | || CGEN_INSN_MACH_HAS_P (insn, mach_num)); | |
2940 | #if FAST_P | |
2941 | if (valid_p) | |
2942 | idesc_table[sf->index].sem_fast = sf->fn; | |
2943 | else | |
2944 | idesc_table[sf->index].sem_fast = SEM_FN_NAME (or1k32bf,x_invalid); | |
2945 | #else | |
2946 | if (valid_p) | |
2947 | idesc_table[sf->index].sem_full = sf->fn; | |
2948 | else | |
2949 | idesc_table[sf->index].sem_full = SEM_FN_NAME (or1k32bf,x_invalid); | |
2950 | #endif | |
2951 | } | |
2952 | } | |
2953 |