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c906108c SS |
1 | /* This file is part of the program psim. |
2 | ||
080fe24b | 3 | Copyright 1994, 1995, 2002 Andrew Cagney <cagney@highland.com.au> |
c906108c SS |
4 | |
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
3fd725ef | 7 | the Free Software Foundation; either version 3 of the License, or |
c906108c SS |
8 | (at your option) any later version. |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
51b318de | 16 | along with this program; if not, see <http://www.gnu.org/licenses/>. |
c906108c SS |
17 | |
18 | */ | |
19 | ||
20 | ||
21 | #ifndef _PSIM_CONFIG_H_ | |
22 | #define _PSIM_CONFIG_H_ | |
23 | ||
24 | ||
25 | /* endianness of the host/target: | |
26 | ||
27 | If the build process is aware (at compile time) of the endianness | |
28 | of the host/target it is able to eliminate slower generic endian | |
29 | handling code. | |
30 | ||
31 | Possible values are 0 (unknown), LITTLE_ENDIAN, BIG_ENDIAN */ | |
32 | ||
33 | #ifndef WITH_HOST_BYTE_ORDER | |
34 | #define WITH_HOST_BYTE_ORDER 0 /*unknown*/ | |
35 | #endif | |
36 | ||
37 | #ifndef WITH_TARGET_BYTE_ORDER | |
38 | #define WITH_TARGET_BYTE_ORDER 0 /*unknown*/ | |
39 | #endif | |
40 | ||
41 | extern int current_host_byte_order; | |
42 | #define CURRENT_HOST_BYTE_ORDER (WITH_HOST_BYTE_ORDER \ | |
43 | ? WITH_HOST_BYTE_ORDER \ | |
44 | : current_host_byte_order) | |
45 | extern int current_target_byte_order; | |
46 | #define CURRENT_TARGET_BYTE_ORDER (WITH_TARGET_BYTE_ORDER \ | |
47 | ? WITH_TARGET_BYTE_ORDER \ | |
48 | : current_target_byte_order) | |
49 | ||
50 | ||
51 | /* PowerPC XOR endian. | |
52 | ||
53 | In addition to the above, the simulator can support the PowerPC's | |
54 | horrible XOR endian mode. This feature makes it possible to | |
55 | control the endian mode of a processor using the MSR. */ | |
56 | ||
57 | #ifndef WITH_XOR_ENDIAN | |
58 | #define WITH_XOR_ENDIAN 8 | |
59 | #endif | |
60 | ||
61 | ||
c906108c SS |
62 | /* SMP support: |
63 | ||
64 | Sets a limit on the number of processors that can be simulated. If | |
65 | WITH_SMP is set to zero (0), the simulator is restricted to | |
66 | suporting only on processor (and as a consequence leaves the SMP | |
67 | code out of the build process). | |
68 | ||
69 | The actual number of processors is taken from the device | |
70 | /options/smp@<nr-cpu> */ | |
71 | ||
72 | #ifndef WITH_SMP | |
73 | #define WITH_SMP 5 | |
74 | #endif | |
75 | #if WITH_SMP | |
76 | #define MAX_NR_PROCESSORS WITH_SMP | |
77 | #else | |
78 | #define MAX_NR_PROCESSORS 1 | |
79 | #endif | |
80 | ||
81 | ||
82 | /* Word size of host/target: | |
83 | ||
84 | Set these according to your host and target requirements. At this | |
85 | point in time, I've only compiled (not run) for a 64bit and never | |
86 | built for a 64bit host. This will always remain a compile time | |
87 | option */ | |
88 | ||
89 | #ifndef WITH_TARGET_WORD_BITSIZE | |
90 | #define WITH_TARGET_WORD_BITSIZE 32 /* compiled only */ | |
91 | #endif | |
92 | ||
93 | #ifndef WITH_HOST_WORD_BITSIZE | |
94 | #define WITH_HOST_WORD_BITSIZE 32 /* 64bit ready? */ | |
95 | #endif | |
96 | ||
97 | ||
98 | /* Program environment: | |
99 | ||
100 | Three environments are available - UEA (user), VEA (virtual) and | |
101 | OEA (perating). The former two are environment that users would | |
102 | expect to see (VEA includes things like coherency and the time | |
103 | base) while OEA is what an operating system expects to see. By | |
104 | setting these to specific values, the build process is able to | |
105 | eliminate non relevent environment code | |
106 | ||
107 | CURRENT_ENVIRONMENT specifies which of vea or oea is required for | |
108 | the current runtime. */ | |
109 | ||
5629cf2b | 110 | #define ALL_ENVIRONMENT 0 |
c906108c SS |
111 | #define USER_ENVIRONMENT 1 |
112 | #define VIRTUAL_ENVIRONMENT 2 | |
113 | #define OPERATING_ENVIRONMENT 3 | |
114 | ||
c906108c SS |
115 | extern int current_environment; |
116 | #define CURRENT_ENVIRONMENT (WITH_ENVIRONMENT \ | |
117 | ? WITH_ENVIRONMENT \ | |
118 | : current_environment) | |
119 | ||
120 | ||
121 | /* Optional VEA/OEA code: | |
122 | ||
123 | The below, required for the OEA model may also be included in the | |
124 | VEA model however, as far as I can tell only make things | |
125 | slower... */ | |
126 | ||
127 | ||
128 | /* Events. Devices modeling real H/W need to be able to efficiently | |
129 | schedule things to do at known times in the future. The event | |
130 | queue implements this. Unfortunatly this adds the need to check | |
131 | for any events once each full instruction cycle. */ | |
132 | ||
133 | #define WITH_EVENTS (WITH_ENVIRONMENT != USER_ENVIRONMENT) | |
134 | ||
135 | ||
136 | /* Time base: | |
137 | ||
138 | The PowerPC architecture includes the addition of both a time base | |
139 | register and a decrement timer. Like events adds to the overhead | |
140 | of of some instruction cycles. */ | |
141 | ||
142 | #ifndef WITH_TIME_BASE | |
143 | #define WITH_TIME_BASE (WITH_ENVIRONMENT != USER_ENVIRONMENT) | |
144 | #endif | |
145 | ||
146 | ||
147 | /* Callback/Default Memory. | |
148 | ||
149 | Core includes a builtin memory type (raw_memory) that is | |
150 | implemented using an array. raw_memory does not require any | |
151 | additional functions etc. | |
152 | ||
153 | Callback memory is where the core calls a core device for the data | |
154 | it requires. | |
155 | ||
156 | Default memory is an extenstion of this where for addresses that do | |
157 | not map into either a callback or core memory range a default map | |
158 | can be used. | |
159 | ||
160 | The OEA model uses callback memory for devices and default memory | |
161 | for buses. | |
162 | ||
163 | The VEA model uses callback memory to capture `page faults'. | |
164 | ||
165 | While it may be possible to eliminate callback/default memory (and | |
166 | hence also eliminate an additional test per memory fetch) it | |
167 | probably is not worth the effort. | |
168 | ||
169 | BTW, while raw_memory could have been implemented as a callback, | |
170 | profiling has shown that there is a biger win (at least for the | |
171 | x86) in eliminating a function call for the most common | |
172 | (raw_memory) case. */ | |
173 | ||
174 | #define WITH_CALLBACK_MEMORY 1 | |
175 | ||
176 | ||
177 | /* Alignment: | |
178 | ||
179 | The PowerPC may or may not handle miss aligned transfers. An | |
180 | implementation normally handles miss aligned transfers in big | |
181 | endian mode but generates an exception in little endian mode. | |
182 | ||
183 | This model. Instead allows both little and big endian modes to | |
184 | either take exceptions or handle miss aligned transfers. | |
185 | ||
186 | If 0 is specified then for big-endian mode miss alligned accesses | |
187 | are permitted (NONSTRICT_ALIGNMENT) while in little-endian mode the | |
188 | processor will fault on them (STRICT_ALIGNMENT). */ | |
189 | ||
190 | #define NONSTRICT_ALIGNMENT 1 | |
191 | #define STRICT_ALIGNMENT 2 | |
192 | ||
193 | #ifndef WITH_ALIGNMENT | |
194 | #define WITH_ALIGNMENT 0 | |
195 | #endif | |
196 | ||
197 | extern int current_alignment; | |
198 | #define CURRENT_ALIGNMENT (WITH_ALIGNMENT \ | |
199 | ? WITH_ALIGNMENT \ | |
200 | : current_alignment) | |
201 | ||
202 | ||
203 | /* Floating point suport: | |
204 | ||
205 | Still under development. */ | |
206 | ||
207 | #define SOFT_FLOATING_POINT 1 | |
208 | #define HARD_FLOATING_POINT 2 | |
209 | ||
210 | #ifndef WITH_FLOATING_POINT | |
211 | #define WITH_FLOATING_POINT HARD_FLOATING_POINT | |
212 | #endif | |
213 | extern int current_floating_point; | |
214 | #define CURRENT_FLOATING_POINT (WITH_FLOATING_POINT \ | |
215 | ? WITH_FLOATING_POINT \ | |
216 | : current_floating_point) | |
217 | ||
218 | ||
219 | /* Debugging: | |
220 | ||
221 | Control the inclusion of debugging code. */ | |
222 | ||
c906108c SS |
223 | /* Whether to check instructions for reserved bits being set */ |
224 | ||
225 | #ifndef WITH_RESERVED_BITS | |
226 | #define WITH_RESERVED_BITS 1 | |
227 | #endif | |
228 | ||
229 | /* include monitoring code */ | |
230 | ||
231 | #define MONITOR_INSTRUCTION_ISSUE 1 | |
232 | #define MONITOR_LOAD_STORE_UNIT 2 | |
233 | #ifndef WITH_MON | |
234 | #define WITH_MON (MONITOR_LOAD_STORE_UNIT \ | |
235 | | MONITOR_INSTRUCTION_ISSUE) | |
236 | #endif | |
237 | ||
238 | /* Current CPU model (models are in the generated models.h include file) */ | |
239 | #ifndef WITH_MODEL | |
240 | #define WITH_MODEL 0 | |
241 | #endif | |
242 | ||
243 | #define CURRENT_MODEL (WITH_MODEL \ | |
244 | ? WITH_MODEL \ | |
245 | : current_model) | |
246 | ||
247 | #ifndef WITH_DEFAULT_MODEL | |
248 | #define WITH_DEFAULT_MODEL DEFAULT_MODEL | |
249 | #endif | |
250 | ||
251 | #define MODEL_ISSUE_IGNORE (-1) | |
252 | #define MODEL_ISSUE_PROCESS 1 | |
253 | ||
254 | #ifndef WITH_MODEL_ISSUE | |
255 | #define WITH_MODEL_ISSUE 0 | |
256 | #endif | |
257 | ||
258 | extern int current_model_issue; | |
259 | #define CURRENT_MODEL_ISSUE (WITH_MODEL_ISSUE \ | |
260 | ? WITH_MODEL_ISSUE \ | |
261 | : current_model_issue) | |
262 | ||
263 | /* Whether or not input/output just uses stdio, or uses printf_filtered for | |
264 | output, and polling input for input. */ | |
265 | ||
266 | #define DONT_USE_STDIO 2 | |
267 | #define DO_USE_STDIO 1 | |
268 | ||
c906108c SS |
269 | extern int current_stdio; |
270 | #define CURRENT_STDIO (WITH_STDIO \ | |
271 | ? WITH_STDIO \ | |
272 | : current_stdio) | |
273 | ||
274 | ||
275 | ||
276 | /* INLINE CODE SELECTION: | |
277 | ||
278 | GCC -O3 attempts to inline any function or procedure in scope. The | |
279 | options below facilitate fine grained control over what is and what | |
280 | isn't made inline. For instance it can control things down to a | |
281 | specific modules static routines. Doing this allows the compiler | |
282 | to both eliminate the overhead of function calls and (as a | |
283 | consequence) also eliminate further dead code. | |
284 | ||
5bc4da4d | 285 | On a CISC (x86) I've found that I can achieve an order of magnitude |
c906108c SS |
286 | speed improvement (x3-x5). In the case of RISC (sparc) while the |
287 | performance gain isn't as great it is still significant. | |
288 | ||
289 | Each module is controled by the macro <module>_INLINE which can | |
290 | have the values described below | |
291 | ||
292 | 0 Do not inline any thing for the given module | |
293 | ||
294 | The following additional values are `bit fields' and can be | |
295 | combined. | |
296 | ||
297 | REVEAL_MODULE: | |
298 | ||
299 | Include the C file for the module into the file being compiled | |
300 | but do not make the functions within the module inline. | |
301 | ||
302 | While of no apparent benefit, this makes it possible for the | |
303 | included module, when compiled to inline its calls to what | |
304 | would otherwize be external functions. | |
305 | ||
306 | INLINE_MODULE: | |
307 | ||
308 | Make external functions within the module `inline'. Thus if | |
309 | the module is included into a file being compiled, calls to | |
310 | its funtions can be eliminated. 2 implies 1. | |
311 | ||
d29d5195 | 312 | PSIM_INLINE_LOCALS: |
c906108c SS |
313 | |
314 | Make internal (static) functions within the module `inline'. | |
315 | ||
316 | The following abreviations are available: | |
317 | ||
318 | INCLUDE_MODULE == (REVEAL_MODULE | INLINE_MODULE) | |
319 | ||
d29d5195 | 320 | ALL_INLINE == (REVEAL_MODULE | INLINE_MODULE | PSIM_INLINE_LOCALS) |
c906108c SS |
321 | |
322 | In addition to this, modules have been put into two categories. | |
323 | ||
324 | Simple modules - eg sim-endian.h bits.h | |
325 | ||
326 | Because these modules are small and simple and do not have | |
327 | any complex interpendencies they are configured, if | |
328 | <module>_INLINE is so enabled, to inline themselves in all | |
329 | modules that include those files. | |
330 | ||
331 | For the default build, this is a real win as all byte | |
332 | conversion and bit manipulation functions are inlined. | |
333 | ||
334 | Complex modules - the rest | |
335 | ||
336 | These are all handled using the files inline.h and inline.c. | |
337 | psim.c includes the above which in turn include any remaining | |
338 | code. | |
339 | ||
340 | IMPLEMENTATION: | |
341 | ||
342 | The inline ability is enabled by prefixing every data / function | |
343 | declaration and definition with one of the following: | |
344 | ||
345 | ||
346 | INLINE_<module> | |
347 | ||
348 | Prefix to any global function that is a candidate for being | |
349 | inline. | |
350 | ||
351 | values - `', `static', `static INLINE' | |
352 | ||
353 | ||
354 | EXTERN_<module> | |
355 | ||
356 | Prefix to any global data structures for the module. Global | |
357 | functions that are not to be inlined shall also be prefixed | |
358 | with this. | |
359 | ||
360 | values - `', `static', `static' | |
361 | ||
362 | ||
363 | STATIC_INLINE_<module> | |
364 | ||
365 | Prefix to any local (static) function that is a candidate for | |
366 | being made inline. | |
367 | ||
368 | values - `static', `static INLINE' | |
369 | ||
370 | ||
371 | static | |
372 | ||
373 | Prefix all local data structures. Local functions that are not | |
374 | to be inlined shall also be prefixed with this. | |
375 | ||
376 | values - `static', `static' | |
377 | ||
378 | nb: will not work for modules that are being inlined for every | |
379 | use (white lie). | |
380 | ||
381 | ||
382 | extern | |
383 | #ifndef _INLINE_C_ | |
384 | #endif | |
385 | ||
386 | Prefix to any declaration of a global object (function or | |
387 | variable) that should not be inlined and should have only one | |
388 | definition. The #ifndef wrapper goes around the definition | |
389 | propper to ensure that only one copy is generated. | |
390 | ||
391 | nb: this will not work when a module is being inlined for every | |
392 | use. | |
393 | ||
394 | ||
395 | STATIC_<module> | |
396 | ||
397 | Replaced by either `static' or `EXTERN_MODULE'. | |
398 | ||
399 | ||
400 | REALITY CHECK: | |
401 | ||
402 | This is not for the faint hearted. I've seen GCC get up to 500mb | |
403 | trying to compile what this can create. | |
404 | ||
405 | Some of the modules do not yet implement the WITH_INLINE_STATIC | |
406 | option. Instead they use the macro STATIC_INLINE to control their | |
407 | local function. | |
408 | ||
409 | Because of the way that GCC parses __attribute__(), the macro's | |
080fe24b | 410 | need to be adjacent to the function name rather than at the start |
c906108c SS |
411 | of the line vis: |
412 | ||
413 | int STATIC_INLINE_MODULE f(void); | |
414 | void INLINE_MODULE *g(void); | |
415 | ||
416 | */ | |
417 | ||
418 | #define REVEAL_MODULE 1 | |
419 | #define INLINE_MODULE 2 | |
420 | #define INCLUDE_MODULE (INLINE_MODULE | REVEAL_MODULE) | |
d29d5195 | 421 | #define PSIM_INLINE_LOCALS 4 |
c906108c SS |
422 | #define ALL_INLINE 7 |
423 | ||
424 | /* Your compilers inline reserved word */ | |
425 | ||
426 | #ifndef INLINE | |
427 | #if defined(__GNUC__) && defined(__OPTIMIZE__) | |
428 | #define INLINE __inline__ | |
429 | #else | |
430 | #define INLINE /*inline*/ | |
431 | #endif | |
432 | #endif | |
433 | ||
434 | ||
c906108c SS |
435 | /* Default prefix for static functions */ |
436 | ||
437 | #ifndef STATIC_INLINE | |
438 | #define STATIC_INLINE static INLINE | |
439 | #endif | |
440 | ||
441 | /* Default macro to simplify control several of key the inlines */ | |
442 | ||
443 | #ifndef DEFAULT_INLINE | |
d29d5195 | 444 | #define DEFAULT_INLINE PSIM_INLINE_LOCALS |
c906108c SS |
445 | #endif |
446 | ||
447 | /* Code that converts between hosts and target byte order. Used on | |
448 | every memory access (instruction and data). See sim-endian.h for | |
449 | additional byte swapping configuration information. This module | |
450 | can inline for all callers */ | |
451 | ||
452 | #ifndef SIM_ENDIAN_INLINE | |
453 | #define SIM_ENDIAN_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0) | |
454 | #endif | |
455 | ||
456 | /* Low level bit manipulation routines. This module can inline for all | |
457 | callers */ | |
458 | ||
459 | #ifndef BITS_INLINE | |
460 | #define BITS_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0) | |
461 | #endif | |
462 | ||
463 | /* Code that gives access to various CPU internals such as registers. | |
464 | Used every time an instruction is executed */ | |
465 | ||
466 | #ifndef CPU_INLINE | |
467 | #define CPU_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0) | |
468 | #endif | |
469 | ||
470 | /* Code that translates between an effective and real address. Used | |
471 | by every load or store. */ | |
472 | ||
473 | #ifndef VM_INLINE | |
474 | #define VM_INLINE DEFAULT_INLINE | |
475 | #endif | |
476 | ||
477 | /* Code that loads/stores data to/from the memory data structure. | |
478 | Used by every load or store */ | |
479 | ||
480 | #ifndef CORE_INLINE | |
481 | #define CORE_INLINE DEFAULT_INLINE | |
482 | #endif | |
483 | ||
484 | /* Code to check for and process any events scheduled in the future. | |
485 | Called once per instruction cycle */ | |
486 | ||
487 | #ifndef EVENTS_INLINE | |
488 | #define EVENTS_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0) | |
489 | #endif | |
490 | ||
491 | /* Code monotoring the processors performance. It counts events on | |
492 | every instruction cycle */ | |
493 | ||
494 | #ifndef MON_INLINE | |
495 | #define MON_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0) | |
496 | #endif | |
497 | ||
498 | /* Code called on the rare occasions that an interrupt occures. */ | |
499 | ||
500 | #ifndef INTERRUPTS_INLINE | |
501 | #define INTERRUPTS_INLINE DEFAULT_INLINE | |
502 | #endif | |
503 | ||
504 | /* Code called on the rare occasion that either gdb or the device tree | |
505 | need to manipulate a register within a processor */ | |
506 | ||
507 | #ifndef REGISTERS_INLINE | |
508 | #define REGISTERS_INLINE DEFAULT_INLINE | |
509 | #endif | |
510 | ||
511 | /* Code called on the rare occasion that a processor is manipulating | |
512 | real hardware instead of RAM. | |
513 | ||
514 | Also, most of the functions in devices.c are always called through | |
515 | a jump table. */ | |
516 | ||
517 | #ifndef DEVICE_INLINE | |
d29d5195 | 518 | #define DEVICE_INLINE (DEFAULT_INLINE ? PSIM_INLINE_LOCALS : 0) |
c906108c SS |
519 | #endif |
520 | ||
521 | /* Code called used while the device tree is being built. | |
522 | ||
523 | Inlining this is of no benefit */ | |
524 | ||
525 | #ifndef TREE_INLINE | |
d29d5195 | 526 | #define TREE_INLINE (DEFAULT_INLINE ? PSIM_INLINE_LOCALS : 0) |
c906108c SS |
527 | #endif |
528 | ||
529 | /* Code called whenever information on a Special Purpose Register is | |
530 | required. Called by the mflr/mtlr pseudo instructions */ | |
531 | ||
532 | #ifndef SPREG_INLINE | |
533 | #define SPREG_INLINE DEFAULT_INLINE | |
534 | #endif | |
535 | ||
536 | /* Functions modeling the semantics of each instruction. Two cases to | |
537 | consider, firstly of idecode is implemented with a switch then this | |
538 | allows the idecode function to inline each semantic function | |
539 | (avoiding a call). The second case is when idecode is using a | |
540 | table, even then while the semantic functions can't be inlined, | |
541 | setting it to one still enables each semantic function to inline | |
542 | anything they call (if that code is marked for being inlined). | |
543 | ||
544 | WARNING: you need lots (like 200mb of swap) of swap. Setting this | |
545 | to 1 is useful when using a table as it enables the sematic code to | |
546 | inline all of their called functions */ | |
547 | ||
548 | #ifndef SEMANTICS_INLINE | |
549 | #define SEMANTICS_INLINE (DEFAULT_INLINE & ~INLINE_MODULE) | |
550 | #endif | |
551 | ||
552 | /* When using the instruction cache, code to decode an instruction and | |
553 | install it into the cache. Normally called when ever there is a | |
554 | miss in the instruction cache. */ | |
555 | ||
556 | #ifndef ICACHE_INLINE | |
557 | #define ICACHE_INLINE (DEFAULT_INLINE & ~INLINE_MODULE) | |
558 | #endif | |
559 | ||
560 | /* General functions called by semantics functions but part of the | |
561 | instruction table. Although called by the semantic functions the | |
562 | frequency of calls is low. Consequently the need to inline this | |
563 | code is reduced. */ | |
564 | ||
565 | #ifndef SUPPORT_INLINE | |
d29d5195 | 566 | #define SUPPORT_INLINE PSIM_INLINE_LOCALS |
c906108c SS |
567 | #endif |
568 | ||
569 | /* Model specific code used in simulating functional units. Note, it actaully | |
570 | pays NOT to inline the PowerPC model functions (at least on the x86). This | |
571 | is because if it is inlined, each PowerPC instruction gets a separate copy | |
572 | of the code, which is not friendly to the cache. */ | |
573 | ||
574 | #ifndef MODEL_INLINE | |
575 | #define MODEL_INLINE (DEFAULT_INLINE & ~INLINE_MODULE) | |
576 | #endif | |
577 | ||
578 | /* Code to print out what options we were compiled with. Because this | |
579 | is called at process startup, it doesn't have to be inlined, but | |
580 | if it isn't brought in and the model routines are inline, the model | |
581 | routines will be pulled in twice. */ | |
582 | ||
583 | #ifndef OPTIONS_INLINE | |
584 | #define OPTIONS_INLINE MODEL_INLINE | |
585 | #endif | |
586 | ||
587 | /* idecode acts as the hub of the system, everything else is imported | |
588 | into this file */ | |
589 | ||
590 | #ifndef IDECOCE_INLINE | |
d29d5195 | 591 | #define IDECODE_INLINE PSIM_INLINE_LOCALS |
c906108c SS |
592 | #endif |
593 | ||
594 | /* psim, isn't actually inlined */ | |
595 | ||
596 | #ifndef PSIM_INLINE | |
d29d5195 | 597 | #define PSIM_INLINE PSIM_INLINE_LOCALS |
c906108c SS |
598 | #endif |
599 | ||
600 | /* Code to emulate os or rom compatibility. This code is called via a | |
601 | table and hence there is little benefit in making it inline */ | |
602 | ||
603 | #ifndef OS_EMUL_INLINE | |
604 | #define OS_EMUL_INLINE 0 | |
605 | #endif | |
606 | ||
607 | #endif /* _PSIM_CONFIG_H */ |