]>
Commit | Line | Data |
---|---|---|
cbb38b47 BE |
1 | /* Main header for the Hitachi SH64 architecture. */ |
2 | ||
3 | #ifndef SIM_MAIN_H | |
4 | #define SIM_MAIN_H | |
5 | ||
6 | #define USING_SIM_BASE_H /* FIXME: quick hack */ | |
7 | ||
cbb38b47 BE |
8 | /* sim-basics.h includes config.h but cgen-types.h must be included before |
9 | sim-basics.h and cgen-types.h needs config.h. */ | |
10 | #include "config.h" | |
11 | ||
12 | #include "symcat.h" | |
13 | #include "sim-basics.h" | |
14 | #include "cgen-types.h" | |
15 | #include "sh-desc.h" | |
16 | #include "sh-opc.h" | |
17 | #include "arch.h" | |
18 | ||
19 | /* These must be defined before sim-base.h. */ | |
20 | typedef UDI sim_cia; | |
7e83aa92 | 21 | #define CIA_ADDR(cia) (cia) |
cbb38b47 | 22 | |
cbb38b47 BE |
23 | #include "sim-base.h" |
24 | #include "cgen-sim.h" | |
25 | #include "sh64-sim.h" | |
26 | \f | |
27 | /* The _sim_cpu struct. */ | |
28 | ||
29 | struct _sim_cpu { | |
30 | /* sim/common cpu base. */ | |
31 | sim_cpu_base base; | |
32 | ||
33 | /* Static parts of cgen. */ | |
34 | CGEN_CPU cgen_cpu; | |
35 | ||
36 | /* CPU specific parts go here. | |
37 | Note that in files that don't need to access these pieces WANT_CPU_FOO | |
38 | won't be defined and thus these parts won't appear. This is ok in the | |
39 | sense that things work. It is a source of bugs though. | |
40 | One has to of course be careful to not take the size of this | |
41 | struct and no structure members accessed in non-cpu specific files can | |
42 | go after here. Oh for a better language. */ | |
43 | #if defined (WANT_CPU_SH64) | |
44 | SH64_CPU_DATA cpu_data; | |
45 | #endif | |
46 | }; | |
47 | \f | |
48 | /* The sim_state struct. */ | |
49 | ||
50 | struct sim_state { | |
f95f4ed2 | 51 | sim_cpu *cpu[MAX_NR_PROCESSORS]; |
cbb38b47 BE |
52 | |
53 | CGEN_STATE cgen_state; | |
54 | ||
55 | sim_state_base base; | |
56 | }; | |
57 | \f | |
58 | /* Misc. */ | |
59 | ||
60 | /* Catch address exceptions. */ | |
61 | extern SIM_CORE_SIGNAL_FN sh64_core_signal; | |
62 | #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ | |
63 | sh64_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \ | |
64 | (TRANSFER), (ERROR)) | |
65 | ||
66 | /* Default memory size. */ | |
67 | #define SH64_DEFAULT_MEM_SIZE 0x800000 /* 8M */ | |
68 | ||
69 | #endif /* SIM_MAIN_H */ |