]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - sim/testsuite/ChangeLog
projects / thirdparty / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
This commit was manufactured by cvs2svn to create branch
[thirdparty/binutils-gdb.git] / sim / testsuite / ChangeLog
CommitLineData
2878ece1
SR		 12008-02-12 M Ranga Swami Reddy <MR.Swami.Reddy@nsc.com>
2
3 * sim/cr16/: New directory. Tests for CR16 simulator.
4 sim/cr16/allinsn.exp and sim/cr16/misc.exp: New files: Test scripts.
5 sim/cr16/testutils.inc: New file: Test macros.
6 sim/cr16/addb.cgs, sim/cr16/addd.cgs, sim/cr16/addi.cgs,
7 sim/cr16/addw.cgs, sim/cr16/andb.cgs, sim/cr16/andd.cgs,
8 sim/cr16/andw.cgs, sim/cr16/ashub.cgs, sim/cr16/ashub_i.cgs,
9 sim/cr16/ashud.cgs, sim/cr16/ashud_i.cgs, sim/cr16/ashuw.cgs,
10 sim/cr16/ashuw_i.cgs, sim/cr16/lshb.cgs, sim/cr16/lshb_i.cgs,
11 sim/cr16/lshd.cgs, sim/cr16/lshd_i.cgs, sim/cr16/lshw.cgs,
12 sim/cr16/lshw_i.cgs, sim/cr16/bal1_24.cgs, sim/cr16/bal2_24.cgs,
13 sim/cr16/bcc.cgs, sim/cr16/bcs.cgs, sim/cr16/beq.cgs, sim/cr16/bne.cgs
14 sim/cr16/bge.cgs, sim/cr16/bgt.cgs, sim/cr16/bhi.cgs, sim/cr16/bhs.cgs,
15 sim/cr16/br.cgs, sim/cr16/beq0b.cgs, sim/cr16/beq0w.cgs,
16 sim/cr16/bne0b.cgs, sim/cr16/bne0w.cgs, sim/cr16/cmpb.cgs,
17 sim/cr16/cmpb_i.cgs, sim/cr16/cmpd.cgs, sim/cr16/cmpd_i.cgs,
18 sim/cr16/cmpw.cgs, sim/cr16/cmpw_i.cgs, sim/cr16/cmpi.cgs,
19 sim/cr16/excp.cgs, sim/cr16/hello.ms, sim/cr16/jal.cgs,
20 sim/cr16/jeq.cgs, sim/cr16/jcc.cgs, sim/cr16/jcs.cgs, sim/cr16/jfc.cgs,
21 sim/cr16/jfs.cgs sim/cr16/jge.cgs, sim/cr16/jgt.cgs, sim/cr16/jhi.cgs,
22 sim/cr16/jhs.cgs sim/cr16/jlo.cgs, sim/cr16/jls.cgs, sim/cr16/jlt.cgs,
23 sim/cr16/jne.cgs, sim/cr16/jump.cgs, sim/cr16/loadb.cgs,
24 sim/cr16/loadd.cgs, sim/cr16/loadw.cgs, sim/cr16/loadm.cgs,
25 sim/cr16/loadmp.cgs, sim/cr16/lprd-sprd.cgs, sim/cr16/lpr-spr.cgs,
26 sim/cr16/macqw.cgs, sim/cr16/macsw.cgs, sim/cr16/macuw.cgs,
27 sim/cr16/movb.cgs, sim/cr16/movd.cgs, sim/cr16/movw.cgs,
28 sim/cr16/movxb.cgs, sim/cr16/movxw.cgs, sim/cr16/movzb.cgs,
29 sim/cr16/movzw.cgs, sim/cr16/mulb.cgs, sim/cr16/mulsb.cgs,
30 sim/cr16/mulsw.cgs, sim/cr16/muluw.cgs, sim/cr16/mulw.cgs,
31 sim/cr16/orb.cgs, sim/cr16/ord.cgs, sim/cr16/orw.cgs,
32 sim/cr16/pop1.cgs, sim/cr16/pop2.cgs, sim/cr16/pop3.cgs,
33 sim/cr16/popret1.cgs, sim/cr16/popret2.cgs, sim/cr16/popret3.cgs,
34 sim/cr16/push1.cgs, sim/cr16/push2.cgs, sim/cr16/push3.cgs,
35 sim/cr16/nop.cgs, sim/cr16/ret.cgs, sim/cr16/scc.cgs, sim/cr16/scs.cgs,
36 sim/cr16/seq.cgs, sim/cr16/sfc.cgs, sim/cr16/sfs.cgs, sim/cr16/sge.cgs,
37 sim/cr16/sgt.cgs, sim/cr16/shi.cgs, sim/cr16/shs.cgs, sim/cr16/slo.cgs,
38 sim/cr16/sls.cgs, sim/cr16/slt.cgs, sim/cr16/sne.cgs,
39 sim/cr16/storb.cgs, sim/cr16/stord.cgs, sim/cr16/storw.cgs,
40 sim/cr16/subb.cgs, sim/cr16/subd.cgs, sim/cr16/subi.cgs,
41 sim/cr16/subw.cgs, sim/cr16/xorb.cgs, sim/cr16/xord.cgs,
42 sim/cr16/xorw.cgs: New files: CR16 simulator tests.
43
c5fbc25b
DD		 442008-02-05 DJ Delorie <dj@redhat.com>
45
46 * sim/v850/: New directory.
47 * sim/v850/allinsns.exp: New.
48 * sim/v850/bsh.cgs: New.
49 * sim/v850/div.cgs: New.
50 * sim/v850/divh.cgs: New.
51 * sim/v850/divh_3.cgs: New.
52 * sim/v850/divhu.cgs: New.
53 * sim/v850/divu.cgs: New.
54 * sim/v850/sar.cgs: New.
55 * sim/v850/satadd.cgs: New.
56 * sim/v850/satsub.cgs: New.
57 * sim/v850/satsubi.cgs: New.
58 * sim/v850/satsubr.cgs: New.
59 * sim/v850/shl.cgs: New.
60 * sim/v850/shr.cgs: New.
61 * sim/v850/testutils.cgs: New.
62 * sim/v850/testutils.inc: New.
63
bf31154f
HPN		 642007-11-08 Hans-Peter Nilsson <hp@axis.com>
65
66 * sim/cris/asm/x0-v10.ms, sim/cris/asm/x0-v32.ms: Tweak
67 stack-pointer match pattern for 4K host environment.
68
9538c15c
HPN		 692007-10-22 Edgar E. Iglesias <edgar@axis.com>
70 Hans-Peter Nilsson <hp@axis.com>
71
72 * sim/cris/asm/testutils.inc (test_move_cc): Add missing call to
73 test_cc.
74 * sim/cris/asm/asr.ms: Correct expected condition code flags.
75 * sim/cris/asm/boundr.ms: Ditto.
76 * sim/cris/asm/dstep.ms: Ditto.
77 * sim/cris/asm/lsr.ms: Ditto.
78 * sim/cris/asm/movecr.ms: Ditto.
79 * sim/cris/asm/mover.ms: Ditto.
80 * sim/cris/asm/neg.ms: Ditto. Use test_cc, not test_move_cc.
81 * sim/cris/asm/op3.ms: Check the condition code flags after the insn
82 under test.
83 * sim/cris/asm/movecrt10.ms: Update expected number of simulated
84 cycles.
85 * sim/cris/asm/movecrt32.ms: Ditto.
86 * sim/cris/asm/jsr.ms: Don't use local label 8.
87 * sim/cris/asm/nonvcv32.ms: New test.
88
eb639c50
DJ		 892007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
90
91 * sim/cris/c/freopen2.c: Added testcase.
92
1654a6f7
HPN		 932006-10-02 Hans-Peter Nilsson <hp@axis.com>
94 Edgar E. Iglesias <edgar@axis.com>
95
96 * sim/cris/c/clone5.c, sim/cris/c/mprotect1.c,
97 sim/cris/c/rtsigprocmask1.c, sim/cris/c/rtsigsuspend1.c,
98 sim/cris/c/sig7.c, sim/cris/c/sigreturn1.c,
99 sim/cris/c/sigreturn2.c, sim/cris/c/syscall1.c,
100 sim/cris/c/syscall2.c, sim/cris/c/sysctl2.c, sim/cris/c/fcntl1.c,
101 sim/cris/c/readlink2.c: Add code to print ENOSYS if syscall being
102 tested returns ENOSYS. Add early exit where needed. Change any
103 existing code to print "xyzzy", not "pass".
104 * sim/cris/asm/option3.ms, sim/cris/asm/option4.ms,
105 sim/cris/c/clone6.c, sim/cris/c/fcntl2.c,
106 sim/cris/c/mprotect2.c, sim/cris/c/readlink11.c,
107 sim/cris/c/rtsigprocmask2.c, sim/cris/c/rtsigsuspend2.c,
108 sim/cris/c/sig13.c, sim/cris/c/sigreturn3.c,
109 sim/cris/c/sigreturn4.c, sim/cris/c/syscall3.c,
110 sim/cris/c/syscall4.c, sim/cris/c/syscall5.c,
111 sim/cris/c/syscall6.c, sim/cris/c/syscall7.c,
112 sim/cris/c/syscall8.c, sim/cris/c/sysctl3.c: New tests.
113
539a5255
HPN		 1142006-09-30 Hans-Peter Nilsson <hp@axis.com>
115
116 * sim/cris/c/pipe2.c: Adjust expected output.
117 (process): Don't write as much to the pipe as to trig the
118 inordinate-amount test in the sim pipe machinery. Correct test of
119 write return-value; check only that pipemax bytes were
120 successfully written. For error-case, emit strerror as well.
121 (main): Add a second read.
122
c466736a
HPN		 1232006-04-08 Hans-Peter Nilsson <hp@axis.com>
124
125 * sim/cris/hw/rv-n-cris/irq6.ms: New test.
126
26d01138
HPN		 1272006-04-03 Hans-Peter Nilsson <hp@axis.com>
128
129 * sim/cris/hw: New directory for subdirectories with tests.
130 * sim/cris/hw/rv-n-cris: New directory with tests.
131
4369b6eb
HPN		 1322006-04-02 Hans-Peter Nilsson <hp@axis.com>
133
ef6affe1
HPN		 134 * sim/cris/asm/testutils.inc (test_h_mem): Use register prefix.
135 (testr_h_dr, test_h_dr, ldmem_h_gr, mvr_h_mem): Ditto. Correct
136 syntax.
137
4369b6eb
HPN		 138 * sim/cris/asm/x0-v10.ms, sim/cris/asm/x0-v32.ms: Widen regexp for
139 stack pointer values.
140
77dfaed3
HPN		 1412006-02-23 Hans-Peter Nilsson <hp@axis.com>
142
143 * sim/cris/c/time2.c: New test.
144
9e49fc3d
HPN		 1452006-01-10 Hans-Peter Nilsson <hp@axis.com>
146
147 * sim/cris/asm/x1-v10.ms, sim/cris/asm/x3-v10.ms,
148 sim/cris/asm/x7-v10.ms: Update expected cycle output.
149
632c75db
HPN		 1502005-12-06 Hans-Peter Nilsson <hp@axis.com>
151
152 * sim/cris/asm/movmp8.ms, sim/cris/asm/pcplus.ms: New tests.
153 * sim/cris/asm/movmp.ms: Do not write to P0, P4 or P8.
154 * sim/cris/asm/raw13.ms: Write to MOF instead of WZ (P4).
155
5e1f6430
HPN		 1562005-11-21 Hans-Peter Nilsson <hp@axis.com>
157
158 * sim/cris: New directory with C and assembly tests for the CRIS
159 simulator.
160
38f48d72
AC		 1612005-01-11 Andrew Cagney <cagney@localhost.localdomain>
162
163 * configure: Regenerated to track ../common/aclocal.m4 changes.
164
4db6a73d
AC		 1652005-01-07 Andrew Cagney <cagney@gnu.org>
166
b7026657
AC		 167 * configure.ac: Rename configure.in, require autoconf 2.59.
168 * configure: Re-generate.
169
d0945c9b
AC		 170 * configure.in: Pass literal subdirectories to AC_CONFIG_SUBDIRS.
171 * configure: Re-generate.
172
4db6a73d
AC		 173 * fr30-elf, d30v-elf: Delete directory.
174
5eba45c1
HPN		 1752004-11-16 Hans-Peter Nilsson <hp@axis.com>
176
177 * lib/sim-defs.exp (run_sim_test): Make multiple "output"
178 specifications concatenate, not override.
310ca70c 179 Support "xfail" and "kfail".
5eba45c1 180
fcf640ec
NC		 1812004-10-26 Nick Clifton <nickc@redhat.com>
182
183 * lib/sim-defs.exp (sim_run): Add support for the "rawsid"
184 protocol.
185
a3ef5243
DD		 1862004-09-13 DJ Delorie <dj@redhat.com>
187
188 * lib/sim-defs.exp (run_sim_test): Add global_as_options,
189 global_ld_options, and global_sim_options to all test cases, if
190 defined.
191
bc81a370
BE		 1922004-05-12 Ben Elliston <bje@au.ibm.com>
193
194 * lib/sim-defs.exp: Remove stray semicolons.
195
676a64f4
RS		 1962004-03-01 Richard Sandiford <rsandifo@redhat.com>
197
198 * sim/frv/allinsn.exp (all_machs): Add fr405 and fr450.
199 * sim/fr400/allinsn.exp (all_machs): Likewise.
200 * sim/fr400/addss.cgs (mach): Change to "fr405 fr450".
201 * sim/fr400/scutss.cgs (mach): Likewise.
202 * sim/fr400/slass.cgs (mach): Likewise.
203 * sim/fr400/smass.cgs (mach): Likewise.
204 * sim/fr400/smsss.cgs (mach): Likewise.
205 * sim/fr400/smu.cgs (mach): Likewise.
206 * sim/fr400/subss.cgs (mach): Likewise.
207 * sim/interrupts/fp_exception.cgs: Replace fmadds with .word.
208 * sim/interrupts/fp_exception-fr550.cgs: Likewise.
209 * sim/frv/mqlclrhs.cgs: New test.
210 * sim/frv/mqlmths.cgs: New test.
211 * sim/frv/mqsllhi.cgs: New test.
212 * sim/frv/mqsrahi.cgs: New test.
213
8b73069f
RS		 2142004-03-01 Richard Sandiford <rsandifo@redhat.com>
215
216 * sim/frv/fr400/scutss.cgs: Fix tests to account for rounding.
217 Add some new ones.
218
8ae0baa2
RS		 2192004-03-01 Richard Sandiford <rsandifo@redhat.com>
220
221 * sim/frv/{rstb,rsth,rst,rstd,rstq}.cgs: Delete.
222 * sim/frv/{rstbf,rsthf,rstf,rstdf,rstqf}.cgs: Delete.
223
df0a8012
CD		 2242004-01-26 Chris Demetriou <cgd@broadcom.com>
225
226 * sim/mips: New directory. Tests for the MIPS simulator.
227
2345c93c
BE		 2282004-01-23 Ben Elliston <bje@wasabisystems.com>
229
230 * lib/sim-defs.exp (run_sim_test): Delete the .o and .x files if a
231 test passes.
232
5ca353c3
DB		 2332003-10-10 Dave Brolley <brolley@redhat.com>
234
235 * sim/frv/testutils.inc (or_gr_immed): New macro.
236 * sim/frv/fp_exception-fr550.cgs: Write insns using
237 unaligned registers into the program in order to
238 cause the required exceptions.
239 * sim/frv/fp_exception.cgs: Ditto.
240 * sim/frv/regalign.cgs: Ditto.
241
086419a8
DB		 2422003-10-06 Dave Brolley <brolley@redhat.com>
243
244 * sim/frv/fr550: New subdirectory.
245 * sim/frv/fr400/*.cgs: Add fr550 as appropriate.
246 * sim/frv/fr500/*.cgs: Add fr550 as appropriate.
247 * sim/frv/interrupts/*.cgs: Add fr550 as appropriate.
248 * sim/frv/interrupts/*-fr550.cgs: New test cases for fr550.
249
f6f87075
MS		 2502003-09-19 Michael Snyder <msnyder@redhat.com>
251
252 * sim/frv/nldqi.cgs: Remove. This insn was never implemented
253 by Fujitsu.
254
d45d015e
DB		 2552003-09-19 Dave Brolley <brolley@redhat.com>
256
257 * sim/frv/rstqf.cgs: Use nldq instead of nldqi.
258 * sim/frv/rstq.cgs: Use nldq instead of nldqi.
259
e961d8dc
MS		 2602003-09-11 Michael Snyder <msnyder@redhat.com>
261
262 * sim/testsuite/sim/frv/movgs.cgs: Change lcr to spr[273],
263 which according to the comments seems to be the intent.
264
fbd93201
DB		 2652003-09-09 Dave Brolley <brolley@redhat.com>
266
267 * sim/frv/maddaccs.cgs: move to fr400 subdirectory.
268 * sim/frv/msubaccs.cgs: move to fr400 subdirectory.
269 * sim/frv/masaccs.cgs: move to fr400 subdirectory.
270
19121792
MS		 2712003-09-03 Michael Snyder <msnyder@redhat.com>
272
cc985513
BE		 273 * sim/frv/fr500/mclracc.cgs: Change mach to 'all', to be
274 consistent with other tests in the directory.
19121792 275
0eb3d260
MS		 2762003-09-03 Michael Snyder <msnyder@redhat.com>
277
278 * sim/frv/interrupts/Ipipe-fr400.cgs: New file.
279 * sim/frv/interrupts/Ipipe-fr500.cgs: New file.
280 * sim/frv/interrupts/Ipipe.cgs: Remove (replaced by above).
281
51796a3f
DB		 2822003-08-20 Michael Snyder <msnyder@redhat.com>
283 On behalf of Dave Brolley
284
285 * sim/frv: New testsuite.
286 * frv-elf: New testsuite.
287
b7c7b624
MS		 2882003-07-09 Michael Snyder <msnyder@redhat.com>
289
290 * sim/sh: New directory. Tests for Renesas sh family.
291
a27a0651
MS		 2922003-04-13 Michael Snyder <msnyder@redhat.com>
293
294 * sim/h8300: New directory. Tests for Renesas h8/300 family.
295
49634642
NC		 2962003-04-01 Nick Clifton <nickc@redhat.com>
297
298 * sim/arm: New directory: Tests for ARM simulator.
299 * sim/arm/allinsn.exp: New file: Test script.
300 * sim/arm/testutils.inc: New file: Test macros.
301 * sim/arm/adc.cgs, sim/arm/add.cgs, sim/arm/and.cgs,
302 sim/arm/b.cgs, sim/arm/bic.cgs, sim/arm/bl.cgs, sim/arm/bx.cgs,
303 sim/arm/cmn.cgs, sim/arm/cmp.cgs, sim/arm/eor.cgs,
304 sim/arm/hello.ms, sim/arm/ldm.cgs, sim/arm/ldr.cgs,
305 sim/arm/ldrb.cgs, sim/arm/ldrh.cgs, sim/arm/ldrsb.cgs,
306 sim/arm/ldrsh.cgs, sim/arm/misaligned1.ms, sim/arm/misaligned2.ms,
307 sim/arm/misaligned3.ms, sim/arm/misc.exp, sim/arm/mla.cgs,
308 sim/arm/mov.cgs, sim/arm/mrs.cgs, sim/arm/msr.cgs,
309 sim/arm/mul.cgs, sim/arm/mvn.cgs, sim/arm/orr.cgs,
310 sim/arm/rsb.cgs, sim/arm/rsc.cgs, sim/arm/sbc.cgs,
311 sim/arm/smlal.cgs, sim/arm/smull.cgs, sim/arm/stm.cgs,
312 sim/arm/str.cgs, sim/arm/strb.cgs, sim/arm/strh.cgs,
313 sim/arm/sub.cgs, sim/arm/swi.cgs, sim/arm/swp.cgs,
314 sim/arm/swpb.cgs, sim/arm/teq.cgs, sim/arm/tst.cgs,
315 sim/arm/umlal.cgs, sim/arm/umull.cgs: New files: ARM tests.
316 * sim/arm/iwmmxt: New Directory: Tests for iWMMXt.
317 * sim/arm/iwmmxt/iwmmxt.exp: New file: Test script.
318 * sim/arm/iwmmxt/testutils.inc: New file: Test macros.
319 * sim/arm/iwmmxt/tbcst.cgs, sim/arm/iwmmxt/textrm.cgs,
320 sim/arm/iwmmxt/tinsr.cgs, sim/arm/iwmmxt/tmia.cgs,
321 sim/arm/iwmmxt/tmiaph.cgs, sim/arm/iwmmxt/tmiaxy.cgs,
322 sim/arm/iwmmxt/tmovmsk.cgss, sim/arm/iwmmxt/wacc.cgs,
323 sim/arm/iwmmxt/wadd.cgs, sim/arm/iwmmxt/waligni.cgs,
324 sim/arm/iwmmxt/walignr.cgs, sim/arm/iwmmxt/wand.cgs,
325 sim/arm/iwmmxt/wandn.cgs, sim/arm/iwmmxt/wavg2.cgs,
326 sim/arm/iwmmxt/wcmpeq.cgs, sim/arm/iwmmxt/wcmpgt.cgs,
327 sim/arm/iwmmxt/wmac.cgs, sim/arm/iwmmxt/wmadd.cgs,
328 sim/arm/iwmmxt/wmax.cgs, sim/arm/iwmmxt/wmin.cgs,
329 sim/arm/iwmmxt/wmov.cgs, sim/arm/iwmmxt/wmul.cgs,
330 sim/arm/iwmmxt/wor.cgs, sim/arm/iwmmxt/wpack.cgs,
331 sim/arm/iwmmxt/wror.cgs, sim/arm/iwmmxt/wsad.cgs,
332 sim/arm/iwmmxt/wshufh.cgs, sim/arm/iwmmxt/wsll.cgs,
333 sim/arm/iwmmxt/wsra.cgs, sim/arm/iwmmxt/wsrl.cgs,
334 sim/arm/iwmmxt/wsub.cgs, sim/arm/iwmmxt/wunpckeh.cgs,
335 sim/arm/iwmmxt/wunpckel.cgs, sim/arm/iwmmxt/wunpckih.cgs,
336 sim/arm/iwmmxt/wunpckil.cgs, sim/arm/iwmmxt/wxor.cgs,
337 sim/arm/iwmmxt/wzero.cgs: New files: iWMMXt tests.
338 * sim/arm/thumb: New Directory: Thumb tests.
339 * sim/arm/thumb/allthumb.exp: New file: Test script.
340 * sim/arm/thumb/testutils.inc: New file: Test macros.
341 * sim/arm/thumb/adc.cgs, sim/arm/thumb/add-hd-hs.cgs,
342 sim/arm/thumb/add-hd-rs.cgs, sim/arm/thumb/add-rd-hs.cgs,
343 sim/arm/thumb/add-sp.cgs, sim/arm/thumb/add.cgs,
344 sim/arm/thumb/addi.cgs, sim/arm/thumb/addi8.cgs,
345 sim/arm/thumb/and.cgs, sim/arm/thumb/asr.cgs, sim/arm/thumb/b.cgs,
346 sim/arm/thumb/bcc.cgs, sim/arm/thumb/bcs.cgs,
347 sim/arm/thumb/beq.cgs, sim/arm/thumb/bge.cgs,
348 sim/arm/thumb/bgt.cgs, sim/arm/thumb/bhi.cgs,
349 sim/arm/thumb/bic.cgs, sim/arm/thumb/bl-hi.cgs,
350 sim/arm/thumb/bl-lo.cgs, sim/arm/thumb/ble.cgs,
351 sim/arm/thumb/bls.cgs, sim/arm/thumb/blt.cgs,
352 sim/arm/thumb/bmi.cgs, sim/arm/thumb/bne.cgs,
353 sim/arm/thumb/bpl.cgs, sim/arm/thumb/bvc.cgs,
354 sim/arm/thumb/bvs.cgs, sim/arm/thumb/bx-hs.cgs,
355 sim/arm/thumb/bx-rs.cgs, sim/arm/thumb/cmn.cgs,
356 sim/arm/thumb/cmp-hd-hs.cgs, sim/arm/thumb/cmp-hd-rs.cgs,
357 sim/arm/thumb/cmp-rd-hs.cgs, sim/arm/thumb/cmp.cgs,
358 sim/arm/thumb/eor.cgs, sim/arm/thumb/lda-pc.cgs,
359 sim/arm/thumb/lda-sp.cgs, sim/arm/thumb/ldmia.cgs,
360 sim/arm/thumb/ldr-imm.cgs, sim/arm/thumb/ldr-pc.cgs,
361 sim/arm/thumb/ldr-sprel.cgs, sim/arm/thumb/ldr.cgs,
362 sim/arm/thumb/ldrb-imm.cgs, sim/arm/thumb/ldrb.cgs,
363 sim/arm/thumb/ldrh-imm.cgs, sim/arm/thumb/ldrh.cgs,
364 sim/arm/thumb/ldsb.cgs, sim/arm/thumb/ldsh.cgs,
365 sim/arm/thumb/lsl.cgs, sim/arm/thumb/lsr.cgs,
366 sim/arm/thumb/mov-hd-hs.cgs, sim/arm/thumb/mov-hd-rs.cgs,
367 sim/arm/thumb/mov-rd-hs.cgs, sim/arm/thumb/mov.cgs,
368 sim/arm/thumb/mul.cgs, sim/arm/thumb/mvn.cgs,
369 sim/arm/thumb/neg.cgs, sim/arm/thumb/orr.cgs,
370 sim/arm/thumb/pop-pc.cgs, sim/arm/thumb/pop.cgs,
371 sim/arm/thumb/push-lr.cgs, sim/arm/thumb/push.cgs,
372 sim/arm/thumb/ror.cgs, sim/arm/thumb/sbc.cgs,
373 sim/arm/thumb/stmia.cgs, sim/arm/thumb/str-imm.cgs,
374 sim/arm/thumb/str-sprel.cgs, sim/arm/thumb/str.cgs,
375 sim/arm/thumb/strb-imm.cgs, sim/arm/thumb/strb.cgs,
376 sim/arm/thumb/strh-imm.cgs, sim/arm/thumb/strh.cgs,
377 sim/arm/thumb/sub-sp.cgs, sim/arm/thumb/sub.cgs,
378 sim/arm/thumb/subi.cgs, sim/arm/thumb/subi8.cgs,
379 sim/arm/thumb/swi.cgs, sim/arm/thumb/tst.cgs: New files: Thumb
380 tests.
381 * sim/arm/xscale: New directory.
382 * sim/arm/xscale/xscale.exp: New file: Test script.
383 * sim/arm/xscale/testutils.inc: New file: Test macros.
384 * sim/arm/xscale/blx.cgs, sim/arm/xscale/mia.cgs,
385 sim/arm/xscale/miaph.cgs, sim/arm/xscale/miaxy.cgs,
386 sim/arm/xscale/mra.cgs: New files: XScale tests.
387
c8cca39f
AC		 3882002-06-16 Andrew Cagney <ac131313@redhat.com>
389
390 * configure: Regenerated to track ../common/aclocal.m4 changes.
391
f18ee7ef
BE		 3922001-07-31 Ben Elliston <bje@redhat.com>
393
394 * lib/sim-defs.exp (run_sim_test): Include a description such as
395 "assembling" or "linking" that identifies the phase a test fails
396 in, for easier analysis of failures.
397
0ab7df8a
DB		 3982000-11-01 Dave Brolley <brolley@cygnus.com>
399
400 * lib/sim-defs.exp (run_sm_test): Correct comment. "output" and
401 "xerror" options do not use a list of machines. Clear options from
402 previous test case. Use "$cpu_option" to identify the machine to the
403 assembler, if specified.
404
eb2d80b4
AC		 405Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
406
407 * configure: Regenerated to track ../common/aclocal.m4 changes.
408
c2c6d25f
JM		 4091999-09-15 Doug Evans <devans@casey.cygnus.com>
410
411 * sim/arm/b.cgs: New testcase.
412 * sim/arm/bic.cgs: New testcase.
413 * sim/arm/bl.cgs: New testcase.
414
d4f3574e
SS		 415Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
416
417 * configure: Regenerated to track ../common/aclocal.m4 changes.
418
104c1213
JM		 4191999-08-30 Doug Evans <devans@casey.cygnus.com>
420
104c1213
JM		 421 * lib/sim-defs.exp (run_sim_test): Rename all_machs arg to
422 requested_machs, now is list of machs to run tests for.
423 Delete locals AS,ASFLAGS,LD,LDFLAGS. Use target_assemble
424 and target_link instead.
425
7a292a7a
SS		 4261999-04-21 Doug Evans <devans@casey.cygnus.com>
427
428 * sim/m32r/nop.cgs: Add missing nop insn.
429
430Mon Mar 22 13:28:56 1999 Dave Brolley <brolley@cygnus.com>
431
432 * sim/fr30/stb.cgs: Correct for unaligned access.
433 * sim/fr30/sth.cgs: Correct for unaligned access.
434 * sim/fr30/ldub.cgs: Fix typo: lduh->ldub. Correct
435 for unaligned access.
436 * sim/fr30/and.cgs: Test unaligned access.
437
c906108c
SS		 438Fri Feb 5 12:41:11 1999 Doug Evans <devans@canuck.cygnus.com>
439
440 * lib/sim-defs.exp (sim_run): Print simulator arguments log message.
441
4421999-01-05 Doug Evans <devans@casey.cygnus.com>
443
444 * lib/sim-defs.exp (run_sim_test): New arg all_machs.
445 * sim/fr30/allinsn.exp: Update.
446 * sim/fr30/misc.exp: Update.
447 * sim/m32r/allinsn.exp: Update.
448 * sim/m32r/misc.exp: Update.
449
450Fri Dec 18 17:19:34 1998 Dave Brolley <brolley@cygnus.com>
451
452 * sim/fr30/ldres.cgs: New testcase.
453 * sim/fr30/copld.cgs: New testcase.
454 * sim/fr30/copst.cgs: New testcase.
455 * sim/fr30/copsv.cgs: New testcase.
456 * sim/fr30/nop.cgs: New testcase.
457 * sim/fr30/andccr.cgs: New testcase.
458 * sim/fr30/orccr.cgs: New testcase.
459 * sim/fr30/addsp.cgs: New testcase.
460 * sim/fr30/stilm.cgs: New testcase.
461 * sim/fr30/extsb.cgs: New testcase.
462 * sim/fr30/extub.cgs: New testcase.
463 * sim/fr30/extsh.cgs: New testcase.
464 * sim/fr30/extuh.cgs: New testcase.
465 * sim/fr30/enter.cgs: New testcase.
466 * sim/fr30/leave.cgs: New testcase.
467 * sim/fr30/xchb.cgs: New testcase.
468 * sim/fr30/dmovb.cgs: New testcase.
469 * sim/fr30/dmov.cgs: New testcase.
470 * sim/fr30/dmovh.cgs: New testcase.
471
472Thu Dec 17 17:18:43 1998 Dave Brolley <brolley@cygnus.com>
473
474 * sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros.
475 * sim/fr30/ret.cgs: Add tests fir ret:d.
476 * sim/fr30/inte.cgs: New testcase.
477 * sim/fr30/reti.cgs: New testcase.
478 * sim/fr30/bra.cgs: New testcase.
479 * sim/fr30/bno.cgs: New testcase.
480 * sim/fr30/beq.cgs: New testcase.
481 * sim/fr30/bne.cgs: New testcase.
482 * sim/fr30/bc.cgs: New testcase.
483 * sim/fr30/bnc.cgs: New testcase.
484 * sim/fr30/bn.cgs: New testcase.
485 * sim/fr30/bp.cgs: New testcase.
486 * sim/fr30/bv.cgs: New testcase.
487 * sim/fr30/bnv.cgs: New testcase.
488 * sim/fr30/blt.cgs: New testcase.
489 * sim/fr30/bge.cgs: New testcase.
490 * sim/fr30/ble.cgs: New testcase.
491 * sim/fr30/bgt.cgs: New testcase.
492 * sim/fr30/bls.cgs: New testcase.
493 * sim/fr30/bhi.cgs: New testcase.
494
495Tue Dec 15 17:47:13 1998 Dave Brolley <brolley@cygnus.com>
496
497 * sim/fr30/div.cgs (int): Add signed division scenario.
498 * sim/fr30/int.cgs (int): Complete testcase.
499 * sim/fr30/testutils.inc (_start): Initialize tbr.
500 (test_s_user,test_s_system,set_i,test_i): New macros.
501
5021998-12-14 Doug Evans <devans@casey.cygnus.com>
503
504 * lib/sim-defs.exp (run_sim_test): New option xerror, for expected
505 errors. Translate \n sequences in expected output to newline char.
506 (slurp_options): Make parentheses optional.
507 (sim_run): Look for board_info sim,options.
508 * sim/fr30/hello.ms: Add trailing \n to expected output.
509 * sim/m32r/hello.ms: Ditto.
510 * sim/m32r/hw-trap.ms: Ditto.
511
512 * sim/m32r/trap.cgs: Properly align trap2_handler.
513
514 * sim/m32r/uread16.ms: New testcase.
515 * sim/m32r/uread32.ms: New testcase.
516 * sim/m32r/uwrite16.ms: New testcase.
517 * sim/m32r/uwrite32.ms: New testcase.
518
5191998-12-14 Dave Brolley <brolley@cygnus.com>
520
521 * sim/fr30/call.cgs: Test ret here as well.
522 * sim/fr30/ld.cgs: Remove bogus comment.
523 * sim/fr30/testutils.inc (save_rp,restore_rp): New macros.
524 * sim/fr30/div.ms: New testcase.
525 * sim/fr30/st.cgs: New testcase.
526 * sim/fr30/sth.cgs: New testcase.
527 * sim/fr30/stb.cgs: New testcase.
528 * sim/fr30/mov.cgs: New testcase.
529 * sim/fr30/jmp.cgs: New testcase.
530 * sim/fr30/ret.cgs: New testcase.
531 * sim/fr30/int.cgs: New testcase.
532
533Thu Dec 10 18:46:25 1998 Dave Brolley <brolley@cygnus.com>
534
535 * sim/fr30/div0s.cgs: New testcase.
536 * sim/fr30/div0u.cgs: New testcase.
537 * sim/fr30/div1.cgs: New testcase.
538 * sim/fr30/div2.cgs: New testcase.
539 * sim/fr30/div3.cgs: New testcase.
540 * sim/fr30/div4s.cgs: New testcase.
541 * sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros.
542
543Tue Dec 8 13:16:53 1998 Dave Brolley <brolley@cygnus.com>
544
545 * sim/fr30/testutils.inc (set_s_user): Correct Mask.
546 (set_s_system): Correct Mask.
547 * sim/fr30/ld.cgs (ld): Move previously failing test back
548 into place.
549 * sim/fr30/ldm0.cgs: New testcase.
550 * sim/fr30/ldm1.cgs: New testcase.
551 * sim/fr30/stm0.cgs: New testcase.
552 * sim/fr30/stm1.cgs: New testcase.
553
554Thu Dec 3 14:20:03 1998 Dave Brolley <brolley@cygnus.com>
555
556 * sim/fr30/ld.cgs: Implement more loads.
557 * sim/fr30/call.cgs: New testcase.
558 * sim/fr30/testutils.inc (testr_h_dr): New macro.
559 (set_s_user,set_s_system): New macros.
560
561 * sim/fr30: New Directory.
562
563Wed Nov 18 10:50:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
564
565 * common/bits-gen.c (main): Add BYTE_ORDER so that it matches
566 recent sim/common/sim-basics.h changes.
567 * common/Makefile.in: Update.
568
569Fri Oct 30 00:37:31 1998 Felix Lee <flee@cygnus.com>
570
571 * lib/sim-defs.exp (sim_run): download target program to remote
572 host, if necessary. for unix-driven win32 testing.
573
574Tue Sep 15 14:56:22 1998 Doug Evans <devans@canuck.cygnus.com>
575
576 * sim/m32r/testutils.inc (test_h_gr): Use mvaddr_h_gr.
577 * sim/m32r/rte.cgs: Test bbpc,bbpsw.
578 * sim/m32r/trap.cgs: Test bbpc,bbpsw.
579
7a292a7a
SS		 580Fri Jul 31 17:49:13 1998 Felix Lee <flee@cygnus.com>
581
582 * lib/sim-defs.exp (sim_run): remote_spawn, use writeto instead of
583 writeonly.
584
c906108c
SS		 585Fri Jul 24 09:40:34 1998 Doug Evans <devans@canuck.cygnus.com>
586
587 * Makefile.in (clean,mostlyclean): Change leading spaces to a tab.
588
589Wed Jul 1 15:57:54 1998 Doug Evans <devans@seba.cygnus.com>
590
591 * sim/m32r/hw-trap.ms: New testcase.
592
7a292a7a
SS		 593Tue Jun 16 15:44:01 1998 Jillian Ye <jillian@cygnus.com>
594
595 * lib/sim-defs.exp: Print out timeout setting info when "-v" is used.
596
597Thu Jun 11 15:24:53 1998 Doug Evans <devans@canuck.cygnus.com>
598
599 * lib/sim-defs.exp (sim_run): Argument env_vals renamed to options,
600 which is now a list of options controlling the behaviour of sim_run.
601
c906108c
SS		 602Wed Jun 10 10:53:20 1998 Doug Evans <devans@seba.cygnus.com>
603
604 * sim/m32r/addx.cgs: Add another test.
605 * sim/m32r/jmp.cgs: Add another test.
606
607Mon Jun 8 16:08:27 1998 Doug Evans <devans@canuck.cygnus.com>
608
609 * sim/m32r/trap.cgs: Test trap 2.
610
611Mon Jun 1 18:54:22 1998 Frank Ch. Eigler <fche@cygnus.com>
612
613 * lib/sim-defs.exp (sim_run): Add possible environment variable
614 list to simulator run.
615
616Thu May 28 14:59:46 1998 Jillian Ye <jillian@cygnus.com>
617
618 * Makefile.in: Take RUNTEST out of FLAG_TO_PASS
619 so that make check can be invoked recursively.
620
621Thu May 14 11:48:35 1998 Doug Evans <devans@canuck.cygnus.com>
622
623 * config/default.exp (CC,SIM): Delete.
624
625 * lib/sim-defs.exp (sim_run): Fix handling of output redirection.
626 New arg prog_opts. All callers updated.
627
628Fri May 8 18:10:28 1998 Jillian Ye <jillian@cygnus.com>
629
630 * Makefile.in: Made "check" the target of two
631 dependencies (test1, test2) so that test2 get a chance to
632 run even when test1 failed if "make -k check" is used.
633
634Fri May 8 14:41:28 1998 Doug Evans <devans@canuck.cygnus.com>
635
636 * lib/sim-defs.exp (sim_version): Simplify.
637 (sim_run): Implement.
638 (run_sim_test): Use sim_run.
639 (sim_compile): New proc.
640
641Mon May 4 17:59:11 1998 Frank Ch. Eigler <fche@cygnus.com>
642
643 * config/default.exp: Added C compiler settings.
644
645Wed Apr 22 12:26:28 1998 Doug Evans <devans@canuck.cygnus.com>
646
647 * Makefile.in (TARGET_FLAGS_TO_PASS): Delete LIBS, LDFLAGS.
648
649Tue Apr 21 10:49:03 1998 Doug Evans <devans@canuck.cygnus.com>
650
651 * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails,
652 try all machs.
653
654 * sim/m32r/addx.cgs: Test (-1)+(-1)+1.
655
656Fri Apr 17 16:00:52 1998 Doug Evans <devans@canuck.cygnus.com>
657
658 * sim/m32r/mv[ft]achi.cgs: Fix expected result
659 (sign extension of top 8 bits).
660
661Wed Feb 25 11:01:17 1998 Doug Evans <devans@canuck.cygnus.com>
662
663 * Makefile.in (RUNTEST): Fix path to runtest.
664
c906108c
SS		 665Fri Feb 20 11:00:02 1998 Nick Clifton <nickc@cygnus.com>
666
667 * sim/m32r/unlock.cgs: Fixed test.
668 * sim/m32r/mvfc.cgs: Fixed test.
669 * sim/m32r/remu.cgs: Fixed test.
c906108c
SS		 670 * sim/m32r/bnc24.cgs: Test long BNC instruction.
671 * sim/m32r/bnc8.cgs: Test short BNC instruction.
672 * sim/m32r/ld-plus.cgs: Test LD instruction.
673 * sim/m32r/macwhi.cgs: Test MACWHI instruction.
674 * sim/m32r/macwlo.cgs: Test MACWLO instruction.
675 * sim/m32r/mulwhi.cgs: Test MULWHI instruction.
676 * sim/m32r/mulwlo.cgs: Test MULWLO instruction.
677 * sim/m32r/mvfachi.cgs: Test MVFACHI instruction.
678 * sim/m32r/mvfaclo.cgs: Test MVFACLO instruction.
679 * sim/m32r/mvtaclo.cgs: Test MVTACLO instruction.
680 * sim/m32r/addv.cgs: Test ADDV instruction.
681 * sim/m32r/addv3.cgs: Test ADDV3 instruction.
682 * sim/m32r/addx.cgs: Test ADDX instruction.
683 * sim/m32r/lock.cgs: Test LOCK instruction.
684 * sim/m32r/neg.cgs: Test NEG instruction.
685 * sim/m32r/not.cgs: Test NOT instruction.
686 * sim/m32r/unlock.cgs: Test UNLOCK instruction.
58fddbac 687
c906108c
SS		 688Thu Feb 19 11:15:45 1998 Nick Clifton <nickc@cygnus.com>
689
690 * sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an
691 address into a general register.
692
693 * sim/m32r/or3.cgs: Test OR3 instruction.
694 * sim/m32r/rach.cgs: Test RACH instruction.
695 * sim/m32r/rem.cgs: Test REM instruction.
696 * sim/m32r/sub.cgs: Test SUB instruction.
697 * sim/m32r/mv.cgs: Test MV instruction.
698 * sim/m32r/mul.cgs: Test MUL instruction.
699 * sim/m32r/bl24.cgs: Test long BL instruction.
700 * sim/m32r/bl8.cgs: Test short BL instruction.
701 * sim/m32r/blez.cgs: Test BLEZ instruction.
702 * sim/m32r/bltz.cgs: Test BLTZ instruction.
703 * sim/m32r/bne.cgs: Test BNE instruction.
704 * sim/m32r/bnez.cgs: Test BNEZ instruction.
705 * sim/m32r/bra24.cgs: Test long BRA instruction.
706 * sim/m32r/bra8.cgs: Test short BRA instruction.
707 * sim/m32r/jl.cgs: Test JL instruction.
708 * sim/m32r/or.cgs: Test OR instruction.
709 * sim/m32r/jmp.cgs: Test JMP instruction.
710 * sim/m32r/and.cgs: Test AND instruction.
711 * sim/m32r/and3.cgs: Test AND3 instruction.
712 * sim/m32r/beq.cgs: Test BEQ instruction.
713 * sim/m32r/beqz.cgs: Test BEQZ instruction.
714 * sim/m32r/bgez.cgs: Test BGEZ instruction.
715 * sim/m32r/bgtz.cgs: Test BGTZ instruction.
716 * sim/m32r/cmp.cgs: Test CMP instruction.
717 * sim/m32r/cmpi.cgs: Test CMPI instruction.
718 * sim/m32r/cmpu.cgs: Test CMPU instruction.
719 * sim/m32r/cmpui.cgs: Test CMPUI instruction.
720 * sim/m32r/div.cgs: Test DIV instruction.
721 * sim/m32r/divu.cgs: Test DIVU instruction.
722 * sim/m32r/cmpeq.cgs: Test CMPEQ instruction.
723 * sim/m32r/sll.cgs: Test SLL instruction.
724 * sim/m32r/sll3.cgs: Test SLL3 instruction.
725 * sim/m32r/slli.cgs: Test SLLI instruction.
726 * sim/m32r/sra.cgs: Test SRA instruction.
727 * sim/m32r/sra3.cgs: Test SRA3 instruction.
728 * sim/m32r/srai.cgs: Test SRAI instruction.
729 * sim/m32r/srl.cgs: Test SRL instruction.
730 * sim/m32r/srl3.cgs: Test SRL3 instruction.
731 * sim/m32r/srli.cgs: Test SRLI instruction.
732 * sim/m32r/xor3.cgs: Test XOR3 instruction.
733 * sim/m32r/xor.cgs: Test XOR instruction.
58fddbac 734
c906108c
SS		 735Tue Feb 17 12:46:05 1998 Doug Evans <devans@seba.cygnus.com>
736
737 * config/default.exp: New file.
738 * lib/sim-defs.exp: New file.
739 * sim/m32r/*: m32r dejagnu simulator testsuite.
740
741 * Makefile.in (build_alias): Define.
742 (arch): Define.
743 (RUNTEST_FOR_TARGET): Delete.
744 (RUNTEST): Fix.
745 (check): Depend on site.exp. Run dejagnu.
746 (site.exp): New target.
747 * configure.in (arch): Define from target_cpu.
748 * configure: Regenerate.
749
750Wed Sep 17 10:21:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
751
752 * common/bits-gen.c (gen_bit): Pass in the full name of the macro.
753 (gen_mask): Ditto.
754
755 * common/bits-tst.c (main): Add tests for LSSEXT, MSSEXT.
756 (calc): Add support for 8 bit version of macros.
757 (main): Add tests for 8 bit versions of macros.
758 (check_sext): Check SEXT of zero clears bits.
759
760 * common/bits-gen.c (main): Generate tests for 8 bit versions of
761 macros.
762
763Thu Sep 11 13:04:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
764
765 * common/Make-common.in: New file, provide generic rules for
766 running checks.
767
768Mon Sep 1 16:43:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
769
770 * configure.in (configdirs): Test for the target directory instead
771 of matching on a target.
772
A mirror of the official binutils-gdb repository