projects / thirdparty / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 4a306116 | 1 | # frv testcase for cmcpxru $GRi,$GRj,$GRk,$CCi,$cond |
| 086419a8 | 2 | # mach: frv fr500 fr400 |
| 4a306116 DB |
3 | |
| 4 | .include "testutils.inc" | |
| 5 | ||
| 6 | start | |
| 7 | ||
| 8 | .global cmcpxru | |
| 9 | cmcpxru: | |
| 10 | set_spr_immed 0x1b1b,cccr | |
| 11 | ||
| 12 | set_fr_iimmed 4,2,fr7 ; multiply small numbers | |
| 13 | set_fr_iimmed 5,3,fr8 | |
| 14 | cmcpxru fr7,fr8,acc0,cc0,1 | |
| 15 | test_accg_immed 0,accg0 | |
| 16 | test_acc_immed 14,acc0 | |
| 17 | ||
| 18 | set_fr_iimmed 1,2,fr7 ; multiply by 1 | |
| 19 | set_fr_iimmed 3,1,fr8 | |
| 20 | cmcpxru fr7,fr8,acc0,cc0,1 | |
| 21 | test_accg_immed 0,accg0 | |
| 22 | test_acc_immed 1,acc0 | |
| 23 | ||
| 24 | set_fr_iimmed 0,2,fr7 ; multiply by 0 | |
| 25 | set_fr_iimmed 2,0,fr8 | |
| 26 | cmcpxru fr7,fr8,acc0,cc0,1 | |
| 27 | test_accg_immed 0,accg0 | |
| 28 | test_acc_immed 0,acc0 | |
| 29 | ||
| 30 | set_fr_iimmed 0x3fff,1,fr7 ; 15 bit result | |
| 31 | set_fr_iimmed 2,0x0001,fr8 | |
| 32 | cmcpxru fr7,fr8,acc0,cc0,1 | |
| 33 | test_accg_immed 0,accg0 | |
| 34 | test_acc_limmed 0x0000,0x7ffd,acc0 | |
| 35 | ||
| 36 | set_fr_iimmed 0x4000,1,fr7 ; 16 bit result | |
| 37 | set_fr_iimmed 4,0x0001,fr8 | |
| 38 | cmcpxru fr7,fr8,acc0,cc0,1 | |
| 39 | test_accg_immed 0,accg0 | |
| 40 | test_acc_limmed 0x0000,0xffff,acc0 | |
| 41 | ||
| 42 | set_fr_iimmed 0x8000,1,fr7 ; 17 bit result | |
| 43 | set_fr_iimmed 4,0x0001,fr8 | |
| 44 | cmcpxru fr7,fr8,acc0,cc0,1 | |
| 45 | test_accg_immed 0,accg0 | |
| 46 | test_acc_immed 0x0001ffff,acc0 | |
| 47 | ||
| 48 | set_fr_iimmed 0x7fff,0x0000,fr7 ; max positive result | |
| 49 | set_fr_iimmed 0x7fff,0x7fff,fr8 | |
| 50 | cmcpxru fr7,fr8,acc0,cc4,1 | |
| 51 | test_accg_immed 0,accg0 | |
| 52 | test_acc_immed 0x3fff0001,acc0 | |
| 53 | ||
| 54 | set_fr_iimmed 0x8000,0x8000,fr7 ; max positive result | |
| 55 | set_fr_iimmed 0x8000,0x0000,fr8 | |
| 56 | cmcpxru fr7,fr8,acc0,cc4,1 | |
| 57 | test_accg_immed 0,accg0 | |
| 58 | test_acc_limmed 0x4000,0x0000,acc0 | |
| 59 | ||
| 60 | set_fr_iimmed 0xffff,0x0000,fr7 ; max positive result | |
| 61 | set_fr_iimmed 0xffff,0xffff,fr8 | |
| 62 | cmcpxru fr7,fr8,acc0,cc4,1 | |
| 63 | test_accg_immed 0,accg0 | |
| 64 | test_acc_limmed 0xfffe,0x0001,acc0 | |
| 65 | ||
| 66 | set_fr_iimmed 0x0000,0x0001,fr7 ; saturation | |
| 67 | set_fr_iimmed 0xffff,0x0001,fr8 | |
| 68 | cmcpxru fr7,fr8,acc0,cc4,1 | |
| 69 | test_spr_bits 0x3c,2,0x8,msr0 ; msr0.sie is set | |
| 70 | test_spr_bits 2,1,1,msr0 ; msr0.ovf is set | |
| 71 | test_spr_bits 1,0,1,msr0 ; msr0.aovf is set | |
| 72 | test_spr_bits 0x7000,12,1,msr0 ; msr0.mtt is set | |
| 73 | test_accg_immed 0,accg0 | |
| 74 | test_acc_immed 0,acc0 | |
| 75 | ||
| 76 | set_fr_iimmed 0x0000,0xffff,fr7 ; saturation | |
| 77 | set_fr_iimmed 0xffff,0xffff,fr8 | |
| 78 | cmcpxru fr7,fr8,acc0,cc4,1 | |
| 79 | test_spr_bits 0x3c,2,0x8,msr0 ; msr0.sie is set | |
| 80 | test_spr_bits 2,1,1,msr0 ; msr0.ovf is set | |
| 81 | test_spr_bits 1,0,1,msr0 ; msr0.aovf is set | |
| 82 | test_spr_bits 0x7000,12,1,msr0 ; msr0.mtt is set | |
| 83 | test_accg_immed 0,accg0 | |
| 84 | test_acc_immed 0,acc0 | |
| 85 | ||
| 86 | set_fr_iimmed 0xfffe,0xffff,fr7 ; saturation | |
| 87 | set_fr_iimmed 0xffff,0xffff,fr8 | |
| 88 | cmcpxru fr7,fr8,acc0,cc4,1 | |
| 89 | test_spr_bits 0x3c,2,0x8,msr0 ; msr0.sie is set | |
| 90 | test_spr_bits 2,1,1,msr0 ; msr0.ovf is set | |
| 91 | test_spr_bits 1,0,1,msr0 ; msr0.aovf is set | |
| 92 | test_spr_bits 0x7000,12,1,msr0 ; msr0.mtt is set | |
| 93 | test_accg_immed 0,accg0 | |
| 94 | test_acc_immed 0,acc0 | |
| 95 | ||
| 96 | set_fr_iimmed 4,2,fr7 ; multiply small numbers | |
| 97 | set_fr_iimmed 5,3,fr8 | |
| 98 | cmcpxru fr7,fr8,acc0,cc1,0 | |
| 99 | test_accg_immed 0,accg0 | |
| 100 | test_acc_immed 14,acc0 | |
| 101 | ||
| 102 | set_fr_iimmed 1,2,fr7 ; multiply by 1 | |
| 103 | set_fr_iimmed 3,1,fr8 | |
| 104 | cmcpxru fr7,fr8,acc0,cc1,0 | |
| 105 | test_accg_immed 0,accg0 | |
| 106 | test_acc_immed 1,acc0 | |
| 107 | ||
| 108 | set_fr_iimmed 0,2,fr7 ; multiply by 0 | |
| 109 | set_fr_iimmed 2,0,fr8 | |
| 110 | cmcpxru fr7,fr8,acc0,cc1,0 | |
| 111 | test_accg_immed 0,accg0 | |
| 112 | test_acc_immed 0,acc0 | |
| 113 | ||
| 114 | set_fr_iimmed 0x3fff,1,fr7 ; 15 bit result | |
| 115 | set_fr_iimmed 2,0x0001,fr8 | |
| 116 | cmcpxru fr7,fr8,acc0,cc1,0 | |
| 117 | test_accg_immed 0,accg0 | |
| 118 | test_acc_limmed 0x0000,0x7ffd,acc0 | |
| 119 | ||
| 120 | set_fr_iimmed 0x4000,1,fr7 ; 16 bit result | |
| 121 | set_fr_iimmed 4,0x0001,fr8 | |
| 122 | cmcpxru fr7,fr8,acc0,cc1,0 | |
| 123 | test_accg_immed 0,accg0 | |
| 124 | test_acc_limmed 0x0000,0xffff,acc0 | |
| 125 | ||
| 126 | set_fr_iimmed 0x8000,1,fr7 ; 17 bit result | |
| 127 | set_fr_iimmed 4,0x0001,fr8 | |
| 128 | cmcpxru fr7,fr8,acc0,cc1,0 | |
| 129 | test_accg_immed 0,accg0 | |
| 130 | test_acc_immed 0x0001ffff,acc0 | |
| 131 | ||
| 132 | set_fr_iimmed 0x7fff,0x0000,fr7 ; max positive result | |
| 133 | set_fr_iimmed 0x7fff,0x7fff,fr8 | |
| 134 | cmcpxru fr7,fr8,acc0,cc5,0 | |
| 135 | test_accg_immed 0,accg0 | |
| 136 | test_acc_immed 0x3fff0001,acc0 | |
| 137 | ||
| 138 | set_fr_iimmed 0x8000,0x8000,fr7 ; max positive result | |
| 139 | set_fr_iimmed 0x8000,0x0000,fr8 | |
| 140 | cmcpxru fr7,fr8,acc0,cc5,0 | |
| 141 | test_accg_immed 0,accg0 | |
| 142 | test_acc_limmed 0x4000,0x0000,acc0 | |
| 143 | ||
| 144 | set_fr_iimmed 0xffff,0x0000,fr7 ; max positive result | |
| 145 | set_fr_iimmed 0xffff,0xffff,fr8 | |
| 146 | cmcpxru fr7,fr8,acc0,cc5,0 | |
| 147 | test_accg_immed 0,accg0 | |
| 148 | test_acc_limmed 0xfffe,0x0001,acc0 | |
| 149 | ||
| 150 | set_fr_iimmed 0x0000,0x0001,fr7 ; saturation | |
| 151 | set_fr_iimmed 0xffff,0x0001,fr8 | |
| 152 | cmcpxru fr7,fr8,acc0,cc5,0 | |
| 153 | test_spr_bits 0x3c,2,0x8,msr0 ; msr0.sie is set | |
| 154 | test_spr_bits 2,1,1,msr0 ; msr0.ovf is set | |
| 155 | test_spr_bits 1,0,1,msr0 ; msr0.aovf is set | |
| 156 | test_spr_bits 0x7000,12,1,msr0 ; msr0.mtt is set | |
| 157 | test_accg_immed 0,accg0 | |
| 158 | test_acc_immed 0,acc0 | |
| 159 | ||
| 160 | set_fr_iimmed 0x0000,0xffff,fr7 ; saturation | |
| 161 | set_fr_iimmed 0xffff,0xffff,fr8 | |
| 162 | cmcpxru fr7,fr8,acc0,cc5,0 | |
| 163 | test_spr_bits 0x3c,2,0x8,msr0 ; msr0.sie is set | |
| 164 | test_spr_bits 2,1,1,msr0 ; msr0.ovf is set | |
| 165 | test_spr_bits 1,0,1,msr0 ; msr0.aovf is set | |
| 166 | test_spr_bits 0x7000,12,1,msr0 ; msr0.mtt is set | |
| 167 | test_accg_immed 0,accg0 | |
| 168 | test_acc_immed 0,acc0 | |
| 169 | ||
| 170 | set_fr_iimmed 0xfffe,0xffff,fr7 ; saturation | |
| 171 | set_fr_iimmed 0xffff,0xffff,fr8 | |
| 172 | cmcpxru fr7,fr8,acc0,cc5,0 | |
| 173 | test_spr_bits 0x3c,2,0x8,msr0 ; msr0.sie is set | |
| 174 | test_spr_bits 2,1,1,msr0 ; msr0.ovf is set | |
| 175 | test_spr_bits 1,0,1,msr0 ; msr0.aovf is set | |
| 176 | test_spr_bits 0x7000,12,1,msr0 ; msr0.mtt is set | |
| 177 | test_accg_immed 0,accg0 | |
| 178 | test_acc_immed 0,acc0 | |
| 179 | ||
| 180 | set_spr_immed 0,msr0 | |
| 181 | set_spr_immed 0,msr1 | |
| 182 | set_accg_immed 0x00000011,accg0 | |
| 183 | set_acc_immed 0x11111111,acc0 | |
| 184 | set_fr_iimmed 4,2,fr7 ; multiply small numbers | |
| 185 | set_fr_iimmed 5,3,fr8 | |
| 186 | cmcpxru fr7,fr8,acc0,cc0,0 | |
| 187 | test_accg_immed 0x00000011,accg0 | |
| 188 | test_acc_immed 0x11111111,acc0 | |
| 189 | ||
| 190 | set_fr_iimmed 1,2,fr7 ; multiply by 1 | |
| 191 | set_fr_iimmed 3,1,fr8 | |
| 192 | cmcpxru fr7,fr8,acc0,cc0,0 | |
| 193 | test_accg_immed 0x00000011,accg0 | |
| 194 | test_acc_immed 0x11111111,acc0 | |
| 195 | ||
| 196 | set_fr_iimmed 0,2,fr7 ; multiply by 0 | |
| 197 | set_fr_iimmed 2,0,fr8 | |
| 198 | cmcpxru fr7,fr8,acc0,cc0,0 | |
| 199 | test_accg_immed 0x00000011,accg0 | |
| 200 | test_acc_immed 0x11111111,acc0 | |
| 201 | ||
| 202 | set_fr_iimmed 0x3fff,1,fr7 ; 15 bit result | |
| 203 | set_fr_iimmed 2,0x0001,fr8 | |
| 204 | cmcpxru fr7,fr8,acc0,cc0,0 | |
| 205 | test_accg_immed 0x00000011,accg0 | |
| 206 | test_acc_immed 0x11111111,acc0 | |
| 207 | ||
| 208 | set_fr_iimmed 0x4000,1,fr7 ; 16 bit result | |
| 209 | set_fr_iimmed 4,0x0001,fr8 | |
| 210 | cmcpxru fr7,fr8,acc0,cc0,0 | |
| 211 | test_accg_immed 0x00000011,accg0 | |
| 212 | test_acc_immed 0x11111111,acc0 | |
| 213 | ||
| 214 | set_fr_iimmed 0x8000,1,fr7 ; 17 bit result | |
| 215 | set_fr_iimmed 4,0x0001,fr8 | |
| 216 | cmcpxru fr7,fr8,acc0,cc0,0 | |
| 217 | test_accg_immed 0x00000011,accg0 | |
| 218 | test_acc_immed 0x11111111,acc0 | |
| 219 | ||
| 220 | set_fr_iimmed 0x7fff,0x0000,fr7 ; max positive result | |
| 221 | set_fr_iimmed 0x7fff,0x7fff,fr8 | |
| 222 | cmcpxru fr7,fr8,acc0,cc4,0 | |
| 223 | test_accg_immed 0x00000011,accg0 | |
| 224 | test_acc_immed 0x11111111,acc0 | |
| 225 | ||
| 226 | set_fr_iimmed 0x8000,0x8000,fr7 ; max positive result | |
| 227 | set_fr_iimmed 0x8000,0x0000,fr8 | |
| 228 | cmcpxru fr7,fr8,acc0,cc4,0 | |
| 229 | test_accg_immed 0x00000011,accg0 | |
| 230 | test_acc_immed 0x11111111,acc0 | |
| 231 | ||
| 232 | set_fr_iimmed 0xffff,0x0000,fr7 ; max positive result | |
| 233 | set_fr_iimmed 0xffff,0xffff,fr8 | |
| 234 | cmcpxru fr7,fr8,acc0,cc4,0 | |
| 235 | test_accg_immed 0x00000011,accg0 | |
| 236 | test_acc_immed 0x11111111,acc0 | |
| 237 | ||
| 238 | set_fr_iimmed 0x0000,0x0001,fr7 ; saturation | |
| 239 | set_fr_iimmed 0xffff,0x0001,fr8 | |
| 240 | cmcpxru fr7,fr8,acc0,cc4,0 | |
| 241 | test_spr_bits 0x3c,2,0x0,msr0 ; msr0.sie is clear | |
| 242 | test_spr_bits 2,1,0,msr0 ; msr0.ovf is clear | |
| 243 | test_spr_bits 2,1,0,msr1 ; msr1.ovf is clear | |
| 244 | test_spr_bits 1,0,0,msr0 ; msr0.aovf is clear | |
| 245 | test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt is clear | |
| 246 | test_accg_immed 0x00000011,accg0 | |
| 247 | test_acc_immed 0x11111111,acc0 | |
| 248 | ||
| 249 | set_fr_iimmed 0x0000,0xffff,fr7 ; saturation | |
| 250 | set_fr_iimmed 0xffff,0xffff,fr8 | |
| 251 | cmcpxru fr7,fr8,acc0,cc4,0 | |
| 252 | test_spr_bits 0x3c,2,0x0,msr0 ; msr0.sie is clear | |
| 253 | test_spr_bits 2,1,0,msr0 ; msr0.ovf is clear | |
| 254 | test_spr_bits 2,1,0,msr1 ; msr1.ovf is clear | |
| 255 | test_spr_bits 1,0,0,msr0 ; msr0.aovf is clear | |
| 256 | test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt is clear | |
| 257 | test_accg_immed 0x00000011,accg0 | |
| 258 | test_acc_immed 0x11111111,acc0 | |
| 259 | ||
| 260 | set_fr_iimmed 0xfffe,0xffff,fr7 ; saturation | |
| 261 | set_fr_iimmed 0xffff,0xffff,fr8 | |
| 262 | cmcpxru fr7,fr8,acc0,cc4,0 | |
| 263 | test_spr_bits 0x3c,2,0x0,msr0 ; msr0.sie is clear | |
| 264 | test_spr_bits 2,1,0,msr0 ; msr0.ovf is clear | |
| 265 | test_spr_bits 2,1,0,msr1 ; msr1.ovf is clear | |
| 266 | test_spr_bits 1,0,0,msr0 ; msr0.aovf is clear | |
| 267 | test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt is clear | |
| 268 | test_accg_immed 0x00000011,accg0 | |
| 269 | test_acc_immed 0x11111111,acc0 | |
| 270 | ||
| 271 | set_spr_immed 0,msr0 | |
| 272 | set_spr_immed 0,msr1 | |
| 273 | set_accg_immed 0x00000011,accg0 | |
| 274 | set_acc_immed 0x11111111,acc0 | |
| 275 | set_fr_iimmed 4,2,fr7 ; multiply small numbers | |
| 276 | set_fr_iimmed 5,3,fr8 | |
| 277 | cmcpxru fr7,fr8,acc0,cc1,1 | |
| 278 | test_accg_immed 0x00000011,accg0 | |
| 279 | test_acc_immed 0x11111111,acc0 | |
| 280 | ||
| 281 | set_fr_iimmed 1,2,fr7 ; multiply by 1 | |
| 282 | set_fr_iimmed 3,1,fr8 | |
| 283 | cmcpxru fr7,fr8,acc0,cc1,1 | |
| 284 | test_accg_immed 0x00000011,accg0 | |
| 285 | test_acc_immed 0x11111111,acc0 | |
| 286 | ||
| 287 | set_fr_iimmed 0,2,fr7 ; multiply by 0 | |
| 288 | set_fr_iimmed 2,0,fr8 | |
| 289 | cmcpxru fr7,fr8,acc0,cc1,1 | |
| 290 | test_accg_immed 0x00000011,accg0 | |
| 291 | test_acc_immed 0x11111111,acc0 | |
| 292 | ||
| 293 | set_fr_iimmed 0x3fff,1,fr7 ; 15 bit result | |
| 294 | set_fr_iimmed 2,0x0001,fr8 | |
| 295 | cmcpxru fr7,fr8,acc0,cc1,1 | |
| 296 | test_accg_immed 0x00000011,accg0 | |
| 297 | test_acc_immed 0x11111111,acc0 | |
| 298 | ||
| 299 | set_fr_iimmed 0x4000,1,fr7 ; 16 bit result | |
| 300 | set_fr_iimmed 4,0x0001,fr8 | |
| 301 | cmcpxru fr7,fr8,acc0,cc1,1 | |
| 302 | test_accg_immed 0x00000011,accg0 | |
| 303 | test_acc_immed 0x11111111,acc0 | |
| 304 | ||
| 305 | set_fr_iimmed 0x8000,1,fr7 ; 17 bit result | |
| 306 | set_fr_iimmed 4,0x0001,fr8 | |
| 307 | cmcpxru fr7,fr8,acc0,cc1,1 | |
| 308 | test_accg_immed 0x00000011,accg0 | |
| 309 | test_acc_immed 0x11111111,acc0 | |
| 310 | ||
| 311 | set_fr_iimmed 0x7fff,0x0000,fr7 ; max positive result | |
| 312 | set_fr_iimmed 0x7fff,0x7fff,fr8 | |
| 313 | cmcpxru fr7,fr8,acc0,cc5,1 | |
| 314 | test_accg_immed 0x00000011,accg0 | |
| 315 | test_acc_immed 0x11111111,acc0 | |
| 316 | ||
| 317 | set_fr_iimmed 0x8000,0x8000,fr7 ; max positive result | |
| 318 | set_fr_iimmed 0x8000,0x0000,fr8 | |
| 319 | cmcpxru fr7,fr8,acc0,cc5,1 | |
| 320 | test_accg_immed 0x00000011,accg0 | |
| 321 | test_acc_immed 0x11111111,acc0 | |
| 322 | ||
| 323 | set_fr_iimmed 0xffff,0x0000,fr7 ; max positive result | |
| 324 | set_fr_iimmed 0xffff,0xffff,fr8 | |
| 325 | cmcpxru fr7,fr8,acc0,cc5,1 | |
| 326 | test_accg_immed 0x00000011,accg0 | |
| 327 | test_acc_immed 0x11111111,acc0 | |
| 328 | ||
| 329 | set_fr_iimmed 0x0000,0x0001,fr7 ; saturation | |
| 330 | set_fr_iimmed 0xffff,0x0001,fr8 | |
| 331 | cmcpxru fr7,fr8,acc0,cc5,1 | |
| 332 | test_spr_bits 0x3c,2,0x0,msr0 ; msr0.sie is clear | |
| 333 | test_spr_bits 2,1,0,msr0 ; msr0.ovf is clear | |
| 334 | test_spr_bits 2,1,0,msr1 ; msr1.ovf is clear | |
| 335 | test_spr_bits 1,0,0,msr0 ; msr0.aovf is clear | |
| 336 | test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt is clear | |
| 337 | test_accg_immed 0x00000011,accg0 | |
| 338 | test_acc_immed 0x11111111,acc0 | |
| 339 | ||
| 340 | set_fr_iimmed 0x0000,0xffff,fr7 ; saturation | |
| 341 | set_fr_iimmed 0xffff,0xffff,fr8 | |
| 342 | cmcpxru fr7,fr8,acc0,cc5,1 | |
| 343 | test_spr_bits 0x3c,2,0x0,msr0 ; msr0.sie is clear | |
| 344 | test_spr_bits 2,1,0,msr0 ; msr0.ovf is clear | |
| 345 | test_spr_bits 2,1,0,msr1 ; msr1.ovf is clear | |
| 346 | test_spr_bits 1,0,0,msr0 ; msr0.aovf is clear | |
| 347 | test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt is clear | |
| 348 | test_accg_immed 0x00000011,accg0 | |
| 349 | test_acc_immed 0x11111111,acc0 | |
| 350 | ||
| 351 | set_fr_iimmed 0xfffe,0xffff,fr7 ; saturation | |
| 352 | set_fr_iimmed 0xffff,0xffff,fr8 | |
| 353 | cmcpxru fr7,fr8,acc0,cc5,1 | |
| 354 | test_spr_bits 0x3c,2,0x0,msr0 ; msr0.sie is clear | |
| 355 | test_spr_bits 2,1,0,msr0 ; msr0.ovf is clear | |
| 356 | test_spr_bits 2,1,0,msr1 ; msr1.ovf is clear | |
| 357 | test_spr_bits 1,0,0,msr0 ; msr0.aovf is clear | |
| 358 | test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt is clear | |
| 359 | test_accg_immed 0x00000011,accg0 | |
| 360 | test_acc_immed 0x11111111,acc0 | |
| 361 | ||
| 362 | set_spr_immed 0,msr0 | |
| 363 | set_spr_immed 0,msr1 | |
| 364 | set_accg_immed 0x00000011,accg0 | |
| 365 | set_acc_immed 0x11111111,acc0 | |
| 366 | set_fr_iimmed 4,2,fr7 ; multiply small numbers | |
| 367 | set_fr_iimmed 5,3,fr8 | |
| 368 | cmcpxru fr7,fr8,acc0,cc2,1 | |
| 369 | test_accg_immed 0x00000011,accg0 | |
| 370 | test_acc_immed 0x11111111,acc0 | |
| 371 | ||
| 372 | set_fr_iimmed 1,2,fr7 ; multiply by 1 | |
| 373 | set_fr_iimmed 3,1,fr8 | |
| 374 | cmcpxru fr7,fr8,acc0,cc2,1 | |
| 375 | test_accg_immed 0x00000011,accg0 | |
| 376 | test_acc_immed 0x11111111,acc0 | |
| 377 | ||
| 378 | set_fr_iimmed 0,2,fr7 ; multiply by 0 | |
| 379 | set_fr_iimmed 2,0,fr8 | |
| 380 | cmcpxru fr7,fr8,acc0,cc2,1 | |
| 381 | test_accg_immed 0x00000011,accg0 | |
| 382 | test_acc_immed 0x11111111,acc0 | |
| 383 | ||
| 384 | set_fr_iimmed 0x3fff,1,fr7 ; 15 bit result | |
| 385 | set_fr_iimmed 2,0x0001,fr8 | |
| 386 | cmcpxru fr7,fr8,acc0,cc2,1 | |
| 387 | test_accg_immed 0x00000011,accg0 | |
| 388 | test_acc_immed 0x11111111,acc0 | |
| 389 | ||
| 390 | set_fr_iimmed 0x4000,1,fr7 ; 16 bit result | |
| 391 | set_fr_iimmed 4,0x0001,fr8 | |
| 392 | cmcpxru fr7,fr8,acc0,cc2,1 | |
| 393 | test_accg_immed 0x00000011,accg0 | |
| 394 | test_acc_immed 0x11111111,acc0 | |
| 395 | ||
| 396 | set_fr_iimmed 0x8000,1,fr7 ; 17 bit result | |
| 397 | set_fr_iimmed 4,0x0001,fr8 | |
| 398 | cmcpxru fr7,fr8,acc0,cc2,1 | |
| 399 | test_accg_immed 0x00000011,accg0 | |
| 400 | test_acc_immed 0x11111111,acc0 | |
| 401 | ||
| 402 | set_fr_iimmed 0x7fff,0x0000,fr7 ; max positive result | |
| 403 | set_fr_iimmed 0x7fff,0x7fff,fr8 | |
| 404 | cmcpxru fr7,fr8,acc0,cc6,1 | |
| 405 | test_accg_immed 0x00000011,accg0 | |
| 406 | test_acc_immed 0x11111111,acc0 | |
| 407 | ||
| 408 | set_fr_iimmed 0x8000,0x8000,fr7 ; max positive result | |
| 409 | set_fr_iimmed 0x8000,0x0000,fr8 | |
| 410 | cmcpxru fr7,fr8,acc0,cc6,1 | |
| 411 | test_accg_immed 0x00000011,accg0 | |
| 412 | test_acc_immed 0x11111111,acc0 | |
| 413 | ||
| 414 | set_fr_iimmed 0xffff,0x0000,fr7 ; max positive result | |
| 415 | set_fr_iimmed 0xffff,0xffff,fr8 | |
| 416 | cmcpxru fr7,fr8,acc0,cc6,1 | |
| 417 | test_accg_immed 0x00000011,accg0 | |
| 418 | test_acc_immed 0x11111111,acc0 | |
| 419 | ||
| 420 | set_fr_iimmed 0x0000,0x0001,fr7 ; saturation | |
| 421 | set_fr_iimmed 0xffff,0x0001,fr8 | |
| 422 | cmcpxru fr7,fr8,acc0,cc6,1 | |
| 423 | test_spr_bits 0x3c,2,0x0,msr0 ; msr0.sie is clear | |
| 424 | test_spr_bits 2,1,0,msr0 ; msr0.ovf is clear | |
| 425 | test_spr_bits 2,1,0,msr1 ; msr1.ovf is clear | |
| 426 | test_spr_bits 1,0,0,msr0 ; msr0.aovf is clear | |
| 427 | test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt is clear | |
| 428 | test_accg_immed 0x00000011,accg0 | |
| 429 | test_acc_immed 0x11111111,acc0 | |
| 430 | ||
| 431 | set_fr_iimmed 0x0000,0xffff,fr7 ; saturation | |
| 432 | set_fr_iimmed 0xffff,0xffff,fr8 | |
| 433 | cmcpxru fr7,fr8,acc0,cc6,1 | |
| 434 | test_spr_bits 0x3c,2,0x0,msr0 ; msr0.sie is clear | |
| 435 | test_spr_bits 2,1,0,msr0 ; msr0.ovf is clear | |
| 436 | test_spr_bits 2,1,0,msr1 ; msr1.ovf is clear | |
| 437 | test_spr_bits 1,0,0,msr0 ; msr0.aovf is clear | |
| 438 | test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt is clear | |
| 439 | test_accg_immed 0x00000011,accg0 | |
| 440 | test_acc_immed 0x11111111,acc0 | |
| 441 | ||
| 442 | set_fr_iimmed 0xfffe,0xffff,fr7 ; saturation | |
| 443 | set_fr_iimmed 0xffff,0xffff,fr8 | |
| 444 | cmcpxru fr7,fr8,acc0,cc6,1 | |
| 445 | test_spr_bits 0x3c,2,0x0,msr0 ; msr0.sie is clear | |
| 446 | test_spr_bits 2,1,0,msr0 ; msr0.ovf is clear | |
| 447 | test_spr_bits 2,1,0,msr1 ; msr1.ovf is clear | |
| 448 | test_spr_bits 1,0,0,msr0 ; msr0.aovf is clear | |
| 449 | test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt is clear | |
| 450 | test_accg_immed 0x00000011,accg0 | |
| 451 | test_acc_immed 0x11111111,acc0 | |
| 452 | ; | |
| 453 | set_spr_immed 0,msr0 | |
| 454 | set_spr_immed 0,msr1 | |
| 455 | set_accg_immed 0x00000011,accg0 | |
| 456 | set_acc_immed 0x11111111,acc0 | |
| 457 | set_fr_iimmed 4,2,fr7 ; multiply small numbers | |
| 458 | set_fr_iimmed 5,3,fr8 | |
| 459 | cmcpxru fr7,fr8,acc0,cc3,1 | |
| 460 | test_accg_immed 0x00000011,accg0 | |
| 461 | test_acc_immed 0x11111111,acc0 | |
| 462 | ||
| 463 | set_fr_iimmed 1,2,fr7 ; multiply by 1 | |
| 464 | set_fr_iimmed 3,1,fr8 | |
| 465 | cmcpxru fr7,fr8,acc0,cc3,1 | |
| 466 | test_accg_immed 0x00000011,accg0 | |
| 467 | test_acc_immed 0x11111111,acc0 | |
| 468 | ||
| 469 | set_fr_iimmed 0,2,fr7 ; multiply by 0 | |
| 470 | set_fr_iimmed 2,0,fr8 | |
| 471 | cmcpxru fr7,fr8,acc0,cc3,1 | |
| 472 | test_accg_immed 0x00000011,accg0 | |
| 473 | test_acc_immed 0x11111111,acc0 | |
| 474 | ||
| 475 | set_fr_iimmed 0x3fff,1,fr7 ; 15 bit result | |
| 476 | set_fr_iimmed 2,0x0001,fr8 | |
| 477 | cmcpxru fr7,fr8,acc0,cc3,1 | |
| 478 | test_accg_immed 0x00000011,accg0 | |
| 479 | test_acc_immed 0x11111111,acc0 | |
| 480 | ||
| 481 | set_fr_iimmed 0x4000,1,fr7 ; 16 bit result | |
| 482 | set_fr_iimmed 4,0x0001,fr8 | |
| 483 | cmcpxru fr7,fr8,acc0,cc3,1 | |
| 484 | test_accg_immed 0x00000011,accg0 | |
| 485 | test_acc_immed 0x11111111,acc0 | |
| 486 | ||
| 487 | set_fr_iimmed 0x8000,1,fr7 ; 17 bit result | |
| 488 | set_fr_iimmed 4,0x0001,fr8 | |
| 489 | cmcpxru fr7,fr8,acc0,cc3,1 | |
| 490 | test_accg_immed 0x00000011,accg0 | |
| 491 | test_acc_immed 0x11111111,acc0 | |
| 492 | ||
| 493 | set_fr_iimmed 0x7fff,0x0000,fr7 ; max positive result | |
| 494 | set_fr_iimmed 0x7fff,0x7fff,fr8 | |
| 495 | cmcpxru fr7,fr8,acc0,cc7,1 | |
| 496 | test_accg_immed 0x00000011,accg0 | |
| 497 | test_acc_immed 0x11111111,acc0 | |
| 498 | ||
| 499 | set_fr_iimmed 0x8000,0x8000,fr7 ; max positive result | |
| 500 | set_fr_iimmed 0x8000,0x0000,fr8 | |
| 501 | cmcpxru fr7,fr8,acc0,cc7,1 | |
| 502 | test_accg_immed 0x00000011,accg0 | |
| 503 | test_acc_immed 0x11111111,acc0 | |
| 504 | ||
| 505 | set_fr_iimmed 0xffff,0x0000,fr7 ; max positive result | |
| 506 | set_fr_iimmed 0xffff,0xffff,fr8 | |
| 507 | cmcpxru fr7,fr8,acc0,cc7,1 | |
| 508 | test_accg_immed 0x00000011,accg0 | |
| 509 | test_acc_immed 0x11111111,acc0 | |
| 510 | ||
| 511 | set_fr_iimmed 0x0000,0x0001,fr7 ; saturation | |
| 512 | set_fr_iimmed 0xffff,0x0001,fr8 | |
| 513 | cmcpxru fr7,fr8,acc0,cc7,1 | |
| 514 | test_spr_bits 0x3c,2,0x0,msr0 ; msr0.sie is clear | |
| 515 | test_spr_bits 2,1,0,msr0 ; msr0.ovf is clear | |
| 516 | test_spr_bits 2,1,0,msr1 ; msr1.ovf is clear | |
| 517 | test_spr_bits 1,0,0,msr0 ; msr0.aovf is clear | |
| 518 | test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt is clear | |
| 519 | test_accg_immed 0x00000011,accg0 | |
| 520 | test_acc_immed 0x11111111,acc0 | |
| 521 | ||
| 522 | set_fr_iimmed 0x0000,0xffff,fr7 ; saturation | |
| 523 | set_fr_iimmed 0xffff,0xffff,fr8 | |
| 524 | cmcpxru fr7,fr8,acc0,cc7,1 | |
| 525 | test_spr_bits 0x3c,2,0x0,msr0 ; msr0.sie is clear | |
| 526 | test_spr_bits 2,1,0,msr0 ; msr0.ovf is clear | |
| 527 | test_spr_bits 2,1,0,msr1 ; msr1.ovf is clear | |
| 528 | test_spr_bits 1,0,0,msr0 ; msr0.aovf is clear | |
| 529 | test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt is clear | |
| 530 | test_accg_immed 0x00000011,accg0 | |
| 531 | test_acc_immed 0x11111111,acc0 | |
| 532 | ||
| 533 | set_fr_iimmed 0xfffe,0xffff,fr7 ; saturation | |
| 534 | set_fr_iimmed 0xffff,0xffff,fr8 | |
| 535 | cmcpxru fr7,fr8,acc0,cc7,1 | |
| 536 | test_spr_bits 0x3c,2,0x0,msr0 ; msr0.sie is clear | |
| 537 | test_spr_bits 2,1,0,msr0 ; msr0.ovf is clear | |
| 538 | test_spr_bits 2,1,0,msr1 ; msr1.ovf is clear | |
| 539 | test_spr_bits 1,0,0,msr0 ; msr0.aovf is clear | |
| 540 | test_spr_bits 0x7000,12,0,msr0 ; msr0.mtt is clear | |
| 541 | test_accg_immed 0x00000011,accg0 | |
| 542 | test_acc_immed 0x11111111,acc0 | |
| 543 | ||
| 544 | pass |