]>
Commit | Line | Data |
---|---|---|
50df264d MF |
1 | 2021-01-09 Mike Frysinger <vapier@gentoo.org> |
2 | ||
3 | * configure: Regenerate. | |
4 | ||
bf470982 MF |
5 | 2021-01-09 Mike Frysinger <vapier@gentoo.org> |
6 | ||
7 | * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no". | |
8 | * configure: Regenerate. | |
9 | ||
46f900c0 MF |
10 | 2021-01-08 Mike Frysinger <vapier@gentoo.org> |
11 | ||
12 | * configure: Regenerate. | |
13 | ||
dfb856ba MF |
14 | 2021-01-04 Mike Frysinger <vapier@gentoo.org> |
15 | ||
16 | * configure: Regenerate. | |
17 | ||
5c887dd5 JB |
18 | 2017-09-06 John Baldwin <jhb@FreeBSD.org> |
19 | ||
20 | * configure: Regenerate. | |
21 | ||
ce39bd38 MF |
22 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
23 | ||
24 | * config.in, configure: Regenerate. | |
25 | ||
22be3fbe MF |
26 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
27 | ||
28 | * configure: Regenerate. | |
29 | ||
0dc73ef7 MF |
30 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
31 | ||
32 | * configure: Regenerate. | |
33 | ||
347fe5bb MF |
34 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
35 | ||
36 | * configure: Regenerate. | |
37 | ||
99d8e879 MF |
38 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
39 | ||
40 | * configure: Regenerate. | |
41 | ||
35656e95 MF |
42 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
43 | ||
44 | * configure: Regenerate. | |
45 | ||
16f7876d MF |
46 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
47 | ||
48 | * configure: Regenerate. | |
49 | ||
e19418e0 MF |
50 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
51 | ||
52 | * configure: Regenerate. | |
53 | ||
936df756 MF |
54 | 2016-01-09 Mike Frysinger <vapier@gentoo.org> |
55 | ||
56 | * config.in, configure: Regenerate. | |
57 | ||
2e3d4f4d MF |
58 | 2016-01-06 Mike Frysinger <vapier@gentoo.org> |
59 | ||
60 | * interp.c (sim_open): Mark argv const. | |
61 | (sim_create_inferior): Mark argv and env const. | |
62 | ||
9bbf6f91 MF |
63 | 2016-01-04 Mike Frysinger <vapier@gentoo.org> |
64 | ||
65 | * configure: Regenerate. | |
66 | ||
77cf2ef5 MF |
67 | 2016-01-03 Mike Frysinger <vapier@gentoo.org> |
68 | ||
69 | * interp.c (sim_open): Update sim_parse_args comment. | |
70 | ||
0cb8d851 MF |
71 | 2016-01-03 Mike Frysinger <vapier@gentoo.org> |
72 | ||
73 | * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete. | |
74 | * configure: Regenerate. | |
75 | ||
1ac72f06 MF |
76 | 2016-01-02 Mike Frysinger <vapier@gentoo.org> |
77 | ||
78 | * configure.ac (SIM_AC_OPTION_ENDIAN): Change LITTLE_ENDIAN to | |
79 | LITTLE. | |
80 | * configure: Regenerate. | |
81 | ||
e1211e55 MF |
82 | 2015-12-30 Mike Frysinger <vapier@gentoo.org> |
83 | ||
84 | * wrapper.c (v850_reg_store, v850_reg_fetch): Define. | |
85 | (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE. | |
86 | (sim_store_register): Rename to ... | |
87 | (v850_reg_store): ... this. | |
88 | (sim_fetch_register): Rename to ... | |
89 | (v850_reg_fetch): ... this. | |
90 | ||
5e744ef8 MF |
91 | 2015-12-27 Mike Frysinger <vapier@gentoo.org> |
92 | ||
93 | * Makefile.in (SIM_OBJS): Delete sim-hload.o. | |
94 | ||
1b393626 MF |
95 | 2015-12-26 Mike Frysinger <vapier@gentoo.org> |
96 | ||
97 | * config.in, configure: Regenerate. | |
98 | ||
84e8e361 MF |
99 | 2015-12-24 Mike Frysinger <vapier@gentoo.org> |
100 | ||
101 | * sim-main.h (WITH_WATCHPOINTS): Delete. | |
102 | ||
1d19cae7 DV |
103 | 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com> |
104 | ||
105 | * simops.c (v850_bins): Fix left shift of negative value. | |
106 | ||
c389945b MF |
107 | 2015-11-17 Mike Frysinger <vapier@gentoo.org> |
108 | ||
109 | * sim-main.h (WITH_CORE): Delete. | |
110 | ||
cdf850e9 MF |
111 | 2015-11-17 Mike Frysinger <vapier@gentoo.org> |
112 | ||
113 | * sim-main.h (WITH_MODULO_MEMORY): Delete. | |
114 | ||
797eee42 MF |
115 | 2015-11-15 Mike Frysinger <vapier@gentoo.org> |
116 | ||
117 | * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o. | |
118 | ||
6e4f085c MF |
119 | 2015-11-14 Mike Frysinger <vapier@gentoo.org> |
120 | ||
121 | * interp.c (sim_close): Delete. | |
122 | ||
8d0978fb MF |
123 | 2015-06-23 Mike Frysinger <vapier@gentoo.org> |
124 | ||
125 | * configure: Regenerate. | |
126 | ||
a3487082 MF |
127 | 2015-06-12 Mike Frysinger <vapier@gentoo.org> |
128 | ||
129 | * configure: Regenerate. | |
130 | ||
306f4178 MF |
131 | 2015-06-12 Mike Frysinger <vapier@gentoo.org> |
132 | ||
133 | * configure: Regenerate. | |
134 | ||
5d19c366 MF |
135 | 2015-06-11 Mike Frysinger <vapier@gentoo.org> |
136 | ||
137 | * interp.c (INLINE): Delete define. | |
138 | ||
20bca71d MF |
139 | 2015-04-18 Mike Frysinger <vapier@gentoo.org> |
140 | ||
141 | * sim-main.h (SIM_CPU): Delete. | |
142 | ||
7e83aa92 MF |
143 | 2015-04-18 Mike Frysinger <vapier@gentoo.org> |
144 | ||
145 | * sim-main.h (sim_cia): Delete. | |
146 | ||
034685f9 MF |
147 | 2015-04-17 Mike Frysinger <vapier@gentoo.org> |
148 | ||
149 | * sim-main.h (CIA_GET, CIA_SET): Delete. | |
150 | ||
78e9aa70 MF |
151 | 2015-04-15 Mike Frysinger <vapier@gentoo.org> |
152 | ||
153 | * Makefile.in (SIM_OBJS): Delete sim-cpu.o. | |
154 | * sim-main.h (STATE_CPU): Delete. | |
155 | ||
bf12d44e MF |
156 | 2015-04-13 Mike Frysinger <vapier@gentoo.org> |
157 | ||
158 | * configure: Regenerate. | |
159 | ||
14c9ad2e MF |
160 | 2015-04-13 Mike Frysinger <vapier@gentoo.org> |
161 | ||
162 | * Makefile.in (SIM_OBJS): Add sim-cpu.o. | |
163 | * interp.c (v850_pc_get, v850_pc_set): New functions. | |
164 | (sim_open): Declare new local var i. Call sim_cpu_alloc_all. | |
165 | Call CPU_PC_FETCH & CPU_PC_STORE for all cpus. | |
166 | (sim_pc_get): Delete. | |
167 | * sim-main.h (SIM_CPU): Define. | |
168 | (struct sim_state): Change cpu to an array of pointers. | |
169 | (STATE_CPU): Drop &. | |
170 | ||
122bbfb5 MF |
171 | 2015-04-06 Mike Frysinger <vapier@gentoo.org> |
172 | ||
173 | * Makefile.in (SIM_OBJS): Delete sim-engine.o and sim-hrw.o. | |
174 | ||
aadc9410 MF |
175 | 2015-03-31 Mike Frysinger <vapier@gentoo.org> |
176 | ||
177 | * config.in, configure: Regenerate. | |
178 | ||
05f53ed6 MF |
179 | 2015-03-24 Mike Frysinger <vapier@gentoo.org> |
180 | ||
181 | * interp.c (sim_pc_get): New function. | |
182 | ||
ae7d0cac MF |
183 | 2015-03-16 Mike Frysinger <vapier@gentoo.org> |
184 | ||
185 | * config.in, configure: Regenerate. | |
186 | ||
465fb143 MF |
187 | 2015-03-14 Mike Frysinger <vapier@gentoo.org> |
188 | ||
189 | * Makefile.in (SIM_RUN_OBJS): Delete. | |
190 | ||
5cddc23a MF |
191 | 2015-03-14 Mike Frysinger <vapier@gentoo.org> |
192 | ||
193 | * configure.ac (AC_CHECK_HEADERS): Delete unistd.h & stdlib.h & | |
194 | string.h & strings.h & time.h. | |
195 | * aclocal.m4, configure: Regenerate. | |
196 | ||
a3976a7c NC |
197 | 2015-02-27 Nick Clifton <nickc@redhat.com> |
198 | ||
199 | * sim-main.h (reg64_t): New type. | |
200 | (v850_regs): Add selID_sregs field. | |
201 | (VR, SAT16, SAT32, ABS16, ABS32 ): New macros. | |
202 | * v850-dc: Add fields for v850e3v5 instructions. | |
203 | * v850.igen (cvtf.dl): Use correctly signed local value. | |
204 | (cvtf.dw, cvtf.sw, trncf.dul, trncf.dl, trncf.sul, trncf.sw): | |
205 | Likewise. | |
206 | * interp.c: Fix old style function declarations. | |
207 | * simops.c: Likewise. | |
208 | ||
9ad55e9b NC |
209 | 2015-02-24 Nick Clifton <nickc@redhat.com> |
210 | ||
211 | * v850.igen: Add more e3v5 support. | |
212 | (FMAF.S): New pattern. | |
213 | (FMSF.S): New pattern. | |
214 | (FNMAF.S): New pattern. | |
215 | (FNMSF.S): New pattern. | |
216 | (cnvq15q30): New pattern. | |
217 | (cnvq30q15): New pattern. | |
218 | (cnvq31q62): New pattern. | |
219 | (cnvq62q31): New pattern. | |
220 | (dup.h): New pattern. | |
221 | (dup.w): New pattern. | |
222 | (expq31): New pattern. | |
223 | (modadd): New pattern. | |
224 | (mov.dw): New pattern. | |
225 | (mov.h): New pattern. | |
226 | (mov.w): New pattern. | |
227 | (pki16i32): New pattern. | |
228 | (pki16ui8): New pattern. | |
229 | (pki32i16): New pattern. | |
230 | (pki64i32): New pattern. | |
231 | (pkq15q31): New pattern. | |
232 | (pkq30q31): New pattern. | |
233 | (pkq31q15): New pattern. | |
234 | (pkui8i16): New pattern. | |
235 | (vabs.h): New pattern. | |
236 | (vabs.w): New pattern. | |
237 | (vadd.dw): New placeholder pattern. | |
238 | (vadd.h): New placeholder pattern. | |
239 | (vadd.w): New placeholder pattern. | |
240 | (vadds.h): New placeholder pattern. | |
241 | (vadds.w): New placeholder pattern. | |
242 | (vaddsat.h): New placeholder pattern. | |
243 | (vaddsat.w): New placeholder pattern. | |
244 | (vand): New pattern. | |
245 | (vbiq.h): New placeholder pattern. | |
246 | (vbswap.dw): New placeholder pattern. | |
247 | (vbswap.h): New placeholder pattern. | |
248 | (vbswap.w): New placeholder pattern. | |
249 | (vcalc.h): New placeholder pattern. | |
250 | (vcalc.w): New placeholder pattern. | |
251 | (vcmov): New placeholder pattern. | |
252 | ||
2974be62 AM |
253 | 2014-08-19 Alan Modra <amodra@gmail.com> |
254 | ||
255 | * configure: Regenerate. | |
256 | ||
faa743bb RM |
257 | 2014-08-15 Roland McGrath <mcgrathr@google.com> |
258 | ||
259 | * configure: Regenerate. | |
260 | * config.in: Regenerate. | |
261 | ||
1a8a700e MF |
262 | 2014-03-04 Mike Frysinger <vapier@gentoo.org> |
263 | ||
264 | * configure: Regenerate. | |
265 | ||
bf3d9781 AM |
266 | 2013-09-23 Alan Modra <amodra@gmail.com> |
267 | ||
268 | * configure: Regenerate. | |
269 | ||
31e6ad7d MF |
270 | 2013-06-03 Mike Frysinger <vapier@gentoo.org> |
271 | ||
272 | * aclocal.m4, configure: Regenerate. | |
273 | ||
fd7b2a54 NC |
274 | 2013-05-13 Nick Clifton <nickc@redhat.com> |
275 | ||
276 | * v850.igen (LDSR): Accept but ignore a selID parameter. | |
277 | ||
d3685d60 TT |
278 | 2013-05-10 Freddie Chopin <freddie_chopin@op.pl> |
279 | ||
280 | * configure: Rebuild. | |
281 | ||
67d7515b NC |
282 | 2013-01-28 Nick Clifton <nickc@redhat.com> |
283 | ||
284 | * simops.c (v850_rotl): New function. | |
285 | (v850_bins): New function. | |
286 | * simops.h: Add prototypes fir v850_rotl and v850_bins. | |
287 | * v850-dc: Add entries for V850e3v5. | |
288 | * v850.igen: Add support for v850e3v5. | |
289 | (ld.dw, st.dw, rotl, bins): New patterns. | |
290 | ||
85367826 NC |
291 | 2013-01-10 Nick Clifton <nickc@redhat.com> |
292 | ||
293 | * interp.c (sim_open): Add support for bfd_arch_v850_rh850 | |
294 | architecture type. Add support for bfd_mach_v850e2 and | |
295 | bfd_mach_v850e2v3 machine numbers. | |
72f4393d L |
296 | * v850.igen (dbtrap): Add support for SIM_OPEN_DEBUG. |
297 | (cmpf.d): Correct order of operands. | |
298 | (cmpf.s): Likewise. | |
299 | (trncf.dul): New pattern. | |
300 | (trncf.duw): New pattern. | |
301 | (trncf.sul): New pattern. | |
302 | (trncf.suw): New pattern. | |
303 | * v850-dc: Correct bitfield selection for TRNCF.SW and CVTF.SW. | |
85367826 | 304 | |
d99ff40f NC |
305 | 2012-09-13 Nick Clifton <nickc@redhat.com> |
306 | ||
307 | * v850.igen (W,WWWW): Correct computation of register number. | |
308 | (JR32): Remove unnecessary comma. | |
309 | (cmovf.s): Register 0 is an invalid source register. | |
310 | (maddf.s): Remove bogus intermediary rounding. | |
311 | (nmaddf.s): Likewise. | |
312 | (trncf.sl): Remove bogus initial rounding. | |
313 | (trncf.dw): Likewise. | |
314 | (trncf.sl): Likewise. | |
315 | (trncf.sw): Likewise. | |
316 | ||
5f3ef9d0 JB |
317 | 2012-06-15 Joel Brobecker <brobecker@adacore.com> |
318 | ||
319 | * config.in, configure: Regenerate. | |
320 | ||
2aaed979 KB |
321 | 2012-03-28 Rathish C <rathish.c@kpitcummins.com> |
322 | ||
323 | * sim-main.h (struct _v850_regs): Add new fields mpu0_sregs, | |
324 | mpu1_sregs, and fpu_sregs. | |
325 | (MPU0_SR, MPU1_SR, FPU_SR): New macros for accessing new fields | |
326 | in _v850_regs struct. | |
327 | (SP_REGNO): Define. | |
328 | (SP): Redefine using SP_REGNO. | |
329 | (PSW_REGNO, EIIC, FEIC, DBIC, DIR, EIWR, FEWR, DBWR, BSEL, PSW_NPV) | |
330 | (PSW_DMP, PSW_IMP, ECR_EICC, ECR_FECC, FPSR, FPSR_REGNO, FPEPC) | |
331 | (FPST, FPST_REGNO, FPCC, FPCFG, FPCFG_REGNO, FPSR_DEM, FPSR_SEM) | |
332 | (FPSR_RM, FPSR_RN, FPSR_FS, FPSR_PR, FPSR_XC, FPSR_XCE, FPSR_XCV) | |
333 | (FPSR_XCZ, FPSR_XCO, FPSR_XCU, FPSR_XCI, FPSR_XE, FPSR_XEV) | |
334 | (FPSR_XEZ, FPSR_XEO, FPSR_XEU, FPSR_XEI, FPSR_XP, FPSR_XPV) | |
335 | (FPSR_XPZ, FPSR_XPO, FPSR_XPU, FPSR_XPI, FPST_PR, FPST_XCE) | |
336 | (FPST_XCV, FPST_XCZ, FPST_XCO, FPST_XCU, FPST_XCI, FPST_XPV) | |
337 | (FPST_XPZ, FPST_XPO, FPST_XPU, FPST_XPI, FPCFG_RM, FPCFG_XEV) | |
338 | (FPCFG_XEZ, FPCFG_XEO, FPCFG_XEU, FPCFG_XEI, GET_FPCC, CLEAR_FPCC) | |
339 | (SET_FPCC, TEST_FPCC, FPSR_GET_ROUND, MPM, MPC, MPC_REGNO, TID) | |
340 | (PPA, PPM, PPC, DCC, DCV0, DCV1, SPAL, SPAU, IPA0L, IPA0U, IPA1L) | |
341 | (IPA1U, IPA2L, IPA2U, IPA3L, IPA3U, DPA0L, DPA0U, DPA1L, DPA1U) | |
342 | (DPA2L, DPA2U, DPA3L, DPA3U, PPC_PPE, SPAL_SPE, SPAL_SPS, VIP) | |
343 | (VMECR, VMTID, VMADR, VPECR, VPTID, VPADR, VDECR, VDTID, MPM_AUE) | |
344 | (MPM_MPE, VMECR_VMX, VMECR_VMR, VMECR_VMW, VMECR_VMS, VMECR_VMRMW) | |
345 | (VMECR_VMMS, IPA2ADDR, IPA_IPE, IPA_IPX, IPA_IPR, IPE0, IPE1, IPE2) | |
346 | (IPE3, IPX0, IPX1, IPX2, IPX3, IPR0, IPR1, IPR2, IPR3, DPA2ADDR) | |
347 | (DPA_DPE, DPA_DPR, DPA_DPW, DPE0, DPE1, DPE2, DPE3, DPR0, DPR1) | |
348 | (DPR2, DPR3, DPW0, DPW1, DPW2, DPW3, DCC_DCE0, DCC_DCE1, PPA2ADDR) | |
349 | (PPC_PPC, PPC_PPE, PPC_PPM): New macros. | |
350 | (FPU_COMPARE): New enum. | |
351 | (TRACE_FP_INPUT_FPU1, TRACE_FP_INPUT_FPU2, TRACE_FP_INPUT_FPU3) | |
352 | (TRACE_FP_INPUT_BOOL1_FPU2, TRACE_FP_INPUT_WORD2) | |
353 | (TRACE_FP_RESULT_WORD1, TRACE_FP_RESULT_WORD2): New macros. | |
354 | * simops.c (Add32): Update prototype. | |
355 | (update_fpsr): New function. | |
356 | (SignalException): New function. | |
357 | (SignalExceptionFPE): New function. | |
358 | (check_invalid_snan): New function. | |
359 | (v850_float_compare): New function. | |
360 | (v850_div): New function. | |
361 | (v850_divu): New function. | |
362 | (v850_sar): New function. | |
363 | (v850_shl): New function. | |
364 | (v850_shr): New function. | |
365 | (v850_satadd): New function. | |
366 | (v850_satsub): New function. | |
367 | (load_data_mem): New function. | |
368 | (store_data_mem): New function. | |
369 | (mpu_load_mem_test): New function. | |
370 | (mpu_store_mem_test): New function. | |
371 | * simops.h: Add function prototype for above mentioned functions. | |
372 | (check_cvt_fi, check_cvt_if, check_cvt_ff): Define. | |
373 | * v850-dc: Add entry for v850e2 and v850e2v3. | |
374 | * v850.igen: Add support for v850e2 and v850e2v3. | |
375 | ||
2232061b MF |
376 | 2012-03-24 Mike Frysinger <vapier@gentoo.org> |
377 | ||
378 | * aclocal.m4, config.in, configure: Regenerate. | |
379 | ||
db2e4d67 MF |
380 | 2011-12-03 Mike Frysinger <vapier@gentoo.org> |
381 | ||
382 | * aclocal.m4: New file. | |
383 | * configure: Regenerate. | |
384 | ||
9c082ca8 MF |
385 | 2011-10-17 Mike Frysinger <vapier@gentoo.org> |
386 | ||
387 | * configure.ac: Change include to common/acinclude.m4. | |
388 | ||
6ffe910a MF |
389 | 2011-10-17 Mike Frysinger <vapier@gentoo.org> |
390 | ||
391 | * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER | |
392 | call. Replace common.m4 include with SIM_AC_COMMON. | |
393 | * configure: Regenerate. | |
394 | ||
2419798b MF |
395 | 2011-07-05 Mike Frysinger <vapier@gentoo.org> |
396 | ||
397 | * interp.c (sim_do_command): Delete. | |
398 | ||
d0f0baa2 KB |
399 | 2011-03-21 Kevin Buettner <kevinb@redhat.com> |
400 | ||
401 | * simops (OP_10007E0): Update errno handling as most traps | |
402 | do not invoke the host's functionality directly. Invoke | |
403 | sim_io_stat() instead of stat() for implementing TARGET_SYS_stat. | |
404 | Implement TARGET_SYS_fstat, TARGET_SYS_rename, and TARGET_SYS_unlink. | |
405 | ||
d79fe0d6 MF |
406 | 2011-02-14 Mike Frysinger <vapier@gentoo.org> |
407 | ||
408 | * simops.c (OP_10007E0): Change zfree to free. | |
409 | ||
dae477fe AB |
410 | 2011-01-11 Andrew Burgess <aburgess@broadcom.com> |
411 | ||
412 | * interp.c (sim_store_register): Update return value to | |
413 | match new API. | |
414 | ||
4e9586f0 MF |
415 | 2010-03-30 Mike Frysinger <vapier@gentoo.org> |
416 | ||
417 | * interp.c (interrupt_names): Add const to pointer type. | |
418 | (do_interrupt): Add const to interrupt_name. | |
419 | ||
3725885a RW |
420 | 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
421 | ||
422 | * configure: Regenerate. | |
423 | ||
d6416cdc RW |
424 | 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
425 | ||
81ecdfbb RW |
426 | * config.in: Regenerate. |
427 | * configure: Likewise. | |
428 | ||
d6416cdc RW |
429 | * configure: Regenerate. |
430 | ||
b5bd9624 HPN |
431 | 2008-07-11 Hans-Peter Nilsson <hp@axis.com> |
432 | ||
433 | * configure: Regenerate to track ../common/common.m4 changes. | |
434 | * config.in: Ditto. | |
435 | ||
6efef468 | 436 | 2008-06-06 Vladimir Prus <vladimir@codesourcery.com> |
72f4393d L |
437 | Daniel Jacobowitz <dan@codesourcery.com> |
438 | Joseph Myers <joseph@codesourcery.com> | |
6efef468 JM |
439 | |
440 | * configure: Regenerate. | |
441 | ||
c5fbc25b DD |
442 | 2008-02-05 DJ Delorie <dj@redhat.com> |
443 | ||
98e460c3 DD |
444 | * simops.c (OP_1C007E0): Compensate for 64 bit hosts. |
445 | (OP_18007E0): Likewise. | |
446 | (OP_2C007E0): Likewise. | |
447 | (OP_28007E0): Likewise. | |
448 | * v850.igen (divh): Likewise. | |
72f4393d | 449 | |
c5fbc25b DD |
450 | * simops.c (OP_C0): Correct saturation logic. |
451 | (OP_220): Likewise. | |
452 | (OP_A0): Likewise. | |
453 | (OP_660): Likewise. | |
454 | (OP_80): Likewise. | |
455 | ||
456 | * simops.c (OP_2A0): If the shift count is zero, clear the | |
457 | carry. | |
458 | (OP_A007E0): Likewise. | |
459 | (OP_2C0): Likewise. | |
460 | (OP_C007E0): Likewise. | |
461 | (OP_280): Likewise. | |
462 | (OP_8007E0): Likewise. | |
463 | ||
464 | * simops.c (OP_2C207E0): Correct PSW flags for special divu | |
465 | conditions. | |
466 | (OP_2C007E0): Likewise, for div. | |
467 | (OP_28207E0): Likewise, for divhu. | |
468 | (OP_28007E0): Likewise, for divh. Also, sign-extend the correct | |
469 | operand. | |
470 | * v850.igen (divh): Likewise, for 2-op divh. | |
72f4393d | 471 | |
c5fbc25b DD |
472 | * v850.igen (bsh): Fix carry logic. |
473 | ||
cb5c8c39 DJ |
474 | 2007-02-20 Daniel Jacobowitz <dan@codesourcery.com> |
475 | ||
476 | * Makefile.in (interp.o): Uncomment and update. | |
477 | ||
edc5d9ec HPN |
478 | 2006-12-21 Hans-Peter Nilsson <hp@axis.com> |
479 | ||
480 | * acconfig.h: Remove. | |
481 | * config.in: Regenerate. | |
482 | ||
e85e3205 RE |
483 | 2006-06-13 Richard Earnshaw <rearnsha@arm.com> |
484 | ||
485 | * configure: Regenerated. | |
486 | ||
2f0122dc DJ |
487 | 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com> |
488 | ||
489 | * configure: Regenerated. | |
490 | ||
20e95c23 DJ |
491 | 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com> |
492 | ||
493 | * configure: Regenerated. | |
494 | ||
2b193c4a MK |
495 | 2005-03-23 Mark Kettenis <kettenis@gnu.org> |
496 | ||
497 | * configure: Regenerate. | |
498 | ||
35695fd6 AC |
499 | 2005-01-14 Andrew Cagney <cagney@gnu.org> |
500 | ||
501 | * configure.ac: Sinclude aclocal.m4 before common.m4. Add | |
502 | explicit call to AC_CONFIG_HEADER. | |
503 | * configure: Regenerate. | |
504 | ||
f0569246 AC |
505 | 2005-01-12 Andrew Cagney <cagney@gnu.org> |
506 | ||
507 | * configure.ac: Update to use ../common/common.m4. | |
508 | * configure: Re-generate. | |
509 | ||
38f48d72 AC |
510 | 2005-01-11 Andrew Cagney <cagney@localhost.localdomain> |
511 | ||
512 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
513 | ||
b7026657 AC |
514 | 2005-01-07 Andrew Cagney <cagney@gnu.org> |
515 | ||
516 | * configure.ac: Rename configure.in, require autoconf 2.59. | |
517 | * configure: Re-generate. | |
518 | ||
379832de HPN |
519 | 2004-12-08 Hans-Peter Nilsson <hp@axis.com> |
520 | ||
521 | * configure: Regenerate for ../common/aclocal.m4 update. | |
522 | ||
4389ce38 MK |
523 | 2004-01-18 Mark Kettenis <kettenis@gnu.org> |
524 | ||
525 | * simops.c: Include <sys/types.h>. | |
526 | ||
c5ea1d53 NC |
527 | 2003-09-05 Andrew Cagney <cagney@redhat.com> |
528 | Nick Clifton <nickc@redhat.com> | |
529 | ||
530 | * interp.c (sim_open): Accept bfd_mach_v850e1. | |
531 | * v850-dc: Add entry for v850e1. | |
532 | * v850.igen: Add support for v850e1. | |
533 | Add code for DBTRAP and DBRET instructions. | |
534 | (dbtrap): Create a separate v850e1 specific instruction. | |
535 | Only generate a trap if the target is not the v850e1. | |
536 | Otherwise treat it as a special kind of branch. | |
537 | (break): Mark as v850/v850e specific. | |
72f4393d | 538 | |
ae451ac6 ILT |
539 | 2003-05-16 Ian Lance Taylor <ian@airs.com> |
540 | ||
541 | * Makefile.in (SHELL): Make sure this is defined. | |
542 | (tmp-igen): Use $(SHELL) whenever we invoke move-if-change. | |
543 | ||
ebc115b7 NC |
544 | 2003-04-06 Nick Clifton <nickc@redhat.com> |
545 | ||
1eec9e33 NC |
546 | * simops.c (OP_40): Delete. Move code to... |
547 | * v850-igen.c (): ...Here. Sign extend the first operand. | |
ebc115b7 NC |
548 | * simops.h (OP_40): Remove prototype. |
549 | ||
6b4a8935 AC |
550 | 2003-02-27 Andrew Cagney <cagney@redhat.com> |
551 | ||
552 | * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd. | |
553 | ||
0da2b665 AC |
554 | 2002-11-30 Andrew Cagney <cagney@redhat.com> |
555 | ||
556 | * simops.c: Use int, 1, 0 instead of boolean, true and false. | |
557 | * sim-main.h: Ditto. | |
558 | ||
30458d39 JW |
559 | 2002-09-27 Jim Wilson <wilson@redhat.com> |
560 | ||
561 | * simops.c (OP_E6077E0): And op1 with 7 after reading register, not | |
562 | before. | |
563 | (BIT_CHANGE_OP): Likewise. | |
564 | ||
2e8162ce JW |
565 | 2002-09-26 Jim Wilson <wilson@redhat.com> |
566 | ||
567 | * simops (OP_10007E0): Don't subtract 4 from PC. | |
568 | ||
5d6a173d NC |
569 | 2002-09-19 Nick Clifton <nickc@redhat.com> |
570 | ||
571 | * interp.c (sim_open): Remove reference to v850ea. | |
572 | (sim_create_inferior): Likewise. | |
573 | * v850-dc: Likewise. | |
574 | * v850.igen: Remove all references to v850ea, including v850ea | |
575 | specific instructions. | |
576 | ||
e551c257 NC |
577 | 2002-08-29 Nick Clifton <nickc@redhat.com> |
578 | ||
579 | From 2001-08-23 Catherine Moore <clm@redhat.com> | |
580 | ||
581 | * Makefile.in: Add gen-zero-r0 option. | |
582 | * sim-main.h (GPR_SET, GPR_CLEAR): Define. | |
583 | * simops.c (OP_24007E0): Sign extend the imm9 | |
584 | operand of a mul instruction. | |
585 | ||
d62274a3 AC |
586 | 2002-06-17 Andrew Cagney <cagney@redhat.com> |
587 | ||
588 | * simops.c (trace_result): Fix printf formatting. | |
589 | ||
c8cca39f AC |
590 | 2002-06-16 Andrew Cagney <ac131313@redhat.com> |
591 | ||
592 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
593 | ||
7ef2d4e7 AC |
594 | 2001-12-02 Andrew Cagney <ac131313@redhat.com> |
595 | ||
596 | * Makefile.in (simops.h, table.c): Delete targets. | |
597 | (tmp-gencode, gencode.o, gencode): Delete targets. | |
598 | (simops.h): New file. | |
599 | ($(BUILT_SRC_FROM_IGEN)): Do not depend on simops.h. | |
600 | * gencode.c: Delete file. | |
72f4393d | 601 | |
d4424ada C |
602 | 2001-04-15 J.T. Conklin <jtc@redback.com> |
603 | ||
604 | * Makefile.in (simops.o): Add simops.h to dependency list. | |
605 | ||
1e6cd159 AC |
606 | 2001-03-14 Andrew Cagney <ac131313@redhat.com> |
607 | ||
608 | * Makefile.in (gencode): Link with libintl. | |
609 | ||
42acc51e JL |
610 | 2001-01-31 Jonathan Larmour <jlarmour@redhat.com> |
611 | ||
612 | * Makefile.in (gencode): Link with libopcodes in build tree rather | |
613 | than building source files from there. | |
614 | ||
896ad910 NC |
615 | 2000-05-30 Nick Clifton <nickc@cygnus.com> |
616 | ||
617 | * v850.igen: Remove illegal instruction pattern, since it is the | |
618 | same as the breakpoint pattern. | |
619 | ||
eb2d80b4 AC |
620 | Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com> |
621 | ||
622 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
623 | ||
b9791fcd FCE |
624 | 2000-04-14 Gary Thomas <gthomas@redhat.com> |
625 | ||
626 | * v850.igen: Define 'br *' as illegal since this is the only | |
627 | way to provide a breakpoint on some v850 family processors. | |
628 | ||
de616bc7 FCE |
629 | 2000-03-24 Frank Ch. Eigler <fche@redhat.com> |
630 | ||
631 | * v850.igen (ilgop): New insn pattern for four-byte breakpoints. | |
632 | ||
d4f3574e SS |
633 | Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com> |
634 | ||
635 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
636 | ||
cd0fc7c3 SS |
637 | 1999-05-08 Felix Lee <flee@cygnus.com> |
638 | ||
639 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
72f4393d | 640 | |
c906108c SS |
641 | Tue Dec 1 17:25:16 1998 Andrew Cagney <cagney@b1.cygnus.com> |
642 | ||
643 | * Makefile.in (NL_TARGET): Define as -DNL_TARGET_v850. | |
644 | ||
645 | Wed Nov 25 17:52:58 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
646 | ||
647 | * Makefile.in (simops.o): Depends on targ-vals.h | |
648 | * simops.c: Include targ-vals.h instead of | |
649 | libgloss/.../syscall.h. Replace SYS_* with TARGET_SYS_*. | |
650 | (divn, divun, OP_1C007E0, OP_18207E0, OP_1C207E0,OP_18007E0): | |
651 | Replace signed long int with signed32. | |
652 | ||
653 | Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com> | |
654 | ||
655 | * interp.c: #include "itable.h". | |
656 | (get_insn_name): New function. | |
657 | (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS. | |
658 | * sim-main.h (MAX_INSNS,INSN_NAME): Delete. | |
659 | ||
660 | Wed May 6 19:43:27 1998 Doug Evans <devans@canuck.cygnus.com> | |
661 | ||
662 | * sim-main.h (INSN_NAME): New arg `cpu'. | |
663 | ||
664 | Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com> | |
665 | ||
72f4393d | 666 | * configure: Regenerated to track ../common/aclocal.m4 changes. |
c906108c SS |
667 | |
668 | Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche> | |
669 | ||
670 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
671 | * config.in: Ditto. | |
672 | ||
673 | Sun Apr 26 15:19:14 1998 Tom Tromey <tromey@cygnus.com> | |
674 | ||
675 | * acconfig.h: New file. | |
676 | * configure.in: Reverted change of Apr 24; use sinclude again. | |
677 | ||
678 | Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche> | |
679 | ||
680 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
681 | * config.in: Ditto. | |
682 | ||
683 | Fri Apr 24 11:18:08 1998 Tom Tromey <tromey@cygnus.com> | |
684 | ||
685 | * configure.in: Don't call sinclude. | |
686 | ||
687 | Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
688 | ||
689 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
690 | * sim-main.h (SIM_MAIN_H): Wrap header. | |
691 | ||
692 | Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
693 | ||
694 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
695 | ||
696 | Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
697 | ||
698 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
699 | ||
700 | Tue Mar 10 15:54:50 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
701 | ||
702 | * interp.c (sim_stop): Delete, second attempt. | |
703 | ||
704 | Thu Feb 26 19:09:47 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
705 | ||
706 | * interp.c (sim_info): Delete. | |
707 | ||
708 | Wed Feb 18 10:47:32 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
709 | ||
710 | * sim-main.h (TRACE_ALU_INPUT*): Delete. Moved to sim-trace.[hc]. | |
711 | ||
712 | * simops.c (trace_result): Call trace_generic instead of | |
713 | trace_one_insn. | |
714 | (trace_module): Change variable type to integer. | |
715 | (trace_input): Initialize trace_module with TRACE_ALU_IDX. | |
716 | ||
717 | * sim-main.h (trace_module): Change variable decl to integer type. | |
718 | (TRACE_BRANCH*, TRACE_LD, TRACE_ST): Update. | |
72f4393d | 719 | |
c906108c SS |
720 | Tue Feb 17 12:51:18 1998 Andrew Cagney <cagney@b1.cygnus.com> |
721 | ||
722 | * interp.c (sim_store_register, sim_fetch_register): Pass in | |
723 | length parameter. Return -1. | |
724 | ||
725 | Tue Feb 3 16:24:42 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
726 | ||
727 | * sim-main.h (IMEM16, IMEM16_IMMED): Rename IMEM and | |
728 | IMEM_IMMED. To match recent igen change. | |
729 | ||
730 | Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
731 | ||
732 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
733 | ||
734 | Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
735 | ||
736 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
737 | ||
738 | Fri Jan 30 09:51:27 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
739 | ||
740 | * sim-main.h (CPU_CIA): Delete, replaced by. | |
741 | (CIA_SET, CIA_SET): Define. | |
742 | ||
743 | Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba> | |
744 | ||
745 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
746 | ||
747 | Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
748 | ||
749 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
750 | * config.in: Ditto. | |
751 | ||
752 | Fri Dec 5 09:26:08 1997 Nick Clifton <nickc@cygnus.com> | |
753 | ||
754 | * v850.igen: Revert break value back to its old value. | |
755 | ||
756 | Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com> | |
757 | ||
758 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
759 | ||
760 | Wed Dec 3 17:27:19 1997 Nick Clifton <nickc@cygnus.com> | |
761 | ||
762 | * v850.igen: Make break have a zero first field, since otherwise | |
763 | it clashes with the DIVH instruction. | |
764 | ||
765 | Sat Nov 22 21:32:07 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
766 | ||
767 | * simops.c (OP_10007E0): Rename SIGABRT -> SIM_SIGABRT. Give | |
768 | sim_stopped instead of sim_signalled. | |
769 | ||
770 | * v850.igen (BREAK), simops.c (OP_12007E0): Rename SIGTRAP to | |
771 | SIM_SIGTRAP. | |
772 | (illegal): Rename SIGILL to SIM_SIGILL. | |
72f4393d | 773 | |
c906108c SS |
774 | * sim-main.h, simops.c, interp.c: Do not include signal.h. |
775 | ||
776 | * sim-main.h: Include sim-signal.h instead of signal.h. | |
777 | (SIGTRAP, SIGQUIT): Delete definition. | |
778 | (SIG_V850_EXIT): Delete definition. | |
779 | ||
780 | Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com> | |
781 | ||
782 | * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS). | |
783 | ||
784 | Fri Oct 31 10:33:40 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
785 | ||
786 | * interp.c (sim_open): Check state magic number. | |
787 | (sim-assert.h): Include. | |
788 | ||
789 | Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
790 | ||
791 | * v850.igen: Add model filter field to records. | |
792 | ||
793 | Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
794 | ||
795 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
796 | ||
797 | Fri Sep 26 11:56:02 1997 Felix Lee <flee@cygnus.com> | |
798 | ||
799 | * sim-main.h: delete null override of SIM_ENGINE_HALT_HOOK and | |
800 | SIM_ENGINE_RESTART_HOOK. | |
72f4393d | 801 | |
c906108c SS |
802 | Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> |
803 | ||
804 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
805 | ||
806 | Wed Sep 24 17:28:26 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
807 | ||
808 | * sim-main.h (WITH_TARGET_WORD_MSB): Delete. | |
809 | ||
810 | * configure.in (SIM_AC_OPTION_BITSIZE): Specify 32 bit | |
811 | architecture with MSB == 31. | |
812 | ||
813 | Wed Sep 24 14:04:20 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
814 | ||
815 | * v850.igen: Make divh insn with RRRRR==0 breakpoint. | |
816 | ||
817 | Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
818 | ||
819 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
820 | ||
821 | Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
822 | ||
823 | * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN, | |
824 | SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common. | |
825 | (SIM_EXTRA_CFLAGS): Update. | |
72f4393d | 826 | |
c906108c SS |
827 | Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> |
828 | ||
829 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
830 | * configure.in: Really specify NONSTRICT_ALIGNMENT as the default. | |
831 | ||
832 | Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
833 | ||
834 | * configure.in: Specify NONSTRICT_ALIGNMENT as the default. | |
835 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
836 | ||
837 | Fri Sep 19 10:37:20 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
838 | ||
839 | * v850.igen (disp16): Use EXTEND16 to sign extend disp. | |
840 | (disp22): Only shift left by 1, not 2. | |
841 | ("jmp"): Ensure PC is 2 byte aligned. | |
842 | ||
843 | * simops.c, v850.igen: Move "Bcond", "jr", "jarl" code to | |
844 | v850.igen. Fix tracing. | |
845 | ||
846 | * simops.c (OP_300, OP_400, OP_500): Move "sdl.b", "sld.h", | |
847 | "sld.w" insns to v850.igen. Fix tracing. | |
848 | (OP_70): Ditto for "sld.hu". | |
849 | ||
850 | * v850.igen: Clarify tracing of "sld.b", "sld.h" et.al. | |
851 | ||
852 | * simops.c (condition_met): Make global. | |
853 | ||
854 | * sim-main.h (TRACE_ALU_INPUT3, TRACE_BRANCH0, TRACE_LD, | |
855 | TRACE_ST): Define. | |
856 | (TRACE_LD_NAME): Define. | |
857 | ||
858 | * simops.c: Move "cmov", "cmov imm" to v850.igen, fix. | |
859 | ||
860 | Wed Sep 17 16:21:08 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
861 | ||
862 | * simops.c: Move "mov", "reti", to v850.igen, fix tracing. | |
72f4393d | 863 | |
c906108c SS |
864 | * interp.c (hash): Delete. |
865 | ||
866 | * v850.igen (nop): Really do nothing. | |
867 | ||
868 | * interp.c (do_interrupt): Mask interrupts after PSW is saved, not | |
869 | before. | |
870 | * v850.igen (reti): Return to current PC not previous. | |
871 | ||
872 | Wed Sep 17 14:02:10 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
873 | ||
874 | * simops.c: Move "ctret", "bsw", "hsw" to v850.igen, fix tracing. | |
875 | (trace_module): Global, save component/module name across insn. | |
876 | ||
877 | * simops.c: Move "bsh" to v850.igen, fix. | |
72f4393d | 878 | |
c906108c SS |
879 | * v850.igen (callt): Load correct number of bytes. Fix tracing. |
880 | (stsr, ldsr): Correct src, dest fields. Fix tracing. | |
881 | (ctret): Force alignment. Fix tracing. | |
72f4393d | 882 | |
c906108c SS |
883 | Tue Sep 16 22:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com> |
884 | ||
885 | * simops.c (trace_output): Add result argument. | |
886 | (trace_result): New function. Simpler version of trace_output, | |
887 | assumes trace needed. | |
888 | (trace_output): Call trace_result. | |
889 | (trace_output): For IMM_REG_REG, trace correct register. | |
890 | (trace_input): Add case for 16bit immediates. | |
891 | (OP_600, OP_640, OP_680, OP_6C0, OP_6A0): Use. | |
892 | ||
893 | * sim-main.h (TRACE_ALU_INPUT, TRACE_ALU_RESULT): Define. | |
894 | (trace_values, trace_name, trace_pc, trace_num_values): Make | |
895 | global. | |
896 | (GR, SR): Define. | |
72f4393d | 897 | |
c906108c SS |
898 | v850.insn (movea, stsr): Use. |
899 | (sxb, sxh, zxb, zxh): Ditto. | |
72f4393d | 900 | |
c906108c SS |
901 | Tue Sep 16 21:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com> |
902 | ||
903 | * simops.c: Move "movea" from here. | |
904 | * v850.igen: To here. | |
905 | ||
906 | * v850.igen (simm16): Define, sign extend imm16. | |
907 | (uimm16): Define, no sign extension. | |
908 | (addi, andi, movea, movhi, mulhi, ori, satsubi, xori): Use. | |
72f4393d | 909 | |
c906108c SS |
910 | * simops.c: Move "sxh", "switch", "sxb", "callt", "dispose", |
911 | "mov32" from here. | |
912 | * v850.igen: To here. | |
913 | (switch): Fix off by two error in NIA calc. | |
72f4393d | 914 | |
c906108c SS |
915 | Tue Sep 16 15:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com> |
916 | ||
917 | * simops.c (trace_pc, trace_name, trace_values, trace_num_values): | |
918 | New static globals. | |
919 | (trace_input): Just save pc, name and values for trace_output. | |
920 | (trace_output): Write trace values to a buffer. Use | |
921 | trace_one_insn to print trace info and buffer. | |
922 | (SIZE_OPERANDS, SIZE_LOCATION): Delete. | |
72f4393d | 923 | |
c906108c SS |
924 | Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com> |
925 | ||
926 | * sim-main.h (struct _sim_cpu): Add psw_mask so that reserved bits | |
927 | can be masked out. | |
928 | ||
929 | * simops.c (OP_2007E0, OP_4007E0): Move "ldsr", "stsr" | |
930 | instructions from here. | |
931 | * v850.igen (ldsr, stsr): To here. Mask out reserved bits when | |
932 | setting PSW. | |
72f4393d | 933 | |
c906108c SS |
934 | * interp.c (sim_open): Set psw_mask if machine known. |
935 | ||
936 | Tue Sep 16 10:20:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
937 | ||
938 | * v850-dc: Add rule to diferentiate between breakpoint and divh. | |
939 | * v850.igen (break): New instruction, breakpoint simulator. | |
940 | * v850.igen (breakpoint): Enable. Change to a 32bit instruction. | |
941 | ||
942 | Mon Sep 15 18:44:05 1997 Jim Wilson <wilson@cygnus.com> | |
943 | ||
944 | * simops.c (Multiply64): Don't store into register zero. | |
945 | ||
946 | Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
947 | ||
948 | * Makefile.in (semantics.o): Add dependency. | |
949 | ||
950 | * sim-main.h (SAVE_1, SAVE_2): Perform backward compatible save, | |
951 | do not adjust CIA/NIA. | |
952 | ||
953 | Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
954 | ||
955 | * simops.c (OP_300, OP_400, OP_70): Make behavour depend on PSW[US]. | |
72f4393d | 956 | |
c906108c SS |
957 | * simops.c: Move "divun", "sld.bu", "divhn", "divhun", "divn", |
958 | "divun", "pushml" code from here to v850.igen. | |
959 | (divun): Make global. | |
960 | (type3_regs): Make global | |
72f4393d | 961 | |
c906108c SS |
962 | * v850.igen: Move simops.c code to here. |
963 | ||
964 | * interp.c (sim_create_inferior): For v850eq set US bit by | |
965 | default. | |
966 | ||
967 | * interp.c (sim_open): Don't set arch, now set by | |
968 | sim_analyze_program. | |
969 | ||
970 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
971 | ||
972 | Mon Sep 15 14:39:34 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
973 | ||
974 | * simops.c (op_types): Move from here. | |
975 | sim-main.h: To here. | |
976 | ||
977 | * sim-main.h (trace_input, trace_output), simops.c: Make global. | |
978 | ||
979 | * simops.c (OP_60): Move "jmp" code from here. | |
980 | * v850.igen (jmp): To here. | |
981 | ||
982 | * simops.c (OP_60): Move "sld.bu" code from here. | |
983 | * v850.igen (sld.bu): To here. | |
984 | ||
985 | Fri Sep 12 15:11:03 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
986 | ||
987 | * v850.igen (prepare, ...): Add to v850eq architecture. | |
988 | ||
989 | * interp.c (sim_open): Default to v850eq. | |
72f4393d | 990 | |
c906108c SS |
991 | * interp.c (sim_open): Default to v850e. |
992 | * sim-main.h (signal.h): Include. | |
993 | ||
994 | * v850.igen (illegal): Report/halt illegal instructions. | |
995 | ||
996 | * Makefile.in (SIM_EXTRA_CFLAGS): Add SIM_RESERVED_BITS. | |
997 | ||
998 | * configure.in: Add reserved bits option. | |
999 | * configure: Regenerate. | |
1000 | ||
1001 | Thu Sep 11 08:40:03 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1002 | ||
1003 | * interp.c (sim_open): Use sim_do_commandf instead of asprintf. | |
1004 | ||
72f4393d | 1005 | * sim-main.h (INSN_NAME): |
c906108c SS |
1006 | |
1007 | * Makefile.in (INCLUDE): Add SIM_EXTRA_DEPS. | |
1008 | (SIM_EXTRA_DEPS): Add itable.h | |
1009 | (tmp-gencode): Does not depend on simops.h | |
1010 | ||
1011 | * sim-main.h (itable.h): Include. | |
1012 | (MAX_INSNS, INSN_NAME): Define. | |
1013 | ||
1014 | * interp.c: Compute inttype from the interrupt_names index that | |
1015 | was passed in. | |
1016 | ||
1017 | Wed Sep 10 10:25:40 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1018 | ||
1019 | * simops.c (trace_input): Use trace_printf instead of | |
1020 | sim_io_printf. | |
1021 | (trace_output): Ditto. | |
1022 | (trace_input): Only trace when TRACE_ALU_P. Delete code | |
1023 | disasembling instruction. | |
1024 | (trace_output): Only trace when TRACE_ALU_P. | |
1025 | ||
1026 | Tue Sep 9 01:29:50 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1027 | ||
1028 | * simops.c (trace_input, trace_output): Use sim_io_printf. | |
1029 | (OP_620): Pass correct argument to trace. | |
1030 | (OP_E607E0): Ditto. | |
1031 | (trace_input): Obtain prog_bfd, text_start et.al from simulator | |
1032 | struct. | |
1033 | ||
1034 | Mon Sep 8 21:03:52 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1035 | ||
1036 | * v850.igen: New file. | |
1037 | * v850-dc: New file. | |
1038 | ||
1039 | Mon Sep 8 18:33:04 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1040 | ||
1041 | ||
1042 | * sim-main.h (SEXT16): Delete, use EXTEND16. | |
1043 | (SEXT8): Delete, use EXTEND8. | |
1044 | (SEXT32): Delete, used? | |
1045 | (SEXT40, SEXT44, SEXT64): Use UNSIGNED64 for constants, not ...LL. | |
1046 | (WITH_TARGET_WORD_MSB): Define as 31. v850 little bit endian. | |
72f4393d | 1047 | |
c906108c SS |
1048 | * simops.c: Use EXTEND15 from sim-bits instead of SEXT16. |
1049 | ||
1050 | * sim-main.h (DEBUG_TRACE, DEBUG_VALUES, v850_debug): Delete, | |
1051 | replace with TRACE_INSN_P and TRACE_ALU_P. | |
1052 | ||
1053 | * simops.c (trace_input, trace_output): Update. | |
1054 | ||
1055 | * interp.c (sim_engine_run): Delete. | |
1056 | (lookup_hash): Delete. | |
1057 | (sim_open): Do not fill hash table. | |
1058 | (sim_trace): Delete. | |
1059 | ||
1060 | Fri Sep 5 17:04:48 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1061 | ||
1062 | * simops.c (OP_FFFF): Use sim_engine_halt. | |
1063 | (OP_12007E0): Ditto. | |
1064 | (OP_10007E0): Ditto. | |
1065 | ||
1066 | * sim-main.h (struct sim_cpu): Delete member exception. Using | |
1067 | sim-engine et.al. | |
1068 | ||
1069 | * interp.c (sim_info): Do not do anything in sim-info. | |
1070 | (sim_stop): Delete, replace with sim-stop. | |
1071 | (sim_stop_reason): Delete, replace with sim-reason. | |
1072 | ||
1073 | * sim-main.h (WITH_WATCHPOINTS): Define. | |
1074 | (WITH_MODULO_MEMORY): Define | |
72f4393d | 1075 | |
c906108c SS |
1076 | * Makefile.in (SIM_OBJS): Add sim-resume, sim-watch, sim-stop, |
1077 | sim-reason. | |
1078 | ||
1079 | * interp.c (enum interrupt_cond_type): Delete. | |
1080 | (struct interrupt_generator): Delete. | |
1081 | (enum interrupt_type): Drop int_none. | |
1082 | (sim_open): Initialize WATCHPOINT module. | |
1083 | (sim_resume, sim_run): Rename sim_resume to sim_run. | |
1084 | (sim_engine_run): Replace interrupt code with call to sim-events. | |
1085 | (sim_set_interrupt): Delete. | |
1086 | (sim_parse_number): Delete. | |
1087 | ||
1088 | Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> | |
1089 | ||
1090 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
1091 | ||
1092 | Thu Sep 4 18:11:37 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1093 | ||
1094 | * simops.c (fetch_argv): New function, fetch a arg vector from | |
1095 | simulator memory. | |
1096 | ||
1097 | * configure.in: Check for fork, execve, execv. | |
1098 | * configure: Regenerate. | |
1099 | ||
1100 | * interp.c (sim_store_register, sim_fetch_register): Use H2T_4 and | |
1101 | T2H_4 for byte swapping. | |
1102 | ||
1103 | * sim-main.h, interp.c (get_word, get_half, get_byte, put_word, | |
1104 | put_half, put_byte): Delete. | |
1105 | ||
1106 | * Makefile.in (SIM_OBJS): Add sim-memopt.o module. | |
1107 | ||
1108 | * sim-main.h (load_mem, store_mem): Redefine as macros. | |
1109 | (IMEM, IMEM_IMMED): New macros - fetch instructions. | |
1110 | ||
1111 | * simops.c (OP_10007E0): For SYS_read, SYS_write, SYS_open | |
1112 | transfer data via a buffer. | |
1113 | (fetch_str): New function, fetch string from memory. | |
1114 | ||
1115 | * Makefile.in (SIM_OBJS): Add sim-hrw.o module. | |
1116 | ||
1117 | * interp.c (sim_open): Establish memory maps using sim-memopt.c | |
1118 | via sim_do_command. | |
1119 | (sim_do_command): Print error if memory-map command is used. Call | |
1120 | sim_args_command. | |
1121 | (map): Delete, replaced by sim-core. | |
1122 | (sim_memory_init): Delete, replaced by sim-core. | |
1123 | (sim_set_memory_map): Delete, replaced by sim-memopt. | |
1124 | (load_mem): Delete, replaced by sim-core. | |
1125 | (store_mem): Delete, replaced by sim-core. | |
1126 | (sim_write): Delete, replaced by sim-hrw. | |
1127 | (sim_read): Delete, replaced by sim-hrw. | |
1128 | ||
1129 | * sim-main.h (struct sim_state): Remove memory members, using | |
1130 | sim-core.c | |
1131 | ||
1132 | Wed Sep 3 10:18:55 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1133 | ||
1134 | * sim-main.h: Replace SIM_HAVE_FLATMEM with mem ptr. | |
1135 | * interp.c (map): Do not add to a void pointer. | |
72f4393d | 1136 | |
c906108c SS |
1137 | * Makefile.in (INCLUDE): Add sim-main.h |
1138 | ||
1139 | * configure.in: Check for time.h | |
1140 | * configure: Re-generate. | |
1141 | ||
1142 | * interp.c (struct interrupt_generator): Make time unsigned long, | |
1143 | address SIM_ADDR. | |
1144 | (sim_resume): Make oldpc SIM_ADDR. | |
1145 | (struct hash_entry): Make mask/opcode unsigned. | |
1146 | ||
1147 | * v850_sim.h (struct simops ): Make opcode and mask unsigned. | |
1148 | ||
1149 | * simops.c (utime.h): Include if available. | |
1150 | (OP_10007E0): Check for UTIME function. | |
1151 | (divun): Put parentheses around shift argument. | |
1152 | (OP_640): Put parentheses around shift argument, was wrong. | |
1153 | (OP_107F0): Return something. | |
1154 | ||
1155 | * interp.c (sim_parse_number): Use strtoul not strtol. | |
1156 | (sim_resume): Use sim_elapsed_time_get to keep track of the time. | |
1157 | ||
1158 | * configure.in (SIM_AC_OPTION_WARNINGS): Add. | |
1159 | (SIM_AC_OPTION_ENDIAN): Set to hardwired big. | |
1160 | (SIM_AC_OPTION_HOST_ENDIAN): Add. | |
1161 | (AC_CHECK_FUNCS): Add utime. | |
1162 | (AC_CHECK_HEADERS): Add stdlib.h, string.h, strings.h, utime.h | |
1163 | configure: Regenerate. | |
72f4393d | 1164 | |
c906108c SS |
1165 | |
1166 | * Makefile.in (SIM_RUN_OBJS): Use nrun.o. | |
1167 | (SIM_OBJS): Add sim-io.o, sim-hload.o, sim-utils.o, sim-options.o, | |
1168 | sim-config.o, sim-module.o, sim-events.o, sim-core.o, | |
1169 | sim-endian.o, sim-engine.o, sim-trace.o, sim-profile.o | |
1170 | (SIM_ENDIAN, SIM_WARNGINS): Define. | |
1171 | ||
1172 | * simops.c (OP_10007E0): Use sim_io_* for transfers. | |
1173 | ||
1174 | * interp.c (sim_resume): Pass sd around. | |
1175 | ||
1176 | * simops.c (sim-main.h): Include. | |
1177 | ||
1178 | * gencode.c (write_template): Generate #include sim-main.h. | |
1179 | (write_opcodes): Ditto. | |
72f4393d | 1180 | |
c906108c SS |
1181 | * interp.c (prog_bfd, prog_bfd_was_opened_p): Delete. |
1182 | (v850_callback): Ditto. | |
1183 | (sim_kind, myname): Ditto. | |
1184 | (lookup_hash): Pass SD. Use sim_io_error. | |
1185 | (sim_set_memory_map): Pass in SD, use. | |
1186 | (init_system): Pass in SD, use. | |
1187 | (sim_open): Update. | |
1188 | (sim_set_profile): Delete. | |
1189 | (sim_set_profile_size): Delete. | |
1190 | (do_interrupt): Pass in SD, use. | |
1191 | (sim_info): Use sim_io_printf. | |
1192 | (sim_create_inferior): Reset registers. Set PC from prog_bfd | |
1193 | argument. | |
1194 | (sim_load): Delete, use common/sim-hload.c | |
1195 | (sim_size): Rename to sim_memory_init. | |
1196 | (sim_write): Remove call to init_system. | |
1197 | (init_system): Delete. | |
1198 | (sim_set_callbacks): Delete. | |
1199 | (sim_set_interrupt): Pass in SD, use. | |
1200 | (start_time): Delete. | |
72f4393d | 1201 | |
c906108c SS |
1202 | * v850_sim.h: Remove everything except `struct simops' from here. |
1203 | * sim-main.h: Move most to here. | |
1204 | * gencode.c: Move #includes to here. | |
1205 | ||
1206 | * sim-main.h(struct _sim_cpu): Rename struct _state. | |
1207 | (#define PC, et.al.): Update | |
1208 | (v850_callback): Delete. Replaced with SIM_DESC arg. | |
1209 | (int8, uint8, int16, uint16, int32, uint32): Define types using | |
1210 | unsigned8 et.al from common/sim-types.h. | |
1211 | * sim-main.h (State): Define as STATE_CPU. | |
1212 | ||
1213 | Mon Sep 1 12:07:55 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1214 | ||
1215 | * configure.in: Check for time, chmod. | |
1216 | * configure: Regenerate. | |
1217 | * simops.c (SYS_time, SYS_chmod): Use HAVE_TIME, HAVE_CHMOD. | |
72f4393d | 1218 | |
c906108c SS |
1219 | * simops.c (../../libgloss/v850/sys/syscall.h): Include instead of |
1220 | sys/syscall.h. | |
1221 | (OP_10007E0): Check the existance each SYS_* macro independantly. | |
1222 | ||
1223 | * v850_sim.h (SIGQUIT, SIGTRAP): Only define if missing. | |
1224 | ||
1225 | Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1226 | ||
1227 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
1228 | * config.in: Ditto. | |
1229 | ||
1230 | Tue Aug 26 10:42:38 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1231 | ||
1232 | * interp.c (sim_kill): Delete. | |
1233 | (sim_create_inferior): Add ABFD argument. | |
1234 | (sim_load): Move setting of PC from here. | |
1235 | (sim_create_inferior): To here. | |
1236 | ||
1237 | Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1238 | ||
1239 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
1240 | * config.in: Ditto. | |
1241 | ||
1242 | Mon Aug 25 11:31:23 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1243 | ||
1244 | * interp.c (sim_open): Add ABFD argument. | |
1245 | ||
1246 | Fri Aug 22 10:39:28 1997 Nick Clifton <nickc@cygnus.com> | |
1247 | ||
1248 | * simops.c (bsh): Only set CY flag if either of the bottom | |
1249 | bytes is zero. | |
72f4393d | 1250 | |
c906108c SS |
1251 | * simops.c (prepare, dispose): Lower numbered |
1252 | registers go to higher numbered address. | |
1253 | ||
1254 | * simops.c (unsigned divide instructions): S bit set if result has | |
1255 | top bit set. | |
72f4393d | 1256 | |
c906108c SS |
1257 | * simops.c (pushml, pushmh, popml, popmh): Lower numbered |
1258 | registers go to higher numbered address. | |
72f4393d | 1259 | |
c906108c SS |
1260 | Wed Aug 20 13:56:35 1997 Nick Clifton <nickc@cygnus.com> |
1261 | ||
1262 | * simops.c (OP_107E0, OP_107F0, OP_307E0, OP_307F0): Use correct | |
1263 | interpretation of SR bit in list18 structure. | |
1264 | (divn, divun): New functions to perform N step divide functions. | |
1265 | ||
1266 | Mon Aug 18 10:59:02 1997 Nick Clifton <nickc@cygnus.com> | |
1267 | ||
1268 | * simops.c (OP_300, OP_400, OP_60, OP_70): Support variant opcodes | |
1269 | with US bit set in the PSW. | |
1270 | ||
1271 | Wed Aug 13 19:06:55 1997 Nick Clifton <nickc@cygnus.com> | |
1272 | ||
1273 | * interp.c (sim_resume): Opcode functions return amount to be | |
1274 | added to PC and all opcodes take a standard format in the OP[] | |
1275 | array. | |
72f4393d | 1276 | |
c906108c SS |
1277 | (do_format_*): Functions removed. |
1278 | ||
1279 | * v850_sim.h (SP, EP): New register mnemonics. | |
72f4393d | 1280 | |
c906108c SS |
1281 | * gencode.c (write_header): Functions prototypes return an |
1282 | integer. | |
1283 | ||
1284 | * simops.c: Opcode functions return amount to be added to PC. | |
72f4393d | 1285 | |
c906108c | 1286 | * v850_sim.h (CTPC, CTPSW, CTBP): New register mnemonics. |
72f4393d | 1287 | |
c906108c | 1288 | * simops.c: Add support for v850e instructions. |
72f4393d | 1289 | |
c906108c | 1290 | * simops.c: Add support for v850eq instructions. |
72f4393d | 1291 | |
c906108c SS |
1292 | Tue May 20 10:24:14 1997 Andrew Cagney <cagney@b1.cygnus.com> |
1293 | ||
1294 | * interp.c (sim_open): Add callback argument. | |
1295 | (sim_set_callbacks): Delete SIM_DESC argument. | |
1296 | ||
1297 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> | |
1298 | ||
1299 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
1300 | ||
1301 | Wed Apr 23 17:20:16 1997 Doug Evans <dje@canuck.cygnus.com> | |
1302 | ||
1303 | * interp.c (prog_bfd_was_opened_p): New static local. | |
1304 | (prog_bfd): New global variable. | |
1305 | (sim_open): Undo patch to add -E support. | |
1306 | (sim_close): Close prog_bfd if sim_load opened it. | |
1307 | (sim_load): Record bfd of loaded file in prog_bfd. | |
1308 | * simops.c (prog_bfd): Renamed from exec_bfd. | |
1309 | ||
1310 | Fri Apr 18 14:17:12 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1311 | ||
1312 | * interp.c (sim_stop): Stub function. | |
1313 | ||
1314 | Thu Apr 17 03:53:18 1997 Doug Evans <dje@canuck.cygnus.com> | |
1315 | ||
1316 | * Makefile.in (SIM_OBJS): Add sim-load.o. | |
1317 | * interp.c (sim_kind, myname): New static locals. | |
1318 | (sim_open): Set sim_kind, myname. Ignore -E arg. | |
1319 | (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to | |
1320 | load file into simulator. Set start address from bfd. | |
1321 | (sim_create_inferior): Return SIM_RC. Delete arg start_address. | |
1322 | ||
1323 | Wed Apr 16 19:53:55 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1324 | ||
1325 | * simops.c (OP_10007E0): Only provide system calls SYS_execv, | |
1326 | SYS_wait, SYS_wait, SYS_utime, SYS_time if defined by the host. | |
1327 | ||
1328 | Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1329 | ||
1330 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
1331 | * config.in: Ditto. | |
1332 | ||
1333 | Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> | |
1334 | ||
1335 | * interp.c (sim_open): New arg `kind'. | |
1336 | ||
1337 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
1338 | ||
1339 | Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1340 | ||
1341 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
1342 | ||
1343 | Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1344 | ||
1345 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
1346 | ||
1347 | Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1348 | ||
1349 | * configure: Re-generate. | |
1350 | ||
1351 | Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com> | |
1352 | ||
1353 | * configure: Regenerate to track ../common/aclocal.m4 changes. | |
1354 | ||
1355 | Thu Mar 13 13:00:54 1997 Doug Evans <dje@canuck.cygnus.com> | |
1356 | ||
1357 | * interp.c (sim_open): New SIM_DESC result. Argument is now | |
1358 | in argv form. | |
1359 | (other sim_*): New SIM_DESC argument. | |
1360 | ||
1361 | Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com> | |
1362 | ||
1363 | * Makefile.in (@COMMON_MAKEFILE_FRAG): Use | |
1364 | COMMON_{PRE,POST}_CONFIG_FRAG instead. | |
1365 | * configure.in: sinclude ../common/aclocal.m4. | |
1366 | * configure: Regenerated. | |
1367 | ||
1368 | Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com) | |
1369 | ||
1370 | * configure configure.in Makefile.in: Update to new configure | |
1371 | scheme which is more compatible with WinGDB builds. | |
1372 | * configure.in: Improve comment on how to run autoconf. | |
1373 | * configure: Re-run autoconf to get new ../common/aclocal.m4. | |
1374 | * Makefile.in: Use autoconf substitution to install common | |
1375 | makefile fragment. | |
1376 | ||
1377 | Mon Jan 20 16:05:34 1997 Michael Meissner <meissner@tiktok.cygnus.com> | |
1378 | ||
1379 | * simops.c (OP_{E0,2E0,6E0}): The multiply operations sign extend, | |
1380 | not zero extend. | |
1381 | ||
1382 | Tue Jan 14 17:06:03 1997 Stu Grossman (grossman@critters.cygnus.com) | |
1383 | ||
1384 | * simops.c: Put ifdefs around things to make MSVC happy. Get rid | |
1385 | of unistd.h. Disable SYS_stat, SYS_chown, SYS_time, SYS_times, | |
1386 | SYS_gettimeofday and SYS_utime from MSVC. | |
1387 | ||
1388 | Tue Dec 31 18:11:13 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
1389 | ||
1390 | * simops.c (OP_10007E0): Know that kill encodes the signal number | |
1391 | via: 0xdead0000 | signal and turn it back into a signal. | |
1392 | ||
1393 | Fri Dec 27 14:44:06 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
1394 | ||
1395 | * v850_sim.h (SIG_V850_EXIT): Define as -1. | |
1396 | ||
1397 | * interp.c (sim_open): Cast calloc function. | |
1398 | (sim_stop_reason): If signal is SIG_V850_EXIT, inform gdb the | |
1399 | program exited with the appropriate exit code. | |
1400 | (sim_set_interrupt): Declare buildargv. | |
1401 | ||
1402 | * simops.c (OP_10007E0): Make exit signal normal exit. Make time | |
1403 | type correct and work on big endian systems. | |
1404 | ||
1405 | Wed Nov 20 02:18:44 1996 Doug Evans <dje@canuck.cygnus.com> | |
1406 | ||
1407 | * Makefile.in: Delete stuff moved to ../common/Make-common.in. | |
1408 | (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define. | |
1409 | * configure.in: Simplify using macros in ../common/aclocal.m4. | |
1410 | Call AC_CHECK_HEADERS(unistd.h). | |
1411 | * configure: Regenerated. | |
1412 | * config.in: New file. | |
1413 | * simops.c: #include "config.h". #include <unistd.h> if present. | |
1414 | ||
1415 | Sun Nov 3 23:02:54 1996 Stan Shebs <shebs@andros.cygnus.com> | |
1416 | ||
1417 | * v850_sim.h (State): New slots dummy_mem, pending_nmi. | |
1418 | (EIPC, etc): New macros for system registers. | |
1419 | * simops.c, interp.c: Use everywhere. | |
1420 | ||
1421 | * interp.c: Add support for interrupts issued by interrupt | |
1422 | generators, either PC- or time-based. Controlled by simulator | |
1423 | command "sim interrupt". | |
1424 | ||
1425 | * interp.c: Add support for variable-size allocation of memory, | |
1426 | via simulator command "sim memory-map". | |
1427 | (map): Issue SIGSEGV for references to invalid memory regions. | |
72f4393d | 1428 | |
c906108c | 1429 | Thu Oct 31 14:44:10 1996 Gavin Koch <gavin@cygnus.com> |
72f4393d L |
1430 | |
1431 | * simops.c: Include <sys/time.h> for struct timeval and | |
1432 | struct timezone. | |
1433 | ||
c906108c SS |
1434 | Wed Oct 30 08:49:10 1996 Jeffrey A Law (law@cygnus.com) |
1435 | ||
1436 | * simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday. | |
1437 | ||
1438 | * simops.c (OP_10007E0): Handle SYS_time. | |
1439 | ||
1440 | Tue Oct 29 14:22:55 1996 Jeffrey A Law (law@cygnus.com) | |
1441 | ||
1442 | * simops.c: Include <sys/stat.h>. | |
1443 | (OP_10007E0): Handle SYS_stat. | |
1444 | ||
1445 | Thu Oct 24 12:26:35 1996 Jeffrey A Law (law@cygnus.com) | |
1446 | ||
1447 | * simops.c (OP_10007E0): Don't declare errno. | |
1448 | ||
1449 | * simops.c (OP_500): Mask off low bit in displacement | |
1450 | for sld.w. | |
1451 | (OP_501): Similarly. | |
1452 | ||
1453 | * simops.c (OP_500): Fix displacement handling for sld.w. | |
1454 | (OP_501): Similarly for sst.w. | |
1455 | ||
1456 | * simops.c (trace_input): Remove all references to SEXT7. | |
1457 | (OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement | |
1458 | is zero extended for sst/sld instructions. | |
1459 | * v850_sim.h (SEX7): Delete. It's no longer needed (and it | |
1460 | was incorrect anyway). | |
1461 | ||
1462 | Thu Oct 24 10:33:33 1996 Stu Grossman (grossman@critters.cygnus.com) | |
1463 | ||
1464 | * Makefile.in: Get rid of srcroot. Set all INSTALL macros via | |
1465 | autoconf. | |
1466 | * gencode.c (write_opcodes): Pad operands field to account for | |
1467 | MSVC braindamage. | |
1468 | * simops.c: Include errno.h. Exclude SYS_chown, since MSVC | |
1469 | doesn't support it. (Why is this here in the first place?!?) | |
1470 | * v850_sim.h: Get rid of 64 bit defs. Also, get rid of #elif's. | |
1471 | Change number of operands in struct simops from 9 to 6. Define | |
1472 | SIGTRAP and SIGQUIT for MSVC. | |
1473 | ||
1474 | Tue Oct 15 16:19:51 1996 Stu Grossman (grossman@critters.cygnus.com) | |
1475 | ||
1476 | * interp.c (MEM_SIZE): It's now bytes, not a power of 2. | |
1477 | * (map): Add support for external mem in the 1->2 meg range. | |
1478 | Also, abort() when memory access is way out of bounds. (Better to | |
1479 | die than to give wrong result. (This will be fixed later.)) | |
1480 | * (sim_size): MEM_SIZE is now bytes, not shift factor. | |
1481 | ||
1482 | Tue Oct 1 15:53:24 1996 Gavin Koch <gavin@cygnus.com> | |
72f4393d L |
1483 | |
1484 | * simops.c (trace_input): Swapped order of operands for output | |
1485 | output of OP_IMM_REG. Changed the fetching of the operands for | |
1486 | OP_LOAD32, and OP_STORE32 to work like op-function. | |
1487 | ||
c906108c SS |
1488 | Mon Sep 30 15:46:33 1996 Stu Grossman (grossman@critters.cygnus.com) |
1489 | ||
1490 | * interp.c: Move includes of remote-sim.h and callback.h to | |
1491 | v850-sim.h. | |
1492 | * (lookup_hash): Add PC to report of hash failure. | |
1493 | * (map load_mem store_mem): New memory subsystem. Models V851 | |
1494 | memory system. | |
1495 | * (sim_write sim_read): Use new memory subsystem. | |
1496 | * (sim_resume): Don't load and save PC into EIPC anymore. Needed | |
1497 | to make user-defined traps work right. | |
1498 | * simops.c (OP_*): Use new memory subsystem. | |
1499 | * (OP_14007E0 (reti)): Implement reti. | |
1500 | * (OP_14996E0 (trap)): Implement user-defined traps. Move I/O to | |
1501 | trap 31. Use new memory subsystem. | |
1502 | * v850_sim.h: Prototypes for load_mem, store_mem and map. Use | |
1503 | load_mem in RLW macro. | |
1504 | ||
1505 | Fri Sep 27 18:34:09 1996 Stu Grossman (grossman@critters.cygnus.com) | |
1506 | ||
1507 | * gencode.c (write_opcodes): Output hex values for opcode mask | |
1508 | and patterns. | |
1509 | * interp.c (sim_resume): Save and restore PC from the appropriate | |
1510 | register. | |
1511 | * (sim_fetch_register sim_store_register): Fix byte-order problem | |
1512 | with reading and writing registers. | |
1513 | * simops.c (OP_FFFF): Implement pseudo-breakpoint insn. | |
1514 | ||
1515 | Fri Sep 27 17:42:37 1996 Jeffrey A Law (law@cygnus.com) | |
1516 | ||
72f4393d | 1517 | * simops.c (trace_input): Fix thinko. |
c906108c SS |
1518 | |
1519 | Wed Sep 18 09:54:12 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
1520 | ||
1521 | * simops.c (exec_bfd): Rename from sim_bfd. | |
1522 | (trace_input): Ditto. | |
1523 | ||
1524 | Thu Sep 12 12:03:05 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
1525 | ||
1526 | * simops.c (trace_input): Use find_nearest_line to print line | |
1527 | number, function name or file name of PC. | |
1528 | ||
1529 | Wed Sep 11 16:44:37 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
1530 | ||
1531 | * simops.c: Add tracing support. Use SEXTxx macros instead of | |
1532 | doing hardwired shifts. | |
1533 | ||
1534 | * configure.in (--enable-sim-cflags): Add switch to add additional | |
1535 | flags to simulator buld. If --enable-sim-cflags=trace, turn on | |
1536 | tracing. | |
1537 | * configure: Regenerate. | |
1538 | ||
1539 | * Makefile.in: Don't require a VPATH capable make if configuring | |
1540 | in the same directory. Don't use CFLAGS for configuration flags. | |
1541 | Add flags from --enable-sim-cflags. Support canadian cross | |
1542 | builds. Rebuild whole simulator if include files change. | |
1543 | ||
1544 | * interp.c (v850_debug): New global for debugging. | |
1545 | (lookup_hash,sim_size,sim_set_profile): Use | |
1546 | printf_filtered callback, instead of calling printf directly. | |
1547 | (sim_{open,trace}): Enable tracing if -t and compiled for tracing. | |
1548 | ||
1549 | * v850_sim.h: Use limits.h to set the various sized types. | |
1550 | (SEXT{5,7,16,22}): New macros. | |
1551 | ||
1552 | Mon Sep 9 20:50:46 1996 Jeffrey A Law (law@cygnus.com) | |
1553 | ||
1554 | * interp.c (hash): Make this an inline function | |
1555 | when compiling with GCC. Simplify. | |
1556 | * simpos.c: Explicitly include "sys/syscall.h". Remove | |
1557 | some #if 0'd code. Enable more emulated syscalls. | |
1558 | ||
1559 | Wed Sep 4 01:48:55 1996 Jeffrey A Law (law@cygnus.com) | |
1560 | ||
1561 | * interp.c: Fix sign bit handling for add and sub instructions. | |
1562 | ||
1563 | Tue Sep 3 10:20:30 1996 Jeffrey A Law (law@cygnus.com) | |
1564 | ||
1565 | * gencode.c: Fix various indention & style problems. | |
1566 | Remove test code. Remove #if 0 code. | |
1567 | * interp.c: Provide prototypes for all static functions. | |
1568 | Fix minor indention problems. | |
1569 | (sim_open, sim_resume): Remove unused variables. | |
1570 | (sim_read): Return type is "int". | |
1571 | * simops.c: Remove unused variables. | |
1572 | (divh): Make result of divide-by-zero zero. | |
1573 | (setf): Initialize result to keep compiler quiet. | |
1574 | (sar instructions): These just clear the overflow bit. | |
1575 | * v850_sim.h: Provide prototypes for put_byte, put_half | |
1576 | and put_word. | |
1577 | ||
1578 | * interp.c: OP should be an array of 32bit operands! | |
1579 | (v850_callback): Declare. | |
1580 | (do_format_5): Fix extraction of OP[0]. | |
1581 | (sim_size): Remove debugging printf. | |
1582 | (sim_set_callbacks): Do something useful. | |
1583 | (sim_stop_reason): Gross hacks to get c-torture running. | |
1584 | * simops.c: Simplify code for computing targets of bCC | |
1585 | insns. Invert 's' bit if 'ov' bit is set for some | |
1586 | instructions. Fix 'cy' bit handling for numerous | |
1587 | instructions. Make the simulator stop when a halt | |
1588 | instruction is encountered. Very crude support for | |
1589 | emulated syscalls (trap 0). | |
1590 | * v850_sim.h: Include "callback.h" and declare | |
1591 | v850_callback. Items in the operand array are 32bits. | |
1592 | ||
1593 | Sun Sep 1 22:35:35 1996 Jeffrey A Law (law@cygnus.com) | |
1594 | ||
1595 | * interp.c (sim_resume): Fix code to check for a format 3 | |
1596 | opcode. | |
1597 | * simops.c: bCC insns only argument is a constant, not a | |
1598 | register value (duh...) | |
1599 | ||
1600 | Fri Aug 30 10:33:49 1996 Jeffrey A Law (law@cygnus.com) | |
1601 | ||
1602 | * simops.c: Fix "not1" and "set1". | |
1603 | ||
1604 | * simops.c: Don't forget to initialize temp for | |
1605 | "ld.h" and "ld.w" | |
1606 | ||
1607 | * interp.c: Remove various debugging printfs. | |
1608 | ||
1609 | * simops.c: Fix satadd, satsub boundary case handling. | |
1610 | ||
1611 | * interp.c (hash): Fix. | |
1612 | * interp.c (do_format_8): Get operands correctly and | |
1613 | call the target function. | |
1614 | * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1". | |
1615 | ||
1616 | Thu Aug 29 13:53:29 1996 Jeffrey A Law (law@cygnus.com) | |
1617 | ||
1618 | * interp.c (do_format_4): Get operands correctly and | |
1619 | call the target function. | |
1620 | * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b", | |
1621 | "sst.h", and "sst.w". | |
1622 | ||
1623 | * v850_sim.h: The V850 doesn't have split I&D spaces. Change | |
1624 | accordingly. Remove many unused definitions. | |
1625 | * interp.c: The V850 doesn't have split I&D spaces. Change | |
1626 | accordingly. | |
1627 | (get_longlong, get_longword, get_word): Deleted. | |
1628 | (write_longlong, write_longword, write_word): Deleted. | |
1629 | (get_operands): Deleted. | |
1630 | (get_byte, get_half, get_word): New functions. | |
1631 | (put_byte, put_half, put_word): New functions. | |
1632 | * simops.c: Remove unused functions. Rough cut at | |
1633 | "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns. | |
1634 | ||
1635 | * v850_sim.h (struct _state): Remove "psw" field. Add | |
1636 | "sregs" field. | |
1637 | (PSW): Remove bogus definition. | |
1638 | * simops.c: Change condition code handling to use the psw | |
1639 | register within the sregs array. Handle "ldsr" and "stsr". | |
1640 | ||
1641 | * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr". | |
1642 | ||
1643 | * interp.c (do_format_5): Get operands correctly and | |
1644 | call the target function. | |
1645 | (sim_resume): Don't do a PC update for format 5 instructions. | |
1646 | * simops.c: Handle "jarl" and "jmp" instructions. | |
1647 | ||
1648 | * simops.c: Fix minor typos. Handle "cmp", "setf", "tst" | |
1649 | "di", and "ei" instructions correctly. | |
1650 | ||
1651 | * interp.c (do_format_3): Get operands correctly and call | |
1652 | the target function. | |
1653 | * simops.c: Handle bCC instructions. | |
1654 | ||
1655 | * simops.c: Add condition code handling to shift insns. | |
1656 | Fix minor typos in condition code handling for other insns. | |
1657 | ||
1658 | * Makefile.in: Fix typo. | |
1659 | * simops.c: Add condition code handling to "sub" "subr" and | |
1660 | "divh" instructions. | |
1661 | ||
1662 | * interp.c (hash): Update to be more accurate. | |
1663 | (lookup_hash): Call hash rather than computing the hash | |
1664 | code here. | |
1665 | (do_format_1_2): Handle format 1 and format 2 instructions. | |
1666 | Get operands correctly and call the target function. | |
1667 | (do_format_6): Get operands correctly and call the target | |
1668 | function. | |
1669 | (do_formats_9_10): Rough cut so shift ops will work. | |
1670 | (sim_resume): Tweak to deal with format 1 and format 2 | |
1671 | handling in a single funtion. Don't update the PC | |
1672 | for format 3 insns. Fix typos. | |
1673 | * simops.c: Slightly reorganize. Add condition code handling | |
1674 | to "add", "addi", "and", "andi", "or", "ori", "xor", "xori" | |
1675 | and "not" instructions. | |
1676 | * v850_sim.h (reg_t): Registers are 32bits. | |
1677 | (_state): The V850 has 32 general registers. Add a 32bit | |
1678 | psw and pc register too. Add accessor macros | |
1679 | ||
1680 | * Makefile.in, interp.c, v850_sim.h: Bring over endianness | |
1681 | changes from the d10v simulator. | |
1682 | ||
1683 | * simops.c: Add shift support. | |
1684 | ||
1685 | * simops.c: Add multiply & divide support. Abort for system | |
1686 | instructions. | |
1687 | ||
1688 | * simops.c: Add logicals, mov, movhi, movea, add, addi, sub | |
1689 | and subr. No condition codes yet. | |
1690 | ||
1691 | Wed Aug 28 13:53:22 1996 Jeffrey A Law (law@cygnus.com) | |
1692 | ||
72f4393d | 1693 | * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h, |
c906108c SS |
1694 | gencode.c, interp.c, simops.c: Created. |
1695 |