]>
Commit | Line | Data |
---|---|---|
9bbf6f91 MF |
1 | 2016-01-04 Mike Frysinger <vapier@gentoo.org> |
2 | ||
3 | * configure: Regenerate. | |
4 | ||
77cf2ef5 MF |
5 | 2016-01-03 Mike Frysinger <vapier@gentoo.org> |
6 | ||
7 | * interp.c (sim_open): Update sim_parse_args comment. | |
8 | ||
0cb8d851 MF |
9 | 2016-01-03 Mike Frysinger <vapier@gentoo.org> |
10 | ||
11 | * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete. | |
12 | * configure: Regenerate. | |
13 | ||
1ac72f06 MF |
14 | 2016-01-02 Mike Frysinger <vapier@gentoo.org> |
15 | ||
16 | * configure.ac (SIM_AC_OPTION_ENDIAN): Change LITTLE_ENDIAN to | |
17 | LITTLE. | |
18 | * configure: Regenerate. | |
19 | ||
e1211e55 MF |
20 | 2015-12-30 Mike Frysinger <vapier@gentoo.org> |
21 | ||
22 | * wrapper.c (v850_reg_store, v850_reg_fetch): Define. | |
23 | (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE. | |
24 | (sim_store_register): Rename to ... | |
25 | (v850_reg_store): ... this. | |
26 | (sim_fetch_register): Rename to ... | |
27 | (v850_reg_fetch): ... this. | |
28 | ||
5e744ef8 MF |
29 | 2015-12-27 Mike Frysinger <vapier@gentoo.org> |
30 | ||
31 | * Makefile.in (SIM_OBJS): Delete sim-hload.o. | |
32 | ||
1b393626 MF |
33 | 2015-12-26 Mike Frysinger <vapier@gentoo.org> |
34 | ||
35 | * config.in, configure: Regenerate. | |
36 | ||
84e8e361 MF |
37 | 2015-12-24 Mike Frysinger <vapier@gentoo.org> |
38 | ||
39 | * sim-main.h (WITH_WATCHPOINTS): Delete. | |
40 | ||
1d19cae7 DV |
41 | 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com> |
42 | ||
43 | * simops.c (v850_bins): Fix left shift of negative value. | |
44 | ||
c389945b MF |
45 | 2015-11-17 Mike Frysinger <vapier@gentoo.org> |
46 | ||
47 | * sim-main.h (WITH_CORE): Delete. | |
48 | ||
cdf850e9 MF |
49 | 2015-11-17 Mike Frysinger <vapier@gentoo.org> |
50 | ||
51 | * sim-main.h (WITH_MODULO_MEMORY): Delete. | |
52 | ||
797eee42 MF |
53 | 2015-11-15 Mike Frysinger <vapier@gentoo.org> |
54 | ||
55 | * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o. | |
56 | ||
6e4f085c MF |
57 | 2015-11-14 Mike Frysinger <vapier@gentoo.org> |
58 | ||
59 | * interp.c (sim_close): Delete. | |
60 | ||
8d0978fb MF |
61 | 2015-06-23 Mike Frysinger <vapier@gentoo.org> |
62 | ||
63 | * configure: Regenerate. | |
64 | ||
a3487082 MF |
65 | 2015-06-12 Mike Frysinger <vapier@gentoo.org> |
66 | ||
67 | * configure: Regenerate. | |
68 | ||
306f4178 MF |
69 | 2015-06-12 Mike Frysinger <vapier@gentoo.org> |
70 | ||
71 | * configure: Regenerate. | |
72 | ||
5d19c366 MF |
73 | 2015-06-11 Mike Frysinger <vapier@gentoo.org> |
74 | ||
75 | * interp.c (INLINE): Delete define. | |
76 | ||
20bca71d MF |
77 | 2015-04-18 Mike Frysinger <vapier@gentoo.org> |
78 | ||
79 | * sim-main.h (SIM_CPU): Delete. | |
80 | ||
7e83aa92 MF |
81 | 2015-04-18 Mike Frysinger <vapier@gentoo.org> |
82 | ||
83 | * sim-main.h (sim_cia): Delete. | |
84 | ||
034685f9 MF |
85 | 2015-04-17 Mike Frysinger <vapier@gentoo.org> |
86 | ||
87 | * sim-main.h (CIA_GET, CIA_SET): Delete. | |
88 | ||
78e9aa70 MF |
89 | 2015-04-15 Mike Frysinger <vapier@gentoo.org> |
90 | ||
91 | * Makefile.in (SIM_OBJS): Delete sim-cpu.o. | |
92 | * sim-main.h (STATE_CPU): Delete. | |
93 | ||
bf12d44e MF |
94 | 2015-04-13 Mike Frysinger <vapier@gentoo.org> |
95 | ||
96 | * configure: Regenerate. | |
97 | ||
14c9ad2e MF |
98 | 2015-04-13 Mike Frysinger <vapier@gentoo.org> |
99 | ||
100 | * Makefile.in (SIM_OBJS): Add sim-cpu.o. | |
101 | * interp.c (v850_pc_get, v850_pc_set): New functions. | |
102 | (sim_open): Declare new local var i. Call sim_cpu_alloc_all. | |
103 | Call CPU_PC_FETCH & CPU_PC_STORE for all cpus. | |
104 | (sim_pc_get): Delete. | |
105 | * sim-main.h (SIM_CPU): Define. | |
106 | (struct sim_state): Change cpu to an array of pointers. | |
107 | (STATE_CPU): Drop &. | |
108 | ||
122bbfb5 MF |
109 | 2015-04-06 Mike Frysinger <vapier@gentoo.org> |
110 | ||
111 | * Makefile.in (SIM_OBJS): Delete sim-engine.o and sim-hrw.o. | |
112 | ||
aadc9410 MF |
113 | 2015-03-31 Mike Frysinger <vapier@gentoo.org> |
114 | ||
115 | * config.in, configure: Regenerate. | |
116 | ||
05f53ed6 MF |
117 | 2015-03-24 Mike Frysinger <vapier@gentoo.org> |
118 | ||
119 | * interp.c (sim_pc_get): New function. | |
120 | ||
ae7d0cac MF |
121 | 2015-03-16 Mike Frysinger <vapier@gentoo.org> |
122 | ||
123 | * config.in, configure: Regenerate. | |
124 | ||
465fb143 MF |
125 | 2015-03-14 Mike Frysinger <vapier@gentoo.org> |
126 | ||
127 | * Makefile.in (SIM_RUN_OBJS): Delete. | |
128 | ||
5cddc23a MF |
129 | 2015-03-14 Mike Frysinger <vapier@gentoo.org> |
130 | ||
131 | * configure.ac (AC_CHECK_HEADERS): Delete unistd.h & stdlib.h & | |
132 | string.h & strings.h & time.h. | |
133 | * aclocal.m4, configure: Regenerate. | |
134 | ||
a3976a7c NC |
135 | 2015-02-27 Nick Clifton <nickc@redhat.com> |
136 | ||
137 | * sim-main.h (reg64_t): New type. | |
138 | (v850_regs): Add selID_sregs field. | |
139 | (VR, SAT16, SAT32, ABS16, ABS32 ): New macros. | |
140 | * v850-dc: Add fields for v850e3v5 instructions. | |
141 | * v850.igen (cvtf.dl): Use correctly signed local value. | |
142 | (cvtf.dw, cvtf.sw, trncf.dul, trncf.dl, trncf.sul, trncf.sw): | |
143 | Likewise. | |
144 | * interp.c: Fix old style function declarations. | |
145 | * simops.c: Likewise. | |
146 | ||
9ad55e9b NC |
147 | 2015-02-24 Nick Clifton <nickc@redhat.com> |
148 | ||
149 | * v850.igen: Add more e3v5 support. | |
150 | (FMAF.S): New pattern. | |
151 | (FMSF.S): New pattern. | |
152 | (FNMAF.S): New pattern. | |
153 | (FNMSF.S): New pattern. | |
154 | (cnvq15q30): New pattern. | |
155 | (cnvq30q15): New pattern. | |
156 | (cnvq31q62): New pattern. | |
157 | (cnvq62q31): New pattern. | |
158 | (dup.h): New pattern. | |
159 | (dup.w): New pattern. | |
160 | (expq31): New pattern. | |
161 | (modadd): New pattern. | |
162 | (mov.dw): New pattern. | |
163 | (mov.h): New pattern. | |
164 | (mov.w): New pattern. | |
165 | (pki16i32): New pattern. | |
166 | (pki16ui8): New pattern. | |
167 | (pki32i16): New pattern. | |
168 | (pki64i32): New pattern. | |
169 | (pkq15q31): New pattern. | |
170 | (pkq30q31): New pattern. | |
171 | (pkq31q15): New pattern. | |
172 | (pkui8i16): New pattern. | |
173 | (vabs.h): New pattern. | |
174 | (vabs.w): New pattern. | |
175 | (vadd.dw): New placeholder pattern. | |
176 | (vadd.h): New placeholder pattern. | |
177 | (vadd.w): New placeholder pattern. | |
178 | (vadds.h): New placeholder pattern. | |
179 | (vadds.w): New placeholder pattern. | |
180 | (vaddsat.h): New placeholder pattern. | |
181 | (vaddsat.w): New placeholder pattern. | |
182 | (vand): New pattern. | |
183 | (vbiq.h): New placeholder pattern. | |
184 | (vbswap.dw): New placeholder pattern. | |
185 | (vbswap.h): New placeholder pattern. | |
186 | (vbswap.w): New placeholder pattern. | |
187 | (vcalc.h): New placeholder pattern. | |
188 | (vcalc.w): New placeholder pattern. | |
189 | (vcmov): New placeholder pattern. | |
190 | ||
2974be62 AM |
191 | 2014-08-19 Alan Modra <amodra@gmail.com> |
192 | ||
193 | * configure: Regenerate. | |
194 | ||
faa743bb RM |
195 | 2014-08-15 Roland McGrath <mcgrathr@google.com> |
196 | ||
197 | * configure: Regenerate. | |
198 | * config.in: Regenerate. | |
199 | ||
1a8a700e MF |
200 | 2014-03-04 Mike Frysinger <vapier@gentoo.org> |
201 | ||
202 | * configure: Regenerate. | |
203 | ||
bf3d9781 AM |
204 | 2013-09-23 Alan Modra <amodra@gmail.com> |
205 | ||
206 | * configure: Regenerate. | |
207 | ||
31e6ad7d MF |
208 | 2013-06-03 Mike Frysinger <vapier@gentoo.org> |
209 | ||
210 | * aclocal.m4, configure: Regenerate. | |
211 | ||
fd7b2a54 NC |
212 | 2013-05-13 Nick Clifton <nickc@redhat.com> |
213 | ||
214 | * v850.igen (LDSR): Accept but ignore a selID parameter. | |
215 | ||
d3685d60 TT |
216 | 2013-05-10 Freddie Chopin <freddie_chopin@op.pl> |
217 | ||
218 | * configure: Rebuild. | |
219 | ||
67d7515b NC |
220 | 2013-01-28 Nick Clifton <nickc@redhat.com> |
221 | ||
222 | * simops.c (v850_rotl): New function. | |
223 | (v850_bins): New function. | |
224 | * simops.h: Add prototypes fir v850_rotl and v850_bins. | |
225 | * v850-dc: Add entries for V850e3v5. | |
226 | * v850.igen: Add support for v850e3v5. | |
227 | (ld.dw, st.dw, rotl, bins): New patterns. | |
228 | ||
85367826 NC |
229 | 2013-01-10 Nick Clifton <nickc@redhat.com> |
230 | ||
231 | * interp.c (sim_open): Add support for bfd_arch_v850_rh850 | |
232 | architecture type. Add support for bfd_mach_v850e2 and | |
233 | bfd_mach_v850e2v3 machine numbers. | |
72f4393d L |
234 | * v850.igen (dbtrap): Add support for SIM_OPEN_DEBUG. |
235 | (cmpf.d): Correct order of operands. | |
236 | (cmpf.s): Likewise. | |
237 | (trncf.dul): New pattern. | |
238 | (trncf.duw): New pattern. | |
239 | (trncf.sul): New pattern. | |
240 | (trncf.suw): New pattern. | |
241 | * v850-dc: Correct bitfield selection for TRNCF.SW and CVTF.SW. | |
85367826 | 242 | |
d99ff40f NC |
243 | 2012-09-13 Nick Clifton <nickc@redhat.com> |
244 | ||
245 | * v850.igen (W,WWWW): Correct computation of register number. | |
246 | (JR32): Remove unnecessary comma. | |
247 | (cmovf.s): Register 0 is an invalid source register. | |
248 | (maddf.s): Remove bogus intermediary rounding. | |
249 | (nmaddf.s): Likewise. | |
250 | (trncf.sl): Remove bogus initial rounding. | |
251 | (trncf.dw): Likewise. | |
252 | (trncf.sl): Likewise. | |
253 | (trncf.sw): Likewise. | |
254 | ||
5f3ef9d0 JB |
255 | 2012-06-15 Joel Brobecker <brobecker@adacore.com> |
256 | ||
257 | * config.in, configure: Regenerate. | |
258 | ||
2aaed979 KB |
259 | 2012-03-28 Rathish C <rathish.c@kpitcummins.com> |
260 | ||
261 | * sim-main.h (struct _v850_regs): Add new fields mpu0_sregs, | |
262 | mpu1_sregs, and fpu_sregs. | |
263 | (MPU0_SR, MPU1_SR, FPU_SR): New macros for accessing new fields | |
264 | in _v850_regs struct. | |
265 | (SP_REGNO): Define. | |
266 | (SP): Redefine using SP_REGNO. | |
267 | (PSW_REGNO, EIIC, FEIC, DBIC, DIR, EIWR, FEWR, DBWR, BSEL, PSW_NPV) | |
268 | (PSW_DMP, PSW_IMP, ECR_EICC, ECR_FECC, FPSR, FPSR_REGNO, FPEPC) | |
269 | (FPST, FPST_REGNO, FPCC, FPCFG, FPCFG_REGNO, FPSR_DEM, FPSR_SEM) | |
270 | (FPSR_RM, FPSR_RN, FPSR_FS, FPSR_PR, FPSR_XC, FPSR_XCE, FPSR_XCV) | |
271 | (FPSR_XCZ, FPSR_XCO, FPSR_XCU, FPSR_XCI, FPSR_XE, FPSR_XEV) | |
272 | (FPSR_XEZ, FPSR_XEO, FPSR_XEU, FPSR_XEI, FPSR_XP, FPSR_XPV) | |
273 | (FPSR_XPZ, FPSR_XPO, FPSR_XPU, FPSR_XPI, FPST_PR, FPST_XCE) | |
274 | (FPST_XCV, FPST_XCZ, FPST_XCO, FPST_XCU, FPST_XCI, FPST_XPV) | |
275 | (FPST_XPZ, FPST_XPO, FPST_XPU, FPST_XPI, FPCFG_RM, FPCFG_XEV) | |
276 | (FPCFG_XEZ, FPCFG_XEO, FPCFG_XEU, FPCFG_XEI, GET_FPCC, CLEAR_FPCC) | |
277 | (SET_FPCC, TEST_FPCC, FPSR_GET_ROUND, MPM, MPC, MPC_REGNO, TID) | |
278 | (PPA, PPM, PPC, DCC, DCV0, DCV1, SPAL, SPAU, IPA0L, IPA0U, IPA1L) | |
279 | (IPA1U, IPA2L, IPA2U, IPA3L, IPA3U, DPA0L, DPA0U, DPA1L, DPA1U) | |
280 | (DPA2L, DPA2U, DPA3L, DPA3U, PPC_PPE, SPAL_SPE, SPAL_SPS, VIP) | |
281 | (VMECR, VMTID, VMADR, VPECR, VPTID, VPADR, VDECR, VDTID, MPM_AUE) | |
282 | (MPM_MPE, VMECR_VMX, VMECR_VMR, VMECR_VMW, VMECR_VMS, VMECR_VMRMW) | |
283 | (VMECR_VMMS, IPA2ADDR, IPA_IPE, IPA_IPX, IPA_IPR, IPE0, IPE1, IPE2) | |
284 | (IPE3, IPX0, IPX1, IPX2, IPX3, IPR0, IPR1, IPR2, IPR3, DPA2ADDR) | |
285 | (DPA_DPE, DPA_DPR, DPA_DPW, DPE0, DPE1, DPE2, DPE3, DPR0, DPR1) | |
286 | (DPR2, DPR3, DPW0, DPW1, DPW2, DPW3, DCC_DCE0, DCC_DCE1, PPA2ADDR) | |
287 | (PPC_PPC, PPC_PPE, PPC_PPM): New macros. | |
288 | (FPU_COMPARE): New enum. | |
289 | (TRACE_FP_INPUT_FPU1, TRACE_FP_INPUT_FPU2, TRACE_FP_INPUT_FPU3) | |
290 | (TRACE_FP_INPUT_BOOL1_FPU2, TRACE_FP_INPUT_WORD2) | |
291 | (TRACE_FP_RESULT_WORD1, TRACE_FP_RESULT_WORD2): New macros. | |
292 | * simops.c (Add32): Update prototype. | |
293 | (update_fpsr): New function. | |
294 | (SignalException): New function. | |
295 | (SignalExceptionFPE): New function. | |
296 | (check_invalid_snan): New function. | |
297 | (v850_float_compare): New function. | |
298 | (v850_div): New function. | |
299 | (v850_divu): New function. | |
300 | (v850_sar): New function. | |
301 | (v850_shl): New function. | |
302 | (v850_shr): New function. | |
303 | (v850_satadd): New function. | |
304 | (v850_satsub): New function. | |
305 | (load_data_mem): New function. | |
306 | (store_data_mem): New function. | |
307 | (mpu_load_mem_test): New function. | |
308 | (mpu_store_mem_test): New function. | |
309 | * simops.h: Add function prototype for above mentioned functions. | |
310 | (check_cvt_fi, check_cvt_if, check_cvt_ff): Define. | |
311 | * v850-dc: Add entry for v850e2 and v850e2v3. | |
312 | * v850.igen: Add support for v850e2 and v850e2v3. | |
313 | ||
2232061b MF |
314 | 2012-03-24 Mike Frysinger <vapier@gentoo.org> |
315 | ||
316 | * aclocal.m4, config.in, configure: Regenerate. | |
317 | ||
db2e4d67 MF |
318 | 2011-12-03 Mike Frysinger <vapier@gentoo.org> |
319 | ||
320 | * aclocal.m4: New file. | |
321 | * configure: Regenerate. | |
322 | ||
9c082ca8 MF |
323 | 2011-10-17 Mike Frysinger <vapier@gentoo.org> |
324 | ||
325 | * configure.ac: Change include to common/acinclude.m4. | |
326 | ||
6ffe910a MF |
327 | 2011-10-17 Mike Frysinger <vapier@gentoo.org> |
328 | ||
329 | * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER | |
330 | call. Replace common.m4 include with SIM_AC_COMMON. | |
331 | * configure: Regenerate. | |
332 | ||
2419798b MF |
333 | 2011-07-05 Mike Frysinger <vapier@gentoo.org> |
334 | ||
335 | * interp.c (sim_do_command): Delete. | |
336 | ||
d0f0baa2 KB |
337 | 2011-03-21 Kevin Buettner <kevinb@redhat.com> |
338 | ||
339 | * simops (OP_10007E0): Update errno handling as most traps | |
340 | do not invoke the host's functionality directly. Invoke | |
341 | sim_io_stat() instead of stat() for implementing TARGET_SYS_stat. | |
342 | Implement TARGET_SYS_fstat, TARGET_SYS_rename, and TARGET_SYS_unlink. | |
343 | ||
d79fe0d6 MF |
344 | 2011-02-14 Mike Frysinger <vapier@gentoo.org> |
345 | ||
346 | * simops.c (OP_10007E0): Change zfree to free. | |
347 | ||
dae477fe AB |
348 | 2011-01-11 Andrew Burgess <aburgess@broadcom.com> |
349 | ||
350 | * interp.c (sim_store_register): Update return value to | |
351 | match new API. | |
352 | ||
4e9586f0 MF |
353 | 2010-03-30 Mike Frysinger <vapier@gentoo.org> |
354 | ||
355 | * interp.c (interrupt_names): Add const to pointer type. | |
356 | (do_interrupt): Add const to interrupt_name. | |
357 | ||
3725885a RW |
358 | 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
359 | ||
360 | * configure: Regenerate. | |
361 | ||
d6416cdc RW |
362 | 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
363 | ||
81ecdfbb RW |
364 | * config.in: Regenerate. |
365 | * configure: Likewise. | |
366 | ||
d6416cdc RW |
367 | * configure: Regenerate. |
368 | ||
b5bd9624 HPN |
369 | 2008-07-11 Hans-Peter Nilsson <hp@axis.com> |
370 | ||
371 | * configure: Regenerate to track ../common/common.m4 changes. | |
372 | * config.in: Ditto. | |
373 | ||
6efef468 | 374 | 2008-06-06 Vladimir Prus <vladimir@codesourcery.com> |
72f4393d L |
375 | Daniel Jacobowitz <dan@codesourcery.com> |
376 | Joseph Myers <joseph@codesourcery.com> | |
6efef468 JM |
377 | |
378 | * configure: Regenerate. | |
379 | ||
c5fbc25b DD |
380 | 2008-02-05 DJ Delorie <dj@redhat.com> |
381 | ||
98e460c3 DD |
382 | * simops.c (OP_1C007E0): Compensate for 64 bit hosts. |
383 | (OP_18007E0): Likewise. | |
384 | (OP_2C007E0): Likewise. | |
385 | (OP_28007E0): Likewise. | |
386 | * v850.igen (divh): Likewise. | |
72f4393d | 387 | |
c5fbc25b DD |
388 | * simops.c (OP_C0): Correct saturation logic. |
389 | (OP_220): Likewise. | |
390 | (OP_A0): Likewise. | |
391 | (OP_660): Likewise. | |
392 | (OP_80): Likewise. | |
393 | ||
394 | * simops.c (OP_2A0): If the shift count is zero, clear the | |
395 | carry. | |
396 | (OP_A007E0): Likewise. | |
397 | (OP_2C0): Likewise. | |
398 | (OP_C007E0): Likewise. | |
399 | (OP_280): Likewise. | |
400 | (OP_8007E0): Likewise. | |
401 | ||
402 | * simops.c (OP_2C207E0): Correct PSW flags for special divu | |
403 | conditions. | |
404 | (OP_2C007E0): Likewise, for div. | |
405 | (OP_28207E0): Likewise, for divhu. | |
406 | (OP_28007E0): Likewise, for divh. Also, sign-extend the correct | |
407 | operand. | |
408 | * v850.igen (divh): Likewise, for 2-op divh. | |
72f4393d | 409 | |
c5fbc25b DD |
410 | * v850.igen (bsh): Fix carry logic. |
411 | ||
cb5c8c39 DJ |
412 | 2007-02-20 Daniel Jacobowitz <dan@codesourcery.com> |
413 | ||
414 | * Makefile.in (interp.o): Uncomment and update. | |
415 | ||
edc5d9ec HPN |
416 | 2006-12-21 Hans-Peter Nilsson <hp@axis.com> |
417 | ||
418 | * acconfig.h: Remove. | |
419 | * config.in: Regenerate. | |
420 | ||
e85e3205 RE |
421 | 2006-06-13 Richard Earnshaw <rearnsha@arm.com> |
422 | ||
423 | * configure: Regenerated. | |
424 | ||
2f0122dc DJ |
425 | 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com> |
426 | ||
427 | * configure: Regenerated. | |
428 | ||
20e95c23 DJ |
429 | 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com> |
430 | ||
431 | * configure: Regenerated. | |
432 | ||
2b193c4a MK |
433 | 2005-03-23 Mark Kettenis <kettenis@gnu.org> |
434 | ||
435 | * configure: Regenerate. | |
436 | ||
35695fd6 AC |
437 | 2005-01-14 Andrew Cagney <cagney@gnu.org> |
438 | ||
439 | * configure.ac: Sinclude aclocal.m4 before common.m4. Add | |
440 | explicit call to AC_CONFIG_HEADER. | |
441 | * configure: Regenerate. | |
442 | ||
f0569246 AC |
443 | 2005-01-12 Andrew Cagney <cagney@gnu.org> |
444 | ||
445 | * configure.ac: Update to use ../common/common.m4. | |
446 | * configure: Re-generate. | |
447 | ||
38f48d72 AC |
448 | 2005-01-11 Andrew Cagney <cagney@localhost.localdomain> |
449 | ||
450 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
451 | ||
b7026657 AC |
452 | 2005-01-07 Andrew Cagney <cagney@gnu.org> |
453 | ||
454 | * configure.ac: Rename configure.in, require autoconf 2.59. | |
455 | * configure: Re-generate. | |
456 | ||
379832de HPN |
457 | 2004-12-08 Hans-Peter Nilsson <hp@axis.com> |
458 | ||
459 | * configure: Regenerate for ../common/aclocal.m4 update. | |
460 | ||
4389ce38 MK |
461 | 2004-01-18 Mark Kettenis <kettenis@gnu.org> |
462 | ||
463 | * simops.c: Include <sys/types.h>. | |
464 | ||
c5ea1d53 NC |
465 | 2003-09-05 Andrew Cagney <cagney@redhat.com> |
466 | Nick Clifton <nickc@redhat.com> | |
467 | ||
468 | * interp.c (sim_open): Accept bfd_mach_v850e1. | |
469 | * v850-dc: Add entry for v850e1. | |
470 | * v850.igen: Add support for v850e1. | |
471 | Add code for DBTRAP and DBRET instructions. | |
472 | (dbtrap): Create a separate v850e1 specific instruction. | |
473 | Only generate a trap if the target is not the v850e1. | |
474 | Otherwise treat it as a special kind of branch. | |
475 | (break): Mark as v850/v850e specific. | |
72f4393d | 476 | |
ae451ac6 ILT |
477 | 2003-05-16 Ian Lance Taylor <ian@airs.com> |
478 | ||
479 | * Makefile.in (SHELL): Make sure this is defined. | |
480 | (tmp-igen): Use $(SHELL) whenever we invoke move-if-change. | |
481 | ||
ebc115b7 NC |
482 | 2003-04-06 Nick Clifton <nickc@redhat.com> |
483 | ||
1eec9e33 NC |
484 | * simops.c (OP_40): Delete. Move code to... |
485 | * v850-igen.c (): ...Here. Sign extend the first operand. | |
ebc115b7 NC |
486 | * simops.h (OP_40): Remove prototype. |
487 | ||
6b4a8935 AC |
488 | 2003-02-27 Andrew Cagney <cagney@redhat.com> |
489 | ||
490 | * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd. | |
491 | ||
0da2b665 AC |
492 | 2002-11-30 Andrew Cagney <cagney@redhat.com> |
493 | ||
494 | * simops.c: Use int, 1, 0 instead of boolean, true and false. | |
495 | * sim-main.h: Ditto. | |
496 | ||
30458d39 JW |
497 | 2002-09-27 Jim Wilson <wilson@redhat.com> |
498 | ||
499 | * simops.c (OP_E6077E0): And op1 with 7 after reading register, not | |
500 | before. | |
501 | (BIT_CHANGE_OP): Likewise. | |
502 | ||
2e8162ce JW |
503 | 2002-09-26 Jim Wilson <wilson@redhat.com> |
504 | ||
505 | * simops (OP_10007E0): Don't subtract 4 from PC. | |
506 | ||
5d6a173d NC |
507 | 2002-09-19 Nick Clifton <nickc@redhat.com> |
508 | ||
509 | * interp.c (sim_open): Remove reference to v850ea. | |
510 | (sim_create_inferior): Likewise. | |
511 | * v850-dc: Likewise. | |
512 | * v850.igen: Remove all references to v850ea, including v850ea | |
513 | specific instructions. | |
514 | ||
e551c257 NC |
515 | 2002-08-29 Nick Clifton <nickc@redhat.com> |
516 | ||
517 | From 2001-08-23 Catherine Moore <clm@redhat.com> | |
518 | ||
519 | * Makefile.in: Add gen-zero-r0 option. | |
520 | * sim-main.h (GPR_SET, GPR_CLEAR): Define. | |
521 | * simops.c (OP_24007E0): Sign extend the imm9 | |
522 | operand of a mul instruction. | |
523 | ||
d62274a3 AC |
524 | 2002-06-17 Andrew Cagney <cagney@redhat.com> |
525 | ||
526 | * simops.c (trace_result): Fix printf formatting. | |
527 | ||
c8cca39f AC |
528 | 2002-06-16 Andrew Cagney <ac131313@redhat.com> |
529 | ||
530 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
531 | ||
7ef2d4e7 AC |
532 | 2001-12-02 Andrew Cagney <ac131313@redhat.com> |
533 | ||
534 | * Makefile.in (simops.h, table.c): Delete targets. | |
535 | (tmp-gencode, gencode.o, gencode): Delete targets. | |
536 | (simops.h): New file. | |
537 | ($(BUILT_SRC_FROM_IGEN)): Do not depend on simops.h. | |
538 | * gencode.c: Delete file. | |
72f4393d | 539 | |
d4424ada C |
540 | 2001-04-15 J.T. Conklin <jtc@redback.com> |
541 | ||
542 | * Makefile.in (simops.o): Add simops.h to dependency list. | |
543 | ||
1e6cd159 AC |
544 | 2001-03-14 Andrew Cagney <ac131313@redhat.com> |
545 | ||
546 | * Makefile.in (gencode): Link with libintl. | |
547 | ||
42acc51e JL |
548 | 2001-01-31 Jonathan Larmour <jlarmour@redhat.com> |
549 | ||
550 | * Makefile.in (gencode): Link with libopcodes in build tree rather | |
551 | than building source files from there. | |
552 | ||
896ad910 NC |
553 | 2000-05-30 Nick Clifton <nickc@cygnus.com> |
554 | ||
555 | * v850.igen: Remove illegal instruction pattern, since it is the | |
556 | same as the breakpoint pattern. | |
557 | ||
eb2d80b4 AC |
558 | Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com> |
559 | ||
560 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
561 | ||
b9791fcd FCE |
562 | 2000-04-14 Gary Thomas <gthomas@redhat.com> |
563 | ||
564 | * v850.igen: Define 'br *' as illegal since this is the only | |
565 | way to provide a breakpoint on some v850 family processors. | |
566 | ||
de616bc7 FCE |
567 | 2000-03-24 Frank Ch. Eigler <fche@redhat.com> |
568 | ||
569 | * v850.igen (ilgop): New insn pattern for four-byte breakpoints. | |
570 | ||
d4f3574e SS |
571 | Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com> |
572 | ||
573 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
574 | ||
cd0fc7c3 SS |
575 | 1999-05-08 Felix Lee <flee@cygnus.com> |
576 | ||
577 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
72f4393d | 578 | |
c906108c SS |
579 | Tue Dec 1 17:25:16 1998 Andrew Cagney <cagney@b1.cygnus.com> |
580 | ||
581 | * Makefile.in (NL_TARGET): Define as -DNL_TARGET_v850. | |
582 | ||
583 | Wed Nov 25 17:52:58 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
584 | ||
585 | * Makefile.in (simops.o): Depends on targ-vals.h | |
586 | * simops.c: Include targ-vals.h instead of | |
587 | libgloss/.../syscall.h. Replace SYS_* with TARGET_SYS_*. | |
588 | (divn, divun, OP_1C007E0, OP_18207E0, OP_1C207E0,OP_18007E0): | |
589 | Replace signed long int with signed32. | |
590 | ||
591 | Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com> | |
592 | ||
593 | * interp.c: #include "itable.h". | |
594 | (get_insn_name): New function. | |
595 | (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS. | |
596 | * sim-main.h (MAX_INSNS,INSN_NAME): Delete. | |
597 | ||
598 | Wed May 6 19:43:27 1998 Doug Evans <devans@canuck.cygnus.com> | |
599 | ||
600 | * sim-main.h (INSN_NAME): New arg `cpu'. | |
601 | ||
602 | Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com> | |
603 | ||
72f4393d | 604 | * configure: Regenerated to track ../common/aclocal.m4 changes. |
c906108c SS |
605 | |
606 | Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche> | |
607 | ||
608 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
609 | * config.in: Ditto. | |
610 | ||
611 | Sun Apr 26 15:19:14 1998 Tom Tromey <tromey@cygnus.com> | |
612 | ||
613 | * acconfig.h: New file. | |
614 | * configure.in: Reverted change of Apr 24; use sinclude again. | |
615 | ||
616 | Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche> | |
617 | ||
618 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
619 | * config.in: Ditto. | |
620 | ||
621 | Fri Apr 24 11:18:08 1998 Tom Tromey <tromey@cygnus.com> | |
622 | ||
623 | * configure.in: Don't call sinclude. | |
624 | ||
625 | Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
626 | ||
627 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
628 | * sim-main.h (SIM_MAIN_H): Wrap header. | |
629 | ||
630 | Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
631 | ||
632 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
633 | ||
634 | Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
635 | ||
636 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
637 | ||
638 | Tue Mar 10 15:54:50 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
639 | ||
640 | * interp.c (sim_stop): Delete, second attempt. | |
641 | ||
642 | Thu Feb 26 19:09:47 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
643 | ||
644 | * interp.c (sim_info): Delete. | |
645 | ||
646 | Wed Feb 18 10:47:32 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
647 | ||
648 | * sim-main.h (TRACE_ALU_INPUT*): Delete. Moved to sim-trace.[hc]. | |
649 | ||
650 | * simops.c (trace_result): Call trace_generic instead of | |
651 | trace_one_insn. | |
652 | (trace_module): Change variable type to integer. | |
653 | (trace_input): Initialize trace_module with TRACE_ALU_IDX. | |
654 | ||
655 | * sim-main.h (trace_module): Change variable decl to integer type. | |
656 | (TRACE_BRANCH*, TRACE_LD, TRACE_ST): Update. | |
72f4393d | 657 | |
c906108c SS |
658 | Tue Feb 17 12:51:18 1998 Andrew Cagney <cagney@b1.cygnus.com> |
659 | ||
660 | * interp.c (sim_store_register, sim_fetch_register): Pass in | |
661 | length parameter. Return -1. | |
662 | ||
663 | Tue Feb 3 16:24:42 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
664 | ||
665 | * sim-main.h (IMEM16, IMEM16_IMMED): Rename IMEM and | |
666 | IMEM_IMMED. To match recent igen change. | |
667 | ||
668 | Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
669 | ||
670 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
671 | ||
672 | Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
673 | ||
674 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
675 | ||
676 | Fri Jan 30 09:51:27 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
677 | ||
678 | * sim-main.h (CPU_CIA): Delete, replaced by. | |
679 | (CIA_SET, CIA_SET): Define. | |
680 | ||
681 | Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba> | |
682 | ||
683 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
684 | ||
685 | Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
686 | ||
687 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
688 | * config.in: Ditto. | |
689 | ||
690 | Fri Dec 5 09:26:08 1997 Nick Clifton <nickc@cygnus.com> | |
691 | ||
692 | * v850.igen: Revert break value back to its old value. | |
693 | ||
694 | Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com> | |
695 | ||
696 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
697 | ||
698 | Wed Dec 3 17:27:19 1997 Nick Clifton <nickc@cygnus.com> | |
699 | ||
700 | * v850.igen: Make break have a zero first field, since otherwise | |
701 | it clashes with the DIVH instruction. | |
702 | ||
703 | Sat Nov 22 21:32:07 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
704 | ||
705 | * simops.c (OP_10007E0): Rename SIGABRT -> SIM_SIGABRT. Give | |
706 | sim_stopped instead of sim_signalled. | |
707 | ||
708 | * v850.igen (BREAK), simops.c (OP_12007E0): Rename SIGTRAP to | |
709 | SIM_SIGTRAP. | |
710 | (illegal): Rename SIGILL to SIM_SIGILL. | |
72f4393d | 711 | |
c906108c SS |
712 | * sim-main.h, simops.c, interp.c: Do not include signal.h. |
713 | ||
714 | * sim-main.h: Include sim-signal.h instead of signal.h. | |
715 | (SIGTRAP, SIGQUIT): Delete definition. | |
716 | (SIG_V850_EXIT): Delete definition. | |
717 | ||
718 | Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com> | |
719 | ||
720 | * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS). | |
721 | ||
722 | Fri Oct 31 10:33:40 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
723 | ||
724 | * interp.c (sim_open): Check state magic number. | |
725 | (sim-assert.h): Include. | |
726 | ||
727 | Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
728 | ||
729 | * v850.igen: Add model filter field to records. | |
730 | ||
731 | Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
732 | ||
733 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
734 | ||
735 | Fri Sep 26 11:56:02 1997 Felix Lee <flee@cygnus.com> | |
736 | ||
737 | * sim-main.h: delete null override of SIM_ENGINE_HALT_HOOK and | |
738 | SIM_ENGINE_RESTART_HOOK. | |
72f4393d | 739 | |
c906108c SS |
740 | Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> |
741 | ||
742 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
743 | ||
744 | Wed Sep 24 17:28:26 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
745 | ||
746 | * sim-main.h (WITH_TARGET_WORD_MSB): Delete. | |
747 | ||
748 | * configure.in (SIM_AC_OPTION_BITSIZE): Specify 32 bit | |
749 | architecture with MSB == 31. | |
750 | ||
751 | Wed Sep 24 14:04:20 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
752 | ||
753 | * v850.igen: Make divh insn with RRRRR==0 breakpoint. | |
754 | ||
755 | Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
756 | ||
757 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
758 | ||
759 | Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
760 | ||
761 | * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN, | |
762 | SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common. | |
763 | (SIM_EXTRA_CFLAGS): Update. | |
72f4393d | 764 | |
c906108c SS |
765 | Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> |
766 | ||
767 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
768 | * configure.in: Really specify NONSTRICT_ALIGNMENT as the default. | |
769 | ||
770 | Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
771 | ||
772 | * configure.in: Specify NONSTRICT_ALIGNMENT as the default. | |
773 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
774 | ||
775 | Fri Sep 19 10:37:20 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
776 | ||
777 | * v850.igen (disp16): Use EXTEND16 to sign extend disp. | |
778 | (disp22): Only shift left by 1, not 2. | |
779 | ("jmp"): Ensure PC is 2 byte aligned. | |
780 | ||
781 | * simops.c, v850.igen: Move "Bcond", "jr", "jarl" code to | |
782 | v850.igen. Fix tracing. | |
783 | ||
784 | * simops.c (OP_300, OP_400, OP_500): Move "sdl.b", "sld.h", | |
785 | "sld.w" insns to v850.igen. Fix tracing. | |
786 | (OP_70): Ditto for "sld.hu". | |
787 | ||
788 | * v850.igen: Clarify tracing of "sld.b", "sld.h" et.al. | |
789 | ||
790 | * simops.c (condition_met): Make global. | |
791 | ||
792 | * sim-main.h (TRACE_ALU_INPUT3, TRACE_BRANCH0, TRACE_LD, | |
793 | TRACE_ST): Define. | |
794 | (TRACE_LD_NAME): Define. | |
795 | ||
796 | * simops.c: Move "cmov", "cmov imm" to v850.igen, fix. | |
797 | ||
798 | Wed Sep 17 16:21:08 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
799 | ||
800 | * simops.c: Move "mov", "reti", to v850.igen, fix tracing. | |
72f4393d | 801 | |
c906108c SS |
802 | * interp.c (hash): Delete. |
803 | ||
804 | * v850.igen (nop): Really do nothing. | |
805 | ||
806 | * interp.c (do_interrupt): Mask interrupts after PSW is saved, not | |
807 | before. | |
808 | * v850.igen (reti): Return to current PC not previous. | |
809 | ||
810 | Wed Sep 17 14:02:10 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
811 | ||
812 | * simops.c: Move "ctret", "bsw", "hsw" to v850.igen, fix tracing. | |
813 | (trace_module): Global, save component/module name across insn. | |
814 | ||
815 | * simops.c: Move "bsh" to v850.igen, fix. | |
72f4393d | 816 | |
c906108c SS |
817 | * v850.igen (callt): Load correct number of bytes. Fix tracing. |
818 | (stsr, ldsr): Correct src, dest fields. Fix tracing. | |
819 | (ctret): Force alignment. Fix tracing. | |
72f4393d | 820 | |
c906108c SS |
821 | Tue Sep 16 22:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com> |
822 | ||
823 | * simops.c (trace_output): Add result argument. | |
824 | (trace_result): New function. Simpler version of trace_output, | |
825 | assumes trace needed. | |
826 | (trace_output): Call trace_result. | |
827 | (trace_output): For IMM_REG_REG, trace correct register. | |
828 | (trace_input): Add case for 16bit immediates. | |
829 | (OP_600, OP_640, OP_680, OP_6C0, OP_6A0): Use. | |
830 | ||
831 | * sim-main.h (TRACE_ALU_INPUT, TRACE_ALU_RESULT): Define. | |
832 | (trace_values, trace_name, trace_pc, trace_num_values): Make | |
833 | global. | |
834 | (GR, SR): Define. | |
72f4393d | 835 | |
c906108c SS |
836 | v850.insn (movea, stsr): Use. |
837 | (sxb, sxh, zxb, zxh): Ditto. | |
72f4393d | 838 | |
c906108c SS |
839 | Tue Sep 16 21:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com> |
840 | ||
841 | * simops.c: Move "movea" from here. | |
842 | * v850.igen: To here. | |
843 | ||
844 | * v850.igen (simm16): Define, sign extend imm16. | |
845 | (uimm16): Define, no sign extension. | |
846 | (addi, andi, movea, movhi, mulhi, ori, satsubi, xori): Use. | |
72f4393d | 847 | |
c906108c SS |
848 | * simops.c: Move "sxh", "switch", "sxb", "callt", "dispose", |
849 | "mov32" from here. | |
850 | * v850.igen: To here. | |
851 | (switch): Fix off by two error in NIA calc. | |
72f4393d | 852 | |
c906108c SS |
853 | Tue Sep 16 15:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com> |
854 | ||
855 | * simops.c (trace_pc, trace_name, trace_values, trace_num_values): | |
856 | New static globals. | |
857 | (trace_input): Just save pc, name and values for trace_output. | |
858 | (trace_output): Write trace values to a buffer. Use | |
859 | trace_one_insn to print trace info and buffer. | |
860 | (SIZE_OPERANDS, SIZE_LOCATION): Delete. | |
72f4393d | 861 | |
c906108c SS |
862 | Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com> |
863 | ||
864 | * sim-main.h (struct _sim_cpu): Add psw_mask so that reserved bits | |
865 | can be masked out. | |
866 | ||
867 | * simops.c (OP_2007E0, OP_4007E0): Move "ldsr", "stsr" | |
868 | instructions from here. | |
869 | * v850.igen (ldsr, stsr): To here. Mask out reserved bits when | |
870 | setting PSW. | |
72f4393d | 871 | |
c906108c SS |
872 | * interp.c (sim_open): Set psw_mask if machine known. |
873 | ||
874 | Tue Sep 16 10:20:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
875 | ||
876 | * v850-dc: Add rule to diferentiate between breakpoint and divh. | |
877 | * v850.igen (break): New instruction, breakpoint simulator. | |
878 | * v850.igen (breakpoint): Enable. Change to a 32bit instruction. | |
879 | ||
880 | Mon Sep 15 18:44:05 1997 Jim Wilson <wilson@cygnus.com> | |
881 | ||
882 | * simops.c (Multiply64): Don't store into register zero. | |
883 | ||
884 | Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
885 | ||
886 | * Makefile.in (semantics.o): Add dependency. | |
887 | ||
888 | * sim-main.h (SAVE_1, SAVE_2): Perform backward compatible save, | |
889 | do not adjust CIA/NIA. | |
890 | ||
891 | Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
892 | ||
893 | * simops.c (OP_300, OP_400, OP_70): Make behavour depend on PSW[US]. | |
72f4393d | 894 | |
c906108c SS |
895 | * simops.c: Move "divun", "sld.bu", "divhn", "divhun", "divn", |
896 | "divun", "pushml" code from here to v850.igen. | |
897 | (divun): Make global. | |
898 | (type3_regs): Make global | |
72f4393d | 899 | |
c906108c SS |
900 | * v850.igen: Move simops.c code to here. |
901 | ||
902 | * interp.c (sim_create_inferior): For v850eq set US bit by | |
903 | default. | |
904 | ||
905 | * interp.c (sim_open): Don't set arch, now set by | |
906 | sim_analyze_program. | |
907 | ||
908 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
909 | ||
910 | Mon Sep 15 14:39:34 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
911 | ||
912 | * simops.c (op_types): Move from here. | |
913 | sim-main.h: To here. | |
914 | ||
915 | * sim-main.h (trace_input, trace_output), simops.c: Make global. | |
916 | ||
917 | * simops.c (OP_60): Move "jmp" code from here. | |
918 | * v850.igen (jmp): To here. | |
919 | ||
920 | * simops.c (OP_60): Move "sld.bu" code from here. | |
921 | * v850.igen (sld.bu): To here. | |
922 | ||
923 | Fri Sep 12 15:11:03 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
924 | ||
925 | * v850.igen (prepare, ...): Add to v850eq architecture. | |
926 | ||
927 | * interp.c (sim_open): Default to v850eq. | |
72f4393d | 928 | |
c906108c SS |
929 | * interp.c (sim_open): Default to v850e. |
930 | * sim-main.h (signal.h): Include. | |
931 | ||
932 | * v850.igen (illegal): Report/halt illegal instructions. | |
933 | ||
934 | * Makefile.in (SIM_EXTRA_CFLAGS): Add SIM_RESERVED_BITS. | |
935 | ||
936 | * configure.in: Add reserved bits option. | |
937 | * configure: Regenerate. | |
938 | ||
939 | Thu Sep 11 08:40:03 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
940 | ||
941 | * interp.c (sim_open): Use sim_do_commandf instead of asprintf. | |
942 | ||
72f4393d | 943 | * sim-main.h (INSN_NAME): |
c906108c SS |
944 | |
945 | * Makefile.in (INCLUDE): Add SIM_EXTRA_DEPS. | |
946 | (SIM_EXTRA_DEPS): Add itable.h | |
947 | (tmp-gencode): Does not depend on simops.h | |
948 | ||
949 | * sim-main.h (itable.h): Include. | |
950 | (MAX_INSNS, INSN_NAME): Define. | |
951 | ||
952 | * interp.c: Compute inttype from the interrupt_names index that | |
953 | was passed in. | |
954 | ||
955 | Wed Sep 10 10:25:40 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
956 | ||
957 | * simops.c (trace_input): Use trace_printf instead of | |
958 | sim_io_printf. | |
959 | (trace_output): Ditto. | |
960 | (trace_input): Only trace when TRACE_ALU_P. Delete code | |
961 | disasembling instruction. | |
962 | (trace_output): Only trace when TRACE_ALU_P. | |
963 | ||
964 | Tue Sep 9 01:29:50 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
965 | ||
966 | * simops.c (trace_input, trace_output): Use sim_io_printf. | |
967 | (OP_620): Pass correct argument to trace. | |
968 | (OP_E607E0): Ditto. | |
969 | (trace_input): Obtain prog_bfd, text_start et.al from simulator | |
970 | struct. | |
971 | ||
972 | Mon Sep 8 21:03:52 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
973 | ||
974 | * v850.igen: New file. | |
975 | * v850-dc: New file. | |
976 | ||
977 | Mon Sep 8 18:33:04 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
978 | ||
979 | ||
980 | * sim-main.h (SEXT16): Delete, use EXTEND16. | |
981 | (SEXT8): Delete, use EXTEND8. | |
982 | (SEXT32): Delete, used? | |
983 | (SEXT40, SEXT44, SEXT64): Use UNSIGNED64 for constants, not ...LL. | |
984 | (WITH_TARGET_WORD_MSB): Define as 31. v850 little bit endian. | |
72f4393d | 985 | |
c906108c SS |
986 | * simops.c: Use EXTEND15 from sim-bits instead of SEXT16. |
987 | ||
988 | * sim-main.h (DEBUG_TRACE, DEBUG_VALUES, v850_debug): Delete, | |
989 | replace with TRACE_INSN_P and TRACE_ALU_P. | |
990 | ||
991 | * simops.c (trace_input, trace_output): Update. | |
992 | ||
993 | * interp.c (sim_engine_run): Delete. | |
994 | (lookup_hash): Delete. | |
995 | (sim_open): Do not fill hash table. | |
996 | (sim_trace): Delete. | |
997 | ||
998 | Fri Sep 5 17:04:48 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
999 | ||
1000 | * simops.c (OP_FFFF): Use sim_engine_halt. | |
1001 | (OP_12007E0): Ditto. | |
1002 | (OP_10007E0): Ditto. | |
1003 | ||
1004 | * sim-main.h (struct sim_cpu): Delete member exception. Using | |
1005 | sim-engine et.al. | |
1006 | ||
1007 | * interp.c (sim_info): Do not do anything in sim-info. | |
1008 | (sim_stop): Delete, replace with sim-stop. | |
1009 | (sim_stop_reason): Delete, replace with sim-reason. | |
1010 | ||
1011 | * sim-main.h (WITH_WATCHPOINTS): Define. | |
1012 | (WITH_MODULO_MEMORY): Define | |
72f4393d | 1013 | |
c906108c SS |
1014 | * Makefile.in (SIM_OBJS): Add sim-resume, sim-watch, sim-stop, |
1015 | sim-reason. | |
1016 | ||
1017 | * interp.c (enum interrupt_cond_type): Delete. | |
1018 | (struct interrupt_generator): Delete. | |
1019 | (enum interrupt_type): Drop int_none. | |
1020 | (sim_open): Initialize WATCHPOINT module. | |
1021 | (sim_resume, sim_run): Rename sim_resume to sim_run. | |
1022 | (sim_engine_run): Replace interrupt code with call to sim-events. | |
1023 | (sim_set_interrupt): Delete. | |
1024 | (sim_parse_number): Delete. | |
1025 | ||
1026 | Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> | |
1027 | ||
1028 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
1029 | ||
1030 | Thu Sep 4 18:11:37 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1031 | ||
1032 | * simops.c (fetch_argv): New function, fetch a arg vector from | |
1033 | simulator memory. | |
1034 | ||
1035 | * configure.in: Check for fork, execve, execv. | |
1036 | * configure: Regenerate. | |
1037 | ||
1038 | * interp.c (sim_store_register, sim_fetch_register): Use H2T_4 and | |
1039 | T2H_4 for byte swapping. | |
1040 | ||
1041 | * sim-main.h, interp.c (get_word, get_half, get_byte, put_word, | |
1042 | put_half, put_byte): Delete. | |
1043 | ||
1044 | * Makefile.in (SIM_OBJS): Add sim-memopt.o module. | |
1045 | ||
1046 | * sim-main.h (load_mem, store_mem): Redefine as macros. | |
1047 | (IMEM, IMEM_IMMED): New macros - fetch instructions. | |
1048 | ||
1049 | * simops.c (OP_10007E0): For SYS_read, SYS_write, SYS_open | |
1050 | transfer data via a buffer. | |
1051 | (fetch_str): New function, fetch string from memory. | |
1052 | ||
1053 | * Makefile.in (SIM_OBJS): Add sim-hrw.o module. | |
1054 | ||
1055 | * interp.c (sim_open): Establish memory maps using sim-memopt.c | |
1056 | via sim_do_command. | |
1057 | (sim_do_command): Print error if memory-map command is used. Call | |
1058 | sim_args_command. | |
1059 | (map): Delete, replaced by sim-core. | |
1060 | (sim_memory_init): Delete, replaced by sim-core. | |
1061 | (sim_set_memory_map): Delete, replaced by sim-memopt. | |
1062 | (load_mem): Delete, replaced by sim-core. | |
1063 | (store_mem): Delete, replaced by sim-core. | |
1064 | (sim_write): Delete, replaced by sim-hrw. | |
1065 | (sim_read): Delete, replaced by sim-hrw. | |
1066 | ||
1067 | * sim-main.h (struct sim_state): Remove memory members, using | |
1068 | sim-core.c | |
1069 | ||
1070 | Wed Sep 3 10:18:55 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1071 | ||
1072 | * sim-main.h: Replace SIM_HAVE_FLATMEM with mem ptr. | |
1073 | * interp.c (map): Do not add to a void pointer. | |
72f4393d | 1074 | |
c906108c SS |
1075 | * Makefile.in (INCLUDE): Add sim-main.h |
1076 | ||
1077 | * configure.in: Check for time.h | |
1078 | * configure: Re-generate. | |
1079 | ||
1080 | * interp.c (struct interrupt_generator): Make time unsigned long, | |
1081 | address SIM_ADDR. | |
1082 | (sim_resume): Make oldpc SIM_ADDR. | |
1083 | (struct hash_entry): Make mask/opcode unsigned. | |
1084 | ||
1085 | * v850_sim.h (struct simops ): Make opcode and mask unsigned. | |
1086 | ||
1087 | * simops.c (utime.h): Include if available. | |
1088 | (OP_10007E0): Check for UTIME function. | |
1089 | (divun): Put parentheses around shift argument. | |
1090 | (OP_640): Put parentheses around shift argument, was wrong. | |
1091 | (OP_107F0): Return something. | |
1092 | ||
1093 | * interp.c (sim_parse_number): Use strtoul not strtol. | |
1094 | (sim_resume): Use sim_elapsed_time_get to keep track of the time. | |
1095 | ||
1096 | * configure.in (SIM_AC_OPTION_WARNINGS): Add. | |
1097 | (SIM_AC_OPTION_ENDIAN): Set to hardwired big. | |
1098 | (SIM_AC_OPTION_HOST_ENDIAN): Add. | |
1099 | (AC_CHECK_FUNCS): Add utime. | |
1100 | (AC_CHECK_HEADERS): Add stdlib.h, string.h, strings.h, utime.h | |
1101 | configure: Regenerate. | |
72f4393d | 1102 | |
c906108c SS |
1103 | |
1104 | * Makefile.in (SIM_RUN_OBJS): Use nrun.o. | |
1105 | (SIM_OBJS): Add sim-io.o, sim-hload.o, sim-utils.o, sim-options.o, | |
1106 | sim-config.o, sim-module.o, sim-events.o, sim-core.o, | |
1107 | sim-endian.o, sim-engine.o, sim-trace.o, sim-profile.o | |
1108 | (SIM_ENDIAN, SIM_WARNGINS): Define. | |
1109 | ||
1110 | * simops.c (OP_10007E0): Use sim_io_* for transfers. | |
1111 | ||
1112 | * interp.c (sim_resume): Pass sd around. | |
1113 | ||
1114 | * simops.c (sim-main.h): Include. | |
1115 | ||
1116 | * gencode.c (write_template): Generate #include sim-main.h. | |
1117 | (write_opcodes): Ditto. | |
72f4393d | 1118 | |
c906108c SS |
1119 | * interp.c (prog_bfd, prog_bfd_was_opened_p): Delete. |
1120 | (v850_callback): Ditto. | |
1121 | (sim_kind, myname): Ditto. | |
1122 | (lookup_hash): Pass SD. Use sim_io_error. | |
1123 | (sim_set_memory_map): Pass in SD, use. | |
1124 | (init_system): Pass in SD, use. | |
1125 | (sim_open): Update. | |
1126 | (sim_set_profile): Delete. | |
1127 | (sim_set_profile_size): Delete. | |
1128 | (do_interrupt): Pass in SD, use. | |
1129 | (sim_info): Use sim_io_printf. | |
1130 | (sim_create_inferior): Reset registers. Set PC from prog_bfd | |
1131 | argument. | |
1132 | (sim_load): Delete, use common/sim-hload.c | |
1133 | (sim_size): Rename to sim_memory_init. | |
1134 | (sim_write): Remove call to init_system. | |
1135 | (init_system): Delete. | |
1136 | (sim_set_callbacks): Delete. | |
1137 | (sim_set_interrupt): Pass in SD, use. | |
1138 | (start_time): Delete. | |
72f4393d | 1139 | |
c906108c SS |
1140 | * v850_sim.h: Remove everything except `struct simops' from here. |
1141 | * sim-main.h: Move most to here. | |
1142 | * gencode.c: Move #includes to here. | |
1143 | ||
1144 | * sim-main.h(struct _sim_cpu): Rename struct _state. | |
1145 | (#define PC, et.al.): Update | |
1146 | (v850_callback): Delete. Replaced with SIM_DESC arg. | |
1147 | (int8, uint8, int16, uint16, int32, uint32): Define types using | |
1148 | unsigned8 et.al from common/sim-types.h. | |
1149 | * sim-main.h (State): Define as STATE_CPU. | |
1150 | ||
1151 | Mon Sep 1 12:07:55 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1152 | ||
1153 | * configure.in: Check for time, chmod. | |
1154 | * configure: Regenerate. | |
1155 | * simops.c (SYS_time, SYS_chmod): Use HAVE_TIME, HAVE_CHMOD. | |
72f4393d | 1156 | |
c906108c SS |
1157 | * simops.c (../../libgloss/v850/sys/syscall.h): Include instead of |
1158 | sys/syscall.h. | |
1159 | (OP_10007E0): Check the existance each SYS_* macro independantly. | |
1160 | ||
1161 | * v850_sim.h (SIGQUIT, SIGTRAP): Only define if missing. | |
1162 | ||
1163 | Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1164 | ||
1165 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
1166 | * config.in: Ditto. | |
1167 | ||
1168 | Tue Aug 26 10:42:38 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1169 | ||
1170 | * interp.c (sim_kill): Delete. | |
1171 | (sim_create_inferior): Add ABFD argument. | |
1172 | (sim_load): Move setting of PC from here. | |
1173 | (sim_create_inferior): To here. | |
1174 | ||
1175 | Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1176 | ||
1177 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
1178 | * config.in: Ditto. | |
1179 | ||
1180 | Mon Aug 25 11:31:23 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1181 | ||
1182 | * interp.c (sim_open): Add ABFD argument. | |
1183 | ||
1184 | Fri Aug 22 10:39:28 1997 Nick Clifton <nickc@cygnus.com> | |
1185 | ||
1186 | * simops.c (bsh): Only set CY flag if either of the bottom | |
1187 | bytes is zero. | |
72f4393d | 1188 | |
c906108c SS |
1189 | * simops.c (prepare, dispose): Lower numbered |
1190 | registers go to higher numbered address. | |
1191 | ||
1192 | * simops.c (unsigned divide instructions): S bit set if result has | |
1193 | top bit set. | |
72f4393d | 1194 | |
c906108c SS |
1195 | * simops.c (pushml, pushmh, popml, popmh): Lower numbered |
1196 | registers go to higher numbered address. | |
72f4393d | 1197 | |
c906108c SS |
1198 | Wed Aug 20 13:56:35 1997 Nick Clifton <nickc@cygnus.com> |
1199 | ||
1200 | * simops.c (OP_107E0, OP_107F0, OP_307E0, OP_307F0): Use correct | |
1201 | interpretation of SR bit in list18 structure. | |
1202 | (divn, divun): New functions to perform N step divide functions. | |
1203 | ||
1204 | Mon Aug 18 10:59:02 1997 Nick Clifton <nickc@cygnus.com> | |
1205 | ||
1206 | * simops.c (OP_300, OP_400, OP_60, OP_70): Support variant opcodes | |
1207 | with US bit set in the PSW. | |
1208 | ||
1209 | Wed Aug 13 19:06:55 1997 Nick Clifton <nickc@cygnus.com> | |
1210 | ||
1211 | * interp.c (sim_resume): Opcode functions return amount to be | |
1212 | added to PC and all opcodes take a standard format in the OP[] | |
1213 | array. | |
72f4393d | 1214 | |
c906108c SS |
1215 | (do_format_*): Functions removed. |
1216 | ||
1217 | * v850_sim.h (SP, EP): New register mnemonics. | |
72f4393d | 1218 | |
c906108c SS |
1219 | * gencode.c (write_header): Functions prototypes return an |
1220 | integer. | |
1221 | ||
1222 | * simops.c: Opcode functions return amount to be added to PC. | |
72f4393d | 1223 | |
c906108c | 1224 | * v850_sim.h (CTPC, CTPSW, CTBP): New register mnemonics. |
72f4393d | 1225 | |
c906108c | 1226 | * simops.c: Add support for v850e instructions. |
72f4393d | 1227 | |
c906108c | 1228 | * simops.c: Add support for v850eq instructions. |
72f4393d | 1229 | |
c906108c SS |
1230 | Tue May 20 10:24:14 1997 Andrew Cagney <cagney@b1.cygnus.com> |
1231 | ||
1232 | * interp.c (sim_open): Add callback argument. | |
1233 | (sim_set_callbacks): Delete SIM_DESC argument. | |
1234 | ||
1235 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> | |
1236 | ||
1237 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
1238 | ||
1239 | Wed Apr 23 17:20:16 1997 Doug Evans <dje@canuck.cygnus.com> | |
1240 | ||
1241 | * interp.c (prog_bfd_was_opened_p): New static local. | |
1242 | (prog_bfd): New global variable. | |
1243 | (sim_open): Undo patch to add -E support. | |
1244 | (sim_close): Close prog_bfd if sim_load opened it. | |
1245 | (sim_load): Record bfd of loaded file in prog_bfd. | |
1246 | * simops.c (prog_bfd): Renamed from exec_bfd. | |
1247 | ||
1248 | Fri Apr 18 14:17:12 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1249 | ||
1250 | * interp.c (sim_stop): Stub function. | |
1251 | ||
1252 | Thu Apr 17 03:53:18 1997 Doug Evans <dje@canuck.cygnus.com> | |
1253 | ||
1254 | * Makefile.in (SIM_OBJS): Add sim-load.o. | |
1255 | * interp.c (sim_kind, myname): New static locals. | |
1256 | (sim_open): Set sim_kind, myname. Ignore -E arg. | |
1257 | (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to | |
1258 | load file into simulator. Set start address from bfd. | |
1259 | (sim_create_inferior): Return SIM_RC. Delete arg start_address. | |
1260 | ||
1261 | Wed Apr 16 19:53:55 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1262 | ||
1263 | * simops.c (OP_10007E0): Only provide system calls SYS_execv, | |
1264 | SYS_wait, SYS_wait, SYS_utime, SYS_time if defined by the host. | |
1265 | ||
1266 | Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1267 | ||
1268 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
1269 | * config.in: Ditto. | |
1270 | ||
1271 | Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> | |
1272 | ||
1273 | * interp.c (sim_open): New arg `kind'. | |
1274 | ||
1275 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
1276 | ||
1277 | Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1278 | ||
1279 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
1280 | ||
1281 | Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1282 | ||
1283 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
1284 | ||
1285 | Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1286 | ||
1287 | * configure: Re-generate. | |
1288 | ||
1289 | Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com> | |
1290 | ||
1291 | * configure: Regenerate to track ../common/aclocal.m4 changes. | |
1292 | ||
1293 | Thu Mar 13 13:00:54 1997 Doug Evans <dje@canuck.cygnus.com> | |
1294 | ||
1295 | * interp.c (sim_open): New SIM_DESC result. Argument is now | |
1296 | in argv form. | |
1297 | (other sim_*): New SIM_DESC argument. | |
1298 | ||
1299 | Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com> | |
1300 | ||
1301 | * Makefile.in (@COMMON_MAKEFILE_FRAG): Use | |
1302 | COMMON_{PRE,POST}_CONFIG_FRAG instead. | |
1303 | * configure.in: sinclude ../common/aclocal.m4. | |
1304 | * configure: Regenerated. | |
1305 | ||
1306 | Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com) | |
1307 | ||
1308 | * configure configure.in Makefile.in: Update to new configure | |
1309 | scheme which is more compatible with WinGDB builds. | |
1310 | * configure.in: Improve comment on how to run autoconf. | |
1311 | * configure: Re-run autoconf to get new ../common/aclocal.m4. | |
1312 | * Makefile.in: Use autoconf substitution to install common | |
1313 | makefile fragment. | |
1314 | ||
1315 | Mon Jan 20 16:05:34 1997 Michael Meissner <meissner@tiktok.cygnus.com> | |
1316 | ||
1317 | * simops.c (OP_{E0,2E0,6E0}): The multiply operations sign extend, | |
1318 | not zero extend. | |
1319 | ||
1320 | Tue Jan 14 17:06:03 1997 Stu Grossman (grossman@critters.cygnus.com) | |
1321 | ||
1322 | * simops.c: Put ifdefs around things to make MSVC happy. Get rid | |
1323 | of unistd.h. Disable SYS_stat, SYS_chown, SYS_time, SYS_times, | |
1324 | SYS_gettimeofday and SYS_utime from MSVC. | |
1325 | ||
1326 | Tue Dec 31 18:11:13 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
1327 | ||
1328 | * simops.c (OP_10007E0): Know that kill encodes the signal number | |
1329 | via: 0xdead0000 | signal and turn it back into a signal. | |
1330 | ||
1331 | Fri Dec 27 14:44:06 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
1332 | ||
1333 | * v850_sim.h (SIG_V850_EXIT): Define as -1. | |
1334 | ||
1335 | * interp.c (sim_open): Cast calloc function. | |
1336 | (sim_stop_reason): If signal is SIG_V850_EXIT, inform gdb the | |
1337 | program exited with the appropriate exit code. | |
1338 | (sim_set_interrupt): Declare buildargv. | |
1339 | ||
1340 | * simops.c (OP_10007E0): Make exit signal normal exit. Make time | |
1341 | type correct and work on big endian systems. | |
1342 | ||
1343 | Wed Nov 20 02:18:44 1996 Doug Evans <dje@canuck.cygnus.com> | |
1344 | ||
1345 | * Makefile.in: Delete stuff moved to ../common/Make-common.in. | |
1346 | (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define. | |
1347 | * configure.in: Simplify using macros in ../common/aclocal.m4. | |
1348 | Call AC_CHECK_HEADERS(unistd.h). | |
1349 | * configure: Regenerated. | |
1350 | * config.in: New file. | |
1351 | * simops.c: #include "config.h". #include <unistd.h> if present. | |
1352 | ||
1353 | Sun Nov 3 23:02:54 1996 Stan Shebs <shebs@andros.cygnus.com> | |
1354 | ||
1355 | * v850_sim.h (State): New slots dummy_mem, pending_nmi. | |
1356 | (EIPC, etc): New macros for system registers. | |
1357 | * simops.c, interp.c: Use everywhere. | |
1358 | ||
1359 | * interp.c: Add support for interrupts issued by interrupt | |
1360 | generators, either PC- or time-based. Controlled by simulator | |
1361 | command "sim interrupt". | |
1362 | ||
1363 | * interp.c: Add support for variable-size allocation of memory, | |
1364 | via simulator command "sim memory-map". | |
1365 | (map): Issue SIGSEGV for references to invalid memory regions. | |
72f4393d | 1366 | |
c906108c | 1367 | Thu Oct 31 14:44:10 1996 Gavin Koch <gavin@cygnus.com> |
72f4393d L |
1368 | |
1369 | * simops.c: Include <sys/time.h> for struct timeval and | |
1370 | struct timezone. | |
1371 | ||
c906108c SS |
1372 | Wed Oct 30 08:49:10 1996 Jeffrey A Law (law@cygnus.com) |
1373 | ||
1374 | * simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday. | |
1375 | ||
1376 | * simops.c (OP_10007E0): Handle SYS_time. | |
1377 | ||
1378 | Tue Oct 29 14:22:55 1996 Jeffrey A Law (law@cygnus.com) | |
1379 | ||
1380 | * simops.c: Include <sys/stat.h>. | |
1381 | (OP_10007E0): Handle SYS_stat. | |
1382 | ||
1383 | Thu Oct 24 12:26:35 1996 Jeffrey A Law (law@cygnus.com) | |
1384 | ||
1385 | * simops.c (OP_10007E0): Don't declare errno. | |
1386 | ||
1387 | * simops.c (OP_500): Mask off low bit in displacement | |
1388 | for sld.w. | |
1389 | (OP_501): Similarly. | |
1390 | ||
1391 | * simops.c (OP_500): Fix displacement handling for sld.w. | |
1392 | (OP_501): Similarly for sst.w. | |
1393 | ||
1394 | * simops.c (trace_input): Remove all references to SEXT7. | |
1395 | (OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement | |
1396 | is zero extended for sst/sld instructions. | |
1397 | * v850_sim.h (SEX7): Delete. It's no longer needed (and it | |
1398 | was incorrect anyway). | |
1399 | ||
1400 | Thu Oct 24 10:33:33 1996 Stu Grossman (grossman@critters.cygnus.com) | |
1401 | ||
1402 | * Makefile.in: Get rid of srcroot. Set all INSTALL macros via | |
1403 | autoconf. | |
1404 | * gencode.c (write_opcodes): Pad operands field to account for | |
1405 | MSVC braindamage. | |
1406 | * simops.c: Include errno.h. Exclude SYS_chown, since MSVC | |
1407 | doesn't support it. (Why is this here in the first place?!?) | |
1408 | * v850_sim.h: Get rid of 64 bit defs. Also, get rid of #elif's. | |
1409 | Change number of operands in struct simops from 9 to 6. Define | |
1410 | SIGTRAP and SIGQUIT for MSVC. | |
1411 | ||
1412 | Tue Oct 15 16:19:51 1996 Stu Grossman (grossman@critters.cygnus.com) | |
1413 | ||
1414 | * interp.c (MEM_SIZE): It's now bytes, not a power of 2. | |
1415 | * (map): Add support for external mem in the 1->2 meg range. | |
1416 | Also, abort() when memory access is way out of bounds. (Better to | |
1417 | die than to give wrong result. (This will be fixed later.)) | |
1418 | * (sim_size): MEM_SIZE is now bytes, not shift factor. | |
1419 | ||
1420 | Tue Oct 1 15:53:24 1996 Gavin Koch <gavin@cygnus.com> | |
72f4393d L |
1421 | |
1422 | * simops.c (trace_input): Swapped order of operands for output | |
1423 | output of OP_IMM_REG. Changed the fetching of the operands for | |
1424 | OP_LOAD32, and OP_STORE32 to work like op-function. | |
1425 | ||
c906108c SS |
1426 | Mon Sep 30 15:46:33 1996 Stu Grossman (grossman@critters.cygnus.com) |
1427 | ||
1428 | * interp.c: Move includes of remote-sim.h and callback.h to | |
1429 | v850-sim.h. | |
1430 | * (lookup_hash): Add PC to report of hash failure. | |
1431 | * (map load_mem store_mem): New memory subsystem. Models V851 | |
1432 | memory system. | |
1433 | * (sim_write sim_read): Use new memory subsystem. | |
1434 | * (sim_resume): Don't load and save PC into EIPC anymore. Needed | |
1435 | to make user-defined traps work right. | |
1436 | * simops.c (OP_*): Use new memory subsystem. | |
1437 | * (OP_14007E0 (reti)): Implement reti. | |
1438 | * (OP_14996E0 (trap)): Implement user-defined traps. Move I/O to | |
1439 | trap 31. Use new memory subsystem. | |
1440 | * v850_sim.h: Prototypes for load_mem, store_mem and map. Use | |
1441 | load_mem in RLW macro. | |
1442 | ||
1443 | Fri Sep 27 18:34:09 1996 Stu Grossman (grossman@critters.cygnus.com) | |
1444 | ||
1445 | * gencode.c (write_opcodes): Output hex values for opcode mask | |
1446 | and patterns. | |
1447 | * interp.c (sim_resume): Save and restore PC from the appropriate | |
1448 | register. | |
1449 | * (sim_fetch_register sim_store_register): Fix byte-order problem | |
1450 | with reading and writing registers. | |
1451 | * simops.c (OP_FFFF): Implement pseudo-breakpoint insn. | |
1452 | ||
1453 | Fri Sep 27 17:42:37 1996 Jeffrey A Law (law@cygnus.com) | |
1454 | ||
72f4393d | 1455 | * simops.c (trace_input): Fix thinko. |
c906108c SS |
1456 | |
1457 | Wed Sep 18 09:54:12 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
1458 | ||
1459 | * simops.c (exec_bfd): Rename from sim_bfd. | |
1460 | (trace_input): Ditto. | |
1461 | ||
1462 | Thu Sep 12 12:03:05 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
1463 | ||
1464 | * simops.c (trace_input): Use find_nearest_line to print line | |
1465 | number, function name or file name of PC. | |
1466 | ||
1467 | Wed Sep 11 16:44:37 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
1468 | ||
1469 | * simops.c: Add tracing support. Use SEXTxx macros instead of | |
1470 | doing hardwired shifts. | |
1471 | ||
1472 | * configure.in (--enable-sim-cflags): Add switch to add additional | |
1473 | flags to simulator buld. If --enable-sim-cflags=trace, turn on | |
1474 | tracing. | |
1475 | * configure: Regenerate. | |
1476 | ||
1477 | * Makefile.in: Don't require a VPATH capable make if configuring | |
1478 | in the same directory. Don't use CFLAGS for configuration flags. | |
1479 | Add flags from --enable-sim-cflags. Support canadian cross | |
1480 | builds. Rebuild whole simulator if include files change. | |
1481 | ||
1482 | * interp.c (v850_debug): New global for debugging. | |
1483 | (lookup_hash,sim_size,sim_set_profile): Use | |
1484 | printf_filtered callback, instead of calling printf directly. | |
1485 | (sim_{open,trace}): Enable tracing if -t and compiled for tracing. | |
1486 | ||
1487 | * v850_sim.h: Use limits.h to set the various sized types. | |
1488 | (SEXT{5,7,16,22}): New macros. | |
1489 | ||
1490 | Mon Sep 9 20:50:46 1996 Jeffrey A Law (law@cygnus.com) | |
1491 | ||
1492 | * interp.c (hash): Make this an inline function | |
1493 | when compiling with GCC. Simplify. | |
1494 | * simpos.c: Explicitly include "sys/syscall.h". Remove | |
1495 | some #if 0'd code. Enable more emulated syscalls. | |
1496 | ||
1497 | Wed Sep 4 01:48:55 1996 Jeffrey A Law (law@cygnus.com) | |
1498 | ||
1499 | * interp.c: Fix sign bit handling for add and sub instructions. | |
1500 | ||
1501 | Tue Sep 3 10:20:30 1996 Jeffrey A Law (law@cygnus.com) | |
1502 | ||
1503 | * gencode.c: Fix various indention & style problems. | |
1504 | Remove test code. Remove #if 0 code. | |
1505 | * interp.c: Provide prototypes for all static functions. | |
1506 | Fix minor indention problems. | |
1507 | (sim_open, sim_resume): Remove unused variables. | |
1508 | (sim_read): Return type is "int". | |
1509 | * simops.c: Remove unused variables. | |
1510 | (divh): Make result of divide-by-zero zero. | |
1511 | (setf): Initialize result to keep compiler quiet. | |
1512 | (sar instructions): These just clear the overflow bit. | |
1513 | * v850_sim.h: Provide prototypes for put_byte, put_half | |
1514 | and put_word. | |
1515 | ||
1516 | * interp.c: OP should be an array of 32bit operands! | |
1517 | (v850_callback): Declare. | |
1518 | (do_format_5): Fix extraction of OP[0]. | |
1519 | (sim_size): Remove debugging printf. | |
1520 | (sim_set_callbacks): Do something useful. | |
1521 | (sim_stop_reason): Gross hacks to get c-torture running. | |
1522 | * simops.c: Simplify code for computing targets of bCC | |
1523 | insns. Invert 's' bit if 'ov' bit is set for some | |
1524 | instructions. Fix 'cy' bit handling for numerous | |
1525 | instructions. Make the simulator stop when a halt | |
1526 | instruction is encountered. Very crude support for | |
1527 | emulated syscalls (trap 0). | |
1528 | * v850_sim.h: Include "callback.h" and declare | |
1529 | v850_callback. Items in the operand array are 32bits. | |
1530 | ||
1531 | Sun Sep 1 22:35:35 1996 Jeffrey A Law (law@cygnus.com) | |
1532 | ||
1533 | * interp.c (sim_resume): Fix code to check for a format 3 | |
1534 | opcode. | |
1535 | * simops.c: bCC insns only argument is a constant, not a | |
1536 | register value (duh...) | |
1537 | ||
1538 | Fri Aug 30 10:33:49 1996 Jeffrey A Law (law@cygnus.com) | |
1539 | ||
1540 | * simops.c: Fix "not1" and "set1". | |
1541 | ||
1542 | * simops.c: Don't forget to initialize temp for | |
1543 | "ld.h" and "ld.w" | |
1544 | ||
1545 | * interp.c: Remove various debugging printfs. | |
1546 | ||
1547 | * simops.c: Fix satadd, satsub boundary case handling. | |
1548 | ||
1549 | * interp.c (hash): Fix. | |
1550 | * interp.c (do_format_8): Get operands correctly and | |
1551 | call the target function. | |
1552 | * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1". | |
1553 | ||
1554 | Thu Aug 29 13:53:29 1996 Jeffrey A Law (law@cygnus.com) | |
1555 | ||
1556 | * interp.c (do_format_4): Get operands correctly and | |
1557 | call the target function. | |
1558 | * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b", | |
1559 | "sst.h", and "sst.w". | |
1560 | ||
1561 | * v850_sim.h: The V850 doesn't have split I&D spaces. Change | |
1562 | accordingly. Remove many unused definitions. | |
1563 | * interp.c: The V850 doesn't have split I&D spaces. Change | |
1564 | accordingly. | |
1565 | (get_longlong, get_longword, get_word): Deleted. | |
1566 | (write_longlong, write_longword, write_word): Deleted. | |
1567 | (get_operands): Deleted. | |
1568 | (get_byte, get_half, get_word): New functions. | |
1569 | (put_byte, put_half, put_word): New functions. | |
1570 | * simops.c: Remove unused functions. Rough cut at | |
1571 | "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns. | |
1572 | ||
1573 | * v850_sim.h (struct _state): Remove "psw" field. Add | |
1574 | "sregs" field. | |
1575 | (PSW): Remove bogus definition. | |
1576 | * simops.c: Change condition code handling to use the psw | |
1577 | register within the sregs array. Handle "ldsr" and "stsr". | |
1578 | ||
1579 | * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr". | |
1580 | ||
1581 | * interp.c (do_format_5): Get operands correctly and | |
1582 | call the target function. | |
1583 | (sim_resume): Don't do a PC update for format 5 instructions. | |
1584 | * simops.c: Handle "jarl" and "jmp" instructions. | |
1585 | ||
1586 | * simops.c: Fix minor typos. Handle "cmp", "setf", "tst" | |
1587 | "di", and "ei" instructions correctly. | |
1588 | ||
1589 | * interp.c (do_format_3): Get operands correctly and call | |
1590 | the target function. | |
1591 | * simops.c: Handle bCC instructions. | |
1592 | ||
1593 | * simops.c: Add condition code handling to shift insns. | |
1594 | Fix minor typos in condition code handling for other insns. | |
1595 | ||
1596 | * Makefile.in: Fix typo. | |
1597 | * simops.c: Add condition code handling to "sub" "subr" and | |
1598 | "divh" instructions. | |
1599 | ||
1600 | * interp.c (hash): Update to be more accurate. | |
1601 | (lookup_hash): Call hash rather than computing the hash | |
1602 | code here. | |
1603 | (do_format_1_2): Handle format 1 and format 2 instructions. | |
1604 | Get operands correctly and call the target function. | |
1605 | (do_format_6): Get operands correctly and call the target | |
1606 | function. | |
1607 | (do_formats_9_10): Rough cut so shift ops will work. | |
1608 | (sim_resume): Tweak to deal with format 1 and format 2 | |
1609 | handling in a single funtion. Don't update the PC | |
1610 | for format 3 insns. Fix typos. | |
1611 | * simops.c: Slightly reorganize. Add condition code handling | |
1612 | to "add", "addi", "and", "andi", "or", "ori", "xor", "xori" | |
1613 | and "not" instructions. | |
1614 | * v850_sim.h (reg_t): Registers are 32bits. | |
1615 | (_state): The V850 has 32 general registers. Add a 32bit | |
1616 | psw and pc register too. Add accessor macros | |
1617 | ||
1618 | * Makefile.in, interp.c, v850_sim.h: Bring over endianness | |
1619 | changes from the d10v simulator. | |
1620 | ||
1621 | * simops.c: Add shift support. | |
1622 | ||
1623 | * simops.c: Add multiply & divide support. Abort for system | |
1624 | instructions. | |
1625 | ||
1626 | * simops.c: Add logicals, mov, movhi, movea, add, addi, sub | |
1627 | and subr. No condition codes yet. | |
1628 | ||
1629 | Wed Aug 28 13:53:22 1996 Jeffrey A Law (law@cygnus.com) | |
1630 | ||
72f4393d | 1631 | * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h, |
c906108c SS |
1632 | gencode.c, interp.c, simops.c: Created. |
1633 |