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sim: always enable modulo memory
[thirdparty/binutils-gdb.git] / sim / v850 / ChangeLog
CommitLineData
cdf850e9
MF		 12015-11-17 Mike Frysinger <vapier@gentoo.org>
2
3 * sim-main.h (WITH_MODULO_MEMORY): Delete.
4
797eee42
MF		 52015-11-15 Mike Frysinger <vapier@gentoo.org>
6
7 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
8
6e4f085c
MF		 92015-11-14 Mike Frysinger <vapier@gentoo.org>
10
11 * interp.c (sim_close): Delete.
12
8d0978fb
MF		 132015-06-23 Mike Frysinger <vapier@gentoo.org>
14
15 * configure: Regenerate.
16
a3487082
MF		 172015-06-12 Mike Frysinger <vapier@gentoo.org>
18
19 * configure: Regenerate.
20
306f4178
MF		 212015-06-12 Mike Frysinger <vapier@gentoo.org>
22
23 * configure: Regenerate.
24
5d19c366
MF		 252015-06-11 Mike Frysinger <vapier@gentoo.org>
26
27 * interp.c (INLINE): Delete define.
28
20bca71d
MF		 292015-04-18 Mike Frysinger <vapier@gentoo.org>
30
31 * sim-main.h (SIM_CPU): Delete.
32
7e83aa92
MF		 332015-04-18 Mike Frysinger <vapier@gentoo.org>
34
35 * sim-main.h (sim_cia): Delete.
36
034685f9
MF		 372015-04-17 Mike Frysinger <vapier@gentoo.org>
38
39 * sim-main.h (CIA_GET, CIA_SET): Delete.
40
78e9aa70
MF		 412015-04-15 Mike Frysinger <vapier@gentoo.org>
42
43 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
44 * sim-main.h (STATE_CPU): Delete.
45
bf12d44e
MF		 462015-04-13 Mike Frysinger <vapier@gentoo.org>
47
48 * configure: Regenerate.
49
14c9ad2e
MF		 502015-04-13 Mike Frysinger <vapier@gentoo.org>
51
52 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
53 * interp.c (v850_pc_get, v850_pc_set): New functions.
54 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
55 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
56 (sim_pc_get): Delete.
57 * sim-main.h (SIM_CPU): Define.
58 (struct sim_state): Change cpu to an array of pointers.
59 (STATE_CPU): Drop &.
60
122bbfb5
MF		 612015-04-06 Mike Frysinger <vapier@gentoo.org>
62
63 * Makefile.in (SIM_OBJS): Delete sim-engine.o and sim-hrw.o.
64
aadc9410
MF		 652015-03-31 Mike Frysinger <vapier@gentoo.org>
66
67 * config.in, configure: Regenerate.
68
05f53ed6
MF		 692015-03-24 Mike Frysinger <vapier@gentoo.org>
70
71 * interp.c (sim_pc_get): New function.
72
ae7d0cac
MF		 732015-03-16 Mike Frysinger <vapier@gentoo.org>
74
75 * config.in, configure: Regenerate.
76
465fb143
MF		 772015-03-14 Mike Frysinger <vapier@gentoo.org>
78
79 * Makefile.in (SIM_RUN_OBJS): Delete.
80
5cddc23a
MF		 812015-03-14 Mike Frysinger <vapier@gentoo.org>
82
83 * configure.ac (AC_CHECK_HEADERS): Delete unistd.h & stdlib.h &
84 string.h & strings.h & time.h.
85 * aclocal.m4, configure: Regenerate.
86
a3976a7c
NC		 872015-02-27 Nick Clifton <nickc@redhat.com>
88
89 * sim-main.h (reg64_t): New type.
90 (v850_regs): Add selID_sregs field.
91 (VR, SAT16, SAT32, ABS16, ABS32 ): New macros.
92 * v850-dc: Add fields for v850e3v5 instructions.
93 * v850.igen (cvtf.dl): Use correctly signed local value.
94 (cvtf.dw, cvtf.sw, trncf.dul, trncf.dl, trncf.sul, trncf.sw):
95 Likewise.
96 * interp.c: Fix old style function declarations.
97 * simops.c: Likewise.
98
9ad55e9b
NC		 992015-02-24 Nick Clifton <nickc@redhat.com>
100
101 * v850.igen: Add more e3v5 support.
102 (FMAF.S): New pattern.
103 (FMSF.S): New pattern.
104 (FNMAF.S): New pattern.
105 (FNMSF.S): New pattern.
106 (cnvq15q30): New pattern.
107 (cnvq30q15): New pattern.
108 (cnvq31q62): New pattern.
109 (cnvq62q31): New pattern.
110 (dup.h): New pattern.
111 (dup.w): New pattern.
112 (expq31): New pattern.
113 (modadd): New pattern.
114 (mov.dw): New pattern.
115 (mov.h): New pattern.
116 (mov.w): New pattern.
117 (pki16i32): New pattern.
118 (pki16ui8): New pattern.
119 (pki32i16): New pattern.
120 (pki64i32): New pattern.
121 (pkq15q31): New pattern.
122 (pkq30q31): New pattern.
123 (pkq31q15): New pattern.
124 (pkui8i16): New pattern.
125 (vabs.h): New pattern.
126 (vabs.w): New pattern.
127 (vadd.dw): New placeholder pattern.
128 (vadd.h): New placeholder pattern.
129 (vadd.w): New placeholder pattern.
130 (vadds.h): New placeholder pattern.
131 (vadds.w): New placeholder pattern.
132 (vaddsat.h): New placeholder pattern.
133 (vaddsat.w): New placeholder pattern.
134 (vand): New pattern.
135 (vbiq.h): New placeholder pattern.
136 (vbswap.dw): New placeholder pattern.
137 (vbswap.h): New placeholder pattern.
138 (vbswap.w): New placeholder pattern.
139 (vcalc.h): New placeholder pattern.
140 (vcalc.w): New placeholder pattern.
141 (vcmov): New placeholder pattern.
142
2974be62
AM		 1432014-08-19 Alan Modra <amodra@gmail.com>
144
145 * configure: Regenerate.
146
faa743bb
RM		 1472014-08-15 Roland McGrath <mcgrathr@google.com>
148
149 * configure: Regenerate.
150 * config.in: Regenerate.
151
1a8a700e
MF		 1522014-03-04 Mike Frysinger <vapier@gentoo.org>
153
154 * configure: Regenerate.
155
bf3d9781
AM		 1562013-09-23 Alan Modra <amodra@gmail.com>
157
158 * configure: Regenerate.
159
31e6ad7d
MF		 1602013-06-03 Mike Frysinger <vapier@gentoo.org>
161
162 * aclocal.m4, configure: Regenerate.
163
fd7b2a54
NC		 1642013-05-13 Nick Clifton <nickc@redhat.com>
165
166 * v850.igen (LDSR): Accept but ignore a selID parameter.
167
d3685d60
TT		 1682013-05-10 Freddie Chopin <freddie_chopin@op.pl>
169
170 * configure: Rebuild.
171
67d7515b
NC		 1722013-01-28 Nick Clifton <nickc@redhat.com>
173
174 * simops.c (v850_rotl): New function.
175 (v850_bins): New function.
176 * simops.h: Add prototypes fir v850_rotl and v850_bins.
177 * v850-dc: Add entries for V850e3v5.
178 * v850.igen: Add support for v850e3v5.
179 (ld.dw, st.dw, rotl, bins): New patterns.
180
85367826
NC		 1812013-01-10 Nick Clifton <nickc@redhat.com>
182
183 * interp.c (sim_open): Add support for bfd_arch_v850_rh850
184 architecture type. Add support for bfd_mach_v850e2 and
185 bfd_mach_v850e2v3 machine numbers.
72f4393d
L		 186 * v850.igen (dbtrap): Add support for SIM_OPEN_DEBUG.
187 (cmpf.d): Correct order of operands.
188 (cmpf.s): Likewise.
189 (trncf.dul): New pattern.
190 (trncf.duw): New pattern.
191 (trncf.sul): New pattern.
192 (trncf.suw): New pattern.
193 * v850-dc: Correct bitfield selection for TRNCF.SW and CVTF.SW.
85367826 194
d99ff40f
NC		 1952012-09-13 Nick Clifton <nickc@redhat.com>
196
197 * v850.igen (W,WWWW): Correct computation of register number.
198 (JR32): Remove unnecessary comma.
199 (cmovf.s): Register 0 is an invalid source register.
200 (maddf.s): Remove bogus intermediary rounding.
201 (nmaddf.s): Likewise.
202 (trncf.sl): Remove bogus initial rounding.
203 (trncf.dw): Likewise.
204 (trncf.sl): Likewise.
205 (trncf.sw): Likewise.
206
5f3ef9d0
JB		 2072012-06-15 Joel Brobecker <brobecker@adacore.com>
208
209 * config.in, configure: Regenerate.
210
2aaed979
KB		 2112012-03-28 Rathish C <rathish.c@kpitcummins.com>
212
213 * sim-main.h (struct _v850_regs): Add new fields mpu0_sregs,
214 mpu1_sregs, and fpu_sregs.
215 (MPU0_SR, MPU1_SR, FPU_SR): New macros for accessing new fields
216 in _v850_regs struct.
217 (SP_REGNO): Define.
218 (SP): Redefine using SP_REGNO.
219 (PSW_REGNO, EIIC, FEIC, DBIC, DIR, EIWR, FEWR, DBWR, BSEL, PSW_NPV)
220 (PSW_DMP, PSW_IMP, ECR_EICC, ECR_FECC, FPSR, FPSR_REGNO, FPEPC)
221 (FPST, FPST_REGNO, FPCC, FPCFG, FPCFG_REGNO, FPSR_DEM, FPSR_SEM)
222 (FPSR_RM, FPSR_RN, FPSR_FS, FPSR_PR, FPSR_XC, FPSR_XCE, FPSR_XCV)
223 (FPSR_XCZ, FPSR_XCO, FPSR_XCU, FPSR_XCI, FPSR_XE, FPSR_XEV)
224 (FPSR_XEZ, FPSR_XEO, FPSR_XEU, FPSR_XEI, FPSR_XP, FPSR_XPV)
225 (FPSR_XPZ, FPSR_XPO, FPSR_XPU, FPSR_XPI, FPST_PR, FPST_XCE)
226 (FPST_XCV, FPST_XCZ, FPST_XCO, FPST_XCU, FPST_XCI, FPST_XPV)
227 (FPST_XPZ, FPST_XPO, FPST_XPU, FPST_XPI, FPCFG_RM, FPCFG_XEV)
228 (FPCFG_XEZ, FPCFG_XEO, FPCFG_XEU, FPCFG_XEI, GET_FPCC, CLEAR_FPCC)
229 (SET_FPCC, TEST_FPCC, FPSR_GET_ROUND, MPM, MPC, MPC_REGNO, TID)
230 (PPA, PPM, PPC, DCC, DCV0, DCV1, SPAL, SPAU, IPA0L, IPA0U, IPA1L)
231 (IPA1U, IPA2L, IPA2U, IPA3L, IPA3U, DPA0L, DPA0U, DPA1L, DPA1U)
232 (DPA2L, DPA2U, DPA3L, DPA3U, PPC_PPE, SPAL_SPE, SPAL_SPS, VIP)
233 (VMECR, VMTID, VMADR, VPECR, VPTID, VPADR, VDECR, VDTID, MPM_AUE)
234 (MPM_MPE, VMECR_VMX, VMECR_VMR, VMECR_VMW, VMECR_VMS, VMECR_VMRMW)
235 (VMECR_VMMS, IPA2ADDR, IPA_IPE, IPA_IPX, IPA_IPR, IPE0, IPE1, IPE2)
236 (IPE3, IPX0, IPX1, IPX2, IPX3, IPR0, IPR1, IPR2, IPR3, DPA2ADDR)
237 (DPA_DPE, DPA_DPR, DPA_DPW, DPE0, DPE1, DPE2, DPE3, DPR0, DPR1)
238 (DPR2, DPR3, DPW0, DPW1, DPW2, DPW3, DCC_DCE0, DCC_DCE1, PPA2ADDR)
239 (PPC_PPC, PPC_PPE, PPC_PPM): New macros.
240 (FPU_COMPARE): New enum.
241 (TRACE_FP_INPUT_FPU1, TRACE_FP_INPUT_FPU2, TRACE_FP_INPUT_FPU3)
242 (TRACE_FP_INPUT_BOOL1_FPU2, TRACE_FP_INPUT_WORD2)
243 (TRACE_FP_RESULT_WORD1, TRACE_FP_RESULT_WORD2): New macros.
244 * simops.c (Add32): Update prototype.
245 (update_fpsr): New function.
246 (SignalException): New function.
247 (SignalExceptionFPE): New function.
248 (check_invalid_snan): New function.
249 (v850_float_compare): New function.
250 (v850_div): New function.
251 (v850_divu): New function.
252 (v850_sar): New function.
253 (v850_shl): New function.
254 (v850_shr): New function.
255 (v850_satadd): New function.
256 (v850_satsub): New function.
257 (load_data_mem): New function.
258 (store_data_mem): New function.
259 (mpu_load_mem_test): New function.
260 (mpu_store_mem_test): New function.
261 * simops.h: Add function prototype for above mentioned functions.
262 (check_cvt_fi, check_cvt_if, check_cvt_ff): Define.
263 * v850-dc: Add entry for v850e2 and v850e2v3.
264 * v850.igen: Add support for v850e2 and v850e2v3.
265
2232061b
MF		 2662012-03-24 Mike Frysinger <vapier@gentoo.org>
267
268 * aclocal.m4, config.in, configure: Regenerate.
269
db2e4d67
MF		 2702011-12-03 Mike Frysinger <vapier@gentoo.org>
271
272 * aclocal.m4: New file.
273 * configure: Regenerate.
274
9c082ca8
MF		 2752011-10-17 Mike Frysinger <vapier@gentoo.org>
276
277 * configure.ac: Change include to common/acinclude.m4.
278
6ffe910a
MF		 2792011-10-17 Mike Frysinger <vapier@gentoo.org>
280
281 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
282 call. Replace common.m4 include with SIM_AC_COMMON.
283 * configure: Regenerate.
284
2419798b
MF		 2852011-07-05 Mike Frysinger <vapier@gentoo.org>
286
287 * interp.c (sim_do_command): Delete.
288
d0f0baa2
KB		 2892011-03-21 Kevin Buettner <kevinb@redhat.com>
290
291 * simops (OP_10007E0): Update errno handling as most traps
292 do not invoke the host's functionality directly. Invoke
293 sim_io_stat() instead of stat() for implementing TARGET_SYS_stat.
294 Implement TARGET_SYS_fstat, TARGET_SYS_rename, and TARGET_SYS_unlink.
295
d79fe0d6
MF		 2962011-02-14 Mike Frysinger <vapier@gentoo.org>
297
298 * simops.c (OP_10007E0): Change zfree to free.
299
dae477fe
AB		 3002011-01-11 Andrew Burgess <aburgess@broadcom.com>
301
302 * interp.c (sim_store_register): Update return value to
303 match new API.
304
4e9586f0
MF		 3052010-03-30 Mike Frysinger <vapier@gentoo.org>
306
307 * interp.c (interrupt_names): Add const to pointer type.
308 (do_interrupt): Add const to interrupt_name.
309
3725885a
RW		 3102010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
311
312 * configure: Regenerate.
313
d6416cdc
RW		 3142009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
315
81ecdfbb
RW		 316 * config.in: Regenerate.
317 * configure: Likewise.
318
d6416cdc
RW		 319 * configure: Regenerate.
320
b5bd9624
HPN		 3212008-07-11 Hans-Peter Nilsson <hp@axis.com>
322
323 * configure: Regenerate to track ../common/common.m4 changes.
324 * config.in: Ditto.
325
6efef468 3262008-06-06 Vladimir Prus <vladimir@codesourcery.com>
72f4393d
L		 327 Daniel Jacobowitz <dan@codesourcery.com>
328 Joseph Myers <joseph@codesourcery.com>
6efef468
JM		 329
330 * configure: Regenerate.
331
c5fbc25b
DD		 3322008-02-05 DJ Delorie <dj@redhat.com>
333
98e460c3
DD		 334 * simops.c (OP_1C007E0): Compensate for 64 bit hosts.
335 (OP_18007E0): Likewise.
336 (OP_2C007E0): Likewise.
337 (OP_28007E0): Likewise.
338 * v850.igen (divh): Likewise.
72f4393d 339
c5fbc25b
DD		 340 * simops.c (OP_C0): Correct saturation logic.
341 (OP_220): Likewise.
342 (OP_A0): Likewise.
343 (OP_660): Likewise.
344 (OP_80): Likewise.
345
346 * simops.c (OP_2A0): If the shift count is zero, clear the
347 carry.
348 (OP_A007E0): Likewise.
349 (OP_2C0): Likewise.
350 (OP_C007E0): Likewise.
351 (OP_280): Likewise.
352 (OP_8007E0): Likewise.
353
354 * simops.c (OP_2C207E0): Correct PSW flags for special divu
355 conditions.
356 (OP_2C007E0): Likewise, for div.
357 (OP_28207E0): Likewise, for divhu.
358 (OP_28007E0): Likewise, for divh. Also, sign-extend the correct
359 operand.
360 * v850.igen (divh): Likewise, for 2-op divh.
72f4393d 361
c5fbc25b
DD		 362 * v850.igen (bsh): Fix carry logic.
363
cb5c8c39
DJ		 3642007-02-20 Daniel Jacobowitz <dan@codesourcery.com>
365
366 * Makefile.in (interp.o): Uncomment and update.
367
edc5d9ec
HPN		 3682006-12-21 Hans-Peter Nilsson <hp@axis.com>
369
370 * acconfig.h: Remove.
371 * config.in: Regenerate.
372
e85e3205
RE		 3732006-06-13 Richard Earnshaw <rearnsha@arm.com>
374
375 * configure: Regenerated.
376
2f0122dc
DJ		 3772006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
378
379 * configure: Regenerated.
380
20e95c23
DJ		 3812006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
382
383 * configure: Regenerated.
384
2b193c4a
MK		 3852005-03-23 Mark Kettenis <kettenis@gnu.org>
386
387 * configure: Regenerate.
388
35695fd6
AC		 3892005-01-14 Andrew Cagney <cagney@gnu.org>
390
391 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
392 explicit call to AC_CONFIG_HEADER.
393 * configure: Regenerate.
394
f0569246
AC		 3952005-01-12 Andrew Cagney <cagney@gnu.org>
396
397 * configure.ac: Update to use ../common/common.m4.
398 * configure: Re-generate.
399
38f48d72
AC		 4002005-01-11 Andrew Cagney <cagney@localhost.localdomain>
401
402 * configure: Regenerated to track ../common/aclocal.m4 changes.
403
b7026657
AC		 4042005-01-07 Andrew Cagney <cagney@gnu.org>
405
406 * configure.ac: Rename configure.in, require autoconf 2.59.
407 * configure: Re-generate.
408
379832de
HPN		 4092004-12-08 Hans-Peter Nilsson <hp@axis.com>
410
411 * configure: Regenerate for ../common/aclocal.m4 update.
412
4389ce38
MK		 4132004-01-18 Mark Kettenis <kettenis@gnu.org>
414
415 * simops.c: Include <sys/types.h>.
416
c5ea1d53
NC		 4172003-09-05 Andrew Cagney <cagney@redhat.com>
418 Nick Clifton <nickc@redhat.com>
419
420 * interp.c (sim_open): Accept bfd_mach_v850e1.
421 * v850-dc: Add entry for v850e1.
422 * v850.igen: Add support for v850e1.
423 Add code for DBTRAP and DBRET instructions.
424 (dbtrap): Create a separate v850e1 specific instruction.
425 Only generate a trap if the target is not the v850e1.
426 Otherwise treat it as a special kind of branch.
427 (break): Mark as v850/v850e specific.
72f4393d 428
ae451ac6
ILT		 4292003-05-16 Ian Lance Taylor <ian@airs.com>
430
431 * Makefile.in (SHELL): Make sure this is defined.
432 (tmp-igen): Use $(SHELL) whenever we invoke move-if-change.
433
ebc115b7
NC		 4342003-04-06 Nick Clifton <nickc@redhat.com>
435
1eec9e33
NC		 436 * simops.c (OP_40): Delete. Move code to...
437 * v850-igen.c (): ...Here. Sign extend the first operand.
ebc115b7
NC		 438 * simops.h (OP_40): Remove prototype.
439
6b4a8935
AC		 4402003-02-27 Andrew Cagney <cagney@redhat.com>
441
442 * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
443
0da2b665
AC		 4442002-11-30 Andrew Cagney <cagney@redhat.com>
445
446 * simops.c: Use int, 1, 0 instead of boolean, true and false.
447 * sim-main.h: Ditto.
448
30458d39
JW		 4492002-09-27 Jim Wilson <wilson@redhat.com>
450
451 * simops.c (OP_E6077E0): And op1 with 7 after reading register, not
452 before.
453 (BIT_CHANGE_OP): Likewise.
454
2e8162ce
JW		 4552002-09-26 Jim Wilson <wilson@redhat.com>
456
457 * simops (OP_10007E0): Don't subtract 4 from PC.
458
5d6a173d
NC		 4592002-09-19 Nick Clifton <nickc@redhat.com>
460
461 * interp.c (sim_open): Remove reference to v850ea.
462 (sim_create_inferior): Likewise.
463 * v850-dc: Likewise.
464 * v850.igen: Remove all references to v850ea, including v850ea
465 specific instructions.
466
e551c257
NC		 4672002-08-29 Nick Clifton <nickc@redhat.com>
468
469 From 2001-08-23 Catherine Moore <clm@redhat.com>
470
471 * Makefile.in: Add gen-zero-r0 option.
472 * sim-main.h (GPR_SET, GPR_CLEAR): Define.
473 * simops.c (OP_24007E0): Sign extend the imm9
474 operand of a mul instruction.
475
d62274a3
AC		 4762002-06-17 Andrew Cagney <cagney@redhat.com>
477
478 * simops.c (trace_result): Fix printf formatting.
479
c8cca39f
AC		 4802002-06-16 Andrew Cagney <ac131313@redhat.com>
481
482 * configure: Regenerated to track ../common/aclocal.m4 changes.
483
7ef2d4e7
AC		 4842001-12-02 Andrew Cagney <ac131313@redhat.com>
485
486 * Makefile.in (simops.h, table.c): Delete targets.
487 (tmp-gencode, gencode.o, gencode): Delete targets.
488 (simops.h): New file.
489 ($(BUILT_SRC_FROM_IGEN)): Do not depend on simops.h.
490 * gencode.c: Delete file.
72f4393d 491
d4424ada
C		 4922001-04-15 J.T. Conklin <jtc@redback.com>
493
494 * Makefile.in (simops.o): Add simops.h to dependency list.
495
1e6cd159
AC		 4962001-03-14 Andrew Cagney <ac131313@redhat.com>
497
498 * Makefile.in (gencode): Link with libintl.
499
42acc51e
JL		 5002001-01-31 Jonathan Larmour <jlarmour@redhat.com>
501
502 * Makefile.in (gencode): Link with libopcodes in build tree rather
503 than building source files from there.
504
896ad910
NC		 5052000-05-30 Nick Clifton <nickc@cygnus.com>
506
507 * v850.igen: Remove illegal instruction pattern, since it is the
508 same as the breakpoint pattern.
509
eb2d80b4
AC		 510Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
511
512 * configure: Regenerated to track ../common/aclocal.m4 changes.
513
b9791fcd
FCE		 5142000-04-14 Gary Thomas <gthomas@redhat.com>
515
516 * v850.igen: Define 'br *' as illegal since this is the only
517 way to provide a breakpoint on some v850 family processors.
518
de616bc7
FCE		 5192000-03-24 Frank Ch. Eigler <fche@redhat.com>
520
521 * v850.igen (ilgop): New insn pattern for four-byte breakpoints.
522
d4f3574e
SS		 523Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
524
525 * configure: Regenerated to track ../common/aclocal.m4 changes.
526
cd0fc7c3
SS		 5271999-05-08 Felix Lee <flee@cygnus.com>
528
529 * configure: Regenerated to track ../common/aclocal.m4 changes.
72f4393d 530
c906108c
SS		 531Tue Dec 1 17:25:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
532
533 * Makefile.in (NL_TARGET): Define as -DNL_TARGET_v850.
534
535Wed Nov 25 17:52:58 1998 Andrew Cagney <cagney@b1.cygnus.com>
536
537 * Makefile.in (simops.o): Depends on targ-vals.h
538 * simops.c: Include targ-vals.h instead of
539 libgloss/.../syscall.h. Replace SYS_* with TARGET_SYS_*.
540 (divn, divun, OP_1C007E0, OP_18207E0, OP_1C207E0,OP_18007E0):
541 Replace signed long int with signed32.
542
543Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
544
545 * interp.c: #include "itable.h".
546 (get_insn_name): New function.
547 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
548 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
549
550Wed May 6 19:43:27 1998 Doug Evans <devans@canuck.cygnus.com>
551
552 * sim-main.h (INSN_NAME): New arg `cpu'.
553
554Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
555
72f4393d 556 * configure: Regenerated to track ../common/aclocal.m4 changes.
c906108c
SS		 557
558Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
559
560 * configure: Regenerated to track ../common/aclocal.m4 changes.
561 * config.in: Ditto.
562
563Sun Apr 26 15:19:14 1998 Tom Tromey <tromey@cygnus.com>
564
565 * acconfig.h: New file.
566 * configure.in: Reverted change of Apr 24; use sinclude again.
567
568Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
569
570 * configure: Regenerated to track ../common/aclocal.m4 changes.
571 * config.in: Ditto.
572
573Fri Apr 24 11:18:08 1998 Tom Tromey <tromey@cygnus.com>
574
575 * configure.in: Don't call sinclude.
576
577Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
578
579 * configure: Regenerated to track ../common/aclocal.m4 changes.
580 * sim-main.h (SIM_MAIN_H): Wrap header.
581
582Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
583
584 * configure: Regenerated to track ../common/aclocal.m4 changes.
585
586Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
587
588 * configure: Regenerated to track ../common/aclocal.m4 changes.
589
590Tue Mar 10 15:54:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
591
592 * interp.c (sim_stop): Delete, second attempt.
593
594Thu Feb 26 19:09:47 1998 Andrew Cagney <cagney@b1.cygnus.com>
595
596 * interp.c (sim_info): Delete.
597
598Wed Feb 18 10:47:32 1998 Andrew Cagney <cagney@b1.cygnus.com>
599
600 * sim-main.h (TRACE_ALU_INPUT*): Delete. Moved to sim-trace.[hc].
601
602 * simops.c (trace_result): Call trace_generic instead of
603 trace_one_insn.
604 (trace_module): Change variable type to integer.
605 (trace_input): Initialize trace_module with TRACE_ALU_IDX.
606
607 * sim-main.h (trace_module): Change variable decl to integer type.
608 (TRACE_BRANCH*, TRACE_LD, TRACE_ST): Update.
72f4393d 609
c906108c
SS		 610Tue Feb 17 12:51:18 1998 Andrew Cagney <cagney@b1.cygnus.com>
611
612 * interp.c (sim_store_register, sim_fetch_register): Pass in
613 length parameter. Return -1.
614
615Tue Feb 3 16:24:42 1998 Andrew Cagney <cagney@b1.cygnus.com>
616
617 * sim-main.h (IMEM16, IMEM16_IMMED): Rename IMEM and
618 IMEM_IMMED. To match recent igen change.
619
620Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
621
622 * configure: Regenerated to track ../common/aclocal.m4 changes.
623
624Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
625
626 * configure: Regenerated to track ../common/aclocal.m4 changes.
627
628Fri Jan 30 09:51:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
629
630 * sim-main.h (CPU_CIA): Delete, replaced by.
631 (CIA_SET, CIA_SET): Define.
632
633Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
634
635 * configure: Regenerated to track ../common/aclocal.m4 changes.
636
637Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
638
639 * configure: Regenerated to track ../common/aclocal.m4 changes.
640 * config.in: Ditto.
641
642Fri Dec 5 09:26:08 1997 Nick Clifton <nickc@cygnus.com>
643
644 * v850.igen: Revert break value back to its old value.
645
646Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
647
648 * configure: Regenerated to track ../common/aclocal.m4 changes.
649
650Wed Dec 3 17:27:19 1997 Nick Clifton <nickc@cygnus.com>
651
652 * v850.igen: Make break have a zero first field, since otherwise
653 it clashes with the DIVH instruction.
654
655Sat Nov 22 21:32:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
656
657 * simops.c (OP_10007E0): Rename SIGABRT -> SIM_SIGABRT. Give
658 sim_stopped instead of sim_signalled.
659
660 * v850.igen (BREAK), simops.c (OP_12007E0): Rename SIGTRAP to
661 SIM_SIGTRAP.
662 (illegal): Rename SIGILL to SIM_SIGILL.
72f4393d 663
c906108c
SS		 664 * sim-main.h, simops.c, interp.c: Do not include signal.h.
665
666 * sim-main.h: Include sim-signal.h instead of signal.h.
667 (SIGTRAP, SIGQUIT): Delete definition.
668 (SIG_V850_EXIT): Delete definition.
669
670Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
671
672 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
673
674Fri Oct 31 10:33:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
675
676 * interp.c (sim_open): Check state magic number.
677 (sim-assert.h): Include.
678
679Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
680
681 * v850.igen: Add model filter field to records.
682
683Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
684
685 * configure: Regenerated to track ../common/aclocal.m4 changes.
686
687Fri Sep 26 11:56:02 1997 Felix Lee <flee@cygnus.com>
688
689 * sim-main.h: delete null override of SIM_ENGINE_HALT_HOOK and
690 SIM_ENGINE_RESTART_HOOK.
72f4393d 691
c906108c
SS		 692Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
693
694 * configure: Regenerated to track ../common/aclocal.m4 changes.
695
696Wed Sep 24 17:28:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
697
698 * sim-main.h (WITH_TARGET_WORD_MSB): Delete.
699
700 * configure.in (SIM_AC_OPTION_BITSIZE): Specify 32 bit
701 architecture with MSB == 31.
702
703Wed Sep 24 14:04:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
704
705 * v850.igen: Make divh insn with RRRRR==0 breakpoint.
706
707Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
708
709 * configure: Regenerated to track ../common/aclocal.m4 changes.
710
711Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
712
713 * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN,
714 SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common.
715 (SIM_EXTRA_CFLAGS): Update.
72f4393d 716
c906108c
SS		 717Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
718
719 * configure: Regenerated to track ../common/aclocal.m4 changes.
720 * configure.in: Really specify NONSTRICT_ALIGNMENT as the default.
721
722Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
723
724 * configure.in: Specify NONSTRICT_ALIGNMENT as the default.
725 * configure: Regenerated to track ../common/aclocal.m4 changes.
726
727Fri Sep 19 10:37:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
728
729 * v850.igen (disp16): Use EXTEND16 to sign extend disp.
730 (disp22): Only shift left by 1, not 2.
731 ("jmp"): Ensure PC is 2 byte aligned.
732
733 * simops.c, v850.igen: Move "Bcond", "jr", "jarl" code to
734 v850.igen. Fix tracing.
735
736 * simops.c (OP_300, OP_400, OP_500): Move "sdl.b", "sld.h",
737 "sld.w" insns to v850.igen. Fix tracing.
738 (OP_70): Ditto for "sld.hu".
739
740 * v850.igen: Clarify tracing of "sld.b", "sld.h" et.al.
741
742 * simops.c (condition_met): Make global.
743
744 * sim-main.h (TRACE_ALU_INPUT3, TRACE_BRANCH0, TRACE_LD,
745 TRACE_ST): Define.
746 (TRACE_LD_NAME): Define.
747
748 * simops.c: Move "cmov", "cmov imm" to v850.igen, fix.
749
750Wed Sep 17 16:21:08 1997 Andrew Cagney <cagney@b1.cygnus.com>
751
752 * simops.c: Move "mov", "reti", to v850.igen, fix tracing.
72f4393d 753
c906108c
SS		 754 * interp.c (hash): Delete.
755
756 * v850.igen (nop): Really do nothing.
757
758 * interp.c (do_interrupt): Mask interrupts after PSW is saved, not
759 before.
760 * v850.igen (reti): Return to current PC not previous.
761
762Wed Sep 17 14:02:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
763
764 * simops.c: Move "ctret", "bsw", "hsw" to v850.igen, fix tracing.
765 (trace_module): Global, save component/module name across insn.
766
767 * simops.c: Move "bsh" to v850.igen, fix.
72f4393d 768
c906108c
SS		 769 * v850.igen (callt): Load correct number of bytes. Fix tracing.
770 (stsr, ldsr): Correct src, dest fields. Fix tracing.
771 (ctret): Force alignment. Fix tracing.
72f4393d 772
c906108c
SS		 773Tue Sep 16 22:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
774
775 * simops.c (trace_output): Add result argument.
776 (trace_result): New function. Simpler version of trace_output,
777 assumes trace needed.
778 (trace_output): Call trace_result.
779 (trace_output): For IMM_REG_REG, trace correct register.
780 (trace_input): Add case for 16bit immediates.
781 (OP_600, OP_640, OP_680, OP_6C0, OP_6A0): Use.
782
783 * sim-main.h (TRACE_ALU_INPUT, TRACE_ALU_RESULT): Define.
784 (trace_values, trace_name, trace_pc, trace_num_values): Make
785 global.
786 (GR, SR): Define.
72f4393d 787
c906108c
SS		 788 v850.insn (movea, stsr): Use.
789 (sxb, sxh, zxb, zxh): Ditto.
72f4393d 790
c906108c
SS		 791Tue Sep 16 21:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
792
793 * simops.c: Move "movea" from here.
794 * v850.igen: To here.
795
796 * v850.igen (simm16): Define, sign extend imm16.
797 (uimm16): Define, no sign extension.
798 (addi, andi, movea, movhi, mulhi, ori, satsubi, xori): Use.
72f4393d 799
c906108c
SS		 800 * simops.c: Move "sxh", "switch", "sxb", "callt", "dispose",
801 "mov32" from here.
802 * v850.igen: To here.
803 (switch): Fix off by two error in NIA calc.
72f4393d 804
c906108c
SS		 805Tue Sep 16 15:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
806
807 * simops.c (trace_pc, trace_name, trace_values, trace_num_values):
808 New static globals.
809 (trace_input): Just save pc, name and values for trace_output.
810 (trace_output): Write trace values to a buffer. Use
811 trace_one_insn to print trace info and buffer.
812 (SIZE_OPERANDS, SIZE_LOCATION): Delete.
72f4393d 813
c906108c
SS		 814Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
815
816 * sim-main.h (struct _sim_cpu): Add psw_mask so that reserved bits
817 can be masked out.
818
819 * simops.c (OP_2007E0, OP_4007E0): Move "ldsr", "stsr"
820 instructions from here.
821 * v850.igen (ldsr, stsr): To here. Mask out reserved bits when
822 setting PSW.
72f4393d 823
c906108c
SS		 824 * interp.c (sim_open): Set psw_mask if machine known.
825
826Tue Sep 16 10:20:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
827
828 * v850-dc: Add rule to diferentiate between breakpoint and divh.
829 * v850.igen (break): New instruction, breakpoint simulator.
830 * v850.igen (breakpoint): Enable. Change to a 32bit instruction.
831
832Mon Sep 15 18:44:05 1997 Jim Wilson <wilson@cygnus.com>
833
834 * simops.c (Multiply64): Don't store into register zero.
835
836Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
837
838 * Makefile.in (semantics.o): Add dependency.
839
840 * sim-main.h (SAVE_1, SAVE_2): Perform backward compatible save,
841 do not adjust CIA/NIA.
842
843Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
844
845 * simops.c (OP_300, OP_400, OP_70): Make behavour depend on PSW[US].
72f4393d 846
c906108c
SS		 847 * simops.c: Move "divun", "sld.bu", "divhn", "divhun", "divn",
848 "divun", "pushml" code from here to v850.igen.
849 (divun): Make global.
850 (type3_regs): Make global
72f4393d 851
c906108c
SS		 852 * v850.igen: Move simops.c code to here.
853
854 * interp.c (sim_create_inferior): For v850eq set US bit by
855 default.
856
857 * interp.c (sim_open): Don't set arch, now set by
858 sim_analyze_program.
859
860 * configure: Regenerated to track ../common/aclocal.m4 changes.
861
862Mon Sep 15 14:39:34 1997 Andrew Cagney <cagney@b1.cygnus.com>
863
864 * simops.c (op_types): Move from here.
865 sim-main.h: To here.
866
867 * sim-main.h (trace_input, trace_output), simops.c: Make global.
868
869 * simops.c (OP_60): Move "jmp" code from here.
870 * v850.igen (jmp): To here.
871
872 * simops.c (OP_60): Move "sld.bu" code from here.
873 * v850.igen (sld.bu): To here.
874
875Fri Sep 12 15:11:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
876
877 * v850.igen (prepare, ...): Add to v850eq architecture.
878
879 * interp.c (sim_open): Default to v850eq.
72f4393d 880
c906108c
SS		 881 * interp.c (sim_open): Default to v850e.
882 * sim-main.h (signal.h): Include.
883
884 * v850.igen (illegal): Report/halt illegal instructions.
885
886 * Makefile.in (SIM_EXTRA_CFLAGS): Add SIM_RESERVED_BITS.
887
888 * configure.in: Add reserved bits option.
889 * configure: Regenerate.
890
891Thu Sep 11 08:40:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
892
893 * interp.c (sim_open): Use sim_do_commandf instead of asprintf.
894
72f4393d 895 * sim-main.h (INSN_NAME):
c906108c
SS		 896
897 * Makefile.in (INCLUDE): Add SIM_EXTRA_DEPS.
898 (SIM_EXTRA_DEPS): Add itable.h
899 (tmp-gencode): Does not depend on simops.h
900
901 * sim-main.h (itable.h): Include.
902 (MAX_INSNS, INSN_NAME): Define.
903
904 * interp.c: Compute inttype from the interrupt_names index that
905 was passed in.
906
907Wed Sep 10 10:25:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
908
909 * simops.c (trace_input): Use trace_printf instead of
910 sim_io_printf.
911 (trace_output): Ditto.
912 (trace_input): Only trace when TRACE_ALU_P. Delete code
913 disasembling instruction.
914 (trace_output): Only trace when TRACE_ALU_P.
915
916Tue Sep 9 01:29:50 1997 Andrew Cagney <cagney@b1.cygnus.com>
917
918 * simops.c (trace_input, trace_output): Use sim_io_printf.
919 (OP_620): Pass correct argument to trace.
920 (OP_E607E0): Ditto.
921 (trace_input): Obtain prog_bfd, text_start et.al from simulator
922 struct.
923
924Mon Sep 8 21:03:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
925
926 * v850.igen: New file.
927 * v850-dc: New file.
928
929Mon Sep 8 18:33:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
930
931
932 * sim-main.h (SEXT16): Delete, use EXTEND16.
933 (SEXT8): Delete, use EXTEND8.
934 (SEXT32): Delete, used?
935 (SEXT40, SEXT44, SEXT64): Use UNSIGNED64 for constants, not ...LL.
936 (WITH_TARGET_WORD_MSB): Define as 31. v850 little bit endian.
72f4393d 937
c906108c
SS		 938 * simops.c: Use EXTEND15 from sim-bits instead of SEXT16.
939
940 * sim-main.h (DEBUG_TRACE, DEBUG_VALUES, v850_debug): Delete,
941 replace with TRACE_INSN_P and TRACE_ALU_P.
942
943 * simops.c (trace_input, trace_output): Update.
944
945 * interp.c (sim_engine_run): Delete.
946 (lookup_hash): Delete.
947 (sim_open): Do not fill hash table.
948 (sim_trace): Delete.
949
950Fri Sep 5 17:04:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
951
952 * simops.c (OP_FFFF): Use sim_engine_halt.
953 (OP_12007E0): Ditto.
954 (OP_10007E0): Ditto.
955
956 * sim-main.h (struct sim_cpu): Delete member exception. Using
957 sim-engine et.al.
958
959 * interp.c (sim_info): Do not do anything in sim-info.
960 (sim_stop): Delete, replace with sim-stop.
961 (sim_stop_reason): Delete, replace with sim-reason.
962
963 * sim-main.h (WITH_WATCHPOINTS): Define.
964 (WITH_MODULO_MEMORY): Define
72f4393d 965
c906108c
SS		 966 * Makefile.in (SIM_OBJS): Add sim-resume, sim-watch, sim-stop,
967 sim-reason.
968
969 * interp.c (enum interrupt_cond_type): Delete.
970 (struct interrupt_generator): Delete.
971 (enum interrupt_type): Drop int_none.
972 (sim_open): Initialize WATCHPOINT module.
973 (sim_resume, sim_run): Rename sim_resume to sim_run.
974 (sim_engine_run): Replace interrupt code with call to sim-events.
975 (sim_set_interrupt): Delete.
976 (sim_parse_number): Delete.
977
978Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
979
980 * configure: Regenerated to track ../common/aclocal.m4 changes.
981
982Thu Sep 4 18:11:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
983
984 * simops.c (fetch_argv): New function, fetch a arg vector from
985 simulator memory.
986
987 * configure.in: Check for fork, execve, execv.
988 * configure: Regenerate.
989
990 * interp.c (sim_store_register, sim_fetch_register): Use H2T_4 and
991 T2H_4 for byte swapping.
992
993 * sim-main.h, interp.c (get_word, get_half, get_byte, put_word,
994 put_half, put_byte): Delete.
995
996 * Makefile.in (SIM_OBJS): Add sim-memopt.o module.
997
998 * sim-main.h (load_mem, store_mem): Redefine as macros.
999 (IMEM, IMEM_IMMED): New macros - fetch instructions.
1000
1001 * simops.c (OP_10007E0): For SYS_read, SYS_write, SYS_open
1002 transfer data via a buffer.
1003 (fetch_str): New function, fetch string from memory.
1004
1005 * Makefile.in (SIM_OBJS): Add sim-hrw.o module.
1006
1007 * interp.c (sim_open): Establish memory maps using sim-memopt.c
1008 via sim_do_command.
1009 (sim_do_command): Print error if memory-map command is used. Call
1010 sim_args_command.
1011 (map): Delete, replaced by sim-core.
1012 (sim_memory_init): Delete, replaced by sim-core.
1013 (sim_set_memory_map): Delete, replaced by sim-memopt.
1014 (load_mem): Delete, replaced by sim-core.
1015 (store_mem): Delete, replaced by sim-core.
1016 (sim_write): Delete, replaced by sim-hrw.
1017 (sim_read): Delete, replaced by sim-hrw.
1018
1019 * sim-main.h (struct sim_state): Remove memory members, using
1020 sim-core.c
1021
1022Wed Sep 3 10:18:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
1023
1024 * sim-main.h: Replace SIM_HAVE_FLATMEM with mem ptr.
1025 * interp.c (map): Do not add to a void pointer.
72f4393d 1026
c906108c
SS		 1027 * Makefile.in (INCLUDE): Add sim-main.h
1028
1029 * configure.in: Check for time.h
1030 * configure: Re-generate.
1031
1032 * interp.c (struct interrupt_generator): Make time unsigned long,
1033 address SIM_ADDR.
1034 (sim_resume): Make oldpc SIM_ADDR.
1035 (struct hash_entry): Make mask/opcode unsigned.
1036
1037 * v850_sim.h (struct simops ): Make opcode and mask unsigned.
1038
1039 * simops.c (utime.h): Include if available.
1040 (OP_10007E0): Check for UTIME function.
1041 (divun): Put parentheses around shift argument.
1042 (OP_640): Put parentheses around shift argument, was wrong.
1043 (OP_107F0): Return something.
1044
1045 * interp.c (sim_parse_number): Use strtoul not strtol.
1046 (sim_resume): Use sim_elapsed_time_get to keep track of the time.
1047
1048 * configure.in (SIM_AC_OPTION_WARNINGS): Add.
1049 (SIM_AC_OPTION_ENDIAN): Set to hardwired big.
1050 (SIM_AC_OPTION_HOST_ENDIAN): Add.
1051 (AC_CHECK_FUNCS): Add utime.
1052 (AC_CHECK_HEADERS): Add stdlib.h, string.h, strings.h, utime.h
1053 configure: Regenerate.
72f4393d 1054
c906108c
SS		 1055
1056 * Makefile.in (SIM_RUN_OBJS): Use nrun.o.
1057 (SIM_OBJS): Add sim-io.o, sim-hload.o, sim-utils.o, sim-options.o,
1058 sim-config.o, sim-module.o, sim-events.o, sim-core.o,
1059 sim-endian.o, sim-engine.o, sim-trace.o, sim-profile.o
1060 (SIM_ENDIAN, SIM_WARNGINS): Define.
1061
1062 * simops.c (OP_10007E0): Use sim_io_* for transfers.
1063
1064 * interp.c (sim_resume): Pass sd around.
1065
1066 * simops.c (sim-main.h): Include.
1067
1068 * gencode.c (write_template): Generate #include sim-main.h.
1069 (write_opcodes): Ditto.
72f4393d 1070
c906108c
SS		 1071 * interp.c (prog_bfd, prog_bfd_was_opened_p): Delete.
1072 (v850_callback): Ditto.
1073 (sim_kind, myname): Ditto.
1074 (lookup_hash): Pass SD. Use sim_io_error.
1075 (sim_set_memory_map): Pass in SD, use.
1076 (init_system): Pass in SD, use.
1077 (sim_open): Update.
1078 (sim_set_profile): Delete.
1079 (sim_set_profile_size): Delete.
1080 (do_interrupt): Pass in SD, use.
1081 (sim_info): Use sim_io_printf.
1082 (sim_create_inferior): Reset registers. Set PC from prog_bfd
1083 argument.
1084 (sim_load): Delete, use common/sim-hload.c
1085 (sim_size): Rename to sim_memory_init.
1086 (sim_write): Remove call to init_system.
1087 (init_system): Delete.
1088 (sim_set_callbacks): Delete.
1089 (sim_set_interrupt): Pass in SD, use.
1090 (start_time): Delete.
72f4393d 1091
c906108c
SS		 1092 * v850_sim.h: Remove everything except `struct simops' from here.
1093 * sim-main.h: Move most to here.
1094 * gencode.c: Move #includes to here.
1095
1096 * sim-main.h(struct _sim_cpu): Rename struct _state.
1097 (#define PC, et.al.): Update
1098 (v850_callback): Delete. Replaced with SIM_DESC arg.
1099 (int8, uint8, int16, uint16, int32, uint32): Define types using
1100 unsigned8 et.al from common/sim-types.h.
1101 * sim-main.h (State): Define as STATE_CPU.
1102
1103Mon Sep 1 12:07:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
1104
1105 * configure.in: Check for time, chmod.
1106 * configure: Regenerate.
1107 * simops.c (SYS_time, SYS_chmod): Use HAVE_TIME, HAVE_CHMOD.
72f4393d 1108
c906108c
SS		 1109 * simops.c (../../libgloss/v850/sys/syscall.h): Include instead of
1110 sys/syscall.h.
1111 (OP_10007E0): Check the existance each SYS_* macro independantly.
1112
1113 * v850_sim.h (SIGQUIT, SIGTRAP): Only define if missing.
1114
1115Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1116
1117 * configure: Regenerated to track ../common/aclocal.m4 changes.
1118 * config.in: Ditto.
1119
1120Tue Aug 26 10:42:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1121
1122 * interp.c (sim_kill): Delete.
1123 (sim_create_inferior): Add ABFD argument.
1124 (sim_load): Move setting of PC from here.
1125 (sim_create_inferior): To here.
1126
1127Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1128
1129 * configure: Regenerated to track ../common/aclocal.m4 changes.
1130 * config.in: Ditto.
1131
1132Mon Aug 25 11:31:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1133
1134 * interp.c (sim_open): Add ABFD argument.
1135
1136Fri Aug 22 10:39:28 1997 Nick Clifton <nickc@cygnus.com>
1137
1138 * simops.c (bsh): Only set CY flag if either of the bottom
1139 bytes is zero.
72f4393d 1140
c906108c
SS		 1141 * simops.c (prepare, dispose): Lower numbered
1142 registers go to higher numbered address.
1143
1144 * simops.c (unsigned divide instructions): S bit set if result has
1145 top bit set.
72f4393d 1146
c906108c
SS		 1147 * simops.c (pushml, pushmh, popml, popmh): Lower numbered
1148 registers go to higher numbered address.
72f4393d 1149
c906108c
SS		 1150Wed Aug 20 13:56:35 1997 Nick Clifton <nickc@cygnus.com>
1151
1152 * simops.c (OP_107E0, OP_107F0, OP_307E0, OP_307F0): Use correct
1153 interpretation of SR bit in list18 structure.
1154 (divn, divun): New functions to perform N step divide functions.
1155
1156Mon Aug 18 10:59:02 1997 Nick Clifton <nickc@cygnus.com>
1157
1158 * simops.c (OP_300, OP_400, OP_60, OP_70): Support variant opcodes
1159 with US bit set in the PSW.
1160
1161Wed Aug 13 19:06:55 1997 Nick Clifton <nickc@cygnus.com>
1162
1163 * interp.c (sim_resume): Opcode functions return amount to be
1164 added to PC and all opcodes take a standard format in the OP[]
1165 array.
72f4393d 1166
c906108c
SS		 1167 (do_format_*): Functions removed.
1168
1169 * v850_sim.h (SP, EP): New register mnemonics.
72f4393d 1170
c906108c
SS		 1171 * gencode.c (write_header): Functions prototypes return an
1172 integer.
1173
1174 * simops.c: Opcode functions return amount to be added to PC.
72f4393d 1175
c906108c 1176 * v850_sim.h (CTPC, CTPSW, CTBP): New register mnemonics.
72f4393d 1177
c906108c 1178 * simops.c: Add support for v850e instructions.
72f4393d 1179
c906108c 1180 * simops.c: Add support for v850eq instructions.
72f4393d 1181
c906108c
SS		 1182Tue May 20 10:24:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1183
1184 * interp.c (sim_open): Add callback argument.
1185 (sim_set_callbacks): Delete SIM_DESC argument.
1186
1187Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
1188
1189 * configure: Regenerated to track ../common/aclocal.m4 changes.
1190
1191Wed Apr 23 17:20:16 1997 Doug Evans <dje@canuck.cygnus.com>
1192
1193 * interp.c (prog_bfd_was_opened_p): New static local.
1194 (prog_bfd): New global variable.
1195 (sim_open): Undo patch to add -E support.
1196 (sim_close): Close prog_bfd if sim_load opened it.
1197 (sim_load): Record bfd of loaded file in prog_bfd.
1198 * simops.c (prog_bfd): Renamed from exec_bfd.
1199
1200Fri Apr 18 14:17:12 1997 Andrew Cagney <cagney@b1.cygnus.com>
1201
1202 * interp.c (sim_stop): Stub function.
1203
1204Thu Apr 17 03:53:18 1997 Doug Evans <dje@canuck.cygnus.com>
1205
1206 * Makefile.in (SIM_OBJS): Add sim-load.o.
1207 * interp.c (sim_kind, myname): New static locals.
1208 (sim_open): Set sim_kind, myname. Ignore -E arg.
1209 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
1210 load file into simulator. Set start address from bfd.
1211 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
1212
1213Wed Apr 16 19:53:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
1214
1215 * simops.c (OP_10007E0): Only provide system calls SYS_execv,
1216 SYS_wait, SYS_wait, SYS_utime, SYS_time if defined by the host.
1217
1218Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1219
1220 * configure: Regenerated to track ../common/aclocal.m4 changes.
1221 * config.in: Ditto.
1222
1223Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
1224
1225 * interp.c (sim_open): New arg `kind'.
1226
1227 * configure: Regenerated to track ../common/aclocal.m4 changes.
1228
1229Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1230
1231 * configure: Regenerated to track ../common/aclocal.m4 changes.
1232
1233Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1234
1235 * configure: Regenerated to track ../common/aclocal.m4 changes.
1236
1237Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1238
1239 * configure: Re-generate.
1240
1241Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
1242
1243 * configure: Regenerate to track ../common/aclocal.m4 changes.
1244
1245Thu Mar 13 13:00:54 1997 Doug Evans <dje@canuck.cygnus.com>
1246
1247 * interp.c (sim_open): New SIM_DESC result. Argument is now
1248 in argv form.
1249 (other sim_*): New SIM_DESC argument.
1250
1251Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
1252
1253 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1254 COMMON_{PRE,POST}_CONFIG_FRAG instead.
1255 * configure.in: sinclude ../common/aclocal.m4.
1256 * configure: Regenerated.
1257
1258Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
1259
1260 * configure configure.in Makefile.in: Update to new configure
1261 scheme which is more compatible with WinGDB builds.
1262 * configure.in: Improve comment on how to run autoconf.
1263 * configure: Re-run autoconf to get new ../common/aclocal.m4.
1264 * Makefile.in: Use autoconf substitution to install common
1265 makefile fragment.
1266
1267Mon Jan 20 16:05:34 1997 Michael Meissner <meissner@tiktok.cygnus.com>
1268
1269 * simops.c (OP_{E0,2E0,6E0}): The multiply operations sign extend,
1270 not zero extend.
1271
1272Tue Jan 14 17:06:03 1997 Stu Grossman (grossman@critters.cygnus.com)
1273
1274 * simops.c: Put ifdefs around things to make MSVC happy. Get rid
1275 of unistd.h. Disable SYS_stat, SYS_chown, SYS_time, SYS_times,
1276 SYS_gettimeofday and SYS_utime from MSVC.
1277
1278Tue Dec 31 18:11:13 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1279
1280 * simops.c (OP_10007E0): Know that kill encodes the signal number
1281 via: 0xdead0000 | signal and turn it back into a signal.
1282
1283Fri Dec 27 14:44:06 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1284
1285 * v850_sim.h (SIG_V850_EXIT): Define as -1.
1286
1287 * interp.c (sim_open): Cast calloc function.
1288 (sim_stop_reason): If signal is SIG_V850_EXIT, inform gdb the
1289 program exited with the appropriate exit code.
1290 (sim_set_interrupt): Declare buildargv.
1291
1292 * simops.c (OP_10007E0): Make exit signal normal exit. Make time
1293 type correct and work on big endian systems.
1294
1295Wed Nov 20 02:18:44 1996 Doug Evans <dje@canuck.cygnus.com>
1296
1297 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1298 (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define.
1299 * configure.in: Simplify using macros in ../common/aclocal.m4.
1300 Call AC_CHECK_HEADERS(unistd.h).
1301 * configure: Regenerated.
1302 * config.in: New file.
1303 * simops.c: #include "config.h". #include <unistd.h> if present.
1304
1305Sun Nov 3 23:02:54 1996 Stan Shebs <shebs@andros.cygnus.com>
1306
1307 * v850_sim.h (State): New slots dummy_mem, pending_nmi.
1308 (EIPC, etc): New macros for system registers.
1309 * simops.c, interp.c: Use everywhere.
1310
1311 * interp.c: Add support for interrupts issued by interrupt
1312 generators, either PC- or time-based. Controlled by simulator
1313 command "sim interrupt".
1314
1315 * interp.c: Add support for variable-size allocation of memory,
1316 via simulator command "sim memory-map".
1317 (map): Issue SIGSEGV for references to invalid memory regions.
72f4393d 1318
c906108c 1319Thu Oct 31 14:44:10 1996 Gavin Koch <gavin@cygnus.com>
72f4393d
L		 1320
1321 * simops.c: Include <sys/time.h> for struct timeval and
1322 struct timezone.
1323
c906108c
SS		 1324Wed Oct 30 08:49:10 1996 Jeffrey A Law (law@cygnus.com)
1325
1326 * simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday.
1327
1328 * simops.c (OP_10007E0): Handle SYS_time.
1329
1330Tue Oct 29 14:22:55 1996 Jeffrey A Law (law@cygnus.com)
1331
1332 * simops.c: Include <sys/stat.h>.
1333 (OP_10007E0): Handle SYS_stat.
1334
1335Thu Oct 24 12:26:35 1996 Jeffrey A Law (law@cygnus.com)
1336
1337 * simops.c (OP_10007E0): Don't declare errno.
1338
1339 * simops.c (OP_500): Mask off low bit in displacement
1340 for sld.w.
1341 (OP_501): Similarly.
1342
1343 * simops.c (OP_500): Fix displacement handling for sld.w.
1344 (OP_501): Similarly for sst.w.
1345
1346 * simops.c (trace_input): Remove all references to SEXT7.
1347 (OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement
1348 is zero extended for sst/sld instructions.
1349 * v850_sim.h (SEX7): Delete. It's no longer needed (and it
1350 was incorrect anyway).
1351
1352Thu Oct 24 10:33:33 1996 Stu Grossman (grossman@critters.cygnus.com)
1353
1354 * Makefile.in: Get rid of srcroot. Set all INSTALL macros via
1355 autoconf.
1356 * gencode.c (write_opcodes): Pad operands field to account for
1357 MSVC braindamage.
1358 * simops.c: Include errno.h. Exclude SYS_chown, since MSVC
1359 doesn't support it. (Why is this here in the first place?!?)
1360 * v850_sim.h: Get rid of 64 bit defs. Also, get rid of #elif's.
1361 Change number of operands in struct simops from 9 to 6. Define
1362 SIGTRAP and SIGQUIT for MSVC.
1363
1364Tue Oct 15 16:19:51 1996 Stu Grossman (grossman@critters.cygnus.com)
1365
1366 * interp.c (MEM_SIZE): It's now bytes, not a power of 2.
1367 * (map): Add support for external mem in the 1->2 meg range.
1368 Also, abort() when memory access is way out of bounds. (Better to
1369 die than to give wrong result. (This will be fixed later.))
1370 * (sim_size): MEM_SIZE is now bytes, not shift factor.
1371
1372Tue Oct 1 15:53:24 1996 Gavin Koch <gavin@cygnus.com>
72f4393d
L		 1373
1374 * simops.c (trace_input): Swapped order of operands for output
1375 output of OP_IMM_REG. Changed the fetching of the operands for
1376 OP_LOAD32, and OP_STORE32 to work like op-function.
1377
c906108c
SS		 1378Mon Sep 30 15:46:33 1996 Stu Grossman (grossman@critters.cygnus.com)
1379
1380 * interp.c: Move includes of remote-sim.h and callback.h to
1381 v850-sim.h.
1382 * (lookup_hash): Add PC to report of hash failure.
1383 * (map load_mem store_mem): New memory subsystem. Models V851
1384 memory system.
1385 * (sim_write sim_read): Use new memory subsystem.
1386 * (sim_resume): Don't load and save PC into EIPC anymore. Needed
1387 to make user-defined traps work right.
1388 * simops.c (OP_*): Use new memory subsystem.
1389 * (OP_14007E0 (reti)): Implement reti.
1390 * (OP_14996E0 (trap)): Implement user-defined traps. Move I/O to
1391 trap 31. Use new memory subsystem.
1392 * v850_sim.h: Prototypes for load_mem, store_mem and map. Use
1393 load_mem in RLW macro.
1394
1395Fri Sep 27 18:34:09 1996 Stu Grossman (grossman@critters.cygnus.com)
1396
1397 * gencode.c (write_opcodes): Output hex values for opcode mask
1398 and patterns.
1399 * interp.c (sim_resume): Save and restore PC from the appropriate
1400 register.
1401 * (sim_fetch_register sim_store_register): Fix byte-order problem
1402 with reading and writing registers.
1403 * simops.c (OP_FFFF): Implement pseudo-breakpoint insn.
1404
1405Fri Sep 27 17:42:37 1996 Jeffrey A Law (law@cygnus.com)
1406
72f4393d 1407 * simops.c (trace_input): Fix thinko.
c906108c
SS		 1408
1409Wed Sep 18 09:54:12 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1410
1411 * simops.c (exec_bfd): Rename from sim_bfd.
1412 (trace_input): Ditto.
1413
1414Thu Sep 12 12:03:05 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1415
1416 * simops.c (trace_input): Use find_nearest_line to print line
1417 number, function name or file name of PC.
1418
1419Wed Sep 11 16:44:37 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1420
1421 * simops.c: Add tracing support. Use SEXTxx macros instead of
1422 doing hardwired shifts.
1423
1424 * configure.in (--enable-sim-cflags): Add switch to add additional
1425 flags to simulator buld. If --enable-sim-cflags=trace, turn on
1426 tracing.
1427 * configure: Regenerate.
1428
1429 * Makefile.in: Don't require a VPATH capable make if configuring
1430 in the same directory. Don't use CFLAGS for configuration flags.
1431 Add flags from --enable-sim-cflags. Support canadian cross
1432 builds. Rebuild whole simulator if include files change.
1433
1434 * interp.c (v850_debug): New global for debugging.
1435 (lookup_hash,sim_size,sim_set_profile): Use
1436 printf_filtered callback, instead of calling printf directly.
1437 (sim_{open,trace}): Enable tracing if -t and compiled for tracing.
1438
1439 * v850_sim.h: Use limits.h to set the various sized types.
1440 (SEXT{5,7,16,22}): New macros.
1441
1442Mon Sep 9 20:50:46 1996 Jeffrey A Law (law@cygnus.com)
1443
1444 * interp.c (hash): Make this an inline function
1445 when compiling with GCC. Simplify.
1446 * simpos.c: Explicitly include "sys/syscall.h". Remove
1447 some #if 0'd code. Enable more emulated syscalls.
1448
1449Wed Sep 4 01:48:55 1996 Jeffrey A Law (law@cygnus.com)
1450
1451 * interp.c: Fix sign bit handling for add and sub instructions.
1452
1453Tue Sep 3 10:20:30 1996 Jeffrey A Law (law@cygnus.com)
1454
1455 * gencode.c: Fix various indention & style problems.
1456 Remove test code. Remove #if 0 code.
1457 * interp.c: Provide prototypes for all static functions.
1458 Fix minor indention problems.
1459 (sim_open, sim_resume): Remove unused variables.
1460 (sim_read): Return type is "int".
1461 * simops.c: Remove unused variables.
1462 (divh): Make result of divide-by-zero zero.
1463 (setf): Initialize result to keep compiler quiet.
1464 (sar instructions): These just clear the overflow bit.
1465 * v850_sim.h: Provide prototypes for put_byte, put_half
1466 and put_word.
1467
1468 * interp.c: OP should be an array of 32bit operands!
1469 (v850_callback): Declare.
1470 (do_format_5): Fix extraction of OP[0].
1471 (sim_size): Remove debugging printf.
1472 (sim_set_callbacks): Do something useful.
1473 (sim_stop_reason): Gross hacks to get c-torture running.
1474 * simops.c: Simplify code for computing targets of bCC
1475 insns. Invert 's' bit if 'ov' bit is set for some
1476 instructions. Fix 'cy' bit handling for numerous
1477 instructions. Make the simulator stop when a halt
1478 instruction is encountered. Very crude support for
1479 emulated syscalls (trap 0).
1480 * v850_sim.h: Include "callback.h" and declare
1481 v850_callback. Items in the operand array are 32bits.
1482
1483Sun Sep 1 22:35:35 1996 Jeffrey A Law (law@cygnus.com)
1484
1485 * interp.c (sim_resume): Fix code to check for a format 3
1486 opcode.
1487 * simops.c: bCC insns only argument is a constant, not a
1488 register value (duh...)
1489
1490Fri Aug 30 10:33:49 1996 Jeffrey A Law (law@cygnus.com)
1491
1492 * simops.c: Fix "not1" and "set1".
1493
1494 * simops.c: Don't forget to initialize temp for
1495 "ld.h" and "ld.w"
1496
1497 * interp.c: Remove various debugging printfs.
1498
1499 * simops.c: Fix satadd, satsub boundary case handling.
1500
1501 * interp.c (hash): Fix.
1502 * interp.c (do_format_8): Get operands correctly and
1503 call the target function.
1504 * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".
1505
1506Thu Aug 29 13:53:29 1996 Jeffrey A Law (law@cygnus.com)
1507
1508 * interp.c (do_format_4): Get operands correctly and
1509 call the target function.
1510 * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b",
1511 "sst.h", and "sst.w".
1512
1513 * v850_sim.h: The V850 doesn't have split I&D spaces. Change
1514 accordingly. Remove many unused definitions.
1515 * interp.c: The V850 doesn't have split I&D spaces. Change
1516 accordingly.
1517 (get_longlong, get_longword, get_word): Deleted.
1518 (write_longlong, write_longword, write_word): Deleted.
1519 (get_operands): Deleted.
1520 (get_byte, get_half, get_word): New functions.
1521 (put_byte, put_half, put_word): New functions.
1522 * simops.c: Remove unused functions. Rough cut at
1523 "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns.
1524
1525 * v850_sim.h (struct _state): Remove "psw" field. Add
1526 "sregs" field.
1527 (PSW): Remove bogus definition.
1528 * simops.c: Change condition code handling to use the psw
1529 register within the sregs array. Handle "ldsr" and "stsr".
1530
1531 * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr".
1532
1533 * interp.c (do_format_5): Get operands correctly and
1534 call the target function.
1535 (sim_resume): Don't do a PC update for format 5 instructions.
1536 * simops.c: Handle "jarl" and "jmp" instructions.
1537
1538 * simops.c: Fix minor typos. Handle "cmp", "setf", "tst"
1539 "di", and "ei" instructions correctly.
1540
1541 * interp.c (do_format_3): Get operands correctly and call
1542 the target function.
1543 * simops.c: Handle bCC instructions.
1544
1545 * simops.c: Add condition code handling to shift insns.
1546 Fix minor typos in condition code handling for other insns.
1547
1548 * Makefile.in: Fix typo.
1549 * simops.c: Add condition code handling to "sub" "subr" and
1550 "divh" instructions.
1551
1552 * interp.c (hash): Update to be more accurate.
1553 (lookup_hash): Call hash rather than computing the hash
1554 code here.
1555 (do_format_1_2): Handle format 1 and format 2 instructions.
1556 Get operands correctly and call the target function.
1557 (do_format_6): Get operands correctly and call the target
1558 function.
1559 (do_formats_9_10): Rough cut so shift ops will work.
1560 (sim_resume): Tweak to deal with format 1 and format 2
1561 handling in a single funtion. Don't update the PC
1562 for format 3 insns. Fix typos.
1563 * simops.c: Slightly reorganize. Add condition code handling
1564 to "add", "addi", "and", "andi", "or", "ori", "xor", "xori"
1565 and "not" instructions.
1566 * v850_sim.h (reg_t): Registers are 32bits.
1567 (_state): The V850 has 32 general registers. Add a 32bit
1568 psw and pc register too. Add accessor macros
1569
1570 * Makefile.in, interp.c, v850_sim.h: Bring over endianness
1571 changes from the d10v simulator.
1572
1573 * simops.c: Add shift support.
1574
1575 * simops.c: Add multiply & divide support. Abort for system
1576 instructions.
1577
1578 * simops.c: Add logicals, mov, movhi, movea, add, addi, sub
1579 and subr. No condition codes yet.
1580
1581Wed Aug 28 13:53:22 1996 Jeffrey A Law (law@cygnus.com)
1582
72f4393d 1583 * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,
c906108c
SS		 1584 gencode.c, interp.c, simops.c: Created.
1585
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