]>
Commit | Line | Data |
---|---|---|
1 | /* Motorola 68HC11-specific support for 32-bit ELF | |
2 | Copyright (C) 1999-2015 Free Software Foundation, Inc. | |
3 | Contributed by Stephane Carrez (stcarrez@nerim.fr) | |
4 | (Heavily copied from the D10V port by Martin Hunt (hunt@cygnus.com)) | |
5 | ||
6 | This file is part of BFD, the Binary File Descriptor library. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 3 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, | |
21 | MA 02110-1301, USA. */ | |
22 | ||
23 | #include "sysdep.h" | |
24 | #include "bfd.h" | |
25 | #include "bfdlink.h" | |
26 | #include "libbfd.h" | |
27 | #include "elf-bfd.h" | |
28 | #include "elf32-m68hc1x.h" | |
29 | #include "elf/m68hc11.h" | |
30 | #include "opcode/m68hc11.h" | |
31 | ||
32 | /* Relocation functions. */ | |
33 | static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup | |
34 | (bfd *, bfd_reloc_code_real_type); | |
35 | static void m68hc11_info_to_howto_rel | |
36 | (bfd *, arelent *, Elf_Internal_Rela *); | |
37 | ||
38 | /* Trampoline generation. */ | |
39 | static bfd_boolean m68hc11_elf_size_one_stub | |
40 | (struct bfd_hash_entry *gen_entry, void *in_arg); | |
41 | static bfd_boolean m68hc11_elf_build_one_stub | |
42 | (struct bfd_hash_entry *gen_entry, void *in_arg); | |
43 | static struct bfd_link_hash_table* m68hc11_elf_bfd_link_hash_table_create | |
44 | (bfd* abfd); | |
45 | ||
46 | /* Linker relaxation. */ | |
47 | static bfd_boolean m68hc11_elf_relax_section | |
48 | (bfd *, asection *, struct bfd_link_info *, bfd_boolean *); | |
49 | static void m68hc11_elf_relax_delete_bytes | |
50 | (bfd *, asection *, bfd_vma, int); | |
51 | static void m68hc11_relax_group | |
52 | (bfd *, asection *, bfd_byte *, unsigned, unsigned long, unsigned long); | |
53 | static int compare_reloc (const void *, const void *); | |
54 | ||
55 | /* Use REL instead of RELA to save space */ | |
56 | #define USE_REL 1 | |
57 | ||
58 | /* The Motorola 68HC11 microcontroller only addresses 64Kb but we also | |
59 | support a memory bank switching mechanism similar to 68HC12. | |
60 | We must handle 8 and 16-bit relocations. The 32-bit relocation | |
61 | are used for debugging sections (DWARF2) to represent a virtual | |
62 | address. | |
63 | The 3-bit and 16-bit PC rel relocation is only used by 68HC12. */ | |
64 | static reloc_howto_type elf_m68hc11_howto_table[] = { | |
65 | /* This reloc does nothing. */ | |
66 | HOWTO (R_M68HC11_NONE, /* type */ | |
67 | 0, /* rightshift */ | |
68 | 3, /* size (0 = byte, 1 = short, 2 = long) */ | |
69 | 0, /* bitsize */ | |
70 | FALSE, /* pc_relative */ | |
71 | 0, /* bitpos */ | |
72 | complain_overflow_dont,/* complain_on_overflow */ | |
73 | bfd_elf_generic_reloc, /* special_function */ | |
74 | "R_M68HC11_NONE", /* name */ | |
75 | FALSE, /* partial_inplace */ | |
76 | 0, /* src_mask */ | |
77 | 0, /* dst_mask */ | |
78 | FALSE), /* pcrel_offset */ | |
79 | ||
80 | /* A 8 bit absolute relocation */ | |
81 | HOWTO (R_M68HC11_8, /* type */ | |
82 | 0, /* rightshift */ | |
83 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
84 | 8, /* bitsize */ | |
85 | FALSE, /* pc_relative */ | |
86 | 0, /* bitpos */ | |
87 | complain_overflow_bitfield, /* complain_on_overflow */ | |
88 | bfd_elf_generic_reloc, /* special_function */ | |
89 | "R_M68HC11_8", /* name */ | |
90 | FALSE, /* partial_inplace */ | |
91 | 0x00ff, /* src_mask */ | |
92 | 0x00ff, /* dst_mask */ | |
93 | FALSE), /* pcrel_offset */ | |
94 | ||
95 | /* A 8 bit absolute relocation (upper address) */ | |
96 | HOWTO (R_M68HC11_HI8, /* type */ | |
97 | 8, /* rightshift */ | |
98 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
99 | 8, /* bitsize */ | |
100 | FALSE, /* pc_relative */ | |
101 | 0, /* bitpos */ | |
102 | complain_overflow_bitfield, /* complain_on_overflow */ | |
103 | bfd_elf_generic_reloc, /* special_function */ | |
104 | "R_M68HC11_HI8", /* name */ | |
105 | FALSE, /* partial_inplace */ | |
106 | 0x00ff, /* src_mask */ | |
107 | 0x00ff, /* dst_mask */ | |
108 | FALSE), /* pcrel_offset */ | |
109 | ||
110 | /* A 8 bit absolute relocation (upper address) */ | |
111 | HOWTO (R_M68HC11_LO8, /* type */ | |
112 | 0, /* rightshift */ | |
113 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
114 | 8, /* bitsize */ | |
115 | FALSE, /* pc_relative */ | |
116 | 0, /* bitpos */ | |
117 | complain_overflow_dont, /* complain_on_overflow */ | |
118 | bfd_elf_generic_reloc, /* special_function */ | |
119 | "R_M68HC11_LO8", /* name */ | |
120 | FALSE, /* partial_inplace */ | |
121 | 0x00ff, /* src_mask */ | |
122 | 0x00ff, /* dst_mask */ | |
123 | FALSE), /* pcrel_offset */ | |
124 | ||
125 | /* A 8 bit PC-rel relocation */ | |
126 | HOWTO (R_M68HC11_PCREL_8, /* type */ | |
127 | 0, /* rightshift */ | |
128 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
129 | 8, /* bitsize */ | |
130 | TRUE, /* pc_relative */ | |
131 | 0, /* bitpos */ | |
132 | complain_overflow_bitfield, /* complain_on_overflow */ | |
133 | bfd_elf_generic_reloc, /* special_function */ | |
134 | "R_M68HC11_PCREL_8", /* name */ | |
135 | FALSE, /* partial_inplace */ | |
136 | 0x00ff, /* src_mask */ | |
137 | 0x00ff, /* dst_mask */ | |
138 | TRUE), /* pcrel_offset */ | |
139 | ||
140 | /* A 16 bit absolute relocation */ | |
141 | HOWTO (R_M68HC11_16, /* type */ | |
142 | 0, /* rightshift */ | |
143 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
144 | 16, /* bitsize */ | |
145 | FALSE, /* pc_relative */ | |
146 | 0, /* bitpos */ | |
147 | complain_overflow_dont /*bitfield */ , /* complain_on_overflow */ | |
148 | bfd_elf_generic_reloc, /* special_function */ | |
149 | "R_M68HC11_16", /* name */ | |
150 | FALSE, /* partial_inplace */ | |
151 | 0xffff, /* src_mask */ | |
152 | 0xffff, /* dst_mask */ | |
153 | FALSE), /* pcrel_offset */ | |
154 | ||
155 | /* A 32 bit absolute relocation. This one is never used for the | |
156 | code relocation. It's used by gas for -gstabs generation. */ | |
157 | HOWTO (R_M68HC11_32, /* type */ | |
158 | 0, /* rightshift */ | |
159 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
160 | 32, /* bitsize */ | |
161 | FALSE, /* pc_relative */ | |
162 | 0, /* bitpos */ | |
163 | complain_overflow_bitfield, /* complain_on_overflow */ | |
164 | bfd_elf_generic_reloc, /* special_function */ | |
165 | "R_M68HC11_32", /* name */ | |
166 | FALSE, /* partial_inplace */ | |
167 | 0xffffffff, /* src_mask */ | |
168 | 0xffffffff, /* dst_mask */ | |
169 | FALSE), /* pcrel_offset */ | |
170 | ||
171 | /* A 3 bit absolute relocation */ | |
172 | HOWTO (R_M68HC11_3B, /* type */ | |
173 | 0, /* rightshift */ | |
174 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
175 | 3, /* bitsize */ | |
176 | FALSE, /* pc_relative */ | |
177 | 0, /* bitpos */ | |
178 | complain_overflow_bitfield, /* complain_on_overflow */ | |
179 | bfd_elf_generic_reloc, /* special_function */ | |
180 | "R_M68HC11_4B", /* name */ | |
181 | FALSE, /* partial_inplace */ | |
182 | 0x003, /* src_mask */ | |
183 | 0x003, /* dst_mask */ | |
184 | FALSE), /* pcrel_offset */ | |
185 | ||
186 | /* A 16 bit PC-rel relocation */ | |
187 | HOWTO (R_M68HC11_PCREL_16, /* type */ | |
188 | 0, /* rightshift */ | |
189 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
190 | 16, /* bitsize */ | |
191 | TRUE, /* pc_relative */ | |
192 | 0, /* bitpos */ | |
193 | complain_overflow_dont, /* complain_on_overflow */ | |
194 | bfd_elf_generic_reloc, /* special_function */ | |
195 | "R_M68HC11_PCREL_16", /* name */ | |
196 | FALSE, /* partial_inplace */ | |
197 | 0xffff, /* src_mask */ | |
198 | 0xffff, /* dst_mask */ | |
199 | TRUE), /* pcrel_offset */ | |
200 | ||
201 | /* GNU extension to record C++ vtable hierarchy */ | |
202 | HOWTO (R_M68HC11_GNU_VTINHERIT, /* type */ | |
203 | 0, /* rightshift */ | |
204 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
205 | 0, /* bitsize */ | |
206 | FALSE, /* pc_relative */ | |
207 | 0, /* bitpos */ | |
208 | complain_overflow_dont, /* complain_on_overflow */ | |
209 | NULL, /* special_function */ | |
210 | "R_M68HC11_GNU_VTINHERIT", /* name */ | |
211 | FALSE, /* partial_inplace */ | |
212 | 0, /* src_mask */ | |
213 | 0, /* dst_mask */ | |
214 | FALSE), /* pcrel_offset */ | |
215 | ||
216 | /* GNU extension to record C++ vtable member usage */ | |
217 | HOWTO (R_M68HC11_GNU_VTENTRY, /* type */ | |
218 | 0, /* rightshift */ | |
219 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
220 | 0, /* bitsize */ | |
221 | FALSE, /* pc_relative */ | |
222 | 0, /* bitpos */ | |
223 | complain_overflow_dont, /* complain_on_overflow */ | |
224 | _bfd_elf_rel_vtable_reloc_fn, /* special_function */ | |
225 | "R_M68HC11_GNU_VTENTRY", /* name */ | |
226 | FALSE, /* partial_inplace */ | |
227 | 0, /* src_mask */ | |
228 | 0, /* dst_mask */ | |
229 | FALSE), /* pcrel_offset */ | |
230 | ||
231 | /* A 24 bit relocation */ | |
232 | HOWTO (R_M68HC11_24, /* type */ | |
233 | 0, /* rightshift */ | |
234 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
235 | 24, /* bitsize */ | |
236 | FALSE, /* pc_relative */ | |
237 | 0, /* bitpos */ | |
238 | complain_overflow_bitfield, /* complain_on_overflow */ | |
239 | bfd_elf_generic_reloc, /* special_function */ | |
240 | "R_M68HC11_24", /* name */ | |
241 | FALSE, /* partial_inplace */ | |
242 | 0xffffff, /* src_mask */ | |
243 | 0xffffff, /* dst_mask */ | |
244 | FALSE), /* pcrel_offset */ | |
245 | ||
246 | /* A 16-bit low relocation */ | |
247 | HOWTO (R_M68HC11_LO16, /* type */ | |
248 | 0, /* rightshift */ | |
249 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
250 | 16, /* bitsize */ | |
251 | FALSE, /* pc_relative */ | |
252 | 0, /* bitpos */ | |
253 | complain_overflow_bitfield, /* complain_on_overflow */ | |
254 | bfd_elf_generic_reloc, /* special_function */ | |
255 | "R_M68HC11_LO16", /* name */ | |
256 | FALSE, /* partial_inplace */ | |
257 | 0xffff, /* src_mask */ | |
258 | 0xffff, /* dst_mask */ | |
259 | FALSE), /* pcrel_offset */ | |
260 | ||
261 | /* A page relocation */ | |
262 | HOWTO (R_M68HC11_PAGE, /* type */ | |
263 | 0, /* rightshift */ | |
264 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
265 | 8, /* bitsize */ | |
266 | FALSE, /* pc_relative */ | |
267 | 0, /* bitpos */ | |
268 | complain_overflow_bitfield, /* complain_on_overflow */ | |
269 | bfd_elf_generic_reloc, /* special_function */ | |
270 | "R_M68HC11_PAGE", /* name */ | |
271 | FALSE, /* partial_inplace */ | |
272 | 0x00ff, /* src_mask */ | |
273 | 0x00ff, /* dst_mask */ | |
274 | FALSE), /* pcrel_offset */ | |
275 | ||
276 | EMPTY_HOWTO (14), | |
277 | EMPTY_HOWTO (15), | |
278 | EMPTY_HOWTO (16), | |
279 | EMPTY_HOWTO (17), | |
280 | EMPTY_HOWTO (18), | |
281 | EMPTY_HOWTO (19), | |
282 | ||
283 | /* Mark beginning of a jump instruction (any form). */ | |
284 | HOWTO (R_M68HC11_RL_JUMP, /* type */ | |
285 | 0, /* rightshift */ | |
286 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
287 | 0, /* bitsize */ | |
288 | FALSE, /* pc_relative */ | |
289 | 0, /* bitpos */ | |
290 | complain_overflow_dont, /* complain_on_overflow */ | |
291 | m68hc11_elf_ignore_reloc, /* special_function */ | |
292 | "R_M68HC11_RL_JUMP", /* name */ | |
293 | TRUE, /* partial_inplace */ | |
294 | 0, /* src_mask */ | |
295 | 0, /* dst_mask */ | |
296 | TRUE), /* pcrel_offset */ | |
297 | ||
298 | /* Mark beginning of Gcc relaxation group instruction. */ | |
299 | HOWTO (R_M68HC11_RL_GROUP, /* type */ | |
300 | 0, /* rightshift */ | |
301 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
302 | 0, /* bitsize */ | |
303 | FALSE, /* pc_relative */ | |
304 | 0, /* bitpos */ | |
305 | complain_overflow_dont, /* complain_on_overflow */ | |
306 | m68hc11_elf_ignore_reloc, /* special_function */ | |
307 | "R_M68HC11_RL_GROUP", /* name */ | |
308 | TRUE, /* partial_inplace */ | |
309 | 0, /* src_mask */ | |
310 | 0, /* dst_mask */ | |
311 | TRUE), /* pcrel_offset */ | |
312 | }; | |
313 | ||
314 | /* Map BFD reloc types to M68HC11 ELF reloc types. */ | |
315 | ||
316 | struct m68hc11_reloc_map | |
317 | { | |
318 | bfd_reloc_code_real_type bfd_reloc_val; | |
319 | unsigned char elf_reloc_val; | |
320 | }; | |
321 | ||
322 | static const struct m68hc11_reloc_map m68hc11_reloc_map[] = { | |
323 | {BFD_RELOC_NONE, R_M68HC11_NONE,}, | |
324 | {BFD_RELOC_8, R_M68HC11_8}, | |
325 | {BFD_RELOC_M68HC11_HI8, R_M68HC11_HI8}, | |
326 | {BFD_RELOC_M68HC11_LO8, R_M68HC11_LO8}, | |
327 | {BFD_RELOC_8_PCREL, R_M68HC11_PCREL_8}, | |
328 | {BFD_RELOC_16_PCREL, R_M68HC11_PCREL_16}, | |
329 | {BFD_RELOC_16, R_M68HC11_16}, | |
330 | {BFD_RELOC_32, R_M68HC11_32}, | |
331 | {BFD_RELOC_M68HC11_3B, R_M68HC11_3B}, | |
332 | ||
333 | {BFD_RELOC_VTABLE_INHERIT, R_M68HC11_GNU_VTINHERIT}, | |
334 | {BFD_RELOC_VTABLE_ENTRY, R_M68HC11_GNU_VTENTRY}, | |
335 | ||
336 | {BFD_RELOC_M68HC11_LO16, R_M68HC11_LO16}, | |
337 | {BFD_RELOC_M68HC11_PAGE, R_M68HC11_PAGE}, | |
338 | {BFD_RELOC_M68HC11_24, R_M68HC11_24}, | |
339 | ||
340 | {BFD_RELOC_M68HC11_RL_JUMP, R_M68HC11_RL_JUMP}, | |
341 | {BFD_RELOC_M68HC11_RL_GROUP, R_M68HC11_RL_GROUP}, | |
342 | }; | |
343 | ||
344 | static reloc_howto_type * | |
345 | bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, | |
346 | bfd_reloc_code_real_type code) | |
347 | { | |
348 | unsigned int i; | |
349 | ||
350 | for (i = 0; | |
351 | i < sizeof (m68hc11_reloc_map) / sizeof (struct m68hc11_reloc_map); | |
352 | i++) | |
353 | { | |
354 | if (m68hc11_reloc_map[i].bfd_reloc_val == code) | |
355 | return &elf_m68hc11_howto_table[m68hc11_reloc_map[i].elf_reloc_val]; | |
356 | } | |
357 | ||
358 | return NULL; | |
359 | } | |
360 | ||
361 | static reloc_howto_type * | |
362 | bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, | |
363 | const char *r_name) | |
364 | { | |
365 | unsigned int i; | |
366 | ||
367 | for (i = 0; | |
368 | i < (sizeof (elf_m68hc11_howto_table) | |
369 | / sizeof (elf_m68hc11_howto_table[0])); | |
370 | i++) | |
371 | if (elf_m68hc11_howto_table[i].name != NULL | |
372 | && strcasecmp (elf_m68hc11_howto_table[i].name, r_name) == 0) | |
373 | return &elf_m68hc11_howto_table[i]; | |
374 | ||
375 | return NULL; | |
376 | } | |
377 | ||
378 | /* Set the howto pointer for an M68HC11 ELF reloc. */ | |
379 | ||
380 | static void | |
381 | m68hc11_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, | |
382 | arelent *cache_ptr, Elf_Internal_Rela *dst) | |
383 | { | |
384 | unsigned int r_type; | |
385 | ||
386 | r_type = ELF32_R_TYPE (dst->r_info); | |
387 | if (r_type >= (unsigned int) R_M68HC11_max) | |
388 | { | |
389 | _bfd_error_handler (_("%B: invalid M68HC11 reloc number: %d"), abfd, r_type); | |
390 | r_type = 0; | |
391 | } | |
392 | cache_ptr->howto = &elf_m68hc11_howto_table[r_type]; | |
393 | } | |
394 | ||
395 | \f | |
396 | /* Far trampoline generation. */ | |
397 | ||
398 | /* Build a 68HC11 trampoline stub. */ | |
399 | static bfd_boolean | |
400 | m68hc11_elf_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) | |
401 | { | |
402 | struct elf32_m68hc11_stub_hash_entry *stub_entry; | |
403 | struct bfd_link_info *info; | |
404 | struct m68hc11_elf_link_hash_table *htab; | |
405 | asection *stub_sec; | |
406 | bfd *stub_bfd; | |
407 | bfd_byte *loc; | |
408 | bfd_vma sym_value, phys_page, phys_addr; | |
409 | ||
410 | /* Massage our args to the form they really have. */ | |
411 | stub_entry = (struct elf32_m68hc11_stub_hash_entry *) gen_entry; | |
412 | info = (struct bfd_link_info *) in_arg; | |
413 | ||
414 | htab = m68hc11_elf_hash_table (info); | |
415 | if (htab == NULL) | |
416 | return FALSE; | |
417 | ||
418 | stub_sec = stub_entry->stub_sec; | |
419 | ||
420 | /* Make a note of the offset within the stubs for this entry. */ | |
421 | stub_entry->stub_offset = stub_sec->size; | |
422 | stub_sec->size += 10; | |
423 | loc = stub_sec->contents + stub_entry->stub_offset; | |
424 | ||
425 | stub_bfd = stub_sec->owner; | |
426 | ||
427 | /* Create the trampoline call stub: | |
428 | ||
429 | pshb | |
430 | ldab #%page(symbol) | |
431 | ldy #%addr(symbol) | |
432 | jmp __trampoline | |
433 | ||
434 | */ | |
435 | sym_value = (stub_entry->target_value | |
436 | + stub_entry->target_section->output_offset | |
437 | + stub_entry->target_section->output_section->vma); | |
438 | phys_addr = m68hc11_phys_addr (&htab->pinfo, sym_value); | |
439 | phys_page = m68hc11_phys_page (&htab->pinfo, sym_value); | |
440 | ||
441 | /* pshb; ldab #%page(sym) */ | |
442 | bfd_put_8 (stub_bfd, 0x37, loc); | |
443 | bfd_put_8 (stub_bfd, 0xC6, loc + 1); | |
444 | bfd_put_8 (stub_bfd, phys_page, loc + 2); | |
445 | loc += 3; | |
446 | ||
447 | /* ldy #%addr(sym) */ | |
448 | bfd_put_8 (stub_bfd, 0x18, loc); | |
449 | bfd_put_8 (stub_bfd, 0xCE, loc + 1); | |
450 | bfd_put_16 (stub_bfd, phys_addr, loc + 2); | |
451 | loc += 4; | |
452 | ||
453 | /* jmp __trampoline */ | |
454 | bfd_put_8 (stub_bfd, 0x7E, loc); | |
455 | bfd_put_16 (stub_bfd, htab->pinfo.trampoline_addr, loc + 1); | |
456 | ||
457 | return TRUE; | |
458 | } | |
459 | ||
460 | /* As above, but don't actually build the stub. Just bump offset so | |
461 | we know stub section sizes. */ | |
462 | ||
463 | static bfd_boolean | |
464 | m68hc11_elf_size_one_stub (struct bfd_hash_entry *gen_entry, | |
465 | void *in_arg ATTRIBUTE_UNUSED) | |
466 | { | |
467 | struct elf32_m68hc11_stub_hash_entry *stub_entry; | |
468 | ||
469 | /* Massage our args to the form they really have. */ | |
470 | stub_entry = (struct elf32_m68hc11_stub_hash_entry *) gen_entry; | |
471 | ||
472 | stub_entry->stub_sec->size += 10; | |
473 | return TRUE; | |
474 | } | |
475 | ||
476 | /* Create a 68HC11 ELF linker hash table. */ | |
477 | ||
478 | static struct bfd_link_hash_table * | |
479 | m68hc11_elf_bfd_link_hash_table_create (bfd *abfd) | |
480 | { | |
481 | struct m68hc11_elf_link_hash_table *ret; | |
482 | ||
483 | ret = m68hc11_elf_hash_table_create (abfd); | |
484 | if (ret == (struct m68hc11_elf_link_hash_table *) NULL) | |
485 | return NULL; | |
486 | ||
487 | ret->size_one_stub = m68hc11_elf_size_one_stub; | |
488 | ret->build_one_stub = m68hc11_elf_build_one_stub; | |
489 | ||
490 | return &ret->root.root; | |
491 | } | |
492 | ||
493 | \f | |
494 | /* 68HC11 Linker Relaxation. */ | |
495 | ||
496 | struct m68hc11_direct_relax | |
497 | { | |
498 | const char *name; | |
499 | unsigned char code; | |
500 | unsigned char direct_code; | |
501 | } m68hc11_direct_relax_table[] = { | |
502 | { "adca", 0xB9, 0x99 }, | |
503 | { "adcb", 0xF9, 0xD9 }, | |
504 | { "adda", 0xBB, 0x9B }, | |
505 | { "addb", 0xFB, 0xDB }, | |
506 | { "addd", 0xF3, 0xD3 }, | |
507 | { "anda", 0xB4, 0x94 }, | |
508 | { "andb", 0xF4, 0xD4 }, | |
509 | { "cmpa", 0xB1, 0x91 }, | |
510 | { "cmpb", 0xF1, 0xD1 }, | |
511 | { "cpd", 0xB3, 0x93 }, | |
512 | { "cpxy", 0xBC, 0x9C }, | |
513 | /* { "cpy", 0xBC, 0x9C }, */ | |
514 | { "eora", 0xB8, 0x98 }, | |
515 | { "eorb", 0xF8, 0xD8 }, | |
516 | { "jsr", 0xBD, 0x9D }, | |
517 | { "ldaa", 0xB6, 0x96 }, | |
518 | { "ldab", 0xF6, 0xD6 }, | |
519 | { "ldd", 0xFC, 0xDC }, | |
520 | { "lds", 0xBE, 0x9E }, | |
521 | { "ldxy", 0xFE, 0xDE }, | |
522 | /* { "ldy", 0xFE, 0xDE },*/ | |
523 | { "oraa", 0xBA, 0x9A }, | |
524 | { "orab", 0xFA, 0xDA }, | |
525 | { "sbca", 0xB2, 0x92 }, | |
526 | { "sbcb", 0xF2, 0xD2 }, | |
527 | { "staa", 0xB7, 0x97 }, | |
528 | { "stab", 0xF7, 0xD7 }, | |
529 | { "std", 0xFD, 0xDD }, | |
530 | { "sts", 0xBF, 0x9F }, | |
531 | { "stxy", 0xFF, 0xDF }, | |
532 | /* { "sty", 0xFF, 0xDF },*/ | |
533 | { "suba", 0xB0, 0x90 }, | |
534 | { "subb", 0xF0, 0xD0 }, | |
535 | { "subd", 0xB3, 0x93 }, | |
536 | { 0, 0, 0 } | |
537 | }; | |
538 | ||
539 | static struct m68hc11_direct_relax * | |
540 | find_relaxable_insn (unsigned char code) | |
541 | { | |
542 | int i; | |
543 | ||
544 | for (i = 0; m68hc11_direct_relax_table[i].name; i++) | |
545 | if (m68hc11_direct_relax_table[i].code == code) | |
546 | return &m68hc11_direct_relax_table[i]; | |
547 | ||
548 | return 0; | |
549 | } | |
550 | ||
551 | static int | |
552 | compare_reloc (const void *e1, const void *e2) | |
553 | { | |
554 | const Elf_Internal_Rela *i1 = (const Elf_Internal_Rela *) e1; | |
555 | const Elf_Internal_Rela *i2 = (const Elf_Internal_Rela *) e2; | |
556 | ||
557 | if (i1->r_offset == i2->r_offset) | |
558 | return 0; | |
559 | else | |
560 | return i1->r_offset < i2->r_offset ? -1 : 1; | |
561 | } | |
562 | ||
563 | #define M6811_OP_LDX_IMMEDIATE (0xCE) | |
564 | ||
565 | static void | |
566 | m68hc11_relax_group (bfd *abfd, asection *sec, bfd_byte *contents, | |
567 | unsigned value, unsigned long offset, | |
568 | unsigned long end_group) | |
569 | { | |
570 | unsigned char code; | |
571 | unsigned long start_offset; | |
572 | unsigned long ldx_offset = offset; | |
573 | unsigned long ldx_size; | |
574 | int can_delete_ldx; | |
575 | int relax_ldy = 0; | |
576 | ||
577 | /* First instruction of the relax group must be a | |
578 | LDX #value or LDY #value. If this is not the case, | |
579 | ignore the relax group. */ | |
580 | code = bfd_get_8 (abfd, contents + offset); | |
581 | if (code == 0x18) | |
582 | { | |
583 | relax_ldy++; | |
584 | offset++; | |
585 | code = bfd_get_8 (abfd, contents + offset); | |
586 | } | |
587 | ldx_size = offset - ldx_offset + 3; | |
588 | offset += 3; | |
589 | if (code != M6811_OP_LDX_IMMEDIATE || offset >= end_group) | |
590 | return; | |
591 | ||
592 | ||
593 | /* We can remove the LDX/LDY only when all bset/brclr instructions | |
594 | of the relax group have been converted to use direct addressing | |
595 | mode. */ | |
596 | can_delete_ldx = 1; | |
597 | while (offset < end_group) | |
598 | { | |
599 | unsigned isize; | |
600 | unsigned new_value; | |
601 | int bset_use_y; | |
602 | ||
603 | bset_use_y = 0; | |
604 | start_offset = offset; | |
605 | code = bfd_get_8 (abfd, contents + offset); | |
606 | if (code == 0x18) | |
607 | { | |
608 | bset_use_y++; | |
609 | offset++; | |
610 | code = bfd_get_8 (abfd, contents + offset); | |
611 | } | |
612 | ||
613 | /* Check the instruction and translate to use direct addressing mode. */ | |
614 | switch (code) | |
615 | { | |
616 | /* bset */ | |
617 | case 0x1C: | |
618 | code = 0x14; | |
619 | isize = 3; | |
620 | break; | |
621 | ||
622 | /* brclr */ | |
623 | case 0x1F: | |
624 | code = 0x13; | |
625 | isize = 4; | |
626 | break; | |
627 | ||
628 | /* brset */ | |
629 | case 0x1E: | |
630 | code = 0x12; | |
631 | isize = 4; | |
632 | break; | |
633 | ||
634 | /* bclr */ | |
635 | case 0x1D: | |
636 | code = 0x15; | |
637 | isize = 3; | |
638 | break; | |
639 | ||
640 | /* This instruction is not recognized and we are not | |
641 | at end of the relax group. Ignore and don't remove | |
642 | the first LDX (we don't know what it is used for...). */ | |
643 | default: | |
644 | return; | |
645 | } | |
646 | new_value = (unsigned) bfd_get_8 (abfd, contents + offset + 1); | |
647 | new_value += value; | |
648 | if ((new_value & 0xff00) == 0 && bset_use_y == relax_ldy) | |
649 | { | |
650 | bfd_put_8 (abfd, code, contents + offset); | |
651 | bfd_put_8 (abfd, new_value, contents + offset + 1); | |
652 | if (start_offset != offset) | |
653 | { | |
654 | m68hc11_elf_relax_delete_bytes (abfd, sec, start_offset, | |
655 | offset - start_offset); | |
656 | end_group--; | |
657 | } | |
658 | } | |
659 | else | |
660 | { | |
661 | can_delete_ldx = 0; | |
662 | } | |
663 | offset = start_offset + isize; | |
664 | } | |
665 | if (can_delete_ldx) | |
666 | { | |
667 | /* Remove the move instruction (3 or 4 bytes win). */ | |
668 | m68hc11_elf_relax_delete_bytes (abfd, sec, ldx_offset, ldx_size); | |
669 | } | |
670 | } | |
671 | ||
672 | /* This function handles relaxing for the 68HC11. | |
673 | ||
674 | ||
675 | and somewhat more difficult to support. */ | |
676 | ||
677 | static bfd_boolean | |
678 | m68hc11_elf_relax_section (bfd *abfd, asection *sec, | |
679 | struct bfd_link_info *link_info, bfd_boolean *again) | |
680 | { | |
681 | Elf_Internal_Shdr *symtab_hdr; | |
682 | Elf_Internal_Rela *internal_relocs; | |
683 | Elf_Internal_Rela *free_relocs = NULL; | |
684 | Elf_Internal_Rela *irel, *irelend; | |
685 | bfd_byte *contents = NULL; | |
686 | bfd_byte *free_contents = NULL; | |
687 | Elf32_External_Sym *free_extsyms = NULL; | |
688 | Elf_Internal_Rela *prev_insn_branch = NULL; | |
689 | Elf_Internal_Rela *prev_insn_group = NULL; | |
690 | unsigned insn_group_value = 0; | |
691 | Elf_Internal_Sym *isymbuf = NULL; | |
692 | ||
693 | /* Assume nothing changes. */ | |
694 | *again = FALSE; | |
695 | ||
696 | /* We don't have to do anything for a relocatable link, if | |
697 | this section does not have relocs, or if this is not a | |
698 | code section. */ | |
699 | if (link_info->relocatable | |
700 | || (sec->flags & SEC_RELOC) == 0 | |
701 | || sec->reloc_count == 0 | |
702 | || (sec->flags & SEC_CODE) == 0) | |
703 | return TRUE; | |
704 | ||
705 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
706 | ||
707 | /* Get a copy of the native relocations. */ | |
708 | internal_relocs = (_bfd_elf_link_read_relocs | |
709 | (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, | |
710 | link_info->keep_memory)); | |
711 | if (internal_relocs == NULL) | |
712 | goto error_return; | |
713 | if (! link_info->keep_memory) | |
714 | free_relocs = internal_relocs; | |
715 | ||
716 | /* Checking for branch relaxation relies on the relocations to | |
717 | be sorted on 'r_offset'. This is not guaranteed so we must sort. */ | |
718 | qsort (internal_relocs, sec->reloc_count, sizeof (Elf_Internal_Rela), | |
719 | compare_reloc); | |
720 | ||
721 | /* Walk through them looking for relaxing opportunities. */ | |
722 | irelend = internal_relocs + sec->reloc_count; | |
723 | for (irel = internal_relocs; irel < irelend; irel++) | |
724 | { | |
725 | bfd_vma symval; | |
726 | bfd_vma value; | |
727 | Elf_Internal_Sym *isym; | |
728 | asection *sym_sec; | |
729 | int is_far = 0; | |
730 | ||
731 | /* If this isn't something that can be relaxed, then ignore | |
732 | this reloc. */ | |
733 | if (ELF32_R_TYPE (irel->r_info) != (int) R_M68HC11_16 | |
734 | && ELF32_R_TYPE (irel->r_info) != (int) R_M68HC11_RL_JUMP | |
735 | && ELF32_R_TYPE (irel->r_info) != (int) R_M68HC11_RL_GROUP) | |
736 | { | |
737 | prev_insn_branch = 0; | |
738 | prev_insn_group = 0; | |
739 | continue; | |
740 | } | |
741 | ||
742 | /* Get the section contents if we haven't done so already. */ | |
743 | if (contents == NULL) | |
744 | { | |
745 | /* Get cached copy if it exists. */ | |
746 | if (elf_section_data (sec)->this_hdr.contents != NULL) | |
747 | contents = elf_section_data (sec)->this_hdr.contents; | |
748 | else | |
749 | { | |
750 | /* Go get them off disk. */ | |
751 | if (!bfd_malloc_and_get_section (abfd, sec, &contents)) | |
752 | goto error_return; | |
753 | } | |
754 | } | |
755 | ||
756 | /* Try to eliminate an unconditional 8 bit pc-relative branch | |
757 | which immediately follows a conditional 8 bit pc-relative | |
758 | branch around the unconditional branch. | |
759 | ||
760 | original: new: | |
761 | bCC lab1 bCC' lab2 | |
762 | bra lab2 | |
763 | lab1: lab1: | |
764 | ||
765 | This happens when the bCC can't reach lab2 at assembly time, | |
766 | but due to other relaxations it can reach at link time. */ | |
767 | if (ELF32_R_TYPE (irel->r_info) == (int) R_M68HC11_RL_JUMP) | |
768 | { | |
769 | Elf_Internal_Rela *nrel; | |
770 | unsigned char code; | |
771 | unsigned char roffset; | |
772 | ||
773 | prev_insn_branch = 0; | |
774 | prev_insn_group = 0; | |
775 | ||
776 | /* Do nothing if this reloc is the last byte in the section. */ | |
777 | if (irel->r_offset + 2 >= sec->size) | |
778 | continue; | |
779 | ||
780 | /* See if the next instruction is an unconditional pc-relative | |
781 | branch, more often than not this test will fail, so we | |
782 | test it first to speed things up. */ | |
783 | code = bfd_get_8 (abfd, contents + irel->r_offset + 2); | |
784 | if (code != 0x7e) | |
785 | continue; | |
786 | ||
787 | /* Also make sure the next relocation applies to the next | |
788 | instruction and that it's a pc-relative 8 bit branch. */ | |
789 | nrel = irel + 1; | |
790 | if (nrel == irelend | |
791 | || irel->r_offset + 3 != nrel->r_offset | |
792 | || ELF32_R_TYPE (nrel->r_info) != (int) R_M68HC11_16) | |
793 | continue; | |
794 | ||
795 | /* Make sure our destination immediately follows the | |
796 | unconditional branch. */ | |
797 | roffset = bfd_get_8 (abfd, contents + irel->r_offset + 1); | |
798 | if (roffset != 3) | |
799 | continue; | |
800 | ||
801 | prev_insn_branch = irel; | |
802 | prev_insn_group = 0; | |
803 | continue; | |
804 | } | |
805 | ||
806 | /* Read this BFD's symbols if we haven't done so already. */ | |
807 | if (isymbuf == NULL && symtab_hdr->sh_info != 0) | |
808 | { | |
809 | isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; | |
810 | if (isymbuf == NULL) | |
811 | isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, | |
812 | symtab_hdr->sh_info, 0, | |
813 | NULL, NULL, NULL); | |
814 | if (isymbuf == NULL) | |
815 | goto error_return; | |
816 | } | |
817 | ||
818 | /* Get the value of the symbol referred to by the reloc. */ | |
819 | if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) | |
820 | { | |
821 | /* A local symbol. */ | |
822 | isym = isymbuf + ELF32_R_SYM (irel->r_info); | |
823 | is_far = isym->st_other & STO_M68HC12_FAR; | |
824 | sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); | |
825 | symval = (isym->st_value | |
826 | + sym_sec->output_section->vma | |
827 | + sym_sec->output_offset); | |
828 | } | |
829 | else | |
830 | { | |
831 | unsigned long indx; | |
832 | struct elf_link_hash_entry *h; | |
833 | ||
834 | /* An external symbol. */ | |
835 | indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; | |
836 | h = elf_sym_hashes (abfd)[indx]; | |
837 | BFD_ASSERT (h != NULL); | |
838 | if (h->root.type != bfd_link_hash_defined | |
839 | && h->root.type != bfd_link_hash_defweak) | |
840 | { | |
841 | /* This appears to be a reference to an undefined | |
842 | symbol. Just ignore it--it will be caught by the | |
843 | regular reloc processing. */ | |
844 | prev_insn_branch = 0; | |
845 | prev_insn_group = 0; | |
846 | continue; | |
847 | } | |
848 | ||
849 | is_far = h->other & STO_M68HC12_FAR; | |
850 | isym = 0; | |
851 | sym_sec = h->root.u.def.section; | |
852 | symval = (h->root.u.def.value | |
853 | + sym_sec->output_section->vma | |
854 | + sym_sec->output_offset); | |
855 | } | |
856 | ||
857 | if (ELF32_R_TYPE (irel->r_info) == (int) R_M68HC11_RL_GROUP) | |
858 | { | |
859 | prev_insn_branch = 0; | |
860 | prev_insn_group = 0; | |
861 | ||
862 | /* Do nothing if this reloc is the last byte in the section. */ | |
863 | if (irel->r_offset == sec->size) | |
864 | continue; | |
865 | ||
866 | prev_insn_group = irel; | |
867 | insn_group_value = isym->st_value; | |
868 | continue; | |
869 | } | |
870 | ||
871 | /* When we relax some bytes, the size of our section changes. | |
872 | This affects the layout of next input sections that go in our | |
873 | output section. When the symbol is part of another section that | |
874 | will go in the same output section as the current one, it's | |
875 | final address may now be incorrect (too far). We must let the | |
876 | linker re-compute all section offsets before processing this | |
877 | reloc. Code example: | |
878 | ||
879 | Initial Final | |
880 | .sect .text section size = 6 section size = 4 | |
881 | jmp foo | |
882 | jmp bar | |
883 | .sect .text.foo_bar output_offset = 6 output_offset = 4 | |
884 | foo: rts | |
885 | bar: rts | |
886 | ||
887 | If we process the reloc now, the jmp bar is replaced by a | |
888 | relative branch to the initial bar address (output_offset 6). */ | |
889 | if (*again && sym_sec != sec | |
890 | && sym_sec->output_section == sec->output_section) | |
891 | { | |
892 | prev_insn_group = 0; | |
893 | prev_insn_branch = 0; | |
894 | continue; | |
895 | } | |
896 | ||
897 | value = symval; | |
898 | /* Try to turn a far branch to a near branch. */ | |
899 | if (ELF32_R_TYPE (irel->r_info) == (int) R_M68HC11_16 | |
900 | && prev_insn_branch) | |
901 | { | |
902 | bfd_vma offset; | |
903 | unsigned char code; | |
904 | ||
905 | offset = value - (prev_insn_branch->r_offset | |
906 | + sec->output_section->vma | |
907 | + sec->output_offset + 2); | |
908 | ||
909 | /* If the offset is still out of -128..+127 range, | |
910 | leave that far branch unchanged. */ | |
911 | if ((offset & 0xff80) != 0 && (offset & 0xff80) != 0xff80) | |
912 | { | |
913 | prev_insn_branch = 0; | |
914 | continue; | |
915 | } | |
916 | ||
917 | /* Shrink the branch. */ | |
918 | code = bfd_get_8 (abfd, contents + prev_insn_branch->r_offset); | |
919 | if (code == 0x7e) | |
920 | { | |
921 | code = 0x20; | |
922 | bfd_put_8 (abfd, code, contents + prev_insn_branch->r_offset); | |
923 | bfd_put_8 (abfd, 0xff, | |
924 | contents + prev_insn_branch->r_offset + 1); | |
925 | irel->r_offset = prev_insn_branch->r_offset + 1; | |
926 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
927 | R_M68HC11_PCREL_8); | |
928 | m68hc11_elf_relax_delete_bytes (abfd, sec, | |
929 | irel->r_offset + 1, 1); | |
930 | } | |
931 | else | |
932 | { | |
933 | code ^= 0x1; | |
934 | bfd_put_8 (abfd, code, contents + prev_insn_branch->r_offset); | |
935 | bfd_put_8 (abfd, 0xff, | |
936 | contents + prev_insn_branch->r_offset + 1); | |
937 | irel->r_offset = prev_insn_branch->r_offset + 1; | |
938 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
939 | R_M68HC11_PCREL_8); | |
940 | m68hc11_elf_relax_delete_bytes (abfd, sec, | |
941 | irel->r_offset + 1, 3); | |
942 | } | |
943 | prev_insn_branch = 0; | |
944 | *again = TRUE; | |
945 | } | |
946 | ||
947 | /* Try to turn a 16 bit address into a 8 bit page0 address. */ | |
948 | else if (ELF32_R_TYPE (irel->r_info) == (int) R_M68HC11_16 | |
949 | && (value & 0xff00) == 0) | |
950 | { | |
951 | unsigned char code; | |
952 | unsigned short offset; | |
953 | struct m68hc11_direct_relax *rinfo; | |
954 | ||
955 | prev_insn_branch = 0; | |
956 | offset = bfd_get_16 (abfd, contents + irel->r_offset); | |
957 | offset += value; | |
958 | if ((offset & 0xff00) != 0) | |
959 | { | |
960 | prev_insn_group = 0; | |
961 | continue; | |
962 | } | |
963 | ||
964 | if (prev_insn_group) | |
965 | { | |
966 | unsigned long old_sec_size = sec->size; | |
967 | ||
968 | /* Note that we've changed the relocation contents, etc. */ | |
969 | elf_section_data (sec)->relocs = internal_relocs; | |
970 | free_relocs = NULL; | |
971 | ||
972 | elf_section_data (sec)->this_hdr.contents = contents; | |
973 | free_contents = NULL; | |
974 | ||
975 | symtab_hdr->contents = (bfd_byte *) isymbuf; | |
976 | free_extsyms = NULL; | |
977 | ||
978 | m68hc11_relax_group (abfd, sec, contents, offset, | |
979 | prev_insn_group->r_offset, | |
980 | insn_group_value); | |
981 | irel = prev_insn_group; | |
982 | prev_insn_group = 0; | |
983 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
984 | R_M68HC11_NONE); | |
985 | if (sec->size != old_sec_size) | |
986 | *again = TRUE; | |
987 | continue; | |
988 | } | |
989 | ||
990 | /* Get the opcode. */ | |
991 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
992 | rinfo = find_relaxable_insn (code); | |
993 | if (rinfo == 0) | |
994 | { | |
995 | prev_insn_group = 0; | |
996 | continue; | |
997 | } | |
998 | ||
999 | /* Note that we've changed the relocation contents, etc. */ | |
1000 | elf_section_data (sec)->relocs = internal_relocs; | |
1001 | free_relocs = NULL; | |
1002 | ||
1003 | elf_section_data (sec)->this_hdr.contents = contents; | |
1004 | free_contents = NULL; | |
1005 | ||
1006 | symtab_hdr->contents = (bfd_byte *) isymbuf; | |
1007 | free_extsyms = NULL; | |
1008 | ||
1009 | /* Fix the opcode. */ | |
1010 | /* printf ("A relaxable case : 0x%02x (%s)\n", | |
1011 | code, rinfo->name); */ | |
1012 | bfd_put_8 (abfd, rinfo->direct_code, | |
1013 | contents + irel->r_offset - 1); | |
1014 | ||
1015 | /* Delete one byte of data (upper byte of address). */ | |
1016 | m68hc11_elf_relax_delete_bytes (abfd, sec, irel->r_offset, 1); | |
1017 | ||
1018 | /* Fix the relocation's type. */ | |
1019 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
1020 | R_M68HC11_8); | |
1021 | ||
1022 | /* That will change things, so, we should relax again. */ | |
1023 | *again = TRUE; | |
1024 | } | |
1025 | else if (ELF32_R_TYPE (irel->r_info) == R_M68HC11_16 && !is_far) | |
1026 | { | |
1027 | unsigned char code; | |
1028 | bfd_vma offset; | |
1029 | ||
1030 | prev_insn_branch = 0; | |
1031 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
1032 | if (code == 0x7e || code == 0xbd) | |
1033 | { | |
1034 | offset = value - (irel->r_offset | |
1035 | + sec->output_section->vma | |
1036 | + sec->output_offset + 1); | |
1037 | offset += bfd_get_16 (abfd, contents + irel->r_offset); | |
1038 | ||
1039 | /* If the offset is still out of -128..+127 range, | |
1040 | leave that far branch unchanged. */ | |
1041 | if ((offset & 0xff80) == 0 || (offset & 0xff80) == 0xff80) | |
1042 | { | |
1043 | ||
1044 | /* Note that we've changed the relocation contents, etc. */ | |
1045 | elf_section_data (sec)->relocs = internal_relocs; | |
1046 | free_relocs = NULL; | |
1047 | ||
1048 | elf_section_data (sec)->this_hdr.contents = contents; | |
1049 | free_contents = NULL; | |
1050 | ||
1051 | symtab_hdr->contents = (bfd_byte *) isymbuf; | |
1052 | free_extsyms = NULL; | |
1053 | ||
1054 | /* Shrink the branch. */ | |
1055 | code = (code == 0x7e) ? 0x20 : 0x8d; | |
1056 | bfd_put_8 (abfd, code, | |
1057 | contents + irel->r_offset - 1); | |
1058 | bfd_put_8 (abfd, 0xff, | |
1059 | contents + irel->r_offset); | |
1060 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
1061 | R_M68HC11_PCREL_8); | |
1062 | m68hc11_elf_relax_delete_bytes (abfd, sec, | |
1063 | irel->r_offset + 1, 1); | |
1064 | /* That will change things, so, we should relax again. */ | |
1065 | *again = TRUE; | |
1066 | } | |
1067 | } | |
1068 | } | |
1069 | prev_insn_branch = 0; | |
1070 | prev_insn_group = 0; | |
1071 | } | |
1072 | ||
1073 | if (free_relocs != NULL) | |
1074 | { | |
1075 | free (free_relocs); | |
1076 | free_relocs = NULL; | |
1077 | } | |
1078 | ||
1079 | if (free_contents != NULL) | |
1080 | { | |
1081 | if (! link_info->keep_memory) | |
1082 | free (free_contents); | |
1083 | else | |
1084 | { | |
1085 | /* Cache the section contents for elf_link_input_bfd. */ | |
1086 | elf_section_data (sec)->this_hdr.contents = contents; | |
1087 | } | |
1088 | free_contents = NULL; | |
1089 | } | |
1090 | ||
1091 | if (free_extsyms != NULL) | |
1092 | { | |
1093 | if (! link_info->keep_memory) | |
1094 | free (free_extsyms); | |
1095 | else | |
1096 | { | |
1097 | /* Cache the symbols for elf_link_input_bfd. */ | |
1098 | symtab_hdr->contents = (unsigned char *) isymbuf; | |
1099 | } | |
1100 | free_extsyms = NULL; | |
1101 | } | |
1102 | ||
1103 | return TRUE; | |
1104 | ||
1105 | error_return: | |
1106 | if (free_relocs != NULL) | |
1107 | free (free_relocs); | |
1108 | if (free_contents != NULL) | |
1109 | free (free_contents); | |
1110 | if (free_extsyms != NULL) | |
1111 | free (free_extsyms); | |
1112 | return FALSE; | |
1113 | } | |
1114 | ||
1115 | /* Delete some bytes from a section while relaxing. */ | |
1116 | ||
1117 | static void | |
1118 | m68hc11_elf_relax_delete_bytes (bfd *abfd, asection *sec, | |
1119 | bfd_vma addr, int count) | |
1120 | { | |
1121 | Elf_Internal_Shdr *symtab_hdr; | |
1122 | unsigned int sec_shndx; | |
1123 | bfd_byte *contents; | |
1124 | Elf_Internal_Rela *irel, *irelend; | |
1125 | bfd_vma toaddr; | |
1126 | Elf_Internal_Sym *isymbuf, *isym, *isymend; | |
1127 | struct elf_link_hash_entry **sym_hashes; | |
1128 | struct elf_link_hash_entry **end_hashes; | |
1129 | unsigned int symcount; | |
1130 | ||
1131 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
1132 | isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; | |
1133 | ||
1134 | sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); | |
1135 | ||
1136 | contents = elf_section_data (sec)->this_hdr.contents; | |
1137 | ||
1138 | toaddr = sec->size; | |
1139 | ||
1140 | irel = elf_section_data (sec)->relocs; | |
1141 | irelend = irel + sec->reloc_count; | |
1142 | ||
1143 | /* Actually delete the bytes. */ | |
1144 | memmove (contents + addr, contents + addr + count, | |
1145 | (size_t) (toaddr - addr - count)); | |
1146 | ||
1147 | sec->size -= count; | |
1148 | ||
1149 | /* Adjust all the relocs. */ | |
1150 | for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++) | |
1151 | { | |
1152 | unsigned char code; | |
1153 | unsigned char offset; | |
1154 | unsigned short raddr; | |
1155 | unsigned long old_offset; | |
1156 | int branch_pos; | |
1157 | ||
1158 | old_offset = irel->r_offset; | |
1159 | ||
1160 | /* See if this reloc was for the bytes we have deleted, in which | |
1161 | case we no longer care about it. Don't delete relocs which | |
1162 | represent addresses, though. */ | |
1163 | if (ELF32_R_TYPE (irel->r_info) != R_M68HC11_RL_JUMP | |
1164 | && irel->r_offset >= addr && irel->r_offset < addr + count) | |
1165 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
1166 | R_M68HC11_NONE); | |
1167 | ||
1168 | if (ELF32_R_TYPE (irel->r_info) == R_M68HC11_NONE) | |
1169 | continue; | |
1170 | ||
1171 | /* Get the new reloc address. */ | |
1172 | if ((irel->r_offset > addr | |
1173 | && irel->r_offset < toaddr)) | |
1174 | irel->r_offset -= count; | |
1175 | ||
1176 | /* If this is a PC relative reloc, see if the range it covers | |
1177 | includes the bytes we have deleted. */ | |
1178 | switch (ELF32_R_TYPE (irel->r_info)) | |
1179 | { | |
1180 | default: | |
1181 | break; | |
1182 | ||
1183 | case R_M68HC11_RL_JUMP: | |
1184 | code = bfd_get_8 (abfd, contents + irel->r_offset); | |
1185 | switch (code) | |
1186 | { | |
1187 | /* jsr and jmp instruction are also marked with RL_JUMP | |
1188 | relocs but no adjustment must be made. */ | |
1189 | case 0x7e: | |
1190 | case 0x9d: | |
1191 | case 0xbd: | |
1192 | continue; | |
1193 | ||
1194 | case 0x12: | |
1195 | case 0x13: | |
1196 | branch_pos = 3; | |
1197 | raddr = 4; | |
1198 | ||
1199 | /* Special case when we translate a brclr N,y into brclr *<addr> | |
1200 | In this case, the 0x18 page2 prefix is removed. | |
1201 | The reloc offset is not modified but the instruction | |
1202 | size is reduced by 1. */ | |
1203 | if (old_offset == addr) | |
1204 | raddr++; | |
1205 | break; | |
1206 | ||
1207 | case 0x1e: | |
1208 | case 0x1f: | |
1209 | branch_pos = 3; | |
1210 | raddr = 4; | |
1211 | break; | |
1212 | ||
1213 | case 0x18: | |
1214 | branch_pos = 4; | |
1215 | raddr = 5; | |
1216 | break; | |
1217 | ||
1218 | default: | |
1219 | branch_pos = 1; | |
1220 | raddr = 2; | |
1221 | break; | |
1222 | } | |
1223 | offset = bfd_get_8 (abfd, contents + irel->r_offset + branch_pos); | |
1224 | raddr += old_offset; | |
1225 | raddr += ((unsigned short) offset | ((offset & 0x80) ? 0xff00 : 0)); | |
1226 | if (irel->r_offset < addr && raddr > addr) | |
1227 | { | |
1228 | offset -= count; | |
1229 | bfd_put_8 (abfd, offset, contents + irel->r_offset + branch_pos); | |
1230 | } | |
1231 | else if (irel->r_offset >= addr && raddr <= addr) | |
1232 | { | |
1233 | offset += count; | |
1234 | bfd_put_8 (abfd, offset, contents + irel->r_offset + branch_pos); | |
1235 | } | |
1236 | else | |
1237 | { | |
1238 | /*printf ("Not adjusted 0x%04x [0x%4x 0x%4x]\n", raddr, | |
1239 | irel->r_offset, addr);*/ | |
1240 | } | |
1241 | ||
1242 | break; | |
1243 | } | |
1244 | } | |
1245 | ||
1246 | /* Adjust the local symbols defined in this section. */ | |
1247 | isymend = isymbuf + symtab_hdr->sh_info; | |
1248 | for (isym = isymbuf; isym < isymend; isym++) | |
1249 | { | |
1250 | if (isym->st_shndx == sec_shndx | |
1251 | && isym->st_value > addr | |
1252 | && isym->st_value <= toaddr) | |
1253 | isym->st_value -= count; | |
1254 | } | |
1255 | ||
1256 | /* Now adjust the global symbols defined in this section. */ | |
1257 | symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) | |
1258 | - symtab_hdr->sh_info); | |
1259 | sym_hashes = elf_sym_hashes (abfd); | |
1260 | end_hashes = sym_hashes + symcount; | |
1261 | for (; sym_hashes < end_hashes; sym_hashes++) | |
1262 | { | |
1263 | struct elf_link_hash_entry *sym_hash = *sym_hashes; | |
1264 | if ((sym_hash->root.type == bfd_link_hash_defined | |
1265 | || sym_hash->root.type == bfd_link_hash_defweak) | |
1266 | && sym_hash->root.u.def.section == sec | |
1267 | && sym_hash->root.u.def.value > addr | |
1268 | && sym_hash->root.u.def.value <= toaddr) | |
1269 | { | |
1270 | sym_hash->root.u.def.value -= count; | |
1271 | } | |
1272 | } | |
1273 | } | |
1274 | ||
1275 | /* Specific sections: | |
1276 | - The .page0 is a data section that is mapped in [0x0000..0x00FF]. | |
1277 | Page0 accesses are faster on the M68HC11. Soft registers used by GCC-m6811 | |
1278 | are located in .page0. | |
1279 | - The .vectors is the section that represents the interrupt | |
1280 | vectors. */ | |
1281 | static const struct bfd_elf_special_section elf32_m68hc11_special_sections[] = | |
1282 | { | |
1283 | { STRING_COMMA_LEN (".eeprom"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE }, | |
1284 | { STRING_COMMA_LEN (".page0"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE }, | |
1285 | { STRING_COMMA_LEN (".softregs"), 0, SHT_NOBITS, SHF_ALLOC + SHF_WRITE }, | |
1286 | { STRING_COMMA_LEN (".vectors"), 0, SHT_PROGBITS, SHF_ALLOC }, | |
1287 | { NULL, 0, 0, 0, 0 } | |
1288 | }; | |
1289 | \f | |
1290 | #define ELF_ARCH bfd_arch_m68hc11 | |
1291 | #define ELF_TARGET_ID M68HC11_ELF_DATA | |
1292 | #define ELF_MACHINE_CODE EM_68HC11 | |
1293 | #define ELF_MAXPAGESIZE 0x1000 | |
1294 | ||
1295 | #define TARGET_BIG_SYM m68hc11_elf32_vec | |
1296 | #define TARGET_BIG_NAME "elf32-m68hc11" | |
1297 | ||
1298 | #define elf_info_to_howto 0 | |
1299 | #define elf_info_to_howto_rel m68hc11_info_to_howto_rel | |
1300 | #define bfd_elf32_bfd_relax_section m68hc11_elf_relax_section | |
1301 | #define elf_backend_check_relocs elf32_m68hc11_check_relocs | |
1302 | #define elf_backend_relocate_section elf32_m68hc11_relocate_section | |
1303 | #define elf_backend_add_symbol_hook elf32_m68hc11_add_symbol_hook | |
1304 | #define elf_backend_object_p 0 | |
1305 | #define elf_backend_final_write_processing 0 | |
1306 | #define elf_backend_can_gc_sections 1 | |
1307 | #define elf_backend_special_sections elf32_m68hc11_special_sections | |
1308 | #define elf_backend_merge_symbol_attribute elf32_m68hc11_merge_symbol_attribute | |
1309 | ||
1310 | #define bfd_elf32_bfd_link_hash_table_create \ | |
1311 | m68hc11_elf_bfd_link_hash_table_create | |
1312 | #define bfd_elf32_bfd_merge_private_bfd_data \ | |
1313 | _bfd_m68hc11_elf_merge_private_bfd_data | |
1314 | #define bfd_elf32_bfd_set_private_flags _bfd_m68hc11_elf_set_private_flags | |
1315 | #define bfd_elf32_bfd_print_private_bfd_data \ | |
1316 | _bfd_m68hc11_elf_print_private_bfd_data | |
1317 | ||
1318 | #include "elf32-target.h" |