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[thirdparty/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
21
22 #include "sysdep.h"
23 #include <limits.h>
24
25 #include "bfd.h"
26 #include "bfd_stdint.h"
27 #include "libiberty.h"
28 #include "libbfd.h"
29 #include "elf-bfd.h"
30 #include "elf-nacl.h"
31 #include "elf-vxworks.h"
32 #include "elf/arm.h"
33
34 /* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36 #define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38
39 /* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41 #define RELOC_SIZE(HTAB) \
42 ((HTAB)->use_rel \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
45
46 /* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48 #define SWAP_RELOC_IN(HTAB) \
49 ((HTAB)->use_rel \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
52
53 /* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55 #define SWAP_RELOC_OUT(HTAB) \
56 ((HTAB)->use_rel \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
59
60 #define elf_info_to_howto 0
61 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62
63 #define ARM_ELF_ABI_VERSION 0
64 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65
66 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
67 struct bfd_link_info *link_info,
68 asection *sec,
69 bfd_byte *contents);
70
71 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
72 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
73 in that slot. */
74
75 static reloc_howto_type elf32_arm_howto_table_1[] =
76 {
77 /* No relocation. */
78 HOWTO (R_ARM_NONE, /* type */
79 0, /* rightshift */
80 0, /* size (0 = byte, 1 = short, 2 = long) */
81 0, /* bitsize */
82 FALSE, /* pc_relative */
83 0, /* bitpos */
84 complain_overflow_dont,/* complain_on_overflow */
85 bfd_elf_generic_reloc, /* special_function */
86 "R_ARM_NONE", /* name */
87 FALSE, /* partial_inplace */
88 0, /* src_mask */
89 0, /* dst_mask */
90 FALSE), /* pcrel_offset */
91
92 HOWTO (R_ARM_PC24, /* type */
93 2, /* rightshift */
94 2, /* size (0 = byte, 1 = short, 2 = long) */
95 24, /* bitsize */
96 TRUE, /* pc_relative */
97 0, /* bitpos */
98 complain_overflow_signed,/* complain_on_overflow */
99 bfd_elf_generic_reloc, /* special_function */
100 "R_ARM_PC24", /* name */
101 FALSE, /* partial_inplace */
102 0x00ffffff, /* src_mask */
103 0x00ffffff, /* dst_mask */
104 TRUE), /* pcrel_offset */
105
106 /* 32 bit absolute */
107 HOWTO (R_ARM_ABS32, /* type */
108 0, /* rightshift */
109 2, /* size (0 = byte, 1 = short, 2 = long) */
110 32, /* bitsize */
111 FALSE, /* pc_relative */
112 0, /* bitpos */
113 complain_overflow_bitfield,/* complain_on_overflow */
114 bfd_elf_generic_reloc, /* special_function */
115 "R_ARM_ABS32", /* name */
116 FALSE, /* partial_inplace */
117 0xffffffff, /* src_mask */
118 0xffffffff, /* dst_mask */
119 FALSE), /* pcrel_offset */
120
121 /* standard 32bit pc-relative reloc */
122 HOWTO (R_ARM_REL32, /* type */
123 0, /* rightshift */
124 2, /* size (0 = byte, 1 = short, 2 = long) */
125 32, /* bitsize */
126 TRUE, /* pc_relative */
127 0, /* bitpos */
128 complain_overflow_bitfield,/* complain_on_overflow */
129 bfd_elf_generic_reloc, /* special_function */
130 "R_ARM_REL32", /* name */
131 FALSE, /* partial_inplace */
132 0xffffffff, /* src_mask */
133 0xffffffff, /* dst_mask */
134 TRUE), /* pcrel_offset */
135
136 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
137 HOWTO (R_ARM_LDR_PC_G0, /* type */
138 0, /* rightshift */
139 0, /* size (0 = byte, 1 = short, 2 = long) */
140 32, /* bitsize */
141 TRUE, /* pc_relative */
142 0, /* bitpos */
143 complain_overflow_dont,/* complain_on_overflow */
144 bfd_elf_generic_reloc, /* special_function */
145 "R_ARM_LDR_PC_G0", /* name */
146 FALSE, /* partial_inplace */
147 0xffffffff, /* src_mask */
148 0xffffffff, /* dst_mask */
149 TRUE), /* pcrel_offset */
150
151 /* 16 bit absolute */
152 HOWTO (R_ARM_ABS16, /* type */
153 0, /* rightshift */
154 1, /* size (0 = byte, 1 = short, 2 = long) */
155 16, /* bitsize */
156 FALSE, /* pc_relative */
157 0, /* bitpos */
158 complain_overflow_bitfield,/* complain_on_overflow */
159 bfd_elf_generic_reloc, /* special_function */
160 "R_ARM_ABS16", /* name */
161 FALSE, /* partial_inplace */
162 0x0000ffff, /* src_mask */
163 0x0000ffff, /* dst_mask */
164 FALSE), /* pcrel_offset */
165
166 /* 12 bit absolute */
167 HOWTO (R_ARM_ABS12, /* type */
168 0, /* rightshift */
169 2, /* size (0 = byte, 1 = short, 2 = long) */
170 12, /* bitsize */
171 FALSE, /* pc_relative */
172 0, /* bitpos */
173 complain_overflow_bitfield,/* complain_on_overflow */
174 bfd_elf_generic_reloc, /* special_function */
175 "R_ARM_ABS12", /* name */
176 FALSE, /* partial_inplace */
177 0x00000fff, /* src_mask */
178 0x00000fff, /* dst_mask */
179 FALSE), /* pcrel_offset */
180
181 HOWTO (R_ARM_THM_ABS5, /* type */
182 6, /* rightshift */
183 1, /* size (0 = byte, 1 = short, 2 = long) */
184 5, /* bitsize */
185 FALSE, /* pc_relative */
186 0, /* bitpos */
187 complain_overflow_bitfield,/* complain_on_overflow */
188 bfd_elf_generic_reloc, /* special_function */
189 "R_ARM_THM_ABS5", /* name */
190 FALSE, /* partial_inplace */
191 0x000007e0, /* src_mask */
192 0x000007e0, /* dst_mask */
193 FALSE), /* pcrel_offset */
194
195 /* 8 bit absolute */
196 HOWTO (R_ARM_ABS8, /* type */
197 0, /* rightshift */
198 0, /* size (0 = byte, 1 = short, 2 = long) */
199 8, /* bitsize */
200 FALSE, /* pc_relative */
201 0, /* bitpos */
202 complain_overflow_bitfield,/* complain_on_overflow */
203 bfd_elf_generic_reloc, /* special_function */
204 "R_ARM_ABS8", /* name */
205 FALSE, /* partial_inplace */
206 0x000000ff, /* src_mask */
207 0x000000ff, /* dst_mask */
208 FALSE), /* pcrel_offset */
209
210 HOWTO (R_ARM_SBREL32, /* type */
211 0, /* rightshift */
212 2, /* size (0 = byte, 1 = short, 2 = long) */
213 32, /* bitsize */
214 FALSE, /* pc_relative */
215 0, /* bitpos */
216 complain_overflow_dont,/* complain_on_overflow */
217 bfd_elf_generic_reloc, /* special_function */
218 "R_ARM_SBREL32", /* name */
219 FALSE, /* partial_inplace */
220 0xffffffff, /* src_mask */
221 0xffffffff, /* dst_mask */
222 FALSE), /* pcrel_offset */
223
224 HOWTO (R_ARM_THM_CALL, /* type */
225 1, /* rightshift */
226 2, /* size (0 = byte, 1 = short, 2 = long) */
227 24, /* bitsize */
228 TRUE, /* pc_relative */
229 0, /* bitpos */
230 complain_overflow_signed,/* complain_on_overflow */
231 bfd_elf_generic_reloc, /* special_function */
232 "R_ARM_THM_CALL", /* name */
233 FALSE, /* partial_inplace */
234 0x07ff2fff, /* src_mask */
235 0x07ff2fff, /* dst_mask */
236 TRUE), /* pcrel_offset */
237
238 HOWTO (R_ARM_THM_PC8, /* type */
239 1, /* rightshift */
240 1, /* size (0 = byte, 1 = short, 2 = long) */
241 8, /* bitsize */
242 TRUE, /* pc_relative */
243 0, /* bitpos */
244 complain_overflow_signed,/* complain_on_overflow */
245 bfd_elf_generic_reloc, /* special_function */
246 "R_ARM_THM_PC8", /* name */
247 FALSE, /* partial_inplace */
248 0x000000ff, /* src_mask */
249 0x000000ff, /* dst_mask */
250 TRUE), /* pcrel_offset */
251
252 HOWTO (R_ARM_BREL_ADJ, /* type */
253 1, /* rightshift */
254 1, /* size (0 = byte, 1 = short, 2 = long) */
255 32, /* bitsize */
256 FALSE, /* pc_relative */
257 0, /* bitpos */
258 complain_overflow_signed,/* complain_on_overflow */
259 bfd_elf_generic_reloc, /* special_function */
260 "R_ARM_BREL_ADJ", /* name */
261 FALSE, /* partial_inplace */
262 0xffffffff, /* src_mask */
263 0xffffffff, /* dst_mask */
264 FALSE), /* pcrel_offset */
265
266 HOWTO (R_ARM_TLS_DESC, /* type */
267 0, /* rightshift */
268 2, /* size (0 = byte, 1 = short, 2 = long) */
269 32, /* bitsize */
270 FALSE, /* pc_relative */
271 0, /* bitpos */
272 complain_overflow_bitfield,/* complain_on_overflow */
273 bfd_elf_generic_reloc, /* special_function */
274 "R_ARM_TLS_DESC", /* name */
275 FALSE, /* partial_inplace */
276 0xffffffff, /* src_mask */
277 0xffffffff, /* dst_mask */
278 FALSE), /* pcrel_offset */
279
280 HOWTO (R_ARM_THM_SWI8, /* type */
281 0, /* rightshift */
282 0, /* size (0 = byte, 1 = short, 2 = long) */
283 0, /* bitsize */
284 FALSE, /* pc_relative */
285 0, /* bitpos */
286 complain_overflow_signed,/* complain_on_overflow */
287 bfd_elf_generic_reloc, /* special_function */
288 "R_ARM_SWI8", /* name */
289 FALSE, /* partial_inplace */
290 0x00000000, /* src_mask */
291 0x00000000, /* dst_mask */
292 FALSE), /* pcrel_offset */
293
294 /* BLX instruction for the ARM. */
295 HOWTO (R_ARM_XPC25, /* type */
296 2, /* rightshift */
297 2, /* size (0 = byte, 1 = short, 2 = long) */
298 24, /* bitsize */
299 TRUE, /* pc_relative */
300 0, /* bitpos */
301 complain_overflow_signed,/* complain_on_overflow */
302 bfd_elf_generic_reloc, /* special_function */
303 "R_ARM_XPC25", /* name */
304 FALSE, /* partial_inplace */
305 0x00ffffff, /* src_mask */
306 0x00ffffff, /* dst_mask */
307 TRUE), /* pcrel_offset */
308
309 /* BLX instruction for the Thumb. */
310 HOWTO (R_ARM_THM_XPC22, /* type */
311 2, /* rightshift */
312 2, /* size (0 = byte, 1 = short, 2 = long) */
313 24, /* bitsize */
314 TRUE, /* pc_relative */
315 0, /* bitpos */
316 complain_overflow_signed,/* complain_on_overflow */
317 bfd_elf_generic_reloc, /* special_function */
318 "R_ARM_THM_XPC22", /* name */
319 FALSE, /* partial_inplace */
320 0x07ff2fff, /* src_mask */
321 0x07ff2fff, /* dst_mask */
322 TRUE), /* pcrel_offset */
323
324 /* Dynamic TLS relocations. */
325
326 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
327 0, /* rightshift */
328 2, /* size (0 = byte, 1 = short, 2 = long) */
329 32, /* bitsize */
330 FALSE, /* pc_relative */
331 0, /* bitpos */
332 complain_overflow_bitfield,/* complain_on_overflow */
333 bfd_elf_generic_reloc, /* special_function */
334 "R_ARM_TLS_DTPMOD32", /* name */
335 TRUE, /* partial_inplace */
336 0xffffffff, /* src_mask */
337 0xffffffff, /* dst_mask */
338 FALSE), /* pcrel_offset */
339
340 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
341 0, /* rightshift */
342 2, /* size (0 = byte, 1 = short, 2 = long) */
343 32, /* bitsize */
344 FALSE, /* pc_relative */
345 0, /* bitpos */
346 complain_overflow_bitfield,/* complain_on_overflow */
347 bfd_elf_generic_reloc, /* special_function */
348 "R_ARM_TLS_DTPOFF32", /* name */
349 TRUE, /* partial_inplace */
350 0xffffffff, /* src_mask */
351 0xffffffff, /* dst_mask */
352 FALSE), /* pcrel_offset */
353
354 HOWTO (R_ARM_TLS_TPOFF32, /* type */
355 0, /* rightshift */
356 2, /* size (0 = byte, 1 = short, 2 = long) */
357 32, /* bitsize */
358 FALSE, /* pc_relative */
359 0, /* bitpos */
360 complain_overflow_bitfield,/* complain_on_overflow */
361 bfd_elf_generic_reloc, /* special_function */
362 "R_ARM_TLS_TPOFF32", /* name */
363 TRUE, /* partial_inplace */
364 0xffffffff, /* src_mask */
365 0xffffffff, /* dst_mask */
366 FALSE), /* pcrel_offset */
367
368 /* Relocs used in ARM Linux */
369
370 HOWTO (R_ARM_COPY, /* type */
371 0, /* rightshift */
372 2, /* size (0 = byte, 1 = short, 2 = long) */
373 32, /* bitsize */
374 FALSE, /* pc_relative */
375 0, /* bitpos */
376 complain_overflow_bitfield,/* complain_on_overflow */
377 bfd_elf_generic_reloc, /* special_function */
378 "R_ARM_COPY", /* name */
379 TRUE, /* partial_inplace */
380 0xffffffff, /* src_mask */
381 0xffffffff, /* dst_mask */
382 FALSE), /* pcrel_offset */
383
384 HOWTO (R_ARM_GLOB_DAT, /* type */
385 0, /* rightshift */
386 2, /* size (0 = byte, 1 = short, 2 = long) */
387 32, /* bitsize */
388 FALSE, /* pc_relative */
389 0, /* bitpos */
390 complain_overflow_bitfield,/* complain_on_overflow */
391 bfd_elf_generic_reloc, /* special_function */
392 "R_ARM_GLOB_DAT", /* name */
393 TRUE, /* partial_inplace */
394 0xffffffff, /* src_mask */
395 0xffffffff, /* dst_mask */
396 FALSE), /* pcrel_offset */
397
398 HOWTO (R_ARM_JUMP_SLOT, /* type */
399 0, /* rightshift */
400 2, /* size (0 = byte, 1 = short, 2 = long) */
401 32, /* bitsize */
402 FALSE, /* pc_relative */
403 0, /* bitpos */
404 complain_overflow_bitfield,/* complain_on_overflow */
405 bfd_elf_generic_reloc, /* special_function */
406 "R_ARM_JUMP_SLOT", /* name */
407 TRUE, /* partial_inplace */
408 0xffffffff, /* src_mask */
409 0xffffffff, /* dst_mask */
410 FALSE), /* pcrel_offset */
411
412 HOWTO (R_ARM_RELATIVE, /* type */
413 0, /* rightshift */
414 2, /* size (0 = byte, 1 = short, 2 = long) */
415 32, /* bitsize */
416 FALSE, /* pc_relative */
417 0, /* bitpos */
418 complain_overflow_bitfield,/* complain_on_overflow */
419 bfd_elf_generic_reloc, /* special_function */
420 "R_ARM_RELATIVE", /* name */
421 TRUE, /* partial_inplace */
422 0xffffffff, /* src_mask */
423 0xffffffff, /* dst_mask */
424 FALSE), /* pcrel_offset */
425
426 HOWTO (R_ARM_GOTOFF32, /* type */
427 0, /* rightshift */
428 2, /* size (0 = byte, 1 = short, 2 = long) */
429 32, /* bitsize */
430 FALSE, /* pc_relative */
431 0, /* bitpos */
432 complain_overflow_bitfield,/* complain_on_overflow */
433 bfd_elf_generic_reloc, /* special_function */
434 "R_ARM_GOTOFF32", /* name */
435 TRUE, /* partial_inplace */
436 0xffffffff, /* src_mask */
437 0xffffffff, /* dst_mask */
438 FALSE), /* pcrel_offset */
439
440 HOWTO (R_ARM_GOTPC, /* type */
441 0, /* rightshift */
442 2, /* size (0 = byte, 1 = short, 2 = long) */
443 32, /* bitsize */
444 TRUE, /* pc_relative */
445 0, /* bitpos */
446 complain_overflow_bitfield,/* complain_on_overflow */
447 bfd_elf_generic_reloc, /* special_function */
448 "R_ARM_GOTPC", /* name */
449 TRUE, /* partial_inplace */
450 0xffffffff, /* src_mask */
451 0xffffffff, /* dst_mask */
452 TRUE), /* pcrel_offset */
453
454 HOWTO (R_ARM_GOT32, /* type */
455 0, /* rightshift */
456 2, /* size (0 = byte, 1 = short, 2 = long) */
457 32, /* bitsize */
458 FALSE, /* pc_relative */
459 0, /* bitpos */
460 complain_overflow_bitfield,/* complain_on_overflow */
461 bfd_elf_generic_reloc, /* special_function */
462 "R_ARM_GOT32", /* name */
463 TRUE, /* partial_inplace */
464 0xffffffff, /* src_mask */
465 0xffffffff, /* dst_mask */
466 FALSE), /* pcrel_offset */
467
468 HOWTO (R_ARM_PLT32, /* type */
469 2, /* rightshift */
470 2, /* size (0 = byte, 1 = short, 2 = long) */
471 24, /* bitsize */
472 TRUE, /* pc_relative */
473 0, /* bitpos */
474 complain_overflow_bitfield,/* complain_on_overflow */
475 bfd_elf_generic_reloc, /* special_function */
476 "R_ARM_PLT32", /* name */
477 FALSE, /* partial_inplace */
478 0x00ffffff, /* src_mask */
479 0x00ffffff, /* dst_mask */
480 TRUE), /* pcrel_offset */
481
482 HOWTO (R_ARM_CALL, /* type */
483 2, /* rightshift */
484 2, /* size (0 = byte, 1 = short, 2 = long) */
485 24, /* bitsize */
486 TRUE, /* pc_relative */
487 0, /* bitpos */
488 complain_overflow_signed,/* complain_on_overflow */
489 bfd_elf_generic_reloc, /* special_function */
490 "R_ARM_CALL", /* name */
491 FALSE, /* partial_inplace */
492 0x00ffffff, /* src_mask */
493 0x00ffffff, /* dst_mask */
494 TRUE), /* pcrel_offset */
495
496 HOWTO (R_ARM_JUMP24, /* type */
497 2, /* rightshift */
498 2, /* size (0 = byte, 1 = short, 2 = long) */
499 24, /* bitsize */
500 TRUE, /* pc_relative */
501 0, /* bitpos */
502 complain_overflow_signed,/* complain_on_overflow */
503 bfd_elf_generic_reloc, /* special_function */
504 "R_ARM_JUMP24", /* name */
505 FALSE, /* partial_inplace */
506 0x00ffffff, /* src_mask */
507 0x00ffffff, /* dst_mask */
508 TRUE), /* pcrel_offset */
509
510 HOWTO (R_ARM_THM_JUMP24, /* type */
511 1, /* rightshift */
512 2, /* size (0 = byte, 1 = short, 2 = long) */
513 24, /* bitsize */
514 TRUE, /* pc_relative */
515 0, /* bitpos */
516 complain_overflow_signed,/* complain_on_overflow */
517 bfd_elf_generic_reloc, /* special_function */
518 "R_ARM_THM_JUMP24", /* name */
519 FALSE, /* partial_inplace */
520 0x07ff2fff, /* src_mask */
521 0x07ff2fff, /* dst_mask */
522 TRUE), /* pcrel_offset */
523
524 HOWTO (R_ARM_BASE_ABS, /* type */
525 0, /* rightshift */
526 2, /* size (0 = byte, 1 = short, 2 = long) */
527 32, /* bitsize */
528 FALSE, /* pc_relative */
529 0, /* bitpos */
530 complain_overflow_dont,/* complain_on_overflow */
531 bfd_elf_generic_reloc, /* special_function */
532 "R_ARM_BASE_ABS", /* name */
533 FALSE, /* partial_inplace */
534 0xffffffff, /* src_mask */
535 0xffffffff, /* dst_mask */
536 FALSE), /* pcrel_offset */
537
538 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
539 0, /* rightshift */
540 2, /* size (0 = byte, 1 = short, 2 = long) */
541 12, /* bitsize */
542 TRUE, /* pc_relative */
543 0, /* bitpos */
544 complain_overflow_dont,/* complain_on_overflow */
545 bfd_elf_generic_reloc, /* special_function */
546 "R_ARM_ALU_PCREL_7_0", /* name */
547 FALSE, /* partial_inplace */
548 0x00000fff, /* src_mask */
549 0x00000fff, /* dst_mask */
550 TRUE), /* pcrel_offset */
551
552 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
553 0, /* rightshift */
554 2, /* size (0 = byte, 1 = short, 2 = long) */
555 12, /* bitsize */
556 TRUE, /* pc_relative */
557 8, /* bitpos */
558 complain_overflow_dont,/* complain_on_overflow */
559 bfd_elf_generic_reloc, /* special_function */
560 "R_ARM_ALU_PCREL_15_8",/* name */
561 FALSE, /* partial_inplace */
562 0x00000fff, /* src_mask */
563 0x00000fff, /* dst_mask */
564 TRUE), /* pcrel_offset */
565
566 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
567 0, /* rightshift */
568 2, /* size (0 = byte, 1 = short, 2 = long) */
569 12, /* bitsize */
570 TRUE, /* pc_relative */
571 16, /* bitpos */
572 complain_overflow_dont,/* complain_on_overflow */
573 bfd_elf_generic_reloc, /* special_function */
574 "R_ARM_ALU_PCREL_23_15",/* name */
575 FALSE, /* partial_inplace */
576 0x00000fff, /* src_mask */
577 0x00000fff, /* dst_mask */
578 TRUE), /* pcrel_offset */
579
580 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
581 0, /* rightshift */
582 2, /* size (0 = byte, 1 = short, 2 = long) */
583 12, /* bitsize */
584 FALSE, /* pc_relative */
585 0, /* bitpos */
586 complain_overflow_dont,/* complain_on_overflow */
587 bfd_elf_generic_reloc, /* special_function */
588 "R_ARM_LDR_SBREL_11_0",/* name */
589 FALSE, /* partial_inplace */
590 0x00000fff, /* src_mask */
591 0x00000fff, /* dst_mask */
592 FALSE), /* pcrel_offset */
593
594 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
595 0, /* rightshift */
596 2, /* size (0 = byte, 1 = short, 2 = long) */
597 8, /* bitsize */
598 FALSE, /* pc_relative */
599 12, /* bitpos */
600 complain_overflow_dont,/* complain_on_overflow */
601 bfd_elf_generic_reloc, /* special_function */
602 "R_ARM_ALU_SBREL_19_12",/* name */
603 FALSE, /* partial_inplace */
604 0x000ff000, /* src_mask */
605 0x000ff000, /* dst_mask */
606 FALSE), /* pcrel_offset */
607
608 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
609 0, /* rightshift */
610 2, /* size (0 = byte, 1 = short, 2 = long) */
611 8, /* bitsize */
612 FALSE, /* pc_relative */
613 20, /* bitpos */
614 complain_overflow_dont,/* complain_on_overflow */
615 bfd_elf_generic_reloc, /* special_function */
616 "R_ARM_ALU_SBREL_27_20",/* name */
617 FALSE, /* partial_inplace */
618 0x0ff00000, /* src_mask */
619 0x0ff00000, /* dst_mask */
620 FALSE), /* pcrel_offset */
621
622 HOWTO (R_ARM_TARGET1, /* type */
623 0, /* rightshift */
624 2, /* size (0 = byte, 1 = short, 2 = long) */
625 32, /* bitsize */
626 FALSE, /* pc_relative */
627 0, /* bitpos */
628 complain_overflow_dont,/* complain_on_overflow */
629 bfd_elf_generic_reloc, /* special_function */
630 "R_ARM_TARGET1", /* name */
631 FALSE, /* partial_inplace */
632 0xffffffff, /* src_mask */
633 0xffffffff, /* dst_mask */
634 FALSE), /* pcrel_offset */
635
636 HOWTO (R_ARM_ROSEGREL32, /* type */
637 0, /* rightshift */
638 2, /* size (0 = byte, 1 = short, 2 = long) */
639 32, /* bitsize */
640 FALSE, /* pc_relative */
641 0, /* bitpos */
642 complain_overflow_dont,/* complain_on_overflow */
643 bfd_elf_generic_reloc, /* special_function */
644 "R_ARM_ROSEGREL32", /* name */
645 FALSE, /* partial_inplace */
646 0xffffffff, /* src_mask */
647 0xffffffff, /* dst_mask */
648 FALSE), /* pcrel_offset */
649
650 HOWTO (R_ARM_V4BX, /* type */
651 0, /* rightshift */
652 2, /* size (0 = byte, 1 = short, 2 = long) */
653 32, /* bitsize */
654 FALSE, /* pc_relative */
655 0, /* bitpos */
656 complain_overflow_dont,/* complain_on_overflow */
657 bfd_elf_generic_reloc, /* special_function */
658 "R_ARM_V4BX", /* name */
659 FALSE, /* partial_inplace */
660 0xffffffff, /* src_mask */
661 0xffffffff, /* dst_mask */
662 FALSE), /* pcrel_offset */
663
664 HOWTO (R_ARM_TARGET2, /* type */
665 0, /* rightshift */
666 2, /* size (0 = byte, 1 = short, 2 = long) */
667 32, /* bitsize */
668 FALSE, /* pc_relative */
669 0, /* bitpos */
670 complain_overflow_signed,/* complain_on_overflow */
671 bfd_elf_generic_reloc, /* special_function */
672 "R_ARM_TARGET2", /* name */
673 FALSE, /* partial_inplace */
674 0xffffffff, /* src_mask */
675 0xffffffff, /* dst_mask */
676 TRUE), /* pcrel_offset */
677
678 HOWTO (R_ARM_PREL31, /* type */
679 0, /* rightshift */
680 2, /* size (0 = byte, 1 = short, 2 = long) */
681 31, /* bitsize */
682 TRUE, /* pc_relative */
683 0, /* bitpos */
684 complain_overflow_signed,/* complain_on_overflow */
685 bfd_elf_generic_reloc, /* special_function */
686 "R_ARM_PREL31", /* name */
687 FALSE, /* partial_inplace */
688 0x7fffffff, /* src_mask */
689 0x7fffffff, /* dst_mask */
690 TRUE), /* pcrel_offset */
691
692 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
693 0, /* rightshift */
694 2, /* size (0 = byte, 1 = short, 2 = long) */
695 16, /* bitsize */
696 FALSE, /* pc_relative */
697 0, /* bitpos */
698 complain_overflow_dont,/* complain_on_overflow */
699 bfd_elf_generic_reloc, /* special_function */
700 "R_ARM_MOVW_ABS_NC", /* name */
701 FALSE, /* partial_inplace */
702 0x000f0fff, /* src_mask */
703 0x000f0fff, /* dst_mask */
704 FALSE), /* pcrel_offset */
705
706 HOWTO (R_ARM_MOVT_ABS, /* type */
707 0, /* rightshift */
708 2, /* size (0 = byte, 1 = short, 2 = long) */
709 16, /* bitsize */
710 FALSE, /* pc_relative */
711 0, /* bitpos */
712 complain_overflow_bitfield,/* complain_on_overflow */
713 bfd_elf_generic_reloc, /* special_function */
714 "R_ARM_MOVT_ABS", /* name */
715 FALSE, /* partial_inplace */
716 0x000f0fff, /* src_mask */
717 0x000f0fff, /* dst_mask */
718 FALSE), /* pcrel_offset */
719
720 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
721 0, /* rightshift */
722 2, /* size (0 = byte, 1 = short, 2 = long) */
723 16, /* bitsize */
724 TRUE, /* pc_relative */
725 0, /* bitpos */
726 complain_overflow_dont,/* complain_on_overflow */
727 bfd_elf_generic_reloc, /* special_function */
728 "R_ARM_MOVW_PREL_NC", /* name */
729 FALSE, /* partial_inplace */
730 0x000f0fff, /* src_mask */
731 0x000f0fff, /* dst_mask */
732 TRUE), /* pcrel_offset */
733
734 HOWTO (R_ARM_MOVT_PREL, /* type */
735 0, /* rightshift */
736 2, /* size (0 = byte, 1 = short, 2 = long) */
737 16, /* bitsize */
738 TRUE, /* pc_relative */
739 0, /* bitpos */
740 complain_overflow_bitfield,/* complain_on_overflow */
741 bfd_elf_generic_reloc, /* special_function */
742 "R_ARM_MOVT_PREL", /* name */
743 FALSE, /* partial_inplace */
744 0x000f0fff, /* src_mask */
745 0x000f0fff, /* dst_mask */
746 TRUE), /* pcrel_offset */
747
748 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
749 0, /* rightshift */
750 2, /* size (0 = byte, 1 = short, 2 = long) */
751 16, /* bitsize */
752 FALSE, /* pc_relative */
753 0, /* bitpos */
754 complain_overflow_dont,/* complain_on_overflow */
755 bfd_elf_generic_reloc, /* special_function */
756 "R_ARM_THM_MOVW_ABS_NC",/* name */
757 FALSE, /* partial_inplace */
758 0x040f70ff, /* src_mask */
759 0x040f70ff, /* dst_mask */
760 FALSE), /* pcrel_offset */
761
762 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
763 0, /* rightshift */
764 2, /* size (0 = byte, 1 = short, 2 = long) */
765 16, /* bitsize */
766 FALSE, /* pc_relative */
767 0, /* bitpos */
768 complain_overflow_bitfield,/* complain_on_overflow */
769 bfd_elf_generic_reloc, /* special_function */
770 "R_ARM_THM_MOVT_ABS", /* name */
771 FALSE, /* partial_inplace */
772 0x040f70ff, /* src_mask */
773 0x040f70ff, /* dst_mask */
774 FALSE), /* pcrel_offset */
775
776 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
777 0, /* rightshift */
778 2, /* size (0 = byte, 1 = short, 2 = long) */
779 16, /* bitsize */
780 TRUE, /* pc_relative */
781 0, /* bitpos */
782 complain_overflow_dont,/* complain_on_overflow */
783 bfd_elf_generic_reloc, /* special_function */
784 "R_ARM_THM_MOVW_PREL_NC",/* name */
785 FALSE, /* partial_inplace */
786 0x040f70ff, /* src_mask */
787 0x040f70ff, /* dst_mask */
788 TRUE), /* pcrel_offset */
789
790 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
791 0, /* rightshift */
792 2, /* size (0 = byte, 1 = short, 2 = long) */
793 16, /* bitsize */
794 TRUE, /* pc_relative */
795 0, /* bitpos */
796 complain_overflow_bitfield,/* complain_on_overflow */
797 bfd_elf_generic_reloc, /* special_function */
798 "R_ARM_THM_MOVT_PREL", /* name */
799 FALSE, /* partial_inplace */
800 0x040f70ff, /* src_mask */
801 0x040f70ff, /* dst_mask */
802 TRUE), /* pcrel_offset */
803
804 HOWTO (R_ARM_THM_JUMP19, /* type */
805 1, /* rightshift */
806 2, /* size (0 = byte, 1 = short, 2 = long) */
807 19, /* bitsize */
808 TRUE, /* pc_relative */
809 0, /* bitpos */
810 complain_overflow_signed,/* complain_on_overflow */
811 bfd_elf_generic_reloc, /* special_function */
812 "R_ARM_THM_JUMP19", /* name */
813 FALSE, /* partial_inplace */
814 0x043f2fff, /* src_mask */
815 0x043f2fff, /* dst_mask */
816 TRUE), /* pcrel_offset */
817
818 HOWTO (R_ARM_THM_JUMP6, /* type */
819 1, /* rightshift */
820 1, /* size (0 = byte, 1 = short, 2 = long) */
821 6, /* bitsize */
822 TRUE, /* pc_relative */
823 0, /* bitpos */
824 complain_overflow_unsigned,/* complain_on_overflow */
825 bfd_elf_generic_reloc, /* special_function */
826 "R_ARM_THM_JUMP6", /* name */
827 FALSE, /* partial_inplace */
828 0x02f8, /* src_mask */
829 0x02f8, /* dst_mask */
830 TRUE), /* pcrel_offset */
831
832 /* These are declared as 13-bit signed relocations because we can
833 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
834 versa. */
835 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
836 0, /* rightshift */
837 2, /* size (0 = byte, 1 = short, 2 = long) */
838 13, /* bitsize */
839 TRUE, /* pc_relative */
840 0, /* bitpos */
841 complain_overflow_dont,/* complain_on_overflow */
842 bfd_elf_generic_reloc, /* special_function */
843 "R_ARM_THM_ALU_PREL_11_0",/* name */
844 FALSE, /* partial_inplace */
845 0xffffffff, /* src_mask */
846 0xffffffff, /* dst_mask */
847 TRUE), /* pcrel_offset */
848
849 HOWTO (R_ARM_THM_PC12, /* type */
850 0, /* rightshift */
851 2, /* size (0 = byte, 1 = short, 2 = long) */
852 13, /* bitsize */
853 TRUE, /* pc_relative */
854 0, /* bitpos */
855 complain_overflow_dont,/* complain_on_overflow */
856 bfd_elf_generic_reloc, /* special_function */
857 "R_ARM_THM_PC12", /* name */
858 FALSE, /* partial_inplace */
859 0xffffffff, /* src_mask */
860 0xffffffff, /* dst_mask */
861 TRUE), /* pcrel_offset */
862
863 HOWTO (R_ARM_ABS32_NOI, /* type */
864 0, /* rightshift */
865 2, /* size (0 = byte, 1 = short, 2 = long) */
866 32, /* bitsize */
867 FALSE, /* pc_relative */
868 0, /* bitpos */
869 complain_overflow_dont,/* complain_on_overflow */
870 bfd_elf_generic_reloc, /* special_function */
871 "R_ARM_ABS32_NOI", /* name */
872 FALSE, /* partial_inplace */
873 0xffffffff, /* src_mask */
874 0xffffffff, /* dst_mask */
875 FALSE), /* pcrel_offset */
876
877 HOWTO (R_ARM_REL32_NOI, /* type */
878 0, /* rightshift */
879 2, /* size (0 = byte, 1 = short, 2 = long) */
880 32, /* bitsize */
881 TRUE, /* pc_relative */
882 0, /* bitpos */
883 complain_overflow_dont,/* complain_on_overflow */
884 bfd_elf_generic_reloc, /* special_function */
885 "R_ARM_REL32_NOI", /* name */
886 FALSE, /* partial_inplace */
887 0xffffffff, /* src_mask */
888 0xffffffff, /* dst_mask */
889 FALSE), /* pcrel_offset */
890
891 /* Group relocations. */
892
893 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
894 0, /* rightshift */
895 2, /* size (0 = byte, 1 = short, 2 = long) */
896 32, /* bitsize */
897 TRUE, /* pc_relative */
898 0, /* bitpos */
899 complain_overflow_dont,/* complain_on_overflow */
900 bfd_elf_generic_reloc, /* special_function */
901 "R_ARM_ALU_PC_G0_NC", /* name */
902 FALSE, /* partial_inplace */
903 0xffffffff, /* src_mask */
904 0xffffffff, /* dst_mask */
905 TRUE), /* pcrel_offset */
906
907 HOWTO (R_ARM_ALU_PC_G0, /* type */
908 0, /* rightshift */
909 2, /* size (0 = byte, 1 = short, 2 = long) */
910 32, /* bitsize */
911 TRUE, /* pc_relative */
912 0, /* bitpos */
913 complain_overflow_dont,/* complain_on_overflow */
914 bfd_elf_generic_reloc, /* special_function */
915 "R_ARM_ALU_PC_G0", /* name */
916 FALSE, /* partial_inplace */
917 0xffffffff, /* src_mask */
918 0xffffffff, /* dst_mask */
919 TRUE), /* pcrel_offset */
920
921 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
922 0, /* rightshift */
923 2, /* size (0 = byte, 1 = short, 2 = long) */
924 32, /* bitsize */
925 TRUE, /* pc_relative */
926 0, /* bitpos */
927 complain_overflow_dont,/* complain_on_overflow */
928 bfd_elf_generic_reloc, /* special_function */
929 "R_ARM_ALU_PC_G1_NC", /* name */
930 FALSE, /* partial_inplace */
931 0xffffffff, /* src_mask */
932 0xffffffff, /* dst_mask */
933 TRUE), /* pcrel_offset */
934
935 HOWTO (R_ARM_ALU_PC_G1, /* type */
936 0, /* rightshift */
937 2, /* size (0 = byte, 1 = short, 2 = long) */
938 32, /* bitsize */
939 TRUE, /* pc_relative */
940 0, /* bitpos */
941 complain_overflow_dont,/* complain_on_overflow */
942 bfd_elf_generic_reloc, /* special_function */
943 "R_ARM_ALU_PC_G1", /* name */
944 FALSE, /* partial_inplace */
945 0xffffffff, /* src_mask */
946 0xffffffff, /* dst_mask */
947 TRUE), /* pcrel_offset */
948
949 HOWTO (R_ARM_ALU_PC_G2, /* type */
950 0, /* rightshift */
951 2, /* size (0 = byte, 1 = short, 2 = long) */
952 32, /* bitsize */
953 TRUE, /* pc_relative */
954 0, /* bitpos */
955 complain_overflow_dont,/* complain_on_overflow */
956 bfd_elf_generic_reloc, /* special_function */
957 "R_ARM_ALU_PC_G2", /* name */
958 FALSE, /* partial_inplace */
959 0xffffffff, /* src_mask */
960 0xffffffff, /* dst_mask */
961 TRUE), /* pcrel_offset */
962
963 HOWTO (R_ARM_LDR_PC_G1, /* type */
964 0, /* rightshift */
965 2, /* size (0 = byte, 1 = short, 2 = long) */
966 32, /* bitsize */
967 TRUE, /* pc_relative */
968 0, /* bitpos */
969 complain_overflow_dont,/* complain_on_overflow */
970 bfd_elf_generic_reloc, /* special_function */
971 "R_ARM_LDR_PC_G1", /* name */
972 FALSE, /* partial_inplace */
973 0xffffffff, /* src_mask */
974 0xffffffff, /* dst_mask */
975 TRUE), /* pcrel_offset */
976
977 HOWTO (R_ARM_LDR_PC_G2, /* type */
978 0, /* rightshift */
979 2, /* size (0 = byte, 1 = short, 2 = long) */
980 32, /* bitsize */
981 TRUE, /* pc_relative */
982 0, /* bitpos */
983 complain_overflow_dont,/* complain_on_overflow */
984 bfd_elf_generic_reloc, /* special_function */
985 "R_ARM_LDR_PC_G2", /* name */
986 FALSE, /* partial_inplace */
987 0xffffffff, /* src_mask */
988 0xffffffff, /* dst_mask */
989 TRUE), /* pcrel_offset */
990
991 HOWTO (R_ARM_LDRS_PC_G0, /* type */
992 0, /* rightshift */
993 2, /* size (0 = byte, 1 = short, 2 = long) */
994 32, /* bitsize */
995 TRUE, /* pc_relative */
996 0, /* bitpos */
997 complain_overflow_dont,/* complain_on_overflow */
998 bfd_elf_generic_reloc, /* special_function */
999 "R_ARM_LDRS_PC_G0", /* name */
1000 FALSE, /* partial_inplace */
1001 0xffffffff, /* src_mask */
1002 0xffffffff, /* dst_mask */
1003 TRUE), /* pcrel_offset */
1004
1005 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1006 0, /* rightshift */
1007 2, /* size (0 = byte, 1 = short, 2 = long) */
1008 32, /* bitsize */
1009 TRUE, /* pc_relative */
1010 0, /* bitpos */
1011 complain_overflow_dont,/* complain_on_overflow */
1012 bfd_elf_generic_reloc, /* special_function */
1013 "R_ARM_LDRS_PC_G1", /* name */
1014 FALSE, /* partial_inplace */
1015 0xffffffff, /* src_mask */
1016 0xffffffff, /* dst_mask */
1017 TRUE), /* pcrel_offset */
1018
1019 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1020 0, /* rightshift */
1021 2, /* size (0 = byte, 1 = short, 2 = long) */
1022 32, /* bitsize */
1023 TRUE, /* pc_relative */
1024 0, /* bitpos */
1025 complain_overflow_dont,/* complain_on_overflow */
1026 bfd_elf_generic_reloc, /* special_function */
1027 "R_ARM_LDRS_PC_G2", /* name */
1028 FALSE, /* partial_inplace */
1029 0xffffffff, /* src_mask */
1030 0xffffffff, /* dst_mask */
1031 TRUE), /* pcrel_offset */
1032
1033 HOWTO (R_ARM_LDC_PC_G0, /* type */
1034 0, /* rightshift */
1035 2, /* size (0 = byte, 1 = short, 2 = long) */
1036 32, /* bitsize */
1037 TRUE, /* pc_relative */
1038 0, /* bitpos */
1039 complain_overflow_dont,/* complain_on_overflow */
1040 bfd_elf_generic_reloc, /* special_function */
1041 "R_ARM_LDC_PC_G0", /* name */
1042 FALSE, /* partial_inplace */
1043 0xffffffff, /* src_mask */
1044 0xffffffff, /* dst_mask */
1045 TRUE), /* pcrel_offset */
1046
1047 HOWTO (R_ARM_LDC_PC_G1, /* type */
1048 0, /* rightshift */
1049 2, /* size (0 = byte, 1 = short, 2 = long) */
1050 32, /* bitsize */
1051 TRUE, /* pc_relative */
1052 0, /* bitpos */
1053 complain_overflow_dont,/* complain_on_overflow */
1054 bfd_elf_generic_reloc, /* special_function */
1055 "R_ARM_LDC_PC_G1", /* name */
1056 FALSE, /* partial_inplace */
1057 0xffffffff, /* src_mask */
1058 0xffffffff, /* dst_mask */
1059 TRUE), /* pcrel_offset */
1060
1061 HOWTO (R_ARM_LDC_PC_G2, /* type */
1062 0, /* rightshift */
1063 2, /* size (0 = byte, 1 = short, 2 = long) */
1064 32, /* bitsize */
1065 TRUE, /* pc_relative */
1066 0, /* bitpos */
1067 complain_overflow_dont,/* complain_on_overflow */
1068 bfd_elf_generic_reloc, /* special_function */
1069 "R_ARM_LDC_PC_G2", /* name */
1070 FALSE, /* partial_inplace */
1071 0xffffffff, /* src_mask */
1072 0xffffffff, /* dst_mask */
1073 TRUE), /* pcrel_offset */
1074
1075 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1076 0, /* rightshift */
1077 2, /* size (0 = byte, 1 = short, 2 = long) */
1078 32, /* bitsize */
1079 TRUE, /* pc_relative */
1080 0, /* bitpos */
1081 complain_overflow_dont,/* complain_on_overflow */
1082 bfd_elf_generic_reloc, /* special_function */
1083 "R_ARM_ALU_SB_G0_NC", /* name */
1084 FALSE, /* partial_inplace */
1085 0xffffffff, /* src_mask */
1086 0xffffffff, /* dst_mask */
1087 TRUE), /* pcrel_offset */
1088
1089 HOWTO (R_ARM_ALU_SB_G0, /* type */
1090 0, /* rightshift */
1091 2, /* size (0 = byte, 1 = short, 2 = long) */
1092 32, /* bitsize */
1093 TRUE, /* pc_relative */
1094 0, /* bitpos */
1095 complain_overflow_dont,/* complain_on_overflow */
1096 bfd_elf_generic_reloc, /* special_function */
1097 "R_ARM_ALU_SB_G0", /* name */
1098 FALSE, /* partial_inplace */
1099 0xffffffff, /* src_mask */
1100 0xffffffff, /* dst_mask */
1101 TRUE), /* pcrel_offset */
1102
1103 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1104 0, /* rightshift */
1105 2, /* size (0 = byte, 1 = short, 2 = long) */
1106 32, /* bitsize */
1107 TRUE, /* pc_relative */
1108 0, /* bitpos */
1109 complain_overflow_dont,/* complain_on_overflow */
1110 bfd_elf_generic_reloc, /* special_function */
1111 "R_ARM_ALU_SB_G1_NC", /* name */
1112 FALSE, /* partial_inplace */
1113 0xffffffff, /* src_mask */
1114 0xffffffff, /* dst_mask */
1115 TRUE), /* pcrel_offset */
1116
1117 HOWTO (R_ARM_ALU_SB_G1, /* type */
1118 0, /* rightshift */
1119 2, /* size (0 = byte, 1 = short, 2 = long) */
1120 32, /* bitsize */
1121 TRUE, /* pc_relative */
1122 0, /* bitpos */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 bfd_elf_generic_reloc, /* special_function */
1125 "R_ARM_ALU_SB_G1", /* name */
1126 FALSE, /* partial_inplace */
1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
1129 TRUE), /* pcrel_offset */
1130
1131 HOWTO (R_ARM_ALU_SB_G2, /* type */
1132 0, /* rightshift */
1133 2, /* size (0 = byte, 1 = short, 2 = long) */
1134 32, /* bitsize */
1135 TRUE, /* pc_relative */
1136 0, /* bitpos */
1137 complain_overflow_dont,/* complain_on_overflow */
1138 bfd_elf_generic_reloc, /* special_function */
1139 "R_ARM_ALU_SB_G2", /* name */
1140 FALSE, /* partial_inplace */
1141 0xffffffff, /* src_mask */
1142 0xffffffff, /* dst_mask */
1143 TRUE), /* pcrel_offset */
1144
1145 HOWTO (R_ARM_LDR_SB_G0, /* type */
1146 0, /* rightshift */
1147 2, /* size (0 = byte, 1 = short, 2 = long) */
1148 32, /* bitsize */
1149 TRUE, /* pc_relative */
1150 0, /* bitpos */
1151 complain_overflow_dont,/* complain_on_overflow */
1152 bfd_elf_generic_reloc, /* special_function */
1153 "R_ARM_LDR_SB_G0", /* name */
1154 FALSE, /* partial_inplace */
1155 0xffffffff, /* src_mask */
1156 0xffffffff, /* dst_mask */
1157 TRUE), /* pcrel_offset */
1158
1159 HOWTO (R_ARM_LDR_SB_G1, /* type */
1160 0, /* rightshift */
1161 2, /* size (0 = byte, 1 = short, 2 = long) */
1162 32, /* bitsize */
1163 TRUE, /* pc_relative */
1164 0, /* bitpos */
1165 complain_overflow_dont,/* complain_on_overflow */
1166 bfd_elf_generic_reloc, /* special_function */
1167 "R_ARM_LDR_SB_G1", /* name */
1168 FALSE, /* partial_inplace */
1169 0xffffffff, /* src_mask */
1170 0xffffffff, /* dst_mask */
1171 TRUE), /* pcrel_offset */
1172
1173 HOWTO (R_ARM_LDR_SB_G2, /* type */
1174 0, /* rightshift */
1175 2, /* size (0 = byte, 1 = short, 2 = long) */
1176 32, /* bitsize */
1177 TRUE, /* pc_relative */
1178 0, /* bitpos */
1179 complain_overflow_dont,/* complain_on_overflow */
1180 bfd_elf_generic_reloc, /* special_function */
1181 "R_ARM_LDR_SB_G2", /* name */
1182 FALSE, /* partial_inplace */
1183 0xffffffff, /* src_mask */
1184 0xffffffff, /* dst_mask */
1185 TRUE), /* pcrel_offset */
1186
1187 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1188 0, /* rightshift */
1189 2, /* size (0 = byte, 1 = short, 2 = long) */
1190 32, /* bitsize */
1191 TRUE, /* pc_relative */
1192 0, /* bitpos */
1193 complain_overflow_dont,/* complain_on_overflow */
1194 bfd_elf_generic_reloc, /* special_function */
1195 "R_ARM_LDRS_SB_G0", /* name */
1196 FALSE, /* partial_inplace */
1197 0xffffffff, /* src_mask */
1198 0xffffffff, /* dst_mask */
1199 TRUE), /* pcrel_offset */
1200
1201 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1202 0, /* rightshift */
1203 2, /* size (0 = byte, 1 = short, 2 = long) */
1204 32, /* bitsize */
1205 TRUE, /* pc_relative */
1206 0, /* bitpos */
1207 complain_overflow_dont,/* complain_on_overflow */
1208 bfd_elf_generic_reloc, /* special_function */
1209 "R_ARM_LDRS_SB_G1", /* name */
1210 FALSE, /* partial_inplace */
1211 0xffffffff, /* src_mask */
1212 0xffffffff, /* dst_mask */
1213 TRUE), /* pcrel_offset */
1214
1215 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1216 0, /* rightshift */
1217 2, /* size (0 = byte, 1 = short, 2 = long) */
1218 32, /* bitsize */
1219 TRUE, /* pc_relative */
1220 0, /* bitpos */
1221 complain_overflow_dont,/* complain_on_overflow */
1222 bfd_elf_generic_reloc, /* special_function */
1223 "R_ARM_LDRS_SB_G2", /* name */
1224 FALSE, /* partial_inplace */
1225 0xffffffff, /* src_mask */
1226 0xffffffff, /* dst_mask */
1227 TRUE), /* pcrel_offset */
1228
1229 HOWTO (R_ARM_LDC_SB_G0, /* type */
1230 0, /* rightshift */
1231 2, /* size (0 = byte, 1 = short, 2 = long) */
1232 32, /* bitsize */
1233 TRUE, /* pc_relative */
1234 0, /* bitpos */
1235 complain_overflow_dont,/* complain_on_overflow */
1236 bfd_elf_generic_reloc, /* special_function */
1237 "R_ARM_LDC_SB_G0", /* name */
1238 FALSE, /* partial_inplace */
1239 0xffffffff, /* src_mask */
1240 0xffffffff, /* dst_mask */
1241 TRUE), /* pcrel_offset */
1242
1243 HOWTO (R_ARM_LDC_SB_G1, /* type */
1244 0, /* rightshift */
1245 2, /* size (0 = byte, 1 = short, 2 = long) */
1246 32, /* bitsize */
1247 TRUE, /* pc_relative */
1248 0, /* bitpos */
1249 complain_overflow_dont,/* complain_on_overflow */
1250 bfd_elf_generic_reloc, /* special_function */
1251 "R_ARM_LDC_SB_G1", /* name */
1252 FALSE, /* partial_inplace */
1253 0xffffffff, /* src_mask */
1254 0xffffffff, /* dst_mask */
1255 TRUE), /* pcrel_offset */
1256
1257 HOWTO (R_ARM_LDC_SB_G2, /* type */
1258 0, /* rightshift */
1259 2, /* size (0 = byte, 1 = short, 2 = long) */
1260 32, /* bitsize */
1261 TRUE, /* pc_relative */
1262 0, /* bitpos */
1263 complain_overflow_dont,/* complain_on_overflow */
1264 bfd_elf_generic_reloc, /* special_function */
1265 "R_ARM_LDC_SB_G2", /* name */
1266 FALSE, /* partial_inplace */
1267 0xffffffff, /* src_mask */
1268 0xffffffff, /* dst_mask */
1269 TRUE), /* pcrel_offset */
1270
1271 /* End of group relocations. */
1272
1273 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1274 0, /* rightshift */
1275 2, /* size (0 = byte, 1 = short, 2 = long) */
1276 16, /* bitsize */
1277 FALSE, /* pc_relative */
1278 0, /* bitpos */
1279 complain_overflow_dont,/* complain_on_overflow */
1280 bfd_elf_generic_reloc, /* special_function */
1281 "R_ARM_MOVW_BREL_NC", /* name */
1282 FALSE, /* partial_inplace */
1283 0x0000ffff, /* src_mask */
1284 0x0000ffff, /* dst_mask */
1285 FALSE), /* pcrel_offset */
1286
1287 HOWTO (R_ARM_MOVT_BREL, /* type */
1288 0, /* rightshift */
1289 2, /* size (0 = byte, 1 = short, 2 = long) */
1290 16, /* bitsize */
1291 FALSE, /* pc_relative */
1292 0, /* bitpos */
1293 complain_overflow_bitfield,/* complain_on_overflow */
1294 bfd_elf_generic_reloc, /* special_function */
1295 "R_ARM_MOVT_BREL", /* name */
1296 FALSE, /* partial_inplace */
1297 0x0000ffff, /* src_mask */
1298 0x0000ffff, /* dst_mask */
1299 FALSE), /* pcrel_offset */
1300
1301 HOWTO (R_ARM_MOVW_BREL, /* type */
1302 0, /* rightshift */
1303 2, /* size (0 = byte, 1 = short, 2 = long) */
1304 16, /* bitsize */
1305 FALSE, /* pc_relative */
1306 0, /* bitpos */
1307 complain_overflow_dont,/* complain_on_overflow */
1308 bfd_elf_generic_reloc, /* special_function */
1309 "R_ARM_MOVW_BREL", /* name */
1310 FALSE, /* partial_inplace */
1311 0x0000ffff, /* src_mask */
1312 0x0000ffff, /* dst_mask */
1313 FALSE), /* pcrel_offset */
1314
1315 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1316 0, /* rightshift */
1317 2, /* size (0 = byte, 1 = short, 2 = long) */
1318 16, /* bitsize */
1319 FALSE, /* pc_relative */
1320 0, /* bitpos */
1321 complain_overflow_dont,/* complain_on_overflow */
1322 bfd_elf_generic_reloc, /* special_function */
1323 "R_ARM_THM_MOVW_BREL_NC",/* name */
1324 FALSE, /* partial_inplace */
1325 0x040f70ff, /* src_mask */
1326 0x040f70ff, /* dst_mask */
1327 FALSE), /* pcrel_offset */
1328
1329 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1330 0, /* rightshift */
1331 2, /* size (0 = byte, 1 = short, 2 = long) */
1332 16, /* bitsize */
1333 FALSE, /* pc_relative */
1334 0, /* bitpos */
1335 complain_overflow_bitfield,/* complain_on_overflow */
1336 bfd_elf_generic_reloc, /* special_function */
1337 "R_ARM_THM_MOVT_BREL", /* name */
1338 FALSE, /* partial_inplace */
1339 0x040f70ff, /* src_mask */
1340 0x040f70ff, /* dst_mask */
1341 FALSE), /* pcrel_offset */
1342
1343 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1344 0, /* rightshift */
1345 2, /* size (0 = byte, 1 = short, 2 = long) */
1346 16, /* bitsize */
1347 FALSE, /* pc_relative */
1348 0, /* bitpos */
1349 complain_overflow_dont,/* complain_on_overflow */
1350 bfd_elf_generic_reloc, /* special_function */
1351 "R_ARM_THM_MOVW_BREL", /* name */
1352 FALSE, /* partial_inplace */
1353 0x040f70ff, /* src_mask */
1354 0x040f70ff, /* dst_mask */
1355 FALSE), /* pcrel_offset */
1356
1357 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1358 0, /* rightshift */
1359 2, /* size (0 = byte, 1 = short, 2 = long) */
1360 32, /* bitsize */
1361 FALSE, /* pc_relative */
1362 0, /* bitpos */
1363 complain_overflow_bitfield,/* complain_on_overflow */
1364 NULL, /* special_function */
1365 "R_ARM_TLS_GOTDESC", /* name */
1366 TRUE, /* partial_inplace */
1367 0xffffffff, /* src_mask */
1368 0xffffffff, /* dst_mask */
1369 FALSE), /* pcrel_offset */
1370
1371 HOWTO (R_ARM_TLS_CALL, /* type */
1372 0, /* rightshift */
1373 2, /* size (0 = byte, 1 = short, 2 = long) */
1374 24, /* bitsize */
1375 FALSE, /* pc_relative */
1376 0, /* bitpos */
1377 complain_overflow_dont,/* complain_on_overflow */
1378 bfd_elf_generic_reloc, /* special_function */
1379 "R_ARM_TLS_CALL", /* name */
1380 FALSE, /* partial_inplace */
1381 0x00ffffff, /* src_mask */
1382 0x00ffffff, /* dst_mask */
1383 FALSE), /* pcrel_offset */
1384
1385 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1386 0, /* rightshift */
1387 2, /* size (0 = byte, 1 = short, 2 = long) */
1388 0, /* bitsize */
1389 FALSE, /* pc_relative */
1390 0, /* bitpos */
1391 complain_overflow_bitfield,/* complain_on_overflow */
1392 bfd_elf_generic_reloc, /* special_function */
1393 "R_ARM_TLS_DESCSEQ", /* name */
1394 FALSE, /* partial_inplace */
1395 0x00000000, /* src_mask */
1396 0x00000000, /* dst_mask */
1397 FALSE), /* pcrel_offset */
1398
1399 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1400 0, /* rightshift */
1401 2, /* size (0 = byte, 1 = short, 2 = long) */
1402 24, /* bitsize */
1403 FALSE, /* pc_relative */
1404 0, /* bitpos */
1405 complain_overflow_dont,/* complain_on_overflow */
1406 bfd_elf_generic_reloc, /* special_function */
1407 "R_ARM_THM_TLS_CALL", /* name */
1408 FALSE, /* partial_inplace */
1409 0x07ff07ff, /* src_mask */
1410 0x07ff07ff, /* dst_mask */
1411 FALSE), /* pcrel_offset */
1412
1413 HOWTO (R_ARM_PLT32_ABS, /* type */
1414 0, /* rightshift */
1415 2, /* size (0 = byte, 1 = short, 2 = long) */
1416 32, /* bitsize */
1417 FALSE, /* pc_relative */
1418 0, /* bitpos */
1419 complain_overflow_dont,/* complain_on_overflow */
1420 bfd_elf_generic_reloc, /* special_function */
1421 "R_ARM_PLT32_ABS", /* name */
1422 FALSE, /* partial_inplace */
1423 0xffffffff, /* src_mask */
1424 0xffffffff, /* dst_mask */
1425 FALSE), /* pcrel_offset */
1426
1427 HOWTO (R_ARM_GOT_ABS, /* type */
1428 0, /* rightshift */
1429 2, /* size (0 = byte, 1 = short, 2 = long) */
1430 32, /* bitsize */
1431 FALSE, /* pc_relative */
1432 0, /* bitpos */
1433 complain_overflow_dont,/* complain_on_overflow */
1434 bfd_elf_generic_reloc, /* special_function */
1435 "R_ARM_GOT_ABS", /* name */
1436 FALSE, /* partial_inplace */
1437 0xffffffff, /* src_mask */
1438 0xffffffff, /* dst_mask */
1439 FALSE), /* pcrel_offset */
1440
1441 HOWTO (R_ARM_GOT_PREL, /* type */
1442 0, /* rightshift */
1443 2, /* size (0 = byte, 1 = short, 2 = long) */
1444 32, /* bitsize */
1445 TRUE, /* pc_relative */
1446 0, /* bitpos */
1447 complain_overflow_dont, /* complain_on_overflow */
1448 bfd_elf_generic_reloc, /* special_function */
1449 "R_ARM_GOT_PREL", /* name */
1450 FALSE, /* partial_inplace */
1451 0xffffffff, /* src_mask */
1452 0xffffffff, /* dst_mask */
1453 TRUE), /* pcrel_offset */
1454
1455 HOWTO (R_ARM_GOT_BREL12, /* type */
1456 0, /* rightshift */
1457 2, /* size (0 = byte, 1 = short, 2 = long) */
1458 12, /* bitsize */
1459 FALSE, /* pc_relative */
1460 0, /* bitpos */
1461 complain_overflow_bitfield,/* complain_on_overflow */
1462 bfd_elf_generic_reloc, /* special_function */
1463 "R_ARM_GOT_BREL12", /* name */
1464 FALSE, /* partial_inplace */
1465 0x00000fff, /* src_mask */
1466 0x00000fff, /* dst_mask */
1467 FALSE), /* pcrel_offset */
1468
1469 HOWTO (R_ARM_GOTOFF12, /* type */
1470 0, /* rightshift */
1471 2, /* size (0 = byte, 1 = short, 2 = long) */
1472 12, /* bitsize */
1473 FALSE, /* pc_relative */
1474 0, /* bitpos */
1475 complain_overflow_bitfield,/* complain_on_overflow */
1476 bfd_elf_generic_reloc, /* special_function */
1477 "R_ARM_GOTOFF12", /* name */
1478 FALSE, /* partial_inplace */
1479 0x00000fff, /* src_mask */
1480 0x00000fff, /* dst_mask */
1481 FALSE), /* pcrel_offset */
1482
1483 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1484
1485 /* GNU extension to record C++ vtable member usage */
1486 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1487 0, /* rightshift */
1488 2, /* size (0 = byte, 1 = short, 2 = long) */
1489 0, /* bitsize */
1490 FALSE, /* pc_relative */
1491 0, /* bitpos */
1492 complain_overflow_dont, /* complain_on_overflow */
1493 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1494 "R_ARM_GNU_VTENTRY", /* name */
1495 FALSE, /* partial_inplace */
1496 0, /* src_mask */
1497 0, /* dst_mask */
1498 FALSE), /* pcrel_offset */
1499
1500 /* GNU extension to record C++ vtable hierarchy */
1501 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1502 0, /* rightshift */
1503 2, /* size (0 = byte, 1 = short, 2 = long) */
1504 0, /* bitsize */
1505 FALSE, /* pc_relative */
1506 0, /* bitpos */
1507 complain_overflow_dont, /* complain_on_overflow */
1508 NULL, /* special_function */
1509 "R_ARM_GNU_VTINHERIT", /* name */
1510 FALSE, /* partial_inplace */
1511 0, /* src_mask */
1512 0, /* dst_mask */
1513 FALSE), /* pcrel_offset */
1514
1515 HOWTO (R_ARM_THM_JUMP11, /* type */
1516 1, /* rightshift */
1517 1, /* size (0 = byte, 1 = short, 2 = long) */
1518 11, /* bitsize */
1519 TRUE, /* pc_relative */
1520 0, /* bitpos */
1521 complain_overflow_signed, /* complain_on_overflow */
1522 bfd_elf_generic_reloc, /* special_function */
1523 "R_ARM_THM_JUMP11", /* name */
1524 FALSE, /* partial_inplace */
1525 0x000007ff, /* src_mask */
1526 0x000007ff, /* dst_mask */
1527 TRUE), /* pcrel_offset */
1528
1529 HOWTO (R_ARM_THM_JUMP8, /* type */
1530 1, /* rightshift */
1531 1, /* size (0 = byte, 1 = short, 2 = long) */
1532 8, /* bitsize */
1533 TRUE, /* pc_relative */
1534 0, /* bitpos */
1535 complain_overflow_signed, /* complain_on_overflow */
1536 bfd_elf_generic_reloc, /* special_function */
1537 "R_ARM_THM_JUMP8", /* name */
1538 FALSE, /* partial_inplace */
1539 0x000000ff, /* src_mask */
1540 0x000000ff, /* dst_mask */
1541 TRUE), /* pcrel_offset */
1542
1543 /* TLS relocations */
1544 HOWTO (R_ARM_TLS_GD32, /* type */
1545 0, /* rightshift */
1546 2, /* size (0 = byte, 1 = short, 2 = long) */
1547 32, /* bitsize */
1548 FALSE, /* pc_relative */
1549 0, /* bitpos */
1550 complain_overflow_bitfield,/* complain_on_overflow */
1551 NULL, /* special_function */
1552 "R_ARM_TLS_GD32", /* name */
1553 TRUE, /* partial_inplace */
1554 0xffffffff, /* src_mask */
1555 0xffffffff, /* dst_mask */
1556 FALSE), /* pcrel_offset */
1557
1558 HOWTO (R_ARM_TLS_LDM32, /* type */
1559 0, /* rightshift */
1560 2, /* size (0 = byte, 1 = short, 2 = long) */
1561 32, /* bitsize */
1562 FALSE, /* pc_relative */
1563 0, /* bitpos */
1564 complain_overflow_bitfield,/* complain_on_overflow */
1565 bfd_elf_generic_reloc, /* special_function */
1566 "R_ARM_TLS_LDM32", /* name */
1567 TRUE, /* partial_inplace */
1568 0xffffffff, /* src_mask */
1569 0xffffffff, /* dst_mask */
1570 FALSE), /* pcrel_offset */
1571
1572 HOWTO (R_ARM_TLS_LDO32, /* type */
1573 0, /* rightshift */
1574 2, /* size (0 = byte, 1 = short, 2 = long) */
1575 32, /* bitsize */
1576 FALSE, /* pc_relative */
1577 0, /* bitpos */
1578 complain_overflow_bitfield,/* complain_on_overflow */
1579 bfd_elf_generic_reloc, /* special_function */
1580 "R_ARM_TLS_LDO32", /* name */
1581 TRUE, /* partial_inplace */
1582 0xffffffff, /* src_mask */
1583 0xffffffff, /* dst_mask */
1584 FALSE), /* pcrel_offset */
1585
1586 HOWTO (R_ARM_TLS_IE32, /* type */
1587 0, /* rightshift */
1588 2, /* size (0 = byte, 1 = short, 2 = long) */
1589 32, /* bitsize */
1590 FALSE, /* pc_relative */
1591 0, /* bitpos */
1592 complain_overflow_bitfield,/* complain_on_overflow */
1593 NULL, /* special_function */
1594 "R_ARM_TLS_IE32", /* name */
1595 TRUE, /* partial_inplace */
1596 0xffffffff, /* src_mask */
1597 0xffffffff, /* dst_mask */
1598 FALSE), /* pcrel_offset */
1599
1600 HOWTO (R_ARM_TLS_LE32, /* type */
1601 0, /* rightshift */
1602 2, /* size (0 = byte, 1 = short, 2 = long) */
1603 32, /* bitsize */
1604 FALSE, /* pc_relative */
1605 0, /* bitpos */
1606 complain_overflow_bitfield,/* complain_on_overflow */
1607 bfd_elf_generic_reloc, /* special_function */
1608 "R_ARM_TLS_LE32", /* name */
1609 TRUE, /* partial_inplace */
1610 0xffffffff, /* src_mask */
1611 0xffffffff, /* dst_mask */
1612 FALSE), /* pcrel_offset */
1613
1614 HOWTO (R_ARM_TLS_LDO12, /* type */
1615 0, /* rightshift */
1616 2, /* size (0 = byte, 1 = short, 2 = long) */
1617 12, /* bitsize */
1618 FALSE, /* pc_relative */
1619 0, /* bitpos */
1620 complain_overflow_bitfield,/* complain_on_overflow */
1621 bfd_elf_generic_reloc, /* special_function */
1622 "R_ARM_TLS_LDO12", /* name */
1623 FALSE, /* partial_inplace */
1624 0x00000fff, /* src_mask */
1625 0x00000fff, /* dst_mask */
1626 FALSE), /* pcrel_offset */
1627
1628 HOWTO (R_ARM_TLS_LE12, /* type */
1629 0, /* rightshift */
1630 2, /* size (0 = byte, 1 = short, 2 = long) */
1631 12, /* bitsize */
1632 FALSE, /* pc_relative */
1633 0, /* bitpos */
1634 complain_overflow_bitfield,/* complain_on_overflow */
1635 bfd_elf_generic_reloc, /* special_function */
1636 "R_ARM_TLS_LE12", /* name */
1637 FALSE, /* partial_inplace */
1638 0x00000fff, /* src_mask */
1639 0x00000fff, /* dst_mask */
1640 FALSE), /* pcrel_offset */
1641
1642 HOWTO (R_ARM_TLS_IE12GP, /* type */
1643 0, /* rightshift */
1644 2, /* size (0 = byte, 1 = short, 2 = long) */
1645 12, /* bitsize */
1646 FALSE, /* pc_relative */
1647 0, /* bitpos */
1648 complain_overflow_bitfield,/* complain_on_overflow */
1649 bfd_elf_generic_reloc, /* special_function */
1650 "R_ARM_TLS_IE12GP", /* name */
1651 FALSE, /* partial_inplace */
1652 0x00000fff, /* src_mask */
1653 0x00000fff, /* dst_mask */
1654 FALSE), /* pcrel_offset */
1655
1656 /* 112-127 private relocations. */
1657 EMPTY_HOWTO (112),
1658 EMPTY_HOWTO (113),
1659 EMPTY_HOWTO (114),
1660 EMPTY_HOWTO (115),
1661 EMPTY_HOWTO (116),
1662 EMPTY_HOWTO (117),
1663 EMPTY_HOWTO (118),
1664 EMPTY_HOWTO (119),
1665 EMPTY_HOWTO (120),
1666 EMPTY_HOWTO (121),
1667 EMPTY_HOWTO (122),
1668 EMPTY_HOWTO (123),
1669 EMPTY_HOWTO (124),
1670 EMPTY_HOWTO (125),
1671 EMPTY_HOWTO (126),
1672 EMPTY_HOWTO (127),
1673
1674 /* R_ARM_ME_TOO, obsolete. */
1675 EMPTY_HOWTO (128),
1676
1677 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1678 0, /* rightshift */
1679 1, /* size (0 = byte, 1 = short, 2 = long) */
1680 0, /* bitsize */
1681 FALSE, /* pc_relative */
1682 0, /* bitpos */
1683 complain_overflow_bitfield,/* complain_on_overflow */
1684 bfd_elf_generic_reloc, /* special_function */
1685 "R_ARM_THM_TLS_DESCSEQ",/* name */
1686 FALSE, /* partial_inplace */
1687 0x00000000, /* src_mask */
1688 0x00000000, /* dst_mask */
1689 FALSE), /* pcrel_offset */
1690 };
1691
1692 /* 160 onwards: */
1693 static reloc_howto_type elf32_arm_howto_table_2[1] =
1694 {
1695 HOWTO (R_ARM_IRELATIVE, /* type */
1696 0, /* rightshift */
1697 2, /* size (0 = byte, 1 = short, 2 = long) */
1698 32, /* bitsize */
1699 FALSE, /* pc_relative */
1700 0, /* bitpos */
1701 complain_overflow_bitfield,/* complain_on_overflow */
1702 bfd_elf_generic_reloc, /* special_function */
1703 "R_ARM_IRELATIVE", /* name */
1704 TRUE, /* partial_inplace */
1705 0xffffffff, /* src_mask */
1706 0xffffffff, /* dst_mask */
1707 FALSE) /* pcrel_offset */
1708 };
1709
1710 /* 249-255 extended, currently unused, relocations: */
1711 static reloc_howto_type elf32_arm_howto_table_3[4] =
1712 {
1713 HOWTO (R_ARM_RREL32, /* type */
1714 0, /* rightshift */
1715 0, /* size (0 = byte, 1 = short, 2 = long) */
1716 0, /* bitsize */
1717 FALSE, /* pc_relative */
1718 0, /* bitpos */
1719 complain_overflow_dont,/* complain_on_overflow */
1720 bfd_elf_generic_reloc, /* special_function */
1721 "R_ARM_RREL32", /* name */
1722 FALSE, /* partial_inplace */
1723 0, /* src_mask */
1724 0, /* dst_mask */
1725 FALSE), /* pcrel_offset */
1726
1727 HOWTO (R_ARM_RABS32, /* type */
1728 0, /* rightshift */
1729 0, /* size (0 = byte, 1 = short, 2 = long) */
1730 0, /* bitsize */
1731 FALSE, /* pc_relative */
1732 0, /* bitpos */
1733 complain_overflow_dont,/* complain_on_overflow */
1734 bfd_elf_generic_reloc, /* special_function */
1735 "R_ARM_RABS32", /* name */
1736 FALSE, /* partial_inplace */
1737 0, /* src_mask */
1738 0, /* dst_mask */
1739 FALSE), /* pcrel_offset */
1740
1741 HOWTO (R_ARM_RPC24, /* type */
1742 0, /* rightshift */
1743 0, /* size (0 = byte, 1 = short, 2 = long) */
1744 0, /* bitsize */
1745 FALSE, /* pc_relative */
1746 0, /* bitpos */
1747 complain_overflow_dont,/* complain_on_overflow */
1748 bfd_elf_generic_reloc, /* special_function */
1749 "R_ARM_RPC24", /* name */
1750 FALSE, /* partial_inplace */
1751 0, /* src_mask */
1752 0, /* dst_mask */
1753 FALSE), /* pcrel_offset */
1754
1755 HOWTO (R_ARM_RBASE, /* type */
1756 0, /* rightshift */
1757 0, /* size (0 = byte, 1 = short, 2 = long) */
1758 0, /* bitsize */
1759 FALSE, /* pc_relative */
1760 0, /* bitpos */
1761 complain_overflow_dont,/* complain_on_overflow */
1762 bfd_elf_generic_reloc, /* special_function */
1763 "R_ARM_RBASE", /* name */
1764 FALSE, /* partial_inplace */
1765 0, /* src_mask */
1766 0, /* dst_mask */
1767 FALSE) /* pcrel_offset */
1768 };
1769
1770 static reloc_howto_type *
1771 elf32_arm_howto_from_type (unsigned int r_type)
1772 {
1773 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1774 return &elf32_arm_howto_table_1[r_type];
1775
1776 if (r_type == R_ARM_IRELATIVE)
1777 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1778
1779 if (r_type >= R_ARM_RREL32
1780 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1781 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1782
1783 return NULL;
1784 }
1785
1786 static void
1787 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1788 Elf_Internal_Rela * elf_reloc)
1789 {
1790 unsigned int r_type;
1791
1792 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1793 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1794 }
1795
1796 struct elf32_arm_reloc_map
1797 {
1798 bfd_reloc_code_real_type bfd_reloc_val;
1799 unsigned char elf_reloc_val;
1800 };
1801
1802 /* All entries in this list must also be present in elf32_arm_howto_table. */
1803 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1804 {
1805 {BFD_RELOC_NONE, R_ARM_NONE},
1806 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1807 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1808 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1809 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1810 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1811 {BFD_RELOC_32, R_ARM_ABS32},
1812 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1813 {BFD_RELOC_8, R_ARM_ABS8},
1814 {BFD_RELOC_16, R_ARM_ABS16},
1815 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1816 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1817 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1818 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1819 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1821 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1822 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1823 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1824 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1825 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1826 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1827 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1828 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1829 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1830 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1831 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1832 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1833 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1834 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1835 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1836 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1837 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1838 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1839 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1840 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1841 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1842 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1843 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1844 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1845 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1846 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1847 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1848 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1849 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1850 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1851 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1852 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1853 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1854 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1855 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1856 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1857 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1858 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1859 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1860 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1861 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1862 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1863 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1864 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1865 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1866 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1867 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1868 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1869 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1870 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1871 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1872 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1873 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1874 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1875 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1876 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1877 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1878 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1879 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1880 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1881 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1882 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1883 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1884 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1885 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1886 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1887 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1888 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1889 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1890 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
1891 };
1892
1893 static reloc_howto_type *
1894 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1895 bfd_reloc_code_real_type code)
1896 {
1897 unsigned int i;
1898
1899 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1900 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1901 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1902
1903 return NULL;
1904 }
1905
1906 static reloc_howto_type *
1907 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1908 const char *r_name)
1909 {
1910 unsigned int i;
1911
1912 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1913 if (elf32_arm_howto_table_1[i].name != NULL
1914 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1915 return &elf32_arm_howto_table_1[i];
1916
1917 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1918 if (elf32_arm_howto_table_2[i].name != NULL
1919 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1920 return &elf32_arm_howto_table_2[i];
1921
1922 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1923 if (elf32_arm_howto_table_3[i].name != NULL
1924 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1925 return &elf32_arm_howto_table_3[i];
1926
1927 return NULL;
1928 }
1929
1930 /* Support for core dump NOTE sections. */
1931
1932 static bfd_boolean
1933 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1934 {
1935 int offset;
1936 size_t size;
1937
1938 switch (note->descsz)
1939 {
1940 default:
1941 return FALSE;
1942
1943 case 148: /* Linux/ARM 32-bit. */
1944 /* pr_cursig */
1945 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1946
1947 /* pr_pid */
1948 elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24);
1949
1950 /* pr_reg */
1951 offset = 72;
1952 size = 72;
1953
1954 break;
1955 }
1956
1957 /* Make a ".reg/999" section. */
1958 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1959 size, note->descpos + offset);
1960 }
1961
1962 static bfd_boolean
1963 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
1964 {
1965 switch (note->descsz)
1966 {
1967 default:
1968 return FALSE;
1969
1970 case 124: /* Linux/ARM elf_prpsinfo. */
1971 elf_tdata (abfd)->core_pid
1972 = bfd_get_32 (abfd, note->descdata + 12);
1973 elf_tdata (abfd)->core_program
1974 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1975 elf_tdata (abfd)->core_command
1976 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1977 }
1978
1979 /* Note that for some reason, a spurious space is tacked
1980 onto the end of the args in some (at least one anyway)
1981 implementations, so strip it off if it exists. */
1982 {
1983 char *command = elf_tdata (abfd)->core_command;
1984 int n = strlen (command);
1985
1986 if (0 < n && command[n - 1] == ' ')
1987 command[n - 1] = '\0';
1988 }
1989
1990 return TRUE;
1991 }
1992
1993 static char *
1994 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
1995 int note_type, ...)
1996 {
1997 switch (note_type)
1998 {
1999 default:
2000 return NULL;
2001
2002 case NT_PRPSINFO:
2003 {
2004 char data[124];
2005 va_list ap;
2006
2007 va_start (ap, note_type);
2008 memset (data, 0, sizeof (data));
2009 strncpy (data + 28, va_arg (ap, const char *), 16);
2010 strncpy (data + 44, va_arg (ap, const char *), 80);
2011 va_end (ap);
2012
2013 return elfcore_write_note (abfd, buf, bufsiz,
2014 "CORE", note_type, data, sizeof (data));
2015 }
2016
2017 case NT_PRSTATUS:
2018 {
2019 char data[148];
2020 va_list ap;
2021 long pid;
2022 int cursig;
2023 const void *greg;
2024
2025 va_start (ap, note_type);
2026 memset (data, 0, sizeof (data));
2027 pid = va_arg (ap, long);
2028 bfd_put_32 (abfd, pid, data + 24);
2029 cursig = va_arg (ap, int);
2030 bfd_put_16 (abfd, cursig, data + 12);
2031 greg = va_arg (ap, const void *);
2032 memcpy (data + 72, greg, 72);
2033 va_end (ap);
2034
2035 return elfcore_write_note (abfd, buf, bufsiz,
2036 "CORE", note_type, data, sizeof (data));
2037 }
2038 }
2039 }
2040
2041 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
2042 #define TARGET_LITTLE_NAME "elf32-littlearm"
2043 #define TARGET_BIG_SYM bfd_elf32_bigarm_vec
2044 #define TARGET_BIG_NAME "elf32-bigarm"
2045
2046 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2047 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2048 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2049
2050 typedef unsigned long int insn32;
2051 typedef unsigned short int insn16;
2052
2053 /* In lieu of proper flags, assume all EABIv4 or later objects are
2054 interworkable. */
2055 #define INTERWORK_FLAG(abfd) \
2056 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2057 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2058 || ((abfd)->flags & BFD_LINKER_CREATED))
2059
2060 /* The linker script knows the section names for placement.
2061 The entry_names are used to do simple name mangling on the stubs.
2062 Given a function name, and its type, the stub can be found. The
2063 name can be changed. The only requirement is the %s be present. */
2064 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2065 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2066
2067 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2068 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2069
2070 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2071 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2072
2073 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2074 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2075
2076 #define STUB_ENTRY_NAME "__%s_veneer"
2077
2078 /* The name of the dynamic interpreter. This is put in the .interp
2079 section. */
2080 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2081
2082 static const unsigned long tls_trampoline [] =
2083 {
2084 0xe08e0000, /* add r0, lr, r0 */
2085 0xe5901004, /* ldr r1, [r0,#4] */
2086 0xe12fff11, /* bx r1 */
2087 };
2088
2089 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2090 {
2091 0xe52d2004, /* push {r2} */
2092 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2093 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2094 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2095 0xe081100f, /* 2: add r1, pc */
2096 0xe12fff12, /* bx r2 */
2097 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2098 + dl_tlsdesc_lazy_resolver(GOT) */
2099 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2100 };
2101
2102 #ifdef FOUR_WORD_PLT
2103
2104 /* The first entry in a procedure linkage table looks like
2105 this. It is set up so that any shared library function that is
2106 called before the relocation has been set up calls the dynamic
2107 linker first. */
2108 static const bfd_vma elf32_arm_plt0_entry [] =
2109 {
2110 0xe52de004, /* str lr, [sp, #-4]! */
2111 0xe59fe010, /* ldr lr, [pc, #16] */
2112 0xe08fe00e, /* add lr, pc, lr */
2113 0xe5bef008, /* ldr pc, [lr, #8]! */
2114 };
2115
2116 /* Subsequent entries in a procedure linkage table look like
2117 this. */
2118 static const bfd_vma elf32_arm_plt_entry [] =
2119 {
2120 0xe28fc600, /* add ip, pc, #NN */
2121 0xe28cca00, /* add ip, ip, #NN */
2122 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2123 0x00000000, /* unused */
2124 };
2125
2126 #else
2127
2128 /* The first entry in a procedure linkage table looks like
2129 this. It is set up so that any shared library function that is
2130 called before the relocation has been set up calls the dynamic
2131 linker first. */
2132 static const bfd_vma elf32_arm_plt0_entry [] =
2133 {
2134 0xe52de004, /* str lr, [sp, #-4]! */
2135 0xe59fe004, /* ldr lr, [pc, #4] */
2136 0xe08fe00e, /* add lr, pc, lr */
2137 0xe5bef008, /* ldr pc, [lr, #8]! */
2138 0x00000000, /* &GOT[0] - . */
2139 };
2140
2141 /* Subsequent entries in a procedure linkage table look like
2142 this. */
2143 static const bfd_vma elf32_arm_plt_entry [] =
2144 {
2145 0xe28fc600, /* add ip, pc, #0xNN00000 */
2146 0xe28cca00, /* add ip, ip, #0xNN000 */
2147 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2148 };
2149
2150 #endif
2151
2152 /* The format of the first entry in the procedure linkage table
2153 for a VxWorks executable. */
2154 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2155 {
2156 0xe52dc008, /* str ip,[sp,#-8]! */
2157 0xe59fc000, /* ldr ip,[pc] */
2158 0xe59cf008, /* ldr pc,[ip,#8] */
2159 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2160 };
2161
2162 /* The format of subsequent entries in a VxWorks executable. */
2163 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2164 {
2165 0xe59fc000, /* ldr ip,[pc] */
2166 0xe59cf000, /* ldr pc,[ip] */
2167 0x00000000, /* .long @got */
2168 0xe59fc000, /* ldr ip,[pc] */
2169 0xea000000, /* b _PLT */
2170 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2171 };
2172
2173 /* The format of entries in a VxWorks shared library. */
2174 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2175 {
2176 0xe59fc000, /* ldr ip,[pc] */
2177 0xe79cf009, /* ldr pc,[ip,r9] */
2178 0x00000000, /* .long @got */
2179 0xe59fc000, /* ldr ip,[pc] */
2180 0xe599f008, /* ldr pc,[r9,#8] */
2181 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2182 };
2183
2184 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2185 #define PLT_THUMB_STUB_SIZE 4
2186 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2187 {
2188 0x4778, /* bx pc */
2189 0x46c0 /* nop */
2190 };
2191
2192 /* The entries in a PLT when using a DLL-based target with multiple
2193 address spaces. */
2194 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2195 {
2196 0xe51ff004, /* ldr pc, [pc, #-4] */
2197 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2198 };
2199
2200 /* The first entry in a procedure linkage table looks like
2201 this. It is set up so that any shared library function that is
2202 called before the relocation has been set up calls the dynamic
2203 linker first. */
2204 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2205 {
2206 /* First bundle: */
2207 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2208 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2209 0xe08cc00f, /* add ip, ip, pc */
2210 0xe52dc008, /* str ip, [sp, #-8]! */
2211 /* Second bundle: */
2212 0xe7dfcf1f, /* bfc ip, #30, #2 */
2213 0xe59cc000, /* ldr ip, [ip] */
2214 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2215 0xe12fff1c, /* bx ip */
2216 /* Third bundle: */
2217 0xe320f000, /* nop */
2218 0xe320f000, /* nop */
2219 0xe320f000, /* nop */
2220 /* .Lplt_tail: */
2221 0xe50dc004, /* str ip, [sp, #-4] */
2222 /* Fourth bundle: */
2223 0xe7dfcf1f, /* bfc ip, #30, #2 */
2224 0xe59cc000, /* ldr ip, [ip] */
2225 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2226 0xe12fff1c, /* bx ip */
2227 };
2228 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2229
2230 /* Subsequent entries in a procedure linkage table look like this. */
2231 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2232 {
2233 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2234 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2235 0xe08cc00f, /* add ip, ip, pc */
2236 0xea000000, /* b .Lplt_tail */
2237 };
2238
2239 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2240 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2241 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2242 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2243 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2244 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2245
2246 enum stub_insn_type
2247 {
2248 THUMB16_TYPE = 1,
2249 THUMB32_TYPE,
2250 ARM_TYPE,
2251 DATA_TYPE
2252 };
2253
2254 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2255 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2256 is inserted in arm_build_one_stub(). */
2257 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2258 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2259 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2260 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2261 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2262 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2263
2264 typedef struct
2265 {
2266 bfd_vma data;
2267 enum stub_insn_type type;
2268 unsigned int r_type;
2269 int reloc_addend;
2270 } insn_sequence;
2271
2272 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2273 to reach the stub if necessary. */
2274 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2275 {
2276 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2277 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2278 };
2279
2280 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2281 available. */
2282 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2283 {
2284 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2285 ARM_INSN (0xe12fff1c), /* bx ip */
2286 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2287 };
2288
2289 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2290 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2291 {
2292 THUMB16_INSN (0xb401), /* push {r0} */
2293 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2294 THUMB16_INSN (0x4684), /* mov ip, r0 */
2295 THUMB16_INSN (0xbc01), /* pop {r0} */
2296 THUMB16_INSN (0x4760), /* bx ip */
2297 THUMB16_INSN (0xbf00), /* nop */
2298 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2299 };
2300
2301 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2302 allowed. */
2303 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2304 {
2305 THUMB16_INSN (0x4778), /* bx pc */
2306 THUMB16_INSN (0x46c0), /* nop */
2307 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2308 ARM_INSN (0xe12fff1c), /* bx ip */
2309 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2310 };
2311
2312 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2313 available. */
2314 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2315 {
2316 THUMB16_INSN (0x4778), /* bx pc */
2317 THUMB16_INSN (0x46c0), /* nop */
2318 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2319 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2320 };
2321
2322 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2323 one, when the destination is close enough. */
2324 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2325 {
2326 THUMB16_INSN (0x4778), /* bx pc */
2327 THUMB16_INSN (0x46c0), /* nop */
2328 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2329 };
2330
2331 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2332 blx to reach the stub if necessary. */
2333 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2334 {
2335 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2336 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2337 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2338 };
2339
2340 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2341 blx to reach the stub if necessary. We can not add into pc;
2342 it is not guaranteed to mode switch (different in ARMv6 and
2343 ARMv7). */
2344 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2345 {
2346 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2347 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2348 ARM_INSN (0xe12fff1c), /* bx ip */
2349 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2350 };
2351
2352 /* V4T ARM -> ARM long branch stub, PIC. */
2353 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2354 {
2355 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2356 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2357 ARM_INSN (0xe12fff1c), /* bx ip */
2358 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2359 };
2360
2361 /* V4T Thumb -> ARM long branch stub, PIC. */
2362 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2363 {
2364 THUMB16_INSN (0x4778), /* bx pc */
2365 THUMB16_INSN (0x46c0), /* nop */
2366 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2367 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2368 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2369 };
2370
2371 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2372 architectures. */
2373 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2374 {
2375 THUMB16_INSN (0xb401), /* push {r0} */
2376 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2377 THUMB16_INSN (0x46fc), /* mov ip, pc */
2378 THUMB16_INSN (0x4484), /* add ip, r0 */
2379 THUMB16_INSN (0xbc01), /* pop {r0} */
2380 THUMB16_INSN (0x4760), /* bx ip */
2381 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2382 };
2383
2384 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2385 allowed. */
2386 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2387 {
2388 THUMB16_INSN (0x4778), /* bx pc */
2389 THUMB16_INSN (0x46c0), /* nop */
2390 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2391 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2392 ARM_INSN (0xe12fff1c), /* bx ip */
2393 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2394 };
2395
2396 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2397 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2398 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2399 {
2400 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2401 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2402 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2403 };
2404
2405 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2406 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2407 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2408 {
2409 THUMB16_INSN (0x4778), /* bx pc */
2410 THUMB16_INSN (0x46c0), /* nop */
2411 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2412 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2413 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2414 };
2415
2416 /* Cortex-A8 erratum-workaround stubs. */
2417
2418 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2419 can't use a conditional branch to reach this stub). */
2420
2421 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2422 {
2423 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2424 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2425 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2426 };
2427
2428 /* Stub used for b.w and bl.w instructions. */
2429
2430 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2431 {
2432 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2433 };
2434
2435 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2436 {
2437 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2438 };
2439
2440 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2441 instruction (which switches to ARM mode) to point to this stub. Jump to the
2442 real destination using an ARM-mode branch. */
2443
2444 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2445 {
2446 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2447 };
2448
2449 /* For each section group there can be a specially created linker section
2450 to hold the stubs for that group. The name of the stub section is based
2451 upon the name of another section within that group with the suffix below
2452 applied.
2453
2454 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2455 create what appeared to be a linker stub section when it actually
2456 contained user code/data. For example, consider this fragment:
2457
2458 const char * stubborn_problems[] = { "np" };
2459
2460 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2461 section called:
2462
2463 .data.rel.local.stubborn_problems
2464
2465 This then causes problems in arm32_arm_build_stubs() as it triggers:
2466
2467 // Ignore non-stub sections.
2468 if (!strstr (stub_sec->name, STUB_SUFFIX))
2469 continue;
2470
2471 And so the section would be ignored instead of being processed. Hence
2472 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2473 C identifier. */
2474 #define STUB_SUFFIX ".__stub"
2475
2476 /* One entry per long/short branch stub defined above. */
2477 #define DEF_STUBS \
2478 DEF_STUB(long_branch_any_any) \
2479 DEF_STUB(long_branch_v4t_arm_thumb) \
2480 DEF_STUB(long_branch_thumb_only) \
2481 DEF_STUB(long_branch_v4t_thumb_thumb) \
2482 DEF_STUB(long_branch_v4t_thumb_arm) \
2483 DEF_STUB(short_branch_v4t_thumb_arm) \
2484 DEF_STUB(long_branch_any_arm_pic) \
2485 DEF_STUB(long_branch_any_thumb_pic) \
2486 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2487 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2488 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2489 DEF_STUB(long_branch_thumb_only_pic) \
2490 DEF_STUB(long_branch_any_tls_pic) \
2491 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2492 DEF_STUB(a8_veneer_b_cond) \
2493 DEF_STUB(a8_veneer_b) \
2494 DEF_STUB(a8_veneer_bl) \
2495 DEF_STUB(a8_veneer_blx)
2496
2497 #define DEF_STUB(x) arm_stub_##x,
2498 enum elf32_arm_stub_type
2499 {
2500 arm_stub_none,
2501 DEF_STUBS
2502 /* Note the first a8_veneer type */
2503 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
2504 };
2505 #undef DEF_STUB
2506
2507 typedef struct
2508 {
2509 const insn_sequence* template_sequence;
2510 int template_size;
2511 } stub_def;
2512
2513 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2514 static const stub_def stub_definitions[] =
2515 {
2516 {NULL, 0},
2517 DEF_STUBS
2518 };
2519
2520 struct elf32_arm_stub_hash_entry
2521 {
2522 /* Base hash table entry structure. */
2523 struct bfd_hash_entry root;
2524
2525 /* The stub section. */
2526 asection *stub_sec;
2527
2528 /* Offset within stub_sec of the beginning of this stub. */
2529 bfd_vma stub_offset;
2530
2531 /* Given the symbol's value and its section we can determine its final
2532 value when building the stubs (so the stub knows where to jump). */
2533 bfd_vma target_value;
2534 asection *target_section;
2535
2536 /* Offset to apply to relocation referencing target_value. */
2537 bfd_vma target_addend;
2538
2539 /* The instruction which caused this stub to be generated (only valid for
2540 Cortex-A8 erratum workaround stubs at present). */
2541 unsigned long orig_insn;
2542
2543 /* The stub type. */
2544 enum elf32_arm_stub_type stub_type;
2545 /* Its encoding size in bytes. */
2546 int stub_size;
2547 /* Its template. */
2548 const insn_sequence *stub_template;
2549 /* The size of the template (number of entries). */
2550 int stub_template_size;
2551
2552 /* The symbol table entry, if any, that this was derived from. */
2553 struct elf32_arm_link_hash_entry *h;
2554
2555 /* Type of branch. */
2556 enum arm_st_branch_type branch_type;
2557
2558 /* Where this stub is being called from, or, in the case of combined
2559 stub sections, the first input section in the group. */
2560 asection *id_sec;
2561
2562 /* The name for the local symbol at the start of this stub. The
2563 stub name in the hash table has to be unique; this does not, so
2564 it can be friendlier. */
2565 char *output_name;
2566 };
2567
2568 /* Used to build a map of a section. This is required for mixed-endian
2569 code/data. */
2570
2571 typedef struct elf32_elf_section_map
2572 {
2573 bfd_vma vma;
2574 char type;
2575 }
2576 elf32_arm_section_map;
2577
2578 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2579
2580 typedef enum
2581 {
2582 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2583 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2584 VFP11_ERRATUM_ARM_VENEER,
2585 VFP11_ERRATUM_THUMB_VENEER
2586 }
2587 elf32_vfp11_erratum_type;
2588
2589 typedef struct elf32_vfp11_erratum_list
2590 {
2591 struct elf32_vfp11_erratum_list *next;
2592 bfd_vma vma;
2593 union
2594 {
2595 struct
2596 {
2597 struct elf32_vfp11_erratum_list *veneer;
2598 unsigned int vfp_insn;
2599 } b;
2600 struct
2601 {
2602 struct elf32_vfp11_erratum_list *branch;
2603 unsigned int id;
2604 } v;
2605 } u;
2606 elf32_vfp11_erratum_type type;
2607 }
2608 elf32_vfp11_erratum_list;
2609
2610 typedef enum
2611 {
2612 DELETE_EXIDX_ENTRY,
2613 INSERT_EXIDX_CANTUNWIND_AT_END
2614 }
2615 arm_unwind_edit_type;
2616
2617 /* A (sorted) list of edits to apply to an unwind table. */
2618 typedef struct arm_unwind_table_edit
2619 {
2620 arm_unwind_edit_type type;
2621 /* Note: we sometimes want to insert an unwind entry corresponding to a
2622 section different from the one we're currently writing out, so record the
2623 (text) section this edit relates to here. */
2624 asection *linked_section;
2625 unsigned int index;
2626 struct arm_unwind_table_edit *next;
2627 }
2628 arm_unwind_table_edit;
2629
2630 typedef struct _arm_elf_section_data
2631 {
2632 /* Information about mapping symbols. */
2633 struct bfd_elf_section_data elf;
2634 unsigned int mapcount;
2635 unsigned int mapsize;
2636 elf32_arm_section_map *map;
2637 /* Information about CPU errata. */
2638 unsigned int erratumcount;
2639 elf32_vfp11_erratum_list *erratumlist;
2640 /* Information about unwind tables. */
2641 union
2642 {
2643 /* Unwind info attached to a text section. */
2644 struct
2645 {
2646 asection *arm_exidx_sec;
2647 } text;
2648
2649 /* Unwind info attached to an .ARM.exidx section. */
2650 struct
2651 {
2652 arm_unwind_table_edit *unwind_edit_list;
2653 arm_unwind_table_edit *unwind_edit_tail;
2654 } exidx;
2655 } u;
2656 }
2657 _arm_elf_section_data;
2658
2659 #define elf32_arm_section_data(sec) \
2660 ((_arm_elf_section_data *) elf_section_data (sec))
2661
2662 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2663 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2664 so may be created multiple times: we use an array of these entries whilst
2665 relaxing which we can refresh easily, then create stubs for each potentially
2666 erratum-triggering instruction once we've settled on a solution. */
2667
2668 struct a8_erratum_fix
2669 {
2670 bfd *input_bfd;
2671 asection *section;
2672 bfd_vma offset;
2673 bfd_vma addend;
2674 unsigned long orig_insn;
2675 char *stub_name;
2676 enum elf32_arm_stub_type stub_type;
2677 enum arm_st_branch_type branch_type;
2678 };
2679
2680 /* A table of relocs applied to branches which might trigger Cortex-A8
2681 erratum. */
2682
2683 struct a8_erratum_reloc
2684 {
2685 bfd_vma from;
2686 bfd_vma destination;
2687 struct elf32_arm_link_hash_entry *hash;
2688 const char *sym_name;
2689 unsigned int r_type;
2690 enum arm_st_branch_type branch_type;
2691 bfd_boolean non_a8_stub;
2692 };
2693
2694 /* The size of the thread control block. */
2695 #define TCB_SIZE 8
2696
2697 /* ARM-specific information about a PLT entry, over and above the usual
2698 gotplt_union. */
2699 struct arm_plt_info
2700 {
2701 /* We reference count Thumb references to a PLT entry separately,
2702 so that we can emit the Thumb trampoline only if needed. */
2703 bfd_signed_vma thumb_refcount;
2704
2705 /* Some references from Thumb code may be eliminated by BL->BLX
2706 conversion, so record them separately. */
2707 bfd_signed_vma maybe_thumb_refcount;
2708
2709 /* How many of the recorded PLT accesses were from non-call relocations.
2710 This information is useful when deciding whether anything takes the
2711 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2712 non-call references to the function should resolve directly to the
2713 real runtime target. */
2714 unsigned int noncall_refcount;
2715
2716 /* Since PLT entries have variable size if the Thumb prologue is
2717 used, we need to record the index into .got.plt instead of
2718 recomputing it from the PLT offset. */
2719 bfd_signed_vma got_offset;
2720 };
2721
2722 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2723 struct arm_local_iplt_info
2724 {
2725 /* The information that is usually found in the generic ELF part of
2726 the hash table entry. */
2727 union gotplt_union root;
2728
2729 /* The information that is usually found in the ARM-specific part of
2730 the hash table entry. */
2731 struct arm_plt_info arm;
2732
2733 /* A list of all potential dynamic relocations against this symbol. */
2734 struct elf_dyn_relocs *dyn_relocs;
2735 };
2736
2737 struct elf_arm_obj_tdata
2738 {
2739 struct elf_obj_tdata root;
2740
2741 /* tls_type for each local got entry. */
2742 char *local_got_tls_type;
2743
2744 /* GOTPLT entries for TLS descriptors. */
2745 bfd_vma *local_tlsdesc_gotent;
2746
2747 /* Information for local symbols that need entries in .iplt. */
2748 struct arm_local_iplt_info **local_iplt;
2749
2750 /* Zero to warn when linking objects with incompatible enum sizes. */
2751 int no_enum_size_warning;
2752
2753 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2754 int no_wchar_size_warning;
2755 };
2756
2757 #define elf_arm_tdata(bfd) \
2758 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2759
2760 #define elf32_arm_local_got_tls_type(bfd) \
2761 (elf_arm_tdata (bfd)->local_got_tls_type)
2762
2763 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2764 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2765
2766 #define elf32_arm_local_iplt(bfd) \
2767 (elf_arm_tdata (bfd)->local_iplt)
2768
2769 #define is_arm_elf(bfd) \
2770 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2771 && elf_tdata (bfd) != NULL \
2772 && elf_object_id (bfd) == ARM_ELF_DATA)
2773
2774 static bfd_boolean
2775 elf32_arm_mkobject (bfd *abfd)
2776 {
2777 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2778 ARM_ELF_DATA);
2779 }
2780
2781 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2782
2783 /* Arm ELF linker hash entry. */
2784 struct elf32_arm_link_hash_entry
2785 {
2786 struct elf_link_hash_entry root;
2787
2788 /* Track dynamic relocs copied for this symbol. */
2789 struct elf_dyn_relocs *dyn_relocs;
2790
2791 /* ARM-specific PLT information. */
2792 struct arm_plt_info plt;
2793
2794 #define GOT_UNKNOWN 0
2795 #define GOT_NORMAL 1
2796 #define GOT_TLS_GD 2
2797 #define GOT_TLS_IE 4
2798 #define GOT_TLS_GDESC 8
2799 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
2800 unsigned int tls_type : 8;
2801
2802 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2803 unsigned int is_iplt : 1;
2804
2805 unsigned int unused : 23;
2806
2807 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2808 starting at the end of the jump table. */
2809 bfd_vma tlsdesc_got;
2810
2811 /* The symbol marking the real symbol location for exported thumb
2812 symbols with Arm stubs. */
2813 struct elf_link_hash_entry *export_glue;
2814
2815 /* A pointer to the most recently used stub hash entry against this
2816 symbol. */
2817 struct elf32_arm_stub_hash_entry *stub_cache;
2818 };
2819
2820 /* Traverse an arm ELF linker hash table. */
2821 #define elf32_arm_link_hash_traverse(table, func, info) \
2822 (elf_link_hash_traverse \
2823 (&(table)->root, \
2824 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2825 (info)))
2826
2827 /* Get the ARM elf linker hash table from a link_info structure. */
2828 #define elf32_arm_hash_table(info) \
2829 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2830 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
2831
2832 #define arm_stub_hash_lookup(table, string, create, copy) \
2833 ((struct elf32_arm_stub_hash_entry *) \
2834 bfd_hash_lookup ((table), (string), (create), (copy)))
2835
2836 /* Array to keep track of which stub sections have been created, and
2837 information on stub grouping. */
2838 struct map_stub
2839 {
2840 /* This is the section to which stubs in the group will be
2841 attached. */
2842 asection *link_sec;
2843 /* The stub section. */
2844 asection *stub_sec;
2845 };
2846
2847 #define elf32_arm_compute_jump_table_size(htab) \
2848 ((htab)->next_tls_desc_index * 4)
2849
2850 /* ARM ELF linker hash table. */
2851 struct elf32_arm_link_hash_table
2852 {
2853 /* The main hash table. */
2854 struct elf_link_hash_table root;
2855
2856 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2857 bfd_size_type thumb_glue_size;
2858
2859 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2860 bfd_size_type arm_glue_size;
2861
2862 /* The size in bytes of section containing the ARMv4 BX veneers. */
2863 bfd_size_type bx_glue_size;
2864
2865 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2866 veneer has been populated. */
2867 bfd_vma bx_glue_offset[15];
2868
2869 /* The size in bytes of the section containing glue for VFP11 erratum
2870 veneers. */
2871 bfd_size_type vfp11_erratum_glue_size;
2872
2873 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2874 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2875 elf32_arm_write_section(). */
2876 struct a8_erratum_fix *a8_erratum_fixes;
2877 unsigned int num_a8_erratum_fixes;
2878
2879 /* An arbitrary input BFD chosen to hold the glue sections. */
2880 bfd * bfd_of_glue_owner;
2881
2882 /* Nonzero to output a BE8 image. */
2883 int byteswap_code;
2884
2885 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2886 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2887 int target1_is_rel;
2888
2889 /* The relocation to use for R_ARM_TARGET2 relocations. */
2890 int target2_reloc;
2891
2892 /* 0 = Ignore R_ARM_V4BX.
2893 1 = Convert BX to MOV PC.
2894 2 = Generate v4 interworing stubs. */
2895 int fix_v4bx;
2896
2897 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2898 int fix_cortex_a8;
2899
2900 /* Whether we should fix the ARM1176 BLX immediate issue. */
2901 int fix_arm1176;
2902
2903 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2904 int use_blx;
2905
2906 /* What sort of code sequences we should look for which may trigger the
2907 VFP11 denorm erratum. */
2908 bfd_arm_vfp11_fix vfp11_fix;
2909
2910 /* Global counter for the number of fixes we have emitted. */
2911 int num_vfp11_fixes;
2912
2913 /* Nonzero to force PIC branch veneers. */
2914 int pic_veneer;
2915
2916 /* The number of bytes in the initial entry in the PLT. */
2917 bfd_size_type plt_header_size;
2918
2919 /* The number of bytes in the subsequent PLT etries. */
2920 bfd_size_type plt_entry_size;
2921
2922 /* True if the target system is VxWorks. */
2923 int vxworks_p;
2924
2925 /* True if the target system is Symbian OS. */
2926 int symbian_p;
2927
2928 /* True if the target system is Native Client. */
2929 int nacl_p;
2930
2931 /* True if the target uses REL relocations. */
2932 int use_rel;
2933
2934 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2935 bfd_vma next_tls_desc_index;
2936
2937 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2938 bfd_vma num_tls_desc;
2939
2940 /* Short-cuts to get to dynamic linker sections. */
2941 asection *sdynbss;
2942 asection *srelbss;
2943
2944 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2945 asection *srelplt2;
2946
2947 /* The offset into splt of the PLT entry for the TLS descriptor
2948 resolver. Special values are 0, if not necessary (or not found
2949 to be necessary yet), and -1 if needed but not determined
2950 yet. */
2951 bfd_vma dt_tlsdesc_plt;
2952
2953 /* The offset into sgot of the GOT entry used by the PLT entry
2954 above. */
2955 bfd_vma dt_tlsdesc_got;
2956
2957 /* Offset in .plt section of tls_arm_trampoline. */
2958 bfd_vma tls_trampoline;
2959
2960 /* Data for R_ARM_TLS_LDM32 relocations. */
2961 union
2962 {
2963 bfd_signed_vma refcount;
2964 bfd_vma offset;
2965 } tls_ldm_got;
2966
2967 /* Small local sym cache. */
2968 struct sym_cache sym_cache;
2969
2970 /* For convenience in allocate_dynrelocs. */
2971 bfd * obfd;
2972
2973 /* The amount of space used by the reserved portion of the sgotplt
2974 section, plus whatever space is used by the jump slots. */
2975 bfd_vma sgotplt_jump_table_size;
2976
2977 /* The stub hash table. */
2978 struct bfd_hash_table stub_hash_table;
2979
2980 /* Linker stub bfd. */
2981 bfd *stub_bfd;
2982
2983 /* Linker call-backs. */
2984 asection * (*add_stub_section) (const char *, asection *);
2985 void (*layout_sections_again) (void);
2986
2987 /* Array to keep track of which stub sections have been created, and
2988 information on stub grouping. */
2989 struct map_stub *stub_group;
2990
2991 /* Number of elements in stub_group. */
2992 int top_id;
2993
2994 /* Assorted information used by elf32_arm_size_stubs. */
2995 unsigned int bfd_count;
2996 int top_index;
2997 asection **input_list;
2998 };
2999
3000 /* Create an entry in an ARM ELF linker hash table. */
3001
3002 static struct bfd_hash_entry *
3003 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3004 struct bfd_hash_table * table,
3005 const char * string)
3006 {
3007 struct elf32_arm_link_hash_entry * ret =
3008 (struct elf32_arm_link_hash_entry *) entry;
3009
3010 /* Allocate the structure if it has not already been allocated by a
3011 subclass. */
3012 if (ret == NULL)
3013 ret = (struct elf32_arm_link_hash_entry *)
3014 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3015 if (ret == NULL)
3016 return (struct bfd_hash_entry *) ret;
3017
3018 /* Call the allocation method of the superclass. */
3019 ret = ((struct elf32_arm_link_hash_entry *)
3020 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3021 table, string));
3022 if (ret != NULL)
3023 {
3024 ret->dyn_relocs = NULL;
3025 ret->tls_type = GOT_UNKNOWN;
3026 ret->tlsdesc_got = (bfd_vma) -1;
3027 ret->plt.thumb_refcount = 0;
3028 ret->plt.maybe_thumb_refcount = 0;
3029 ret->plt.noncall_refcount = 0;
3030 ret->plt.got_offset = -1;
3031 ret->is_iplt = FALSE;
3032 ret->export_glue = NULL;
3033
3034 ret->stub_cache = NULL;
3035 }
3036
3037 return (struct bfd_hash_entry *) ret;
3038 }
3039
3040 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3041 symbols. */
3042
3043 static bfd_boolean
3044 elf32_arm_allocate_local_sym_info (bfd *abfd)
3045 {
3046 if (elf_local_got_refcounts (abfd) == NULL)
3047 {
3048 bfd_size_type num_syms;
3049 bfd_size_type size;
3050 char *data;
3051
3052 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3053 size = num_syms * (sizeof (bfd_signed_vma)
3054 + sizeof (struct arm_local_iplt_info *)
3055 + sizeof (bfd_vma)
3056 + sizeof (char));
3057 data = bfd_zalloc (abfd, size);
3058 if (data == NULL)
3059 return FALSE;
3060
3061 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3062 data += num_syms * sizeof (bfd_signed_vma);
3063
3064 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3065 data += num_syms * sizeof (struct arm_local_iplt_info *);
3066
3067 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3068 data += num_syms * sizeof (bfd_vma);
3069
3070 elf32_arm_local_got_tls_type (abfd) = data;
3071 }
3072 return TRUE;
3073 }
3074
3075 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3076 to input bfd ABFD. Create the information if it doesn't already exist.
3077 Return null if an allocation fails. */
3078
3079 static struct arm_local_iplt_info *
3080 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3081 {
3082 struct arm_local_iplt_info **ptr;
3083
3084 if (!elf32_arm_allocate_local_sym_info (abfd))
3085 return NULL;
3086
3087 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3088 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3089 if (*ptr == NULL)
3090 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3091 return *ptr;
3092 }
3093
3094 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3095 in ABFD's symbol table. If the symbol is global, H points to its
3096 hash table entry, otherwise H is null.
3097
3098 Return true if the symbol does have PLT information. When returning
3099 true, point *ROOT_PLT at the target-independent reference count/offset
3100 union and *ARM_PLT at the ARM-specific information. */
3101
3102 static bfd_boolean
3103 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3104 unsigned long r_symndx, union gotplt_union **root_plt,
3105 struct arm_plt_info **arm_plt)
3106 {
3107 struct arm_local_iplt_info *local_iplt;
3108
3109 if (h != NULL)
3110 {
3111 *root_plt = &h->root.plt;
3112 *arm_plt = &h->plt;
3113 return TRUE;
3114 }
3115
3116 if (elf32_arm_local_iplt (abfd) == NULL)
3117 return FALSE;
3118
3119 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3120 if (local_iplt == NULL)
3121 return FALSE;
3122
3123 *root_plt = &local_iplt->root;
3124 *arm_plt = &local_iplt->arm;
3125 return TRUE;
3126 }
3127
3128 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3129 before it. */
3130
3131 static bfd_boolean
3132 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3133 struct arm_plt_info *arm_plt)
3134 {
3135 struct elf32_arm_link_hash_table *htab;
3136
3137 htab = elf32_arm_hash_table (info);
3138 return (arm_plt->thumb_refcount != 0
3139 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3140 }
3141
3142 /* Return a pointer to the head of the dynamic reloc list that should
3143 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3144 ABFD's symbol table. Return null if an error occurs. */
3145
3146 static struct elf_dyn_relocs **
3147 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3148 Elf_Internal_Sym *isym)
3149 {
3150 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3151 {
3152 struct arm_local_iplt_info *local_iplt;
3153
3154 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3155 if (local_iplt == NULL)
3156 return NULL;
3157 return &local_iplt->dyn_relocs;
3158 }
3159 else
3160 {
3161 /* Track dynamic relocs needed for local syms too.
3162 We really need local syms available to do this
3163 easily. Oh well. */
3164 asection *s;
3165 void *vpp;
3166
3167 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3168 if (s == NULL)
3169 abort ();
3170
3171 vpp = &elf_section_data (s)->local_dynrel;
3172 return (struct elf_dyn_relocs **) vpp;
3173 }
3174 }
3175
3176 /* Initialize an entry in the stub hash table. */
3177
3178 static struct bfd_hash_entry *
3179 stub_hash_newfunc (struct bfd_hash_entry *entry,
3180 struct bfd_hash_table *table,
3181 const char *string)
3182 {
3183 /* Allocate the structure if it has not already been allocated by a
3184 subclass. */
3185 if (entry == NULL)
3186 {
3187 entry = (struct bfd_hash_entry *)
3188 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3189 if (entry == NULL)
3190 return entry;
3191 }
3192
3193 /* Call the allocation method of the superclass. */
3194 entry = bfd_hash_newfunc (entry, table, string);
3195 if (entry != NULL)
3196 {
3197 struct elf32_arm_stub_hash_entry *eh;
3198
3199 /* Initialize the local fields. */
3200 eh = (struct elf32_arm_stub_hash_entry *) entry;
3201 eh->stub_sec = NULL;
3202 eh->stub_offset = 0;
3203 eh->target_value = 0;
3204 eh->target_section = NULL;
3205 eh->target_addend = 0;
3206 eh->orig_insn = 0;
3207 eh->stub_type = arm_stub_none;
3208 eh->stub_size = 0;
3209 eh->stub_template = NULL;
3210 eh->stub_template_size = 0;
3211 eh->h = NULL;
3212 eh->id_sec = NULL;
3213 eh->output_name = NULL;
3214 }
3215
3216 return entry;
3217 }
3218
3219 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3220 shortcuts to them in our hash table. */
3221
3222 static bfd_boolean
3223 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3224 {
3225 struct elf32_arm_link_hash_table *htab;
3226
3227 htab = elf32_arm_hash_table (info);
3228 if (htab == NULL)
3229 return FALSE;
3230
3231 /* BPABI objects never have a GOT, or associated sections. */
3232 if (htab->symbian_p)
3233 return TRUE;
3234
3235 if (! _bfd_elf_create_got_section (dynobj, info))
3236 return FALSE;
3237
3238 return TRUE;
3239 }
3240
3241 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3242
3243 static bfd_boolean
3244 create_ifunc_sections (struct bfd_link_info *info)
3245 {
3246 struct elf32_arm_link_hash_table *htab;
3247 const struct elf_backend_data *bed;
3248 bfd *dynobj;
3249 asection *s;
3250 flagword flags;
3251
3252 htab = elf32_arm_hash_table (info);
3253 dynobj = htab->root.dynobj;
3254 bed = get_elf_backend_data (dynobj);
3255 flags = bed->dynamic_sec_flags;
3256
3257 if (htab->root.iplt == NULL)
3258 {
3259 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3260 flags | SEC_READONLY | SEC_CODE);
3261 if (s == NULL
3262 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3263 return FALSE;
3264 htab->root.iplt = s;
3265 }
3266
3267 if (htab->root.irelplt == NULL)
3268 {
3269 s = bfd_make_section_anyway_with_flags (dynobj,
3270 RELOC_SECTION (htab, ".iplt"),
3271 flags | SEC_READONLY);
3272 if (s == NULL
3273 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3274 return FALSE;
3275 htab->root.irelplt = s;
3276 }
3277
3278 if (htab->root.igotplt == NULL)
3279 {
3280 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3281 if (s == NULL
3282 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3283 return FALSE;
3284 htab->root.igotplt = s;
3285 }
3286 return TRUE;
3287 }
3288
3289 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3290 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3291 hash table. */
3292
3293 static bfd_boolean
3294 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3295 {
3296 struct elf32_arm_link_hash_table *htab;
3297
3298 htab = elf32_arm_hash_table (info);
3299 if (htab == NULL)
3300 return FALSE;
3301
3302 if (!htab->root.sgot && !create_got_section (dynobj, info))
3303 return FALSE;
3304
3305 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3306 return FALSE;
3307
3308 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
3309 if (!info->shared)
3310 htab->srelbss = bfd_get_linker_section (dynobj,
3311 RELOC_SECTION (htab, ".bss"));
3312
3313 if (htab->vxworks_p)
3314 {
3315 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3316 return FALSE;
3317
3318 if (info->shared)
3319 {
3320 htab->plt_header_size = 0;
3321 htab->plt_entry_size
3322 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3323 }
3324 else
3325 {
3326 htab->plt_header_size
3327 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3328 htab->plt_entry_size
3329 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3330 }
3331 }
3332
3333 if (!htab->root.splt
3334 || !htab->root.srelplt
3335 || !htab->sdynbss
3336 || (!info->shared && !htab->srelbss))
3337 abort ();
3338
3339 return TRUE;
3340 }
3341
3342 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3343
3344 static void
3345 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3346 struct elf_link_hash_entry *dir,
3347 struct elf_link_hash_entry *ind)
3348 {
3349 struct elf32_arm_link_hash_entry *edir, *eind;
3350
3351 edir = (struct elf32_arm_link_hash_entry *) dir;
3352 eind = (struct elf32_arm_link_hash_entry *) ind;
3353
3354 if (eind->dyn_relocs != NULL)
3355 {
3356 if (edir->dyn_relocs != NULL)
3357 {
3358 struct elf_dyn_relocs **pp;
3359 struct elf_dyn_relocs *p;
3360
3361 /* Add reloc counts against the indirect sym to the direct sym
3362 list. Merge any entries against the same section. */
3363 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3364 {
3365 struct elf_dyn_relocs *q;
3366
3367 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3368 if (q->sec == p->sec)
3369 {
3370 q->pc_count += p->pc_count;
3371 q->count += p->count;
3372 *pp = p->next;
3373 break;
3374 }
3375 if (q == NULL)
3376 pp = &p->next;
3377 }
3378 *pp = edir->dyn_relocs;
3379 }
3380
3381 edir->dyn_relocs = eind->dyn_relocs;
3382 eind->dyn_relocs = NULL;
3383 }
3384
3385 if (ind->root.type == bfd_link_hash_indirect)
3386 {
3387 /* Copy over PLT info. */
3388 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3389 eind->plt.thumb_refcount = 0;
3390 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3391 eind->plt.maybe_thumb_refcount = 0;
3392 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3393 eind->plt.noncall_refcount = 0;
3394
3395 /* We should only allocate a function to .iplt once the final
3396 symbol information is known. */
3397 BFD_ASSERT (!eind->is_iplt);
3398
3399 if (dir->got.refcount <= 0)
3400 {
3401 edir->tls_type = eind->tls_type;
3402 eind->tls_type = GOT_UNKNOWN;
3403 }
3404 }
3405
3406 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3407 }
3408
3409 /* Create an ARM elf linker hash table. */
3410
3411 static struct bfd_link_hash_table *
3412 elf32_arm_link_hash_table_create (bfd *abfd)
3413 {
3414 struct elf32_arm_link_hash_table *ret;
3415 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3416
3417 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
3418 if (ret == NULL)
3419 return NULL;
3420
3421 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3422 elf32_arm_link_hash_newfunc,
3423 sizeof (struct elf32_arm_link_hash_entry),
3424 ARM_ELF_DATA))
3425 {
3426 free (ret);
3427 return NULL;
3428 }
3429
3430 ret->sdynbss = NULL;
3431 ret->srelbss = NULL;
3432 ret->srelplt2 = NULL;
3433 ret->dt_tlsdesc_plt = 0;
3434 ret->dt_tlsdesc_got = 0;
3435 ret->tls_trampoline = 0;
3436 ret->next_tls_desc_index = 0;
3437 ret->num_tls_desc = 0;
3438 ret->thumb_glue_size = 0;
3439 ret->arm_glue_size = 0;
3440 ret->bx_glue_size = 0;
3441 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
3442 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3443 ret->vfp11_erratum_glue_size = 0;
3444 ret->num_vfp11_fixes = 0;
3445 ret->fix_cortex_a8 = 0;
3446 ret->fix_arm1176 = 0;
3447 ret->bfd_of_glue_owner = NULL;
3448 ret->byteswap_code = 0;
3449 ret->target1_is_rel = 0;
3450 ret->target2_reloc = R_ARM_NONE;
3451 #ifdef FOUR_WORD_PLT
3452 ret->plt_header_size = 16;
3453 ret->plt_entry_size = 16;
3454 #else
3455 ret->plt_header_size = 20;
3456 ret->plt_entry_size = 12;
3457 #endif
3458 ret->fix_v4bx = 0;
3459 ret->use_blx = 0;
3460 ret->vxworks_p = 0;
3461 ret->symbian_p = 0;
3462 ret->nacl_p = 0;
3463 ret->use_rel = 1;
3464 ret->sym_cache.abfd = NULL;
3465 ret->obfd = abfd;
3466 ret->tls_ldm_got.refcount = 0;
3467 ret->stub_bfd = NULL;
3468 ret->add_stub_section = NULL;
3469 ret->layout_sections_again = NULL;
3470 ret->stub_group = NULL;
3471 ret->top_id = 0;
3472 ret->bfd_count = 0;
3473 ret->top_index = 0;
3474 ret->input_list = NULL;
3475
3476 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3477 sizeof (struct elf32_arm_stub_hash_entry)))
3478 {
3479 free (ret);
3480 return NULL;
3481 }
3482
3483 return &ret->root.root;
3484 }
3485
3486 /* Free the derived linker hash table. */
3487
3488 static void
3489 elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3490 {
3491 struct elf32_arm_link_hash_table *ret
3492 = (struct elf32_arm_link_hash_table *) hash;
3493
3494 bfd_hash_table_free (&ret->stub_hash_table);
3495 _bfd_generic_link_hash_table_free (hash);
3496 }
3497
3498 /* Determine if we're dealing with a Thumb only architecture. */
3499
3500 static bfd_boolean
3501 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3502 {
3503 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3504 Tag_CPU_arch);
3505 int profile;
3506
3507 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3508 return TRUE;
3509
3510 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
3511 return FALSE;
3512
3513 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3514 Tag_CPU_arch_profile);
3515
3516 return profile == 'M';
3517 }
3518
3519 /* Determine if we're dealing with a Thumb-2 object. */
3520
3521 static bfd_boolean
3522 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3523 {
3524 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3525 Tag_CPU_arch);
3526 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3527 }
3528
3529 /* Determine what kind of NOPs are available. */
3530
3531 static bfd_boolean
3532 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3533 {
3534 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3535 Tag_CPU_arch);
3536 return arch == TAG_CPU_ARCH_V6T2
3537 || arch == TAG_CPU_ARCH_V6K
3538 || arch == TAG_CPU_ARCH_V7
3539 || arch == TAG_CPU_ARCH_V7E_M;
3540 }
3541
3542 static bfd_boolean
3543 arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3544 {
3545 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3546 Tag_CPU_arch);
3547 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3548 || arch == TAG_CPU_ARCH_V7E_M);
3549 }
3550
3551 static bfd_boolean
3552 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3553 {
3554 switch (stub_type)
3555 {
3556 case arm_stub_long_branch_thumb_only:
3557 case arm_stub_long_branch_v4t_thumb_arm:
3558 case arm_stub_short_branch_v4t_thumb_arm:
3559 case arm_stub_long_branch_v4t_thumb_arm_pic:
3560 case arm_stub_long_branch_v4t_thumb_tls_pic:
3561 case arm_stub_long_branch_thumb_only_pic:
3562 return TRUE;
3563 case arm_stub_none:
3564 BFD_FAIL ();
3565 return FALSE;
3566 break;
3567 default:
3568 return FALSE;
3569 }
3570 }
3571
3572 /* Determine the type of stub needed, if any, for a call. */
3573
3574 static enum elf32_arm_stub_type
3575 arm_type_of_stub (struct bfd_link_info *info,
3576 asection *input_sec,
3577 const Elf_Internal_Rela *rel,
3578 unsigned char st_type,
3579 enum arm_st_branch_type *actual_branch_type,
3580 struct elf32_arm_link_hash_entry *hash,
3581 bfd_vma destination,
3582 asection *sym_sec,
3583 bfd *input_bfd,
3584 const char *name)
3585 {
3586 bfd_vma location;
3587 bfd_signed_vma branch_offset;
3588 unsigned int r_type;
3589 struct elf32_arm_link_hash_table * globals;
3590 int thumb2;
3591 int thumb_only;
3592 enum elf32_arm_stub_type stub_type = arm_stub_none;
3593 int use_plt = 0;
3594 enum arm_st_branch_type branch_type = *actual_branch_type;
3595 union gotplt_union *root_plt;
3596 struct arm_plt_info *arm_plt;
3597
3598 if (branch_type == ST_BRANCH_LONG)
3599 return stub_type;
3600
3601 globals = elf32_arm_hash_table (info);
3602 if (globals == NULL)
3603 return stub_type;
3604
3605 thumb_only = using_thumb_only (globals);
3606
3607 thumb2 = using_thumb2 (globals);
3608
3609 /* Determine where the call point is. */
3610 location = (input_sec->output_offset
3611 + input_sec->output_section->vma
3612 + rel->r_offset);
3613
3614 r_type = ELF32_R_TYPE (rel->r_info);
3615
3616 /* For TLS call relocs, it is the caller's responsibility to provide
3617 the address of the appropriate trampoline. */
3618 if (r_type != R_ARM_TLS_CALL
3619 && r_type != R_ARM_THM_TLS_CALL
3620 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3621 &root_plt, &arm_plt)
3622 && root_plt->offset != (bfd_vma) -1)
3623 {
3624 asection *splt;
3625
3626 if (hash == NULL || hash->is_iplt)
3627 splt = globals->root.iplt;
3628 else
3629 splt = globals->root.splt;
3630 if (splt != NULL)
3631 {
3632 use_plt = 1;
3633
3634 /* Note when dealing with PLT entries: the main PLT stub is in
3635 ARM mode, so if the branch is in Thumb mode, another
3636 Thumb->ARM stub will be inserted later just before the ARM
3637 PLT stub. We don't take this extra distance into account
3638 here, because if a long branch stub is needed, we'll add a
3639 Thumb->Arm one and branch directly to the ARM PLT entry
3640 because it avoids spreading offset corrections in several
3641 places. */
3642
3643 destination = (splt->output_section->vma
3644 + splt->output_offset
3645 + root_plt->offset);
3646 st_type = STT_FUNC;
3647 branch_type = ST_BRANCH_TO_ARM;
3648 }
3649 }
3650 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3651 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3652
3653 branch_offset = (bfd_signed_vma)(destination - location);
3654
3655 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3656 || r_type == R_ARM_THM_TLS_CALL)
3657 {
3658 /* Handle cases where:
3659 - this call goes too far (different Thumb/Thumb2 max
3660 distance)
3661 - it's a Thumb->Arm call and blx is not available, or it's a
3662 Thumb->Arm branch (not bl). A stub is needed in this case,
3663 but only if this call is not through a PLT entry. Indeed,
3664 PLT stubs handle mode switching already.
3665 */
3666 if ((!thumb2
3667 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3668 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3669 || (thumb2
3670 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3671 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3672 || (branch_type == ST_BRANCH_TO_ARM
3673 && (((r_type == R_ARM_THM_CALL
3674 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
3675 || (r_type == R_ARM_THM_JUMP24))
3676 && !use_plt))
3677 {
3678 if (branch_type == ST_BRANCH_TO_THUMB)
3679 {
3680 /* Thumb to thumb. */
3681 if (!thumb_only)
3682 {
3683 stub_type = (info->shared | globals->pic_veneer)
3684 /* PIC stubs. */
3685 ? ((globals->use_blx
3686 && (r_type == R_ARM_THM_CALL))
3687 /* V5T and above. Stub starts with ARM code, so
3688 we must be able to switch mode before
3689 reaching it, which is only possible for 'bl'
3690 (ie R_ARM_THM_CALL relocation). */
3691 ? arm_stub_long_branch_any_thumb_pic
3692 /* On V4T, use Thumb code only. */
3693 : arm_stub_long_branch_v4t_thumb_thumb_pic)
3694
3695 /* non-PIC stubs. */
3696 : ((globals->use_blx
3697 && (r_type == R_ARM_THM_CALL))
3698 /* V5T and above. */
3699 ? arm_stub_long_branch_any_any
3700 /* V4T. */
3701 : arm_stub_long_branch_v4t_thumb_thumb);
3702 }
3703 else
3704 {
3705 stub_type = (info->shared | globals->pic_veneer)
3706 /* PIC stub. */
3707 ? arm_stub_long_branch_thumb_only_pic
3708 /* non-PIC stub. */
3709 : arm_stub_long_branch_thumb_only;
3710 }
3711 }
3712 else
3713 {
3714 /* Thumb to arm. */
3715 if (sym_sec != NULL
3716 && sym_sec->owner != NULL
3717 && !INTERWORK_FLAG (sym_sec->owner))
3718 {
3719 (*_bfd_error_handler)
3720 (_("%B(%s): warning: interworking not enabled.\n"
3721 " first occurrence: %B: Thumb call to ARM"),
3722 sym_sec->owner, input_bfd, name);
3723 }
3724
3725 stub_type =
3726 (info->shared | globals->pic_veneer)
3727 /* PIC stubs. */
3728 ? (r_type == R_ARM_THM_TLS_CALL
3729 /* TLS PIC stubs */
3730 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3731 : arm_stub_long_branch_v4t_thumb_tls_pic)
3732 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3733 /* V5T PIC and above. */
3734 ? arm_stub_long_branch_any_arm_pic
3735 /* V4T PIC stub. */
3736 : arm_stub_long_branch_v4t_thumb_arm_pic))
3737
3738 /* non-PIC stubs. */
3739 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3740 /* V5T and above. */
3741 ? arm_stub_long_branch_any_any
3742 /* V4T. */
3743 : arm_stub_long_branch_v4t_thumb_arm);
3744
3745 /* Handle v4t short branches. */
3746 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
3747 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3748 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
3749 stub_type = arm_stub_short_branch_v4t_thumb_arm;
3750 }
3751 }
3752 }
3753 else if (r_type == R_ARM_CALL
3754 || r_type == R_ARM_JUMP24
3755 || r_type == R_ARM_PLT32
3756 || r_type == R_ARM_TLS_CALL)
3757 {
3758 if (branch_type == ST_BRANCH_TO_THUMB)
3759 {
3760 /* Arm to thumb. */
3761
3762 if (sym_sec != NULL
3763 && sym_sec->owner != NULL
3764 && !INTERWORK_FLAG (sym_sec->owner))
3765 {
3766 (*_bfd_error_handler)
3767 (_("%B(%s): warning: interworking not enabled.\n"
3768 " first occurrence: %B: ARM call to Thumb"),
3769 sym_sec->owner, input_bfd, name);
3770 }
3771
3772 /* We have an extra 2-bytes reach because of
3773 the mode change (bit 24 (H) of BLX encoding). */
3774 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3775 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3776 || (r_type == R_ARM_CALL && !globals->use_blx)
3777 || (r_type == R_ARM_JUMP24)
3778 || (r_type == R_ARM_PLT32))
3779 {
3780 stub_type = (info->shared | globals->pic_veneer)
3781 /* PIC stubs. */
3782 ? ((globals->use_blx)
3783 /* V5T and above. */
3784 ? arm_stub_long_branch_any_thumb_pic
3785 /* V4T stub. */
3786 : arm_stub_long_branch_v4t_arm_thumb_pic)
3787
3788 /* non-PIC stubs. */
3789 : ((globals->use_blx)
3790 /* V5T and above. */
3791 ? arm_stub_long_branch_any_any
3792 /* V4T. */
3793 : arm_stub_long_branch_v4t_arm_thumb);
3794 }
3795 }
3796 else
3797 {
3798 /* Arm to arm. */
3799 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3800 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3801 {
3802 stub_type =
3803 (info->shared | globals->pic_veneer)
3804 /* PIC stubs. */
3805 ? (r_type == R_ARM_TLS_CALL
3806 /* TLS PIC Stub */
3807 ? arm_stub_long_branch_any_tls_pic
3808 : arm_stub_long_branch_any_arm_pic)
3809 /* non-PIC stubs. */
3810 : arm_stub_long_branch_any_any;
3811 }
3812 }
3813 }
3814
3815 /* If a stub is needed, record the actual destination type. */
3816 if (stub_type != arm_stub_none)
3817 *actual_branch_type = branch_type;
3818
3819 return stub_type;
3820 }
3821
3822 /* Build a name for an entry in the stub hash table. */
3823
3824 static char *
3825 elf32_arm_stub_name (const asection *input_section,
3826 const asection *sym_sec,
3827 const struct elf32_arm_link_hash_entry *hash,
3828 const Elf_Internal_Rela *rel,
3829 enum elf32_arm_stub_type stub_type)
3830 {
3831 char *stub_name;
3832 bfd_size_type len;
3833
3834 if (hash)
3835 {
3836 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
3837 stub_name = (char *) bfd_malloc (len);
3838 if (stub_name != NULL)
3839 sprintf (stub_name, "%08x_%s+%x_%d",
3840 input_section->id & 0xffffffff,
3841 hash->root.root.root.string,
3842 (int) rel->r_addend & 0xffffffff,
3843 (int) stub_type);
3844 }
3845 else
3846 {
3847 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
3848 stub_name = (char *) bfd_malloc (len);
3849 if (stub_name != NULL)
3850 sprintf (stub_name, "%08x_%x:%x+%x_%d",
3851 input_section->id & 0xffffffff,
3852 sym_sec->id & 0xffffffff,
3853 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3854 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3855 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3856 (int) rel->r_addend & 0xffffffff,
3857 (int) stub_type);
3858 }
3859
3860 return stub_name;
3861 }
3862
3863 /* Look up an entry in the stub hash. Stub entries are cached because
3864 creating the stub name takes a bit of time. */
3865
3866 static struct elf32_arm_stub_hash_entry *
3867 elf32_arm_get_stub_entry (const asection *input_section,
3868 const asection *sym_sec,
3869 struct elf_link_hash_entry *hash,
3870 const Elf_Internal_Rela *rel,
3871 struct elf32_arm_link_hash_table *htab,
3872 enum elf32_arm_stub_type stub_type)
3873 {
3874 struct elf32_arm_stub_hash_entry *stub_entry;
3875 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3876 const asection *id_sec;
3877
3878 if ((input_section->flags & SEC_CODE) == 0)
3879 return NULL;
3880
3881 /* If this input section is part of a group of sections sharing one
3882 stub section, then use the id of the first section in the group.
3883 Stub names need to include a section id, as there may well be
3884 more than one stub used to reach say, printf, and we need to
3885 distinguish between them. */
3886 id_sec = htab->stub_group[input_section->id].link_sec;
3887
3888 if (h != NULL && h->stub_cache != NULL
3889 && h->stub_cache->h == h
3890 && h->stub_cache->id_sec == id_sec
3891 && h->stub_cache->stub_type == stub_type)
3892 {
3893 stub_entry = h->stub_cache;
3894 }
3895 else
3896 {
3897 char *stub_name;
3898
3899 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
3900 if (stub_name == NULL)
3901 return NULL;
3902
3903 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3904 stub_name, FALSE, FALSE);
3905 if (h != NULL)
3906 h->stub_cache = stub_entry;
3907
3908 free (stub_name);
3909 }
3910
3911 return stub_entry;
3912 }
3913
3914 /* Find or create a stub section. Returns a pointer to the stub section, and
3915 the section to which the stub section will be attached (in *LINK_SEC_P).
3916 LINK_SEC_P may be NULL. */
3917
3918 static asection *
3919 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3920 struct elf32_arm_link_hash_table *htab)
3921 {
3922 asection *link_sec;
3923 asection *stub_sec;
3924
3925 link_sec = htab->stub_group[section->id].link_sec;
3926 BFD_ASSERT (link_sec != NULL);
3927 stub_sec = htab->stub_group[section->id].stub_sec;
3928
3929 if (stub_sec == NULL)
3930 {
3931 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3932 if (stub_sec == NULL)
3933 {
3934 size_t namelen;
3935 bfd_size_type len;
3936 char *s_name;
3937
3938 namelen = strlen (link_sec->name);
3939 len = namelen + sizeof (STUB_SUFFIX);
3940 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
3941 if (s_name == NULL)
3942 return NULL;
3943
3944 memcpy (s_name, link_sec->name, namelen);
3945 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3946 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3947 if (stub_sec == NULL)
3948 return NULL;
3949 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3950 }
3951 htab->stub_group[section->id].stub_sec = stub_sec;
3952 }
3953
3954 if (link_sec_p)
3955 *link_sec_p = link_sec;
3956
3957 return stub_sec;
3958 }
3959
3960 /* Add a new stub entry to the stub hash. Not all fields of the new
3961 stub entry are initialised. */
3962
3963 static struct elf32_arm_stub_hash_entry *
3964 elf32_arm_add_stub (const char *stub_name,
3965 asection *section,
3966 struct elf32_arm_link_hash_table *htab)
3967 {
3968 asection *link_sec;
3969 asection *stub_sec;
3970 struct elf32_arm_stub_hash_entry *stub_entry;
3971
3972 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3973 if (stub_sec == NULL)
3974 return NULL;
3975
3976 /* Enter this entry into the linker stub hash table. */
3977 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3978 TRUE, FALSE);
3979 if (stub_entry == NULL)
3980 {
3981 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3982 section->owner,
3983 stub_name);
3984 return NULL;
3985 }
3986
3987 stub_entry->stub_sec = stub_sec;
3988 stub_entry->stub_offset = 0;
3989 stub_entry->id_sec = link_sec;
3990
3991 return stub_entry;
3992 }
3993
3994 /* Store an Arm insn into an output section not processed by
3995 elf32_arm_write_section. */
3996
3997 static void
3998 put_arm_insn (struct elf32_arm_link_hash_table * htab,
3999 bfd * output_bfd, bfd_vma val, void * ptr)
4000 {
4001 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4002 bfd_putl32 (val, ptr);
4003 else
4004 bfd_putb32 (val, ptr);
4005 }
4006
4007 /* Store a 16-bit Thumb insn into an output section not processed by
4008 elf32_arm_write_section. */
4009
4010 static void
4011 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4012 bfd * output_bfd, bfd_vma val, void * ptr)
4013 {
4014 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4015 bfd_putl16 (val, ptr);
4016 else
4017 bfd_putb16 (val, ptr);
4018 }
4019
4020 /* If it's possible to change R_TYPE to a more efficient access
4021 model, return the new reloc type. */
4022
4023 static unsigned
4024 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4025 struct elf_link_hash_entry *h)
4026 {
4027 int is_local = (h == NULL);
4028
4029 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
4030 return r_type;
4031
4032 /* We do not support relaxations for Old TLS models. */
4033 switch (r_type)
4034 {
4035 case R_ARM_TLS_GOTDESC:
4036 case R_ARM_TLS_CALL:
4037 case R_ARM_THM_TLS_CALL:
4038 case R_ARM_TLS_DESCSEQ:
4039 case R_ARM_THM_TLS_DESCSEQ:
4040 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4041 }
4042
4043 return r_type;
4044 }
4045
4046 static bfd_reloc_status_type elf32_arm_final_link_relocate
4047 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4048 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4049 const char *, unsigned char, enum arm_st_branch_type,
4050 struct elf_link_hash_entry *, bfd_boolean *, char **);
4051
4052 static unsigned int
4053 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4054 {
4055 switch (stub_type)
4056 {
4057 case arm_stub_a8_veneer_b_cond:
4058 case arm_stub_a8_veneer_b:
4059 case arm_stub_a8_veneer_bl:
4060 return 2;
4061
4062 case arm_stub_long_branch_any_any:
4063 case arm_stub_long_branch_v4t_arm_thumb:
4064 case arm_stub_long_branch_thumb_only:
4065 case arm_stub_long_branch_v4t_thumb_thumb:
4066 case arm_stub_long_branch_v4t_thumb_arm:
4067 case arm_stub_short_branch_v4t_thumb_arm:
4068 case arm_stub_long_branch_any_arm_pic:
4069 case arm_stub_long_branch_any_thumb_pic:
4070 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4071 case arm_stub_long_branch_v4t_arm_thumb_pic:
4072 case arm_stub_long_branch_v4t_thumb_arm_pic:
4073 case arm_stub_long_branch_thumb_only_pic:
4074 case arm_stub_long_branch_any_tls_pic:
4075 case arm_stub_long_branch_v4t_thumb_tls_pic:
4076 case arm_stub_a8_veneer_blx:
4077 return 4;
4078
4079 default:
4080 abort (); /* Should be unreachable. */
4081 }
4082 }
4083
4084 static bfd_boolean
4085 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4086 void * in_arg)
4087 {
4088 #define MAXRELOCS 2
4089 struct elf32_arm_stub_hash_entry *stub_entry;
4090 struct elf32_arm_link_hash_table *globals;
4091 struct bfd_link_info *info;
4092 asection *stub_sec;
4093 bfd *stub_bfd;
4094 bfd_byte *loc;
4095 bfd_vma sym_value;
4096 int template_size;
4097 int size;
4098 const insn_sequence *template_sequence;
4099 int i;
4100 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4101 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4102 int nrelocs = 0;
4103
4104 /* Massage our args to the form they really have. */
4105 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4106 info = (struct bfd_link_info *) in_arg;
4107
4108 globals = elf32_arm_hash_table (info);
4109 if (globals == NULL)
4110 return FALSE;
4111
4112 stub_sec = stub_entry->stub_sec;
4113
4114 if ((globals->fix_cortex_a8 < 0)
4115 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4116 /* We have to do less-strictly-aligned fixes last. */
4117 return TRUE;
4118
4119 /* Make a note of the offset within the stubs for this entry. */
4120 stub_entry->stub_offset = stub_sec->size;
4121 loc = stub_sec->contents + stub_entry->stub_offset;
4122
4123 stub_bfd = stub_sec->owner;
4124
4125 /* This is the address of the stub destination. */
4126 sym_value = (stub_entry->target_value
4127 + stub_entry->target_section->output_offset
4128 + stub_entry->target_section->output_section->vma);
4129
4130 template_sequence = stub_entry->stub_template;
4131 template_size = stub_entry->stub_template_size;
4132
4133 size = 0;
4134 for (i = 0; i < template_size; i++)
4135 {
4136 switch (template_sequence[i].type)
4137 {
4138 case THUMB16_TYPE:
4139 {
4140 bfd_vma data = (bfd_vma) template_sequence[i].data;
4141 if (template_sequence[i].reloc_addend != 0)
4142 {
4143 /* We've borrowed the reloc_addend field to mean we should
4144 insert a condition code into this (Thumb-1 branch)
4145 instruction. See THUMB16_BCOND_INSN. */
4146 BFD_ASSERT ((data & 0xff00) == 0xd000);
4147 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4148 }
4149 bfd_put_16 (stub_bfd, data, loc + size);
4150 size += 2;
4151 }
4152 break;
4153
4154 case THUMB32_TYPE:
4155 bfd_put_16 (stub_bfd,
4156 (template_sequence[i].data >> 16) & 0xffff,
4157 loc + size);
4158 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4159 loc + size + 2);
4160 if (template_sequence[i].r_type != R_ARM_NONE)
4161 {
4162 stub_reloc_idx[nrelocs] = i;
4163 stub_reloc_offset[nrelocs++] = size;
4164 }
4165 size += 4;
4166 break;
4167
4168 case ARM_TYPE:
4169 bfd_put_32 (stub_bfd, template_sequence[i].data,
4170 loc + size);
4171 /* Handle cases where the target is encoded within the
4172 instruction. */
4173 if (template_sequence[i].r_type == R_ARM_JUMP24)
4174 {
4175 stub_reloc_idx[nrelocs] = i;
4176 stub_reloc_offset[nrelocs++] = size;
4177 }
4178 size += 4;
4179 break;
4180
4181 case DATA_TYPE:
4182 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4183 stub_reloc_idx[nrelocs] = i;
4184 stub_reloc_offset[nrelocs++] = size;
4185 size += 4;
4186 break;
4187
4188 default:
4189 BFD_FAIL ();
4190 return FALSE;
4191 }
4192 }
4193
4194 stub_sec->size += size;
4195
4196 /* Stub size has already been computed in arm_size_one_stub. Check
4197 consistency. */
4198 BFD_ASSERT (size == stub_entry->stub_size);
4199
4200 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4201 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4202 sym_value |= 1;
4203
4204 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4205 in each stub. */
4206 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
4207
4208 for (i = 0; i < nrelocs; i++)
4209 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4210 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4211 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4212 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
4213 {
4214 Elf_Internal_Rela rel;
4215 bfd_boolean unresolved_reloc;
4216 char *error_message;
4217 enum arm_st_branch_type branch_type
4218 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4219 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
4220 bfd_vma points_to = sym_value + stub_entry->target_addend;
4221
4222 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4223 rel.r_info = ELF32_R_INFO (0,
4224 template_sequence[stub_reloc_idx[i]].r_type);
4225 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
4226
4227 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4228 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4229 template should refer back to the instruction after the original
4230 branch. */
4231 points_to = sym_value;
4232
4233 /* There may be unintended consequences if this is not true. */
4234 BFD_ASSERT (stub_entry->h == NULL);
4235
4236 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4237 properly. We should probably use this function unconditionally,
4238 rather than only for certain relocations listed in the enclosing
4239 conditional, for the sake of consistency. */
4240 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4241 (template_sequence[stub_reloc_idx[i]].r_type),
4242 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4243 points_to, info, stub_entry->target_section, "", STT_FUNC,
4244 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4245 &unresolved_reloc, &error_message);
4246 }
4247 else
4248 {
4249 Elf_Internal_Rela rel;
4250 bfd_boolean unresolved_reloc;
4251 char *error_message;
4252 bfd_vma points_to = sym_value + stub_entry->target_addend
4253 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4254
4255 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4256 rel.r_info = ELF32_R_INFO (0,
4257 template_sequence[stub_reloc_idx[i]].r_type);
4258 rel.r_addend = 0;
4259
4260 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4261 (template_sequence[stub_reloc_idx[i]].r_type),
4262 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4263 points_to, info, stub_entry->target_section, "", STT_FUNC,
4264 stub_entry->branch_type,
4265 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4266 &error_message);
4267 }
4268
4269 return TRUE;
4270 #undef MAXRELOCS
4271 }
4272
4273 /* Calculate the template, template size and instruction size for a stub.
4274 Return value is the instruction size. */
4275
4276 static unsigned int
4277 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4278 const insn_sequence **stub_template,
4279 int *stub_template_size)
4280 {
4281 const insn_sequence *template_sequence = NULL;
4282 int template_size = 0, i;
4283 unsigned int size;
4284
4285 template_sequence = stub_definitions[stub_type].template_sequence;
4286 if (stub_template)
4287 *stub_template = template_sequence;
4288
4289 template_size = stub_definitions[stub_type].template_size;
4290 if (stub_template_size)
4291 *stub_template_size = template_size;
4292
4293 size = 0;
4294 for (i = 0; i < template_size; i++)
4295 {
4296 switch (template_sequence[i].type)
4297 {
4298 case THUMB16_TYPE:
4299 size += 2;
4300 break;
4301
4302 case ARM_TYPE:
4303 case THUMB32_TYPE:
4304 case DATA_TYPE:
4305 size += 4;
4306 break;
4307
4308 default:
4309 BFD_FAIL ();
4310 return 0;
4311 }
4312 }
4313
4314 return size;
4315 }
4316
4317 /* As above, but don't actually build the stub. Just bump offset so
4318 we know stub section sizes. */
4319
4320 static bfd_boolean
4321 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4322 void *in_arg ATTRIBUTE_UNUSED)
4323 {
4324 struct elf32_arm_stub_hash_entry *stub_entry;
4325 const insn_sequence *template_sequence;
4326 int template_size, size;
4327
4328 /* Massage our args to the form they really have. */
4329 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4330
4331 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4332 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4333
4334 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4335 &template_size);
4336
4337 stub_entry->stub_size = size;
4338 stub_entry->stub_template = template_sequence;
4339 stub_entry->stub_template_size = template_size;
4340
4341 size = (size + 7) & ~7;
4342 stub_entry->stub_sec->size += size;
4343
4344 return TRUE;
4345 }
4346
4347 /* External entry points for sizing and building linker stubs. */
4348
4349 /* Set up various things so that we can make a list of input sections
4350 for each output section included in the link. Returns -1 on error,
4351 0 when no stubs will be needed, and 1 on success. */
4352
4353 int
4354 elf32_arm_setup_section_lists (bfd *output_bfd,
4355 struct bfd_link_info *info)
4356 {
4357 bfd *input_bfd;
4358 unsigned int bfd_count;
4359 int top_id, top_index;
4360 asection *section;
4361 asection **input_list, **list;
4362 bfd_size_type amt;
4363 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4364
4365 if (htab == NULL)
4366 return 0;
4367 if (! is_elf_hash_table (htab))
4368 return 0;
4369
4370 /* Count the number of input BFDs and find the top input section id. */
4371 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4372 input_bfd != NULL;
4373 input_bfd = input_bfd->link_next)
4374 {
4375 bfd_count += 1;
4376 for (section = input_bfd->sections;
4377 section != NULL;
4378 section = section->next)
4379 {
4380 if (top_id < section->id)
4381 top_id = section->id;
4382 }
4383 }
4384 htab->bfd_count = bfd_count;
4385
4386 amt = sizeof (struct map_stub) * (top_id + 1);
4387 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4388 if (htab->stub_group == NULL)
4389 return -1;
4390 htab->top_id = top_id;
4391
4392 /* We can't use output_bfd->section_count here to find the top output
4393 section index as some sections may have been removed, and
4394 _bfd_strip_section_from_output doesn't renumber the indices. */
4395 for (section = output_bfd->sections, top_index = 0;
4396 section != NULL;
4397 section = section->next)
4398 {
4399 if (top_index < section->index)
4400 top_index = section->index;
4401 }
4402
4403 htab->top_index = top_index;
4404 amt = sizeof (asection *) * (top_index + 1);
4405 input_list = (asection **) bfd_malloc (amt);
4406 htab->input_list = input_list;
4407 if (input_list == NULL)
4408 return -1;
4409
4410 /* For sections we aren't interested in, mark their entries with a
4411 value we can check later. */
4412 list = input_list + top_index;
4413 do
4414 *list = bfd_abs_section_ptr;
4415 while (list-- != input_list);
4416
4417 for (section = output_bfd->sections;
4418 section != NULL;
4419 section = section->next)
4420 {
4421 if ((section->flags & SEC_CODE) != 0)
4422 input_list[section->index] = NULL;
4423 }
4424
4425 return 1;
4426 }
4427
4428 /* The linker repeatedly calls this function for each input section,
4429 in the order that input sections are linked into output sections.
4430 Build lists of input sections to determine groupings between which
4431 we may insert linker stubs. */
4432
4433 void
4434 elf32_arm_next_input_section (struct bfd_link_info *info,
4435 asection *isec)
4436 {
4437 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4438
4439 if (htab == NULL)
4440 return;
4441
4442 if (isec->output_section->index <= htab->top_index)
4443 {
4444 asection **list = htab->input_list + isec->output_section->index;
4445
4446 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
4447 {
4448 /* Steal the link_sec pointer for our list. */
4449 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4450 /* This happens to make the list in reverse order,
4451 which we reverse later. */
4452 PREV_SEC (isec) = *list;
4453 *list = isec;
4454 }
4455 }
4456 }
4457
4458 /* See whether we can group stub sections together. Grouping stub
4459 sections may result in fewer stubs. More importantly, we need to
4460 put all .init* and .fini* stubs at the end of the .init or
4461 .fini output sections respectively, because glibc splits the
4462 _init and _fini functions into multiple parts. Putting a stub in
4463 the middle of a function is not a good idea. */
4464
4465 static void
4466 group_sections (struct elf32_arm_link_hash_table *htab,
4467 bfd_size_type stub_group_size,
4468 bfd_boolean stubs_always_after_branch)
4469 {
4470 asection **list = htab->input_list;
4471
4472 do
4473 {
4474 asection *tail = *list;
4475 asection *head;
4476
4477 if (tail == bfd_abs_section_ptr)
4478 continue;
4479
4480 /* Reverse the list: we must avoid placing stubs at the
4481 beginning of the section because the beginning of the text
4482 section may be required for an interrupt vector in bare metal
4483 code. */
4484 #define NEXT_SEC PREV_SEC
4485 head = NULL;
4486 while (tail != NULL)
4487 {
4488 /* Pop from tail. */
4489 asection *item = tail;
4490 tail = PREV_SEC (item);
4491
4492 /* Push on head. */
4493 NEXT_SEC (item) = head;
4494 head = item;
4495 }
4496
4497 while (head != NULL)
4498 {
4499 asection *curr;
4500 asection *next;
4501 bfd_vma stub_group_start = head->output_offset;
4502 bfd_vma end_of_next;
4503
4504 curr = head;
4505 while (NEXT_SEC (curr) != NULL)
4506 {
4507 next = NEXT_SEC (curr);
4508 end_of_next = next->output_offset + next->size;
4509 if (end_of_next - stub_group_start >= stub_group_size)
4510 /* End of NEXT is too far from start, so stop. */
4511 break;
4512 /* Add NEXT to the group. */
4513 curr = next;
4514 }
4515
4516 /* OK, the size from the start to the start of CURR is less
4517 than stub_group_size and thus can be handled by one stub
4518 section. (Or the head section is itself larger than
4519 stub_group_size, in which case we may be toast.)
4520 We should really be keeping track of the total size of
4521 stubs added here, as stubs contribute to the final output
4522 section size. */
4523 do
4524 {
4525 next = NEXT_SEC (head);
4526 /* Set up this stub group. */
4527 htab->stub_group[head->id].link_sec = curr;
4528 }
4529 while (head != curr && (head = next) != NULL);
4530
4531 /* But wait, there's more! Input sections up to stub_group_size
4532 bytes after the stub section can be handled by it too. */
4533 if (!stubs_always_after_branch)
4534 {
4535 stub_group_start = curr->output_offset + curr->size;
4536
4537 while (next != NULL)
4538 {
4539 end_of_next = next->output_offset + next->size;
4540 if (end_of_next - stub_group_start >= stub_group_size)
4541 /* End of NEXT is too far from stubs, so stop. */
4542 break;
4543 /* Add NEXT to the stub group. */
4544 head = next;
4545 next = NEXT_SEC (head);
4546 htab->stub_group[head->id].link_sec = curr;
4547 }
4548 }
4549 head = next;
4550 }
4551 }
4552 while (list++ != htab->input_list + htab->top_index);
4553
4554 free (htab->input_list);
4555 #undef PREV_SEC
4556 #undef NEXT_SEC
4557 }
4558
4559 /* Comparison function for sorting/searching relocations relating to Cortex-A8
4560 erratum fix. */
4561
4562 static int
4563 a8_reloc_compare (const void *a, const void *b)
4564 {
4565 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4566 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
4567
4568 if (ra->from < rb->from)
4569 return -1;
4570 else if (ra->from > rb->from)
4571 return 1;
4572 else
4573 return 0;
4574 }
4575
4576 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4577 const char *, char **);
4578
4579 /* Helper function to scan code for sequences which might trigger the Cortex-A8
4580 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
4581 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
4582 otherwise. */
4583
4584 static bfd_boolean
4585 cortex_a8_erratum_scan (bfd *input_bfd,
4586 struct bfd_link_info *info,
4587 struct a8_erratum_fix **a8_fixes_p,
4588 unsigned int *num_a8_fixes_p,
4589 unsigned int *a8_fix_table_size_p,
4590 struct a8_erratum_reloc *a8_relocs,
4591 unsigned int num_a8_relocs,
4592 unsigned prev_num_a8_fixes,
4593 bfd_boolean *stub_changed_p)
4594 {
4595 asection *section;
4596 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4597 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4598 unsigned int num_a8_fixes = *num_a8_fixes_p;
4599 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4600
4601 if (htab == NULL)
4602 return FALSE;
4603
4604 for (section = input_bfd->sections;
4605 section != NULL;
4606 section = section->next)
4607 {
4608 bfd_byte *contents = NULL;
4609 struct _arm_elf_section_data *sec_data;
4610 unsigned int span;
4611 bfd_vma base_vma;
4612
4613 if (elf_section_type (section) != SHT_PROGBITS
4614 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4615 || (section->flags & SEC_EXCLUDE) != 0
4616 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4617 || (section->output_section == bfd_abs_section_ptr))
4618 continue;
4619
4620 base_vma = section->output_section->vma + section->output_offset;
4621
4622 if (elf_section_data (section)->this_hdr.contents != NULL)
4623 contents = elf_section_data (section)->this_hdr.contents;
4624 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4625 return TRUE;
4626
4627 sec_data = elf32_arm_section_data (section);
4628
4629 for (span = 0; span < sec_data->mapcount; span++)
4630 {
4631 unsigned int span_start = sec_data->map[span].vma;
4632 unsigned int span_end = (span == sec_data->mapcount - 1)
4633 ? section->size : sec_data->map[span + 1].vma;
4634 unsigned int i;
4635 char span_type = sec_data->map[span].type;
4636 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4637
4638 if (span_type != 't')
4639 continue;
4640
4641 /* Span is entirely within a single 4KB region: skip scanning. */
4642 if (((base_vma + span_start) & ~0xfff)
4643 == ((base_vma + span_end) & ~0xfff))
4644 continue;
4645
4646 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4647
4648 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4649 * The branch target is in the same 4KB region as the
4650 first half of the branch.
4651 * The instruction before the branch is a 32-bit
4652 length non-branch instruction. */
4653 for (i = span_start; i < span_end;)
4654 {
4655 unsigned int insn = bfd_getl16 (&contents[i]);
4656 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4657 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4658
4659 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4660 insn_32bit = TRUE;
4661
4662 if (insn_32bit)
4663 {
4664 /* Load the rest of the insn (in manual-friendly order). */
4665 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4666
4667 /* Encoding T4: B<c>.W. */
4668 is_b = (insn & 0xf800d000) == 0xf0009000;
4669 /* Encoding T1: BL<c>.W. */
4670 is_bl = (insn & 0xf800d000) == 0xf000d000;
4671 /* Encoding T2: BLX<c>.W. */
4672 is_blx = (insn & 0xf800d000) == 0xf000c000;
4673 /* Encoding T3: B<c>.W (not permitted in IT block). */
4674 is_bcc = (insn & 0xf800d000) == 0xf0008000
4675 && (insn & 0x07f00000) != 0x03800000;
4676 }
4677
4678 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4679
4680 if (((base_vma + i) & 0xfff) == 0xffe
4681 && insn_32bit
4682 && is_32bit_branch
4683 && last_was_32bit
4684 && ! last_was_branch)
4685 {
4686 bfd_signed_vma offset = 0;
4687 bfd_boolean force_target_arm = FALSE;
4688 bfd_boolean force_target_thumb = FALSE;
4689 bfd_vma target;
4690 enum elf32_arm_stub_type stub_type = arm_stub_none;
4691 struct a8_erratum_reloc key, *found;
4692 bfd_boolean use_plt = FALSE;
4693
4694 key.from = base_vma + i;
4695 found = (struct a8_erratum_reloc *)
4696 bsearch (&key, a8_relocs, num_a8_relocs,
4697 sizeof (struct a8_erratum_reloc),
4698 &a8_reloc_compare);
4699
4700 if (found)
4701 {
4702 char *error_message = NULL;
4703 struct elf_link_hash_entry *entry;
4704
4705 /* We don't care about the error returned from this
4706 function, only if there is glue or not. */
4707 entry = find_thumb_glue (info, found->sym_name,
4708 &error_message);
4709
4710 if (entry)
4711 found->non_a8_stub = TRUE;
4712
4713 /* Keep a simpler condition, for the sake of clarity. */
4714 if (htab->root.splt != NULL && found->hash != NULL
4715 && found->hash->root.plt.offset != (bfd_vma) -1)
4716 use_plt = TRUE;
4717
4718 if (found->r_type == R_ARM_THM_CALL)
4719 {
4720 if (found->branch_type == ST_BRANCH_TO_ARM
4721 || use_plt)
4722 force_target_arm = TRUE;
4723 else
4724 force_target_thumb = TRUE;
4725 }
4726 }
4727
4728 /* Check if we have an offending branch instruction. */
4729
4730 if (found && found->non_a8_stub)
4731 /* We've already made a stub for this instruction, e.g.
4732 it's a long branch or a Thumb->ARM stub. Assume that
4733 stub will suffice to work around the A8 erratum (see
4734 setting of always_after_branch above). */
4735 ;
4736 else if (is_bcc)
4737 {
4738 offset = (insn & 0x7ff) << 1;
4739 offset |= (insn & 0x3f0000) >> 4;
4740 offset |= (insn & 0x2000) ? 0x40000 : 0;
4741 offset |= (insn & 0x800) ? 0x80000 : 0;
4742 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4743 if (offset & 0x100000)
4744 offset |= ~ ((bfd_signed_vma) 0xfffff);
4745 stub_type = arm_stub_a8_veneer_b_cond;
4746 }
4747 else if (is_b || is_bl || is_blx)
4748 {
4749 int s = (insn & 0x4000000) != 0;
4750 int j1 = (insn & 0x2000) != 0;
4751 int j2 = (insn & 0x800) != 0;
4752 int i1 = !(j1 ^ s);
4753 int i2 = !(j2 ^ s);
4754
4755 offset = (insn & 0x7ff) << 1;
4756 offset |= (insn & 0x3ff0000) >> 4;
4757 offset |= i2 << 22;
4758 offset |= i1 << 23;
4759 offset |= s << 24;
4760 if (offset & 0x1000000)
4761 offset |= ~ ((bfd_signed_vma) 0xffffff);
4762
4763 if (is_blx)
4764 offset &= ~ ((bfd_signed_vma) 3);
4765
4766 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4767 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4768 }
4769
4770 if (stub_type != arm_stub_none)
4771 {
4772 bfd_vma pc_for_insn = base_vma + i + 4;
4773
4774 /* The original instruction is a BL, but the target is
4775 an ARM instruction. If we were not making a stub,
4776 the BL would have been converted to a BLX. Use the
4777 BLX stub instead in that case. */
4778 if (htab->use_blx && force_target_arm
4779 && stub_type == arm_stub_a8_veneer_bl)
4780 {
4781 stub_type = arm_stub_a8_veneer_blx;
4782 is_blx = TRUE;
4783 is_bl = FALSE;
4784 }
4785 /* Conversely, if the original instruction was
4786 BLX but the target is Thumb mode, use the BL
4787 stub. */
4788 else if (force_target_thumb
4789 && stub_type == arm_stub_a8_veneer_blx)
4790 {
4791 stub_type = arm_stub_a8_veneer_bl;
4792 is_blx = FALSE;
4793 is_bl = TRUE;
4794 }
4795
4796 if (is_blx)
4797 pc_for_insn &= ~ ((bfd_vma) 3);
4798
4799 /* If we found a relocation, use the proper destination,
4800 not the offset in the (unrelocated) instruction.
4801 Note this is always done if we switched the stub type
4802 above. */
4803 if (found)
4804 offset =
4805 (bfd_signed_vma) (found->destination - pc_for_insn);
4806
4807 /* If the stub will use a Thumb-mode branch to a
4808 PLT target, redirect it to the preceding Thumb
4809 entry point. */
4810 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4811 offset -= PLT_THUMB_STUB_SIZE;
4812
4813 target = pc_for_insn + offset;
4814
4815 /* The BLX stub is ARM-mode code. Adjust the offset to
4816 take the different PC value (+8 instead of +4) into
4817 account. */
4818 if (stub_type == arm_stub_a8_veneer_blx)
4819 offset += 4;
4820
4821 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4822 {
4823 char *stub_name = NULL;
4824
4825 if (num_a8_fixes == a8_fix_table_size)
4826 {
4827 a8_fix_table_size *= 2;
4828 a8_fixes = (struct a8_erratum_fix *)
4829 bfd_realloc (a8_fixes,
4830 sizeof (struct a8_erratum_fix)
4831 * a8_fix_table_size);
4832 }
4833
4834 if (num_a8_fixes < prev_num_a8_fixes)
4835 {
4836 /* If we're doing a subsequent scan,
4837 check if we've found the same fix as
4838 before, and try and reuse the stub
4839 name. */
4840 stub_name = a8_fixes[num_a8_fixes].stub_name;
4841 if ((a8_fixes[num_a8_fixes].section != section)
4842 || (a8_fixes[num_a8_fixes].offset != i))
4843 {
4844 free (stub_name);
4845 stub_name = NULL;
4846 *stub_changed_p = TRUE;
4847 }
4848 }
4849
4850 if (!stub_name)
4851 {
4852 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
4853 if (stub_name != NULL)
4854 sprintf (stub_name, "%x:%x", section->id, i);
4855 }
4856
4857 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4858 a8_fixes[num_a8_fixes].section = section;
4859 a8_fixes[num_a8_fixes].offset = i;
4860 a8_fixes[num_a8_fixes].addend = offset;
4861 a8_fixes[num_a8_fixes].orig_insn = insn;
4862 a8_fixes[num_a8_fixes].stub_name = stub_name;
4863 a8_fixes[num_a8_fixes].stub_type = stub_type;
4864 a8_fixes[num_a8_fixes].branch_type =
4865 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
4866
4867 num_a8_fixes++;
4868 }
4869 }
4870 }
4871
4872 i += insn_32bit ? 4 : 2;
4873 last_was_32bit = insn_32bit;
4874 last_was_branch = is_32bit_branch;
4875 }
4876 }
4877
4878 if (elf_section_data (section)->this_hdr.contents == NULL)
4879 free (contents);
4880 }
4881
4882 *a8_fixes_p = a8_fixes;
4883 *num_a8_fixes_p = num_a8_fixes;
4884 *a8_fix_table_size_p = a8_fix_table_size;
4885
4886 return FALSE;
4887 }
4888
4889 /* Determine and set the size of the stub section for a final link.
4890
4891 The basic idea here is to examine all the relocations looking for
4892 PC-relative calls to a target that is unreachable with a "bl"
4893 instruction. */
4894
4895 bfd_boolean
4896 elf32_arm_size_stubs (bfd *output_bfd,
4897 bfd *stub_bfd,
4898 struct bfd_link_info *info,
4899 bfd_signed_vma group_size,
4900 asection * (*add_stub_section) (const char *, asection *),
4901 void (*layout_sections_again) (void))
4902 {
4903 bfd_size_type stub_group_size;
4904 bfd_boolean stubs_always_after_branch;
4905 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4906 struct a8_erratum_fix *a8_fixes = NULL;
4907 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
4908 struct a8_erratum_reloc *a8_relocs = NULL;
4909 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4910
4911 if (htab == NULL)
4912 return FALSE;
4913
4914 if (htab->fix_cortex_a8)
4915 {
4916 a8_fixes = (struct a8_erratum_fix *)
4917 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4918 a8_relocs = (struct a8_erratum_reloc *)
4919 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
4920 }
4921
4922 /* Propagate mach to stub bfd, because it may not have been
4923 finalized when we created stub_bfd. */
4924 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4925 bfd_get_mach (output_bfd));
4926
4927 /* Stash our params away. */
4928 htab->stub_bfd = stub_bfd;
4929 htab->add_stub_section = add_stub_section;
4930 htab->layout_sections_again = layout_sections_again;
4931 stubs_always_after_branch = group_size < 0;
4932
4933 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4934 as the first half of a 32-bit branch straddling two 4K pages. This is a
4935 crude way of enforcing that. */
4936 if (htab->fix_cortex_a8)
4937 stubs_always_after_branch = 1;
4938
4939 if (group_size < 0)
4940 stub_group_size = -group_size;
4941 else
4942 stub_group_size = group_size;
4943
4944 if (stub_group_size == 1)
4945 {
4946 /* Default values. */
4947 /* Thumb branch range is +-4MB has to be used as the default
4948 maximum size (a given section can contain both ARM and Thumb
4949 code, so the worst case has to be taken into account).
4950
4951 This value is 24K less than that, which allows for 2025
4952 12-byte stubs. If we exceed that, then we will fail to link.
4953 The user will have to relink with an explicit group size
4954 option. */
4955 stub_group_size = 4170000;
4956 }
4957
4958 group_sections (htab, stub_group_size, stubs_always_after_branch);
4959
4960 /* If we're applying the cortex A8 fix, we need to determine the
4961 program header size now, because we cannot change it later --
4962 that could alter section placements. Notice the A8 erratum fix
4963 ends up requiring the section addresses to remain unchanged
4964 modulo the page size. That's something we cannot represent
4965 inside BFD, and we don't want to force the section alignment to
4966 be the page size. */
4967 if (htab->fix_cortex_a8)
4968 (*htab->layout_sections_again) ();
4969
4970 while (1)
4971 {
4972 bfd *input_bfd;
4973 unsigned int bfd_indx;
4974 asection *stub_sec;
4975 bfd_boolean stub_changed = FALSE;
4976 unsigned prev_num_a8_fixes = num_a8_fixes;
4977
4978 num_a8_fixes = 0;
4979 for (input_bfd = info->input_bfds, bfd_indx = 0;
4980 input_bfd != NULL;
4981 input_bfd = input_bfd->link_next, bfd_indx++)
4982 {
4983 Elf_Internal_Shdr *symtab_hdr;
4984 asection *section;
4985 Elf_Internal_Sym *local_syms = NULL;
4986
4987 num_a8_relocs = 0;
4988
4989 /* We'll need the symbol table in a second. */
4990 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4991 if (symtab_hdr->sh_info == 0)
4992 continue;
4993
4994 /* Walk over each section attached to the input bfd. */
4995 for (section = input_bfd->sections;
4996 section != NULL;
4997 section = section->next)
4998 {
4999 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5000
5001 /* If there aren't any relocs, then there's nothing more
5002 to do. */
5003 if ((section->flags & SEC_RELOC) == 0
5004 || section->reloc_count == 0
5005 || (section->flags & SEC_CODE) == 0)
5006 continue;
5007
5008 /* If this section is a link-once section that will be
5009 discarded, then don't create any stubs. */
5010 if (section->output_section == NULL
5011 || section->output_section->owner != output_bfd)
5012 continue;
5013
5014 /* Get the relocs. */
5015 internal_relocs
5016 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5017 NULL, info->keep_memory);
5018 if (internal_relocs == NULL)
5019 goto error_ret_free_local;
5020
5021 /* Now examine each relocation. */
5022 irela = internal_relocs;
5023 irelaend = irela + section->reloc_count;
5024 for (; irela < irelaend; irela++)
5025 {
5026 unsigned int r_type, r_indx;
5027 enum elf32_arm_stub_type stub_type;
5028 struct elf32_arm_stub_hash_entry *stub_entry;
5029 asection *sym_sec;
5030 bfd_vma sym_value;
5031 bfd_vma destination;
5032 struct elf32_arm_link_hash_entry *hash;
5033 const char *sym_name;
5034 char *stub_name;
5035 const asection *id_sec;
5036 unsigned char st_type;
5037 enum arm_st_branch_type branch_type;
5038 bfd_boolean created_stub = FALSE;
5039
5040 r_type = ELF32_R_TYPE (irela->r_info);
5041 r_indx = ELF32_R_SYM (irela->r_info);
5042
5043 if (r_type >= (unsigned int) R_ARM_max)
5044 {
5045 bfd_set_error (bfd_error_bad_value);
5046 error_ret_free_internal:
5047 if (elf_section_data (section)->relocs == NULL)
5048 free (internal_relocs);
5049 goto error_ret_free_local;
5050 }
5051
5052 hash = NULL;
5053 if (r_indx >= symtab_hdr->sh_info)
5054 hash = elf32_arm_hash_entry
5055 (elf_sym_hashes (input_bfd)
5056 [r_indx - symtab_hdr->sh_info]);
5057
5058 /* Only look for stubs on branch instructions, or
5059 non-relaxed TLSCALL */
5060 if ((r_type != (unsigned int) R_ARM_CALL)
5061 && (r_type != (unsigned int) R_ARM_THM_CALL)
5062 && (r_type != (unsigned int) R_ARM_JUMP24)
5063 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5064 && (r_type != (unsigned int) R_ARM_THM_XPC22)
5065 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
5066 && (r_type != (unsigned int) R_ARM_PLT32)
5067 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5068 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5069 && r_type == elf32_arm_tls_transition
5070 (info, r_type, &hash->root)
5071 && ((hash ? hash->tls_type
5072 : (elf32_arm_local_got_tls_type
5073 (input_bfd)[r_indx]))
5074 & GOT_TLS_GDESC) != 0))
5075 continue;
5076
5077 /* Now determine the call target, its name, value,
5078 section. */
5079 sym_sec = NULL;
5080 sym_value = 0;
5081 destination = 0;
5082 sym_name = NULL;
5083
5084 if (r_type == (unsigned int) R_ARM_TLS_CALL
5085 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5086 {
5087 /* A non-relaxed TLS call. The target is the
5088 plt-resident trampoline and nothing to do
5089 with the symbol. */
5090 BFD_ASSERT (htab->tls_trampoline > 0);
5091 sym_sec = htab->root.splt;
5092 sym_value = htab->tls_trampoline;
5093 hash = 0;
5094 st_type = STT_FUNC;
5095 branch_type = ST_BRANCH_TO_ARM;
5096 }
5097 else if (!hash)
5098 {
5099 /* It's a local symbol. */
5100 Elf_Internal_Sym *sym;
5101
5102 if (local_syms == NULL)
5103 {
5104 local_syms
5105 = (Elf_Internal_Sym *) symtab_hdr->contents;
5106 if (local_syms == NULL)
5107 local_syms
5108 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5109 symtab_hdr->sh_info, 0,
5110 NULL, NULL, NULL);
5111 if (local_syms == NULL)
5112 goto error_ret_free_internal;
5113 }
5114
5115 sym = local_syms + r_indx;
5116 if (sym->st_shndx == SHN_UNDEF)
5117 sym_sec = bfd_und_section_ptr;
5118 else if (sym->st_shndx == SHN_ABS)
5119 sym_sec = bfd_abs_section_ptr;
5120 else if (sym->st_shndx == SHN_COMMON)
5121 sym_sec = bfd_com_section_ptr;
5122 else
5123 sym_sec =
5124 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5125
5126 if (!sym_sec)
5127 /* This is an undefined symbol. It can never
5128 be resolved. */
5129 continue;
5130
5131 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5132 sym_value = sym->st_value;
5133 destination = (sym_value + irela->r_addend
5134 + sym_sec->output_offset
5135 + sym_sec->output_section->vma);
5136 st_type = ELF_ST_TYPE (sym->st_info);
5137 branch_type = ARM_SYM_BRANCH_TYPE (sym);
5138 sym_name
5139 = bfd_elf_string_from_elf_section (input_bfd,
5140 symtab_hdr->sh_link,
5141 sym->st_name);
5142 }
5143 else
5144 {
5145 /* It's an external symbol. */
5146 while (hash->root.root.type == bfd_link_hash_indirect
5147 || hash->root.root.type == bfd_link_hash_warning)
5148 hash = ((struct elf32_arm_link_hash_entry *)
5149 hash->root.root.u.i.link);
5150
5151 if (hash->root.root.type == bfd_link_hash_defined
5152 || hash->root.root.type == bfd_link_hash_defweak)
5153 {
5154 sym_sec = hash->root.root.u.def.section;
5155 sym_value = hash->root.root.u.def.value;
5156
5157 struct elf32_arm_link_hash_table *globals =
5158 elf32_arm_hash_table (info);
5159
5160 /* For a destination in a shared library,
5161 use the PLT stub as target address to
5162 decide whether a branch stub is
5163 needed. */
5164 if (globals != NULL
5165 && globals->root.splt != NULL
5166 && hash != NULL
5167 && hash->root.plt.offset != (bfd_vma) -1)
5168 {
5169 sym_sec = globals->root.splt;
5170 sym_value = hash->root.plt.offset;
5171 if (sym_sec->output_section != NULL)
5172 destination = (sym_value
5173 + sym_sec->output_offset
5174 + sym_sec->output_section->vma);
5175 }
5176 else if (sym_sec->output_section != NULL)
5177 destination = (sym_value + irela->r_addend
5178 + sym_sec->output_offset
5179 + sym_sec->output_section->vma);
5180 }
5181 else if ((hash->root.root.type == bfd_link_hash_undefined)
5182 || (hash->root.root.type == bfd_link_hash_undefweak))
5183 {
5184 /* For a shared library, use the PLT stub as
5185 target address to decide whether a long
5186 branch stub is needed.
5187 For absolute code, they cannot be handled. */
5188 struct elf32_arm_link_hash_table *globals =
5189 elf32_arm_hash_table (info);
5190
5191 if (globals != NULL
5192 && globals->root.splt != NULL
5193 && hash != NULL
5194 && hash->root.plt.offset != (bfd_vma) -1)
5195 {
5196 sym_sec = globals->root.splt;
5197 sym_value = hash->root.plt.offset;
5198 if (sym_sec->output_section != NULL)
5199 destination = (sym_value
5200 + sym_sec->output_offset
5201 + sym_sec->output_section->vma);
5202 }
5203 else
5204 continue;
5205 }
5206 else
5207 {
5208 bfd_set_error (bfd_error_bad_value);
5209 goto error_ret_free_internal;
5210 }
5211 st_type = hash->root.type;
5212 branch_type = hash->root.target_internal;
5213 sym_name = hash->root.root.root.string;
5214 }
5215
5216 do
5217 {
5218 /* Determine what (if any) linker stub is needed. */
5219 stub_type = arm_type_of_stub (info, section, irela,
5220 st_type, &branch_type,
5221 hash, destination, sym_sec,
5222 input_bfd, sym_name);
5223 if (stub_type == arm_stub_none)
5224 break;
5225
5226 /* Support for grouping stub sections. */
5227 id_sec = htab->stub_group[section->id].link_sec;
5228
5229 /* Get the name of this stub. */
5230 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
5231 irela, stub_type);
5232 if (!stub_name)
5233 goto error_ret_free_internal;
5234
5235 /* We've either created a stub for this reloc already,
5236 or we are about to. */
5237 created_stub = TRUE;
5238
5239 stub_entry = arm_stub_hash_lookup
5240 (&htab->stub_hash_table, stub_name,
5241 FALSE, FALSE);
5242 if (stub_entry != NULL)
5243 {
5244 /* The proper stub has already been created. */
5245 free (stub_name);
5246 stub_entry->target_value = sym_value;
5247 break;
5248 }
5249
5250 stub_entry = elf32_arm_add_stub (stub_name, section,
5251 htab);
5252 if (stub_entry == NULL)
5253 {
5254 free (stub_name);
5255 goto error_ret_free_internal;
5256 }
5257
5258 stub_entry->target_value = sym_value;
5259 stub_entry->target_section = sym_sec;
5260 stub_entry->stub_type = stub_type;
5261 stub_entry->h = hash;
5262 stub_entry->branch_type = branch_type;
5263
5264 if (sym_name == NULL)
5265 sym_name = "unnamed";
5266 stub_entry->output_name = (char *)
5267 bfd_alloc (htab->stub_bfd,
5268 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5269 + strlen (sym_name));
5270 if (stub_entry->output_name == NULL)
5271 {
5272 free (stub_name);
5273 goto error_ret_free_internal;
5274 }
5275
5276 /* For historical reasons, use the existing names for
5277 ARM-to-Thumb and Thumb-to-ARM stubs. */
5278 if ((r_type == (unsigned int) R_ARM_THM_CALL
5279 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5280 && branch_type == ST_BRANCH_TO_ARM)
5281 sprintf (stub_entry->output_name,
5282 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5283 else if ((r_type == (unsigned int) R_ARM_CALL
5284 || r_type == (unsigned int) R_ARM_JUMP24)
5285 && branch_type == ST_BRANCH_TO_THUMB)
5286 sprintf (stub_entry->output_name,
5287 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5288 else
5289 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5290 sym_name);
5291
5292 stub_changed = TRUE;
5293 }
5294 while (0);
5295
5296 /* Look for relocations which might trigger Cortex-A8
5297 erratum. */
5298 if (htab->fix_cortex_a8
5299 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5300 || r_type == (unsigned int) R_ARM_THM_JUMP19
5301 || r_type == (unsigned int) R_ARM_THM_CALL
5302 || r_type == (unsigned int) R_ARM_THM_XPC22))
5303 {
5304 bfd_vma from = section->output_section->vma
5305 + section->output_offset
5306 + irela->r_offset;
5307
5308 if ((from & 0xfff) == 0xffe)
5309 {
5310 /* Found a candidate. Note we haven't checked the
5311 destination is within 4K here: if we do so (and
5312 don't create an entry in a8_relocs) we can't tell
5313 that a branch should have been relocated when
5314 scanning later. */
5315 if (num_a8_relocs == a8_reloc_table_size)
5316 {
5317 a8_reloc_table_size *= 2;
5318 a8_relocs = (struct a8_erratum_reloc *)
5319 bfd_realloc (a8_relocs,
5320 sizeof (struct a8_erratum_reloc)
5321 * a8_reloc_table_size);
5322 }
5323
5324 a8_relocs[num_a8_relocs].from = from;
5325 a8_relocs[num_a8_relocs].destination = destination;
5326 a8_relocs[num_a8_relocs].r_type = r_type;
5327 a8_relocs[num_a8_relocs].branch_type = branch_type;
5328 a8_relocs[num_a8_relocs].sym_name = sym_name;
5329 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5330 a8_relocs[num_a8_relocs].hash = hash;
5331
5332 num_a8_relocs++;
5333 }
5334 }
5335 }
5336
5337 /* We're done with the internal relocs, free them. */
5338 if (elf_section_data (section)->relocs == NULL)
5339 free (internal_relocs);
5340 }
5341
5342 if (htab->fix_cortex_a8)
5343 {
5344 /* Sort relocs which might apply to Cortex-A8 erratum. */
5345 qsort (a8_relocs, num_a8_relocs,
5346 sizeof (struct a8_erratum_reloc),
5347 &a8_reloc_compare);
5348
5349 /* Scan for branches which might trigger Cortex-A8 erratum. */
5350 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5351 &num_a8_fixes, &a8_fix_table_size,
5352 a8_relocs, num_a8_relocs,
5353 prev_num_a8_fixes, &stub_changed)
5354 != 0)
5355 goto error_ret_free_local;
5356 }
5357 }
5358
5359 if (prev_num_a8_fixes != num_a8_fixes)
5360 stub_changed = TRUE;
5361
5362 if (!stub_changed)
5363 break;
5364
5365 /* OK, we've added some stubs. Find out the new size of the
5366 stub sections. */
5367 for (stub_sec = htab->stub_bfd->sections;
5368 stub_sec != NULL;
5369 stub_sec = stub_sec->next)
5370 {
5371 /* Ignore non-stub sections. */
5372 if (!strstr (stub_sec->name, STUB_SUFFIX))
5373 continue;
5374
5375 stub_sec->size = 0;
5376 }
5377
5378 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5379
5380 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5381 if (htab->fix_cortex_a8)
5382 for (i = 0; i < num_a8_fixes; i++)
5383 {
5384 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5385 a8_fixes[i].section, htab);
5386
5387 if (stub_sec == NULL)
5388 goto error_ret_free_local;
5389
5390 stub_sec->size
5391 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5392 NULL);
5393 }
5394
5395
5396 /* Ask the linker to do its stuff. */
5397 (*htab->layout_sections_again) ();
5398 }
5399
5400 /* Add stubs for Cortex-A8 erratum fixes now. */
5401 if (htab->fix_cortex_a8)
5402 {
5403 for (i = 0; i < num_a8_fixes; i++)
5404 {
5405 struct elf32_arm_stub_hash_entry *stub_entry;
5406 char *stub_name = a8_fixes[i].stub_name;
5407 asection *section = a8_fixes[i].section;
5408 unsigned int section_id = a8_fixes[i].section->id;
5409 asection *link_sec = htab->stub_group[section_id].link_sec;
5410 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5411 const insn_sequence *template_sequence;
5412 int template_size, size = 0;
5413
5414 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5415 TRUE, FALSE);
5416 if (stub_entry == NULL)
5417 {
5418 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5419 section->owner,
5420 stub_name);
5421 return FALSE;
5422 }
5423
5424 stub_entry->stub_sec = stub_sec;
5425 stub_entry->stub_offset = 0;
5426 stub_entry->id_sec = link_sec;
5427 stub_entry->stub_type = a8_fixes[i].stub_type;
5428 stub_entry->target_section = a8_fixes[i].section;
5429 stub_entry->target_value = a8_fixes[i].offset;
5430 stub_entry->target_addend = a8_fixes[i].addend;
5431 stub_entry->orig_insn = a8_fixes[i].orig_insn;
5432 stub_entry->branch_type = a8_fixes[i].branch_type;
5433
5434 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5435 &template_sequence,
5436 &template_size);
5437
5438 stub_entry->stub_size = size;
5439 stub_entry->stub_template = template_sequence;
5440 stub_entry->stub_template_size = template_size;
5441 }
5442
5443 /* Stash the Cortex-A8 erratum fix array for use later in
5444 elf32_arm_write_section(). */
5445 htab->a8_erratum_fixes = a8_fixes;
5446 htab->num_a8_erratum_fixes = num_a8_fixes;
5447 }
5448 else
5449 {
5450 htab->a8_erratum_fixes = NULL;
5451 htab->num_a8_erratum_fixes = 0;
5452 }
5453 return TRUE;
5454
5455 error_ret_free_local:
5456 return FALSE;
5457 }
5458
5459 /* Build all the stubs associated with the current output file. The
5460 stubs are kept in a hash table attached to the main linker hash
5461 table. We also set up the .plt entries for statically linked PIC
5462 functions here. This function is called via arm_elf_finish in the
5463 linker. */
5464
5465 bfd_boolean
5466 elf32_arm_build_stubs (struct bfd_link_info *info)
5467 {
5468 asection *stub_sec;
5469 struct bfd_hash_table *table;
5470 struct elf32_arm_link_hash_table *htab;
5471
5472 htab = elf32_arm_hash_table (info);
5473 if (htab == NULL)
5474 return FALSE;
5475
5476 for (stub_sec = htab->stub_bfd->sections;
5477 stub_sec != NULL;
5478 stub_sec = stub_sec->next)
5479 {
5480 bfd_size_type size;
5481
5482 /* Ignore non-stub sections. */
5483 if (!strstr (stub_sec->name, STUB_SUFFIX))
5484 continue;
5485
5486 /* Allocate memory to hold the linker stubs. */
5487 size = stub_sec->size;
5488 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
5489 if (stub_sec->contents == NULL && size != 0)
5490 return FALSE;
5491 stub_sec->size = 0;
5492 }
5493
5494 /* Build the stubs as directed by the stub hash table. */
5495 table = &htab->stub_hash_table;
5496 bfd_hash_traverse (table, arm_build_one_stub, info);
5497 if (htab->fix_cortex_a8)
5498 {
5499 /* Place the cortex a8 stubs last. */
5500 htab->fix_cortex_a8 = -1;
5501 bfd_hash_traverse (table, arm_build_one_stub, info);
5502 }
5503
5504 return TRUE;
5505 }
5506
5507 /* Locate the Thumb encoded calling stub for NAME. */
5508
5509 static struct elf_link_hash_entry *
5510 find_thumb_glue (struct bfd_link_info *link_info,
5511 const char *name,
5512 char **error_message)
5513 {
5514 char *tmp_name;
5515 struct elf_link_hash_entry *hash;
5516 struct elf32_arm_link_hash_table *hash_table;
5517
5518 /* We need a pointer to the armelf specific hash table. */
5519 hash_table = elf32_arm_hash_table (link_info);
5520 if (hash_table == NULL)
5521 return NULL;
5522
5523 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5524 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
5525
5526 BFD_ASSERT (tmp_name);
5527
5528 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5529
5530 hash = elf_link_hash_lookup
5531 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5532
5533 if (hash == NULL
5534 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5535 tmp_name, name) == -1)
5536 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5537
5538 free (tmp_name);
5539
5540 return hash;
5541 }
5542
5543 /* Locate the ARM encoded calling stub for NAME. */
5544
5545 static struct elf_link_hash_entry *
5546 find_arm_glue (struct bfd_link_info *link_info,
5547 const char *name,
5548 char **error_message)
5549 {
5550 char *tmp_name;
5551 struct elf_link_hash_entry *myh;
5552 struct elf32_arm_link_hash_table *hash_table;
5553
5554 /* We need a pointer to the elfarm specific hash table. */
5555 hash_table = elf32_arm_hash_table (link_info);
5556 if (hash_table == NULL)
5557 return NULL;
5558
5559 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5560 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5561
5562 BFD_ASSERT (tmp_name);
5563
5564 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5565
5566 myh = elf_link_hash_lookup
5567 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5568
5569 if (myh == NULL
5570 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5571 tmp_name, name) == -1)
5572 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5573
5574 free (tmp_name);
5575
5576 return myh;
5577 }
5578
5579 /* ARM->Thumb glue (static images):
5580
5581 .arm
5582 __func_from_arm:
5583 ldr r12, __func_addr
5584 bx r12
5585 __func_addr:
5586 .word func @ behave as if you saw a ARM_32 reloc.
5587
5588 (v5t static images)
5589 .arm
5590 __func_from_arm:
5591 ldr pc, __func_addr
5592 __func_addr:
5593 .word func @ behave as if you saw a ARM_32 reloc.
5594
5595 (relocatable images)
5596 .arm
5597 __func_from_arm:
5598 ldr r12, __func_offset
5599 add r12, r12, pc
5600 bx r12
5601 __func_offset:
5602 .word func - . */
5603
5604 #define ARM2THUMB_STATIC_GLUE_SIZE 12
5605 static const insn32 a2t1_ldr_insn = 0xe59fc000;
5606 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5607 static const insn32 a2t3_func_addr_insn = 0x00000001;
5608
5609 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5610 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5611 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5612
5613 #define ARM2THUMB_PIC_GLUE_SIZE 16
5614 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5615 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5616 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5617
5618 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
5619
5620 .thumb .thumb
5621 .align 2 .align 2
5622 __func_from_thumb: __func_from_thumb:
5623 bx pc push {r6, lr}
5624 nop ldr r6, __func_addr
5625 .arm mov lr, pc
5626 b func bx r6
5627 .arm
5628 ;; back_to_thumb
5629 ldmia r13! {r6, lr}
5630 bx lr
5631 __func_addr:
5632 .word func */
5633
5634 #define THUMB2ARM_GLUE_SIZE 8
5635 static const insn16 t2a1_bx_pc_insn = 0x4778;
5636 static const insn16 t2a2_noop_insn = 0x46c0;
5637 static const insn32 t2a3_b_insn = 0xea000000;
5638
5639 #define VFP11_ERRATUM_VENEER_SIZE 8
5640
5641 #define ARM_BX_VENEER_SIZE 12
5642 static const insn32 armbx1_tst_insn = 0xe3100001;
5643 static const insn32 armbx2_moveq_insn = 0x01a0f000;
5644 static const insn32 armbx3_bx_insn = 0xe12fff10;
5645
5646 #ifndef ELFARM_NABI_C_INCLUDED
5647 static void
5648 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
5649 {
5650 asection * s;
5651 bfd_byte * contents;
5652
5653 if (size == 0)
5654 {
5655 /* Do not include empty glue sections in the output. */
5656 if (abfd != NULL)
5657 {
5658 s = bfd_get_linker_section (abfd, name);
5659 if (s != NULL)
5660 s->flags |= SEC_EXCLUDE;
5661 }
5662 return;
5663 }
5664
5665 BFD_ASSERT (abfd != NULL);
5666
5667 s = bfd_get_linker_section (abfd, name);
5668 BFD_ASSERT (s != NULL);
5669
5670 contents = (bfd_byte *) bfd_alloc (abfd, size);
5671
5672 BFD_ASSERT (s->size == size);
5673 s->contents = contents;
5674 }
5675
5676 bfd_boolean
5677 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5678 {
5679 struct elf32_arm_link_hash_table * globals;
5680
5681 globals = elf32_arm_hash_table (info);
5682 BFD_ASSERT (globals != NULL);
5683
5684 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5685 globals->arm_glue_size,
5686 ARM2THUMB_GLUE_SECTION_NAME);
5687
5688 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5689 globals->thumb_glue_size,
5690 THUMB2ARM_GLUE_SECTION_NAME);
5691
5692 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5693 globals->vfp11_erratum_glue_size,
5694 VFP11_ERRATUM_VENEER_SECTION_NAME);
5695
5696 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5697 globals->bx_glue_size,
5698 ARM_BX_GLUE_SECTION_NAME);
5699
5700 return TRUE;
5701 }
5702
5703 /* Allocate space and symbols for calling a Thumb function from Arm mode.
5704 returns the symbol identifying the stub. */
5705
5706 static struct elf_link_hash_entry *
5707 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5708 struct elf_link_hash_entry * h)
5709 {
5710 const char * name = h->root.root.string;
5711 asection * s;
5712 char * tmp_name;
5713 struct elf_link_hash_entry * myh;
5714 struct bfd_link_hash_entry * bh;
5715 struct elf32_arm_link_hash_table * globals;
5716 bfd_vma val;
5717 bfd_size_type size;
5718
5719 globals = elf32_arm_hash_table (link_info);
5720 BFD_ASSERT (globals != NULL);
5721 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5722
5723 s = bfd_get_linker_section
5724 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5725
5726 BFD_ASSERT (s != NULL);
5727
5728 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5729 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5730
5731 BFD_ASSERT (tmp_name);
5732
5733 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5734
5735 myh = elf_link_hash_lookup
5736 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
5737
5738 if (myh != NULL)
5739 {
5740 /* We've already seen this guy. */
5741 free (tmp_name);
5742 return myh;
5743 }
5744
5745 /* The only trick here is using hash_table->arm_glue_size as the value.
5746 Even though the section isn't allocated yet, this is where we will be
5747 putting it. The +1 on the value marks that the stub has not been
5748 output yet - not that it is a Thumb function. */
5749 bh = NULL;
5750 val = globals->arm_glue_size + 1;
5751 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5752 tmp_name, BSF_GLOBAL, s, val,
5753 NULL, TRUE, FALSE, &bh);
5754
5755 myh = (struct elf_link_hash_entry *) bh;
5756 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5757 myh->forced_local = 1;
5758
5759 free (tmp_name);
5760
5761 if (link_info->shared || globals->root.is_relocatable_executable
5762 || globals->pic_veneer)
5763 size = ARM2THUMB_PIC_GLUE_SIZE;
5764 else if (globals->use_blx)
5765 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
5766 else
5767 size = ARM2THUMB_STATIC_GLUE_SIZE;
5768
5769 s->size += size;
5770 globals->arm_glue_size += size;
5771
5772 return myh;
5773 }
5774
5775 /* Allocate space for ARMv4 BX veneers. */
5776
5777 static void
5778 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5779 {
5780 asection * s;
5781 struct elf32_arm_link_hash_table *globals;
5782 char *tmp_name;
5783 struct elf_link_hash_entry *myh;
5784 struct bfd_link_hash_entry *bh;
5785 bfd_vma val;
5786
5787 /* BX PC does not need a veneer. */
5788 if (reg == 15)
5789 return;
5790
5791 globals = elf32_arm_hash_table (link_info);
5792 BFD_ASSERT (globals != NULL);
5793 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5794
5795 /* Check if this veneer has already been allocated. */
5796 if (globals->bx_glue_offset[reg])
5797 return;
5798
5799 s = bfd_get_linker_section
5800 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5801
5802 BFD_ASSERT (s != NULL);
5803
5804 /* Add symbol for veneer. */
5805 tmp_name = (char *)
5806 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
5807
5808 BFD_ASSERT (tmp_name);
5809
5810 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
5811
5812 myh = elf_link_hash_lookup
5813 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
5814
5815 BFD_ASSERT (myh == NULL);
5816
5817 bh = NULL;
5818 val = globals->bx_glue_size;
5819 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5820 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5821 NULL, TRUE, FALSE, &bh);
5822
5823 myh = (struct elf_link_hash_entry *) bh;
5824 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5825 myh->forced_local = 1;
5826
5827 s->size += ARM_BX_VENEER_SIZE;
5828 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5829 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5830 }
5831
5832
5833 /* Add an entry to the code/data map for section SEC. */
5834
5835 static void
5836 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5837 {
5838 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5839 unsigned int newidx;
5840
5841 if (sec_data->map == NULL)
5842 {
5843 sec_data->map = (elf32_arm_section_map *)
5844 bfd_malloc (sizeof (elf32_arm_section_map));
5845 sec_data->mapcount = 0;
5846 sec_data->mapsize = 1;
5847 }
5848
5849 newidx = sec_data->mapcount++;
5850
5851 if (sec_data->mapcount > sec_data->mapsize)
5852 {
5853 sec_data->mapsize *= 2;
5854 sec_data->map = (elf32_arm_section_map *)
5855 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5856 * sizeof (elf32_arm_section_map));
5857 }
5858
5859 if (sec_data->map)
5860 {
5861 sec_data->map[newidx].vma = vma;
5862 sec_data->map[newidx].type = type;
5863 }
5864 }
5865
5866
5867 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5868 veneers are handled for now. */
5869
5870 static bfd_vma
5871 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5872 elf32_vfp11_erratum_list *branch,
5873 bfd *branch_bfd,
5874 asection *branch_sec,
5875 unsigned int offset)
5876 {
5877 asection *s;
5878 struct elf32_arm_link_hash_table *hash_table;
5879 char *tmp_name;
5880 struct elf_link_hash_entry *myh;
5881 struct bfd_link_hash_entry *bh;
5882 bfd_vma val;
5883 struct _arm_elf_section_data *sec_data;
5884 elf32_vfp11_erratum_list *newerr;
5885
5886 hash_table = elf32_arm_hash_table (link_info);
5887 BFD_ASSERT (hash_table != NULL);
5888 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
5889
5890 s = bfd_get_linker_section
5891 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
5892
5893 sec_data = elf32_arm_section_data (s);
5894
5895 BFD_ASSERT (s != NULL);
5896
5897 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5898 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
5899
5900 BFD_ASSERT (tmp_name);
5901
5902 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5903 hash_table->num_vfp11_fixes);
5904
5905 myh = elf_link_hash_lookup
5906 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5907
5908 BFD_ASSERT (myh == NULL);
5909
5910 bh = NULL;
5911 val = hash_table->vfp11_erratum_glue_size;
5912 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5913 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5914 NULL, TRUE, FALSE, &bh);
5915
5916 myh = (struct elf_link_hash_entry *) bh;
5917 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5918 myh->forced_local = 1;
5919
5920 /* Link veneer back to calling location. */
5921 sec_data->erratumcount += 1;
5922 newerr = (elf32_vfp11_erratum_list *)
5923 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
5924
5925 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5926 newerr->vma = -1;
5927 newerr->u.v.branch = branch;
5928 newerr->u.v.id = hash_table->num_vfp11_fixes;
5929 branch->u.b.veneer = newerr;
5930
5931 newerr->next = sec_data->erratumlist;
5932 sec_data->erratumlist = newerr;
5933
5934 /* A symbol for the return from the veneer. */
5935 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5936 hash_table->num_vfp11_fixes);
5937
5938 myh = elf_link_hash_lookup
5939 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5940
5941 if (myh != NULL)
5942 abort ();
5943
5944 bh = NULL;
5945 val = offset + 4;
5946 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5947 branch_sec, val, NULL, TRUE, FALSE, &bh);
5948
5949 myh = (struct elf_link_hash_entry *) bh;
5950 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5951 myh->forced_local = 1;
5952
5953 free (tmp_name);
5954
5955 /* Generate a mapping symbol for the veneer section, and explicitly add an
5956 entry for that symbol to the code/data map for the section. */
5957 if (hash_table->vfp11_erratum_glue_size == 0)
5958 {
5959 bh = NULL;
5960 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5961 ever requires this erratum fix. */
5962 _bfd_generic_link_add_one_symbol (link_info,
5963 hash_table->bfd_of_glue_owner, "$a",
5964 BSF_LOCAL, s, 0, NULL,
5965 TRUE, FALSE, &bh);
5966
5967 myh = (struct elf_link_hash_entry *) bh;
5968 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5969 myh->forced_local = 1;
5970
5971 /* The elf32_arm_init_maps function only cares about symbols from input
5972 BFDs. We must make a note of this generated mapping symbol
5973 ourselves so that code byteswapping works properly in
5974 elf32_arm_write_section. */
5975 elf32_arm_section_map_add (s, 'a', 0);
5976 }
5977
5978 s->size += VFP11_ERRATUM_VENEER_SIZE;
5979 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5980 hash_table->num_vfp11_fixes++;
5981
5982 /* The offset of the veneer. */
5983 return val;
5984 }
5985
5986 #define ARM_GLUE_SECTION_FLAGS \
5987 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5988 | SEC_READONLY | SEC_LINKER_CREATED)
5989
5990 /* Create a fake section for use by the ARM backend of the linker. */
5991
5992 static bfd_boolean
5993 arm_make_glue_section (bfd * abfd, const char * name)
5994 {
5995 asection * sec;
5996
5997 sec = bfd_get_linker_section (abfd, name);
5998 if (sec != NULL)
5999 /* Already made. */
6000 return TRUE;
6001
6002 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
6003
6004 if (sec == NULL
6005 || !bfd_set_section_alignment (abfd, sec, 2))
6006 return FALSE;
6007
6008 /* Set the gc mark to prevent the section from being removed by garbage
6009 collection, despite the fact that no relocs refer to this section. */
6010 sec->gc_mark = 1;
6011
6012 return TRUE;
6013 }
6014
6015 /* Add the glue sections to ABFD. This function is called from the
6016 linker scripts in ld/emultempl/{armelf}.em. */
6017
6018 bfd_boolean
6019 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6020 struct bfd_link_info *info)
6021 {
6022 /* If we are only performing a partial
6023 link do not bother adding the glue. */
6024 if (info->relocatable)
6025 return TRUE;
6026
6027 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6028 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6029 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6030 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
6031 }
6032
6033 /* Select a BFD to be used to hold the sections used by the glue code.
6034 This function is called from the linker scripts in ld/emultempl/
6035 {armelf/pe}.em. */
6036
6037 bfd_boolean
6038 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
6039 {
6040 struct elf32_arm_link_hash_table *globals;
6041
6042 /* If we are only performing a partial link
6043 do not bother getting a bfd to hold the glue. */
6044 if (info->relocatable)
6045 return TRUE;
6046
6047 /* Make sure we don't attach the glue sections to a dynamic object. */
6048 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6049
6050 globals = elf32_arm_hash_table (info);
6051 BFD_ASSERT (globals != NULL);
6052
6053 if (globals->bfd_of_glue_owner != NULL)
6054 return TRUE;
6055
6056 /* Save the bfd for later use. */
6057 globals->bfd_of_glue_owner = abfd;
6058
6059 return TRUE;
6060 }
6061
6062 static void
6063 check_use_blx (struct elf32_arm_link_hash_table *globals)
6064 {
6065 int cpu_arch;
6066
6067 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
6068 Tag_CPU_arch);
6069
6070 if (globals->fix_arm1176)
6071 {
6072 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6073 globals->use_blx = 1;
6074 }
6075 else
6076 {
6077 if (cpu_arch > TAG_CPU_ARCH_V4T)
6078 globals->use_blx = 1;
6079 }
6080 }
6081
6082 bfd_boolean
6083 bfd_elf32_arm_process_before_allocation (bfd *abfd,
6084 struct bfd_link_info *link_info)
6085 {
6086 Elf_Internal_Shdr *symtab_hdr;
6087 Elf_Internal_Rela *internal_relocs = NULL;
6088 Elf_Internal_Rela *irel, *irelend;
6089 bfd_byte *contents = NULL;
6090
6091 asection *sec;
6092 struct elf32_arm_link_hash_table *globals;
6093
6094 /* If we are only performing a partial link do not bother
6095 to construct any glue. */
6096 if (link_info->relocatable)
6097 return TRUE;
6098
6099 /* Here we have a bfd that is to be included on the link. We have a
6100 hook to do reloc rummaging, before section sizes are nailed down. */
6101 globals = elf32_arm_hash_table (link_info);
6102 BFD_ASSERT (globals != NULL);
6103
6104 check_use_blx (globals);
6105
6106 if (globals->byteswap_code && !bfd_big_endian (abfd))
6107 {
6108 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6109 abfd);
6110 return FALSE;
6111 }
6112
6113 /* PR 5398: If we have not decided to include any loadable sections in
6114 the output then we will not have a glue owner bfd. This is OK, it
6115 just means that there is nothing else for us to do here. */
6116 if (globals->bfd_of_glue_owner == NULL)
6117 return TRUE;
6118
6119 /* Rummage around all the relocs and map the glue vectors. */
6120 sec = abfd->sections;
6121
6122 if (sec == NULL)
6123 return TRUE;
6124
6125 for (; sec != NULL; sec = sec->next)
6126 {
6127 if (sec->reloc_count == 0)
6128 continue;
6129
6130 if ((sec->flags & SEC_EXCLUDE) != 0)
6131 continue;
6132
6133 symtab_hdr = & elf_symtab_hdr (abfd);
6134
6135 /* Load the relocs. */
6136 internal_relocs
6137 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
6138
6139 if (internal_relocs == NULL)
6140 goto error_return;
6141
6142 irelend = internal_relocs + sec->reloc_count;
6143 for (irel = internal_relocs; irel < irelend; irel++)
6144 {
6145 long r_type;
6146 unsigned long r_index;
6147
6148 struct elf_link_hash_entry *h;
6149
6150 r_type = ELF32_R_TYPE (irel->r_info);
6151 r_index = ELF32_R_SYM (irel->r_info);
6152
6153 /* These are the only relocation types we care about. */
6154 if ( r_type != R_ARM_PC24
6155 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
6156 continue;
6157
6158 /* Get the section contents if we haven't done so already. */
6159 if (contents == NULL)
6160 {
6161 /* Get cached copy if it exists. */
6162 if (elf_section_data (sec)->this_hdr.contents != NULL)
6163 contents = elf_section_data (sec)->this_hdr.contents;
6164 else
6165 {
6166 /* Go get them off disk. */
6167 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6168 goto error_return;
6169 }
6170 }
6171
6172 if (r_type == R_ARM_V4BX)
6173 {
6174 int reg;
6175
6176 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6177 record_arm_bx_glue (link_info, reg);
6178 continue;
6179 }
6180
6181 /* If the relocation is not against a symbol it cannot concern us. */
6182 h = NULL;
6183
6184 /* We don't care about local symbols. */
6185 if (r_index < symtab_hdr->sh_info)
6186 continue;
6187
6188 /* This is an external symbol. */
6189 r_index -= symtab_hdr->sh_info;
6190 h = (struct elf_link_hash_entry *)
6191 elf_sym_hashes (abfd)[r_index];
6192
6193 /* If the relocation is against a static symbol it must be within
6194 the current section and so cannot be a cross ARM/Thumb relocation. */
6195 if (h == NULL)
6196 continue;
6197
6198 /* If the call will go through a PLT entry then we do not need
6199 glue. */
6200 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
6201 continue;
6202
6203 switch (r_type)
6204 {
6205 case R_ARM_PC24:
6206 /* This one is a call from arm code. We need to look up
6207 the target of the call. If it is a thumb target, we
6208 insert glue. */
6209 if (h->target_internal == ST_BRANCH_TO_THUMB)
6210 record_arm_to_thumb_glue (link_info, h);
6211 break;
6212
6213 default:
6214 abort ();
6215 }
6216 }
6217
6218 if (contents != NULL
6219 && elf_section_data (sec)->this_hdr.contents != contents)
6220 free (contents);
6221 contents = NULL;
6222
6223 if (internal_relocs != NULL
6224 && elf_section_data (sec)->relocs != internal_relocs)
6225 free (internal_relocs);
6226 internal_relocs = NULL;
6227 }
6228
6229 return TRUE;
6230
6231 error_return:
6232 if (contents != NULL
6233 && elf_section_data (sec)->this_hdr.contents != contents)
6234 free (contents);
6235 if (internal_relocs != NULL
6236 && elf_section_data (sec)->relocs != internal_relocs)
6237 free (internal_relocs);
6238
6239 return FALSE;
6240 }
6241 #endif
6242
6243
6244 /* Initialise maps of ARM/Thumb/data for input BFDs. */
6245
6246 void
6247 bfd_elf32_arm_init_maps (bfd *abfd)
6248 {
6249 Elf_Internal_Sym *isymbuf;
6250 Elf_Internal_Shdr *hdr;
6251 unsigned int i, localsyms;
6252
6253 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6254 if (! is_arm_elf (abfd))
6255 return;
6256
6257 if ((abfd->flags & DYNAMIC) != 0)
6258 return;
6259
6260 hdr = & elf_symtab_hdr (abfd);
6261 localsyms = hdr->sh_info;
6262
6263 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6264 should contain the number of local symbols, which should come before any
6265 global symbols. Mapping symbols are always local. */
6266 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6267 NULL);
6268
6269 /* No internal symbols read? Skip this BFD. */
6270 if (isymbuf == NULL)
6271 return;
6272
6273 for (i = 0; i < localsyms; i++)
6274 {
6275 Elf_Internal_Sym *isym = &isymbuf[i];
6276 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6277 const char *name;
6278
6279 if (sec != NULL
6280 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6281 {
6282 name = bfd_elf_string_from_elf_section (abfd,
6283 hdr->sh_link, isym->st_name);
6284
6285 if (bfd_is_arm_special_symbol_name (name,
6286 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6287 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6288 }
6289 }
6290 }
6291
6292
6293 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6294 say what they wanted. */
6295
6296 void
6297 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6298 {
6299 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6300 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6301
6302 if (globals == NULL)
6303 return;
6304
6305 if (globals->fix_cortex_a8 == -1)
6306 {
6307 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6308 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6309 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6310 || out_attr[Tag_CPU_arch_profile].i == 0))
6311 globals->fix_cortex_a8 = 1;
6312 else
6313 globals->fix_cortex_a8 = 0;
6314 }
6315 }
6316
6317
6318 void
6319 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6320 {
6321 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6322 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6323
6324 if (globals == NULL)
6325 return;
6326 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6327 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6328 {
6329 switch (globals->vfp11_fix)
6330 {
6331 case BFD_ARM_VFP11_FIX_DEFAULT:
6332 case BFD_ARM_VFP11_FIX_NONE:
6333 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6334 break;
6335
6336 default:
6337 /* Give a warning, but do as the user requests anyway. */
6338 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6339 "workaround is not necessary for target architecture"), obfd);
6340 }
6341 }
6342 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6343 /* For earlier architectures, we might need the workaround, but do not
6344 enable it by default. If users is running with broken hardware, they
6345 must enable the erratum fix explicitly. */
6346 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6347 }
6348
6349
6350 enum bfd_arm_vfp11_pipe
6351 {
6352 VFP11_FMAC,
6353 VFP11_LS,
6354 VFP11_DS,
6355 VFP11_BAD
6356 };
6357
6358 /* Return a VFP register number. This is encoded as RX:X for single-precision
6359 registers, or X:RX for double-precision registers, where RX is the group of
6360 four bits in the instruction encoding and X is the single extension bit.
6361 RX and X fields are specified using their lowest (starting) bit. The return
6362 value is:
6363
6364 0...31: single-precision registers s0...s31
6365 32...63: double-precision registers d0...d31.
6366
6367 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6368 encounter VFP3 instructions, so we allow the full range for DP registers. */
6369
6370 static unsigned int
6371 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6372 unsigned int x)
6373 {
6374 if (is_double)
6375 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6376 else
6377 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6378 }
6379
6380 /* Set bits in *WMASK according to a register number REG as encoded by
6381 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6382
6383 static void
6384 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6385 {
6386 if (reg < 32)
6387 *wmask |= 1 << reg;
6388 else if (reg < 48)
6389 *wmask |= 3 << ((reg - 32) * 2);
6390 }
6391
6392 /* Return TRUE if WMASK overwrites anything in REGS. */
6393
6394 static bfd_boolean
6395 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6396 {
6397 int i;
6398
6399 for (i = 0; i < numregs; i++)
6400 {
6401 unsigned int reg = regs[i];
6402
6403 if (reg < 32 && (wmask & (1 << reg)) != 0)
6404 return TRUE;
6405
6406 reg -= 32;
6407
6408 if (reg >= 16)
6409 continue;
6410
6411 if ((wmask & (3 << (reg * 2))) != 0)
6412 return TRUE;
6413 }
6414
6415 return FALSE;
6416 }
6417
6418 /* In this function, we're interested in two things: finding input registers
6419 for VFP data-processing instructions, and finding the set of registers which
6420 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6421 hold the written set, so FLDM etc. are easy to deal with (we're only
6422 interested in 32 SP registers or 16 dp registers, due to the VFP version
6423 implemented by the chip in question). DP registers are marked by setting
6424 both SP registers in the write mask). */
6425
6426 static enum bfd_arm_vfp11_pipe
6427 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6428 int *numregs)
6429 {
6430 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
6431 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6432
6433 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6434 {
6435 unsigned int pqrs;
6436 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6437 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6438
6439 pqrs = ((insn & 0x00800000) >> 20)
6440 | ((insn & 0x00300000) >> 19)
6441 | ((insn & 0x00000040) >> 6);
6442
6443 switch (pqrs)
6444 {
6445 case 0: /* fmac[sd]. */
6446 case 1: /* fnmac[sd]. */
6447 case 2: /* fmsc[sd]. */
6448 case 3: /* fnmsc[sd]. */
6449 vpipe = VFP11_FMAC;
6450 bfd_arm_vfp11_write_mask (destmask, fd);
6451 regs[0] = fd;
6452 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6453 regs[2] = fm;
6454 *numregs = 3;
6455 break;
6456
6457 case 4: /* fmul[sd]. */
6458 case 5: /* fnmul[sd]. */
6459 case 6: /* fadd[sd]. */
6460 case 7: /* fsub[sd]. */
6461 vpipe = VFP11_FMAC;
6462 goto vfp_binop;
6463
6464 case 8: /* fdiv[sd]. */
6465 vpipe = VFP11_DS;
6466 vfp_binop:
6467 bfd_arm_vfp11_write_mask (destmask, fd);
6468 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6469 regs[1] = fm;
6470 *numregs = 2;
6471 break;
6472
6473 case 15: /* extended opcode. */
6474 {
6475 unsigned int extn = ((insn >> 15) & 0x1e)
6476 | ((insn >> 7) & 1);
6477
6478 switch (extn)
6479 {
6480 case 0: /* fcpy[sd]. */
6481 case 1: /* fabs[sd]. */
6482 case 2: /* fneg[sd]. */
6483 case 8: /* fcmp[sd]. */
6484 case 9: /* fcmpe[sd]. */
6485 case 10: /* fcmpz[sd]. */
6486 case 11: /* fcmpez[sd]. */
6487 case 16: /* fuito[sd]. */
6488 case 17: /* fsito[sd]. */
6489 case 24: /* ftoui[sd]. */
6490 case 25: /* ftouiz[sd]. */
6491 case 26: /* ftosi[sd]. */
6492 case 27: /* ftosiz[sd]. */
6493 /* These instructions will not bounce due to underflow. */
6494 *numregs = 0;
6495 vpipe = VFP11_FMAC;
6496 break;
6497
6498 case 3: /* fsqrt[sd]. */
6499 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6500 registers to cause the erratum in previous instructions. */
6501 bfd_arm_vfp11_write_mask (destmask, fd);
6502 vpipe = VFP11_DS;
6503 break;
6504
6505 case 15: /* fcvt{ds,sd}. */
6506 {
6507 int rnum = 0;
6508
6509 bfd_arm_vfp11_write_mask (destmask, fd);
6510
6511 /* Only FCVTSD can underflow. */
6512 if ((insn & 0x100) != 0)
6513 regs[rnum++] = fm;
6514
6515 *numregs = rnum;
6516
6517 vpipe = VFP11_FMAC;
6518 }
6519 break;
6520
6521 default:
6522 return VFP11_BAD;
6523 }
6524 }
6525 break;
6526
6527 default:
6528 return VFP11_BAD;
6529 }
6530 }
6531 /* Two-register transfer. */
6532 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6533 {
6534 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6535
6536 if ((insn & 0x100000) == 0)
6537 {
6538 if (is_double)
6539 bfd_arm_vfp11_write_mask (destmask, fm);
6540 else
6541 {
6542 bfd_arm_vfp11_write_mask (destmask, fm);
6543 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6544 }
6545 }
6546
6547 vpipe = VFP11_LS;
6548 }
6549 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6550 {
6551 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6552 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
6553
6554 switch (puw)
6555 {
6556 case 0: /* Two-reg transfer. We should catch these above. */
6557 abort ();
6558
6559 case 2: /* fldm[sdx]. */
6560 case 3:
6561 case 5:
6562 {
6563 unsigned int i, offset = insn & 0xff;
6564
6565 if (is_double)
6566 offset >>= 1;
6567
6568 for (i = fd; i < fd + offset; i++)
6569 bfd_arm_vfp11_write_mask (destmask, i);
6570 }
6571 break;
6572
6573 case 4: /* fld[sd]. */
6574 case 6:
6575 bfd_arm_vfp11_write_mask (destmask, fd);
6576 break;
6577
6578 default:
6579 return VFP11_BAD;
6580 }
6581
6582 vpipe = VFP11_LS;
6583 }
6584 /* Single-register transfer. Note L==0. */
6585 else if ((insn & 0x0f100e10) == 0x0e000a10)
6586 {
6587 unsigned int opcode = (insn >> 21) & 7;
6588 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6589
6590 switch (opcode)
6591 {
6592 case 0: /* fmsr/fmdlr. */
6593 case 1: /* fmdhr. */
6594 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6595 destination register. I don't know if this is exactly right,
6596 but it is the conservative choice. */
6597 bfd_arm_vfp11_write_mask (destmask, fn);
6598 break;
6599
6600 case 7: /* fmxr. */
6601 break;
6602 }
6603
6604 vpipe = VFP11_LS;
6605 }
6606
6607 return vpipe;
6608 }
6609
6610
6611 static int elf32_arm_compare_mapping (const void * a, const void * b);
6612
6613
6614 /* Look for potentially-troublesome code sequences which might trigger the
6615 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6616 (available from ARM) for details of the erratum. A short version is
6617 described in ld.texinfo. */
6618
6619 bfd_boolean
6620 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6621 {
6622 asection *sec;
6623 bfd_byte *contents = NULL;
6624 int state = 0;
6625 int regs[3], numregs = 0;
6626 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6627 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
6628
6629 if (globals == NULL)
6630 return FALSE;
6631
6632 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6633 The states transition as follows:
6634
6635 0 -> 1 (vector) or 0 -> 2 (scalar)
6636 A VFP FMAC-pipeline instruction has been seen. Fill
6637 regs[0]..regs[numregs-1] with its input operands. Remember this
6638 instruction in 'first_fmac'.
6639
6640 1 -> 2
6641 Any instruction, except for a VFP instruction which overwrites
6642 regs[*].
6643
6644 1 -> 3 [ -> 0 ] or
6645 2 -> 3 [ -> 0 ]
6646 A VFP instruction has been seen which overwrites any of regs[*].
6647 We must make a veneer! Reset state to 0 before examining next
6648 instruction.
6649
6650 2 -> 0
6651 If we fail to match anything in state 2, reset to state 0 and reset
6652 the instruction pointer to the instruction after 'first_fmac'.
6653
6654 If the VFP11 vector mode is in use, there must be at least two unrelated
6655 instructions between anti-dependent VFP11 instructions to properly avoid
6656 triggering the erratum, hence the use of the extra state 1. */
6657
6658 /* If we are only performing a partial link do not bother
6659 to construct any glue. */
6660 if (link_info->relocatable)
6661 return TRUE;
6662
6663 /* Skip if this bfd does not correspond to an ELF image. */
6664 if (! is_arm_elf (abfd))
6665 return TRUE;
6666
6667 /* We should have chosen a fix type by the time we get here. */
6668 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6669
6670 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6671 return TRUE;
6672
6673 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6674 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6675 return TRUE;
6676
6677 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6678 {
6679 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6680 struct _arm_elf_section_data *sec_data;
6681
6682 /* If we don't have executable progbits, we're not interested in this
6683 section. Also skip if section is to be excluded. */
6684 if (elf_section_type (sec) != SHT_PROGBITS
6685 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6686 || (sec->flags & SEC_EXCLUDE) != 0
6687 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
6688 || sec->output_section == bfd_abs_section_ptr
6689 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6690 continue;
6691
6692 sec_data = elf32_arm_section_data (sec);
6693
6694 if (sec_data->mapcount == 0)
6695 continue;
6696
6697 if (elf_section_data (sec)->this_hdr.contents != NULL)
6698 contents = elf_section_data (sec)->this_hdr.contents;
6699 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6700 goto error_return;
6701
6702 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6703 elf32_arm_compare_mapping);
6704
6705 for (span = 0; span < sec_data->mapcount; span++)
6706 {
6707 unsigned int span_start = sec_data->map[span].vma;
6708 unsigned int span_end = (span == sec_data->mapcount - 1)
6709 ? sec->size : sec_data->map[span + 1].vma;
6710 char span_type = sec_data->map[span].type;
6711
6712 /* FIXME: Only ARM mode is supported at present. We may need to
6713 support Thumb-2 mode also at some point. */
6714 if (span_type != 'a')
6715 continue;
6716
6717 for (i = span_start; i < span_end;)
6718 {
6719 unsigned int next_i = i + 4;
6720 unsigned int insn = bfd_big_endian (abfd)
6721 ? (contents[i] << 24)
6722 | (contents[i + 1] << 16)
6723 | (contents[i + 2] << 8)
6724 | contents[i + 3]
6725 : (contents[i + 3] << 24)
6726 | (contents[i + 2] << 16)
6727 | (contents[i + 1] << 8)
6728 | contents[i];
6729 unsigned int writemask = 0;
6730 enum bfd_arm_vfp11_pipe vpipe;
6731
6732 switch (state)
6733 {
6734 case 0:
6735 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
6736 &numregs);
6737 /* I'm assuming the VFP11 erratum can trigger with denorm
6738 operands on either the FMAC or the DS pipeline. This might
6739 lead to slightly overenthusiastic veneer insertion. */
6740 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
6741 {
6742 state = use_vector ? 1 : 2;
6743 first_fmac = i;
6744 veneer_of_insn = insn;
6745 }
6746 break;
6747
6748 case 1:
6749 {
6750 int other_regs[3], other_numregs;
6751 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6752 other_regs,
6753 &other_numregs);
6754 if (vpipe != VFP11_BAD
6755 && bfd_arm_vfp11_antidependency (writemask, regs,
6756 numregs))
6757 state = 3;
6758 else
6759 state = 2;
6760 }
6761 break;
6762
6763 case 2:
6764 {
6765 int other_regs[3], other_numregs;
6766 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6767 other_regs,
6768 &other_numregs);
6769 if (vpipe != VFP11_BAD
6770 && bfd_arm_vfp11_antidependency (writemask, regs,
6771 numregs))
6772 state = 3;
6773 else
6774 {
6775 state = 0;
6776 next_i = first_fmac + 4;
6777 }
6778 }
6779 break;
6780
6781 case 3:
6782 abort (); /* Should be unreachable. */
6783 }
6784
6785 if (state == 3)
6786 {
6787 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6788 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6789
6790 elf32_arm_section_data (sec)->erratumcount += 1;
6791
6792 newerr->u.b.vfp_insn = veneer_of_insn;
6793
6794 switch (span_type)
6795 {
6796 case 'a':
6797 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6798 break;
6799
6800 default:
6801 abort ();
6802 }
6803
6804 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6805 first_fmac);
6806
6807 newerr->vma = -1;
6808
6809 newerr->next = sec_data->erratumlist;
6810 sec_data->erratumlist = newerr;
6811
6812 state = 0;
6813 }
6814
6815 i = next_i;
6816 }
6817 }
6818
6819 if (contents != NULL
6820 && elf_section_data (sec)->this_hdr.contents != contents)
6821 free (contents);
6822 contents = NULL;
6823 }
6824
6825 return TRUE;
6826
6827 error_return:
6828 if (contents != NULL
6829 && elf_section_data (sec)->this_hdr.contents != contents)
6830 free (contents);
6831
6832 return FALSE;
6833 }
6834
6835 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6836 after sections have been laid out, using specially-named symbols. */
6837
6838 void
6839 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6840 struct bfd_link_info *link_info)
6841 {
6842 asection *sec;
6843 struct elf32_arm_link_hash_table *globals;
6844 char *tmp_name;
6845
6846 if (link_info->relocatable)
6847 return;
6848
6849 /* Skip if this bfd does not correspond to an ELF image. */
6850 if (! is_arm_elf (abfd))
6851 return;
6852
6853 globals = elf32_arm_hash_table (link_info);
6854 if (globals == NULL)
6855 return;
6856
6857 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6858 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6859
6860 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6861 {
6862 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6863 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
6864
6865 for (; errnode != NULL; errnode = errnode->next)
6866 {
6867 struct elf_link_hash_entry *myh;
6868 bfd_vma vma;
6869
6870 switch (errnode->type)
6871 {
6872 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6873 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6874 /* Find veneer symbol. */
6875 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6876 errnode->u.b.veneer->u.v.id);
6877
6878 myh = elf_link_hash_lookup
6879 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6880
6881 if (myh == NULL)
6882 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6883 "`%s'"), abfd, tmp_name);
6884
6885 vma = myh->root.u.def.section->output_section->vma
6886 + myh->root.u.def.section->output_offset
6887 + myh->root.u.def.value;
6888
6889 errnode->u.b.veneer->vma = vma;
6890 break;
6891
6892 case VFP11_ERRATUM_ARM_VENEER:
6893 case VFP11_ERRATUM_THUMB_VENEER:
6894 /* Find return location. */
6895 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6896 errnode->u.v.id);
6897
6898 myh = elf_link_hash_lookup
6899 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6900
6901 if (myh == NULL)
6902 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6903 "`%s'"), abfd, tmp_name);
6904
6905 vma = myh->root.u.def.section->output_section->vma
6906 + myh->root.u.def.section->output_offset
6907 + myh->root.u.def.value;
6908
6909 errnode->u.v.branch->vma = vma;
6910 break;
6911
6912 default:
6913 abort ();
6914 }
6915 }
6916 }
6917
6918 free (tmp_name);
6919 }
6920
6921
6922 /* Set target relocation values needed during linking. */
6923
6924 void
6925 bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6926 struct bfd_link_info *link_info,
6927 int target1_is_rel,
6928 char * target2_type,
6929 int fix_v4bx,
6930 int use_blx,
6931 bfd_arm_vfp11_fix vfp11_fix,
6932 int no_enum_warn, int no_wchar_warn,
6933 int pic_veneer, int fix_cortex_a8,
6934 int fix_arm1176)
6935 {
6936 struct elf32_arm_link_hash_table *globals;
6937
6938 globals = elf32_arm_hash_table (link_info);
6939 if (globals == NULL)
6940 return;
6941
6942 globals->target1_is_rel = target1_is_rel;
6943 if (strcmp (target2_type, "rel") == 0)
6944 globals->target2_reloc = R_ARM_REL32;
6945 else if (strcmp (target2_type, "abs") == 0)
6946 globals->target2_reloc = R_ARM_ABS32;
6947 else if (strcmp (target2_type, "got-rel") == 0)
6948 globals->target2_reloc = R_ARM_GOT_PREL;
6949 else
6950 {
6951 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6952 target2_type);
6953 }
6954 globals->fix_v4bx = fix_v4bx;
6955 globals->use_blx |= use_blx;
6956 globals->vfp11_fix = vfp11_fix;
6957 globals->pic_veneer = pic_veneer;
6958 globals->fix_cortex_a8 = fix_cortex_a8;
6959 globals->fix_arm1176 = fix_arm1176;
6960
6961 BFD_ASSERT (is_arm_elf (output_bfd));
6962 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
6963 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
6964 }
6965
6966 /* Replace the target offset of a Thumb bl or b.w instruction. */
6967
6968 static void
6969 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6970 {
6971 bfd_vma upper;
6972 bfd_vma lower;
6973 int reloc_sign;
6974
6975 BFD_ASSERT ((offset & 1) == 0);
6976
6977 upper = bfd_get_16 (abfd, insn);
6978 lower = bfd_get_16 (abfd, insn + 2);
6979 reloc_sign = (offset < 0) ? 1 : 0;
6980 upper = (upper & ~(bfd_vma) 0x7ff)
6981 | ((offset >> 12) & 0x3ff)
6982 | (reloc_sign << 10);
6983 lower = (lower & ~(bfd_vma) 0x2fff)
6984 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6985 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6986 | ((offset >> 1) & 0x7ff);
6987 bfd_put_16 (abfd, upper, insn);
6988 bfd_put_16 (abfd, lower, insn + 2);
6989 }
6990
6991 /* Thumb code calling an ARM function. */
6992
6993 static int
6994 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6995 const char * name,
6996 bfd * input_bfd,
6997 bfd * output_bfd,
6998 asection * input_section,
6999 bfd_byte * hit_data,
7000 asection * sym_sec,
7001 bfd_vma offset,
7002 bfd_signed_vma addend,
7003 bfd_vma val,
7004 char **error_message)
7005 {
7006 asection * s = 0;
7007 bfd_vma my_offset;
7008 long int ret_offset;
7009 struct elf_link_hash_entry * myh;
7010 struct elf32_arm_link_hash_table * globals;
7011
7012 myh = find_thumb_glue (info, name, error_message);
7013 if (myh == NULL)
7014 return FALSE;
7015
7016 globals = elf32_arm_hash_table (info);
7017 BFD_ASSERT (globals != NULL);
7018 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7019
7020 my_offset = myh->root.u.def.value;
7021
7022 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7023 THUMB2ARM_GLUE_SECTION_NAME);
7024
7025 BFD_ASSERT (s != NULL);
7026 BFD_ASSERT (s->contents != NULL);
7027 BFD_ASSERT (s->output_section != NULL);
7028
7029 if ((my_offset & 0x01) == 0x01)
7030 {
7031 if (sym_sec != NULL
7032 && sym_sec->owner != NULL
7033 && !INTERWORK_FLAG (sym_sec->owner))
7034 {
7035 (*_bfd_error_handler)
7036 (_("%B(%s): warning: interworking not enabled.\n"
7037 " first occurrence: %B: Thumb call to ARM"),
7038 sym_sec->owner, input_bfd, name);
7039
7040 return FALSE;
7041 }
7042
7043 --my_offset;
7044 myh->root.u.def.value = my_offset;
7045
7046 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7047 s->contents + my_offset);
7048
7049 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7050 s->contents + my_offset + 2);
7051
7052 ret_offset =
7053 /* Address of destination of the stub. */
7054 ((bfd_signed_vma) val)
7055 - ((bfd_signed_vma)
7056 /* Offset from the start of the current section
7057 to the start of the stubs. */
7058 (s->output_offset
7059 /* Offset of the start of this stub from the start of the stubs. */
7060 + my_offset
7061 /* Address of the start of the current section. */
7062 + s->output_section->vma)
7063 /* The branch instruction is 4 bytes into the stub. */
7064 + 4
7065 /* ARM branches work from the pc of the instruction + 8. */
7066 + 8);
7067
7068 put_arm_insn (globals, output_bfd,
7069 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7070 s->contents + my_offset + 4);
7071 }
7072
7073 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7074
7075 /* Now go back and fix up the original BL insn to point to here. */
7076 ret_offset =
7077 /* Address of where the stub is located. */
7078 (s->output_section->vma + s->output_offset + my_offset)
7079 /* Address of where the BL is located. */
7080 - (input_section->output_section->vma + input_section->output_offset
7081 + offset)
7082 /* Addend in the relocation. */
7083 - addend
7084 /* Biassing for PC-relative addressing. */
7085 - 8;
7086
7087 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
7088
7089 return TRUE;
7090 }
7091
7092 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
7093
7094 static struct elf_link_hash_entry *
7095 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7096 const char * name,
7097 bfd * input_bfd,
7098 bfd * output_bfd,
7099 asection * sym_sec,
7100 bfd_vma val,
7101 asection * s,
7102 char ** error_message)
7103 {
7104 bfd_vma my_offset;
7105 long int ret_offset;
7106 struct elf_link_hash_entry * myh;
7107 struct elf32_arm_link_hash_table * globals;
7108
7109 myh = find_arm_glue (info, name, error_message);
7110 if (myh == NULL)
7111 return NULL;
7112
7113 globals = elf32_arm_hash_table (info);
7114 BFD_ASSERT (globals != NULL);
7115 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7116
7117 my_offset = myh->root.u.def.value;
7118
7119 if ((my_offset & 0x01) == 0x01)
7120 {
7121 if (sym_sec != NULL
7122 && sym_sec->owner != NULL
7123 && !INTERWORK_FLAG (sym_sec->owner))
7124 {
7125 (*_bfd_error_handler)
7126 (_("%B(%s): warning: interworking not enabled.\n"
7127 " first occurrence: %B: arm call to thumb"),
7128 sym_sec->owner, input_bfd, name);
7129 }
7130
7131 --my_offset;
7132 myh->root.u.def.value = my_offset;
7133
7134 if (info->shared || globals->root.is_relocatable_executable
7135 || globals->pic_veneer)
7136 {
7137 /* For relocatable objects we can't use absolute addresses,
7138 so construct the address from a relative offset. */
7139 /* TODO: If the offset is small it's probably worth
7140 constructing the address with adds. */
7141 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7142 s->contents + my_offset);
7143 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7144 s->contents + my_offset + 4);
7145 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7146 s->contents + my_offset + 8);
7147 /* Adjust the offset by 4 for the position of the add,
7148 and 8 for the pipeline offset. */
7149 ret_offset = (val - (s->output_offset
7150 + s->output_section->vma
7151 + my_offset + 12))
7152 | 1;
7153 bfd_put_32 (output_bfd, ret_offset,
7154 s->contents + my_offset + 12);
7155 }
7156 else if (globals->use_blx)
7157 {
7158 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7159 s->contents + my_offset);
7160
7161 /* It's a thumb address. Add the low order bit. */
7162 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7163 s->contents + my_offset + 4);
7164 }
7165 else
7166 {
7167 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7168 s->contents + my_offset);
7169
7170 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7171 s->contents + my_offset + 4);
7172
7173 /* It's a thumb address. Add the low order bit. */
7174 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7175 s->contents + my_offset + 8);
7176
7177 my_offset += 12;
7178 }
7179 }
7180
7181 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7182
7183 return myh;
7184 }
7185
7186 /* Arm code calling a Thumb function. */
7187
7188 static int
7189 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7190 const char * name,
7191 bfd * input_bfd,
7192 bfd * output_bfd,
7193 asection * input_section,
7194 bfd_byte * hit_data,
7195 asection * sym_sec,
7196 bfd_vma offset,
7197 bfd_signed_vma addend,
7198 bfd_vma val,
7199 char **error_message)
7200 {
7201 unsigned long int tmp;
7202 bfd_vma my_offset;
7203 asection * s;
7204 long int ret_offset;
7205 struct elf_link_hash_entry * myh;
7206 struct elf32_arm_link_hash_table * globals;
7207
7208 globals = elf32_arm_hash_table (info);
7209 BFD_ASSERT (globals != NULL);
7210 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7211
7212 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7213 ARM2THUMB_GLUE_SECTION_NAME);
7214 BFD_ASSERT (s != NULL);
7215 BFD_ASSERT (s->contents != NULL);
7216 BFD_ASSERT (s->output_section != NULL);
7217
7218 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
7219 sym_sec, val, s, error_message);
7220 if (!myh)
7221 return FALSE;
7222
7223 my_offset = myh->root.u.def.value;
7224 tmp = bfd_get_32 (input_bfd, hit_data);
7225 tmp = tmp & 0xFF000000;
7226
7227 /* Somehow these are both 4 too far, so subtract 8. */
7228 ret_offset = (s->output_offset
7229 + my_offset
7230 + s->output_section->vma
7231 - (input_section->output_offset
7232 + input_section->output_section->vma
7233 + offset + addend)
7234 - 8);
7235
7236 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7237
7238 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
7239
7240 return TRUE;
7241 }
7242
7243 /* Populate Arm stub for an exported Thumb function. */
7244
7245 static bfd_boolean
7246 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7247 {
7248 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7249 asection * s;
7250 struct elf_link_hash_entry * myh;
7251 struct elf32_arm_link_hash_entry *eh;
7252 struct elf32_arm_link_hash_table * globals;
7253 asection *sec;
7254 bfd_vma val;
7255 char *error_message;
7256
7257 eh = elf32_arm_hash_entry (h);
7258 /* Allocate stubs for exported Thumb functions on v4t. */
7259 if (eh->export_glue == NULL)
7260 return TRUE;
7261
7262 globals = elf32_arm_hash_table (info);
7263 BFD_ASSERT (globals != NULL);
7264 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7265
7266 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7267 ARM2THUMB_GLUE_SECTION_NAME);
7268 BFD_ASSERT (s != NULL);
7269 BFD_ASSERT (s->contents != NULL);
7270 BFD_ASSERT (s->output_section != NULL);
7271
7272 sec = eh->export_glue->root.u.def.section;
7273
7274 BFD_ASSERT (sec->output_section != NULL);
7275
7276 val = eh->export_glue->root.u.def.value + sec->output_offset
7277 + sec->output_section->vma;
7278
7279 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7280 h->root.u.def.section->owner,
7281 globals->obfd, sec, val, s,
7282 &error_message);
7283 BFD_ASSERT (myh);
7284 return TRUE;
7285 }
7286
7287 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7288
7289 static bfd_vma
7290 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7291 {
7292 bfd_byte *p;
7293 bfd_vma glue_addr;
7294 asection *s;
7295 struct elf32_arm_link_hash_table *globals;
7296
7297 globals = elf32_arm_hash_table (info);
7298 BFD_ASSERT (globals != NULL);
7299 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7300
7301 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7302 ARM_BX_GLUE_SECTION_NAME);
7303 BFD_ASSERT (s != NULL);
7304 BFD_ASSERT (s->contents != NULL);
7305 BFD_ASSERT (s->output_section != NULL);
7306
7307 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7308
7309 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7310
7311 if ((globals->bx_glue_offset[reg] & 1) == 0)
7312 {
7313 p = s->contents + glue_addr;
7314 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7315 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7316 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7317 globals->bx_glue_offset[reg] |= 1;
7318 }
7319
7320 return glue_addr + s->output_section->vma + s->output_offset;
7321 }
7322
7323 /* Generate Arm stubs for exported Thumb symbols. */
7324 static void
7325 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
7326 struct bfd_link_info *link_info)
7327 {
7328 struct elf32_arm_link_hash_table * globals;
7329
7330 if (link_info == NULL)
7331 /* Ignore this if we are not called by the ELF backend linker. */
7332 return;
7333
7334 globals = elf32_arm_hash_table (link_info);
7335 if (globals == NULL)
7336 return;
7337
7338 /* If blx is available then exported Thumb symbols are OK and there is
7339 nothing to do. */
7340 if (globals->use_blx)
7341 return;
7342
7343 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7344 link_info);
7345 }
7346
7347 /* Reserve space for COUNT dynamic relocations in relocation selection
7348 SRELOC. */
7349
7350 static void
7351 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7352 bfd_size_type count)
7353 {
7354 struct elf32_arm_link_hash_table *htab;
7355
7356 htab = elf32_arm_hash_table (info);
7357 BFD_ASSERT (htab->root.dynamic_sections_created);
7358 if (sreloc == NULL)
7359 abort ();
7360 sreloc->size += RELOC_SIZE (htab) * count;
7361 }
7362
7363 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7364 dynamic, the relocations should go in SRELOC, otherwise they should
7365 go in the special .rel.iplt section. */
7366
7367 static void
7368 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7369 bfd_size_type count)
7370 {
7371 struct elf32_arm_link_hash_table *htab;
7372
7373 htab = elf32_arm_hash_table (info);
7374 if (!htab->root.dynamic_sections_created)
7375 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7376 else
7377 {
7378 BFD_ASSERT (sreloc != NULL);
7379 sreloc->size += RELOC_SIZE (htab) * count;
7380 }
7381 }
7382
7383 /* Add relocation REL to the end of relocation section SRELOC. */
7384
7385 static void
7386 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7387 asection *sreloc, Elf_Internal_Rela *rel)
7388 {
7389 bfd_byte *loc;
7390 struct elf32_arm_link_hash_table *htab;
7391
7392 htab = elf32_arm_hash_table (info);
7393 if (!htab->root.dynamic_sections_created
7394 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7395 sreloc = htab->root.irelplt;
7396 if (sreloc == NULL)
7397 abort ();
7398 loc = sreloc->contents;
7399 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7400 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7401 abort ();
7402 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7403 }
7404
7405 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7406 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7407 to .plt. */
7408
7409 static void
7410 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7411 bfd_boolean is_iplt_entry,
7412 union gotplt_union *root_plt,
7413 struct arm_plt_info *arm_plt)
7414 {
7415 struct elf32_arm_link_hash_table *htab;
7416 asection *splt;
7417 asection *sgotplt;
7418
7419 htab = elf32_arm_hash_table (info);
7420
7421 if (is_iplt_entry)
7422 {
7423 splt = htab->root.iplt;
7424 sgotplt = htab->root.igotplt;
7425
7426 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7427 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7428 }
7429 else
7430 {
7431 splt = htab->root.splt;
7432 sgotplt = htab->root.sgotplt;
7433
7434 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7435 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7436
7437 /* If this is the first .plt entry, make room for the special
7438 first entry. */
7439 if (splt->size == 0)
7440 splt->size += htab->plt_header_size;
7441 }
7442
7443 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7444 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7445 splt->size += PLT_THUMB_STUB_SIZE;
7446 root_plt->offset = splt->size;
7447 splt->size += htab->plt_entry_size;
7448
7449 if (!htab->symbian_p)
7450 {
7451 /* We also need to make an entry in the .got.plt section, which
7452 will be placed in the .got section by the linker script. */
7453 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7454 sgotplt->size += 4;
7455 }
7456 }
7457
7458 static bfd_vma
7459 arm_movw_immediate (bfd_vma value)
7460 {
7461 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
7462 }
7463
7464 static bfd_vma
7465 arm_movt_immediate (bfd_vma value)
7466 {
7467 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
7468 }
7469
7470 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7471 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7472 Otherwise, DYNINDX is the index of the symbol in the dynamic
7473 symbol table and SYM_VALUE is undefined.
7474
7475 ROOT_PLT points to the offset of the PLT entry from the start of its
7476 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
7477 bookkeeping information. */
7478
7479 static void
7480 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7481 union gotplt_union *root_plt,
7482 struct arm_plt_info *arm_plt,
7483 int dynindx, bfd_vma sym_value)
7484 {
7485 struct elf32_arm_link_hash_table *htab;
7486 asection *sgot;
7487 asection *splt;
7488 asection *srel;
7489 bfd_byte *loc;
7490 bfd_vma plt_index;
7491 Elf_Internal_Rela rel;
7492 bfd_vma plt_header_size;
7493 bfd_vma got_header_size;
7494
7495 htab = elf32_arm_hash_table (info);
7496
7497 /* Pick the appropriate sections and sizes. */
7498 if (dynindx == -1)
7499 {
7500 splt = htab->root.iplt;
7501 sgot = htab->root.igotplt;
7502 srel = htab->root.irelplt;
7503
7504 /* There are no reserved entries in .igot.plt, and no special
7505 first entry in .iplt. */
7506 got_header_size = 0;
7507 plt_header_size = 0;
7508 }
7509 else
7510 {
7511 splt = htab->root.splt;
7512 sgot = htab->root.sgotplt;
7513 srel = htab->root.srelplt;
7514
7515 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7516 plt_header_size = htab->plt_header_size;
7517 }
7518 BFD_ASSERT (splt != NULL && srel != NULL);
7519
7520 /* Fill in the entry in the procedure linkage table. */
7521 if (htab->symbian_p)
7522 {
7523 BFD_ASSERT (dynindx >= 0);
7524 put_arm_insn (htab, output_bfd,
7525 elf32_arm_symbian_plt_entry[0],
7526 splt->contents + root_plt->offset);
7527 bfd_put_32 (output_bfd,
7528 elf32_arm_symbian_plt_entry[1],
7529 splt->contents + root_plt->offset + 4);
7530
7531 /* Fill in the entry in the .rel.plt section. */
7532 rel.r_offset = (splt->output_section->vma
7533 + splt->output_offset
7534 + root_plt->offset + 4);
7535 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7536
7537 /* Get the index in the procedure linkage table which
7538 corresponds to this symbol. This is the index of this symbol
7539 in all the symbols for which we are making plt entries. The
7540 first entry in the procedure linkage table is reserved. */
7541 plt_index = ((root_plt->offset - plt_header_size)
7542 / htab->plt_entry_size);
7543 }
7544 else
7545 {
7546 bfd_vma got_offset, got_address, plt_address;
7547 bfd_vma got_displacement, initial_got_entry;
7548 bfd_byte * ptr;
7549
7550 BFD_ASSERT (sgot != NULL);
7551
7552 /* Get the offset into the .(i)got.plt table of the entry that
7553 corresponds to this function. */
7554 got_offset = (arm_plt->got_offset & -2);
7555
7556 /* Get the index in the procedure linkage table which
7557 corresponds to this symbol. This is the index of this symbol
7558 in all the symbols for which we are making plt entries.
7559 After the reserved .got.plt entries, all symbols appear in
7560 the same order as in .plt. */
7561 plt_index = (got_offset - got_header_size) / 4;
7562
7563 /* Calculate the address of the GOT entry. */
7564 got_address = (sgot->output_section->vma
7565 + sgot->output_offset
7566 + got_offset);
7567
7568 /* ...and the address of the PLT entry. */
7569 plt_address = (splt->output_section->vma
7570 + splt->output_offset
7571 + root_plt->offset);
7572
7573 ptr = splt->contents + root_plt->offset;
7574 if (htab->vxworks_p && info->shared)
7575 {
7576 unsigned int i;
7577 bfd_vma val;
7578
7579 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7580 {
7581 val = elf32_arm_vxworks_shared_plt_entry[i];
7582 if (i == 2)
7583 val |= got_address - sgot->output_section->vma;
7584 if (i == 5)
7585 val |= plt_index * RELOC_SIZE (htab);
7586 if (i == 2 || i == 5)
7587 bfd_put_32 (output_bfd, val, ptr);
7588 else
7589 put_arm_insn (htab, output_bfd, val, ptr);
7590 }
7591 }
7592 else if (htab->vxworks_p)
7593 {
7594 unsigned int i;
7595 bfd_vma val;
7596
7597 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7598 {
7599 val = elf32_arm_vxworks_exec_plt_entry[i];
7600 if (i == 2)
7601 val |= got_address;
7602 if (i == 4)
7603 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7604 if (i == 5)
7605 val |= plt_index * RELOC_SIZE (htab);
7606 if (i == 2 || i == 5)
7607 bfd_put_32 (output_bfd, val, ptr);
7608 else
7609 put_arm_insn (htab, output_bfd, val, ptr);
7610 }
7611
7612 loc = (htab->srelplt2->contents
7613 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7614
7615 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7616 referencing the GOT for this PLT entry. */
7617 rel.r_offset = plt_address + 8;
7618 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7619 rel.r_addend = got_offset;
7620 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7621 loc += RELOC_SIZE (htab);
7622
7623 /* Create the R_ARM_ABS32 relocation referencing the
7624 beginning of the PLT for this GOT entry. */
7625 rel.r_offset = got_address;
7626 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7627 rel.r_addend = 0;
7628 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7629 }
7630 else if (htab->nacl_p)
7631 {
7632 /* Calculate the displacement between the PLT slot and the
7633 common tail that's part of the special initial PLT slot. */
7634 int32_t tail_displacement
7635 = ((splt->output_section->vma + splt->output_offset
7636 + ARM_NACL_PLT_TAIL_OFFSET)
7637 - (plt_address + htab->plt_entry_size + 4));
7638 BFD_ASSERT ((tail_displacement & 3) == 0);
7639 tail_displacement >>= 2;
7640
7641 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
7642 || (-tail_displacement & 0xff000000) == 0);
7643
7644 /* Calculate the displacement between the PLT slot and the entry
7645 in the GOT. The offset accounts for the value produced by
7646 adding to pc in the penultimate instruction of the PLT stub. */
7647 got_displacement = (got_address
7648 - (plt_address + htab->plt_entry_size));
7649
7650 /* NaCl does not support interworking at all. */
7651 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
7652
7653 put_arm_insn (htab, output_bfd,
7654 elf32_arm_nacl_plt_entry[0]
7655 | arm_movw_immediate (got_displacement),
7656 ptr + 0);
7657 put_arm_insn (htab, output_bfd,
7658 elf32_arm_nacl_plt_entry[1]
7659 | arm_movt_immediate (got_displacement),
7660 ptr + 4);
7661 put_arm_insn (htab, output_bfd,
7662 elf32_arm_nacl_plt_entry[2],
7663 ptr + 8);
7664 put_arm_insn (htab, output_bfd,
7665 elf32_arm_nacl_plt_entry[3]
7666 | (tail_displacement & 0x00ffffff),
7667 ptr + 12);
7668 }
7669 else
7670 {
7671 /* Calculate the displacement between the PLT slot and the
7672 entry in the GOT. The eight-byte offset accounts for the
7673 value produced by adding to pc in the first instruction
7674 of the PLT stub. */
7675 got_displacement = got_address - (plt_address + 8);
7676
7677 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7678
7679 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7680 {
7681 put_thumb_insn (htab, output_bfd,
7682 elf32_arm_plt_thumb_stub[0], ptr - 4);
7683 put_thumb_insn (htab, output_bfd,
7684 elf32_arm_plt_thumb_stub[1], ptr - 2);
7685 }
7686
7687 put_arm_insn (htab, output_bfd,
7688 elf32_arm_plt_entry[0]
7689 | ((got_displacement & 0x0ff00000) >> 20),
7690 ptr + 0);
7691 put_arm_insn (htab, output_bfd,
7692 elf32_arm_plt_entry[1]
7693 | ((got_displacement & 0x000ff000) >> 12),
7694 ptr+ 4);
7695 put_arm_insn (htab, output_bfd,
7696 elf32_arm_plt_entry[2]
7697 | (got_displacement & 0x00000fff),
7698 ptr + 8);
7699 #ifdef FOUR_WORD_PLT
7700 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
7701 #endif
7702 }
7703
7704 /* Fill in the entry in the .rel(a).(i)plt section. */
7705 rel.r_offset = got_address;
7706 rel.r_addend = 0;
7707 if (dynindx == -1)
7708 {
7709 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7710 The dynamic linker or static executable then calls SYM_VALUE
7711 to determine the correct run-time value of the .igot.plt entry. */
7712 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7713 initial_got_entry = sym_value;
7714 }
7715 else
7716 {
7717 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7718 initial_got_entry = (splt->output_section->vma
7719 + splt->output_offset);
7720 }
7721
7722 /* Fill in the entry in the global offset table. */
7723 bfd_put_32 (output_bfd, initial_got_entry,
7724 sgot->contents + got_offset);
7725 }
7726
7727 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7728 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7729 }
7730
7731 /* Some relocations map to different relocations depending on the
7732 target. Return the real relocation. */
7733
7734 static int
7735 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7736 int r_type)
7737 {
7738 switch (r_type)
7739 {
7740 case R_ARM_TARGET1:
7741 if (globals->target1_is_rel)
7742 return R_ARM_REL32;
7743 else
7744 return R_ARM_ABS32;
7745
7746 case R_ARM_TARGET2:
7747 return globals->target2_reloc;
7748
7749 default:
7750 return r_type;
7751 }
7752 }
7753
7754 /* Return the base VMA address which should be subtracted from real addresses
7755 when resolving @dtpoff relocation.
7756 This is PT_TLS segment p_vaddr. */
7757
7758 static bfd_vma
7759 dtpoff_base (struct bfd_link_info *info)
7760 {
7761 /* If tls_sec is NULL, we should have signalled an error already. */
7762 if (elf_hash_table (info)->tls_sec == NULL)
7763 return 0;
7764 return elf_hash_table (info)->tls_sec->vma;
7765 }
7766
7767 /* Return the relocation value for @tpoff relocation
7768 if STT_TLS virtual address is ADDRESS. */
7769
7770 static bfd_vma
7771 tpoff (struct bfd_link_info *info, bfd_vma address)
7772 {
7773 struct elf_link_hash_table *htab = elf_hash_table (info);
7774 bfd_vma base;
7775
7776 /* If tls_sec is NULL, we should have signalled an error already. */
7777 if (htab->tls_sec == NULL)
7778 return 0;
7779 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7780 return address - htab->tls_sec->vma + base;
7781 }
7782
7783 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7784 VALUE is the relocation value. */
7785
7786 static bfd_reloc_status_type
7787 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7788 {
7789 if (value > 0xfff)
7790 return bfd_reloc_overflow;
7791
7792 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7793 bfd_put_32 (abfd, value, data);
7794 return bfd_reloc_ok;
7795 }
7796
7797 /* Handle TLS relaxations. Relaxing is possible for symbols that use
7798 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7799 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7800
7801 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7802 is to then call final_link_relocate. Return other values in the
7803 case of error.
7804
7805 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7806 the pre-relaxed code. It would be nice if the relocs were updated
7807 to match the optimization. */
7808
7809 static bfd_reloc_status_type
7810 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
7811 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
7812 Elf_Internal_Rela *rel, unsigned long is_local)
7813 {
7814 unsigned long insn;
7815
7816 switch (ELF32_R_TYPE (rel->r_info))
7817 {
7818 default:
7819 return bfd_reloc_notsupported;
7820
7821 case R_ARM_TLS_GOTDESC:
7822 if (is_local)
7823 insn = 0;
7824 else
7825 {
7826 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7827 if (insn & 1)
7828 insn -= 5; /* THUMB */
7829 else
7830 insn -= 8; /* ARM */
7831 }
7832 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7833 return bfd_reloc_continue;
7834
7835 case R_ARM_THM_TLS_DESCSEQ:
7836 /* Thumb insn. */
7837 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7838 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7839 {
7840 if (is_local)
7841 /* nop */
7842 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7843 }
7844 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7845 {
7846 if (is_local)
7847 /* nop */
7848 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7849 else
7850 /* ldr rx,[ry] */
7851 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7852 }
7853 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7854 {
7855 if (is_local)
7856 /* nop */
7857 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7858 else
7859 /* mov r0, rx */
7860 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7861 contents + rel->r_offset);
7862 }
7863 else
7864 {
7865 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7866 /* It's a 32 bit instruction, fetch the rest of it for
7867 error generation. */
7868 insn = (insn << 16)
7869 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7870 (*_bfd_error_handler)
7871 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7872 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7873 return bfd_reloc_notsupported;
7874 }
7875 break;
7876
7877 case R_ARM_TLS_DESCSEQ:
7878 /* arm insn. */
7879 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7880 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7881 {
7882 if (is_local)
7883 /* mov rx, ry */
7884 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7885 contents + rel->r_offset);
7886 }
7887 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7888 {
7889 if (is_local)
7890 /* nop */
7891 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7892 else
7893 /* ldr rx,[ry] */
7894 bfd_put_32 (input_bfd, insn & 0xfffff000,
7895 contents + rel->r_offset);
7896 }
7897 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7898 {
7899 if (is_local)
7900 /* nop */
7901 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7902 else
7903 /* mov r0, rx */
7904 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7905 contents + rel->r_offset);
7906 }
7907 else
7908 {
7909 (*_bfd_error_handler)
7910 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7911 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7912 return bfd_reloc_notsupported;
7913 }
7914 break;
7915
7916 case R_ARM_TLS_CALL:
7917 /* GD->IE relaxation, turn the instruction into 'nop' or
7918 'ldr r0, [pc,r0]' */
7919 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7920 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7921 break;
7922
7923 case R_ARM_THM_TLS_CALL:
7924 /* GD->IE relaxation */
7925 if (!is_local)
7926 /* add r0,pc; ldr r0, [r0] */
7927 insn = 0x44786800;
7928 else if (arch_has_thumb2_nop (globals))
7929 /* nop.w */
7930 insn = 0xf3af8000;
7931 else
7932 /* nop; nop */
7933 insn = 0xbf00bf00;
7934
7935 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7936 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7937 break;
7938 }
7939 return bfd_reloc_ok;
7940 }
7941
7942 /* For a given value of n, calculate the value of G_n as required to
7943 deal with group relocations. We return it in the form of an
7944 encoded constant-and-rotation, together with the final residual. If n is
7945 specified as less than zero, then final_residual is filled with the
7946 input value and no further action is performed. */
7947
7948 static bfd_vma
7949 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7950 {
7951 int current_n;
7952 bfd_vma g_n;
7953 bfd_vma encoded_g_n = 0;
7954 bfd_vma residual = value; /* Also known as Y_n. */
7955
7956 for (current_n = 0; current_n <= n; current_n++)
7957 {
7958 int shift;
7959
7960 /* Calculate which part of the value to mask. */
7961 if (residual == 0)
7962 shift = 0;
7963 else
7964 {
7965 int msb;
7966
7967 /* Determine the most significant bit in the residual and
7968 align the resulting value to a 2-bit boundary. */
7969 for (msb = 30; msb >= 0; msb -= 2)
7970 if (residual & (3 << msb))
7971 break;
7972
7973 /* The desired shift is now (msb - 6), or zero, whichever
7974 is the greater. */
7975 shift = msb - 6;
7976 if (shift < 0)
7977 shift = 0;
7978 }
7979
7980 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
7981 g_n = residual & (0xff << shift);
7982 encoded_g_n = (g_n >> shift)
7983 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
7984
7985 /* Calculate the residual for the next time around. */
7986 residual &= ~g_n;
7987 }
7988
7989 *final_residual = residual;
7990
7991 return encoded_g_n;
7992 }
7993
7994 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
7995 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
7996
7997 static int
7998 identify_add_or_sub (bfd_vma insn)
7999 {
8000 int opcode = insn & 0x1e00000;
8001
8002 if (opcode == 1 << 23) /* ADD */
8003 return 1;
8004
8005 if (opcode == 1 << 22) /* SUB */
8006 return -1;
8007
8008 return 0;
8009 }
8010
8011 /* Perform a relocation as part of a final link. */
8012
8013 static bfd_reloc_status_type
8014 elf32_arm_final_link_relocate (reloc_howto_type * howto,
8015 bfd * input_bfd,
8016 bfd * output_bfd,
8017 asection * input_section,
8018 bfd_byte * contents,
8019 Elf_Internal_Rela * rel,
8020 bfd_vma value,
8021 struct bfd_link_info * info,
8022 asection * sym_sec,
8023 const char * sym_name,
8024 unsigned char st_type,
8025 enum arm_st_branch_type branch_type,
8026 struct elf_link_hash_entry * h,
8027 bfd_boolean * unresolved_reloc_p,
8028 char ** error_message)
8029 {
8030 unsigned long r_type = howto->type;
8031 unsigned long r_symndx;
8032 bfd_byte * hit_data = contents + rel->r_offset;
8033 bfd_vma * local_got_offsets;
8034 bfd_vma * local_tlsdesc_gotents;
8035 asection * sgot;
8036 asection * splt;
8037 asection * sreloc = NULL;
8038 asection * srelgot;
8039 bfd_vma addend;
8040 bfd_signed_vma signed_addend;
8041 unsigned char dynreloc_st_type;
8042 bfd_vma dynreloc_value;
8043 struct elf32_arm_link_hash_table * globals;
8044 struct elf32_arm_link_hash_entry *eh;
8045 union gotplt_union *root_plt;
8046 struct arm_plt_info *arm_plt;
8047 bfd_vma plt_offset;
8048 bfd_vma gotplt_offset;
8049 bfd_boolean has_iplt_entry;
8050
8051 globals = elf32_arm_hash_table (info);
8052 if (globals == NULL)
8053 return bfd_reloc_notsupported;
8054
8055 BFD_ASSERT (is_arm_elf (input_bfd));
8056
8057 /* Some relocation types map to different relocations depending on the
8058 target. We pick the right one here. */
8059 r_type = arm_real_reloc_type (globals, r_type);
8060
8061 /* It is possible to have linker relaxations on some TLS access
8062 models. Update our information here. */
8063 r_type = elf32_arm_tls_transition (info, r_type, h);
8064
8065 if (r_type != howto->type)
8066 howto = elf32_arm_howto_from_type (r_type);
8067
8068 /* If the start address has been set, then set the EF_ARM_HASENTRY
8069 flag. Setting this more than once is redundant, but the cost is
8070 not too high, and it keeps the code simple.
8071
8072 The test is done here, rather than somewhere else, because the
8073 start address is only set just before the final link commences.
8074
8075 Note - if the user deliberately sets a start address of 0, the
8076 flag will not be set. */
8077 if (bfd_get_start_address (output_bfd) != 0)
8078 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
8079
8080 eh = (struct elf32_arm_link_hash_entry *) h;
8081 sgot = globals->root.sgot;
8082 local_got_offsets = elf_local_got_offsets (input_bfd);
8083 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8084
8085 if (globals->root.dynamic_sections_created)
8086 srelgot = globals->root.srelgot;
8087 else
8088 srelgot = NULL;
8089
8090 r_symndx = ELF32_R_SYM (rel->r_info);
8091
8092 if (globals->use_rel)
8093 {
8094 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8095
8096 if (addend & ((howto->src_mask + 1) >> 1))
8097 {
8098 signed_addend = -1;
8099 signed_addend &= ~ howto->src_mask;
8100 signed_addend |= addend;
8101 }
8102 else
8103 signed_addend = addend;
8104 }
8105 else
8106 addend = signed_addend = rel->r_addend;
8107
8108 /* Record the symbol information that should be used in dynamic
8109 relocations. */
8110 dynreloc_st_type = st_type;
8111 dynreloc_value = value;
8112 if (branch_type == ST_BRANCH_TO_THUMB)
8113 dynreloc_value |= 1;
8114
8115 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8116 VALUE appropriately for relocations that we resolve at link time. */
8117 has_iplt_entry = FALSE;
8118 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8119 && root_plt->offset != (bfd_vma) -1)
8120 {
8121 plt_offset = root_plt->offset;
8122 gotplt_offset = arm_plt->got_offset;
8123
8124 if (h == NULL || eh->is_iplt)
8125 {
8126 has_iplt_entry = TRUE;
8127 splt = globals->root.iplt;
8128
8129 /* Populate .iplt entries here, because not all of them will
8130 be seen by finish_dynamic_symbol. The lower bit is set if
8131 we have already populated the entry. */
8132 if (plt_offset & 1)
8133 plt_offset--;
8134 else
8135 {
8136 elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8137 -1, dynreloc_value);
8138 root_plt->offset |= 1;
8139 }
8140
8141 /* Static relocations always resolve to the .iplt entry. */
8142 st_type = STT_FUNC;
8143 value = (splt->output_section->vma
8144 + splt->output_offset
8145 + plt_offset);
8146 branch_type = ST_BRANCH_TO_ARM;
8147
8148 /* If there are non-call relocations that resolve to the .iplt
8149 entry, then all dynamic ones must too. */
8150 if (arm_plt->noncall_refcount != 0)
8151 {
8152 dynreloc_st_type = st_type;
8153 dynreloc_value = value;
8154 }
8155 }
8156 else
8157 /* We populate the .plt entry in finish_dynamic_symbol. */
8158 splt = globals->root.splt;
8159 }
8160 else
8161 {
8162 splt = NULL;
8163 plt_offset = (bfd_vma) -1;
8164 gotplt_offset = (bfd_vma) -1;
8165 }
8166
8167 switch (r_type)
8168 {
8169 case R_ARM_NONE:
8170 /* We don't need to find a value for this symbol. It's just a
8171 marker. */
8172 *unresolved_reloc_p = FALSE;
8173 return bfd_reloc_ok;
8174
8175 case R_ARM_ABS12:
8176 if (!globals->vxworks_p)
8177 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8178
8179 case R_ARM_PC24:
8180 case R_ARM_ABS32:
8181 case R_ARM_ABS32_NOI:
8182 case R_ARM_REL32:
8183 case R_ARM_REL32_NOI:
8184 case R_ARM_CALL:
8185 case R_ARM_JUMP24:
8186 case R_ARM_XPC25:
8187 case R_ARM_PREL31:
8188 case R_ARM_PLT32:
8189 /* Handle relocations which should use the PLT entry. ABS32/REL32
8190 will use the symbol's value, which may point to a PLT entry, but we
8191 don't need to handle that here. If we created a PLT entry, all
8192 branches in this object should go to it, except if the PLT is too
8193 far away, in which case a long branch stub should be inserted. */
8194 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
8195 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
8196 && r_type != R_ARM_CALL
8197 && r_type != R_ARM_JUMP24
8198 && r_type != R_ARM_PLT32)
8199 && plt_offset != (bfd_vma) -1)
8200 {
8201 /* If we've created a .plt section, and assigned a PLT entry
8202 to this function, it must either be a STT_GNU_IFUNC reference
8203 or not be known to bind locally. In other cases, we should
8204 have cleared the PLT entry by now. */
8205 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
8206
8207 value = (splt->output_section->vma
8208 + splt->output_offset
8209 + plt_offset);
8210 *unresolved_reloc_p = FALSE;
8211 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8212 contents, rel->r_offset, value,
8213 rel->r_addend);
8214 }
8215
8216 /* When generating a shared object or relocatable executable, these
8217 relocations are copied into the output file to be resolved at
8218 run time. */
8219 if ((info->shared || globals->root.is_relocatable_executable)
8220 && (input_section->flags & SEC_ALLOC)
8221 && !(globals->vxworks_p
8222 && strcmp (input_section->output_section->name,
8223 ".tls_vars") == 0)
8224 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
8225 || !SYMBOL_CALLS_LOCAL (info, h))
8226 && (!strstr (input_section->name, STUB_SUFFIX))
8227 && (h == NULL
8228 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8229 || h->root.type != bfd_link_hash_undefweak)
8230 && r_type != R_ARM_PC24
8231 && r_type != R_ARM_CALL
8232 && r_type != R_ARM_JUMP24
8233 && r_type != R_ARM_PREL31
8234 && r_type != R_ARM_PLT32)
8235 {
8236 Elf_Internal_Rela outrel;
8237 bfd_boolean skip, relocate;
8238
8239 *unresolved_reloc_p = FALSE;
8240
8241 if (sreloc == NULL && globals->root.dynamic_sections_created)
8242 {
8243 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8244 ! globals->use_rel);
8245
8246 if (sreloc == NULL)
8247 return bfd_reloc_notsupported;
8248 }
8249
8250 skip = FALSE;
8251 relocate = FALSE;
8252
8253 outrel.r_addend = addend;
8254 outrel.r_offset =
8255 _bfd_elf_section_offset (output_bfd, info, input_section,
8256 rel->r_offset);
8257 if (outrel.r_offset == (bfd_vma) -1)
8258 skip = TRUE;
8259 else if (outrel.r_offset == (bfd_vma) -2)
8260 skip = TRUE, relocate = TRUE;
8261 outrel.r_offset += (input_section->output_section->vma
8262 + input_section->output_offset);
8263
8264 if (skip)
8265 memset (&outrel, 0, sizeof outrel);
8266 else if (h != NULL
8267 && h->dynindx != -1
8268 && (!info->shared
8269 || !info->symbolic
8270 || !h->def_regular))
8271 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
8272 else
8273 {
8274 int symbol;
8275
8276 /* This symbol is local, or marked to become local. */
8277 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
8278 if (globals->symbian_p)
8279 {
8280 asection *osec;
8281
8282 /* On Symbian OS, the data segment and text segement
8283 can be relocated independently. Therefore, we
8284 must indicate the segment to which this
8285 relocation is relative. The BPABI allows us to
8286 use any symbol in the right segment; we just use
8287 the section symbol as it is convenient. (We
8288 cannot use the symbol given by "h" directly as it
8289 will not appear in the dynamic symbol table.)
8290
8291 Note that the dynamic linker ignores the section
8292 symbol value, so we don't subtract osec->vma
8293 from the emitted reloc addend. */
8294 if (sym_sec)
8295 osec = sym_sec->output_section;
8296 else
8297 osec = input_section->output_section;
8298 symbol = elf_section_data (osec)->dynindx;
8299 if (symbol == 0)
8300 {
8301 struct elf_link_hash_table *htab = elf_hash_table (info);
8302
8303 if ((osec->flags & SEC_READONLY) == 0
8304 && htab->data_index_section != NULL)
8305 osec = htab->data_index_section;
8306 else
8307 osec = htab->text_index_section;
8308 symbol = elf_section_data (osec)->dynindx;
8309 }
8310 BFD_ASSERT (symbol != 0);
8311 }
8312 else
8313 /* On SVR4-ish systems, the dynamic loader cannot
8314 relocate the text and data segments independently,
8315 so the symbol does not matter. */
8316 symbol = 0;
8317 if (dynreloc_st_type == STT_GNU_IFUNC)
8318 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8319 to the .iplt entry. Instead, every non-call reference
8320 must use an R_ARM_IRELATIVE relocation to obtain the
8321 correct run-time address. */
8322 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8323 else
8324 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
8325 if (globals->use_rel)
8326 relocate = TRUE;
8327 else
8328 outrel.r_addend += dynreloc_value;
8329 }
8330
8331 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
8332
8333 /* If this reloc is against an external symbol, we do not want to
8334 fiddle with the addend. Otherwise, we need to include the symbol
8335 value so that it becomes an addend for the dynamic reloc. */
8336 if (! relocate)
8337 return bfd_reloc_ok;
8338
8339 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8340 contents, rel->r_offset,
8341 dynreloc_value, (bfd_vma) 0);
8342 }
8343 else switch (r_type)
8344 {
8345 case R_ARM_ABS12:
8346 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8347
8348 case R_ARM_XPC25: /* Arm BLX instruction. */
8349 case R_ARM_CALL:
8350 case R_ARM_JUMP24:
8351 case R_ARM_PC24: /* Arm B/BL instruction. */
8352 case R_ARM_PLT32:
8353 {
8354 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8355
8356 if (r_type == R_ARM_XPC25)
8357 {
8358 /* Check for Arm calling Arm function. */
8359 /* FIXME: Should we translate the instruction into a BL
8360 instruction instead ? */
8361 if (branch_type != ST_BRANCH_TO_THUMB)
8362 (*_bfd_error_handler)
8363 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8364 input_bfd,
8365 h ? h->root.root.string : "(local)");
8366 }
8367 else if (r_type == R_ARM_PC24)
8368 {
8369 /* Check for Arm calling Thumb function. */
8370 if (branch_type == ST_BRANCH_TO_THUMB)
8371 {
8372 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8373 output_bfd, input_section,
8374 hit_data, sym_sec, rel->r_offset,
8375 signed_addend, value,
8376 error_message))
8377 return bfd_reloc_ok;
8378 else
8379 return bfd_reloc_dangerous;
8380 }
8381 }
8382
8383 /* Check if a stub has to be inserted because the
8384 destination is too far or we are changing mode. */
8385 if ( r_type == R_ARM_CALL
8386 || r_type == R_ARM_JUMP24
8387 || r_type == R_ARM_PLT32)
8388 {
8389 enum elf32_arm_stub_type stub_type = arm_stub_none;
8390 struct elf32_arm_link_hash_entry *hash;
8391
8392 hash = (struct elf32_arm_link_hash_entry *) h;
8393 stub_type = arm_type_of_stub (info, input_section, rel,
8394 st_type, &branch_type,
8395 hash, value, sym_sec,
8396 input_bfd, sym_name);
8397
8398 if (stub_type != arm_stub_none)
8399 {
8400 /* The target is out of reach, so redirect the
8401 branch to the local stub for this function. */
8402 stub_entry = elf32_arm_get_stub_entry (input_section,
8403 sym_sec, h,
8404 rel, globals,
8405 stub_type);
8406 {
8407 if (stub_entry != NULL)
8408 value = (stub_entry->stub_offset
8409 + stub_entry->stub_sec->output_offset
8410 + stub_entry->stub_sec->output_section->vma);
8411
8412 if (plt_offset != (bfd_vma) -1)
8413 *unresolved_reloc_p = FALSE;
8414 }
8415 }
8416 else
8417 {
8418 /* If the call goes through a PLT entry, make sure to
8419 check distance to the right destination address. */
8420 if (plt_offset != (bfd_vma) -1)
8421 {
8422 value = (splt->output_section->vma
8423 + splt->output_offset
8424 + plt_offset);
8425 *unresolved_reloc_p = FALSE;
8426 /* The PLT entry is in ARM mode, regardless of the
8427 target function. */
8428 branch_type = ST_BRANCH_TO_ARM;
8429 }
8430 }
8431 }
8432
8433 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8434 where:
8435 S is the address of the symbol in the relocation.
8436 P is address of the instruction being relocated.
8437 A is the addend (extracted from the instruction) in bytes.
8438
8439 S is held in 'value'.
8440 P is the base address of the section containing the
8441 instruction plus the offset of the reloc into that
8442 section, ie:
8443 (input_section->output_section->vma +
8444 input_section->output_offset +
8445 rel->r_offset).
8446 A is the addend, converted into bytes, ie:
8447 (signed_addend * 4)
8448
8449 Note: None of these operations have knowledge of the pipeline
8450 size of the processor, thus it is up to the assembler to
8451 encode this information into the addend. */
8452 value -= (input_section->output_section->vma
8453 + input_section->output_offset);
8454 value -= rel->r_offset;
8455 if (globals->use_rel)
8456 value += (signed_addend << howto->size);
8457 else
8458 /* RELA addends do not have to be adjusted by howto->size. */
8459 value += signed_addend;
8460
8461 signed_addend = value;
8462 signed_addend >>= howto->rightshift;
8463
8464 /* A branch to an undefined weak symbol is turned into a jump to
8465 the next instruction unless a PLT entry will be created.
8466 Do the same for local undefined symbols (but not for STN_UNDEF).
8467 The jump to the next instruction is optimized as a NOP depending
8468 on the architecture. */
8469 if (h ? (h->root.type == bfd_link_hash_undefweak
8470 && plt_offset == (bfd_vma) -1)
8471 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
8472 {
8473 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8474
8475 if (arch_has_arm_nop (globals))
8476 value |= 0x0320f000;
8477 else
8478 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
8479 }
8480 else
8481 {
8482 /* Perform a signed range check. */
8483 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
8484 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8485 return bfd_reloc_overflow;
8486
8487 addend = (value & 2);
8488
8489 value = (signed_addend & howto->dst_mask)
8490 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
8491
8492 if (r_type == R_ARM_CALL)
8493 {
8494 /* Set the H bit in the BLX instruction. */
8495 if (branch_type == ST_BRANCH_TO_THUMB)
8496 {
8497 if (addend)
8498 value |= (1 << 24);
8499 else
8500 value &= ~(bfd_vma)(1 << 24);
8501 }
8502
8503 /* Select the correct instruction (BL or BLX). */
8504 /* Only if we are not handling a BL to a stub. In this
8505 case, mode switching is performed by the stub. */
8506 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
8507 value |= (1 << 28);
8508 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
8509 {
8510 value &= ~(bfd_vma)(1 << 28);
8511 value |= (1 << 24);
8512 }
8513 }
8514 }
8515 }
8516 break;
8517
8518 case R_ARM_ABS32:
8519 value += addend;
8520 if (branch_type == ST_BRANCH_TO_THUMB)
8521 value |= 1;
8522 break;
8523
8524 case R_ARM_ABS32_NOI:
8525 value += addend;
8526 break;
8527
8528 case R_ARM_REL32:
8529 value += addend;
8530 if (branch_type == ST_BRANCH_TO_THUMB)
8531 value |= 1;
8532 value -= (input_section->output_section->vma
8533 + input_section->output_offset + rel->r_offset);
8534 break;
8535
8536 case R_ARM_REL32_NOI:
8537 value += addend;
8538 value -= (input_section->output_section->vma
8539 + input_section->output_offset + rel->r_offset);
8540 break;
8541
8542 case R_ARM_PREL31:
8543 value -= (input_section->output_section->vma
8544 + input_section->output_offset + rel->r_offset);
8545 value += signed_addend;
8546 if (! h || h->root.type != bfd_link_hash_undefweak)
8547 {
8548 /* Check for overflow. */
8549 if ((value ^ (value >> 1)) & (1 << 30))
8550 return bfd_reloc_overflow;
8551 }
8552 value &= 0x7fffffff;
8553 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
8554 if (branch_type == ST_BRANCH_TO_THUMB)
8555 value |= 1;
8556 break;
8557 }
8558
8559 bfd_put_32 (input_bfd, value, hit_data);
8560 return bfd_reloc_ok;
8561
8562 case R_ARM_ABS8:
8563 value += addend;
8564
8565 /* There is no way to tell whether the user intended to use a signed or
8566 unsigned addend. When checking for overflow we accept either,
8567 as specified by the AAELF. */
8568 if ((long) value > 0xff || (long) value < -0x80)
8569 return bfd_reloc_overflow;
8570
8571 bfd_put_8 (input_bfd, value, hit_data);
8572 return bfd_reloc_ok;
8573
8574 case R_ARM_ABS16:
8575 value += addend;
8576
8577 /* See comment for R_ARM_ABS8. */
8578 if ((long) value > 0xffff || (long) value < -0x8000)
8579 return bfd_reloc_overflow;
8580
8581 bfd_put_16 (input_bfd, value, hit_data);
8582 return bfd_reloc_ok;
8583
8584 case R_ARM_THM_ABS5:
8585 /* Support ldr and str instructions for the thumb. */
8586 if (globals->use_rel)
8587 {
8588 /* Need to refetch addend. */
8589 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8590 /* ??? Need to determine shift amount from operand size. */
8591 addend >>= howto->rightshift;
8592 }
8593 value += addend;
8594
8595 /* ??? Isn't value unsigned? */
8596 if ((long) value > 0x1f || (long) value < -0x10)
8597 return bfd_reloc_overflow;
8598
8599 /* ??? Value needs to be properly shifted into place first. */
8600 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8601 bfd_put_16 (input_bfd, value, hit_data);
8602 return bfd_reloc_ok;
8603
8604 case R_ARM_THM_ALU_PREL_11_0:
8605 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8606 {
8607 bfd_vma insn;
8608 bfd_signed_vma relocation;
8609
8610 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8611 | bfd_get_16 (input_bfd, hit_data + 2);
8612
8613 if (globals->use_rel)
8614 {
8615 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8616 | ((insn & (1 << 26)) >> 15);
8617 if (insn & 0xf00000)
8618 signed_addend = -signed_addend;
8619 }
8620
8621 relocation = value + signed_addend;
8622 relocation -= (input_section->output_section->vma
8623 + input_section->output_offset
8624 + rel->r_offset);
8625
8626 value = abs (relocation);
8627
8628 if (value >= 0x1000)
8629 return bfd_reloc_overflow;
8630
8631 insn = (insn & 0xfb0f8f00) | (value & 0xff)
8632 | ((value & 0x700) << 4)
8633 | ((value & 0x800) << 15);
8634 if (relocation < 0)
8635 insn |= 0xa00000;
8636
8637 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8638 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8639
8640 return bfd_reloc_ok;
8641 }
8642
8643 case R_ARM_THM_PC8:
8644 /* PR 10073: This reloc is not generated by the GNU toolchain,
8645 but it is supported for compatibility with third party libraries
8646 generated by other compilers, specifically the ARM/IAR. */
8647 {
8648 bfd_vma insn;
8649 bfd_signed_vma relocation;
8650
8651 insn = bfd_get_16 (input_bfd, hit_data);
8652
8653 if (globals->use_rel)
8654 addend = (insn & 0x00ff) << 2;
8655
8656 relocation = value + addend;
8657 relocation -= (input_section->output_section->vma
8658 + input_section->output_offset
8659 + rel->r_offset);
8660
8661 value = abs (relocation);
8662
8663 /* We do not check for overflow of this reloc. Although strictly
8664 speaking this is incorrect, it appears to be necessary in order
8665 to work with IAR generated relocs. Since GCC and GAS do not
8666 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8667 a problem for them. */
8668 value &= 0x3fc;
8669
8670 insn = (insn & 0xff00) | (value >> 2);
8671
8672 bfd_put_16 (input_bfd, insn, hit_data);
8673
8674 return bfd_reloc_ok;
8675 }
8676
8677 case R_ARM_THM_PC12:
8678 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8679 {
8680 bfd_vma insn;
8681 bfd_signed_vma relocation;
8682
8683 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8684 | bfd_get_16 (input_bfd, hit_data + 2);
8685
8686 if (globals->use_rel)
8687 {
8688 signed_addend = insn & 0xfff;
8689 if (!(insn & (1 << 23)))
8690 signed_addend = -signed_addend;
8691 }
8692
8693 relocation = value + signed_addend;
8694 relocation -= (input_section->output_section->vma
8695 + input_section->output_offset
8696 + rel->r_offset);
8697
8698 value = abs (relocation);
8699
8700 if (value >= 0x1000)
8701 return bfd_reloc_overflow;
8702
8703 insn = (insn & 0xff7ff000) | value;
8704 if (relocation >= 0)
8705 insn |= (1 << 23);
8706
8707 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8708 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8709
8710 return bfd_reloc_ok;
8711 }
8712
8713 case R_ARM_THM_XPC22:
8714 case R_ARM_THM_CALL:
8715 case R_ARM_THM_JUMP24:
8716 /* Thumb BL (branch long instruction). */
8717 {
8718 bfd_vma relocation;
8719 bfd_vma reloc_sign;
8720 bfd_boolean overflow = FALSE;
8721 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8722 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
8723 bfd_signed_vma reloc_signed_max;
8724 bfd_signed_vma reloc_signed_min;
8725 bfd_vma check;
8726 bfd_signed_vma signed_check;
8727 int bitsize;
8728 const int thumb2 = using_thumb2 (globals);
8729
8730 /* A branch to an undefined weak symbol is turned into a jump to
8731 the next instruction unless a PLT entry will be created.
8732 The jump to the next instruction is optimized as a NOP.W for
8733 Thumb-2 enabled architectures. */
8734 if (h && h->root.type == bfd_link_hash_undefweak
8735 && plt_offset == (bfd_vma) -1)
8736 {
8737 if (arch_has_thumb2_nop (globals))
8738 {
8739 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8740 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8741 }
8742 else
8743 {
8744 bfd_put_16 (input_bfd, 0xe000, hit_data);
8745 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8746 }
8747 return bfd_reloc_ok;
8748 }
8749
8750 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
8751 with Thumb-1) involving the J1 and J2 bits. */
8752 if (globals->use_rel)
8753 {
8754 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8755 bfd_vma upper = upper_insn & 0x3ff;
8756 bfd_vma lower = lower_insn & 0x7ff;
8757 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8758 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
8759 bfd_vma i1 = j1 ^ s ? 0 : 1;
8760 bfd_vma i2 = j2 ^ s ? 0 : 1;
8761
8762 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8763 /* Sign extend. */
8764 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
8765
8766 signed_addend = addend;
8767 }
8768
8769 if (r_type == R_ARM_THM_XPC22)
8770 {
8771 /* Check for Thumb to Thumb call. */
8772 /* FIXME: Should we translate the instruction into a BL
8773 instruction instead ? */
8774 if (branch_type == ST_BRANCH_TO_THUMB)
8775 (*_bfd_error_handler)
8776 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8777 input_bfd,
8778 h ? h->root.root.string : "(local)");
8779 }
8780 else
8781 {
8782 /* If it is not a call to Thumb, assume call to Arm.
8783 If it is a call relative to a section name, then it is not a
8784 function call at all, but rather a long jump. Calls through
8785 the PLT do not require stubs. */
8786 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
8787 {
8788 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8789 {
8790 /* Convert BL to BLX. */
8791 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8792 }
8793 else if (( r_type != R_ARM_THM_CALL)
8794 && (r_type != R_ARM_THM_JUMP24))
8795 {
8796 if (elf32_thumb_to_arm_stub
8797 (info, sym_name, input_bfd, output_bfd, input_section,
8798 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8799 error_message))
8800 return bfd_reloc_ok;
8801 else
8802 return bfd_reloc_dangerous;
8803 }
8804 }
8805 else if (branch_type == ST_BRANCH_TO_THUMB
8806 && globals->use_blx
8807 && r_type == R_ARM_THM_CALL)
8808 {
8809 /* Make sure this is a BL. */
8810 lower_insn |= 0x1800;
8811 }
8812 }
8813
8814 enum elf32_arm_stub_type stub_type = arm_stub_none;
8815 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
8816 {
8817 /* Check if a stub has to be inserted because the destination
8818 is too far. */
8819 struct elf32_arm_stub_hash_entry *stub_entry;
8820 struct elf32_arm_link_hash_entry *hash;
8821
8822 hash = (struct elf32_arm_link_hash_entry *) h;
8823
8824 stub_type = arm_type_of_stub (info, input_section, rel,
8825 st_type, &branch_type,
8826 hash, value, sym_sec,
8827 input_bfd, sym_name);
8828
8829 if (stub_type != arm_stub_none)
8830 {
8831 /* The target is out of reach or we are changing modes, so
8832 redirect the branch to the local stub for this
8833 function. */
8834 stub_entry = elf32_arm_get_stub_entry (input_section,
8835 sym_sec, h,
8836 rel, globals,
8837 stub_type);
8838 if (stub_entry != NULL)
8839 {
8840 value = (stub_entry->stub_offset
8841 + stub_entry->stub_sec->output_offset
8842 + stub_entry->stub_sec->output_section->vma);
8843
8844 if (plt_offset != (bfd_vma) -1)
8845 *unresolved_reloc_p = FALSE;
8846 }
8847
8848 /* If this call becomes a call to Arm, force BLX. */
8849 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
8850 {
8851 if ((stub_entry
8852 && !arm_stub_is_thumb (stub_entry->stub_type))
8853 || branch_type != ST_BRANCH_TO_THUMB)
8854 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8855 }
8856 }
8857 }
8858
8859 /* Handle calls via the PLT. */
8860 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
8861 {
8862 value = (splt->output_section->vma
8863 + splt->output_offset
8864 + plt_offset);
8865
8866 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8867 {
8868 /* If the Thumb BLX instruction is available, convert
8869 the BL to a BLX instruction to call the ARM-mode
8870 PLT entry. */
8871 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8872 branch_type = ST_BRANCH_TO_ARM;
8873 }
8874 else
8875 {
8876 /* Target the Thumb stub before the ARM PLT entry. */
8877 value -= PLT_THUMB_STUB_SIZE;
8878 branch_type = ST_BRANCH_TO_THUMB;
8879 }
8880 *unresolved_reloc_p = FALSE;
8881 }
8882
8883 relocation = value + signed_addend;
8884
8885 relocation -= (input_section->output_section->vma
8886 + input_section->output_offset
8887 + rel->r_offset);
8888
8889 check = relocation >> howto->rightshift;
8890
8891 /* If this is a signed value, the rightshift just dropped
8892 leading 1 bits (assuming twos complement). */
8893 if ((bfd_signed_vma) relocation >= 0)
8894 signed_check = check;
8895 else
8896 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8897
8898 /* Calculate the permissable maximum and minimum values for
8899 this relocation according to whether we're relocating for
8900 Thumb-2 or not. */
8901 bitsize = howto->bitsize;
8902 if (!thumb2)
8903 bitsize -= 2;
8904 reloc_signed_max = (1 << (bitsize - 1)) - 1;
8905 reloc_signed_min = ~reloc_signed_max;
8906
8907 /* Assumes two's complement. */
8908 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8909 overflow = TRUE;
8910
8911 if ((lower_insn & 0x5000) == 0x4000)
8912 /* For a BLX instruction, make sure that the relocation is rounded up
8913 to a word boundary. This follows the semantics of the instruction
8914 which specifies that bit 1 of the target address will come from bit
8915 1 of the base address. */
8916 relocation = (relocation + 2) & ~ 3;
8917
8918 /* Put RELOCATION back into the insn. Assumes two's complement.
8919 We use the Thumb-2 encoding, which is safe even if dealing with
8920 a Thumb-1 instruction by virtue of our overflow check above. */
8921 reloc_sign = (signed_check < 0) ? 1 : 0;
8922 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
8923 | ((relocation >> 12) & 0x3ff)
8924 | (reloc_sign << 10);
8925 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
8926 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8927 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8928 | ((relocation >> 1) & 0x7ff);
8929
8930 /* Put the relocated value back in the object file: */
8931 bfd_put_16 (input_bfd, upper_insn, hit_data);
8932 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8933
8934 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8935 }
8936 break;
8937
8938 case R_ARM_THM_JUMP19:
8939 /* Thumb32 conditional branch instruction. */
8940 {
8941 bfd_vma relocation;
8942 bfd_boolean overflow = FALSE;
8943 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8944 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
8945 bfd_signed_vma reloc_signed_max = 0xffffe;
8946 bfd_signed_vma reloc_signed_min = -0x100000;
8947 bfd_signed_vma signed_check;
8948
8949 /* Need to refetch the addend, reconstruct the top three bits,
8950 and squish the two 11 bit pieces together. */
8951 if (globals->use_rel)
8952 {
8953 bfd_vma S = (upper_insn & 0x0400) >> 10;
8954 bfd_vma upper = (upper_insn & 0x003f);
8955 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
8956 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
8957 bfd_vma lower = (lower_insn & 0x07ff);
8958
8959 upper |= J1 << 6;
8960 upper |= J2 << 7;
8961 upper |= (!S) << 8;
8962 upper -= 0x0100; /* Sign extend. */
8963
8964 addend = (upper << 12) | (lower << 1);
8965 signed_addend = addend;
8966 }
8967
8968 /* Handle calls via the PLT. */
8969 if (plt_offset != (bfd_vma) -1)
8970 {
8971 value = (splt->output_section->vma
8972 + splt->output_offset
8973 + plt_offset);
8974 /* Target the Thumb stub before the ARM PLT entry. */
8975 value -= PLT_THUMB_STUB_SIZE;
8976 *unresolved_reloc_p = FALSE;
8977 }
8978
8979 /* ??? Should handle interworking? GCC might someday try to
8980 use this for tail calls. */
8981
8982 relocation = value + signed_addend;
8983 relocation -= (input_section->output_section->vma
8984 + input_section->output_offset
8985 + rel->r_offset);
8986 signed_check = (bfd_signed_vma) relocation;
8987
8988 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8989 overflow = TRUE;
8990
8991 /* Put RELOCATION back into the insn. */
8992 {
8993 bfd_vma S = (relocation & 0x00100000) >> 20;
8994 bfd_vma J2 = (relocation & 0x00080000) >> 19;
8995 bfd_vma J1 = (relocation & 0x00040000) >> 18;
8996 bfd_vma hi = (relocation & 0x0003f000) >> 12;
8997 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
8998
8999 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
9000 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
9001 }
9002
9003 /* Put the relocated value back in the object file: */
9004 bfd_put_16 (input_bfd, upper_insn, hit_data);
9005 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9006
9007 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9008 }
9009
9010 case R_ARM_THM_JUMP11:
9011 case R_ARM_THM_JUMP8:
9012 case R_ARM_THM_JUMP6:
9013 /* Thumb B (branch) instruction). */
9014 {
9015 bfd_signed_vma relocation;
9016 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9017 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
9018 bfd_signed_vma signed_check;
9019
9020 /* CZB cannot jump backward. */
9021 if (r_type == R_ARM_THM_JUMP6)
9022 reloc_signed_min = 0;
9023
9024 if (globals->use_rel)
9025 {
9026 /* Need to refetch addend. */
9027 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9028 if (addend & ((howto->src_mask + 1) >> 1))
9029 {
9030 signed_addend = -1;
9031 signed_addend &= ~ howto->src_mask;
9032 signed_addend |= addend;
9033 }
9034 else
9035 signed_addend = addend;
9036 /* The value in the insn has been right shifted. We need to
9037 undo this, so that we can perform the address calculation
9038 in terms of bytes. */
9039 signed_addend <<= howto->rightshift;
9040 }
9041 relocation = value + signed_addend;
9042
9043 relocation -= (input_section->output_section->vma
9044 + input_section->output_offset
9045 + rel->r_offset);
9046
9047 relocation >>= howto->rightshift;
9048 signed_check = relocation;
9049
9050 if (r_type == R_ARM_THM_JUMP6)
9051 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9052 else
9053 relocation &= howto->dst_mask;
9054 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
9055
9056 bfd_put_16 (input_bfd, relocation, hit_data);
9057
9058 /* Assumes two's complement. */
9059 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9060 return bfd_reloc_overflow;
9061
9062 return bfd_reloc_ok;
9063 }
9064
9065 case R_ARM_ALU_PCREL7_0:
9066 case R_ARM_ALU_PCREL15_8:
9067 case R_ARM_ALU_PCREL23_15:
9068 {
9069 bfd_vma insn;
9070 bfd_vma relocation;
9071
9072 insn = bfd_get_32 (input_bfd, hit_data);
9073 if (globals->use_rel)
9074 {
9075 /* Extract the addend. */
9076 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9077 signed_addend = addend;
9078 }
9079 relocation = value + signed_addend;
9080
9081 relocation -= (input_section->output_section->vma
9082 + input_section->output_offset
9083 + rel->r_offset);
9084 insn = (insn & ~0xfff)
9085 | ((howto->bitpos << 7) & 0xf00)
9086 | ((relocation >> howto->bitpos) & 0xff);
9087 bfd_put_32 (input_bfd, value, hit_data);
9088 }
9089 return bfd_reloc_ok;
9090
9091 case R_ARM_GNU_VTINHERIT:
9092 case R_ARM_GNU_VTENTRY:
9093 return bfd_reloc_ok;
9094
9095 case R_ARM_GOTOFF32:
9096 /* Relocation is relative to the start of the
9097 global offset table. */
9098
9099 BFD_ASSERT (sgot != NULL);
9100 if (sgot == NULL)
9101 return bfd_reloc_notsupported;
9102
9103 /* If we are addressing a Thumb function, we need to adjust the
9104 address by one, so that attempts to call the function pointer will
9105 correctly interpret it as Thumb code. */
9106 if (branch_type == ST_BRANCH_TO_THUMB)
9107 value += 1;
9108
9109 /* Note that sgot->output_offset is not involved in this
9110 calculation. We always want the start of .got. If we
9111 define _GLOBAL_OFFSET_TABLE in a different way, as is
9112 permitted by the ABI, we might have to change this
9113 calculation. */
9114 value -= sgot->output_section->vma;
9115 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9116 contents, rel->r_offset, value,
9117 rel->r_addend);
9118
9119 case R_ARM_GOTPC:
9120 /* Use global offset table as symbol value. */
9121 BFD_ASSERT (sgot != NULL);
9122
9123 if (sgot == NULL)
9124 return bfd_reloc_notsupported;
9125
9126 *unresolved_reloc_p = FALSE;
9127 value = sgot->output_section->vma;
9128 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9129 contents, rel->r_offset, value,
9130 rel->r_addend);
9131
9132 case R_ARM_GOT32:
9133 case R_ARM_GOT_PREL:
9134 /* Relocation is to the entry for this symbol in the
9135 global offset table. */
9136 if (sgot == NULL)
9137 return bfd_reloc_notsupported;
9138
9139 if (dynreloc_st_type == STT_GNU_IFUNC
9140 && plt_offset != (bfd_vma) -1
9141 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
9142 {
9143 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9144 symbol, and the relocation resolves directly to the runtime
9145 target rather than to the .iplt entry. This means that any
9146 .got entry would be the same value as the .igot.plt entry,
9147 so there's no point creating both. */
9148 sgot = globals->root.igotplt;
9149 value = sgot->output_offset + gotplt_offset;
9150 }
9151 else if (h != NULL)
9152 {
9153 bfd_vma off;
9154
9155 off = h->got.offset;
9156 BFD_ASSERT (off != (bfd_vma) -1);
9157 if ((off & 1) != 0)
9158 {
9159 /* We have already processsed one GOT relocation against
9160 this symbol. */
9161 off &= ~1;
9162 if (globals->root.dynamic_sections_created
9163 && !SYMBOL_REFERENCES_LOCAL (info, h))
9164 *unresolved_reloc_p = FALSE;
9165 }
9166 else
9167 {
9168 Elf_Internal_Rela outrel;
9169
9170 if (!SYMBOL_REFERENCES_LOCAL (info, h))
9171 {
9172 /* If the symbol doesn't resolve locally in a static
9173 object, we have an undefined reference. If the
9174 symbol doesn't resolve locally in a dynamic object,
9175 it should be resolved by the dynamic linker. */
9176 if (globals->root.dynamic_sections_created)
9177 {
9178 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9179 *unresolved_reloc_p = FALSE;
9180 }
9181 else
9182 outrel.r_info = 0;
9183 outrel.r_addend = 0;
9184 }
9185 else
9186 {
9187 if (dynreloc_st_type == STT_GNU_IFUNC)
9188 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9189 else if (info->shared)
9190 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9191 else
9192 outrel.r_info = 0;
9193 outrel.r_addend = dynreloc_value;
9194 }
9195
9196 /* The GOT entry is initialized to zero by default.
9197 See if we should install a different value. */
9198 if (outrel.r_addend != 0
9199 && (outrel.r_info == 0 || globals->use_rel))
9200 {
9201 bfd_put_32 (output_bfd, outrel.r_addend,
9202 sgot->contents + off);
9203 outrel.r_addend = 0;
9204 }
9205
9206 if (outrel.r_info != 0)
9207 {
9208 outrel.r_offset = (sgot->output_section->vma
9209 + sgot->output_offset
9210 + off);
9211 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9212 }
9213 h->got.offset |= 1;
9214 }
9215 value = sgot->output_offset + off;
9216 }
9217 else
9218 {
9219 bfd_vma off;
9220
9221 BFD_ASSERT (local_got_offsets != NULL &&
9222 local_got_offsets[r_symndx] != (bfd_vma) -1);
9223
9224 off = local_got_offsets[r_symndx];
9225
9226 /* The offset must always be a multiple of 4. We use the
9227 least significant bit to record whether we have already
9228 generated the necessary reloc. */
9229 if ((off & 1) != 0)
9230 off &= ~1;
9231 else
9232 {
9233 if (globals->use_rel)
9234 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
9235
9236 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
9237 {
9238 Elf_Internal_Rela outrel;
9239
9240 outrel.r_addend = addend + dynreloc_value;
9241 outrel.r_offset = (sgot->output_section->vma
9242 + sgot->output_offset
9243 + off);
9244 if (dynreloc_st_type == STT_GNU_IFUNC)
9245 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9246 else
9247 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9248 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9249 }
9250
9251 local_got_offsets[r_symndx] |= 1;
9252 }
9253
9254 value = sgot->output_offset + off;
9255 }
9256 if (r_type != R_ARM_GOT32)
9257 value += sgot->output_section->vma;
9258
9259 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9260 contents, rel->r_offset, value,
9261 rel->r_addend);
9262
9263 case R_ARM_TLS_LDO32:
9264 value = value - dtpoff_base (info);
9265
9266 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9267 contents, rel->r_offset, value,
9268 rel->r_addend);
9269
9270 case R_ARM_TLS_LDM32:
9271 {
9272 bfd_vma off;
9273
9274 if (sgot == NULL)
9275 abort ();
9276
9277 off = globals->tls_ldm_got.offset;
9278
9279 if ((off & 1) != 0)
9280 off &= ~1;
9281 else
9282 {
9283 /* If we don't know the module number, create a relocation
9284 for it. */
9285 if (info->shared)
9286 {
9287 Elf_Internal_Rela outrel;
9288
9289 if (srelgot == NULL)
9290 abort ();
9291
9292 outrel.r_addend = 0;
9293 outrel.r_offset = (sgot->output_section->vma
9294 + sgot->output_offset + off);
9295 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9296
9297 if (globals->use_rel)
9298 bfd_put_32 (output_bfd, outrel.r_addend,
9299 sgot->contents + off);
9300
9301 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9302 }
9303 else
9304 bfd_put_32 (output_bfd, 1, sgot->contents + off);
9305
9306 globals->tls_ldm_got.offset |= 1;
9307 }
9308
9309 value = sgot->output_section->vma + sgot->output_offset + off
9310 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9311
9312 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9313 contents, rel->r_offset, value,
9314 rel->r_addend);
9315 }
9316
9317 case R_ARM_TLS_CALL:
9318 case R_ARM_THM_TLS_CALL:
9319 case R_ARM_TLS_GD32:
9320 case R_ARM_TLS_IE32:
9321 case R_ARM_TLS_GOTDESC:
9322 case R_ARM_TLS_DESCSEQ:
9323 case R_ARM_THM_TLS_DESCSEQ:
9324 {
9325 bfd_vma off, offplt;
9326 int indx = 0;
9327 char tls_type;
9328
9329 BFD_ASSERT (sgot != NULL);
9330
9331 if (h != NULL)
9332 {
9333 bfd_boolean dyn;
9334 dyn = globals->root.dynamic_sections_created;
9335 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9336 && (!info->shared
9337 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9338 {
9339 *unresolved_reloc_p = FALSE;
9340 indx = h->dynindx;
9341 }
9342 off = h->got.offset;
9343 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
9344 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9345 }
9346 else
9347 {
9348 BFD_ASSERT (local_got_offsets != NULL);
9349 off = local_got_offsets[r_symndx];
9350 offplt = local_tlsdesc_gotents[r_symndx];
9351 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9352 }
9353
9354 /* Linker relaxations happens from one of the
9355 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
9356 if (ELF32_R_TYPE(rel->r_info) != r_type)
9357 tls_type = GOT_TLS_IE;
9358
9359 BFD_ASSERT (tls_type != GOT_UNKNOWN);
9360
9361 if ((off & 1) != 0)
9362 off &= ~1;
9363 else
9364 {
9365 bfd_boolean need_relocs = FALSE;
9366 Elf_Internal_Rela outrel;
9367 int cur_off = off;
9368
9369 /* The GOT entries have not been initialized yet. Do it
9370 now, and emit any relocations. If both an IE GOT and a
9371 GD GOT are necessary, we emit the GD first. */
9372
9373 if ((info->shared || indx != 0)
9374 && (h == NULL
9375 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9376 || h->root.type != bfd_link_hash_undefweak))
9377 {
9378 need_relocs = TRUE;
9379 BFD_ASSERT (srelgot != NULL);
9380 }
9381
9382 if (tls_type & GOT_TLS_GDESC)
9383 {
9384 bfd_byte *loc;
9385
9386 /* We should have relaxed, unless this is an undefined
9387 weak symbol. */
9388 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9389 || info->shared);
9390 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
9391 <= globals->root.sgotplt->size);
9392
9393 outrel.r_addend = 0;
9394 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9395 + globals->root.sgotplt->output_offset
9396 + offplt
9397 + globals->sgotplt_jump_table_size);
9398
9399 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9400 sreloc = globals->root.srelplt;
9401 loc = sreloc->contents;
9402 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9403 BFD_ASSERT (loc + RELOC_SIZE (globals)
9404 <= sreloc->contents + sreloc->size);
9405
9406 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9407
9408 /* For globals, the first word in the relocation gets
9409 the relocation index and the top bit set, or zero,
9410 if we're binding now. For locals, it gets the
9411 symbol's offset in the tls section. */
9412 bfd_put_32 (output_bfd,
9413 !h ? value - elf_hash_table (info)->tls_sec->vma
9414 : info->flags & DF_BIND_NOW ? 0
9415 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
9416 globals->root.sgotplt->contents + offplt
9417 + globals->sgotplt_jump_table_size);
9418
9419 /* Second word in the relocation is always zero. */
9420 bfd_put_32 (output_bfd, 0,
9421 globals->root.sgotplt->contents + offplt
9422 + globals->sgotplt_jump_table_size + 4);
9423 }
9424 if (tls_type & GOT_TLS_GD)
9425 {
9426 if (need_relocs)
9427 {
9428 outrel.r_addend = 0;
9429 outrel.r_offset = (sgot->output_section->vma
9430 + sgot->output_offset
9431 + cur_off);
9432 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
9433
9434 if (globals->use_rel)
9435 bfd_put_32 (output_bfd, outrel.r_addend,
9436 sgot->contents + cur_off);
9437
9438 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9439
9440 if (indx == 0)
9441 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9442 sgot->contents + cur_off + 4);
9443 else
9444 {
9445 outrel.r_addend = 0;
9446 outrel.r_info = ELF32_R_INFO (indx,
9447 R_ARM_TLS_DTPOFF32);
9448 outrel.r_offset += 4;
9449
9450 if (globals->use_rel)
9451 bfd_put_32 (output_bfd, outrel.r_addend,
9452 sgot->contents + cur_off + 4);
9453
9454 elf32_arm_add_dynreloc (output_bfd, info,
9455 srelgot, &outrel);
9456 }
9457 }
9458 else
9459 {
9460 /* If we are not emitting relocations for a
9461 general dynamic reference, then we must be in a
9462 static link or an executable link with the
9463 symbol binding locally. Mark it as belonging
9464 to module 1, the executable. */
9465 bfd_put_32 (output_bfd, 1,
9466 sgot->contents + cur_off);
9467 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9468 sgot->contents + cur_off + 4);
9469 }
9470
9471 cur_off += 8;
9472 }
9473
9474 if (tls_type & GOT_TLS_IE)
9475 {
9476 if (need_relocs)
9477 {
9478 if (indx == 0)
9479 outrel.r_addend = value - dtpoff_base (info);
9480 else
9481 outrel.r_addend = 0;
9482 outrel.r_offset = (sgot->output_section->vma
9483 + sgot->output_offset
9484 + cur_off);
9485 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9486
9487 if (globals->use_rel)
9488 bfd_put_32 (output_bfd, outrel.r_addend,
9489 sgot->contents + cur_off);
9490
9491 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9492 }
9493 else
9494 bfd_put_32 (output_bfd, tpoff (info, value),
9495 sgot->contents + cur_off);
9496 cur_off += 4;
9497 }
9498
9499 if (h != NULL)
9500 h->got.offset |= 1;
9501 else
9502 local_got_offsets[r_symndx] |= 1;
9503 }
9504
9505 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9506 off += 8;
9507 else if (tls_type & GOT_TLS_GDESC)
9508 off = offplt;
9509
9510 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9511 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9512 {
9513 bfd_signed_vma offset;
9514 /* TLS stubs are arm mode. The original symbol is a
9515 data object, so branch_type is bogus. */
9516 branch_type = ST_BRANCH_TO_ARM;
9517 enum elf32_arm_stub_type stub_type
9518 = arm_type_of_stub (info, input_section, rel,
9519 st_type, &branch_type,
9520 (struct elf32_arm_link_hash_entry *)h,
9521 globals->tls_trampoline, globals->root.splt,
9522 input_bfd, sym_name);
9523
9524 if (stub_type != arm_stub_none)
9525 {
9526 struct elf32_arm_stub_hash_entry *stub_entry
9527 = elf32_arm_get_stub_entry
9528 (input_section, globals->root.splt, 0, rel,
9529 globals, stub_type);
9530 offset = (stub_entry->stub_offset
9531 + stub_entry->stub_sec->output_offset
9532 + stub_entry->stub_sec->output_section->vma);
9533 }
9534 else
9535 offset = (globals->root.splt->output_section->vma
9536 + globals->root.splt->output_offset
9537 + globals->tls_trampoline);
9538
9539 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9540 {
9541 unsigned long inst;
9542
9543 offset -= (input_section->output_section->vma
9544 + input_section->output_offset
9545 + rel->r_offset + 8);
9546
9547 inst = offset >> 2;
9548 inst &= 0x00ffffff;
9549 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9550 }
9551 else
9552 {
9553 /* Thumb blx encodes the offset in a complicated
9554 fashion. */
9555 unsigned upper_insn, lower_insn;
9556 unsigned neg;
9557
9558 offset -= (input_section->output_section->vma
9559 + input_section->output_offset
9560 + rel->r_offset + 4);
9561
9562 if (stub_type != arm_stub_none
9563 && arm_stub_is_thumb (stub_type))
9564 {
9565 lower_insn = 0xd000;
9566 }
9567 else
9568 {
9569 lower_insn = 0xc000;
9570 /* Round up the offset to a word boundary */
9571 offset = (offset + 2) & ~2;
9572 }
9573
9574 neg = offset < 0;
9575 upper_insn = (0xf000
9576 | ((offset >> 12) & 0x3ff)
9577 | (neg << 10));
9578 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
9579 | (((!((offset >> 22) & 1)) ^ neg) << 11)
9580 | ((offset >> 1) & 0x7ff);
9581 bfd_put_16 (input_bfd, upper_insn, hit_data);
9582 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9583 return bfd_reloc_ok;
9584 }
9585 }
9586 /* These relocations needs special care, as besides the fact
9587 they point somewhere in .gotplt, the addend must be
9588 adjusted accordingly depending on the type of instruction
9589 we refer to */
9590 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9591 {
9592 unsigned long data, insn;
9593 unsigned thumb;
9594
9595 data = bfd_get_32 (input_bfd, hit_data);
9596 thumb = data & 1;
9597 data &= ~1u;
9598
9599 if (thumb)
9600 {
9601 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9602 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9603 insn = (insn << 16)
9604 | bfd_get_16 (input_bfd,
9605 contents + rel->r_offset - data + 2);
9606 if ((insn & 0xf800c000) == 0xf000c000)
9607 /* bl/blx */
9608 value = -6;
9609 else if ((insn & 0xffffff00) == 0x4400)
9610 /* add */
9611 value = -5;
9612 else
9613 {
9614 (*_bfd_error_handler)
9615 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9616 input_bfd, input_section,
9617 (unsigned long)rel->r_offset, insn);
9618 return bfd_reloc_notsupported;
9619 }
9620 }
9621 else
9622 {
9623 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9624
9625 switch (insn >> 24)
9626 {
9627 case 0xeb: /* bl */
9628 case 0xfa: /* blx */
9629 value = -4;
9630 break;
9631
9632 case 0xe0: /* add */
9633 value = -8;
9634 break;
9635
9636 default:
9637 (*_bfd_error_handler)
9638 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9639 input_bfd, input_section,
9640 (unsigned long)rel->r_offset, insn);
9641 return bfd_reloc_notsupported;
9642 }
9643 }
9644
9645 value += ((globals->root.sgotplt->output_section->vma
9646 + globals->root.sgotplt->output_offset + off)
9647 - (input_section->output_section->vma
9648 + input_section->output_offset
9649 + rel->r_offset)
9650 + globals->sgotplt_jump_table_size);
9651 }
9652 else
9653 value = ((globals->root.sgot->output_section->vma
9654 + globals->root.sgot->output_offset + off)
9655 - (input_section->output_section->vma
9656 + input_section->output_offset + rel->r_offset));
9657
9658 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9659 contents, rel->r_offset, value,
9660 rel->r_addend);
9661 }
9662
9663 case R_ARM_TLS_LE32:
9664 if (info->shared && !info->pie)
9665 {
9666 (*_bfd_error_handler)
9667 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9668 input_bfd, input_section,
9669 (long) rel->r_offset, howto->name);
9670 return bfd_reloc_notsupported;
9671 }
9672 else
9673 value = tpoff (info, value);
9674
9675 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9676 contents, rel->r_offset, value,
9677 rel->r_addend);
9678
9679 case R_ARM_V4BX:
9680 if (globals->fix_v4bx)
9681 {
9682 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9683
9684 /* Ensure that we have a BX instruction. */
9685 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
9686
9687 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9688 {
9689 /* Branch to veneer. */
9690 bfd_vma glue_addr;
9691 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9692 glue_addr -= input_section->output_section->vma
9693 + input_section->output_offset
9694 + rel->r_offset + 8;
9695 insn = (insn & 0xf0000000) | 0x0a000000
9696 | ((glue_addr >> 2) & 0x00ffffff);
9697 }
9698 else
9699 {
9700 /* Preserve Rm (lowest four bits) and the condition code
9701 (highest four bits). Other bits encode MOV PC,Rm. */
9702 insn = (insn & 0xf000000f) | 0x01a0f000;
9703 }
9704
9705 bfd_put_32 (input_bfd, insn, hit_data);
9706 }
9707 return bfd_reloc_ok;
9708
9709 case R_ARM_MOVW_ABS_NC:
9710 case R_ARM_MOVT_ABS:
9711 case R_ARM_MOVW_PREL_NC:
9712 case R_ARM_MOVT_PREL:
9713 /* Until we properly support segment-base-relative addressing then
9714 we assume the segment base to be zero, as for the group relocations.
9715 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9716 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9717 case R_ARM_MOVW_BREL_NC:
9718 case R_ARM_MOVW_BREL:
9719 case R_ARM_MOVT_BREL:
9720 {
9721 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9722
9723 if (globals->use_rel)
9724 {
9725 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
9726 signed_addend = (addend ^ 0x8000) - 0x8000;
9727 }
9728
9729 value += signed_addend;
9730
9731 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9732 value -= (input_section->output_section->vma
9733 + input_section->output_offset + rel->r_offset);
9734
9735 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
9736 return bfd_reloc_overflow;
9737
9738 if (branch_type == ST_BRANCH_TO_THUMB)
9739 value |= 1;
9740
9741 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
9742 || r_type == R_ARM_MOVT_BREL)
9743 value >>= 16;
9744
9745 insn &= 0xfff0f000;
9746 insn |= value & 0xfff;
9747 insn |= (value & 0xf000) << 4;
9748 bfd_put_32 (input_bfd, insn, hit_data);
9749 }
9750 return bfd_reloc_ok;
9751
9752 case R_ARM_THM_MOVW_ABS_NC:
9753 case R_ARM_THM_MOVT_ABS:
9754 case R_ARM_THM_MOVW_PREL_NC:
9755 case R_ARM_THM_MOVT_PREL:
9756 /* Until we properly support segment-base-relative addressing then
9757 we assume the segment base to be zero, as for the above relocations.
9758 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9759 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9760 as R_ARM_THM_MOVT_ABS. */
9761 case R_ARM_THM_MOVW_BREL_NC:
9762 case R_ARM_THM_MOVW_BREL:
9763 case R_ARM_THM_MOVT_BREL:
9764 {
9765 bfd_vma insn;
9766
9767 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9768 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9769
9770 if (globals->use_rel)
9771 {
9772 addend = ((insn >> 4) & 0xf000)
9773 | ((insn >> 15) & 0x0800)
9774 | ((insn >> 4) & 0x0700)
9775 | (insn & 0x00ff);
9776 signed_addend = (addend ^ 0x8000) - 0x8000;
9777 }
9778
9779 value += signed_addend;
9780
9781 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9782 value -= (input_section->output_section->vma
9783 + input_section->output_offset + rel->r_offset);
9784
9785 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
9786 return bfd_reloc_overflow;
9787
9788 if (branch_type == ST_BRANCH_TO_THUMB)
9789 value |= 1;
9790
9791 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
9792 || r_type == R_ARM_THM_MOVT_BREL)
9793 value >>= 16;
9794
9795 insn &= 0xfbf08f00;
9796 insn |= (value & 0xf000) << 4;
9797 insn |= (value & 0x0800) << 15;
9798 insn |= (value & 0x0700) << 4;
9799 insn |= (value & 0x00ff);
9800
9801 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9802 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9803 }
9804 return bfd_reloc_ok;
9805
9806 case R_ARM_ALU_PC_G0_NC:
9807 case R_ARM_ALU_PC_G1_NC:
9808 case R_ARM_ALU_PC_G0:
9809 case R_ARM_ALU_PC_G1:
9810 case R_ARM_ALU_PC_G2:
9811 case R_ARM_ALU_SB_G0_NC:
9812 case R_ARM_ALU_SB_G1_NC:
9813 case R_ARM_ALU_SB_G0:
9814 case R_ARM_ALU_SB_G1:
9815 case R_ARM_ALU_SB_G2:
9816 {
9817 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9818 bfd_vma pc = input_section->output_section->vma
9819 + input_section->output_offset + rel->r_offset;
9820 /* sb should be the origin of the *segment* containing the symbol.
9821 It is not clear how to obtain this OS-dependent value, so we
9822 make an arbitrary choice of zero. */
9823 bfd_vma sb = 0;
9824 bfd_vma residual;
9825 bfd_vma g_n;
9826 bfd_signed_vma signed_value;
9827 int group = 0;
9828
9829 /* Determine which group of bits to select. */
9830 switch (r_type)
9831 {
9832 case R_ARM_ALU_PC_G0_NC:
9833 case R_ARM_ALU_PC_G0:
9834 case R_ARM_ALU_SB_G0_NC:
9835 case R_ARM_ALU_SB_G0:
9836 group = 0;
9837 break;
9838
9839 case R_ARM_ALU_PC_G1_NC:
9840 case R_ARM_ALU_PC_G1:
9841 case R_ARM_ALU_SB_G1_NC:
9842 case R_ARM_ALU_SB_G1:
9843 group = 1;
9844 break;
9845
9846 case R_ARM_ALU_PC_G2:
9847 case R_ARM_ALU_SB_G2:
9848 group = 2;
9849 break;
9850
9851 default:
9852 abort ();
9853 }
9854
9855 /* If REL, extract the addend from the insn. If RELA, it will
9856 have already been fetched for us. */
9857 if (globals->use_rel)
9858 {
9859 int negative;
9860 bfd_vma constant = insn & 0xff;
9861 bfd_vma rotation = (insn & 0xf00) >> 8;
9862
9863 if (rotation == 0)
9864 signed_addend = constant;
9865 else
9866 {
9867 /* Compensate for the fact that in the instruction, the
9868 rotation is stored in multiples of 2 bits. */
9869 rotation *= 2;
9870
9871 /* Rotate "constant" right by "rotation" bits. */
9872 signed_addend = (constant >> rotation) |
9873 (constant << (8 * sizeof (bfd_vma) - rotation));
9874 }
9875
9876 /* Determine if the instruction is an ADD or a SUB.
9877 (For REL, this determines the sign of the addend.) */
9878 negative = identify_add_or_sub (insn);
9879 if (negative == 0)
9880 {
9881 (*_bfd_error_handler)
9882 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9883 input_bfd, input_section,
9884 (long) rel->r_offset, howto->name);
9885 return bfd_reloc_overflow;
9886 }
9887
9888 signed_addend *= negative;
9889 }
9890
9891 /* Compute the value (X) to go in the place. */
9892 if (r_type == R_ARM_ALU_PC_G0_NC
9893 || r_type == R_ARM_ALU_PC_G1_NC
9894 || r_type == R_ARM_ALU_PC_G0
9895 || r_type == R_ARM_ALU_PC_G1
9896 || r_type == R_ARM_ALU_PC_G2)
9897 /* PC relative. */
9898 signed_value = value - pc + signed_addend;
9899 else
9900 /* Section base relative. */
9901 signed_value = value - sb + signed_addend;
9902
9903 /* If the target symbol is a Thumb function, then set the
9904 Thumb bit in the address. */
9905 if (branch_type == ST_BRANCH_TO_THUMB)
9906 signed_value |= 1;
9907
9908 /* Calculate the value of the relevant G_n, in encoded
9909 constant-with-rotation format. */
9910 g_n = calculate_group_reloc_mask (abs (signed_value), group,
9911 &residual);
9912
9913 /* Check for overflow if required. */
9914 if ((r_type == R_ARM_ALU_PC_G0
9915 || r_type == R_ARM_ALU_PC_G1
9916 || r_type == R_ARM_ALU_PC_G2
9917 || r_type == R_ARM_ALU_SB_G0
9918 || r_type == R_ARM_ALU_SB_G1
9919 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
9920 {
9921 (*_bfd_error_handler)
9922 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9923 input_bfd, input_section,
9924 (long) rel->r_offset, abs (signed_value), howto->name);
9925 return bfd_reloc_overflow;
9926 }
9927
9928 /* Mask out the value and the ADD/SUB part of the opcode; take care
9929 not to destroy the S bit. */
9930 insn &= 0xff1ff000;
9931
9932 /* Set the opcode according to whether the value to go in the
9933 place is negative. */
9934 if (signed_value < 0)
9935 insn |= 1 << 22;
9936 else
9937 insn |= 1 << 23;
9938
9939 /* Encode the offset. */
9940 insn |= g_n;
9941
9942 bfd_put_32 (input_bfd, insn, hit_data);
9943 }
9944 return bfd_reloc_ok;
9945
9946 case R_ARM_LDR_PC_G0:
9947 case R_ARM_LDR_PC_G1:
9948 case R_ARM_LDR_PC_G2:
9949 case R_ARM_LDR_SB_G0:
9950 case R_ARM_LDR_SB_G1:
9951 case R_ARM_LDR_SB_G2:
9952 {
9953 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9954 bfd_vma pc = input_section->output_section->vma
9955 + input_section->output_offset + rel->r_offset;
9956 bfd_vma sb = 0; /* See note above. */
9957 bfd_vma residual;
9958 bfd_signed_vma signed_value;
9959 int group = 0;
9960
9961 /* Determine which groups of bits to calculate. */
9962 switch (r_type)
9963 {
9964 case R_ARM_LDR_PC_G0:
9965 case R_ARM_LDR_SB_G0:
9966 group = 0;
9967 break;
9968
9969 case R_ARM_LDR_PC_G1:
9970 case R_ARM_LDR_SB_G1:
9971 group = 1;
9972 break;
9973
9974 case R_ARM_LDR_PC_G2:
9975 case R_ARM_LDR_SB_G2:
9976 group = 2;
9977 break;
9978
9979 default:
9980 abort ();
9981 }
9982
9983 /* If REL, extract the addend from the insn. If RELA, it will
9984 have already been fetched for us. */
9985 if (globals->use_rel)
9986 {
9987 int negative = (insn & (1 << 23)) ? 1 : -1;
9988 signed_addend = negative * (insn & 0xfff);
9989 }
9990
9991 /* Compute the value (X) to go in the place. */
9992 if (r_type == R_ARM_LDR_PC_G0
9993 || r_type == R_ARM_LDR_PC_G1
9994 || r_type == R_ARM_LDR_PC_G2)
9995 /* PC relative. */
9996 signed_value = value - pc + signed_addend;
9997 else
9998 /* Section base relative. */
9999 signed_value = value - sb + signed_addend;
10000
10001 /* Calculate the value of the relevant G_{n-1} to obtain
10002 the residual at that stage. */
10003 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10004
10005 /* Check for overflow. */
10006 if (residual >= 0x1000)
10007 {
10008 (*_bfd_error_handler)
10009 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10010 input_bfd, input_section,
10011 (long) rel->r_offset, abs (signed_value), howto->name);
10012 return bfd_reloc_overflow;
10013 }
10014
10015 /* Mask out the value and U bit. */
10016 insn &= 0xff7ff000;
10017
10018 /* Set the U bit if the value to go in the place is non-negative. */
10019 if (signed_value >= 0)
10020 insn |= 1 << 23;
10021
10022 /* Encode the offset. */
10023 insn |= residual;
10024
10025 bfd_put_32 (input_bfd, insn, hit_data);
10026 }
10027 return bfd_reloc_ok;
10028
10029 case R_ARM_LDRS_PC_G0:
10030 case R_ARM_LDRS_PC_G1:
10031 case R_ARM_LDRS_PC_G2:
10032 case R_ARM_LDRS_SB_G0:
10033 case R_ARM_LDRS_SB_G1:
10034 case R_ARM_LDRS_SB_G2:
10035 {
10036 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10037 bfd_vma pc = input_section->output_section->vma
10038 + input_section->output_offset + rel->r_offset;
10039 bfd_vma sb = 0; /* See note above. */
10040 bfd_vma residual;
10041 bfd_signed_vma signed_value;
10042 int group = 0;
10043
10044 /* Determine which groups of bits to calculate. */
10045 switch (r_type)
10046 {
10047 case R_ARM_LDRS_PC_G0:
10048 case R_ARM_LDRS_SB_G0:
10049 group = 0;
10050 break;
10051
10052 case R_ARM_LDRS_PC_G1:
10053 case R_ARM_LDRS_SB_G1:
10054 group = 1;
10055 break;
10056
10057 case R_ARM_LDRS_PC_G2:
10058 case R_ARM_LDRS_SB_G2:
10059 group = 2;
10060 break;
10061
10062 default:
10063 abort ();
10064 }
10065
10066 /* If REL, extract the addend from the insn. If RELA, it will
10067 have already been fetched for us. */
10068 if (globals->use_rel)
10069 {
10070 int negative = (insn & (1 << 23)) ? 1 : -1;
10071 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10072 }
10073
10074 /* Compute the value (X) to go in the place. */
10075 if (r_type == R_ARM_LDRS_PC_G0
10076 || r_type == R_ARM_LDRS_PC_G1
10077 || r_type == R_ARM_LDRS_PC_G2)
10078 /* PC relative. */
10079 signed_value = value - pc + signed_addend;
10080 else
10081 /* Section base relative. */
10082 signed_value = value - sb + signed_addend;
10083
10084 /* Calculate the value of the relevant G_{n-1} to obtain
10085 the residual at that stage. */
10086 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10087
10088 /* Check for overflow. */
10089 if (residual >= 0x100)
10090 {
10091 (*_bfd_error_handler)
10092 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10093 input_bfd, input_section,
10094 (long) rel->r_offset, abs (signed_value), howto->name);
10095 return bfd_reloc_overflow;
10096 }
10097
10098 /* Mask out the value and U bit. */
10099 insn &= 0xff7ff0f0;
10100
10101 /* Set the U bit if the value to go in the place is non-negative. */
10102 if (signed_value >= 0)
10103 insn |= 1 << 23;
10104
10105 /* Encode the offset. */
10106 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
10107
10108 bfd_put_32 (input_bfd, insn, hit_data);
10109 }
10110 return bfd_reloc_ok;
10111
10112 case R_ARM_LDC_PC_G0:
10113 case R_ARM_LDC_PC_G1:
10114 case R_ARM_LDC_PC_G2:
10115 case R_ARM_LDC_SB_G0:
10116 case R_ARM_LDC_SB_G1:
10117 case R_ARM_LDC_SB_G2:
10118 {
10119 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10120 bfd_vma pc = input_section->output_section->vma
10121 + input_section->output_offset + rel->r_offset;
10122 bfd_vma sb = 0; /* See note above. */
10123 bfd_vma residual;
10124 bfd_signed_vma signed_value;
10125 int group = 0;
10126
10127 /* Determine which groups of bits to calculate. */
10128 switch (r_type)
10129 {
10130 case R_ARM_LDC_PC_G0:
10131 case R_ARM_LDC_SB_G0:
10132 group = 0;
10133 break;
10134
10135 case R_ARM_LDC_PC_G1:
10136 case R_ARM_LDC_SB_G1:
10137 group = 1;
10138 break;
10139
10140 case R_ARM_LDC_PC_G2:
10141 case R_ARM_LDC_SB_G2:
10142 group = 2;
10143 break;
10144
10145 default:
10146 abort ();
10147 }
10148
10149 /* If REL, extract the addend from the insn. If RELA, it will
10150 have already been fetched for us. */
10151 if (globals->use_rel)
10152 {
10153 int negative = (insn & (1 << 23)) ? 1 : -1;
10154 signed_addend = negative * ((insn & 0xff) << 2);
10155 }
10156
10157 /* Compute the value (X) to go in the place. */
10158 if (r_type == R_ARM_LDC_PC_G0
10159 || r_type == R_ARM_LDC_PC_G1
10160 || r_type == R_ARM_LDC_PC_G2)
10161 /* PC relative. */
10162 signed_value = value - pc + signed_addend;
10163 else
10164 /* Section base relative. */
10165 signed_value = value - sb + signed_addend;
10166
10167 /* Calculate the value of the relevant G_{n-1} to obtain
10168 the residual at that stage. */
10169 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10170
10171 /* Check for overflow. (The absolute value to go in the place must be
10172 divisible by four and, after having been divided by four, must
10173 fit in eight bits.) */
10174 if ((residual & 0x3) != 0 || residual >= 0x400)
10175 {
10176 (*_bfd_error_handler)
10177 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10178 input_bfd, input_section,
10179 (long) rel->r_offset, abs (signed_value), howto->name);
10180 return bfd_reloc_overflow;
10181 }
10182
10183 /* Mask out the value and U bit. */
10184 insn &= 0xff7fff00;
10185
10186 /* Set the U bit if the value to go in the place is non-negative. */
10187 if (signed_value >= 0)
10188 insn |= 1 << 23;
10189
10190 /* Encode the offset. */
10191 insn |= residual >> 2;
10192
10193 bfd_put_32 (input_bfd, insn, hit_data);
10194 }
10195 return bfd_reloc_ok;
10196
10197 default:
10198 return bfd_reloc_notsupported;
10199 }
10200 }
10201
10202 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10203 static void
10204 arm_add_to_rel (bfd * abfd,
10205 bfd_byte * address,
10206 reloc_howto_type * howto,
10207 bfd_signed_vma increment)
10208 {
10209 bfd_signed_vma addend;
10210
10211 if (howto->type == R_ARM_THM_CALL
10212 || howto->type == R_ARM_THM_JUMP24)
10213 {
10214 int upper_insn, lower_insn;
10215 int upper, lower;
10216
10217 upper_insn = bfd_get_16 (abfd, address);
10218 lower_insn = bfd_get_16 (abfd, address + 2);
10219 upper = upper_insn & 0x7ff;
10220 lower = lower_insn & 0x7ff;
10221
10222 addend = (upper << 12) | (lower << 1);
10223 addend += increment;
10224 addend >>= 1;
10225
10226 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10227 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10228
10229 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10230 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
10231 }
10232 else
10233 {
10234 bfd_vma contents;
10235
10236 contents = bfd_get_32 (abfd, address);
10237
10238 /* Get the (signed) value from the instruction. */
10239 addend = contents & howto->src_mask;
10240 if (addend & ((howto->src_mask + 1) >> 1))
10241 {
10242 bfd_signed_vma mask;
10243
10244 mask = -1;
10245 mask &= ~ howto->src_mask;
10246 addend |= mask;
10247 }
10248
10249 /* Add in the increment, (which is a byte value). */
10250 switch (howto->type)
10251 {
10252 default:
10253 addend += increment;
10254 break;
10255
10256 case R_ARM_PC24:
10257 case R_ARM_PLT32:
10258 case R_ARM_CALL:
10259 case R_ARM_JUMP24:
10260 addend <<= howto->size;
10261 addend += increment;
10262
10263 /* Should we check for overflow here ? */
10264
10265 /* Drop any undesired bits. */
10266 addend >>= howto->rightshift;
10267 break;
10268 }
10269
10270 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10271
10272 bfd_put_32 (abfd, contents, address);
10273 }
10274 }
10275
10276 #define IS_ARM_TLS_RELOC(R_TYPE) \
10277 ((R_TYPE) == R_ARM_TLS_GD32 \
10278 || (R_TYPE) == R_ARM_TLS_LDO32 \
10279 || (R_TYPE) == R_ARM_TLS_LDM32 \
10280 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10281 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10282 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10283 || (R_TYPE) == R_ARM_TLS_LE32 \
10284 || (R_TYPE) == R_ARM_TLS_IE32 \
10285 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10286
10287 /* Specific set of relocations for the gnu tls dialect. */
10288 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10289 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10290 || (R_TYPE) == R_ARM_TLS_CALL \
10291 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10292 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10293 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
10294
10295 /* Relocate an ARM ELF section. */
10296
10297 static bfd_boolean
10298 elf32_arm_relocate_section (bfd * output_bfd,
10299 struct bfd_link_info * info,
10300 bfd * input_bfd,
10301 asection * input_section,
10302 bfd_byte * contents,
10303 Elf_Internal_Rela * relocs,
10304 Elf_Internal_Sym * local_syms,
10305 asection ** local_sections)
10306 {
10307 Elf_Internal_Shdr *symtab_hdr;
10308 struct elf_link_hash_entry **sym_hashes;
10309 Elf_Internal_Rela *rel;
10310 Elf_Internal_Rela *relend;
10311 const char *name;
10312 struct elf32_arm_link_hash_table * globals;
10313
10314 globals = elf32_arm_hash_table (info);
10315 if (globals == NULL)
10316 return FALSE;
10317
10318 symtab_hdr = & elf_symtab_hdr (input_bfd);
10319 sym_hashes = elf_sym_hashes (input_bfd);
10320
10321 rel = relocs;
10322 relend = relocs + input_section->reloc_count;
10323 for (; rel < relend; rel++)
10324 {
10325 int r_type;
10326 reloc_howto_type * howto;
10327 unsigned long r_symndx;
10328 Elf_Internal_Sym * sym;
10329 asection * sec;
10330 struct elf_link_hash_entry * h;
10331 bfd_vma relocation;
10332 bfd_reloc_status_type r;
10333 arelent bfd_reloc;
10334 char sym_type;
10335 bfd_boolean unresolved_reloc = FALSE;
10336 char *error_message = NULL;
10337
10338 r_symndx = ELF32_R_SYM (rel->r_info);
10339 r_type = ELF32_R_TYPE (rel->r_info);
10340 r_type = arm_real_reloc_type (globals, r_type);
10341
10342 if ( r_type == R_ARM_GNU_VTENTRY
10343 || r_type == R_ARM_GNU_VTINHERIT)
10344 continue;
10345
10346 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
10347 howto = bfd_reloc.howto;
10348
10349 h = NULL;
10350 sym = NULL;
10351 sec = NULL;
10352
10353 if (r_symndx < symtab_hdr->sh_info)
10354 {
10355 sym = local_syms + r_symndx;
10356 sym_type = ELF32_ST_TYPE (sym->st_info);
10357 sec = local_sections[r_symndx];
10358
10359 /* An object file might have a reference to a local
10360 undefined symbol. This is a daft object file, but we
10361 should at least do something about it. V4BX & NONE
10362 relocations do not use the symbol and are explicitly
10363 allowed to use the undefined symbol, so allow those.
10364 Likewise for relocations against STN_UNDEF. */
10365 if (r_type != R_ARM_V4BX
10366 && r_type != R_ARM_NONE
10367 && r_symndx != STN_UNDEF
10368 && bfd_is_und_section (sec)
10369 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10370 {
10371 if (!info->callbacks->undefined_symbol
10372 (info, bfd_elf_string_from_elf_section
10373 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10374 input_bfd, input_section,
10375 rel->r_offset, TRUE))
10376 return FALSE;
10377 }
10378
10379 if (globals->use_rel)
10380 {
10381 relocation = (sec->output_section->vma
10382 + sec->output_offset
10383 + sym->st_value);
10384 if (!info->relocatable
10385 && (sec->flags & SEC_MERGE)
10386 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10387 {
10388 asection *msec;
10389 bfd_vma addend, value;
10390
10391 switch (r_type)
10392 {
10393 case R_ARM_MOVW_ABS_NC:
10394 case R_ARM_MOVT_ABS:
10395 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10396 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10397 addend = (addend ^ 0x8000) - 0x8000;
10398 break;
10399
10400 case R_ARM_THM_MOVW_ABS_NC:
10401 case R_ARM_THM_MOVT_ABS:
10402 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10403 << 16;
10404 value |= bfd_get_16 (input_bfd,
10405 contents + rel->r_offset + 2);
10406 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10407 | ((value & 0x04000000) >> 15);
10408 addend = (addend ^ 0x8000) - 0x8000;
10409 break;
10410
10411 default:
10412 if (howto->rightshift
10413 || (howto->src_mask & (howto->src_mask + 1)))
10414 {
10415 (*_bfd_error_handler)
10416 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10417 input_bfd, input_section,
10418 (long) rel->r_offset, howto->name);
10419 return FALSE;
10420 }
10421
10422 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10423
10424 /* Get the (signed) value from the instruction. */
10425 addend = value & howto->src_mask;
10426 if (addend & ((howto->src_mask + 1) >> 1))
10427 {
10428 bfd_signed_vma mask;
10429
10430 mask = -1;
10431 mask &= ~ howto->src_mask;
10432 addend |= mask;
10433 }
10434 break;
10435 }
10436
10437 msec = sec;
10438 addend =
10439 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10440 - relocation;
10441 addend += msec->output_section->vma + msec->output_offset;
10442
10443 /* Cases here must match those in the preceding
10444 switch statement. */
10445 switch (r_type)
10446 {
10447 case R_ARM_MOVW_ABS_NC:
10448 case R_ARM_MOVT_ABS:
10449 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10450 | (addend & 0xfff);
10451 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10452 break;
10453
10454 case R_ARM_THM_MOVW_ABS_NC:
10455 case R_ARM_THM_MOVT_ABS:
10456 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10457 | (addend & 0xff) | ((addend & 0x0800) << 15);
10458 bfd_put_16 (input_bfd, value >> 16,
10459 contents + rel->r_offset);
10460 bfd_put_16 (input_bfd, value,
10461 contents + rel->r_offset + 2);
10462 break;
10463
10464 default:
10465 value = (value & ~ howto->dst_mask)
10466 | (addend & howto->dst_mask);
10467 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10468 break;
10469 }
10470 }
10471 }
10472 else
10473 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
10474 }
10475 else
10476 {
10477 bfd_boolean warned;
10478
10479 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10480 r_symndx, symtab_hdr, sym_hashes,
10481 h, sec, relocation,
10482 unresolved_reloc, warned);
10483
10484 sym_type = h->type;
10485 }
10486
10487 if (sec != NULL && discarded_section (sec))
10488 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
10489 rel, 1, relend, howto, 0, contents);
10490
10491 if (info->relocatable)
10492 {
10493 /* This is a relocatable link. We don't have to change
10494 anything, unless the reloc is against a section symbol,
10495 in which case we have to adjust according to where the
10496 section symbol winds up in the output section. */
10497 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10498 {
10499 if (globals->use_rel)
10500 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10501 howto, (bfd_signed_vma) sec->output_offset);
10502 else
10503 rel->r_addend += sec->output_offset;
10504 }
10505 continue;
10506 }
10507
10508 if (h != NULL)
10509 name = h->root.root.string;
10510 else
10511 {
10512 name = (bfd_elf_string_from_elf_section
10513 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10514 if (name == NULL || *name == '\0')
10515 name = bfd_section_name (input_bfd, sec);
10516 }
10517
10518 if (r_symndx != STN_UNDEF
10519 && r_type != R_ARM_NONE
10520 && (h == NULL
10521 || h->root.type == bfd_link_hash_defined
10522 || h->root.type == bfd_link_hash_defweak)
10523 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10524 {
10525 (*_bfd_error_handler)
10526 ((sym_type == STT_TLS
10527 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10528 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10529 input_bfd,
10530 input_section,
10531 (long) rel->r_offset,
10532 howto->name,
10533 name);
10534 }
10535
10536 /* We call elf32_arm_final_link_relocate unless we're completely
10537 done, i.e., the relaxation produced the final output we want,
10538 and we won't let anybody mess with it. Also, we have to do
10539 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10540 both in relaxed and non-relaxed cases */
10541 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10542 || (IS_ARM_TLS_GNU_RELOC (r_type)
10543 && !((h ? elf32_arm_hash_entry (h)->tls_type :
10544 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10545 & GOT_TLS_GDESC)))
10546 {
10547 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10548 contents, rel, h == NULL);
10549 /* This may have been marked unresolved because it came from
10550 a shared library. But we've just dealt with that. */
10551 unresolved_reloc = 0;
10552 }
10553 else
10554 r = bfd_reloc_continue;
10555
10556 if (r == bfd_reloc_continue)
10557 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10558 input_section, contents, rel,
10559 relocation, info, sec, name, sym_type,
10560 (h ? h->target_internal
10561 : ARM_SYM_BRANCH_TYPE (sym)), h,
10562 &unresolved_reloc, &error_message);
10563
10564 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10565 because such sections are not SEC_ALLOC and thus ld.so will
10566 not process them. */
10567 if (unresolved_reloc
10568 && !((input_section->flags & SEC_DEBUGGING) != 0
10569 && h->def_dynamic)
10570 && _bfd_elf_section_offset (output_bfd, info, input_section,
10571 rel->r_offset) != (bfd_vma) -1)
10572 {
10573 (*_bfd_error_handler)
10574 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10575 input_bfd,
10576 input_section,
10577 (long) rel->r_offset,
10578 howto->name,
10579 h->root.root.string);
10580 return FALSE;
10581 }
10582
10583 if (r != bfd_reloc_ok)
10584 {
10585 switch (r)
10586 {
10587 case bfd_reloc_overflow:
10588 /* If the overflowing reloc was to an undefined symbol,
10589 we have already printed one error message and there
10590 is no point complaining again. */
10591 if ((! h ||
10592 h->root.type != bfd_link_hash_undefined)
10593 && (!((*info->callbacks->reloc_overflow)
10594 (info, (h ? &h->root : NULL), name, howto->name,
10595 (bfd_vma) 0, input_bfd, input_section,
10596 rel->r_offset))))
10597 return FALSE;
10598 break;
10599
10600 case bfd_reloc_undefined:
10601 if (!((*info->callbacks->undefined_symbol)
10602 (info, name, input_bfd, input_section,
10603 rel->r_offset, TRUE)))
10604 return FALSE;
10605 break;
10606
10607 case bfd_reloc_outofrange:
10608 error_message = _("out of range");
10609 goto common_error;
10610
10611 case bfd_reloc_notsupported:
10612 error_message = _("unsupported relocation");
10613 goto common_error;
10614
10615 case bfd_reloc_dangerous:
10616 /* error_message should already be set. */
10617 goto common_error;
10618
10619 default:
10620 error_message = _("unknown error");
10621 /* Fall through. */
10622
10623 common_error:
10624 BFD_ASSERT (error_message != NULL);
10625 if (!((*info->callbacks->reloc_dangerous)
10626 (info, error_message, input_bfd, input_section,
10627 rel->r_offset)))
10628 return FALSE;
10629 break;
10630 }
10631 }
10632 }
10633
10634 return TRUE;
10635 }
10636
10637 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
10638 adds the edit to the start of the list. (The list must be built in order of
10639 ascending TINDEX: the function's callers are primarily responsible for
10640 maintaining that condition). */
10641
10642 static void
10643 add_unwind_table_edit (arm_unwind_table_edit **head,
10644 arm_unwind_table_edit **tail,
10645 arm_unwind_edit_type type,
10646 asection *linked_section,
10647 unsigned int tindex)
10648 {
10649 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10650 xmalloc (sizeof (arm_unwind_table_edit));
10651
10652 new_edit->type = type;
10653 new_edit->linked_section = linked_section;
10654 new_edit->index = tindex;
10655
10656 if (tindex > 0)
10657 {
10658 new_edit->next = NULL;
10659
10660 if (*tail)
10661 (*tail)->next = new_edit;
10662
10663 (*tail) = new_edit;
10664
10665 if (!*head)
10666 (*head) = new_edit;
10667 }
10668 else
10669 {
10670 new_edit->next = *head;
10671
10672 if (!*tail)
10673 *tail = new_edit;
10674
10675 *head = new_edit;
10676 }
10677 }
10678
10679 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10680
10681 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10682 static void
10683 adjust_exidx_size(asection *exidx_sec, int adjust)
10684 {
10685 asection *out_sec;
10686
10687 if (!exidx_sec->rawsize)
10688 exidx_sec->rawsize = exidx_sec->size;
10689
10690 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10691 out_sec = exidx_sec->output_section;
10692 /* Adjust size of output section. */
10693 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10694 }
10695
10696 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10697 static void
10698 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10699 {
10700 struct _arm_elf_section_data *exidx_arm_data;
10701
10702 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10703 add_unwind_table_edit (
10704 &exidx_arm_data->u.exidx.unwind_edit_list,
10705 &exidx_arm_data->u.exidx.unwind_edit_tail,
10706 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10707
10708 adjust_exidx_size(exidx_sec, 8);
10709 }
10710
10711 /* Scan .ARM.exidx tables, and create a list describing edits which should be
10712 made to those tables, such that:
10713
10714 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10715 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
10716 codes which have been inlined into the index).
10717
10718 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10719
10720 The edits are applied when the tables are written
10721 (in elf32_arm_write_section). */
10722
10723 bfd_boolean
10724 elf32_arm_fix_exidx_coverage (asection **text_section_order,
10725 unsigned int num_text_sections,
10726 struct bfd_link_info *info,
10727 bfd_boolean merge_exidx_entries)
10728 {
10729 bfd *inp;
10730 unsigned int last_second_word = 0, i;
10731 asection *last_exidx_sec = NULL;
10732 asection *last_text_sec = NULL;
10733 int last_unwind_type = -1;
10734
10735 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10736 text sections. */
10737 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
10738 {
10739 asection *sec;
10740
10741 for (sec = inp->sections; sec != NULL; sec = sec->next)
10742 {
10743 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10744 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
10745
10746 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
10747 continue;
10748
10749 if (elf_sec->linked_to)
10750 {
10751 Elf_Internal_Shdr *linked_hdr
10752 = &elf_section_data (elf_sec->linked_to)->this_hdr;
10753 struct _arm_elf_section_data *linked_sec_arm_data
10754 = get_arm_elf_section_data (linked_hdr->bfd_section);
10755
10756 if (linked_sec_arm_data == NULL)
10757 continue;
10758
10759 /* Link this .ARM.exidx section back from the text section it
10760 describes. */
10761 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10762 }
10763 }
10764 }
10765
10766 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10767 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
10768 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
10769
10770 for (i = 0; i < num_text_sections; i++)
10771 {
10772 asection *sec = text_section_order[i];
10773 asection *exidx_sec;
10774 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10775 struct _arm_elf_section_data *exidx_arm_data;
10776 bfd_byte *contents = NULL;
10777 int deleted_exidx_bytes = 0;
10778 bfd_vma j;
10779 arm_unwind_table_edit *unwind_edit_head = NULL;
10780 arm_unwind_table_edit *unwind_edit_tail = NULL;
10781 Elf_Internal_Shdr *hdr;
10782 bfd *ibfd;
10783
10784 if (arm_data == NULL)
10785 continue;
10786
10787 exidx_sec = arm_data->u.text.arm_exidx_sec;
10788 if (exidx_sec == NULL)
10789 {
10790 /* Section has no unwind data. */
10791 if (last_unwind_type == 0 || !last_exidx_sec)
10792 continue;
10793
10794 /* Ignore zero sized sections. */
10795 if (sec->size == 0)
10796 continue;
10797
10798 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10799 last_unwind_type = 0;
10800 continue;
10801 }
10802
10803 /* Skip /DISCARD/ sections. */
10804 if (bfd_is_abs_section (exidx_sec->output_section))
10805 continue;
10806
10807 hdr = &elf_section_data (exidx_sec)->this_hdr;
10808 if (hdr->sh_type != SHT_ARM_EXIDX)
10809 continue;
10810
10811 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10812 if (exidx_arm_data == NULL)
10813 continue;
10814
10815 ibfd = exidx_sec->owner;
10816
10817 if (hdr->contents != NULL)
10818 contents = hdr->contents;
10819 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10820 /* An error? */
10821 continue;
10822
10823 for (j = 0; j < hdr->sh_size; j += 8)
10824 {
10825 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
10826 int unwind_type;
10827 int elide = 0;
10828
10829 /* An EXIDX_CANTUNWIND entry. */
10830 if (second_word == 1)
10831 {
10832 if (last_unwind_type == 0)
10833 elide = 1;
10834 unwind_type = 0;
10835 }
10836 /* Inlined unwinding data. Merge if equal to previous. */
10837 else if ((second_word & 0x80000000) != 0)
10838 {
10839 if (merge_exidx_entries
10840 && last_second_word == second_word && last_unwind_type == 1)
10841 elide = 1;
10842 unwind_type = 1;
10843 last_second_word = second_word;
10844 }
10845 /* Normal table entry. In theory we could merge these too,
10846 but duplicate entries are likely to be much less common. */
10847 else
10848 unwind_type = 2;
10849
10850 if (elide)
10851 {
10852 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
10853 DELETE_EXIDX_ENTRY, NULL, j / 8);
10854
10855 deleted_exidx_bytes += 8;
10856 }
10857
10858 last_unwind_type = unwind_type;
10859 }
10860
10861 /* Free contents if we allocated it ourselves. */
10862 if (contents != hdr->contents)
10863 free (contents);
10864
10865 /* Record edits to be applied later (in elf32_arm_write_section). */
10866 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
10867 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
10868
10869 if (deleted_exidx_bytes > 0)
10870 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
10871
10872 last_exidx_sec = exidx_sec;
10873 last_text_sec = sec;
10874 }
10875
10876 /* Add terminating CANTUNWIND entry. */
10877 if (last_exidx_sec && last_unwind_type != 0)
10878 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10879
10880 return TRUE;
10881 }
10882
10883 static bfd_boolean
10884 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10885 bfd *ibfd, const char *name)
10886 {
10887 asection *sec, *osec;
10888
10889 sec = bfd_get_linker_section (ibfd, name);
10890 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10891 return TRUE;
10892
10893 osec = sec->output_section;
10894 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10895 return TRUE;
10896
10897 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10898 sec->output_offset, sec->size))
10899 return FALSE;
10900
10901 return TRUE;
10902 }
10903
10904 static bfd_boolean
10905 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
10906 {
10907 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
10908 asection *sec, *osec;
10909
10910 if (globals == NULL)
10911 return FALSE;
10912
10913 /* Invoke the regular ELF backend linker to do all the work. */
10914 if (!bfd_elf_final_link (abfd, info))
10915 return FALSE;
10916
10917 /* Process stub sections (eg BE8 encoding, ...). */
10918 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
10919 int i;
10920 for (i=0; i<htab->top_id; i++)
10921 {
10922 sec = htab->stub_group[i].stub_sec;
10923 /* Only process it once, in its link_sec slot. */
10924 if (sec && i == htab->stub_group[i].link_sec->id)
10925 {
10926 osec = sec->output_section;
10927 elf32_arm_write_section (abfd, info, sec, sec->contents);
10928 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10929 sec->output_offset, sec->size))
10930 return FALSE;
10931 }
10932 }
10933
10934 /* Write out any glue sections now that we have created all the
10935 stubs. */
10936 if (globals->bfd_of_glue_owner != NULL)
10937 {
10938 if (! elf32_arm_output_glue_section (info, abfd,
10939 globals->bfd_of_glue_owner,
10940 ARM2THUMB_GLUE_SECTION_NAME))
10941 return FALSE;
10942
10943 if (! elf32_arm_output_glue_section (info, abfd,
10944 globals->bfd_of_glue_owner,
10945 THUMB2ARM_GLUE_SECTION_NAME))
10946 return FALSE;
10947
10948 if (! elf32_arm_output_glue_section (info, abfd,
10949 globals->bfd_of_glue_owner,
10950 VFP11_ERRATUM_VENEER_SECTION_NAME))
10951 return FALSE;
10952
10953 if (! elf32_arm_output_glue_section (info, abfd,
10954 globals->bfd_of_glue_owner,
10955 ARM_BX_GLUE_SECTION_NAME))
10956 return FALSE;
10957 }
10958
10959 return TRUE;
10960 }
10961
10962 /* Return a best guess for the machine number based on the attributes. */
10963
10964 static unsigned int
10965 bfd_arm_get_mach_from_attributes (bfd * abfd)
10966 {
10967 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
10968
10969 switch (arch)
10970 {
10971 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
10972 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
10973 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
10974
10975 case TAG_CPU_ARCH_V5TE:
10976 {
10977 char * name;
10978
10979 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
10980 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
10981
10982 if (name)
10983 {
10984 if (strcmp (name, "IWMMXT2") == 0)
10985 return bfd_mach_arm_iWMMXt2;
10986
10987 if (strcmp (name, "IWMMXT") == 0)
10988 return bfd_mach_arm_iWMMXt;
10989 }
10990
10991 return bfd_mach_arm_5TE;
10992 }
10993
10994 default:
10995 return bfd_mach_arm_unknown;
10996 }
10997 }
10998
10999 /* Set the right machine number. */
11000
11001 static bfd_boolean
11002 elf32_arm_object_p (bfd *abfd)
11003 {
11004 unsigned int mach;
11005
11006 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
11007
11008 if (mach == bfd_mach_arm_unknown)
11009 {
11010 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11011 mach = bfd_mach_arm_ep9312;
11012 else
11013 mach = bfd_arm_get_mach_from_attributes (abfd);
11014 }
11015
11016 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
11017 return TRUE;
11018 }
11019
11020 /* Function to keep ARM specific flags in the ELF header. */
11021
11022 static bfd_boolean
11023 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
11024 {
11025 if (elf_flags_init (abfd)
11026 && elf_elfheader (abfd)->e_flags != flags)
11027 {
11028 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
11029 {
11030 if (flags & EF_ARM_INTERWORK)
11031 (*_bfd_error_handler)
11032 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11033 abfd);
11034 else
11035 _bfd_error_handler
11036 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11037 abfd);
11038 }
11039 }
11040 else
11041 {
11042 elf_elfheader (abfd)->e_flags = flags;
11043 elf_flags_init (abfd) = TRUE;
11044 }
11045
11046 return TRUE;
11047 }
11048
11049 /* Copy backend specific data from one object module to another. */
11050
11051 static bfd_boolean
11052 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
11053 {
11054 flagword in_flags;
11055 flagword out_flags;
11056
11057 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
11058 return TRUE;
11059
11060 in_flags = elf_elfheader (ibfd)->e_flags;
11061 out_flags = elf_elfheader (obfd)->e_flags;
11062
11063 if (elf_flags_init (obfd)
11064 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
11065 && in_flags != out_flags)
11066 {
11067 /* Cannot mix APCS26 and APCS32 code. */
11068 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
11069 return FALSE;
11070
11071 /* Cannot mix float APCS and non-float APCS code. */
11072 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
11073 return FALSE;
11074
11075 /* If the src and dest have different interworking flags
11076 then turn off the interworking bit. */
11077 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
11078 {
11079 if (out_flags & EF_ARM_INTERWORK)
11080 _bfd_error_handler
11081 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
11082 obfd, ibfd);
11083
11084 in_flags &= ~EF_ARM_INTERWORK;
11085 }
11086
11087 /* Likewise for PIC, though don't warn for this case. */
11088 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
11089 in_flags &= ~EF_ARM_PIC;
11090 }
11091
11092 elf_elfheader (obfd)->e_flags = in_flags;
11093 elf_flags_init (obfd) = TRUE;
11094
11095 /* Also copy the EI_OSABI field. */
11096 elf_elfheader (obfd)->e_ident[EI_OSABI] =
11097 elf_elfheader (ibfd)->e_ident[EI_OSABI];
11098
11099 /* Copy object attributes. */
11100 _bfd_elf_copy_obj_attributes (ibfd, obfd);
11101
11102 return TRUE;
11103 }
11104
11105 /* Values for Tag_ABI_PCS_R9_use. */
11106 enum
11107 {
11108 AEABI_R9_V6,
11109 AEABI_R9_SB,
11110 AEABI_R9_TLS,
11111 AEABI_R9_unused
11112 };
11113
11114 /* Values for Tag_ABI_PCS_RW_data. */
11115 enum
11116 {
11117 AEABI_PCS_RW_data_absolute,
11118 AEABI_PCS_RW_data_PCrel,
11119 AEABI_PCS_RW_data_SBrel,
11120 AEABI_PCS_RW_data_unused
11121 };
11122
11123 /* Values for Tag_ABI_enum_size. */
11124 enum
11125 {
11126 AEABI_enum_unused,
11127 AEABI_enum_short,
11128 AEABI_enum_wide,
11129 AEABI_enum_forced_wide
11130 };
11131
11132 /* Determine whether an object attribute tag takes an integer, a
11133 string or both. */
11134
11135 static int
11136 elf32_arm_obj_attrs_arg_type (int tag)
11137 {
11138 if (tag == Tag_compatibility)
11139 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
11140 else if (tag == Tag_nodefaults)
11141 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
11142 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
11143 return ATTR_TYPE_FLAG_STR_VAL;
11144 else if (tag < 32)
11145 return ATTR_TYPE_FLAG_INT_VAL;
11146 else
11147 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
11148 }
11149
11150 /* The ABI defines that Tag_conformance should be emitted first, and that
11151 Tag_nodefaults should be second (if either is defined). This sets those
11152 two positions, and bumps up the position of all the remaining tags to
11153 compensate. */
11154 static int
11155 elf32_arm_obj_attrs_order (int num)
11156 {
11157 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
11158 return Tag_conformance;
11159 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
11160 return Tag_nodefaults;
11161 if ((num - 2) < Tag_nodefaults)
11162 return num - 2;
11163 if ((num - 1) < Tag_conformance)
11164 return num - 1;
11165 return num;
11166 }
11167
11168 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
11169 static bfd_boolean
11170 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
11171 {
11172 if ((tag & 127) < 64)
11173 {
11174 _bfd_error_handler
11175 (_("%B: Unknown mandatory EABI object attribute %d"),
11176 abfd, tag);
11177 bfd_set_error (bfd_error_bad_value);
11178 return FALSE;
11179 }
11180 else
11181 {
11182 _bfd_error_handler
11183 (_("Warning: %B: Unknown EABI object attribute %d"),
11184 abfd, tag);
11185 return TRUE;
11186 }
11187 }
11188
11189 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
11190 Returns -1 if no architecture could be read. */
11191
11192 static int
11193 get_secondary_compatible_arch (bfd *abfd)
11194 {
11195 obj_attribute *attr =
11196 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11197
11198 /* Note: the tag and its argument below are uleb128 values, though
11199 currently-defined values fit in one byte for each. */
11200 if (attr->s
11201 && attr->s[0] == Tag_CPU_arch
11202 && (attr->s[1] & 128) != 128
11203 && attr->s[2] == 0)
11204 return attr->s[1];
11205
11206 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11207 return -1;
11208 }
11209
11210 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11211 The tag is removed if ARCH is -1. */
11212
11213 static void
11214 set_secondary_compatible_arch (bfd *abfd, int arch)
11215 {
11216 obj_attribute *attr =
11217 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11218
11219 if (arch == -1)
11220 {
11221 attr->s = NULL;
11222 return;
11223 }
11224
11225 /* Note: the tag and its argument below are uleb128 values, though
11226 currently-defined values fit in one byte for each. */
11227 if (!attr->s)
11228 attr->s = (char *) bfd_alloc (abfd, 3);
11229 attr->s[0] = Tag_CPU_arch;
11230 attr->s[1] = arch;
11231 attr->s[2] = '\0';
11232 }
11233
11234 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11235 into account. */
11236
11237 static int
11238 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11239 int newtag, int secondary_compat)
11240 {
11241 #define T(X) TAG_CPU_ARCH_##X
11242 int tagl, tagh, result;
11243 const int v6t2[] =
11244 {
11245 T(V6T2), /* PRE_V4. */
11246 T(V6T2), /* V4. */
11247 T(V6T2), /* V4T. */
11248 T(V6T2), /* V5T. */
11249 T(V6T2), /* V5TE. */
11250 T(V6T2), /* V5TEJ. */
11251 T(V6T2), /* V6. */
11252 T(V7), /* V6KZ. */
11253 T(V6T2) /* V6T2. */
11254 };
11255 const int v6k[] =
11256 {
11257 T(V6K), /* PRE_V4. */
11258 T(V6K), /* V4. */
11259 T(V6K), /* V4T. */
11260 T(V6K), /* V5T. */
11261 T(V6K), /* V5TE. */
11262 T(V6K), /* V5TEJ. */
11263 T(V6K), /* V6. */
11264 T(V6KZ), /* V6KZ. */
11265 T(V7), /* V6T2. */
11266 T(V6K) /* V6K. */
11267 };
11268 const int v7[] =
11269 {
11270 T(V7), /* PRE_V4. */
11271 T(V7), /* V4. */
11272 T(V7), /* V4T. */
11273 T(V7), /* V5T. */
11274 T(V7), /* V5TE. */
11275 T(V7), /* V5TEJ. */
11276 T(V7), /* V6. */
11277 T(V7), /* V6KZ. */
11278 T(V7), /* V6T2. */
11279 T(V7), /* V6K. */
11280 T(V7) /* V7. */
11281 };
11282 const int v6_m[] =
11283 {
11284 -1, /* PRE_V4. */
11285 -1, /* V4. */
11286 T(V6K), /* V4T. */
11287 T(V6K), /* V5T. */
11288 T(V6K), /* V5TE. */
11289 T(V6K), /* V5TEJ. */
11290 T(V6K), /* V6. */
11291 T(V6KZ), /* V6KZ. */
11292 T(V7), /* V6T2. */
11293 T(V6K), /* V6K. */
11294 T(V7), /* V7. */
11295 T(V6_M) /* V6_M. */
11296 };
11297 const int v6s_m[] =
11298 {
11299 -1, /* PRE_V4. */
11300 -1, /* V4. */
11301 T(V6K), /* V4T. */
11302 T(V6K), /* V5T. */
11303 T(V6K), /* V5TE. */
11304 T(V6K), /* V5TEJ. */
11305 T(V6K), /* V6. */
11306 T(V6KZ), /* V6KZ. */
11307 T(V7), /* V6T2. */
11308 T(V6K), /* V6K. */
11309 T(V7), /* V7. */
11310 T(V6S_M), /* V6_M. */
11311 T(V6S_M) /* V6S_M. */
11312 };
11313 const int v7e_m[] =
11314 {
11315 -1, /* PRE_V4. */
11316 -1, /* V4. */
11317 T(V7E_M), /* V4T. */
11318 T(V7E_M), /* V5T. */
11319 T(V7E_M), /* V5TE. */
11320 T(V7E_M), /* V5TEJ. */
11321 T(V7E_M), /* V6. */
11322 T(V7E_M), /* V6KZ. */
11323 T(V7E_M), /* V6T2. */
11324 T(V7E_M), /* V6K. */
11325 T(V7E_M), /* V7. */
11326 T(V7E_M), /* V6_M. */
11327 T(V7E_M), /* V6S_M. */
11328 T(V7E_M) /* V7E_M. */
11329 };
11330 const int v4t_plus_v6_m[] =
11331 {
11332 -1, /* PRE_V4. */
11333 -1, /* V4. */
11334 T(V4T), /* V4T. */
11335 T(V5T), /* V5T. */
11336 T(V5TE), /* V5TE. */
11337 T(V5TEJ), /* V5TEJ. */
11338 T(V6), /* V6. */
11339 T(V6KZ), /* V6KZ. */
11340 T(V6T2), /* V6T2. */
11341 T(V6K), /* V6K. */
11342 T(V7), /* V7. */
11343 T(V6_M), /* V6_M. */
11344 T(V6S_M), /* V6S_M. */
11345 T(V7E_M), /* V7E_M. */
11346 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11347 };
11348 const int *comb[] =
11349 {
11350 v6t2,
11351 v6k,
11352 v7,
11353 v6_m,
11354 v6s_m,
11355 v7e_m,
11356 /* Pseudo-architecture. */
11357 v4t_plus_v6_m
11358 };
11359
11360 /* Check we've not got a higher architecture than we know about. */
11361
11362 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
11363 {
11364 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
11365 return -1;
11366 }
11367
11368 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11369
11370 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11371 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11372 oldtag = T(V4T_PLUS_V6_M);
11373
11374 /* And override the new tag if we have a Tag_also_compatible_with on the
11375 input. */
11376
11377 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11378 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11379 newtag = T(V4T_PLUS_V6_M);
11380
11381 tagl = (oldtag < newtag) ? oldtag : newtag;
11382 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11383
11384 /* Architectures before V6KZ add features monotonically. */
11385 if (tagh <= TAG_CPU_ARCH_V6KZ)
11386 return result;
11387
11388 result = comb[tagh - T(V6T2)][tagl];
11389
11390 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11391 as the canonical version. */
11392 if (result == T(V4T_PLUS_V6_M))
11393 {
11394 result = T(V4T);
11395 *secondary_compat_out = T(V6_M);
11396 }
11397 else
11398 *secondary_compat_out = -1;
11399
11400 if (result == -1)
11401 {
11402 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
11403 ibfd, oldtag, newtag);
11404 return -1;
11405 }
11406
11407 return result;
11408 #undef T
11409 }
11410
11411 /* Query attributes object to see if integer divide instructions may be
11412 present in an object. */
11413 static bfd_boolean
11414 elf32_arm_attributes_accept_div (const obj_attribute *attr)
11415 {
11416 int arch = attr[Tag_CPU_arch].i;
11417 int profile = attr[Tag_CPU_arch_profile].i;
11418
11419 switch (attr[Tag_DIV_use].i)
11420 {
11421 case 0:
11422 /* Integer divide allowed if instruction contained in archetecture. */
11423 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11424 return TRUE;
11425 else if (arch >= TAG_CPU_ARCH_V7E_M)
11426 return TRUE;
11427 else
11428 return FALSE;
11429
11430 case 1:
11431 /* Integer divide explicitly prohibited. */
11432 return FALSE;
11433
11434 default:
11435 /* Unrecognised case - treat as allowing divide everywhere. */
11436 case 2:
11437 /* Integer divide allowed in ARM state. */
11438 return TRUE;
11439 }
11440 }
11441
11442 /* Query attributes object to see if integer divide instructions are
11443 forbidden to be in the object. This is not the inverse of
11444 elf32_arm_attributes_accept_div. */
11445 static bfd_boolean
11446 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
11447 {
11448 return attr[Tag_DIV_use].i == 1;
11449 }
11450
11451 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11452 are conflicting attributes. */
11453
11454 static bfd_boolean
11455 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11456 {
11457 obj_attribute *in_attr;
11458 obj_attribute *out_attr;
11459 /* Some tags have 0 = don't care, 1 = strong requirement,
11460 2 = weak requirement. */
11461 static const int order_021[3] = {0, 2, 1};
11462 int i;
11463 bfd_boolean result = TRUE;
11464
11465 /* Skip the linker stubs file. This preserves previous behavior
11466 of accepting unknown attributes in the first input file - but
11467 is that a bug? */
11468 if (ibfd->flags & BFD_LINKER_CREATED)
11469 return TRUE;
11470
11471 if (!elf_known_obj_attributes_proc (obfd)[0].i)
11472 {
11473 /* This is the first object. Copy the attributes. */
11474 _bfd_elf_copy_obj_attributes (ibfd, obfd);
11475
11476 out_attr = elf_known_obj_attributes_proc (obfd);
11477
11478 /* Use the Tag_null value to indicate the attributes have been
11479 initialized. */
11480 out_attr[0].i = 1;
11481
11482 /* We do not output objects with Tag_MPextension_use_legacy - we move
11483 the attribute's value to Tag_MPextension_use. */
11484 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11485 {
11486 if (out_attr[Tag_MPextension_use].i != 0
11487 && out_attr[Tag_MPextension_use_legacy].i
11488 != out_attr[Tag_MPextension_use].i)
11489 {
11490 _bfd_error_handler
11491 (_("Error: %B has both the current and legacy "
11492 "Tag_MPextension_use attributes"), ibfd);
11493 result = FALSE;
11494 }
11495
11496 out_attr[Tag_MPextension_use] =
11497 out_attr[Tag_MPextension_use_legacy];
11498 out_attr[Tag_MPextension_use_legacy].type = 0;
11499 out_attr[Tag_MPextension_use_legacy].i = 0;
11500 }
11501
11502 return result;
11503 }
11504
11505 in_attr = elf_known_obj_attributes_proc (ibfd);
11506 out_attr = elf_known_obj_attributes_proc (obfd);
11507 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11508 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11509 {
11510 /* Ignore mismatches if the object doesn't use floating point. */
11511 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11512 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11513 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11514 {
11515 _bfd_error_handler
11516 (_("error: %B uses VFP register arguments, %B does not"),
11517 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11518 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
11519 result = FALSE;
11520 }
11521 }
11522
11523 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
11524 {
11525 /* Merge this attribute with existing attributes. */
11526 switch (i)
11527 {
11528 case Tag_CPU_raw_name:
11529 case Tag_CPU_name:
11530 /* These are merged after Tag_CPU_arch. */
11531 break;
11532
11533 case Tag_ABI_optimization_goals:
11534 case Tag_ABI_FP_optimization_goals:
11535 /* Use the first value seen. */
11536 break;
11537
11538 case Tag_CPU_arch:
11539 {
11540 int secondary_compat = -1, secondary_compat_out = -1;
11541 unsigned int saved_out_attr = out_attr[i].i;
11542 static const char *name_table[] = {
11543 /* These aren't real CPU names, but we can't guess
11544 that from the architecture version alone. */
11545 "Pre v4",
11546 "ARM v4",
11547 "ARM v4T",
11548 "ARM v5T",
11549 "ARM v5TE",
11550 "ARM v5TEJ",
11551 "ARM v6",
11552 "ARM v6KZ",
11553 "ARM v6T2",
11554 "ARM v6K",
11555 "ARM v7",
11556 "ARM v6-M",
11557 "ARM v6S-M"
11558 };
11559
11560 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11561 secondary_compat = get_secondary_compatible_arch (ibfd);
11562 secondary_compat_out = get_secondary_compatible_arch (obfd);
11563 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11564 &secondary_compat_out,
11565 in_attr[i].i,
11566 secondary_compat);
11567 set_secondary_compatible_arch (obfd, secondary_compat_out);
11568
11569 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11570 if (out_attr[i].i == saved_out_attr)
11571 ; /* Leave the names alone. */
11572 else if (out_attr[i].i == in_attr[i].i)
11573 {
11574 /* The output architecture has been changed to match the
11575 input architecture. Use the input names. */
11576 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11577 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11578 : NULL;
11579 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11580 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11581 : NULL;
11582 }
11583 else
11584 {
11585 out_attr[Tag_CPU_name].s = NULL;
11586 out_attr[Tag_CPU_raw_name].s = NULL;
11587 }
11588
11589 /* If we still don't have a value for Tag_CPU_name,
11590 make one up now. Tag_CPU_raw_name remains blank. */
11591 if (out_attr[Tag_CPU_name].s == NULL
11592 && out_attr[i].i < ARRAY_SIZE (name_table))
11593 out_attr[Tag_CPU_name].s =
11594 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11595 }
11596 break;
11597
11598 case Tag_ARM_ISA_use:
11599 case Tag_THUMB_ISA_use:
11600 case Tag_WMMX_arch:
11601 case Tag_Advanced_SIMD_arch:
11602 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
11603 case Tag_ABI_FP_rounding:
11604 case Tag_ABI_FP_exceptions:
11605 case Tag_ABI_FP_user_exceptions:
11606 case Tag_ABI_FP_number_model:
11607 case Tag_FP_HP_extension:
11608 case Tag_CPU_unaligned_access:
11609 case Tag_T2EE_use:
11610 case Tag_MPextension_use:
11611 /* Use the largest value specified. */
11612 if (in_attr[i].i > out_attr[i].i)
11613 out_attr[i].i = in_attr[i].i;
11614 break;
11615
11616 case Tag_ABI_align_preserved:
11617 case Tag_ABI_PCS_RO_data:
11618 /* Use the smallest value specified. */
11619 if (in_attr[i].i < out_attr[i].i)
11620 out_attr[i].i = in_attr[i].i;
11621 break;
11622
11623 case Tag_ABI_align_needed:
11624 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
11625 && (in_attr[Tag_ABI_align_preserved].i == 0
11626 || out_attr[Tag_ABI_align_preserved].i == 0))
11627 {
11628 /* This error message should be enabled once all non-conformant
11629 binaries in the toolchain have had the attributes set
11630 properly.
11631 _bfd_error_handler
11632 (_("error: %B: 8-byte data alignment conflicts with %B"),
11633 obfd, ibfd);
11634 result = FALSE; */
11635 }
11636 /* Fall through. */
11637 case Tag_ABI_FP_denormal:
11638 case Tag_ABI_PCS_GOT_use:
11639 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11640 value if greater than 2 (for future-proofing). */
11641 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11642 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11643 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
11644 out_attr[i].i = in_attr[i].i;
11645 break;
11646
11647 case Tag_Virtualization_use:
11648 /* The virtualization tag effectively stores two bits of
11649 information: the intended use of TrustZone (in bit 0), and the
11650 intended use of Virtualization (in bit 1). */
11651 if (out_attr[i].i == 0)
11652 out_attr[i].i = in_attr[i].i;
11653 else if (in_attr[i].i != 0
11654 && in_attr[i].i != out_attr[i].i)
11655 {
11656 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11657 out_attr[i].i = 3;
11658 else
11659 {
11660 _bfd_error_handler
11661 (_("error: %B: unable to merge virtualization attributes "
11662 "with %B"),
11663 obfd, ibfd);
11664 result = FALSE;
11665 }
11666 }
11667 break;
11668
11669 case Tag_CPU_arch_profile:
11670 if (out_attr[i].i != in_attr[i].i)
11671 {
11672 /* 0 will merge with anything.
11673 'A' and 'S' merge to 'A'.
11674 'R' and 'S' merge to 'R'.
11675 'M' and 'A|R|S' is an error. */
11676 if (out_attr[i].i == 0
11677 || (out_attr[i].i == 'S'
11678 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11679 out_attr[i].i = in_attr[i].i;
11680 else if (in_attr[i].i == 0
11681 || (in_attr[i].i == 'S'
11682 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11683 ; /* Do nothing. */
11684 else
11685 {
11686 _bfd_error_handler
11687 (_("error: %B: Conflicting architecture profiles %c/%c"),
11688 ibfd,
11689 in_attr[i].i ? in_attr[i].i : '0',
11690 out_attr[i].i ? out_attr[i].i : '0');
11691 result = FALSE;
11692 }
11693 }
11694 break;
11695 case Tag_FP_arch:
11696 {
11697 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11698 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11699 when it's 0. It might mean absence of FP hardware if
11700 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11701
11702 static const struct
11703 {
11704 int ver;
11705 int regs;
11706 } vfp_versions[7] =
11707 {
11708 {0, 0},
11709 {1, 16},
11710 {2, 16},
11711 {3, 32},
11712 {3, 16},
11713 {4, 32},
11714 {4, 16}
11715 };
11716 int ver;
11717 int regs;
11718 int newval;
11719
11720 /* If the output has no requirement about FP hardware,
11721 follow the requirement of the input. */
11722 if (out_attr[i].i == 0)
11723 {
11724 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11725 out_attr[i].i = in_attr[i].i;
11726 out_attr[Tag_ABI_HardFP_use].i
11727 = in_attr[Tag_ABI_HardFP_use].i;
11728 break;
11729 }
11730 /* If the input has no requirement about FP hardware, do
11731 nothing. */
11732 else if (in_attr[i].i == 0)
11733 {
11734 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11735 break;
11736 }
11737
11738 /* Both the input and the output have nonzero Tag_FP_arch.
11739 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11740
11741 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11742 do nothing. */
11743 if (in_attr[Tag_ABI_HardFP_use].i == 0
11744 && out_attr[Tag_ABI_HardFP_use].i == 0)
11745 ;
11746 /* If the input and the output have different Tag_ABI_HardFP_use,
11747 the combination of them is 3 (SP & DP). */
11748 else if (in_attr[Tag_ABI_HardFP_use].i
11749 != out_attr[Tag_ABI_HardFP_use].i)
11750 out_attr[Tag_ABI_HardFP_use].i = 3;
11751
11752 /* Now we can handle Tag_FP_arch. */
11753
11754 /* Values greater than 6 aren't defined, so just pick the
11755 biggest */
11756 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
11757 {
11758 out_attr[i] = in_attr[i];
11759 break;
11760 }
11761 /* The output uses the superset of input features
11762 (ISA version) and registers. */
11763 ver = vfp_versions[in_attr[i].i].ver;
11764 if (ver < vfp_versions[out_attr[i].i].ver)
11765 ver = vfp_versions[out_attr[i].i].ver;
11766 regs = vfp_versions[in_attr[i].i].regs;
11767 if (regs < vfp_versions[out_attr[i].i].regs)
11768 regs = vfp_versions[out_attr[i].i].regs;
11769 /* This assumes all possible supersets are also a valid
11770 options. */
11771 for (newval = 6; newval > 0; newval--)
11772 {
11773 if (regs == vfp_versions[newval].regs
11774 && ver == vfp_versions[newval].ver)
11775 break;
11776 }
11777 out_attr[i].i = newval;
11778 }
11779 break;
11780 case Tag_PCS_config:
11781 if (out_attr[i].i == 0)
11782 out_attr[i].i = in_attr[i].i;
11783 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
11784 {
11785 /* It's sometimes ok to mix different configs, so this is only
11786 a warning. */
11787 _bfd_error_handler
11788 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11789 }
11790 break;
11791 case Tag_ABI_PCS_R9_use:
11792 if (in_attr[i].i != out_attr[i].i
11793 && out_attr[i].i != AEABI_R9_unused
11794 && in_attr[i].i != AEABI_R9_unused)
11795 {
11796 _bfd_error_handler
11797 (_("error: %B: Conflicting use of R9"), ibfd);
11798 result = FALSE;
11799 }
11800 if (out_attr[i].i == AEABI_R9_unused)
11801 out_attr[i].i = in_attr[i].i;
11802 break;
11803 case Tag_ABI_PCS_RW_data:
11804 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
11805 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
11806 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
11807 {
11808 _bfd_error_handler
11809 (_("error: %B: SB relative addressing conflicts with use of R9"),
11810 ibfd);
11811 result = FALSE;
11812 }
11813 /* Use the smallest value specified. */
11814 if (in_attr[i].i < out_attr[i].i)
11815 out_attr[i].i = in_attr[i].i;
11816 break;
11817 case Tag_ABI_PCS_wchar_t:
11818 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
11819 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
11820 {
11821 _bfd_error_handler
11822 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
11823 ibfd, in_attr[i].i, out_attr[i].i);
11824 }
11825 else if (in_attr[i].i && !out_attr[i].i)
11826 out_attr[i].i = in_attr[i].i;
11827 break;
11828 case Tag_ABI_enum_size:
11829 if (in_attr[i].i != AEABI_enum_unused)
11830 {
11831 if (out_attr[i].i == AEABI_enum_unused
11832 || out_attr[i].i == AEABI_enum_forced_wide)
11833 {
11834 /* The existing object is compatible with anything.
11835 Use whatever requirements the new object has. */
11836 out_attr[i].i = in_attr[i].i;
11837 }
11838 else if (in_attr[i].i != AEABI_enum_forced_wide
11839 && out_attr[i].i != in_attr[i].i
11840 && !elf_arm_tdata (obfd)->no_enum_size_warning)
11841 {
11842 static const char *aeabi_enum_names[] =
11843 { "", "variable-size", "32-bit", "" };
11844 const char *in_name =
11845 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11846 ? aeabi_enum_names[in_attr[i].i]
11847 : "<unknown>";
11848 const char *out_name =
11849 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11850 ? aeabi_enum_names[out_attr[i].i]
11851 : "<unknown>";
11852 _bfd_error_handler
11853 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
11854 ibfd, in_name, out_name);
11855 }
11856 }
11857 break;
11858 case Tag_ABI_VFP_args:
11859 /* Aready done. */
11860 break;
11861 case Tag_ABI_WMMX_args:
11862 if (in_attr[i].i != out_attr[i].i)
11863 {
11864 _bfd_error_handler
11865 (_("error: %B uses iWMMXt register arguments, %B does not"),
11866 ibfd, obfd);
11867 result = FALSE;
11868 }
11869 break;
11870 case Tag_compatibility:
11871 /* Merged in target-independent code. */
11872 break;
11873 case Tag_ABI_HardFP_use:
11874 /* This is handled along with Tag_FP_arch. */
11875 break;
11876 case Tag_ABI_FP_16bit_format:
11877 if (in_attr[i].i != 0 && out_attr[i].i != 0)
11878 {
11879 if (in_attr[i].i != out_attr[i].i)
11880 {
11881 _bfd_error_handler
11882 (_("error: fp16 format mismatch between %B and %B"),
11883 ibfd, obfd);
11884 result = FALSE;
11885 }
11886 }
11887 if (in_attr[i].i != 0)
11888 out_attr[i].i = in_attr[i].i;
11889 break;
11890
11891 case Tag_DIV_use:
11892 /* A value of zero on input means that the divide instruction may
11893 be used if available in the base architecture as specified via
11894 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
11895 the user did not want divide instructions. A value of 2
11896 explicitly means that divide instructions were allowed in ARM
11897 and Thumb state. */
11898 if (in_attr[i].i == out_attr[i].i)
11899 /* Do nothing. */ ;
11900 else if (elf32_arm_attributes_forbid_div (in_attr)
11901 && !elf32_arm_attributes_accept_div (out_attr))
11902 out_attr[i].i = 1;
11903 else if (elf32_arm_attributes_forbid_div (out_attr)
11904 && elf32_arm_attributes_accept_div (in_attr))
11905 out_attr[i].i = in_attr[i].i;
11906 else if (in_attr[i].i == 2)
11907 out_attr[i].i = in_attr[i].i;
11908 break;
11909
11910 case Tag_MPextension_use_legacy:
11911 /* We don't output objects with Tag_MPextension_use_legacy - we
11912 move the value to Tag_MPextension_use. */
11913 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
11914 {
11915 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
11916 {
11917 _bfd_error_handler
11918 (_("%B has has both the current and legacy "
11919 "Tag_MPextension_use attributes"),
11920 ibfd);
11921 result = FALSE;
11922 }
11923 }
11924
11925 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
11926 out_attr[Tag_MPextension_use] = in_attr[i];
11927
11928 break;
11929
11930 case Tag_nodefaults:
11931 /* This tag is set if it exists, but the value is unused (and is
11932 typically zero). We don't actually need to do anything here -
11933 the merge happens automatically when the type flags are merged
11934 below. */
11935 break;
11936 case Tag_also_compatible_with:
11937 /* Already done in Tag_CPU_arch. */
11938 break;
11939 case Tag_conformance:
11940 /* Keep the attribute if it matches. Throw it away otherwise.
11941 No attribute means no claim to conform. */
11942 if (!in_attr[i].s || !out_attr[i].s
11943 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
11944 out_attr[i].s = NULL;
11945 break;
11946
11947 default:
11948 result
11949 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
11950 }
11951
11952 /* If out_attr was copied from in_attr then it won't have a type yet. */
11953 if (in_attr[i].type && !out_attr[i].type)
11954 out_attr[i].type = in_attr[i].type;
11955 }
11956
11957 /* Merge Tag_compatibility attributes and any common GNU ones. */
11958 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
11959 return FALSE;
11960
11961 /* Check for any attributes not known on ARM. */
11962 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
11963
11964 return result;
11965 }
11966
11967
11968 /* Return TRUE if the two EABI versions are incompatible. */
11969
11970 static bfd_boolean
11971 elf32_arm_versions_compatible (unsigned iver, unsigned over)
11972 {
11973 /* v4 and v5 are the same spec before and after it was released,
11974 so allow mixing them. */
11975 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
11976 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
11977 return TRUE;
11978
11979 return (iver == over);
11980 }
11981
11982 /* Merge backend specific data from an object file to the output
11983 object file when linking. */
11984
11985 static bfd_boolean
11986 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
11987
11988 /* Display the flags field. */
11989
11990 static bfd_boolean
11991 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
11992 {
11993 FILE * file = (FILE *) ptr;
11994 unsigned long flags;
11995
11996 BFD_ASSERT (abfd != NULL && ptr != NULL);
11997
11998 /* Print normal ELF private data. */
11999 _bfd_elf_print_private_bfd_data (abfd, ptr);
12000
12001 flags = elf_elfheader (abfd)->e_flags;
12002 /* Ignore init flag - it may not be set, despite the flags field
12003 containing valid data. */
12004
12005 /* xgettext:c-format */
12006 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
12007
12008 switch (EF_ARM_EABI_VERSION (flags))
12009 {
12010 case EF_ARM_EABI_UNKNOWN:
12011 /* The following flag bits are GNU extensions and not part of the
12012 official ARM ELF extended ABI. Hence they are only decoded if
12013 the EABI version is not set. */
12014 if (flags & EF_ARM_INTERWORK)
12015 fprintf (file, _(" [interworking enabled]"));
12016
12017 if (flags & EF_ARM_APCS_26)
12018 fprintf (file, " [APCS-26]");
12019 else
12020 fprintf (file, " [APCS-32]");
12021
12022 if (flags & EF_ARM_VFP_FLOAT)
12023 fprintf (file, _(" [VFP float format]"));
12024 else if (flags & EF_ARM_MAVERICK_FLOAT)
12025 fprintf (file, _(" [Maverick float format]"));
12026 else
12027 fprintf (file, _(" [FPA float format]"));
12028
12029 if (flags & EF_ARM_APCS_FLOAT)
12030 fprintf (file, _(" [floats passed in float registers]"));
12031
12032 if (flags & EF_ARM_PIC)
12033 fprintf (file, _(" [position independent]"));
12034
12035 if (flags & EF_ARM_NEW_ABI)
12036 fprintf (file, _(" [new ABI]"));
12037
12038 if (flags & EF_ARM_OLD_ABI)
12039 fprintf (file, _(" [old ABI]"));
12040
12041 if (flags & EF_ARM_SOFT_FLOAT)
12042 fprintf (file, _(" [software FP]"));
12043
12044 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
12045 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
12046 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
12047 | EF_ARM_MAVERICK_FLOAT);
12048 break;
12049
12050 case EF_ARM_EABI_VER1:
12051 fprintf (file, _(" [Version1 EABI]"));
12052
12053 if (flags & EF_ARM_SYMSARESORTED)
12054 fprintf (file, _(" [sorted symbol table]"));
12055 else
12056 fprintf (file, _(" [unsorted symbol table]"));
12057
12058 flags &= ~ EF_ARM_SYMSARESORTED;
12059 break;
12060
12061 case EF_ARM_EABI_VER2:
12062 fprintf (file, _(" [Version2 EABI]"));
12063
12064 if (flags & EF_ARM_SYMSARESORTED)
12065 fprintf (file, _(" [sorted symbol table]"));
12066 else
12067 fprintf (file, _(" [unsorted symbol table]"));
12068
12069 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
12070 fprintf (file, _(" [dynamic symbols use segment index]"));
12071
12072 if (flags & EF_ARM_MAPSYMSFIRST)
12073 fprintf (file, _(" [mapping symbols precede others]"));
12074
12075 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
12076 | EF_ARM_MAPSYMSFIRST);
12077 break;
12078
12079 case EF_ARM_EABI_VER3:
12080 fprintf (file, _(" [Version3 EABI]"));
12081 break;
12082
12083 case EF_ARM_EABI_VER4:
12084 fprintf (file, _(" [Version4 EABI]"));
12085 goto eabi;
12086
12087 case EF_ARM_EABI_VER5:
12088 fprintf (file, _(" [Version5 EABI]"));
12089 eabi:
12090 if (flags & EF_ARM_BE8)
12091 fprintf (file, _(" [BE8]"));
12092
12093 if (flags & EF_ARM_LE8)
12094 fprintf (file, _(" [LE8]"));
12095
12096 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
12097 break;
12098
12099 default:
12100 fprintf (file, _(" <EABI version unrecognised>"));
12101 break;
12102 }
12103
12104 flags &= ~ EF_ARM_EABIMASK;
12105
12106 if (flags & EF_ARM_RELEXEC)
12107 fprintf (file, _(" [relocatable executable]"));
12108
12109 if (flags & EF_ARM_HASENTRY)
12110 fprintf (file, _(" [has entry point]"));
12111
12112 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
12113
12114 if (flags)
12115 fprintf (file, _("<Unrecognised flag bits set>"));
12116
12117 fputc ('\n', file);
12118
12119 return TRUE;
12120 }
12121
12122 static int
12123 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
12124 {
12125 switch (ELF_ST_TYPE (elf_sym->st_info))
12126 {
12127 case STT_ARM_TFUNC:
12128 return ELF_ST_TYPE (elf_sym->st_info);
12129
12130 case STT_ARM_16BIT:
12131 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
12132 This allows us to distinguish between data used by Thumb instructions
12133 and non-data (which is probably code) inside Thumb regions of an
12134 executable. */
12135 if (type != STT_OBJECT && type != STT_TLS)
12136 return ELF_ST_TYPE (elf_sym->st_info);
12137 break;
12138
12139 default:
12140 break;
12141 }
12142
12143 return type;
12144 }
12145
12146 static asection *
12147 elf32_arm_gc_mark_hook (asection *sec,
12148 struct bfd_link_info *info,
12149 Elf_Internal_Rela *rel,
12150 struct elf_link_hash_entry *h,
12151 Elf_Internal_Sym *sym)
12152 {
12153 if (h != NULL)
12154 switch (ELF32_R_TYPE (rel->r_info))
12155 {
12156 case R_ARM_GNU_VTINHERIT:
12157 case R_ARM_GNU_VTENTRY:
12158 return NULL;
12159 }
12160
12161 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
12162 }
12163
12164 /* Update the got entry reference counts for the section being removed. */
12165
12166 static bfd_boolean
12167 elf32_arm_gc_sweep_hook (bfd * abfd,
12168 struct bfd_link_info * info,
12169 asection * sec,
12170 const Elf_Internal_Rela * relocs)
12171 {
12172 Elf_Internal_Shdr *symtab_hdr;
12173 struct elf_link_hash_entry **sym_hashes;
12174 bfd_signed_vma *local_got_refcounts;
12175 const Elf_Internal_Rela *rel, *relend;
12176 struct elf32_arm_link_hash_table * globals;
12177
12178 if (info->relocatable)
12179 return TRUE;
12180
12181 globals = elf32_arm_hash_table (info);
12182 if (globals == NULL)
12183 return FALSE;
12184
12185 elf_section_data (sec)->local_dynrel = NULL;
12186
12187 symtab_hdr = & elf_symtab_hdr (abfd);
12188 sym_hashes = elf_sym_hashes (abfd);
12189 local_got_refcounts = elf_local_got_refcounts (abfd);
12190
12191 check_use_blx (globals);
12192
12193 relend = relocs + sec->reloc_count;
12194 for (rel = relocs; rel < relend; rel++)
12195 {
12196 unsigned long r_symndx;
12197 struct elf_link_hash_entry *h = NULL;
12198 struct elf32_arm_link_hash_entry *eh;
12199 int r_type;
12200 bfd_boolean call_reloc_p;
12201 bfd_boolean may_become_dynamic_p;
12202 bfd_boolean may_need_local_target_p;
12203 union gotplt_union *root_plt;
12204 struct arm_plt_info *arm_plt;
12205
12206 r_symndx = ELF32_R_SYM (rel->r_info);
12207 if (r_symndx >= symtab_hdr->sh_info)
12208 {
12209 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12210 while (h->root.type == bfd_link_hash_indirect
12211 || h->root.type == bfd_link_hash_warning)
12212 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12213 }
12214 eh = (struct elf32_arm_link_hash_entry *) h;
12215
12216 call_reloc_p = FALSE;
12217 may_become_dynamic_p = FALSE;
12218 may_need_local_target_p = FALSE;
12219
12220 r_type = ELF32_R_TYPE (rel->r_info);
12221 r_type = arm_real_reloc_type (globals, r_type);
12222 switch (r_type)
12223 {
12224 case R_ARM_GOT32:
12225 case R_ARM_GOT_PREL:
12226 case R_ARM_TLS_GD32:
12227 case R_ARM_TLS_IE32:
12228 if (h != NULL)
12229 {
12230 if (h->got.refcount > 0)
12231 h->got.refcount -= 1;
12232 }
12233 else if (local_got_refcounts != NULL)
12234 {
12235 if (local_got_refcounts[r_symndx] > 0)
12236 local_got_refcounts[r_symndx] -= 1;
12237 }
12238 break;
12239
12240 case R_ARM_TLS_LDM32:
12241 globals->tls_ldm_got.refcount -= 1;
12242 break;
12243
12244 case R_ARM_PC24:
12245 case R_ARM_PLT32:
12246 case R_ARM_CALL:
12247 case R_ARM_JUMP24:
12248 case R_ARM_PREL31:
12249 case R_ARM_THM_CALL:
12250 case R_ARM_THM_JUMP24:
12251 case R_ARM_THM_JUMP19:
12252 call_reloc_p = TRUE;
12253 may_need_local_target_p = TRUE;
12254 break;
12255
12256 case R_ARM_ABS12:
12257 if (!globals->vxworks_p)
12258 {
12259 may_need_local_target_p = TRUE;
12260 break;
12261 }
12262 /* Fall through. */
12263 case R_ARM_ABS32:
12264 case R_ARM_ABS32_NOI:
12265 case R_ARM_REL32:
12266 case R_ARM_REL32_NOI:
12267 case R_ARM_MOVW_ABS_NC:
12268 case R_ARM_MOVT_ABS:
12269 case R_ARM_MOVW_PREL_NC:
12270 case R_ARM_MOVT_PREL:
12271 case R_ARM_THM_MOVW_ABS_NC:
12272 case R_ARM_THM_MOVT_ABS:
12273 case R_ARM_THM_MOVW_PREL_NC:
12274 case R_ARM_THM_MOVT_PREL:
12275 /* Should the interworking branches be here also? */
12276 if ((info->shared || globals->root.is_relocatable_executable)
12277 && (sec->flags & SEC_ALLOC) != 0)
12278 {
12279 if (h == NULL
12280 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12281 {
12282 call_reloc_p = TRUE;
12283 may_need_local_target_p = TRUE;
12284 }
12285 else
12286 may_become_dynamic_p = TRUE;
12287 }
12288 else
12289 may_need_local_target_p = TRUE;
12290 break;
12291
12292 default:
12293 break;
12294 }
12295
12296 if (may_need_local_target_p
12297 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
12298 {
12299 /* If PLT refcount book-keeping is wrong and too low, we'll
12300 see a zero value (going to -1) for the root PLT reference
12301 count. */
12302 if (root_plt->refcount >= 0)
12303 {
12304 BFD_ASSERT (root_plt->refcount != 0);
12305 root_plt->refcount -= 1;
12306 }
12307 else
12308 /* A value of -1 means the symbol has become local, forced
12309 or seeing a hidden definition. Any other negative value
12310 is an error. */
12311 BFD_ASSERT (root_plt->refcount == -1);
12312
12313 if (!call_reloc_p)
12314 arm_plt->noncall_refcount--;
12315
12316 if (r_type == R_ARM_THM_CALL)
12317 arm_plt->maybe_thumb_refcount--;
12318
12319 if (r_type == R_ARM_THM_JUMP24
12320 || r_type == R_ARM_THM_JUMP19)
12321 arm_plt->thumb_refcount--;
12322 }
12323
12324 if (may_become_dynamic_p)
12325 {
12326 struct elf_dyn_relocs **pp;
12327 struct elf_dyn_relocs *p;
12328
12329 if (h != NULL)
12330 pp = &(eh->dyn_relocs);
12331 else
12332 {
12333 Elf_Internal_Sym *isym;
12334
12335 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12336 abfd, r_symndx);
12337 if (isym == NULL)
12338 return FALSE;
12339 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12340 if (pp == NULL)
12341 return FALSE;
12342 }
12343 for (; (p = *pp) != NULL; pp = &p->next)
12344 if (p->sec == sec)
12345 {
12346 /* Everything must go for SEC. */
12347 *pp = p->next;
12348 break;
12349 }
12350 }
12351 }
12352
12353 return TRUE;
12354 }
12355
12356 /* Look through the relocs for a section during the first phase. */
12357
12358 static bfd_boolean
12359 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12360 asection *sec, const Elf_Internal_Rela *relocs)
12361 {
12362 Elf_Internal_Shdr *symtab_hdr;
12363 struct elf_link_hash_entry **sym_hashes;
12364 const Elf_Internal_Rela *rel;
12365 const Elf_Internal_Rela *rel_end;
12366 bfd *dynobj;
12367 asection *sreloc;
12368 struct elf32_arm_link_hash_table *htab;
12369 bfd_boolean call_reloc_p;
12370 bfd_boolean may_become_dynamic_p;
12371 bfd_boolean may_need_local_target_p;
12372 unsigned long nsyms;
12373
12374 if (info->relocatable)
12375 return TRUE;
12376
12377 BFD_ASSERT (is_arm_elf (abfd));
12378
12379 htab = elf32_arm_hash_table (info);
12380 if (htab == NULL)
12381 return FALSE;
12382
12383 sreloc = NULL;
12384
12385 /* Create dynamic sections for relocatable executables so that we can
12386 copy relocations. */
12387 if (htab->root.is_relocatable_executable
12388 && ! htab->root.dynamic_sections_created)
12389 {
12390 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12391 return FALSE;
12392 }
12393
12394 if (htab->root.dynobj == NULL)
12395 htab->root.dynobj = abfd;
12396 if (!create_ifunc_sections (info))
12397 return FALSE;
12398
12399 dynobj = htab->root.dynobj;
12400
12401 symtab_hdr = & elf_symtab_hdr (abfd);
12402 sym_hashes = elf_sym_hashes (abfd);
12403 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
12404
12405 rel_end = relocs + sec->reloc_count;
12406 for (rel = relocs; rel < rel_end; rel++)
12407 {
12408 Elf_Internal_Sym *isym;
12409 struct elf_link_hash_entry *h;
12410 struct elf32_arm_link_hash_entry *eh;
12411 unsigned long r_symndx;
12412 int r_type;
12413
12414 r_symndx = ELF32_R_SYM (rel->r_info);
12415 r_type = ELF32_R_TYPE (rel->r_info);
12416 r_type = arm_real_reloc_type (htab, r_type);
12417
12418 if (r_symndx >= nsyms
12419 /* PR 9934: It is possible to have relocations that do not
12420 refer to symbols, thus it is also possible to have an
12421 object file containing relocations but no symbol table. */
12422 && (r_symndx > STN_UNDEF || nsyms > 0))
12423 {
12424 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
12425 r_symndx);
12426 return FALSE;
12427 }
12428
12429 h = NULL;
12430 isym = NULL;
12431 if (nsyms > 0)
12432 {
12433 if (r_symndx < symtab_hdr->sh_info)
12434 {
12435 /* A local symbol. */
12436 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12437 abfd, r_symndx);
12438 if (isym == NULL)
12439 return FALSE;
12440 }
12441 else
12442 {
12443 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12444 while (h->root.type == bfd_link_hash_indirect
12445 || h->root.type == bfd_link_hash_warning)
12446 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12447 }
12448 }
12449
12450 eh = (struct elf32_arm_link_hash_entry *) h;
12451
12452 call_reloc_p = FALSE;
12453 may_become_dynamic_p = FALSE;
12454 may_need_local_target_p = FALSE;
12455
12456 /* Could be done earlier, if h were already available. */
12457 r_type = elf32_arm_tls_transition (info, r_type, h);
12458 switch (r_type)
12459 {
12460 case R_ARM_GOT32:
12461 case R_ARM_GOT_PREL:
12462 case R_ARM_TLS_GD32:
12463 case R_ARM_TLS_IE32:
12464 case R_ARM_TLS_GOTDESC:
12465 case R_ARM_TLS_DESCSEQ:
12466 case R_ARM_THM_TLS_DESCSEQ:
12467 case R_ARM_TLS_CALL:
12468 case R_ARM_THM_TLS_CALL:
12469 /* This symbol requires a global offset table entry. */
12470 {
12471 int tls_type, old_tls_type;
12472
12473 switch (r_type)
12474 {
12475 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
12476
12477 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
12478
12479 case R_ARM_TLS_GOTDESC:
12480 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12481 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12482 tls_type = GOT_TLS_GDESC; break;
12483
12484 default: tls_type = GOT_NORMAL; break;
12485 }
12486
12487 if (h != NULL)
12488 {
12489 h->got.refcount++;
12490 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12491 }
12492 else
12493 {
12494 /* This is a global offset table entry for a local symbol. */
12495 if (!elf32_arm_allocate_local_sym_info (abfd))
12496 return FALSE;
12497 elf_local_got_refcounts (abfd)[r_symndx] += 1;
12498 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12499 }
12500
12501 /* If a variable is accessed with both tls methods, two
12502 slots may be created. */
12503 if (GOT_TLS_GD_ANY_P (old_tls_type)
12504 && GOT_TLS_GD_ANY_P (tls_type))
12505 tls_type |= old_tls_type;
12506
12507 /* We will already have issued an error message if there
12508 is a TLS/non-TLS mismatch, based on the symbol
12509 type. So just combine any TLS types needed. */
12510 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12511 && tls_type != GOT_NORMAL)
12512 tls_type |= old_tls_type;
12513
12514 /* If the symbol is accessed in both IE and GDESC
12515 method, we're able to relax. Turn off the GDESC flag,
12516 without messing up with any other kind of tls types
12517 that may be involved */
12518 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12519 tls_type &= ~GOT_TLS_GDESC;
12520
12521 if (old_tls_type != tls_type)
12522 {
12523 if (h != NULL)
12524 elf32_arm_hash_entry (h)->tls_type = tls_type;
12525 else
12526 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12527 }
12528 }
12529 /* Fall through. */
12530
12531 case R_ARM_TLS_LDM32:
12532 if (r_type == R_ARM_TLS_LDM32)
12533 htab->tls_ldm_got.refcount++;
12534 /* Fall through. */
12535
12536 case R_ARM_GOTOFF32:
12537 case R_ARM_GOTPC:
12538 if (htab->root.sgot == NULL
12539 && !create_got_section (htab->root.dynobj, info))
12540 return FALSE;
12541 break;
12542
12543 case R_ARM_PC24:
12544 case R_ARM_PLT32:
12545 case R_ARM_CALL:
12546 case R_ARM_JUMP24:
12547 case R_ARM_PREL31:
12548 case R_ARM_THM_CALL:
12549 case R_ARM_THM_JUMP24:
12550 case R_ARM_THM_JUMP19:
12551 call_reloc_p = TRUE;
12552 may_need_local_target_p = TRUE;
12553 break;
12554
12555 case R_ARM_ABS12:
12556 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12557 ldr __GOTT_INDEX__ offsets. */
12558 if (!htab->vxworks_p)
12559 {
12560 may_need_local_target_p = TRUE;
12561 break;
12562 }
12563 /* Fall through. */
12564
12565 case R_ARM_MOVW_ABS_NC:
12566 case R_ARM_MOVT_ABS:
12567 case R_ARM_THM_MOVW_ABS_NC:
12568 case R_ARM_THM_MOVT_ABS:
12569 if (info->shared)
12570 {
12571 (*_bfd_error_handler)
12572 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12573 abfd, elf32_arm_howto_table_1[r_type].name,
12574 (h) ? h->root.root.string : "a local symbol");
12575 bfd_set_error (bfd_error_bad_value);
12576 return FALSE;
12577 }
12578
12579 /* Fall through. */
12580 case R_ARM_ABS32:
12581 case R_ARM_ABS32_NOI:
12582 case R_ARM_REL32:
12583 case R_ARM_REL32_NOI:
12584 case R_ARM_MOVW_PREL_NC:
12585 case R_ARM_MOVT_PREL:
12586 case R_ARM_THM_MOVW_PREL_NC:
12587 case R_ARM_THM_MOVT_PREL:
12588
12589 /* Should the interworking branches be listed here? */
12590 if ((info->shared || htab->root.is_relocatable_executable)
12591 && (sec->flags & SEC_ALLOC) != 0)
12592 {
12593 if (h == NULL
12594 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12595 {
12596 /* In shared libraries and relocatable executables,
12597 we treat local relative references as calls;
12598 see the related SYMBOL_CALLS_LOCAL code in
12599 allocate_dynrelocs. */
12600 call_reloc_p = TRUE;
12601 may_need_local_target_p = TRUE;
12602 }
12603 else
12604 /* We are creating a shared library or relocatable
12605 executable, and this is a reloc against a global symbol,
12606 or a non-PC-relative reloc against a local symbol.
12607 We may need to copy the reloc into the output. */
12608 may_become_dynamic_p = TRUE;
12609 }
12610 else
12611 may_need_local_target_p = TRUE;
12612 break;
12613
12614 /* This relocation describes the C++ object vtable hierarchy.
12615 Reconstruct it for later use during GC. */
12616 case R_ARM_GNU_VTINHERIT:
12617 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
12618 return FALSE;
12619 break;
12620
12621 /* This relocation describes which C++ vtable entries are actually
12622 used. Record for later use during GC. */
12623 case R_ARM_GNU_VTENTRY:
12624 BFD_ASSERT (h != NULL);
12625 if (h != NULL
12626 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
12627 return FALSE;
12628 break;
12629 }
12630
12631 if (h != NULL)
12632 {
12633 if (call_reloc_p)
12634 /* We may need a .plt entry if the function this reloc
12635 refers to is in a different object, regardless of the
12636 symbol's type. We can't tell for sure yet, because
12637 something later might force the symbol local. */
12638 h->needs_plt = 1;
12639 else if (may_need_local_target_p)
12640 /* If this reloc is in a read-only section, we might
12641 need a copy reloc. We can't check reliably at this
12642 stage whether the section is read-only, as input
12643 sections have not yet been mapped to output sections.
12644 Tentatively set the flag for now, and correct in
12645 adjust_dynamic_symbol. */
12646 h->non_got_ref = 1;
12647 }
12648
12649 if (may_need_local_target_p
12650 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
12651 {
12652 union gotplt_union *root_plt;
12653 struct arm_plt_info *arm_plt;
12654 struct arm_local_iplt_info *local_iplt;
12655
12656 if (h != NULL)
12657 {
12658 root_plt = &h->plt;
12659 arm_plt = &eh->plt;
12660 }
12661 else
12662 {
12663 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12664 if (local_iplt == NULL)
12665 return FALSE;
12666 root_plt = &local_iplt->root;
12667 arm_plt = &local_iplt->arm;
12668 }
12669
12670 /* If the symbol is a function that doesn't bind locally,
12671 this relocation will need a PLT entry. */
12672 if (root_plt->refcount != -1)
12673 root_plt->refcount += 1;
12674
12675 if (!call_reloc_p)
12676 arm_plt->noncall_refcount++;
12677
12678 /* It's too early to use htab->use_blx here, so we have to
12679 record possible blx references separately from
12680 relocs that definitely need a thumb stub. */
12681
12682 if (r_type == R_ARM_THM_CALL)
12683 arm_plt->maybe_thumb_refcount += 1;
12684
12685 if (r_type == R_ARM_THM_JUMP24
12686 || r_type == R_ARM_THM_JUMP19)
12687 arm_plt->thumb_refcount += 1;
12688 }
12689
12690 if (may_become_dynamic_p)
12691 {
12692 struct elf_dyn_relocs *p, **head;
12693
12694 /* Create a reloc section in dynobj. */
12695 if (sreloc == NULL)
12696 {
12697 sreloc = _bfd_elf_make_dynamic_reloc_section
12698 (sec, dynobj, 2, abfd, ! htab->use_rel);
12699
12700 if (sreloc == NULL)
12701 return FALSE;
12702
12703 /* BPABI objects never have dynamic relocations mapped. */
12704 if (htab->symbian_p)
12705 {
12706 flagword flags;
12707
12708 flags = bfd_get_section_flags (dynobj, sreloc);
12709 flags &= ~(SEC_LOAD | SEC_ALLOC);
12710 bfd_set_section_flags (dynobj, sreloc, flags);
12711 }
12712 }
12713
12714 /* If this is a global symbol, count the number of
12715 relocations we need for this symbol. */
12716 if (h != NULL)
12717 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12718 else
12719 {
12720 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12721 if (head == NULL)
12722 return FALSE;
12723 }
12724
12725 p = *head;
12726 if (p == NULL || p->sec != sec)
12727 {
12728 bfd_size_type amt = sizeof *p;
12729
12730 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12731 if (p == NULL)
12732 return FALSE;
12733 p->next = *head;
12734 *head = p;
12735 p->sec = sec;
12736 p->count = 0;
12737 p->pc_count = 0;
12738 }
12739
12740 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12741 p->pc_count += 1;
12742 p->count += 1;
12743 }
12744 }
12745
12746 return TRUE;
12747 }
12748
12749 /* Unwinding tables are not referenced directly. This pass marks them as
12750 required if the corresponding code section is marked. */
12751
12752 static bfd_boolean
12753 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12754 elf_gc_mark_hook_fn gc_mark_hook)
12755 {
12756 bfd *sub;
12757 Elf_Internal_Shdr **elf_shdrp;
12758 bfd_boolean again;
12759
12760 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12761
12762 /* Marking EH data may cause additional code sections to be marked,
12763 requiring multiple passes. */
12764 again = TRUE;
12765 while (again)
12766 {
12767 again = FALSE;
12768 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
12769 {
12770 asection *o;
12771
12772 if (! is_arm_elf (sub))
12773 continue;
12774
12775 elf_shdrp = elf_elfsections (sub);
12776 for (o = sub->sections; o != NULL; o = o->next)
12777 {
12778 Elf_Internal_Shdr *hdr;
12779
12780 hdr = &elf_section_data (o)->this_hdr;
12781 if (hdr->sh_type == SHT_ARM_EXIDX
12782 && hdr->sh_link
12783 && hdr->sh_link < elf_numsections (sub)
12784 && !o->gc_mark
12785 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
12786 {
12787 again = TRUE;
12788 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
12789 return FALSE;
12790 }
12791 }
12792 }
12793 }
12794
12795 return TRUE;
12796 }
12797
12798 /* Treat mapping symbols as special target symbols. */
12799
12800 static bfd_boolean
12801 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
12802 {
12803 return bfd_is_arm_special_symbol_name (sym->name,
12804 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
12805 }
12806
12807 /* This is a copy of elf_find_function() from elf.c except that
12808 ARM mapping symbols are ignored when looking for function names
12809 and STT_ARM_TFUNC is considered to a function type. */
12810
12811 static bfd_boolean
12812 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
12813 asection * section,
12814 asymbol ** symbols,
12815 bfd_vma offset,
12816 const char ** filename_ptr,
12817 const char ** functionname_ptr)
12818 {
12819 const char * filename = NULL;
12820 asymbol * func = NULL;
12821 bfd_vma low_func = 0;
12822 asymbol ** p;
12823
12824 for (p = symbols; *p != NULL; p++)
12825 {
12826 elf_symbol_type *q;
12827
12828 q = (elf_symbol_type *) *p;
12829
12830 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
12831 {
12832 default:
12833 break;
12834 case STT_FILE:
12835 filename = bfd_asymbol_name (&q->symbol);
12836 break;
12837 case STT_FUNC:
12838 case STT_ARM_TFUNC:
12839 case STT_NOTYPE:
12840 /* Skip mapping symbols. */
12841 if ((q->symbol.flags & BSF_LOCAL)
12842 && bfd_is_arm_special_symbol_name (q->symbol.name,
12843 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
12844 continue;
12845 /* Fall through. */
12846 if (bfd_get_section (&q->symbol) == section
12847 && q->symbol.value >= low_func
12848 && q->symbol.value <= offset)
12849 {
12850 func = (asymbol *) q;
12851 low_func = q->symbol.value;
12852 }
12853 break;
12854 }
12855 }
12856
12857 if (func == NULL)
12858 return FALSE;
12859
12860 if (filename_ptr)
12861 *filename_ptr = filename;
12862 if (functionname_ptr)
12863 *functionname_ptr = bfd_asymbol_name (func);
12864
12865 return TRUE;
12866 }
12867
12868
12869 /* Find the nearest line to a particular section and offset, for error
12870 reporting. This code is a duplicate of the code in elf.c, except
12871 that it uses arm_elf_find_function. */
12872
12873 static bfd_boolean
12874 elf32_arm_find_nearest_line (bfd * abfd,
12875 asection * section,
12876 asymbol ** symbols,
12877 bfd_vma offset,
12878 const char ** filename_ptr,
12879 const char ** functionname_ptr,
12880 unsigned int * line_ptr)
12881 {
12882 bfd_boolean found = FALSE;
12883
12884 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
12885
12886 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
12887 section, symbols, offset,
12888 filename_ptr, functionname_ptr,
12889 line_ptr, NULL, 0,
12890 & elf_tdata (abfd)->dwarf2_find_line_info))
12891 {
12892 if (!*functionname_ptr)
12893 arm_elf_find_function (abfd, section, symbols, offset,
12894 *filename_ptr ? NULL : filename_ptr,
12895 functionname_ptr);
12896
12897 return TRUE;
12898 }
12899
12900 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
12901 & found, filename_ptr,
12902 functionname_ptr, line_ptr,
12903 & elf_tdata (abfd)->line_info))
12904 return FALSE;
12905
12906 if (found && (*functionname_ptr || *line_ptr))
12907 return TRUE;
12908
12909 if (symbols == NULL)
12910 return FALSE;
12911
12912 if (! arm_elf_find_function (abfd, section, symbols, offset,
12913 filename_ptr, functionname_ptr))
12914 return FALSE;
12915
12916 *line_ptr = 0;
12917 return TRUE;
12918 }
12919
12920 static bfd_boolean
12921 elf32_arm_find_inliner_info (bfd * abfd,
12922 const char ** filename_ptr,
12923 const char ** functionname_ptr,
12924 unsigned int * line_ptr)
12925 {
12926 bfd_boolean found;
12927 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
12928 functionname_ptr, line_ptr,
12929 & elf_tdata (abfd)->dwarf2_find_line_info);
12930 return found;
12931 }
12932
12933 /* Adjust a symbol defined by a dynamic object and referenced by a
12934 regular object. The current definition is in some section of the
12935 dynamic object, but we're not including those sections. We have to
12936 change the definition to something the rest of the link can
12937 understand. */
12938
12939 static bfd_boolean
12940 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
12941 struct elf_link_hash_entry * h)
12942 {
12943 bfd * dynobj;
12944 asection * s;
12945 struct elf32_arm_link_hash_entry * eh;
12946 struct elf32_arm_link_hash_table *globals;
12947
12948 globals = elf32_arm_hash_table (info);
12949 if (globals == NULL)
12950 return FALSE;
12951
12952 dynobj = elf_hash_table (info)->dynobj;
12953
12954 /* Make sure we know what is going on here. */
12955 BFD_ASSERT (dynobj != NULL
12956 && (h->needs_plt
12957 || h->type == STT_GNU_IFUNC
12958 || h->u.weakdef != NULL
12959 || (h->def_dynamic
12960 && h->ref_regular
12961 && !h->def_regular)));
12962
12963 eh = (struct elf32_arm_link_hash_entry *) h;
12964
12965 /* If this is a function, put it in the procedure linkage table. We
12966 will fill in the contents of the procedure linkage table later,
12967 when we know the address of the .got section. */
12968 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
12969 {
12970 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
12971 symbol binds locally. */
12972 if (h->plt.refcount <= 0
12973 || (h->type != STT_GNU_IFUNC
12974 && (SYMBOL_CALLS_LOCAL (info, h)
12975 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
12976 && h->root.type == bfd_link_hash_undefweak))))
12977 {
12978 /* This case can occur if we saw a PLT32 reloc in an input
12979 file, but the symbol was never referred to by a dynamic
12980 object, or if all references were garbage collected. In
12981 such a case, we don't actually need to build a procedure
12982 linkage table, and we can just do a PC24 reloc instead. */
12983 h->plt.offset = (bfd_vma) -1;
12984 eh->plt.thumb_refcount = 0;
12985 eh->plt.maybe_thumb_refcount = 0;
12986 eh->plt.noncall_refcount = 0;
12987 h->needs_plt = 0;
12988 }
12989
12990 return TRUE;
12991 }
12992 else
12993 {
12994 /* It's possible that we incorrectly decided a .plt reloc was
12995 needed for an R_ARM_PC24 or similar reloc to a non-function sym
12996 in check_relocs. We can't decide accurately between function
12997 and non-function syms in check-relocs; Objects loaded later in
12998 the link may change h->type. So fix it now. */
12999 h->plt.offset = (bfd_vma) -1;
13000 eh->plt.thumb_refcount = 0;
13001 eh->plt.maybe_thumb_refcount = 0;
13002 eh->plt.noncall_refcount = 0;
13003 }
13004
13005 /* If this is a weak symbol, and there is a real definition, the
13006 processor independent code will have arranged for us to see the
13007 real definition first, and we can just use the same value. */
13008 if (h->u.weakdef != NULL)
13009 {
13010 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
13011 || h->u.weakdef->root.type == bfd_link_hash_defweak);
13012 h->root.u.def.section = h->u.weakdef->root.u.def.section;
13013 h->root.u.def.value = h->u.weakdef->root.u.def.value;
13014 return TRUE;
13015 }
13016
13017 /* If there are no non-GOT references, we do not need a copy
13018 relocation. */
13019 if (!h->non_got_ref)
13020 return TRUE;
13021
13022 /* This is a reference to a symbol defined by a dynamic object which
13023 is not a function. */
13024
13025 /* If we are creating a shared library, we must presume that the
13026 only references to the symbol are via the global offset table.
13027 For such cases we need not do anything here; the relocations will
13028 be handled correctly by relocate_section. Relocatable executables
13029 can reference data in shared objects directly, so we don't need to
13030 do anything here. */
13031 if (info->shared || globals->root.is_relocatable_executable)
13032 return TRUE;
13033
13034 /* We must allocate the symbol in our .dynbss section, which will
13035 become part of the .bss section of the executable. There will be
13036 an entry for this symbol in the .dynsym section. The dynamic
13037 object will contain position independent code, so all references
13038 from the dynamic object to this symbol will go through the global
13039 offset table. The dynamic linker will use the .dynsym entry to
13040 determine the address it must put in the global offset table, so
13041 both the dynamic object and the regular object will refer to the
13042 same memory location for the variable. */
13043 s = bfd_get_linker_section (dynobj, ".dynbss");
13044 BFD_ASSERT (s != NULL);
13045
13046 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
13047 copy the initial value out of the dynamic object and into the
13048 runtime process image. We need to remember the offset into the
13049 .rel(a).bss section we are going to use. */
13050 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
13051 {
13052 asection *srel;
13053
13054 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
13055 elf32_arm_allocate_dynrelocs (info, srel, 1);
13056 h->needs_copy = 1;
13057 }
13058
13059 return _bfd_elf_adjust_dynamic_copy (h, s);
13060 }
13061
13062 /* Allocate space in .plt, .got and associated reloc sections for
13063 dynamic relocs. */
13064
13065 static bfd_boolean
13066 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
13067 {
13068 struct bfd_link_info *info;
13069 struct elf32_arm_link_hash_table *htab;
13070 struct elf32_arm_link_hash_entry *eh;
13071 struct elf_dyn_relocs *p;
13072
13073 if (h->root.type == bfd_link_hash_indirect)
13074 return TRUE;
13075
13076 eh = (struct elf32_arm_link_hash_entry *) h;
13077
13078 info = (struct bfd_link_info *) inf;
13079 htab = elf32_arm_hash_table (info);
13080 if (htab == NULL)
13081 return FALSE;
13082
13083 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
13084 && h->plt.refcount > 0)
13085 {
13086 /* Make sure this symbol is output as a dynamic symbol.
13087 Undefined weak syms won't yet be marked as dynamic. */
13088 if (h->dynindx == -1
13089 && !h->forced_local)
13090 {
13091 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13092 return FALSE;
13093 }
13094
13095 /* If the call in the PLT entry binds locally, the associated
13096 GOT entry should use an R_ARM_IRELATIVE relocation instead of
13097 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
13098 than the .plt section. */
13099 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
13100 {
13101 eh->is_iplt = 1;
13102 if (eh->plt.noncall_refcount == 0
13103 && SYMBOL_REFERENCES_LOCAL (info, h))
13104 /* All non-call references can be resolved directly.
13105 This means that they can (and in some cases, must)
13106 resolve directly to the run-time target, rather than
13107 to the PLT. That in turns means that any .got entry
13108 would be equal to the .igot.plt entry, so there's
13109 no point having both. */
13110 h->got.refcount = 0;
13111 }
13112
13113 if (info->shared
13114 || eh->is_iplt
13115 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
13116 {
13117 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
13118
13119 /* If this symbol is not defined in a regular file, and we are
13120 not generating a shared library, then set the symbol to this
13121 location in the .plt. This is required to make function
13122 pointers compare as equal between the normal executable and
13123 the shared library. */
13124 if (! info->shared
13125 && !h->def_regular)
13126 {
13127 h->root.u.def.section = htab->root.splt;
13128 h->root.u.def.value = h->plt.offset;
13129
13130 /* Make sure the function is not marked as Thumb, in case
13131 it is the target of an ABS32 relocation, which will
13132 point to the PLT entry. */
13133 h->target_internal = ST_BRANCH_TO_ARM;
13134 }
13135
13136 htab->next_tls_desc_index++;
13137
13138 /* VxWorks executables have a second set of relocations for
13139 each PLT entry. They go in a separate relocation section,
13140 which is processed by the kernel loader. */
13141 if (htab->vxworks_p && !info->shared)
13142 {
13143 /* There is a relocation for the initial PLT entry:
13144 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
13145 if (h->plt.offset == htab->plt_header_size)
13146 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
13147
13148 /* There are two extra relocations for each subsequent
13149 PLT entry: an R_ARM_32 relocation for the GOT entry,
13150 and an R_ARM_32 relocation for the PLT entry. */
13151 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
13152 }
13153 }
13154 else
13155 {
13156 h->plt.offset = (bfd_vma) -1;
13157 h->needs_plt = 0;
13158 }
13159 }
13160 else
13161 {
13162 h->plt.offset = (bfd_vma) -1;
13163 h->needs_plt = 0;
13164 }
13165
13166 eh = (struct elf32_arm_link_hash_entry *) h;
13167 eh->tlsdesc_got = (bfd_vma) -1;
13168
13169 if (h->got.refcount > 0)
13170 {
13171 asection *s;
13172 bfd_boolean dyn;
13173 int tls_type = elf32_arm_hash_entry (h)->tls_type;
13174 int indx;
13175
13176 /* Make sure this symbol is output as a dynamic symbol.
13177 Undefined weak syms won't yet be marked as dynamic. */
13178 if (h->dynindx == -1
13179 && !h->forced_local)
13180 {
13181 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13182 return FALSE;
13183 }
13184
13185 if (!htab->symbian_p)
13186 {
13187 s = htab->root.sgot;
13188 h->got.offset = s->size;
13189
13190 if (tls_type == GOT_UNKNOWN)
13191 abort ();
13192
13193 if (tls_type == GOT_NORMAL)
13194 /* Non-TLS symbols need one GOT slot. */
13195 s->size += 4;
13196 else
13197 {
13198 if (tls_type & GOT_TLS_GDESC)
13199 {
13200 /* R_ARM_TLS_DESC needs 2 GOT slots. */
13201 eh->tlsdesc_got
13202 = (htab->root.sgotplt->size
13203 - elf32_arm_compute_jump_table_size (htab));
13204 htab->root.sgotplt->size += 8;
13205 h->got.offset = (bfd_vma) -2;
13206 /* plt.got_offset needs to know there's a TLS_DESC
13207 reloc in the middle of .got.plt. */
13208 htab->num_tls_desc++;
13209 }
13210
13211 if (tls_type & GOT_TLS_GD)
13212 {
13213 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13214 the symbol is both GD and GDESC, got.offset may
13215 have been overwritten. */
13216 h->got.offset = s->size;
13217 s->size += 8;
13218 }
13219
13220 if (tls_type & GOT_TLS_IE)
13221 /* R_ARM_TLS_IE32 needs one GOT slot. */
13222 s->size += 4;
13223 }
13224
13225 dyn = htab->root.dynamic_sections_created;
13226
13227 indx = 0;
13228 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13229 && (!info->shared
13230 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13231 indx = h->dynindx;
13232
13233 if (tls_type != GOT_NORMAL
13234 && (info->shared || indx != 0)
13235 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13236 || h->root.type != bfd_link_hash_undefweak))
13237 {
13238 if (tls_type & GOT_TLS_IE)
13239 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13240
13241 if (tls_type & GOT_TLS_GD)
13242 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13243
13244 if (tls_type & GOT_TLS_GDESC)
13245 {
13246 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
13247 /* GDESC needs a trampoline to jump to. */
13248 htab->tls_trampoline = -1;
13249 }
13250
13251 /* Only GD needs it. GDESC just emits one relocation per
13252 2 entries. */
13253 if ((tls_type & GOT_TLS_GD) && indx != 0)
13254 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13255 }
13256 else if (!SYMBOL_REFERENCES_LOCAL (info, h))
13257 {
13258 if (htab->root.dynamic_sections_created)
13259 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13260 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13261 }
13262 else if (h->type == STT_GNU_IFUNC
13263 && eh->plt.noncall_refcount == 0)
13264 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13265 they all resolve dynamically instead. Reserve room for the
13266 GOT entry's R_ARM_IRELATIVE relocation. */
13267 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
13268 else if (info->shared)
13269 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
13270 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13271 }
13272 }
13273 else
13274 h->got.offset = (bfd_vma) -1;
13275
13276 /* Allocate stubs for exported Thumb functions on v4t. */
13277 if (!htab->use_blx && h->dynindx != -1
13278 && h->def_regular
13279 && h->target_internal == ST_BRANCH_TO_THUMB
13280 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13281 {
13282 struct elf_link_hash_entry * th;
13283 struct bfd_link_hash_entry * bh;
13284 struct elf_link_hash_entry * myh;
13285 char name[1024];
13286 asection *s;
13287 bh = NULL;
13288 /* Create a new symbol to regist the real location of the function. */
13289 s = h->root.u.def.section;
13290 sprintf (name, "__real_%s", h->root.root.string);
13291 _bfd_generic_link_add_one_symbol (info, s->owner,
13292 name, BSF_GLOBAL, s,
13293 h->root.u.def.value,
13294 NULL, TRUE, FALSE, &bh);
13295
13296 myh = (struct elf_link_hash_entry *) bh;
13297 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
13298 myh->forced_local = 1;
13299 myh->target_internal = ST_BRANCH_TO_THUMB;
13300 eh->export_glue = myh;
13301 th = record_arm_to_thumb_glue (info, h);
13302 /* Point the symbol at the stub. */
13303 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
13304 h->target_internal = ST_BRANCH_TO_ARM;
13305 h->root.u.def.section = th->root.u.def.section;
13306 h->root.u.def.value = th->root.u.def.value & ~1;
13307 }
13308
13309 if (eh->dyn_relocs == NULL)
13310 return TRUE;
13311
13312 /* In the shared -Bsymbolic case, discard space allocated for
13313 dynamic pc-relative relocs against symbols which turn out to be
13314 defined in regular objects. For the normal shared case, discard
13315 space for pc-relative relocs that have become local due to symbol
13316 visibility changes. */
13317
13318 if (info->shared || htab->root.is_relocatable_executable)
13319 {
13320 /* The only relocs that use pc_count are R_ARM_REL32 and
13321 R_ARM_REL32_NOI, which will appear on something like
13322 ".long foo - .". We want calls to protected symbols to resolve
13323 directly to the function rather than going via the plt. If people
13324 want function pointer comparisons to work as expected then they
13325 should avoid writing assembly like ".long foo - .". */
13326 if (SYMBOL_CALLS_LOCAL (info, h))
13327 {
13328 struct elf_dyn_relocs **pp;
13329
13330 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13331 {
13332 p->count -= p->pc_count;
13333 p->pc_count = 0;
13334 if (p->count == 0)
13335 *pp = p->next;
13336 else
13337 pp = &p->next;
13338 }
13339 }
13340
13341 if (htab->vxworks_p)
13342 {
13343 struct elf_dyn_relocs **pp;
13344
13345 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13346 {
13347 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
13348 *pp = p->next;
13349 else
13350 pp = &p->next;
13351 }
13352 }
13353
13354 /* Also discard relocs on undefined weak syms with non-default
13355 visibility. */
13356 if (eh->dyn_relocs != NULL
13357 && h->root.type == bfd_link_hash_undefweak)
13358 {
13359 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
13360 eh->dyn_relocs = NULL;
13361
13362 /* Make sure undefined weak symbols are output as a dynamic
13363 symbol in PIEs. */
13364 else if (h->dynindx == -1
13365 && !h->forced_local)
13366 {
13367 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13368 return FALSE;
13369 }
13370 }
13371
13372 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13373 && h->root.type == bfd_link_hash_new)
13374 {
13375 /* Output absolute symbols so that we can create relocations
13376 against them. For normal symbols we output a relocation
13377 against the section that contains them. */
13378 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13379 return FALSE;
13380 }
13381
13382 }
13383 else
13384 {
13385 /* For the non-shared case, discard space for relocs against
13386 symbols which turn out to need copy relocs or are not
13387 dynamic. */
13388
13389 if (!h->non_got_ref
13390 && ((h->def_dynamic
13391 && !h->def_regular)
13392 || (htab->root.dynamic_sections_created
13393 && (h->root.type == bfd_link_hash_undefweak
13394 || h->root.type == bfd_link_hash_undefined))))
13395 {
13396 /* Make sure this symbol is output as a dynamic symbol.
13397 Undefined weak syms won't yet be marked as dynamic. */
13398 if (h->dynindx == -1
13399 && !h->forced_local)
13400 {
13401 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13402 return FALSE;
13403 }
13404
13405 /* If that succeeded, we know we'll be keeping all the
13406 relocs. */
13407 if (h->dynindx != -1)
13408 goto keep;
13409 }
13410
13411 eh->dyn_relocs = NULL;
13412
13413 keep: ;
13414 }
13415
13416 /* Finally, allocate space. */
13417 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13418 {
13419 asection *sreloc = elf_section_data (p->sec)->sreloc;
13420 if (h->type == STT_GNU_IFUNC
13421 && eh->plt.noncall_refcount == 0
13422 && SYMBOL_REFERENCES_LOCAL (info, h))
13423 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13424 else
13425 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
13426 }
13427
13428 return TRUE;
13429 }
13430
13431 /* Find any dynamic relocs that apply to read-only sections. */
13432
13433 static bfd_boolean
13434 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
13435 {
13436 struct elf32_arm_link_hash_entry * eh;
13437 struct elf_dyn_relocs * p;
13438
13439 eh = (struct elf32_arm_link_hash_entry *) h;
13440 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13441 {
13442 asection *s = p->sec;
13443
13444 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13445 {
13446 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13447
13448 info->flags |= DF_TEXTREL;
13449
13450 /* Not an error, just cut short the traversal. */
13451 return FALSE;
13452 }
13453 }
13454 return TRUE;
13455 }
13456
13457 void
13458 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13459 int byteswap_code)
13460 {
13461 struct elf32_arm_link_hash_table *globals;
13462
13463 globals = elf32_arm_hash_table (info);
13464 if (globals == NULL)
13465 return;
13466
13467 globals->byteswap_code = byteswap_code;
13468 }
13469
13470 /* Set the sizes of the dynamic sections. */
13471
13472 static bfd_boolean
13473 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13474 struct bfd_link_info * info)
13475 {
13476 bfd * dynobj;
13477 asection * s;
13478 bfd_boolean plt;
13479 bfd_boolean relocs;
13480 bfd *ibfd;
13481 struct elf32_arm_link_hash_table *htab;
13482
13483 htab = elf32_arm_hash_table (info);
13484 if (htab == NULL)
13485 return FALSE;
13486
13487 dynobj = elf_hash_table (info)->dynobj;
13488 BFD_ASSERT (dynobj != NULL);
13489 check_use_blx (htab);
13490
13491 if (elf_hash_table (info)->dynamic_sections_created)
13492 {
13493 /* Set the contents of the .interp section to the interpreter. */
13494 if (info->executable)
13495 {
13496 s = bfd_get_linker_section (dynobj, ".interp");
13497 BFD_ASSERT (s != NULL);
13498 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
13499 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13500 }
13501 }
13502
13503 /* Set up .got offsets for local syms, and space for local dynamic
13504 relocs. */
13505 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
13506 {
13507 bfd_signed_vma *local_got;
13508 bfd_signed_vma *end_local_got;
13509 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
13510 char *local_tls_type;
13511 bfd_vma *local_tlsdesc_gotent;
13512 bfd_size_type locsymcount;
13513 Elf_Internal_Shdr *symtab_hdr;
13514 asection *srel;
13515 bfd_boolean is_vxworks = htab->vxworks_p;
13516 unsigned int symndx;
13517
13518 if (! is_arm_elf (ibfd))
13519 continue;
13520
13521 for (s = ibfd->sections; s != NULL; s = s->next)
13522 {
13523 struct elf_dyn_relocs *p;
13524
13525 for (p = (struct elf_dyn_relocs *)
13526 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
13527 {
13528 if (!bfd_is_abs_section (p->sec)
13529 && bfd_is_abs_section (p->sec->output_section))
13530 {
13531 /* Input section has been discarded, either because
13532 it is a copy of a linkonce section or due to
13533 linker script /DISCARD/, so we'll be discarding
13534 the relocs too. */
13535 }
13536 else if (is_vxworks
13537 && strcmp (p->sec->output_section->name,
13538 ".tls_vars") == 0)
13539 {
13540 /* Relocations in vxworks .tls_vars sections are
13541 handled specially by the loader. */
13542 }
13543 else if (p->count != 0)
13544 {
13545 srel = elf_section_data (p->sec)->sreloc;
13546 elf32_arm_allocate_dynrelocs (info, srel, p->count);
13547 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
13548 info->flags |= DF_TEXTREL;
13549 }
13550 }
13551 }
13552
13553 local_got = elf_local_got_refcounts (ibfd);
13554 if (!local_got)
13555 continue;
13556
13557 symtab_hdr = & elf_symtab_hdr (ibfd);
13558 locsymcount = symtab_hdr->sh_info;
13559 end_local_got = local_got + locsymcount;
13560 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
13561 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
13562 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
13563 symndx = 0;
13564 s = htab->root.sgot;
13565 srel = htab->root.srelgot;
13566 for (; local_got < end_local_got;
13567 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13568 ++local_tlsdesc_gotent, ++symndx)
13569 {
13570 *local_tlsdesc_gotent = (bfd_vma) -1;
13571 local_iplt = *local_iplt_ptr;
13572 if (local_iplt != NULL)
13573 {
13574 struct elf_dyn_relocs *p;
13575
13576 if (local_iplt->root.refcount > 0)
13577 {
13578 elf32_arm_allocate_plt_entry (info, TRUE,
13579 &local_iplt->root,
13580 &local_iplt->arm);
13581 if (local_iplt->arm.noncall_refcount == 0)
13582 /* All references to the PLT are calls, so all
13583 non-call references can resolve directly to the
13584 run-time target. This means that the .got entry
13585 would be the same as the .igot.plt entry, so there's
13586 no point creating both. */
13587 *local_got = 0;
13588 }
13589 else
13590 {
13591 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13592 local_iplt->root.offset = (bfd_vma) -1;
13593 }
13594
13595 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13596 {
13597 asection *psrel;
13598
13599 psrel = elf_section_data (p->sec)->sreloc;
13600 if (local_iplt->arm.noncall_refcount == 0)
13601 elf32_arm_allocate_irelocs (info, psrel, p->count);
13602 else
13603 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13604 }
13605 }
13606 if (*local_got > 0)
13607 {
13608 Elf_Internal_Sym *isym;
13609
13610 *local_got = s->size;
13611 if (*local_tls_type & GOT_TLS_GD)
13612 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13613 s->size += 8;
13614 if (*local_tls_type & GOT_TLS_GDESC)
13615 {
13616 *local_tlsdesc_gotent = htab->root.sgotplt->size
13617 - elf32_arm_compute_jump_table_size (htab);
13618 htab->root.sgotplt->size += 8;
13619 *local_got = (bfd_vma) -2;
13620 /* plt.got_offset needs to know there's a TLS_DESC
13621 reloc in the middle of .got.plt. */
13622 htab->num_tls_desc++;
13623 }
13624 if (*local_tls_type & GOT_TLS_IE)
13625 s->size += 4;
13626
13627 if (*local_tls_type & GOT_NORMAL)
13628 {
13629 /* If the symbol is both GD and GDESC, *local_got
13630 may have been overwritten. */
13631 *local_got = s->size;
13632 s->size += 4;
13633 }
13634
13635 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13636 if (isym == NULL)
13637 return FALSE;
13638
13639 /* If all references to an STT_GNU_IFUNC PLT are calls,
13640 then all non-call references, including this GOT entry,
13641 resolve directly to the run-time target. */
13642 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13643 && (local_iplt == NULL
13644 || local_iplt->arm.noncall_refcount == 0))
13645 elf32_arm_allocate_irelocs (info, srel, 1);
13646 else if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13647 || *local_tls_type & GOT_TLS_GD)
13648 elf32_arm_allocate_dynrelocs (info, srel, 1);
13649
13650 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13651 {
13652 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
13653 htab->tls_trampoline = -1;
13654 }
13655 }
13656 else
13657 *local_got = (bfd_vma) -1;
13658 }
13659 }
13660
13661 if (htab->tls_ldm_got.refcount > 0)
13662 {
13663 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13664 for R_ARM_TLS_LDM32 relocations. */
13665 htab->tls_ldm_got.offset = htab->root.sgot->size;
13666 htab->root.sgot->size += 8;
13667 if (info->shared)
13668 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13669 }
13670 else
13671 htab->tls_ldm_got.offset = -1;
13672
13673 /* Allocate global sym .plt and .got entries, and space for global
13674 sym dynamic relocs. */
13675 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
13676
13677 /* Here we rummage through the found bfds to collect glue information. */
13678 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
13679 {
13680 if (! is_arm_elf (ibfd))
13681 continue;
13682
13683 /* Initialise mapping tables for code/data. */
13684 bfd_elf32_arm_init_maps (ibfd);
13685
13686 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13687 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
13688 /* xgettext:c-format */
13689 _bfd_error_handler (_("Errors encountered processing file %s"),
13690 ibfd->filename);
13691 }
13692
13693 /* Allocate space for the glue sections now that we've sized them. */
13694 bfd_elf32_arm_allocate_interworking_sections (info);
13695
13696 /* For every jump slot reserved in the sgotplt, reloc_count is
13697 incremented. However, when we reserve space for TLS descriptors,
13698 it's not incremented, so in order to compute the space reserved
13699 for them, it suffices to multiply the reloc count by the jump
13700 slot size. */
13701 if (htab->root.srelplt)
13702 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13703
13704 if (htab->tls_trampoline)
13705 {
13706 if (htab->root.splt->size == 0)
13707 htab->root.splt->size += htab->plt_header_size;
13708
13709 htab->tls_trampoline = htab->root.splt->size;
13710 htab->root.splt->size += htab->plt_entry_size;
13711
13712 /* If we're not using lazy TLS relocations, don't generate the
13713 PLT and GOT entries they require. */
13714 if (!(info->flags & DF_BIND_NOW))
13715 {
13716 htab->dt_tlsdesc_got = htab->root.sgot->size;
13717 htab->root.sgot->size += 4;
13718
13719 htab->dt_tlsdesc_plt = htab->root.splt->size;
13720 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13721 }
13722 }
13723
13724 /* The check_relocs and adjust_dynamic_symbol entry points have
13725 determined the sizes of the various dynamic sections. Allocate
13726 memory for them. */
13727 plt = FALSE;
13728 relocs = FALSE;
13729 for (s = dynobj->sections; s != NULL; s = s->next)
13730 {
13731 const char * name;
13732
13733 if ((s->flags & SEC_LINKER_CREATED) == 0)
13734 continue;
13735
13736 /* It's OK to base decisions on the section name, because none
13737 of the dynobj section names depend upon the input files. */
13738 name = bfd_get_section_name (dynobj, s);
13739
13740 if (s == htab->root.splt)
13741 {
13742 /* Remember whether there is a PLT. */
13743 plt = s->size != 0;
13744 }
13745 else if (CONST_STRNEQ (name, ".rel"))
13746 {
13747 if (s->size != 0)
13748 {
13749 /* Remember whether there are any reloc sections other
13750 than .rel(a).plt and .rela.plt.unloaded. */
13751 if (s != htab->root.srelplt && s != htab->srelplt2)
13752 relocs = TRUE;
13753
13754 /* We use the reloc_count field as a counter if we need
13755 to copy relocs into the output file. */
13756 s->reloc_count = 0;
13757 }
13758 }
13759 else if (s != htab->root.sgot
13760 && s != htab->root.sgotplt
13761 && s != htab->root.iplt
13762 && s != htab->root.igotplt
13763 && s != htab->sdynbss)
13764 {
13765 /* It's not one of our sections, so don't allocate space. */
13766 continue;
13767 }
13768
13769 if (s->size == 0)
13770 {
13771 /* If we don't need this section, strip it from the
13772 output file. This is mostly to handle .rel(a).bss and
13773 .rel(a).plt. We must create both sections in
13774 create_dynamic_sections, because they must be created
13775 before the linker maps input sections to output
13776 sections. The linker does that before
13777 adjust_dynamic_symbol is called, and it is that
13778 function which decides whether anything needs to go
13779 into these sections. */
13780 s->flags |= SEC_EXCLUDE;
13781 continue;
13782 }
13783
13784 if ((s->flags & SEC_HAS_CONTENTS) == 0)
13785 continue;
13786
13787 /* Allocate memory for the section contents. */
13788 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
13789 if (s->contents == NULL)
13790 return FALSE;
13791 }
13792
13793 if (elf_hash_table (info)->dynamic_sections_created)
13794 {
13795 /* Add some entries to the .dynamic section. We fill in the
13796 values later, in elf32_arm_finish_dynamic_sections, but we
13797 must add the entries now so that we get the correct size for
13798 the .dynamic section. The DT_DEBUG entry is filled in by the
13799 dynamic linker and used by the debugger. */
13800 #define add_dynamic_entry(TAG, VAL) \
13801 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
13802
13803 if (info->executable)
13804 {
13805 if (!add_dynamic_entry (DT_DEBUG, 0))
13806 return FALSE;
13807 }
13808
13809 if (plt)
13810 {
13811 if ( !add_dynamic_entry (DT_PLTGOT, 0)
13812 || !add_dynamic_entry (DT_PLTRELSZ, 0)
13813 || !add_dynamic_entry (DT_PLTREL,
13814 htab->use_rel ? DT_REL : DT_RELA)
13815 || !add_dynamic_entry (DT_JMPREL, 0))
13816 return FALSE;
13817
13818 if (htab->dt_tlsdesc_plt &&
13819 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
13820 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
13821 return FALSE;
13822 }
13823
13824 if (relocs)
13825 {
13826 if (htab->use_rel)
13827 {
13828 if (!add_dynamic_entry (DT_REL, 0)
13829 || !add_dynamic_entry (DT_RELSZ, 0)
13830 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
13831 return FALSE;
13832 }
13833 else
13834 {
13835 if (!add_dynamic_entry (DT_RELA, 0)
13836 || !add_dynamic_entry (DT_RELASZ, 0)
13837 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
13838 return FALSE;
13839 }
13840 }
13841
13842 /* If any dynamic relocs apply to a read-only section,
13843 then we need a DT_TEXTREL entry. */
13844 if ((info->flags & DF_TEXTREL) == 0)
13845 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
13846 info);
13847
13848 if ((info->flags & DF_TEXTREL) != 0)
13849 {
13850 if (!add_dynamic_entry (DT_TEXTREL, 0))
13851 return FALSE;
13852 }
13853 if (htab->vxworks_p
13854 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
13855 return FALSE;
13856 }
13857 #undef add_dynamic_entry
13858
13859 return TRUE;
13860 }
13861
13862 /* Size sections even though they're not dynamic. We use it to setup
13863 _TLS_MODULE_BASE_, if needed. */
13864
13865 static bfd_boolean
13866 elf32_arm_always_size_sections (bfd *output_bfd,
13867 struct bfd_link_info *info)
13868 {
13869 asection *tls_sec;
13870
13871 if (info->relocatable)
13872 return TRUE;
13873
13874 tls_sec = elf_hash_table (info)->tls_sec;
13875
13876 if (tls_sec)
13877 {
13878 struct elf_link_hash_entry *tlsbase;
13879
13880 tlsbase = elf_link_hash_lookup
13881 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
13882
13883 if (tlsbase)
13884 {
13885 struct bfd_link_hash_entry *bh = NULL;
13886 const struct elf_backend_data *bed
13887 = get_elf_backend_data (output_bfd);
13888
13889 if (!(_bfd_generic_link_add_one_symbol
13890 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
13891 tls_sec, 0, NULL, FALSE,
13892 bed->collect, &bh)))
13893 return FALSE;
13894
13895 tlsbase->type = STT_TLS;
13896 tlsbase = (struct elf_link_hash_entry *)bh;
13897 tlsbase->def_regular = 1;
13898 tlsbase->other = STV_HIDDEN;
13899 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
13900 }
13901 }
13902 return TRUE;
13903 }
13904
13905 /* Finish up dynamic symbol handling. We set the contents of various
13906 dynamic sections here. */
13907
13908 static bfd_boolean
13909 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
13910 struct bfd_link_info * info,
13911 struct elf_link_hash_entry * h,
13912 Elf_Internal_Sym * sym)
13913 {
13914 struct elf32_arm_link_hash_table *htab;
13915 struct elf32_arm_link_hash_entry *eh;
13916
13917 htab = elf32_arm_hash_table (info);
13918 if (htab == NULL)
13919 return FALSE;
13920
13921 eh = (struct elf32_arm_link_hash_entry *) h;
13922
13923 if (h->plt.offset != (bfd_vma) -1)
13924 {
13925 if (!eh->is_iplt)
13926 {
13927 BFD_ASSERT (h->dynindx != -1);
13928 elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
13929 h->dynindx, 0);
13930 }
13931
13932 if (!h->def_regular)
13933 {
13934 /* Mark the symbol as undefined, rather than as defined in
13935 the .plt section. Leave the value alone. */
13936 sym->st_shndx = SHN_UNDEF;
13937 /* If the symbol is weak, we do need to clear the value.
13938 Otherwise, the PLT entry would provide a definition for
13939 the symbol even if the symbol wasn't defined anywhere,
13940 and so the symbol would never be NULL. */
13941 if (!h->ref_regular_nonweak)
13942 sym->st_value = 0;
13943 }
13944 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
13945 {
13946 /* At least one non-call relocation references this .iplt entry,
13947 so the .iplt entry is the function's canonical address. */
13948 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
13949 sym->st_target_internal = ST_BRANCH_TO_ARM;
13950 sym->st_shndx = (_bfd_elf_section_from_bfd_section
13951 (output_bfd, htab->root.iplt->output_section));
13952 sym->st_value = (h->plt.offset
13953 + htab->root.iplt->output_section->vma
13954 + htab->root.iplt->output_offset);
13955 }
13956 }
13957
13958 if (h->needs_copy)
13959 {
13960 asection * s;
13961 Elf_Internal_Rela rel;
13962
13963 /* This symbol needs a copy reloc. Set it up. */
13964 BFD_ASSERT (h->dynindx != -1
13965 && (h->root.type == bfd_link_hash_defined
13966 || h->root.type == bfd_link_hash_defweak));
13967
13968 s = htab->srelbss;
13969 BFD_ASSERT (s != NULL);
13970
13971 rel.r_addend = 0;
13972 rel.r_offset = (h->root.u.def.value
13973 + h->root.u.def.section->output_section->vma
13974 + h->root.u.def.section->output_offset);
13975 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
13976 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
13977 }
13978
13979 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
13980 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
13981 to the ".got" section. */
13982 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
13983 || (!htab->vxworks_p && h == htab->root.hgot))
13984 sym->st_shndx = SHN_ABS;
13985
13986 return TRUE;
13987 }
13988
13989 static void
13990 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
13991 void *contents,
13992 const unsigned long *template, unsigned count)
13993 {
13994 unsigned ix;
13995
13996 for (ix = 0; ix != count; ix++)
13997 {
13998 unsigned long insn = template[ix];
13999
14000 /* Emit mov pc,rx if bx is not permitted. */
14001 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
14002 insn = (insn & 0xf000000f) | 0x01a0f000;
14003 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
14004 }
14005 }
14006
14007 /* Finish up the dynamic sections. */
14008
14009 static bfd_boolean
14010 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
14011 {
14012 bfd * dynobj;
14013 asection * sgot;
14014 asection * sdyn;
14015 struct elf32_arm_link_hash_table *htab;
14016
14017 htab = elf32_arm_hash_table (info);
14018 if (htab == NULL)
14019 return FALSE;
14020
14021 dynobj = elf_hash_table (info)->dynobj;
14022
14023 sgot = htab->root.sgotplt;
14024 /* A broken linker script might have discarded the dynamic sections.
14025 Catch this here so that we do not seg-fault later on. */
14026 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
14027 return FALSE;
14028 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
14029
14030 if (elf_hash_table (info)->dynamic_sections_created)
14031 {
14032 asection *splt;
14033 Elf32_External_Dyn *dyncon, *dynconend;
14034
14035 splt = htab->root.splt;
14036 BFD_ASSERT (splt != NULL && sdyn != NULL);
14037 BFD_ASSERT (htab->symbian_p || sgot != NULL);
14038
14039 dyncon = (Elf32_External_Dyn *) sdyn->contents;
14040 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
14041
14042 for (; dyncon < dynconend; dyncon++)
14043 {
14044 Elf_Internal_Dyn dyn;
14045 const char * name;
14046 asection * s;
14047
14048 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
14049
14050 switch (dyn.d_tag)
14051 {
14052 unsigned int type;
14053
14054 default:
14055 if (htab->vxworks_p
14056 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
14057 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14058 break;
14059
14060 case DT_HASH:
14061 name = ".hash";
14062 goto get_vma_if_bpabi;
14063 case DT_STRTAB:
14064 name = ".dynstr";
14065 goto get_vma_if_bpabi;
14066 case DT_SYMTAB:
14067 name = ".dynsym";
14068 goto get_vma_if_bpabi;
14069 case DT_VERSYM:
14070 name = ".gnu.version";
14071 goto get_vma_if_bpabi;
14072 case DT_VERDEF:
14073 name = ".gnu.version_d";
14074 goto get_vma_if_bpabi;
14075 case DT_VERNEED:
14076 name = ".gnu.version_r";
14077 goto get_vma_if_bpabi;
14078
14079 case DT_PLTGOT:
14080 name = ".got";
14081 goto get_vma;
14082 case DT_JMPREL:
14083 name = RELOC_SECTION (htab, ".plt");
14084 get_vma:
14085 s = bfd_get_section_by_name (output_bfd, name);
14086 if (s == NULL)
14087 {
14088 /* PR ld/14397: Issue an error message if a required section is missing. */
14089 (*_bfd_error_handler)
14090 (_("error: required section '%s' not found in the linker script"), name);
14091 bfd_set_error (bfd_error_invalid_operation);
14092 return FALSE;
14093 }
14094 if (!htab->symbian_p)
14095 dyn.d_un.d_ptr = s->vma;
14096 else
14097 /* In the BPABI, tags in the PT_DYNAMIC section point
14098 at the file offset, not the memory address, for the
14099 convenience of the post linker. */
14100 dyn.d_un.d_ptr = s->filepos;
14101 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14102 break;
14103
14104 get_vma_if_bpabi:
14105 if (htab->symbian_p)
14106 goto get_vma;
14107 break;
14108
14109 case DT_PLTRELSZ:
14110 s = htab->root.srelplt;
14111 BFD_ASSERT (s != NULL);
14112 dyn.d_un.d_val = s->size;
14113 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14114 break;
14115
14116 case DT_RELSZ:
14117 case DT_RELASZ:
14118 if (!htab->symbian_p)
14119 {
14120 /* My reading of the SVR4 ABI indicates that the
14121 procedure linkage table relocs (DT_JMPREL) should be
14122 included in the overall relocs (DT_REL). This is
14123 what Solaris does. However, UnixWare can not handle
14124 that case. Therefore, we override the DT_RELSZ entry
14125 here to make it not include the JMPREL relocs. Since
14126 the linker script arranges for .rel(a).plt to follow all
14127 other relocation sections, we don't have to worry
14128 about changing the DT_REL entry. */
14129 s = htab->root.srelplt;
14130 if (s != NULL)
14131 dyn.d_un.d_val -= s->size;
14132 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14133 break;
14134 }
14135 /* Fall through. */
14136
14137 case DT_REL:
14138 case DT_RELA:
14139 /* In the BPABI, the DT_REL tag must point at the file
14140 offset, not the VMA, of the first relocation
14141 section. So, we use code similar to that in
14142 elflink.c, but do not check for SHF_ALLOC on the
14143 relcoation section, since relocations sections are
14144 never allocated under the BPABI. The comments above
14145 about Unixware notwithstanding, we include all of the
14146 relocations here. */
14147 if (htab->symbian_p)
14148 {
14149 unsigned int i;
14150 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
14151 ? SHT_REL : SHT_RELA);
14152 dyn.d_un.d_val = 0;
14153 for (i = 1; i < elf_numsections (output_bfd); i++)
14154 {
14155 Elf_Internal_Shdr *hdr
14156 = elf_elfsections (output_bfd)[i];
14157 if (hdr->sh_type == type)
14158 {
14159 if (dyn.d_tag == DT_RELSZ
14160 || dyn.d_tag == DT_RELASZ)
14161 dyn.d_un.d_val += hdr->sh_size;
14162 else if ((ufile_ptr) hdr->sh_offset
14163 <= dyn.d_un.d_val - 1)
14164 dyn.d_un.d_val = hdr->sh_offset;
14165 }
14166 }
14167 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14168 }
14169 break;
14170
14171 case DT_TLSDESC_PLT:
14172 s = htab->root.splt;
14173 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14174 + htab->dt_tlsdesc_plt);
14175 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14176 break;
14177
14178 case DT_TLSDESC_GOT:
14179 s = htab->root.sgot;
14180 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14181 + htab->dt_tlsdesc_got);
14182 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14183 break;
14184
14185 /* Set the bottom bit of DT_INIT/FINI if the
14186 corresponding function is Thumb. */
14187 case DT_INIT:
14188 name = info->init_function;
14189 goto get_sym;
14190 case DT_FINI:
14191 name = info->fini_function;
14192 get_sym:
14193 /* If it wasn't set by elf_bfd_final_link
14194 then there is nothing to adjust. */
14195 if (dyn.d_un.d_val != 0)
14196 {
14197 struct elf_link_hash_entry * eh;
14198
14199 eh = elf_link_hash_lookup (elf_hash_table (info), name,
14200 FALSE, FALSE, TRUE);
14201 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
14202 {
14203 dyn.d_un.d_val |= 1;
14204 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14205 }
14206 }
14207 break;
14208 }
14209 }
14210
14211 /* Fill in the first entry in the procedure linkage table. */
14212 if (splt->size > 0 && htab->plt_header_size)
14213 {
14214 const bfd_vma *plt0_entry;
14215 bfd_vma got_address, plt_address, got_displacement;
14216
14217 /* Calculate the addresses of the GOT and PLT. */
14218 got_address = sgot->output_section->vma + sgot->output_offset;
14219 plt_address = splt->output_section->vma + splt->output_offset;
14220
14221 if (htab->vxworks_p)
14222 {
14223 /* The VxWorks GOT is relocated by the dynamic linker.
14224 Therefore, we must emit relocations rather than simply
14225 computing the values now. */
14226 Elf_Internal_Rela rel;
14227
14228 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
14229 put_arm_insn (htab, output_bfd, plt0_entry[0],
14230 splt->contents + 0);
14231 put_arm_insn (htab, output_bfd, plt0_entry[1],
14232 splt->contents + 4);
14233 put_arm_insn (htab, output_bfd, plt0_entry[2],
14234 splt->contents + 8);
14235 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14236
14237 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
14238 rel.r_offset = plt_address + 12;
14239 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14240 rel.r_addend = 0;
14241 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14242 htab->srelplt2->contents);
14243 }
14244 else if (htab->nacl_p)
14245 {
14246 unsigned int i;
14247
14248 got_displacement = got_address + 8 - (plt_address + 16);
14249
14250 put_arm_insn (htab, output_bfd,
14251 elf32_arm_nacl_plt0_entry[0]
14252 | arm_movw_immediate (got_displacement),
14253 splt->contents + 0);
14254 put_arm_insn (htab, output_bfd,
14255 elf32_arm_nacl_plt0_entry[1]
14256 | arm_movt_immediate (got_displacement),
14257 splt->contents + 4);
14258 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
14259 put_arm_insn (htab, output_bfd,
14260 elf32_arm_nacl_plt0_entry[i],
14261 splt->contents + (i * 4));
14262 }
14263 else
14264 {
14265 got_displacement = got_address - (plt_address + 16);
14266
14267 plt0_entry = elf32_arm_plt0_entry;
14268 put_arm_insn (htab, output_bfd, plt0_entry[0],
14269 splt->contents + 0);
14270 put_arm_insn (htab, output_bfd, plt0_entry[1],
14271 splt->contents + 4);
14272 put_arm_insn (htab, output_bfd, plt0_entry[2],
14273 splt->contents + 8);
14274 put_arm_insn (htab, output_bfd, plt0_entry[3],
14275 splt->contents + 12);
14276
14277 #ifdef FOUR_WORD_PLT
14278 /* The displacement value goes in the otherwise-unused
14279 last word of the second entry. */
14280 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
14281 #else
14282 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
14283 #endif
14284 }
14285 }
14286
14287 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14288 really seem like the right value. */
14289 if (splt->output_section->owner == output_bfd)
14290 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
14291
14292 if (htab->dt_tlsdesc_plt)
14293 {
14294 bfd_vma got_address
14295 = sgot->output_section->vma + sgot->output_offset;
14296 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14297 + htab->root.sgot->output_offset);
14298 bfd_vma plt_address
14299 = splt->output_section->vma + splt->output_offset;
14300
14301 arm_put_trampoline (htab, output_bfd,
14302 splt->contents + htab->dt_tlsdesc_plt,
14303 dl_tlsdesc_lazy_trampoline, 6);
14304
14305 bfd_put_32 (output_bfd,
14306 gotplt_address + htab->dt_tlsdesc_got
14307 - (plt_address + htab->dt_tlsdesc_plt)
14308 - dl_tlsdesc_lazy_trampoline[6],
14309 splt->contents + htab->dt_tlsdesc_plt + 24);
14310 bfd_put_32 (output_bfd,
14311 got_address - (plt_address + htab->dt_tlsdesc_plt)
14312 - dl_tlsdesc_lazy_trampoline[7],
14313 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14314 }
14315
14316 if (htab->tls_trampoline)
14317 {
14318 arm_put_trampoline (htab, output_bfd,
14319 splt->contents + htab->tls_trampoline,
14320 tls_trampoline, 3);
14321 #ifdef FOUR_WORD_PLT
14322 bfd_put_32 (output_bfd, 0x00000000,
14323 splt->contents + htab->tls_trampoline + 12);
14324 #endif
14325 }
14326
14327 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
14328 {
14329 /* Correct the .rel(a).plt.unloaded relocations. They will have
14330 incorrect symbol indexes. */
14331 int num_plts;
14332 unsigned char *p;
14333
14334 num_plts = ((htab->root.splt->size - htab->plt_header_size)
14335 / htab->plt_entry_size);
14336 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14337
14338 for (; num_plts; num_plts--)
14339 {
14340 Elf_Internal_Rela rel;
14341
14342 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14343 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14344 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14345 p += RELOC_SIZE (htab);
14346
14347 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14348 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14349 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14350 p += RELOC_SIZE (htab);
14351 }
14352 }
14353 }
14354
14355 /* Fill in the first three entries in the global offset table. */
14356 if (sgot)
14357 {
14358 if (sgot->size > 0)
14359 {
14360 if (sdyn == NULL)
14361 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14362 else
14363 bfd_put_32 (output_bfd,
14364 sdyn->output_section->vma + sdyn->output_offset,
14365 sgot->contents);
14366 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14367 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14368 }
14369
14370 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14371 }
14372
14373 return TRUE;
14374 }
14375
14376 static void
14377 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
14378 {
14379 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
14380 struct elf32_arm_link_hash_table *globals;
14381
14382 i_ehdrp = elf_elfheader (abfd);
14383
14384 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14385 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14386 else
14387 i_ehdrp->e_ident[EI_OSABI] = 0;
14388 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
14389
14390 if (link_info)
14391 {
14392 globals = elf32_arm_hash_table (link_info);
14393 if (globals != NULL && globals->byteswap_code)
14394 i_ehdrp->e_flags |= EF_ARM_BE8;
14395 }
14396 }
14397
14398 static enum elf_reloc_type_class
14399 elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
14400 {
14401 switch ((int) ELF32_R_TYPE (rela->r_info))
14402 {
14403 case R_ARM_RELATIVE:
14404 return reloc_class_relative;
14405 case R_ARM_JUMP_SLOT:
14406 return reloc_class_plt;
14407 case R_ARM_COPY:
14408 return reloc_class_copy;
14409 default:
14410 return reloc_class_normal;
14411 }
14412 }
14413
14414 static void
14415 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
14416 {
14417 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
14418 }
14419
14420 /* Return TRUE if this is an unwinding table entry. */
14421
14422 static bfd_boolean
14423 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14424 {
14425 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14426 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
14427 }
14428
14429
14430 /* Set the type and flags for an ARM section. We do this by
14431 the section name, which is a hack, but ought to work. */
14432
14433 static bfd_boolean
14434 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14435 {
14436 const char * name;
14437
14438 name = bfd_get_section_name (abfd, sec);
14439
14440 if (is_arm_elf_unwind_section_name (abfd, name))
14441 {
14442 hdr->sh_type = SHT_ARM_EXIDX;
14443 hdr->sh_flags |= SHF_LINK_ORDER;
14444 }
14445 return TRUE;
14446 }
14447
14448 /* Handle an ARM specific section when reading an object file. This is
14449 called when bfd_section_from_shdr finds a section with an unknown
14450 type. */
14451
14452 static bfd_boolean
14453 elf32_arm_section_from_shdr (bfd *abfd,
14454 Elf_Internal_Shdr * hdr,
14455 const char *name,
14456 int shindex)
14457 {
14458 /* There ought to be a place to keep ELF backend specific flags, but
14459 at the moment there isn't one. We just keep track of the
14460 sections by their name, instead. Fortunately, the ABI gives
14461 names for all the ARM specific sections, so we will probably get
14462 away with this. */
14463 switch (hdr->sh_type)
14464 {
14465 case SHT_ARM_EXIDX:
14466 case SHT_ARM_PREEMPTMAP:
14467 case SHT_ARM_ATTRIBUTES:
14468 break;
14469
14470 default:
14471 return FALSE;
14472 }
14473
14474 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
14475 return FALSE;
14476
14477 return TRUE;
14478 }
14479
14480 static _arm_elf_section_data *
14481 get_arm_elf_section_data (asection * sec)
14482 {
14483 if (sec && sec->owner && is_arm_elf (sec->owner))
14484 return elf32_arm_section_data (sec);
14485 else
14486 return NULL;
14487 }
14488
14489 typedef struct
14490 {
14491 void *flaginfo;
14492 struct bfd_link_info *info;
14493 asection *sec;
14494 int sec_shndx;
14495 int (*func) (void *, const char *, Elf_Internal_Sym *,
14496 asection *, struct elf_link_hash_entry *);
14497 } output_arch_syminfo;
14498
14499 enum map_symbol_type
14500 {
14501 ARM_MAP_ARM,
14502 ARM_MAP_THUMB,
14503 ARM_MAP_DATA
14504 };
14505
14506
14507 /* Output a single mapping symbol. */
14508
14509 static bfd_boolean
14510 elf32_arm_output_map_sym (output_arch_syminfo *osi,
14511 enum map_symbol_type type,
14512 bfd_vma offset)
14513 {
14514 static const char *names[3] = {"$a", "$t", "$d"};
14515 Elf_Internal_Sym sym;
14516
14517 sym.st_value = osi->sec->output_section->vma
14518 + osi->sec->output_offset
14519 + offset;
14520 sym.st_size = 0;
14521 sym.st_other = 0;
14522 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
14523 sym.st_shndx = osi->sec_shndx;
14524 sym.st_target_internal = 0;
14525 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
14526 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
14527 }
14528
14529 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14530 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
14531
14532 static bfd_boolean
14533 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14534 bfd_boolean is_iplt_entry_p,
14535 union gotplt_union *root_plt,
14536 struct arm_plt_info *arm_plt)
14537 {
14538 struct elf32_arm_link_hash_table *htab;
14539 bfd_vma addr, plt_header_size;
14540
14541 if (root_plt->offset == (bfd_vma) -1)
14542 return TRUE;
14543
14544 htab = elf32_arm_hash_table (osi->info);
14545 if (htab == NULL)
14546 return FALSE;
14547
14548 if (is_iplt_entry_p)
14549 {
14550 osi->sec = htab->root.iplt;
14551 plt_header_size = 0;
14552 }
14553 else
14554 {
14555 osi->sec = htab->root.splt;
14556 plt_header_size = htab->plt_header_size;
14557 }
14558 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14559 (osi->info->output_bfd, osi->sec->output_section));
14560
14561 addr = root_plt->offset & -2;
14562 if (htab->symbian_p)
14563 {
14564 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14565 return FALSE;
14566 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
14567 return FALSE;
14568 }
14569 else if (htab->vxworks_p)
14570 {
14571 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14572 return FALSE;
14573 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
14574 return FALSE;
14575 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
14576 return FALSE;
14577 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
14578 return FALSE;
14579 }
14580 else if (htab->nacl_p)
14581 {
14582 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14583 return FALSE;
14584 }
14585 else
14586 {
14587 bfd_boolean thumb_stub_p;
14588
14589 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14590 if (thumb_stub_p)
14591 {
14592 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
14593 return FALSE;
14594 }
14595 #ifdef FOUR_WORD_PLT
14596 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14597 return FALSE;
14598 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
14599 return FALSE;
14600 #else
14601 /* A three-word PLT with no Thumb thunk contains only Arm code,
14602 so only need to output a mapping symbol for the first PLT entry and
14603 entries with thumb thunks. */
14604 if (thumb_stub_p || addr == plt_header_size)
14605 {
14606 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14607 return FALSE;
14608 }
14609 #endif
14610 }
14611
14612 return TRUE;
14613 }
14614
14615 /* Output mapping symbols for PLT entries associated with H. */
14616
14617 static bfd_boolean
14618 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14619 {
14620 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14621 struct elf32_arm_link_hash_entry *eh;
14622
14623 if (h->root.type == bfd_link_hash_indirect)
14624 return TRUE;
14625
14626 if (h->root.type == bfd_link_hash_warning)
14627 /* When warning symbols are created, they **replace** the "real"
14628 entry in the hash table, thus we never get to see the real
14629 symbol in a hash traversal. So look at it now. */
14630 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14631
14632 eh = (struct elf32_arm_link_hash_entry *) h;
14633 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14634 &h->plt, &eh->plt);
14635 }
14636
14637 /* Output a single local symbol for a generated stub. */
14638
14639 static bfd_boolean
14640 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14641 bfd_vma offset, bfd_vma size)
14642 {
14643 Elf_Internal_Sym sym;
14644
14645 sym.st_value = osi->sec->output_section->vma
14646 + osi->sec->output_offset
14647 + offset;
14648 sym.st_size = size;
14649 sym.st_other = 0;
14650 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14651 sym.st_shndx = osi->sec_shndx;
14652 sym.st_target_internal = 0;
14653 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
14654 }
14655
14656 static bfd_boolean
14657 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14658 void * in_arg)
14659 {
14660 struct elf32_arm_stub_hash_entry *stub_entry;
14661 asection *stub_sec;
14662 bfd_vma addr;
14663 char *stub_name;
14664 output_arch_syminfo *osi;
14665 const insn_sequence *template_sequence;
14666 enum stub_insn_type prev_type;
14667 int size;
14668 int i;
14669 enum map_symbol_type sym_type;
14670
14671 /* Massage our args to the form they really have. */
14672 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
14673 osi = (output_arch_syminfo *) in_arg;
14674
14675 stub_sec = stub_entry->stub_sec;
14676
14677 /* Ensure this stub is attached to the current section being
14678 processed. */
14679 if (stub_sec != osi->sec)
14680 return TRUE;
14681
14682 addr = (bfd_vma) stub_entry->stub_offset;
14683 stub_name = stub_entry->output_name;
14684
14685 template_sequence = stub_entry->stub_template;
14686 switch (template_sequence[0].type)
14687 {
14688 case ARM_TYPE:
14689 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
14690 return FALSE;
14691 break;
14692 case THUMB16_TYPE:
14693 case THUMB32_TYPE:
14694 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14695 stub_entry->stub_size))
14696 return FALSE;
14697 break;
14698 default:
14699 BFD_FAIL ();
14700 return 0;
14701 }
14702
14703 prev_type = DATA_TYPE;
14704 size = 0;
14705 for (i = 0; i < stub_entry->stub_template_size; i++)
14706 {
14707 switch (template_sequence[i].type)
14708 {
14709 case ARM_TYPE:
14710 sym_type = ARM_MAP_ARM;
14711 break;
14712
14713 case THUMB16_TYPE:
14714 case THUMB32_TYPE:
14715 sym_type = ARM_MAP_THUMB;
14716 break;
14717
14718 case DATA_TYPE:
14719 sym_type = ARM_MAP_DATA;
14720 break;
14721
14722 default:
14723 BFD_FAIL ();
14724 return FALSE;
14725 }
14726
14727 if (template_sequence[i].type != prev_type)
14728 {
14729 prev_type = template_sequence[i].type;
14730 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
14731 return FALSE;
14732 }
14733
14734 switch (template_sequence[i].type)
14735 {
14736 case ARM_TYPE:
14737 case THUMB32_TYPE:
14738 size += 4;
14739 break;
14740
14741 case THUMB16_TYPE:
14742 size += 2;
14743 break;
14744
14745 case DATA_TYPE:
14746 size += 4;
14747 break;
14748
14749 default:
14750 BFD_FAIL ();
14751 return FALSE;
14752 }
14753 }
14754
14755 return TRUE;
14756 }
14757
14758 /* Output mapping symbols for linker generated sections,
14759 and for those data-only sections that do not have a
14760 $d. */
14761
14762 static bfd_boolean
14763 elf32_arm_output_arch_local_syms (bfd *output_bfd,
14764 struct bfd_link_info *info,
14765 void *flaginfo,
14766 int (*func) (void *, const char *,
14767 Elf_Internal_Sym *,
14768 asection *,
14769 struct elf_link_hash_entry *))
14770 {
14771 output_arch_syminfo osi;
14772 struct elf32_arm_link_hash_table *htab;
14773 bfd_vma offset;
14774 bfd_size_type size;
14775 bfd *input_bfd;
14776
14777 htab = elf32_arm_hash_table (info);
14778 if (htab == NULL)
14779 return FALSE;
14780
14781 check_use_blx (htab);
14782
14783 osi.flaginfo = flaginfo;
14784 osi.info = info;
14785 osi.func = func;
14786
14787 /* Add a $d mapping symbol to data-only sections that
14788 don't have any mapping symbol. This may result in (harmless) redundant
14789 mapping symbols. */
14790 for (input_bfd = info->input_bfds;
14791 input_bfd != NULL;
14792 input_bfd = input_bfd->link_next)
14793 {
14794 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
14795 for (osi.sec = input_bfd->sections;
14796 osi.sec != NULL;
14797 osi.sec = osi.sec->next)
14798 {
14799 if (osi.sec->output_section != NULL
14800 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
14801 != 0)
14802 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
14803 == SEC_HAS_CONTENTS
14804 && get_arm_elf_section_data (osi.sec) != NULL
14805 && get_arm_elf_section_data (osi.sec)->mapcount == 0
14806 && osi.sec->size > 0
14807 && (osi.sec->flags & SEC_EXCLUDE) == 0)
14808 {
14809 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14810 (output_bfd, osi.sec->output_section);
14811 if (osi.sec_shndx != (int)SHN_BAD)
14812 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
14813 }
14814 }
14815 }
14816
14817 /* ARM->Thumb glue. */
14818 if (htab->arm_glue_size > 0)
14819 {
14820 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14821 ARM2THUMB_GLUE_SECTION_NAME);
14822
14823 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14824 (output_bfd, osi.sec->output_section);
14825 if (info->shared || htab->root.is_relocatable_executable
14826 || htab->pic_veneer)
14827 size = ARM2THUMB_PIC_GLUE_SIZE;
14828 else if (htab->use_blx)
14829 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
14830 else
14831 size = ARM2THUMB_STATIC_GLUE_SIZE;
14832
14833 for (offset = 0; offset < htab->arm_glue_size; offset += size)
14834 {
14835 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
14836 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
14837 }
14838 }
14839
14840 /* Thumb->ARM glue. */
14841 if (htab->thumb_glue_size > 0)
14842 {
14843 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14844 THUMB2ARM_GLUE_SECTION_NAME);
14845
14846 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14847 (output_bfd, osi.sec->output_section);
14848 size = THUMB2ARM_GLUE_SIZE;
14849
14850 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
14851 {
14852 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
14853 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
14854 }
14855 }
14856
14857 /* ARMv4 BX veneers. */
14858 if (htab->bx_glue_size > 0)
14859 {
14860 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14861 ARM_BX_GLUE_SECTION_NAME);
14862
14863 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14864 (output_bfd, osi.sec->output_section);
14865
14866 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
14867 }
14868
14869 /* Long calls stubs. */
14870 if (htab->stub_bfd && htab->stub_bfd->sections)
14871 {
14872 asection* stub_sec;
14873
14874 for (stub_sec = htab->stub_bfd->sections;
14875 stub_sec != NULL;
14876 stub_sec = stub_sec->next)
14877 {
14878 /* Ignore non-stub sections. */
14879 if (!strstr (stub_sec->name, STUB_SUFFIX))
14880 continue;
14881
14882 osi.sec = stub_sec;
14883
14884 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14885 (output_bfd, osi.sec->output_section);
14886
14887 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
14888 }
14889 }
14890
14891 /* Finally, output mapping symbols for the PLT. */
14892 if (htab->root.splt && htab->root.splt->size > 0)
14893 {
14894 osi.sec = htab->root.splt;
14895 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
14896 (output_bfd, osi.sec->output_section));
14897
14898 /* Output mapping symbols for the plt header. SymbianOS does not have a
14899 plt header. */
14900 if (htab->vxworks_p)
14901 {
14902 /* VxWorks shared libraries have no PLT header. */
14903 if (!info->shared)
14904 {
14905 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14906 return FALSE;
14907 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
14908 return FALSE;
14909 }
14910 }
14911 else if (htab->nacl_p)
14912 {
14913 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14914 return FALSE;
14915 }
14916 else if (!htab->symbian_p)
14917 {
14918 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14919 return FALSE;
14920 #ifndef FOUR_WORD_PLT
14921 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
14922 return FALSE;
14923 #endif
14924 }
14925 }
14926 if ((htab->root.splt && htab->root.splt->size > 0)
14927 || (htab->root.iplt && htab->root.iplt->size > 0))
14928 {
14929 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
14930 for (input_bfd = info->input_bfds;
14931 input_bfd != NULL;
14932 input_bfd = input_bfd->link_next)
14933 {
14934 struct arm_local_iplt_info **local_iplt;
14935 unsigned int i, num_syms;
14936
14937 local_iplt = elf32_arm_local_iplt (input_bfd);
14938 if (local_iplt != NULL)
14939 {
14940 num_syms = elf_symtab_hdr (input_bfd).sh_info;
14941 for (i = 0; i < num_syms; i++)
14942 if (local_iplt[i] != NULL
14943 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
14944 &local_iplt[i]->root,
14945 &local_iplt[i]->arm))
14946 return FALSE;
14947 }
14948 }
14949 }
14950 if (htab->dt_tlsdesc_plt != 0)
14951 {
14952 /* Mapping symbols for the lazy tls trampoline. */
14953 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
14954 return FALSE;
14955
14956 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14957 htab->dt_tlsdesc_plt + 24))
14958 return FALSE;
14959 }
14960 if (htab->tls_trampoline != 0)
14961 {
14962 /* Mapping symbols for the tls trampoline. */
14963 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
14964 return FALSE;
14965 #ifdef FOUR_WORD_PLT
14966 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14967 htab->tls_trampoline + 12))
14968 return FALSE;
14969 #endif
14970 }
14971
14972 return TRUE;
14973 }
14974
14975 /* Allocate target specific section data. */
14976
14977 static bfd_boolean
14978 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
14979 {
14980 if (!sec->used_by_bfd)
14981 {
14982 _arm_elf_section_data *sdata;
14983 bfd_size_type amt = sizeof (*sdata);
14984
14985 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
14986 if (sdata == NULL)
14987 return FALSE;
14988 sec->used_by_bfd = sdata;
14989 }
14990
14991 return _bfd_elf_new_section_hook (abfd, sec);
14992 }
14993
14994
14995 /* Used to order a list of mapping symbols by address. */
14996
14997 static int
14998 elf32_arm_compare_mapping (const void * a, const void * b)
14999 {
15000 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
15001 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
15002
15003 if (amap->vma > bmap->vma)
15004 return 1;
15005 else if (amap->vma < bmap->vma)
15006 return -1;
15007 else if (amap->type > bmap->type)
15008 /* Ensure results do not depend on the host qsort for objects with
15009 multiple mapping symbols at the same address by sorting on type
15010 after vma. */
15011 return 1;
15012 else if (amap->type < bmap->type)
15013 return -1;
15014 else
15015 return 0;
15016 }
15017
15018 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
15019
15020 static unsigned long
15021 offset_prel31 (unsigned long addr, bfd_vma offset)
15022 {
15023 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
15024 }
15025
15026 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
15027 relocations. */
15028
15029 static void
15030 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
15031 {
15032 unsigned long first_word = bfd_get_32 (output_bfd, from);
15033 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
15034
15035 /* High bit of first word is supposed to be zero. */
15036 if ((first_word & 0x80000000ul) == 0)
15037 first_word = offset_prel31 (first_word, offset);
15038
15039 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
15040 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
15041 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
15042 second_word = offset_prel31 (second_word, offset);
15043
15044 bfd_put_32 (output_bfd, first_word, to);
15045 bfd_put_32 (output_bfd, second_word, to + 4);
15046 }
15047
15048 /* Data for make_branch_to_a8_stub(). */
15049
15050 struct a8_branch_to_stub_data
15051 {
15052 asection *writing_section;
15053 bfd_byte *contents;
15054 };
15055
15056
15057 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
15058 places for a particular section. */
15059
15060 static bfd_boolean
15061 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
15062 void *in_arg)
15063 {
15064 struct elf32_arm_stub_hash_entry *stub_entry;
15065 struct a8_branch_to_stub_data *data;
15066 bfd_byte *contents;
15067 unsigned long branch_insn;
15068 bfd_vma veneered_insn_loc, veneer_entry_loc;
15069 bfd_signed_vma branch_offset;
15070 bfd *abfd;
15071 unsigned int target;
15072
15073 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15074 data = (struct a8_branch_to_stub_data *) in_arg;
15075
15076 if (stub_entry->target_section != data->writing_section
15077 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
15078 return TRUE;
15079
15080 contents = data->contents;
15081
15082 veneered_insn_loc = stub_entry->target_section->output_section->vma
15083 + stub_entry->target_section->output_offset
15084 + stub_entry->target_value;
15085
15086 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
15087 + stub_entry->stub_sec->output_offset
15088 + stub_entry->stub_offset;
15089
15090 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
15091 veneered_insn_loc &= ~3u;
15092
15093 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
15094
15095 abfd = stub_entry->target_section->owner;
15096 target = stub_entry->target_value;
15097
15098 /* We attempt to avoid this condition by setting stubs_always_after_branch
15099 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
15100 This check is just to be on the safe side... */
15101 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
15102 {
15103 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
15104 "allocated in unsafe location"), abfd);
15105 return FALSE;
15106 }
15107
15108 switch (stub_entry->stub_type)
15109 {
15110 case arm_stub_a8_veneer_b:
15111 case arm_stub_a8_veneer_b_cond:
15112 branch_insn = 0xf0009000;
15113 goto jump24;
15114
15115 case arm_stub_a8_veneer_blx:
15116 branch_insn = 0xf000e800;
15117 goto jump24;
15118
15119 case arm_stub_a8_veneer_bl:
15120 {
15121 unsigned int i1, j1, i2, j2, s;
15122
15123 branch_insn = 0xf000d000;
15124
15125 jump24:
15126 if (branch_offset < -16777216 || branch_offset > 16777214)
15127 {
15128 /* There's not much we can do apart from complain if this
15129 happens. */
15130 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
15131 "of range (input file too large)"), abfd);
15132 return FALSE;
15133 }
15134
15135 /* i1 = not(j1 eor s), so:
15136 not i1 = j1 eor s
15137 j1 = (not i1) eor s. */
15138
15139 branch_insn |= (branch_offset >> 1) & 0x7ff;
15140 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
15141 i2 = (branch_offset >> 22) & 1;
15142 i1 = (branch_offset >> 23) & 1;
15143 s = (branch_offset >> 24) & 1;
15144 j1 = (!i1) ^ s;
15145 j2 = (!i2) ^ s;
15146 branch_insn |= j2 << 11;
15147 branch_insn |= j1 << 13;
15148 branch_insn |= s << 26;
15149 }
15150 break;
15151
15152 default:
15153 BFD_FAIL ();
15154 return FALSE;
15155 }
15156
15157 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
15158 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
15159
15160 return TRUE;
15161 }
15162
15163 /* Do code byteswapping. Return FALSE afterwards so that the section is
15164 written out as normal. */
15165
15166 static bfd_boolean
15167 elf32_arm_write_section (bfd *output_bfd,
15168 struct bfd_link_info *link_info,
15169 asection *sec,
15170 bfd_byte *contents)
15171 {
15172 unsigned int mapcount, errcount;
15173 _arm_elf_section_data *arm_data;
15174 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
15175 elf32_arm_section_map *map;
15176 elf32_vfp11_erratum_list *errnode;
15177 bfd_vma ptr;
15178 bfd_vma end;
15179 bfd_vma offset = sec->output_section->vma + sec->output_offset;
15180 bfd_byte tmp;
15181 unsigned int i;
15182
15183 if (globals == NULL)
15184 return FALSE;
15185
15186 /* If this section has not been allocated an _arm_elf_section_data
15187 structure then we cannot record anything. */
15188 arm_data = get_arm_elf_section_data (sec);
15189 if (arm_data == NULL)
15190 return FALSE;
15191
15192 mapcount = arm_data->mapcount;
15193 map = arm_data->map;
15194 errcount = arm_data->erratumcount;
15195
15196 if (errcount != 0)
15197 {
15198 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
15199
15200 for (errnode = arm_data->erratumlist; errnode != 0;
15201 errnode = errnode->next)
15202 {
15203 bfd_vma target = errnode->vma - offset;
15204
15205 switch (errnode->type)
15206 {
15207 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
15208 {
15209 bfd_vma branch_to_veneer;
15210 /* Original condition code of instruction, plus bit mask for
15211 ARM B instruction. */
15212 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
15213 | 0x0a000000;
15214
15215 /* The instruction is before the label. */
15216 target -= 4;
15217
15218 /* Above offset included in -4 below. */
15219 branch_to_veneer = errnode->u.b.veneer->vma
15220 - errnode->vma - 4;
15221
15222 if ((signed) branch_to_veneer < -(1 << 25)
15223 || (signed) branch_to_veneer >= (1 << 25))
15224 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15225 "range"), output_bfd);
15226
15227 insn |= (branch_to_veneer >> 2) & 0xffffff;
15228 contents[endianflip ^ target] = insn & 0xff;
15229 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15230 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15231 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15232 }
15233 break;
15234
15235 case VFP11_ERRATUM_ARM_VENEER:
15236 {
15237 bfd_vma branch_from_veneer;
15238 unsigned int insn;
15239
15240 /* Take size of veneer into account. */
15241 branch_from_veneer = errnode->u.v.branch->vma
15242 - errnode->vma - 12;
15243
15244 if ((signed) branch_from_veneer < -(1 << 25)
15245 || (signed) branch_from_veneer >= (1 << 25))
15246 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15247 "range"), output_bfd);
15248
15249 /* Original instruction. */
15250 insn = errnode->u.v.branch->u.b.vfp_insn;
15251 contents[endianflip ^ target] = insn & 0xff;
15252 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15253 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15254 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15255
15256 /* Branch back to insn after original insn. */
15257 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
15258 contents[endianflip ^ (target + 4)] = insn & 0xff;
15259 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
15260 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
15261 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
15262 }
15263 break;
15264
15265 default:
15266 abort ();
15267 }
15268 }
15269 }
15270
15271 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15272 {
15273 arm_unwind_table_edit *edit_node
15274 = arm_data->u.exidx.unwind_edit_list;
15275 /* Now, sec->size is the size of the section we will write. The original
15276 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
15277 markers) was sec->rawsize. (This isn't the case if we perform no
15278 edits, then rawsize will be zero and we should use size). */
15279 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
15280 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15281 unsigned int in_index, out_index;
15282 bfd_vma add_to_offsets = 0;
15283
15284 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
15285 {
15286 if (edit_node)
15287 {
15288 unsigned int edit_index = edit_node->index;
15289
15290 if (in_index < edit_index && in_index * 8 < input_size)
15291 {
15292 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15293 contents + in_index * 8, add_to_offsets);
15294 out_index++;
15295 in_index++;
15296 }
15297 else if (in_index == edit_index
15298 || (in_index * 8 >= input_size
15299 && edit_index == UINT_MAX))
15300 {
15301 switch (edit_node->type)
15302 {
15303 case DELETE_EXIDX_ENTRY:
15304 in_index++;
15305 add_to_offsets += 8;
15306 break;
15307
15308 case INSERT_EXIDX_CANTUNWIND_AT_END:
15309 {
15310 asection *text_sec = edit_node->linked_section;
15311 bfd_vma text_offset = text_sec->output_section->vma
15312 + text_sec->output_offset
15313 + text_sec->size;
15314 bfd_vma exidx_offset = offset + out_index * 8;
15315 unsigned long prel31_offset;
15316
15317 /* Note: this is meant to be equivalent to an
15318 R_ARM_PREL31 relocation. These synthetic
15319 EXIDX_CANTUNWIND markers are not relocated by the
15320 usual BFD method. */
15321 prel31_offset = (text_offset - exidx_offset)
15322 & 0x7ffffffful;
15323
15324 /* First address we can't unwind. */
15325 bfd_put_32 (output_bfd, prel31_offset,
15326 &edited_contents[out_index * 8]);
15327
15328 /* Code for EXIDX_CANTUNWIND. */
15329 bfd_put_32 (output_bfd, 0x1,
15330 &edited_contents[out_index * 8 + 4]);
15331
15332 out_index++;
15333 add_to_offsets -= 8;
15334 }
15335 break;
15336 }
15337
15338 edit_node = edit_node->next;
15339 }
15340 }
15341 else
15342 {
15343 /* No more edits, copy remaining entries verbatim. */
15344 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15345 contents + in_index * 8, add_to_offsets);
15346 out_index++;
15347 in_index++;
15348 }
15349 }
15350
15351 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15352 bfd_set_section_contents (output_bfd, sec->output_section,
15353 edited_contents,
15354 (file_ptr) sec->output_offset, sec->size);
15355
15356 return TRUE;
15357 }
15358
15359 /* Fix code to point to Cortex-A8 erratum stubs. */
15360 if (globals->fix_cortex_a8)
15361 {
15362 struct a8_branch_to_stub_data data;
15363
15364 data.writing_section = sec;
15365 data.contents = contents;
15366
15367 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15368 &data);
15369 }
15370
15371 if (mapcount == 0)
15372 return FALSE;
15373
15374 if (globals->byteswap_code)
15375 {
15376 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
15377
15378 ptr = map[0].vma;
15379 for (i = 0; i < mapcount; i++)
15380 {
15381 if (i == mapcount - 1)
15382 end = sec->size;
15383 else
15384 end = map[i + 1].vma;
15385
15386 switch (map[i].type)
15387 {
15388 case 'a':
15389 /* Byte swap code words. */
15390 while (ptr + 3 < end)
15391 {
15392 tmp = contents[ptr];
15393 contents[ptr] = contents[ptr + 3];
15394 contents[ptr + 3] = tmp;
15395 tmp = contents[ptr + 1];
15396 contents[ptr + 1] = contents[ptr + 2];
15397 contents[ptr + 2] = tmp;
15398 ptr += 4;
15399 }
15400 break;
15401
15402 case 't':
15403 /* Byte swap code halfwords. */
15404 while (ptr + 1 < end)
15405 {
15406 tmp = contents[ptr];
15407 contents[ptr] = contents[ptr + 1];
15408 contents[ptr + 1] = tmp;
15409 ptr += 2;
15410 }
15411 break;
15412
15413 case 'd':
15414 /* Leave data alone. */
15415 break;
15416 }
15417 ptr = end;
15418 }
15419 }
15420
15421 free (map);
15422 arm_data->mapcount = -1;
15423 arm_data->mapsize = 0;
15424 arm_data->map = NULL;
15425
15426 return FALSE;
15427 }
15428
15429 /* Mangle thumb function symbols as we read them in. */
15430
15431 static bfd_boolean
15432 elf32_arm_swap_symbol_in (bfd * abfd,
15433 const void *psrc,
15434 const void *pshn,
15435 Elf_Internal_Sym *dst)
15436 {
15437 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15438 return FALSE;
15439
15440 /* New EABI objects mark thumb function symbols by setting the low bit of
15441 the address. */
15442 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15443 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
15444 {
15445 if (dst->st_value & 1)
15446 {
15447 dst->st_value &= ~(bfd_vma) 1;
15448 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15449 }
15450 else
15451 dst->st_target_internal = ST_BRANCH_TO_ARM;
15452 }
15453 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15454 {
15455 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15456 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15457 }
15458 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15459 dst->st_target_internal = ST_BRANCH_LONG;
15460 else
15461 dst->st_target_internal = ST_BRANCH_UNKNOWN;
15462
15463 return TRUE;
15464 }
15465
15466
15467 /* Mangle thumb function symbols as we write them out. */
15468
15469 static void
15470 elf32_arm_swap_symbol_out (bfd *abfd,
15471 const Elf_Internal_Sym *src,
15472 void *cdst,
15473 void *shndx)
15474 {
15475 Elf_Internal_Sym newsym;
15476
15477 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15478 of the address set, as per the new EABI. We do this unconditionally
15479 because objcopy does not set the elf header flags until after
15480 it writes out the symbol table. */
15481 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
15482 {
15483 newsym = *src;
15484 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15485 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
15486 if (newsym.st_shndx != SHN_UNDEF)
15487 {
15488 /* Do this only for defined symbols. At link type, the static
15489 linker will simulate the work of dynamic linker of resolving
15490 symbols and will carry over the thumbness of found symbols to
15491 the output symbol table. It's not clear how it happens, but
15492 the thumbness of undefined symbols can well be different at
15493 runtime, and writing '1' for them will be confusing for users
15494 and possibly for dynamic linker itself.
15495 */
15496 newsym.st_value |= 1;
15497 }
15498
15499 src = &newsym;
15500 }
15501 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15502 }
15503
15504 /* Add the PT_ARM_EXIDX program header. */
15505
15506 static bfd_boolean
15507 elf32_arm_modify_segment_map (bfd *abfd,
15508 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15509 {
15510 struct elf_segment_map *m;
15511 asection *sec;
15512
15513 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15514 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15515 {
15516 /* If there is already a PT_ARM_EXIDX header, then we do not
15517 want to add another one. This situation arises when running
15518 "strip"; the input binary already has the header. */
15519 m = elf_tdata (abfd)->segment_map;
15520 while (m && m->p_type != PT_ARM_EXIDX)
15521 m = m->next;
15522 if (!m)
15523 {
15524 m = (struct elf_segment_map *)
15525 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
15526 if (m == NULL)
15527 return FALSE;
15528 m->p_type = PT_ARM_EXIDX;
15529 m->count = 1;
15530 m->sections[0] = sec;
15531
15532 m->next = elf_tdata (abfd)->segment_map;
15533 elf_tdata (abfd)->segment_map = m;
15534 }
15535 }
15536
15537 return TRUE;
15538 }
15539
15540 /* We may add a PT_ARM_EXIDX program header. */
15541
15542 static int
15543 elf32_arm_additional_program_headers (bfd *abfd,
15544 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15545 {
15546 asection *sec;
15547
15548 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15549 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15550 return 1;
15551 else
15552 return 0;
15553 }
15554
15555 /* Hook called by the linker routine which adds symbols from an object
15556 file. */
15557
15558 static bfd_boolean
15559 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15560 Elf_Internal_Sym *sym, const char **namep,
15561 flagword *flagsp, asection **secp, bfd_vma *valp)
15562 {
15563 if ((abfd->flags & DYNAMIC) == 0
15564 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15565 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15566 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
15567
15568 if (elf32_arm_hash_table (info)->vxworks_p
15569 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15570 flagsp, secp, valp))
15571 return FALSE;
15572
15573 return TRUE;
15574 }
15575
15576 /* We use this to override swap_symbol_in and swap_symbol_out. */
15577 const struct elf_size_info elf32_arm_size_info =
15578 {
15579 sizeof (Elf32_External_Ehdr),
15580 sizeof (Elf32_External_Phdr),
15581 sizeof (Elf32_External_Shdr),
15582 sizeof (Elf32_External_Rel),
15583 sizeof (Elf32_External_Rela),
15584 sizeof (Elf32_External_Sym),
15585 sizeof (Elf32_External_Dyn),
15586 sizeof (Elf_External_Note),
15587 4,
15588 1,
15589 32, 2,
15590 ELFCLASS32, EV_CURRENT,
15591 bfd_elf32_write_out_phdrs,
15592 bfd_elf32_write_shdrs_and_ehdr,
15593 bfd_elf32_checksum_contents,
15594 bfd_elf32_write_relocs,
15595 elf32_arm_swap_symbol_in,
15596 elf32_arm_swap_symbol_out,
15597 bfd_elf32_slurp_reloc_table,
15598 bfd_elf32_slurp_symbol_table,
15599 bfd_elf32_swap_dyn_in,
15600 bfd_elf32_swap_dyn_out,
15601 bfd_elf32_swap_reloc_in,
15602 bfd_elf32_swap_reloc_out,
15603 bfd_elf32_swap_reloca_in,
15604 bfd_elf32_swap_reloca_out
15605 };
15606
15607 #define ELF_ARCH bfd_arch_arm
15608 #define ELF_TARGET_ID ARM_ELF_DATA
15609 #define ELF_MACHINE_CODE EM_ARM
15610 #ifdef __QNXTARGET__
15611 #define ELF_MAXPAGESIZE 0x1000
15612 #else
15613 #define ELF_MAXPAGESIZE 0x8000
15614 #endif
15615 #define ELF_MINPAGESIZE 0x1000
15616 #define ELF_COMMONPAGESIZE 0x1000
15617
15618 #define bfd_elf32_mkobject elf32_arm_mkobject
15619
15620 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
15621 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
15622 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
15623 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
15624 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
15625 #define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
15626 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
15627 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
15628 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
15629 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
15630 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
15631 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
15632 #define bfd_elf32_bfd_final_link elf32_arm_final_link
15633
15634 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
15635 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
15636 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
15637 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
15638 #define elf_backend_check_relocs elf32_arm_check_relocs
15639 #define elf_backend_relocate_section elf32_arm_relocate_section
15640 #define elf_backend_write_section elf32_arm_write_section
15641 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
15642 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
15643 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
15644 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
15645 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
15646 #define elf_backend_always_size_sections elf32_arm_always_size_sections
15647 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
15648 #define elf_backend_post_process_headers elf32_arm_post_process_headers
15649 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
15650 #define elf_backend_object_p elf32_arm_object_p
15651 #define elf_backend_fake_sections elf32_arm_fake_sections
15652 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
15653 #define elf_backend_final_write_processing elf32_arm_final_write_processing
15654 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
15655 #define elf_backend_size_info elf32_arm_size_info
15656 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15657 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
15658 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
15659 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
15660 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
15661
15662 #define elf_backend_can_refcount 1
15663 #define elf_backend_can_gc_sections 1
15664 #define elf_backend_plt_readonly 1
15665 #define elf_backend_want_got_plt 1
15666 #define elf_backend_want_plt_sym 0
15667 #define elf_backend_may_use_rel_p 1
15668 #define elf_backend_may_use_rela_p 0
15669 #define elf_backend_default_use_rela_p 0
15670
15671 #define elf_backend_got_header_size 12
15672
15673 #undef elf_backend_obj_attrs_vendor
15674 #define elf_backend_obj_attrs_vendor "aeabi"
15675 #undef elf_backend_obj_attrs_section
15676 #define elf_backend_obj_attrs_section ".ARM.attributes"
15677 #undef elf_backend_obj_attrs_arg_type
15678 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
15679 #undef elf_backend_obj_attrs_section_type
15680 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
15681 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
15682 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
15683
15684 #include "elf32-target.h"
15685
15686 /* Native Client targets. */
15687
15688 #undef TARGET_LITTLE_SYM
15689 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_nacl_vec
15690 #undef TARGET_LITTLE_NAME
15691 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
15692 #undef TARGET_BIG_SYM
15693 #define TARGET_BIG_SYM bfd_elf32_bigarm_nacl_vec
15694 #undef TARGET_BIG_NAME
15695 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
15696
15697 /* Like elf32_arm_link_hash_table_create -- but overrides
15698 appropriately for NaCl. */
15699
15700 static struct bfd_link_hash_table *
15701 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
15702 {
15703 struct bfd_link_hash_table *ret;
15704
15705 ret = elf32_arm_link_hash_table_create (abfd);
15706 if (ret)
15707 {
15708 struct elf32_arm_link_hash_table *htab
15709 = (struct elf32_arm_link_hash_table *) ret;
15710
15711 htab->nacl_p = 1;
15712
15713 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
15714 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
15715 }
15716 return ret;
15717 }
15718
15719 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
15720 really need to use elf32_arm_modify_segment_map. But we do it
15721 anyway just to reduce gratuitous differences with the stock ARM backend. */
15722
15723 static bfd_boolean
15724 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
15725 {
15726 return (elf32_arm_modify_segment_map (abfd, info)
15727 && nacl_modify_segment_map (abfd, info));
15728 }
15729
15730 #undef elf32_bed
15731 #define elf32_bed elf32_arm_nacl_bed
15732 #undef bfd_elf32_bfd_link_hash_table_create
15733 #define bfd_elf32_bfd_link_hash_table_create \
15734 elf32_arm_nacl_link_hash_table_create
15735 #undef elf_backend_plt_alignment
15736 #define elf_backend_plt_alignment 4
15737 #undef elf_backend_modify_segment_map
15738 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
15739 #undef elf_backend_modify_program_headers
15740 #define elf_backend_modify_program_headers nacl_modify_program_headers
15741
15742 #undef ELF_MAXPAGESIZE
15743 #define ELF_MAXPAGESIZE 0x10000
15744
15745 #include "elf32-target.h"
15746
15747 /* Reset to defaults. */
15748 #undef elf_backend_plt_alignment
15749 #undef elf_backend_modify_segment_map
15750 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15751 #undef elf_backend_modify_program_headers
15752
15753 /* VxWorks Targets. */
15754
15755 #undef TARGET_LITTLE_SYM
15756 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
15757 #undef TARGET_LITTLE_NAME
15758 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
15759 #undef TARGET_BIG_SYM
15760 #define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
15761 #undef TARGET_BIG_NAME
15762 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
15763
15764 /* Like elf32_arm_link_hash_table_create -- but overrides
15765 appropriately for VxWorks. */
15766
15767 static struct bfd_link_hash_table *
15768 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
15769 {
15770 struct bfd_link_hash_table *ret;
15771
15772 ret = elf32_arm_link_hash_table_create (abfd);
15773 if (ret)
15774 {
15775 struct elf32_arm_link_hash_table *htab
15776 = (struct elf32_arm_link_hash_table *) ret;
15777 htab->use_rel = 0;
15778 htab->vxworks_p = 1;
15779 }
15780 return ret;
15781 }
15782
15783 static void
15784 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
15785 {
15786 elf32_arm_final_write_processing (abfd, linker);
15787 elf_vxworks_final_write_processing (abfd, linker);
15788 }
15789
15790 #undef elf32_bed
15791 #define elf32_bed elf32_arm_vxworks_bed
15792
15793 #undef bfd_elf32_bfd_link_hash_table_create
15794 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
15795 #undef elf_backend_final_write_processing
15796 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
15797 #undef elf_backend_emit_relocs
15798 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
15799
15800 #undef elf_backend_may_use_rel_p
15801 #define elf_backend_may_use_rel_p 0
15802 #undef elf_backend_may_use_rela_p
15803 #define elf_backend_may_use_rela_p 1
15804 #undef elf_backend_default_use_rela_p
15805 #define elf_backend_default_use_rela_p 1
15806 #undef elf_backend_want_plt_sym
15807 #define elf_backend_want_plt_sym 1
15808 #undef ELF_MAXPAGESIZE
15809 #define ELF_MAXPAGESIZE 0x1000
15810
15811 #include "elf32-target.h"
15812
15813
15814 /* Merge backend specific data from an object file to the output
15815 object file when linking. */
15816
15817 static bfd_boolean
15818 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
15819 {
15820 flagword out_flags;
15821 flagword in_flags;
15822 bfd_boolean flags_compatible = TRUE;
15823 asection *sec;
15824
15825 /* Check if we have the same endianness. */
15826 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
15827 return FALSE;
15828
15829 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
15830 return TRUE;
15831
15832 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
15833 return FALSE;
15834
15835 /* The input BFD must have had its flags initialised. */
15836 /* The following seems bogus to me -- The flags are initialized in
15837 the assembler but I don't think an elf_flags_init field is
15838 written into the object. */
15839 /* BFD_ASSERT (elf_flags_init (ibfd)); */
15840
15841 in_flags = elf_elfheader (ibfd)->e_flags;
15842 out_flags = elf_elfheader (obfd)->e_flags;
15843
15844 /* In theory there is no reason why we couldn't handle this. However
15845 in practice it isn't even close to working and there is no real
15846 reason to want it. */
15847 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
15848 && !(ibfd->flags & DYNAMIC)
15849 && (in_flags & EF_ARM_BE8))
15850 {
15851 _bfd_error_handler (_("error: %B is already in final BE8 format"),
15852 ibfd);
15853 return FALSE;
15854 }
15855
15856 if (!elf_flags_init (obfd))
15857 {
15858 /* If the input is the default architecture and had the default
15859 flags then do not bother setting the flags for the output
15860 architecture, instead allow future merges to do this. If no
15861 future merges ever set these flags then they will retain their
15862 uninitialised values, which surprise surprise, correspond
15863 to the default values. */
15864 if (bfd_get_arch_info (ibfd)->the_default
15865 && elf_elfheader (ibfd)->e_flags == 0)
15866 return TRUE;
15867
15868 elf_flags_init (obfd) = TRUE;
15869 elf_elfheader (obfd)->e_flags = in_flags;
15870
15871 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
15872 && bfd_get_arch_info (obfd)->the_default)
15873 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
15874
15875 return TRUE;
15876 }
15877
15878 /* Determine what should happen if the input ARM architecture
15879 does not match the output ARM architecture. */
15880 if (! bfd_arm_merge_machines (ibfd, obfd))
15881 return FALSE;
15882
15883 /* Identical flags must be compatible. */
15884 if (in_flags == out_flags)
15885 return TRUE;
15886
15887 /* Check to see if the input BFD actually contains any sections. If
15888 not, its flags may not have been initialised either, but it
15889 cannot actually cause any incompatiblity. Do not short-circuit
15890 dynamic objects; their section list may be emptied by
15891 elf_link_add_object_symbols.
15892
15893 Also check to see if there are no code sections in the input.
15894 In this case there is no need to check for code specific flags.
15895 XXX - do we need to worry about floating-point format compatability
15896 in data sections ? */
15897 if (!(ibfd->flags & DYNAMIC))
15898 {
15899 bfd_boolean null_input_bfd = TRUE;
15900 bfd_boolean only_data_sections = TRUE;
15901
15902 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
15903 {
15904 /* Ignore synthetic glue sections. */
15905 if (strcmp (sec->name, ".glue_7")
15906 && strcmp (sec->name, ".glue_7t"))
15907 {
15908 if ((bfd_get_section_flags (ibfd, sec)
15909 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15910 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15911 only_data_sections = FALSE;
15912
15913 null_input_bfd = FALSE;
15914 break;
15915 }
15916 }
15917
15918 if (null_input_bfd || only_data_sections)
15919 return TRUE;
15920 }
15921
15922 /* Complain about various flag mismatches. */
15923 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
15924 EF_ARM_EABI_VERSION (out_flags)))
15925 {
15926 _bfd_error_handler
15927 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
15928 ibfd, obfd,
15929 (in_flags & EF_ARM_EABIMASK) >> 24,
15930 (out_flags & EF_ARM_EABIMASK) >> 24);
15931 return FALSE;
15932 }
15933
15934 /* Not sure what needs to be checked for EABI versions >= 1. */
15935 /* VxWorks libraries do not use these flags. */
15936 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
15937 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
15938 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
15939 {
15940 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
15941 {
15942 _bfd_error_handler
15943 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
15944 ibfd, obfd,
15945 in_flags & EF_ARM_APCS_26 ? 26 : 32,
15946 out_flags & EF_ARM_APCS_26 ? 26 : 32);
15947 flags_compatible = FALSE;
15948 }
15949
15950 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
15951 {
15952 if (in_flags & EF_ARM_APCS_FLOAT)
15953 _bfd_error_handler
15954 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
15955 ibfd, obfd);
15956 else
15957 _bfd_error_handler
15958 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
15959 ibfd, obfd);
15960
15961 flags_compatible = FALSE;
15962 }
15963
15964 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
15965 {
15966 if (in_flags & EF_ARM_VFP_FLOAT)
15967 _bfd_error_handler
15968 (_("error: %B uses VFP instructions, whereas %B does not"),
15969 ibfd, obfd);
15970 else
15971 _bfd_error_handler
15972 (_("error: %B uses FPA instructions, whereas %B does not"),
15973 ibfd, obfd);
15974
15975 flags_compatible = FALSE;
15976 }
15977
15978 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
15979 {
15980 if (in_flags & EF_ARM_MAVERICK_FLOAT)
15981 _bfd_error_handler
15982 (_("error: %B uses Maverick instructions, whereas %B does not"),
15983 ibfd, obfd);
15984 else
15985 _bfd_error_handler
15986 (_("error: %B does not use Maverick instructions, whereas %B does"),
15987 ibfd, obfd);
15988
15989 flags_compatible = FALSE;
15990 }
15991
15992 #ifdef EF_ARM_SOFT_FLOAT
15993 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
15994 {
15995 /* We can allow interworking between code that is VFP format
15996 layout, and uses either soft float or integer regs for
15997 passing floating point arguments and results. We already
15998 know that the APCS_FLOAT flags match; similarly for VFP
15999 flags. */
16000 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
16001 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
16002 {
16003 if (in_flags & EF_ARM_SOFT_FLOAT)
16004 _bfd_error_handler
16005 (_("error: %B uses software FP, whereas %B uses hardware FP"),
16006 ibfd, obfd);
16007 else
16008 _bfd_error_handler
16009 (_("error: %B uses hardware FP, whereas %B uses software FP"),
16010 ibfd, obfd);
16011
16012 flags_compatible = FALSE;
16013 }
16014 }
16015 #endif
16016
16017 /* Interworking mismatch is only a warning. */
16018 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
16019 {
16020 if (in_flags & EF_ARM_INTERWORK)
16021 {
16022 _bfd_error_handler
16023 (_("Warning: %B supports interworking, whereas %B does not"),
16024 ibfd, obfd);
16025 }
16026 else
16027 {
16028 _bfd_error_handler
16029 (_("Warning: %B does not support interworking, whereas %B does"),
16030 ibfd, obfd);
16031 }
16032 }
16033 }
16034
16035 return flags_compatible;
16036 }
16037
16038
16039 /* Symbian OS Targets. */
16040
16041 #undef TARGET_LITTLE_SYM
16042 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
16043 #undef TARGET_LITTLE_NAME
16044 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
16045 #undef TARGET_BIG_SYM
16046 #define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
16047 #undef TARGET_BIG_NAME
16048 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
16049
16050 /* Like elf32_arm_link_hash_table_create -- but overrides
16051 appropriately for Symbian OS. */
16052
16053 static struct bfd_link_hash_table *
16054 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
16055 {
16056 struct bfd_link_hash_table *ret;
16057
16058 ret = elf32_arm_link_hash_table_create (abfd);
16059 if (ret)
16060 {
16061 struct elf32_arm_link_hash_table *htab
16062 = (struct elf32_arm_link_hash_table *)ret;
16063 /* There is no PLT header for Symbian OS. */
16064 htab->plt_header_size = 0;
16065 /* The PLT entries are each one instruction and one word. */
16066 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
16067 htab->symbian_p = 1;
16068 /* Symbian uses armv5t or above, so use_blx is always true. */
16069 htab->use_blx = 1;
16070 htab->root.is_relocatable_executable = 1;
16071 }
16072 return ret;
16073 }
16074
16075 static const struct bfd_elf_special_section
16076 elf32_arm_symbian_special_sections[] =
16077 {
16078 /* In a BPABI executable, the dynamic linking sections do not go in
16079 the loadable read-only segment. The post-linker may wish to
16080 refer to these sections, but they are not part of the final
16081 program image. */
16082 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
16083 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
16084 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
16085 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
16086 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
16087 /* These sections do not need to be writable as the SymbianOS
16088 postlinker will arrange things so that no dynamic relocation is
16089 required. */
16090 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
16091 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
16092 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
16093 { NULL, 0, 0, 0, 0 }
16094 };
16095
16096 static void
16097 elf32_arm_symbian_begin_write_processing (bfd *abfd,
16098 struct bfd_link_info *link_info)
16099 {
16100 /* BPABI objects are never loaded directly by an OS kernel; they are
16101 processed by a postlinker first, into an OS-specific format. If
16102 the D_PAGED bit is set on the file, BFD will align segments on
16103 page boundaries, so that an OS can directly map the file. With
16104 BPABI objects, that just results in wasted space. In addition,
16105 because we clear the D_PAGED bit, map_sections_to_segments will
16106 recognize that the program headers should not be mapped into any
16107 loadable segment. */
16108 abfd->flags &= ~D_PAGED;
16109 elf32_arm_begin_write_processing (abfd, link_info);
16110 }
16111
16112 static bfd_boolean
16113 elf32_arm_symbian_modify_segment_map (bfd *abfd,
16114 struct bfd_link_info *info)
16115 {
16116 struct elf_segment_map *m;
16117 asection *dynsec;
16118
16119 /* BPABI shared libraries and executables should have a PT_DYNAMIC
16120 segment. However, because the .dynamic section is not marked
16121 with SEC_LOAD, the generic ELF code will not create such a
16122 segment. */
16123 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
16124 if (dynsec)
16125 {
16126 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
16127 if (m->p_type == PT_DYNAMIC)
16128 break;
16129
16130 if (m == NULL)
16131 {
16132 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
16133 m->next = elf_tdata (abfd)->segment_map;
16134 elf_tdata (abfd)->segment_map = m;
16135 }
16136 }
16137
16138 /* Also call the generic arm routine. */
16139 return elf32_arm_modify_segment_map (abfd, info);
16140 }
16141
16142 /* Return address for Ith PLT stub in section PLT, for relocation REL
16143 or (bfd_vma) -1 if it should not be included. */
16144
16145 static bfd_vma
16146 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
16147 const arelent *rel ATTRIBUTE_UNUSED)
16148 {
16149 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
16150 }
16151
16152
16153 #undef elf32_bed
16154 #define elf32_bed elf32_arm_symbian_bed
16155
16156 /* The dynamic sections are not allocated on SymbianOS; the postlinker
16157 will process them and then discard them. */
16158 #undef ELF_DYNAMIC_SEC_FLAGS
16159 #define ELF_DYNAMIC_SEC_FLAGS \
16160 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
16161
16162 #undef elf_backend_emit_relocs
16163
16164 #undef bfd_elf32_bfd_link_hash_table_create
16165 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
16166 #undef elf_backend_special_sections
16167 #define elf_backend_special_sections elf32_arm_symbian_special_sections
16168 #undef elf_backend_begin_write_processing
16169 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
16170 #undef elf_backend_final_write_processing
16171 #define elf_backend_final_write_processing elf32_arm_final_write_processing
16172
16173 #undef elf_backend_modify_segment_map
16174 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
16175
16176 /* There is no .got section for BPABI objects, and hence no header. */
16177 #undef elf_backend_got_header_size
16178 #define elf_backend_got_header_size 0
16179
16180 /* Similarly, there is no .got.plt section. */
16181 #undef elf_backend_want_got_plt
16182 #define elf_backend_want_got_plt 0
16183
16184 #undef elf_backend_plt_sym_val
16185 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
16186
16187 #undef elf_backend_may_use_rel_p
16188 #define elf_backend_may_use_rel_p 1
16189 #undef elf_backend_may_use_rela_p
16190 #define elf_backend_may_use_rela_p 0
16191 #undef elf_backend_default_use_rela_p
16192 #define elf_backend_default_use_rela_p 0
16193 #undef elf_backend_want_plt_sym
16194 #define elf_backend_want_plt_sym 0
16195 #undef ELF_MAXPAGESIZE
16196 #define ELF_MAXPAGESIZE 0x8000
16197
16198 #include "elf32-target.h"
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