]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - bfd/elf32-arm.c
projects / thirdparty / binutils-gdb.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Fix formatting in elf32-arm.c
[thirdparty/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2021 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "libiberty.h"
26 #include "libbfd.h"
27 #include "elf-bfd.h"
28 #include "elf-nacl.h"
29 #include "elf-vxworks.h"
30 #include "elf/arm.h"
31 #include "elf32-arm.h"
32 #include "cpu-arm.h"
33
34 /* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36 #define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38
39 /* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41 #define RELOC_SIZE(HTAB) \
42 ((HTAB)->use_rel \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
45
46 /* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48 #define SWAP_RELOC_IN(HTAB) \
49 ((HTAB)->use_rel \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
52
53 /* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55 #define SWAP_RELOC_OUT(HTAB) \
56 ((HTAB)->use_rel \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
59
60 #define elf_info_to_howto NULL
61 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62
63 #define ARM_ELF_ABI_VERSION 0
64 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65
66 /* The Adjusted Place, as defined by AAELF. */
67 #define Pa(X) ((X) & 0xfffffffc)
68
69 static bool elf32_arm_write_section (bfd *output_bfd,
70 struct bfd_link_info *link_info,
71 asection *sec,
72 bfd_byte *contents);
73
74 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
75 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
76 in that slot. */
77
78 static reloc_howto_type elf32_arm_howto_table_1[] =
79 {
80 /* No relocation. */
81 HOWTO (R_ARM_NONE, /* type */
82 0, /* rightshift */
83 3, /* size (0 = byte, 1 = short, 2 = long) */
84 0, /* bitsize */
85 false, /* pc_relative */
86 0, /* bitpos */
87 complain_overflow_dont,/* complain_on_overflow */
88 bfd_elf_generic_reloc, /* special_function */
89 "R_ARM_NONE", /* name */
90 false, /* partial_inplace */
91 0, /* src_mask */
92 0, /* dst_mask */
93 false), /* pcrel_offset */
94
95 HOWTO (R_ARM_PC24, /* type */
96 2, /* rightshift */
97 2, /* size (0 = byte, 1 = short, 2 = long) */
98 24, /* bitsize */
99 true, /* pc_relative */
100 0, /* bitpos */
101 complain_overflow_signed,/* complain_on_overflow */
102 bfd_elf_generic_reloc, /* special_function */
103 "R_ARM_PC24", /* name */
104 false, /* partial_inplace */
105 0x00ffffff, /* src_mask */
106 0x00ffffff, /* dst_mask */
107 true), /* pcrel_offset */
108
109 /* 32 bit absolute */
110 HOWTO (R_ARM_ABS32, /* type */
111 0, /* rightshift */
112 2, /* size (0 = byte, 1 = short, 2 = long) */
113 32, /* bitsize */
114 false, /* pc_relative */
115 0, /* bitpos */
116 complain_overflow_bitfield,/* complain_on_overflow */
117 bfd_elf_generic_reloc, /* special_function */
118 "R_ARM_ABS32", /* name */
119 false, /* partial_inplace */
120 0xffffffff, /* src_mask */
121 0xffffffff, /* dst_mask */
122 false), /* pcrel_offset */
123
124 /* standard 32bit pc-relative reloc */
125 HOWTO (R_ARM_REL32, /* type */
126 0, /* rightshift */
127 2, /* size (0 = byte, 1 = short, 2 = long) */
128 32, /* bitsize */
129 true, /* pc_relative */
130 0, /* bitpos */
131 complain_overflow_bitfield,/* complain_on_overflow */
132 bfd_elf_generic_reloc, /* special_function */
133 "R_ARM_REL32", /* name */
134 false, /* partial_inplace */
135 0xffffffff, /* src_mask */
136 0xffffffff, /* dst_mask */
137 true), /* pcrel_offset */
138
139 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
140 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* rightshift */
142 0, /* size (0 = byte, 1 = short, 2 = long) */
143 32, /* bitsize */
144 true, /* pc_relative */
145 0, /* bitpos */
146 complain_overflow_dont,/* complain_on_overflow */
147 bfd_elf_generic_reloc, /* special_function */
148 "R_ARM_LDR_PC_G0", /* name */
149 false, /* partial_inplace */
150 0xffffffff, /* src_mask */
151 0xffffffff, /* dst_mask */
152 true), /* pcrel_offset */
153
154 /* 16 bit absolute */
155 HOWTO (R_ARM_ABS16, /* type */
156 0, /* rightshift */
157 1, /* size (0 = byte, 1 = short, 2 = long) */
158 16, /* bitsize */
159 false, /* pc_relative */
160 0, /* bitpos */
161 complain_overflow_bitfield,/* complain_on_overflow */
162 bfd_elf_generic_reloc, /* special_function */
163 "R_ARM_ABS16", /* name */
164 false, /* partial_inplace */
165 0x0000ffff, /* src_mask */
166 0x0000ffff, /* dst_mask */
167 false), /* pcrel_offset */
168
169 /* 12 bit absolute */
170 HOWTO (R_ARM_ABS12, /* type */
171 0, /* rightshift */
172 2, /* size (0 = byte, 1 = short, 2 = long) */
173 12, /* bitsize */
174 false, /* pc_relative */
175 0, /* bitpos */
176 complain_overflow_bitfield,/* complain_on_overflow */
177 bfd_elf_generic_reloc, /* special_function */
178 "R_ARM_ABS12", /* name */
179 false, /* partial_inplace */
180 0x00000fff, /* src_mask */
181 0x00000fff, /* dst_mask */
182 false), /* pcrel_offset */
183
184 HOWTO (R_ARM_THM_ABS5, /* type */
185 6, /* rightshift */
186 1, /* size (0 = byte, 1 = short, 2 = long) */
187 5, /* bitsize */
188 false, /* pc_relative */
189 0, /* bitpos */
190 complain_overflow_bitfield,/* complain_on_overflow */
191 bfd_elf_generic_reloc, /* special_function */
192 "R_ARM_THM_ABS5", /* name */
193 false, /* partial_inplace */
194 0x000007e0, /* src_mask */
195 0x000007e0, /* dst_mask */
196 false), /* pcrel_offset */
197
198 /* 8 bit absolute */
199 HOWTO (R_ARM_ABS8, /* type */
200 0, /* rightshift */
201 0, /* size (0 = byte, 1 = short, 2 = long) */
202 8, /* bitsize */
203 false, /* pc_relative */
204 0, /* bitpos */
205 complain_overflow_bitfield,/* complain_on_overflow */
206 bfd_elf_generic_reloc, /* special_function */
207 "R_ARM_ABS8", /* name */
208 false, /* partial_inplace */
209 0x000000ff, /* src_mask */
210 0x000000ff, /* dst_mask */
211 false), /* pcrel_offset */
212
213 HOWTO (R_ARM_SBREL32, /* type */
214 0, /* rightshift */
215 2, /* size (0 = byte, 1 = short, 2 = long) */
216 32, /* bitsize */
217 false, /* pc_relative */
218 0, /* bitpos */
219 complain_overflow_dont,/* complain_on_overflow */
220 bfd_elf_generic_reloc, /* special_function */
221 "R_ARM_SBREL32", /* name */
222 false, /* partial_inplace */
223 0xffffffff, /* src_mask */
224 0xffffffff, /* dst_mask */
225 false), /* pcrel_offset */
226
227 HOWTO (R_ARM_THM_CALL, /* type */
228 1, /* rightshift */
229 2, /* size (0 = byte, 1 = short, 2 = long) */
230 24, /* bitsize */
231 true, /* pc_relative */
232 0, /* bitpos */
233 complain_overflow_signed,/* complain_on_overflow */
234 bfd_elf_generic_reloc, /* special_function */
235 "R_ARM_THM_CALL", /* name */
236 false, /* partial_inplace */
237 0x07ff2fff, /* src_mask */
238 0x07ff2fff, /* dst_mask */
239 true), /* pcrel_offset */
240
241 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* rightshift */
243 1, /* size (0 = byte, 1 = short, 2 = long) */
244 8, /* bitsize */
245 true, /* pc_relative */
246 0, /* bitpos */
247 complain_overflow_signed,/* complain_on_overflow */
248 bfd_elf_generic_reloc, /* special_function */
249 "R_ARM_THM_PC8", /* name */
250 false, /* partial_inplace */
251 0x000000ff, /* src_mask */
252 0x000000ff, /* dst_mask */
253 true), /* pcrel_offset */
254
255 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* rightshift */
257 1, /* size (0 = byte, 1 = short, 2 = long) */
258 32, /* bitsize */
259 false, /* pc_relative */
260 0, /* bitpos */
261 complain_overflow_signed,/* complain_on_overflow */
262 bfd_elf_generic_reloc, /* special_function */
263 "R_ARM_BREL_ADJ", /* name */
264 false, /* partial_inplace */
265 0xffffffff, /* src_mask */
266 0xffffffff, /* dst_mask */
267 false), /* pcrel_offset */
268
269 HOWTO (R_ARM_TLS_DESC, /* type */
270 0, /* rightshift */
271 2, /* size (0 = byte, 1 = short, 2 = long) */
272 32, /* bitsize */
273 false, /* pc_relative */
274 0, /* bitpos */
275 complain_overflow_bitfield,/* complain_on_overflow */
276 bfd_elf_generic_reloc, /* special_function */
277 "R_ARM_TLS_DESC", /* name */
278 false, /* partial_inplace */
279 0xffffffff, /* src_mask */
280 0xffffffff, /* dst_mask */
281 false), /* pcrel_offset */
282
283 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* rightshift */
285 0, /* size (0 = byte, 1 = short, 2 = long) */
286 0, /* bitsize */
287 false, /* pc_relative */
288 0, /* bitpos */
289 complain_overflow_signed,/* complain_on_overflow */
290 bfd_elf_generic_reloc, /* special_function */
291 "R_ARM_SWI8", /* name */
292 false, /* partial_inplace */
293 0x00000000, /* src_mask */
294 0x00000000, /* dst_mask */
295 false), /* pcrel_offset */
296
297 /* BLX instruction for the ARM. */
298 HOWTO (R_ARM_XPC25, /* type */
299 2, /* rightshift */
300 2, /* size (0 = byte, 1 = short, 2 = long) */
301 24, /* bitsize */
302 true, /* pc_relative */
303 0, /* bitpos */
304 complain_overflow_signed,/* complain_on_overflow */
305 bfd_elf_generic_reloc, /* special_function */
306 "R_ARM_XPC25", /* name */
307 false, /* partial_inplace */
308 0x00ffffff, /* src_mask */
309 0x00ffffff, /* dst_mask */
310 true), /* pcrel_offset */
311
312 /* BLX instruction for the Thumb. */
313 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* rightshift */
315 2, /* size (0 = byte, 1 = short, 2 = long) */
316 24, /* bitsize */
317 true, /* pc_relative */
318 0, /* bitpos */
319 complain_overflow_signed,/* complain_on_overflow */
320 bfd_elf_generic_reloc, /* special_function */
321 "R_ARM_THM_XPC22", /* name */
322 false, /* partial_inplace */
323 0x07ff2fff, /* src_mask */
324 0x07ff2fff, /* dst_mask */
325 true), /* pcrel_offset */
326
327 /* Dynamic TLS relocations. */
328
329 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 0, /* rightshift */
331 2, /* size (0 = byte, 1 = short, 2 = long) */
332 32, /* bitsize */
333 false, /* pc_relative */
334 0, /* bitpos */
335 complain_overflow_bitfield,/* complain_on_overflow */
336 bfd_elf_generic_reloc, /* special_function */
337 "R_ARM_TLS_DTPMOD32", /* name */
338 true, /* partial_inplace */
339 0xffffffff, /* src_mask */
340 0xffffffff, /* dst_mask */
341 false), /* pcrel_offset */
342
343 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 0, /* rightshift */
345 2, /* size (0 = byte, 1 = short, 2 = long) */
346 32, /* bitsize */
347 false, /* pc_relative */
348 0, /* bitpos */
349 complain_overflow_bitfield,/* complain_on_overflow */
350 bfd_elf_generic_reloc, /* special_function */
351 "R_ARM_TLS_DTPOFF32", /* name */
352 true, /* partial_inplace */
353 0xffffffff, /* src_mask */
354 0xffffffff, /* dst_mask */
355 false), /* pcrel_offset */
356
357 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 0, /* rightshift */
359 2, /* size (0 = byte, 1 = short, 2 = long) */
360 32, /* bitsize */
361 false, /* pc_relative */
362 0, /* bitpos */
363 complain_overflow_bitfield,/* complain_on_overflow */
364 bfd_elf_generic_reloc, /* special_function */
365 "R_ARM_TLS_TPOFF32", /* name */
366 true, /* partial_inplace */
367 0xffffffff, /* src_mask */
368 0xffffffff, /* dst_mask */
369 false), /* pcrel_offset */
370
371 /* Relocs used in ARM Linux */
372
373 HOWTO (R_ARM_COPY, /* type */
374 0, /* rightshift */
375 2, /* size (0 = byte, 1 = short, 2 = long) */
376 32, /* bitsize */
377 false, /* pc_relative */
378 0, /* bitpos */
379 complain_overflow_bitfield,/* complain_on_overflow */
380 bfd_elf_generic_reloc, /* special_function */
381 "R_ARM_COPY", /* name */
382 true, /* partial_inplace */
383 0xffffffff, /* src_mask */
384 0xffffffff, /* dst_mask */
385 false), /* pcrel_offset */
386
387 HOWTO (R_ARM_GLOB_DAT, /* type */
388 0, /* rightshift */
389 2, /* size (0 = byte, 1 = short, 2 = long) */
390 32, /* bitsize */
391 false, /* pc_relative */
392 0, /* bitpos */
393 complain_overflow_bitfield,/* complain_on_overflow */
394 bfd_elf_generic_reloc, /* special_function */
395 "R_ARM_GLOB_DAT", /* name */
396 true, /* partial_inplace */
397 0xffffffff, /* src_mask */
398 0xffffffff, /* dst_mask */
399 false), /* pcrel_offset */
400
401 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 0, /* rightshift */
403 2, /* size (0 = byte, 1 = short, 2 = long) */
404 32, /* bitsize */
405 false, /* pc_relative */
406 0, /* bitpos */
407 complain_overflow_bitfield,/* complain_on_overflow */
408 bfd_elf_generic_reloc, /* special_function */
409 "R_ARM_JUMP_SLOT", /* name */
410 true, /* partial_inplace */
411 0xffffffff, /* src_mask */
412 0xffffffff, /* dst_mask */
413 false), /* pcrel_offset */
414
415 HOWTO (R_ARM_RELATIVE, /* type */
416 0, /* rightshift */
417 2, /* size (0 = byte, 1 = short, 2 = long) */
418 32, /* bitsize */
419 false, /* pc_relative */
420 0, /* bitpos */
421 complain_overflow_bitfield,/* complain_on_overflow */
422 bfd_elf_generic_reloc, /* special_function */
423 "R_ARM_RELATIVE", /* name */
424 true, /* partial_inplace */
425 0xffffffff, /* src_mask */
426 0xffffffff, /* dst_mask */
427 false), /* pcrel_offset */
428
429 HOWTO (R_ARM_GOTOFF32, /* type */
430 0, /* rightshift */
431 2, /* size (0 = byte, 1 = short, 2 = long) */
432 32, /* bitsize */
433 false, /* pc_relative */
434 0, /* bitpos */
435 complain_overflow_bitfield,/* complain_on_overflow */
436 bfd_elf_generic_reloc, /* special_function */
437 "R_ARM_GOTOFF32", /* name */
438 true, /* partial_inplace */
439 0xffffffff, /* src_mask */
440 0xffffffff, /* dst_mask */
441 false), /* pcrel_offset */
442
443 HOWTO (R_ARM_GOTPC, /* type */
444 0, /* rightshift */
445 2, /* size (0 = byte, 1 = short, 2 = long) */
446 32, /* bitsize */
447 true, /* pc_relative */
448 0, /* bitpos */
449 complain_overflow_bitfield,/* complain_on_overflow */
450 bfd_elf_generic_reloc, /* special_function */
451 "R_ARM_GOTPC", /* name */
452 true, /* partial_inplace */
453 0xffffffff, /* src_mask */
454 0xffffffff, /* dst_mask */
455 true), /* pcrel_offset */
456
457 HOWTO (R_ARM_GOT32, /* type */
458 0, /* rightshift */
459 2, /* size (0 = byte, 1 = short, 2 = long) */
460 32, /* bitsize */
461 false, /* pc_relative */
462 0, /* bitpos */
463 complain_overflow_bitfield,/* complain_on_overflow */
464 bfd_elf_generic_reloc, /* special_function */
465 "R_ARM_GOT32", /* name */
466 true, /* partial_inplace */
467 0xffffffff, /* src_mask */
468 0xffffffff, /* dst_mask */
469 false), /* pcrel_offset */
470
471 HOWTO (R_ARM_PLT32, /* type */
472 2, /* rightshift */
473 2, /* size (0 = byte, 1 = short, 2 = long) */
474 24, /* bitsize */
475 true, /* pc_relative */
476 0, /* bitpos */
477 complain_overflow_bitfield,/* complain_on_overflow */
478 bfd_elf_generic_reloc, /* special_function */
479 "R_ARM_PLT32", /* name */
480 false, /* partial_inplace */
481 0x00ffffff, /* src_mask */
482 0x00ffffff, /* dst_mask */
483 true), /* pcrel_offset */
484
485 HOWTO (R_ARM_CALL, /* type */
486 2, /* rightshift */
487 2, /* size (0 = byte, 1 = short, 2 = long) */
488 24, /* bitsize */
489 true, /* pc_relative */
490 0, /* bitpos */
491 complain_overflow_signed,/* complain_on_overflow */
492 bfd_elf_generic_reloc, /* special_function */
493 "R_ARM_CALL", /* name */
494 false, /* partial_inplace */
495 0x00ffffff, /* src_mask */
496 0x00ffffff, /* dst_mask */
497 true), /* pcrel_offset */
498
499 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* rightshift */
501 2, /* size (0 = byte, 1 = short, 2 = long) */
502 24, /* bitsize */
503 true, /* pc_relative */
504 0, /* bitpos */
505 complain_overflow_signed,/* complain_on_overflow */
506 bfd_elf_generic_reloc, /* special_function */
507 "R_ARM_JUMP24", /* name */
508 false, /* partial_inplace */
509 0x00ffffff, /* src_mask */
510 0x00ffffff, /* dst_mask */
511 true), /* pcrel_offset */
512
513 HOWTO (R_ARM_THM_JUMP24, /* type */
514 1, /* rightshift */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
516 24, /* bitsize */
517 true, /* pc_relative */
518 0, /* bitpos */
519 complain_overflow_signed,/* complain_on_overflow */
520 bfd_elf_generic_reloc, /* special_function */
521 "R_ARM_THM_JUMP24", /* name */
522 false, /* partial_inplace */
523 0x07ff2fff, /* src_mask */
524 0x07ff2fff, /* dst_mask */
525 true), /* pcrel_offset */
526
527 HOWTO (R_ARM_BASE_ABS, /* type */
528 0, /* rightshift */
529 2, /* size (0 = byte, 1 = short, 2 = long) */
530 32, /* bitsize */
531 false, /* pc_relative */
532 0, /* bitpos */
533 complain_overflow_dont,/* complain_on_overflow */
534 bfd_elf_generic_reloc, /* special_function */
535 "R_ARM_BASE_ABS", /* name */
536 false, /* partial_inplace */
537 0xffffffff, /* src_mask */
538 0xffffffff, /* dst_mask */
539 false), /* pcrel_offset */
540
541 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 0, /* rightshift */
543 2, /* size (0 = byte, 1 = short, 2 = long) */
544 12, /* bitsize */
545 true, /* pc_relative */
546 0, /* bitpos */
547 complain_overflow_dont,/* complain_on_overflow */
548 bfd_elf_generic_reloc, /* special_function */
549 "R_ARM_ALU_PCREL_7_0", /* name */
550 false, /* partial_inplace */
551 0x00000fff, /* src_mask */
552 0x00000fff, /* dst_mask */
553 true), /* pcrel_offset */
554
555 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 0, /* rightshift */
557 2, /* size (0 = byte, 1 = short, 2 = long) */
558 12, /* bitsize */
559 true, /* pc_relative */
560 8, /* bitpos */
561 complain_overflow_dont,/* complain_on_overflow */
562 bfd_elf_generic_reloc, /* special_function */
563 "R_ARM_ALU_PCREL_15_8",/* name */
564 false, /* partial_inplace */
565 0x00000fff, /* src_mask */
566 0x00000fff, /* dst_mask */
567 true), /* pcrel_offset */
568
569 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 0, /* rightshift */
571 2, /* size (0 = byte, 1 = short, 2 = long) */
572 12, /* bitsize */
573 true, /* pc_relative */
574 16, /* bitpos */
575 complain_overflow_dont,/* complain_on_overflow */
576 bfd_elf_generic_reloc, /* special_function */
577 "R_ARM_ALU_PCREL_23_15",/* name */
578 false, /* partial_inplace */
579 0x00000fff, /* src_mask */
580 0x00000fff, /* dst_mask */
581 true), /* pcrel_offset */
582
583 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 0, /* rightshift */
585 2, /* size (0 = byte, 1 = short, 2 = long) */
586 12, /* bitsize */
587 false, /* pc_relative */
588 0, /* bitpos */
589 complain_overflow_dont,/* complain_on_overflow */
590 bfd_elf_generic_reloc, /* special_function */
591 "R_ARM_LDR_SBREL_11_0",/* name */
592 false, /* partial_inplace */
593 0x00000fff, /* src_mask */
594 0x00000fff, /* dst_mask */
595 false), /* pcrel_offset */
596
597 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 0, /* rightshift */
599 2, /* size (0 = byte, 1 = short, 2 = long) */
600 8, /* bitsize */
601 false, /* pc_relative */
602 12, /* bitpos */
603 complain_overflow_dont,/* complain_on_overflow */
604 bfd_elf_generic_reloc, /* special_function */
605 "R_ARM_ALU_SBREL_19_12",/* name */
606 false, /* partial_inplace */
607 0x000ff000, /* src_mask */
608 0x000ff000, /* dst_mask */
609 false), /* pcrel_offset */
610
611 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 0, /* rightshift */
613 2, /* size (0 = byte, 1 = short, 2 = long) */
614 8, /* bitsize */
615 false, /* pc_relative */
616 20, /* bitpos */
617 complain_overflow_dont,/* complain_on_overflow */
618 bfd_elf_generic_reloc, /* special_function */
619 "R_ARM_ALU_SBREL_27_20",/* name */
620 false, /* partial_inplace */
621 0x0ff00000, /* src_mask */
622 0x0ff00000, /* dst_mask */
623 false), /* pcrel_offset */
624
625 HOWTO (R_ARM_TARGET1, /* type */
626 0, /* rightshift */
627 2, /* size (0 = byte, 1 = short, 2 = long) */
628 32, /* bitsize */
629 false, /* pc_relative */
630 0, /* bitpos */
631 complain_overflow_dont,/* complain_on_overflow */
632 bfd_elf_generic_reloc, /* special_function */
633 "R_ARM_TARGET1", /* name */
634 false, /* partial_inplace */
635 0xffffffff, /* src_mask */
636 0xffffffff, /* dst_mask */
637 false), /* pcrel_offset */
638
639 HOWTO (R_ARM_ROSEGREL32, /* type */
640 0, /* rightshift */
641 2, /* size (0 = byte, 1 = short, 2 = long) */
642 32, /* bitsize */
643 false, /* pc_relative */
644 0, /* bitpos */
645 complain_overflow_dont,/* complain_on_overflow */
646 bfd_elf_generic_reloc, /* special_function */
647 "R_ARM_ROSEGREL32", /* name */
648 false, /* partial_inplace */
649 0xffffffff, /* src_mask */
650 0xffffffff, /* dst_mask */
651 false), /* pcrel_offset */
652
653 HOWTO (R_ARM_V4BX, /* type */
654 0, /* rightshift */
655 2, /* size (0 = byte, 1 = short, 2 = long) */
656 32, /* bitsize */
657 false, /* pc_relative */
658 0, /* bitpos */
659 complain_overflow_dont,/* complain_on_overflow */
660 bfd_elf_generic_reloc, /* special_function */
661 "R_ARM_V4BX", /* name */
662 false, /* partial_inplace */
663 0xffffffff, /* src_mask */
664 0xffffffff, /* dst_mask */
665 false), /* pcrel_offset */
666
667 HOWTO (R_ARM_TARGET2, /* type */
668 0, /* rightshift */
669 2, /* size (0 = byte, 1 = short, 2 = long) */
670 32, /* bitsize */
671 false, /* pc_relative */
672 0, /* bitpos */
673 complain_overflow_signed,/* complain_on_overflow */
674 bfd_elf_generic_reloc, /* special_function */
675 "R_ARM_TARGET2", /* name */
676 false, /* partial_inplace */
677 0xffffffff, /* src_mask */
678 0xffffffff, /* dst_mask */
679 true), /* pcrel_offset */
680
681 HOWTO (R_ARM_PREL31, /* type */
682 0, /* rightshift */
683 2, /* size (0 = byte, 1 = short, 2 = long) */
684 31, /* bitsize */
685 true, /* pc_relative */
686 0, /* bitpos */
687 complain_overflow_signed,/* complain_on_overflow */
688 bfd_elf_generic_reloc, /* special_function */
689 "R_ARM_PREL31", /* name */
690 false, /* partial_inplace */
691 0x7fffffff, /* src_mask */
692 0x7fffffff, /* dst_mask */
693 true), /* pcrel_offset */
694
695 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 0, /* rightshift */
697 2, /* size (0 = byte, 1 = short, 2 = long) */
698 16, /* bitsize */
699 false, /* pc_relative */
700 0, /* bitpos */
701 complain_overflow_dont,/* complain_on_overflow */
702 bfd_elf_generic_reloc, /* special_function */
703 "R_ARM_MOVW_ABS_NC", /* name */
704 false, /* partial_inplace */
705 0x000f0fff, /* src_mask */
706 0x000f0fff, /* dst_mask */
707 false), /* pcrel_offset */
708
709 HOWTO (R_ARM_MOVT_ABS, /* type */
710 0, /* rightshift */
711 2, /* size (0 = byte, 1 = short, 2 = long) */
712 16, /* bitsize */
713 false, /* pc_relative */
714 0, /* bitpos */
715 complain_overflow_bitfield,/* complain_on_overflow */
716 bfd_elf_generic_reloc, /* special_function */
717 "R_ARM_MOVT_ABS", /* name */
718 false, /* partial_inplace */
719 0x000f0fff, /* src_mask */
720 0x000f0fff, /* dst_mask */
721 false), /* pcrel_offset */
722
723 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 0, /* rightshift */
725 2, /* size (0 = byte, 1 = short, 2 = long) */
726 16, /* bitsize */
727 true, /* pc_relative */
728 0, /* bitpos */
729 complain_overflow_dont,/* complain_on_overflow */
730 bfd_elf_generic_reloc, /* special_function */
731 "R_ARM_MOVW_PREL_NC", /* name */
732 false, /* partial_inplace */
733 0x000f0fff, /* src_mask */
734 0x000f0fff, /* dst_mask */
735 true), /* pcrel_offset */
736
737 HOWTO (R_ARM_MOVT_PREL, /* type */
738 0, /* rightshift */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
740 16, /* bitsize */
741 true, /* pc_relative */
742 0, /* bitpos */
743 complain_overflow_bitfield,/* complain_on_overflow */
744 bfd_elf_generic_reloc, /* special_function */
745 "R_ARM_MOVT_PREL", /* name */
746 false, /* partial_inplace */
747 0x000f0fff, /* src_mask */
748 0x000f0fff, /* dst_mask */
749 true), /* pcrel_offset */
750
751 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 0, /* rightshift */
753 2, /* size (0 = byte, 1 = short, 2 = long) */
754 16, /* bitsize */
755 false, /* pc_relative */
756 0, /* bitpos */
757 complain_overflow_dont,/* complain_on_overflow */
758 bfd_elf_generic_reloc, /* special_function */
759 "R_ARM_THM_MOVW_ABS_NC",/* name */
760 false, /* partial_inplace */
761 0x040f70ff, /* src_mask */
762 0x040f70ff, /* dst_mask */
763 false), /* pcrel_offset */
764
765 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 0, /* rightshift */
767 2, /* size (0 = byte, 1 = short, 2 = long) */
768 16, /* bitsize */
769 false, /* pc_relative */
770 0, /* bitpos */
771 complain_overflow_bitfield,/* complain_on_overflow */
772 bfd_elf_generic_reloc, /* special_function */
773 "R_ARM_THM_MOVT_ABS", /* name */
774 false, /* partial_inplace */
775 0x040f70ff, /* src_mask */
776 0x040f70ff, /* dst_mask */
777 false), /* pcrel_offset */
778
779 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 0, /* rightshift */
781 2, /* size (0 = byte, 1 = short, 2 = long) */
782 16, /* bitsize */
783 true, /* pc_relative */
784 0, /* bitpos */
785 complain_overflow_dont,/* complain_on_overflow */
786 bfd_elf_generic_reloc, /* special_function */
787 "R_ARM_THM_MOVW_PREL_NC",/* name */
788 false, /* partial_inplace */
789 0x040f70ff, /* src_mask */
790 0x040f70ff, /* dst_mask */
791 true), /* pcrel_offset */
792
793 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 0, /* rightshift */
795 2, /* size (0 = byte, 1 = short, 2 = long) */
796 16, /* bitsize */
797 true, /* pc_relative */
798 0, /* bitpos */
799 complain_overflow_bitfield,/* complain_on_overflow */
800 bfd_elf_generic_reloc, /* special_function */
801 "R_ARM_THM_MOVT_PREL", /* name */
802 false, /* partial_inplace */
803 0x040f70ff, /* src_mask */
804 0x040f70ff, /* dst_mask */
805 true), /* pcrel_offset */
806
807 HOWTO (R_ARM_THM_JUMP19, /* type */
808 1, /* rightshift */
809 2, /* size (0 = byte, 1 = short, 2 = long) */
810 19, /* bitsize */
811 true, /* pc_relative */
812 0, /* bitpos */
813 complain_overflow_signed,/* complain_on_overflow */
814 bfd_elf_generic_reloc, /* special_function */
815 "R_ARM_THM_JUMP19", /* name */
816 false, /* partial_inplace */
817 0x043f2fff, /* src_mask */
818 0x043f2fff, /* dst_mask */
819 true), /* pcrel_offset */
820
821 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* rightshift */
823 1, /* size (0 = byte, 1 = short, 2 = long) */
824 6, /* bitsize */
825 true, /* pc_relative */
826 0, /* bitpos */
827 complain_overflow_unsigned,/* complain_on_overflow */
828 bfd_elf_generic_reloc, /* special_function */
829 "R_ARM_THM_JUMP6", /* name */
830 false, /* partial_inplace */
831 0x02f8, /* src_mask */
832 0x02f8, /* dst_mask */
833 true), /* pcrel_offset */
834
835 /* These are declared as 13-bit signed relocations because we can
836 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 versa. */
838 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 0, /* rightshift */
840 2, /* size (0 = byte, 1 = short, 2 = long) */
841 13, /* bitsize */
842 true, /* pc_relative */
843 0, /* bitpos */
844 complain_overflow_dont,/* complain_on_overflow */
845 bfd_elf_generic_reloc, /* special_function */
846 "R_ARM_THM_ALU_PREL_11_0",/* name */
847 false, /* partial_inplace */
848 0xffffffff, /* src_mask */
849 0xffffffff, /* dst_mask */
850 true), /* pcrel_offset */
851
852 HOWTO (R_ARM_THM_PC12, /* type */
853 0, /* rightshift */
854 2, /* size (0 = byte, 1 = short, 2 = long) */
855 13, /* bitsize */
856 true, /* pc_relative */
857 0, /* bitpos */
858 complain_overflow_dont,/* complain_on_overflow */
859 bfd_elf_generic_reloc, /* special_function */
860 "R_ARM_THM_PC12", /* name */
861 false, /* partial_inplace */
862 0xffffffff, /* src_mask */
863 0xffffffff, /* dst_mask */
864 true), /* pcrel_offset */
865
866 HOWTO (R_ARM_ABS32_NOI, /* type */
867 0, /* rightshift */
868 2, /* size (0 = byte, 1 = short, 2 = long) */
869 32, /* bitsize */
870 false, /* pc_relative */
871 0, /* bitpos */
872 complain_overflow_dont,/* complain_on_overflow */
873 bfd_elf_generic_reloc, /* special_function */
874 "R_ARM_ABS32_NOI", /* name */
875 false, /* partial_inplace */
876 0xffffffff, /* src_mask */
877 0xffffffff, /* dst_mask */
878 false), /* pcrel_offset */
879
880 HOWTO (R_ARM_REL32_NOI, /* type */
881 0, /* rightshift */
882 2, /* size (0 = byte, 1 = short, 2 = long) */
883 32, /* bitsize */
884 true, /* pc_relative */
885 0, /* bitpos */
886 complain_overflow_dont,/* complain_on_overflow */
887 bfd_elf_generic_reloc, /* special_function */
888 "R_ARM_REL32_NOI", /* name */
889 false, /* partial_inplace */
890 0xffffffff, /* src_mask */
891 0xffffffff, /* dst_mask */
892 false), /* pcrel_offset */
893
894 /* Group relocations. */
895
896 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 0, /* rightshift */
898 2, /* size (0 = byte, 1 = short, 2 = long) */
899 32, /* bitsize */
900 true, /* pc_relative */
901 0, /* bitpos */
902 complain_overflow_dont,/* complain_on_overflow */
903 bfd_elf_generic_reloc, /* special_function */
904 "R_ARM_ALU_PC_G0_NC", /* name */
905 false, /* partial_inplace */
906 0xffffffff, /* src_mask */
907 0xffffffff, /* dst_mask */
908 true), /* pcrel_offset */
909
910 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 0, /* rightshift */
912 2, /* size (0 = byte, 1 = short, 2 = long) */
913 32, /* bitsize */
914 true, /* pc_relative */
915 0, /* bitpos */
916 complain_overflow_dont,/* complain_on_overflow */
917 bfd_elf_generic_reloc, /* special_function */
918 "R_ARM_ALU_PC_G0", /* name */
919 false, /* partial_inplace */
920 0xffffffff, /* src_mask */
921 0xffffffff, /* dst_mask */
922 true), /* pcrel_offset */
923
924 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 0, /* rightshift */
926 2, /* size (0 = byte, 1 = short, 2 = long) */
927 32, /* bitsize */
928 true, /* pc_relative */
929 0, /* bitpos */
930 complain_overflow_dont,/* complain_on_overflow */
931 bfd_elf_generic_reloc, /* special_function */
932 "R_ARM_ALU_PC_G1_NC", /* name */
933 false, /* partial_inplace */
934 0xffffffff, /* src_mask */
935 0xffffffff, /* dst_mask */
936 true), /* pcrel_offset */
937
938 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 0, /* rightshift */
940 2, /* size (0 = byte, 1 = short, 2 = long) */
941 32, /* bitsize */
942 true, /* pc_relative */
943 0, /* bitpos */
944 complain_overflow_dont,/* complain_on_overflow */
945 bfd_elf_generic_reloc, /* special_function */
946 "R_ARM_ALU_PC_G1", /* name */
947 false, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 true), /* pcrel_offset */
951
952 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 0, /* rightshift */
954 2, /* size (0 = byte, 1 = short, 2 = long) */
955 32, /* bitsize */
956 true, /* pc_relative */
957 0, /* bitpos */
958 complain_overflow_dont,/* complain_on_overflow */
959 bfd_elf_generic_reloc, /* special_function */
960 "R_ARM_ALU_PC_G2", /* name */
961 false, /* partial_inplace */
962 0xffffffff, /* src_mask */
963 0xffffffff, /* dst_mask */
964 true), /* pcrel_offset */
965
966 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 0, /* rightshift */
968 2, /* size (0 = byte, 1 = short, 2 = long) */
969 32, /* bitsize */
970 true, /* pc_relative */
971 0, /* bitpos */
972 complain_overflow_dont,/* complain_on_overflow */
973 bfd_elf_generic_reloc, /* special_function */
974 "R_ARM_LDR_PC_G1", /* name */
975 false, /* partial_inplace */
976 0xffffffff, /* src_mask */
977 0xffffffff, /* dst_mask */
978 true), /* pcrel_offset */
979
980 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 0, /* rightshift */
982 2, /* size (0 = byte, 1 = short, 2 = long) */
983 32, /* bitsize */
984 true, /* pc_relative */
985 0, /* bitpos */
986 complain_overflow_dont,/* complain_on_overflow */
987 bfd_elf_generic_reloc, /* special_function */
988 "R_ARM_LDR_PC_G2", /* name */
989 false, /* partial_inplace */
990 0xffffffff, /* src_mask */
991 0xffffffff, /* dst_mask */
992 true), /* pcrel_offset */
993
994 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 0, /* rightshift */
996 2, /* size (0 = byte, 1 = short, 2 = long) */
997 32, /* bitsize */
998 true, /* pc_relative */
999 0, /* bitpos */
1000 complain_overflow_dont,/* complain_on_overflow */
1001 bfd_elf_generic_reloc, /* special_function */
1002 "R_ARM_LDRS_PC_G0", /* name */
1003 false, /* partial_inplace */
1004 0xffffffff, /* src_mask */
1005 0xffffffff, /* dst_mask */
1006 true), /* pcrel_offset */
1007
1008 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 0, /* rightshift */
1010 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 32, /* bitsize */
1012 true, /* pc_relative */
1013 0, /* bitpos */
1014 complain_overflow_dont,/* complain_on_overflow */
1015 bfd_elf_generic_reloc, /* special_function */
1016 "R_ARM_LDRS_PC_G1", /* name */
1017 false, /* partial_inplace */
1018 0xffffffff, /* src_mask */
1019 0xffffffff, /* dst_mask */
1020 true), /* pcrel_offset */
1021
1022 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 0, /* rightshift */
1024 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 32, /* bitsize */
1026 true, /* pc_relative */
1027 0, /* bitpos */
1028 complain_overflow_dont,/* complain_on_overflow */
1029 bfd_elf_generic_reloc, /* special_function */
1030 "R_ARM_LDRS_PC_G2", /* name */
1031 false, /* partial_inplace */
1032 0xffffffff, /* src_mask */
1033 0xffffffff, /* dst_mask */
1034 true), /* pcrel_offset */
1035
1036 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 0, /* rightshift */
1038 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 32, /* bitsize */
1040 true, /* pc_relative */
1041 0, /* bitpos */
1042 complain_overflow_dont,/* complain_on_overflow */
1043 bfd_elf_generic_reloc, /* special_function */
1044 "R_ARM_LDC_PC_G0", /* name */
1045 false, /* partial_inplace */
1046 0xffffffff, /* src_mask */
1047 0xffffffff, /* dst_mask */
1048 true), /* pcrel_offset */
1049
1050 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 0, /* rightshift */
1052 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 32, /* bitsize */
1054 true, /* pc_relative */
1055 0, /* bitpos */
1056 complain_overflow_dont,/* complain_on_overflow */
1057 bfd_elf_generic_reloc, /* special_function */
1058 "R_ARM_LDC_PC_G1", /* name */
1059 false, /* partial_inplace */
1060 0xffffffff, /* src_mask */
1061 0xffffffff, /* dst_mask */
1062 true), /* pcrel_offset */
1063
1064 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 0, /* rightshift */
1066 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 32, /* bitsize */
1068 true, /* pc_relative */
1069 0, /* bitpos */
1070 complain_overflow_dont,/* complain_on_overflow */
1071 bfd_elf_generic_reloc, /* special_function */
1072 "R_ARM_LDC_PC_G2", /* name */
1073 false, /* partial_inplace */
1074 0xffffffff, /* src_mask */
1075 0xffffffff, /* dst_mask */
1076 true), /* pcrel_offset */
1077
1078 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 0, /* rightshift */
1080 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 32, /* bitsize */
1082 true, /* pc_relative */
1083 0, /* bitpos */
1084 complain_overflow_dont,/* complain_on_overflow */
1085 bfd_elf_generic_reloc, /* special_function */
1086 "R_ARM_ALU_SB_G0_NC", /* name */
1087 false, /* partial_inplace */
1088 0xffffffff, /* src_mask */
1089 0xffffffff, /* dst_mask */
1090 true), /* pcrel_offset */
1091
1092 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 0, /* rightshift */
1094 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 32, /* bitsize */
1096 true, /* pc_relative */
1097 0, /* bitpos */
1098 complain_overflow_dont,/* complain_on_overflow */
1099 bfd_elf_generic_reloc, /* special_function */
1100 "R_ARM_ALU_SB_G0", /* name */
1101 false, /* partial_inplace */
1102 0xffffffff, /* src_mask */
1103 0xffffffff, /* dst_mask */
1104 true), /* pcrel_offset */
1105
1106 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 0, /* rightshift */
1108 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 32, /* bitsize */
1110 true, /* pc_relative */
1111 0, /* bitpos */
1112 complain_overflow_dont,/* complain_on_overflow */
1113 bfd_elf_generic_reloc, /* special_function */
1114 "R_ARM_ALU_SB_G1_NC", /* name */
1115 false, /* partial_inplace */
1116 0xffffffff, /* src_mask */
1117 0xffffffff, /* dst_mask */
1118 true), /* pcrel_offset */
1119
1120 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 0, /* rightshift */
1122 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 32, /* bitsize */
1124 true, /* pc_relative */
1125 0, /* bitpos */
1126 complain_overflow_dont,/* complain_on_overflow */
1127 bfd_elf_generic_reloc, /* special_function */
1128 "R_ARM_ALU_SB_G1", /* name */
1129 false, /* partial_inplace */
1130 0xffffffff, /* src_mask */
1131 0xffffffff, /* dst_mask */
1132 true), /* pcrel_offset */
1133
1134 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 0, /* rightshift */
1136 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 32, /* bitsize */
1138 true, /* pc_relative */
1139 0, /* bitpos */
1140 complain_overflow_dont,/* complain_on_overflow */
1141 bfd_elf_generic_reloc, /* special_function */
1142 "R_ARM_ALU_SB_G2", /* name */
1143 false, /* partial_inplace */
1144 0xffffffff, /* src_mask */
1145 0xffffffff, /* dst_mask */
1146 true), /* pcrel_offset */
1147
1148 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 0, /* rightshift */
1150 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 32, /* bitsize */
1152 true, /* pc_relative */
1153 0, /* bitpos */
1154 complain_overflow_dont,/* complain_on_overflow */
1155 bfd_elf_generic_reloc, /* special_function */
1156 "R_ARM_LDR_SB_G0", /* name */
1157 false, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 true), /* pcrel_offset */
1161
1162 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 0, /* rightshift */
1164 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 32, /* bitsize */
1166 true, /* pc_relative */
1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 bfd_elf_generic_reloc, /* special_function */
1170 "R_ARM_LDR_SB_G1", /* name */
1171 false, /* partial_inplace */
1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
1174 true), /* pcrel_offset */
1175
1176 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 0, /* rightshift */
1178 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 32, /* bitsize */
1180 true, /* pc_relative */
1181 0, /* bitpos */
1182 complain_overflow_dont,/* complain_on_overflow */
1183 bfd_elf_generic_reloc, /* special_function */
1184 "R_ARM_LDR_SB_G2", /* name */
1185 false, /* partial_inplace */
1186 0xffffffff, /* src_mask */
1187 0xffffffff, /* dst_mask */
1188 true), /* pcrel_offset */
1189
1190 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 0, /* rightshift */
1192 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 32, /* bitsize */
1194 true, /* pc_relative */
1195 0, /* bitpos */
1196 complain_overflow_dont,/* complain_on_overflow */
1197 bfd_elf_generic_reloc, /* special_function */
1198 "R_ARM_LDRS_SB_G0", /* name */
1199 false, /* partial_inplace */
1200 0xffffffff, /* src_mask */
1201 0xffffffff, /* dst_mask */
1202 true), /* pcrel_offset */
1203
1204 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 0, /* rightshift */
1206 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 32, /* bitsize */
1208 true, /* pc_relative */
1209 0, /* bitpos */
1210 complain_overflow_dont,/* complain_on_overflow */
1211 bfd_elf_generic_reloc, /* special_function */
1212 "R_ARM_LDRS_SB_G1", /* name */
1213 false, /* partial_inplace */
1214 0xffffffff, /* src_mask */
1215 0xffffffff, /* dst_mask */
1216 true), /* pcrel_offset */
1217
1218 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 0, /* rightshift */
1220 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 32, /* bitsize */
1222 true, /* pc_relative */
1223 0, /* bitpos */
1224 complain_overflow_dont,/* complain_on_overflow */
1225 bfd_elf_generic_reloc, /* special_function */
1226 "R_ARM_LDRS_SB_G2", /* name */
1227 false, /* partial_inplace */
1228 0xffffffff, /* src_mask */
1229 0xffffffff, /* dst_mask */
1230 true), /* pcrel_offset */
1231
1232 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 0, /* rightshift */
1234 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 32, /* bitsize */
1236 true, /* pc_relative */
1237 0, /* bitpos */
1238 complain_overflow_dont,/* complain_on_overflow */
1239 bfd_elf_generic_reloc, /* special_function */
1240 "R_ARM_LDC_SB_G0", /* name */
1241 false, /* partial_inplace */
1242 0xffffffff, /* src_mask */
1243 0xffffffff, /* dst_mask */
1244 true), /* pcrel_offset */
1245
1246 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 0, /* rightshift */
1248 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 32, /* bitsize */
1250 true, /* pc_relative */
1251 0, /* bitpos */
1252 complain_overflow_dont,/* complain_on_overflow */
1253 bfd_elf_generic_reloc, /* special_function */
1254 "R_ARM_LDC_SB_G1", /* name */
1255 false, /* partial_inplace */
1256 0xffffffff, /* src_mask */
1257 0xffffffff, /* dst_mask */
1258 true), /* pcrel_offset */
1259
1260 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 0, /* rightshift */
1262 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 32, /* bitsize */
1264 true, /* pc_relative */
1265 0, /* bitpos */
1266 complain_overflow_dont,/* complain_on_overflow */
1267 bfd_elf_generic_reloc, /* special_function */
1268 "R_ARM_LDC_SB_G2", /* name */
1269 false, /* partial_inplace */
1270 0xffffffff, /* src_mask */
1271 0xffffffff, /* dst_mask */
1272 true), /* pcrel_offset */
1273
1274 /* End of group relocations. */
1275
1276 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 0, /* rightshift */
1278 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 16, /* bitsize */
1280 false, /* pc_relative */
1281 0, /* bitpos */
1282 complain_overflow_dont,/* complain_on_overflow */
1283 bfd_elf_generic_reloc, /* special_function */
1284 "R_ARM_MOVW_BREL_NC", /* name */
1285 false, /* partial_inplace */
1286 0x0000ffff, /* src_mask */
1287 0x0000ffff, /* dst_mask */
1288 false), /* pcrel_offset */
1289
1290 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 0, /* rightshift */
1292 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 16, /* bitsize */
1294 false, /* pc_relative */
1295 0, /* bitpos */
1296 complain_overflow_bitfield,/* complain_on_overflow */
1297 bfd_elf_generic_reloc, /* special_function */
1298 "R_ARM_MOVT_BREL", /* name */
1299 false, /* partial_inplace */
1300 0x0000ffff, /* src_mask */
1301 0x0000ffff, /* dst_mask */
1302 false), /* pcrel_offset */
1303
1304 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 0, /* rightshift */
1306 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 16, /* bitsize */
1308 false, /* pc_relative */
1309 0, /* bitpos */
1310 complain_overflow_dont,/* complain_on_overflow */
1311 bfd_elf_generic_reloc, /* special_function */
1312 "R_ARM_MOVW_BREL", /* name */
1313 false, /* partial_inplace */
1314 0x0000ffff, /* src_mask */
1315 0x0000ffff, /* dst_mask */
1316 false), /* pcrel_offset */
1317
1318 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 0, /* rightshift */
1320 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 16, /* bitsize */
1322 false, /* pc_relative */
1323 0, /* bitpos */
1324 complain_overflow_dont,/* complain_on_overflow */
1325 bfd_elf_generic_reloc, /* special_function */
1326 "R_ARM_THM_MOVW_BREL_NC",/* name */
1327 false, /* partial_inplace */
1328 0x040f70ff, /* src_mask */
1329 0x040f70ff, /* dst_mask */
1330 false), /* pcrel_offset */
1331
1332 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 0, /* rightshift */
1334 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 16, /* bitsize */
1336 false, /* pc_relative */
1337 0, /* bitpos */
1338 complain_overflow_bitfield,/* complain_on_overflow */
1339 bfd_elf_generic_reloc, /* special_function */
1340 "R_ARM_THM_MOVT_BREL", /* name */
1341 false, /* partial_inplace */
1342 0x040f70ff, /* src_mask */
1343 0x040f70ff, /* dst_mask */
1344 false), /* pcrel_offset */
1345
1346 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 0, /* rightshift */
1348 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 16, /* bitsize */
1350 false, /* pc_relative */
1351 0, /* bitpos */
1352 complain_overflow_dont,/* complain_on_overflow */
1353 bfd_elf_generic_reloc, /* special_function */
1354 "R_ARM_THM_MOVW_BREL", /* name */
1355 false, /* partial_inplace */
1356 0x040f70ff, /* src_mask */
1357 0x040f70ff, /* dst_mask */
1358 false), /* pcrel_offset */
1359
1360 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 0, /* rightshift */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 32, /* bitsize */
1364 false, /* pc_relative */
1365 0, /* bitpos */
1366 complain_overflow_bitfield,/* complain_on_overflow */
1367 NULL, /* special_function */
1368 "R_ARM_TLS_GOTDESC", /* name */
1369 true, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 false), /* pcrel_offset */
1373
1374 HOWTO (R_ARM_TLS_CALL, /* type */
1375 0, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 24, /* bitsize */
1378 false, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_TLS_CALL", /* name */
1383 false, /* partial_inplace */
1384 0x00ffffff, /* src_mask */
1385 0x00ffffff, /* dst_mask */
1386 false), /* pcrel_offset */
1387
1388 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 0, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 0, /* bitsize */
1392 false, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont,/* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_TLS_DESCSEQ", /* name */
1397 false, /* partial_inplace */
1398 0x00000000, /* src_mask */
1399 0x00000000, /* dst_mask */
1400 false), /* pcrel_offset */
1401
1402 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 0, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 24, /* bitsize */
1406 false, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_dont,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_THM_TLS_CALL", /* name */
1411 false, /* partial_inplace */
1412 0x07ff07ff, /* src_mask */
1413 0x07ff07ff, /* dst_mask */
1414 false), /* pcrel_offset */
1415
1416 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 32, /* bitsize */
1420 false, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_dont,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_PLT32_ABS", /* name */
1425 false, /* partial_inplace */
1426 0xffffffff, /* src_mask */
1427 0xffffffff, /* dst_mask */
1428 false), /* pcrel_offset */
1429
1430 HOWTO (R_ARM_GOT_ABS, /* type */
1431 0, /* rightshift */
1432 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 32, /* bitsize */
1434 false, /* pc_relative */
1435 0, /* bitpos */
1436 complain_overflow_dont,/* complain_on_overflow */
1437 bfd_elf_generic_reloc, /* special_function */
1438 "R_ARM_GOT_ABS", /* name */
1439 false, /* partial_inplace */
1440 0xffffffff, /* src_mask */
1441 0xffffffff, /* dst_mask */
1442 false), /* pcrel_offset */
1443
1444 HOWTO (R_ARM_GOT_PREL, /* type */
1445 0, /* rightshift */
1446 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 32, /* bitsize */
1448 true, /* pc_relative */
1449 0, /* bitpos */
1450 complain_overflow_dont, /* complain_on_overflow */
1451 bfd_elf_generic_reloc, /* special_function */
1452 "R_ARM_GOT_PREL", /* name */
1453 false, /* partial_inplace */
1454 0xffffffff, /* src_mask */
1455 0xffffffff, /* dst_mask */
1456 true), /* pcrel_offset */
1457
1458 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 0, /* rightshift */
1460 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 12, /* bitsize */
1462 false, /* pc_relative */
1463 0, /* bitpos */
1464 complain_overflow_bitfield,/* complain_on_overflow */
1465 bfd_elf_generic_reloc, /* special_function */
1466 "R_ARM_GOT_BREL12", /* name */
1467 false, /* partial_inplace */
1468 0x00000fff, /* src_mask */
1469 0x00000fff, /* dst_mask */
1470 false), /* pcrel_offset */
1471
1472 HOWTO (R_ARM_GOTOFF12, /* type */
1473 0, /* rightshift */
1474 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 12, /* bitsize */
1476 false, /* pc_relative */
1477 0, /* bitpos */
1478 complain_overflow_bitfield,/* complain_on_overflow */
1479 bfd_elf_generic_reloc, /* special_function */
1480 "R_ARM_GOTOFF12", /* name */
1481 false, /* partial_inplace */
1482 0x00000fff, /* src_mask */
1483 0x00000fff, /* dst_mask */
1484 false), /* pcrel_offset */
1485
1486 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487
1488 /* GNU extension to record C++ vtable member usage */
1489 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 0, /* rightshift */
1491 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 0, /* bitsize */
1493 false, /* pc_relative */
1494 0, /* bitpos */
1495 complain_overflow_dont, /* complain_on_overflow */
1496 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1497 "R_ARM_GNU_VTENTRY", /* name */
1498 false, /* partial_inplace */
1499 0, /* src_mask */
1500 0, /* dst_mask */
1501 false), /* pcrel_offset */
1502
1503 /* GNU extension to record C++ vtable hierarchy */
1504 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 0, /* rightshift */
1506 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 0, /* bitsize */
1508 false, /* pc_relative */
1509 0, /* bitpos */
1510 complain_overflow_dont, /* complain_on_overflow */
1511 NULL, /* special_function */
1512 "R_ARM_GNU_VTINHERIT", /* name */
1513 false, /* partial_inplace */
1514 0, /* src_mask */
1515 0, /* dst_mask */
1516 false), /* pcrel_offset */
1517
1518 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* rightshift */
1520 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 11, /* bitsize */
1522 true, /* pc_relative */
1523 0, /* bitpos */
1524 complain_overflow_signed, /* complain_on_overflow */
1525 bfd_elf_generic_reloc, /* special_function */
1526 "R_ARM_THM_JUMP11", /* name */
1527 false, /* partial_inplace */
1528 0x000007ff, /* src_mask */
1529 0x000007ff, /* dst_mask */
1530 true), /* pcrel_offset */
1531
1532 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* rightshift */
1534 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 8, /* bitsize */
1536 true, /* pc_relative */
1537 0, /* bitpos */
1538 complain_overflow_signed, /* complain_on_overflow */
1539 bfd_elf_generic_reloc, /* special_function */
1540 "R_ARM_THM_JUMP8", /* name */
1541 false, /* partial_inplace */
1542 0x000000ff, /* src_mask */
1543 0x000000ff, /* dst_mask */
1544 true), /* pcrel_offset */
1545
1546 /* TLS relocations */
1547 HOWTO (R_ARM_TLS_GD32, /* type */
1548 0, /* rightshift */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 32, /* bitsize */
1551 false, /* pc_relative */
1552 0, /* bitpos */
1553 complain_overflow_bitfield,/* complain_on_overflow */
1554 NULL, /* special_function */
1555 "R_ARM_TLS_GD32", /* name */
1556 true, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 false), /* pcrel_offset */
1560
1561 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 0, /* rightshift */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 32, /* bitsize */
1565 false, /* pc_relative */
1566 0, /* bitpos */
1567 complain_overflow_bitfield,/* complain_on_overflow */
1568 bfd_elf_generic_reloc, /* special_function */
1569 "R_ARM_TLS_LDM32", /* name */
1570 true, /* partial_inplace */
1571 0xffffffff, /* src_mask */
1572 0xffffffff, /* dst_mask */
1573 false), /* pcrel_offset */
1574
1575 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 0, /* rightshift */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 32, /* bitsize */
1579 false, /* pc_relative */
1580 0, /* bitpos */
1581 complain_overflow_bitfield,/* complain_on_overflow */
1582 bfd_elf_generic_reloc, /* special_function */
1583 "R_ARM_TLS_LDO32", /* name */
1584 true, /* partial_inplace */
1585 0xffffffff, /* src_mask */
1586 0xffffffff, /* dst_mask */
1587 false), /* pcrel_offset */
1588
1589 HOWTO (R_ARM_TLS_IE32, /* type */
1590 0, /* rightshift */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 32, /* bitsize */
1593 false, /* pc_relative */
1594 0, /* bitpos */
1595 complain_overflow_bitfield,/* complain_on_overflow */
1596 NULL, /* special_function */
1597 "R_ARM_TLS_IE32", /* name */
1598 true, /* partial_inplace */
1599 0xffffffff, /* src_mask */
1600 0xffffffff, /* dst_mask */
1601 false), /* pcrel_offset */
1602
1603 HOWTO (R_ARM_TLS_LE32, /* type */
1604 0, /* rightshift */
1605 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 32, /* bitsize */
1607 false, /* pc_relative */
1608 0, /* bitpos */
1609 complain_overflow_bitfield,/* complain_on_overflow */
1610 NULL, /* special_function */
1611 "R_ARM_TLS_LE32", /* name */
1612 true, /* partial_inplace */
1613 0xffffffff, /* src_mask */
1614 0xffffffff, /* dst_mask */
1615 false), /* pcrel_offset */
1616
1617 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 0, /* rightshift */
1619 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 12, /* bitsize */
1621 false, /* pc_relative */
1622 0, /* bitpos */
1623 complain_overflow_bitfield,/* complain_on_overflow */
1624 bfd_elf_generic_reloc, /* special_function */
1625 "R_ARM_TLS_LDO12", /* name */
1626 false, /* partial_inplace */
1627 0x00000fff, /* src_mask */
1628 0x00000fff, /* dst_mask */
1629 false), /* pcrel_offset */
1630
1631 HOWTO (R_ARM_TLS_LE12, /* type */
1632 0, /* rightshift */
1633 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 12, /* bitsize */
1635 false, /* pc_relative */
1636 0, /* bitpos */
1637 complain_overflow_bitfield,/* complain_on_overflow */
1638 bfd_elf_generic_reloc, /* special_function */
1639 "R_ARM_TLS_LE12", /* name */
1640 false, /* partial_inplace */
1641 0x00000fff, /* src_mask */
1642 0x00000fff, /* dst_mask */
1643 false), /* pcrel_offset */
1644
1645 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 0, /* rightshift */
1647 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 12, /* bitsize */
1649 false, /* pc_relative */
1650 0, /* bitpos */
1651 complain_overflow_bitfield,/* complain_on_overflow */
1652 bfd_elf_generic_reloc, /* special_function */
1653 "R_ARM_TLS_IE12GP", /* name */
1654 false, /* partial_inplace */
1655 0x00000fff, /* src_mask */
1656 0x00000fff, /* dst_mask */
1657 false), /* pcrel_offset */
1658
1659 /* 112-127 private relocations. */
1660 EMPTY_HOWTO (112),
1661 EMPTY_HOWTO (113),
1662 EMPTY_HOWTO (114),
1663 EMPTY_HOWTO (115),
1664 EMPTY_HOWTO (116),
1665 EMPTY_HOWTO (117),
1666 EMPTY_HOWTO (118),
1667 EMPTY_HOWTO (119),
1668 EMPTY_HOWTO (120),
1669 EMPTY_HOWTO (121),
1670 EMPTY_HOWTO (122),
1671 EMPTY_HOWTO (123),
1672 EMPTY_HOWTO (124),
1673 EMPTY_HOWTO (125),
1674 EMPTY_HOWTO (126),
1675 EMPTY_HOWTO (127),
1676
1677 /* R_ARM_ME_TOO, obsolete. */
1678 EMPTY_HOWTO (128),
1679
1680 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 0, /* rightshift */
1682 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 0, /* bitsize */
1684 false, /* pc_relative */
1685 0, /* bitpos */
1686 complain_overflow_dont,/* complain_on_overflow */
1687 bfd_elf_generic_reloc, /* special_function */
1688 "R_ARM_THM_TLS_DESCSEQ",/* name */
1689 false, /* partial_inplace */
1690 0x00000000, /* src_mask */
1691 0x00000000, /* dst_mask */
1692 false), /* pcrel_offset */
1693 EMPTY_HOWTO (130),
1694 EMPTY_HOWTO (131),
1695 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1696 0, /* rightshift. */
1697 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 16, /* bitsize. */
1699 false, /* pc_relative. */
1700 0, /* bitpos. */
1701 complain_overflow_bitfield,/* complain_on_overflow. */
1702 bfd_elf_generic_reloc, /* special_function. */
1703 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1704 false, /* partial_inplace. */
1705 0x00000000, /* src_mask. */
1706 0x00000000, /* dst_mask. */
1707 false), /* pcrel_offset. */
1708 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1709 0, /* rightshift. */
1710 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 16, /* bitsize. */
1712 false, /* pc_relative. */
1713 0, /* bitpos. */
1714 complain_overflow_bitfield,/* complain_on_overflow. */
1715 bfd_elf_generic_reloc, /* special_function. */
1716 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1717 false, /* partial_inplace. */
1718 0x00000000, /* src_mask. */
1719 0x00000000, /* dst_mask. */
1720 false), /* pcrel_offset. */
1721 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1722 0, /* rightshift. */
1723 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 16, /* bitsize. */
1725 false, /* pc_relative. */
1726 0, /* bitpos. */
1727 complain_overflow_bitfield,/* complain_on_overflow. */
1728 bfd_elf_generic_reloc, /* special_function. */
1729 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1730 false, /* partial_inplace. */
1731 0x00000000, /* src_mask. */
1732 0x00000000, /* dst_mask. */
1733 false), /* pcrel_offset. */
1734 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1735 0, /* rightshift. */
1736 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 16, /* bitsize. */
1738 false, /* pc_relative. */
1739 0, /* bitpos. */
1740 complain_overflow_bitfield,/* complain_on_overflow. */
1741 bfd_elf_generic_reloc, /* special_function. */
1742 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1743 false, /* partial_inplace. */
1744 0x00000000, /* src_mask. */
1745 0x00000000, /* dst_mask. */
1746 false), /* pcrel_offset. */
1747 /* Relocations for Armv8.1-M Mainline. */
1748 HOWTO (R_ARM_THM_BF16, /* type. */
1749 0, /* rightshift. */
1750 1, /* size (0 = byte, 1 = short, 2 = long). */
1751 16, /* bitsize. */
1752 true, /* pc_relative. */
1753 0, /* bitpos. */
1754 complain_overflow_dont,/* do not complain_on_overflow. */
1755 bfd_elf_generic_reloc, /* special_function. */
1756 "R_ARM_THM_BF16", /* name. */
1757 false, /* partial_inplace. */
1758 0x001f0ffe, /* src_mask. */
1759 0x001f0ffe, /* dst_mask. */
1760 true), /* pcrel_offset. */
1761 HOWTO (R_ARM_THM_BF12, /* type. */
1762 0, /* rightshift. */
1763 1, /* size (0 = byte, 1 = short, 2 = long). */
1764 12, /* bitsize. */
1765 true, /* pc_relative. */
1766 0, /* bitpos. */
1767 complain_overflow_dont,/* do not complain_on_overflow. */
1768 bfd_elf_generic_reloc, /* special_function. */
1769 "R_ARM_THM_BF12", /* name. */
1770 false, /* partial_inplace. */
1771 0x00010ffe, /* src_mask. */
1772 0x00010ffe, /* dst_mask. */
1773 true), /* pcrel_offset. */
1774 HOWTO (R_ARM_THM_BF18, /* type. */
1775 0, /* rightshift. */
1776 1, /* size (0 = byte, 1 = short, 2 = long). */
1777 18, /* bitsize. */
1778 true, /* pc_relative. */
1779 0, /* bitpos. */
1780 complain_overflow_dont,/* do not complain_on_overflow. */
1781 bfd_elf_generic_reloc, /* special_function. */
1782 "R_ARM_THM_BF18", /* name. */
1783 false, /* partial_inplace. */
1784 0x007f0ffe, /* src_mask. */
1785 0x007f0ffe, /* dst_mask. */
1786 true), /* pcrel_offset. */
1787 };
1788
1789 /* 160 onwards: */
1790 static reloc_howto_type elf32_arm_howto_table_2[8] =
1791 {
1792 HOWTO (R_ARM_IRELATIVE, /* type */
1793 0, /* rightshift */
1794 2, /* size (0 = byte, 1 = short, 2 = long) */
1795 32, /* bitsize */
1796 false, /* pc_relative */
1797 0, /* bitpos */
1798 complain_overflow_bitfield,/* complain_on_overflow */
1799 bfd_elf_generic_reloc, /* special_function */
1800 "R_ARM_IRELATIVE", /* name */
1801 true, /* partial_inplace */
1802 0xffffffff, /* src_mask */
1803 0xffffffff, /* dst_mask */
1804 false), /* pcrel_offset */
1805 HOWTO (R_ARM_GOTFUNCDESC, /* type */
1806 0, /* rightshift */
1807 2, /* size (0 = byte, 1 = short, 2 = long) */
1808 32, /* bitsize */
1809 false, /* pc_relative */
1810 0, /* bitpos */
1811 complain_overflow_bitfield,/* complain_on_overflow */
1812 bfd_elf_generic_reloc, /* special_function */
1813 "R_ARM_GOTFUNCDESC", /* name */
1814 false, /* partial_inplace */
1815 0, /* src_mask */
1816 0xffffffff, /* dst_mask */
1817 false), /* pcrel_offset */
1818 HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */
1819 0, /* rightshift */
1820 2, /* size (0 = byte, 1 = short, 2 = long) */
1821 32, /* bitsize */
1822 false, /* pc_relative */
1823 0, /* bitpos */
1824 complain_overflow_bitfield,/* complain_on_overflow */
1825 bfd_elf_generic_reloc, /* special_function */
1826 "R_ARM_GOTOFFFUNCDESC",/* name */
1827 false, /* partial_inplace */
1828 0, /* src_mask */
1829 0xffffffff, /* dst_mask */
1830 false), /* pcrel_offset */
1831 HOWTO (R_ARM_FUNCDESC, /* type */
1832 0, /* rightshift */
1833 2, /* size (0 = byte, 1 = short, 2 = long) */
1834 32, /* bitsize */
1835 false, /* pc_relative */
1836 0, /* bitpos */
1837 complain_overflow_bitfield,/* complain_on_overflow */
1838 bfd_elf_generic_reloc, /* special_function */
1839 "R_ARM_FUNCDESC", /* name */
1840 false, /* partial_inplace */
1841 0, /* src_mask */
1842 0xffffffff, /* dst_mask */
1843 false), /* pcrel_offset */
1844 HOWTO (R_ARM_FUNCDESC_VALUE, /* type */
1845 0, /* rightshift */
1846 2, /* size (0 = byte, 1 = short, 2 = long) */
1847 64, /* bitsize */
1848 false, /* pc_relative */
1849 0, /* bitpos */
1850 complain_overflow_bitfield,/* complain_on_overflow */
1851 bfd_elf_generic_reloc, /* special_function */
1852 "R_ARM_FUNCDESC_VALUE",/* name */
1853 false, /* partial_inplace */
1854 0, /* src_mask */
1855 0xffffffff, /* dst_mask */
1856 false), /* pcrel_offset */
1857 HOWTO (R_ARM_TLS_GD32_FDPIC, /* type */
1858 0, /* rightshift */
1859 2, /* size (0 = byte, 1 = short, 2 = long) */
1860 32, /* bitsize */
1861 false, /* pc_relative */
1862 0, /* bitpos */
1863 complain_overflow_bitfield,/* complain_on_overflow */
1864 bfd_elf_generic_reloc, /* special_function */
1865 "R_ARM_TLS_GD32_FDPIC",/* name */
1866 false, /* partial_inplace */
1867 0, /* src_mask */
1868 0xffffffff, /* dst_mask */
1869 false), /* pcrel_offset */
1870 HOWTO (R_ARM_TLS_LDM32_FDPIC, /* type */
1871 0, /* rightshift */
1872 2, /* size (0 = byte, 1 = short, 2 = long) */
1873 32, /* bitsize */
1874 false, /* pc_relative */
1875 0, /* bitpos */
1876 complain_overflow_bitfield,/* complain_on_overflow */
1877 bfd_elf_generic_reloc, /* special_function */
1878 "R_ARM_TLS_LDM32_FDPIC",/* name */
1879 false, /* partial_inplace */
1880 0, /* src_mask */
1881 0xffffffff, /* dst_mask */
1882 false), /* pcrel_offset */
1883 HOWTO (R_ARM_TLS_IE32_FDPIC, /* type */
1884 0, /* rightshift */
1885 2, /* size (0 = byte, 1 = short, 2 = long) */
1886 32, /* bitsize */
1887 false, /* pc_relative */
1888 0, /* bitpos */
1889 complain_overflow_bitfield,/* complain_on_overflow */
1890 bfd_elf_generic_reloc, /* special_function */
1891 "R_ARM_TLS_IE32_FDPIC",/* name */
1892 false, /* partial_inplace */
1893 0, /* src_mask */
1894 0xffffffff, /* dst_mask */
1895 false), /* pcrel_offset */
1896 };
1897
1898 /* 249-255 extended, currently unused, relocations: */
1899 static reloc_howto_type elf32_arm_howto_table_3[4] =
1900 {
1901 HOWTO (R_ARM_RREL32, /* type */
1902 0, /* rightshift */
1903 0, /* size (0 = byte, 1 = short, 2 = long) */
1904 0, /* bitsize */
1905 false, /* pc_relative */
1906 0, /* bitpos */
1907 complain_overflow_dont,/* complain_on_overflow */
1908 bfd_elf_generic_reloc, /* special_function */
1909 "R_ARM_RREL32", /* name */
1910 false, /* partial_inplace */
1911 0, /* src_mask */
1912 0, /* dst_mask */
1913 false), /* pcrel_offset */
1914
1915 HOWTO (R_ARM_RABS32, /* type */
1916 0, /* rightshift */
1917 0, /* size (0 = byte, 1 = short, 2 = long) */
1918 0, /* bitsize */
1919 false, /* pc_relative */
1920 0, /* bitpos */
1921 complain_overflow_dont,/* complain_on_overflow */
1922 bfd_elf_generic_reloc, /* special_function */
1923 "R_ARM_RABS32", /* name */
1924 false, /* partial_inplace */
1925 0, /* src_mask */
1926 0, /* dst_mask */
1927 false), /* pcrel_offset */
1928
1929 HOWTO (R_ARM_RPC24, /* type */
1930 0, /* rightshift */
1931 0, /* size (0 = byte, 1 = short, 2 = long) */
1932 0, /* bitsize */
1933 false, /* pc_relative */
1934 0, /* bitpos */
1935 complain_overflow_dont,/* complain_on_overflow */
1936 bfd_elf_generic_reloc, /* special_function */
1937 "R_ARM_RPC24", /* name */
1938 false, /* partial_inplace */
1939 0, /* src_mask */
1940 0, /* dst_mask */
1941 false), /* pcrel_offset */
1942
1943 HOWTO (R_ARM_RBASE, /* type */
1944 0, /* rightshift */
1945 0, /* size (0 = byte, 1 = short, 2 = long) */
1946 0, /* bitsize */
1947 false, /* pc_relative */
1948 0, /* bitpos */
1949 complain_overflow_dont,/* complain_on_overflow */
1950 bfd_elf_generic_reloc, /* special_function */
1951 "R_ARM_RBASE", /* name */
1952 false, /* partial_inplace */
1953 0, /* src_mask */
1954 0, /* dst_mask */
1955 false) /* pcrel_offset */
1956 };
1957
1958 static reloc_howto_type *
1959 elf32_arm_howto_from_type (unsigned int r_type)
1960 {
1961 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1962 return &elf32_arm_howto_table_1[r_type];
1963
1964 if (r_type >= R_ARM_IRELATIVE
1965 && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2))
1966 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1967
1968 if (r_type >= R_ARM_RREL32
1969 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1970 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1971
1972 return NULL;
1973 }
1974
1975 static bool
1976 elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc,
1977 Elf_Internal_Rela * elf_reloc)
1978 {
1979 unsigned int r_type;
1980
1981 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1982 if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL)
1983 {
1984 /* xgettext:c-format */
1985 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1986 abfd, r_type);
1987 bfd_set_error (bfd_error_bad_value);
1988 return false;
1989 }
1990 return true;
1991 }
1992
1993 struct elf32_arm_reloc_map
1994 {
1995 bfd_reloc_code_real_type bfd_reloc_val;
1996 unsigned char elf_reloc_val;
1997 };
1998
1999 /* All entries in this list must also be present in elf32_arm_howto_table. */
2000 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
2001 {
2002 {BFD_RELOC_NONE, R_ARM_NONE},
2003 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
2004 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
2005 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
2006 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
2007 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
2008 {BFD_RELOC_32, R_ARM_ABS32},
2009 {BFD_RELOC_32_PCREL, R_ARM_REL32},
2010 {BFD_RELOC_8, R_ARM_ABS8},
2011 {BFD_RELOC_16, R_ARM_ABS16},
2012 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
2013 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
2014 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
2015 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
2016 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
2017 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
2018 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
2019 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
2020 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
2021 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
2022 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
2023 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
2024 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
2025 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
2026 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
2027 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
2028 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
2029 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
2030 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
2031 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
2032 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
2033 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
2034 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
2035 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
2036 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
2037 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
2038 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
2039 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
2040 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
2041 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
2042 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
2043 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
2044 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
2045 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
2046 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
2047 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
2048 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
2049 {BFD_RELOC_ARM_GOTFUNCDESC, R_ARM_GOTFUNCDESC},
2050 {BFD_RELOC_ARM_GOTOFFFUNCDESC, R_ARM_GOTOFFFUNCDESC},
2051 {BFD_RELOC_ARM_FUNCDESC, R_ARM_FUNCDESC},
2052 {BFD_RELOC_ARM_FUNCDESC_VALUE, R_ARM_FUNCDESC_VALUE},
2053 {BFD_RELOC_ARM_TLS_GD32_FDPIC, R_ARM_TLS_GD32_FDPIC},
2054 {BFD_RELOC_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_LDM32_FDPIC},
2055 {BFD_RELOC_ARM_TLS_IE32_FDPIC, R_ARM_TLS_IE32_FDPIC},
2056 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
2057 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
2058 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
2059 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
2060 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
2061 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
2062 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
2063 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
2064 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
2065 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
2066 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
2067 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
2068 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
2069 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
2070 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
2071 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
2072 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
2073 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
2074 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
2075 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
2076 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
2077 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
2078 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
2079 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
2080 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
2081 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
2082 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
2083 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
2084 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
2085 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
2086 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
2087 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
2088 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
2089 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
2090 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
2091 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
2092 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
2093 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
2094 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
2095 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
2096 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
2097 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
2098 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC},
2099 {BFD_RELOC_ARM_THUMB_BF17, R_ARM_THM_BF16},
2100 {BFD_RELOC_ARM_THUMB_BF13, R_ARM_THM_BF12},
2101 {BFD_RELOC_ARM_THUMB_BF19, R_ARM_THM_BF18}
2102 };
2103
2104 static reloc_howto_type *
2105 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2106 bfd_reloc_code_real_type code)
2107 {
2108 unsigned int i;
2109
2110 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
2111 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
2112 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
2113
2114 return NULL;
2115 }
2116
2117 static reloc_howto_type *
2118 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2119 const char *r_name)
2120 {
2121 unsigned int i;
2122
2123 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
2124 if (elf32_arm_howto_table_1[i].name != NULL
2125 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
2126 return &elf32_arm_howto_table_1[i];
2127
2128 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
2129 if (elf32_arm_howto_table_2[i].name != NULL
2130 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
2131 return &elf32_arm_howto_table_2[i];
2132
2133 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
2134 if (elf32_arm_howto_table_3[i].name != NULL
2135 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
2136 return &elf32_arm_howto_table_3[i];
2137
2138 return NULL;
2139 }
2140
2141 /* Support for core dump NOTE sections. */
2142
2143 static bool
2144 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2145 {
2146 int offset;
2147 size_t size;
2148
2149 switch (note->descsz)
2150 {
2151 default:
2152 return false;
2153
2154 case 148: /* Linux/ARM 32-bit. */
2155 /* pr_cursig */
2156 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2157
2158 /* pr_pid */
2159 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2160
2161 /* pr_reg */
2162 offset = 72;
2163 size = 72;
2164
2165 break;
2166 }
2167
2168 /* Make a ".reg/999" section. */
2169 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2170 size, note->descpos + offset);
2171 }
2172
2173 static bool
2174 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2175 {
2176 switch (note->descsz)
2177 {
2178 default:
2179 return false;
2180
2181 case 124: /* Linux/ARM elf_prpsinfo. */
2182 elf_tdata (abfd)->core->pid
2183 = bfd_get_32 (abfd, note->descdata + 12);
2184 elf_tdata (abfd)->core->program
2185 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2186 elf_tdata (abfd)->core->command
2187 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2188 }
2189
2190 /* Note that for some reason, a spurious space is tacked
2191 onto the end of the args in some (at least one anyway)
2192 implementations, so strip it off if it exists. */
2193 {
2194 char *command = elf_tdata (abfd)->core->command;
2195 int n = strlen (command);
2196
2197 if (0 < n && command[n - 1] == ' ')
2198 command[n - 1] = '\0';
2199 }
2200
2201 return true;
2202 }
2203
2204 static char *
2205 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2206 int note_type, ...)
2207 {
2208 switch (note_type)
2209 {
2210 default:
2211 return NULL;
2212
2213 case NT_PRPSINFO:
2214 {
2215 char data[124] ATTRIBUTE_NONSTRING;
2216 va_list ap;
2217
2218 va_start (ap, note_type);
2219 memset (data, 0, sizeof (data));
2220 strncpy (data + 28, va_arg (ap, const char *), 16);
2221 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2222 DIAGNOSTIC_PUSH;
2223 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
2224 -Wstringop-truncation:
2225 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
2226 */
2227 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
2228 #endif
2229 strncpy (data + 44, va_arg (ap, const char *), 80);
2230 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2231 DIAGNOSTIC_POP;
2232 #endif
2233 va_end (ap);
2234
2235 return elfcore_write_note (abfd, buf, bufsiz,
2236 "CORE", note_type, data, sizeof (data));
2237 }
2238
2239 case NT_PRSTATUS:
2240 {
2241 char data[148];
2242 va_list ap;
2243 long pid;
2244 int cursig;
2245 const void *greg;
2246
2247 va_start (ap, note_type);
2248 memset (data, 0, sizeof (data));
2249 pid = va_arg (ap, long);
2250 bfd_put_32 (abfd, pid, data + 24);
2251 cursig = va_arg (ap, int);
2252 bfd_put_16 (abfd, cursig, data + 12);
2253 greg = va_arg (ap, const void *);
2254 memcpy (data + 72, greg, 72);
2255 va_end (ap);
2256
2257 return elfcore_write_note (abfd, buf, bufsiz,
2258 "CORE", note_type, data, sizeof (data));
2259 }
2260 }
2261 }
2262
2263 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2264 #define TARGET_LITTLE_NAME "elf32-littlearm"
2265 #define TARGET_BIG_SYM arm_elf32_be_vec
2266 #define TARGET_BIG_NAME "elf32-bigarm"
2267
2268 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2269 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2270 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2271
2272 typedef unsigned long int insn32;
2273 typedef unsigned short int insn16;
2274
2275 /* In lieu of proper flags, assume all EABIv4 or later objects are
2276 interworkable. */
2277 #define INTERWORK_FLAG(abfd) \
2278 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2279 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2280 || ((abfd)->flags & BFD_LINKER_CREATED))
2281
2282 /* The linker script knows the section names for placement.
2283 The entry_names are used to do simple name mangling on the stubs.
2284 Given a function name, and its type, the stub can be found. The
2285 name can be changed. The only requirement is the %s be present. */
2286 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2287 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2288
2289 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2290 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2291
2292 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2293 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2294
2295 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2296 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2297
2298 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2299 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2300
2301 #define STUB_ENTRY_NAME "__%s_veneer"
2302
2303 #define CMSE_PREFIX "__acle_se_"
2304
2305 #define CMSE_STUB_NAME ".gnu.sgstubs"
2306
2307 /* The name of the dynamic interpreter. This is put in the .interp
2308 section. */
2309 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2310
2311 /* FDPIC default stack size. */
2312 #define DEFAULT_STACK_SIZE 0x8000
2313
2314 static const unsigned long tls_trampoline [] =
2315 {
2316 0xe08e0000, /* add r0, lr, r0 */
2317 0xe5901004, /* ldr r1, [r0,#4] */
2318 0xe12fff11, /* bx r1 */
2319 };
2320
2321 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2322 {
2323 0xe52d2004, /* push {r2} */
2324 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2325 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2326 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2327 0xe081100f, /* 2: add r1, pc */
2328 0xe12fff12, /* bx r2 */
2329 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2330 + dl_tlsdesc_lazy_resolver(GOT) */
2331 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2332 };
2333
2334 /* NOTE: [Thumb nop sequence]
2335 When adding code that transitions from Thumb to Arm the instruction that
2336 should be used for the alignment padding should be 0xe7fd (b .-2) instead of
2337 a nop for performance reasons. */
2338
2339 /* ARM FDPIC PLT entry. */
2340 /* The last 5 words contain PLT lazy fragment code and data. */
2341 static const bfd_vma elf32_arm_fdpic_plt_entry [] =
2342 {
2343 0xe59fc008, /* ldr r12, .L1 */
2344 0xe08cc009, /* add r12, r12, r9 */
2345 0xe59c9004, /* ldr r9, [r12, #4] */
2346 0xe59cf000, /* ldr pc, [r12] */
2347 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */
2348 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */
2349 0xe51fc00c, /* ldr r12, [pc, #-12] */
2350 0xe92d1000, /* push {r12} */
2351 0xe599c004, /* ldr r12, [r9, #4] */
2352 0xe599f000, /* ldr pc, [r9] */
2353 };
2354
2355 /* Thumb FDPIC PLT entry. */
2356 /* The last 5 words contain PLT lazy fragment code and data. */
2357 static const bfd_vma elf32_arm_fdpic_thumb_plt_entry [] =
2358 {
2359 0xc00cf8df, /* ldr.w r12, .L1 */
2360 0x0c09eb0c, /* add.w r12, r12, r9 */
2361 0x9004f8dc, /* ldr.w r9, [r12, #4] */
2362 0xf000f8dc, /* ldr.w pc, [r12] */
2363 0x00000000, /* .L1 .word foo(GOTOFFFUNCDESC) */
2364 0x00000000, /* .L2 .word foo(funcdesc_value_reloc_offset) */
2365 0xc008f85f, /* ldr.w r12, .L2 */
2366 0xcd04f84d, /* push {r12} */
2367 0xc004f8d9, /* ldr.w r12, [r9, #4] */
2368 0xf000f8d9, /* ldr.w pc, [r9] */
2369 };
2370
2371 #ifdef FOUR_WORD_PLT
2372
2373 /* The first entry in a procedure linkage table looks like
2374 this. It is set up so that any shared library function that is
2375 called before the relocation has been set up calls the dynamic
2376 linker first. */
2377 static const bfd_vma elf32_arm_plt0_entry [] =
2378 {
2379 0xe52de004, /* str lr, [sp, #-4]! */
2380 0xe59fe010, /* ldr lr, [pc, #16] */
2381 0xe08fe00e, /* add lr, pc, lr */
2382 0xe5bef008, /* ldr pc, [lr, #8]! */
2383 };
2384
2385 /* Subsequent entries in a procedure linkage table look like
2386 this. */
2387 static const bfd_vma elf32_arm_plt_entry [] =
2388 {
2389 0xe28fc600, /* add ip, pc, #NN */
2390 0xe28cca00, /* add ip, ip, #NN */
2391 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2392 0x00000000, /* unused */
2393 };
2394
2395 #else /* not FOUR_WORD_PLT */
2396
2397 /* The first entry in a procedure linkage table looks like
2398 this. It is set up so that any shared library function that is
2399 called before the relocation has been set up calls the dynamic
2400 linker first. */
2401 static const bfd_vma elf32_arm_plt0_entry [] =
2402 {
2403 0xe52de004, /* str lr, [sp, #-4]! */
2404 0xe59fe004, /* ldr lr, [pc, #4] */
2405 0xe08fe00e, /* add lr, pc, lr */
2406 0xe5bef008, /* ldr pc, [lr, #8]! */
2407 0x00000000, /* &GOT[0] - . */
2408 };
2409
2410 /* By default subsequent entries in a procedure linkage table look like
2411 this. Offsets that don't fit into 28 bits will cause link error. */
2412 static const bfd_vma elf32_arm_plt_entry_short [] =
2413 {
2414 0xe28fc600, /* add ip, pc, #0xNN00000 */
2415 0xe28cca00, /* add ip, ip, #0xNN000 */
2416 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2417 };
2418
2419 /* When explicitly asked, we'll use this "long" entry format
2420 which can cope with arbitrary displacements. */
2421 static const bfd_vma elf32_arm_plt_entry_long [] =
2422 {
2423 0xe28fc200, /* add ip, pc, #0xN0000000 */
2424 0xe28cc600, /* add ip, ip, #0xNN00000 */
2425 0xe28cca00, /* add ip, ip, #0xNN000 */
2426 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2427 };
2428
2429 static bool elf32_arm_use_long_plt_entry = false;
2430
2431 #endif /* not FOUR_WORD_PLT */
2432
2433 /* The first entry in a procedure linkage table looks like this.
2434 It is set up so that any shared library function that is called before the
2435 relocation has been set up calls the dynamic linker first. */
2436 static const bfd_vma elf32_thumb2_plt0_entry [] =
2437 {
2438 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2439 an instruction maybe encoded to one or two array elements. */
2440 0xf8dfb500, /* push {lr} */
2441 0x44fee008, /* ldr.w lr, [pc, #8] */
2442 /* add lr, pc */
2443 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2444 0x00000000, /* &GOT[0] - . */
2445 };
2446
2447 /* Subsequent entries in a procedure linkage table for thumb only target
2448 look like this. */
2449 static const bfd_vma elf32_thumb2_plt_entry [] =
2450 {
2451 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2452 an instruction maybe encoded to one or two array elements. */
2453 0x0c00f240, /* movw ip, #0xNNNN */
2454 0x0c00f2c0, /* movt ip, #0xNNNN */
2455 0xf8dc44fc, /* add ip, pc */
2456 0xe7fcf000 /* ldr.w pc, [ip] */
2457 /* b .-4 */
2458 };
2459
2460 /* The format of the first entry in the procedure linkage table
2461 for a VxWorks executable. */
2462 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2463 {
2464 0xe52dc008, /* str ip,[sp,#-8]! */
2465 0xe59fc000, /* ldr ip,[pc] */
2466 0xe59cf008, /* ldr pc,[ip,#8] */
2467 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2468 };
2469
2470 /* The format of subsequent entries in a VxWorks executable. */
2471 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2472 {
2473 0xe59fc000, /* ldr ip,[pc] */
2474 0xe59cf000, /* ldr pc,[ip] */
2475 0x00000000, /* .long @got */
2476 0xe59fc000, /* ldr ip,[pc] */
2477 0xea000000, /* b _PLT */
2478 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2479 };
2480
2481 /* The format of entries in a VxWorks shared library. */
2482 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2483 {
2484 0xe59fc000, /* ldr ip,[pc] */
2485 0xe79cf009, /* ldr pc,[ip,r9] */
2486 0x00000000, /* .long @got */
2487 0xe59fc000, /* ldr ip,[pc] */
2488 0xe599f008, /* ldr pc,[r9,#8] */
2489 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2490 };
2491
2492 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2493 #define PLT_THUMB_STUB_SIZE 4
2494 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2495 {
2496 0x4778, /* bx pc */
2497 0xe7fd /* b .-2 */
2498 };
2499
2500 /* The first entry in a procedure linkage table looks like
2501 this. It is set up so that any shared library function that is
2502 called before the relocation has been set up calls the dynamic
2503 linker first. */
2504 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2505 {
2506 /* First bundle: */
2507 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2508 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2509 0xe08cc00f, /* add ip, ip, pc */
2510 0xe52dc008, /* str ip, [sp, #-8]! */
2511 /* Second bundle: */
2512 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2513 0xe59cc000, /* ldr ip, [ip] */
2514 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2515 0xe12fff1c, /* bx ip */
2516 /* Third bundle: */
2517 0xe320f000, /* nop */
2518 0xe320f000, /* nop */
2519 0xe320f000, /* nop */
2520 /* .Lplt_tail: */
2521 0xe50dc004, /* str ip, [sp, #-4] */
2522 /* Fourth bundle: */
2523 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2524 0xe59cc000, /* ldr ip, [ip] */
2525 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2526 0xe12fff1c, /* bx ip */
2527 };
2528 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2529
2530 /* Subsequent entries in a procedure linkage table look like this. */
2531 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2532 {
2533 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2534 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2535 0xe08cc00f, /* add ip, ip, pc */
2536 0xea000000, /* b .Lplt_tail */
2537 };
2538
2539 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2540 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2541 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2542 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2543 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2544 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2545 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2546 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2547
2548 enum stub_insn_type
2549 {
2550 THUMB16_TYPE = 1,
2551 THUMB32_TYPE,
2552 ARM_TYPE,
2553 DATA_TYPE
2554 };
2555
2556 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2557 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2558 is inserted in arm_build_one_stub(). */
2559 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2560 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2561 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2562 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2563 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2564 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2565 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2566 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2567
2568 typedef struct
2569 {
2570 bfd_vma data;
2571 enum stub_insn_type type;
2572 unsigned int r_type;
2573 int reloc_addend;
2574 } insn_sequence;
2575
2576 /* See note [Thumb nop sequence] when adding a veneer. */
2577
2578 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2579 to reach the stub if necessary. */
2580 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2581 {
2582 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2583 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2584 };
2585
2586 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2587 available. */
2588 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2589 {
2590 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2591 ARM_INSN (0xe12fff1c), /* bx ip */
2592 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2593 };
2594
2595 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2596 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2597 {
2598 THUMB16_INSN (0xb401), /* push {r0} */
2599 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2600 THUMB16_INSN (0x4684), /* mov ip, r0 */
2601 THUMB16_INSN (0xbc01), /* pop {r0} */
2602 THUMB16_INSN (0x4760), /* bx ip */
2603 THUMB16_INSN (0xbf00), /* nop */
2604 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2605 };
2606
2607 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2608 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2609 {
2610 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2611 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2612 };
2613
2614 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2615 M-profile architectures. */
2616 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2617 {
2618 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2619 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2620 THUMB16_INSN (0x4760), /* bx ip */
2621 };
2622
2623 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2624 allowed. */
2625 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2626 {
2627 THUMB16_INSN (0x4778), /* bx pc */
2628 THUMB16_INSN (0xe7fd), /* b .-2 */
2629 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2630 ARM_INSN (0xe12fff1c), /* bx ip */
2631 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2632 };
2633
2634 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2635 available. */
2636 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2637 {
2638 THUMB16_INSN (0x4778), /* bx pc */
2639 THUMB16_INSN (0xe7fd), /* b .-2 */
2640 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2641 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2642 };
2643
2644 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2645 one, when the destination is close enough. */
2646 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2647 {
2648 THUMB16_INSN (0x4778), /* bx pc */
2649 THUMB16_INSN (0xe7fd), /* b .-2 */
2650 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2651 };
2652
2653 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2654 blx to reach the stub if necessary. */
2655 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2656 {
2657 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2658 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2659 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2660 };
2661
2662 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2663 blx to reach the stub if necessary. We can not add into pc;
2664 it is not guaranteed to mode switch (different in ARMv6 and
2665 ARMv7). */
2666 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2667 {
2668 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2669 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2670 ARM_INSN (0xe12fff1c), /* bx ip */
2671 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2672 };
2673
2674 /* V4T ARM -> ARM long branch stub, PIC. */
2675 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2676 {
2677 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2678 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2679 ARM_INSN (0xe12fff1c), /* bx ip */
2680 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2681 };
2682
2683 /* V4T Thumb -> ARM long branch stub, PIC. */
2684 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2685 {
2686 THUMB16_INSN (0x4778), /* bx pc */
2687 THUMB16_INSN (0xe7fd), /* b .-2 */
2688 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2689 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2690 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2691 };
2692
2693 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2694 architectures. */
2695 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2696 {
2697 THUMB16_INSN (0xb401), /* push {r0} */
2698 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2699 THUMB16_INSN (0x46fc), /* mov ip, pc */
2700 THUMB16_INSN (0x4484), /* add ip, r0 */
2701 THUMB16_INSN (0xbc01), /* pop {r0} */
2702 THUMB16_INSN (0x4760), /* bx ip */
2703 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2704 };
2705
2706 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2707 allowed. */
2708 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2709 {
2710 THUMB16_INSN (0x4778), /* bx pc */
2711 THUMB16_INSN (0xe7fd), /* b .-2 */
2712 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2713 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2714 ARM_INSN (0xe12fff1c), /* bx ip */
2715 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2716 };
2717
2718 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2719 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2720 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2721 {
2722 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2723 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2724 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2725 };
2726
2727 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2728 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2729 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2730 {
2731 THUMB16_INSN (0x4778), /* bx pc */
2732 THUMB16_INSN (0xe7fd), /* b .-2 */
2733 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2734 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2735 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2736 };
2737
2738 /* NaCl ARM -> ARM long branch stub. */
2739 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2740 {
2741 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2742 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2743 ARM_INSN (0xe12fff1c), /* bx ip */
2744 ARM_INSN (0xe320f000), /* nop */
2745 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2746 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2747 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2748 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2749 };
2750
2751 /* NaCl ARM -> ARM long branch stub, PIC. */
2752 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2753 {
2754 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2755 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2756 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2757 ARM_INSN (0xe12fff1c), /* bx ip */
2758 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2759 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2760 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2761 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2762 };
2763
2764 /* Stub used for transition to secure state (aka SG veneer). */
2765 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2766 {
2767 THUMB32_INSN (0xe97fe97f), /* sg. */
2768 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2769 };
2770
2771
2772 /* Cortex-A8 erratum-workaround stubs. */
2773
2774 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2775 can't use a conditional branch to reach this stub). */
2776
2777 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2778 {
2779 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2780 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2781 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2782 };
2783
2784 /* Stub used for b.w and bl.w instructions. */
2785
2786 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2787 {
2788 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2789 };
2790
2791 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2792 {
2793 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2794 };
2795
2796 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2797 instruction (which switches to ARM mode) to point to this stub. Jump to the
2798 real destination using an ARM-mode branch. */
2799
2800 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2801 {
2802 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2803 };
2804
2805 /* For each section group there can be a specially created linker section
2806 to hold the stubs for that group. The name of the stub section is based
2807 upon the name of another section within that group with the suffix below
2808 applied.
2809
2810 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2811 create what appeared to be a linker stub section when it actually
2812 contained user code/data. For example, consider this fragment:
2813
2814 const char * stubborn_problems[] = { "np" };
2815
2816 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2817 section called:
2818
2819 .data.rel.local.stubborn_problems
2820
2821 This then causes problems in arm32_arm_build_stubs() as it triggers:
2822
2823 // Ignore non-stub sections.
2824 if (!strstr (stub_sec->name, STUB_SUFFIX))
2825 continue;
2826
2827 And so the section would be ignored instead of being processed. Hence
2828 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2829 C identifier. */
2830 #define STUB_SUFFIX ".__stub"
2831
2832 /* One entry per long/short branch stub defined above. */
2833 #define DEF_STUBS \
2834 DEF_STUB (long_branch_any_any) \
2835 DEF_STUB (long_branch_v4t_arm_thumb) \
2836 DEF_STUB (long_branch_thumb_only) \
2837 DEF_STUB (long_branch_v4t_thumb_thumb) \
2838 DEF_STUB (long_branch_v4t_thumb_arm) \
2839 DEF_STUB (short_branch_v4t_thumb_arm) \
2840 DEF_STUB (long_branch_any_arm_pic) \
2841 DEF_STUB (long_branch_any_thumb_pic) \
2842 DEF_STUB (long_branch_v4t_thumb_thumb_pic) \
2843 DEF_STUB (long_branch_v4t_arm_thumb_pic) \
2844 DEF_STUB (long_branch_v4t_thumb_arm_pic) \
2845 DEF_STUB (long_branch_thumb_only_pic) \
2846 DEF_STUB (long_branch_any_tls_pic) \
2847 DEF_STUB (long_branch_v4t_thumb_tls_pic) \
2848 DEF_STUB (long_branch_arm_nacl) \
2849 DEF_STUB (long_branch_arm_nacl_pic) \
2850 DEF_STUB (cmse_branch_thumb_only) \
2851 DEF_STUB (a8_veneer_b_cond) \
2852 DEF_STUB (a8_veneer_b) \
2853 DEF_STUB (a8_veneer_bl) \
2854 DEF_STUB (a8_veneer_blx) \
2855 DEF_STUB (long_branch_thumb2_only) \
2856 DEF_STUB (long_branch_thumb2_only_pure)
2857
2858 #define DEF_STUB(x) arm_stub_##x,
2859 enum elf32_arm_stub_type
2860 {
2861 arm_stub_none,
2862 DEF_STUBS
2863 max_stub_type
2864 };
2865 #undef DEF_STUB
2866
2867 /* Note the first a8_veneer type. */
2868 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2869
2870 typedef struct
2871 {
2872 const insn_sequence* template_sequence;
2873 int template_size;
2874 } stub_def;
2875
2876 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2877 static const stub_def stub_definitions[] =
2878 {
2879 {NULL, 0},
2880 DEF_STUBS
2881 };
2882
2883 struct elf32_arm_stub_hash_entry
2884 {
2885 /* Base hash table entry structure. */
2886 struct bfd_hash_entry root;
2887
2888 /* The stub section. */
2889 asection *stub_sec;
2890
2891 /* Offset within stub_sec of the beginning of this stub. */
2892 bfd_vma stub_offset;
2893
2894 /* Given the symbol's value and its section we can determine its final
2895 value when building the stubs (so the stub knows where to jump). */
2896 bfd_vma target_value;
2897 asection *target_section;
2898
2899 /* Same as above but for the source of the branch to the stub. Used for
2900 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2901 such, source section does not need to be recorded since Cortex-A8 erratum
2902 workaround stubs are only generated when both source and target are in the
2903 same section. */
2904 bfd_vma source_value;
2905
2906 /* The instruction which caused this stub to be generated (only valid for
2907 Cortex-A8 erratum workaround stubs at present). */
2908 unsigned long orig_insn;
2909
2910 /* The stub type. */
2911 enum elf32_arm_stub_type stub_type;
2912 /* Its encoding size in bytes. */
2913 int stub_size;
2914 /* Its template. */
2915 const insn_sequence *stub_template;
2916 /* The size of the template (number of entries). */
2917 int stub_template_size;
2918
2919 /* The symbol table entry, if any, that this was derived from. */
2920 struct elf32_arm_link_hash_entry *h;
2921
2922 /* Type of branch. */
2923 enum arm_st_branch_type branch_type;
2924
2925 /* Where this stub is being called from, or, in the case of combined
2926 stub sections, the first input section in the group. */
2927 asection *id_sec;
2928
2929 /* The name for the local symbol at the start of this stub. The
2930 stub name in the hash table has to be unique; this does not, so
2931 it can be friendlier. */
2932 char *output_name;
2933 };
2934
2935 /* Used to build a map of a section. This is required for mixed-endian
2936 code/data. */
2937
2938 typedef struct elf32_elf_section_map
2939 {
2940 bfd_vma vma;
2941 char type;
2942 }
2943 elf32_arm_section_map;
2944
2945 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2946
2947 typedef enum
2948 {
2949 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2950 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2951 VFP11_ERRATUM_ARM_VENEER,
2952 VFP11_ERRATUM_THUMB_VENEER
2953 }
2954 elf32_vfp11_erratum_type;
2955
2956 typedef struct elf32_vfp11_erratum_list
2957 {
2958 struct elf32_vfp11_erratum_list *next;
2959 bfd_vma vma;
2960 union
2961 {
2962 struct
2963 {
2964 struct elf32_vfp11_erratum_list *veneer;
2965 unsigned int vfp_insn;
2966 } b;
2967 struct
2968 {
2969 struct elf32_vfp11_erratum_list *branch;
2970 unsigned int id;
2971 } v;
2972 } u;
2973 elf32_vfp11_erratum_type type;
2974 }
2975 elf32_vfp11_erratum_list;
2976
2977 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2978 veneer. */
2979 typedef enum
2980 {
2981 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2982 STM32L4XX_ERRATUM_VENEER
2983 }
2984 elf32_stm32l4xx_erratum_type;
2985
2986 typedef struct elf32_stm32l4xx_erratum_list
2987 {
2988 struct elf32_stm32l4xx_erratum_list *next;
2989 bfd_vma vma;
2990 union
2991 {
2992 struct
2993 {
2994 struct elf32_stm32l4xx_erratum_list *veneer;
2995 unsigned int insn;
2996 } b;
2997 struct
2998 {
2999 struct elf32_stm32l4xx_erratum_list *branch;
3000 unsigned int id;
3001 } v;
3002 } u;
3003 elf32_stm32l4xx_erratum_type type;
3004 }
3005 elf32_stm32l4xx_erratum_list;
3006
3007 typedef enum
3008 {
3009 DELETE_EXIDX_ENTRY,
3010 INSERT_EXIDX_CANTUNWIND_AT_END
3011 }
3012 arm_unwind_edit_type;
3013
3014 /* A (sorted) list of edits to apply to an unwind table. */
3015 typedef struct arm_unwind_table_edit
3016 {
3017 arm_unwind_edit_type type;
3018 /* Note: we sometimes want to insert an unwind entry corresponding to a
3019 section different from the one we're currently writing out, so record the
3020 (text) section this edit relates to here. */
3021 asection *linked_section;
3022 unsigned int index;
3023 struct arm_unwind_table_edit *next;
3024 }
3025 arm_unwind_table_edit;
3026
3027 typedef struct _arm_elf_section_data
3028 {
3029 /* Information about mapping symbols. */
3030 struct bfd_elf_section_data elf;
3031 unsigned int mapcount;
3032 unsigned int mapsize;
3033 elf32_arm_section_map *map;
3034 /* Information about CPU errata. */
3035 unsigned int erratumcount;
3036 elf32_vfp11_erratum_list *erratumlist;
3037 unsigned int stm32l4xx_erratumcount;
3038 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
3039 unsigned int additional_reloc_count;
3040 /* Information about unwind tables. */
3041 union
3042 {
3043 /* Unwind info attached to a text section. */
3044 struct
3045 {
3046 asection *arm_exidx_sec;
3047 } text;
3048
3049 /* Unwind info attached to an .ARM.exidx section. */
3050 struct
3051 {
3052 arm_unwind_table_edit *unwind_edit_list;
3053 arm_unwind_table_edit *unwind_edit_tail;
3054 } exidx;
3055 } u;
3056 }
3057 _arm_elf_section_data;
3058
3059 #define elf32_arm_section_data(sec) \
3060 ((_arm_elf_section_data *) elf_section_data (sec))
3061
3062 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
3063 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
3064 so may be created multiple times: we use an array of these entries whilst
3065 relaxing which we can refresh easily, then create stubs for each potentially
3066 erratum-triggering instruction once we've settled on a solution. */
3067
3068 struct a8_erratum_fix
3069 {
3070 bfd *input_bfd;
3071 asection *section;
3072 bfd_vma offset;
3073 bfd_vma target_offset;
3074 unsigned long orig_insn;
3075 char *stub_name;
3076 enum elf32_arm_stub_type stub_type;
3077 enum arm_st_branch_type branch_type;
3078 };
3079
3080 /* A table of relocs applied to branches which might trigger Cortex-A8
3081 erratum. */
3082
3083 struct a8_erratum_reloc
3084 {
3085 bfd_vma from;
3086 bfd_vma destination;
3087 struct elf32_arm_link_hash_entry *hash;
3088 const char *sym_name;
3089 unsigned int r_type;
3090 enum arm_st_branch_type branch_type;
3091 bool non_a8_stub;
3092 };
3093
3094 /* The size of the thread control block. */
3095 #define TCB_SIZE 8
3096
3097 /* ARM-specific information about a PLT entry, over and above the usual
3098 gotplt_union. */
3099 struct arm_plt_info
3100 {
3101 /* We reference count Thumb references to a PLT entry separately,
3102 so that we can emit the Thumb trampoline only if needed. */
3103 bfd_signed_vma thumb_refcount;
3104
3105 /* Some references from Thumb code may be eliminated by BL->BLX
3106 conversion, so record them separately. */
3107 bfd_signed_vma maybe_thumb_refcount;
3108
3109 /* How many of the recorded PLT accesses were from non-call relocations.
3110 This information is useful when deciding whether anything takes the
3111 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
3112 non-call references to the function should resolve directly to the
3113 real runtime target. */
3114 unsigned int noncall_refcount;
3115
3116 /* Since PLT entries have variable size if the Thumb prologue is
3117 used, we need to record the index into .got.plt instead of
3118 recomputing it from the PLT offset. */
3119 bfd_signed_vma got_offset;
3120 };
3121
3122 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
3123 struct arm_local_iplt_info
3124 {
3125 /* The information that is usually found in the generic ELF part of
3126 the hash table entry. */
3127 union gotplt_union root;
3128
3129 /* The information that is usually found in the ARM-specific part of
3130 the hash table entry. */
3131 struct arm_plt_info arm;
3132
3133 /* A list of all potential dynamic relocations against this symbol. */
3134 struct elf_dyn_relocs *dyn_relocs;
3135 };
3136
3137 /* Structure to handle FDPIC support for local functions. */
3138 struct fdpic_local
3139 {
3140 unsigned int funcdesc_cnt;
3141 unsigned int gotofffuncdesc_cnt;
3142 int funcdesc_offset;
3143 };
3144
3145 struct elf_arm_obj_tdata
3146 {
3147 struct elf_obj_tdata root;
3148
3149 /* Zero to warn when linking objects with incompatible enum sizes. */
3150 int no_enum_size_warning;
3151
3152 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3153 int no_wchar_size_warning;
3154
3155 /* tls_type for each local got entry. */
3156 char *local_got_tls_type;
3157
3158 /* GOTPLT entries for TLS descriptors. */
3159 bfd_vma *local_tlsdesc_gotent;
3160
3161 /* Information for local symbols that need entries in .iplt. */
3162 struct arm_local_iplt_info **local_iplt;
3163
3164 /* Maintains FDPIC counters and funcdesc info. */
3165 struct fdpic_local *local_fdpic_cnts;
3166 };
3167
3168 #define elf_arm_tdata(bfd) \
3169 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3170
3171 #define elf32_arm_local_got_tls_type(bfd) \
3172 (elf_arm_tdata (bfd)->local_got_tls_type)
3173
3174 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3175 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3176
3177 #define elf32_arm_local_iplt(bfd) \
3178 (elf_arm_tdata (bfd)->local_iplt)
3179
3180 #define elf32_arm_local_fdpic_cnts(bfd) \
3181 (elf_arm_tdata (bfd)->local_fdpic_cnts)
3182
3183 #define is_arm_elf(bfd) \
3184 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3185 && elf_tdata (bfd) != NULL \
3186 && elf_object_id (bfd) == ARM_ELF_DATA)
3187
3188 static bool
3189 elf32_arm_mkobject (bfd *abfd)
3190 {
3191 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
3192 ARM_ELF_DATA);
3193 }
3194
3195 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3196
3197 /* Structure to handle FDPIC support for extern functions. */
3198 struct fdpic_global {
3199 unsigned int gotofffuncdesc_cnt;
3200 unsigned int gotfuncdesc_cnt;
3201 unsigned int funcdesc_cnt;
3202 int funcdesc_offset;
3203 int gotfuncdesc_offset;
3204 };
3205
3206 /* Arm ELF linker hash entry. */
3207 struct elf32_arm_link_hash_entry
3208 {
3209 struct elf_link_hash_entry root;
3210
3211 /* ARM-specific PLT information. */
3212 struct arm_plt_info plt;
3213
3214 #define GOT_UNKNOWN 0
3215 #define GOT_NORMAL 1
3216 #define GOT_TLS_GD 2
3217 #define GOT_TLS_IE 4
3218 #define GOT_TLS_GDESC 8
3219 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3220 unsigned int tls_type : 8;
3221
3222 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3223 unsigned int is_iplt : 1;
3224
3225 unsigned int unused : 23;
3226
3227 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3228 starting at the end of the jump table. */
3229 bfd_vma tlsdesc_got;
3230
3231 /* The symbol marking the real symbol location for exported thumb
3232 symbols with Arm stubs. */
3233 struct elf_link_hash_entry *export_glue;
3234
3235 /* A pointer to the most recently used stub hash entry against this
3236 symbol. */
3237 struct elf32_arm_stub_hash_entry *stub_cache;
3238
3239 /* Counter for FDPIC relocations against this symbol. */
3240 struct fdpic_global fdpic_cnts;
3241 };
3242
3243 /* Traverse an arm ELF linker hash table. */
3244 #define elf32_arm_link_hash_traverse(table, func, info) \
3245 (elf_link_hash_traverse \
3246 (&(table)->root, \
3247 (bool (*) (struct elf_link_hash_entry *, void *)) (func), \
3248 (info)))
3249
3250 /* Get the ARM elf linker hash table from a link_info structure. */
3251 #define elf32_arm_hash_table(p) \
3252 ((is_elf_hash_table ((p)->hash) \
3253 && elf_hash_table_id (elf_hash_table (p)) == ARM_ELF_DATA) \
3254 ? (struct elf32_arm_link_hash_table *) (p)->hash : NULL)
3255
3256 #define arm_stub_hash_lookup(table, string, create, copy) \
3257 ((struct elf32_arm_stub_hash_entry *) \
3258 bfd_hash_lookup ((table), (string), (create), (copy)))
3259
3260 /* Array to keep track of which stub sections have been created, and
3261 information on stub grouping. */
3262 struct map_stub
3263 {
3264 /* This is the section to which stubs in the group will be
3265 attached. */
3266 asection *link_sec;
3267 /* The stub section. */
3268 asection *stub_sec;
3269 };
3270
3271 #define elf32_arm_compute_jump_table_size(htab) \
3272 ((htab)->next_tls_desc_index * 4)
3273
3274 /* ARM ELF linker hash table. */
3275 struct elf32_arm_link_hash_table
3276 {
3277 /* The main hash table. */
3278 struct elf_link_hash_table root;
3279
3280 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3281 bfd_size_type thumb_glue_size;
3282
3283 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3284 bfd_size_type arm_glue_size;
3285
3286 /* The size in bytes of section containing the ARMv4 BX veneers. */
3287 bfd_size_type bx_glue_size;
3288
3289 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3290 veneer has been populated. */
3291 bfd_vma bx_glue_offset[15];
3292
3293 /* The size in bytes of the section containing glue for VFP11 erratum
3294 veneers. */
3295 bfd_size_type vfp11_erratum_glue_size;
3296
3297 /* The size in bytes of the section containing glue for STM32L4XX erratum
3298 veneers. */
3299 bfd_size_type stm32l4xx_erratum_glue_size;
3300
3301 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3302 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3303 elf32_arm_write_section(). */
3304 struct a8_erratum_fix *a8_erratum_fixes;
3305 unsigned int num_a8_erratum_fixes;
3306
3307 /* An arbitrary input BFD chosen to hold the glue sections. */
3308 bfd * bfd_of_glue_owner;
3309
3310 /* Nonzero to output a BE8 image. */
3311 int byteswap_code;
3312
3313 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3314 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3315 int target1_is_rel;
3316
3317 /* The relocation to use for R_ARM_TARGET2 relocations. */
3318 int target2_reloc;
3319
3320 /* 0 = Ignore R_ARM_V4BX.
3321 1 = Convert BX to MOV PC.
3322 2 = Generate v4 interworing stubs. */
3323 int fix_v4bx;
3324
3325 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3326 int fix_cortex_a8;
3327
3328 /* Whether we should fix the ARM1176 BLX immediate issue. */
3329 int fix_arm1176;
3330
3331 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3332 int use_blx;
3333
3334 /* What sort of code sequences we should look for which may trigger the
3335 VFP11 denorm erratum. */
3336 bfd_arm_vfp11_fix vfp11_fix;
3337
3338 /* Global counter for the number of fixes we have emitted. */
3339 int num_vfp11_fixes;
3340
3341 /* What sort of code sequences we should look for which may trigger the
3342 STM32L4XX erratum. */
3343 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3344
3345 /* Global counter for the number of fixes we have emitted. */
3346 int num_stm32l4xx_fixes;
3347
3348 /* Nonzero to force PIC branch veneers. */
3349 int pic_veneer;
3350
3351 /* The number of bytes in the initial entry in the PLT. */
3352 bfd_size_type plt_header_size;
3353
3354 /* The number of bytes in the subsequent PLT etries. */
3355 bfd_size_type plt_entry_size;
3356
3357 /* True if the target uses REL relocations. */
3358 bool use_rel;
3359
3360 /* Nonzero if import library must be a secure gateway import library
3361 as per ARMv8-M Security Extensions. */
3362 int cmse_implib;
3363
3364 /* The import library whose symbols' address must remain stable in
3365 the import library generated. */
3366 bfd *in_implib_bfd;
3367
3368 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3369 bfd_vma next_tls_desc_index;
3370
3371 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3372 bfd_vma num_tls_desc;
3373
3374 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3375 asection *srelplt2;
3376
3377 /* Offset in .plt section of tls_arm_trampoline. */
3378 bfd_vma tls_trampoline;
3379
3380 /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
3381 union
3382 {
3383 bfd_signed_vma refcount;
3384 bfd_vma offset;
3385 } tls_ldm_got;
3386
3387 /* For convenience in allocate_dynrelocs. */
3388 bfd * obfd;
3389
3390 /* The amount of space used by the reserved portion of the sgotplt
3391 section, plus whatever space is used by the jump slots. */
3392 bfd_vma sgotplt_jump_table_size;
3393
3394 /* The stub hash table. */
3395 struct bfd_hash_table stub_hash_table;
3396
3397 /* Linker stub bfd. */
3398 bfd *stub_bfd;
3399
3400 /* Linker call-backs. */
3401 asection * (*add_stub_section) (const char *, asection *, asection *,
3402 unsigned int);
3403 void (*layout_sections_again) (void);
3404
3405 /* Array to keep track of which stub sections have been created, and
3406 information on stub grouping. */
3407 struct map_stub *stub_group;
3408
3409 /* Input stub section holding secure gateway veneers. */
3410 asection *cmse_stub_sec;
3411
3412 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3413 start to be allocated. */
3414 bfd_vma new_cmse_stub_offset;
3415
3416 /* Number of elements in stub_group. */
3417 unsigned int top_id;
3418
3419 /* Assorted information used by elf32_arm_size_stubs. */
3420 unsigned int bfd_count;
3421 unsigned int top_index;
3422 asection **input_list;
3423
3424 /* True if the target system uses FDPIC. */
3425 int fdpic_p;
3426
3427 /* Fixup section. Used for FDPIC. */
3428 asection *srofixup;
3429 };
3430
3431 /* Add an FDPIC read-only fixup. */
3432 static void
3433 arm_elf_add_rofixup (bfd *output_bfd, asection *srofixup, bfd_vma offset)
3434 {
3435 bfd_vma fixup_offset;
3436
3437 fixup_offset = srofixup->reloc_count++ * 4;
3438 BFD_ASSERT (fixup_offset < srofixup->size);
3439 bfd_put_32 (output_bfd, offset, srofixup->contents + fixup_offset);
3440 }
3441
3442 static inline int
3443 ctz (unsigned int mask)
3444 {
3445 #if GCC_VERSION >= 3004
3446 return __builtin_ctz (mask);
3447 #else
3448 unsigned int i;
3449
3450 for (i = 0; i < 8 * sizeof (mask); i++)
3451 {
3452 if (mask & 0x1)
3453 break;
3454 mask = (mask >> 1);
3455 }
3456 return i;
3457 #endif
3458 }
3459
3460 static inline int
3461 elf32_arm_popcount (unsigned int mask)
3462 {
3463 #if GCC_VERSION >= 3004
3464 return __builtin_popcount (mask);
3465 #else
3466 unsigned int i;
3467 int sum = 0;
3468
3469 for (i = 0; i < 8 * sizeof (mask); i++)
3470 {
3471 if (mask & 0x1)
3472 sum++;
3473 mask = (mask >> 1);
3474 }
3475 return sum;
3476 #endif
3477 }
3478
3479 static void elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
3480 asection *sreloc, Elf_Internal_Rela *rel);
3481
3482 static void
3483 arm_elf_fill_funcdesc (bfd *output_bfd,
3484 struct bfd_link_info *info,
3485 int *funcdesc_offset,
3486 int dynindx,
3487 int offset,
3488 bfd_vma addr,
3489 bfd_vma dynreloc_value,
3490 bfd_vma seg)
3491 {
3492 if ((*funcdesc_offset & 1) == 0)
3493 {
3494 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
3495 asection *sgot = globals->root.sgot;
3496
3497 if (bfd_link_pic (info))
3498 {
3499 asection *srelgot = globals->root.srelgot;
3500 Elf_Internal_Rela outrel;
3501
3502 outrel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
3503 outrel.r_offset = sgot->output_section->vma + sgot->output_offset + offset;
3504 outrel.r_addend = 0;
3505
3506 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
3507 bfd_put_32 (output_bfd, addr, sgot->contents + offset);
3508 bfd_put_32 (output_bfd, seg, sgot->contents + offset + 4);
3509 }
3510 else
3511 {
3512 struct elf_link_hash_entry *hgot = globals->root.hgot;
3513 bfd_vma got_value = hgot->root.u.def.value
3514 + hgot->root.u.def.section->output_section->vma
3515 + hgot->root.u.def.section->output_offset;
3516
3517 arm_elf_add_rofixup (output_bfd, globals->srofixup,
3518 sgot->output_section->vma + sgot->output_offset
3519 + offset);
3520 arm_elf_add_rofixup (output_bfd, globals->srofixup,
3521 sgot->output_section->vma + sgot->output_offset
3522 + offset + 4);
3523 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + offset);
3524 bfd_put_32 (output_bfd, got_value, sgot->contents + offset + 4);
3525 }
3526 *funcdesc_offset |= 1;
3527 }
3528 }
3529
3530 /* Create an entry in an ARM ELF linker hash table. */
3531
3532 static struct bfd_hash_entry *
3533 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3534 struct bfd_hash_table * table,
3535 const char * string)
3536 {
3537 struct elf32_arm_link_hash_entry * ret =
3538 (struct elf32_arm_link_hash_entry *) entry;
3539
3540 /* Allocate the structure if it has not already been allocated by a
3541 subclass. */
3542 if (ret == NULL)
3543 ret = (struct elf32_arm_link_hash_entry *)
3544 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3545 if (ret == NULL)
3546 return (struct bfd_hash_entry *) ret;
3547
3548 /* Call the allocation method of the superclass. */
3549 ret = ((struct elf32_arm_link_hash_entry *)
3550 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3551 table, string));
3552 if (ret != NULL)
3553 {
3554 ret->tls_type = GOT_UNKNOWN;
3555 ret->tlsdesc_got = (bfd_vma) -1;
3556 ret->plt.thumb_refcount = 0;
3557 ret->plt.maybe_thumb_refcount = 0;
3558 ret->plt.noncall_refcount = 0;
3559 ret->plt.got_offset = -1;
3560 ret->is_iplt = false;
3561 ret->export_glue = NULL;
3562
3563 ret->stub_cache = NULL;
3564
3565 ret->fdpic_cnts.gotofffuncdesc_cnt = 0;
3566 ret->fdpic_cnts.gotfuncdesc_cnt = 0;
3567 ret->fdpic_cnts.funcdesc_cnt = 0;
3568 ret->fdpic_cnts.funcdesc_offset = -1;
3569 ret->fdpic_cnts.gotfuncdesc_offset = -1;
3570 }
3571
3572 return (struct bfd_hash_entry *) ret;
3573 }
3574
3575 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3576 symbols. */
3577
3578 static bool
3579 elf32_arm_allocate_local_sym_info (bfd *abfd)
3580 {
3581 if (elf_local_got_refcounts (abfd) == NULL)
3582 {
3583 bfd_size_type num_syms;
3584 bfd_size_type size;
3585 char *data;
3586
3587 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3588 size = num_syms * (sizeof (bfd_signed_vma)
3589 + sizeof (bfd_vma)
3590 + sizeof (struct arm_local_iplt_info *)
3591 + sizeof (struct fdpic_local)
3592 + sizeof (char));
3593 data = bfd_zalloc (abfd, size);
3594 if (data == NULL)
3595 return false;
3596
3597 /* It is important that these all be allocated in descending
3598 order of required alignment, so that arrays allocated later
3599 will be sufficiently aligned. */
3600 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3601 data += num_syms * sizeof (bfd_signed_vma);
3602
3603 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3604 data += num_syms * sizeof (bfd_vma);
3605
3606 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3607 data += num_syms * sizeof (struct arm_local_iplt_info *);
3608
3609 elf32_arm_local_fdpic_cnts (abfd) = (struct fdpic_local *) data;
3610 data += num_syms * sizeof (struct fdpic_local);
3611
3612 elf32_arm_local_got_tls_type (abfd) = data;
3613 #if GCC_VERSION >= 3000
3614 BFD_ASSERT (__alignof__ (*elf32_arm_local_tlsdesc_gotent (abfd))
3615 <= __alignof__ (*elf_local_got_refcounts (abfd)));
3616 BFD_ASSERT (__alignof__ (*elf32_arm_local_iplt (abfd))
3617 <= __alignof__ (*elf32_arm_local_tlsdesc_gotent (abfd)));
3618 BFD_ASSERT (__alignof__ (*elf32_arm_local_fdpic_cnts (abfd))
3619 <= __alignof__ (*elf32_arm_local_iplt (abfd)));
3620 BFD_ASSERT (__alignof__ (*elf32_arm_local_got_tls_type (abfd))
3621 <= __alignof__ (*elf32_arm_local_fdpic_cnts (abfd)));
3622 #endif
3623 }
3624 return true;
3625 }
3626
3627 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3628 to input bfd ABFD. Create the information if it doesn't already exist.
3629 Return null if an allocation fails. */
3630
3631 static struct arm_local_iplt_info *
3632 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3633 {
3634 struct arm_local_iplt_info **ptr;
3635
3636 if (!elf32_arm_allocate_local_sym_info (abfd))
3637 return NULL;
3638
3639 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3640 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3641 if (*ptr == NULL)
3642 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3643 return *ptr;
3644 }
3645
3646 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3647 in ABFD's symbol table. If the symbol is global, H points to its
3648 hash table entry, otherwise H is null.
3649
3650 Return true if the symbol does have PLT information. When returning
3651 true, point *ROOT_PLT at the target-independent reference count/offset
3652 union and *ARM_PLT at the ARM-specific information. */
3653
3654 static bool
3655 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3656 struct elf32_arm_link_hash_entry *h,
3657 unsigned long r_symndx, union gotplt_union **root_plt,
3658 struct arm_plt_info **arm_plt)
3659 {
3660 struct arm_local_iplt_info *local_iplt;
3661
3662 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3663 return false;
3664
3665 if (h != NULL)
3666 {
3667 *root_plt = &h->root.plt;
3668 *arm_plt = &h->plt;
3669 return true;
3670 }
3671
3672 if (elf32_arm_local_iplt (abfd) == NULL)
3673 return false;
3674
3675 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3676 if (local_iplt == NULL)
3677 return false;
3678
3679 *root_plt = &local_iplt->root;
3680 *arm_plt = &local_iplt->arm;
3681 return true;
3682 }
3683
3684 static bool using_thumb_only (struct elf32_arm_link_hash_table *globals);
3685
3686 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3687 before it. */
3688
3689 static bool
3690 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3691 struct arm_plt_info *arm_plt)
3692 {
3693 struct elf32_arm_link_hash_table *htab;
3694
3695 htab = elf32_arm_hash_table (info);
3696
3697 return (!using_thumb_only (htab) && (arm_plt->thumb_refcount != 0
3698 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0)));
3699 }
3700
3701 /* Return a pointer to the head of the dynamic reloc list that should
3702 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3703 ABFD's symbol table. Return null if an error occurs. */
3704
3705 static struct elf_dyn_relocs **
3706 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3707 Elf_Internal_Sym *isym)
3708 {
3709 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3710 {
3711 struct arm_local_iplt_info *local_iplt;
3712
3713 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3714 if (local_iplt == NULL)
3715 return NULL;
3716 return &local_iplt->dyn_relocs;
3717 }
3718 else
3719 {
3720 /* Track dynamic relocs needed for local syms too.
3721 We really need local syms available to do this
3722 easily. Oh well. */
3723 asection *s;
3724 void *vpp;
3725
3726 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3727 if (s == NULL)
3728 return NULL;
3729
3730 vpp = &elf_section_data (s)->local_dynrel;
3731 return (struct elf_dyn_relocs **) vpp;
3732 }
3733 }
3734
3735 /* Initialize an entry in the stub hash table. */
3736
3737 static struct bfd_hash_entry *
3738 stub_hash_newfunc (struct bfd_hash_entry *entry,
3739 struct bfd_hash_table *table,
3740 const char *string)
3741 {
3742 /* Allocate the structure if it has not already been allocated by a
3743 subclass. */
3744 if (entry == NULL)
3745 {
3746 entry = (struct bfd_hash_entry *)
3747 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3748 if (entry == NULL)
3749 return entry;
3750 }
3751
3752 /* Call the allocation method of the superclass. */
3753 entry = bfd_hash_newfunc (entry, table, string);
3754 if (entry != NULL)
3755 {
3756 struct elf32_arm_stub_hash_entry *eh;
3757
3758 /* Initialize the local fields. */
3759 eh = (struct elf32_arm_stub_hash_entry *) entry;
3760 eh->stub_sec = NULL;
3761 eh->stub_offset = (bfd_vma) -1;
3762 eh->source_value = 0;
3763 eh->target_value = 0;
3764 eh->target_section = NULL;
3765 eh->orig_insn = 0;
3766 eh->stub_type = arm_stub_none;
3767 eh->stub_size = 0;
3768 eh->stub_template = NULL;
3769 eh->stub_template_size = -1;
3770 eh->h = NULL;
3771 eh->id_sec = NULL;
3772 eh->output_name = NULL;
3773 }
3774
3775 return entry;
3776 }
3777
3778 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3779 shortcuts to them in our hash table. */
3780
3781 static bool
3782 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3783 {
3784 struct elf32_arm_link_hash_table *htab;
3785
3786 htab = elf32_arm_hash_table (info);
3787 if (htab == NULL)
3788 return false;
3789
3790 if (! _bfd_elf_create_got_section (dynobj, info))
3791 return false;
3792
3793 /* Also create .rofixup. */
3794 if (htab->fdpic_p)
3795 {
3796 htab->srofixup = bfd_make_section_with_flags (dynobj, ".rofixup",
3797 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3798 | SEC_IN_MEMORY | SEC_LINKER_CREATED | SEC_READONLY));
3799 if (htab->srofixup == NULL
3800 || !bfd_set_section_alignment (htab->srofixup, 2))
3801 return false;
3802 }
3803
3804 return true;
3805 }
3806
3807 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3808
3809 static bool
3810 create_ifunc_sections (struct bfd_link_info *info)
3811 {
3812 struct elf32_arm_link_hash_table *htab;
3813 const struct elf_backend_data *bed;
3814 bfd *dynobj;
3815 asection *s;
3816 flagword flags;
3817
3818 htab = elf32_arm_hash_table (info);
3819 dynobj = htab->root.dynobj;
3820 bed = get_elf_backend_data (dynobj);
3821 flags = bed->dynamic_sec_flags;
3822
3823 if (htab->root.iplt == NULL)
3824 {
3825 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3826 flags | SEC_READONLY | SEC_CODE);
3827 if (s == NULL
3828 || !bfd_set_section_alignment (s, bed->plt_alignment))
3829 return false;
3830 htab->root.iplt = s;
3831 }
3832
3833 if (htab->root.irelplt == NULL)
3834 {
3835 s = bfd_make_section_anyway_with_flags (dynobj,
3836 RELOC_SECTION (htab, ".iplt"),
3837 flags | SEC_READONLY);
3838 if (s == NULL
3839 || !bfd_set_section_alignment (s, bed->s->log_file_align))
3840 return false;
3841 htab->root.irelplt = s;
3842 }
3843
3844 if (htab->root.igotplt == NULL)
3845 {
3846 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3847 if (s == NULL
3848 || !bfd_set_section_alignment (s, bed->s->log_file_align))
3849 return false;
3850 htab->root.igotplt = s;
3851 }
3852 return true;
3853 }
3854
3855 /* Determine if we're dealing with a Thumb only architecture. */
3856
3857 static bool
3858 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3859 {
3860 int arch;
3861 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3862 Tag_CPU_arch_profile);
3863
3864 if (profile)
3865 return profile == 'M';
3866
3867 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3868
3869 /* Force return logic to be reviewed for each new architecture. */
3870 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3871
3872 if (arch == TAG_CPU_ARCH_V6_M
3873 || arch == TAG_CPU_ARCH_V6S_M
3874 || arch == TAG_CPU_ARCH_V7E_M
3875 || arch == TAG_CPU_ARCH_V8M_BASE
3876 || arch == TAG_CPU_ARCH_V8M_MAIN
3877 || arch == TAG_CPU_ARCH_V8_1M_MAIN)
3878 return true;
3879
3880 return false;
3881 }
3882
3883 /* Determine if we're dealing with a Thumb-2 object. */
3884
3885 static bool
3886 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3887 {
3888 int arch;
3889 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3890 Tag_THUMB_ISA_use);
3891
3892 /* No use of thumb permitted, or a legacy thumb-1/2 definition. */
3893 if (thumb_isa < 3)
3894 return thumb_isa == 2;
3895
3896 /* Variant of thumb is described by the architecture tag. */
3897 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3898
3899 /* Force return logic to be reviewed for each new architecture. */
3900 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3901
3902 return (arch == TAG_CPU_ARCH_V6T2
3903 || arch == TAG_CPU_ARCH_V7
3904 || arch == TAG_CPU_ARCH_V7E_M
3905 || arch == TAG_CPU_ARCH_V8
3906 || arch == TAG_CPU_ARCH_V8R
3907 || arch == TAG_CPU_ARCH_V8M_MAIN
3908 || arch == TAG_CPU_ARCH_V8_1M_MAIN);
3909 }
3910
3911 /* Determine whether Thumb-2 BL instruction is available. */
3912
3913 static bool
3914 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3915 {
3916 int arch =
3917 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3918
3919 /* Force return logic to be reviewed for each new architecture. */
3920 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3921
3922 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3923 return (arch == TAG_CPU_ARCH_V6T2
3924 || arch >= TAG_CPU_ARCH_V7);
3925 }
3926
3927 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3928 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3929 hash table. */
3930
3931 static bool
3932 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3933 {
3934 struct elf32_arm_link_hash_table *htab;
3935
3936 htab = elf32_arm_hash_table (info);
3937 if (htab == NULL)
3938 return false;
3939
3940 if (!htab->root.sgot && !create_got_section (dynobj, info))
3941 return false;
3942
3943 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3944 return false;
3945
3946 if (htab->root.target_os == is_vxworks)
3947 {
3948 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3949 return false;
3950
3951 if (bfd_link_pic (info))
3952 {
3953 htab->plt_header_size = 0;
3954 htab->plt_entry_size
3955 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3956 }
3957 else
3958 {
3959 htab->plt_header_size
3960 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3961 htab->plt_entry_size
3962 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3963 }
3964
3965 if (elf_elfheader (dynobj))
3966 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3967 }
3968 else
3969 {
3970 /* PR ld/16017
3971 Test for thumb only architectures. Note - we cannot just call
3972 using_thumb_only() as the attributes in the output bfd have not been
3973 initialised at this point, so instead we use the input bfd. */
3974 bfd * saved_obfd = htab->obfd;
3975
3976 htab->obfd = dynobj;
3977 if (using_thumb_only (htab))
3978 {
3979 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3980 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3981 }
3982 htab->obfd = saved_obfd;
3983 }
3984
3985 if (htab->fdpic_p) {
3986 htab->plt_header_size = 0;
3987 if (info->flags & DF_BIND_NOW)
3988 htab->plt_entry_size = 4 * (ARRAY_SIZE (elf32_arm_fdpic_plt_entry) - 5);
3989 else
3990 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_fdpic_plt_entry);
3991 }
3992
3993 if (!htab->root.splt
3994 || !htab->root.srelplt
3995 || !htab->root.sdynbss
3996 || (!bfd_link_pic (info) && !htab->root.srelbss))
3997 abort ();
3998
3999 return true;
4000 }
4001
4002 /* Copy the extra info we tack onto an elf_link_hash_entry. */
4003
4004 static void
4005 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
4006 struct elf_link_hash_entry *dir,
4007 struct elf_link_hash_entry *ind)
4008 {
4009 struct elf32_arm_link_hash_entry *edir, *eind;
4010
4011 edir = (struct elf32_arm_link_hash_entry *) dir;
4012 eind = (struct elf32_arm_link_hash_entry *) ind;
4013
4014 if (ind->root.type == bfd_link_hash_indirect)
4015 {
4016 /* Copy over PLT info. */
4017 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
4018 eind->plt.thumb_refcount = 0;
4019 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
4020 eind->plt.maybe_thumb_refcount = 0;
4021 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
4022 eind->plt.noncall_refcount = 0;
4023
4024 /* Copy FDPIC counters. */
4025 edir->fdpic_cnts.gotofffuncdesc_cnt += eind->fdpic_cnts.gotofffuncdesc_cnt;
4026 edir->fdpic_cnts.gotfuncdesc_cnt += eind->fdpic_cnts.gotfuncdesc_cnt;
4027 edir->fdpic_cnts.funcdesc_cnt += eind->fdpic_cnts.funcdesc_cnt;
4028
4029 /* We should only allocate a function to .iplt once the final
4030 symbol information is known. */
4031 BFD_ASSERT (!eind->is_iplt);
4032
4033 if (dir->got.refcount <= 0)
4034 {
4035 edir->tls_type = eind->tls_type;
4036 eind->tls_type = GOT_UNKNOWN;
4037 }
4038 }
4039
4040 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
4041 }
4042
4043 /* Destroy an ARM elf linker hash table. */
4044
4045 static void
4046 elf32_arm_link_hash_table_free (bfd *obfd)
4047 {
4048 struct elf32_arm_link_hash_table *ret
4049 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
4050
4051 bfd_hash_table_free (&ret->stub_hash_table);
4052 _bfd_elf_link_hash_table_free (obfd);
4053 }
4054
4055 /* Create an ARM elf linker hash table. */
4056
4057 static struct bfd_link_hash_table *
4058 elf32_arm_link_hash_table_create (bfd *abfd)
4059 {
4060 struct elf32_arm_link_hash_table *ret;
4061 size_t amt = sizeof (struct elf32_arm_link_hash_table);
4062
4063 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
4064 if (ret == NULL)
4065 return NULL;
4066
4067 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
4068 elf32_arm_link_hash_newfunc,
4069 sizeof (struct elf32_arm_link_hash_entry),
4070 ARM_ELF_DATA))
4071 {
4072 free (ret);
4073 return NULL;
4074 }
4075
4076 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
4077 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
4078 #ifdef FOUR_WORD_PLT
4079 ret->plt_header_size = 16;
4080 ret->plt_entry_size = 16;
4081 #else
4082 ret->plt_header_size = 20;
4083 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
4084 #endif
4085 ret->use_rel = true;
4086 ret->obfd = abfd;
4087 ret->fdpic_p = 0;
4088
4089 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
4090 sizeof (struct elf32_arm_stub_hash_entry)))
4091 {
4092 _bfd_elf_link_hash_table_free (abfd);
4093 return NULL;
4094 }
4095 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
4096
4097 return &ret->root.root;
4098 }
4099
4100 /* Determine what kind of NOPs are available. */
4101
4102 static bool
4103 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
4104 {
4105 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4106 Tag_CPU_arch);
4107
4108 /* Force return logic to be reviewed for each new architecture. */
4109 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
4110
4111 return (arch == TAG_CPU_ARCH_V6T2
4112 || arch == TAG_CPU_ARCH_V6K
4113 || arch == TAG_CPU_ARCH_V7
4114 || arch == TAG_CPU_ARCH_V8
4115 || arch == TAG_CPU_ARCH_V8R);
4116 }
4117
4118 static bool
4119 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
4120 {
4121 switch (stub_type)
4122 {
4123 case arm_stub_long_branch_thumb_only:
4124 case arm_stub_long_branch_thumb2_only:
4125 case arm_stub_long_branch_thumb2_only_pure:
4126 case arm_stub_long_branch_v4t_thumb_arm:
4127 case arm_stub_short_branch_v4t_thumb_arm:
4128 case arm_stub_long_branch_v4t_thumb_arm_pic:
4129 case arm_stub_long_branch_v4t_thumb_tls_pic:
4130 case arm_stub_long_branch_thumb_only_pic:
4131 case arm_stub_cmse_branch_thumb_only:
4132 return true;
4133 case arm_stub_none:
4134 BFD_FAIL ();
4135 return false;
4136 break;
4137 default:
4138 return false;
4139 }
4140 }
4141
4142 /* Determine the type of stub needed, if any, for a call. */
4143
4144 static enum elf32_arm_stub_type
4145 arm_type_of_stub (struct bfd_link_info *info,
4146 asection *input_sec,
4147 const Elf_Internal_Rela *rel,
4148 unsigned char st_type,
4149 enum arm_st_branch_type *actual_branch_type,
4150 struct elf32_arm_link_hash_entry *hash,
4151 bfd_vma destination,
4152 asection *sym_sec,
4153 bfd *input_bfd,
4154 const char *name)
4155 {
4156 bfd_vma location;
4157 bfd_signed_vma branch_offset;
4158 unsigned int r_type;
4159 struct elf32_arm_link_hash_table * globals;
4160 bool thumb2, thumb2_bl, thumb_only;
4161 enum elf32_arm_stub_type stub_type = arm_stub_none;
4162 int use_plt = 0;
4163 enum arm_st_branch_type branch_type = *actual_branch_type;
4164 union gotplt_union *root_plt;
4165 struct arm_plt_info *arm_plt;
4166 int arch;
4167 int thumb2_movw;
4168
4169 if (branch_type == ST_BRANCH_LONG)
4170 return stub_type;
4171
4172 globals = elf32_arm_hash_table (info);
4173 if (globals == NULL)
4174 return stub_type;
4175
4176 thumb_only = using_thumb_only (globals);
4177 thumb2 = using_thumb2 (globals);
4178 thumb2_bl = using_thumb2_bl (globals);
4179
4180 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
4181
4182 /* True for architectures that implement the thumb2 movw instruction. */
4183 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
4184
4185 /* Determine where the call point is. */
4186 location = (input_sec->output_offset
4187 + input_sec->output_section->vma
4188 + rel->r_offset);
4189
4190 r_type = ELF32_R_TYPE (rel->r_info);
4191
4192 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4193 are considering a function call relocation. */
4194 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4195 || r_type == R_ARM_THM_JUMP19)
4196 && branch_type == ST_BRANCH_TO_ARM)
4197 branch_type = ST_BRANCH_TO_THUMB;
4198
4199 /* For TLS call relocs, it is the caller's responsibility to provide
4200 the address of the appropriate trampoline. */
4201 if (r_type != R_ARM_TLS_CALL
4202 && r_type != R_ARM_THM_TLS_CALL
4203 && elf32_arm_get_plt_info (input_bfd, globals, hash,
4204 ELF32_R_SYM (rel->r_info), &root_plt,
4205 &arm_plt)
4206 && root_plt->offset != (bfd_vma) -1)
4207 {
4208 asection *splt;
4209
4210 if (hash == NULL || hash->is_iplt)
4211 splt = globals->root.iplt;
4212 else
4213 splt = globals->root.splt;
4214 if (splt != NULL)
4215 {
4216 use_plt = 1;
4217
4218 /* Note when dealing with PLT entries: the main PLT stub is in
4219 ARM mode, so if the branch is in Thumb mode, another
4220 Thumb->ARM stub will be inserted later just before the ARM
4221 PLT stub. If a long branch stub is needed, we'll add a
4222 Thumb->Arm one and branch directly to the ARM PLT entry.
4223 Here, we have to check if a pre-PLT Thumb->ARM stub
4224 is needed and if it will be close enough. */
4225
4226 destination = (splt->output_section->vma
4227 + splt->output_offset
4228 + root_plt->offset);
4229 st_type = STT_FUNC;
4230
4231 /* Thumb branch/call to PLT: it can become a branch to ARM
4232 or to Thumb. We must perform the same checks and
4233 corrections as in elf32_arm_final_link_relocate. */
4234 if ((r_type == R_ARM_THM_CALL)
4235 || (r_type == R_ARM_THM_JUMP24))
4236 {
4237 if (globals->use_blx
4238 && r_type == R_ARM_THM_CALL
4239 && !thumb_only)
4240 {
4241 /* If the Thumb BLX instruction is available, convert
4242 the BL to a BLX instruction to call the ARM-mode
4243 PLT entry. */
4244 branch_type = ST_BRANCH_TO_ARM;
4245 }
4246 else
4247 {
4248 if (!thumb_only)
4249 /* Target the Thumb stub before the ARM PLT entry. */
4250 destination -= PLT_THUMB_STUB_SIZE;
4251 branch_type = ST_BRANCH_TO_THUMB;
4252 }
4253 }
4254 else
4255 {
4256 branch_type = ST_BRANCH_TO_ARM;
4257 }
4258 }
4259 }
4260 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4261 BFD_ASSERT (st_type != STT_GNU_IFUNC);
4262
4263 branch_offset = (bfd_signed_vma)(destination - location);
4264
4265 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4266 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
4267 {
4268 /* Handle cases where:
4269 - this call goes too far (different Thumb/Thumb2 max
4270 distance)
4271 - it's a Thumb->Arm call and blx is not available, or it's a
4272 Thumb->Arm branch (not bl). A stub is needed in this case,
4273 but only if this call is not through a PLT entry. Indeed,
4274 PLT stubs handle mode switching already. */
4275 if ((!thumb2_bl
4276 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4277 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4278 || (thumb2_bl
4279 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4280 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4281 || (thumb2
4282 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4283 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4284 && (r_type == R_ARM_THM_JUMP19))
4285 || (branch_type == ST_BRANCH_TO_ARM
4286 && (((r_type == R_ARM_THM_CALL
4287 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4288 || (r_type == R_ARM_THM_JUMP24)
4289 || (r_type == R_ARM_THM_JUMP19))
4290 && !use_plt))
4291 {
4292 /* If we need to insert a Thumb-Thumb long branch stub to a
4293 PLT, use one that branches directly to the ARM PLT
4294 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4295 stub, undo this now. */
4296 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4297 {
4298 branch_type = ST_BRANCH_TO_ARM;
4299 branch_offset += PLT_THUMB_STUB_SIZE;
4300 }
4301
4302 if (branch_type == ST_BRANCH_TO_THUMB)
4303 {
4304 /* Thumb to thumb. */
4305 if (!thumb_only)
4306 {
4307 if (input_sec->flags & SEC_ELF_PURECODE)
4308 _bfd_error_handler
4309 (_("%pB(%pA): warning: long branch veneers used in"
4310 " section with SHF_ARM_PURECODE section"
4311 " attribute is only supported for M-profile"
4312 " targets that implement the movw instruction"),
4313 input_bfd, input_sec);
4314
4315 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4316 /* PIC stubs. */
4317 ? ((globals->use_blx
4318 && (r_type == R_ARM_THM_CALL))
4319 /* V5T and above. Stub starts with ARM code, so
4320 we must be able to switch mode before
4321 reaching it, which is only possible for 'bl'
4322 (ie R_ARM_THM_CALL relocation). */
4323 ? arm_stub_long_branch_any_thumb_pic
4324 /* On V4T, use Thumb code only. */
4325 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4326
4327 /* non-PIC stubs. */
4328 : ((globals->use_blx
4329 && (r_type == R_ARM_THM_CALL))
4330 /* V5T and above. */
4331 ? arm_stub_long_branch_any_any
4332 /* V4T. */
4333 : arm_stub_long_branch_v4t_thumb_thumb);
4334 }
4335 else
4336 {
4337 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4338 stub_type = arm_stub_long_branch_thumb2_only_pure;
4339 else
4340 {
4341 if (input_sec->flags & SEC_ELF_PURECODE)
4342 _bfd_error_handler
4343 (_("%pB(%pA): warning: long branch veneers used in"
4344 " section with SHF_ARM_PURECODE section"
4345 " attribute is only supported for M-profile"
4346 " targets that implement the movw instruction"),
4347 input_bfd, input_sec);
4348
4349 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4350 /* PIC stub. */
4351 ? arm_stub_long_branch_thumb_only_pic
4352 /* non-PIC stub. */
4353 : (thumb2 ? arm_stub_long_branch_thumb2_only
4354 : arm_stub_long_branch_thumb_only);
4355 }
4356 }
4357 }
4358 else
4359 {
4360 if (input_sec->flags & SEC_ELF_PURECODE)
4361 _bfd_error_handler
4362 (_("%pB(%pA): warning: long branch veneers used in"
4363 " section with SHF_ARM_PURECODE section"
4364 " attribute is only supported" " for M-profile"
4365 " targets that implement the movw instruction"),
4366 input_bfd, input_sec);
4367
4368 /* Thumb to arm. */
4369 if (sym_sec != NULL
4370 && sym_sec->owner != NULL
4371 && !INTERWORK_FLAG (sym_sec->owner))
4372 {
4373 _bfd_error_handler
4374 (_("%pB(%s): warning: interworking not enabled;"
4375 " first occurrence: %pB: %s call to %s"),
4376 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
4377 }
4378
4379 stub_type =
4380 (bfd_link_pic (info) | globals->pic_veneer)
4381 /* PIC stubs. */
4382 ? (r_type == R_ARM_THM_TLS_CALL
4383 /* TLS PIC stubs. */
4384 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4385 : arm_stub_long_branch_v4t_thumb_tls_pic)
4386 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4387 /* V5T PIC and above. */
4388 ? arm_stub_long_branch_any_arm_pic
4389 /* V4T PIC stub. */
4390 : arm_stub_long_branch_v4t_thumb_arm_pic))
4391
4392 /* non-PIC stubs. */
4393 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4394 /* V5T and above. */
4395 ? arm_stub_long_branch_any_any
4396 /* V4T. */
4397 : arm_stub_long_branch_v4t_thumb_arm);
4398
4399 /* Handle v4t short branches. */
4400 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4401 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4402 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4403 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4404 }
4405 }
4406 }
4407 else if (r_type == R_ARM_CALL
4408 || r_type == R_ARM_JUMP24
4409 || r_type == R_ARM_PLT32
4410 || r_type == R_ARM_TLS_CALL)
4411 {
4412 if (input_sec->flags & SEC_ELF_PURECODE)
4413 _bfd_error_handler
4414 (_("%pB(%pA): warning: long branch veneers used in"
4415 " section with SHF_ARM_PURECODE section"
4416 " attribute is only supported for M-profile"
4417 " targets that implement the movw instruction"),
4418 input_bfd, input_sec);
4419 if (branch_type == ST_BRANCH_TO_THUMB)
4420 {
4421 /* Arm to thumb. */
4422
4423 if (sym_sec != NULL
4424 && sym_sec->owner != NULL
4425 && !INTERWORK_FLAG (sym_sec->owner))
4426 {
4427 _bfd_error_handler
4428 (_("%pB(%s): warning: interworking not enabled;"
4429 " first occurrence: %pB: %s call to %s"),
4430 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
4431 }
4432
4433 /* We have an extra 2-bytes reach because of
4434 the mode change (bit 24 (H) of BLX encoding). */
4435 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4436 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4437 || (r_type == R_ARM_CALL && !globals->use_blx)
4438 || (r_type == R_ARM_JUMP24)
4439 || (r_type == R_ARM_PLT32))
4440 {
4441 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4442 /* PIC stubs. */
4443 ? ((globals->use_blx)
4444 /* V5T and above. */
4445 ? arm_stub_long_branch_any_thumb_pic
4446 /* V4T stub. */
4447 : arm_stub_long_branch_v4t_arm_thumb_pic)
4448
4449 /* non-PIC stubs. */
4450 : ((globals->use_blx)
4451 /* V5T and above. */
4452 ? arm_stub_long_branch_any_any
4453 /* V4T. */
4454 : arm_stub_long_branch_v4t_arm_thumb);
4455 }
4456 }
4457 else
4458 {
4459 /* Arm to arm. */
4460 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4461 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4462 {
4463 stub_type =
4464 (bfd_link_pic (info) | globals->pic_veneer)
4465 /* PIC stubs. */
4466 ? (r_type == R_ARM_TLS_CALL
4467 /* TLS PIC Stub. */
4468 ? arm_stub_long_branch_any_tls_pic
4469 : (globals->root.target_os == is_nacl
4470 ? arm_stub_long_branch_arm_nacl_pic
4471 : arm_stub_long_branch_any_arm_pic))
4472 /* non-PIC stubs. */
4473 : (globals->root.target_os == is_nacl
4474 ? arm_stub_long_branch_arm_nacl
4475 : arm_stub_long_branch_any_any);
4476 }
4477 }
4478 }
4479
4480 /* If a stub is needed, record the actual destination type. */
4481 if (stub_type != arm_stub_none)
4482 *actual_branch_type = branch_type;
4483
4484 return stub_type;
4485 }
4486
4487 /* Build a name for an entry in the stub hash table. */
4488
4489 static char *
4490 elf32_arm_stub_name (const asection *input_section,
4491 const asection *sym_sec,
4492 const struct elf32_arm_link_hash_entry *hash,
4493 const Elf_Internal_Rela *rel,
4494 enum elf32_arm_stub_type stub_type)
4495 {
4496 char *stub_name;
4497 bfd_size_type len;
4498
4499 if (hash)
4500 {
4501 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4502 stub_name = (char *) bfd_malloc (len);
4503 if (stub_name != NULL)
4504 sprintf (stub_name, "%08x_%s+%x_%d",
4505 input_section->id & 0xffffffff,
4506 hash->root.root.root.string,
4507 (int) rel->r_addend & 0xffffffff,
4508 (int) stub_type);
4509 }
4510 else
4511 {
4512 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4513 stub_name = (char *) bfd_malloc (len);
4514 if (stub_name != NULL)
4515 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4516 input_section->id & 0xffffffff,
4517 sym_sec->id & 0xffffffff,
4518 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4519 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4520 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4521 (int) rel->r_addend & 0xffffffff,
4522 (int) stub_type);
4523 }
4524
4525 return stub_name;
4526 }
4527
4528 /* Look up an entry in the stub hash. Stub entries are cached because
4529 creating the stub name takes a bit of time. */
4530
4531 static struct elf32_arm_stub_hash_entry *
4532 elf32_arm_get_stub_entry (const asection *input_section,
4533 const asection *sym_sec,
4534 struct elf_link_hash_entry *hash,
4535 const Elf_Internal_Rela *rel,
4536 struct elf32_arm_link_hash_table *htab,
4537 enum elf32_arm_stub_type stub_type)
4538 {
4539 struct elf32_arm_stub_hash_entry *stub_entry;
4540 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4541 const asection *id_sec;
4542
4543 if ((input_section->flags & SEC_CODE) == 0)
4544 return NULL;
4545
4546 /* If the input section is the CMSE stubs one and it needs a long
4547 branch stub to reach it's final destination, give up with an
4548 error message: this is not supported. See PR ld/24709. */
4549 if (!strncmp (input_section->name, CMSE_STUB_NAME, strlen (CMSE_STUB_NAME)))
4550 {
4551 bfd *output_bfd = htab->obfd;
4552 asection *out_sec = bfd_get_section_by_name (output_bfd, CMSE_STUB_NAME);
4553
4554 _bfd_error_handler (_("ERROR: CMSE stub (%s section) too far "
4555 "(%#" PRIx64 ") from destination (%#" PRIx64 ")"),
4556 CMSE_STUB_NAME,
4557 (uint64_t)out_sec->output_section->vma
4558 + out_sec->output_offset,
4559 (uint64_t)sym_sec->output_section->vma
4560 + sym_sec->output_offset
4561 + h->root.root.u.def.value);
4562 /* Exit, rather than leave incompletely processed
4563 relocations. */
4564 xexit (1);
4565 }
4566
4567 /* If this input section is part of a group of sections sharing one
4568 stub section, then use the id of the first section in the group.
4569 Stub names need to include a section id, as there may well be
4570 more than one stub used to reach say, printf, and we need to
4571 distinguish between them. */
4572 BFD_ASSERT (input_section->id <= htab->top_id);
4573 id_sec = htab->stub_group[input_section->id].link_sec;
4574
4575 if (h != NULL && h->stub_cache != NULL
4576 && h->stub_cache->h == h
4577 && h->stub_cache->id_sec == id_sec
4578 && h->stub_cache->stub_type == stub_type)
4579 {
4580 stub_entry = h->stub_cache;
4581 }
4582 else
4583 {
4584 char *stub_name;
4585
4586 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4587 if (stub_name == NULL)
4588 return NULL;
4589
4590 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4591 stub_name, false, false);
4592 if (h != NULL)
4593 h->stub_cache = stub_entry;
4594
4595 free (stub_name);
4596 }
4597
4598 return stub_entry;
4599 }
4600
4601 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4602 section. */
4603
4604 static bool
4605 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4606 {
4607 if (stub_type >= max_stub_type)
4608 abort (); /* Should be unreachable. */
4609
4610 switch (stub_type)
4611 {
4612 case arm_stub_cmse_branch_thumb_only:
4613 return true;
4614
4615 default:
4616 return false;
4617 }
4618
4619 abort (); /* Should be unreachable. */
4620 }
4621
4622 /* Required alignment (as a power of 2) for the dedicated section holding
4623 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4624 with input sections. */
4625
4626 static int
4627 arm_dedicated_stub_output_section_required_alignment
4628 (enum elf32_arm_stub_type stub_type)
4629 {
4630 if (stub_type >= max_stub_type)
4631 abort (); /* Should be unreachable. */
4632
4633 switch (stub_type)
4634 {
4635 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4636 boundary. */
4637 case arm_stub_cmse_branch_thumb_only:
4638 return 5;
4639
4640 default:
4641 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4642 return 0;
4643 }
4644
4645 abort (); /* Should be unreachable. */
4646 }
4647
4648 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4649 NULL if veneers of this type are interspersed with input sections. */
4650
4651 static const char *
4652 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4653 {
4654 if (stub_type >= max_stub_type)
4655 abort (); /* Should be unreachable. */
4656
4657 switch (stub_type)
4658 {
4659 case arm_stub_cmse_branch_thumb_only:
4660 return CMSE_STUB_NAME;
4661
4662 default:
4663 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4664 return NULL;
4665 }
4666
4667 abort (); /* Should be unreachable. */
4668 }
4669
4670 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4671 returns the address of the hash table field in HTAB holding a pointer to the
4672 corresponding input section. Otherwise, returns NULL. */
4673
4674 static asection **
4675 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4676 enum elf32_arm_stub_type stub_type)
4677 {
4678 if (stub_type >= max_stub_type)
4679 abort (); /* Should be unreachable. */
4680
4681 switch (stub_type)
4682 {
4683 case arm_stub_cmse_branch_thumb_only:
4684 return &htab->cmse_stub_sec;
4685
4686 default:
4687 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4688 return NULL;
4689 }
4690
4691 abort (); /* Should be unreachable. */
4692 }
4693
4694 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4695 is the section that branch into veneer and can be NULL if stub should go in
4696 a dedicated output section. Returns a pointer to the stub section, and the
4697 section to which the stub section will be attached (in *LINK_SEC_P).
4698 LINK_SEC_P may be NULL. */
4699
4700 static asection *
4701 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4702 struct elf32_arm_link_hash_table *htab,
4703 enum elf32_arm_stub_type stub_type)
4704 {
4705 asection *link_sec, *out_sec, **stub_sec_p;
4706 const char *stub_sec_prefix;
4707 bool dedicated_output_section =
4708 arm_dedicated_stub_output_section_required (stub_type);
4709 int align;
4710
4711 if (dedicated_output_section)
4712 {
4713 bfd *output_bfd = htab->obfd;
4714 const char *out_sec_name =
4715 arm_dedicated_stub_output_section_name (stub_type);
4716 link_sec = NULL;
4717 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4718 stub_sec_prefix = out_sec_name;
4719 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4720 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4721 if (out_sec == NULL)
4722 {
4723 _bfd_error_handler (_("no address assigned to the veneers output "
4724 "section %s"), out_sec_name);
4725 return NULL;
4726 }
4727 }
4728 else
4729 {
4730 BFD_ASSERT (section->id <= htab->top_id);
4731 link_sec = htab->stub_group[section->id].link_sec;
4732 BFD_ASSERT (link_sec != NULL);
4733 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4734 if (*stub_sec_p == NULL)
4735 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4736 stub_sec_prefix = link_sec->name;
4737 out_sec = link_sec->output_section;
4738 align = htab->root.target_os == is_nacl ? 4 : 3;
4739 }
4740
4741 if (*stub_sec_p == NULL)
4742 {
4743 size_t namelen;
4744 bfd_size_type len;
4745 char *s_name;
4746
4747 namelen = strlen (stub_sec_prefix);
4748 len = namelen + sizeof (STUB_SUFFIX);
4749 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4750 if (s_name == NULL)
4751 return NULL;
4752
4753 memcpy (s_name, stub_sec_prefix, namelen);
4754 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4755 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4756 align);
4757 if (*stub_sec_p == NULL)
4758 return NULL;
4759
4760 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4761 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4762 | SEC_KEEP;
4763 }
4764
4765 if (!dedicated_output_section)
4766 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4767
4768 if (link_sec_p)
4769 *link_sec_p = link_sec;
4770
4771 return *stub_sec_p;
4772 }
4773
4774 /* Add a new stub entry to the stub hash. Not all fields of the new
4775 stub entry are initialised. */
4776
4777 static struct elf32_arm_stub_hash_entry *
4778 elf32_arm_add_stub (const char *stub_name, asection *section,
4779 struct elf32_arm_link_hash_table *htab,
4780 enum elf32_arm_stub_type stub_type)
4781 {
4782 asection *link_sec;
4783 asection *stub_sec;
4784 struct elf32_arm_stub_hash_entry *stub_entry;
4785
4786 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4787 stub_type);
4788 if (stub_sec == NULL)
4789 return NULL;
4790
4791 /* Enter this entry into the linker stub hash table. */
4792 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4793 true, false);
4794 if (stub_entry == NULL)
4795 {
4796 if (section == NULL)
4797 section = stub_sec;
4798 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4799 section->owner, stub_name);
4800 return NULL;
4801 }
4802
4803 stub_entry->stub_sec = stub_sec;
4804 stub_entry->stub_offset = (bfd_vma) -1;
4805 stub_entry->id_sec = link_sec;
4806
4807 return stub_entry;
4808 }
4809
4810 /* Store an Arm insn into an output section not processed by
4811 elf32_arm_write_section. */
4812
4813 static void
4814 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4815 bfd * output_bfd, bfd_vma val, void * ptr)
4816 {
4817 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4818 bfd_putl32 (val, ptr);
4819 else
4820 bfd_putb32 (val, ptr);
4821 }
4822
4823 /* Store a 16-bit Thumb insn into an output section not processed by
4824 elf32_arm_write_section. */
4825
4826 static void
4827 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4828 bfd * output_bfd, bfd_vma val, void * ptr)
4829 {
4830 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4831 bfd_putl16 (val, ptr);
4832 else
4833 bfd_putb16 (val, ptr);
4834 }
4835
4836 /* Store a Thumb2 insn into an output section not processed by
4837 elf32_arm_write_section. */
4838
4839 static void
4840 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4841 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4842 {
4843 /* T2 instructions are 16-bit streamed. */
4844 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4845 {
4846 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4847 bfd_putl16 ((val & 0xffff), ptr + 2);
4848 }
4849 else
4850 {
4851 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4852 bfd_putb16 ((val & 0xffff), ptr + 2);
4853 }
4854 }
4855
4856 /* If it's possible to change R_TYPE to a more efficient access
4857 model, return the new reloc type. */
4858
4859 static unsigned
4860 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4861 struct elf_link_hash_entry *h)
4862 {
4863 int is_local = (h == NULL);
4864
4865 if (bfd_link_dll (info)
4866 || (h && h->root.type == bfd_link_hash_undefweak))
4867 return r_type;
4868
4869 /* We do not support relaxations for Old TLS models. */
4870 switch (r_type)
4871 {
4872 case R_ARM_TLS_GOTDESC:
4873 case R_ARM_TLS_CALL:
4874 case R_ARM_THM_TLS_CALL:
4875 case R_ARM_TLS_DESCSEQ:
4876 case R_ARM_THM_TLS_DESCSEQ:
4877 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4878 }
4879
4880 return r_type;
4881 }
4882
4883 static bfd_reloc_status_type elf32_arm_final_link_relocate
4884 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4885 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4886 const char *, unsigned char, enum arm_st_branch_type,
4887 struct elf_link_hash_entry *, bool *, char **);
4888
4889 static unsigned int
4890 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4891 {
4892 switch (stub_type)
4893 {
4894 case arm_stub_a8_veneer_b_cond:
4895 case arm_stub_a8_veneer_b:
4896 case arm_stub_a8_veneer_bl:
4897 return 2;
4898
4899 case arm_stub_long_branch_any_any:
4900 case arm_stub_long_branch_v4t_arm_thumb:
4901 case arm_stub_long_branch_thumb_only:
4902 case arm_stub_long_branch_thumb2_only:
4903 case arm_stub_long_branch_thumb2_only_pure:
4904 case arm_stub_long_branch_v4t_thumb_thumb:
4905 case arm_stub_long_branch_v4t_thumb_arm:
4906 case arm_stub_short_branch_v4t_thumb_arm:
4907 case arm_stub_long_branch_any_arm_pic:
4908 case arm_stub_long_branch_any_thumb_pic:
4909 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4910 case arm_stub_long_branch_v4t_arm_thumb_pic:
4911 case arm_stub_long_branch_v4t_thumb_arm_pic:
4912 case arm_stub_long_branch_thumb_only_pic:
4913 case arm_stub_long_branch_any_tls_pic:
4914 case arm_stub_long_branch_v4t_thumb_tls_pic:
4915 case arm_stub_cmse_branch_thumb_only:
4916 case arm_stub_a8_veneer_blx:
4917 return 4;
4918
4919 case arm_stub_long_branch_arm_nacl:
4920 case arm_stub_long_branch_arm_nacl_pic:
4921 return 16;
4922
4923 default:
4924 abort (); /* Should be unreachable. */
4925 }
4926 }
4927
4928 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4929 veneering (TRUE) or have their own symbol (FALSE). */
4930
4931 static bool
4932 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4933 {
4934 if (stub_type >= max_stub_type)
4935 abort (); /* Should be unreachable. */
4936
4937 switch (stub_type)
4938 {
4939 case arm_stub_cmse_branch_thumb_only:
4940 return true;
4941
4942 default:
4943 return false;
4944 }
4945
4946 abort (); /* Should be unreachable. */
4947 }
4948
4949 /* Returns the padding needed for the dedicated section used stubs of type
4950 STUB_TYPE. */
4951
4952 static int
4953 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4954 {
4955 if (stub_type >= max_stub_type)
4956 abort (); /* Should be unreachable. */
4957
4958 switch (stub_type)
4959 {
4960 case arm_stub_cmse_branch_thumb_only:
4961 return 32;
4962
4963 default:
4964 return 0;
4965 }
4966
4967 abort (); /* Should be unreachable. */
4968 }
4969
4970 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4971 returns the address of the hash table field in HTAB holding the offset at
4972 which new veneers should be layed out in the stub section. */
4973
4974 static bfd_vma*
4975 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4976 enum elf32_arm_stub_type stub_type)
4977 {
4978 switch (stub_type)
4979 {
4980 case arm_stub_cmse_branch_thumb_only:
4981 return &htab->new_cmse_stub_offset;
4982
4983 default:
4984 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4985 return NULL;
4986 }
4987 }
4988
4989 static bool
4990 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4991 void * in_arg)
4992 {
4993 #define MAXRELOCS 3
4994 bool removed_sg_veneer;
4995 struct elf32_arm_stub_hash_entry *stub_entry;
4996 struct elf32_arm_link_hash_table *globals;
4997 struct bfd_link_info *info;
4998 asection *stub_sec;
4999 bfd *stub_bfd;
5000 bfd_byte *loc;
5001 bfd_vma sym_value;
5002 int template_size;
5003 int size;
5004 const insn_sequence *template_sequence;
5005 int i;
5006 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
5007 int stub_reloc_offset[MAXRELOCS] = {0, 0};
5008 int nrelocs = 0;
5009 int just_allocated = 0;
5010
5011 /* Massage our args to the form they really have. */
5012 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5013 info = (struct bfd_link_info *) in_arg;
5014
5015 /* Fail if the target section could not be assigned to an output
5016 section. The user should fix his linker script. */
5017 if (stub_entry->target_section->output_section == NULL
5018 && info->non_contiguous_regions)
5019 info->callbacks->einfo (_("%F%P: Could not assign '%pA' to an output section. "
5020 "Retry without --enable-non-contiguous-regions.\n"),
5021 stub_entry->target_section);
5022
5023 globals = elf32_arm_hash_table (info);
5024 if (globals == NULL)
5025 return false;
5026
5027 stub_sec = stub_entry->stub_sec;
5028
5029 if ((globals->fix_cortex_a8 < 0)
5030 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
5031 /* We have to do less-strictly-aligned fixes last. */
5032 return true;
5033
5034 /* Assign a slot at the end of section if none assigned yet. */
5035 if (stub_entry->stub_offset == (bfd_vma) -1)
5036 {
5037 stub_entry->stub_offset = stub_sec->size;
5038 just_allocated = 1;
5039 }
5040 loc = stub_sec->contents + stub_entry->stub_offset;
5041
5042 stub_bfd = stub_sec->owner;
5043
5044 /* This is the address of the stub destination. */
5045 sym_value = (stub_entry->target_value
5046 + stub_entry->target_section->output_offset
5047 + stub_entry->target_section->output_section->vma);
5048
5049 template_sequence = stub_entry->stub_template;
5050 template_size = stub_entry->stub_template_size;
5051
5052 size = 0;
5053 for (i = 0; i < template_size; i++)
5054 {
5055 switch (template_sequence[i].type)
5056 {
5057 case THUMB16_TYPE:
5058 {
5059 bfd_vma data = (bfd_vma) template_sequence[i].data;
5060 if (template_sequence[i].reloc_addend != 0)
5061 {
5062 /* We've borrowed the reloc_addend field to mean we should
5063 insert a condition code into this (Thumb-1 branch)
5064 instruction. See THUMB16_BCOND_INSN. */
5065 BFD_ASSERT ((data & 0xff00) == 0xd000);
5066 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
5067 }
5068 bfd_put_16 (stub_bfd, data, loc + size);
5069 size += 2;
5070 }
5071 break;
5072
5073 case THUMB32_TYPE:
5074 bfd_put_16 (stub_bfd,
5075 (template_sequence[i].data >> 16) & 0xffff,
5076 loc + size);
5077 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
5078 loc + size + 2);
5079 if (template_sequence[i].r_type != R_ARM_NONE)
5080 {
5081 stub_reloc_idx[nrelocs] = i;
5082 stub_reloc_offset[nrelocs++] = size;
5083 }
5084 size += 4;
5085 break;
5086
5087 case ARM_TYPE:
5088 bfd_put_32 (stub_bfd, template_sequence[i].data,
5089 loc + size);
5090 /* Handle cases where the target is encoded within the
5091 instruction. */
5092 if (template_sequence[i].r_type == R_ARM_JUMP24)
5093 {
5094 stub_reloc_idx[nrelocs] = i;
5095 stub_reloc_offset[nrelocs++] = size;
5096 }
5097 size += 4;
5098 break;
5099
5100 case DATA_TYPE:
5101 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
5102 stub_reloc_idx[nrelocs] = i;
5103 stub_reloc_offset[nrelocs++] = size;
5104 size += 4;
5105 break;
5106
5107 default:
5108 BFD_FAIL ();
5109 return false;
5110 }
5111 }
5112
5113 if (just_allocated)
5114 stub_sec->size += size;
5115
5116 /* Stub size has already been computed in arm_size_one_stub. Check
5117 consistency. */
5118 BFD_ASSERT (size == stub_entry->stub_size);
5119
5120 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
5121 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
5122 sym_value |= 1;
5123
5124 /* Assume non empty slots have at least one and at most MAXRELOCS entries
5125 to relocate in each stub. */
5126 removed_sg_veneer =
5127 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5128 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
5129
5130 for (i = 0; i < nrelocs; i++)
5131 {
5132 Elf_Internal_Rela rel;
5133 bool unresolved_reloc;
5134 char *error_message;
5135 bfd_vma points_to =
5136 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
5137
5138 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
5139 rel.r_info = ELF32_R_INFO (0,
5140 template_sequence[stub_reloc_idx[i]].r_type);
5141 rel.r_addend = 0;
5142
5143 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
5144 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5145 template should refer back to the instruction after the original
5146 branch. We use target_section as Cortex-A8 erratum workaround stubs
5147 are only generated when both source and target are in the same
5148 section. */
5149 points_to = stub_entry->target_section->output_section->vma
5150 + stub_entry->target_section->output_offset
5151 + stub_entry->source_value;
5152
5153 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5154 (template_sequence[stub_reloc_idx[i]].r_type),
5155 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
5156 points_to, info, stub_entry->target_section, "", STT_FUNC,
5157 stub_entry->branch_type,
5158 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
5159 &error_message);
5160 }
5161
5162 return true;
5163 #undef MAXRELOCS
5164 }
5165
5166 /* Calculate the template, template size and instruction size for a stub.
5167 Return value is the instruction size. */
5168
5169 static unsigned int
5170 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
5171 const insn_sequence **stub_template,
5172 int *stub_template_size)
5173 {
5174 const insn_sequence *template_sequence = NULL;
5175 int template_size = 0, i;
5176 unsigned int size;
5177
5178 template_sequence = stub_definitions[stub_type].template_sequence;
5179 if (stub_template)
5180 *stub_template = template_sequence;
5181
5182 template_size = stub_definitions[stub_type].template_size;
5183 if (stub_template_size)
5184 *stub_template_size = template_size;
5185
5186 size = 0;
5187 for (i = 0; i < template_size; i++)
5188 {
5189 switch (template_sequence[i].type)
5190 {
5191 case THUMB16_TYPE:
5192 size += 2;
5193 break;
5194
5195 case ARM_TYPE:
5196 case THUMB32_TYPE:
5197 case DATA_TYPE:
5198 size += 4;
5199 break;
5200
5201 default:
5202 BFD_FAIL ();
5203 return 0;
5204 }
5205 }
5206
5207 return size;
5208 }
5209
5210 /* As above, but don't actually build the stub. Just bump offset so
5211 we know stub section sizes. */
5212
5213 static bool
5214 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
5215 void *in_arg ATTRIBUTE_UNUSED)
5216 {
5217 struct elf32_arm_stub_hash_entry *stub_entry;
5218 const insn_sequence *template_sequence;
5219 int template_size, size;
5220
5221 /* Massage our args to the form they really have. */
5222 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5223
5224 BFD_ASSERT ((stub_entry->stub_type > arm_stub_none)
5225 && stub_entry->stub_type < ARRAY_SIZE (stub_definitions));
5226
5227 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
5228 &template_size);
5229
5230 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
5231 if (stub_entry->stub_template_size)
5232 {
5233 stub_entry->stub_size = size;
5234 stub_entry->stub_template = template_sequence;
5235 stub_entry->stub_template_size = template_size;
5236 }
5237
5238 /* Already accounted for. */
5239 if (stub_entry->stub_offset != (bfd_vma) -1)
5240 return true;
5241
5242 size = (size + 7) & ~7;
5243 stub_entry->stub_sec->size += size;
5244
5245 return true;
5246 }
5247
5248 /* External entry points for sizing and building linker stubs. */
5249
5250 /* Set up various things so that we can make a list of input sections
5251 for each output section included in the link. Returns -1 on error,
5252 0 when no stubs will be needed, and 1 on success. */
5253
5254 int
5255 elf32_arm_setup_section_lists (bfd *output_bfd,
5256 struct bfd_link_info *info)
5257 {
5258 bfd *input_bfd;
5259 unsigned int bfd_count;
5260 unsigned int top_id, top_index;
5261 asection *section;
5262 asection **input_list, **list;
5263 size_t amt;
5264 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5265
5266 if (htab == NULL)
5267 return 0;
5268
5269 /* Count the number of input BFDs and find the top input section id. */
5270 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
5271 input_bfd != NULL;
5272 input_bfd = input_bfd->link.next)
5273 {
5274 bfd_count += 1;
5275 for (section = input_bfd->sections;
5276 section != NULL;
5277 section = section->next)
5278 {
5279 if (top_id < section->id)
5280 top_id = section->id;
5281 }
5282 }
5283 htab->bfd_count = bfd_count;
5284
5285 amt = sizeof (struct map_stub) * (top_id + 1);
5286 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
5287 if (htab->stub_group == NULL)
5288 return -1;
5289 htab->top_id = top_id;
5290
5291 /* We can't use output_bfd->section_count here to find the top output
5292 section index as some sections may have been removed, and
5293 _bfd_strip_section_from_output doesn't renumber the indices. */
5294 for (section = output_bfd->sections, top_index = 0;
5295 section != NULL;
5296 section = section->next)
5297 {
5298 if (top_index < section->index)
5299 top_index = section->index;
5300 }
5301
5302 htab->top_index = top_index;
5303 amt = sizeof (asection *) * (top_index + 1);
5304 input_list = (asection **) bfd_malloc (amt);
5305 htab->input_list = input_list;
5306 if (input_list == NULL)
5307 return -1;
5308
5309 /* For sections we aren't interested in, mark their entries with a
5310 value we can check later. */
5311 list = input_list + top_index;
5312 do
5313 *list = bfd_abs_section_ptr;
5314 while (list-- != input_list);
5315
5316 for (section = output_bfd->sections;
5317 section != NULL;
5318 section = section->next)
5319 {
5320 if ((section->flags & SEC_CODE) != 0)
5321 input_list[section->index] = NULL;
5322 }
5323
5324 return 1;
5325 }
5326
5327 /* The linker repeatedly calls this function for each input section,
5328 in the order that input sections are linked into output sections.
5329 Build lists of input sections to determine groupings between which
5330 we may insert linker stubs. */
5331
5332 void
5333 elf32_arm_next_input_section (struct bfd_link_info *info,
5334 asection *isec)
5335 {
5336 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5337
5338 if (htab == NULL)
5339 return;
5340
5341 if (isec->output_section->index <= htab->top_index)
5342 {
5343 asection **list = htab->input_list + isec->output_section->index;
5344
5345 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5346 {
5347 /* Steal the link_sec pointer for our list. */
5348 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5349 /* This happens to make the list in reverse order,
5350 which we reverse later. */
5351 PREV_SEC (isec) = *list;
5352 *list = isec;
5353 }
5354 }
5355 }
5356
5357 /* See whether we can group stub sections together. Grouping stub
5358 sections may result in fewer stubs. More importantly, we need to
5359 put all .init* and .fini* stubs at the end of the .init or
5360 .fini output sections respectively, because glibc splits the
5361 _init and _fini functions into multiple parts. Putting a stub in
5362 the middle of a function is not a good idea. */
5363
5364 static void
5365 group_sections (struct elf32_arm_link_hash_table *htab,
5366 bfd_size_type stub_group_size,
5367 bool stubs_always_after_branch)
5368 {
5369 asection **list = htab->input_list;
5370
5371 do
5372 {
5373 asection *tail = *list;
5374 asection *head;
5375
5376 if (tail == bfd_abs_section_ptr)
5377 continue;
5378
5379 /* Reverse the list: we must avoid placing stubs at the
5380 beginning of the section because the beginning of the text
5381 section may be required for an interrupt vector in bare metal
5382 code. */
5383 #define NEXT_SEC PREV_SEC
5384 head = NULL;
5385 while (tail != NULL)
5386 {
5387 /* Pop from tail. */
5388 asection *item = tail;
5389 tail = PREV_SEC (item);
5390
5391 /* Push on head. */
5392 NEXT_SEC (item) = head;
5393 head = item;
5394 }
5395
5396 while (head != NULL)
5397 {
5398 asection *curr;
5399 asection *next;
5400 bfd_vma stub_group_start = head->output_offset;
5401 bfd_vma end_of_next;
5402
5403 curr = head;
5404 while (NEXT_SEC (curr) != NULL)
5405 {
5406 next = NEXT_SEC (curr);
5407 end_of_next = next->output_offset + next->size;
5408 if (end_of_next - stub_group_start >= stub_group_size)
5409 /* End of NEXT is too far from start, so stop. */
5410 break;
5411 /* Add NEXT to the group. */
5412 curr = next;
5413 }
5414
5415 /* OK, the size from the start to the start of CURR is less
5416 than stub_group_size and thus can be handled by one stub
5417 section. (Or the head section is itself larger than
5418 stub_group_size, in which case we may be toast.)
5419 We should really be keeping track of the total size of
5420 stubs added here, as stubs contribute to the final output
5421 section size. */
5422 do
5423 {
5424 next = NEXT_SEC (head);
5425 /* Set up this stub group. */
5426 htab->stub_group[head->id].link_sec = curr;
5427 }
5428 while (head != curr && (head = next) != NULL);
5429
5430 /* But wait, there's more! Input sections up to stub_group_size
5431 bytes after the stub section can be handled by it too. */
5432 if (!stubs_always_after_branch)
5433 {
5434 stub_group_start = curr->output_offset + curr->size;
5435
5436 while (next != NULL)
5437 {
5438 end_of_next = next->output_offset + next->size;
5439 if (end_of_next - stub_group_start >= stub_group_size)
5440 /* End of NEXT is too far from stubs, so stop. */
5441 break;
5442 /* Add NEXT to the stub group. */
5443 head = next;
5444 next = NEXT_SEC (head);
5445 htab->stub_group[head->id].link_sec = curr;
5446 }
5447 }
5448 head = next;
5449 }
5450 }
5451 while (list++ != htab->input_list + htab->top_index);
5452
5453 free (htab->input_list);
5454 #undef PREV_SEC
5455 #undef NEXT_SEC
5456 }
5457
5458 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5459 erratum fix. */
5460
5461 static int
5462 a8_reloc_compare (const void *a, const void *b)
5463 {
5464 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5465 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5466
5467 if (ra->from < rb->from)
5468 return -1;
5469 else if (ra->from > rb->from)
5470 return 1;
5471 else
5472 return 0;
5473 }
5474
5475 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5476 const char *, char **);
5477
5478 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5479 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5480 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5481 otherwise. */
5482
5483 static bool
5484 cortex_a8_erratum_scan (bfd *input_bfd,
5485 struct bfd_link_info *info,
5486 struct a8_erratum_fix **a8_fixes_p,
5487 unsigned int *num_a8_fixes_p,
5488 unsigned int *a8_fix_table_size_p,
5489 struct a8_erratum_reloc *a8_relocs,
5490 unsigned int num_a8_relocs,
5491 unsigned prev_num_a8_fixes,
5492 bool *stub_changed_p)
5493 {
5494 asection *section;
5495 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5496 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5497 unsigned int num_a8_fixes = *num_a8_fixes_p;
5498 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5499
5500 if (htab == NULL)
5501 return false;
5502
5503 for (section = input_bfd->sections;
5504 section != NULL;
5505 section = section->next)
5506 {
5507 bfd_byte *contents = NULL;
5508 struct _arm_elf_section_data *sec_data;
5509 unsigned int span;
5510 bfd_vma base_vma;
5511
5512 if (elf_section_type (section) != SHT_PROGBITS
5513 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5514 || (section->flags & SEC_EXCLUDE) != 0
5515 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5516 || (section->output_section == bfd_abs_section_ptr))
5517 continue;
5518
5519 base_vma = section->output_section->vma + section->output_offset;
5520
5521 if (elf_section_data (section)->this_hdr.contents != NULL)
5522 contents = elf_section_data (section)->this_hdr.contents;
5523 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5524 return true;
5525
5526 sec_data = elf32_arm_section_data (section);
5527
5528 for (span = 0; span < sec_data->mapcount; span++)
5529 {
5530 unsigned int span_start = sec_data->map[span].vma;
5531 unsigned int span_end = (span == sec_data->mapcount - 1)
5532 ? section->size : sec_data->map[span + 1].vma;
5533 unsigned int i;
5534 char span_type = sec_data->map[span].type;
5535 bool last_was_32bit = false, last_was_branch = false;
5536
5537 if (span_type != 't')
5538 continue;
5539
5540 /* Span is entirely within a single 4KB region: skip scanning. */
5541 if (((base_vma + span_start) & ~0xfff)
5542 == ((base_vma + span_end) & ~0xfff))
5543 continue;
5544
5545 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5546
5547 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5548 * The branch target is in the same 4KB region as the
5549 first half of the branch.
5550 * The instruction before the branch is a 32-bit
5551 length non-branch instruction. */
5552 for (i = span_start; i < span_end;)
5553 {
5554 unsigned int insn = bfd_getl16 (&contents[i]);
5555 bool insn_32bit = false, is_blx = false, is_b = false;
5556 bool is_bl = false, is_bcc = false, is_32bit_branch;
5557
5558 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5559 insn_32bit = true;
5560
5561 if (insn_32bit)
5562 {
5563 /* Load the rest of the insn (in manual-friendly order). */
5564 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5565
5566 /* Encoding T4: B<c>.W. */
5567 is_b = (insn & 0xf800d000) == 0xf0009000;
5568 /* Encoding T1: BL<c>.W. */
5569 is_bl = (insn & 0xf800d000) == 0xf000d000;
5570 /* Encoding T2: BLX<c>.W. */
5571 is_blx = (insn & 0xf800d000) == 0xf000c000;
5572 /* Encoding T3: B<c>.W (not permitted in IT block). */
5573 is_bcc = (insn & 0xf800d000) == 0xf0008000
5574 && (insn & 0x07f00000) != 0x03800000;
5575 }
5576
5577 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5578
5579 if (((base_vma + i) & 0xfff) == 0xffe
5580 && insn_32bit
5581 && is_32bit_branch
5582 && last_was_32bit
5583 && ! last_was_branch)
5584 {
5585 bfd_signed_vma offset = 0;
5586 bool force_target_arm = false;
5587 bool force_target_thumb = false;
5588 bfd_vma target;
5589 enum elf32_arm_stub_type stub_type = arm_stub_none;
5590 struct a8_erratum_reloc key, *found;
5591 bool use_plt = false;
5592
5593 key.from = base_vma + i;
5594 found = (struct a8_erratum_reloc *)
5595 bsearch (&key, a8_relocs, num_a8_relocs,
5596 sizeof (struct a8_erratum_reloc),
5597 &a8_reloc_compare);
5598
5599 if (found)
5600 {
5601 char *error_message = NULL;
5602 struct elf_link_hash_entry *entry;
5603
5604 /* We don't care about the error returned from this
5605 function, only if there is glue or not. */
5606 entry = find_thumb_glue (info, found->sym_name,
5607 &error_message);
5608
5609 if (entry)
5610 found->non_a8_stub = true;
5611
5612 /* Keep a simpler condition, for the sake of clarity. */
5613 if (htab->root.splt != NULL && found->hash != NULL
5614 && found->hash->root.plt.offset != (bfd_vma) -1)
5615 use_plt = true;
5616
5617 if (found->r_type == R_ARM_THM_CALL)
5618 {
5619 if (found->branch_type == ST_BRANCH_TO_ARM
5620 || use_plt)
5621 force_target_arm = true;
5622 else
5623 force_target_thumb = true;
5624 }
5625 }
5626
5627 /* Check if we have an offending branch instruction. */
5628
5629 if (found && found->non_a8_stub)
5630 /* We've already made a stub for this instruction, e.g.
5631 it's a long branch or a Thumb->ARM stub. Assume that
5632 stub will suffice to work around the A8 erratum (see
5633 setting of always_after_branch above). */
5634 ;
5635 else if (is_bcc)
5636 {
5637 offset = (insn & 0x7ff) << 1;
5638 offset |= (insn & 0x3f0000) >> 4;
5639 offset |= (insn & 0x2000) ? 0x40000 : 0;
5640 offset |= (insn & 0x800) ? 0x80000 : 0;
5641 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5642 if (offset & 0x100000)
5643 offset |= ~ ((bfd_signed_vma) 0xfffff);
5644 stub_type = arm_stub_a8_veneer_b_cond;
5645 }
5646 else if (is_b || is_bl || is_blx)
5647 {
5648 int s = (insn & 0x4000000) != 0;
5649 int j1 = (insn & 0x2000) != 0;
5650 int j2 = (insn & 0x800) != 0;
5651 int i1 = !(j1 ^ s);
5652 int i2 = !(j2 ^ s);
5653
5654 offset = (insn & 0x7ff) << 1;
5655 offset |= (insn & 0x3ff0000) >> 4;
5656 offset |= i2 << 22;
5657 offset |= i1 << 23;
5658 offset |= s << 24;
5659 if (offset & 0x1000000)
5660 offset |= ~ ((bfd_signed_vma) 0xffffff);
5661
5662 if (is_blx)
5663 offset &= ~ ((bfd_signed_vma) 3);
5664
5665 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5666 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5667 }
5668
5669 if (stub_type != arm_stub_none)
5670 {
5671 bfd_vma pc_for_insn = base_vma + i + 4;
5672
5673 /* The original instruction is a BL, but the target is
5674 an ARM instruction. If we were not making a stub,
5675 the BL would have been converted to a BLX. Use the
5676 BLX stub instead in that case. */
5677 if (htab->use_blx && force_target_arm
5678 && stub_type == arm_stub_a8_veneer_bl)
5679 {
5680 stub_type = arm_stub_a8_veneer_blx;
5681 is_blx = true;
5682 is_bl = false;
5683 }
5684 /* Conversely, if the original instruction was
5685 BLX but the target is Thumb mode, use the BL
5686 stub. */
5687 else if (force_target_thumb
5688 && stub_type == arm_stub_a8_veneer_blx)
5689 {
5690 stub_type = arm_stub_a8_veneer_bl;
5691 is_blx = false;
5692 is_bl = true;
5693 }
5694
5695 if (is_blx)
5696 pc_for_insn &= ~ ((bfd_vma) 3);
5697
5698 /* If we found a relocation, use the proper destination,
5699 not the offset in the (unrelocated) instruction.
5700 Note this is always done if we switched the stub type
5701 above. */
5702 if (found)
5703 offset =
5704 (bfd_signed_vma) (found->destination - pc_for_insn);
5705
5706 /* If the stub will use a Thumb-mode branch to a
5707 PLT target, redirect it to the preceding Thumb
5708 entry point. */
5709 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5710 offset -= PLT_THUMB_STUB_SIZE;
5711
5712 target = pc_for_insn + offset;
5713
5714 /* The BLX stub is ARM-mode code. Adjust the offset to
5715 take the different PC value (+8 instead of +4) into
5716 account. */
5717 if (stub_type == arm_stub_a8_veneer_blx)
5718 offset += 4;
5719
5720 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5721 {
5722 char *stub_name = NULL;
5723
5724 if (num_a8_fixes == a8_fix_table_size)
5725 {
5726 a8_fix_table_size *= 2;
5727 a8_fixes = (struct a8_erratum_fix *)
5728 bfd_realloc (a8_fixes,
5729 sizeof (struct a8_erratum_fix)
5730 * a8_fix_table_size);
5731 }
5732
5733 if (num_a8_fixes < prev_num_a8_fixes)
5734 {
5735 /* If we're doing a subsequent scan,
5736 check if we've found the same fix as
5737 before, and try and reuse the stub
5738 name. */
5739 stub_name = a8_fixes[num_a8_fixes].stub_name;
5740 if ((a8_fixes[num_a8_fixes].section != section)
5741 || (a8_fixes[num_a8_fixes].offset != i))
5742 {
5743 free (stub_name);
5744 stub_name = NULL;
5745 *stub_changed_p = true;
5746 }
5747 }
5748
5749 if (!stub_name)
5750 {
5751 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5752 if (stub_name != NULL)
5753 sprintf (stub_name, "%x:%x", section->id, i);
5754 }
5755
5756 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5757 a8_fixes[num_a8_fixes].section = section;
5758 a8_fixes[num_a8_fixes].offset = i;
5759 a8_fixes[num_a8_fixes].target_offset =
5760 target - base_vma;
5761 a8_fixes[num_a8_fixes].orig_insn = insn;
5762 a8_fixes[num_a8_fixes].stub_name = stub_name;
5763 a8_fixes[num_a8_fixes].stub_type = stub_type;
5764 a8_fixes[num_a8_fixes].branch_type =
5765 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5766
5767 num_a8_fixes++;
5768 }
5769 }
5770 }
5771
5772 i += insn_32bit ? 4 : 2;
5773 last_was_32bit = insn_32bit;
5774 last_was_branch = is_32bit_branch;
5775 }
5776 }
5777
5778 if (elf_section_data (section)->this_hdr.contents == NULL)
5779 free (contents);
5780 }
5781
5782 *a8_fixes_p = a8_fixes;
5783 *num_a8_fixes_p = num_a8_fixes;
5784 *a8_fix_table_size_p = a8_fix_table_size;
5785
5786 return false;
5787 }
5788
5789 /* Create or update a stub entry depending on whether the stub can already be
5790 found in HTAB. The stub is identified by:
5791 - its type STUB_TYPE
5792 - its source branch (note that several can share the same stub) whose
5793 section and relocation (if any) are given by SECTION and IRELA
5794 respectively
5795 - its target symbol whose input section, hash, name, value and branch type
5796 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5797 respectively
5798
5799 If found, the value of the stub's target symbol is updated from SYM_VALUE
5800 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5801 TRUE and the stub entry is initialized.
5802
5803 Returns the stub that was created or updated, or NULL if an error
5804 occurred. */
5805
5806 static struct elf32_arm_stub_hash_entry *
5807 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5808 enum elf32_arm_stub_type stub_type, asection *section,
5809 Elf_Internal_Rela *irela, asection *sym_sec,
5810 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5811 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5812 bool *new_stub)
5813 {
5814 const asection *id_sec;
5815 char *stub_name;
5816 struct elf32_arm_stub_hash_entry *stub_entry;
5817 unsigned int r_type;
5818 bool sym_claimed = arm_stub_sym_claimed (stub_type);
5819
5820 BFD_ASSERT (stub_type != arm_stub_none);
5821 *new_stub = false;
5822
5823 if (sym_claimed)
5824 stub_name = sym_name;
5825 else
5826 {
5827 BFD_ASSERT (irela);
5828 BFD_ASSERT (section);
5829 BFD_ASSERT (section->id <= htab->top_id);
5830
5831 /* Support for grouping stub sections. */
5832 id_sec = htab->stub_group[section->id].link_sec;
5833
5834 /* Get the name of this stub. */
5835 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5836 stub_type);
5837 if (!stub_name)
5838 return NULL;
5839 }
5840
5841 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, false,
5842 false);
5843 /* The proper stub has already been created, just update its value. */
5844 if (stub_entry != NULL)
5845 {
5846 if (!sym_claimed)
5847 free (stub_name);
5848 stub_entry->target_value = sym_value;
5849 return stub_entry;
5850 }
5851
5852 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5853 if (stub_entry == NULL)
5854 {
5855 if (!sym_claimed)
5856 free (stub_name);
5857 return NULL;
5858 }
5859
5860 stub_entry->target_value = sym_value;
5861 stub_entry->target_section = sym_sec;
5862 stub_entry->stub_type = stub_type;
5863 stub_entry->h = hash;
5864 stub_entry->branch_type = branch_type;
5865
5866 if (sym_claimed)
5867 stub_entry->output_name = sym_name;
5868 else
5869 {
5870 if (sym_name == NULL)
5871 sym_name = "unnamed";
5872 stub_entry->output_name = (char *)
5873 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5874 + strlen (sym_name));
5875 if (stub_entry->output_name == NULL)
5876 {
5877 free (stub_name);
5878 return NULL;
5879 }
5880
5881 /* For historical reasons, use the existing names for ARM-to-Thumb and
5882 Thumb-to-ARM stubs. */
5883 r_type = ELF32_R_TYPE (irela->r_info);
5884 if ((r_type == (unsigned int) R_ARM_THM_CALL
5885 || r_type == (unsigned int) R_ARM_THM_JUMP24
5886 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5887 && branch_type == ST_BRANCH_TO_ARM)
5888 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5889 else if ((r_type == (unsigned int) R_ARM_CALL
5890 || r_type == (unsigned int) R_ARM_JUMP24)
5891 && branch_type == ST_BRANCH_TO_THUMB)
5892 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5893 else
5894 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5895 }
5896
5897 *new_stub = true;
5898 return stub_entry;
5899 }
5900
5901 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5902 gateway veneer to transition from non secure to secure state and create them
5903 accordingly.
5904
5905 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5906 defines the conditions that govern Secure Gateway veneer creation for a
5907 given symbol <SYM> as follows:
5908 - it has function type
5909 - it has non local binding
5910 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5911 same type, binding and value as <SYM> (called normal symbol).
5912 An entry function can handle secure state transition itself in which case
5913 its special symbol would have a different value from the normal symbol.
5914
5915 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5916 entry mapping while HTAB gives the name to hash entry mapping.
5917 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5918 created.
5919
5920 The return value gives whether a stub failed to be allocated. */
5921
5922 static bool
5923 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5924 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5925 int *cmse_stub_created)
5926 {
5927 const struct elf_backend_data *bed;
5928 Elf_Internal_Shdr *symtab_hdr;
5929 unsigned i, j, sym_count, ext_start;
5930 Elf_Internal_Sym *cmse_sym, *local_syms;
5931 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5932 enum arm_st_branch_type branch_type;
5933 char *sym_name, *lsym_name;
5934 bfd_vma sym_value;
5935 asection *section;
5936 struct elf32_arm_stub_hash_entry *stub_entry;
5937 bool is_v8m, new_stub, cmse_invalid, ret = true;
5938
5939 bed = get_elf_backend_data (input_bfd);
5940 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5941 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5942 ext_start = symtab_hdr->sh_info;
5943 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5944 && out_attr[Tag_CPU_arch_profile].i == 'M');
5945
5946 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5947 if (local_syms == NULL)
5948 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5949 symtab_hdr->sh_info, 0, NULL, NULL,
5950 NULL);
5951 if (symtab_hdr->sh_info && local_syms == NULL)
5952 return false;
5953
5954 /* Scan symbols. */
5955 for (i = 0; i < sym_count; i++)
5956 {
5957 cmse_invalid = false;
5958
5959 if (i < ext_start)
5960 {
5961 cmse_sym = &local_syms[i];
5962 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5963 symtab_hdr->sh_link,
5964 cmse_sym->st_name);
5965 if (!sym_name || !startswith (sym_name, CMSE_PREFIX))
5966 continue;
5967
5968 /* Special symbol with local binding. */
5969 cmse_invalid = true;
5970 }
5971 else
5972 {
5973 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5974 sym_name = (char *) cmse_hash->root.root.root.string;
5975 if (!startswith (sym_name, CMSE_PREFIX))
5976 continue;
5977
5978 /* Special symbol has incorrect binding or type. */
5979 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5980 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5981 || cmse_hash->root.type != STT_FUNC)
5982 cmse_invalid = true;
5983 }
5984
5985 if (!is_v8m)
5986 {
5987 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
5988 "ARMv8-M architecture or later"),
5989 input_bfd, sym_name);
5990 is_v8m = true; /* Avoid multiple warning. */
5991 ret = false;
5992 }
5993
5994 if (cmse_invalid)
5995 {
5996 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
5997 " a global or weak function symbol"),
5998 input_bfd, sym_name);
5999 ret = false;
6000 if (i < ext_start)
6001 continue;
6002 }
6003
6004 sym_name += strlen (CMSE_PREFIX);
6005 hash = (struct elf32_arm_link_hash_entry *)
6006 elf_link_hash_lookup (&(htab)->root, sym_name, false, false, true);
6007
6008 /* No associated normal symbol or it is neither global nor weak. */
6009 if (!hash
6010 || (hash->root.root.type != bfd_link_hash_defined
6011 && hash->root.root.type != bfd_link_hash_defweak)
6012 || hash->root.type != STT_FUNC)
6013 {
6014 /* Initialize here to avoid warning about use of possibly
6015 uninitialized variable. */
6016 j = 0;
6017
6018 if (!hash)
6019 {
6020 /* Searching for a normal symbol with local binding. */
6021 for (; j < ext_start; j++)
6022 {
6023 lsym_name =
6024 bfd_elf_string_from_elf_section (input_bfd,
6025 symtab_hdr->sh_link,
6026 local_syms[j].st_name);
6027 if (!strcmp (sym_name, lsym_name))
6028 break;
6029 }
6030 }
6031
6032 if (hash || j < ext_start)
6033 {
6034 _bfd_error_handler
6035 (_("%pB: invalid standard symbol `%s'; it must be "
6036 "a global or weak function symbol"),
6037 input_bfd, sym_name);
6038 }
6039 else
6040 _bfd_error_handler
6041 (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name);
6042 ret = false;
6043 if (!hash)
6044 continue;
6045 }
6046
6047 sym_value = hash->root.root.u.def.value;
6048 section = hash->root.root.u.def.section;
6049
6050 if (cmse_hash->root.root.u.def.section != section)
6051 {
6052 _bfd_error_handler
6053 (_("%pB: `%s' and its special symbol are in different sections"),
6054 input_bfd, sym_name);
6055 ret = false;
6056 }
6057 if (cmse_hash->root.root.u.def.value != sym_value)
6058 continue; /* Ignore: could be an entry function starting with SG. */
6059
6060 /* If this section is a link-once section that will be discarded, then
6061 don't create any stubs. */
6062 if (section->output_section == NULL)
6063 {
6064 _bfd_error_handler
6065 (_("%pB: entry function `%s' not output"), input_bfd, sym_name);
6066 continue;
6067 }
6068
6069 if (hash->root.size == 0)
6070 {
6071 _bfd_error_handler
6072 (_("%pB: entry function `%s' is empty"), input_bfd, sym_name);
6073 ret = false;
6074 }
6075
6076 if (!ret)
6077 continue;
6078 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6079 stub_entry
6080 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6081 NULL, NULL, section, hash, sym_name,
6082 sym_value, branch_type, &new_stub);
6083
6084 if (stub_entry == NULL)
6085 ret = false;
6086 else
6087 {
6088 BFD_ASSERT (new_stub);
6089 (*cmse_stub_created)++;
6090 }
6091 }
6092
6093 if (!symtab_hdr->contents)
6094 free (local_syms);
6095 return ret;
6096 }
6097
6098 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
6099 code entry function, ie can be called from non secure code without using a
6100 veneer. */
6101
6102 static bool
6103 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
6104 {
6105 bfd_byte contents[4];
6106 uint32_t first_insn;
6107 asection *section;
6108 file_ptr offset;
6109 bfd *abfd;
6110
6111 /* Defined symbol of function type. */
6112 if (hash->root.root.type != bfd_link_hash_defined
6113 && hash->root.root.type != bfd_link_hash_defweak)
6114 return false;
6115 if (hash->root.type != STT_FUNC)
6116 return false;
6117
6118 /* Read first instruction. */
6119 section = hash->root.root.u.def.section;
6120 abfd = section->owner;
6121 offset = hash->root.root.u.def.value - section->vma;
6122 if (!bfd_get_section_contents (abfd, section, contents, offset,
6123 sizeof (contents)))
6124 return false;
6125
6126 first_insn = bfd_get_32 (abfd, contents);
6127
6128 /* Starts by SG instruction. */
6129 return first_insn == 0xe97fe97f;
6130 }
6131
6132 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6133 secure gateway veneers (ie. the veneers was not in the input import library)
6134 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
6135
6136 static bool
6137 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
6138 {
6139 struct elf32_arm_stub_hash_entry *stub_entry;
6140 struct bfd_link_info *info;
6141
6142 /* Massage our args to the form they really have. */
6143 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
6144 info = (struct bfd_link_info *) gen_info;
6145
6146 if (info->out_implib_bfd)
6147 return true;
6148
6149 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
6150 return true;
6151
6152 if (stub_entry->stub_offset == (bfd_vma) -1)
6153 _bfd_error_handler (" %s", stub_entry->output_name);
6154
6155 return true;
6156 }
6157
6158 /* Set offset of each secure gateway veneers so that its address remain
6159 identical to the one in the input import library referred by
6160 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
6161 (present in input import library but absent from the executable being
6162 linked) or if new veneers appeared and there is no output import library
6163 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6164 number of secure gateway veneers found in the input import library.
6165
6166 The function returns whether an error occurred. If no error occurred,
6167 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6168 and this function and HTAB->new_cmse_stub_offset is set to the biggest
6169 veneer observed set for new veneers to be layed out after. */
6170
6171 static bool
6172 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
6173 struct elf32_arm_link_hash_table *htab,
6174 int *cmse_stub_created)
6175 {
6176 long symsize;
6177 char *sym_name;
6178 flagword flags;
6179 long i, symcount;
6180 bfd *in_implib_bfd;
6181 asection *stub_out_sec;
6182 bool ret = true;
6183 Elf_Internal_Sym *intsym;
6184 const char *out_sec_name;
6185 bfd_size_type cmse_stub_size;
6186 asymbol **sympp = NULL, *sym;
6187 struct elf32_arm_link_hash_entry *hash;
6188 const insn_sequence *cmse_stub_template;
6189 struct elf32_arm_stub_hash_entry *stub_entry;
6190 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
6191 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
6192 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
6193
6194 /* No input secure gateway import library. */
6195 if (!htab->in_implib_bfd)
6196 return true;
6197
6198 in_implib_bfd = htab->in_implib_bfd;
6199 if (!htab->cmse_implib)
6200 {
6201 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6202 "Gateway import libraries"), in_implib_bfd);
6203 return false;
6204 }
6205
6206 /* Get symbol table size. */
6207 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
6208 if (symsize < 0)
6209 return false;
6210
6211 /* Read in the input secure gateway import library's symbol table. */
6212 sympp = (asymbol **) bfd_malloc (symsize);
6213 if (sympp == NULL)
6214 return false;
6215
6216 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
6217 if (symcount < 0)
6218 {
6219 ret = false;
6220 goto free_sym_buf;
6221 }
6222
6223 htab->new_cmse_stub_offset = 0;
6224 cmse_stub_size =
6225 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
6226 &cmse_stub_template,
6227 &cmse_stub_template_size);
6228 out_sec_name =
6229 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
6230 stub_out_sec =
6231 bfd_get_section_by_name (htab->obfd, out_sec_name);
6232 if (stub_out_sec != NULL)
6233 cmse_stub_sec_vma = stub_out_sec->vma;
6234
6235 /* Set addresses of veneers mentionned in input secure gateway import
6236 library's symbol table. */
6237 for (i = 0; i < symcount; i++)
6238 {
6239 sym = sympp[i];
6240 flags = sym->flags;
6241 sym_name = (char *) bfd_asymbol_name (sym);
6242 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
6243
6244 if (sym->section != bfd_abs_section_ptr
6245 || !(flags & (BSF_GLOBAL | BSF_WEAK))
6246 || (flags & BSF_FUNCTION) != BSF_FUNCTION
6247 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
6248 != ST_BRANCH_TO_THUMB))
6249 {
6250 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6251 "symbol should be absolute, global and "
6252 "refer to Thumb functions"),
6253 in_implib_bfd, sym_name);
6254 ret = false;
6255 continue;
6256 }
6257
6258 veneer_value = bfd_asymbol_value (sym);
6259 stub_offset = veneer_value - cmse_stub_sec_vma;
6260 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
6261 false, false);
6262 hash = (struct elf32_arm_link_hash_entry *)
6263 elf_link_hash_lookup (&(htab)->root, sym_name, false, false, true);
6264
6265 /* Stub entry should have been created by cmse_scan or the symbol be of
6266 a secure function callable from non secure code. */
6267 if (!stub_entry && !hash)
6268 {
6269 bool new_stub;
6270
6271 _bfd_error_handler
6272 (_("entry function `%s' disappeared from secure code"), sym_name);
6273 hash = (struct elf32_arm_link_hash_entry *)
6274 elf_link_hash_lookup (&(htab)->root, sym_name, true, true, true);
6275 stub_entry
6276 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6277 NULL, NULL, bfd_abs_section_ptr, hash,
6278 sym_name, veneer_value,
6279 ST_BRANCH_TO_THUMB, &new_stub);
6280 if (stub_entry == NULL)
6281 ret = false;
6282 else
6283 {
6284 BFD_ASSERT (new_stub);
6285 new_cmse_stubs_created++;
6286 (*cmse_stub_created)++;
6287 }
6288 stub_entry->stub_template_size = stub_entry->stub_size = 0;
6289 stub_entry->stub_offset = stub_offset;
6290 }
6291 /* Symbol found is not callable from non secure code. */
6292 else if (!stub_entry)
6293 {
6294 if (!cmse_entry_fct_p (hash))
6295 {
6296 _bfd_error_handler (_("`%s' refers to a non entry function"),
6297 sym_name);
6298 ret = false;
6299 }
6300 continue;
6301 }
6302 else
6303 {
6304 /* Only stubs for SG veneers should have been created. */
6305 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6306
6307 /* Check visibility hasn't changed. */
6308 if (!!(flags & BSF_GLOBAL)
6309 != (hash->root.root.type == bfd_link_hash_defined))
6310 _bfd_error_handler
6311 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd,
6312 sym_name);
6313
6314 stub_entry->stub_offset = stub_offset;
6315 }
6316
6317 /* Size should match that of a SG veneer. */
6318 if (intsym->st_size != cmse_stub_size)
6319 {
6320 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6321 in_implib_bfd, sym_name);
6322 ret = false;
6323 }
6324
6325 /* Previous veneer address is before current SG veneer section. */
6326 if (veneer_value < cmse_stub_sec_vma)
6327 {
6328 /* Avoid offset underflow. */
6329 if (stub_entry)
6330 stub_entry->stub_offset = 0;
6331 stub_offset = 0;
6332 ret = false;
6333 }
6334
6335 /* Complain if stub offset not a multiple of stub size. */
6336 if (stub_offset % cmse_stub_size)
6337 {
6338 _bfd_error_handler
6339 (_("offset of veneer for entry function `%s' not a multiple of "
6340 "its size"), sym_name);
6341 ret = false;
6342 }
6343
6344 if (!ret)
6345 continue;
6346
6347 new_cmse_stubs_created--;
6348 if (veneer_value < cmse_stub_array_start)
6349 cmse_stub_array_start = veneer_value;
6350 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6351 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6352 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6353 }
6354
6355 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6356 {
6357 BFD_ASSERT (new_cmse_stubs_created > 0);
6358 _bfd_error_handler
6359 (_("new entry function(s) introduced but no output import library "
6360 "specified:"));
6361 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6362 }
6363
6364 if (cmse_stub_array_start != cmse_stub_sec_vma)
6365 {
6366 _bfd_error_handler
6367 (_("start address of `%s' is different from previous link"),
6368 out_sec_name);
6369 ret = false;
6370 }
6371
6372 free_sym_buf:
6373 free (sympp);
6374 return ret;
6375 }
6376
6377 /* Determine and set the size of the stub section for a final link.
6378
6379 The basic idea here is to examine all the relocations looking for
6380 PC-relative calls to a target that is unreachable with a "bl"
6381 instruction. */
6382
6383 bool
6384 elf32_arm_size_stubs (bfd *output_bfd,
6385 bfd *stub_bfd,
6386 struct bfd_link_info *info,
6387 bfd_signed_vma group_size,
6388 asection * (*add_stub_section) (const char *, asection *,
6389 asection *,
6390 unsigned int),
6391 void (*layout_sections_again) (void))
6392 {
6393 bool ret = true;
6394 obj_attribute *out_attr;
6395 int cmse_stub_created = 0;
6396 bfd_size_type stub_group_size;
6397 bool m_profile, stubs_always_after_branch, first_veneer_scan = true;
6398 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6399 struct a8_erratum_fix *a8_fixes = NULL;
6400 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6401 struct a8_erratum_reloc *a8_relocs = NULL;
6402 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6403
6404 if (htab == NULL)
6405 return false;
6406
6407 if (htab->fix_cortex_a8)
6408 {
6409 a8_fixes = (struct a8_erratum_fix *)
6410 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6411 a8_relocs = (struct a8_erratum_reloc *)
6412 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6413 }
6414
6415 /* Propagate mach to stub bfd, because it may not have been
6416 finalized when we created stub_bfd. */
6417 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6418 bfd_get_mach (output_bfd));
6419
6420 /* Stash our params away. */
6421 htab->stub_bfd = stub_bfd;
6422 htab->add_stub_section = add_stub_section;
6423 htab->layout_sections_again = layout_sections_again;
6424 stubs_always_after_branch = group_size < 0;
6425
6426 out_attr = elf_known_obj_attributes_proc (output_bfd);
6427 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6428
6429 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6430 as the first half of a 32-bit branch straddling two 4K pages. This is a
6431 crude way of enforcing that. */
6432 if (htab->fix_cortex_a8)
6433 stubs_always_after_branch = 1;
6434
6435 if (group_size < 0)
6436 stub_group_size = -group_size;
6437 else
6438 stub_group_size = group_size;
6439
6440 if (stub_group_size == 1)
6441 {
6442 /* Default values. */
6443 /* Thumb branch range is +-4MB has to be used as the default
6444 maximum size (a given section can contain both ARM and Thumb
6445 code, so the worst case has to be taken into account).
6446
6447 This value is 24K less than that, which allows for 2025
6448 12-byte stubs. If we exceed that, then we will fail to link.
6449 The user will have to relink with an explicit group size
6450 option. */
6451 stub_group_size = 4170000;
6452 }
6453
6454 group_sections (htab, stub_group_size, stubs_always_after_branch);
6455
6456 /* If we're applying the cortex A8 fix, we need to determine the
6457 program header size now, because we cannot change it later --
6458 that could alter section placements. Notice the A8 erratum fix
6459 ends up requiring the section addresses to remain unchanged
6460 modulo the page size. That's something we cannot represent
6461 inside BFD, and we don't want to force the section alignment to
6462 be the page size. */
6463 if (htab->fix_cortex_a8)
6464 (*htab->layout_sections_again) ();
6465
6466 while (1)
6467 {
6468 bfd *input_bfd;
6469 unsigned int bfd_indx;
6470 asection *stub_sec;
6471 enum elf32_arm_stub_type stub_type;
6472 bool stub_changed = false;
6473 unsigned prev_num_a8_fixes = num_a8_fixes;
6474
6475 num_a8_fixes = 0;
6476 for (input_bfd = info->input_bfds, bfd_indx = 0;
6477 input_bfd != NULL;
6478 input_bfd = input_bfd->link.next, bfd_indx++)
6479 {
6480 Elf_Internal_Shdr *symtab_hdr;
6481 asection *section;
6482 Elf_Internal_Sym *local_syms = NULL;
6483
6484 if (!is_arm_elf (input_bfd))
6485 continue;
6486 if ((input_bfd->flags & DYNAMIC) != 0
6487 && (elf_sym_hashes (input_bfd) == NULL
6488 || (elf_dyn_lib_class (input_bfd) & DYN_AS_NEEDED) != 0))
6489 continue;
6490
6491 num_a8_relocs = 0;
6492
6493 /* We'll need the symbol table in a second. */
6494 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6495 if (symtab_hdr->sh_info == 0)
6496 continue;
6497
6498 /* Limit scan of symbols to object file whose profile is
6499 Microcontroller to not hinder performance in the general case. */
6500 if (m_profile && first_veneer_scan)
6501 {
6502 struct elf_link_hash_entry **sym_hashes;
6503
6504 sym_hashes = elf_sym_hashes (input_bfd);
6505 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6506 &cmse_stub_created))
6507 goto error_ret_free_local;
6508
6509 if (cmse_stub_created != 0)
6510 stub_changed = true;
6511 }
6512
6513 /* Walk over each section attached to the input bfd. */
6514 for (section = input_bfd->sections;
6515 section != NULL;
6516 section = section->next)
6517 {
6518 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6519
6520 /* If there aren't any relocs, then there's nothing more
6521 to do. */
6522 if ((section->flags & SEC_RELOC) == 0
6523 || section->reloc_count == 0
6524 || (section->flags & SEC_CODE) == 0)
6525 continue;
6526
6527 /* If this section is a link-once section that will be
6528 discarded, then don't create any stubs. */
6529 if (section->output_section == NULL
6530 || section->output_section->owner != output_bfd)
6531 continue;
6532
6533 /* Get the relocs. */
6534 internal_relocs
6535 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6536 NULL, info->keep_memory);
6537 if (internal_relocs == NULL)
6538 goto error_ret_free_local;
6539
6540 /* Now examine each relocation. */
6541 irela = internal_relocs;
6542 irelaend = irela + section->reloc_count;
6543 for (; irela < irelaend; irela++)
6544 {
6545 unsigned int r_type, r_indx;
6546 asection *sym_sec;
6547 bfd_vma sym_value;
6548 bfd_vma destination;
6549 struct elf32_arm_link_hash_entry *hash;
6550 const char *sym_name;
6551 unsigned char st_type;
6552 enum arm_st_branch_type branch_type;
6553 bool created_stub = false;
6554
6555 r_type = ELF32_R_TYPE (irela->r_info);
6556 r_indx = ELF32_R_SYM (irela->r_info);
6557
6558 if (r_type >= (unsigned int) R_ARM_max)
6559 {
6560 bfd_set_error (bfd_error_bad_value);
6561 error_ret_free_internal:
6562 if (elf_section_data (section)->relocs == NULL)
6563 free (internal_relocs);
6564 /* Fall through. */
6565 error_ret_free_local:
6566 if (symtab_hdr->contents != (unsigned char *) local_syms)
6567 free (local_syms);
6568 return false;
6569 }
6570
6571 hash = NULL;
6572 if (r_indx >= symtab_hdr->sh_info)
6573 hash = elf32_arm_hash_entry
6574 (elf_sym_hashes (input_bfd)
6575 [r_indx - symtab_hdr->sh_info]);
6576
6577 /* Only look for stubs on branch instructions, or
6578 non-relaxed TLSCALL */
6579 if ((r_type != (unsigned int) R_ARM_CALL)
6580 && (r_type != (unsigned int) R_ARM_THM_CALL)
6581 && (r_type != (unsigned int) R_ARM_JUMP24)
6582 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6583 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6584 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6585 && (r_type != (unsigned int) R_ARM_PLT32)
6586 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6587 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6588 && r_type == (elf32_arm_tls_transition
6589 (info, r_type,
6590 (struct elf_link_hash_entry *) hash))
6591 && ((hash ? hash->tls_type
6592 : (elf32_arm_local_got_tls_type
6593 (input_bfd)[r_indx]))
6594 & GOT_TLS_GDESC) != 0))
6595 continue;
6596
6597 /* Now determine the call target, its name, value,
6598 section. */
6599 sym_sec = NULL;
6600 sym_value = 0;
6601 destination = 0;
6602 sym_name = NULL;
6603
6604 if (r_type == (unsigned int) R_ARM_TLS_CALL
6605 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6606 {
6607 /* A non-relaxed TLS call. The target is the
6608 plt-resident trampoline and nothing to do
6609 with the symbol. */
6610 BFD_ASSERT (htab->tls_trampoline > 0);
6611 sym_sec = htab->root.splt;
6612 sym_value = htab->tls_trampoline;
6613 hash = 0;
6614 st_type = STT_FUNC;
6615 branch_type = ST_BRANCH_TO_ARM;
6616 }
6617 else if (!hash)
6618 {
6619 /* It's a local symbol. */
6620 Elf_Internal_Sym *sym;
6621
6622 if (local_syms == NULL)
6623 {
6624 local_syms
6625 = (Elf_Internal_Sym *) symtab_hdr->contents;
6626 if (local_syms == NULL)
6627 local_syms
6628 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6629 symtab_hdr->sh_info, 0,
6630 NULL, NULL, NULL);
6631 if (local_syms == NULL)
6632 goto error_ret_free_internal;
6633 }
6634
6635 sym = local_syms + r_indx;
6636 if (sym->st_shndx == SHN_UNDEF)
6637 sym_sec = bfd_und_section_ptr;
6638 else if (sym->st_shndx == SHN_ABS)
6639 sym_sec = bfd_abs_section_ptr;
6640 else if (sym->st_shndx == SHN_COMMON)
6641 sym_sec = bfd_com_section_ptr;
6642 else
6643 sym_sec =
6644 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6645
6646 if (!sym_sec)
6647 /* This is an undefined symbol. It can never
6648 be resolved. */
6649 continue;
6650
6651 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6652 sym_value = sym->st_value;
6653 destination = (sym_value + irela->r_addend
6654 + sym_sec->output_offset
6655 + sym_sec->output_section->vma);
6656 st_type = ELF_ST_TYPE (sym->st_info);
6657 branch_type =
6658 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6659 sym_name
6660 = bfd_elf_string_from_elf_section (input_bfd,
6661 symtab_hdr->sh_link,
6662 sym->st_name);
6663 }
6664 else
6665 {
6666 /* It's an external symbol. */
6667 while (hash->root.root.type == bfd_link_hash_indirect
6668 || hash->root.root.type == bfd_link_hash_warning)
6669 hash = ((struct elf32_arm_link_hash_entry *)
6670 hash->root.root.u.i.link);
6671
6672 if (hash->root.root.type == bfd_link_hash_defined
6673 || hash->root.root.type == bfd_link_hash_defweak)
6674 {
6675 sym_sec = hash->root.root.u.def.section;
6676 sym_value = hash->root.root.u.def.value;
6677
6678 struct elf32_arm_link_hash_table *globals =
6679 elf32_arm_hash_table (info);
6680
6681 /* For a destination in a shared library,
6682 use the PLT stub as target address to
6683 decide whether a branch stub is
6684 needed. */
6685 if (globals != NULL
6686 && globals->root.splt != NULL
6687 && hash != NULL
6688 && hash->root.plt.offset != (bfd_vma) -1)
6689 {
6690 sym_sec = globals->root.splt;
6691 sym_value = hash->root.plt.offset;
6692 if (sym_sec->output_section != NULL)
6693 destination = (sym_value
6694 + sym_sec->output_offset
6695 + sym_sec->output_section->vma);
6696 }
6697 else if (sym_sec->output_section != NULL)
6698 destination = (sym_value + irela->r_addend
6699 + sym_sec->output_offset
6700 + sym_sec->output_section->vma);
6701 }
6702 else if ((hash->root.root.type == bfd_link_hash_undefined)
6703 || (hash->root.root.type == bfd_link_hash_undefweak))
6704 {
6705 /* For a shared library, use the PLT stub as
6706 target address to decide whether a long
6707 branch stub is needed.
6708 For absolute code, they cannot be handled. */
6709 struct elf32_arm_link_hash_table *globals =
6710 elf32_arm_hash_table (info);
6711
6712 if (globals != NULL
6713 && globals->root.splt != NULL
6714 && hash != NULL
6715 && hash->root.plt.offset != (bfd_vma) -1)
6716 {
6717 sym_sec = globals->root.splt;
6718 sym_value = hash->root.plt.offset;
6719 if (sym_sec->output_section != NULL)
6720 destination = (sym_value
6721 + sym_sec->output_offset
6722 + sym_sec->output_section->vma);
6723 }
6724 else
6725 continue;
6726 }
6727 else
6728 {
6729 bfd_set_error (bfd_error_bad_value);
6730 goto error_ret_free_internal;
6731 }
6732 st_type = hash->root.type;
6733 branch_type =
6734 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6735 sym_name = hash->root.root.root.string;
6736 }
6737
6738 do
6739 {
6740 bool new_stub;
6741 struct elf32_arm_stub_hash_entry *stub_entry;
6742
6743 /* Determine what (if any) linker stub is needed. */
6744 stub_type = arm_type_of_stub (info, section, irela,
6745 st_type, &branch_type,
6746 hash, destination, sym_sec,
6747 input_bfd, sym_name);
6748 if (stub_type == arm_stub_none)
6749 break;
6750
6751 /* We've either created a stub for this reloc already,
6752 or we are about to. */
6753 stub_entry =
6754 elf32_arm_create_stub (htab, stub_type, section, irela,
6755 sym_sec, hash,
6756 (char *) sym_name, sym_value,
6757 branch_type, &new_stub);
6758
6759 created_stub = stub_entry != NULL;
6760 if (!created_stub)
6761 goto error_ret_free_internal;
6762 else if (!new_stub)
6763 break;
6764 else
6765 stub_changed = true;
6766 }
6767 while (0);
6768
6769 /* Look for relocations which might trigger Cortex-A8
6770 erratum. */
6771 if (htab->fix_cortex_a8
6772 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6773 || r_type == (unsigned int) R_ARM_THM_JUMP19
6774 || r_type == (unsigned int) R_ARM_THM_CALL
6775 || r_type == (unsigned int) R_ARM_THM_XPC22))
6776 {
6777 bfd_vma from = section->output_section->vma
6778 + section->output_offset
6779 + irela->r_offset;
6780
6781 if ((from & 0xfff) == 0xffe)
6782 {
6783 /* Found a candidate. Note we haven't checked the
6784 destination is within 4K here: if we do so (and
6785 don't create an entry in a8_relocs) we can't tell
6786 that a branch should have been relocated when
6787 scanning later. */
6788 if (num_a8_relocs == a8_reloc_table_size)
6789 {
6790 a8_reloc_table_size *= 2;
6791 a8_relocs = (struct a8_erratum_reloc *)
6792 bfd_realloc (a8_relocs,
6793 sizeof (struct a8_erratum_reloc)
6794 * a8_reloc_table_size);
6795 }
6796
6797 a8_relocs[num_a8_relocs].from = from;
6798 a8_relocs[num_a8_relocs].destination = destination;
6799 a8_relocs[num_a8_relocs].r_type = r_type;
6800 a8_relocs[num_a8_relocs].branch_type = branch_type;
6801 a8_relocs[num_a8_relocs].sym_name = sym_name;
6802 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6803 a8_relocs[num_a8_relocs].hash = hash;
6804
6805 num_a8_relocs++;
6806 }
6807 }
6808 }
6809
6810 /* We're done with the internal relocs, free them. */
6811 if (elf_section_data (section)->relocs == NULL)
6812 free (internal_relocs);
6813 }
6814
6815 if (htab->fix_cortex_a8)
6816 {
6817 /* Sort relocs which might apply to Cortex-A8 erratum. */
6818 qsort (a8_relocs, num_a8_relocs,
6819 sizeof (struct a8_erratum_reloc),
6820 &a8_reloc_compare);
6821
6822 /* Scan for branches which might trigger Cortex-A8 erratum. */
6823 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6824 &num_a8_fixes, &a8_fix_table_size,
6825 a8_relocs, num_a8_relocs,
6826 prev_num_a8_fixes, &stub_changed)
6827 != 0)
6828 goto error_ret_free_local;
6829 }
6830
6831 if (local_syms != NULL
6832 && symtab_hdr->contents != (unsigned char *) local_syms)
6833 {
6834 if (!info->keep_memory)
6835 free (local_syms);
6836 else
6837 symtab_hdr->contents = (unsigned char *) local_syms;
6838 }
6839 }
6840
6841 if (first_veneer_scan
6842 && !set_cmse_veneer_addr_from_implib (info, htab,
6843 &cmse_stub_created))
6844 ret = false;
6845
6846 if (prev_num_a8_fixes != num_a8_fixes)
6847 stub_changed = true;
6848
6849 if (!stub_changed)
6850 break;
6851
6852 /* OK, we've added some stubs. Find out the new size of the
6853 stub sections. */
6854 for (stub_sec = htab->stub_bfd->sections;
6855 stub_sec != NULL;
6856 stub_sec = stub_sec->next)
6857 {
6858 /* Ignore non-stub sections. */
6859 if (!strstr (stub_sec->name, STUB_SUFFIX))
6860 continue;
6861
6862 stub_sec->size = 0;
6863 }
6864
6865 /* Add new SG veneers after those already in the input import
6866 library. */
6867 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6868 stub_type++)
6869 {
6870 bfd_vma *start_offset_p;
6871 asection **stub_sec_p;
6872
6873 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6874 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6875 if (start_offset_p == NULL)
6876 continue;
6877
6878 BFD_ASSERT (stub_sec_p != NULL);
6879 if (*stub_sec_p != NULL)
6880 (*stub_sec_p)->size = *start_offset_p;
6881 }
6882
6883 /* Compute stub section size, considering padding. */
6884 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6885 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6886 stub_type++)
6887 {
6888 int size, padding;
6889 asection **stub_sec_p;
6890
6891 padding = arm_dedicated_stub_section_padding (stub_type);
6892 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6893 /* Skip if no stub input section or no stub section padding
6894 required. */
6895 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6896 continue;
6897 /* Stub section padding required but no dedicated section. */
6898 BFD_ASSERT (stub_sec_p);
6899
6900 size = (*stub_sec_p)->size;
6901 size = (size + padding - 1) & ~(padding - 1);
6902 (*stub_sec_p)->size = size;
6903 }
6904
6905 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6906 if (htab->fix_cortex_a8)
6907 for (i = 0; i < num_a8_fixes; i++)
6908 {
6909 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6910 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6911
6912 if (stub_sec == NULL)
6913 return false;
6914
6915 stub_sec->size
6916 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6917 NULL);
6918 }
6919
6920
6921 /* Ask the linker to do its stuff. */
6922 (*htab->layout_sections_again) ();
6923 first_veneer_scan = false;
6924 }
6925
6926 /* Add stubs for Cortex-A8 erratum fixes now. */
6927 if (htab->fix_cortex_a8)
6928 {
6929 for (i = 0; i < num_a8_fixes; i++)
6930 {
6931 struct elf32_arm_stub_hash_entry *stub_entry;
6932 char *stub_name = a8_fixes[i].stub_name;
6933 asection *section = a8_fixes[i].section;
6934 unsigned int section_id = a8_fixes[i].section->id;
6935 asection *link_sec = htab->stub_group[section_id].link_sec;
6936 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6937 const insn_sequence *template_sequence;
6938 int template_size, size = 0;
6939
6940 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6941 true, false);
6942 if (stub_entry == NULL)
6943 {
6944 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6945 section->owner, stub_name);
6946 return false;
6947 }
6948
6949 stub_entry->stub_sec = stub_sec;
6950 stub_entry->stub_offset = (bfd_vma) -1;
6951 stub_entry->id_sec = link_sec;
6952 stub_entry->stub_type = a8_fixes[i].stub_type;
6953 stub_entry->source_value = a8_fixes[i].offset;
6954 stub_entry->target_section = a8_fixes[i].section;
6955 stub_entry->target_value = a8_fixes[i].target_offset;
6956 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6957 stub_entry->branch_type = a8_fixes[i].branch_type;
6958
6959 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6960 &template_sequence,
6961 &template_size);
6962
6963 stub_entry->stub_size = size;
6964 stub_entry->stub_template = template_sequence;
6965 stub_entry->stub_template_size = template_size;
6966 }
6967
6968 /* Stash the Cortex-A8 erratum fix array for use later in
6969 elf32_arm_write_section(). */
6970 htab->a8_erratum_fixes = a8_fixes;
6971 htab->num_a8_erratum_fixes = num_a8_fixes;
6972 }
6973 else
6974 {
6975 htab->a8_erratum_fixes = NULL;
6976 htab->num_a8_erratum_fixes = 0;
6977 }
6978 return ret;
6979 }
6980
6981 /* Build all the stubs associated with the current output file. The
6982 stubs are kept in a hash table attached to the main linker hash
6983 table. We also set up the .plt entries for statically linked PIC
6984 functions here. This function is called via arm_elf_finish in the
6985 linker. */
6986
6987 bool
6988 elf32_arm_build_stubs (struct bfd_link_info *info)
6989 {
6990 asection *stub_sec;
6991 struct bfd_hash_table *table;
6992 enum elf32_arm_stub_type stub_type;
6993 struct elf32_arm_link_hash_table *htab;
6994
6995 htab = elf32_arm_hash_table (info);
6996 if (htab == NULL)
6997 return false;
6998
6999 for (stub_sec = htab->stub_bfd->sections;
7000 stub_sec != NULL;
7001 stub_sec = stub_sec->next)
7002 {
7003 bfd_size_type size;
7004
7005 /* Ignore non-stub sections. */
7006 if (!strstr (stub_sec->name, STUB_SUFFIX))
7007 continue;
7008
7009 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
7010 must at least be done for stub section requiring padding and for SG
7011 veneers to ensure that a non secure code branching to a removed SG
7012 veneer causes an error. */
7013 size = stub_sec->size;
7014 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
7015 if (stub_sec->contents == NULL && size != 0)
7016 return false;
7017
7018 stub_sec->size = 0;
7019 }
7020
7021 /* Add new SG veneers after those already in the input import library. */
7022 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7023 {
7024 bfd_vma *start_offset_p;
7025 asection **stub_sec_p;
7026
7027 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
7028 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
7029 if (start_offset_p == NULL)
7030 continue;
7031
7032 BFD_ASSERT (stub_sec_p != NULL);
7033 if (*stub_sec_p != NULL)
7034 (*stub_sec_p)->size = *start_offset_p;
7035 }
7036
7037 /* Build the stubs as directed by the stub hash table. */
7038 table = &htab->stub_hash_table;
7039 bfd_hash_traverse (table, arm_build_one_stub, info);
7040 if (htab->fix_cortex_a8)
7041 {
7042 /* Place the cortex a8 stubs last. */
7043 htab->fix_cortex_a8 = -1;
7044 bfd_hash_traverse (table, arm_build_one_stub, info);
7045 }
7046
7047 return true;
7048 }
7049
7050 /* Locate the Thumb encoded calling stub for NAME. */
7051
7052 static struct elf_link_hash_entry *
7053 find_thumb_glue (struct bfd_link_info *link_info,
7054 const char *name,
7055 char **error_message)
7056 {
7057 char *tmp_name;
7058 struct elf_link_hash_entry *hash;
7059 struct elf32_arm_link_hash_table *hash_table;
7060
7061 /* We need a pointer to the armelf specific hash table. */
7062 hash_table = elf32_arm_hash_table (link_info);
7063 if (hash_table == NULL)
7064 return NULL;
7065
7066 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7067 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
7068
7069 BFD_ASSERT (tmp_name);
7070
7071 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
7072
7073 hash = elf_link_hash_lookup
7074 (&(hash_table)->root, tmp_name, false, false, true);
7075
7076 if (hash == NULL
7077 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7078 "Thumb", tmp_name, name) == -1)
7079 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7080
7081 free (tmp_name);
7082
7083 return hash;
7084 }
7085
7086 /* Locate the ARM encoded calling stub for NAME. */
7087
7088 static struct elf_link_hash_entry *
7089 find_arm_glue (struct bfd_link_info *link_info,
7090 const char *name,
7091 char **error_message)
7092 {
7093 char *tmp_name;
7094 struct elf_link_hash_entry *myh;
7095 struct elf32_arm_link_hash_table *hash_table;
7096
7097 /* We need a pointer to the elfarm specific hash table. */
7098 hash_table = elf32_arm_hash_table (link_info);
7099 if (hash_table == NULL)
7100 return NULL;
7101
7102 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7103 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7104 BFD_ASSERT (tmp_name);
7105
7106 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7107
7108 myh = elf_link_hash_lookup
7109 (&(hash_table)->root, tmp_name, false, false, true);
7110
7111 if (myh == NULL
7112 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7113 "ARM", tmp_name, name) == -1)
7114 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7115
7116 free (tmp_name);
7117
7118 return myh;
7119 }
7120
7121 /* ARM->Thumb glue (static images):
7122
7123 .arm
7124 __func_from_arm:
7125 ldr r12, __func_addr
7126 bx r12
7127 __func_addr:
7128 .word func @ behave as if you saw a ARM_32 reloc.
7129
7130 (v5t static images)
7131 .arm
7132 __func_from_arm:
7133 ldr pc, __func_addr
7134 __func_addr:
7135 .word func @ behave as if you saw a ARM_32 reloc.
7136
7137 (relocatable images)
7138 .arm
7139 __func_from_arm:
7140 ldr r12, __func_offset
7141 add r12, r12, pc
7142 bx r12
7143 __func_offset:
7144 .word func - . */
7145
7146 #define ARM2THUMB_STATIC_GLUE_SIZE 12
7147 static const insn32 a2t1_ldr_insn = 0xe59fc000;
7148 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
7149 static const insn32 a2t3_func_addr_insn = 0x00000001;
7150
7151 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7152 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
7153 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
7154
7155 #define ARM2THUMB_PIC_GLUE_SIZE 16
7156 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
7157 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
7158 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
7159
7160 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
7161
7162 .thumb .thumb
7163 .align 2 .align 2
7164 __func_from_thumb: __func_from_thumb:
7165 bx pc push {r6, lr}
7166 nop ldr r6, __func_addr
7167 .arm mov lr, pc
7168 b func bx r6
7169 .arm
7170 ;; back_to_thumb
7171 ldmia r13! {r6, lr}
7172 bx lr
7173 __func_addr:
7174 .word func */
7175
7176 #define THUMB2ARM_GLUE_SIZE 8
7177 static const insn16 t2a1_bx_pc_insn = 0x4778;
7178 static const insn16 t2a2_noop_insn = 0x46c0;
7179 static const insn32 t2a3_b_insn = 0xea000000;
7180
7181 #define VFP11_ERRATUM_VENEER_SIZE 8
7182 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7183 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7184
7185 #define ARM_BX_VENEER_SIZE 12
7186 static const insn32 armbx1_tst_insn = 0xe3100001;
7187 static const insn32 armbx2_moveq_insn = 0x01a0f000;
7188 static const insn32 armbx3_bx_insn = 0xe12fff10;
7189
7190 #ifndef ELFARM_NABI_C_INCLUDED
7191 static void
7192 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
7193 {
7194 asection * s;
7195 bfd_byte * contents;
7196
7197 if (size == 0)
7198 {
7199 /* Do not include empty glue sections in the output. */
7200 if (abfd != NULL)
7201 {
7202 s = bfd_get_linker_section (abfd, name);
7203 if (s != NULL)
7204 s->flags |= SEC_EXCLUDE;
7205 }
7206 return;
7207 }
7208
7209 BFD_ASSERT (abfd != NULL);
7210
7211 s = bfd_get_linker_section (abfd, name);
7212 BFD_ASSERT (s != NULL);
7213
7214 contents = (bfd_byte *) bfd_zalloc (abfd, size);
7215
7216 BFD_ASSERT (s->size == size);
7217 s->contents = contents;
7218 }
7219
7220 bool
7221 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
7222 {
7223 struct elf32_arm_link_hash_table * globals;
7224
7225 globals = elf32_arm_hash_table (info);
7226 BFD_ASSERT (globals != NULL);
7227
7228 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7229 globals->arm_glue_size,
7230 ARM2THUMB_GLUE_SECTION_NAME);
7231
7232 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7233 globals->thumb_glue_size,
7234 THUMB2ARM_GLUE_SECTION_NAME);
7235
7236 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7237 globals->vfp11_erratum_glue_size,
7238 VFP11_ERRATUM_VENEER_SECTION_NAME);
7239
7240 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7241 globals->stm32l4xx_erratum_glue_size,
7242 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7243
7244 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7245 globals->bx_glue_size,
7246 ARM_BX_GLUE_SECTION_NAME);
7247
7248 return true;
7249 }
7250
7251 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7252 returns the symbol identifying the stub. */
7253
7254 static struct elf_link_hash_entry *
7255 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
7256 struct elf_link_hash_entry * h)
7257 {
7258 const char * name = h->root.root.string;
7259 asection * s;
7260 char * tmp_name;
7261 struct elf_link_hash_entry * myh;
7262 struct bfd_link_hash_entry * bh;
7263 struct elf32_arm_link_hash_table * globals;
7264 bfd_vma val;
7265 bfd_size_type size;
7266
7267 globals = elf32_arm_hash_table (link_info);
7268 BFD_ASSERT (globals != NULL);
7269 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7270
7271 s = bfd_get_linker_section
7272 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
7273
7274 BFD_ASSERT (s != NULL);
7275
7276 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7277 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7278 BFD_ASSERT (tmp_name);
7279
7280 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7281
7282 myh = elf_link_hash_lookup
7283 (&(globals)->root, tmp_name, false, false, true);
7284
7285 if (myh != NULL)
7286 {
7287 /* We've already seen this guy. */
7288 free (tmp_name);
7289 return myh;
7290 }
7291
7292 /* The only trick here is using hash_table->arm_glue_size as the value.
7293 Even though the section isn't allocated yet, this is where we will be
7294 putting it. The +1 on the value marks that the stub has not been
7295 output yet - not that it is a Thumb function. */
7296 bh = NULL;
7297 val = globals->arm_glue_size + 1;
7298 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7299 tmp_name, BSF_GLOBAL, s, val,
7300 NULL, true, false, &bh);
7301
7302 myh = (struct elf_link_hash_entry *) bh;
7303 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7304 myh->forced_local = 1;
7305
7306 free (tmp_name);
7307
7308 if (bfd_link_pic (link_info)
7309 || globals->root.is_relocatable_executable
7310 || globals->pic_veneer)
7311 size = ARM2THUMB_PIC_GLUE_SIZE;
7312 else if (globals->use_blx)
7313 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7314 else
7315 size = ARM2THUMB_STATIC_GLUE_SIZE;
7316
7317 s->size += size;
7318 globals->arm_glue_size += size;
7319
7320 return myh;
7321 }
7322
7323 /* Allocate space for ARMv4 BX veneers. */
7324
7325 static void
7326 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7327 {
7328 asection * s;
7329 struct elf32_arm_link_hash_table *globals;
7330 char *tmp_name;
7331 struct elf_link_hash_entry *myh;
7332 struct bfd_link_hash_entry *bh;
7333 bfd_vma val;
7334
7335 /* BX PC does not need a veneer. */
7336 if (reg == 15)
7337 return;
7338
7339 globals = elf32_arm_hash_table (link_info);
7340 BFD_ASSERT (globals != NULL);
7341 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7342
7343 /* Check if this veneer has already been allocated. */
7344 if (globals->bx_glue_offset[reg])
7345 return;
7346
7347 s = bfd_get_linker_section
7348 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7349
7350 BFD_ASSERT (s != NULL);
7351
7352 /* Add symbol for veneer. */
7353 tmp_name = (char *)
7354 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7355 BFD_ASSERT (tmp_name);
7356
7357 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7358
7359 myh = elf_link_hash_lookup
7360 (&(globals)->root, tmp_name, false, false, false);
7361
7362 BFD_ASSERT (myh == NULL);
7363
7364 bh = NULL;
7365 val = globals->bx_glue_size;
7366 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7367 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7368 NULL, true, false, &bh);
7369
7370 myh = (struct elf_link_hash_entry *) bh;
7371 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7372 myh->forced_local = 1;
7373
7374 s->size += ARM_BX_VENEER_SIZE;
7375 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7376 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7377 }
7378
7379
7380 /* Add an entry to the code/data map for section SEC. */
7381
7382 static void
7383 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7384 {
7385 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7386 unsigned int newidx;
7387
7388 if (sec_data->map == NULL)
7389 {
7390 sec_data->map = (elf32_arm_section_map *)
7391 bfd_malloc (sizeof (elf32_arm_section_map));
7392 sec_data->mapcount = 0;
7393 sec_data->mapsize = 1;
7394 }
7395
7396 newidx = sec_data->mapcount++;
7397
7398 if (sec_data->mapcount > sec_data->mapsize)
7399 {
7400 sec_data->mapsize *= 2;
7401 sec_data->map = (elf32_arm_section_map *)
7402 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7403 * sizeof (elf32_arm_section_map));
7404 }
7405
7406 if (sec_data->map)
7407 {
7408 sec_data->map[newidx].vma = vma;
7409 sec_data->map[newidx].type = type;
7410 }
7411 }
7412
7413
7414 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7415 veneers are handled for now. */
7416
7417 static bfd_vma
7418 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7419 elf32_vfp11_erratum_list *branch,
7420 bfd *branch_bfd,
7421 asection *branch_sec,
7422 unsigned int offset)
7423 {
7424 asection *s;
7425 struct elf32_arm_link_hash_table *hash_table;
7426 char *tmp_name;
7427 struct elf_link_hash_entry *myh;
7428 struct bfd_link_hash_entry *bh;
7429 bfd_vma val;
7430 struct _arm_elf_section_data *sec_data;
7431 elf32_vfp11_erratum_list *newerr;
7432
7433 hash_table = elf32_arm_hash_table (link_info);
7434 BFD_ASSERT (hash_table != NULL);
7435 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7436
7437 s = bfd_get_linker_section
7438 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7439
7440 sec_data = elf32_arm_section_data (s);
7441
7442 BFD_ASSERT (s != NULL);
7443
7444 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7445 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7446 BFD_ASSERT (tmp_name);
7447
7448 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7449 hash_table->num_vfp11_fixes);
7450
7451 myh = elf_link_hash_lookup
7452 (&(hash_table)->root, tmp_name, false, false, false);
7453
7454 BFD_ASSERT (myh == NULL);
7455
7456 bh = NULL;
7457 val = hash_table->vfp11_erratum_glue_size;
7458 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7459 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7460 NULL, true, false, &bh);
7461
7462 myh = (struct elf_link_hash_entry *) bh;
7463 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7464 myh->forced_local = 1;
7465
7466 /* Link veneer back to calling location. */
7467 sec_data->erratumcount += 1;
7468 newerr = (elf32_vfp11_erratum_list *)
7469 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7470
7471 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7472 newerr->vma = -1;
7473 newerr->u.v.branch = branch;
7474 newerr->u.v.id = hash_table->num_vfp11_fixes;
7475 branch->u.b.veneer = newerr;
7476
7477 newerr->next = sec_data->erratumlist;
7478 sec_data->erratumlist = newerr;
7479
7480 /* A symbol for the return from the veneer. */
7481 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7482 hash_table->num_vfp11_fixes);
7483
7484 myh = elf_link_hash_lookup
7485 (&(hash_table)->root, tmp_name, false, false, false);
7486
7487 if (myh != NULL)
7488 abort ();
7489
7490 bh = NULL;
7491 val = offset + 4;
7492 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7493 branch_sec, val, NULL, true, false, &bh);
7494
7495 myh = (struct elf_link_hash_entry *) bh;
7496 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7497 myh->forced_local = 1;
7498
7499 free (tmp_name);
7500
7501 /* Generate a mapping symbol for the veneer section, and explicitly add an
7502 entry for that symbol to the code/data map for the section. */
7503 if (hash_table->vfp11_erratum_glue_size == 0)
7504 {
7505 bh = NULL;
7506 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7507 ever requires this erratum fix. */
7508 _bfd_generic_link_add_one_symbol (link_info,
7509 hash_table->bfd_of_glue_owner, "$a",
7510 BSF_LOCAL, s, 0, NULL,
7511 true, false, &bh);
7512
7513 myh = (struct elf_link_hash_entry *) bh;
7514 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7515 myh->forced_local = 1;
7516
7517 /* The elf32_arm_init_maps function only cares about symbols from input
7518 BFDs. We must make a note of this generated mapping symbol
7519 ourselves so that code byteswapping works properly in
7520 elf32_arm_write_section. */
7521 elf32_arm_section_map_add (s, 'a', 0);
7522 }
7523
7524 s->size += VFP11_ERRATUM_VENEER_SIZE;
7525 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7526 hash_table->num_vfp11_fixes++;
7527
7528 /* The offset of the veneer. */
7529 return val;
7530 }
7531
7532 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7533 veneers need to be handled because used only in Cortex-M. */
7534
7535 static bfd_vma
7536 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7537 elf32_stm32l4xx_erratum_list *branch,
7538 bfd *branch_bfd,
7539 asection *branch_sec,
7540 unsigned int offset,
7541 bfd_size_type veneer_size)
7542 {
7543 asection *s;
7544 struct elf32_arm_link_hash_table *hash_table;
7545 char *tmp_name;
7546 struct elf_link_hash_entry *myh;
7547 struct bfd_link_hash_entry *bh;
7548 bfd_vma val;
7549 struct _arm_elf_section_data *sec_data;
7550 elf32_stm32l4xx_erratum_list *newerr;
7551
7552 hash_table = elf32_arm_hash_table (link_info);
7553 BFD_ASSERT (hash_table != NULL);
7554 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7555
7556 s = bfd_get_linker_section
7557 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7558
7559 BFD_ASSERT (s != NULL);
7560
7561 sec_data = elf32_arm_section_data (s);
7562
7563 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7564 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7565 BFD_ASSERT (tmp_name);
7566
7567 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7568 hash_table->num_stm32l4xx_fixes);
7569
7570 myh = elf_link_hash_lookup
7571 (&(hash_table)->root, tmp_name, false, false, false);
7572
7573 BFD_ASSERT (myh == NULL);
7574
7575 bh = NULL;
7576 val = hash_table->stm32l4xx_erratum_glue_size;
7577 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7578 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7579 NULL, true, false, &bh);
7580
7581 myh = (struct elf_link_hash_entry *) bh;
7582 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7583 myh->forced_local = 1;
7584
7585 /* Link veneer back to calling location. */
7586 sec_data->stm32l4xx_erratumcount += 1;
7587 newerr = (elf32_stm32l4xx_erratum_list *)
7588 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7589
7590 newerr->type = STM32L4XX_ERRATUM_VENEER;
7591 newerr->vma = -1;
7592 newerr->u.v.branch = branch;
7593 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7594 branch->u.b.veneer = newerr;
7595
7596 newerr->next = sec_data->stm32l4xx_erratumlist;
7597 sec_data->stm32l4xx_erratumlist = newerr;
7598
7599 /* A symbol for the return from the veneer. */
7600 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7601 hash_table->num_stm32l4xx_fixes);
7602
7603 myh = elf_link_hash_lookup
7604 (&(hash_table)->root, tmp_name, false, false, false);
7605
7606 if (myh != NULL)
7607 abort ();
7608
7609 bh = NULL;
7610 val = offset + 4;
7611 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7612 branch_sec, val, NULL, true, false, &bh);
7613
7614 myh = (struct elf_link_hash_entry *) bh;
7615 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7616 myh->forced_local = 1;
7617
7618 free (tmp_name);
7619
7620 /* Generate a mapping symbol for the veneer section, and explicitly add an
7621 entry for that symbol to the code/data map for the section. */
7622 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7623 {
7624 bh = NULL;
7625 /* Creates a THUMB symbol since there is no other choice. */
7626 _bfd_generic_link_add_one_symbol (link_info,
7627 hash_table->bfd_of_glue_owner, "$t",
7628 BSF_LOCAL, s, 0, NULL,
7629 true, false, &bh);
7630
7631 myh = (struct elf_link_hash_entry *) bh;
7632 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7633 myh->forced_local = 1;
7634
7635 /* The elf32_arm_init_maps function only cares about symbols from input
7636 BFDs. We must make a note of this generated mapping symbol
7637 ourselves so that code byteswapping works properly in
7638 elf32_arm_write_section. */
7639 elf32_arm_section_map_add (s, 't', 0);
7640 }
7641
7642 s->size += veneer_size;
7643 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7644 hash_table->num_stm32l4xx_fixes++;
7645
7646 /* The offset of the veneer. */
7647 return val;
7648 }
7649
7650 #define ARM_GLUE_SECTION_FLAGS \
7651 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7652 | SEC_READONLY | SEC_LINKER_CREATED)
7653
7654 /* Create a fake section for use by the ARM backend of the linker. */
7655
7656 static bool
7657 arm_make_glue_section (bfd * abfd, const char * name)
7658 {
7659 asection * sec;
7660
7661 sec = bfd_get_linker_section (abfd, name);
7662 if (sec != NULL)
7663 /* Already made. */
7664 return true;
7665
7666 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7667
7668 if (sec == NULL
7669 || !bfd_set_section_alignment (sec, 2))
7670 return false;
7671
7672 /* Set the gc mark to prevent the section from being removed by garbage
7673 collection, despite the fact that no relocs refer to this section. */
7674 sec->gc_mark = 1;
7675
7676 return true;
7677 }
7678
7679 /* Set size of .plt entries. This function is called from the
7680 linker scripts in ld/emultempl/{armelf}.em. */
7681
7682 void
7683 bfd_elf32_arm_use_long_plt (void)
7684 {
7685 elf32_arm_use_long_plt_entry = true;
7686 }
7687
7688 /* Add the glue sections to ABFD. This function is called from the
7689 linker scripts in ld/emultempl/{armelf}.em. */
7690
7691 bool
7692 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7693 struct bfd_link_info *info)
7694 {
7695 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7696 bool dostm32l4xx = globals
7697 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7698 bool addglue;
7699
7700 /* If we are only performing a partial
7701 link do not bother adding the glue. */
7702 if (bfd_link_relocatable (info))
7703 return true;
7704
7705 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7706 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7707 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7708 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7709
7710 if (!dostm32l4xx)
7711 return addglue;
7712
7713 return addglue
7714 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7715 }
7716
7717 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7718 ensures they are not marked for deletion by
7719 strip_excluded_output_sections () when veneers are going to be created
7720 later. Not doing so would trigger assert on empty section size in
7721 lang_size_sections_1 (). */
7722
7723 void
7724 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7725 {
7726 enum elf32_arm_stub_type stub_type;
7727
7728 /* If we are only performing a partial
7729 link do not bother adding the glue. */
7730 if (bfd_link_relocatable (info))
7731 return;
7732
7733 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7734 {
7735 asection *out_sec;
7736 const char *out_sec_name;
7737
7738 if (!arm_dedicated_stub_output_section_required (stub_type))
7739 continue;
7740
7741 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7742 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7743 if (out_sec != NULL)
7744 out_sec->flags |= SEC_KEEP;
7745 }
7746 }
7747
7748 /* Select a BFD to be used to hold the sections used by the glue code.
7749 This function is called from the linker scripts in ld/emultempl/
7750 {armelf/pe}.em. */
7751
7752 bool
7753 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7754 {
7755 struct elf32_arm_link_hash_table *globals;
7756
7757 /* If we are only performing a partial link
7758 do not bother getting a bfd to hold the glue. */
7759 if (bfd_link_relocatable (info))
7760 return true;
7761
7762 /* Make sure we don't attach the glue sections to a dynamic object. */
7763 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7764
7765 globals = elf32_arm_hash_table (info);
7766 BFD_ASSERT (globals != NULL);
7767
7768 if (globals->bfd_of_glue_owner != NULL)
7769 return true;
7770
7771 /* Save the bfd for later use. */
7772 globals->bfd_of_glue_owner = abfd;
7773
7774 return true;
7775 }
7776
7777 static void
7778 check_use_blx (struct elf32_arm_link_hash_table *globals)
7779 {
7780 int cpu_arch;
7781
7782 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7783 Tag_CPU_arch);
7784
7785 if (globals->fix_arm1176)
7786 {
7787 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7788 globals->use_blx = 1;
7789 }
7790 else
7791 {
7792 if (cpu_arch > TAG_CPU_ARCH_V4T)
7793 globals->use_blx = 1;
7794 }
7795 }
7796
7797 bool
7798 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7799 struct bfd_link_info *link_info)
7800 {
7801 Elf_Internal_Shdr *symtab_hdr;
7802 Elf_Internal_Rela *internal_relocs = NULL;
7803 Elf_Internal_Rela *irel, *irelend;
7804 bfd_byte *contents = NULL;
7805
7806 asection *sec;
7807 struct elf32_arm_link_hash_table *globals;
7808
7809 /* If we are only performing a partial link do not bother
7810 to construct any glue. */
7811 if (bfd_link_relocatable (link_info))
7812 return true;
7813
7814 /* Here we have a bfd that is to be included on the link. We have a
7815 hook to do reloc rummaging, before section sizes are nailed down. */
7816 globals = elf32_arm_hash_table (link_info);
7817 BFD_ASSERT (globals != NULL);
7818
7819 check_use_blx (globals);
7820
7821 if (globals->byteswap_code && !bfd_big_endian (abfd))
7822 {
7823 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7824 abfd);
7825 return false;
7826 }
7827
7828 /* PR 5398: If we have not decided to include any loadable sections in
7829 the output then we will not have a glue owner bfd. This is OK, it
7830 just means that there is nothing else for us to do here. */
7831 if (globals->bfd_of_glue_owner == NULL)
7832 return true;
7833
7834 /* Rummage around all the relocs and map the glue vectors. */
7835 sec = abfd->sections;
7836
7837 if (sec == NULL)
7838 return true;
7839
7840 for (; sec != NULL; sec = sec->next)
7841 {
7842 if (sec->reloc_count == 0)
7843 continue;
7844
7845 if ((sec->flags & SEC_EXCLUDE) != 0)
7846 continue;
7847
7848 symtab_hdr = & elf_symtab_hdr (abfd);
7849
7850 /* Load the relocs. */
7851 internal_relocs
7852 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, false);
7853
7854 if (internal_relocs == NULL)
7855 goto error_return;
7856
7857 irelend = internal_relocs + sec->reloc_count;
7858 for (irel = internal_relocs; irel < irelend; irel++)
7859 {
7860 long r_type;
7861 unsigned long r_index;
7862
7863 struct elf_link_hash_entry *h;
7864
7865 r_type = ELF32_R_TYPE (irel->r_info);
7866 r_index = ELF32_R_SYM (irel->r_info);
7867
7868 /* These are the only relocation types we care about. */
7869 if ( r_type != R_ARM_PC24
7870 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7871 continue;
7872
7873 /* Get the section contents if we haven't done so already. */
7874 if (contents == NULL)
7875 {
7876 /* Get cached copy if it exists. */
7877 if (elf_section_data (sec)->this_hdr.contents != NULL)
7878 contents = elf_section_data (sec)->this_hdr.contents;
7879 else
7880 {
7881 /* Go get them off disk. */
7882 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7883 goto error_return;
7884 }
7885 }
7886
7887 if (r_type == R_ARM_V4BX)
7888 {
7889 int reg;
7890
7891 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7892 record_arm_bx_glue (link_info, reg);
7893 continue;
7894 }
7895
7896 /* If the relocation is not against a symbol it cannot concern us. */
7897 h = NULL;
7898
7899 /* We don't care about local symbols. */
7900 if (r_index < symtab_hdr->sh_info)
7901 continue;
7902
7903 /* This is an external symbol. */
7904 r_index -= symtab_hdr->sh_info;
7905 h = (struct elf_link_hash_entry *)
7906 elf_sym_hashes (abfd)[r_index];
7907
7908 /* If the relocation is against a static symbol it must be within
7909 the current section and so cannot be a cross ARM/Thumb relocation. */
7910 if (h == NULL)
7911 continue;
7912
7913 /* If the call will go through a PLT entry then we do not need
7914 glue. */
7915 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7916 continue;
7917
7918 switch (r_type)
7919 {
7920 case R_ARM_PC24:
7921 /* This one is a call from arm code. We need to look up
7922 the target of the call. If it is a thumb target, we
7923 insert glue. */
7924 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7925 == ST_BRANCH_TO_THUMB)
7926 record_arm_to_thumb_glue (link_info, h);
7927 break;
7928
7929 default:
7930 abort ();
7931 }
7932 }
7933
7934 if (elf_section_data (sec)->this_hdr.contents != contents)
7935 free (contents);
7936 contents = NULL;
7937
7938 if (elf_section_data (sec)->relocs != internal_relocs)
7939 free (internal_relocs);
7940 internal_relocs = NULL;
7941 }
7942
7943 return true;
7944
7945 error_return:
7946 if (elf_section_data (sec)->this_hdr.contents != contents)
7947 free (contents);
7948 if (elf_section_data (sec)->relocs != internal_relocs)
7949 free (internal_relocs);
7950
7951 return false;
7952 }
7953 #endif
7954
7955
7956 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7957
7958 void
7959 bfd_elf32_arm_init_maps (bfd *abfd)
7960 {
7961 Elf_Internal_Sym *isymbuf;
7962 Elf_Internal_Shdr *hdr;
7963 unsigned int i, localsyms;
7964
7965 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7966 if (! is_arm_elf (abfd))
7967 return;
7968
7969 if ((abfd->flags & DYNAMIC) != 0)
7970 return;
7971
7972 hdr = & elf_symtab_hdr (abfd);
7973 localsyms = hdr->sh_info;
7974
7975 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7976 should contain the number of local symbols, which should come before any
7977 global symbols. Mapping symbols are always local. */
7978 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7979 NULL);
7980
7981 /* No internal symbols read? Skip this BFD. */
7982 if (isymbuf == NULL)
7983 return;
7984
7985 for (i = 0; i < localsyms; i++)
7986 {
7987 Elf_Internal_Sym *isym = &isymbuf[i];
7988 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7989 const char *name;
7990
7991 if (sec != NULL
7992 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
7993 {
7994 name = bfd_elf_string_from_elf_section (abfd,
7995 hdr->sh_link, isym->st_name);
7996
7997 if (bfd_is_arm_special_symbol_name (name,
7998 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
7999 elf32_arm_section_map_add (sec, name[1], isym->st_value);
8000 }
8001 }
8002 }
8003
8004
8005 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
8006 say what they wanted. */
8007
8008 void
8009 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
8010 {
8011 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8012 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8013
8014 if (globals == NULL)
8015 return;
8016
8017 if (globals->fix_cortex_a8 == -1)
8018 {
8019 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
8020 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
8021 && (out_attr[Tag_CPU_arch_profile].i == 'A'
8022 || out_attr[Tag_CPU_arch_profile].i == 0))
8023 globals->fix_cortex_a8 = 1;
8024 else
8025 globals->fix_cortex_a8 = 0;
8026 }
8027 }
8028
8029
8030 void
8031 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
8032 {
8033 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8034 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8035
8036 if (globals == NULL)
8037 return;
8038 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
8039 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
8040 {
8041 switch (globals->vfp11_fix)
8042 {
8043 case BFD_ARM_VFP11_FIX_DEFAULT:
8044 case BFD_ARM_VFP11_FIX_NONE:
8045 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8046 break;
8047
8048 default:
8049 /* Give a warning, but do as the user requests anyway. */
8050 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
8051 "workaround is not necessary for target architecture"), obfd);
8052 }
8053 }
8054 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
8055 /* For earlier architectures, we might need the workaround, but do not
8056 enable it by default. If users is running with broken hardware, they
8057 must enable the erratum fix explicitly. */
8058 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8059 }
8060
8061 void
8062 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
8063 {
8064 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8065 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8066
8067 if (globals == NULL)
8068 return;
8069
8070 /* We assume only Cortex-M4 may require the fix. */
8071 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
8072 || out_attr[Tag_CPU_arch_profile].i != 'M')
8073 {
8074 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
8075 /* Give a warning, but do as the user requests anyway. */
8076 _bfd_error_handler
8077 (_("%pB: warning: selected STM32L4XX erratum "
8078 "workaround is not necessary for target architecture"), obfd);
8079 }
8080 }
8081
8082 enum bfd_arm_vfp11_pipe
8083 {
8084 VFP11_FMAC,
8085 VFP11_LS,
8086 VFP11_DS,
8087 VFP11_BAD
8088 };
8089
8090 /* Return a VFP register number. This is encoded as RX:X for single-precision
8091 registers, or X:RX for double-precision registers, where RX is the group of
8092 four bits in the instruction encoding and X is the single extension bit.
8093 RX and X fields are specified using their lowest (starting) bit. The return
8094 value is:
8095
8096 0...31: single-precision registers s0...s31
8097 32...63: double-precision registers d0...d31.
8098
8099 Although X should be zero for VFP11 (encoding d0...d15 only), we might
8100 encounter VFP3 instructions, so we allow the full range for DP registers. */
8101
8102 static unsigned int
8103 bfd_arm_vfp11_regno (unsigned int insn, bool is_double, unsigned int rx,
8104 unsigned int x)
8105 {
8106 if (is_double)
8107 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
8108 else
8109 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
8110 }
8111
8112 /* Set bits in *WMASK according to a register number REG as encoded by
8113 bfd_arm_vfp11_regno(). Ignore d16-d31. */
8114
8115 static void
8116 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
8117 {
8118 if (reg < 32)
8119 *wmask |= 1 << reg;
8120 else if (reg < 48)
8121 *wmask |= 3 << ((reg - 32) * 2);
8122 }
8123
8124 /* Return TRUE if WMASK overwrites anything in REGS. */
8125
8126 static bool
8127 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
8128 {
8129 int i;
8130
8131 for (i = 0; i < numregs; i++)
8132 {
8133 unsigned int reg = regs[i];
8134
8135 if (reg < 32 && (wmask & (1 << reg)) != 0)
8136 return true;
8137
8138 reg -= 32;
8139
8140 if (reg >= 16)
8141 continue;
8142
8143 if ((wmask & (3 << (reg * 2))) != 0)
8144 return true;
8145 }
8146
8147 return false;
8148 }
8149
8150 /* In this function, we're interested in two things: finding input registers
8151 for VFP data-processing instructions, and finding the set of registers which
8152 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
8153 hold the written set, so FLDM etc. are easy to deal with (we're only
8154 interested in 32 SP registers or 16 dp registers, due to the VFP version
8155 implemented by the chip in question). DP registers are marked by setting
8156 both SP registers in the write mask). */
8157
8158 static enum bfd_arm_vfp11_pipe
8159 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
8160 int *numregs)
8161 {
8162 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
8163 bool is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
8164
8165 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
8166 {
8167 unsigned int pqrs;
8168 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8169 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8170
8171 pqrs = ((insn & 0x00800000) >> 20)
8172 | ((insn & 0x00300000) >> 19)
8173 | ((insn & 0x00000040) >> 6);
8174
8175 switch (pqrs)
8176 {
8177 case 0: /* fmac[sd]. */
8178 case 1: /* fnmac[sd]. */
8179 case 2: /* fmsc[sd]. */
8180 case 3: /* fnmsc[sd]. */
8181 vpipe = VFP11_FMAC;
8182 bfd_arm_vfp11_write_mask (destmask, fd);
8183 regs[0] = fd;
8184 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8185 regs[2] = fm;
8186 *numregs = 3;
8187 break;
8188
8189 case 4: /* fmul[sd]. */
8190 case 5: /* fnmul[sd]. */
8191 case 6: /* fadd[sd]. */
8192 case 7: /* fsub[sd]. */
8193 vpipe = VFP11_FMAC;
8194 goto vfp_binop;
8195
8196 case 8: /* fdiv[sd]. */
8197 vpipe = VFP11_DS;
8198 vfp_binop:
8199 bfd_arm_vfp11_write_mask (destmask, fd);
8200 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8201 regs[1] = fm;
8202 *numregs = 2;
8203 break;
8204
8205 case 15: /* extended opcode. */
8206 {
8207 unsigned int extn = ((insn >> 15) & 0x1e)
8208 | ((insn >> 7) & 1);
8209
8210 switch (extn)
8211 {
8212 case 0: /* fcpy[sd]. */
8213 case 1: /* fabs[sd]. */
8214 case 2: /* fneg[sd]. */
8215 case 8: /* fcmp[sd]. */
8216 case 9: /* fcmpe[sd]. */
8217 case 10: /* fcmpz[sd]. */
8218 case 11: /* fcmpez[sd]. */
8219 case 16: /* fuito[sd]. */
8220 case 17: /* fsito[sd]. */
8221 case 24: /* ftoui[sd]. */
8222 case 25: /* ftouiz[sd]. */
8223 case 26: /* ftosi[sd]. */
8224 case 27: /* ftosiz[sd]. */
8225 /* These instructions will not bounce due to underflow. */
8226 *numregs = 0;
8227 vpipe = VFP11_FMAC;
8228 break;
8229
8230 case 3: /* fsqrt[sd]. */
8231 /* fsqrt cannot underflow, but it can (perhaps) overwrite
8232 registers to cause the erratum in previous instructions. */
8233 bfd_arm_vfp11_write_mask (destmask, fd);
8234 vpipe = VFP11_DS;
8235 break;
8236
8237 case 15: /* fcvt{ds,sd}. */
8238 {
8239 int rnum = 0;
8240
8241 bfd_arm_vfp11_write_mask (destmask, fd);
8242
8243 /* Only FCVTSD can underflow. */
8244 if ((insn & 0x100) != 0)
8245 regs[rnum++] = fm;
8246
8247 *numregs = rnum;
8248
8249 vpipe = VFP11_FMAC;
8250 }
8251 break;
8252
8253 default:
8254 return VFP11_BAD;
8255 }
8256 }
8257 break;
8258
8259 default:
8260 return VFP11_BAD;
8261 }
8262 }
8263 /* Two-register transfer. */
8264 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
8265 {
8266 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8267
8268 if ((insn & 0x100000) == 0)
8269 {
8270 if (is_double)
8271 bfd_arm_vfp11_write_mask (destmask, fm);
8272 else
8273 {
8274 bfd_arm_vfp11_write_mask (destmask, fm);
8275 bfd_arm_vfp11_write_mask (destmask, fm + 1);
8276 }
8277 }
8278
8279 vpipe = VFP11_LS;
8280 }
8281 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
8282 {
8283 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8284 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
8285
8286 switch (puw)
8287 {
8288 case 0: /* Two-reg transfer. We should catch these above. */
8289 abort ();
8290
8291 case 2: /* fldm[sdx]. */
8292 case 3:
8293 case 5:
8294 {
8295 unsigned int i, offset = insn & 0xff;
8296
8297 if (is_double)
8298 offset >>= 1;
8299
8300 for (i = fd; i < fd + offset; i++)
8301 bfd_arm_vfp11_write_mask (destmask, i);
8302 }
8303 break;
8304
8305 case 4: /* fld[sd]. */
8306 case 6:
8307 bfd_arm_vfp11_write_mask (destmask, fd);
8308 break;
8309
8310 default:
8311 return VFP11_BAD;
8312 }
8313
8314 vpipe = VFP11_LS;
8315 }
8316 /* Single-register transfer. Note L==0. */
8317 else if ((insn & 0x0f100e10) == 0x0e000a10)
8318 {
8319 unsigned int opcode = (insn >> 21) & 7;
8320 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8321
8322 switch (opcode)
8323 {
8324 case 0: /* fmsr/fmdlr. */
8325 case 1: /* fmdhr. */
8326 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8327 destination register. I don't know if this is exactly right,
8328 but it is the conservative choice. */
8329 bfd_arm_vfp11_write_mask (destmask, fn);
8330 break;
8331
8332 case 7: /* fmxr. */
8333 break;
8334 }
8335
8336 vpipe = VFP11_LS;
8337 }
8338
8339 return vpipe;
8340 }
8341
8342
8343 static int elf32_arm_compare_mapping (const void * a, const void * b);
8344
8345
8346 /* Look for potentially-troublesome code sequences which might trigger the
8347 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8348 (available from ARM) for details of the erratum. A short version is
8349 described in ld.texinfo. */
8350
8351 bool
8352 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8353 {
8354 asection *sec;
8355 bfd_byte *contents = NULL;
8356 int state = 0;
8357 int regs[3], numregs = 0;
8358 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8359 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8360
8361 if (globals == NULL)
8362 return false;
8363
8364 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8365 The states transition as follows:
8366
8367 0 -> 1 (vector) or 0 -> 2 (scalar)
8368 A VFP FMAC-pipeline instruction has been seen. Fill
8369 regs[0]..regs[numregs-1] with its input operands. Remember this
8370 instruction in 'first_fmac'.
8371
8372 1 -> 2
8373 Any instruction, except for a VFP instruction which overwrites
8374 regs[*].
8375
8376 1 -> 3 [ -> 0 ] or
8377 2 -> 3 [ -> 0 ]
8378 A VFP instruction has been seen which overwrites any of regs[*].
8379 We must make a veneer! Reset state to 0 before examining next
8380 instruction.
8381
8382 2 -> 0
8383 If we fail to match anything in state 2, reset to state 0 and reset
8384 the instruction pointer to the instruction after 'first_fmac'.
8385
8386 If the VFP11 vector mode is in use, there must be at least two unrelated
8387 instructions between anti-dependent VFP11 instructions to properly avoid
8388 triggering the erratum, hence the use of the extra state 1. */
8389
8390 /* If we are only performing a partial link do not bother
8391 to construct any glue. */
8392 if (bfd_link_relocatable (link_info))
8393 return true;
8394
8395 /* Skip if this bfd does not correspond to an ELF image. */
8396 if (! is_arm_elf (abfd))
8397 return true;
8398
8399 /* We should have chosen a fix type by the time we get here. */
8400 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8401
8402 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8403 return true;
8404
8405 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8406 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8407 return true;
8408
8409 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8410 {
8411 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8412 struct _arm_elf_section_data *sec_data;
8413
8414 /* If we don't have executable progbits, we're not interested in this
8415 section. Also skip if section is to be excluded. */
8416 if (elf_section_type (sec) != SHT_PROGBITS
8417 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8418 || (sec->flags & SEC_EXCLUDE) != 0
8419 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8420 || sec->output_section == bfd_abs_section_ptr
8421 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8422 continue;
8423
8424 sec_data = elf32_arm_section_data (sec);
8425
8426 if (sec_data->mapcount == 0)
8427 continue;
8428
8429 if (elf_section_data (sec)->this_hdr.contents != NULL)
8430 contents = elf_section_data (sec)->this_hdr.contents;
8431 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8432 goto error_return;
8433
8434 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8435 elf32_arm_compare_mapping);
8436
8437 for (span = 0; span < sec_data->mapcount; span++)
8438 {
8439 unsigned int span_start = sec_data->map[span].vma;
8440 unsigned int span_end = (span == sec_data->mapcount - 1)
8441 ? sec->size : sec_data->map[span + 1].vma;
8442 char span_type = sec_data->map[span].type;
8443
8444 /* FIXME: Only ARM mode is supported at present. We may need to
8445 support Thumb-2 mode also at some point. */
8446 if (span_type != 'a')
8447 continue;
8448
8449 for (i = span_start; i < span_end;)
8450 {
8451 unsigned int next_i = i + 4;
8452 unsigned int insn = bfd_big_endian (abfd)
8453 ? (((unsigned) contents[i] << 24)
8454 | (contents[i + 1] << 16)
8455 | (contents[i + 2] << 8)
8456 | contents[i + 3])
8457 : (((unsigned) contents[i + 3] << 24)
8458 | (contents[i + 2] << 16)
8459 | (contents[i + 1] << 8)
8460 | contents[i]);
8461 unsigned int writemask = 0;
8462 enum bfd_arm_vfp11_pipe vpipe;
8463
8464 switch (state)
8465 {
8466 case 0:
8467 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8468 &numregs);
8469 /* I'm assuming the VFP11 erratum can trigger with denorm
8470 operands on either the FMAC or the DS pipeline. This might
8471 lead to slightly overenthusiastic veneer insertion. */
8472 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8473 {
8474 state = use_vector ? 1 : 2;
8475 first_fmac = i;
8476 veneer_of_insn = insn;
8477 }
8478 break;
8479
8480 case 1:
8481 {
8482 int other_regs[3], other_numregs;
8483 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8484 other_regs,
8485 &other_numregs);
8486 if (vpipe != VFP11_BAD
8487 && bfd_arm_vfp11_antidependency (writemask, regs,
8488 numregs))
8489 state = 3;
8490 else
8491 state = 2;
8492 }
8493 break;
8494
8495 case 2:
8496 {
8497 int other_regs[3], other_numregs;
8498 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8499 other_regs,
8500 &other_numregs);
8501 if (vpipe != VFP11_BAD
8502 && bfd_arm_vfp11_antidependency (writemask, regs,
8503 numregs))
8504 state = 3;
8505 else
8506 {
8507 state = 0;
8508 next_i = first_fmac + 4;
8509 }
8510 }
8511 break;
8512
8513 case 3:
8514 abort (); /* Should be unreachable. */
8515 }
8516
8517 if (state == 3)
8518 {
8519 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8520 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8521
8522 elf32_arm_section_data (sec)->erratumcount += 1;
8523
8524 newerr->u.b.vfp_insn = veneer_of_insn;
8525
8526 switch (span_type)
8527 {
8528 case 'a':
8529 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8530 break;
8531
8532 default:
8533 abort ();
8534 }
8535
8536 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8537 first_fmac);
8538
8539 newerr->vma = -1;
8540
8541 newerr->next = sec_data->erratumlist;
8542 sec_data->erratumlist = newerr;
8543
8544 state = 0;
8545 }
8546
8547 i = next_i;
8548 }
8549 }
8550
8551 if (elf_section_data (sec)->this_hdr.contents != contents)
8552 free (contents);
8553 contents = NULL;
8554 }
8555
8556 return true;
8557
8558 error_return:
8559 if (elf_section_data (sec)->this_hdr.contents != contents)
8560 free (contents);
8561
8562 return false;
8563 }
8564
8565 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8566 after sections have been laid out, using specially-named symbols. */
8567
8568 void
8569 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8570 struct bfd_link_info *link_info)
8571 {
8572 asection *sec;
8573 struct elf32_arm_link_hash_table *globals;
8574 char *tmp_name;
8575
8576 if (bfd_link_relocatable (link_info))
8577 return;
8578
8579 /* Skip if this bfd does not correspond to an ELF image. */
8580 if (! is_arm_elf (abfd))
8581 return;
8582
8583 globals = elf32_arm_hash_table (link_info);
8584 if (globals == NULL)
8585 return;
8586
8587 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8588 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8589 BFD_ASSERT (tmp_name);
8590
8591 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8592 {
8593 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8594 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8595
8596 for (; errnode != NULL; errnode = errnode->next)
8597 {
8598 struct elf_link_hash_entry *myh;
8599 bfd_vma vma;
8600
8601 switch (errnode->type)
8602 {
8603 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8604 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8605 /* Find veneer symbol. */
8606 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8607 errnode->u.b.veneer->u.v.id);
8608
8609 myh = elf_link_hash_lookup
8610 (&(globals)->root, tmp_name, false, false, true);
8611
8612 if (myh == NULL)
8613 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8614 abfd, "VFP11", tmp_name);
8615
8616 vma = myh->root.u.def.section->output_section->vma
8617 + myh->root.u.def.section->output_offset
8618 + myh->root.u.def.value;
8619
8620 errnode->u.b.veneer->vma = vma;
8621 break;
8622
8623 case VFP11_ERRATUM_ARM_VENEER:
8624 case VFP11_ERRATUM_THUMB_VENEER:
8625 /* Find return location. */
8626 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8627 errnode->u.v.id);
8628
8629 myh = elf_link_hash_lookup
8630 (&(globals)->root, tmp_name, false, false, true);
8631
8632 if (myh == NULL)
8633 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8634 abfd, "VFP11", tmp_name);
8635
8636 vma = myh->root.u.def.section->output_section->vma
8637 + myh->root.u.def.section->output_offset
8638 + myh->root.u.def.value;
8639
8640 errnode->u.v.branch->vma = vma;
8641 break;
8642
8643 default:
8644 abort ();
8645 }
8646 }
8647 }
8648
8649 free (tmp_name);
8650 }
8651
8652 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8653 return locations after sections have been laid out, using
8654 specially-named symbols. */
8655
8656 void
8657 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8658 struct bfd_link_info *link_info)
8659 {
8660 asection *sec;
8661 struct elf32_arm_link_hash_table *globals;
8662 char *tmp_name;
8663
8664 if (bfd_link_relocatable (link_info))
8665 return;
8666
8667 /* Skip if this bfd does not correspond to an ELF image. */
8668 if (! is_arm_elf (abfd))
8669 return;
8670
8671 globals = elf32_arm_hash_table (link_info);
8672 if (globals == NULL)
8673 return;
8674
8675 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8676 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8677 BFD_ASSERT (tmp_name);
8678
8679 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8680 {
8681 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8682 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8683
8684 for (; errnode != NULL; errnode = errnode->next)
8685 {
8686 struct elf_link_hash_entry *myh;
8687 bfd_vma vma;
8688
8689 switch (errnode->type)
8690 {
8691 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8692 /* Find veneer symbol. */
8693 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8694 errnode->u.b.veneer->u.v.id);
8695
8696 myh = elf_link_hash_lookup
8697 (&(globals)->root, tmp_name, false, false, true);
8698
8699 if (myh == NULL)
8700 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8701 abfd, "STM32L4XX", tmp_name);
8702
8703 vma = myh->root.u.def.section->output_section->vma
8704 + myh->root.u.def.section->output_offset
8705 + myh->root.u.def.value;
8706
8707 errnode->u.b.veneer->vma = vma;
8708 break;
8709
8710 case STM32L4XX_ERRATUM_VENEER:
8711 /* Find return location. */
8712 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8713 errnode->u.v.id);
8714
8715 myh = elf_link_hash_lookup
8716 (&(globals)->root, tmp_name, false, false, true);
8717
8718 if (myh == NULL)
8719 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8720 abfd, "STM32L4XX", tmp_name);
8721
8722 vma = myh->root.u.def.section->output_section->vma
8723 + myh->root.u.def.section->output_offset
8724 + myh->root.u.def.value;
8725
8726 errnode->u.v.branch->vma = vma;
8727 break;
8728
8729 default:
8730 abort ();
8731 }
8732 }
8733 }
8734
8735 free (tmp_name);
8736 }
8737
8738 static inline bool
8739 is_thumb2_ldmia (const insn32 insn)
8740 {
8741 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8742 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8743 return (insn & 0xffd02000) == 0xe8900000;
8744 }
8745
8746 static inline bool
8747 is_thumb2_ldmdb (const insn32 insn)
8748 {
8749 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8750 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8751 return (insn & 0xffd02000) == 0xe9100000;
8752 }
8753
8754 static inline bool
8755 is_thumb2_vldm (const insn32 insn)
8756 {
8757 /* A6.5 Extension register load or store instruction
8758 A7.7.229
8759 We look for SP 32-bit and DP 64-bit registers.
8760 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8761 <list> is consecutive 64-bit registers
8762 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8763 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8764 <list> is consecutive 32-bit registers
8765 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8766 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8767 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8768 return
8769 (((insn & 0xfe100f00) == 0xec100b00) ||
8770 ((insn & 0xfe100f00) == 0xec100a00))
8771 && /* (IA without !). */
8772 (((((insn << 7) >> 28) & 0xd) == 0x4)
8773 /* (IA with !), includes VPOP (when reg number is SP). */
8774 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8775 /* (DB with !). */
8776 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8777 }
8778
8779 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8780 VLDM opcode and:
8781 - computes the number and the mode of memory accesses
8782 - decides if the replacement should be done:
8783 . replaces only if > 8-word accesses
8784 . or (testing purposes only) replaces all accesses. */
8785
8786 static bool
8787 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8788 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8789 {
8790 int nb_words = 0;
8791
8792 /* The field encoding the register list is the same for both LDMIA
8793 and LDMDB encodings. */
8794 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8795 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8796 else if (is_thumb2_vldm (insn))
8797 nb_words = (insn & 0xff);
8798
8799 /* DEFAULT mode accounts for the real bug condition situation,
8800 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8801 return (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT
8802 ? nb_words > 8
8803 : stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL);
8804 }
8805
8806 /* Look for potentially-troublesome code sequences which might trigger
8807 the STM STM32L4XX erratum. */
8808
8809 bool
8810 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8811 struct bfd_link_info *link_info)
8812 {
8813 asection *sec;
8814 bfd_byte *contents = NULL;
8815 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8816
8817 if (globals == NULL)
8818 return false;
8819
8820 /* If we are only performing a partial link do not bother
8821 to construct any glue. */
8822 if (bfd_link_relocatable (link_info))
8823 return true;
8824
8825 /* Skip if this bfd does not correspond to an ELF image. */
8826 if (! is_arm_elf (abfd))
8827 return true;
8828
8829 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8830 return true;
8831
8832 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8833 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8834 return true;
8835
8836 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8837 {
8838 unsigned int i, span;
8839 struct _arm_elf_section_data *sec_data;
8840
8841 /* If we don't have executable progbits, we're not interested in this
8842 section. Also skip if section is to be excluded. */
8843 if (elf_section_type (sec) != SHT_PROGBITS
8844 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8845 || (sec->flags & SEC_EXCLUDE) != 0
8846 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8847 || sec->output_section == bfd_abs_section_ptr
8848 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8849 continue;
8850
8851 sec_data = elf32_arm_section_data (sec);
8852
8853 if (sec_data->mapcount == 0)
8854 continue;
8855
8856 if (elf_section_data (sec)->this_hdr.contents != NULL)
8857 contents = elf_section_data (sec)->this_hdr.contents;
8858 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8859 goto error_return;
8860
8861 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8862 elf32_arm_compare_mapping);
8863
8864 for (span = 0; span < sec_data->mapcount; span++)
8865 {
8866 unsigned int span_start = sec_data->map[span].vma;
8867 unsigned int span_end = (span == sec_data->mapcount - 1)
8868 ? sec->size : sec_data->map[span + 1].vma;
8869 char span_type = sec_data->map[span].type;
8870 int itblock_current_pos = 0;
8871
8872 /* Only Thumb2 mode need be supported with this CM4 specific
8873 code, we should not encounter any arm mode eg span_type
8874 != 'a'. */
8875 if (span_type != 't')
8876 continue;
8877
8878 for (i = span_start; i < span_end;)
8879 {
8880 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8881 bool insn_32bit = false;
8882 bool is_ldm = false;
8883 bool is_vldm = false;
8884 bool is_not_last_in_it_block = false;
8885
8886 /* The first 16-bits of all 32-bit thumb2 instructions start
8887 with opcode[15..13]=0b111 and the encoded op1 can be anything
8888 except opcode[12..11]!=0b00.
8889 See 32-bit Thumb instruction encoding. */
8890 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8891 insn_32bit = true;
8892
8893 /* Compute the predicate that tells if the instruction
8894 is concerned by the IT block
8895 - Creates an error if there is a ldm that is not
8896 last in the IT block thus cannot be replaced
8897 - Otherwise we can create a branch at the end of the
8898 IT block, it will be controlled naturally by IT
8899 with the proper pseudo-predicate
8900 - So the only interesting predicate is the one that
8901 tells that we are not on the last item of an IT
8902 block. */
8903 if (itblock_current_pos != 0)
8904 is_not_last_in_it_block = !!--itblock_current_pos;
8905
8906 if (insn_32bit)
8907 {
8908 /* Load the rest of the insn (in manual-friendly order). */
8909 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8910 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8911 is_vldm = is_thumb2_vldm (insn);
8912
8913 /* Veneers are created for (v)ldm depending on
8914 option flags and memory accesses conditions; but
8915 if the instruction is not the last instruction of
8916 an IT block, we cannot create a jump there, so we
8917 bail out. */
8918 if ((is_ldm || is_vldm)
8919 && stm32l4xx_need_create_replacing_stub
8920 (insn, globals->stm32l4xx_fix))
8921 {
8922 if (is_not_last_in_it_block)
8923 {
8924 _bfd_error_handler
8925 /* xgettext:c-format */
8926 (_("%pB(%pA+%#x): error: multiple load detected"
8927 " in non-last IT block instruction:"
8928 " STM32L4XX veneer cannot be generated; "
8929 "use gcc option -mrestrict-it to generate"
8930 " only one instruction per IT block"),
8931 abfd, sec, i);
8932 }
8933 else
8934 {
8935 elf32_stm32l4xx_erratum_list *newerr =
8936 (elf32_stm32l4xx_erratum_list *)
8937 bfd_zmalloc
8938 (sizeof (elf32_stm32l4xx_erratum_list));
8939
8940 elf32_arm_section_data (sec)
8941 ->stm32l4xx_erratumcount += 1;
8942 newerr->u.b.insn = insn;
8943 /* We create only thumb branches. */
8944 newerr->type =
8945 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8946 record_stm32l4xx_erratum_veneer
8947 (link_info, newerr, abfd, sec,
8948 i,
8949 is_ldm ?
8950 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8951 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8952 newerr->vma = -1;
8953 newerr->next = sec_data->stm32l4xx_erratumlist;
8954 sec_data->stm32l4xx_erratumlist = newerr;
8955 }
8956 }
8957 }
8958 else
8959 {
8960 /* A7.7.37 IT p208
8961 IT blocks are only encoded in T1
8962 Encoding T1: IT{x{y{z}}} <firstcond>
8963 1 0 1 1 - 1 1 1 1 - firstcond - mask
8964 if mask = '0000' then see 'related encodings'
8965 We don't deal with UNPREDICTABLE, just ignore these.
8966 There can be no nested IT blocks so an IT block
8967 is naturally a new one for which it is worth
8968 computing its size. */
8969 bool is_newitblock = ((insn & 0xff00) == 0xbf00)
8970 && ((insn & 0x000f) != 0x0000);
8971 /* If we have a new IT block we compute its size. */
8972 if (is_newitblock)
8973 {
8974 /* Compute the number of instructions controlled
8975 by the IT block, it will be used to decide
8976 whether we are inside an IT block or not. */
8977 unsigned int mask = insn & 0x000f;
8978 itblock_current_pos = 4 - ctz (mask);
8979 }
8980 }
8981
8982 i += insn_32bit ? 4 : 2;
8983 }
8984 }
8985
8986 if (elf_section_data (sec)->this_hdr.contents != contents)
8987 free (contents);
8988 contents = NULL;
8989 }
8990
8991 return true;
8992
8993 error_return:
8994 if (elf_section_data (sec)->this_hdr.contents != contents)
8995 free (contents);
8996
8997 return false;
8998 }
8999
9000 /* Set target relocation values needed during linking. */
9001
9002 void
9003 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
9004 struct bfd_link_info *link_info,
9005 struct elf32_arm_params *params)
9006 {
9007 struct elf32_arm_link_hash_table *globals;
9008
9009 globals = elf32_arm_hash_table (link_info);
9010 if (globals == NULL)
9011 return;
9012
9013 globals->target1_is_rel = params->target1_is_rel;
9014 if (globals->fdpic_p)
9015 globals->target2_reloc = R_ARM_GOT32;
9016 else if (strcmp (params->target2_type, "rel") == 0)
9017 globals->target2_reloc = R_ARM_REL32;
9018 else if (strcmp (params->target2_type, "abs") == 0)
9019 globals->target2_reloc = R_ARM_ABS32;
9020 else if (strcmp (params->target2_type, "got-rel") == 0)
9021 globals->target2_reloc = R_ARM_GOT_PREL;
9022 else
9023 {
9024 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
9025 params->target2_type);
9026 }
9027 globals->fix_v4bx = params->fix_v4bx;
9028 globals->use_blx |= params->use_blx;
9029 globals->vfp11_fix = params->vfp11_denorm_fix;
9030 globals->stm32l4xx_fix = params->stm32l4xx_fix;
9031 if (globals->fdpic_p)
9032 globals->pic_veneer = 1;
9033 else
9034 globals->pic_veneer = params->pic_veneer;
9035 globals->fix_cortex_a8 = params->fix_cortex_a8;
9036 globals->fix_arm1176 = params->fix_arm1176;
9037 globals->cmse_implib = params->cmse_implib;
9038 globals->in_implib_bfd = params->in_implib_bfd;
9039
9040 BFD_ASSERT (is_arm_elf (output_bfd));
9041 elf_arm_tdata (output_bfd)->no_enum_size_warning
9042 = params->no_enum_size_warning;
9043 elf_arm_tdata (output_bfd)->no_wchar_size_warning
9044 = params->no_wchar_size_warning;
9045 }
9046
9047 /* Replace the target offset of a Thumb bl or b.w instruction. */
9048
9049 static void
9050 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
9051 {
9052 bfd_vma upper;
9053 bfd_vma lower;
9054 int reloc_sign;
9055
9056 BFD_ASSERT ((offset & 1) == 0);
9057
9058 upper = bfd_get_16 (abfd, insn);
9059 lower = bfd_get_16 (abfd, insn + 2);
9060 reloc_sign = (offset < 0) ? 1 : 0;
9061 upper = (upper & ~(bfd_vma) 0x7ff)
9062 | ((offset >> 12) & 0x3ff)
9063 | (reloc_sign << 10);
9064 lower = (lower & ~(bfd_vma) 0x2fff)
9065 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
9066 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
9067 | ((offset >> 1) & 0x7ff);
9068 bfd_put_16 (abfd, upper, insn);
9069 bfd_put_16 (abfd, lower, insn + 2);
9070 }
9071
9072 /* Thumb code calling an ARM function. */
9073
9074 static int
9075 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
9076 const char * name,
9077 bfd * input_bfd,
9078 bfd * output_bfd,
9079 asection * input_section,
9080 bfd_byte * hit_data,
9081 asection * sym_sec,
9082 bfd_vma offset,
9083 bfd_signed_vma addend,
9084 bfd_vma val,
9085 char **error_message)
9086 {
9087 asection * s = 0;
9088 bfd_vma my_offset;
9089 long int ret_offset;
9090 struct elf_link_hash_entry * myh;
9091 struct elf32_arm_link_hash_table * globals;
9092
9093 myh = find_thumb_glue (info, name, error_message);
9094 if (myh == NULL)
9095 return false;
9096
9097 globals = elf32_arm_hash_table (info);
9098 BFD_ASSERT (globals != NULL);
9099 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9100
9101 my_offset = myh->root.u.def.value;
9102
9103 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9104 THUMB2ARM_GLUE_SECTION_NAME);
9105
9106 BFD_ASSERT (s != NULL);
9107 BFD_ASSERT (s->contents != NULL);
9108 BFD_ASSERT (s->output_section != NULL);
9109
9110 if ((my_offset & 0x01) == 0x01)
9111 {
9112 if (sym_sec != NULL
9113 && sym_sec->owner != NULL
9114 && !INTERWORK_FLAG (sym_sec->owner))
9115 {
9116 _bfd_error_handler
9117 (_("%pB(%s): warning: interworking not enabled;"
9118 " first occurrence: %pB: %s call to %s"),
9119 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
9120
9121 return false;
9122 }
9123
9124 --my_offset;
9125 myh->root.u.def.value = my_offset;
9126
9127 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
9128 s->contents + my_offset);
9129
9130 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
9131 s->contents + my_offset + 2);
9132
9133 ret_offset =
9134 /* Address of destination of the stub. */
9135 ((bfd_signed_vma) val)
9136 - ((bfd_signed_vma)
9137 /* Offset from the start of the current section
9138 to the start of the stubs. */
9139 (s->output_offset
9140 /* Offset of the start of this stub from the start of the stubs. */
9141 + my_offset
9142 /* Address of the start of the current section. */
9143 + s->output_section->vma)
9144 /* The branch instruction is 4 bytes into the stub. */
9145 + 4
9146 /* ARM branches work from the pc of the instruction + 8. */
9147 + 8);
9148
9149 put_arm_insn (globals, output_bfd,
9150 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
9151 s->contents + my_offset + 4);
9152 }
9153
9154 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
9155
9156 /* Now go back and fix up the original BL insn to point to here. */
9157 ret_offset =
9158 /* Address of where the stub is located. */
9159 (s->output_section->vma + s->output_offset + my_offset)
9160 /* Address of where the BL is located. */
9161 - (input_section->output_section->vma + input_section->output_offset
9162 + offset)
9163 /* Addend in the relocation. */
9164 - addend
9165 /* Biassing for PC-relative addressing. */
9166 - 8;
9167
9168 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
9169
9170 return true;
9171 }
9172
9173 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
9174
9175 static struct elf_link_hash_entry *
9176 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
9177 const char * name,
9178 bfd * input_bfd,
9179 bfd * output_bfd,
9180 asection * sym_sec,
9181 bfd_vma val,
9182 asection * s,
9183 char ** error_message)
9184 {
9185 bfd_vma my_offset;
9186 long int ret_offset;
9187 struct elf_link_hash_entry * myh;
9188 struct elf32_arm_link_hash_table * globals;
9189
9190 myh = find_arm_glue (info, name, error_message);
9191 if (myh == NULL)
9192 return NULL;
9193
9194 globals = elf32_arm_hash_table (info);
9195 BFD_ASSERT (globals != NULL);
9196 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9197
9198 my_offset = myh->root.u.def.value;
9199
9200 if ((my_offset & 0x01) == 0x01)
9201 {
9202 if (sym_sec != NULL
9203 && sym_sec->owner != NULL
9204 && !INTERWORK_FLAG (sym_sec->owner))
9205 {
9206 _bfd_error_handler
9207 (_("%pB(%s): warning: interworking not enabled;"
9208 " first occurrence: %pB: %s call to %s"),
9209 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
9210 }
9211
9212 --my_offset;
9213 myh->root.u.def.value = my_offset;
9214
9215 if (bfd_link_pic (info)
9216 || globals->root.is_relocatable_executable
9217 || globals->pic_veneer)
9218 {
9219 /* For relocatable objects we can't use absolute addresses,
9220 so construct the address from a relative offset. */
9221 /* TODO: If the offset is small it's probably worth
9222 constructing the address with adds. */
9223 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
9224 s->contents + my_offset);
9225 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
9226 s->contents + my_offset + 4);
9227 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
9228 s->contents + my_offset + 8);
9229 /* Adjust the offset by 4 for the position of the add,
9230 and 8 for the pipeline offset. */
9231 ret_offset = (val - (s->output_offset
9232 + s->output_section->vma
9233 + my_offset + 12))
9234 | 1;
9235 bfd_put_32 (output_bfd, ret_offset,
9236 s->contents + my_offset + 12);
9237 }
9238 else if (globals->use_blx)
9239 {
9240 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
9241 s->contents + my_offset);
9242
9243 /* It's a thumb address. Add the low order bit. */
9244 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
9245 s->contents + my_offset + 4);
9246 }
9247 else
9248 {
9249 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
9250 s->contents + my_offset);
9251
9252 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
9253 s->contents + my_offset + 4);
9254
9255 /* It's a thumb address. Add the low order bit. */
9256 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
9257 s->contents + my_offset + 8);
9258
9259 my_offset += 12;
9260 }
9261 }
9262
9263 BFD_ASSERT (my_offset <= globals->arm_glue_size);
9264
9265 return myh;
9266 }
9267
9268 /* Arm code calling a Thumb function. */
9269
9270 static int
9271 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
9272 const char * name,
9273 bfd * input_bfd,
9274 bfd * output_bfd,
9275 asection * input_section,
9276 bfd_byte * hit_data,
9277 asection * sym_sec,
9278 bfd_vma offset,
9279 bfd_signed_vma addend,
9280 bfd_vma val,
9281 char **error_message)
9282 {
9283 unsigned long int tmp;
9284 bfd_vma my_offset;
9285 asection * s;
9286 long int ret_offset;
9287 struct elf_link_hash_entry * myh;
9288 struct elf32_arm_link_hash_table * globals;
9289
9290 globals = elf32_arm_hash_table (info);
9291 BFD_ASSERT (globals != NULL);
9292 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9293
9294 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9295 ARM2THUMB_GLUE_SECTION_NAME);
9296 BFD_ASSERT (s != NULL);
9297 BFD_ASSERT (s->contents != NULL);
9298 BFD_ASSERT (s->output_section != NULL);
9299
9300 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9301 sym_sec, val, s, error_message);
9302 if (!myh)
9303 return false;
9304
9305 my_offset = myh->root.u.def.value;
9306 tmp = bfd_get_32 (input_bfd, hit_data);
9307 tmp = tmp & 0xFF000000;
9308
9309 /* Somehow these are both 4 too far, so subtract 8. */
9310 ret_offset = (s->output_offset
9311 + my_offset
9312 + s->output_section->vma
9313 - (input_section->output_offset
9314 + input_section->output_section->vma
9315 + offset + addend)
9316 - 8);
9317
9318 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9319
9320 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9321
9322 return true;
9323 }
9324
9325 /* Populate Arm stub for an exported Thumb function. */
9326
9327 static bool
9328 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9329 {
9330 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9331 asection * s;
9332 struct elf_link_hash_entry * myh;
9333 struct elf32_arm_link_hash_entry *eh;
9334 struct elf32_arm_link_hash_table * globals;
9335 asection *sec;
9336 bfd_vma val;
9337 char *error_message;
9338
9339 eh = elf32_arm_hash_entry (h);
9340 /* Allocate stubs for exported Thumb functions on v4t. */
9341 if (eh->export_glue == NULL)
9342 return true;
9343
9344 globals = elf32_arm_hash_table (info);
9345 BFD_ASSERT (globals != NULL);
9346 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9347
9348 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9349 ARM2THUMB_GLUE_SECTION_NAME);
9350 BFD_ASSERT (s != NULL);
9351 BFD_ASSERT (s->contents != NULL);
9352 BFD_ASSERT (s->output_section != NULL);
9353
9354 sec = eh->export_glue->root.u.def.section;
9355
9356 BFD_ASSERT (sec->output_section != NULL);
9357
9358 val = eh->export_glue->root.u.def.value + sec->output_offset
9359 + sec->output_section->vma;
9360
9361 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9362 h->root.u.def.section->owner,
9363 globals->obfd, sec, val, s,
9364 &error_message);
9365 BFD_ASSERT (myh);
9366 return true;
9367 }
9368
9369 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9370
9371 static bfd_vma
9372 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9373 {
9374 bfd_byte *p;
9375 bfd_vma glue_addr;
9376 asection *s;
9377 struct elf32_arm_link_hash_table *globals;
9378
9379 globals = elf32_arm_hash_table (info);
9380 BFD_ASSERT (globals != NULL);
9381 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9382
9383 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9384 ARM_BX_GLUE_SECTION_NAME);
9385 BFD_ASSERT (s != NULL);
9386 BFD_ASSERT (s->contents != NULL);
9387 BFD_ASSERT (s->output_section != NULL);
9388
9389 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9390
9391 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9392
9393 if ((globals->bx_glue_offset[reg] & 1) == 0)
9394 {
9395 p = s->contents + glue_addr;
9396 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9397 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9398 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9399 globals->bx_glue_offset[reg] |= 1;
9400 }
9401
9402 return glue_addr + s->output_section->vma + s->output_offset;
9403 }
9404
9405 /* Generate Arm stubs for exported Thumb symbols. */
9406 static void
9407 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9408 struct bfd_link_info *link_info)
9409 {
9410 struct elf32_arm_link_hash_table * globals;
9411
9412 if (link_info == NULL)
9413 /* Ignore this if we are not called by the ELF backend linker. */
9414 return;
9415
9416 globals = elf32_arm_hash_table (link_info);
9417 if (globals == NULL)
9418 return;
9419
9420 /* If blx is available then exported Thumb symbols are OK and there is
9421 nothing to do. */
9422 if (globals->use_blx)
9423 return;
9424
9425 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9426 link_info);
9427 }
9428
9429 /* Reserve space for COUNT dynamic relocations in relocation selection
9430 SRELOC. */
9431
9432 static void
9433 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9434 bfd_size_type count)
9435 {
9436 struct elf32_arm_link_hash_table *htab;
9437
9438 htab = elf32_arm_hash_table (info);
9439 BFD_ASSERT (htab->root.dynamic_sections_created);
9440 if (sreloc == NULL)
9441 abort ();
9442 sreloc->size += RELOC_SIZE (htab) * count;
9443 }
9444
9445 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9446 dynamic, the relocations should go in SRELOC, otherwise they should
9447 go in the special .rel.iplt section. */
9448
9449 static void
9450 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9451 bfd_size_type count)
9452 {
9453 struct elf32_arm_link_hash_table *htab;
9454
9455 htab = elf32_arm_hash_table (info);
9456 if (!htab->root.dynamic_sections_created)
9457 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9458 else
9459 {
9460 BFD_ASSERT (sreloc != NULL);
9461 sreloc->size += RELOC_SIZE (htab) * count;
9462 }
9463 }
9464
9465 /* Add relocation REL to the end of relocation section SRELOC. */
9466
9467 static void
9468 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9469 asection *sreloc, Elf_Internal_Rela *rel)
9470 {
9471 bfd_byte *loc;
9472 struct elf32_arm_link_hash_table *htab;
9473
9474 htab = elf32_arm_hash_table (info);
9475 if (!htab->root.dynamic_sections_created
9476 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9477 sreloc = htab->root.irelplt;
9478 if (sreloc == NULL)
9479 abort ();
9480 loc = sreloc->contents;
9481 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9482 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9483 abort ();
9484 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9485 }
9486
9487 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9488 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9489 to .plt. */
9490
9491 static void
9492 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9493 bool is_iplt_entry,
9494 union gotplt_union *root_plt,
9495 struct arm_plt_info *arm_plt)
9496 {
9497 struct elf32_arm_link_hash_table *htab;
9498 asection *splt;
9499 asection *sgotplt;
9500
9501 htab = elf32_arm_hash_table (info);
9502
9503 if (is_iplt_entry)
9504 {
9505 splt = htab->root.iplt;
9506 sgotplt = htab->root.igotplt;
9507
9508 /* NaCl uses a special first entry in .iplt too. */
9509 if (htab->root.target_os == is_nacl && splt->size == 0)
9510 splt->size += htab->plt_header_size;
9511
9512 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9513 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9514 }
9515 else
9516 {
9517 splt = htab->root.splt;
9518 sgotplt = htab->root.sgotplt;
9519
9520 if (htab->fdpic_p)
9521 {
9522 /* Allocate room for R_ARM_FUNCDESC_VALUE. */
9523 /* For lazy binding, relocations will be put into .rel.plt, in
9524 .rel.got otherwise. */
9525 /* FIXME: today we don't support lazy binding so put it in .rel.got */
9526 if (info->flags & DF_BIND_NOW)
9527 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
9528 else
9529 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9530 }
9531 else
9532 {
9533 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9534 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9535 }
9536
9537 /* If this is the first .plt entry, make room for the special
9538 first entry. */
9539 if (splt->size == 0)
9540 splt->size += htab->plt_header_size;
9541
9542 htab->next_tls_desc_index++;
9543 }
9544
9545 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9546 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9547 splt->size += PLT_THUMB_STUB_SIZE;
9548 root_plt->offset = splt->size;
9549 splt->size += htab->plt_entry_size;
9550
9551 /* We also need to make an entry in the .got.plt section, which
9552 will be placed in the .got section by the linker script. */
9553 if (is_iplt_entry)
9554 arm_plt->got_offset = sgotplt->size;
9555 else
9556 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9557 if (htab->fdpic_p)
9558 /* Function descriptor takes 64 bits in GOT. */
9559 sgotplt->size += 8;
9560 else
9561 sgotplt->size += 4;
9562 }
9563
9564 static bfd_vma
9565 arm_movw_immediate (bfd_vma value)
9566 {
9567 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9568 }
9569
9570 static bfd_vma
9571 arm_movt_immediate (bfd_vma value)
9572 {
9573 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9574 }
9575
9576 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9577 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9578 Otherwise, DYNINDX is the index of the symbol in the dynamic
9579 symbol table and SYM_VALUE is undefined.
9580
9581 ROOT_PLT points to the offset of the PLT entry from the start of its
9582 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9583 bookkeeping information.
9584
9585 Returns FALSE if there was a problem. */
9586
9587 static bool
9588 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9589 union gotplt_union *root_plt,
9590 struct arm_plt_info *arm_plt,
9591 int dynindx, bfd_vma sym_value)
9592 {
9593 struct elf32_arm_link_hash_table *htab;
9594 asection *sgot;
9595 asection *splt;
9596 asection *srel;
9597 bfd_byte *loc;
9598 bfd_vma plt_index;
9599 Elf_Internal_Rela rel;
9600 bfd_vma got_header_size;
9601
9602 htab = elf32_arm_hash_table (info);
9603
9604 /* Pick the appropriate sections and sizes. */
9605 if (dynindx == -1)
9606 {
9607 splt = htab->root.iplt;
9608 sgot = htab->root.igotplt;
9609 srel = htab->root.irelplt;
9610
9611 /* There are no reserved entries in .igot.plt, and no special
9612 first entry in .iplt. */
9613 got_header_size = 0;
9614 }
9615 else
9616 {
9617 splt = htab->root.splt;
9618 sgot = htab->root.sgotplt;
9619 srel = htab->root.srelplt;
9620
9621 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9622 }
9623 BFD_ASSERT (splt != NULL && srel != NULL);
9624
9625 bfd_vma got_offset, got_address, plt_address;
9626 bfd_vma got_displacement, initial_got_entry;
9627 bfd_byte * ptr;
9628
9629 BFD_ASSERT (sgot != NULL);
9630
9631 /* Get the offset into the .(i)got.plt table of the entry that
9632 corresponds to this function. */
9633 got_offset = (arm_plt->got_offset & -2);
9634
9635 /* Get the index in the procedure linkage table which
9636 corresponds to this symbol. This is the index of this symbol
9637 in all the symbols for which we are making plt entries.
9638 After the reserved .got.plt entries, all symbols appear in
9639 the same order as in .plt. */
9640 if (htab->fdpic_p)
9641 /* Function descriptor takes 8 bytes. */
9642 plt_index = (got_offset - got_header_size) / 8;
9643 else
9644 plt_index = (got_offset - got_header_size) / 4;
9645
9646 /* Calculate the address of the GOT entry. */
9647 got_address = (sgot->output_section->vma
9648 + sgot->output_offset
9649 + got_offset);
9650
9651 /* ...and the address of the PLT entry. */
9652 plt_address = (splt->output_section->vma
9653 + splt->output_offset
9654 + root_plt->offset);
9655
9656 ptr = splt->contents + root_plt->offset;
9657 if (htab->root.target_os == is_vxworks && bfd_link_pic (info))
9658 {
9659 unsigned int i;
9660 bfd_vma val;
9661
9662 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9663 {
9664 val = elf32_arm_vxworks_shared_plt_entry[i];
9665 if (i == 2)
9666 val |= got_address - sgot->output_section->vma;
9667 if (i == 5)
9668 val |= plt_index * RELOC_SIZE (htab);
9669 if (i == 2 || i == 5)
9670 bfd_put_32 (output_bfd, val, ptr);
9671 else
9672 put_arm_insn (htab, output_bfd, val, ptr);
9673 }
9674 }
9675 else if (htab->root.target_os == is_vxworks)
9676 {
9677 unsigned int i;
9678 bfd_vma val;
9679
9680 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9681 {
9682 val = elf32_arm_vxworks_exec_plt_entry[i];
9683 if (i == 2)
9684 val |= got_address;
9685 if (i == 4)
9686 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9687 if (i == 5)
9688 val |= plt_index * RELOC_SIZE (htab);
9689 if (i == 2 || i == 5)
9690 bfd_put_32 (output_bfd, val, ptr);
9691 else
9692 put_arm_insn (htab, output_bfd, val, ptr);
9693 }
9694
9695 loc = (htab->srelplt2->contents
9696 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9697
9698 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9699 referencing the GOT for this PLT entry. */
9700 rel.r_offset = plt_address + 8;
9701 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9702 rel.r_addend = got_offset;
9703 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9704 loc += RELOC_SIZE (htab);
9705
9706 /* Create the R_ARM_ABS32 relocation referencing the
9707 beginning of the PLT for this GOT entry. */
9708 rel.r_offset = got_address;
9709 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9710 rel.r_addend = 0;
9711 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9712 }
9713 else if (htab->root.target_os == is_nacl)
9714 {
9715 /* Calculate the displacement between the PLT slot and the
9716 common tail that's part of the special initial PLT slot. */
9717 int32_t tail_displacement
9718 = ((splt->output_section->vma + splt->output_offset
9719 + ARM_NACL_PLT_TAIL_OFFSET)
9720 - (plt_address + htab->plt_entry_size + 4));
9721 BFD_ASSERT ((tail_displacement & 3) == 0);
9722 tail_displacement >>= 2;
9723
9724 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9725 || (-tail_displacement & 0xff000000) == 0);
9726
9727 /* Calculate the displacement between the PLT slot and the entry
9728 in the GOT. The offset accounts for the value produced by
9729 adding to pc in the penultimate instruction of the PLT stub. */
9730 got_displacement = (got_address
9731 - (plt_address + htab->plt_entry_size));
9732
9733 /* NaCl does not support interworking at all. */
9734 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9735
9736 put_arm_insn (htab, output_bfd,
9737 elf32_arm_nacl_plt_entry[0]
9738 | arm_movw_immediate (got_displacement),
9739 ptr + 0);
9740 put_arm_insn (htab, output_bfd,
9741 elf32_arm_nacl_plt_entry[1]
9742 | arm_movt_immediate (got_displacement),
9743 ptr + 4);
9744 put_arm_insn (htab, output_bfd,
9745 elf32_arm_nacl_plt_entry[2],
9746 ptr + 8);
9747 put_arm_insn (htab, output_bfd,
9748 elf32_arm_nacl_plt_entry[3]
9749 | (tail_displacement & 0x00ffffff),
9750 ptr + 12);
9751 }
9752 else if (htab->fdpic_p)
9753 {
9754 const bfd_vma *plt_entry = using_thumb_only (htab)
9755 ? elf32_arm_fdpic_thumb_plt_entry
9756 : elf32_arm_fdpic_plt_entry;
9757
9758 /* Fill-up Thumb stub if needed. */
9759 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9760 {
9761 put_thumb_insn (htab, output_bfd,
9762 elf32_arm_plt_thumb_stub[0], ptr - 4);
9763 put_thumb_insn (htab, output_bfd,
9764 elf32_arm_plt_thumb_stub[1], ptr - 2);
9765 }
9766 /* As we are using 32 bit instructions even for the Thumb
9767 version, we have to use 'put_arm_insn' instead of
9768 'put_thumb_insn'. */
9769 put_arm_insn (htab, output_bfd, plt_entry[0], ptr + 0);
9770 put_arm_insn (htab, output_bfd, plt_entry[1], ptr + 4);
9771 put_arm_insn (htab, output_bfd, plt_entry[2], ptr + 8);
9772 put_arm_insn (htab, output_bfd, plt_entry[3], ptr + 12);
9773 bfd_put_32 (output_bfd, got_offset, ptr + 16);
9774
9775 if (!(info->flags & DF_BIND_NOW))
9776 {
9777 /* funcdesc_value_reloc_offset. */
9778 bfd_put_32 (output_bfd,
9779 htab->root.srelplt->reloc_count * RELOC_SIZE (htab),
9780 ptr + 20);
9781 put_arm_insn (htab, output_bfd, plt_entry[6], ptr + 24);
9782 put_arm_insn (htab, output_bfd, plt_entry[7], ptr + 28);
9783 put_arm_insn (htab, output_bfd, plt_entry[8], ptr + 32);
9784 put_arm_insn (htab, output_bfd, plt_entry[9], ptr + 36);
9785 }
9786 }
9787 else if (using_thumb_only (htab))
9788 {
9789 /* PR ld/16017: Generate thumb only PLT entries. */
9790 if (!using_thumb2 (htab))
9791 {
9792 /* FIXME: We ought to be able to generate thumb-1 PLT
9793 instructions... */
9794 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9795 output_bfd);
9796 return false;
9797 }
9798
9799 /* Calculate the displacement between the PLT slot and the entry in
9800 the GOT. The 12-byte offset accounts for the value produced by
9801 adding to pc in the 3rd instruction of the PLT stub. */
9802 got_displacement = got_address - (plt_address + 12);
9803
9804 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9805 instead of 'put_thumb_insn'. */
9806 put_arm_insn (htab, output_bfd,
9807 elf32_thumb2_plt_entry[0]
9808 | ((got_displacement & 0x000000ff) << 16)
9809 | ((got_displacement & 0x00000700) << 20)
9810 | ((got_displacement & 0x00000800) >> 1)
9811 | ((got_displacement & 0x0000f000) >> 12),
9812 ptr + 0);
9813 put_arm_insn (htab, output_bfd,
9814 elf32_thumb2_plt_entry[1]
9815 | ((got_displacement & 0x00ff0000) )
9816 | ((got_displacement & 0x07000000) << 4)
9817 | ((got_displacement & 0x08000000) >> 17)
9818 | ((got_displacement & 0xf0000000) >> 28),
9819 ptr + 4);
9820 put_arm_insn (htab, output_bfd,
9821 elf32_thumb2_plt_entry[2],
9822 ptr + 8);
9823 put_arm_insn (htab, output_bfd,
9824 elf32_thumb2_plt_entry[3],
9825 ptr + 12);
9826 }
9827 else
9828 {
9829 /* Calculate the displacement between the PLT slot and the
9830 entry in the GOT. The eight-byte offset accounts for the
9831 value produced by adding to pc in the first instruction
9832 of the PLT stub. */
9833 got_displacement = got_address - (plt_address + 8);
9834
9835 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9836 {
9837 put_thumb_insn (htab, output_bfd,
9838 elf32_arm_plt_thumb_stub[0], ptr - 4);
9839 put_thumb_insn (htab, output_bfd,
9840 elf32_arm_plt_thumb_stub[1], ptr - 2);
9841 }
9842
9843 if (!elf32_arm_use_long_plt_entry)
9844 {
9845 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9846
9847 put_arm_insn (htab, output_bfd,
9848 elf32_arm_plt_entry_short[0]
9849 | ((got_displacement & 0x0ff00000) >> 20),
9850 ptr + 0);
9851 put_arm_insn (htab, output_bfd,
9852 elf32_arm_plt_entry_short[1]
9853 | ((got_displacement & 0x000ff000) >> 12),
9854 ptr+ 4);
9855 put_arm_insn (htab, output_bfd,
9856 elf32_arm_plt_entry_short[2]
9857 | (got_displacement & 0x00000fff),
9858 ptr + 8);
9859 #ifdef FOUR_WORD_PLT
9860 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9861 #endif
9862 }
9863 else
9864 {
9865 put_arm_insn (htab, output_bfd,
9866 elf32_arm_plt_entry_long[0]
9867 | ((got_displacement & 0xf0000000) >> 28),
9868 ptr + 0);
9869 put_arm_insn (htab, output_bfd,
9870 elf32_arm_plt_entry_long[1]
9871 | ((got_displacement & 0x0ff00000) >> 20),
9872 ptr + 4);
9873 put_arm_insn (htab, output_bfd,
9874 elf32_arm_plt_entry_long[2]
9875 | ((got_displacement & 0x000ff000) >> 12),
9876 ptr+ 8);
9877 put_arm_insn (htab, output_bfd,
9878 elf32_arm_plt_entry_long[3]
9879 | (got_displacement & 0x00000fff),
9880 ptr + 12);
9881 }
9882 }
9883
9884 /* Fill in the entry in the .rel(a).(i)plt section. */
9885 rel.r_offset = got_address;
9886 rel.r_addend = 0;
9887 if (dynindx == -1)
9888 {
9889 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9890 The dynamic linker or static executable then calls SYM_VALUE
9891 to determine the correct run-time value of the .igot.plt entry. */
9892 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9893 initial_got_entry = sym_value;
9894 }
9895 else
9896 {
9897 /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
9898 used by PLT entry. */
9899 if (htab->fdpic_p)
9900 {
9901 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
9902 initial_got_entry = 0;
9903 }
9904 else
9905 {
9906 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9907 initial_got_entry = (splt->output_section->vma
9908 + splt->output_offset);
9909
9910 /* PR ld/16017
9911 When thumb only we need to set the LSB for any address that
9912 will be used with an interworking branch instruction. */
9913 if (using_thumb_only (htab))
9914 initial_got_entry |= 1;
9915 }
9916 }
9917
9918 /* Fill in the entry in the global offset table. */
9919 bfd_put_32 (output_bfd, initial_got_entry,
9920 sgot->contents + got_offset);
9921
9922 if (htab->fdpic_p && !(info->flags & DF_BIND_NOW))
9923 {
9924 /* Setup initial funcdesc value. */
9925 /* FIXME: we don't support lazy binding because there is a
9926 race condition between both words getting written and
9927 some other thread attempting to read them. The ARM
9928 architecture does not have an atomic 64 bit load/store
9929 instruction that could be used to prevent it; it is
9930 recommended that threaded FDPIC applications run with the
9931 LD_BIND_NOW environment variable set. */
9932 bfd_put_32 (output_bfd, plt_address + 0x18,
9933 sgot->contents + got_offset);
9934 bfd_put_32 (output_bfd, -1 /*TODO*/,
9935 sgot->contents + got_offset + 4);
9936 }
9937
9938 if (dynindx == -1)
9939 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9940 else
9941 {
9942 if (htab->fdpic_p)
9943 {
9944 /* For FDPIC we put PLT relocationss into .rel.got when not
9945 lazy binding otherwise we put them in .rel.plt. For now,
9946 we don't support lazy binding so put it in .rel.got. */
9947 if (info->flags & DF_BIND_NOW)
9948 elf32_arm_add_dynreloc (output_bfd, info, htab->root.srelgot, &rel);
9949 else
9950 elf32_arm_add_dynreloc (output_bfd, info, htab->root.srelplt, &rel);
9951 }
9952 else
9953 {
9954 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9955 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9956 }
9957 }
9958
9959 return true;
9960 }
9961
9962 /* Some relocations map to different relocations depending on the
9963 target. Return the real relocation. */
9964
9965 static int
9966 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
9967 int r_type)
9968 {
9969 switch (r_type)
9970 {
9971 case R_ARM_TARGET1:
9972 if (globals->target1_is_rel)
9973 return R_ARM_REL32;
9974 else
9975 return R_ARM_ABS32;
9976
9977 case R_ARM_TARGET2:
9978 return globals->target2_reloc;
9979
9980 default:
9981 return r_type;
9982 }
9983 }
9984
9985 /* Return the base VMA address which should be subtracted from real addresses
9986 when resolving @dtpoff relocation.
9987 This is PT_TLS segment p_vaddr. */
9988
9989 static bfd_vma
9990 dtpoff_base (struct bfd_link_info *info)
9991 {
9992 /* If tls_sec is NULL, we should have signalled an error already. */
9993 if (elf_hash_table (info)->tls_sec == NULL)
9994 return 0;
9995 return elf_hash_table (info)->tls_sec->vma;
9996 }
9997
9998 /* Return the relocation value for @tpoff relocation
9999 if STT_TLS virtual address is ADDRESS. */
10000
10001 static bfd_vma
10002 tpoff (struct bfd_link_info *info, bfd_vma address)
10003 {
10004 struct elf_link_hash_table *htab = elf_hash_table (info);
10005 bfd_vma base;
10006
10007 /* If tls_sec is NULL, we should have signalled an error already. */
10008 if (htab->tls_sec == NULL)
10009 return 0;
10010 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
10011 return address - htab->tls_sec->vma + base;
10012 }
10013
10014 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
10015 VALUE is the relocation value. */
10016
10017 static bfd_reloc_status_type
10018 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
10019 {
10020 if (value > 0xfff)
10021 return bfd_reloc_overflow;
10022
10023 value |= bfd_get_32 (abfd, data) & 0xfffff000;
10024 bfd_put_32 (abfd, value, data);
10025 return bfd_reloc_ok;
10026 }
10027
10028 /* Handle TLS relaxations. Relaxing is possible for symbols that use
10029 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
10030 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
10031
10032 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
10033 is to then call final_link_relocate. Return other values in the
10034 case of error.
10035
10036 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
10037 the pre-relaxed code. It would be nice if the relocs were updated
10038 to match the optimization. */
10039
10040 static bfd_reloc_status_type
10041 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
10042 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
10043 Elf_Internal_Rela *rel, unsigned long is_local)
10044 {
10045 unsigned long insn;
10046
10047 switch (ELF32_R_TYPE (rel->r_info))
10048 {
10049 default:
10050 return bfd_reloc_notsupported;
10051
10052 case R_ARM_TLS_GOTDESC:
10053 if (is_local)
10054 insn = 0;
10055 else
10056 {
10057 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10058 if (insn & 1)
10059 insn -= 5; /* THUMB */
10060 else
10061 insn -= 8; /* ARM */
10062 }
10063 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10064 return bfd_reloc_continue;
10065
10066 case R_ARM_THM_TLS_DESCSEQ:
10067 /* Thumb insn. */
10068 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
10069 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
10070 {
10071 if (is_local)
10072 /* nop */
10073 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10074 }
10075 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
10076 {
10077 if (is_local)
10078 /* nop */
10079 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10080 else
10081 /* ldr rx,[ry] */
10082 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
10083 }
10084 else if ((insn & 0xff87) == 0x4780) /* blx rx */
10085 {
10086 if (is_local)
10087 /* nop */
10088 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10089 else
10090 /* mov r0, rx */
10091 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
10092 contents + rel->r_offset);
10093 }
10094 else
10095 {
10096 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
10097 /* It's a 32 bit instruction, fetch the rest of it for
10098 error generation. */
10099 insn = (insn << 16)
10100 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
10101 _bfd_error_handler
10102 /* xgettext:c-format */
10103 (_("%pB(%pA+%#" PRIx64 "): "
10104 "unexpected %s instruction '%#lx' in TLS trampoline"),
10105 input_bfd, input_sec, (uint64_t) rel->r_offset,
10106 "Thumb", insn);
10107 return bfd_reloc_notsupported;
10108 }
10109 break;
10110
10111 case R_ARM_TLS_DESCSEQ:
10112 /* arm insn. */
10113 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10114 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
10115 {
10116 if (is_local)
10117 /* mov rx, ry */
10118 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
10119 contents + rel->r_offset);
10120 }
10121 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
10122 {
10123 if (is_local)
10124 /* nop */
10125 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10126 else
10127 /* ldr rx,[ry] */
10128 bfd_put_32 (input_bfd, insn & 0xfffff000,
10129 contents + rel->r_offset);
10130 }
10131 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
10132 {
10133 if (is_local)
10134 /* nop */
10135 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10136 else
10137 /* mov r0, rx */
10138 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
10139 contents + rel->r_offset);
10140 }
10141 else
10142 {
10143 _bfd_error_handler
10144 /* xgettext:c-format */
10145 (_("%pB(%pA+%#" PRIx64 "): "
10146 "unexpected %s instruction '%#lx' in TLS trampoline"),
10147 input_bfd, input_sec, (uint64_t) rel->r_offset,
10148 "ARM", insn);
10149 return bfd_reloc_notsupported;
10150 }
10151 break;
10152
10153 case R_ARM_TLS_CALL:
10154 /* GD->IE relaxation, turn the instruction into 'nop' or
10155 'ldr r0, [pc,r0]' */
10156 insn = is_local ? 0xe1a00000 : 0xe79f0000;
10157 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10158 break;
10159
10160 case R_ARM_THM_TLS_CALL:
10161 /* GD->IE relaxation. */
10162 if (!is_local)
10163 /* add r0,pc; ldr r0, [r0] */
10164 insn = 0x44786800;
10165 else if (using_thumb2 (globals))
10166 /* nop.w */
10167 insn = 0xf3af8000;
10168 else
10169 /* nop; nop */
10170 insn = 0xbf00bf00;
10171
10172 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
10173 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
10174 break;
10175 }
10176 return bfd_reloc_ok;
10177 }
10178
10179 /* For a given value of n, calculate the value of G_n as required to
10180 deal with group relocations. We return it in the form of an
10181 encoded constant-and-rotation, together with the final residual. If n is
10182 specified as less than zero, then final_residual is filled with the
10183 input value and no further action is performed. */
10184
10185 static bfd_vma
10186 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
10187 {
10188 int current_n;
10189 bfd_vma g_n;
10190 bfd_vma encoded_g_n = 0;
10191 bfd_vma residual = value; /* Also known as Y_n. */
10192
10193 for (current_n = 0; current_n <= n; current_n++)
10194 {
10195 int shift;
10196
10197 /* Calculate which part of the value to mask. */
10198 if (residual == 0)
10199 shift = 0;
10200 else
10201 {
10202 int msb;
10203
10204 /* Determine the most significant bit in the residual and
10205 align the resulting value to a 2-bit boundary. */
10206 for (msb = 30; msb >= 0; msb -= 2)
10207 if (residual & (3u << msb))
10208 break;
10209
10210 /* The desired shift is now (msb - 6), or zero, whichever
10211 is the greater. */
10212 shift = msb - 6;
10213 if (shift < 0)
10214 shift = 0;
10215 }
10216
10217 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
10218 g_n = residual & (0xff << shift);
10219 encoded_g_n = (g_n >> shift)
10220 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
10221
10222 /* Calculate the residual for the next time around. */
10223 residual &= ~g_n;
10224 }
10225
10226 *final_residual = residual;
10227
10228 return encoded_g_n;
10229 }
10230
10231 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
10232 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
10233
10234 static int
10235 identify_add_or_sub (bfd_vma insn)
10236 {
10237 int opcode = insn & 0x1e00000;
10238
10239 if (opcode == 1 << 23) /* ADD */
10240 return 1;
10241
10242 if (opcode == 1 << 22) /* SUB */
10243 return -1;
10244
10245 return 0;
10246 }
10247
10248 /* Perform a relocation as part of a final link. */
10249
10250 static bfd_reloc_status_type
10251 elf32_arm_final_link_relocate (reloc_howto_type * howto,
10252 bfd * input_bfd,
10253 bfd * output_bfd,
10254 asection * input_section,
10255 bfd_byte * contents,
10256 Elf_Internal_Rela * rel,
10257 bfd_vma value,
10258 struct bfd_link_info * info,
10259 asection * sym_sec,
10260 const char * sym_name,
10261 unsigned char st_type,
10262 enum arm_st_branch_type branch_type,
10263 struct elf_link_hash_entry * h,
10264 bool * unresolved_reloc_p,
10265 char ** error_message)
10266 {
10267 unsigned long r_type = howto->type;
10268 unsigned long r_symndx;
10269 bfd_byte * hit_data = contents + rel->r_offset;
10270 bfd_vma * local_got_offsets;
10271 bfd_vma * local_tlsdesc_gotents;
10272 asection * sgot;
10273 asection * splt;
10274 asection * sreloc = NULL;
10275 asection * srelgot;
10276 bfd_vma addend;
10277 bfd_signed_vma signed_addend;
10278 unsigned char dynreloc_st_type;
10279 bfd_vma dynreloc_value;
10280 struct elf32_arm_link_hash_table * globals;
10281 struct elf32_arm_link_hash_entry *eh;
10282 union gotplt_union *root_plt;
10283 struct arm_plt_info *arm_plt;
10284 bfd_vma plt_offset;
10285 bfd_vma gotplt_offset;
10286 bool has_iplt_entry;
10287 bool resolved_to_zero;
10288
10289 globals = elf32_arm_hash_table (info);
10290 if (globals == NULL)
10291 return bfd_reloc_notsupported;
10292
10293 BFD_ASSERT (is_arm_elf (input_bfd));
10294 BFD_ASSERT (howto != NULL);
10295
10296 /* Some relocation types map to different relocations depending on the
10297 target. We pick the right one here. */
10298 r_type = arm_real_reloc_type (globals, r_type);
10299
10300 /* It is possible to have linker relaxations on some TLS access
10301 models. Update our information here. */
10302 r_type = elf32_arm_tls_transition (info, r_type, h);
10303
10304 if (r_type != howto->type)
10305 howto = elf32_arm_howto_from_type (r_type);
10306
10307 eh = (struct elf32_arm_link_hash_entry *) h;
10308 sgot = globals->root.sgot;
10309 local_got_offsets = elf_local_got_offsets (input_bfd);
10310 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
10311
10312 if (globals->root.dynamic_sections_created)
10313 srelgot = globals->root.srelgot;
10314 else
10315 srelgot = NULL;
10316
10317 r_symndx = ELF32_R_SYM (rel->r_info);
10318
10319 if (globals->use_rel)
10320 {
10321 bfd_vma sign;
10322
10323 switch (howto->size)
10324 {
10325 case 0: addend = bfd_get_8 (input_bfd, hit_data); break;
10326 case 1: addend = bfd_get_16 (input_bfd, hit_data); break;
10327 case 2: addend = bfd_get_32 (input_bfd, hit_data); break;
10328 default: addend = 0; break;
10329 }
10330 /* Note: the addend and signed_addend calculated here are
10331 incorrect for any split field. */
10332 addend &= howto->src_mask;
10333 sign = howto->src_mask & ~(howto->src_mask >> 1);
10334 signed_addend = (addend ^ sign) - sign;
10335 signed_addend = (bfd_vma) signed_addend << howto->rightshift;
10336 addend <<= howto->rightshift;
10337 }
10338 else
10339 addend = signed_addend = rel->r_addend;
10340
10341 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10342 are resolving a function call relocation. */
10343 if (using_thumb_only (globals)
10344 && (r_type == R_ARM_THM_CALL
10345 || r_type == R_ARM_THM_JUMP24)
10346 && branch_type == ST_BRANCH_TO_ARM)
10347 branch_type = ST_BRANCH_TO_THUMB;
10348
10349 /* Record the symbol information that should be used in dynamic
10350 relocations. */
10351 dynreloc_st_type = st_type;
10352 dynreloc_value = value;
10353 if (branch_type == ST_BRANCH_TO_THUMB)
10354 dynreloc_value |= 1;
10355
10356 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10357 VALUE appropriately for relocations that we resolve at link time. */
10358 has_iplt_entry = false;
10359 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
10360 &arm_plt)
10361 && root_plt->offset != (bfd_vma) -1)
10362 {
10363 plt_offset = root_plt->offset;
10364 gotplt_offset = arm_plt->got_offset;
10365
10366 if (h == NULL || eh->is_iplt)
10367 {
10368 has_iplt_entry = true;
10369 splt = globals->root.iplt;
10370
10371 /* Populate .iplt entries here, because not all of them will
10372 be seen by finish_dynamic_symbol. The lower bit is set if
10373 we have already populated the entry. */
10374 if (plt_offset & 1)
10375 plt_offset--;
10376 else
10377 {
10378 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
10379 -1, dynreloc_value))
10380 root_plt->offset |= 1;
10381 else
10382 return bfd_reloc_notsupported;
10383 }
10384
10385 /* Static relocations always resolve to the .iplt entry. */
10386 st_type = STT_FUNC;
10387 value = (splt->output_section->vma
10388 + splt->output_offset
10389 + plt_offset);
10390 branch_type = ST_BRANCH_TO_ARM;
10391
10392 /* If there are non-call relocations that resolve to the .iplt
10393 entry, then all dynamic ones must too. */
10394 if (arm_plt->noncall_refcount != 0)
10395 {
10396 dynreloc_st_type = st_type;
10397 dynreloc_value = value;
10398 }
10399 }
10400 else
10401 /* We populate the .plt entry in finish_dynamic_symbol. */
10402 splt = globals->root.splt;
10403 }
10404 else
10405 {
10406 splt = NULL;
10407 plt_offset = (bfd_vma) -1;
10408 gotplt_offset = (bfd_vma) -1;
10409 }
10410
10411 resolved_to_zero = (h != NULL
10412 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
10413
10414 switch (r_type)
10415 {
10416 case R_ARM_NONE:
10417 /* We don't need to find a value for this symbol. It's just a
10418 marker. */
10419 *unresolved_reloc_p = false;
10420 return bfd_reloc_ok;
10421
10422 case R_ARM_ABS12:
10423 if (globals->root.target_os != is_vxworks)
10424 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10425 /* Fall through. */
10426
10427 case R_ARM_PC24:
10428 case R_ARM_ABS32:
10429 case R_ARM_ABS32_NOI:
10430 case R_ARM_REL32:
10431 case R_ARM_REL32_NOI:
10432 case R_ARM_CALL:
10433 case R_ARM_JUMP24:
10434 case R_ARM_XPC25:
10435 case R_ARM_PREL31:
10436 case R_ARM_PLT32:
10437 /* Handle relocations which should use the PLT entry. ABS32/REL32
10438 will use the symbol's value, which may point to a PLT entry, but we
10439 don't need to handle that here. If we created a PLT entry, all
10440 branches in this object should go to it, except if the PLT is too
10441 far away, in which case a long branch stub should be inserted. */
10442 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10443 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10444 && r_type != R_ARM_CALL
10445 && r_type != R_ARM_JUMP24
10446 && r_type != R_ARM_PLT32)
10447 && plt_offset != (bfd_vma) -1)
10448 {
10449 /* If we've created a .plt section, and assigned a PLT entry
10450 to this function, it must either be a STT_GNU_IFUNC reference
10451 or not be known to bind locally. In other cases, we should
10452 have cleared the PLT entry by now. */
10453 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10454
10455 value = (splt->output_section->vma
10456 + splt->output_offset
10457 + plt_offset);
10458 *unresolved_reloc_p = false;
10459 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10460 contents, rel->r_offset, value,
10461 rel->r_addend);
10462 }
10463
10464 /* When generating a shared object or relocatable executable, these
10465 relocations are copied into the output file to be resolved at
10466 run time. */
10467 if ((bfd_link_pic (info)
10468 || globals->root.is_relocatable_executable
10469 || globals->fdpic_p)
10470 && (input_section->flags & SEC_ALLOC)
10471 && !(globals->root.target_os == is_vxworks
10472 && strcmp (input_section->output_section->name,
10473 ".tls_vars") == 0)
10474 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10475 || !SYMBOL_CALLS_LOCAL (info, h))
10476 && !(input_bfd == globals->stub_bfd
10477 && strstr (input_section->name, STUB_SUFFIX))
10478 && (h == NULL
10479 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10480 && !resolved_to_zero)
10481 || h->root.type != bfd_link_hash_undefweak)
10482 && r_type != R_ARM_PC24
10483 && r_type != R_ARM_CALL
10484 && r_type != R_ARM_JUMP24
10485 && r_type != R_ARM_PREL31
10486 && r_type != R_ARM_PLT32)
10487 {
10488 Elf_Internal_Rela outrel;
10489 bool skip, relocate;
10490 int isrofixup = 0;
10491
10492 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10493 && !h->def_regular)
10494 {
10495 char *v = _("shared object");
10496
10497 if (bfd_link_executable (info))
10498 v = _("PIE executable");
10499
10500 _bfd_error_handler
10501 (_("%pB: relocation %s against external or undefined symbol `%s'"
10502 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10503 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10504 return bfd_reloc_notsupported;
10505 }
10506
10507 *unresolved_reloc_p = false;
10508
10509 if (sreloc == NULL && globals->root.dynamic_sections_created)
10510 {
10511 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10512 ! globals->use_rel);
10513
10514 if (sreloc == NULL)
10515 return bfd_reloc_notsupported;
10516 }
10517
10518 skip = false;
10519 relocate = false;
10520
10521 outrel.r_addend = addend;
10522 outrel.r_offset =
10523 _bfd_elf_section_offset (output_bfd, info, input_section,
10524 rel->r_offset);
10525 if (outrel.r_offset == (bfd_vma) -1)
10526 skip = true;
10527 else if (outrel.r_offset == (bfd_vma) -2)
10528 skip = true, relocate = true;
10529 outrel.r_offset += (input_section->output_section->vma
10530 + input_section->output_offset);
10531
10532 if (skip)
10533 memset (&outrel, 0, sizeof outrel);
10534 else if (h != NULL
10535 && h->dynindx != -1
10536 && (!bfd_link_pic (info)
10537 || !(bfd_link_pie (info)
10538 || SYMBOLIC_BIND (info, h))
10539 || !h->def_regular))
10540 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10541 else
10542 {
10543 int symbol;
10544
10545 /* This symbol is local, or marked to become local. */
10546 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI
10547 || (globals->fdpic_p && !bfd_link_pic (info)));
10548 /* On SVR4-ish systems, the dynamic loader cannot
10549 relocate the text and data segments independently,
10550 so the symbol does not matter. */
10551 symbol = 0;
10552 if (dynreloc_st_type == STT_GNU_IFUNC)
10553 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10554 to the .iplt entry. Instead, every non-call reference
10555 must use an R_ARM_IRELATIVE relocation to obtain the
10556 correct run-time address. */
10557 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10558 else if (globals->fdpic_p && !bfd_link_pic (info))
10559 isrofixup = 1;
10560 else
10561 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10562 if (globals->use_rel)
10563 relocate = true;
10564 else
10565 outrel.r_addend += dynreloc_value;
10566 }
10567
10568 if (isrofixup)
10569 arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset);
10570 else
10571 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10572
10573 /* If this reloc is against an external symbol, we do not want to
10574 fiddle with the addend. Otherwise, we need to include the symbol
10575 value so that it becomes an addend for the dynamic reloc. */
10576 if (! relocate)
10577 return bfd_reloc_ok;
10578
10579 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10580 contents, rel->r_offset,
10581 dynreloc_value, (bfd_vma) 0);
10582 }
10583 else switch (r_type)
10584 {
10585 case R_ARM_ABS12:
10586 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10587
10588 case R_ARM_XPC25: /* Arm BLX instruction. */
10589 case R_ARM_CALL:
10590 case R_ARM_JUMP24:
10591 case R_ARM_PC24: /* Arm B/BL instruction. */
10592 case R_ARM_PLT32:
10593 {
10594 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10595
10596 if (r_type == R_ARM_XPC25)
10597 {
10598 /* Check for Arm calling Arm function. */
10599 /* FIXME: Should we translate the instruction into a BL
10600 instruction instead ? */
10601 if (branch_type != ST_BRANCH_TO_THUMB)
10602 _bfd_error_handler
10603 (_("\%pB: warning: %s BLX instruction targets"
10604 " %s function '%s'"),
10605 input_bfd, "ARM",
10606 "ARM", h ? h->root.root.string : "(local)");
10607 }
10608 else if (r_type == R_ARM_PC24)
10609 {
10610 /* Check for Arm calling Thumb function. */
10611 if (branch_type == ST_BRANCH_TO_THUMB)
10612 {
10613 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10614 output_bfd, input_section,
10615 hit_data, sym_sec, rel->r_offset,
10616 signed_addend, value,
10617 error_message))
10618 return bfd_reloc_ok;
10619 else
10620 return bfd_reloc_dangerous;
10621 }
10622 }
10623
10624 /* Check if a stub has to be inserted because the
10625 destination is too far or we are changing mode. */
10626 if ( r_type == R_ARM_CALL
10627 || r_type == R_ARM_JUMP24
10628 || r_type == R_ARM_PLT32)
10629 {
10630 enum elf32_arm_stub_type stub_type = arm_stub_none;
10631 struct elf32_arm_link_hash_entry *hash;
10632
10633 hash = (struct elf32_arm_link_hash_entry *) h;
10634 stub_type = arm_type_of_stub (info, input_section, rel,
10635 st_type, &branch_type,
10636 hash, value, sym_sec,
10637 input_bfd, sym_name);
10638
10639 if (stub_type != arm_stub_none)
10640 {
10641 /* The target is out of reach, so redirect the
10642 branch to the local stub for this function. */
10643 stub_entry = elf32_arm_get_stub_entry (input_section,
10644 sym_sec, h,
10645 rel, globals,
10646 stub_type);
10647 {
10648 if (stub_entry != NULL)
10649 value = (stub_entry->stub_offset
10650 + stub_entry->stub_sec->output_offset
10651 + stub_entry->stub_sec->output_section->vma);
10652
10653 if (plt_offset != (bfd_vma) -1)
10654 *unresolved_reloc_p = false;
10655 }
10656 }
10657 else
10658 {
10659 /* If the call goes through a PLT entry, make sure to
10660 check distance to the right destination address. */
10661 if (plt_offset != (bfd_vma) -1)
10662 {
10663 value = (splt->output_section->vma
10664 + splt->output_offset
10665 + plt_offset);
10666 *unresolved_reloc_p = false;
10667 /* The PLT entry is in ARM mode, regardless of the
10668 target function. */
10669 branch_type = ST_BRANCH_TO_ARM;
10670 }
10671 }
10672 }
10673
10674 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10675 where:
10676 S is the address of the symbol in the relocation.
10677 P is address of the instruction being relocated.
10678 A is the addend (extracted from the instruction) in bytes.
10679
10680 S is held in 'value'.
10681 P is the base address of the section containing the
10682 instruction plus the offset of the reloc into that
10683 section, ie:
10684 (input_section->output_section->vma +
10685 input_section->output_offset +
10686 rel->r_offset).
10687 A is the addend, converted into bytes, ie:
10688 (signed_addend * 4)
10689
10690 Note: None of these operations have knowledge of the pipeline
10691 size of the processor, thus it is up to the assembler to
10692 encode this information into the addend. */
10693 value -= (input_section->output_section->vma
10694 + input_section->output_offset);
10695 value -= rel->r_offset;
10696 value += signed_addend;
10697
10698 signed_addend = value;
10699 signed_addend >>= howto->rightshift;
10700
10701 /* A branch to an undefined weak symbol is turned into a jump to
10702 the next instruction unless a PLT entry will be created.
10703 Do the same for local undefined symbols (but not for STN_UNDEF).
10704 The jump to the next instruction is optimized as a NOP depending
10705 on the architecture. */
10706 if (h ? (h->root.type == bfd_link_hash_undefweak
10707 && plt_offset == (bfd_vma) -1)
10708 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10709 {
10710 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10711
10712 if (arch_has_arm_nop (globals))
10713 value |= 0x0320f000;
10714 else
10715 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10716 }
10717 else
10718 {
10719 /* Perform a signed range check. */
10720 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10721 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10722 return bfd_reloc_overflow;
10723
10724 addend = (value & 2);
10725
10726 value = (signed_addend & howto->dst_mask)
10727 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10728
10729 if (r_type == R_ARM_CALL)
10730 {
10731 /* Set the H bit in the BLX instruction. */
10732 if (branch_type == ST_BRANCH_TO_THUMB)
10733 {
10734 if (addend)
10735 value |= (1 << 24);
10736 else
10737 value &= ~(bfd_vma)(1 << 24);
10738 }
10739
10740 /* Select the correct instruction (BL or BLX). */
10741 /* Only if we are not handling a BL to a stub. In this
10742 case, mode switching is performed by the stub. */
10743 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10744 value |= (1 << 28);
10745 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10746 {
10747 value &= ~(bfd_vma)(1 << 28);
10748 value |= (1 << 24);
10749 }
10750 }
10751 }
10752 }
10753 break;
10754
10755 case R_ARM_ABS32:
10756 value += addend;
10757 if (branch_type == ST_BRANCH_TO_THUMB)
10758 value |= 1;
10759 break;
10760
10761 case R_ARM_ABS32_NOI:
10762 value += addend;
10763 break;
10764
10765 case R_ARM_REL32:
10766 value += addend;
10767 if (branch_type == ST_BRANCH_TO_THUMB)
10768 value |= 1;
10769 value -= (input_section->output_section->vma
10770 + input_section->output_offset + rel->r_offset);
10771 break;
10772
10773 case R_ARM_REL32_NOI:
10774 value += addend;
10775 value -= (input_section->output_section->vma
10776 + input_section->output_offset + rel->r_offset);
10777 break;
10778
10779 case R_ARM_PREL31:
10780 value -= (input_section->output_section->vma
10781 + input_section->output_offset + rel->r_offset);
10782 value += signed_addend;
10783 if (! h || h->root.type != bfd_link_hash_undefweak)
10784 {
10785 /* Check for overflow. */
10786 if ((value ^ (value >> 1)) & (1 << 30))
10787 return bfd_reloc_overflow;
10788 }
10789 value &= 0x7fffffff;
10790 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10791 if (branch_type == ST_BRANCH_TO_THUMB)
10792 value |= 1;
10793 break;
10794 }
10795
10796 bfd_put_32 (input_bfd, value, hit_data);
10797 return bfd_reloc_ok;
10798
10799 case R_ARM_ABS8:
10800 value += addend;
10801
10802 /* There is no way to tell whether the user intended to use a signed or
10803 unsigned addend. When checking for overflow we accept either,
10804 as specified by the AAELF. */
10805 if ((long) value > 0xff || (long) value < -0x80)
10806 return bfd_reloc_overflow;
10807
10808 bfd_put_8 (input_bfd, value, hit_data);
10809 return bfd_reloc_ok;
10810
10811 case R_ARM_ABS16:
10812 value += addend;
10813
10814 /* See comment for R_ARM_ABS8. */
10815 if ((long) value > 0xffff || (long) value < -0x8000)
10816 return bfd_reloc_overflow;
10817
10818 bfd_put_16 (input_bfd, value, hit_data);
10819 return bfd_reloc_ok;
10820
10821 case R_ARM_THM_ABS5:
10822 /* Support ldr and str instructions for the thumb. */
10823 if (globals->use_rel)
10824 {
10825 /* Need to refetch addend. */
10826 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10827 /* ??? Need to determine shift amount from operand size. */
10828 addend >>= howto->rightshift;
10829 }
10830 value += addend;
10831
10832 /* ??? Isn't value unsigned? */
10833 if ((long) value > 0x1f || (long) value < -0x10)
10834 return bfd_reloc_overflow;
10835
10836 /* ??? Value needs to be properly shifted into place first. */
10837 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10838 bfd_put_16 (input_bfd, value, hit_data);
10839 return bfd_reloc_ok;
10840
10841 case R_ARM_THM_ALU_PREL_11_0:
10842 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10843 {
10844 bfd_vma insn;
10845 bfd_signed_vma relocation;
10846
10847 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10848 | bfd_get_16 (input_bfd, hit_data + 2);
10849
10850 if (globals->use_rel)
10851 {
10852 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10853 | ((insn & (1 << 26)) >> 15);
10854 if (insn & 0xf00000)
10855 signed_addend = -signed_addend;
10856 }
10857
10858 relocation = value + signed_addend;
10859 relocation -= Pa (input_section->output_section->vma
10860 + input_section->output_offset
10861 + rel->r_offset);
10862
10863 /* PR 21523: Use an absolute value. The user of this reloc will
10864 have already selected an ADD or SUB insn appropriately. */
10865 value = llabs (relocation);
10866
10867 if (value >= 0x1000)
10868 return bfd_reloc_overflow;
10869
10870 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10871 if (branch_type == ST_BRANCH_TO_THUMB)
10872 value |= 1;
10873
10874 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10875 | ((value & 0x700) << 4)
10876 | ((value & 0x800) << 15);
10877 if (relocation < 0)
10878 insn |= 0xa00000;
10879
10880 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10881 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10882
10883 return bfd_reloc_ok;
10884 }
10885
10886 case R_ARM_THM_PC8:
10887 /* PR 10073: This reloc is not generated by the GNU toolchain,
10888 but it is supported for compatibility with third party libraries
10889 generated by other compilers, specifically the ARM/IAR. */
10890 {
10891 bfd_vma insn;
10892 bfd_signed_vma relocation;
10893
10894 insn = bfd_get_16 (input_bfd, hit_data);
10895
10896 if (globals->use_rel)
10897 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10898
10899 relocation = value + addend;
10900 relocation -= Pa (input_section->output_section->vma
10901 + input_section->output_offset
10902 + rel->r_offset);
10903
10904 value = relocation;
10905
10906 /* We do not check for overflow of this reloc. Although strictly
10907 speaking this is incorrect, it appears to be necessary in order
10908 to work with IAR generated relocs. Since GCC and GAS do not
10909 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10910 a problem for them. */
10911 value &= 0x3fc;
10912
10913 insn = (insn & 0xff00) | (value >> 2);
10914
10915 bfd_put_16 (input_bfd, insn, hit_data);
10916
10917 return bfd_reloc_ok;
10918 }
10919
10920 case R_ARM_THM_PC12:
10921 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10922 {
10923 bfd_vma insn;
10924 bfd_signed_vma relocation;
10925
10926 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10927 | bfd_get_16 (input_bfd, hit_data + 2);
10928
10929 if (globals->use_rel)
10930 {
10931 signed_addend = insn & 0xfff;
10932 if (!(insn & (1 << 23)))
10933 signed_addend = -signed_addend;
10934 }
10935
10936 relocation = value + signed_addend;
10937 relocation -= Pa (input_section->output_section->vma
10938 + input_section->output_offset
10939 + rel->r_offset);
10940
10941 value = relocation;
10942
10943 if (value >= 0x1000)
10944 return bfd_reloc_overflow;
10945
10946 insn = (insn & 0xff7ff000) | value;
10947 if (relocation >= 0)
10948 insn |= (1 << 23);
10949
10950 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10951 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10952
10953 return bfd_reloc_ok;
10954 }
10955
10956 case R_ARM_THM_XPC22:
10957 case R_ARM_THM_CALL:
10958 case R_ARM_THM_JUMP24:
10959 /* Thumb BL (branch long instruction). */
10960 {
10961 bfd_vma relocation;
10962 bfd_vma reloc_sign;
10963 bool overflow = false;
10964 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10965 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10966 bfd_signed_vma reloc_signed_max;
10967 bfd_signed_vma reloc_signed_min;
10968 bfd_vma check;
10969 bfd_signed_vma signed_check;
10970 int bitsize;
10971 const int thumb2 = using_thumb2 (globals);
10972 const int thumb2_bl = using_thumb2_bl (globals);
10973
10974 /* A branch to an undefined weak symbol is turned into a jump to
10975 the next instruction unless a PLT entry will be created.
10976 The jump to the next instruction is optimized as a NOP.W for
10977 Thumb-2 enabled architectures. */
10978 if (h && h->root.type == bfd_link_hash_undefweak
10979 && plt_offset == (bfd_vma) -1)
10980 {
10981 if (thumb2)
10982 {
10983 bfd_put_16 (input_bfd, 0xf3af, hit_data);
10984 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
10985 }
10986 else
10987 {
10988 bfd_put_16 (input_bfd, 0xe000, hit_data);
10989 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
10990 }
10991 return bfd_reloc_ok;
10992 }
10993
10994 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
10995 with Thumb-1) involving the J1 and J2 bits. */
10996 if (globals->use_rel)
10997 {
10998 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
10999 bfd_vma upper = upper_insn & 0x3ff;
11000 bfd_vma lower = lower_insn & 0x7ff;
11001 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
11002 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
11003 bfd_vma i1 = j1 ^ s ? 0 : 1;
11004 bfd_vma i2 = j2 ^ s ? 0 : 1;
11005
11006 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
11007 /* Sign extend. */
11008 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
11009
11010 signed_addend = addend;
11011 }
11012
11013 if (r_type == R_ARM_THM_XPC22)
11014 {
11015 /* Check for Thumb to Thumb call. */
11016 /* FIXME: Should we translate the instruction into a BL
11017 instruction instead ? */
11018 if (branch_type == ST_BRANCH_TO_THUMB)
11019 _bfd_error_handler
11020 (_("%pB: warning: %s BLX instruction targets"
11021 " %s function '%s'"),
11022 input_bfd, "Thumb",
11023 "Thumb", h ? h->root.root.string : "(local)");
11024 }
11025 else
11026 {
11027 /* If it is not a call to Thumb, assume call to Arm.
11028 If it is a call relative to a section name, then it is not a
11029 function call at all, but rather a long jump. Calls through
11030 the PLT do not require stubs. */
11031 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
11032 {
11033 if (globals->use_blx && r_type == R_ARM_THM_CALL)
11034 {
11035 /* Convert BL to BLX. */
11036 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11037 }
11038 else if (( r_type != R_ARM_THM_CALL)
11039 && (r_type != R_ARM_THM_JUMP24))
11040 {
11041 if (elf32_thumb_to_arm_stub
11042 (info, sym_name, input_bfd, output_bfd, input_section,
11043 hit_data, sym_sec, rel->r_offset, signed_addend, value,
11044 error_message))
11045 return bfd_reloc_ok;
11046 else
11047 return bfd_reloc_dangerous;
11048 }
11049 }
11050 else if (branch_type == ST_BRANCH_TO_THUMB
11051 && globals->use_blx
11052 && r_type == R_ARM_THM_CALL)
11053 {
11054 /* Make sure this is a BL. */
11055 lower_insn |= 0x1800;
11056 }
11057 }
11058
11059 enum elf32_arm_stub_type stub_type = arm_stub_none;
11060 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
11061 {
11062 /* Check if a stub has to be inserted because the destination
11063 is too far. */
11064 struct elf32_arm_stub_hash_entry *stub_entry;
11065 struct elf32_arm_link_hash_entry *hash;
11066
11067 hash = (struct elf32_arm_link_hash_entry *) h;
11068
11069 stub_type = arm_type_of_stub (info, input_section, rel,
11070 st_type, &branch_type,
11071 hash, value, sym_sec,
11072 input_bfd, sym_name);
11073
11074 if (stub_type != arm_stub_none)
11075 {
11076 /* The target is out of reach or we are changing modes, so
11077 redirect the branch to the local stub for this
11078 function. */
11079 stub_entry = elf32_arm_get_stub_entry (input_section,
11080 sym_sec, h,
11081 rel, globals,
11082 stub_type);
11083 if (stub_entry != NULL)
11084 {
11085 value = (stub_entry->stub_offset
11086 + stub_entry->stub_sec->output_offset
11087 + stub_entry->stub_sec->output_section->vma);
11088
11089 if (plt_offset != (bfd_vma) -1)
11090 *unresolved_reloc_p = false;
11091 }
11092
11093 /* If this call becomes a call to Arm, force BLX. */
11094 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
11095 {
11096 if ((stub_entry
11097 && !arm_stub_is_thumb (stub_entry->stub_type))
11098 || branch_type != ST_BRANCH_TO_THUMB)
11099 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11100 }
11101 }
11102 }
11103
11104 /* Handle calls via the PLT. */
11105 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
11106 {
11107 value = (splt->output_section->vma
11108 + splt->output_offset
11109 + plt_offset);
11110
11111 if (globals->use_blx
11112 && r_type == R_ARM_THM_CALL
11113 && ! using_thumb_only (globals))
11114 {
11115 /* If the Thumb BLX instruction is available, convert
11116 the BL to a BLX instruction to call the ARM-mode
11117 PLT entry. */
11118 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11119 branch_type = ST_BRANCH_TO_ARM;
11120 }
11121 else
11122 {
11123 if (! using_thumb_only (globals))
11124 /* Target the Thumb stub before the ARM PLT entry. */
11125 value -= PLT_THUMB_STUB_SIZE;
11126 branch_type = ST_BRANCH_TO_THUMB;
11127 }
11128 *unresolved_reloc_p = false;
11129 }
11130
11131 relocation = value + signed_addend;
11132
11133 relocation -= (input_section->output_section->vma
11134 + input_section->output_offset
11135 + rel->r_offset);
11136
11137 check = relocation >> howto->rightshift;
11138
11139 /* If this is a signed value, the rightshift just dropped
11140 leading 1 bits (assuming twos complement). */
11141 if ((bfd_signed_vma) relocation >= 0)
11142 signed_check = check;
11143 else
11144 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
11145
11146 /* Calculate the permissable maximum and minimum values for
11147 this relocation according to whether we're relocating for
11148 Thumb-2 or not. */
11149 bitsize = howto->bitsize;
11150 if (!thumb2_bl)
11151 bitsize -= 2;
11152 reloc_signed_max = (1 << (bitsize - 1)) - 1;
11153 reloc_signed_min = ~reloc_signed_max;
11154
11155 /* Assumes two's complement. */
11156 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11157 overflow = true;
11158
11159 if ((lower_insn & 0x5000) == 0x4000)
11160 /* For a BLX instruction, make sure that the relocation is rounded up
11161 to a word boundary. This follows the semantics of the instruction
11162 which specifies that bit 1 of the target address will come from bit
11163 1 of the base address. */
11164 relocation = (relocation + 2) & ~ 3;
11165
11166 /* Put RELOCATION back into the insn. Assumes two's complement.
11167 We use the Thumb-2 encoding, which is safe even if dealing with
11168 a Thumb-1 instruction by virtue of our overflow check above. */
11169 reloc_sign = (signed_check < 0) ? 1 : 0;
11170 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
11171 | ((relocation >> 12) & 0x3ff)
11172 | (reloc_sign << 10);
11173 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
11174 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
11175 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
11176 | ((relocation >> 1) & 0x7ff);
11177
11178 /* Put the relocated value back in the object file: */
11179 bfd_put_16 (input_bfd, upper_insn, hit_data);
11180 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11181
11182 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11183 }
11184 break;
11185
11186 case R_ARM_THM_JUMP19:
11187 /* Thumb32 conditional branch instruction. */
11188 {
11189 bfd_vma relocation;
11190 bool overflow = false;
11191 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11192 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11193 bfd_signed_vma reloc_signed_max = 0xffffe;
11194 bfd_signed_vma reloc_signed_min = -0x100000;
11195 bfd_signed_vma signed_check;
11196 enum elf32_arm_stub_type stub_type = arm_stub_none;
11197 struct elf32_arm_stub_hash_entry *stub_entry;
11198 struct elf32_arm_link_hash_entry *hash;
11199
11200 /* Need to refetch the addend, reconstruct the top three bits,
11201 and squish the two 11 bit pieces together. */
11202 if (globals->use_rel)
11203 {
11204 bfd_vma S = (upper_insn & 0x0400) >> 10;
11205 bfd_vma upper = (upper_insn & 0x003f);
11206 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
11207 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
11208 bfd_vma lower = (lower_insn & 0x07ff);
11209
11210 upper |= J1 << 6;
11211 upper |= J2 << 7;
11212 upper |= (!S) << 8;
11213 upper -= 0x0100; /* Sign extend. */
11214
11215 addend = (upper << 12) | (lower << 1);
11216 signed_addend = addend;
11217 }
11218
11219 /* Handle calls via the PLT. */
11220 if (plt_offset != (bfd_vma) -1)
11221 {
11222 value = (splt->output_section->vma
11223 + splt->output_offset
11224 + plt_offset);
11225 /* Target the Thumb stub before the ARM PLT entry. */
11226 value -= PLT_THUMB_STUB_SIZE;
11227 *unresolved_reloc_p = false;
11228 }
11229
11230 hash = (struct elf32_arm_link_hash_entry *)h;
11231
11232 stub_type = arm_type_of_stub (info, input_section, rel,
11233 st_type, &branch_type,
11234 hash, value, sym_sec,
11235 input_bfd, sym_name);
11236 if (stub_type != arm_stub_none)
11237 {
11238 stub_entry = elf32_arm_get_stub_entry (input_section,
11239 sym_sec, h,
11240 rel, globals,
11241 stub_type);
11242 if (stub_entry != NULL)
11243 {
11244 value = (stub_entry->stub_offset
11245 + stub_entry->stub_sec->output_offset
11246 + stub_entry->stub_sec->output_section->vma);
11247 }
11248 }
11249
11250 relocation = value + signed_addend;
11251 relocation -= (input_section->output_section->vma
11252 + input_section->output_offset
11253 + rel->r_offset);
11254 signed_check = (bfd_signed_vma) relocation;
11255
11256 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11257 overflow = true;
11258
11259 /* Put RELOCATION back into the insn. */
11260 {
11261 bfd_vma S = (relocation & 0x00100000) >> 20;
11262 bfd_vma J2 = (relocation & 0x00080000) >> 19;
11263 bfd_vma J1 = (relocation & 0x00040000) >> 18;
11264 bfd_vma hi = (relocation & 0x0003f000) >> 12;
11265 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
11266
11267 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
11268 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
11269 }
11270
11271 /* Put the relocated value back in the object file: */
11272 bfd_put_16 (input_bfd, upper_insn, hit_data);
11273 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11274
11275 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11276 }
11277
11278 case R_ARM_THM_JUMP11:
11279 case R_ARM_THM_JUMP8:
11280 case R_ARM_THM_JUMP6:
11281 /* Thumb B (branch) instruction). */
11282 {
11283 bfd_signed_vma relocation;
11284 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
11285 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
11286 bfd_signed_vma signed_check;
11287
11288 /* CZB cannot jump backward. */
11289 if (r_type == R_ARM_THM_JUMP6)
11290 {
11291 reloc_signed_min = 0;
11292 if (globals->use_rel)
11293 signed_addend = ((addend & 0x200) >> 3) | ((addend & 0xf8) >> 2);
11294 }
11295
11296 relocation = value + signed_addend;
11297
11298 relocation -= (input_section->output_section->vma
11299 + input_section->output_offset
11300 + rel->r_offset);
11301
11302 relocation >>= howto->rightshift;
11303 signed_check = relocation;
11304
11305 if (r_type == R_ARM_THM_JUMP6)
11306 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
11307 else
11308 relocation &= howto->dst_mask;
11309 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
11310
11311 bfd_put_16 (input_bfd, relocation, hit_data);
11312
11313 /* Assumes two's complement. */
11314 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11315 return bfd_reloc_overflow;
11316
11317 return bfd_reloc_ok;
11318 }
11319
11320 case R_ARM_ALU_PCREL7_0:
11321 case R_ARM_ALU_PCREL15_8:
11322 case R_ARM_ALU_PCREL23_15:
11323 {
11324 bfd_vma insn;
11325 bfd_vma relocation;
11326
11327 insn = bfd_get_32 (input_bfd, hit_data);
11328 if (globals->use_rel)
11329 {
11330 /* Extract the addend. */
11331 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
11332 signed_addend = addend;
11333 }
11334 relocation = value + signed_addend;
11335
11336 relocation -= (input_section->output_section->vma
11337 + input_section->output_offset
11338 + rel->r_offset);
11339 insn = (insn & ~0xfff)
11340 | ((howto->bitpos << 7) & 0xf00)
11341 | ((relocation >> howto->bitpos) & 0xff);
11342 bfd_put_32 (input_bfd, value, hit_data);
11343 }
11344 return bfd_reloc_ok;
11345
11346 case R_ARM_GNU_VTINHERIT:
11347 case R_ARM_GNU_VTENTRY:
11348 return bfd_reloc_ok;
11349
11350 case R_ARM_GOTOFF32:
11351 /* Relocation is relative to the start of the
11352 global offset table. */
11353
11354 BFD_ASSERT (sgot != NULL);
11355 if (sgot == NULL)
11356 return bfd_reloc_notsupported;
11357
11358 /* If we are addressing a Thumb function, we need to adjust the
11359 address by one, so that attempts to call the function pointer will
11360 correctly interpret it as Thumb code. */
11361 if (branch_type == ST_BRANCH_TO_THUMB)
11362 value += 1;
11363
11364 /* Note that sgot->output_offset is not involved in this
11365 calculation. We always want the start of .got. If we
11366 define _GLOBAL_OFFSET_TABLE in a different way, as is
11367 permitted by the ABI, we might have to change this
11368 calculation. */
11369 value -= sgot->output_section->vma;
11370 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11371 contents, rel->r_offset, value,
11372 rel->r_addend);
11373
11374 case R_ARM_GOTPC:
11375 /* Use global offset table as symbol value. */
11376 BFD_ASSERT (sgot != NULL);
11377
11378 if (sgot == NULL)
11379 return bfd_reloc_notsupported;
11380
11381 *unresolved_reloc_p = false;
11382 value = sgot->output_section->vma;
11383 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11384 contents, rel->r_offset, value,
11385 rel->r_addend);
11386
11387 case R_ARM_GOT32:
11388 case R_ARM_GOT_PREL:
11389 /* Relocation is to the entry for this symbol in the
11390 global offset table. */
11391 if (sgot == NULL)
11392 return bfd_reloc_notsupported;
11393
11394 if (dynreloc_st_type == STT_GNU_IFUNC
11395 && plt_offset != (bfd_vma) -1
11396 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11397 {
11398 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11399 symbol, and the relocation resolves directly to the runtime
11400 target rather than to the .iplt entry. This means that any
11401 .got entry would be the same value as the .igot.plt entry,
11402 so there's no point creating both. */
11403 sgot = globals->root.igotplt;
11404 value = sgot->output_offset + gotplt_offset;
11405 }
11406 else if (h != NULL)
11407 {
11408 bfd_vma off;
11409
11410 off = h->got.offset;
11411 BFD_ASSERT (off != (bfd_vma) -1);
11412 if ((off & 1) != 0)
11413 {
11414 /* We have already processsed one GOT relocation against
11415 this symbol. */
11416 off &= ~1;
11417 if (globals->root.dynamic_sections_created
11418 && !SYMBOL_REFERENCES_LOCAL (info, h))
11419 *unresolved_reloc_p = false;
11420 }
11421 else
11422 {
11423 Elf_Internal_Rela outrel;
11424 int isrofixup = 0;
11425
11426 if (((h->dynindx != -1) || globals->fdpic_p)
11427 && !SYMBOL_REFERENCES_LOCAL (info, h))
11428 {
11429 /* If the symbol doesn't resolve locally in a static
11430 object, we have an undefined reference. If the
11431 symbol doesn't resolve locally in a dynamic object,
11432 it should be resolved by the dynamic linker. */
11433 if (globals->root.dynamic_sections_created)
11434 {
11435 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11436 *unresolved_reloc_p = false;
11437 }
11438 else
11439 outrel.r_info = 0;
11440 outrel.r_addend = 0;
11441 }
11442 else
11443 {
11444 if (dynreloc_st_type == STT_GNU_IFUNC)
11445 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11446 else if (bfd_link_pic (info)
11447 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
11448 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11449 else
11450 {
11451 outrel.r_info = 0;
11452 if (globals->fdpic_p)
11453 isrofixup = 1;
11454 }
11455 outrel.r_addend = dynreloc_value;
11456 }
11457
11458 /* The GOT entry is initialized to zero by default.
11459 See if we should install a different value. */
11460 if (outrel.r_addend != 0
11461 && (globals->use_rel || outrel.r_info == 0))
11462 {
11463 bfd_put_32 (output_bfd, outrel.r_addend,
11464 sgot->contents + off);
11465 outrel.r_addend = 0;
11466 }
11467
11468 if (isrofixup)
11469 arm_elf_add_rofixup (output_bfd,
11470 elf32_arm_hash_table (info)->srofixup,
11471 sgot->output_section->vma
11472 + sgot->output_offset + off);
11473
11474 else if (outrel.r_info != 0)
11475 {
11476 outrel.r_offset = (sgot->output_section->vma
11477 + sgot->output_offset
11478 + off);
11479 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11480 }
11481
11482 h->got.offset |= 1;
11483 }
11484 value = sgot->output_offset + off;
11485 }
11486 else
11487 {
11488 bfd_vma off;
11489
11490 BFD_ASSERT (local_got_offsets != NULL
11491 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11492
11493 off = local_got_offsets[r_symndx];
11494
11495 /* The offset must always be a multiple of 4. We use the
11496 least significant bit to record whether we have already
11497 generated the necessary reloc. */
11498 if ((off & 1) != 0)
11499 off &= ~1;
11500 else
11501 {
11502 Elf_Internal_Rela outrel;
11503 int isrofixup = 0;
11504
11505 if (dynreloc_st_type == STT_GNU_IFUNC)
11506 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11507 else if (bfd_link_pic (info))
11508 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11509 else
11510 {
11511 outrel.r_info = 0;
11512 if (globals->fdpic_p)
11513 isrofixup = 1;
11514 }
11515
11516 /* The GOT entry is initialized to zero by default.
11517 See if we should install a different value. */
11518 if (globals->use_rel || outrel.r_info == 0)
11519 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11520
11521 if (isrofixup)
11522 arm_elf_add_rofixup (output_bfd,
11523 globals->srofixup,
11524 sgot->output_section->vma
11525 + sgot->output_offset + off);
11526
11527 else if (outrel.r_info != 0)
11528 {
11529 outrel.r_addend = addend + dynreloc_value;
11530 outrel.r_offset = (sgot->output_section->vma
11531 + sgot->output_offset
11532 + off);
11533 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11534 }
11535
11536 local_got_offsets[r_symndx] |= 1;
11537 }
11538
11539 value = sgot->output_offset + off;
11540 }
11541 if (r_type != R_ARM_GOT32)
11542 value += sgot->output_section->vma;
11543
11544 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11545 contents, rel->r_offset, value,
11546 rel->r_addend);
11547
11548 case R_ARM_TLS_LDO32:
11549 value = value - dtpoff_base (info);
11550
11551 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11552 contents, rel->r_offset, value,
11553 rel->r_addend);
11554
11555 case R_ARM_TLS_LDM32:
11556 case R_ARM_TLS_LDM32_FDPIC:
11557 {
11558 bfd_vma off;
11559
11560 if (sgot == NULL)
11561 abort ();
11562
11563 off = globals->tls_ldm_got.offset;
11564
11565 if ((off & 1) != 0)
11566 off &= ~1;
11567 else
11568 {
11569 /* If we don't know the module number, create a relocation
11570 for it. */
11571 if (bfd_link_dll (info))
11572 {
11573 Elf_Internal_Rela outrel;
11574
11575 if (srelgot == NULL)
11576 abort ();
11577
11578 outrel.r_addend = 0;
11579 outrel.r_offset = (sgot->output_section->vma
11580 + sgot->output_offset + off);
11581 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11582
11583 if (globals->use_rel)
11584 bfd_put_32 (output_bfd, outrel.r_addend,
11585 sgot->contents + off);
11586
11587 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11588 }
11589 else
11590 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11591
11592 globals->tls_ldm_got.offset |= 1;
11593 }
11594
11595 if (r_type == R_ARM_TLS_LDM32_FDPIC)
11596 {
11597 bfd_put_32 (output_bfd,
11598 globals->root.sgot->output_offset + off,
11599 contents + rel->r_offset);
11600
11601 return bfd_reloc_ok;
11602 }
11603 else
11604 {
11605 value = sgot->output_section->vma + sgot->output_offset + off
11606 - (input_section->output_section->vma
11607 + input_section->output_offset + rel->r_offset);
11608
11609 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11610 contents, rel->r_offset, value,
11611 rel->r_addend);
11612 }
11613 }
11614
11615 case R_ARM_TLS_CALL:
11616 case R_ARM_THM_TLS_CALL:
11617 case R_ARM_TLS_GD32:
11618 case R_ARM_TLS_GD32_FDPIC:
11619 case R_ARM_TLS_IE32:
11620 case R_ARM_TLS_IE32_FDPIC:
11621 case R_ARM_TLS_GOTDESC:
11622 case R_ARM_TLS_DESCSEQ:
11623 case R_ARM_THM_TLS_DESCSEQ:
11624 {
11625 bfd_vma off, offplt;
11626 int indx = 0;
11627 char tls_type;
11628
11629 BFD_ASSERT (sgot != NULL);
11630
11631 if (h != NULL)
11632 {
11633 bool dyn;
11634 dyn = globals->root.dynamic_sections_created;
11635 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11636 bfd_link_pic (info),
11637 h)
11638 && (!bfd_link_pic (info)
11639 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11640 {
11641 *unresolved_reloc_p = false;
11642 indx = h->dynindx;
11643 }
11644 off = h->got.offset;
11645 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11646 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11647 }
11648 else
11649 {
11650 BFD_ASSERT (local_got_offsets != NULL);
11651
11652 off = local_got_offsets[r_symndx];
11653 offplt = local_tlsdesc_gotents[r_symndx];
11654 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11655 }
11656
11657 /* Linker relaxations happens from one of the
11658 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11659 if (ELF32_R_TYPE (rel->r_info) != r_type)
11660 tls_type = GOT_TLS_IE;
11661
11662 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11663
11664 if ((off & 1) != 0)
11665 off &= ~1;
11666 else
11667 {
11668 bool need_relocs = false;
11669 Elf_Internal_Rela outrel;
11670 int cur_off = off;
11671
11672 /* The GOT entries have not been initialized yet. Do it
11673 now, and emit any relocations. If both an IE GOT and a
11674 GD GOT are necessary, we emit the GD first. */
11675
11676 if ((bfd_link_dll (info) || indx != 0)
11677 && (h == NULL
11678 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11679 && !resolved_to_zero)
11680 || h->root.type != bfd_link_hash_undefweak))
11681 {
11682 need_relocs = true;
11683 BFD_ASSERT (srelgot != NULL);
11684 }
11685
11686 if (tls_type & GOT_TLS_GDESC)
11687 {
11688 bfd_byte *loc;
11689
11690 /* We should have relaxed, unless this is an undefined
11691 weak symbol. */
11692 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11693 || bfd_link_dll (info));
11694 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11695 <= globals->root.sgotplt->size);
11696
11697 outrel.r_addend = 0;
11698 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11699 + globals->root.sgotplt->output_offset
11700 + offplt
11701 + globals->sgotplt_jump_table_size);
11702
11703 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11704 sreloc = globals->root.srelplt;
11705 loc = sreloc->contents;
11706 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11707 BFD_ASSERT (loc + RELOC_SIZE (globals)
11708 <= sreloc->contents + sreloc->size);
11709
11710 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11711
11712 /* For globals, the first word in the relocation gets
11713 the relocation index and the top bit set, or zero,
11714 if we're binding now. For locals, it gets the
11715 symbol's offset in the tls section. */
11716 bfd_put_32 (output_bfd,
11717 !h ? value - elf_hash_table (info)->tls_sec->vma
11718 : info->flags & DF_BIND_NOW ? 0
11719 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11720 globals->root.sgotplt->contents + offplt
11721 + globals->sgotplt_jump_table_size);
11722
11723 /* Second word in the relocation is always zero. */
11724 bfd_put_32 (output_bfd, 0,
11725 globals->root.sgotplt->contents + offplt
11726 + globals->sgotplt_jump_table_size + 4);
11727 }
11728 if (tls_type & GOT_TLS_GD)
11729 {
11730 if (need_relocs)
11731 {
11732 outrel.r_addend = 0;
11733 outrel.r_offset = (sgot->output_section->vma
11734 + sgot->output_offset
11735 + cur_off);
11736 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11737
11738 if (globals->use_rel)
11739 bfd_put_32 (output_bfd, outrel.r_addend,
11740 sgot->contents + cur_off);
11741
11742 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11743
11744 if (indx == 0)
11745 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11746 sgot->contents + cur_off + 4);
11747 else
11748 {
11749 outrel.r_addend = 0;
11750 outrel.r_info = ELF32_R_INFO (indx,
11751 R_ARM_TLS_DTPOFF32);
11752 outrel.r_offset += 4;
11753
11754 if (globals->use_rel)
11755 bfd_put_32 (output_bfd, outrel.r_addend,
11756 sgot->contents + cur_off + 4);
11757
11758 elf32_arm_add_dynreloc (output_bfd, info,
11759 srelgot, &outrel);
11760 }
11761 }
11762 else
11763 {
11764 /* If we are not emitting relocations for a
11765 general dynamic reference, then we must be in a
11766 static link or an executable link with the
11767 symbol binding locally. Mark it as belonging
11768 to module 1, the executable. */
11769 bfd_put_32 (output_bfd, 1,
11770 sgot->contents + cur_off);
11771 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11772 sgot->contents + cur_off + 4);
11773 }
11774
11775 cur_off += 8;
11776 }
11777
11778 if (tls_type & GOT_TLS_IE)
11779 {
11780 if (need_relocs)
11781 {
11782 if (indx == 0)
11783 outrel.r_addend = value - dtpoff_base (info);
11784 else
11785 outrel.r_addend = 0;
11786 outrel.r_offset = (sgot->output_section->vma
11787 + sgot->output_offset
11788 + cur_off);
11789 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11790
11791 if (globals->use_rel)
11792 bfd_put_32 (output_bfd, outrel.r_addend,
11793 sgot->contents + cur_off);
11794
11795 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11796 }
11797 else
11798 bfd_put_32 (output_bfd, tpoff (info, value),
11799 sgot->contents + cur_off);
11800 cur_off += 4;
11801 }
11802
11803 if (h != NULL)
11804 h->got.offset |= 1;
11805 else
11806 local_got_offsets[r_symndx] |= 1;
11807 }
11808
11809 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32 && r_type != R_ARM_TLS_GD32_FDPIC)
11810 off += 8;
11811 else if (tls_type & GOT_TLS_GDESC)
11812 off = offplt;
11813
11814 if (ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
11815 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL)
11816 {
11817 bfd_signed_vma offset;
11818 /* TLS stubs are arm mode. The original symbol is a
11819 data object, so branch_type is bogus. */
11820 branch_type = ST_BRANCH_TO_ARM;
11821 enum elf32_arm_stub_type stub_type
11822 = arm_type_of_stub (info, input_section, rel,
11823 st_type, &branch_type,
11824 (struct elf32_arm_link_hash_entry *)h,
11825 globals->tls_trampoline, globals->root.splt,
11826 input_bfd, sym_name);
11827
11828 if (stub_type != arm_stub_none)
11829 {
11830 struct elf32_arm_stub_hash_entry *stub_entry
11831 = elf32_arm_get_stub_entry
11832 (input_section, globals->root.splt, 0, rel,
11833 globals, stub_type);
11834 offset = (stub_entry->stub_offset
11835 + stub_entry->stub_sec->output_offset
11836 + stub_entry->stub_sec->output_section->vma);
11837 }
11838 else
11839 offset = (globals->root.splt->output_section->vma
11840 + globals->root.splt->output_offset
11841 + globals->tls_trampoline);
11842
11843 if (ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL)
11844 {
11845 unsigned long inst;
11846
11847 offset -= (input_section->output_section->vma
11848 + input_section->output_offset
11849 + rel->r_offset + 8);
11850
11851 inst = offset >> 2;
11852 inst &= 0x00ffffff;
11853 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11854 }
11855 else
11856 {
11857 /* Thumb blx encodes the offset in a complicated
11858 fashion. */
11859 unsigned upper_insn, lower_insn;
11860 unsigned neg;
11861
11862 offset -= (input_section->output_section->vma
11863 + input_section->output_offset
11864 + rel->r_offset + 4);
11865
11866 if (stub_type != arm_stub_none
11867 && arm_stub_is_thumb (stub_type))
11868 {
11869 lower_insn = 0xd000;
11870 }
11871 else
11872 {
11873 lower_insn = 0xc000;
11874 /* Round up the offset to a word boundary. */
11875 offset = (offset + 2) & ~2;
11876 }
11877
11878 neg = offset < 0;
11879 upper_insn = (0xf000
11880 | ((offset >> 12) & 0x3ff)
11881 | (neg << 10));
11882 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11883 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11884 | ((offset >> 1) & 0x7ff);
11885 bfd_put_16 (input_bfd, upper_insn, hit_data);
11886 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11887 return bfd_reloc_ok;
11888 }
11889 }
11890 /* These relocations needs special care, as besides the fact
11891 they point somewhere in .gotplt, the addend must be
11892 adjusted accordingly depending on the type of instruction
11893 we refer to. */
11894 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11895 {
11896 unsigned long data, insn;
11897 unsigned thumb;
11898
11899 data = bfd_get_signed_32 (input_bfd, hit_data);
11900 thumb = data & 1;
11901 data &= ~1ul;
11902
11903 if (thumb)
11904 {
11905 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11906 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11907 insn = (insn << 16)
11908 | bfd_get_16 (input_bfd,
11909 contents + rel->r_offset - data + 2);
11910 if ((insn & 0xf800c000) == 0xf000c000)
11911 /* bl/blx */
11912 value = -6;
11913 else if ((insn & 0xffffff00) == 0x4400)
11914 /* add */
11915 value = -5;
11916 else
11917 {
11918 _bfd_error_handler
11919 /* xgettext:c-format */
11920 (_("%pB(%pA+%#" PRIx64 "): "
11921 "unexpected %s instruction '%#lx' "
11922 "referenced by TLS_GOTDESC"),
11923 input_bfd, input_section, (uint64_t) rel->r_offset,
11924 "Thumb", insn);
11925 return bfd_reloc_notsupported;
11926 }
11927 }
11928 else
11929 {
11930 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11931
11932 switch (insn >> 24)
11933 {
11934 case 0xeb: /* bl */
11935 case 0xfa: /* blx */
11936 value = -4;
11937 break;
11938
11939 case 0xe0: /* add */
11940 value = -8;
11941 break;
11942
11943 default:
11944 _bfd_error_handler
11945 /* xgettext:c-format */
11946 (_("%pB(%pA+%#" PRIx64 "): "
11947 "unexpected %s instruction '%#lx' "
11948 "referenced by TLS_GOTDESC"),
11949 input_bfd, input_section, (uint64_t) rel->r_offset,
11950 "ARM", insn);
11951 return bfd_reloc_notsupported;
11952 }
11953 }
11954
11955 value += ((globals->root.sgotplt->output_section->vma
11956 + globals->root.sgotplt->output_offset + off)
11957 - (input_section->output_section->vma
11958 + input_section->output_offset
11959 + rel->r_offset)
11960 + globals->sgotplt_jump_table_size);
11961 }
11962 else
11963 value = ((globals->root.sgot->output_section->vma
11964 + globals->root.sgot->output_offset + off)
11965 - (input_section->output_section->vma
11966 + input_section->output_offset + rel->r_offset));
11967
11968 if (globals->fdpic_p && (r_type == R_ARM_TLS_GD32_FDPIC ||
11969 r_type == R_ARM_TLS_IE32_FDPIC))
11970 {
11971 /* For FDPIC relocations, resolve to the offset of the GOT
11972 entry from the start of GOT. */
11973 bfd_put_32 (output_bfd,
11974 globals->root.sgot->output_offset + off,
11975 contents + rel->r_offset);
11976
11977 return bfd_reloc_ok;
11978 }
11979 else
11980 {
11981 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11982 contents, rel->r_offset, value,
11983 rel->r_addend);
11984 }
11985 }
11986
11987 case R_ARM_TLS_LE32:
11988 if (bfd_link_dll (info))
11989 {
11990 _bfd_error_handler
11991 /* xgettext:c-format */
11992 (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted "
11993 "in shared object"),
11994 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name);
11995 return bfd_reloc_notsupported;
11996 }
11997 else
11998 value = tpoff (info, value);
11999
12000 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12001 contents, rel->r_offset, value,
12002 rel->r_addend);
12003
12004 case R_ARM_V4BX:
12005 if (globals->fix_v4bx)
12006 {
12007 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12008
12009 /* Ensure that we have a BX instruction. */
12010 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
12011
12012 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
12013 {
12014 /* Branch to veneer. */
12015 bfd_vma glue_addr;
12016 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
12017 glue_addr -= input_section->output_section->vma
12018 + input_section->output_offset
12019 + rel->r_offset + 8;
12020 insn = (insn & 0xf0000000) | 0x0a000000
12021 | ((glue_addr >> 2) & 0x00ffffff);
12022 }
12023 else
12024 {
12025 /* Preserve Rm (lowest four bits) and the condition code
12026 (highest four bits). Other bits encode MOV PC,Rm. */
12027 insn = (insn & 0xf000000f) | 0x01a0f000;
12028 }
12029
12030 bfd_put_32 (input_bfd, insn, hit_data);
12031 }
12032 return bfd_reloc_ok;
12033
12034 case R_ARM_MOVW_ABS_NC:
12035 case R_ARM_MOVT_ABS:
12036 case R_ARM_MOVW_PREL_NC:
12037 case R_ARM_MOVT_PREL:
12038 /* Until we properly support segment-base-relative addressing then
12039 we assume the segment base to be zero, as for the group relocations.
12040 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
12041 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
12042 case R_ARM_MOVW_BREL_NC:
12043 case R_ARM_MOVW_BREL:
12044 case R_ARM_MOVT_BREL:
12045 {
12046 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12047
12048 if (globals->use_rel)
12049 {
12050 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
12051 signed_addend = (addend ^ 0x8000) - 0x8000;
12052 }
12053
12054 value += signed_addend;
12055
12056 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
12057 value -= (input_section->output_section->vma
12058 + input_section->output_offset + rel->r_offset);
12059
12060 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
12061 return bfd_reloc_overflow;
12062
12063 if (branch_type == ST_BRANCH_TO_THUMB)
12064 value |= 1;
12065
12066 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
12067 || r_type == R_ARM_MOVT_BREL)
12068 value >>= 16;
12069
12070 insn &= 0xfff0f000;
12071 insn |= value & 0xfff;
12072 insn |= (value & 0xf000) << 4;
12073 bfd_put_32 (input_bfd, insn, hit_data);
12074 }
12075 return bfd_reloc_ok;
12076
12077 case R_ARM_THM_MOVW_ABS_NC:
12078 case R_ARM_THM_MOVT_ABS:
12079 case R_ARM_THM_MOVW_PREL_NC:
12080 case R_ARM_THM_MOVT_PREL:
12081 /* Until we properly support segment-base-relative addressing then
12082 we assume the segment base to be zero, as for the above relocations.
12083 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
12084 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
12085 as R_ARM_THM_MOVT_ABS. */
12086 case R_ARM_THM_MOVW_BREL_NC:
12087 case R_ARM_THM_MOVW_BREL:
12088 case R_ARM_THM_MOVT_BREL:
12089 {
12090 bfd_vma insn;
12091
12092 insn = bfd_get_16 (input_bfd, hit_data) << 16;
12093 insn |= bfd_get_16 (input_bfd, hit_data + 2);
12094
12095 if (globals->use_rel)
12096 {
12097 addend = ((insn >> 4) & 0xf000)
12098 | ((insn >> 15) & 0x0800)
12099 | ((insn >> 4) & 0x0700)
12100 | (insn & 0x00ff);
12101 signed_addend = (addend ^ 0x8000) - 0x8000;
12102 }
12103
12104 value += signed_addend;
12105
12106 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
12107 value -= (input_section->output_section->vma
12108 + input_section->output_offset + rel->r_offset);
12109
12110 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
12111 return bfd_reloc_overflow;
12112
12113 if (branch_type == ST_BRANCH_TO_THUMB)
12114 value |= 1;
12115
12116 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
12117 || r_type == R_ARM_THM_MOVT_BREL)
12118 value >>= 16;
12119
12120 insn &= 0xfbf08f00;
12121 insn |= (value & 0xf000) << 4;
12122 insn |= (value & 0x0800) << 15;
12123 insn |= (value & 0x0700) << 4;
12124 insn |= (value & 0x00ff);
12125
12126 bfd_put_16 (input_bfd, insn >> 16, hit_data);
12127 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
12128 }
12129 return bfd_reloc_ok;
12130
12131 case R_ARM_ALU_PC_G0_NC:
12132 case R_ARM_ALU_PC_G1_NC:
12133 case R_ARM_ALU_PC_G0:
12134 case R_ARM_ALU_PC_G1:
12135 case R_ARM_ALU_PC_G2:
12136 case R_ARM_ALU_SB_G0_NC:
12137 case R_ARM_ALU_SB_G1_NC:
12138 case R_ARM_ALU_SB_G0:
12139 case R_ARM_ALU_SB_G1:
12140 case R_ARM_ALU_SB_G2:
12141 {
12142 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12143 bfd_vma pc = input_section->output_section->vma
12144 + input_section->output_offset + rel->r_offset;
12145 /* sb is the origin of the *segment* containing the symbol. */
12146 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12147 bfd_vma residual;
12148 bfd_vma g_n;
12149 bfd_signed_vma signed_value;
12150 int group = 0;
12151
12152 /* Determine which group of bits to select. */
12153 switch (r_type)
12154 {
12155 case R_ARM_ALU_PC_G0_NC:
12156 case R_ARM_ALU_PC_G0:
12157 case R_ARM_ALU_SB_G0_NC:
12158 case R_ARM_ALU_SB_G0:
12159 group = 0;
12160 break;
12161
12162 case R_ARM_ALU_PC_G1_NC:
12163 case R_ARM_ALU_PC_G1:
12164 case R_ARM_ALU_SB_G1_NC:
12165 case R_ARM_ALU_SB_G1:
12166 group = 1;
12167 break;
12168
12169 case R_ARM_ALU_PC_G2:
12170 case R_ARM_ALU_SB_G2:
12171 group = 2;
12172 break;
12173
12174 default:
12175 abort ();
12176 }
12177
12178 /* If REL, extract the addend from the insn. If RELA, it will
12179 have already been fetched for us. */
12180 if (globals->use_rel)
12181 {
12182 int negative;
12183 bfd_vma constant = insn & 0xff;
12184 bfd_vma rotation = (insn & 0xf00) >> 8;
12185
12186 if (rotation == 0)
12187 signed_addend = constant;
12188 else
12189 {
12190 /* Compensate for the fact that in the instruction, the
12191 rotation is stored in multiples of 2 bits. */
12192 rotation *= 2;
12193
12194 /* Rotate "constant" right by "rotation" bits. */
12195 signed_addend = (constant >> rotation) |
12196 (constant << (8 * sizeof (bfd_vma) - rotation));
12197 }
12198
12199 /* Determine if the instruction is an ADD or a SUB.
12200 (For REL, this determines the sign of the addend.) */
12201 negative = identify_add_or_sub (insn);
12202 if (negative == 0)
12203 {
12204 _bfd_error_handler
12205 /* xgettext:c-format */
12206 (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions "
12207 "are allowed for ALU group relocations"),
12208 input_bfd, input_section, (uint64_t) rel->r_offset);
12209 return bfd_reloc_overflow;
12210 }
12211
12212 signed_addend *= negative;
12213 }
12214
12215 /* Compute the value (X) to go in the place. */
12216 if (r_type == R_ARM_ALU_PC_G0_NC
12217 || r_type == R_ARM_ALU_PC_G1_NC
12218 || r_type == R_ARM_ALU_PC_G0
12219 || r_type == R_ARM_ALU_PC_G1
12220 || r_type == R_ARM_ALU_PC_G2)
12221 /* PC relative. */
12222 signed_value = value - pc + signed_addend;
12223 else
12224 /* Section base relative. */
12225 signed_value = value - sb + signed_addend;
12226
12227 /* If the target symbol is a Thumb function, then set the
12228 Thumb bit in the address. */
12229 if (branch_type == ST_BRANCH_TO_THUMB)
12230 signed_value |= 1;
12231
12232 /* Calculate the value of the relevant G_n, in encoded
12233 constant-with-rotation format. */
12234 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12235 group, &residual);
12236
12237 /* Check for overflow if required. */
12238 if ((r_type == R_ARM_ALU_PC_G0
12239 || r_type == R_ARM_ALU_PC_G1
12240 || r_type == R_ARM_ALU_PC_G2
12241 || r_type == R_ARM_ALU_SB_G0
12242 || r_type == R_ARM_ALU_SB_G1
12243 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
12244 {
12245 _bfd_error_handler
12246 /* xgettext:c-format */
12247 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12248 "splitting %#" PRIx64 " for group relocation %s"),
12249 input_bfd, input_section, (uint64_t) rel->r_offset,
12250 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12251 howto->name);
12252 return bfd_reloc_overflow;
12253 }
12254
12255 /* Mask out the value and the ADD/SUB part of the opcode; take care
12256 not to destroy the S bit. */
12257 insn &= 0xff1ff000;
12258
12259 /* Set the opcode according to whether the value to go in the
12260 place is negative. */
12261 if (signed_value < 0)
12262 insn |= 1 << 22;
12263 else
12264 insn |= 1 << 23;
12265
12266 /* Encode the offset. */
12267 insn |= g_n;
12268
12269 bfd_put_32 (input_bfd, insn, hit_data);
12270 }
12271 return bfd_reloc_ok;
12272
12273 case R_ARM_LDR_PC_G0:
12274 case R_ARM_LDR_PC_G1:
12275 case R_ARM_LDR_PC_G2:
12276 case R_ARM_LDR_SB_G0:
12277 case R_ARM_LDR_SB_G1:
12278 case R_ARM_LDR_SB_G2:
12279 {
12280 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12281 bfd_vma pc = input_section->output_section->vma
12282 + input_section->output_offset + rel->r_offset;
12283 /* sb is the origin of the *segment* containing the symbol. */
12284 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12285 bfd_vma residual;
12286 bfd_signed_vma signed_value;
12287 int group = 0;
12288
12289 /* Determine which groups of bits to calculate. */
12290 switch (r_type)
12291 {
12292 case R_ARM_LDR_PC_G0:
12293 case R_ARM_LDR_SB_G0:
12294 group = 0;
12295 break;
12296
12297 case R_ARM_LDR_PC_G1:
12298 case R_ARM_LDR_SB_G1:
12299 group = 1;
12300 break;
12301
12302 case R_ARM_LDR_PC_G2:
12303 case R_ARM_LDR_SB_G2:
12304 group = 2;
12305 break;
12306
12307 default:
12308 abort ();
12309 }
12310
12311 /* If REL, extract the addend from the insn. If RELA, it will
12312 have already been fetched for us. */
12313 if (globals->use_rel)
12314 {
12315 int negative = (insn & (1 << 23)) ? 1 : -1;
12316 signed_addend = negative * (insn & 0xfff);
12317 }
12318
12319 /* Compute the value (X) to go in the place. */
12320 if (r_type == R_ARM_LDR_PC_G0
12321 || r_type == R_ARM_LDR_PC_G1
12322 || r_type == R_ARM_LDR_PC_G2)
12323 /* PC relative. */
12324 signed_value = value - pc + signed_addend;
12325 else
12326 /* Section base relative. */
12327 signed_value = value - sb + signed_addend;
12328
12329 /* Calculate the value of the relevant G_{n-1} to obtain
12330 the residual at that stage. */
12331 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12332 group - 1, &residual);
12333
12334 /* Check for overflow. */
12335 if (residual >= 0x1000)
12336 {
12337 _bfd_error_handler
12338 /* xgettext:c-format */
12339 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12340 "splitting %#" PRIx64 " for group relocation %s"),
12341 input_bfd, input_section, (uint64_t) rel->r_offset,
12342 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12343 howto->name);
12344 return bfd_reloc_overflow;
12345 }
12346
12347 /* Mask out the value and U bit. */
12348 insn &= 0xff7ff000;
12349
12350 /* Set the U bit if the value to go in the place is non-negative. */
12351 if (signed_value >= 0)
12352 insn |= 1 << 23;
12353
12354 /* Encode the offset. */
12355 insn |= residual;
12356
12357 bfd_put_32 (input_bfd, insn, hit_data);
12358 }
12359 return bfd_reloc_ok;
12360
12361 case R_ARM_LDRS_PC_G0:
12362 case R_ARM_LDRS_PC_G1:
12363 case R_ARM_LDRS_PC_G2:
12364 case R_ARM_LDRS_SB_G0:
12365 case R_ARM_LDRS_SB_G1:
12366 case R_ARM_LDRS_SB_G2:
12367 {
12368 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12369 bfd_vma pc = input_section->output_section->vma
12370 + input_section->output_offset + rel->r_offset;
12371 /* sb is the origin of the *segment* containing the symbol. */
12372 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12373 bfd_vma residual;
12374 bfd_signed_vma signed_value;
12375 int group = 0;
12376
12377 /* Determine which groups of bits to calculate. */
12378 switch (r_type)
12379 {
12380 case R_ARM_LDRS_PC_G0:
12381 case R_ARM_LDRS_SB_G0:
12382 group = 0;
12383 break;
12384
12385 case R_ARM_LDRS_PC_G1:
12386 case R_ARM_LDRS_SB_G1:
12387 group = 1;
12388 break;
12389
12390 case R_ARM_LDRS_PC_G2:
12391 case R_ARM_LDRS_SB_G2:
12392 group = 2;
12393 break;
12394
12395 default:
12396 abort ();
12397 }
12398
12399 /* If REL, extract the addend from the insn. If RELA, it will
12400 have already been fetched for us. */
12401 if (globals->use_rel)
12402 {
12403 int negative = (insn & (1 << 23)) ? 1 : -1;
12404 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
12405 }
12406
12407 /* Compute the value (X) to go in the place. */
12408 if (r_type == R_ARM_LDRS_PC_G0
12409 || r_type == R_ARM_LDRS_PC_G1
12410 || r_type == R_ARM_LDRS_PC_G2)
12411 /* PC relative. */
12412 signed_value = value - pc + signed_addend;
12413 else
12414 /* Section base relative. */
12415 signed_value = value - sb + signed_addend;
12416
12417 /* Calculate the value of the relevant G_{n-1} to obtain
12418 the residual at that stage. */
12419 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12420 group - 1, &residual);
12421
12422 /* Check for overflow. */
12423 if (residual >= 0x100)
12424 {
12425 _bfd_error_handler
12426 /* xgettext:c-format */
12427 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12428 "splitting %#" PRIx64 " for group relocation %s"),
12429 input_bfd, input_section, (uint64_t) rel->r_offset,
12430 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12431 howto->name);
12432 return bfd_reloc_overflow;
12433 }
12434
12435 /* Mask out the value and U bit. */
12436 insn &= 0xff7ff0f0;
12437
12438 /* Set the U bit if the value to go in the place is non-negative. */
12439 if (signed_value >= 0)
12440 insn |= 1 << 23;
12441
12442 /* Encode the offset. */
12443 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12444
12445 bfd_put_32 (input_bfd, insn, hit_data);
12446 }
12447 return bfd_reloc_ok;
12448
12449 case R_ARM_LDC_PC_G0:
12450 case R_ARM_LDC_PC_G1:
12451 case R_ARM_LDC_PC_G2:
12452 case R_ARM_LDC_SB_G0:
12453 case R_ARM_LDC_SB_G1:
12454 case R_ARM_LDC_SB_G2:
12455 {
12456 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12457 bfd_vma pc = input_section->output_section->vma
12458 + input_section->output_offset + rel->r_offset;
12459 /* sb is the origin of the *segment* containing the symbol. */
12460 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12461 bfd_vma residual;
12462 bfd_signed_vma signed_value;
12463 int group = 0;
12464
12465 /* Determine which groups of bits to calculate. */
12466 switch (r_type)
12467 {
12468 case R_ARM_LDC_PC_G0:
12469 case R_ARM_LDC_SB_G0:
12470 group = 0;
12471 break;
12472
12473 case R_ARM_LDC_PC_G1:
12474 case R_ARM_LDC_SB_G1:
12475 group = 1;
12476 break;
12477
12478 case R_ARM_LDC_PC_G2:
12479 case R_ARM_LDC_SB_G2:
12480 group = 2;
12481 break;
12482
12483 default:
12484 abort ();
12485 }
12486
12487 /* If REL, extract the addend from the insn. If RELA, it will
12488 have already been fetched for us. */
12489 if (globals->use_rel)
12490 {
12491 int negative = (insn & (1 << 23)) ? 1 : -1;
12492 signed_addend = negative * ((insn & 0xff) << 2);
12493 }
12494
12495 /* Compute the value (X) to go in the place. */
12496 if (r_type == R_ARM_LDC_PC_G0
12497 || r_type == R_ARM_LDC_PC_G1
12498 || r_type == R_ARM_LDC_PC_G2)
12499 /* PC relative. */
12500 signed_value = value - pc + signed_addend;
12501 else
12502 /* Section base relative. */
12503 signed_value = value - sb + signed_addend;
12504
12505 /* Calculate the value of the relevant G_{n-1} to obtain
12506 the residual at that stage. */
12507 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12508 group - 1, &residual);
12509
12510 /* Check for overflow. (The absolute value to go in the place must be
12511 divisible by four and, after having been divided by four, must
12512 fit in eight bits.) */
12513 if ((residual & 0x3) != 0 || residual >= 0x400)
12514 {
12515 _bfd_error_handler
12516 /* xgettext:c-format */
12517 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12518 "splitting %#" PRIx64 " for group relocation %s"),
12519 input_bfd, input_section, (uint64_t) rel->r_offset,
12520 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12521 howto->name);
12522 return bfd_reloc_overflow;
12523 }
12524
12525 /* Mask out the value and U bit. */
12526 insn &= 0xff7fff00;
12527
12528 /* Set the U bit if the value to go in the place is non-negative. */
12529 if (signed_value >= 0)
12530 insn |= 1 << 23;
12531
12532 /* Encode the offset. */
12533 insn |= residual >> 2;
12534
12535 bfd_put_32 (input_bfd, insn, hit_data);
12536 }
12537 return bfd_reloc_ok;
12538
12539 case R_ARM_THM_ALU_ABS_G0_NC:
12540 case R_ARM_THM_ALU_ABS_G1_NC:
12541 case R_ARM_THM_ALU_ABS_G2_NC:
12542 case R_ARM_THM_ALU_ABS_G3_NC:
12543 {
12544 const int shift_array[4] = {0, 8, 16, 24};
12545 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12546 bfd_vma addr = value;
12547 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12548
12549 /* Compute address. */
12550 if (globals->use_rel)
12551 signed_addend = insn & 0xff;
12552 addr += signed_addend;
12553 if (branch_type == ST_BRANCH_TO_THUMB)
12554 addr |= 1;
12555 /* Clean imm8 insn. */
12556 insn &= 0xff00;
12557 /* And update with correct part of address. */
12558 insn |= (addr >> shift) & 0xff;
12559 /* Update insn. */
12560 bfd_put_16 (input_bfd, insn, hit_data);
12561 }
12562
12563 *unresolved_reloc_p = false;
12564 return bfd_reloc_ok;
12565
12566 case R_ARM_GOTOFFFUNCDESC:
12567 {
12568 if (h == NULL)
12569 {
12570 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts (input_bfd);
12571 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12572 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12573 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12574 bfd_vma seg = -1;
12575
12576 if (bfd_link_pic (info) && dynindx == 0)
12577 {
12578 * error_message = _("no dynamic index information available");
12579 return bfd_reloc_dangerous;
12580 }
12581
12582 /* Resolve relocation. */
12583 bfd_put_32 (output_bfd, (offset + sgot->output_offset)
12584 , contents + rel->r_offset);
12585 /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12586 not done yet. */
12587 arm_elf_fill_funcdesc (output_bfd, info,
12588 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12589 dynindx, offset, addr, dynreloc_value, seg);
12590 }
12591 else
12592 {
12593 int dynindx;
12594 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12595 bfd_vma addr;
12596 bfd_vma seg = -1;
12597
12598 /* For static binaries, sym_sec can be null. */
12599 if (sym_sec)
12600 {
12601 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12602 addr = dynreloc_value - sym_sec->output_section->vma;
12603 }
12604 else
12605 {
12606 dynindx = 0;
12607 addr = 0;
12608 }
12609
12610 if (bfd_link_pic (info) && dynindx == 0)
12611 {
12612 * error_message = _("no dynamic index information available");
12613 return bfd_reloc_dangerous;
12614 }
12615
12616 /* This case cannot occur since funcdesc is allocated by
12617 the dynamic loader so we cannot resolve the relocation. */
12618 if (h->dynindx != -1)
12619 {
12620 * error_message = _("invalid dynamic index");
12621 return bfd_reloc_dangerous;
12622 }
12623
12624 /* Resolve relocation. */
12625 bfd_put_32 (output_bfd, (offset + sgot->output_offset),
12626 contents + rel->r_offset);
12627 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12628 arm_elf_fill_funcdesc (output_bfd, info,
12629 &eh->fdpic_cnts.funcdesc_offset,
12630 dynindx, offset, addr, dynreloc_value, seg);
12631 }
12632 }
12633 *unresolved_reloc_p = false;
12634 return bfd_reloc_ok;
12635
12636 case R_ARM_GOTFUNCDESC:
12637 {
12638 if (h != NULL)
12639 {
12640 Elf_Internal_Rela outrel;
12641
12642 /* Resolve relocation. */
12643 bfd_put_32 (output_bfd, ((eh->fdpic_cnts.gotfuncdesc_offset & ~1)
12644 + sgot->output_offset),
12645 contents + rel->r_offset);
12646 /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */
12647 if (h->dynindx == -1)
12648 {
12649 int dynindx;
12650 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12651 bfd_vma addr;
12652 bfd_vma seg = -1;
12653
12654 /* For static binaries sym_sec can be null. */
12655 if (sym_sec)
12656 {
12657 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12658 addr = dynreloc_value - sym_sec->output_section->vma;
12659 }
12660 else
12661 {
12662 dynindx = 0;
12663 addr = 0;
12664 }
12665
12666 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12667 arm_elf_fill_funcdesc (output_bfd, info,
12668 &eh->fdpic_cnts.funcdesc_offset,
12669 dynindx, offset, addr, dynreloc_value, seg);
12670 }
12671
12672 /* Add a dynamic relocation on GOT entry if not already done. */
12673 if ((eh->fdpic_cnts.gotfuncdesc_offset & 1) == 0)
12674 {
12675 if (h->dynindx == -1)
12676 {
12677 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12678 if (h->root.type == bfd_link_hash_undefweak)
12679 bfd_put_32 (output_bfd, 0, sgot->contents
12680 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12681 else
12682 bfd_put_32 (output_bfd, sgot->output_section->vma
12683 + sgot->output_offset
12684 + (eh->fdpic_cnts.funcdesc_offset & ~1),
12685 sgot->contents
12686 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12687 }
12688 else
12689 {
12690 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12691 }
12692 outrel.r_offset = sgot->output_section->vma
12693 + sgot->output_offset
12694 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1);
12695 outrel.r_addend = 0;
12696 if (h->dynindx == -1 && !bfd_link_pic (info))
12697 if (h->root.type == bfd_link_hash_undefweak)
12698 arm_elf_add_rofixup (output_bfd, globals->srofixup, -1);
12699 else
12700 arm_elf_add_rofixup (output_bfd, globals->srofixup,
12701 outrel.r_offset);
12702 else
12703 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12704 eh->fdpic_cnts.gotfuncdesc_offset |= 1;
12705 }
12706 }
12707 else
12708 {
12709 /* Such relocation on static function should not have been
12710 emitted by the compiler. */
12711 return bfd_reloc_notsupported;
12712 }
12713 }
12714 *unresolved_reloc_p = false;
12715 return bfd_reloc_ok;
12716
12717 case R_ARM_FUNCDESC:
12718 {
12719 if (h == NULL)
12720 {
12721 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts (input_bfd);
12722 Elf_Internal_Rela outrel;
12723 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12724 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12725 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12726 bfd_vma seg = -1;
12727
12728 if (bfd_link_pic (info) && dynindx == 0)
12729 {
12730 * error_message = _("dynamic index information not available");
12731 return bfd_reloc_dangerous;
12732 }
12733
12734 /* Replace static FUNCDESC relocation with a
12735 R_ARM_RELATIVE dynamic relocation or with a rofixup for
12736 executable. */
12737 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12738 outrel.r_offset = input_section->output_section->vma
12739 + input_section->output_offset + rel->r_offset;
12740 outrel.r_addend = 0;
12741 if (bfd_link_pic (info))
12742 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12743 else
12744 arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset);
12745
12746 bfd_put_32 (input_bfd, sgot->output_section->vma
12747 + sgot->output_offset + offset, hit_data);
12748
12749 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12750 arm_elf_fill_funcdesc (output_bfd, info,
12751 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12752 dynindx, offset, addr, dynreloc_value, seg);
12753 }
12754 else
12755 {
12756 if (h->dynindx == -1)
12757 {
12758 int dynindx;
12759 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12760 bfd_vma addr;
12761 bfd_vma seg = -1;
12762 Elf_Internal_Rela outrel;
12763
12764 /* For static binaries sym_sec can be null. */
12765 if (sym_sec)
12766 {
12767 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12768 addr = dynreloc_value - sym_sec->output_section->vma;
12769 }
12770 else
12771 {
12772 dynindx = 0;
12773 addr = 0;
12774 }
12775
12776 if (bfd_link_pic (info) && dynindx == 0)
12777 abort ();
12778
12779 /* Replace static FUNCDESC relocation with a
12780 R_ARM_RELATIVE dynamic relocation. */
12781 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12782 outrel.r_offset = input_section->output_section->vma
12783 + input_section->output_offset + rel->r_offset;
12784 outrel.r_addend = 0;
12785 if (bfd_link_pic (info))
12786 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12787 else
12788 arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset);
12789
12790 bfd_put_32 (input_bfd, sgot->output_section->vma
12791 + sgot->output_offset + offset, hit_data);
12792
12793 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12794 arm_elf_fill_funcdesc (output_bfd, info,
12795 &eh->fdpic_cnts.funcdesc_offset,
12796 dynindx, offset, addr, dynreloc_value, seg);
12797 }
12798 else
12799 {
12800 Elf_Internal_Rela outrel;
12801
12802 /* Add a dynamic relocation. */
12803 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12804 outrel.r_offset = input_section->output_section->vma
12805 + input_section->output_offset + rel->r_offset;
12806 outrel.r_addend = 0;
12807 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12808 }
12809 }
12810 }
12811 *unresolved_reloc_p = false;
12812 return bfd_reloc_ok;
12813
12814 case R_ARM_THM_BF16:
12815 {
12816 bfd_vma relocation;
12817 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12818 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12819
12820 if (globals->use_rel)
12821 {
12822 bfd_vma immA = (upper_insn & 0x001f);
12823 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12824 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12825 addend = (immA << 12);
12826 addend |= (immB << 2);
12827 addend |= (immC << 1);
12828 addend |= 1;
12829 /* Sign extend. */
12830 signed_addend = (addend & 0x10000) ? addend - (1 << 17) : addend;
12831 }
12832
12833 relocation = value + signed_addend;
12834 relocation -= (input_section->output_section->vma
12835 + input_section->output_offset
12836 + rel->r_offset);
12837
12838 /* Put RELOCATION back into the insn. */
12839 {
12840 bfd_vma immA = (relocation & 0x0001f000) >> 12;
12841 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12842 bfd_vma immC = (relocation & 0x00000002) >> 1;
12843
12844 upper_insn = (upper_insn & 0xffe0) | immA;
12845 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12846 }
12847
12848 /* Put the relocated value back in the object file: */
12849 bfd_put_16 (input_bfd, upper_insn, hit_data);
12850 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12851
12852 return bfd_reloc_ok;
12853 }
12854
12855 case R_ARM_THM_BF12:
12856 {
12857 bfd_vma relocation;
12858 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12859 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12860
12861 if (globals->use_rel)
12862 {
12863 bfd_vma immA = (upper_insn & 0x0001);
12864 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12865 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12866 addend = (immA << 12);
12867 addend |= (immB << 2);
12868 addend |= (immC << 1);
12869 addend |= 1;
12870 /* Sign extend. */
12871 addend = (addend & 0x1000) ? addend - (1 << 13) : addend;
12872 signed_addend = addend;
12873 }
12874
12875 relocation = value + signed_addend;
12876 relocation -= (input_section->output_section->vma
12877 + input_section->output_offset
12878 + rel->r_offset);
12879
12880 /* Put RELOCATION back into the insn. */
12881 {
12882 bfd_vma immA = (relocation & 0x00001000) >> 12;
12883 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12884 bfd_vma immC = (relocation & 0x00000002) >> 1;
12885
12886 upper_insn = (upper_insn & 0xfffe) | immA;
12887 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12888 }
12889
12890 /* Put the relocated value back in the object file: */
12891 bfd_put_16 (input_bfd, upper_insn, hit_data);
12892 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12893
12894 return bfd_reloc_ok;
12895 }
12896
12897 case R_ARM_THM_BF18:
12898 {
12899 bfd_vma relocation;
12900 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12901 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12902
12903 if (globals->use_rel)
12904 {
12905 bfd_vma immA = (upper_insn & 0x007f);
12906 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12907 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12908 addend = (immA << 12);
12909 addend |= (immB << 2);
12910 addend |= (immC << 1);
12911 addend |= 1;
12912 /* Sign extend. */
12913 addend = (addend & 0x40000) ? addend - (1 << 19) : addend;
12914 signed_addend = addend;
12915 }
12916
12917 relocation = value + signed_addend;
12918 relocation -= (input_section->output_section->vma
12919 + input_section->output_offset
12920 + rel->r_offset);
12921
12922 /* Put RELOCATION back into the insn. */
12923 {
12924 bfd_vma immA = (relocation & 0x0007f000) >> 12;
12925 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12926 bfd_vma immC = (relocation & 0x00000002) >> 1;
12927
12928 upper_insn = (upper_insn & 0xff80) | immA;
12929 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12930 }
12931
12932 /* Put the relocated value back in the object file: */
12933 bfd_put_16 (input_bfd, upper_insn, hit_data);
12934 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12935
12936 return bfd_reloc_ok;
12937 }
12938
12939 default:
12940 return bfd_reloc_notsupported;
12941 }
12942 }
12943
12944 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12945 static void
12946 arm_add_to_rel (bfd * abfd,
12947 bfd_byte * address,
12948 reloc_howto_type * howto,
12949 bfd_signed_vma increment)
12950 {
12951 bfd_signed_vma addend;
12952
12953 if (howto->type == R_ARM_THM_CALL
12954 || howto->type == R_ARM_THM_JUMP24)
12955 {
12956 int upper_insn, lower_insn;
12957 int upper, lower;
12958
12959 upper_insn = bfd_get_16 (abfd, address);
12960 lower_insn = bfd_get_16 (abfd, address + 2);
12961 upper = upper_insn & 0x7ff;
12962 lower = lower_insn & 0x7ff;
12963
12964 addend = (upper << 12) | (lower << 1);
12965 addend += increment;
12966 addend >>= 1;
12967
12968 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
12969 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
12970
12971 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
12972 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
12973 }
12974 else
12975 {
12976 bfd_vma contents;
12977
12978 contents = bfd_get_32 (abfd, address);
12979
12980 /* Get the (signed) value from the instruction. */
12981 addend = contents & howto->src_mask;
12982 if (addend & ((howto->src_mask + 1) >> 1))
12983 {
12984 bfd_signed_vma mask;
12985
12986 mask = -1;
12987 mask &= ~ howto->src_mask;
12988 addend |= mask;
12989 }
12990
12991 /* Add in the increment, (which is a byte value). */
12992 switch (howto->type)
12993 {
12994 default:
12995 addend += increment;
12996 break;
12997
12998 case R_ARM_PC24:
12999 case R_ARM_PLT32:
13000 case R_ARM_CALL:
13001 case R_ARM_JUMP24:
13002 addend <<= howto->size;
13003 addend += increment;
13004
13005 /* Should we check for overflow here ? */
13006
13007 /* Drop any undesired bits. */
13008 addend >>= howto->rightshift;
13009 break;
13010 }
13011
13012 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
13013
13014 bfd_put_32 (abfd, contents, address);
13015 }
13016 }
13017
13018 #define IS_ARM_TLS_RELOC(R_TYPE) \
13019 ((R_TYPE) == R_ARM_TLS_GD32 \
13020 || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \
13021 || (R_TYPE) == R_ARM_TLS_LDO32 \
13022 || (R_TYPE) == R_ARM_TLS_LDM32 \
13023 || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \
13024 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
13025 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
13026 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
13027 || (R_TYPE) == R_ARM_TLS_LE32 \
13028 || (R_TYPE) == R_ARM_TLS_IE32 \
13029 || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \
13030 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
13031
13032 /* Specific set of relocations for the gnu tls dialect. */
13033 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
13034 ((R_TYPE) == R_ARM_TLS_GOTDESC \
13035 || (R_TYPE) == R_ARM_TLS_CALL \
13036 || (R_TYPE) == R_ARM_THM_TLS_CALL \
13037 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
13038 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
13039
13040 /* Relocate an ARM ELF section. */
13041
13042 static int
13043 elf32_arm_relocate_section (bfd * output_bfd,
13044 struct bfd_link_info * info,
13045 bfd * input_bfd,
13046 asection * input_section,
13047 bfd_byte * contents,
13048 Elf_Internal_Rela * relocs,
13049 Elf_Internal_Sym * local_syms,
13050 asection ** local_sections)
13051 {
13052 Elf_Internal_Shdr *symtab_hdr;
13053 struct elf_link_hash_entry **sym_hashes;
13054 Elf_Internal_Rela *rel;
13055 Elf_Internal_Rela *relend;
13056 const char *name;
13057 struct elf32_arm_link_hash_table * globals;
13058
13059 globals = elf32_arm_hash_table (info);
13060 if (globals == NULL)
13061 return false;
13062
13063 symtab_hdr = & elf_symtab_hdr (input_bfd);
13064 sym_hashes = elf_sym_hashes (input_bfd);
13065
13066 rel = relocs;
13067 relend = relocs + input_section->reloc_count;
13068 for (; rel < relend; rel++)
13069 {
13070 int r_type;
13071 reloc_howto_type * howto;
13072 unsigned long r_symndx;
13073 Elf_Internal_Sym * sym;
13074 asection * sec;
13075 struct elf_link_hash_entry * h;
13076 bfd_vma relocation;
13077 bfd_reloc_status_type r;
13078 arelent bfd_reloc;
13079 char sym_type;
13080 bool unresolved_reloc = false;
13081 char *error_message = NULL;
13082
13083 r_symndx = ELF32_R_SYM (rel->r_info);
13084 r_type = ELF32_R_TYPE (rel->r_info);
13085 r_type = arm_real_reloc_type (globals, r_type);
13086
13087 if ( r_type == R_ARM_GNU_VTENTRY
13088 || r_type == R_ARM_GNU_VTINHERIT)
13089 continue;
13090
13091 howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
13092
13093 if (howto == NULL)
13094 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
13095
13096 h = NULL;
13097 sym = NULL;
13098 sec = NULL;
13099
13100 if (r_symndx < symtab_hdr->sh_info)
13101 {
13102 sym = local_syms + r_symndx;
13103 sym_type = ELF32_ST_TYPE (sym->st_info);
13104 sec = local_sections[r_symndx];
13105
13106 /* An object file might have a reference to a local
13107 undefined symbol. This is a daft object file, but we
13108 should at least do something about it. V4BX & NONE
13109 relocations do not use the symbol and are explicitly
13110 allowed to use the undefined symbol, so allow those.
13111 Likewise for relocations against STN_UNDEF. */
13112 if (r_type != R_ARM_V4BX
13113 && r_type != R_ARM_NONE
13114 && r_symndx != STN_UNDEF
13115 && bfd_is_und_section (sec)
13116 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
13117 (*info->callbacks->undefined_symbol)
13118 (info, bfd_elf_string_from_elf_section
13119 (input_bfd, symtab_hdr->sh_link, sym->st_name),
13120 input_bfd, input_section,
13121 rel->r_offset, true);
13122
13123 if (globals->use_rel)
13124 {
13125 relocation = (sec->output_section->vma
13126 + sec->output_offset
13127 + sym->st_value);
13128 if (!bfd_link_relocatable (info)
13129 && (sec->flags & SEC_MERGE)
13130 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13131 {
13132 asection *msec;
13133 bfd_vma addend, value;
13134
13135 switch (r_type)
13136 {
13137 case R_ARM_MOVW_ABS_NC:
13138 case R_ARM_MOVT_ABS:
13139 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13140 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
13141 addend = (addend ^ 0x8000) - 0x8000;
13142 break;
13143
13144 case R_ARM_THM_MOVW_ABS_NC:
13145 case R_ARM_THM_MOVT_ABS:
13146 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
13147 << 16;
13148 value |= bfd_get_16 (input_bfd,
13149 contents + rel->r_offset + 2);
13150 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
13151 | ((value & 0x04000000) >> 15);
13152 addend = (addend ^ 0x8000) - 0x8000;
13153 break;
13154
13155 default:
13156 if (howto->rightshift
13157 || (howto->src_mask & (howto->src_mask + 1)))
13158 {
13159 _bfd_error_handler
13160 /* xgettext:c-format */
13161 (_("%pB(%pA+%#" PRIx64 "): "
13162 "%s relocation against SEC_MERGE section"),
13163 input_bfd, input_section,
13164 (uint64_t) rel->r_offset, howto->name);
13165 return false;
13166 }
13167
13168 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13169
13170 /* Get the (signed) value from the instruction. */
13171 addend = value & howto->src_mask;
13172 if (addend & ((howto->src_mask + 1) >> 1))
13173 {
13174 bfd_signed_vma mask;
13175
13176 mask = -1;
13177 mask &= ~ howto->src_mask;
13178 addend |= mask;
13179 }
13180 break;
13181 }
13182
13183 msec = sec;
13184 addend =
13185 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
13186 - relocation;
13187 addend += msec->output_section->vma + msec->output_offset;
13188
13189 /* Cases here must match those in the preceding
13190 switch statement. */
13191 switch (r_type)
13192 {
13193 case R_ARM_MOVW_ABS_NC:
13194 case R_ARM_MOVT_ABS:
13195 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
13196 | (addend & 0xfff);
13197 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13198 break;
13199
13200 case R_ARM_THM_MOVW_ABS_NC:
13201 case R_ARM_THM_MOVT_ABS:
13202 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
13203 | (addend & 0xff) | ((addend & 0x0800) << 15);
13204 bfd_put_16 (input_bfd, value >> 16,
13205 contents + rel->r_offset);
13206 bfd_put_16 (input_bfd, value,
13207 contents + rel->r_offset + 2);
13208 break;
13209
13210 default:
13211 value = (value & ~ howto->dst_mask)
13212 | (addend & howto->dst_mask);
13213 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13214 break;
13215 }
13216 }
13217 }
13218 else
13219 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
13220 }
13221 else
13222 {
13223 bool warned, ignored;
13224
13225 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
13226 r_symndx, symtab_hdr, sym_hashes,
13227 h, sec, relocation,
13228 unresolved_reloc, warned, ignored);
13229
13230 sym_type = h->type;
13231 }
13232
13233 if (sec != NULL && discarded_section (sec))
13234 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
13235 rel, 1, relend, howto, 0, contents);
13236
13237 if (bfd_link_relocatable (info))
13238 {
13239 /* This is a relocatable link. We don't have to change
13240 anything, unless the reloc is against a section symbol,
13241 in which case we have to adjust according to where the
13242 section symbol winds up in the output section. */
13243 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13244 {
13245 if (globals->use_rel)
13246 arm_add_to_rel (input_bfd, contents + rel->r_offset,
13247 howto, (bfd_signed_vma) sec->output_offset);
13248 else
13249 rel->r_addend += sec->output_offset;
13250 }
13251 continue;
13252 }
13253
13254 if (h != NULL)
13255 name = h->root.root.string;
13256 else
13257 {
13258 name = (bfd_elf_string_from_elf_section
13259 (input_bfd, symtab_hdr->sh_link, sym->st_name));
13260 if (name == NULL || *name == '\0')
13261 name = bfd_section_name (sec);
13262 }
13263
13264 if (r_symndx != STN_UNDEF
13265 && r_type != R_ARM_NONE
13266 && (h == NULL
13267 || h->root.type == bfd_link_hash_defined
13268 || h->root.type == bfd_link_hash_defweak)
13269 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
13270 {
13271 _bfd_error_handler
13272 ((sym_type == STT_TLS
13273 /* xgettext:c-format */
13274 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
13275 /* xgettext:c-format */
13276 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
13277 input_bfd,
13278 input_section,
13279 (uint64_t) rel->r_offset,
13280 howto->name,
13281 name);
13282 }
13283
13284 /* We call elf32_arm_final_link_relocate unless we're completely
13285 done, i.e., the relaxation produced the final output we want,
13286 and we won't let anybody mess with it. Also, we have to do
13287 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
13288 both in relaxed and non-relaxed cases. */
13289 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
13290 || (IS_ARM_TLS_GNU_RELOC (r_type)
13291 && !((h ? elf32_arm_hash_entry (h)->tls_type :
13292 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
13293 & GOT_TLS_GDESC)))
13294 {
13295 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
13296 contents, rel, h == NULL);
13297 /* This may have been marked unresolved because it came from
13298 a shared library. But we've just dealt with that. */
13299 unresolved_reloc = 0;
13300 }
13301 else
13302 r = bfd_reloc_continue;
13303
13304 if (r == bfd_reloc_continue)
13305 {
13306 unsigned char branch_type =
13307 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
13308 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
13309
13310 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
13311 input_section, contents, rel,
13312 relocation, info, sec, name,
13313 sym_type, branch_type, h,
13314 &unresolved_reloc,
13315 &error_message);
13316 }
13317
13318 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13319 because such sections are not SEC_ALLOC and thus ld.so will
13320 not process them. */
13321 if (unresolved_reloc
13322 && !((input_section->flags & SEC_DEBUGGING) != 0
13323 && h->def_dynamic)
13324 && _bfd_elf_section_offset (output_bfd, info, input_section,
13325 rel->r_offset) != (bfd_vma) -1)
13326 {
13327 _bfd_error_handler
13328 /* xgettext:c-format */
13329 (_("%pB(%pA+%#" PRIx64 "): "
13330 "unresolvable %s relocation against symbol `%s'"),
13331 input_bfd,
13332 input_section,
13333 (uint64_t) rel->r_offset,
13334 howto->name,
13335 h->root.root.string);
13336 return false;
13337 }
13338
13339 if (r != bfd_reloc_ok)
13340 {
13341 switch (r)
13342 {
13343 case bfd_reloc_overflow:
13344 /* If the overflowing reloc was to an undefined symbol,
13345 we have already printed one error message and there
13346 is no point complaining again. */
13347 if (!h || h->root.type != bfd_link_hash_undefined)
13348 (*info->callbacks->reloc_overflow)
13349 (info, (h ? &h->root : NULL), name, howto->name,
13350 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
13351 break;
13352
13353 case bfd_reloc_undefined:
13354 (*info->callbacks->undefined_symbol)
13355 (info, name, input_bfd, input_section, rel->r_offset, true);
13356 break;
13357
13358 case bfd_reloc_outofrange:
13359 error_message = _("out of range");
13360 goto common_error;
13361
13362 case bfd_reloc_notsupported:
13363 error_message = _("unsupported relocation");
13364 goto common_error;
13365
13366 case bfd_reloc_dangerous:
13367 /* error_message should already be set. */
13368 goto common_error;
13369
13370 default:
13371 error_message = _("unknown error");
13372 /* Fall through. */
13373
13374 common_error:
13375 BFD_ASSERT (error_message != NULL);
13376 (*info->callbacks->reloc_dangerous)
13377 (info, error_message, input_bfd, input_section, rel->r_offset);
13378 break;
13379 }
13380 }
13381 }
13382
13383 return true;
13384 }
13385
13386 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
13387 adds the edit to the start of the list. (The list must be built in order of
13388 ascending TINDEX: the function's callers are primarily responsible for
13389 maintaining that condition). */
13390
13391 static void
13392 add_unwind_table_edit (arm_unwind_table_edit **head,
13393 arm_unwind_table_edit **tail,
13394 arm_unwind_edit_type type,
13395 asection *linked_section,
13396 unsigned int tindex)
13397 {
13398 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
13399 xmalloc (sizeof (arm_unwind_table_edit));
13400
13401 new_edit->type = type;
13402 new_edit->linked_section = linked_section;
13403 new_edit->index = tindex;
13404
13405 if (tindex > 0)
13406 {
13407 new_edit->next = NULL;
13408
13409 if (*tail)
13410 (*tail)->next = new_edit;
13411
13412 (*tail) = new_edit;
13413
13414 if (!*head)
13415 (*head) = new_edit;
13416 }
13417 else
13418 {
13419 new_edit->next = *head;
13420
13421 if (!*tail)
13422 *tail = new_edit;
13423
13424 *head = new_edit;
13425 }
13426 }
13427
13428 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
13429
13430 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
13431
13432 static void
13433 adjust_exidx_size (asection *exidx_sec, int adjust)
13434 {
13435 asection *out_sec;
13436
13437 if (!exidx_sec->rawsize)
13438 exidx_sec->rawsize = exidx_sec->size;
13439
13440 bfd_set_section_size (exidx_sec, exidx_sec->size + adjust);
13441 out_sec = exidx_sec->output_section;
13442 /* Adjust size of output section. */
13443 bfd_set_section_size (out_sec, out_sec->size + adjust);
13444 }
13445
13446 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
13447
13448 static void
13449 insert_cantunwind_after (asection *text_sec, asection *exidx_sec)
13450 {
13451 struct _arm_elf_section_data *exidx_arm_data;
13452
13453 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13454 add_unwind_table_edit
13455 (&exidx_arm_data->u.exidx.unwind_edit_list,
13456 &exidx_arm_data->u.exidx.unwind_edit_tail,
13457 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
13458
13459 exidx_arm_data->additional_reloc_count++;
13460
13461 adjust_exidx_size (exidx_sec, 8);
13462 }
13463
13464 /* Scan .ARM.exidx tables, and create a list describing edits which should be
13465 made to those tables, such that:
13466
13467 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13468 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13469 codes which have been inlined into the index).
13470
13471 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13472
13473 The edits are applied when the tables are written
13474 (in elf32_arm_write_section). */
13475
13476 bool
13477 elf32_arm_fix_exidx_coverage (asection **text_section_order,
13478 unsigned int num_text_sections,
13479 struct bfd_link_info *info,
13480 bool merge_exidx_entries)
13481 {
13482 bfd *inp;
13483 unsigned int last_second_word = 0, i;
13484 asection *last_exidx_sec = NULL;
13485 asection *last_text_sec = NULL;
13486 int last_unwind_type = -1;
13487
13488 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13489 text sections. */
13490 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
13491 {
13492 asection *sec;
13493
13494 for (sec = inp->sections; sec != NULL; sec = sec->next)
13495 {
13496 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
13497 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
13498
13499 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
13500 continue;
13501
13502 if (elf_sec->linked_to)
13503 {
13504 Elf_Internal_Shdr *linked_hdr
13505 = &elf_section_data (elf_sec->linked_to)->this_hdr;
13506 struct _arm_elf_section_data *linked_sec_arm_data
13507 = get_arm_elf_section_data (linked_hdr->bfd_section);
13508
13509 if (linked_sec_arm_data == NULL)
13510 continue;
13511
13512 /* Link this .ARM.exidx section back from the text section it
13513 describes. */
13514 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
13515 }
13516 }
13517 }
13518
13519 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
13520 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13521 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
13522
13523 for (i = 0; i < num_text_sections; i++)
13524 {
13525 asection *sec = text_section_order[i];
13526 asection *exidx_sec;
13527 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
13528 struct _arm_elf_section_data *exidx_arm_data;
13529 bfd_byte *contents = NULL;
13530 int deleted_exidx_bytes = 0;
13531 bfd_vma j;
13532 arm_unwind_table_edit *unwind_edit_head = NULL;
13533 arm_unwind_table_edit *unwind_edit_tail = NULL;
13534 Elf_Internal_Shdr *hdr;
13535 bfd *ibfd;
13536
13537 if (arm_data == NULL)
13538 continue;
13539
13540 exidx_sec = arm_data->u.text.arm_exidx_sec;
13541 if (exidx_sec == NULL)
13542 {
13543 /* Section has no unwind data. */
13544 if (last_unwind_type == 0 || !last_exidx_sec)
13545 continue;
13546
13547 /* Ignore zero sized sections. */
13548 if (sec->size == 0)
13549 continue;
13550
13551 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13552 last_unwind_type = 0;
13553 continue;
13554 }
13555
13556 /* Skip /DISCARD/ sections. */
13557 if (bfd_is_abs_section (exidx_sec->output_section))
13558 continue;
13559
13560 hdr = &elf_section_data (exidx_sec)->this_hdr;
13561 if (hdr->sh_type != SHT_ARM_EXIDX)
13562 continue;
13563
13564 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13565 if (exidx_arm_data == NULL)
13566 continue;
13567
13568 ibfd = exidx_sec->owner;
13569
13570 if (hdr->contents != NULL)
13571 contents = hdr->contents;
13572 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
13573 /* An error? */
13574 continue;
13575
13576 if (last_unwind_type > 0)
13577 {
13578 unsigned int first_word = bfd_get_32 (ibfd, contents);
13579 /* Add cantunwind if first unwind item does not match section
13580 start. */
13581 if (first_word != sec->vma)
13582 {
13583 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13584 last_unwind_type = 0;
13585 }
13586 }
13587
13588 for (j = 0; j < hdr->sh_size; j += 8)
13589 {
13590 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
13591 int unwind_type;
13592 int elide = 0;
13593
13594 /* An EXIDX_CANTUNWIND entry. */
13595 if (second_word == 1)
13596 {
13597 if (last_unwind_type == 0)
13598 elide = 1;
13599 unwind_type = 0;
13600 }
13601 /* Inlined unwinding data. Merge if equal to previous. */
13602 else if ((second_word & 0x80000000) != 0)
13603 {
13604 if (merge_exidx_entries
13605 && last_second_word == second_word && last_unwind_type == 1)
13606 elide = 1;
13607 unwind_type = 1;
13608 last_second_word = second_word;
13609 }
13610 /* Normal table entry. In theory we could merge these too,
13611 but duplicate entries are likely to be much less common. */
13612 else
13613 unwind_type = 2;
13614
13615 if (elide && !bfd_link_relocatable (info))
13616 {
13617 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
13618 DELETE_EXIDX_ENTRY, NULL, j / 8);
13619
13620 deleted_exidx_bytes += 8;
13621 }
13622
13623 last_unwind_type = unwind_type;
13624 }
13625
13626 /* Free contents if we allocated it ourselves. */
13627 if (contents != hdr->contents)
13628 free (contents);
13629
13630 /* Record edits to be applied later (in elf32_arm_write_section). */
13631 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
13632 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
13633
13634 if (deleted_exidx_bytes > 0)
13635 adjust_exidx_size (exidx_sec, - deleted_exidx_bytes);
13636
13637 last_exidx_sec = exidx_sec;
13638 last_text_sec = sec;
13639 }
13640
13641 /* Add terminating CANTUNWIND entry. */
13642 if (!bfd_link_relocatable (info) && last_exidx_sec
13643 && last_unwind_type != 0)
13644 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13645
13646 return true;
13647 }
13648
13649 static bool
13650 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
13651 bfd *ibfd, const char *name)
13652 {
13653 asection *sec, *osec;
13654
13655 sec = bfd_get_linker_section (ibfd, name);
13656 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
13657 return true;
13658
13659 osec = sec->output_section;
13660 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
13661 return true;
13662
13663 if (! bfd_set_section_contents (obfd, osec, sec->contents,
13664 sec->output_offset, sec->size))
13665 return false;
13666
13667 return true;
13668 }
13669
13670 static bool
13671 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
13672 {
13673 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
13674 asection *sec, *osec;
13675
13676 if (globals == NULL)
13677 return false;
13678
13679 /* Invoke the regular ELF backend linker to do all the work. */
13680 if (!bfd_elf_final_link (abfd, info))
13681 return false;
13682
13683 /* Process stub sections (eg BE8 encoding, ...). */
13684 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
13685 unsigned int i;
13686 for (i=0; i<htab->top_id; i++)
13687 {
13688 sec = htab->stub_group[i].stub_sec;
13689 /* Only process it once, in its link_sec slot. */
13690 if (sec && i == htab->stub_group[i].link_sec->id)
13691 {
13692 osec = sec->output_section;
13693 elf32_arm_write_section (abfd, info, sec, sec->contents);
13694 if (! bfd_set_section_contents (abfd, osec, sec->contents,
13695 sec->output_offset, sec->size))
13696 return false;
13697 }
13698 }
13699
13700 /* Write out any glue sections now that we have created all the
13701 stubs. */
13702 if (globals->bfd_of_glue_owner != NULL)
13703 {
13704 if (! elf32_arm_output_glue_section (info, abfd,
13705 globals->bfd_of_glue_owner,
13706 ARM2THUMB_GLUE_SECTION_NAME))
13707 return false;
13708
13709 if (! elf32_arm_output_glue_section (info, abfd,
13710 globals->bfd_of_glue_owner,
13711 THUMB2ARM_GLUE_SECTION_NAME))
13712 return false;
13713
13714 if (! elf32_arm_output_glue_section (info, abfd,
13715 globals->bfd_of_glue_owner,
13716 VFP11_ERRATUM_VENEER_SECTION_NAME))
13717 return false;
13718
13719 if (! elf32_arm_output_glue_section (info, abfd,
13720 globals->bfd_of_glue_owner,
13721 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
13722 return false;
13723
13724 if (! elf32_arm_output_glue_section (info, abfd,
13725 globals->bfd_of_glue_owner,
13726 ARM_BX_GLUE_SECTION_NAME))
13727 return false;
13728 }
13729
13730 return true;
13731 }
13732
13733 /* Return a best guess for the machine number based on the attributes. */
13734
13735 static unsigned int
13736 bfd_arm_get_mach_from_attributes (bfd * abfd)
13737 {
13738 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
13739
13740 switch (arch)
13741 {
13742 case TAG_CPU_ARCH_PRE_V4: return bfd_mach_arm_3M;
13743 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
13744 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
13745 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
13746
13747 case TAG_CPU_ARCH_V5TE:
13748 {
13749 char * name;
13750
13751 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
13752 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
13753
13754 if (name)
13755 {
13756 if (strcmp (name, "IWMMXT2") == 0)
13757 return bfd_mach_arm_iWMMXt2;
13758
13759 if (strcmp (name, "IWMMXT") == 0)
13760 return bfd_mach_arm_iWMMXt;
13761
13762 if (strcmp (name, "XSCALE") == 0)
13763 {
13764 int wmmx;
13765
13766 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
13767 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
13768 switch (wmmx)
13769 {
13770 case 1: return bfd_mach_arm_iWMMXt;
13771 case 2: return bfd_mach_arm_iWMMXt2;
13772 default: return bfd_mach_arm_XScale;
13773 }
13774 }
13775 }
13776
13777 return bfd_mach_arm_5TE;
13778 }
13779
13780 case TAG_CPU_ARCH_V5TEJ:
13781 return bfd_mach_arm_5TEJ;
13782 case TAG_CPU_ARCH_V6:
13783 return bfd_mach_arm_6;
13784 case TAG_CPU_ARCH_V6KZ:
13785 return bfd_mach_arm_6KZ;
13786 case TAG_CPU_ARCH_V6T2:
13787 return bfd_mach_arm_6T2;
13788 case TAG_CPU_ARCH_V6K:
13789 return bfd_mach_arm_6K;
13790 case TAG_CPU_ARCH_V7:
13791 return bfd_mach_arm_7;
13792 case TAG_CPU_ARCH_V6_M:
13793 return bfd_mach_arm_6M;
13794 case TAG_CPU_ARCH_V6S_M:
13795 return bfd_mach_arm_6SM;
13796 case TAG_CPU_ARCH_V7E_M:
13797 return bfd_mach_arm_7EM;
13798 case TAG_CPU_ARCH_V8:
13799 return bfd_mach_arm_8;
13800 case TAG_CPU_ARCH_V8R:
13801 return bfd_mach_arm_8R;
13802 case TAG_CPU_ARCH_V8M_BASE:
13803 return bfd_mach_arm_8M_BASE;
13804 case TAG_CPU_ARCH_V8M_MAIN:
13805 return bfd_mach_arm_8M_MAIN;
13806 case TAG_CPU_ARCH_V8_1M_MAIN:
13807 return bfd_mach_arm_8_1M_MAIN;
13808
13809 default:
13810 /* Force entry to be added for any new known Tag_CPU_arch value. */
13811 BFD_ASSERT (arch > MAX_TAG_CPU_ARCH);
13812
13813 /* Unknown Tag_CPU_arch value. */
13814 return bfd_mach_arm_unknown;
13815 }
13816 }
13817
13818 /* Set the right machine number. */
13819
13820 static bool
13821 elf32_arm_object_p (bfd *abfd)
13822 {
13823 unsigned int mach;
13824
13825 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
13826
13827 if (mach == bfd_mach_arm_unknown)
13828 {
13829 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13830 mach = bfd_mach_arm_ep9312;
13831 else
13832 mach = bfd_arm_get_mach_from_attributes (abfd);
13833 }
13834
13835 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13836 return true;
13837 }
13838
13839 /* Function to keep ARM specific flags in the ELF header. */
13840
13841 static bool
13842 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13843 {
13844 if (elf_flags_init (abfd)
13845 && elf_elfheader (abfd)->e_flags != flags)
13846 {
13847 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13848 {
13849 if (flags & EF_ARM_INTERWORK)
13850 _bfd_error_handler
13851 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13852 abfd);
13853 else
13854 _bfd_error_handler
13855 (_("warning: clearing the interworking flag of %pB due to outside request"),
13856 abfd);
13857 }
13858 }
13859 else
13860 {
13861 elf_elfheader (abfd)->e_flags = flags;
13862 elf_flags_init (abfd) = true;
13863 }
13864
13865 return true;
13866 }
13867
13868 /* Copy backend specific data from one object module to another. */
13869
13870 static bool
13871 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13872 {
13873 flagword in_flags;
13874 flagword out_flags;
13875
13876 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13877 return true;
13878
13879 in_flags = elf_elfheader (ibfd)->e_flags;
13880 out_flags = elf_elfheader (obfd)->e_flags;
13881
13882 if (elf_flags_init (obfd)
13883 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13884 && in_flags != out_flags)
13885 {
13886 /* Cannot mix APCS26 and APCS32 code. */
13887 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13888 return false;
13889
13890 /* Cannot mix float APCS and non-float APCS code. */
13891 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13892 return false;
13893
13894 /* If the src and dest have different interworking flags
13895 then turn off the interworking bit. */
13896 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13897 {
13898 if (out_flags & EF_ARM_INTERWORK)
13899 _bfd_error_handler
13900 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13901 obfd, ibfd);
13902
13903 in_flags &= ~EF_ARM_INTERWORK;
13904 }
13905
13906 /* Likewise for PIC, though don't warn for this case. */
13907 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13908 in_flags &= ~EF_ARM_PIC;
13909 }
13910
13911 elf_elfheader (obfd)->e_flags = in_flags;
13912 elf_flags_init (obfd) = true;
13913
13914 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13915 }
13916
13917 /* Values for Tag_ABI_PCS_R9_use. */
13918 enum
13919 {
13920 AEABI_R9_V6,
13921 AEABI_R9_SB,
13922 AEABI_R9_TLS,
13923 AEABI_R9_unused
13924 };
13925
13926 /* Values for Tag_ABI_PCS_RW_data. */
13927 enum
13928 {
13929 AEABI_PCS_RW_data_absolute,
13930 AEABI_PCS_RW_data_PCrel,
13931 AEABI_PCS_RW_data_SBrel,
13932 AEABI_PCS_RW_data_unused
13933 };
13934
13935 /* Values for Tag_ABI_enum_size. */
13936 enum
13937 {
13938 AEABI_enum_unused,
13939 AEABI_enum_short,
13940 AEABI_enum_wide,
13941 AEABI_enum_forced_wide
13942 };
13943
13944 /* Determine whether an object attribute tag takes an integer, a
13945 string or both. */
13946
13947 static int
13948 elf32_arm_obj_attrs_arg_type (int tag)
13949 {
13950 if (tag == Tag_compatibility)
13951 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
13952 else if (tag == Tag_nodefaults)
13953 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
13954 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
13955 return ATTR_TYPE_FLAG_STR_VAL;
13956 else if (tag < 32)
13957 return ATTR_TYPE_FLAG_INT_VAL;
13958 else
13959 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
13960 }
13961
13962 /* The ABI defines that Tag_conformance should be emitted first, and that
13963 Tag_nodefaults should be second (if either is defined). This sets those
13964 two positions, and bumps up the position of all the remaining tags to
13965 compensate. */
13966 static int
13967 elf32_arm_obj_attrs_order (int num)
13968 {
13969 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
13970 return Tag_conformance;
13971 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
13972 return Tag_nodefaults;
13973 if ((num - 2) < Tag_nodefaults)
13974 return num - 2;
13975 if ((num - 1) < Tag_conformance)
13976 return num - 1;
13977 return num;
13978 }
13979
13980 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13981 static bool
13982 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
13983 {
13984 if ((tag & 127) < 64)
13985 {
13986 _bfd_error_handler
13987 (_("%pB: unknown mandatory EABI object attribute %d"),
13988 abfd, tag);
13989 bfd_set_error (bfd_error_bad_value);
13990 return false;
13991 }
13992 else
13993 {
13994 _bfd_error_handler
13995 (_("warning: %pB: unknown EABI object attribute %d"),
13996 abfd, tag);
13997 return true;
13998 }
13999 }
14000
14001 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
14002 Returns -1 if no architecture could be read. */
14003
14004 static int
14005 get_secondary_compatible_arch (bfd *abfd)
14006 {
14007 obj_attribute *attr =
14008 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
14009
14010 /* Note: the tag and its argument below are uleb128 values, though
14011 currently-defined values fit in one byte for each. */
14012 if (attr->s
14013 && attr->s[0] == Tag_CPU_arch
14014 && (attr->s[1] & 128) != 128
14015 && attr->s[2] == 0)
14016 return attr->s[1];
14017
14018 /* This tag is "safely ignorable", so don't complain if it looks funny. */
14019 return -1;
14020 }
14021
14022 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
14023 The tag is removed if ARCH is -1. */
14024
14025 static void
14026 set_secondary_compatible_arch (bfd *abfd, int arch)
14027 {
14028 obj_attribute *attr =
14029 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
14030
14031 if (arch == -1)
14032 {
14033 attr->s = NULL;
14034 return;
14035 }
14036
14037 /* Note: the tag and its argument below are uleb128 values, though
14038 currently-defined values fit in one byte for each. */
14039 if (!attr->s)
14040 attr->s = (char *) bfd_alloc (abfd, 3);
14041 attr->s[0] = Tag_CPU_arch;
14042 attr->s[1] = arch;
14043 attr->s[2] = '\0';
14044 }
14045
14046 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
14047 into account. */
14048
14049 static int
14050 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
14051 int newtag, int secondary_compat)
14052 {
14053 #define T(X) TAG_CPU_ARCH_##X
14054 int tagl, tagh, result;
14055 const int v6t2[] =
14056 {
14057 T(V6T2), /* PRE_V4. */
14058 T(V6T2), /* V4. */
14059 T(V6T2), /* V4T. */
14060 T(V6T2), /* V5T. */
14061 T(V6T2), /* V5TE. */
14062 T(V6T2), /* V5TEJ. */
14063 T(V6T2), /* V6. */
14064 T(V7), /* V6KZ. */
14065 T(V6T2) /* V6T2. */
14066 };
14067 const int v6k[] =
14068 {
14069 T(V6K), /* PRE_V4. */
14070 T(V6K), /* V4. */
14071 T(V6K), /* V4T. */
14072 T(V6K), /* V5T. */
14073 T(V6K), /* V5TE. */
14074 T(V6K), /* V5TEJ. */
14075 T(V6K), /* V6. */
14076 T(V6KZ), /* V6KZ. */
14077 T(V7), /* V6T2. */
14078 T(V6K) /* V6K. */
14079 };
14080 const int v7[] =
14081 {
14082 T(V7), /* PRE_V4. */
14083 T(V7), /* V4. */
14084 T(V7), /* V4T. */
14085 T(V7), /* V5T. */
14086 T(V7), /* V5TE. */
14087 T(V7), /* V5TEJ. */
14088 T(V7), /* V6. */
14089 T(V7), /* V6KZ. */
14090 T(V7), /* V6T2. */
14091 T(V7), /* V6K. */
14092 T(V7) /* V7. */
14093 };
14094 const int v6_m[] =
14095 {
14096 -1, /* PRE_V4. */
14097 -1, /* V4. */
14098 T(V6K), /* V4T. */
14099 T(V6K), /* V5T. */
14100 T(V6K), /* V5TE. */
14101 T(V6K), /* V5TEJ. */
14102 T(V6K), /* V6. */
14103 T(V6KZ), /* V6KZ. */
14104 T(V7), /* V6T2. */
14105 T(V6K), /* V6K. */
14106 T(V7), /* V7. */
14107 T(V6_M) /* V6_M. */
14108 };
14109 const int v6s_m[] =
14110 {
14111 -1, /* PRE_V4. */
14112 -1, /* V4. */
14113 T(V6K), /* V4T. */
14114 T(V6K), /* V5T. */
14115 T(V6K), /* V5TE. */
14116 T(V6K), /* V5TEJ. */
14117 T(V6K), /* V6. */
14118 T(V6KZ), /* V6KZ. */
14119 T(V7), /* V6T2. */
14120 T(V6K), /* V6K. */
14121 T(V7), /* V7. */
14122 T(V6S_M), /* V6_M. */
14123 T(V6S_M) /* V6S_M. */
14124 };
14125 const int v7e_m[] =
14126 {
14127 -1, /* PRE_V4. */
14128 -1, /* V4. */
14129 T(V7E_M), /* V4T. */
14130 T(V7E_M), /* V5T. */
14131 T(V7E_M), /* V5TE. */
14132 T(V7E_M), /* V5TEJ. */
14133 T(V7E_M), /* V6. */
14134 T(V7E_M), /* V6KZ. */
14135 T(V7E_M), /* V6T2. */
14136 T(V7E_M), /* V6K. */
14137 T(V7E_M), /* V7. */
14138 T(V7E_M), /* V6_M. */
14139 T(V7E_M), /* V6S_M. */
14140 T(V7E_M) /* V7E_M. */
14141 };
14142 const int v8[] =
14143 {
14144 T(V8), /* PRE_V4. */
14145 T(V8), /* V4. */
14146 T(V8), /* V4T. */
14147 T(V8), /* V5T. */
14148 T(V8), /* V5TE. */
14149 T(V8), /* V5TEJ. */
14150 T(V8), /* V6. */
14151 T(V8), /* V6KZ. */
14152 T(V8), /* V6T2. */
14153 T(V8), /* V6K. */
14154 T(V8), /* V7. */
14155 T(V8), /* V6_M. */
14156 T(V8), /* V6S_M. */
14157 T(V8), /* V7E_M. */
14158 T(V8) /* V8. */
14159 };
14160 const int v8r[] =
14161 {
14162 T(V8R), /* PRE_V4. */
14163 T(V8R), /* V4. */
14164 T(V8R), /* V4T. */
14165 T(V8R), /* V5T. */
14166 T(V8R), /* V5TE. */
14167 T(V8R), /* V5TEJ. */
14168 T(V8R), /* V6. */
14169 T(V8R), /* V6KZ. */
14170 T(V8R), /* V6T2. */
14171 T(V8R), /* V6K. */
14172 T(V8R), /* V7. */
14173 T(V8R), /* V6_M. */
14174 T(V8R), /* V6S_M. */
14175 T(V8R), /* V7E_M. */
14176 T(V8), /* V8. */
14177 T(V8R), /* V8R. */
14178 };
14179 const int v8m_baseline[] =
14180 {
14181 -1, /* PRE_V4. */
14182 -1, /* V4. */
14183 -1, /* V4T. */
14184 -1, /* V5T. */
14185 -1, /* V5TE. */
14186 -1, /* V5TEJ. */
14187 -1, /* V6. */
14188 -1, /* V6KZ. */
14189 -1, /* V6T2. */
14190 -1, /* V6K. */
14191 -1, /* V7. */
14192 T(V8M_BASE), /* V6_M. */
14193 T(V8M_BASE), /* V6S_M. */
14194 -1, /* V7E_M. */
14195 -1, /* V8. */
14196 -1, /* V8R. */
14197 T(V8M_BASE) /* V8-M BASELINE. */
14198 };
14199 const int v8m_mainline[] =
14200 {
14201 -1, /* PRE_V4. */
14202 -1, /* V4. */
14203 -1, /* V4T. */
14204 -1, /* V5T. */
14205 -1, /* V5TE. */
14206 -1, /* V5TEJ. */
14207 -1, /* V6. */
14208 -1, /* V6KZ. */
14209 -1, /* V6T2. */
14210 -1, /* V6K. */
14211 T(V8M_MAIN), /* V7. */
14212 T(V8M_MAIN), /* V6_M. */
14213 T(V8M_MAIN), /* V6S_M. */
14214 T(V8M_MAIN), /* V7E_M. */
14215 -1, /* V8. */
14216 -1, /* V8R. */
14217 T(V8M_MAIN), /* V8-M BASELINE. */
14218 T(V8M_MAIN) /* V8-M MAINLINE. */
14219 };
14220 const int v8_1m_mainline[] =
14221 {
14222 -1, /* PRE_V4. */
14223 -1, /* V4. */
14224 -1, /* V4T. */
14225 -1, /* V5T. */
14226 -1, /* V5TE. */
14227 -1, /* V5TEJ. */
14228 -1, /* V6. */
14229 -1, /* V6KZ. */
14230 -1, /* V6T2. */
14231 -1, /* V6K. */
14232 T(V8_1M_MAIN), /* V7. */
14233 T(V8_1M_MAIN), /* V6_M. */
14234 T(V8_1M_MAIN), /* V6S_M. */
14235 T(V8_1M_MAIN), /* V7E_M. */
14236 -1, /* V8. */
14237 -1, /* V8R. */
14238 T(V8_1M_MAIN), /* V8-M BASELINE. */
14239 T(V8_1M_MAIN), /* V8-M MAINLINE. */
14240 -1, /* Unused (18). */
14241 -1, /* Unused (19). */
14242 -1, /* Unused (20). */
14243 T(V8_1M_MAIN) /* V8.1-M MAINLINE. */
14244 };
14245 const int v4t_plus_v6_m[] =
14246 {
14247 -1, /* PRE_V4. */
14248 -1, /* V4. */
14249 T(V4T), /* V4T. */
14250 T(V5T), /* V5T. */
14251 T(V5TE), /* V5TE. */
14252 T(V5TEJ), /* V5TEJ. */
14253 T(V6), /* V6. */
14254 T(V6KZ), /* V6KZ. */
14255 T(V6T2), /* V6T2. */
14256 T(V6K), /* V6K. */
14257 T(V7), /* V7. */
14258 T(V6_M), /* V6_M. */
14259 T(V6S_M), /* V6S_M. */
14260 T(V7E_M), /* V7E_M. */
14261 T(V8), /* V8. */
14262 -1, /* V8R. */
14263 T(V8M_BASE), /* V8-M BASELINE. */
14264 T(V8M_MAIN), /* V8-M MAINLINE. */
14265 -1, /* Unused (18). */
14266 -1, /* Unused (19). */
14267 -1, /* Unused (20). */
14268 T(V8_1M_MAIN), /* V8.1-M MAINLINE. */
14269 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
14270 };
14271 const int *comb[] =
14272 {
14273 v6t2,
14274 v6k,
14275 v7,
14276 v6_m,
14277 v6s_m,
14278 v7e_m,
14279 v8,
14280 v8r,
14281 v8m_baseline,
14282 v8m_mainline,
14283 NULL,
14284 NULL,
14285 NULL,
14286 v8_1m_mainline,
14287 /* Pseudo-architecture. */
14288 v4t_plus_v6_m
14289 };
14290
14291 /* Check we've not got a higher architecture than we know about. */
14292
14293 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
14294 {
14295 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd);
14296 return -1;
14297 }
14298
14299 /* Override old tag if we have a Tag_also_compatible_with on the output. */
14300
14301 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
14302 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
14303 oldtag = T(V4T_PLUS_V6_M);
14304
14305 /* And override the new tag if we have a Tag_also_compatible_with on the
14306 input. */
14307
14308 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
14309 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
14310 newtag = T(V4T_PLUS_V6_M);
14311
14312 tagl = (oldtag < newtag) ? oldtag : newtag;
14313 result = tagh = (oldtag > newtag) ? oldtag : newtag;
14314
14315 /* Architectures before V6KZ add features monotonically. */
14316 if (tagh <= TAG_CPU_ARCH_V6KZ)
14317 return result;
14318
14319 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
14320
14321 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
14322 as the canonical version. */
14323 if (result == T(V4T_PLUS_V6_M))
14324 {
14325 result = T(V4T);
14326 *secondary_compat_out = T(V6_M);
14327 }
14328 else
14329 *secondary_compat_out = -1;
14330
14331 if (result == -1)
14332 {
14333 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
14334 ibfd, oldtag, newtag);
14335 return -1;
14336 }
14337
14338 return result;
14339 #undef T
14340 }
14341
14342 /* Query attributes object to see if integer divide instructions may be
14343 present in an object. */
14344 static bool
14345 elf32_arm_attributes_accept_div (const obj_attribute *attr)
14346 {
14347 int arch = attr[Tag_CPU_arch].i;
14348 int profile = attr[Tag_CPU_arch_profile].i;
14349
14350 switch (attr[Tag_DIV_use].i)
14351 {
14352 case 0:
14353 /* Integer divide allowed if instruction contained in archetecture. */
14354 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
14355 return true;
14356 else if (arch >= TAG_CPU_ARCH_V7E_M)
14357 return true;
14358 else
14359 return false;
14360
14361 case 1:
14362 /* Integer divide explicitly prohibited. */
14363 return false;
14364
14365 default:
14366 /* Unrecognised case - treat as allowing divide everywhere. */
14367 case 2:
14368 /* Integer divide allowed in ARM state. */
14369 return true;
14370 }
14371 }
14372
14373 /* Query attributes object to see if integer divide instructions are
14374 forbidden to be in the object. This is not the inverse of
14375 elf32_arm_attributes_accept_div. */
14376 static bool
14377 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
14378 {
14379 return attr[Tag_DIV_use].i == 1;
14380 }
14381
14382 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
14383 are conflicting attributes. */
14384
14385 static bool
14386 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
14387 {
14388 bfd *obfd = info->output_bfd;
14389 obj_attribute *in_attr;
14390 obj_attribute *out_attr;
14391 /* Some tags have 0 = don't care, 1 = strong requirement,
14392 2 = weak requirement. */
14393 static const int order_021[3] = {0, 2, 1};
14394 int i;
14395 bool result = true;
14396 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
14397
14398 /* Skip the linker stubs file. This preserves previous behavior
14399 of accepting unknown attributes in the first input file - but
14400 is that a bug? */
14401 if (ibfd->flags & BFD_LINKER_CREATED)
14402 return true;
14403
14404 /* Skip any input that hasn't attribute section.
14405 This enables to link object files without attribute section with
14406 any others. */
14407 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
14408 return true;
14409
14410 if (!elf_known_obj_attributes_proc (obfd)[0].i)
14411 {
14412 /* This is the first object. Copy the attributes. */
14413 _bfd_elf_copy_obj_attributes (ibfd, obfd);
14414
14415 out_attr = elf_known_obj_attributes_proc (obfd);
14416
14417 /* Use the Tag_null value to indicate the attributes have been
14418 initialized. */
14419 out_attr[0].i = 1;
14420
14421 /* We do not output objects with Tag_MPextension_use_legacy - we move
14422 the attribute's value to Tag_MPextension_use. */
14423 if (out_attr[Tag_MPextension_use_legacy].i != 0)
14424 {
14425 if (out_attr[Tag_MPextension_use].i != 0
14426 && out_attr[Tag_MPextension_use_legacy].i
14427 != out_attr[Tag_MPextension_use].i)
14428 {
14429 _bfd_error_handler
14430 (_("Error: %pB has both the current and legacy "
14431 "Tag_MPextension_use attributes"), ibfd);
14432 result = false;
14433 }
14434
14435 out_attr[Tag_MPextension_use] =
14436 out_attr[Tag_MPextension_use_legacy];
14437 out_attr[Tag_MPextension_use_legacy].type = 0;
14438 out_attr[Tag_MPextension_use_legacy].i = 0;
14439 }
14440
14441 return result;
14442 }
14443
14444 in_attr = elf_known_obj_attributes_proc (ibfd);
14445 out_attr = elf_known_obj_attributes_proc (obfd);
14446 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
14447 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
14448 {
14449 /* Ignore mismatches if the object doesn't use floating point or is
14450 floating point ABI independent. */
14451 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
14452 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14453 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
14454 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
14455 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14456 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
14457 {
14458 _bfd_error_handler
14459 (_("error: %pB uses VFP register arguments, %pB does not"),
14460 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
14461 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
14462 result = false;
14463 }
14464 }
14465
14466 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
14467 {
14468 /* Merge this attribute with existing attributes. */
14469 switch (i)
14470 {
14471 case Tag_CPU_raw_name:
14472 case Tag_CPU_name:
14473 /* These are merged after Tag_CPU_arch. */
14474 break;
14475
14476 case Tag_ABI_optimization_goals:
14477 case Tag_ABI_FP_optimization_goals:
14478 /* Use the first value seen. */
14479 break;
14480
14481 case Tag_CPU_arch:
14482 {
14483 int secondary_compat = -1, secondary_compat_out = -1;
14484 unsigned int saved_out_attr = out_attr[i].i;
14485 int arch_attr;
14486 static const char *name_table[] =
14487 {
14488 /* These aren't real CPU names, but we can't guess
14489 that from the architecture version alone. */
14490 "Pre v4",
14491 "ARM v4",
14492 "ARM v4T",
14493 "ARM v5T",
14494 "ARM v5TE",
14495 "ARM v5TEJ",
14496 "ARM v6",
14497 "ARM v6KZ",
14498 "ARM v6T2",
14499 "ARM v6K",
14500 "ARM v7",
14501 "ARM v6-M",
14502 "ARM v6S-M",
14503 "ARM v8",
14504 "",
14505 "ARM v8-M.baseline",
14506 "ARM v8-M.mainline",
14507 };
14508
14509 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
14510 secondary_compat = get_secondary_compatible_arch (ibfd);
14511 secondary_compat_out = get_secondary_compatible_arch (obfd);
14512 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
14513 &secondary_compat_out,
14514 in_attr[i].i,
14515 secondary_compat);
14516
14517 /* Return with error if failed to merge. */
14518 if (arch_attr == -1)
14519 return false;
14520
14521 out_attr[i].i = arch_attr;
14522
14523 set_secondary_compatible_arch (obfd, secondary_compat_out);
14524
14525 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
14526 if (out_attr[i].i == saved_out_attr)
14527 ; /* Leave the names alone. */
14528 else if (out_attr[i].i == in_attr[i].i)
14529 {
14530 /* The output architecture has been changed to match the
14531 input architecture. Use the input names. */
14532 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
14533 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
14534 : NULL;
14535 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
14536 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
14537 : NULL;
14538 }
14539 else
14540 {
14541 out_attr[Tag_CPU_name].s = NULL;
14542 out_attr[Tag_CPU_raw_name].s = NULL;
14543 }
14544
14545 /* If we still don't have a value for Tag_CPU_name,
14546 make one up now. Tag_CPU_raw_name remains blank. */
14547 if (out_attr[Tag_CPU_name].s == NULL
14548 && out_attr[i].i < ARRAY_SIZE (name_table))
14549 out_attr[Tag_CPU_name].s =
14550 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
14551 }
14552 break;
14553
14554 case Tag_ARM_ISA_use:
14555 case Tag_THUMB_ISA_use:
14556 case Tag_WMMX_arch:
14557 case Tag_Advanced_SIMD_arch:
14558 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
14559 case Tag_ABI_FP_rounding:
14560 case Tag_ABI_FP_exceptions:
14561 case Tag_ABI_FP_user_exceptions:
14562 case Tag_ABI_FP_number_model:
14563 case Tag_FP_HP_extension:
14564 case Tag_CPU_unaligned_access:
14565 case Tag_T2EE_use:
14566 case Tag_MPextension_use:
14567 case Tag_MVE_arch:
14568 /* Use the largest value specified. */
14569 if (in_attr[i].i > out_attr[i].i)
14570 out_attr[i].i = in_attr[i].i;
14571 break;
14572
14573 case Tag_ABI_align_preserved:
14574 case Tag_ABI_PCS_RO_data:
14575 /* Use the smallest value specified. */
14576 if (in_attr[i].i < out_attr[i].i)
14577 out_attr[i].i = in_attr[i].i;
14578 break;
14579
14580 case Tag_ABI_align_needed:
14581 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
14582 && (in_attr[Tag_ABI_align_preserved].i == 0
14583 || out_attr[Tag_ABI_align_preserved].i == 0))
14584 {
14585 /* This error message should be enabled once all non-conformant
14586 binaries in the toolchain have had the attributes set
14587 properly.
14588 _bfd_error_handler
14589 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14590 obfd, ibfd);
14591 result = false; */
14592 }
14593 /* Fall through. */
14594 case Tag_ABI_FP_denormal:
14595 case Tag_ABI_PCS_GOT_use:
14596 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14597 value if greater than 2 (for future-proofing). */
14598 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
14599 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
14600 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
14601 out_attr[i].i = in_attr[i].i;
14602 break;
14603
14604 case Tag_Virtualization_use:
14605 /* The virtualization tag effectively stores two bits of
14606 information: the intended use of TrustZone (in bit 0), and the
14607 intended use of Virtualization (in bit 1). */
14608 if (out_attr[i].i == 0)
14609 out_attr[i].i = in_attr[i].i;
14610 else if (in_attr[i].i != 0
14611 && in_attr[i].i != out_attr[i].i)
14612 {
14613 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
14614 out_attr[i].i = 3;
14615 else
14616 {
14617 _bfd_error_handler
14618 (_("error: %pB: unable to merge virtualization attributes "
14619 "with %pB"),
14620 obfd, ibfd);
14621 result = false;
14622 }
14623 }
14624 break;
14625
14626 case Tag_CPU_arch_profile:
14627 if (out_attr[i].i != in_attr[i].i)
14628 {
14629 /* 0 will merge with anything.
14630 'A' and 'S' merge to 'A'.
14631 'R' and 'S' merge to 'R'.
14632 'M' and 'A|R|S' is an error. */
14633 if (out_attr[i].i == 0
14634 || (out_attr[i].i == 'S'
14635 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
14636 out_attr[i].i = in_attr[i].i;
14637 else if (in_attr[i].i == 0
14638 || (in_attr[i].i == 'S'
14639 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
14640 ; /* Do nothing. */
14641 else
14642 {
14643 _bfd_error_handler
14644 (_("error: %pB: conflicting architecture profiles %c/%c"),
14645 ibfd,
14646 in_attr[i].i ? in_attr[i].i : '0',
14647 out_attr[i].i ? out_attr[i].i : '0');
14648 result = false;
14649 }
14650 }
14651 break;
14652
14653 case Tag_DSP_extension:
14654 /* No need to change output value if any of:
14655 - pre (<=) ARMv5T input architecture (do not have DSP)
14656 - M input profile not ARMv7E-M and do not have DSP. */
14657 if (in_attr[Tag_CPU_arch].i <= 3
14658 || (in_attr[Tag_CPU_arch_profile].i == 'M'
14659 && in_attr[Tag_CPU_arch].i != 13
14660 && in_attr[i].i == 0))
14661 ; /* Do nothing. */
14662 /* Output value should be 0 if DSP part of architecture, ie.
14663 - post (>=) ARMv5te architecture output
14664 - A, R or S profile output or ARMv7E-M output architecture. */
14665 else if (out_attr[Tag_CPU_arch].i >= 4
14666 && (out_attr[Tag_CPU_arch_profile].i == 'A'
14667 || out_attr[Tag_CPU_arch_profile].i == 'R'
14668 || out_attr[Tag_CPU_arch_profile].i == 'S'
14669 || out_attr[Tag_CPU_arch].i == 13))
14670 out_attr[i].i = 0;
14671 /* Otherwise, DSP instructions are added and not part of output
14672 architecture. */
14673 else
14674 out_attr[i].i = 1;
14675 break;
14676
14677 case Tag_FP_arch:
14678 {
14679 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14680 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14681 when it's 0. It might mean absence of FP hardware if
14682 Tag_FP_arch is zero. */
14683
14684 #define VFP_VERSION_COUNT 9
14685 static const struct
14686 {
14687 int ver;
14688 int regs;
14689 } vfp_versions[VFP_VERSION_COUNT] =
14690 {
14691 {0, 0},
14692 {1, 16},
14693 {2, 16},
14694 {3, 32},
14695 {3, 16},
14696 {4, 32},
14697 {4, 16},
14698 {8, 32},
14699 {8, 16}
14700 };
14701 int ver;
14702 int regs;
14703 int newval;
14704
14705 /* If the output has no requirement about FP hardware,
14706 follow the requirement of the input. */
14707 if (out_attr[i].i == 0)
14708 {
14709 /* This assert is still reasonable, we shouldn't
14710 produce the suspicious build attribute
14711 combination (See below for in_attr). */
14712 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
14713 out_attr[i].i = in_attr[i].i;
14714 out_attr[Tag_ABI_HardFP_use].i
14715 = in_attr[Tag_ABI_HardFP_use].i;
14716 break;
14717 }
14718 /* If the input has no requirement about FP hardware, do
14719 nothing. */
14720 else if (in_attr[i].i == 0)
14721 {
14722 /* We used to assert that Tag_ABI_HardFP_use was
14723 zero here, but we should never assert when
14724 consuming an object file that has suspicious
14725 build attributes. The single precision variant
14726 of 'no FP architecture' is still 'no FP
14727 architecture', so we just ignore the tag in this
14728 case. */
14729 break;
14730 }
14731
14732 /* Both the input and the output have nonzero Tag_FP_arch.
14733 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
14734
14735 /* If both the input and the output have zero Tag_ABI_HardFP_use,
14736 do nothing. */
14737 if (in_attr[Tag_ABI_HardFP_use].i == 0
14738 && out_attr[Tag_ABI_HardFP_use].i == 0)
14739 ;
14740 /* If the input and the output have different Tag_ABI_HardFP_use,
14741 the combination of them is 0 (implied by Tag_FP_arch). */
14742 else if (in_attr[Tag_ABI_HardFP_use].i
14743 != out_attr[Tag_ABI_HardFP_use].i)
14744 out_attr[Tag_ABI_HardFP_use].i = 0;
14745
14746 /* Now we can handle Tag_FP_arch. */
14747
14748 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14749 pick the biggest. */
14750 if (in_attr[i].i >= VFP_VERSION_COUNT
14751 && in_attr[i].i > out_attr[i].i)
14752 {
14753 out_attr[i] = in_attr[i];
14754 break;
14755 }
14756 /* The output uses the superset of input features
14757 (ISA version) and registers. */
14758 ver = vfp_versions[in_attr[i].i].ver;
14759 if (ver < vfp_versions[out_attr[i].i].ver)
14760 ver = vfp_versions[out_attr[i].i].ver;
14761 regs = vfp_versions[in_attr[i].i].regs;
14762 if (regs < vfp_versions[out_attr[i].i].regs)
14763 regs = vfp_versions[out_attr[i].i].regs;
14764 /* This assumes all possible supersets are also a valid
14765 options. */
14766 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
14767 {
14768 if (regs == vfp_versions[newval].regs
14769 && ver == vfp_versions[newval].ver)
14770 break;
14771 }
14772 out_attr[i].i = newval;
14773 }
14774 break;
14775 case Tag_PCS_config:
14776 if (out_attr[i].i == 0)
14777 out_attr[i].i = in_attr[i].i;
14778 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
14779 {
14780 /* It's sometimes ok to mix different configs, so this is only
14781 a warning. */
14782 _bfd_error_handler
14783 (_("warning: %pB: conflicting platform configuration"), ibfd);
14784 }
14785 break;
14786 case Tag_ABI_PCS_R9_use:
14787 if (in_attr[i].i != out_attr[i].i
14788 && out_attr[i].i != AEABI_R9_unused
14789 && in_attr[i].i != AEABI_R9_unused)
14790 {
14791 _bfd_error_handler
14792 (_("error: %pB: conflicting use of R9"), ibfd);
14793 result = false;
14794 }
14795 if (out_attr[i].i == AEABI_R9_unused)
14796 out_attr[i].i = in_attr[i].i;
14797 break;
14798 case Tag_ABI_PCS_RW_data:
14799 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
14800 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
14801 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
14802 {
14803 _bfd_error_handler
14804 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14805 ibfd);
14806 result = false;
14807 }
14808 /* Use the smallest value specified. */
14809 if (in_attr[i].i < out_attr[i].i)
14810 out_attr[i].i = in_attr[i].i;
14811 break;
14812 case Tag_ABI_PCS_wchar_t:
14813 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
14814 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
14815 {
14816 _bfd_error_handler
14817 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14818 ibfd, in_attr[i].i, out_attr[i].i);
14819 }
14820 else if (in_attr[i].i && !out_attr[i].i)
14821 out_attr[i].i = in_attr[i].i;
14822 break;
14823 case Tag_ABI_enum_size:
14824 if (in_attr[i].i != AEABI_enum_unused)
14825 {
14826 if (out_attr[i].i == AEABI_enum_unused
14827 || out_attr[i].i == AEABI_enum_forced_wide)
14828 {
14829 /* The existing object is compatible with anything.
14830 Use whatever requirements the new object has. */
14831 out_attr[i].i = in_attr[i].i;
14832 }
14833 else if (in_attr[i].i != AEABI_enum_forced_wide
14834 && out_attr[i].i != in_attr[i].i
14835 && !elf_arm_tdata (obfd)->no_enum_size_warning)
14836 {
14837 static const char *aeabi_enum_names[] =
14838 { "", "variable-size", "32-bit", "" };
14839 const char *in_name =
14840 in_attr[i].i < ARRAY_SIZE (aeabi_enum_names)
14841 ? aeabi_enum_names[in_attr[i].i]
14842 : "<unknown>";
14843 const char *out_name =
14844 out_attr[i].i < ARRAY_SIZE (aeabi_enum_names)
14845 ? aeabi_enum_names[out_attr[i].i]
14846 : "<unknown>";
14847 _bfd_error_handler
14848 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14849 ibfd, in_name, out_name);
14850 }
14851 }
14852 break;
14853 case Tag_ABI_VFP_args:
14854 /* Aready done. */
14855 break;
14856 case Tag_ABI_WMMX_args:
14857 if (in_attr[i].i != out_attr[i].i)
14858 {
14859 _bfd_error_handler
14860 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14861 ibfd, obfd);
14862 result = false;
14863 }
14864 break;
14865 case Tag_compatibility:
14866 /* Merged in target-independent code. */
14867 break;
14868 case Tag_ABI_HardFP_use:
14869 /* This is handled along with Tag_FP_arch. */
14870 break;
14871 case Tag_ABI_FP_16bit_format:
14872 if (in_attr[i].i != 0 && out_attr[i].i != 0)
14873 {
14874 if (in_attr[i].i != out_attr[i].i)
14875 {
14876 _bfd_error_handler
14877 (_("error: fp16 format mismatch between %pB and %pB"),
14878 ibfd, obfd);
14879 result = false;
14880 }
14881 }
14882 if (in_attr[i].i != 0)
14883 out_attr[i].i = in_attr[i].i;
14884 break;
14885
14886 case Tag_DIV_use:
14887 /* A value of zero on input means that the divide instruction may
14888 be used if available in the base architecture as specified via
14889 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14890 the user did not want divide instructions. A value of 2
14891 explicitly means that divide instructions were allowed in ARM
14892 and Thumb state. */
14893 if (in_attr[i].i == out_attr[i].i)
14894 /* Do nothing. */ ;
14895 else if (elf32_arm_attributes_forbid_div (in_attr)
14896 && !elf32_arm_attributes_accept_div (out_attr))
14897 out_attr[i].i = 1;
14898 else if (elf32_arm_attributes_forbid_div (out_attr)
14899 && elf32_arm_attributes_accept_div (in_attr))
14900 out_attr[i].i = in_attr[i].i;
14901 else if (in_attr[i].i == 2)
14902 out_attr[i].i = in_attr[i].i;
14903 break;
14904
14905 case Tag_MPextension_use_legacy:
14906 /* We don't output objects with Tag_MPextension_use_legacy - we
14907 move the value to Tag_MPextension_use. */
14908 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
14909 {
14910 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
14911 {
14912 _bfd_error_handler
14913 (_("%pB has both the current and legacy "
14914 "Tag_MPextension_use attributes"),
14915 ibfd);
14916 result = false;
14917 }
14918 }
14919
14920 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
14921 out_attr[Tag_MPextension_use] = in_attr[i];
14922
14923 break;
14924
14925 case Tag_nodefaults:
14926 /* This tag is set if it exists, but the value is unused (and is
14927 typically zero). We don't actually need to do anything here -
14928 the merge happens automatically when the type flags are merged
14929 below. */
14930 break;
14931 case Tag_also_compatible_with:
14932 /* Already done in Tag_CPU_arch. */
14933 break;
14934 case Tag_conformance:
14935 /* Keep the attribute if it matches. Throw it away otherwise.
14936 No attribute means no claim to conform. */
14937 if (!in_attr[i].s || !out_attr[i].s
14938 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
14939 out_attr[i].s = NULL;
14940 break;
14941
14942 default:
14943 result
14944 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
14945 }
14946
14947 /* If out_attr was copied from in_attr then it won't have a type yet. */
14948 if (in_attr[i].type && !out_attr[i].type)
14949 out_attr[i].type = in_attr[i].type;
14950 }
14951
14952 /* Merge Tag_compatibility attributes and any common GNU ones. */
14953 if (!_bfd_elf_merge_object_attributes (ibfd, info))
14954 return false;
14955
14956 /* Check for any attributes not known on ARM. */
14957 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
14958
14959 return result;
14960 }
14961
14962
14963 /* Return TRUE if the two EABI versions are incompatible. */
14964
14965 static bool
14966 elf32_arm_versions_compatible (unsigned iver, unsigned over)
14967 {
14968 /* v4 and v5 are the same spec before and after it was released,
14969 so allow mixing them. */
14970 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
14971 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
14972 return true;
14973
14974 return (iver == over);
14975 }
14976
14977 /* Merge backend specific data from an object file to the output
14978 object file when linking. */
14979
14980 static bool
14981 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
14982
14983 /* Display the flags field. */
14984
14985 static bool
14986 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
14987 {
14988 FILE * file = (FILE *) ptr;
14989 unsigned long flags;
14990
14991 BFD_ASSERT (abfd != NULL && ptr != NULL);
14992
14993 /* Print normal ELF private data. */
14994 _bfd_elf_print_private_bfd_data (abfd, ptr);
14995
14996 flags = elf_elfheader (abfd)->e_flags;
14997 /* Ignore init flag - it may not be set, despite the flags field
14998 containing valid data. */
14999
15000 fprintf (file, _("private flags = 0x%lx:"), elf_elfheader (abfd)->e_flags);
15001
15002 switch (EF_ARM_EABI_VERSION (flags))
15003 {
15004 case EF_ARM_EABI_UNKNOWN:
15005 /* The following flag bits are GNU extensions and not part of the
15006 official ARM ELF extended ABI. Hence they are only decoded if
15007 the EABI version is not set. */
15008 if (flags & EF_ARM_INTERWORK)
15009 fprintf (file, _(" [interworking enabled]"));
15010
15011 if (flags & EF_ARM_APCS_26)
15012 fprintf (file, " [APCS-26]");
15013 else
15014 fprintf (file, " [APCS-32]");
15015
15016 if (flags & EF_ARM_VFP_FLOAT)
15017 fprintf (file, _(" [VFP float format]"));
15018 else if (flags & EF_ARM_MAVERICK_FLOAT)
15019 fprintf (file, _(" [Maverick float format]"));
15020 else
15021 fprintf (file, _(" [FPA float format]"));
15022
15023 if (flags & EF_ARM_APCS_FLOAT)
15024 fprintf (file, _(" [floats passed in float registers]"));
15025
15026 if (flags & EF_ARM_PIC)
15027 fprintf (file, _(" [position independent]"));
15028
15029 if (flags & EF_ARM_NEW_ABI)
15030 fprintf (file, _(" [new ABI]"));
15031
15032 if (flags & EF_ARM_OLD_ABI)
15033 fprintf (file, _(" [old ABI]"));
15034
15035 if (flags & EF_ARM_SOFT_FLOAT)
15036 fprintf (file, _(" [software FP]"));
15037
15038 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
15039 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
15040 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
15041 | EF_ARM_MAVERICK_FLOAT);
15042 break;
15043
15044 case EF_ARM_EABI_VER1:
15045 fprintf (file, _(" [Version1 EABI]"));
15046
15047 if (flags & EF_ARM_SYMSARESORTED)
15048 fprintf (file, _(" [sorted symbol table]"));
15049 else
15050 fprintf (file, _(" [unsorted symbol table]"));
15051
15052 flags &= ~ EF_ARM_SYMSARESORTED;
15053 break;
15054
15055 case EF_ARM_EABI_VER2:
15056 fprintf (file, _(" [Version2 EABI]"));
15057
15058 if (flags & EF_ARM_SYMSARESORTED)
15059 fprintf (file, _(" [sorted symbol table]"));
15060 else
15061 fprintf (file, _(" [unsorted symbol table]"));
15062
15063 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
15064 fprintf (file, _(" [dynamic symbols use segment index]"));
15065
15066 if (flags & EF_ARM_MAPSYMSFIRST)
15067 fprintf (file, _(" [mapping symbols precede others]"));
15068
15069 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
15070 | EF_ARM_MAPSYMSFIRST);
15071 break;
15072
15073 case EF_ARM_EABI_VER3:
15074 fprintf (file, _(" [Version3 EABI]"));
15075 break;
15076
15077 case EF_ARM_EABI_VER4:
15078 fprintf (file, _(" [Version4 EABI]"));
15079 goto eabi;
15080
15081 case EF_ARM_EABI_VER5:
15082 fprintf (file, _(" [Version5 EABI]"));
15083
15084 if (flags & EF_ARM_ABI_FLOAT_SOFT)
15085 fprintf (file, _(" [soft-float ABI]"));
15086
15087 if (flags & EF_ARM_ABI_FLOAT_HARD)
15088 fprintf (file, _(" [hard-float ABI]"));
15089
15090 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
15091
15092 eabi:
15093 if (flags & EF_ARM_BE8)
15094 fprintf (file, _(" [BE8]"));
15095
15096 if (flags & EF_ARM_LE8)
15097 fprintf (file, _(" [LE8]"));
15098
15099 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
15100 break;
15101
15102 default:
15103 fprintf (file, _(" <EABI version unrecognised>"));
15104 break;
15105 }
15106
15107 flags &= ~ EF_ARM_EABIMASK;
15108
15109 if (flags & EF_ARM_RELEXEC)
15110 fprintf (file, _(" [relocatable executable]"));
15111
15112 if (flags & EF_ARM_PIC)
15113 fprintf (file, _(" [position independent]"));
15114
15115 if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC)
15116 fprintf (file, _(" [FDPIC ABI supplement]"));
15117
15118 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC);
15119
15120 if (flags)
15121 fprintf (file, _(" <Unrecognised flag bits set>"));
15122
15123 fputc ('\n', file);
15124
15125 return true;
15126 }
15127
15128 static int
15129 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
15130 {
15131 switch (ELF_ST_TYPE (elf_sym->st_info))
15132 {
15133 case STT_ARM_TFUNC:
15134 return ELF_ST_TYPE (elf_sym->st_info);
15135
15136 case STT_ARM_16BIT:
15137 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
15138 This allows us to distinguish between data used by Thumb instructions
15139 and non-data (which is probably code) inside Thumb regions of an
15140 executable. */
15141 if (type != STT_OBJECT && type != STT_TLS)
15142 return ELF_ST_TYPE (elf_sym->st_info);
15143 break;
15144
15145 default:
15146 break;
15147 }
15148
15149 return type;
15150 }
15151
15152 static asection *
15153 elf32_arm_gc_mark_hook (asection *sec,
15154 struct bfd_link_info *info,
15155 Elf_Internal_Rela *rel,
15156 struct elf_link_hash_entry *h,
15157 Elf_Internal_Sym *sym)
15158 {
15159 if (h != NULL)
15160 switch (ELF32_R_TYPE (rel->r_info))
15161 {
15162 case R_ARM_GNU_VTINHERIT:
15163 case R_ARM_GNU_VTENTRY:
15164 return NULL;
15165 }
15166
15167 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
15168 }
15169
15170 /* Look through the relocs for a section during the first phase. */
15171
15172 static bool
15173 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
15174 asection *sec, const Elf_Internal_Rela *relocs)
15175 {
15176 Elf_Internal_Shdr *symtab_hdr;
15177 struct elf_link_hash_entry **sym_hashes;
15178 const Elf_Internal_Rela *rel;
15179 const Elf_Internal_Rela *rel_end;
15180 bfd *dynobj;
15181 asection *sreloc;
15182 struct elf32_arm_link_hash_table *htab;
15183 bool call_reloc_p;
15184 bool may_become_dynamic_p;
15185 bool may_need_local_target_p;
15186 unsigned long nsyms;
15187
15188 if (bfd_link_relocatable (info))
15189 return true;
15190
15191 BFD_ASSERT (is_arm_elf (abfd));
15192
15193 htab = elf32_arm_hash_table (info);
15194 if (htab == NULL)
15195 return false;
15196
15197 sreloc = NULL;
15198
15199 /* Create dynamic sections for relocatable executables so that we can
15200 copy relocations. */
15201 if (htab->root.is_relocatable_executable
15202 && ! htab->root.dynamic_sections_created)
15203 {
15204 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
15205 return false;
15206 }
15207
15208 if (htab->root.dynobj == NULL)
15209 htab->root.dynobj = abfd;
15210 if (!create_ifunc_sections (info))
15211 return false;
15212
15213 dynobj = htab->root.dynobj;
15214
15215 symtab_hdr = & elf_symtab_hdr (abfd);
15216 sym_hashes = elf_sym_hashes (abfd);
15217 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
15218
15219 rel_end = relocs + sec->reloc_count;
15220 for (rel = relocs; rel < rel_end; rel++)
15221 {
15222 Elf_Internal_Sym *isym;
15223 struct elf_link_hash_entry *h;
15224 struct elf32_arm_link_hash_entry *eh;
15225 unsigned int r_symndx;
15226 int r_type;
15227
15228 r_symndx = ELF32_R_SYM (rel->r_info);
15229 r_type = ELF32_R_TYPE (rel->r_info);
15230 r_type = arm_real_reloc_type (htab, r_type);
15231
15232 if (r_symndx >= nsyms
15233 /* PR 9934: It is possible to have relocations that do not
15234 refer to symbols, thus it is also possible to have an
15235 object file containing relocations but no symbol table. */
15236 && (r_symndx > STN_UNDEF || nsyms > 0))
15237 {
15238 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
15239 r_symndx);
15240 return false;
15241 }
15242
15243 h = NULL;
15244 isym = NULL;
15245 if (nsyms > 0)
15246 {
15247 if (r_symndx < symtab_hdr->sh_info)
15248 {
15249 /* A local symbol. */
15250 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache,
15251 abfd, r_symndx);
15252 if (isym == NULL)
15253 return false;
15254 }
15255 else
15256 {
15257 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
15258 while (h->root.type == bfd_link_hash_indirect
15259 || h->root.type == bfd_link_hash_warning)
15260 h = (struct elf_link_hash_entry *) h->root.u.i.link;
15261 }
15262 }
15263
15264 eh = (struct elf32_arm_link_hash_entry *) h;
15265
15266 call_reloc_p = false;
15267 may_become_dynamic_p = false;
15268 may_need_local_target_p = false;
15269
15270 /* Could be done earlier, if h were already available. */
15271 r_type = elf32_arm_tls_transition (info, r_type, h);
15272 switch (r_type)
15273 {
15274 case R_ARM_GOTOFFFUNCDESC:
15275 {
15276 if (h == NULL)
15277 {
15278 if (!elf32_arm_allocate_local_sym_info (abfd))
15279 return false;
15280 elf32_arm_local_fdpic_cnts (abfd) [r_symndx].gotofffuncdesc_cnt += 1;
15281 elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_offset = -1;
15282 }
15283 else
15284 {
15285 eh->fdpic_cnts.gotofffuncdesc_cnt++;
15286 }
15287 }
15288 break;
15289
15290 case R_ARM_GOTFUNCDESC:
15291 {
15292 if (h == NULL)
15293 {
15294 /* Such a relocation is not supposed to be generated
15295 by gcc on a static function. */
15296 /* Anyway if needed it could be handled. */
15297 return false;
15298 }
15299 else
15300 {
15301 eh->fdpic_cnts.gotfuncdesc_cnt++;
15302 }
15303 }
15304 break;
15305
15306 case R_ARM_FUNCDESC:
15307 {
15308 if (h == NULL)
15309 {
15310 if (!elf32_arm_allocate_local_sym_info (abfd))
15311 return false;
15312 elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_cnt += 1;
15313 elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_offset = -1;
15314 }
15315 else
15316 {
15317 eh->fdpic_cnts.funcdesc_cnt++;
15318 }
15319 }
15320 break;
15321
15322 case R_ARM_GOT32:
15323 case R_ARM_GOT_PREL:
15324 case R_ARM_TLS_GD32:
15325 case R_ARM_TLS_GD32_FDPIC:
15326 case R_ARM_TLS_IE32:
15327 case R_ARM_TLS_IE32_FDPIC:
15328 case R_ARM_TLS_GOTDESC:
15329 case R_ARM_TLS_DESCSEQ:
15330 case R_ARM_THM_TLS_DESCSEQ:
15331 case R_ARM_TLS_CALL:
15332 case R_ARM_THM_TLS_CALL:
15333 /* This symbol requires a global offset table entry. */
15334 {
15335 int tls_type, old_tls_type;
15336
15337 switch (r_type)
15338 {
15339 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
15340 case R_ARM_TLS_GD32_FDPIC: tls_type = GOT_TLS_GD; break;
15341
15342 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
15343 case R_ARM_TLS_IE32_FDPIC: tls_type = GOT_TLS_IE; break;
15344
15345 case R_ARM_TLS_GOTDESC:
15346 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
15347 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
15348 tls_type = GOT_TLS_GDESC; break;
15349
15350 default: tls_type = GOT_NORMAL; break;
15351 }
15352
15353 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
15354 info->flags |= DF_STATIC_TLS;
15355
15356 if (h != NULL)
15357 {
15358 h->got.refcount++;
15359 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
15360 }
15361 else
15362 {
15363 /* This is a global offset table entry for a local symbol. */
15364 if (!elf32_arm_allocate_local_sym_info (abfd))
15365 return false;
15366 elf_local_got_refcounts (abfd)[r_symndx] += 1;
15367 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
15368 }
15369
15370 /* If a variable is accessed with both tls methods, two
15371 slots may be created. */
15372 if (GOT_TLS_GD_ANY_P (old_tls_type)
15373 && GOT_TLS_GD_ANY_P (tls_type))
15374 tls_type |= old_tls_type;
15375
15376 /* We will already have issued an error message if there
15377 is a TLS/non-TLS mismatch, based on the symbol
15378 type. So just combine any TLS types needed. */
15379 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
15380 && tls_type != GOT_NORMAL)
15381 tls_type |= old_tls_type;
15382
15383 /* If the symbol is accessed in both IE and GDESC
15384 method, we're able to relax. Turn off the GDESC flag,
15385 without messing up with any other kind of tls types
15386 that may be involved. */
15387 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
15388 tls_type &= ~GOT_TLS_GDESC;
15389
15390 if (old_tls_type != tls_type)
15391 {
15392 if (h != NULL)
15393 elf32_arm_hash_entry (h)->tls_type = tls_type;
15394 else
15395 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
15396 }
15397 }
15398 /* Fall through. */
15399
15400 case R_ARM_TLS_LDM32:
15401 case R_ARM_TLS_LDM32_FDPIC:
15402 if (r_type == R_ARM_TLS_LDM32 || r_type == R_ARM_TLS_LDM32_FDPIC)
15403 htab->tls_ldm_got.refcount++;
15404 /* Fall through. */
15405
15406 case R_ARM_GOTOFF32:
15407 case R_ARM_GOTPC:
15408 if (htab->root.sgot == NULL
15409 && !create_got_section (htab->root.dynobj, info))
15410 return false;
15411 break;
15412
15413 case R_ARM_PC24:
15414 case R_ARM_PLT32:
15415 case R_ARM_CALL:
15416 case R_ARM_JUMP24:
15417 case R_ARM_PREL31:
15418 case R_ARM_THM_CALL:
15419 case R_ARM_THM_JUMP24:
15420 case R_ARM_THM_JUMP19:
15421 call_reloc_p = true;
15422 may_need_local_target_p = true;
15423 break;
15424
15425 case R_ARM_ABS12:
15426 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15427 ldr __GOTT_INDEX__ offsets. */
15428 if (htab->root.target_os != is_vxworks)
15429 {
15430 may_need_local_target_p = true;
15431 break;
15432 }
15433 else goto jump_over;
15434
15435 /* Fall through. */
15436
15437 case R_ARM_MOVW_ABS_NC:
15438 case R_ARM_MOVT_ABS:
15439 case R_ARM_THM_MOVW_ABS_NC:
15440 case R_ARM_THM_MOVT_ABS:
15441 if (bfd_link_pic (info))
15442 {
15443 _bfd_error_handler
15444 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15445 abfd, elf32_arm_howto_table_1[r_type].name,
15446 (h) ? h->root.root.string : "a local symbol");
15447 bfd_set_error (bfd_error_bad_value);
15448 return false;
15449 }
15450
15451 /* Fall through. */
15452 case R_ARM_ABS32:
15453 case R_ARM_ABS32_NOI:
15454 jump_over:
15455 if (h != NULL && bfd_link_executable (info))
15456 {
15457 h->pointer_equality_needed = 1;
15458 }
15459 /* Fall through. */
15460 case R_ARM_REL32:
15461 case R_ARM_REL32_NOI:
15462 case R_ARM_MOVW_PREL_NC:
15463 case R_ARM_MOVT_PREL:
15464 case R_ARM_THM_MOVW_PREL_NC:
15465 case R_ARM_THM_MOVT_PREL:
15466
15467 /* Should the interworking branches be listed here? */
15468 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable
15469 || htab->fdpic_p)
15470 && (sec->flags & SEC_ALLOC) != 0)
15471 {
15472 if (h == NULL
15473 && elf32_arm_howto_from_type (r_type)->pc_relative)
15474 {
15475 /* In shared libraries and relocatable executables,
15476 we treat local relative references as calls;
15477 see the related SYMBOL_CALLS_LOCAL code in
15478 allocate_dynrelocs. */
15479 call_reloc_p = true;
15480 may_need_local_target_p = true;
15481 }
15482 else
15483 /* We are creating a shared library or relocatable
15484 executable, and this is a reloc against a global symbol,
15485 or a non-PC-relative reloc against a local symbol.
15486 We may need to copy the reloc into the output. */
15487 may_become_dynamic_p = true;
15488 }
15489 else
15490 may_need_local_target_p = true;
15491 break;
15492
15493 /* This relocation describes the C++ object vtable hierarchy.
15494 Reconstruct it for later use during GC. */
15495 case R_ARM_GNU_VTINHERIT:
15496 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
15497 return false;
15498 break;
15499
15500 /* This relocation describes which C++ vtable entries are actually
15501 used. Record for later use during GC. */
15502 case R_ARM_GNU_VTENTRY:
15503 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
15504 return false;
15505 break;
15506 }
15507
15508 if (h != NULL)
15509 {
15510 if (call_reloc_p)
15511 /* We may need a .plt entry if the function this reloc
15512 refers to is in a different object, regardless of the
15513 symbol's type. We can't tell for sure yet, because
15514 something later might force the symbol local. */
15515 h->needs_plt = 1;
15516 else if (may_need_local_target_p)
15517 /* If this reloc is in a read-only section, we might
15518 need a copy reloc. We can't check reliably at this
15519 stage whether the section is read-only, as input
15520 sections have not yet been mapped to output sections.
15521 Tentatively set the flag for now, and correct in
15522 adjust_dynamic_symbol. */
15523 h->non_got_ref = 1;
15524 }
15525
15526 if (may_need_local_target_p
15527 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
15528 {
15529 union gotplt_union *root_plt;
15530 struct arm_plt_info *arm_plt;
15531 struct arm_local_iplt_info *local_iplt;
15532
15533 if (h != NULL)
15534 {
15535 root_plt = &h->plt;
15536 arm_plt = &eh->plt;
15537 }
15538 else
15539 {
15540 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
15541 if (local_iplt == NULL)
15542 return false;
15543 root_plt = &local_iplt->root;
15544 arm_plt = &local_iplt->arm;
15545 }
15546
15547 /* If the symbol is a function that doesn't bind locally,
15548 this relocation will need a PLT entry. */
15549 if (root_plt->refcount != -1)
15550 root_plt->refcount += 1;
15551
15552 if (!call_reloc_p)
15553 arm_plt->noncall_refcount++;
15554
15555 /* It's too early to use htab->use_blx here, so we have to
15556 record possible blx references separately from
15557 relocs that definitely need a thumb stub. */
15558
15559 if (r_type == R_ARM_THM_CALL)
15560 arm_plt->maybe_thumb_refcount += 1;
15561
15562 if (r_type == R_ARM_THM_JUMP24
15563 || r_type == R_ARM_THM_JUMP19)
15564 arm_plt->thumb_refcount += 1;
15565 }
15566
15567 if (may_become_dynamic_p)
15568 {
15569 struct elf_dyn_relocs *p, **head;
15570
15571 /* Create a reloc section in dynobj. */
15572 if (sreloc == NULL)
15573 {
15574 sreloc = _bfd_elf_make_dynamic_reloc_section
15575 (sec, dynobj, 2, abfd, ! htab->use_rel);
15576
15577 if (sreloc == NULL)
15578 return false;
15579 }
15580
15581 /* If this is a global symbol, count the number of
15582 relocations we need for this symbol. */
15583 if (h != NULL)
15584 head = &h->dyn_relocs;
15585 else
15586 {
15587 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
15588 if (head == NULL)
15589 return false;
15590 }
15591
15592 p = *head;
15593 if (p == NULL || p->sec != sec)
15594 {
15595 size_t amt = sizeof *p;
15596
15597 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
15598 if (p == NULL)
15599 return false;
15600 p->next = *head;
15601 *head = p;
15602 p->sec = sec;
15603 p->count = 0;
15604 p->pc_count = 0;
15605 }
15606
15607 if (elf32_arm_howto_from_type (r_type)->pc_relative)
15608 p->pc_count += 1;
15609 p->count += 1;
15610 if (h == NULL && htab->fdpic_p && !bfd_link_pic (info)
15611 && r_type != R_ARM_ABS32 && r_type != R_ARM_ABS32_NOI)
15612 {
15613 /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15614 that will become rofixup. */
15615 /* This is due to the fact that we suppose all will become rofixup. */
15616 _bfd_error_handler
15617 (_("FDPIC does not yet support %s relocation"
15618 " to become dynamic for executable"),
15619 elf32_arm_howto_table_1[r_type].name);
15620 abort ();
15621 }
15622 }
15623 }
15624
15625 return true;
15626 }
15627
15628 static void
15629 elf32_arm_update_relocs (asection *o,
15630 struct bfd_elf_section_reloc_data *reldata)
15631 {
15632 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
15633 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
15634 const struct elf_backend_data *bed;
15635 _arm_elf_section_data *eado;
15636 struct bfd_link_order *p;
15637 bfd_byte *erela_head, *erela;
15638 Elf_Internal_Rela *irela_head, *irela;
15639 Elf_Internal_Shdr *rel_hdr;
15640 bfd *abfd;
15641 unsigned int count;
15642
15643 eado = get_arm_elf_section_data (o);
15644
15645 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
15646 return;
15647
15648 abfd = o->owner;
15649 bed = get_elf_backend_data (abfd);
15650 rel_hdr = reldata->hdr;
15651
15652 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
15653 {
15654 swap_in = bed->s->swap_reloc_in;
15655 swap_out = bed->s->swap_reloc_out;
15656 }
15657 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
15658 {
15659 swap_in = bed->s->swap_reloca_in;
15660 swap_out = bed->s->swap_reloca_out;
15661 }
15662 else
15663 abort ();
15664
15665 erela_head = rel_hdr->contents;
15666 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
15667 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
15668
15669 erela = erela_head;
15670 irela = irela_head;
15671 count = 0;
15672
15673 for (p = o->map_head.link_order; p; p = p->next)
15674 {
15675 if (p->type == bfd_section_reloc_link_order
15676 || p->type == bfd_symbol_reloc_link_order)
15677 {
15678 (*swap_in) (abfd, erela, irela);
15679 erela += rel_hdr->sh_entsize;
15680 irela++;
15681 count++;
15682 }
15683 else if (p->type == bfd_indirect_link_order)
15684 {
15685 struct bfd_elf_section_reloc_data *input_reldata;
15686 arm_unwind_table_edit *edit_list, *edit_tail;
15687 _arm_elf_section_data *eadi;
15688 bfd_size_type j;
15689 bfd_vma offset;
15690 asection *i;
15691
15692 i = p->u.indirect.section;
15693
15694 eadi = get_arm_elf_section_data (i);
15695 edit_list = eadi->u.exidx.unwind_edit_list;
15696 edit_tail = eadi->u.exidx.unwind_edit_tail;
15697 offset = i->output_offset;
15698
15699 if (eadi->elf.rel.hdr &&
15700 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
15701 input_reldata = &eadi->elf.rel;
15702 else if (eadi->elf.rela.hdr &&
15703 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
15704 input_reldata = &eadi->elf.rela;
15705 else
15706 abort ();
15707
15708 if (edit_list)
15709 {
15710 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15711 {
15712 arm_unwind_table_edit *edit_node, *edit_next;
15713 bfd_vma bias;
15714 bfd_vma reloc_index;
15715
15716 (*swap_in) (abfd, erela, irela);
15717 reloc_index = (irela->r_offset - offset) / 8;
15718
15719 bias = 0;
15720 edit_node = edit_list;
15721 for (edit_next = edit_list;
15722 edit_next && edit_next->index <= reloc_index;
15723 edit_next = edit_node->next)
15724 {
15725 bias++;
15726 edit_node = edit_next;
15727 }
15728
15729 if (edit_node->type != DELETE_EXIDX_ENTRY
15730 || edit_node->index != reloc_index)
15731 {
15732 irela->r_offset -= bias * 8;
15733 irela++;
15734 count++;
15735 }
15736
15737 erela += rel_hdr->sh_entsize;
15738 }
15739
15740 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
15741 {
15742 /* New relocation entity. */
15743 asection *text_sec = edit_tail->linked_section;
15744 asection *text_out = text_sec->output_section;
15745 bfd_vma exidx_offset = offset + i->size - 8;
15746
15747 irela->r_addend = 0;
15748 irela->r_offset = exidx_offset;
15749 irela->r_info = ELF32_R_INFO
15750 (text_out->target_index, R_ARM_PREL31);
15751 irela++;
15752 count++;
15753 }
15754 }
15755 else
15756 {
15757 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15758 {
15759 (*swap_in) (abfd, erela, irela);
15760 erela += rel_hdr->sh_entsize;
15761 irela++;
15762 }
15763
15764 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15765 }
15766 }
15767 }
15768
15769 reldata->count = count;
15770 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15771
15772 erela = erela_head;
15773 irela = irela_head;
15774 while (count > 0)
15775 {
15776 (*swap_out) (abfd, irela, erela);
15777 erela += rel_hdr->sh_entsize;
15778 irela++;
15779 count--;
15780 }
15781
15782 free (irela_head);
15783
15784 /* Hashes are no longer valid. */
15785 free (reldata->hashes);
15786 reldata->hashes = NULL;
15787 }
15788
15789 /* Unwinding tables are not referenced directly. This pass marks them as
15790 required if the corresponding code section is marked. Similarly, ARMv8-M
15791 secure entry functions can only be referenced by SG veneers which are
15792 created after the GC process. They need to be marked in case they reside in
15793 their own section (as would be the case if code was compiled with
15794 -ffunction-sections). */
15795
15796 static bool
15797 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15798 elf_gc_mark_hook_fn gc_mark_hook)
15799 {
15800 bfd *sub;
15801 Elf_Internal_Shdr **elf_shdrp;
15802 asection *cmse_sec;
15803 obj_attribute *out_attr;
15804 Elf_Internal_Shdr *symtab_hdr;
15805 unsigned i, sym_count, ext_start;
15806 const struct elf_backend_data *bed;
15807 struct elf_link_hash_entry **sym_hashes;
15808 struct elf32_arm_link_hash_entry *cmse_hash;
15809 bool again, is_v8m, first_bfd_browse = true;
15810 bool debug_sec_need_to_be_marked = false;
15811 asection *isec;
15812
15813 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15814
15815 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15816 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15817 && out_attr[Tag_CPU_arch_profile].i == 'M';
15818
15819 /* Marking EH data may cause additional code sections to be marked,
15820 requiring multiple passes. */
15821 again = true;
15822 while (again)
15823 {
15824 again = false;
15825 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15826 {
15827 asection *o;
15828
15829 if (! is_arm_elf (sub))
15830 continue;
15831
15832 elf_shdrp = elf_elfsections (sub);
15833 for (o = sub->sections; o != NULL; o = o->next)
15834 {
15835 Elf_Internal_Shdr *hdr;
15836
15837 hdr = &elf_section_data (o)->this_hdr;
15838 if (hdr->sh_type == SHT_ARM_EXIDX
15839 && hdr->sh_link
15840 && hdr->sh_link < elf_numsections (sub)
15841 && !o->gc_mark
15842 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15843 {
15844 again = true;
15845 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15846 return false;
15847 }
15848 }
15849
15850 /* Mark section holding ARMv8-M secure entry functions. We mark all
15851 of them so no need for a second browsing. */
15852 if (is_v8m && first_bfd_browse)
15853 {
15854 sym_hashes = elf_sym_hashes (sub);
15855 bed = get_elf_backend_data (sub);
15856 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15857 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15858 ext_start = symtab_hdr->sh_info;
15859
15860 /* Scan symbols. */
15861 for (i = ext_start; i < sym_count; i++)
15862 {
15863 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15864
15865 /* Assume it is a special symbol. If not, cmse_scan will
15866 warn about it and user can do something about it. */
15867 if (startswith (cmse_hash->root.root.root.string,
15868 CMSE_PREFIX))
15869 {
15870 cmse_sec = cmse_hash->root.root.u.def.section;
15871 if (!cmse_sec->gc_mark
15872 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15873 return false;
15874 /* The debug sections related to these secure entry
15875 functions are marked on enabling below flag. */
15876 debug_sec_need_to_be_marked = true;
15877 }
15878 }
15879
15880 if (debug_sec_need_to_be_marked)
15881 {
15882 /* Looping over all the sections of the object file containing
15883 Armv8-M secure entry functions and marking all the debug
15884 sections. */
15885 for (isec = sub->sections; isec != NULL; isec = isec->next)
15886 {
15887 /* If not a debug sections, skip it. */
15888 if (!isec->gc_mark && (isec->flags & SEC_DEBUGGING))
15889 isec->gc_mark = 1 ;
15890 }
15891 debug_sec_need_to_be_marked = false;
15892 }
15893 }
15894 }
15895 first_bfd_browse = false;
15896 }
15897
15898 return true;
15899 }
15900
15901 /* Treat mapping symbols as special target symbols. */
15902
15903 static bool
15904 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
15905 {
15906 return bfd_is_arm_special_symbol_name (sym->name,
15907 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
15908 }
15909
15910 /* If the ELF symbol SYM might be a function in SEC, return the
15911 function size and set *CODE_OFF to the function's entry point,
15912 otherwise return zero. */
15913
15914 static bfd_size_type
15915 elf32_arm_maybe_function_sym (const asymbol *sym, asection *sec,
15916 bfd_vma *code_off)
15917 {
15918 bfd_size_type size;
15919 elf_symbol_type * elf_sym = (elf_symbol_type *) sym;
15920
15921 if ((sym->flags & (BSF_SECTION_SYM | BSF_FILE | BSF_OBJECT
15922 | BSF_THREAD_LOCAL | BSF_RELC | BSF_SRELC)) != 0
15923 || sym->section != sec)
15924 return 0;
15925
15926 size = (sym->flags & BSF_SYNTHETIC) ? 0 : elf_sym->internal_elf_sym.st_size;
15927
15928 if (!(sym->flags & BSF_SYNTHETIC))
15929 switch (ELF_ST_TYPE (elf_sym->internal_elf_sym.st_info))
15930 {
15931 case STT_NOTYPE:
15932 /* Ignore symbols created by the annobin plugin for gcc and clang.
15933 These symbols are hidden, local, notype and have a size of 0. */
15934 if (size == 0
15935 && sym->flags & BSF_LOCAL
15936 && ELF_ST_VISIBILITY (elf_sym->internal_elf_sym.st_other) == STV_HIDDEN)
15937 return 0;
15938 /* Fall through. */
15939 case STT_FUNC:
15940 case STT_ARM_TFUNC:
15941 /* FIXME: Allow STT_GNU_IFUNC as well ? */
15942 break;
15943 default:
15944 return 0;
15945 }
15946
15947 if ((sym->flags & BSF_LOCAL)
15948 && bfd_is_arm_special_symbol_name (sym->name,
15949 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
15950 return 0;
15951
15952 *code_off = sym->value;
15953
15954 /* Do not return 0 for the function's size. */
15955 return size ? size : 1;
15956
15957 }
15958
15959 static bool
15960 elf32_arm_find_inliner_info (bfd * abfd,
15961 const char ** filename_ptr,
15962 const char ** functionname_ptr,
15963 unsigned int * line_ptr)
15964 {
15965 bool found;
15966 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
15967 functionname_ptr, line_ptr,
15968 & elf_tdata (abfd)->dwarf2_find_line_info);
15969 return found;
15970 }
15971
15972 /* Adjust a symbol defined by a dynamic object and referenced by a
15973 regular object. The current definition is in some section of the
15974 dynamic object, but we're not including those sections. We have to
15975 change the definition to something the rest of the link can
15976 understand. */
15977
15978 static bool
15979 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
15980 struct elf_link_hash_entry * h)
15981 {
15982 bfd * dynobj;
15983 asection *s, *srel;
15984 struct elf32_arm_link_hash_entry * eh;
15985 struct elf32_arm_link_hash_table *globals;
15986
15987 globals = elf32_arm_hash_table (info);
15988 if (globals == NULL)
15989 return false;
15990
15991 dynobj = elf_hash_table (info)->dynobj;
15992
15993 /* Make sure we know what is going on here. */
15994 BFD_ASSERT (dynobj != NULL
15995 && (h->needs_plt
15996 || h->type == STT_GNU_IFUNC
15997 || h->is_weakalias
15998 || (h->def_dynamic
15999 && h->ref_regular
16000 && !h->def_regular)));
16001
16002 eh = (struct elf32_arm_link_hash_entry *) h;
16003
16004 /* If this is a function, put it in the procedure linkage table. We
16005 will fill in the contents of the procedure linkage table later,
16006 when we know the address of the .got section. */
16007 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
16008 {
16009 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
16010 symbol binds locally. */
16011 if (h->plt.refcount <= 0
16012 || (h->type != STT_GNU_IFUNC
16013 && (SYMBOL_CALLS_LOCAL (info, h)
16014 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16015 && h->root.type == bfd_link_hash_undefweak))))
16016 {
16017 /* This case can occur if we saw a PLT32 reloc in an input
16018 file, but the symbol was never referred to by a dynamic
16019 object, or if all references were garbage collected. In
16020 such a case, we don't actually need to build a procedure
16021 linkage table, and we can just do a PC24 reloc instead. */
16022 h->plt.offset = (bfd_vma) -1;
16023 eh->plt.thumb_refcount = 0;
16024 eh->plt.maybe_thumb_refcount = 0;
16025 eh->plt.noncall_refcount = 0;
16026 h->needs_plt = 0;
16027 }
16028
16029 return true;
16030 }
16031 else
16032 {
16033 /* It's possible that we incorrectly decided a .plt reloc was
16034 needed for an R_ARM_PC24 or similar reloc to a non-function sym
16035 in check_relocs. We can't decide accurately between function
16036 and non-function syms in check-relocs; Objects loaded later in
16037 the link may change h->type. So fix it now. */
16038 h->plt.offset = (bfd_vma) -1;
16039 eh->plt.thumb_refcount = 0;
16040 eh->plt.maybe_thumb_refcount = 0;
16041 eh->plt.noncall_refcount = 0;
16042 }
16043
16044 /* If this is a weak symbol, and there is a real definition, the
16045 processor independent code will have arranged for us to see the
16046 real definition first, and we can just use the same value. */
16047 if (h->is_weakalias)
16048 {
16049 struct elf_link_hash_entry *def = weakdef (h);
16050 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
16051 h->root.u.def.section = def->root.u.def.section;
16052 h->root.u.def.value = def->root.u.def.value;
16053 return true;
16054 }
16055
16056 /* If there are no non-GOT references, we do not need a copy
16057 relocation. */
16058 if (!h->non_got_ref)
16059 return true;
16060
16061 /* This is a reference to a symbol defined by a dynamic object which
16062 is not a function. */
16063
16064 /* If we are creating a shared library, we must presume that the
16065 only references to the symbol are via the global offset table.
16066 For such cases we need not do anything here; the relocations will
16067 be handled correctly by relocate_section. Relocatable executables
16068 can reference data in shared objects directly, so we don't need to
16069 do anything here. */
16070 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
16071 return true;
16072
16073 /* We must allocate the symbol in our .dynbss section, which will
16074 become part of the .bss section of the executable. There will be
16075 an entry for this symbol in the .dynsym section. The dynamic
16076 object will contain position independent code, so all references
16077 from the dynamic object to this symbol will go through the global
16078 offset table. The dynamic linker will use the .dynsym entry to
16079 determine the address it must put in the global offset table, so
16080 both the dynamic object and the regular object will refer to the
16081 same memory location for the variable. */
16082 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
16083 linker to copy the initial value out of the dynamic object and into
16084 the runtime process image. We need to remember the offset into the
16085 .rel(a).bss section we are going to use. */
16086 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
16087 {
16088 s = globals->root.sdynrelro;
16089 srel = globals->root.sreldynrelro;
16090 }
16091 else
16092 {
16093 s = globals->root.sdynbss;
16094 srel = globals->root.srelbss;
16095 }
16096 if (info->nocopyreloc == 0
16097 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
16098 && h->size != 0)
16099 {
16100 elf32_arm_allocate_dynrelocs (info, srel, 1);
16101 h->needs_copy = 1;
16102 }
16103
16104 return _bfd_elf_adjust_dynamic_copy (info, h, s);
16105 }
16106
16107 /* Allocate space in .plt, .got and associated reloc sections for
16108 dynamic relocs. */
16109
16110 static bool
16111 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
16112 {
16113 struct bfd_link_info *info;
16114 struct elf32_arm_link_hash_table *htab;
16115 struct elf32_arm_link_hash_entry *eh;
16116 struct elf_dyn_relocs *p;
16117
16118 if (h->root.type == bfd_link_hash_indirect)
16119 return true;
16120
16121 eh = (struct elf32_arm_link_hash_entry *) h;
16122
16123 info = (struct bfd_link_info *) inf;
16124 htab = elf32_arm_hash_table (info);
16125 if (htab == NULL)
16126 return false;
16127
16128 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
16129 && h->plt.refcount > 0)
16130 {
16131 /* Make sure this symbol is output as a dynamic symbol.
16132 Undefined weak syms won't yet be marked as dynamic. */
16133 if (h->dynindx == -1 && !h->forced_local
16134 && h->root.type == bfd_link_hash_undefweak)
16135 {
16136 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16137 return false;
16138 }
16139
16140 /* If the call in the PLT entry binds locally, the associated
16141 GOT entry should use an R_ARM_IRELATIVE relocation instead of
16142 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
16143 than the .plt section. */
16144 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
16145 {
16146 eh->is_iplt = 1;
16147 if (eh->plt.noncall_refcount == 0
16148 && SYMBOL_REFERENCES_LOCAL (info, h))
16149 /* All non-call references can be resolved directly.
16150 This means that they can (and in some cases, must)
16151 resolve directly to the run-time target, rather than
16152 to the PLT. That in turns means that any .got entry
16153 would be equal to the .igot.plt entry, so there's
16154 no point having both. */
16155 h->got.refcount = 0;
16156 }
16157
16158 if (bfd_link_pic (info)
16159 || eh->is_iplt
16160 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
16161 {
16162 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
16163
16164 /* If this symbol is not defined in a regular file, and we are
16165 not generating a shared library, then set the symbol to this
16166 location in the .plt. This is required to make function
16167 pointers compare as equal between the normal executable and
16168 the shared library. */
16169 if (! bfd_link_pic (info)
16170 && !h->def_regular)
16171 {
16172 h->root.u.def.section = htab->root.splt;
16173 h->root.u.def.value = h->plt.offset;
16174
16175 /* Make sure the function is not marked as Thumb, in case
16176 it is the target of an ABS32 relocation, which will
16177 point to the PLT entry. */
16178 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16179 }
16180
16181 /* VxWorks executables have a second set of relocations for
16182 each PLT entry. They go in a separate relocation section,
16183 which is processed by the kernel loader. */
16184 if (htab->root.target_os == is_vxworks && !bfd_link_pic (info))
16185 {
16186 /* There is a relocation for the initial PLT entry:
16187 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
16188 if (h->plt.offset == htab->plt_header_size)
16189 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
16190
16191 /* There are two extra relocations for each subsequent
16192 PLT entry: an R_ARM_32 relocation for the GOT entry,
16193 and an R_ARM_32 relocation for the PLT entry. */
16194 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
16195 }
16196 }
16197 else
16198 {
16199 h->plt.offset = (bfd_vma) -1;
16200 h->needs_plt = 0;
16201 }
16202 }
16203 else
16204 {
16205 h->plt.offset = (bfd_vma) -1;
16206 h->needs_plt = 0;
16207 }
16208
16209 eh = (struct elf32_arm_link_hash_entry *) h;
16210 eh->tlsdesc_got = (bfd_vma) -1;
16211
16212 if (h->got.refcount > 0)
16213 {
16214 asection *s;
16215 bool dyn;
16216 int tls_type = elf32_arm_hash_entry (h)->tls_type;
16217 int indx;
16218
16219 /* Make sure this symbol is output as a dynamic symbol.
16220 Undefined weak syms won't yet be marked as dynamic. */
16221 if (htab->root.dynamic_sections_created
16222 && h->dynindx == -1
16223 && !h->forced_local
16224 && h->root.type == bfd_link_hash_undefweak)
16225 {
16226 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16227 return false;
16228 }
16229
16230 s = htab->root.sgot;
16231 h->got.offset = s->size;
16232
16233 if (tls_type == GOT_UNKNOWN)
16234 abort ();
16235
16236 if (tls_type == GOT_NORMAL)
16237 /* Non-TLS symbols need one GOT slot. */
16238 s->size += 4;
16239 else
16240 {
16241 if (tls_type & GOT_TLS_GDESC)
16242 {
16243 /* R_ARM_TLS_DESC needs 2 GOT slots. */
16244 eh->tlsdesc_got
16245 = (htab->root.sgotplt->size
16246 - elf32_arm_compute_jump_table_size (htab));
16247 htab->root.sgotplt->size += 8;
16248 h->got.offset = (bfd_vma) -2;
16249 /* plt.got_offset needs to know there's a TLS_DESC
16250 reloc in the middle of .got.plt. */
16251 htab->num_tls_desc++;
16252 }
16253
16254 if (tls_type & GOT_TLS_GD)
16255 {
16256 /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
16257 consecutive GOT slots. If the symbol is both GD
16258 and GDESC, got.offset may have been
16259 overwritten. */
16260 h->got.offset = s->size;
16261 s->size += 8;
16262 }
16263
16264 if (tls_type & GOT_TLS_IE)
16265 /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
16266 slot. */
16267 s->size += 4;
16268 }
16269
16270 dyn = htab->root.dynamic_sections_created;
16271
16272 indx = 0;
16273 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
16274 && (!bfd_link_pic (info)
16275 || !SYMBOL_REFERENCES_LOCAL (info, h)))
16276 indx = h->dynindx;
16277
16278 if (tls_type != GOT_NORMAL
16279 && (bfd_link_dll (info) || indx != 0)
16280 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16281 || h->root.type != bfd_link_hash_undefweak))
16282 {
16283 if (tls_type & GOT_TLS_IE)
16284 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16285
16286 if (tls_type & GOT_TLS_GD)
16287 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16288
16289 if (tls_type & GOT_TLS_GDESC)
16290 {
16291 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
16292 /* GDESC needs a trampoline to jump to. */
16293 htab->tls_trampoline = -1;
16294 }
16295
16296 /* Only GD needs it. GDESC just emits one relocation per
16297 2 entries. */
16298 if ((tls_type & GOT_TLS_GD) && indx != 0)
16299 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16300 }
16301 else if (((indx != -1) || htab->fdpic_p)
16302 && !SYMBOL_REFERENCES_LOCAL (info, h))
16303 {
16304 if (htab->root.dynamic_sections_created)
16305 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
16306 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16307 }
16308 else if (h->type == STT_GNU_IFUNC
16309 && eh->plt.noncall_refcount == 0)
16310 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16311 they all resolve dynamically instead. Reserve room for the
16312 GOT entry's R_ARM_IRELATIVE relocation. */
16313 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
16314 else if (bfd_link_pic (info)
16315 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16316 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
16317 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16318 else if (htab->fdpic_p && tls_type == GOT_NORMAL)
16319 /* Reserve room for rofixup for FDPIC executable. */
16320 /* TLS relocs do not need space since they are completely
16321 resolved. */
16322 htab->srofixup->size += 4;
16323 }
16324 else
16325 h->got.offset = (bfd_vma) -1;
16326
16327 /* FDPIC support. */
16328 if (eh->fdpic_cnts.gotofffuncdesc_cnt > 0)
16329 {
16330 /* Symbol musn't be exported. */
16331 if (h->dynindx != -1)
16332 abort ();
16333
16334 /* We only allocate one function descriptor with its associated
16335 relocation. */
16336 if (eh->fdpic_cnts.funcdesc_offset == -1)
16337 {
16338 asection *s = htab->root.sgot;
16339
16340 eh->fdpic_cnts.funcdesc_offset = s->size;
16341 s->size += 8;
16342 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16343 if (bfd_link_pic (info))
16344 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16345 else
16346 htab->srofixup->size += 8;
16347 }
16348 }
16349
16350 if (eh->fdpic_cnts.gotfuncdesc_cnt > 0)
16351 {
16352 asection *s = htab->root.sgot;
16353
16354 if (htab->root.dynamic_sections_created && h->dynindx == -1
16355 && !h->forced_local)
16356 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16357 return false;
16358
16359 if (h->dynindx == -1)
16360 {
16361 /* We only allocate one function descriptor with its
16362 associated relocation. */
16363 if (eh->fdpic_cnts.funcdesc_offset == -1)
16364 {
16365
16366 eh->fdpic_cnts.funcdesc_offset = s->size;
16367 s->size += 8;
16368 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two
16369 rofixups. */
16370 if (bfd_link_pic (info))
16371 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16372 else
16373 htab->srofixup->size += 8;
16374 }
16375 }
16376
16377 /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16378 R_ARM_RELATIVE/rofixup relocation on it. */
16379 eh->fdpic_cnts.gotfuncdesc_offset = s->size;
16380 s->size += 4;
16381 if (h->dynindx == -1 && !bfd_link_pic (info))
16382 htab->srofixup->size += 4;
16383 else
16384 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16385 }
16386
16387 if (eh->fdpic_cnts.funcdesc_cnt > 0)
16388 {
16389 if (htab->root.dynamic_sections_created && h->dynindx == -1
16390 && !h->forced_local)
16391 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16392 return false;
16393
16394 if (h->dynindx == -1)
16395 {
16396 /* We only allocate one function descriptor with its
16397 associated relocation. */
16398 if (eh->fdpic_cnts.funcdesc_offset == -1)
16399 {
16400 asection *s = htab->root.sgot;
16401
16402 eh->fdpic_cnts.funcdesc_offset = s->size;
16403 s->size += 8;
16404 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two
16405 rofixups. */
16406 if (bfd_link_pic (info))
16407 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16408 else
16409 htab->srofixup->size += 8;
16410 }
16411 }
16412 if (h->dynindx == -1 && !bfd_link_pic (info))
16413 {
16414 /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */
16415 htab->srofixup->size += 4 * eh->fdpic_cnts.funcdesc_cnt;
16416 }
16417 else
16418 {
16419 /* Will need one dynamic reloc per reference. will be either
16420 R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */
16421 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot,
16422 eh->fdpic_cnts.funcdesc_cnt);
16423 }
16424 }
16425
16426 /* Allocate stubs for exported Thumb functions on v4t. */
16427 if (!htab->use_blx && h->dynindx != -1
16428 && h->def_regular
16429 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
16430 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
16431 {
16432 struct elf_link_hash_entry * th;
16433 struct bfd_link_hash_entry * bh;
16434 struct elf_link_hash_entry * myh;
16435 char name[1024];
16436 asection *s;
16437 bh = NULL;
16438 /* Create a new symbol to regist the real location of the function. */
16439 s = h->root.u.def.section;
16440 sprintf (name, "__real_%s", h->root.root.string);
16441 _bfd_generic_link_add_one_symbol (info, s->owner,
16442 name, BSF_GLOBAL, s,
16443 h->root.u.def.value,
16444 NULL, true, false, &bh);
16445
16446 myh = (struct elf_link_hash_entry *) bh;
16447 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
16448 myh->forced_local = 1;
16449 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
16450 eh->export_glue = myh;
16451 th = record_arm_to_thumb_glue (info, h);
16452 /* Point the symbol at the stub. */
16453 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
16454 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16455 h->root.u.def.section = th->root.u.def.section;
16456 h->root.u.def.value = th->root.u.def.value & ~1;
16457 }
16458
16459 if (h->dyn_relocs == NULL)
16460 return true;
16461
16462 /* In the shared -Bsymbolic case, discard space allocated for
16463 dynamic pc-relative relocs against symbols which turn out to be
16464 defined in regular objects. For the normal shared case, discard
16465 space for pc-relative relocs that have become local due to symbol
16466 visibility changes. */
16467
16468 if (bfd_link_pic (info)
16469 || htab->root.is_relocatable_executable
16470 || htab->fdpic_p)
16471 {
16472 /* Relocs that use pc_count are PC-relative forms, which will appear
16473 on something like ".long foo - ." or "movw REG, foo - .". We want
16474 calls to protected symbols to resolve directly to the function
16475 rather than going via the plt. If people want function pointer
16476 comparisons to work as expected then they should avoid writing
16477 assembly like ".long foo - .". */
16478 if (SYMBOL_CALLS_LOCAL (info, h))
16479 {
16480 struct elf_dyn_relocs **pp;
16481
16482 for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
16483 {
16484 p->count -= p->pc_count;
16485 p->pc_count = 0;
16486 if (p->count == 0)
16487 *pp = p->next;
16488 else
16489 pp = &p->next;
16490 }
16491 }
16492
16493 if (htab->root.target_os == is_vxworks)
16494 {
16495 struct elf_dyn_relocs **pp;
16496
16497 for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
16498 {
16499 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
16500 *pp = p->next;
16501 else
16502 pp = &p->next;
16503 }
16504 }
16505
16506 /* Also discard relocs on undefined weak syms with non-default
16507 visibility. */
16508 if (h->dyn_relocs != NULL
16509 && h->root.type == bfd_link_hash_undefweak)
16510 {
16511 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16512 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16513 h->dyn_relocs = NULL;
16514
16515 /* Make sure undefined weak symbols are output as a dynamic
16516 symbol in PIEs. */
16517 else if (htab->root.dynamic_sections_created && h->dynindx == -1
16518 && !h->forced_local)
16519 {
16520 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16521 return false;
16522 }
16523 }
16524
16525 else if (htab->root.is_relocatable_executable && h->dynindx == -1
16526 && h->root.type == bfd_link_hash_new)
16527 {
16528 /* Output absolute symbols so that we can create relocations
16529 against them. For normal symbols we output a relocation
16530 against the section that contains them. */
16531 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16532 return false;
16533 }
16534
16535 }
16536 else
16537 {
16538 /* For the non-shared case, discard space for relocs against
16539 symbols which turn out to need copy relocs or are not
16540 dynamic. */
16541
16542 if (!h->non_got_ref
16543 && ((h->def_dynamic
16544 && !h->def_regular)
16545 || (htab->root.dynamic_sections_created
16546 && (h->root.type == bfd_link_hash_undefweak
16547 || h->root.type == bfd_link_hash_undefined))))
16548 {
16549 /* Make sure this symbol is output as a dynamic symbol.
16550 Undefined weak syms won't yet be marked as dynamic. */
16551 if (h->dynindx == -1 && !h->forced_local
16552 && h->root.type == bfd_link_hash_undefweak)
16553 {
16554 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16555 return false;
16556 }
16557
16558 /* If that succeeded, we know we'll be keeping all the
16559 relocs. */
16560 if (h->dynindx != -1)
16561 goto keep;
16562 }
16563
16564 h->dyn_relocs = NULL;
16565
16566 keep: ;
16567 }
16568
16569 /* Finally, allocate space. */
16570 for (p = h->dyn_relocs; p != NULL; p = p->next)
16571 {
16572 asection *sreloc = elf_section_data (p->sec)->sreloc;
16573
16574 if (h->type == STT_GNU_IFUNC
16575 && eh->plt.noncall_refcount == 0
16576 && SYMBOL_REFERENCES_LOCAL (info, h))
16577 elf32_arm_allocate_irelocs (info, sreloc, p->count);
16578 else if (h->dynindx != -1
16579 && (!bfd_link_pic (info) || !info->symbolic || !h->def_regular))
16580 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16581 else if (htab->fdpic_p && !bfd_link_pic (info))
16582 htab->srofixup->size += 4 * p->count;
16583 else
16584 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16585 }
16586
16587 return true;
16588 }
16589
16590 void
16591 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
16592 int byteswap_code)
16593 {
16594 struct elf32_arm_link_hash_table *globals;
16595
16596 globals = elf32_arm_hash_table (info);
16597 if (globals == NULL)
16598 return;
16599
16600 globals->byteswap_code = byteswap_code;
16601 }
16602
16603 /* Set the sizes of the dynamic sections. */
16604
16605 static bool
16606 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
16607 struct bfd_link_info * info)
16608 {
16609 bfd * dynobj;
16610 asection * s;
16611 bool relocs;
16612 bfd *ibfd;
16613 struct elf32_arm_link_hash_table *htab;
16614
16615 htab = elf32_arm_hash_table (info);
16616 if (htab == NULL)
16617 return false;
16618
16619 dynobj = elf_hash_table (info)->dynobj;
16620 BFD_ASSERT (dynobj != NULL);
16621 check_use_blx (htab);
16622
16623 if (elf_hash_table (info)->dynamic_sections_created)
16624 {
16625 /* Set the contents of the .interp section to the interpreter. */
16626 if (bfd_link_executable (info) && !info->nointerp)
16627 {
16628 s = bfd_get_linker_section (dynobj, ".interp");
16629 BFD_ASSERT (s != NULL);
16630 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
16631 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
16632 }
16633 }
16634
16635 /* Set up .got offsets for local syms, and space for local dynamic
16636 relocs. */
16637 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16638 {
16639 bfd_signed_vma *local_got;
16640 bfd_signed_vma *end_local_got;
16641 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
16642 char *local_tls_type;
16643 bfd_vma *local_tlsdesc_gotent;
16644 bfd_size_type locsymcount;
16645 Elf_Internal_Shdr *symtab_hdr;
16646 asection *srel;
16647 unsigned int symndx;
16648 struct fdpic_local *local_fdpic_cnts;
16649
16650 if (! is_arm_elf (ibfd))
16651 continue;
16652
16653 for (s = ibfd->sections; s != NULL; s = s->next)
16654 {
16655 struct elf_dyn_relocs *p;
16656
16657 for (p = (struct elf_dyn_relocs *)
16658 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
16659 {
16660 if (!bfd_is_abs_section (p->sec)
16661 && bfd_is_abs_section (p->sec->output_section))
16662 {
16663 /* Input section has been discarded, either because
16664 it is a copy of a linkonce section or due to
16665 linker script /DISCARD/, so we'll be discarding
16666 the relocs too. */
16667 }
16668 else if (htab->root.target_os == is_vxworks
16669 && strcmp (p->sec->output_section->name,
16670 ".tls_vars") == 0)
16671 {
16672 /* Relocations in vxworks .tls_vars sections are
16673 handled specially by the loader. */
16674 }
16675 else if (p->count != 0)
16676 {
16677 srel = elf_section_data (p->sec)->sreloc;
16678 if (htab->fdpic_p && !bfd_link_pic (info))
16679 htab->srofixup->size += 4 * p->count;
16680 else
16681 elf32_arm_allocate_dynrelocs (info, srel, p->count);
16682 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
16683 info->flags |= DF_TEXTREL;
16684 }
16685 }
16686 }
16687
16688 local_got = elf_local_got_refcounts (ibfd);
16689 if (local_got == NULL)
16690 continue;
16691
16692 symtab_hdr = & elf_symtab_hdr (ibfd);
16693 locsymcount = symtab_hdr->sh_info;
16694 end_local_got = local_got + locsymcount;
16695 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
16696 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
16697 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
16698 local_fdpic_cnts = elf32_arm_local_fdpic_cnts (ibfd);
16699 symndx = 0;
16700 s = htab->root.sgot;
16701 srel = htab->root.srelgot;
16702 for (; local_got < end_local_got;
16703 ++local_got, ++local_iplt_ptr, ++local_tls_type,
16704 ++local_tlsdesc_gotent, ++symndx, ++local_fdpic_cnts)
16705 {
16706 *local_tlsdesc_gotent = (bfd_vma) -1;
16707 local_iplt = *local_iplt_ptr;
16708
16709 /* FDPIC support. */
16710 if (local_fdpic_cnts->gotofffuncdesc_cnt > 0)
16711 {
16712 if (local_fdpic_cnts->funcdesc_offset == -1)
16713 {
16714 local_fdpic_cnts->funcdesc_offset = s->size;
16715 s->size += 8;
16716
16717 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16718 if (bfd_link_pic (info))
16719 elf32_arm_allocate_dynrelocs (info, srel, 1);
16720 else
16721 htab->srofixup->size += 8;
16722 }
16723 }
16724
16725 if (local_fdpic_cnts->funcdesc_cnt > 0)
16726 {
16727 if (local_fdpic_cnts->funcdesc_offset == -1)
16728 {
16729 local_fdpic_cnts->funcdesc_offset = s->size;
16730 s->size += 8;
16731
16732 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16733 if (bfd_link_pic (info))
16734 elf32_arm_allocate_dynrelocs (info, srel, 1);
16735 else
16736 htab->srofixup->size += 8;
16737 }
16738
16739 /* We will add n R_ARM_RELATIVE relocations or n rofixups. */
16740 if (bfd_link_pic (info))
16741 elf32_arm_allocate_dynrelocs (info, srel, local_fdpic_cnts->funcdesc_cnt);
16742 else
16743 htab->srofixup->size += 4 * local_fdpic_cnts->funcdesc_cnt;
16744 }
16745
16746 if (local_iplt != NULL)
16747 {
16748 struct elf_dyn_relocs *p;
16749
16750 if (local_iplt->root.refcount > 0)
16751 {
16752 elf32_arm_allocate_plt_entry (info, true,
16753 &local_iplt->root,
16754 &local_iplt->arm);
16755 if (local_iplt->arm.noncall_refcount == 0)
16756 /* All references to the PLT are calls, so all
16757 non-call references can resolve directly to the
16758 run-time target. This means that the .got entry
16759 would be the same as the .igot.plt entry, so there's
16760 no point creating both. */
16761 *local_got = 0;
16762 }
16763 else
16764 {
16765 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
16766 local_iplt->root.offset = (bfd_vma) -1;
16767 }
16768
16769 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
16770 {
16771 asection *psrel;
16772
16773 psrel = elf_section_data (p->sec)->sreloc;
16774 if (local_iplt->arm.noncall_refcount == 0)
16775 elf32_arm_allocate_irelocs (info, psrel, p->count);
16776 else
16777 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
16778 }
16779 }
16780 if (*local_got > 0)
16781 {
16782 Elf_Internal_Sym *isym;
16783
16784 *local_got = s->size;
16785 if (*local_tls_type & GOT_TLS_GD)
16786 /* TLS_GD relocs need an 8-byte structure in the GOT. */
16787 s->size += 8;
16788 if (*local_tls_type & GOT_TLS_GDESC)
16789 {
16790 *local_tlsdesc_gotent = htab->root.sgotplt->size
16791 - elf32_arm_compute_jump_table_size (htab);
16792 htab->root.sgotplt->size += 8;
16793 *local_got = (bfd_vma) -2;
16794 /* plt.got_offset needs to know there's a TLS_DESC
16795 reloc in the middle of .got.plt. */
16796 htab->num_tls_desc++;
16797 }
16798 if (*local_tls_type & GOT_TLS_IE)
16799 s->size += 4;
16800
16801 if (*local_tls_type & GOT_NORMAL)
16802 {
16803 /* If the symbol is both GD and GDESC, *local_got
16804 may have been overwritten. */
16805 *local_got = s->size;
16806 s->size += 4;
16807 }
16808
16809 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, ibfd,
16810 symndx);
16811 if (isym == NULL)
16812 return false;
16813
16814 /* If all references to an STT_GNU_IFUNC PLT are calls,
16815 then all non-call references, including this GOT entry,
16816 resolve directly to the run-time target. */
16817 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
16818 && (local_iplt == NULL
16819 || local_iplt->arm.noncall_refcount == 0))
16820 elf32_arm_allocate_irelocs (info, srel, 1);
16821 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC || htab->fdpic_p)
16822 {
16823 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC)))
16824 elf32_arm_allocate_dynrelocs (info, srel, 1);
16825 else if (htab->fdpic_p && *local_tls_type & GOT_NORMAL)
16826 htab->srofixup->size += 4;
16827
16828 if ((bfd_link_pic (info) || htab->fdpic_p)
16829 && *local_tls_type & GOT_TLS_GDESC)
16830 {
16831 elf32_arm_allocate_dynrelocs (info,
16832 htab->root.srelplt, 1);
16833 htab->tls_trampoline = -1;
16834 }
16835 }
16836 }
16837 else
16838 *local_got = (bfd_vma) -1;
16839 }
16840 }
16841
16842 if (htab->tls_ldm_got.refcount > 0)
16843 {
16844 /* Allocate two GOT entries and one dynamic relocation (if necessary)
16845 for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
16846 htab->tls_ldm_got.offset = htab->root.sgot->size;
16847 htab->root.sgot->size += 8;
16848 if (bfd_link_pic (info))
16849 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16850 }
16851 else
16852 htab->tls_ldm_got.offset = -1;
16853
16854 /* At the very end of the .rofixup section is a pointer to the GOT,
16855 reserve space for it. */
16856 if (htab->fdpic_p && htab->srofixup != NULL)
16857 htab->srofixup->size += 4;
16858
16859 /* Allocate global sym .plt and .got entries, and space for global
16860 sym dynamic relocs. */
16861 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
16862
16863 /* Here we rummage through the found bfds to collect glue information. */
16864 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16865 {
16866 if (! is_arm_elf (ibfd))
16867 continue;
16868
16869 /* Initialise mapping tables for code/data. */
16870 bfd_elf32_arm_init_maps (ibfd);
16871
16872 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
16873 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
16874 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
16875 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd);
16876 }
16877
16878 /* Allocate space for the glue sections now that we've sized them. */
16879 bfd_elf32_arm_allocate_interworking_sections (info);
16880
16881 /* For every jump slot reserved in the sgotplt, reloc_count is
16882 incremented. However, when we reserve space for TLS descriptors,
16883 it's not incremented, so in order to compute the space reserved
16884 for them, it suffices to multiply the reloc count by the jump
16885 slot size. */
16886 if (htab->root.srelplt)
16887 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size (htab);
16888
16889 if (htab->tls_trampoline)
16890 {
16891 if (htab->root.splt->size == 0)
16892 htab->root.splt->size += htab->plt_header_size;
16893
16894 htab->tls_trampoline = htab->root.splt->size;
16895 htab->root.splt->size += htab->plt_entry_size;
16896
16897 /* If we're not using lazy TLS relocations, don't generate the
16898 PLT and GOT entries they require. */
16899 if ((info->flags & DF_BIND_NOW))
16900 htab->root.tlsdesc_plt = 0;
16901 else
16902 {
16903 htab->root.tlsdesc_got = htab->root.sgot->size;
16904 htab->root.sgot->size += 4;
16905
16906 htab->root.tlsdesc_plt = htab->root.splt->size;
16907 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
16908 }
16909 }
16910
16911 /* The check_relocs and adjust_dynamic_symbol entry points have
16912 determined the sizes of the various dynamic sections. Allocate
16913 memory for them. */
16914 relocs = false;
16915 for (s = dynobj->sections; s != NULL; s = s->next)
16916 {
16917 const char * name;
16918
16919 if ((s->flags & SEC_LINKER_CREATED) == 0)
16920 continue;
16921
16922 /* It's OK to base decisions on the section name, because none
16923 of the dynobj section names depend upon the input files. */
16924 name = bfd_section_name (s);
16925
16926 if (s == htab->root.splt)
16927 {
16928 /* Remember whether there is a PLT. */
16929 ;
16930 }
16931 else if (startswith (name, ".rel"))
16932 {
16933 if (s->size != 0)
16934 {
16935 /* Remember whether there are any reloc sections other
16936 than .rel(a).plt and .rela.plt.unloaded. */
16937 if (s != htab->root.srelplt && s != htab->srelplt2)
16938 relocs = true;
16939
16940 /* We use the reloc_count field as a counter if we need
16941 to copy relocs into the output file. */
16942 s->reloc_count = 0;
16943 }
16944 }
16945 else if (s != htab->root.sgot
16946 && s != htab->root.sgotplt
16947 && s != htab->root.iplt
16948 && s != htab->root.igotplt
16949 && s != htab->root.sdynbss
16950 && s != htab->root.sdynrelro
16951 && s != htab->srofixup)
16952 {
16953 /* It's not one of our sections, so don't allocate space. */
16954 continue;
16955 }
16956
16957 if (s->size == 0)
16958 {
16959 /* If we don't need this section, strip it from the
16960 output file. This is mostly to handle .rel(a).bss and
16961 .rel(a).plt. We must create both sections in
16962 create_dynamic_sections, because they must be created
16963 before the linker maps input sections to output
16964 sections. The linker does that before
16965 adjust_dynamic_symbol is called, and it is that
16966 function which decides whether anything needs to go
16967 into these sections. */
16968 s->flags |= SEC_EXCLUDE;
16969 continue;
16970 }
16971
16972 if ((s->flags & SEC_HAS_CONTENTS) == 0)
16973 continue;
16974
16975 /* Allocate memory for the section contents. */
16976 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
16977 if (s->contents == NULL)
16978 return false;
16979 }
16980
16981 return _bfd_elf_maybe_vxworks_add_dynamic_tags (output_bfd, info,
16982 relocs);
16983 }
16984
16985 /* Size sections even though they're not dynamic. We use it to setup
16986 _TLS_MODULE_BASE_, if needed. */
16987
16988 static bool
16989 elf32_arm_always_size_sections (bfd *output_bfd,
16990 struct bfd_link_info *info)
16991 {
16992 asection *tls_sec;
16993 struct elf32_arm_link_hash_table *htab;
16994
16995 htab = elf32_arm_hash_table (info);
16996
16997 if (bfd_link_relocatable (info))
16998 return true;
16999
17000 tls_sec = elf_hash_table (info)->tls_sec;
17001
17002 if (tls_sec)
17003 {
17004 struct elf_link_hash_entry *tlsbase;
17005
17006 tlsbase = elf_link_hash_lookup
17007 (elf_hash_table (info), "_TLS_MODULE_BASE_", true, true, false);
17008
17009 if (tlsbase)
17010 {
17011 struct bfd_link_hash_entry *bh = NULL;
17012 const struct elf_backend_data *bed
17013 = get_elf_backend_data (output_bfd);
17014
17015 if (!(_bfd_generic_link_add_one_symbol
17016 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
17017 tls_sec, 0, NULL, false,
17018 bed->collect, &bh)))
17019 return false;
17020
17021 tlsbase->type = STT_TLS;
17022 tlsbase = (struct elf_link_hash_entry *)bh;
17023 tlsbase->def_regular = 1;
17024 tlsbase->other = STV_HIDDEN;
17025 (*bed->elf_backend_hide_symbol) (info, tlsbase, true);
17026 }
17027 }
17028
17029 if (htab->fdpic_p && !bfd_link_relocatable (info)
17030 && !bfd_elf_stack_segment_size (output_bfd, info,
17031 "__stacksize", DEFAULT_STACK_SIZE))
17032 return false;
17033
17034 return true;
17035 }
17036
17037 /* Finish up dynamic symbol handling. We set the contents of various
17038 dynamic sections here. */
17039
17040 static bool
17041 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
17042 struct bfd_link_info * info,
17043 struct elf_link_hash_entry * h,
17044 Elf_Internal_Sym * sym)
17045 {
17046 struct elf32_arm_link_hash_table *htab;
17047 struct elf32_arm_link_hash_entry *eh;
17048
17049 htab = elf32_arm_hash_table (info);
17050 if (htab == NULL)
17051 return false;
17052
17053 eh = (struct elf32_arm_link_hash_entry *) h;
17054
17055 if (h->plt.offset != (bfd_vma) -1)
17056 {
17057 if (!eh->is_iplt)
17058 {
17059 BFD_ASSERT (h->dynindx != -1);
17060 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
17061 h->dynindx, 0))
17062 return false;
17063 }
17064
17065 if (!h->def_regular)
17066 {
17067 /* Mark the symbol as undefined, rather than as defined in
17068 the .plt section. */
17069 sym->st_shndx = SHN_UNDEF;
17070 /* If the symbol is weak we need to clear the value.
17071 Otherwise, the PLT entry would provide a definition for
17072 the symbol even if the symbol wasn't defined anywhere,
17073 and so the symbol would never be NULL. Leave the value if
17074 there were any relocations where pointer equality matters
17075 (this is a clue for the dynamic linker, to make function
17076 pointer comparisons work between an application and shared
17077 library). */
17078 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
17079 sym->st_value = 0;
17080 }
17081 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
17082 {
17083 /* At least one non-call relocation references this .iplt entry,
17084 so the .iplt entry is the function's canonical address. */
17085 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
17086 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
17087 sym->st_shndx = (_bfd_elf_section_from_bfd_section
17088 (output_bfd, htab->root.iplt->output_section));
17089 sym->st_value = (h->plt.offset
17090 + htab->root.iplt->output_section->vma
17091 + htab->root.iplt->output_offset);
17092 }
17093 }
17094
17095 if (h->needs_copy)
17096 {
17097 asection * s;
17098 Elf_Internal_Rela rel;
17099
17100 /* This symbol needs a copy reloc. Set it up. */
17101 BFD_ASSERT (h->dynindx != -1
17102 && (h->root.type == bfd_link_hash_defined
17103 || h->root.type == bfd_link_hash_defweak));
17104
17105 rel.r_addend = 0;
17106 rel.r_offset = (h->root.u.def.value
17107 + h->root.u.def.section->output_section->vma
17108 + h->root.u.def.section->output_offset);
17109 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
17110 if (h->root.u.def.section == htab->root.sdynrelro)
17111 s = htab->root.sreldynrelro;
17112 else
17113 s = htab->root.srelbss;
17114 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
17115 }
17116
17117 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
17118 and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute:
17119 it is relative to the ".got" section. */
17120 if (h == htab->root.hdynamic
17121 || (!htab->fdpic_p
17122 && htab->root.target_os != is_vxworks
17123 && h == htab->root.hgot))
17124 sym->st_shndx = SHN_ABS;
17125
17126 return true;
17127 }
17128
17129 static void
17130 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17131 void *contents,
17132 const unsigned long *template, unsigned count)
17133 {
17134 unsigned ix;
17135
17136 for (ix = 0; ix != count; ix++)
17137 {
17138 unsigned long insn = template[ix];
17139
17140 /* Emit mov pc,rx if bx is not permitted. */
17141 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
17142 insn = (insn & 0xf000000f) | 0x01a0f000;
17143 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
17144 }
17145 }
17146
17147 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
17148 other variants, NaCl needs this entry in a static executable's
17149 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
17150 zero. For .iplt really only the last bundle is useful, and .iplt
17151 could have a shorter first entry, with each individual PLT entry's
17152 relative branch calculated differently so it targets the last
17153 bundle instead of the instruction before it (labelled .Lplt_tail
17154 above). But it's simpler to keep the size and layout of PLT0
17155 consistent with the dynamic case, at the cost of some dead code at
17156 the start of .iplt and the one dead store to the stack at the start
17157 of .Lplt_tail. */
17158 static void
17159 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17160 asection *plt, bfd_vma got_displacement)
17161 {
17162 unsigned int i;
17163
17164 put_arm_insn (htab, output_bfd,
17165 elf32_arm_nacl_plt0_entry[0]
17166 | arm_movw_immediate (got_displacement),
17167 plt->contents + 0);
17168 put_arm_insn (htab, output_bfd,
17169 elf32_arm_nacl_plt0_entry[1]
17170 | arm_movt_immediate (got_displacement),
17171 plt->contents + 4);
17172
17173 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
17174 put_arm_insn (htab, output_bfd,
17175 elf32_arm_nacl_plt0_entry[i],
17176 plt->contents + (i * 4));
17177 }
17178
17179 /* Finish up the dynamic sections. */
17180
17181 static bool
17182 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
17183 {
17184 bfd * dynobj;
17185 asection * sgot;
17186 asection * sdyn;
17187 struct elf32_arm_link_hash_table *htab;
17188
17189 htab = elf32_arm_hash_table (info);
17190 if (htab == NULL)
17191 return false;
17192
17193 dynobj = elf_hash_table (info)->dynobj;
17194
17195 sgot = htab->root.sgotplt;
17196 /* A broken linker script might have discarded the dynamic sections.
17197 Catch this here so that we do not seg-fault later on. */
17198 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
17199 return false;
17200 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
17201
17202 if (elf_hash_table (info)->dynamic_sections_created)
17203 {
17204 asection *splt;
17205 Elf32_External_Dyn *dyncon, *dynconend;
17206
17207 splt = htab->root.splt;
17208 BFD_ASSERT (splt != NULL && sdyn != NULL);
17209 BFD_ASSERT (sgot != NULL);
17210
17211 dyncon = (Elf32_External_Dyn *) sdyn->contents;
17212 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
17213
17214 for (; dyncon < dynconend; dyncon++)
17215 {
17216 Elf_Internal_Dyn dyn;
17217 const char * name;
17218 asection * s;
17219
17220 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
17221
17222 switch (dyn.d_tag)
17223 {
17224 default:
17225 if (htab->root.target_os == is_vxworks
17226 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
17227 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17228 break;
17229
17230 case DT_HASH:
17231 case DT_STRTAB:
17232 case DT_SYMTAB:
17233 case DT_VERSYM:
17234 case DT_VERDEF:
17235 case DT_VERNEED:
17236 break;
17237
17238 case DT_PLTGOT:
17239 name = ".got.plt";
17240 goto get_vma;
17241 case DT_JMPREL:
17242 name = RELOC_SECTION (htab, ".plt");
17243 get_vma:
17244 s = bfd_get_linker_section (dynobj, name);
17245 if (s == NULL)
17246 {
17247 _bfd_error_handler
17248 (_("could not find section %s"), name);
17249 bfd_set_error (bfd_error_invalid_operation);
17250 return false;
17251 }
17252 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
17253 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17254 break;
17255
17256 case DT_PLTRELSZ:
17257 s = htab->root.srelplt;
17258 BFD_ASSERT (s != NULL);
17259 dyn.d_un.d_val = s->size;
17260 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17261 break;
17262
17263 case DT_RELSZ:
17264 case DT_RELASZ:
17265 case DT_REL:
17266 case DT_RELA:
17267 break;
17268
17269 case DT_TLSDESC_PLT:
17270 s = htab->root.splt;
17271 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17272 + htab->root.tlsdesc_plt);
17273 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17274 break;
17275
17276 case DT_TLSDESC_GOT:
17277 s = htab->root.sgot;
17278 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17279 + htab->root.tlsdesc_got);
17280 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17281 break;
17282
17283 /* Set the bottom bit of DT_INIT/FINI if the
17284 corresponding function is Thumb. */
17285 case DT_INIT:
17286 name = info->init_function;
17287 goto get_sym;
17288 case DT_FINI:
17289 name = info->fini_function;
17290 get_sym:
17291 /* If it wasn't set by elf_bfd_final_link
17292 then there is nothing to adjust. */
17293 if (dyn.d_un.d_val != 0)
17294 {
17295 struct elf_link_hash_entry * eh;
17296
17297 eh = elf_link_hash_lookup (elf_hash_table (info), name,
17298 false, false, true);
17299 if (eh != NULL
17300 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
17301 == ST_BRANCH_TO_THUMB)
17302 {
17303 dyn.d_un.d_val |= 1;
17304 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17305 }
17306 }
17307 break;
17308 }
17309 }
17310
17311 /* Fill in the first entry in the procedure linkage table. */
17312 if (splt->size > 0 && htab->plt_header_size)
17313 {
17314 const bfd_vma *plt0_entry;
17315 bfd_vma got_address, plt_address, got_displacement;
17316
17317 /* Calculate the addresses of the GOT and PLT. */
17318 got_address = sgot->output_section->vma + sgot->output_offset;
17319 plt_address = splt->output_section->vma + splt->output_offset;
17320
17321 if (htab->root.target_os == is_vxworks)
17322 {
17323 /* The VxWorks GOT is relocated by the dynamic linker.
17324 Therefore, we must emit relocations rather than simply
17325 computing the values now. */
17326 Elf_Internal_Rela rel;
17327
17328 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
17329 put_arm_insn (htab, output_bfd, plt0_entry[0],
17330 splt->contents + 0);
17331 put_arm_insn (htab, output_bfd, plt0_entry[1],
17332 splt->contents + 4);
17333 put_arm_insn (htab, output_bfd, plt0_entry[2],
17334 splt->contents + 8);
17335 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
17336
17337 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
17338 rel.r_offset = plt_address + 12;
17339 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17340 rel.r_addend = 0;
17341 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
17342 htab->srelplt2->contents);
17343 }
17344 else if (htab->root.target_os == is_nacl)
17345 arm_nacl_put_plt0 (htab, output_bfd, splt,
17346 got_address + 8 - (plt_address + 16));
17347 else if (using_thumb_only (htab))
17348 {
17349 got_displacement = got_address - (plt_address + 12);
17350
17351 plt0_entry = elf32_thumb2_plt0_entry;
17352 put_arm_insn (htab, output_bfd, plt0_entry[0],
17353 splt->contents + 0);
17354 put_arm_insn (htab, output_bfd, plt0_entry[1],
17355 splt->contents + 4);
17356 put_arm_insn (htab, output_bfd, plt0_entry[2],
17357 splt->contents + 8);
17358
17359 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
17360 }
17361 else
17362 {
17363 got_displacement = got_address - (plt_address + 16);
17364
17365 plt0_entry = elf32_arm_plt0_entry;
17366 put_arm_insn (htab, output_bfd, plt0_entry[0],
17367 splt->contents + 0);
17368 put_arm_insn (htab, output_bfd, plt0_entry[1],
17369 splt->contents + 4);
17370 put_arm_insn (htab, output_bfd, plt0_entry[2],
17371 splt->contents + 8);
17372 put_arm_insn (htab, output_bfd, plt0_entry[3],
17373 splt->contents + 12);
17374
17375 #ifdef FOUR_WORD_PLT
17376 /* The displacement value goes in the otherwise-unused
17377 last word of the second entry. */
17378 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
17379 #else
17380 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
17381 #endif
17382 }
17383 }
17384
17385 /* UnixWare sets the entsize of .plt to 4, although that doesn't
17386 really seem like the right value. */
17387 if (splt->output_section->owner == output_bfd)
17388 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
17389
17390 if (htab->root.tlsdesc_plt)
17391 {
17392 bfd_vma got_address
17393 = sgot->output_section->vma + sgot->output_offset;
17394 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
17395 + htab->root.sgot->output_offset);
17396 bfd_vma plt_address
17397 = splt->output_section->vma + splt->output_offset;
17398
17399 arm_put_trampoline (htab, output_bfd,
17400 splt->contents + htab->root.tlsdesc_plt,
17401 dl_tlsdesc_lazy_trampoline, 6);
17402
17403 bfd_put_32 (output_bfd,
17404 gotplt_address + htab->root.tlsdesc_got
17405 - (plt_address + htab->root.tlsdesc_plt)
17406 - dl_tlsdesc_lazy_trampoline[6],
17407 splt->contents + htab->root.tlsdesc_plt + 24);
17408 bfd_put_32 (output_bfd,
17409 got_address - (plt_address + htab->root.tlsdesc_plt)
17410 - dl_tlsdesc_lazy_trampoline[7],
17411 splt->contents + htab->root.tlsdesc_plt + 24 + 4);
17412 }
17413
17414 if (htab->tls_trampoline)
17415 {
17416 arm_put_trampoline (htab, output_bfd,
17417 splt->contents + htab->tls_trampoline,
17418 tls_trampoline, 3);
17419 #ifdef FOUR_WORD_PLT
17420 bfd_put_32 (output_bfd, 0x00000000,
17421 splt->contents + htab->tls_trampoline + 12);
17422 #endif
17423 }
17424
17425 if (htab->root.target_os == is_vxworks
17426 && !bfd_link_pic (info)
17427 && htab->root.splt->size > 0)
17428 {
17429 /* Correct the .rel(a).plt.unloaded relocations. They will have
17430 incorrect symbol indexes. */
17431 int num_plts;
17432 unsigned char *p;
17433
17434 num_plts = ((htab->root.splt->size - htab->plt_header_size)
17435 / htab->plt_entry_size);
17436 p = htab->srelplt2->contents + RELOC_SIZE (htab);
17437
17438 for (; num_plts; num_plts--)
17439 {
17440 Elf_Internal_Rela rel;
17441
17442 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17443 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17444 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17445 p += RELOC_SIZE (htab);
17446
17447 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17448 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
17449 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17450 p += RELOC_SIZE (htab);
17451 }
17452 }
17453 }
17454
17455 if (htab->root.target_os == is_nacl
17456 && htab->root.iplt != NULL
17457 && htab->root.iplt->size > 0)
17458 /* NaCl uses a special first entry in .iplt too. */
17459 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
17460
17461 /* Fill in the first three entries in the global offset table. */
17462 if (sgot)
17463 {
17464 if (sgot->size > 0)
17465 {
17466 if (sdyn == NULL)
17467 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
17468 else
17469 bfd_put_32 (output_bfd,
17470 sdyn->output_section->vma + sdyn->output_offset,
17471 sgot->contents);
17472 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
17473 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
17474 }
17475
17476 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
17477 }
17478
17479 /* At the very end of the .rofixup section is a pointer to the GOT. */
17480 if (htab->fdpic_p && htab->srofixup != NULL)
17481 {
17482 struct elf_link_hash_entry *hgot = htab->root.hgot;
17483
17484 bfd_vma got_value = hgot->root.u.def.value
17485 + hgot->root.u.def.section->output_section->vma
17486 + hgot->root.u.def.section->output_offset;
17487
17488 arm_elf_add_rofixup (output_bfd, htab->srofixup, got_value);
17489
17490 /* Make sure we allocated and generated the same number of fixups. */
17491 BFD_ASSERT (htab->srofixup->reloc_count * 4 == htab->srofixup->size);
17492 }
17493
17494 return true;
17495 }
17496
17497 static bool
17498 elf32_arm_init_file_header (bfd *abfd, struct bfd_link_info *link_info)
17499 {
17500 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
17501 struct elf32_arm_link_hash_table *globals;
17502 struct elf_segment_map *m;
17503
17504 if (!_bfd_elf_init_file_header (abfd, link_info))
17505 return false;
17506
17507 i_ehdrp = elf_elfheader (abfd);
17508
17509 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
17510 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
17511 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
17512
17513 if (link_info)
17514 {
17515 globals = elf32_arm_hash_table (link_info);
17516 if (globals != NULL && globals->byteswap_code)
17517 i_ehdrp->e_flags |= EF_ARM_BE8;
17518
17519 if (globals->fdpic_p)
17520 i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC;
17521 }
17522
17523 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
17524 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
17525 {
17526 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
17527 if (abi == AEABI_VFP_args_vfp)
17528 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
17529 else
17530 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
17531 }
17532
17533 /* Scan segment to set p_flags attribute if it contains only sections with
17534 SHF_ARM_PURECODE flag. */
17535 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
17536 {
17537 unsigned int j;
17538
17539 if (m->count == 0)
17540 continue;
17541 for (j = 0; j < m->count; j++)
17542 {
17543 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
17544 break;
17545 }
17546 if (j == m->count)
17547 {
17548 m->p_flags = PF_X;
17549 m->p_flags_valid = 1;
17550 }
17551 }
17552 return true;
17553 }
17554
17555 static enum elf_reloc_type_class
17556 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
17557 const asection *rel_sec ATTRIBUTE_UNUSED,
17558 const Elf_Internal_Rela *rela)
17559 {
17560 switch ((int) ELF32_R_TYPE (rela->r_info))
17561 {
17562 case R_ARM_RELATIVE:
17563 return reloc_class_relative;
17564 case R_ARM_JUMP_SLOT:
17565 return reloc_class_plt;
17566 case R_ARM_COPY:
17567 return reloc_class_copy;
17568 case R_ARM_IRELATIVE:
17569 return reloc_class_ifunc;
17570 default:
17571 return reloc_class_normal;
17572 }
17573 }
17574
17575 static void
17576 arm_final_write_processing (bfd *abfd)
17577 {
17578 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
17579 }
17580
17581 static bool
17582 elf32_arm_final_write_processing (bfd *abfd)
17583 {
17584 arm_final_write_processing (abfd);
17585 return _bfd_elf_final_write_processing (abfd);
17586 }
17587
17588 /* Return TRUE if this is an unwinding table entry. */
17589
17590 static bool
17591 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
17592 {
17593 return (startswith (name, ELF_STRING_ARM_unwind)
17594 || startswith (name, ELF_STRING_ARM_unwind_once));
17595 }
17596
17597
17598 /* Set the type and flags for an ARM section. We do this by
17599 the section name, which is a hack, but ought to work. */
17600
17601 static bool
17602 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
17603 {
17604 const char * name;
17605
17606 name = bfd_section_name (sec);
17607
17608 if (is_arm_elf_unwind_section_name (abfd, name))
17609 {
17610 hdr->sh_type = SHT_ARM_EXIDX;
17611 hdr->sh_flags |= SHF_LINK_ORDER;
17612 }
17613
17614 if (sec->flags & SEC_ELF_PURECODE)
17615 hdr->sh_flags |= SHF_ARM_PURECODE;
17616
17617 return true;
17618 }
17619
17620 /* Handle an ARM specific section when reading an object file. This is
17621 called when bfd_section_from_shdr finds a section with an unknown
17622 type. */
17623
17624 static bool
17625 elf32_arm_section_from_shdr (bfd *abfd,
17626 Elf_Internal_Shdr * hdr,
17627 const char *name,
17628 int shindex)
17629 {
17630 /* There ought to be a place to keep ELF backend specific flags, but
17631 at the moment there isn't one. We just keep track of the
17632 sections by their name, instead. Fortunately, the ABI gives
17633 names for all the ARM specific sections, so we will probably get
17634 away with this. */
17635 switch (hdr->sh_type)
17636 {
17637 case SHT_ARM_EXIDX:
17638 case SHT_ARM_PREEMPTMAP:
17639 case SHT_ARM_ATTRIBUTES:
17640 break;
17641
17642 default:
17643 return false;
17644 }
17645
17646 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
17647 return false;
17648
17649 return true;
17650 }
17651
17652 static _arm_elf_section_data *
17653 get_arm_elf_section_data (asection * sec)
17654 {
17655 if (sec && sec->owner && is_arm_elf (sec->owner))
17656 return elf32_arm_section_data (sec);
17657 else
17658 return NULL;
17659 }
17660
17661 typedef struct
17662 {
17663 void *flaginfo;
17664 struct bfd_link_info *info;
17665 asection *sec;
17666 int sec_shndx;
17667 int (*func) (void *, const char *, Elf_Internal_Sym *,
17668 asection *, struct elf_link_hash_entry *);
17669 } output_arch_syminfo;
17670
17671 enum map_symbol_type
17672 {
17673 ARM_MAP_ARM,
17674 ARM_MAP_THUMB,
17675 ARM_MAP_DATA
17676 };
17677
17678
17679 /* Output a single mapping symbol. */
17680
17681 static bool
17682 elf32_arm_output_map_sym (output_arch_syminfo *osi,
17683 enum map_symbol_type type,
17684 bfd_vma offset)
17685 {
17686 static const char *names[3] = {"$a", "$t", "$d"};
17687 Elf_Internal_Sym sym;
17688
17689 sym.st_value = osi->sec->output_section->vma
17690 + osi->sec->output_offset
17691 + offset;
17692 sym.st_size = 0;
17693 sym.st_other = 0;
17694 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
17695 sym.st_shndx = osi->sec_shndx;
17696 sym.st_target_internal = 0;
17697 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
17698 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
17699 }
17700
17701 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
17702 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
17703
17704 static bool
17705 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
17706 bool is_iplt_entry_p,
17707 union gotplt_union *root_plt,
17708 struct arm_plt_info *arm_plt)
17709 {
17710 struct elf32_arm_link_hash_table *htab;
17711 bfd_vma addr, plt_header_size;
17712
17713 if (root_plt->offset == (bfd_vma) -1)
17714 return true;
17715
17716 htab = elf32_arm_hash_table (osi->info);
17717 if (htab == NULL)
17718 return false;
17719
17720 if (is_iplt_entry_p)
17721 {
17722 osi->sec = htab->root.iplt;
17723 plt_header_size = 0;
17724 }
17725 else
17726 {
17727 osi->sec = htab->root.splt;
17728 plt_header_size = htab->plt_header_size;
17729 }
17730 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
17731 (osi->info->output_bfd, osi->sec->output_section));
17732
17733 addr = root_plt->offset & -2;
17734 if (htab->root.target_os == is_vxworks)
17735 {
17736 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17737 return false;
17738 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
17739 return false;
17740 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
17741 return false;
17742 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
17743 return false;
17744 }
17745 else if (htab->root.target_os == is_nacl)
17746 {
17747 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17748 return false;
17749 }
17750 else if (htab->fdpic_p)
17751 {
17752 enum map_symbol_type type = using_thumb_only (htab)
17753 ? ARM_MAP_THUMB
17754 : ARM_MAP_ARM;
17755
17756 if (elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt))
17757 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17758 return false;
17759 if (!elf32_arm_output_map_sym (osi, type, addr))
17760 return false;
17761 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 16))
17762 return false;
17763 if (htab->plt_entry_size == 4 * ARRAY_SIZE (elf32_arm_fdpic_plt_entry))
17764 if (!elf32_arm_output_map_sym (osi, type, addr + 24))
17765 return false;
17766 }
17767 else if (using_thumb_only (htab))
17768 {
17769 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
17770 return false;
17771 }
17772 else
17773 {
17774 bool thumb_stub_p;
17775
17776 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
17777 if (thumb_stub_p)
17778 {
17779 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17780 return false;
17781 }
17782 #ifdef FOUR_WORD_PLT
17783 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17784 return false;
17785 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17786 return false;
17787 #else
17788 /* A three-word PLT with no Thumb thunk contains only Arm code,
17789 so only need to output a mapping symbol for the first PLT entry and
17790 entries with thumb thunks. */
17791 if (thumb_stub_p || addr == plt_header_size)
17792 {
17793 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17794 return false;
17795 }
17796 #endif
17797 }
17798
17799 return true;
17800 }
17801
17802 /* Output mapping symbols for PLT entries associated with H. */
17803
17804 static bool
17805 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
17806 {
17807 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
17808 struct elf32_arm_link_hash_entry *eh;
17809
17810 if (h->root.type == bfd_link_hash_indirect)
17811 return true;
17812
17813 if (h->root.type == bfd_link_hash_warning)
17814 /* When warning symbols are created, they **replace** the "real"
17815 entry in the hash table, thus we never get to see the real
17816 symbol in a hash traversal. So look at it now. */
17817 h = (struct elf_link_hash_entry *) h->root.u.i.link;
17818
17819 eh = (struct elf32_arm_link_hash_entry *) h;
17820 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
17821 &h->plt, &eh->plt);
17822 }
17823
17824 /* Bind a veneered symbol to its veneer identified by its hash entry
17825 STUB_ENTRY. The veneered location thus loose its symbol. */
17826
17827 static void
17828 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
17829 {
17830 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
17831
17832 BFD_ASSERT (hash);
17833 hash->root.root.u.def.section = stub_entry->stub_sec;
17834 hash->root.root.u.def.value = stub_entry->stub_offset;
17835 hash->root.size = stub_entry->stub_size;
17836 }
17837
17838 /* Output a single local symbol for a generated stub. */
17839
17840 static bool
17841 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
17842 bfd_vma offset, bfd_vma size)
17843 {
17844 Elf_Internal_Sym sym;
17845
17846 sym.st_value = osi->sec->output_section->vma
17847 + osi->sec->output_offset
17848 + offset;
17849 sym.st_size = size;
17850 sym.st_other = 0;
17851 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
17852 sym.st_shndx = osi->sec_shndx;
17853 sym.st_target_internal = 0;
17854 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
17855 }
17856
17857 static bool
17858 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
17859 void * in_arg)
17860 {
17861 struct elf32_arm_stub_hash_entry *stub_entry;
17862 asection *stub_sec;
17863 bfd_vma addr;
17864 char *stub_name;
17865 output_arch_syminfo *osi;
17866 const insn_sequence *template_sequence;
17867 enum stub_insn_type prev_type;
17868 int size;
17869 int i;
17870 enum map_symbol_type sym_type;
17871
17872 /* Massage our args to the form they really have. */
17873 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17874 osi = (output_arch_syminfo *) in_arg;
17875
17876 stub_sec = stub_entry->stub_sec;
17877
17878 /* Ensure this stub is attached to the current section being
17879 processed. */
17880 if (stub_sec != osi->sec)
17881 return true;
17882
17883 addr = (bfd_vma) stub_entry->stub_offset;
17884 template_sequence = stub_entry->stub_template;
17885
17886 if (arm_stub_sym_claimed (stub_entry->stub_type))
17887 arm_stub_claim_sym (stub_entry);
17888 else
17889 {
17890 stub_name = stub_entry->output_name;
17891 switch (template_sequence[0].type)
17892 {
17893 case ARM_TYPE:
17894 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
17895 stub_entry->stub_size))
17896 return false;
17897 break;
17898 case THUMB16_TYPE:
17899 case THUMB32_TYPE:
17900 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
17901 stub_entry->stub_size))
17902 return false;
17903 break;
17904 default:
17905 BFD_FAIL ();
17906 return 0;
17907 }
17908 }
17909
17910 prev_type = DATA_TYPE;
17911 size = 0;
17912 for (i = 0; i < stub_entry->stub_template_size; i++)
17913 {
17914 switch (template_sequence[i].type)
17915 {
17916 case ARM_TYPE:
17917 sym_type = ARM_MAP_ARM;
17918 break;
17919
17920 case THUMB16_TYPE:
17921 case THUMB32_TYPE:
17922 sym_type = ARM_MAP_THUMB;
17923 break;
17924
17925 case DATA_TYPE:
17926 sym_type = ARM_MAP_DATA;
17927 break;
17928
17929 default:
17930 BFD_FAIL ();
17931 return false;
17932 }
17933
17934 if (template_sequence[i].type != prev_type)
17935 {
17936 prev_type = template_sequence[i].type;
17937 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
17938 return false;
17939 }
17940
17941 switch (template_sequence[i].type)
17942 {
17943 case ARM_TYPE:
17944 case THUMB32_TYPE:
17945 size += 4;
17946 break;
17947
17948 case THUMB16_TYPE:
17949 size += 2;
17950 break;
17951
17952 case DATA_TYPE:
17953 size += 4;
17954 break;
17955
17956 default:
17957 BFD_FAIL ();
17958 return false;
17959 }
17960 }
17961
17962 return true;
17963 }
17964
17965 /* Output mapping symbols for linker generated sections,
17966 and for those data-only sections that do not have a
17967 $d. */
17968
17969 static bool
17970 elf32_arm_output_arch_local_syms (bfd *output_bfd,
17971 struct bfd_link_info *info,
17972 void *flaginfo,
17973 int (*func) (void *, const char *,
17974 Elf_Internal_Sym *,
17975 asection *,
17976 struct elf_link_hash_entry *))
17977 {
17978 output_arch_syminfo osi;
17979 struct elf32_arm_link_hash_table *htab;
17980 bfd_vma offset;
17981 bfd_size_type size;
17982 bfd *input_bfd;
17983
17984 htab = elf32_arm_hash_table (info);
17985 if (htab == NULL)
17986 return false;
17987
17988 check_use_blx (htab);
17989
17990 osi.flaginfo = flaginfo;
17991 osi.info = info;
17992 osi.func = func;
17993
17994 /* Add a $d mapping symbol to data-only sections that
17995 don't have any mapping symbol. This may result in (harmless) redundant
17996 mapping symbols. */
17997 for (input_bfd = info->input_bfds;
17998 input_bfd != NULL;
17999 input_bfd = input_bfd->link.next)
18000 {
18001 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
18002 for (osi.sec = input_bfd->sections;
18003 osi.sec != NULL;
18004 osi.sec = osi.sec->next)
18005 {
18006 if (osi.sec->output_section != NULL
18007 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
18008 != 0)
18009 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
18010 == SEC_HAS_CONTENTS
18011 && get_arm_elf_section_data (osi.sec) != NULL
18012 && get_arm_elf_section_data (osi.sec)->mapcount == 0
18013 && osi.sec->size > 0
18014 && (osi.sec->flags & SEC_EXCLUDE) == 0)
18015 {
18016 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18017 (output_bfd, osi.sec->output_section);
18018 if (osi.sec_shndx != (int)SHN_BAD)
18019 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
18020 }
18021 }
18022 }
18023
18024 /* ARM->Thumb glue. */
18025 if (htab->arm_glue_size > 0)
18026 {
18027 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18028 ARM2THUMB_GLUE_SECTION_NAME);
18029
18030 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18031 (output_bfd, osi.sec->output_section);
18032 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
18033 || htab->pic_veneer)
18034 size = ARM2THUMB_PIC_GLUE_SIZE;
18035 else if (htab->use_blx)
18036 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
18037 else
18038 size = ARM2THUMB_STATIC_GLUE_SIZE;
18039
18040 for (offset = 0; offset < htab->arm_glue_size; offset += size)
18041 {
18042 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
18043 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
18044 }
18045 }
18046
18047 /* Thumb->ARM glue. */
18048 if (htab->thumb_glue_size > 0)
18049 {
18050 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18051 THUMB2ARM_GLUE_SECTION_NAME);
18052
18053 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18054 (output_bfd, osi.sec->output_section);
18055 size = THUMB2ARM_GLUE_SIZE;
18056
18057 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
18058 {
18059 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
18060 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
18061 }
18062 }
18063
18064 /* ARMv4 BX veneers. */
18065 if (htab->bx_glue_size > 0)
18066 {
18067 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18068 ARM_BX_GLUE_SECTION_NAME);
18069
18070 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18071 (output_bfd, osi.sec->output_section);
18072
18073 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
18074 }
18075
18076 /* Long calls stubs. */
18077 if (htab->stub_bfd && htab->stub_bfd->sections)
18078 {
18079 asection* stub_sec;
18080
18081 for (stub_sec = htab->stub_bfd->sections;
18082 stub_sec != NULL;
18083 stub_sec = stub_sec->next)
18084 {
18085 /* Ignore non-stub sections. */
18086 if (!strstr (stub_sec->name, STUB_SUFFIX))
18087 continue;
18088
18089 osi.sec = stub_sec;
18090
18091 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18092 (output_bfd, osi.sec->output_section);
18093
18094 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
18095 }
18096 }
18097
18098 /* Finally, output mapping symbols for the PLT. */
18099 if (htab->root.splt && htab->root.splt->size > 0)
18100 {
18101 osi.sec = htab->root.splt;
18102 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18103 (output_bfd, osi.sec->output_section));
18104
18105 /* Output mapping symbols for the plt header. */
18106 if (htab->root.target_os == is_vxworks)
18107 {
18108 /* VxWorks shared libraries have no PLT header. */
18109 if (!bfd_link_pic (info))
18110 {
18111 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18112 return false;
18113 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18114 return false;
18115 }
18116 }
18117 else if (htab->root.target_os == is_nacl)
18118 {
18119 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18120 return false;
18121 }
18122 else if (using_thumb_only (htab) && !htab->fdpic_p)
18123 {
18124 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
18125 return false;
18126 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18127 return false;
18128 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
18129 return false;
18130 }
18131 else if (!htab->fdpic_p)
18132 {
18133 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18134 return false;
18135 #ifndef FOUR_WORD_PLT
18136 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
18137 return false;
18138 #endif
18139 }
18140 }
18141 if (htab->root.target_os == is_nacl
18142 && htab->root.iplt
18143 && htab->root.iplt->size > 0)
18144 {
18145 /* NaCl uses a special first entry in .iplt too. */
18146 osi.sec = htab->root.iplt;
18147 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18148 (output_bfd, osi.sec->output_section));
18149 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18150 return false;
18151 }
18152 if ((htab->root.splt && htab->root.splt->size > 0)
18153 || (htab->root.iplt && htab->root.iplt->size > 0))
18154 {
18155 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
18156 for (input_bfd = info->input_bfds;
18157 input_bfd != NULL;
18158 input_bfd = input_bfd->link.next)
18159 {
18160 struct arm_local_iplt_info **local_iplt;
18161 unsigned int i, num_syms;
18162
18163 local_iplt = elf32_arm_local_iplt (input_bfd);
18164 if (local_iplt != NULL)
18165 {
18166 num_syms = elf_symtab_hdr (input_bfd).sh_info;
18167 for (i = 0; i < num_syms; i++)
18168 if (local_iplt[i] != NULL
18169 && !elf32_arm_output_plt_map_1 (&osi, true,
18170 &local_iplt[i]->root,
18171 &local_iplt[i]->arm))
18172 return false;
18173 }
18174 }
18175 }
18176 if (htab->root.tlsdesc_plt != 0)
18177 {
18178 /* Mapping symbols for the lazy tls trampoline. */
18179 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM,
18180 htab->root.tlsdesc_plt))
18181 return false;
18182
18183 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18184 htab->root.tlsdesc_plt + 24))
18185 return false;
18186 }
18187 if (htab->tls_trampoline != 0)
18188 {
18189 /* Mapping symbols for the tls trampoline. */
18190 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
18191 return false;
18192 #ifdef FOUR_WORD_PLT
18193 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18194 htab->tls_trampoline + 12))
18195 return false;
18196 #endif
18197 }
18198
18199 return true;
18200 }
18201
18202 /* Filter normal symbols of CMSE entry functions of ABFD to include in
18203 the import library. All SYMCOUNT symbols of ABFD can be examined
18204 from their pointers in SYMS. Pointers of symbols to keep should be
18205 stored continuously at the beginning of that array.
18206
18207 Returns the number of symbols to keep. */
18208
18209 static unsigned int
18210 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18211 struct bfd_link_info *info,
18212 asymbol **syms, long symcount)
18213 {
18214 size_t maxnamelen;
18215 char *cmse_name;
18216 long src_count, dst_count = 0;
18217 struct elf32_arm_link_hash_table *htab;
18218
18219 htab = elf32_arm_hash_table (info);
18220 if (!htab->stub_bfd || !htab->stub_bfd->sections)
18221 symcount = 0;
18222
18223 maxnamelen = 128;
18224 cmse_name = (char *) bfd_malloc (maxnamelen);
18225 BFD_ASSERT (cmse_name);
18226
18227 for (src_count = 0; src_count < symcount; src_count++)
18228 {
18229 struct elf32_arm_link_hash_entry *cmse_hash;
18230 asymbol *sym;
18231 flagword flags;
18232 char *name;
18233 size_t namelen;
18234
18235 sym = syms[src_count];
18236 flags = sym->flags;
18237 name = (char *) bfd_asymbol_name (sym);
18238
18239 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
18240 continue;
18241 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
18242 continue;
18243
18244 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
18245 if (namelen > maxnamelen)
18246 {
18247 cmse_name = (char *)
18248 bfd_realloc (cmse_name, namelen);
18249 maxnamelen = namelen;
18250 }
18251 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
18252 cmse_hash = (struct elf32_arm_link_hash_entry *)
18253 elf_link_hash_lookup (&(htab)->root, cmse_name, false, false, true);
18254
18255 if (!cmse_hash
18256 || (cmse_hash->root.root.type != bfd_link_hash_defined
18257 && cmse_hash->root.root.type != bfd_link_hash_defweak)
18258 || cmse_hash->root.type != STT_FUNC)
18259 continue;
18260
18261 syms[dst_count++] = sym;
18262 }
18263 free (cmse_name);
18264
18265 syms[dst_count] = NULL;
18266
18267 return dst_count;
18268 }
18269
18270 /* Filter symbols of ABFD to include in the import library. All
18271 SYMCOUNT symbols of ABFD can be examined from their pointers in
18272 SYMS. Pointers of symbols to keep should be stored continuously at
18273 the beginning of that array.
18274
18275 Returns the number of symbols to keep. */
18276
18277 static unsigned int
18278 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18279 struct bfd_link_info *info,
18280 asymbol **syms, long symcount)
18281 {
18282 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
18283
18284 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18285 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18286 library to be a relocatable object file. */
18287 BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
18288 if (globals->cmse_implib)
18289 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
18290 else
18291 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
18292 }
18293
18294 /* Allocate target specific section data. */
18295
18296 static bool
18297 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
18298 {
18299 if (!sec->used_by_bfd)
18300 {
18301 _arm_elf_section_data *sdata;
18302 size_t amt = sizeof (*sdata);
18303
18304 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
18305 if (sdata == NULL)
18306 return false;
18307 sec->used_by_bfd = sdata;
18308 }
18309
18310 return _bfd_elf_new_section_hook (abfd, sec);
18311 }
18312
18313
18314 /* Used to order a list of mapping symbols by address. */
18315
18316 static int
18317 elf32_arm_compare_mapping (const void * a, const void * b)
18318 {
18319 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
18320 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
18321
18322 if (amap->vma > bmap->vma)
18323 return 1;
18324 else if (amap->vma < bmap->vma)
18325 return -1;
18326 else if (amap->type > bmap->type)
18327 /* Ensure results do not depend on the host qsort for objects with
18328 multiple mapping symbols at the same address by sorting on type
18329 after vma. */
18330 return 1;
18331 else if (amap->type < bmap->type)
18332 return -1;
18333 else
18334 return 0;
18335 }
18336
18337 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
18338
18339 static unsigned long
18340 offset_prel31 (unsigned long addr, bfd_vma offset)
18341 {
18342 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
18343 }
18344
18345 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18346 relocations. */
18347
18348 static void
18349 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
18350 {
18351 unsigned long first_word = bfd_get_32 (output_bfd, from);
18352 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
18353
18354 /* High bit of first word is supposed to be zero. */
18355 if ((first_word & 0x80000000ul) == 0)
18356 first_word = offset_prel31 (first_word, offset);
18357
18358 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18359 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
18360 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
18361 second_word = offset_prel31 (second_word, offset);
18362
18363 bfd_put_32 (output_bfd, first_word, to);
18364 bfd_put_32 (output_bfd, second_word, to + 4);
18365 }
18366
18367 /* Data for make_branch_to_a8_stub(). */
18368
18369 struct a8_branch_to_stub_data
18370 {
18371 asection *writing_section;
18372 bfd_byte *contents;
18373 };
18374
18375
18376 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
18377 places for a particular section. */
18378
18379 static bool
18380 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
18381 void *in_arg)
18382 {
18383 struct elf32_arm_stub_hash_entry *stub_entry;
18384 struct a8_branch_to_stub_data *data;
18385 bfd_byte *contents;
18386 unsigned long branch_insn;
18387 bfd_vma veneered_insn_loc, veneer_entry_loc;
18388 bfd_signed_vma branch_offset;
18389 bfd *abfd;
18390 unsigned int loc;
18391
18392 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18393 data = (struct a8_branch_to_stub_data *) in_arg;
18394
18395 if (stub_entry->target_section != data->writing_section
18396 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
18397 return true;
18398
18399 contents = data->contents;
18400
18401 /* We use target_section as Cortex-A8 erratum workaround stubs are only
18402 generated when both source and target are in the same section. */
18403 veneered_insn_loc = stub_entry->target_section->output_section->vma
18404 + stub_entry->target_section->output_offset
18405 + stub_entry->source_value;
18406
18407 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
18408 + stub_entry->stub_sec->output_offset
18409 + stub_entry->stub_offset;
18410
18411 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
18412 veneered_insn_loc &= ~3u;
18413
18414 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
18415
18416 abfd = stub_entry->target_section->owner;
18417 loc = stub_entry->source_value;
18418
18419 /* We attempt to avoid this condition by setting stubs_always_after_branch
18420 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18421 This check is just to be on the safe side... */
18422 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
18423 {
18424 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18425 "allocated in unsafe location"), abfd);
18426 return false;
18427 }
18428
18429 switch (stub_entry->stub_type)
18430 {
18431 case arm_stub_a8_veneer_b:
18432 case arm_stub_a8_veneer_b_cond:
18433 branch_insn = 0xf0009000;
18434 goto jump24;
18435
18436 case arm_stub_a8_veneer_blx:
18437 branch_insn = 0xf000e800;
18438 goto jump24;
18439
18440 case arm_stub_a8_veneer_bl:
18441 {
18442 unsigned int i1, j1, i2, j2, s;
18443
18444 branch_insn = 0xf000d000;
18445
18446 jump24:
18447 if (branch_offset < -16777216 || branch_offset > 16777214)
18448 {
18449 /* There's not much we can do apart from complain if this
18450 happens. */
18451 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18452 "of range (input file too large)"), abfd);
18453 return false;
18454 }
18455
18456 /* i1 = not(j1 eor s), so:
18457 not i1 = j1 eor s
18458 j1 = (not i1) eor s. */
18459
18460 branch_insn |= (branch_offset >> 1) & 0x7ff;
18461 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
18462 i2 = (branch_offset >> 22) & 1;
18463 i1 = (branch_offset >> 23) & 1;
18464 s = (branch_offset >> 24) & 1;
18465 j1 = (!i1) ^ s;
18466 j2 = (!i2) ^ s;
18467 branch_insn |= j2 << 11;
18468 branch_insn |= j1 << 13;
18469 branch_insn |= s << 26;
18470 }
18471 break;
18472
18473 default:
18474 BFD_FAIL ();
18475 return false;
18476 }
18477
18478 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
18479 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
18480
18481 return true;
18482 }
18483
18484 /* Beginning of stm32l4xx work-around. */
18485
18486 /* Functions encoding instructions necessary for the emission of the
18487 fix-stm32l4xx-629360.
18488 Encoding is extracted from the
18489 ARM (C) Architecture Reference Manual
18490 ARMv7-A and ARMv7-R edition
18491 ARM DDI 0406C.b (ID072512). */
18492
18493 static inline bfd_vma
18494 create_instruction_branch_absolute (int branch_offset)
18495 {
18496 /* A8.8.18 B (A8-334)
18497 B target_address (Encoding T4). */
18498 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
18499 /* jump offset is: S:I1:I2:imm10:imm11:0. */
18500 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
18501
18502 int s = ((branch_offset & 0x1000000) >> 24);
18503 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
18504 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
18505
18506 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
18507 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
18508
18509 bfd_vma patched_inst = 0xf0009000
18510 | s << 26 /* S. */
18511 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
18512 | j1 << 13 /* J1. */
18513 | j2 << 11 /* J2. */
18514 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
18515
18516 return patched_inst;
18517 }
18518
18519 static inline bfd_vma
18520 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
18521 {
18522 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18523 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
18524 bfd_vma patched_inst = 0xe8900000
18525 | (/*W=*/wback << 21)
18526 | (base_reg << 16)
18527 | (reg_mask & 0x0000ffff);
18528
18529 return patched_inst;
18530 }
18531
18532 static inline bfd_vma
18533 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
18534 {
18535 /* A8.8.60 LDMDB/LDMEA (A8-402)
18536 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
18537 bfd_vma patched_inst = 0xe9100000
18538 | (/*W=*/wback << 21)
18539 | (base_reg << 16)
18540 | (reg_mask & 0x0000ffff);
18541
18542 return patched_inst;
18543 }
18544
18545 static inline bfd_vma
18546 create_instruction_mov (int target_reg, int source_reg)
18547 {
18548 /* A8.8.103 MOV (register) (A8-486)
18549 MOV Rd, Rm (Encoding T1). */
18550 bfd_vma patched_inst = 0x4600
18551 | (target_reg & 0x7)
18552 | ((target_reg & 0x8) >> 3) << 7
18553 | (source_reg << 3);
18554
18555 return patched_inst;
18556 }
18557
18558 static inline bfd_vma
18559 create_instruction_sub (int target_reg, int source_reg, int value)
18560 {
18561 /* A8.8.221 SUB (immediate) (A8-708)
18562 SUB Rd, Rn, #value (Encoding T3). */
18563 bfd_vma patched_inst = 0xf1a00000
18564 | (target_reg << 8)
18565 | (source_reg << 16)
18566 | (/*S=*/0 << 20)
18567 | ((value & 0x800) >> 11) << 26
18568 | ((value & 0x700) >> 8) << 12
18569 | (value & 0x0ff);
18570
18571 return patched_inst;
18572 }
18573
18574 static inline bfd_vma
18575 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
18576 int first_reg)
18577 {
18578 /* A8.8.332 VLDM (A8-922)
18579 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
18580 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
18581 | (/*W=*/wback << 21)
18582 | (base_reg << 16)
18583 | (num_words & 0x000000ff)
18584 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
18585 | (first_reg & 0x00000001) << 22;
18586
18587 return patched_inst;
18588 }
18589
18590 static inline bfd_vma
18591 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
18592 int first_reg)
18593 {
18594 /* A8.8.332 VLDM (A8-922)
18595 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
18596 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
18597 | (base_reg << 16)
18598 | (num_words & 0x000000ff)
18599 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
18600 | (first_reg & 0x00000001) << 22;
18601
18602 return patched_inst;
18603 }
18604
18605 static inline bfd_vma
18606 create_instruction_udf_w (int value)
18607 {
18608 /* A8.8.247 UDF (A8-758)
18609 Undefined (Encoding T2). */
18610 bfd_vma patched_inst = 0xf7f0a000
18611 | (value & 0x00000fff)
18612 | (value & 0x000f0000) << 16;
18613
18614 return patched_inst;
18615 }
18616
18617 static inline bfd_vma
18618 create_instruction_udf (int value)
18619 {
18620 /* A8.8.247 UDF (A8-758)
18621 Undefined (Encoding T1). */
18622 bfd_vma patched_inst = 0xde00
18623 | (value & 0xff);
18624
18625 return patched_inst;
18626 }
18627
18628 /* Functions writing an instruction in memory, returning the next
18629 memory position to write to. */
18630
18631 static inline bfd_byte *
18632 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
18633 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18634 {
18635 put_thumb2_insn (htab, output_bfd, insn, pt);
18636 return pt + 4;
18637 }
18638
18639 static inline bfd_byte *
18640 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
18641 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18642 {
18643 put_thumb_insn (htab, output_bfd, insn, pt);
18644 return pt + 2;
18645 }
18646
18647 /* Function filling up a region in memory with T1 and T2 UDFs taking
18648 care of alignment. */
18649
18650 static bfd_byte *
18651 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
18652 bfd * output_bfd,
18653 const bfd_byte * const base_stub_contents,
18654 bfd_byte * const from_stub_contents,
18655 const bfd_byte * const end_stub_contents)
18656 {
18657 bfd_byte *current_stub_contents = from_stub_contents;
18658
18659 /* Fill the remaining of the stub with deterministic contents : UDF
18660 instructions.
18661 Check if realignment is needed on modulo 4 frontier using T1, to
18662 further use T2. */
18663 if ((current_stub_contents < end_stub_contents)
18664 && !((current_stub_contents - base_stub_contents) % 2)
18665 && ((current_stub_contents - base_stub_contents) % 4))
18666 current_stub_contents =
18667 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18668 create_instruction_udf (0));
18669
18670 for (; current_stub_contents < end_stub_contents;)
18671 current_stub_contents =
18672 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18673 create_instruction_udf_w (0));
18674
18675 return current_stub_contents;
18676 }
18677
18678 /* Functions writing the stream of instructions equivalent to the
18679 derived sequence for ldmia, ldmdb, vldm respectively. */
18680
18681 static void
18682 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
18683 bfd * output_bfd,
18684 const insn32 initial_insn,
18685 const bfd_byte *const initial_insn_addr,
18686 bfd_byte *const base_stub_contents)
18687 {
18688 int wback = (initial_insn & 0x00200000) >> 21;
18689 int ri, rn = (initial_insn & 0x000F0000) >> 16;
18690 int insn_all_registers = initial_insn & 0x0000ffff;
18691 int insn_low_registers, insn_high_registers;
18692 int usable_register_mask;
18693 int nb_registers = elf32_arm_popcount (insn_all_registers);
18694 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18695 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18696 bfd_byte *current_stub_contents = base_stub_contents;
18697
18698 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
18699
18700 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18701 smaller than 8 registers load sequences that do not cause the
18702 hardware issue. */
18703 if (nb_registers <= 8)
18704 {
18705 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18706 current_stub_contents =
18707 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18708 initial_insn);
18709
18710 /* B initial_insn_addr+4. */
18711 if (!restore_pc)
18712 current_stub_contents =
18713 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18714 create_instruction_branch_absolute
18715 (initial_insn_addr - current_stub_contents));
18716
18717 /* Fill the remaining of the stub with deterministic contents. */
18718 current_stub_contents =
18719 stm32l4xx_fill_stub_udf (htab, output_bfd,
18720 base_stub_contents, current_stub_contents,
18721 base_stub_contents +
18722 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18723
18724 return;
18725 }
18726
18727 /* - reg_list[13] == 0. */
18728 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
18729
18730 /* - reg_list[14] & reg_list[15] != 1. */
18731 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18732
18733 /* - if (wback==1) reg_list[rn] == 0. */
18734 BFD_ASSERT (!wback || !restore_rn);
18735
18736 /* - nb_registers > 8. */
18737 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18738
18739 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18740
18741 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
18742 - One with the 7 lowest registers (register mask 0x007F)
18743 This LDM will finally contain between 2 and 7 registers
18744 - One with the 7 highest registers (register mask 0xDF80)
18745 This ldm will finally contain between 2 and 7 registers. */
18746 insn_low_registers = insn_all_registers & 0x007F;
18747 insn_high_registers = insn_all_registers & 0xDF80;
18748
18749 /* A spare register may be needed during this veneer to temporarily
18750 handle the base register. This register will be restored with the
18751 last LDM operation.
18752 The usable register may be any general purpose register (that
18753 excludes PC, SP, LR : register mask is 0x1FFF). */
18754 usable_register_mask = 0x1FFF;
18755
18756 /* Generate the stub function. */
18757 if (wback)
18758 {
18759 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
18760 current_stub_contents =
18761 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18762 create_instruction_ldmia
18763 (rn, /*wback=*/1, insn_low_registers));
18764
18765 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
18766 current_stub_contents =
18767 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18768 create_instruction_ldmia
18769 (rn, /*wback=*/1, insn_high_registers));
18770 if (!restore_pc)
18771 {
18772 /* B initial_insn_addr+4. */
18773 current_stub_contents =
18774 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18775 create_instruction_branch_absolute
18776 (initial_insn_addr - current_stub_contents));
18777 }
18778 }
18779 else /* if (!wback). */
18780 {
18781 ri = rn;
18782
18783 /* If Rn is not part of the high-register-list, move it there. */
18784 if (!(insn_high_registers & (1 << rn)))
18785 {
18786 /* Choose a Ri in the high-register-list that will be restored. */
18787 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18788
18789 /* MOV Ri, Rn. */
18790 current_stub_contents =
18791 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18792 create_instruction_mov (ri, rn));
18793 }
18794
18795 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18796 current_stub_contents =
18797 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18798 create_instruction_ldmia
18799 (ri, /*wback=*/1, insn_low_registers));
18800
18801 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
18802 current_stub_contents =
18803 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18804 create_instruction_ldmia
18805 (ri, /*wback=*/0, insn_high_registers));
18806
18807 if (!restore_pc)
18808 {
18809 /* B initial_insn_addr+4. */
18810 current_stub_contents =
18811 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18812 create_instruction_branch_absolute
18813 (initial_insn_addr - current_stub_contents));
18814 }
18815 }
18816
18817 /* Fill the remaining of the stub with deterministic contents. */
18818 current_stub_contents =
18819 stm32l4xx_fill_stub_udf (htab, output_bfd,
18820 base_stub_contents, current_stub_contents,
18821 base_stub_contents +
18822 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18823 }
18824
18825 static void
18826 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
18827 bfd * output_bfd,
18828 const insn32 initial_insn,
18829 const bfd_byte *const initial_insn_addr,
18830 bfd_byte *const base_stub_contents)
18831 {
18832 int wback = (initial_insn & 0x00200000) >> 21;
18833 int ri, rn = (initial_insn & 0x000f0000) >> 16;
18834 int insn_all_registers = initial_insn & 0x0000ffff;
18835 int insn_low_registers, insn_high_registers;
18836 int usable_register_mask;
18837 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18838 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18839 int nb_registers = elf32_arm_popcount (insn_all_registers);
18840 bfd_byte *current_stub_contents = base_stub_contents;
18841
18842 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
18843
18844 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18845 smaller than 8 registers load sequences that do not cause the
18846 hardware issue. */
18847 if (nb_registers <= 8)
18848 {
18849 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18850 current_stub_contents =
18851 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18852 initial_insn);
18853
18854 /* B initial_insn_addr+4. */
18855 current_stub_contents =
18856 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18857 create_instruction_branch_absolute
18858 (initial_insn_addr - current_stub_contents));
18859
18860 /* Fill the remaining of the stub with deterministic contents. */
18861 current_stub_contents =
18862 stm32l4xx_fill_stub_udf (htab, output_bfd,
18863 base_stub_contents, current_stub_contents,
18864 base_stub_contents +
18865 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18866
18867 return;
18868 }
18869
18870 /* - reg_list[13] == 0. */
18871 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
18872
18873 /* - reg_list[14] & reg_list[15] != 1. */
18874 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18875
18876 /* - if (wback==1) reg_list[rn] == 0. */
18877 BFD_ASSERT (!wback || !restore_rn);
18878
18879 /* - nb_registers > 8. */
18880 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18881
18882 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18883
18884 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
18885 - One with the 7 lowest registers (register mask 0x007F)
18886 This LDM will finally contain between 2 and 7 registers
18887 - One with the 7 highest registers (register mask 0xDF80)
18888 This ldm will finally contain between 2 and 7 registers. */
18889 insn_low_registers = insn_all_registers & 0x007F;
18890 insn_high_registers = insn_all_registers & 0xDF80;
18891
18892 /* A spare register may be needed during this veneer to temporarily
18893 handle the base register. This register will be restored with
18894 the last LDM operation.
18895 The usable register may be any general purpose register (that excludes
18896 PC, SP, LR : register mask is 0x1FFF). */
18897 usable_register_mask = 0x1FFF;
18898
18899 /* Generate the stub function. */
18900 if (!wback && !restore_pc && !restore_rn)
18901 {
18902 /* Choose a Ri in the low-register-list that will be restored. */
18903 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18904
18905 /* MOV Ri, Rn. */
18906 current_stub_contents =
18907 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18908 create_instruction_mov (ri, rn));
18909
18910 /* LDMDB Ri!, {R-high-register-list}. */
18911 current_stub_contents =
18912 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18913 create_instruction_ldmdb
18914 (ri, /*wback=*/1, insn_high_registers));
18915
18916 /* LDMDB Ri, {R-low-register-list}. */
18917 current_stub_contents =
18918 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18919 create_instruction_ldmdb
18920 (ri, /*wback=*/0, insn_low_registers));
18921
18922 /* B initial_insn_addr+4. */
18923 current_stub_contents =
18924 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18925 create_instruction_branch_absolute
18926 (initial_insn_addr - current_stub_contents));
18927 }
18928 else if (wback && !restore_pc && !restore_rn)
18929 {
18930 /* LDMDB Rn!, {R-high-register-list}. */
18931 current_stub_contents =
18932 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18933 create_instruction_ldmdb
18934 (rn, /*wback=*/1, insn_high_registers));
18935
18936 /* LDMDB Rn!, {R-low-register-list}. */
18937 current_stub_contents =
18938 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18939 create_instruction_ldmdb
18940 (rn, /*wback=*/1, insn_low_registers));
18941
18942 /* B initial_insn_addr+4. */
18943 current_stub_contents =
18944 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18945 create_instruction_branch_absolute
18946 (initial_insn_addr - current_stub_contents));
18947 }
18948 else if (!wback && restore_pc && !restore_rn)
18949 {
18950 /* Choose a Ri in the high-register-list that will be restored. */
18951 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18952
18953 /* SUB Ri, Rn, #(4*nb_registers). */
18954 current_stub_contents =
18955 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18956 create_instruction_sub (ri, rn, (4 * nb_registers)));
18957
18958 /* LDMIA Ri!, {R-low-register-list}. */
18959 current_stub_contents =
18960 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18961 create_instruction_ldmia
18962 (ri, /*wback=*/1, insn_low_registers));
18963
18964 /* LDMIA Ri, {R-high-register-list}. */
18965 current_stub_contents =
18966 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18967 create_instruction_ldmia
18968 (ri, /*wback=*/0, insn_high_registers));
18969 }
18970 else if (wback && restore_pc && !restore_rn)
18971 {
18972 /* Choose a Ri in the high-register-list that will be restored. */
18973 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18974
18975 /* SUB Rn, Rn, #(4*nb_registers) */
18976 current_stub_contents =
18977 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18978 create_instruction_sub (rn, rn, (4 * nb_registers)));
18979
18980 /* MOV Ri, Rn. */
18981 current_stub_contents =
18982 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18983 create_instruction_mov (ri, rn));
18984
18985 /* LDMIA Ri!, {R-low-register-list}. */
18986 current_stub_contents =
18987 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18988 create_instruction_ldmia
18989 (ri, /*wback=*/1, insn_low_registers));
18990
18991 /* LDMIA Ri, {R-high-register-list}. */
18992 current_stub_contents =
18993 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18994 create_instruction_ldmia
18995 (ri, /*wback=*/0, insn_high_registers));
18996 }
18997 else if (!wback && !restore_pc && restore_rn)
18998 {
18999 ri = rn;
19000 if (!(insn_low_registers & (1 << rn)))
19001 {
19002 /* Choose a Ri in the low-register-list that will be restored. */
19003 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19004
19005 /* MOV Ri, Rn. */
19006 current_stub_contents =
19007 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19008 create_instruction_mov (ri, rn));
19009 }
19010
19011 /* LDMDB Ri!, {R-high-register-list}. */
19012 current_stub_contents =
19013 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19014 create_instruction_ldmdb
19015 (ri, /*wback=*/1, insn_high_registers));
19016
19017 /* LDMDB Ri, {R-low-register-list}. */
19018 current_stub_contents =
19019 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19020 create_instruction_ldmdb
19021 (ri, /*wback=*/0, insn_low_registers));
19022
19023 /* B initial_insn_addr+4. */
19024 current_stub_contents =
19025 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19026 create_instruction_branch_absolute
19027 (initial_insn_addr - current_stub_contents));
19028 }
19029 else if (!wback && restore_pc && restore_rn)
19030 {
19031 ri = rn;
19032 if (!(insn_high_registers & (1 << rn)))
19033 {
19034 /* Choose a Ri in the high-register-list that will be restored. */
19035 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19036 }
19037
19038 /* SUB Ri, Rn, #(4*nb_registers). */
19039 current_stub_contents =
19040 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19041 create_instruction_sub (ri, rn, (4 * nb_registers)));
19042
19043 /* LDMIA Ri!, {R-low-register-list}. */
19044 current_stub_contents =
19045 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19046 create_instruction_ldmia
19047 (ri, /*wback=*/1, insn_low_registers));
19048
19049 /* LDMIA Ri, {R-high-register-list}. */
19050 current_stub_contents =
19051 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19052 create_instruction_ldmia
19053 (ri, /*wback=*/0, insn_high_registers));
19054 }
19055 else if (wback && restore_rn)
19056 {
19057 /* The assembler should not have accepted to encode this. */
19058 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
19059 "undefined behavior.\n");
19060 }
19061
19062 /* Fill the remaining of the stub with deterministic contents. */
19063 current_stub_contents =
19064 stm32l4xx_fill_stub_udf (htab, output_bfd,
19065 base_stub_contents, current_stub_contents,
19066 base_stub_contents +
19067 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19068
19069 }
19070
19071 static void
19072 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
19073 bfd * output_bfd,
19074 const insn32 initial_insn,
19075 const bfd_byte *const initial_insn_addr,
19076 bfd_byte *const base_stub_contents)
19077 {
19078 int num_words = initial_insn & 0xff;
19079 bfd_byte *current_stub_contents = base_stub_contents;
19080
19081 BFD_ASSERT (is_thumb2_vldm (initial_insn));
19082
19083 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19084 smaller than 8 words load sequences that do not cause the
19085 hardware issue. */
19086 if (num_words <= 8)
19087 {
19088 /* Untouched instruction. */
19089 current_stub_contents =
19090 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19091 initial_insn);
19092
19093 /* B initial_insn_addr+4. */
19094 current_stub_contents =
19095 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19096 create_instruction_branch_absolute
19097 (initial_insn_addr - current_stub_contents));
19098 }
19099 else
19100 {
19101 bool is_dp = /* DP encoding. */
19102 (initial_insn & 0xfe100f00) == 0xec100b00;
19103 bool is_ia_nobang = /* (IA without !). */
19104 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
19105 bool is_ia_bang = /* (IA with !) - includes VPOP. */
19106 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
19107 bool is_db_bang = /* (DB with !). */
19108 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
19109 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
19110 /* d = UInt (Vd:D);. */
19111 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
19112 | (((unsigned int)initial_insn << 9) >> 31);
19113
19114 /* Compute the number of 8-words chunks needed to split. */
19115 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
19116 int chunk;
19117
19118 /* The test coverage has been done assuming the following
19119 hypothesis that exactly one of the previous is_ predicates is
19120 true. */
19121 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
19122 && !(is_ia_nobang & is_ia_bang & is_db_bang));
19123
19124 /* We treat the cutting of the words in one pass for all
19125 cases, then we emit the adjustments:
19126
19127 vldm rx, {...}
19128 -> vldm rx!, {8_words_or_less} for each needed 8_word
19129 -> sub rx, rx, #size (list)
19130
19131 vldm rx!, {...}
19132 -> vldm rx!, {8_words_or_less} for each needed 8_word
19133 This also handles vpop instruction (when rx is sp)
19134
19135 vldmd rx!, {...}
19136 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
19137 for (chunk = 0; chunk < chunks; ++chunk)
19138 {
19139 bfd_vma new_insn = 0;
19140
19141 if (is_ia_nobang || is_ia_bang)
19142 {
19143 new_insn = create_instruction_vldmia
19144 (base_reg,
19145 is_dp,
19146 /*wback= . */1,
19147 chunks - (chunk + 1) ?
19148 8 : num_words - chunk * 8,
19149 first_reg + chunk * 8);
19150 }
19151 else if (is_db_bang)
19152 {
19153 new_insn = create_instruction_vldmdb
19154 (base_reg,
19155 is_dp,
19156 chunks - (chunk + 1) ?
19157 8 : num_words - chunk * 8,
19158 first_reg + chunk * 8);
19159 }
19160
19161 if (new_insn)
19162 current_stub_contents =
19163 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19164 new_insn);
19165 }
19166
19167 /* Only this case requires the base register compensation
19168 subtract. */
19169 if (is_ia_nobang)
19170 {
19171 current_stub_contents =
19172 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19173 create_instruction_sub
19174 (base_reg, base_reg, 4*num_words));
19175 }
19176
19177 /* B initial_insn_addr+4. */
19178 current_stub_contents =
19179 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19180 create_instruction_branch_absolute
19181 (initial_insn_addr - current_stub_contents));
19182 }
19183
19184 /* Fill the remaining of the stub with deterministic contents. */
19185 current_stub_contents =
19186 stm32l4xx_fill_stub_udf (htab, output_bfd,
19187 base_stub_contents, current_stub_contents,
19188 base_stub_contents +
19189 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
19190 }
19191
19192 static void
19193 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
19194 bfd * output_bfd,
19195 const insn32 wrong_insn,
19196 const bfd_byte *const wrong_insn_addr,
19197 bfd_byte *const stub_contents)
19198 {
19199 if (is_thumb2_ldmia (wrong_insn))
19200 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
19201 wrong_insn, wrong_insn_addr,
19202 stub_contents);
19203 else if (is_thumb2_ldmdb (wrong_insn))
19204 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
19205 wrong_insn, wrong_insn_addr,
19206 stub_contents);
19207 else if (is_thumb2_vldm (wrong_insn))
19208 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
19209 wrong_insn, wrong_insn_addr,
19210 stub_contents);
19211 }
19212
19213 /* End of stm32l4xx work-around. */
19214
19215
19216 /* Do code byteswapping. Return FALSE afterwards so that the section is
19217 written out as normal. */
19218
19219 static bool
19220 elf32_arm_write_section (bfd *output_bfd,
19221 struct bfd_link_info *link_info,
19222 asection *sec,
19223 bfd_byte *contents)
19224 {
19225 unsigned int mapcount, errcount;
19226 _arm_elf_section_data *arm_data;
19227 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
19228 elf32_arm_section_map *map;
19229 elf32_vfp11_erratum_list *errnode;
19230 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
19231 bfd_vma ptr;
19232 bfd_vma end;
19233 bfd_vma offset = sec->output_section->vma + sec->output_offset;
19234 bfd_byte tmp;
19235 unsigned int i;
19236
19237 if (globals == NULL)
19238 return false;
19239
19240 /* If this section has not been allocated an _arm_elf_section_data
19241 structure then we cannot record anything. */
19242 arm_data = get_arm_elf_section_data (sec);
19243 if (arm_data == NULL)
19244 return false;
19245
19246 mapcount = arm_data->mapcount;
19247 map = arm_data->map;
19248 errcount = arm_data->erratumcount;
19249
19250 if (errcount != 0)
19251 {
19252 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
19253
19254 for (errnode = arm_data->erratumlist; errnode != 0;
19255 errnode = errnode->next)
19256 {
19257 bfd_vma target = errnode->vma - offset;
19258
19259 switch (errnode->type)
19260 {
19261 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
19262 {
19263 bfd_vma branch_to_veneer;
19264 /* Original condition code of instruction, plus bit mask for
19265 ARM B instruction. */
19266 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
19267 | 0x0a000000;
19268
19269 /* The instruction is before the label. */
19270 target -= 4;
19271
19272 /* Above offset included in -4 below. */
19273 branch_to_veneer = errnode->u.b.veneer->vma
19274 - errnode->vma - 4;
19275
19276 if ((signed) branch_to_veneer < -(1 << 25)
19277 || (signed) branch_to_veneer >= (1 << 25))
19278 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19279 "range"), output_bfd);
19280
19281 insn |= (branch_to_veneer >> 2) & 0xffffff;
19282 contents[endianflip ^ target] = insn & 0xff;
19283 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19284 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19285 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19286 }
19287 break;
19288
19289 case VFP11_ERRATUM_ARM_VENEER:
19290 {
19291 bfd_vma branch_from_veneer;
19292 unsigned int insn;
19293
19294 /* Take size of veneer into account. */
19295 branch_from_veneer = errnode->u.v.branch->vma
19296 - errnode->vma - 12;
19297
19298 if ((signed) branch_from_veneer < -(1 << 25)
19299 || (signed) branch_from_veneer >= (1 << 25))
19300 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19301 "range"), output_bfd);
19302
19303 /* Original instruction. */
19304 insn = errnode->u.v.branch->u.b.vfp_insn;
19305 contents[endianflip ^ target] = insn & 0xff;
19306 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19307 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19308 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19309
19310 /* Branch back to insn after original insn. */
19311 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
19312 contents[endianflip ^ (target + 4)] = insn & 0xff;
19313 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
19314 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
19315 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
19316 }
19317 break;
19318
19319 default:
19320 abort ();
19321 }
19322 }
19323 }
19324
19325 if (arm_data->stm32l4xx_erratumcount != 0)
19326 {
19327 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
19328 stm32l4xx_errnode != 0;
19329 stm32l4xx_errnode = stm32l4xx_errnode->next)
19330 {
19331 bfd_vma target = stm32l4xx_errnode->vma - offset;
19332
19333 switch (stm32l4xx_errnode->type)
19334 {
19335 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
19336 {
19337 unsigned int insn;
19338 bfd_vma branch_to_veneer =
19339 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
19340
19341 if ((signed) branch_to_veneer < -(1 << 24)
19342 || (signed) branch_to_veneer >= (1 << 24))
19343 {
19344 bfd_vma out_of_range =
19345 ((signed) branch_to_veneer < -(1 << 24)) ?
19346 - branch_to_veneer - (1 << 24) :
19347 ((signed) branch_to_veneer >= (1 << 24)) ?
19348 branch_to_veneer - (1 << 24) : 0;
19349
19350 _bfd_error_handler
19351 (_("%pB(%#" PRIx64 "): error: "
19352 "cannot create STM32L4XX veneer; "
19353 "jump out of range by %" PRId64 " bytes; "
19354 "cannot encode branch instruction"),
19355 output_bfd,
19356 (uint64_t) (stm32l4xx_errnode->vma - 4),
19357 (int64_t) out_of_range);
19358 continue;
19359 }
19360
19361 insn = create_instruction_branch_absolute
19362 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
19363
19364 /* The instruction is before the label. */
19365 target -= 4;
19366
19367 put_thumb2_insn (globals, output_bfd,
19368 (bfd_vma) insn, contents + target);
19369 }
19370 break;
19371
19372 case STM32L4XX_ERRATUM_VENEER:
19373 {
19374 bfd_byte * veneer;
19375 bfd_byte * veneer_r;
19376 unsigned int insn;
19377
19378 veneer = contents + target;
19379 veneer_r = veneer
19380 + stm32l4xx_errnode->u.b.veneer->vma
19381 - stm32l4xx_errnode->vma - 4;
19382
19383 if ((signed) (veneer_r - veneer -
19384 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
19385 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
19386 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
19387 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
19388 || (signed) (veneer_r - veneer) >= (1 << 24))
19389 {
19390 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19391 "veneer"), output_bfd);
19392 continue;
19393 }
19394
19395 /* Original instruction. */
19396 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
19397
19398 stm32l4xx_create_replacing_stub
19399 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
19400 }
19401 break;
19402
19403 default:
19404 abort ();
19405 }
19406 }
19407 }
19408
19409 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
19410 {
19411 arm_unwind_table_edit *edit_node
19412 = arm_data->u.exidx.unwind_edit_list;
19413 /* Now, sec->size is the size of the section we will write. The original
19414 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19415 markers) was sec->rawsize. (This isn't the case if we perform no
19416 edits, then rawsize will be zero and we should use size). */
19417 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
19418 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
19419 unsigned int in_index, out_index;
19420 bfd_vma add_to_offsets = 0;
19421
19422 if (edited_contents == NULL)
19423 return false;
19424 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
19425 {
19426 if (edit_node)
19427 {
19428 unsigned int edit_index = edit_node->index;
19429
19430 if (in_index < edit_index && in_index * 8 < input_size)
19431 {
19432 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19433 contents + in_index * 8, add_to_offsets);
19434 out_index++;
19435 in_index++;
19436 }
19437 else if (in_index == edit_index
19438 || (in_index * 8 >= input_size
19439 && edit_index == UINT_MAX))
19440 {
19441 switch (edit_node->type)
19442 {
19443 case DELETE_EXIDX_ENTRY:
19444 in_index++;
19445 add_to_offsets += 8;
19446 break;
19447
19448 case INSERT_EXIDX_CANTUNWIND_AT_END:
19449 {
19450 asection *text_sec = edit_node->linked_section;
19451 bfd_vma text_offset = text_sec->output_section->vma
19452 + text_sec->output_offset
19453 + text_sec->size;
19454 bfd_vma exidx_offset = offset + out_index * 8;
19455 unsigned long prel31_offset;
19456
19457 /* Note: this is meant to be equivalent to an
19458 R_ARM_PREL31 relocation. These synthetic
19459 EXIDX_CANTUNWIND markers are not relocated by the
19460 usual BFD method. */
19461 prel31_offset = (text_offset - exidx_offset)
19462 & 0x7ffffffful;
19463 if (bfd_link_relocatable (link_info))
19464 {
19465 /* Here relocation for new EXIDX_CANTUNWIND is
19466 created, so there is no need to
19467 adjust offset by hand. */
19468 prel31_offset = text_sec->output_offset
19469 + text_sec->size;
19470 }
19471
19472 /* First address we can't unwind. */
19473 bfd_put_32 (output_bfd, prel31_offset,
19474 &edited_contents[out_index * 8]);
19475
19476 /* Code for EXIDX_CANTUNWIND. */
19477 bfd_put_32 (output_bfd, 0x1,
19478 &edited_contents[out_index * 8 + 4]);
19479
19480 out_index++;
19481 add_to_offsets -= 8;
19482 }
19483 break;
19484 }
19485
19486 edit_node = edit_node->next;
19487 }
19488 }
19489 else
19490 {
19491 /* No more edits, copy remaining entries verbatim. */
19492 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19493 contents + in_index * 8, add_to_offsets);
19494 out_index++;
19495 in_index++;
19496 }
19497 }
19498
19499 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
19500 bfd_set_section_contents (output_bfd, sec->output_section,
19501 edited_contents,
19502 (file_ptr) sec->output_offset, sec->size);
19503
19504 return true;
19505 }
19506
19507 /* Fix code to point to Cortex-A8 erratum stubs. */
19508 if (globals->fix_cortex_a8)
19509 {
19510 struct a8_branch_to_stub_data data;
19511
19512 data.writing_section = sec;
19513 data.contents = contents;
19514
19515 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
19516 & data);
19517 }
19518
19519 if (mapcount == 0)
19520 return false;
19521
19522 if (globals->byteswap_code)
19523 {
19524 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
19525
19526 ptr = map[0].vma;
19527 for (i = 0; i < mapcount; i++)
19528 {
19529 if (i == mapcount - 1)
19530 end = sec->size;
19531 else
19532 end = map[i + 1].vma;
19533
19534 switch (map[i].type)
19535 {
19536 case 'a':
19537 /* Byte swap code words. */
19538 while (ptr + 3 < end)
19539 {
19540 tmp = contents[ptr];
19541 contents[ptr] = contents[ptr + 3];
19542 contents[ptr + 3] = tmp;
19543 tmp = contents[ptr + 1];
19544 contents[ptr + 1] = contents[ptr + 2];
19545 contents[ptr + 2] = tmp;
19546 ptr += 4;
19547 }
19548 break;
19549
19550 case 't':
19551 /* Byte swap code halfwords. */
19552 while (ptr + 1 < end)
19553 {
19554 tmp = contents[ptr];
19555 contents[ptr] = contents[ptr + 1];
19556 contents[ptr + 1] = tmp;
19557 ptr += 2;
19558 }
19559 break;
19560
19561 case 'd':
19562 /* Leave data alone. */
19563 break;
19564 }
19565 ptr = end;
19566 }
19567 }
19568
19569 free (map);
19570 arm_data->mapcount = -1;
19571 arm_data->mapsize = 0;
19572 arm_data->map = NULL;
19573
19574 return false;
19575 }
19576
19577 /* Mangle thumb function symbols as we read them in. */
19578
19579 static bool
19580 elf32_arm_swap_symbol_in (bfd * abfd,
19581 const void *psrc,
19582 const void *pshn,
19583 Elf_Internal_Sym *dst)
19584 {
19585 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
19586 return false;
19587 dst->st_target_internal = 0;
19588
19589 /* New EABI objects mark thumb function symbols by setting the low bit of
19590 the address. */
19591 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
19592 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
19593 {
19594 if (dst->st_value & 1)
19595 {
19596 dst->st_value &= ~(bfd_vma) 1;
19597 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
19598 ST_BRANCH_TO_THUMB);
19599 }
19600 else
19601 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
19602 }
19603 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
19604 {
19605 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
19606 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
19607 }
19608 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
19609 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
19610 else
19611 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
19612
19613 return true;
19614 }
19615
19616
19617 /* Mangle thumb function symbols as we write them out. */
19618
19619 static void
19620 elf32_arm_swap_symbol_out (bfd *abfd,
19621 const Elf_Internal_Sym *src,
19622 void *cdst,
19623 void *shndx)
19624 {
19625 Elf_Internal_Sym newsym;
19626
19627 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19628 of the address set, as per the new EABI. We do this unconditionally
19629 because objcopy does not set the elf header flags until after
19630 it writes out the symbol table. */
19631 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
19632 {
19633 newsym = *src;
19634 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
19635 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
19636 if (newsym.st_shndx != SHN_UNDEF)
19637 {
19638 /* Do this only for defined symbols. At link type, the static
19639 linker will simulate the work of dynamic linker of resolving
19640 symbols and will carry over the thumbness of found symbols to
19641 the output symbol table. It's not clear how it happens, but
19642 the thumbness of undefined symbols can well be different at
19643 runtime, and writing '1' for them will be confusing for users
19644 and possibly for dynamic linker itself.
19645 */
19646 newsym.st_value |= 1;
19647 }
19648
19649 src = &newsym;
19650 }
19651 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
19652 }
19653
19654 /* Add the PT_ARM_EXIDX program header. */
19655
19656 static bool
19657 elf32_arm_modify_segment_map (bfd *abfd,
19658 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19659 {
19660 struct elf_segment_map *m;
19661 asection *sec;
19662
19663 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19664 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19665 {
19666 /* If there is already a PT_ARM_EXIDX header, then we do not
19667 want to add another one. This situation arises when running
19668 "strip"; the input binary already has the header. */
19669 m = elf_seg_map (abfd);
19670 while (m && m->p_type != PT_ARM_EXIDX)
19671 m = m->next;
19672 if (!m)
19673 {
19674 m = (struct elf_segment_map *)
19675 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
19676 if (m == NULL)
19677 return false;
19678 m->p_type = PT_ARM_EXIDX;
19679 m->count = 1;
19680 m->sections[0] = sec;
19681
19682 m->next = elf_seg_map (abfd);
19683 elf_seg_map (abfd) = m;
19684 }
19685 }
19686
19687 return true;
19688 }
19689
19690 /* We may add a PT_ARM_EXIDX program header. */
19691
19692 static int
19693 elf32_arm_additional_program_headers (bfd *abfd,
19694 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19695 {
19696 asection *sec;
19697
19698 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19699 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19700 return 1;
19701 else
19702 return 0;
19703 }
19704
19705 /* Hook called by the linker routine which adds symbols from an object
19706 file. */
19707
19708 static bool
19709 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
19710 Elf_Internal_Sym *sym, const char **namep,
19711 flagword *flagsp, asection **secp, bfd_vma *valp)
19712 {
19713 if (elf32_arm_hash_table (info) == NULL)
19714 return false;
19715
19716 if (elf32_arm_hash_table (info)->root.target_os == is_vxworks
19717 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
19718 flagsp, secp, valp))
19719 return false;
19720
19721 return true;
19722 }
19723
19724 /* We use this to override swap_symbol_in and swap_symbol_out. */
19725 const struct elf_size_info elf32_arm_size_info =
19726 {
19727 sizeof (Elf32_External_Ehdr),
19728 sizeof (Elf32_External_Phdr),
19729 sizeof (Elf32_External_Shdr),
19730 sizeof (Elf32_External_Rel),
19731 sizeof (Elf32_External_Rela),
19732 sizeof (Elf32_External_Sym),
19733 sizeof (Elf32_External_Dyn),
19734 sizeof (Elf_External_Note),
19735 4,
19736 1,
19737 32, 2,
19738 ELFCLASS32, EV_CURRENT,
19739 bfd_elf32_write_out_phdrs,
19740 bfd_elf32_write_shdrs_and_ehdr,
19741 bfd_elf32_checksum_contents,
19742 bfd_elf32_write_relocs,
19743 elf32_arm_swap_symbol_in,
19744 elf32_arm_swap_symbol_out,
19745 bfd_elf32_slurp_reloc_table,
19746 bfd_elf32_slurp_symbol_table,
19747 bfd_elf32_swap_dyn_in,
19748 bfd_elf32_swap_dyn_out,
19749 bfd_elf32_swap_reloc_in,
19750 bfd_elf32_swap_reloc_out,
19751 bfd_elf32_swap_reloca_in,
19752 bfd_elf32_swap_reloca_out
19753 };
19754
19755 static bfd_vma
19756 read_code32 (const bfd *abfd, const bfd_byte *addr)
19757 {
19758 /* V7 BE8 code is always little endian. */
19759 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19760 return bfd_getl32 (addr);
19761
19762 return bfd_get_32 (abfd, addr);
19763 }
19764
19765 static bfd_vma
19766 read_code16 (const bfd *abfd, const bfd_byte *addr)
19767 {
19768 /* V7 BE8 code is always little endian. */
19769 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19770 return bfd_getl16 (addr);
19771
19772 return bfd_get_16 (abfd, addr);
19773 }
19774
19775 /* Return size of plt0 entry starting at ADDR
19776 or (bfd_vma) -1 if size can not be determined. */
19777
19778 static bfd_vma
19779 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
19780 {
19781 bfd_vma first_word;
19782 bfd_vma plt0_size;
19783
19784 first_word = read_code32 (abfd, addr);
19785
19786 if (first_word == elf32_arm_plt0_entry[0])
19787 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19788 else if (first_word == elf32_thumb2_plt0_entry[0])
19789 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19790 else
19791 /* We don't yet handle this PLT format. */
19792 return (bfd_vma) -1;
19793
19794 return plt0_size;
19795 }
19796
19797 /* Return size of plt entry starting at offset OFFSET
19798 of plt section located at address START
19799 or (bfd_vma) -1 if size can not be determined. */
19800
19801 static bfd_vma
19802 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
19803 {
19804 bfd_vma first_insn;
19805 bfd_vma plt_size = 0;
19806 const bfd_byte *addr = start + offset;
19807
19808 /* PLT entry size if fixed on Thumb-only platforms. */
19809 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
19810 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
19811
19812 /* Respect Thumb stub if necessary. */
19813 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
19814 {
19815 plt_size += 2 * ARRAY_SIZE (elf32_arm_plt_thumb_stub);
19816 }
19817
19818 /* Strip immediate from first add. */
19819 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
19820
19821 #ifdef FOUR_WORD_PLT
19822 if (first_insn == elf32_arm_plt_entry[0])
19823 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
19824 #else
19825 if (first_insn == elf32_arm_plt_entry_long[0])
19826 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
19827 else if (first_insn == elf32_arm_plt_entry_short[0])
19828 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
19829 #endif
19830 else
19831 /* We don't yet handle this PLT format. */
19832 return (bfd_vma) -1;
19833
19834 return plt_size;
19835 }
19836
19837 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
19838
19839 static long
19840 elf32_arm_get_synthetic_symtab (bfd *abfd,
19841 long symcount ATTRIBUTE_UNUSED,
19842 asymbol **syms ATTRIBUTE_UNUSED,
19843 long dynsymcount,
19844 asymbol **dynsyms,
19845 asymbol **ret)
19846 {
19847 asection *relplt;
19848 asymbol *s;
19849 arelent *p;
19850 long count, i, n;
19851 size_t size;
19852 Elf_Internal_Shdr *hdr;
19853 char *names;
19854 asection *plt;
19855 bfd_vma offset;
19856 bfd_byte *data;
19857
19858 *ret = NULL;
19859
19860 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
19861 return 0;
19862
19863 if (dynsymcount <= 0)
19864 return 0;
19865
19866 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
19867 if (relplt == NULL)
19868 return 0;
19869
19870 hdr = &elf_section_data (relplt)->this_hdr;
19871 if (hdr->sh_link != elf_dynsymtab (abfd)
19872 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
19873 return 0;
19874
19875 plt = bfd_get_section_by_name (abfd, ".plt");
19876 if (plt == NULL)
19877 return 0;
19878
19879 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, true))
19880 return -1;
19881
19882 data = plt->contents;
19883 if (data == NULL)
19884 {
19885 if (!bfd_get_full_section_contents (abfd, (asection *) plt, &data) || data == NULL)
19886 return -1;
19887 bfd_cache_section_contents ((asection *) plt, data);
19888 }
19889
19890 count = relplt->size / hdr->sh_entsize;
19891 size = count * sizeof (asymbol);
19892 p = relplt->relocation;
19893 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19894 {
19895 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
19896 if (p->addend != 0)
19897 size += sizeof ("+0x") - 1 + 8;
19898 }
19899
19900 s = *ret = (asymbol *) bfd_malloc (size);
19901 if (s == NULL)
19902 return -1;
19903
19904 offset = elf32_arm_plt0_size (abfd, data);
19905 if (offset == (bfd_vma) -1)
19906 return -1;
19907
19908 names = (char *) (s + count);
19909 p = relplt->relocation;
19910 n = 0;
19911 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19912 {
19913 size_t len;
19914
19915 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
19916 if (plt_size == (bfd_vma) -1)
19917 break;
19918
19919 *s = **p->sym_ptr_ptr;
19920 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
19921 we are defining a symbol, ensure one of them is set. */
19922 if ((s->flags & BSF_LOCAL) == 0)
19923 s->flags |= BSF_GLOBAL;
19924 s->flags |= BSF_SYNTHETIC;
19925 s->section = plt;
19926 s->value = offset;
19927 s->name = names;
19928 s->udata.p = NULL;
19929 len = strlen ((*p->sym_ptr_ptr)->name);
19930 memcpy (names, (*p->sym_ptr_ptr)->name, len);
19931 names += len;
19932 if (p->addend != 0)
19933 {
19934 char buf[30], *a;
19935
19936 memcpy (names, "+0x", sizeof ("+0x") - 1);
19937 names += sizeof ("+0x") - 1;
19938 bfd_sprintf_vma (abfd, buf, p->addend);
19939 for (a = buf; *a == '0'; ++a)
19940 ;
19941 len = strlen (a);
19942 memcpy (names, a, len);
19943 names += len;
19944 }
19945 memcpy (names, "@plt", sizeof ("@plt"));
19946 names += sizeof ("@plt");
19947 ++s, ++n;
19948 offset += plt_size;
19949 }
19950
19951 return n;
19952 }
19953
19954 static bool
19955 elf32_arm_section_flags (const Elf_Internal_Shdr *hdr)
19956 {
19957 if (hdr->sh_flags & SHF_ARM_PURECODE)
19958 hdr->bfd_section->flags |= SEC_ELF_PURECODE;
19959 return true;
19960 }
19961
19962 static flagword
19963 elf32_arm_lookup_section_flags (char *flag_name)
19964 {
19965 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
19966 return SHF_ARM_PURECODE;
19967
19968 return SEC_NO_FLAGS;
19969 }
19970
19971 static unsigned int
19972 elf32_arm_count_additional_relocs (asection *sec)
19973 {
19974 struct _arm_elf_section_data *arm_data;
19975 arm_data = get_arm_elf_section_data (sec);
19976
19977 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
19978 }
19979
19980 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
19981 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
19982 FALSE otherwise. ISECTION is the best guess matching section from the
19983 input bfd IBFD, but it might be NULL. */
19984
19985 static bool
19986 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
19987 bfd *obfd ATTRIBUTE_UNUSED,
19988 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
19989 Elf_Internal_Shdr *osection)
19990 {
19991 switch (osection->sh_type)
19992 {
19993 case SHT_ARM_EXIDX:
19994 {
19995 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
19996 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
19997 unsigned i = 0;
19998
19999 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
20000 osection->sh_info = 0;
20001
20002 /* The sh_link field must be set to the text section associated with
20003 this index section. Unfortunately the ARM EHABI does not specify
20004 exactly how to determine this association. Our caller does try
20005 to match up OSECTION with its corresponding input section however
20006 so that is a good first guess. */
20007 if (isection != NULL
20008 && osection->bfd_section != NULL
20009 && isection->bfd_section != NULL
20010 && isection->bfd_section->output_section != NULL
20011 && isection->bfd_section->output_section == osection->bfd_section
20012 && iheaders != NULL
20013 && isection->sh_link > 0
20014 && isection->sh_link < elf_numsections (ibfd)
20015 && iheaders[isection->sh_link]->bfd_section != NULL
20016 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
20017 )
20018 {
20019 for (i = elf_numsections (obfd); i-- > 0;)
20020 if (oheaders[i]->bfd_section
20021 == iheaders[isection->sh_link]->bfd_section->output_section)
20022 break;
20023 }
20024
20025 if (i == 0)
20026 {
20027 /* Failing that we have to find a matching section ourselves. If
20028 we had the output section name available we could compare that
20029 with input section names. Unfortunately we don't. So instead
20030 we use a simple heuristic and look for the nearest executable
20031 section before this one. */
20032 for (i = elf_numsections (obfd); i-- > 0;)
20033 if (oheaders[i] == osection)
20034 break;
20035 if (i == 0)
20036 break;
20037
20038 while (i-- > 0)
20039 if (oheaders[i]->sh_type == SHT_PROGBITS
20040 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
20041 == (SHF_ALLOC | SHF_EXECINSTR))
20042 break;
20043 }
20044
20045 if (i)
20046 {
20047 osection->sh_link = i;
20048 /* If the text section was part of a group
20049 then the index section should be too. */
20050 if (oheaders[i]->sh_flags & SHF_GROUP)
20051 osection->sh_flags |= SHF_GROUP;
20052 return true;
20053 }
20054 }
20055 break;
20056
20057 case SHT_ARM_PREEMPTMAP:
20058 osection->sh_flags = SHF_ALLOC;
20059 break;
20060
20061 case SHT_ARM_ATTRIBUTES:
20062 case SHT_ARM_DEBUGOVERLAY:
20063 case SHT_ARM_OVERLAYSECTION:
20064 default:
20065 break;
20066 }
20067
20068 return false;
20069 }
20070
20071 /* Returns TRUE if NAME is an ARM mapping symbol.
20072 Traditionally the symbols $a, $d and $t have been used.
20073 The ARM ELF standard also defines $x (for A64 code). It also allows a
20074 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
20075 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
20076 not support them here. $t.x indicates the start of ThumbEE instructions. */
20077
20078 static bool
20079 is_arm_mapping_symbol (const char * name)
20080 {
20081 return name != NULL /* Paranoia. */
20082 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
20083 the mapping symbols could have acquired a prefix.
20084 We do not support this here, since such symbols no
20085 longer conform to the ARM ELF ABI. */
20086 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
20087 && (name[2] == 0 || name[2] == '.');
20088 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
20089 any characters that follow the period are legal characters for the body
20090 of a symbol's name. For now we just assume that this is the case. */
20091 }
20092
20093 /* Make sure that mapping symbols in object files are not removed via the
20094 "strip --strip-unneeded" tool. These symbols are needed in order to
20095 correctly generate interworking veneers, and for byte swapping code
20096 regions. Once an object file has been linked, it is safe to remove the
20097 symbols as they will no longer be needed. */
20098
20099 static void
20100 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
20101 {
20102 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
20103 && sym->section != bfd_abs_section_ptr
20104 && is_arm_mapping_symbol (sym->name))
20105 sym->flags |= BSF_KEEP;
20106 }
20107
20108 #undef elf_backend_copy_special_section_fields
20109 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
20110
20111 #define ELF_ARCH bfd_arch_arm
20112 #define ELF_TARGET_ID ARM_ELF_DATA
20113 #define ELF_MACHINE_CODE EM_ARM
20114 #ifdef __QNXTARGET__
20115 #define ELF_MAXPAGESIZE 0x1000
20116 #else
20117 #define ELF_MAXPAGESIZE 0x10000
20118 #endif
20119 #define ELF_MINPAGESIZE 0x1000
20120 #define ELF_COMMONPAGESIZE 0x1000
20121
20122 #define bfd_elf32_mkobject elf32_arm_mkobject
20123
20124 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
20125 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
20126 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
20127 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
20128 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
20129 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
20130 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
20131 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
20132 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
20133 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
20134 #define bfd_elf32_bfd_final_link elf32_arm_final_link
20135 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
20136
20137 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
20138 #define elf_backend_maybe_function_sym elf32_arm_maybe_function_sym
20139 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
20140 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
20141 #define elf_backend_check_relocs elf32_arm_check_relocs
20142 #define elf_backend_update_relocs elf32_arm_update_relocs
20143 #define elf_backend_relocate_section elf32_arm_relocate_section
20144 #define elf_backend_write_section elf32_arm_write_section
20145 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
20146 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
20147 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
20148 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
20149 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
20150 #define elf_backend_always_size_sections elf32_arm_always_size_sections
20151 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
20152 #define elf_backend_init_file_header elf32_arm_init_file_header
20153 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
20154 #define elf_backend_object_p elf32_arm_object_p
20155 #define elf_backend_fake_sections elf32_arm_fake_sections
20156 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
20157 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20158 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
20159 #define elf_backend_size_info elf32_arm_size_info
20160 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20161 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
20162 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
20163 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
20164 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
20165 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
20166 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
20167 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
20168
20169 #define elf_backend_can_refcount 1
20170 #define elf_backend_can_gc_sections 1
20171 #define elf_backend_plt_readonly 1
20172 #define elf_backend_want_got_plt 1
20173 #define elf_backend_want_plt_sym 0
20174 #define elf_backend_want_dynrelro 1
20175 #define elf_backend_may_use_rel_p 1
20176 #define elf_backend_may_use_rela_p 0
20177 #define elf_backend_default_use_rela_p 0
20178 #define elf_backend_dtrel_excludes_plt 1
20179
20180 #define elf_backend_got_header_size 12
20181 #define elf_backend_extern_protected_data 1
20182
20183 #undef elf_backend_obj_attrs_vendor
20184 #define elf_backend_obj_attrs_vendor "aeabi"
20185 #undef elf_backend_obj_attrs_section
20186 #define elf_backend_obj_attrs_section ".ARM.attributes"
20187 #undef elf_backend_obj_attrs_arg_type
20188 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
20189 #undef elf_backend_obj_attrs_section_type
20190 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
20191 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
20192 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
20193
20194 #undef elf_backend_section_flags
20195 #define elf_backend_section_flags elf32_arm_section_flags
20196 #undef elf_backend_lookup_section_flags_hook
20197 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20198
20199 #define elf_backend_linux_prpsinfo32_ugid16 true
20200
20201 #include "elf32-target.h"
20202
20203 /* Native Client targets. */
20204
20205 #undef TARGET_LITTLE_SYM
20206 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
20207 #undef TARGET_LITTLE_NAME
20208 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
20209 #undef TARGET_BIG_SYM
20210 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
20211 #undef TARGET_BIG_NAME
20212 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
20213
20214 /* Like elf32_arm_link_hash_table_create -- but overrides
20215 appropriately for NaCl. */
20216
20217 static struct bfd_link_hash_table *
20218 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
20219 {
20220 struct bfd_link_hash_table *ret;
20221
20222 ret = elf32_arm_link_hash_table_create (abfd);
20223 if (ret)
20224 {
20225 struct elf32_arm_link_hash_table *htab
20226 = (struct elf32_arm_link_hash_table *) ret;
20227
20228 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
20229 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
20230 }
20231 return ret;
20232 }
20233
20234 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
20235 really need to use elf32_arm_modify_segment_map. But we do it
20236 anyway just to reduce gratuitous differences with the stock ARM backend. */
20237
20238 static bool
20239 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
20240 {
20241 return (elf32_arm_modify_segment_map (abfd, info)
20242 && nacl_modify_segment_map (abfd, info));
20243 }
20244
20245 static bool
20246 elf32_arm_nacl_final_write_processing (bfd *abfd)
20247 {
20248 arm_final_write_processing (abfd);
20249 return nacl_final_write_processing (abfd);
20250 }
20251
20252 static bfd_vma
20253 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
20254 const arelent *rel ATTRIBUTE_UNUSED)
20255 {
20256 return plt->vma
20257 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
20258 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
20259 }
20260
20261 #undef elf32_bed
20262 #define elf32_bed elf32_arm_nacl_bed
20263 #undef bfd_elf32_bfd_link_hash_table_create
20264 #define bfd_elf32_bfd_link_hash_table_create \
20265 elf32_arm_nacl_link_hash_table_create
20266 #undef elf_backend_plt_alignment
20267 #define elf_backend_plt_alignment 4
20268 #undef elf_backend_modify_segment_map
20269 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
20270 #undef elf_backend_modify_headers
20271 #define elf_backend_modify_headers nacl_modify_headers
20272 #undef elf_backend_final_write_processing
20273 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
20274 #undef bfd_elf32_get_synthetic_symtab
20275 #undef elf_backend_plt_sym_val
20276 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
20277 #undef elf_backend_copy_special_section_fields
20278
20279 #undef ELF_MINPAGESIZE
20280 #undef ELF_COMMONPAGESIZE
20281
20282 #undef ELF_TARGET_OS
20283 #define ELF_TARGET_OS is_nacl
20284
20285 #include "elf32-target.h"
20286
20287 /* Reset to defaults. */
20288 #undef elf_backend_plt_alignment
20289 #undef elf_backend_modify_segment_map
20290 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20291 #undef elf_backend_modify_headers
20292 #undef elf_backend_final_write_processing
20293 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20294 #undef ELF_MINPAGESIZE
20295 #define ELF_MINPAGESIZE 0x1000
20296 #undef ELF_COMMONPAGESIZE
20297 #define ELF_COMMONPAGESIZE 0x1000
20298
20299
20300 /* FDPIC Targets. */
20301
20302 #undef TARGET_LITTLE_SYM
20303 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
20304 #undef TARGET_LITTLE_NAME
20305 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
20306 #undef TARGET_BIG_SYM
20307 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
20308 #undef TARGET_BIG_NAME
20309 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
20310 #undef elf_match_priority
20311 #define elf_match_priority 128
20312 #undef ELF_OSABI
20313 #define ELF_OSABI ELFOSABI_ARM_FDPIC
20314
20315 /* Like elf32_arm_link_hash_table_create -- but overrides
20316 appropriately for FDPIC. */
20317
20318 static struct bfd_link_hash_table *
20319 elf32_arm_fdpic_link_hash_table_create (bfd *abfd)
20320 {
20321 struct bfd_link_hash_table *ret;
20322
20323 ret = elf32_arm_link_hash_table_create (abfd);
20324 if (ret)
20325 {
20326 struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret;
20327
20328 htab->fdpic_p = 1;
20329 }
20330 return ret;
20331 }
20332
20333 /* We need dynamic symbols for every section, since segments can
20334 relocate independently. */
20335 static bool
20336 elf32_arm_fdpic_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED,
20337 struct bfd_link_info *info
20338 ATTRIBUTE_UNUSED,
20339 asection *p ATTRIBUTE_UNUSED)
20340 {
20341 switch (elf_section_data (p)->this_hdr.sh_type)
20342 {
20343 case SHT_PROGBITS:
20344 case SHT_NOBITS:
20345 /* If sh_type is yet undecided, assume it could be
20346 SHT_PROGBITS/SHT_NOBITS. */
20347 case SHT_NULL:
20348 return false;
20349
20350 /* There shouldn't be section relative relocations
20351 against any other section. */
20352 default:
20353 return true;
20354 }
20355 }
20356
20357 #undef elf32_bed
20358 #define elf32_bed elf32_arm_fdpic_bed
20359
20360 #undef bfd_elf32_bfd_link_hash_table_create
20361 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
20362
20363 #undef elf_backend_omit_section_dynsym
20364 #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym
20365
20366 #undef ELF_TARGET_OS
20367
20368 #include "elf32-target.h"
20369
20370 #undef elf_match_priority
20371 #undef ELF_OSABI
20372 #undef elf_backend_omit_section_dynsym
20373
20374 /* VxWorks Targets. */
20375
20376 #undef TARGET_LITTLE_SYM
20377 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
20378 #undef TARGET_LITTLE_NAME
20379 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
20380 #undef TARGET_BIG_SYM
20381 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
20382 #undef TARGET_BIG_NAME
20383 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
20384
20385 /* Like elf32_arm_link_hash_table_create -- but overrides
20386 appropriately for VxWorks. */
20387
20388 static struct bfd_link_hash_table *
20389 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
20390 {
20391 struct bfd_link_hash_table *ret;
20392
20393 ret = elf32_arm_link_hash_table_create (abfd);
20394 if (ret)
20395 {
20396 struct elf32_arm_link_hash_table *htab
20397 = (struct elf32_arm_link_hash_table *) ret;
20398 htab->use_rel = 0;
20399 }
20400 return ret;
20401 }
20402
20403 static bool
20404 elf32_arm_vxworks_final_write_processing (bfd *abfd)
20405 {
20406 arm_final_write_processing (abfd);
20407 return elf_vxworks_final_write_processing (abfd);
20408 }
20409
20410 #undef elf32_bed
20411 #define elf32_bed elf32_arm_vxworks_bed
20412
20413 #undef bfd_elf32_bfd_link_hash_table_create
20414 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
20415 #undef elf_backend_final_write_processing
20416 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
20417 #undef elf_backend_emit_relocs
20418 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
20419
20420 #undef elf_backend_may_use_rel_p
20421 #define elf_backend_may_use_rel_p 0
20422 #undef elf_backend_may_use_rela_p
20423 #define elf_backend_may_use_rela_p 1
20424 #undef elf_backend_default_use_rela_p
20425 #define elf_backend_default_use_rela_p 1
20426 #undef elf_backend_want_plt_sym
20427 #define elf_backend_want_plt_sym 1
20428 #undef ELF_MAXPAGESIZE
20429 #define ELF_MAXPAGESIZE 0x1000
20430 #undef ELF_TARGET_OS
20431 #define ELF_TARGET_OS is_vxworks
20432
20433 #include "elf32-target.h"
20434
20435
20436 /* Merge backend specific data from an object file to the output
20437 object file when linking. */
20438
20439 static bool
20440 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
20441 {
20442 bfd *obfd = info->output_bfd;
20443 flagword out_flags;
20444 flagword in_flags;
20445 bool flags_compatible = true;
20446 asection *sec;
20447
20448 /* Check if we have the same endianness. */
20449 if (! _bfd_generic_verify_endian_match (ibfd, info))
20450 return false;
20451
20452 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
20453 return true;
20454
20455 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
20456 return false;
20457
20458 /* The input BFD must have had its flags initialised. */
20459 /* The following seems bogus to me -- The flags are initialized in
20460 the assembler but I don't think an elf_flags_init field is
20461 written into the object. */
20462 /* BFD_ASSERT (elf_flags_init (ibfd)); */
20463
20464 in_flags = elf_elfheader (ibfd)->e_flags;
20465 out_flags = elf_elfheader (obfd)->e_flags;
20466
20467 /* In theory there is no reason why we couldn't handle this. However
20468 in practice it isn't even close to working and there is no real
20469 reason to want it. */
20470 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
20471 && !(ibfd->flags & DYNAMIC)
20472 && (in_flags & EF_ARM_BE8))
20473 {
20474 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20475 ibfd);
20476 return false;
20477 }
20478
20479 if (!elf_flags_init (obfd))
20480 {
20481 /* If the input is the default architecture and had the default
20482 flags then do not bother setting the flags for the output
20483 architecture, instead allow future merges to do this. If no
20484 future merges ever set these flags then they will retain their
20485 uninitialised values, which surprise surprise, correspond
20486 to the default values. */
20487 if (bfd_get_arch_info (ibfd)->the_default
20488 && elf_elfheader (ibfd)->e_flags == 0)
20489 return true;
20490
20491 elf_flags_init (obfd) = true;
20492 elf_elfheader (obfd)->e_flags = in_flags;
20493
20494 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
20495 && bfd_get_arch_info (obfd)->the_default)
20496 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
20497
20498 return true;
20499 }
20500
20501 /* Determine what should happen if the input ARM architecture
20502 does not match the output ARM architecture. */
20503 if (! bfd_arm_merge_machines (ibfd, obfd))
20504 return false;
20505
20506 /* Identical flags must be compatible. */
20507 if (in_flags == out_flags)
20508 return true;
20509
20510 /* Check to see if the input BFD actually contains any sections. If
20511 not, its flags may not have been initialised either, but it
20512 cannot actually cause any incompatiblity. Do not short-circuit
20513 dynamic objects; their section list may be emptied by
20514 elf_link_add_object_symbols.
20515
20516 Also check to see if there are no code sections in the input.
20517 In this case there is no need to check for code specific flags.
20518 XXX - do we need to worry about floating-point format compatability
20519 in data sections ? */
20520 if (!(ibfd->flags & DYNAMIC))
20521 {
20522 bool null_input_bfd = true;
20523 bool only_data_sections = true;
20524
20525 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
20526 {
20527 /* Ignore synthetic glue sections. */
20528 if (strcmp (sec->name, ".glue_7")
20529 && strcmp (sec->name, ".glue_7t"))
20530 {
20531 if ((bfd_section_flags (sec)
20532 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20533 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20534 only_data_sections = false;
20535
20536 null_input_bfd = false;
20537 break;
20538 }
20539 }
20540
20541 if (null_input_bfd || only_data_sections)
20542 return true;
20543 }
20544
20545 /* Complain about various flag mismatches. */
20546 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
20547 EF_ARM_EABI_VERSION (out_flags)))
20548 {
20549 _bfd_error_handler
20550 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20551 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
20552 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
20553 return false;
20554 }
20555
20556 /* Not sure what needs to be checked for EABI versions >= 1. */
20557 /* VxWorks libraries do not use these flags. */
20558 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
20559 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
20560 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
20561 {
20562 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
20563 {
20564 _bfd_error_handler
20565 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20566 ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
20567 obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
20568 flags_compatible = false;
20569 }
20570
20571 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
20572 {
20573 if (in_flags & EF_ARM_APCS_FLOAT)
20574 _bfd_error_handler
20575 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20576 ibfd, obfd);
20577 else
20578 _bfd_error_handler
20579 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20580 ibfd, obfd);
20581
20582 flags_compatible = false;
20583 }
20584
20585 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
20586 {
20587 if (in_flags & EF_ARM_VFP_FLOAT)
20588 _bfd_error_handler
20589 (_("error: %pB uses %s instructions, whereas %pB does not"),
20590 ibfd, "VFP", obfd);
20591 else
20592 _bfd_error_handler
20593 (_("error: %pB uses %s instructions, whereas %pB does not"),
20594 ibfd, "FPA", obfd);
20595
20596 flags_compatible = false;
20597 }
20598
20599 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
20600 {
20601 if (in_flags & EF_ARM_MAVERICK_FLOAT)
20602 _bfd_error_handler
20603 (_("error: %pB uses %s instructions, whereas %pB does not"),
20604 ibfd, "Maverick", obfd);
20605 else
20606 _bfd_error_handler
20607 (_("error: %pB does not use %s instructions, whereas %pB does"),
20608 ibfd, "Maverick", obfd);
20609
20610 flags_compatible = false;
20611 }
20612
20613 #ifdef EF_ARM_SOFT_FLOAT
20614 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
20615 {
20616 /* We can allow interworking between code that is VFP format
20617 layout, and uses either soft float or integer regs for
20618 passing floating point arguments and results. We already
20619 know that the APCS_FLOAT flags match; similarly for VFP
20620 flags. */
20621 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
20622 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
20623 {
20624 if (in_flags & EF_ARM_SOFT_FLOAT)
20625 _bfd_error_handler
20626 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20627 ibfd, obfd);
20628 else
20629 _bfd_error_handler
20630 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20631 ibfd, obfd);
20632
20633 flags_compatible = false;
20634 }
20635 }
20636 #endif
20637
20638 /* Interworking mismatch is only a warning. */
20639 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
20640 {
20641 if (in_flags & EF_ARM_INTERWORK)
20642 {
20643 _bfd_error_handler
20644 (_("warning: %pB supports interworking, whereas %pB does not"),
20645 ibfd, obfd);
20646 }
20647 else
20648 {
20649 _bfd_error_handler
20650 (_("warning: %pB does not support interworking, whereas %pB does"),
20651 ibfd, obfd);
20652 }
20653 }
20654 }
20655
20656 return flags_compatible;
20657 }
A mirror of the official binutils-gdb repository