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ARM: Fix ld bloat introduced between binutils-2.38 and 2.39
[thirdparty/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2023 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "libiberty.h"
26 #include "libbfd.h"
27 #include "elf-bfd.h"
28 #include "elf-nacl.h"
29 #include "elf-vxworks.h"
30 #include "elf/arm.h"
31 #include "elf32-arm.h"
32 #include "cpu-arm.h"
33
34 /* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36 #define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38
39 /* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41 #define RELOC_SIZE(HTAB) \
42 ((HTAB)->use_rel \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
45
46 /* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48 #define SWAP_RELOC_IN(HTAB) \
49 ((HTAB)->use_rel \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
52
53 /* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55 #define SWAP_RELOC_OUT(HTAB) \
56 ((HTAB)->use_rel \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
59
60 #define elf_info_to_howto NULL
61 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62
63 #define ARM_ELF_ABI_VERSION 0
64 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65
66 /* The Adjusted Place, as defined by AAELF. */
67 #define Pa(X) ((X) & 0xfffffffc)
68
69 static bool elf32_arm_write_section (bfd *output_bfd,
70 struct bfd_link_info *link_info,
71 asection *sec,
72 bfd_byte *contents);
73
74 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
75 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
76 in that slot. */
77
78 static reloc_howto_type elf32_arm_howto_table_1[] =
79 {
80 /* No relocation. */
81 HOWTO (R_ARM_NONE, /* type */
82 0, /* rightshift */
83 0, /* size */
84 0, /* bitsize */
85 false, /* pc_relative */
86 0, /* bitpos */
87 complain_overflow_dont,/* complain_on_overflow */
88 bfd_elf_generic_reloc, /* special_function */
89 "R_ARM_NONE", /* name */
90 false, /* partial_inplace */
91 0, /* src_mask */
92 0, /* dst_mask */
93 false), /* pcrel_offset */
94
95 HOWTO (R_ARM_PC24, /* type */
96 2, /* rightshift */
97 4, /* size */
98 24, /* bitsize */
99 true, /* pc_relative */
100 0, /* bitpos */
101 complain_overflow_signed,/* complain_on_overflow */
102 bfd_elf_generic_reloc, /* special_function */
103 "R_ARM_PC24", /* name */
104 false, /* partial_inplace */
105 0x00ffffff, /* src_mask */
106 0x00ffffff, /* dst_mask */
107 true), /* pcrel_offset */
108
109 /* 32 bit absolute */
110 HOWTO (R_ARM_ABS32, /* type */
111 0, /* rightshift */
112 4, /* size */
113 32, /* bitsize */
114 false, /* pc_relative */
115 0, /* bitpos */
116 complain_overflow_bitfield,/* complain_on_overflow */
117 bfd_elf_generic_reloc, /* special_function */
118 "R_ARM_ABS32", /* name */
119 false, /* partial_inplace */
120 0xffffffff, /* src_mask */
121 0xffffffff, /* dst_mask */
122 false), /* pcrel_offset */
123
124 /* standard 32bit pc-relative reloc */
125 HOWTO (R_ARM_REL32, /* type */
126 0, /* rightshift */
127 4, /* size */
128 32, /* bitsize */
129 true, /* pc_relative */
130 0, /* bitpos */
131 complain_overflow_bitfield,/* complain_on_overflow */
132 bfd_elf_generic_reloc, /* special_function */
133 "R_ARM_REL32", /* name */
134 false, /* partial_inplace */
135 0xffffffff, /* src_mask */
136 0xffffffff, /* dst_mask */
137 true), /* pcrel_offset */
138
139 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
140 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* rightshift */
142 1, /* size */
143 32, /* bitsize */
144 true, /* pc_relative */
145 0, /* bitpos */
146 complain_overflow_dont,/* complain_on_overflow */
147 bfd_elf_generic_reloc, /* special_function */
148 "R_ARM_LDR_PC_G0", /* name */
149 false, /* partial_inplace */
150 0xffffffff, /* src_mask */
151 0xffffffff, /* dst_mask */
152 true), /* pcrel_offset */
153
154 /* 16 bit absolute */
155 HOWTO (R_ARM_ABS16, /* type */
156 0, /* rightshift */
157 2, /* size */
158 16, /* bitsize */
159 false, /* pc_relative */
160 0, /* bitpos */
161 complain_overflow_bitfield,/* complain_on_overflow */
162 bfd_elf_generic_reloc, /* special_function */
163 "R_ARM_ABS16", /* name */
164 false, /* partial_inplace */
165 0x0000ffff, /* src_mask */
166 0x0000ffff, /* dst_mask */
167 false), /* pcrel_offset */
168
169 /* 12 bit absolute */
170 HOWTO (R_ARM_ABS12, /* type */
171 0, /* rightshift */
172 4, /* size */
173 12, /* bitsize */
174 false, /* pc_relative */
175 0, /* bitpos */
176 complain_overflow_bitfield,/* complain_on_overflow */
177 bfd_elf_generic_reloc, /* special_function */
178 "R_ARM_ABS12", /* name */
179 false, /* partial_inplace */
180 0x00000fff, /* src_mask */
181 0x00000fff, /* dst_mask */
182 false), /* pcrel_offset */
183
184 HOWTO (R_ARM_THM_ABS5, /* type */
185 6, /* rightshift */
186 2, /* size */
187 5, /* bitsize */
188 false, /* pc_relative */
189 0, /* bitpos */
190 complain_overflow_bitfield,/* complain_on_overflow */
191 bfd_elf_generic_reloc, /* special_function */
192 "R_ARM_THM_ABS5", /* name */
193 false, /* partial_inplace */
194 0x000007e0, /* src_mask */
195 0x000007e0, /* dst_mask */
196 false), /* pcrel_offset */
197
198 /* 8 bit absolute */
199 HOWTO (R_ARM_ABS8, /* type */
200 0, /* rightshift */
201 1, /* size */
202 8, /* bitsize */
203 false, /* pc_relative */
204 0, /* bitpos */
205 complain_overflow_bitfield,/* complain_on_overflow */
206 bfd_elf_generic_reloc, /* special_function */
207 "R_ARM_ABS8", /* name */
208 false, /* partial_inplace */
209 0x000000ff, /* src_mask */
210 0x000000ff, /* dst_mask */
211 false), /* pcrel_offset */
212
213 HOWTO (R_ARM_SBREL32, /* type */
214 0, /* rightshift */
215 4, /* size */
216 32, /* bitsize */
217 false, /* pc_relative */
218 0, /* bitpos */
219 complain_overflow_dont,/* complain_on_overflow */
220 bfd_elf_generic_reloc, /* special_function */
221 "R_ARM_SBREL32", /* name */
222 false, /* partial_inplace */
223 0xffffffff, /* src_mask */
224 0xffffffff, /* dst_mask */
225 false), /* pcrel_offset */
226
227 HOWTO (R_ARM_THM_CALL, /* type */
228 1, /* rightshift */
229 4, /* size */
230 24, /* bitsize */
231 true, /* pc_relative */
232 0, /* bitpos */
233 complain_overflow_signed,/* complain_on_overflow */
234 bfd_elf_generic_reloc, /* special_function */
235 "R_ARM_THM_CALL", /* name */
236 false, /* partial_inplace */
237 0x07ff2fff, /* src_mask */
238 0x07ff2fff, /* dst_mask */
239 true), /* pcrel_offset */
240
241 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* rightshift */
243 2, /* size */
244 8, /* bitsize */
245 true, /* pc_relative */
246 0, /* bitpos */
247 complain_overflow_signed,/* complain_on_overflow */
248 bfd_elf_generic_reloc, /* special_function */
249 "R_ARM_THM_PC8", /* name */
250 false, /* partial_inplace */
251 0x000000ff, /* src_mask */
252 0x000000ff, /* dst_mask */
253 true), /* pcrel_offset */
254
255 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* rightshift */
257 2, /* size */
258 32, /* bitsize */
259 false, /* pc_relative */
260 0, /* bitpos */
261 complain_overflow_signed,/* complain_on_overflow */
262 bfd_elf_generic_reloc, /* special_function */
263 "R_ARM_BREL_ADJ", /* name */
264 false, /* partial_inplace */
265 0xffffffff, /* src_mask */
266 0xffffffff, /* dst_mask */
267 false), /* pcrel_offset */
268
269 HOWTO (R_ARM_TLS_DESC, /* type */
270 0, /* rightshift */
271 4, /* size */
272 32, /* bitsize */
273 false, /* pc_relative */
274 0, /* bitpos */
275 complain_overflow_bitfield,/* complain_on_overflow */
276 bfd_elf_generic_reloc, /* special_function */
277 "R_ARM_TLS_DESC", /* name */
278 false, /* partial_inplace */
279 0xffffffff, /* src_mask */
280 0xffffffff, /* dst_mask */
281 false), /* pcrel_offset */
282
283 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* rightshift */
285 0, /* size */
286 0, /* bitsize */
287 false, /* pc_relative */
288 0, /* bitpos */
289 complain_overflow_signed,/* complain_on_overflow */
290 bfd_elf_generic_reloc, /* special_function */
291 "R_ARM_SWI8", /* name */
292 false, /* partial_inplace */
293 0x00000000, /* src_mask */
294 0x00000000, /* dst_mask */
295 false), /* pcrel_offset */
296
297 /* BLX instruction for the ARM. */
298 HOWTO (R_ARM_XPC25, /* type */
299 2, /* rightshift */
300 4, /* size */
301 24, /* bitsize */
302 true, /* pc_relative */
303 0, /* bitpos */
304 complain_overflow_signed,/* complain_on_overflow */
305 bfd_elf_generic_reloc, /* special_function */
306 "R_ARM_XPC25", /* name */
307 false, /* partial_inplace */
308 0x00ffffff, /* src_mask */
309 0x00ffffff, /* dst_mask */
310 true), /* pcrel_offset */
311
312 /* BLX instruction for the Thumb. */
313 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* rightshift */
315 4, /* size */
316 24, /* bitsize */
317 true, /* pc_relative */
318 0, /* bitpos */
319 complain_overflow_signed,/* complain_on_overflow */
320 bfd_elf_generic_reloc, /* special_function */
321 "R_ARM_THM_XPC22", /* name */
322 false, /* partial_inplace */
323 0x07ff2fff, /* src_mask */
324 0x07ff2fff, /* dst_mask */
325 true), /* pcrel_offset */
326
327 /* Dynamic TLS relocations. */
328
329 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 0, /* rightshift */
331 4, /* size */
332 32, /* bitsize */
333 false, /* pc_relative */
334 0, /* bitpos */
335 complain_overflow_bitfield,/* complain_on_overflow */
336 bfd_elf_generic_reloc, /* special_function */
337 "R_ARM_TLS_DTPMOD32", /* name */
338 true, /* partial_inplace */
339 0xffffffff, /* src_mask */
340 0xffffffff, /* dst_mask */
341 false), /* pcrel_offset */
342
343 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 0, /* rightshift */
345 4, /* size */
346 32, /* bitsize */
347 false, /* pc_relative */
348 0, /* bitpos */
349 complain_overflow_bitfield,/* complain_on_overflow */
350 bfd_elf_generic_reloc, /* special_function */
351 "R_ARM_TLS_DTPOFF32", /* name */
352 true, /* partial_inplace */
353 0xffffffff, /* src_mask */
354 0xffffffff, /* dst_mask */
355 false), /* pcrel_offset */
356
357 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 0, /* rightshift */
359 4, /* size */
360 32, /* bitsize */
361 false, /* pc_relative */
362 0, /* bitpos */
363 complain_overflow_bitfield,/* complain_on_overflow */
364 bfd_elf_generic_reloc, /* special_function */
365 "R_ARM_TLS_TPOFF32", /* name */
366 true, /* partial_inplace */
367 0xffffffff, /* src_mask */
368 0xffffffff, /* dst_mask */
369 false), /* pcrel_offset */
370
371 /* Relocs used in ARM Linux */
372
373 HOWTO (R_ARM_COPY, /* type */
374 0, /* rightshift */
375 4, /* size */
376 32, /* bitsize */
377 false, /* pc_relative */
378 0, /* bitpos */
379 complain_overflow_bitfield,/* complain_on_overflow */
380 bfd_elf_generic_reloc, /* special_function */
381 "R_ARM_COPY", /* name */
382 true, /* partial_inplace */
383 0xffffffff, /* src_mask */
384 0xffffffff, /* dst_mask */
385 false), /* pcrel_offset */
386
387 HOWTO (R_ARM_GLOB_DAT, /* type */
388 0, /* rightshift */
389 4, /* size */
390 32, /* bitsize */
391 false, /* pc_relative */
392 0, /* bitpos */
393 complain_overflow_bitfield,/* complain_on_overflow */
394 bfd_elf_generic_reloc, /* special_function */
395 "R_ARM_GLOB_DAT", /* name */
396 true, /* partial_inplace */
397 0xffffffff, /* src_mask */
398 0xffffffff, /* dst_mask */
399 false), /* pcrel_offset */
400
401 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 0, /* rightshift */
403 4, /* size */
404 32, /* bitsize */
405 false, /* pc_relative */
406 0, /* bitpos */
407 complain_overflow_bitfield,/* complain_on_overflow */
408 bfd_elf_generic_reloc, /* special_function */
409 "R_ARM_JUMP_SLOT", /* name */
410 true, /* partial_inplace */
411 0xffffffff, /* src_mask */
412 0xffffffff, /* dst_mask */
413 false), /* pcrel_offset */
414
415 HOWTO (R_ARM_RELATIVE, /* type */
416 0, /* rightshift */
417 4, /* size */
418 32, /* bitsize */
419 false, /* pc_relative */
420 0, /* bitpos */
421 complain_overflow_bitfield,/* complain_on_overflow */
422 bfd_elf_generic_reloc, /* special_function */
423 "R_ARM_RELATIVE", /* name */
424 true, /* partial_inplace */
425 0xffffffff, /* src_mask */
426 0xffffffff, /* dst_mask */
427 false), /* pcrel_offset */
428
429 HOWTO (R_ARM_GOTOFF32, /* type */
430 0, /* rightshift */
431 4, /* size */
432 32, /* bitsize */
433 false, /* pc_relative */
434 0, /* bitpos */
435 complain_overflow_bitfield,/* complain_on_overflow */
436 bfd_elf_generic_reloc, /* special_function */
437 "R_ARM_GOTOFF32", /* name */
438 true, /* partial_inplace */
439 0xffffffff, /* src_mask */
440 0xffffffff, /* dst_mask */
441 false), /* pcrel_offset */
442
443 HOWTO (R_ARM_GOTPC, /* type */
444 0, /* rightshift */
445 4, /* size */
446 32, /* bitsize */
447 true, /* pc_relative */
448 0, /* bitpos */
449 complain_overflow_bitfield,/* complain_on_overflow */
450 bfd_elf_generic_reloc, /* special_function */
451 "R_ARM_GOTPC", /* name */
452 true, /* partial_inplace */
453 0xffffffff, /* src_mask */
454 0xffffffff, /* dst_mask */
455 true), /* pcrel_offset */
456
457 HOWTO (R_ARM_GOT32, /* type */
458 0, /* rightshift */
459 4, /* size */
460 32, /* bitsize */
461 false, /* pc_relative */
462 0, /* bitpos */
463 complain_overflow_bitfield,/* complain_on_overflow */
464 bfd_elf_generic_reloc, /* special_function */
465 "R_ARM_GOT32", /* name */
466 true, /* partial_inplace */
467 0xffffffff, /* src_mask */
468 0xffffffff, /* dst_mask */
469 false), /* pcrel_offset */
470
471 HOWTO (R_ARM_PLT32, /* type */
472 2, /* rightshift */
473 4, /* size */
474 24, /* bitsize */
475 true, /* pc_relative */
476 0, /* bitpos */
477 complain_overflow_bitfield,/* complain_on_overflow */
478 bfd_elf_generic_reloc, /* special_function */
479 "R_ARM_PLT32", /* name */
480 false, /* partial_inplace */
481 0x00ffffff, /* src_mask */
482 0x00ffffff, /* dst_mask */
483 true), /* pcrel_offset */
484
485 HOWTO (R_ARM_CALL, /* type */
486 2, /* rightshift */
487 4, /* size */
488 24, /* bitsize */
489 true, /* pc_relative */
490 0, /* bitpos */
491 complain_overflow_signed,/* complain_on_overflow */
492 bfd_elf_generic_reloc, /* special_function */
493 "R_ARM_CALL", /* name */
494 false, /* partial_inplace */
495 0x00ffffff, /* src_mask */
496 0x00ffffff, /* dst_mask */
497 true), /* pcrel_offset */
498
499 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* rightshift */
501 4, /* size */
502 24, /* bitsize */
503 true, /* pc_relative */
504 0, /* bitpos */
505 complain_overflow_signed,/* complain_on_overflow */
506 bfd_elf_generic_reloc, /* special_function */
507 "R_ARM_JUMP24", /* name */
508 false, /* partial_inplace */
509 0x00ffffff, /* src_mask */
510 0x00ffffff, /* dst_mask */
511 true), /* pcrel_offset */
512
513 HOWTO (R_ARM_THM_JUMP24, /* type */
514 1, /* rightshift */
515 4, /* size */
516 24, /* bitsize */
517 true, /* pc_relative */
518 0, /* bitpos */
519 complain_overflow_signed,/* complain_on_overflow */
520 bfd_elf_generic_reloc, /* special_function */
521 "R_ARM_THM_JUMP24", /* name */
522 false, /* partial_inplace */
523 0x07ff2fff, /* src_mask */
524 0x07ff2fff, /* dst_mask */
525 true), /* pcrel_offset */
526
527 HOWTO (R_ARM_BASE_ABS, /* type */
528 0, /* rightshift */
529 4, /* size */
530 32, /* bitsize */
531 false, /* pc_relative */
532 0, /* bitpos */
533 complain_overflow_dont,/* complain_on_overflow */
534 bfd_elf_generic_reloc, /* special_function */
535 "R_ARM_BASE_ABS", /* name */
536 false, /* partial_inplace */
537 0xffffffff, /* src_mask */
538 0xffffffff, /* dst_mask */
539 false), /* pcrel_offset */
540
541 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 0, /* rightshift */
543 4, /* size */
544 12, /* bitsize */
545 true, /* pc_relative */
546 0, /* bitpos */
547 complain_overflow_dont,/* complain_on_overflow */
548 bfd_elf_generic_reloc, /* special_function */
549 "R_ARM_ALU_PCREL_7_0", /* name */
550 false, /* partial_inplace */
551 0x00000fff, /* src_mask */
552 0x00000fff, /* dst_mask */
553 true), /* pcrel_offset */
554
555 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 0, /* rightshift */
557 4, /* size */
558 12, /* bitsize */
559 true, /* pc_relative */
560 8, /* bitpos */
561 complain_overflow_dont,/* complain_on_overflow */
562 bfd_elf_generic_reloc, /* special_function */
563 "R_ARM_ALU_PCREL_15_8",/* name */
564 false, /* partial_inplace */
565 0x00000fff, /* src_mask */
566 0x00000fff, /* dst_mask */
567 true), /* pcrel_offset */
568
569 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 0, /* rightshift */
571 4, /* size */
572 12, /* bitsize */
573 true, /* pc_relative */
574 16, /* bitpos */
575 complain_overflow_dont,/* complain_on_overflow */
576 bfd_elf_generic_reloc, /* special_function */
577 "R_ARM_ALU_PCREL_23_15",/* name */
578 false, /* partial_inplace */
579 0x00000fff, /* src_mask */
580 0x00000fff, /* dst_mask */
581 true), /* pcrel_offset */
582
583 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 0, /* rightshift */
585 4, /* size */
586 12, /* bitsize */
587 false, /* pc_relative */
588 0, /* bitpos */
589 complain_overflow_dont,/* complain_on_overflow */
590 bfd_elf_generic_reloc, /* special_function */
591 "R_ARM_LDR_SBREL_11_0",/* name */
592 false, /* partial_inplace */
593 0x00000fff, /* src_mask */
594 0x00000fff, /* dst_mask */
595 false), /* pcrel_offset */
596
597 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 0, /* rightshift */
599 4, /* size */
600 8, /* bitsize */
601 false, /* pc_relative */
602 12, /* bitpos */
603 complain_overflow_dont,/* complain_on_overflow */
604 bfd_elf_generic_reloc, /* special_function */
605 "R_ARM_ALU_SBREL_19_12",/* name */
606 false, /* partial_inplace */
607 0x000ff000, /* src_mask */
608 0x000ff000, /* dst_mask */
609 false), /* pcrel_offset */
610
611 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 0, /* rightshift */
613 4, /* size */
614 8, /* bitsize */
615 false, /* pc_relative */
616 20, /* bitpos */
617 complain_overflow_dont,/* complain_on_overflow */
618 bfd_elf_generic_reloc, /* special_function */
619 "R_ARM_ALU_SBREL_27_20",/* name */
620 false, /* partial_inplace */
621 0x0ff00000, /* src_mask */
622 0x0ff00000, /* dst_mask */
623 false), /* pcrel_offset */
624
625 HOWTO (R_ARM_TARGET1, /* type */
626 0, /* rightshift */
627 4, /* size */
628 32, /* bitsize */
629 false, /* pc_relative */
630 0, /* bitpos */
631 complain_overflow_dont,/* complain_on_overflow */
632 bfd_elf_generic_reloc, /* special_function */
633 "R_ARM_TARGET1", /* name */
634 false, /* partial_inplace */
635 0xffffffff, /* src_mask */
636 0xffffffff, /* dst_mask */
637 false), /* pcrel_offset */
638
639 HOWTO (R_ARM_ROSEGREL32, /* type */
640 0, /* rightshift */
641 4, /* size */
642 32, /* bitsize */
643 false, /* pc_relative */
644 0, /* bitpos */
645 complain_overflow_dont,/* complain_on_overflow */
646 bfd_elf_generic_reloc, /* special_function */
647 "R_ARM_ROSEGREL32", /* name */
648 false, /* partial_inplace */
649 0xffffffff, /* src_mask */
650 0xffffffff, /* dst_mask */
651 false), /* pcrel_offset */
652
653 HOWTO (R_ARM_V4BX, /* type */
654 0, /* rightshift */
655 4, /* size */
656 32, /* bitsize */
657 false, /* pc_relative */
658 0, /* bitpos */
659 complain_overflow_dont,/* complain_on_overflow */
660 bfd_elf_generic_reloc, /* special_function */
661 "R_ARM_V4BX", /* name */
662 false, /* partial_inplace */
663 0xffffffff, /* src_mask */
664 0xffffffff, /* dst_mask */
665 false), /* pcrel_offset */
666
667 HOWTO (R_ARM_TARGET2, /* type */
668 0, /* rightshift */
669 4, /* size */
670 32, /* bitsize */
671 false, /* pc_relative */
672 0, /* bitpos */
673 complain_overflow_signed,/* complain_on_overflow */
674 bfd_elf_generic_reloc, /* special_function */
675 "R_ARM_TARGET2", /* name */
676 false, /* partial_inplace */
677 0xffffffff, /* src_mask */
678 0xffffffff, /* dst_mask */
679 true), /* pcrel_offset */
680
681 HOWTO (R_ARM_PREL31, /* type */
682 0, /* rightshift */
683 4, /* size */
684 31, /* bitsize */
685 true, /* pc_relative */
686 0, /* bitpos */
687 complain_overflow_signed,/* complain_on_overflow */
688 bfd_elf_generic_reloc, /* special_function */
689 "R_ARM_PREL31", /* name */
690 false, /* partial_inplace */
691 0x7fffffff, /* src_mask */
692 0x7fffffff, /* dst_mask */
693 true), /* pcrel_offset */
694
695 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 0, /* rightshift */
697 4, /* size */
698 16, /* bitsize */
699 false, /* pc_relative */
700 0, /* bitpos */
701 complain_overflow_dont,/* complain_on_overflow */
702 bfd_elf_generic_reloc, /* special_function */
703 "R_ARM_MOVW_ABS_NC", /* name */
704 false, /* partial_inplace */
705 0x000f0fff, /* src_mask */
706 0x000f0fff, /* dst_mask */
707 false), /* pcrel_offset */
708
709 HOWTO (R_ARM_MOVT_ABS, /* type */
710 0, /* rightshift */
711 4, /* size */
712 16, /* bitsize */
713 false, /* pc_relative */
714 0, /* bitpos */
715 complain_overflow_bitfield,/* complain_on_overflow */
716 bfd_elf_generic_reloc, /* special_function */
717 "R_ARM_MOVT_ABS", /* name */
718 false, /* partial_inplace */
719 0x000f0fff, /* src_mask */
720 0x000f0fff, /* dst_mask */
721 false), /* pcrel_offset */
722
723 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 0, /* rightshift */
725 4, /* size */
726 16, /* bitsize */
727 true, /* pc_relative */
728 0, /* bitpos */
729 complain_overflow_dont,/* complain_on_overflow */
730 bfd_elf_generic_reloc, /* special_function */
731 "R_ARM_MOVW_PREL_NC", /* name */
732 false, /* partial_inplace */
733 0x000f0fff, /* src_mask */
734 0x000f0fff, /* dst_mask */
735 true), /* pcrel_offset */
736
737 HOWTO (R_ARM_MOVT_PREL, /* type */
738 0, /* rightshift */
739 4, /* size */
740 16, /* bitsize */
741 true, /* pc_relative */
742 0, /* bitpos */
743 complain_overflow_bitfield,/* complain_on_overflow */
744 bfd_elf_generic_reloc, /* special_function */
745 "R_ARM_MOVT_PREL", /* name */
746 false, /* partial_inplace */
747 0x000f0fff, /* src_mask */
748 0x000f0fff, /* dst_mask */
749 true), /* pcrel_offset */
750
751 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 0, /* rightshift */
753 4, /* size */
754 16, /* bitsize */
755 false, /* pc_relative */
756 0, /* bitpos */
757 complain_overflow_dont,/* complain_on_overflow */
758 bfd_elf_generic_reloc, /* special_function */
759 "R_ARM_THM_MOVW_ABS_NC",/* name */
760 false, /* partial_inplace */
761 0x040f70ff, /* src_mask */
762 0x040f70ff, /* dst_mask */
763 false), /* pcrel_offset */
764
765 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 0, /* rightshift */
767 4, /* size */
768 16, /* bitsize */
769 false, /* pc_relative */
770 0, /* bitpos */
771 complain_overflow_bitfield,/* complain_on_overflow */
772 bfd_elf_generic_reloc, /* special_function */
773 "R_ARM_THM_MOVT_ABS", /* name */
774 false, /* partial_inplace */
775 0x040f70ff, /* src_mask */
776 0x040f70ff, /* dst_mask */
777 false), /* pcrel_offset */
778
779 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 0, /* rightshift */
781 4, /* size */
782 16, /* bitsize */
783 true, /* pc_relative */
784 0, /* bitpos */
785 complain_overflow_dont,/* complain_on_overflow */
786 bfd_elf_generic_reloc, /* special_function */
787 "R_ARM_THM_MOVW_PREL_NC",/* name */
788 false, /* partial_inplace */
789 0x040f70ff, /* src_mask */
790 0x040f70ff, /* dst_mask */
791 true), /* pcrel_offset */
792
793 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 0, /* rightshift */
795 4, /* size */
796 16, /* bitsize */
797 true, /* pc_relative */
798 0, /* bitpos */
799 complain_overflow_bitfield,/* complain_on_overflow */
800 bfd_elf_generic_reloc, /* special_function */
801 "R_ARM_THM_MOVT_PREL", /* name */
802 false, /* partial_inplace */
803 0x040f70ff, /* src_mask */
804 0x040f70ff, /* dst_mask */
805 true), /* pcrel_offset */
806
807 HOWTO (R_ARM_THM_JUMP19, /* type */
808 1, /* rightshift */
809 4, /* size */
810 19, /* bitsize */
811 true, /* pc_relative */
812 0, /* bitpos */
813 complain_overflow_signed,/* complain_on_overflow */
814 bfd_elf_generic_reloc, /* special_function */
815 "R_ARM_THM_JUMP19", /* name */
816 false, /* partial_inplace */
817 0x043f2fff, /* src_mask */
818 0x043f2fff, /* dst_mask */
819 true), /* pcrel_offset */
820
821 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* rightshift */
823 2, /* size */
824 6, /* bitsize */
825 true, /* pc_relative */
826 0, /* bitpos */
827 complain_overflow_unsigned,/* complain_on_overflow */
828 bfd_elf_generic_reloc, /* special_function */
829 "R_ARM_THM_JUMP6", /* name */
830 false, /* partial_inplace */
831 0x02f8, /* src_mask */
832 0x02f8, /* dst_mask */
833 true), /* pcrel_offset */
834
835 /* These are declared as 13-bit signed relocations because we can
836 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 versa. */
838 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 0, /* rightshift */
840 4, /* size */
841 13, /* bitsize */
842 true, /* pc_relative */
843 0, /* bitpos */
844 complain_overflow_dont,/* complain_on_overflow */
845 bfd_elf_generic_reloc, /* special_function */
846 "R_ARM_THM_ALU_PREL_11_0",/* name */
847 false, /* partial_inplace */
848 0xffffffff, /* src_mask */
849 0xffffffff, /* dst_mask */
850 true), /* pcrel_offset */
851
852 HOWTO (R_ARM_THM_PC12, /* type */
853 0, /* rightshift */
854 4, /* size */
855 13, /* bitsize */
856 true, /* pc_relative */
857 0, /* bitpos */
858 complain_overflow_dont,/* complain_on_overflow */
859 bfd_elf_generic_reloc, /* special_function */
860 "R_ARM_THM_PC12", /* name */
861 false, /* partial_inplace */
862 0xffffffff, /* src_mask */
863 0xffffffff, /* dst_mask */
864 true), /* pcrel_offset */
865
866 HOWTO (R_ARM_ABS32_NOI, /* type */
867 0, /* rightshift */
868 4, /* size */
869 32, /* bitsize */
870 false, /* pc_relative */
871 0, /* bitpos */
872 complain_overflow_dont,/* complain_on_overflow */
873 bfd_elf_generic_reloc, /* special_function */
874 "R_ARM_ABS32_NOI", /* name */
875 false, /* partial_inplace */
876 0xffffffff, /* src_mask */
877 0xffffffff, /* dst_mask */
878 false), /* pcrel_offset */
879
880 HOWTO (R_ARM_REL32_NOI, /* type */
881 0, /* rightshift */
882 4, /* size */
883 32, /* bitsize */
884 true, /* pc_relative */
885 0, /* bitpos */
886 complain_overflow_dont,/* complain_on_overflow */
887 bfd_elf_generic_reloc, /* special_function */
888 "R_ARM_REL32_NOI", /* name */
889 false, /* partial_inplace */
890 0xffffffff, /* src_mask */
891 0xffffffff, /* dst_mask */
892 false), /* pcrel_offset */
893
894 /* Group relocations. */
895
896 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 0, /* rightshift */
898 4, /* size */
899 32, /* bitsize */
900 true, /* pc_relative */
901 0, /* bitpos */
902 complain_overflow_dont,/* complain_on_overflow */
903 bfd_elf_generic_reloc, /* special_function */
904 "R_ARM_ALU_PC_G0_NC", /* name */
905 false, /* partial_inplace */
906 0xffffffff, /* src_mask */
907 0xffffffff, /* dst_mask */
908 true), /* pcrel_offset */
909
910 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 0, /* rightshift */
912 4, /* size */
913 32, /* bitsize */
914 true, /* pc_relative */
915 0, /* bitpos */
916 complain_overflow_dont,/* complain_on_overflow */
917 bfd_elf_generic_reloc, /* special_function */
918 "R_ARM_ALU_PC_G0", /* name */
919 false, /* partial_inplace */
920 0xffffffff, /* src_mask */
921 0xffffffff, /* dst_mask */
922 true), /* pcrel_offset */
923
924 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 0, /* rightshift */
926 4, /* size */
927 32, /* bitsize */
928 true, /* pc_relative */
929 0, /* bitpos */
930 complain_overflow_dont,/* complain_on_overflow */
931 bfd_elf_generic_reloc, /* special_function */
932 "R_ARM_ALU_PC_G1_NC", /* name */
933 false, /* partial_inplace */
934 0xffffffff, /* src_mask */
935 0xffffffff, /* dst_mask */
936 true), /* pcrel_offset */
937
938 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 0, /* rightshift */
940 4, /* size */
941 32, /* bitsize */
942 true, /* pc_relative */
943 0, /* bitpos */
944 complain_overflow_dont,/* complain_on_overflow */
945 bfd_elf_generic_reloc, /* special_function */
946 "R_ARM_ALU_PC_G1", /* name */
947 false, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 true), /* pcrel_offset */
951
952 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 0, /* rightshift */
954 4, /* size */
955 32, /* bitsize */
956 true, /* pc_relative */
957 0, /* bitpos */
958 complain_overflow_dont,/* complain_on_overflow */
959 bfd_elf_generic_reloc, /* special_function */
960 "R_ARM_ALU_PC_G2", /* name */
961 false, /* partial_inplace */
962 0xffffffff, /* src_mask */
963 0xffffffff, /* dst_mask */
964 true), /* pcrel_offset */
965
966 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 0, /* rightshift */
968 4, /* size */
969 32, /* bitsize */
970 true, /* pc_relative */
971 0, /* bitpos */
972 complain_overflow_dont,/* complain_on_overflow */
973 bfd_elf_generic_reloc, /* special_function */
974 "R_ARM_LDR_PC_G1", /* name */
975 false, /* partial_inplace */
976 0xffffffff, /* src_mask */
977 0xffffffff, /* dst_mask */
978 true), /* pcrel_offset */
979
980 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 0, /* rightshift */
982 4, /* size */
983 32, /* bitsize */
984 true, /* pc_relative */
985 0, /* bitpos */
986 complain_overflow_dont,/* complain_on_overflow */
987 bfd_elf_generic_reloc, /* special_function */
988 "R_ARM_LDR_PC_G2", /* name */
989 false, /* partial_inplace */
990 0xffffffff, /* src_mask */
991 0xffffffff, /* dst_mask */
992 true), /* pcrel_offset */
993
994 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 0, /* rightshift */
996 4, /* size */
997 32, /* bitsize */
998 true, /* pc_relative */
999 0, /* bitpos */
1000 complain_overflow_dont,/* complain_on_overflow */
1001 bfd_elf_generic_reloc, /* special_function */
1002 "R_ARM_LDRS_PC_G0", /* name */
1003 false, /* partial_inplace */
1004 0xffffffff, /* src_mask */
1005 0xffffffff, /* dst_mask */
1006 true), /* pcrel_offset */
1007
1008 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 0, /* rightshift */
1010 4, /* size */
1011 32, /* bitsize */
1012 true, /* pc_relative */
1013 0, /* bitpos */
1014 complain_overflow_dont,/* complain_on_overflow */
1015 bfd_elf_generic_reloc, /* special_function */
1016 "R_ARM_LDRS_PC_G1", /* name */
1017 false, /* partial_inplace */
1018 0xffffffff, /* src_mask */
1019 0xffffffff, /* dst_mask */
1020 true), /* pcrel_offset */
1021
1022 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 0, /* rightshift */
1024 4, /* size */
1025 32, /* bitsize */
1026 true, /* pc_relative */
1027 0, /* bitpos */
1028 complain_overflow_dont,/* complain_on_overflow */
1029 bfd_elf_generic_reloc, /* special_function */
1030 "R_ARM_LDRS_PC_G2", /* name */
1031 false, /* partial_inplace */
1032 0xffffffff, /* src_mask */
1033 0xffffffff, /* dst_mask */
1034 true), /* pcrel_offset */
1035
1036 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 0, /* rightshift */
1038 4, /* size */
1039 32, /* bitsize */
1040 true, /* pc_relative */
1041 0, /* bitpos */
1042 complain_overflow_dont,/* complain_on_overflow */
1043 bfd_elf_generic_reloc, /* special_function */
1044 "R_ARM_LDC_PC_G0", /* name */
1045 false, /* partial_inplace */
1046 0xffffffff, /* src_mask */
1047 0xffffffff, /* dst_mask */
1048 true), /* pcrel_offset */
1049
1050 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 0, /* rightshift */
1052 4, /* size */
1053 32, /* bitsize */
1054 true, /* pc_relative */
1055 0, /* bitpos */
1056 complain_overflow_dont,/* complain_on_overflow */
1057 bfd_elf_generic_reloc, /* special_function */
1058 "R_ARM_LDC_PC_G1", /* name */
1059 false, /* partial_inplace */
1060 0xffffffff, /* src_mask */
1061 0xffffffff, /* dst_mask */
1062 true), /* pcrel_offset */
1063
1064 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 0, /* rightshift */
1066 4, /* size */
1067 32, /* bitsize */
1068 true, /* pc_relative */
1069 0, /* bitpos */
1070 complain_overflow_dont,/* complain_on_overflow */
1071 bfd_elf_generic_reloc, /* special_function */
1072 "R_ARM_LDC_PC_G2", /* name */
1073 false, /* partial_inplace */
1074 0xffffffff, /* src_mask */
1075 0xffffffff, /* dst_mask */
1076 true), /* pcrel_offset */
1077
1078 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 0, /* rightshift */
1080 4, /* size */
1081 32, /* bitsize */
1082 true, /* pc_relative */
1083 0, /* bitpos */
1084 complain_overflow_dont,/* complain_on_overflow */
1085 bfd_elf_generic_reloc, /* special_function */
1086 "R_ARM_ALU_SB_G0_NC", /* name */
1087 false, /* partial_inplace */
1088 0xffffffff, /* src_mask */
1089 0xffffffff, /* dst_mask */
1090 true), /* pcrel_offset */
1091
1092 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 0, /* rightshift */
1094 4, /* size */
1095 32, /* bitsize */
1096 true, /* pc_relative */
1097 0, /* bitpos */
1098 complain_overflow_dont,/* complain_on_overflow */
1099 bfd_elf_generic_reloc, /* special_function */
1100 "R_ARM_ALU_SB_G0", /* name */
1101 false, /* partial_inplace */
1102 0xffffffff, /* src_mask */
1103 0xffffffff, /* dst_mask */
1104 true), /* pcrel_offset */
1105
1106 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 0, /* rightshift */
1108 4, /* size */
1109 32, /* bitsize */
1110 true, /* pc_relative */
1111 0, /* bitpos */
1112 complain_overflow_dont,/* complain_on_overflow */
1113 bfd_elf_generic_reloc, /* special_function */
1114 "R_ARM_ALU_SB_G1_NC", /* name */
1115 false, /* partial_inplace */
1116 0xffffffff, /* src_mask */
1117 0xffffffff, /* dst_mask */
1118 true), /* pcrel_offset */
1119
1120 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 0, /* rightshift */
1122 4, /* size */
1123 32, /* bitsize */
1124 true, /* pc_relative */
1125 0, /* bitpos */
1126 complain_overflow_dont,/* complain_on_overflow */
1127 bfd_elf_generic_reloc, /* special_function */
1128 "R_ARM_ALU_SB_G1", /* name */
1129 false, /* partial_inplace */
1130 0xffffffff, /* src_mask */
1131 0xffffffff, /* dst_mask */
1132 true), /* pcrel_offset */
1133
1134 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 0, /* rightshift */
1136 4, /* size */
1137 32, /* bitsize */
1138 true, /* pc_relative */
1139 0, /* bitpos */
1140 complain_overflow_dont,/* complain_on_overflow */
1141 bfd_elf_generic_reloc, /* special_function */
1142 "R_ARM_ALU_SB_G2", /* name */
1143 false, /* partial_inplace */
1144 0xffffffff, /* src_mask */
1145 0xffffffff, /* dst_mask */
1146 true), /* pcrel_offset */
1147
1148 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 0, /* rightshift */
1150 4, /* size */
1151 32, /* bitsize */
1152 true, /* pc_relative */
1153 0, /* bitpos */
1154 complain_overflow_dont,/* complain_on_overflow */
1155 bfd_elf_generic_reloc, /* special_function */
1156 "R_ARM_LDR_SB_G0", /* name */
1157 false, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 true), /* pcrel_offset */
1161
1162 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 0, /* rightshift */
1164 4, /* size */
1165 32, /* bitsize */
1166 true, /* pc_relative */
1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 bfd_elf_generic_reloc, /* special_function */
1170 "R_ARM_LDR_SB_G1", /* name */
1171 false, /* partial_inplace */
1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
1174 true), /* pcrel_offset */
1175
1176 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 0, /* rightshift */
1178 4, /* size */
1179 32, /* bitsize */
1180 true, /* pc_relative */
1181 0, /* bitpos */
1182 complain_overflow_dont,/* complain_on_overflow */
1183 bfd_elf_generic_reloc, /* special_function */
1184 "R_ARM_LDR_SB_G2", /* name */
1185 false, /* partial_inplace */
1186 0xffffffff, /* src_mask */
1187 0xffffffff, /* dst_mask */
1188 true), /* pcrel_offset */
1189
1190 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 0, /* rightshift */
1192 4, /* size */
1193 32, /* bitsize */
1194 true, /* pc_relative */
1195 0, /* bitpos */
1196 complain_overflow_dont,/* complain_on_overflow */
1197 bfd_elf_generic_reloc, /* special_function */
1198 "R_ARM_LDRS_SB_G0", /* name */
1199 false, /* partial_inplace */
1200 0xffffffff, /* src_mask */
1201 0xffffffff, /* dst_mask */
1202 true), /* pcrel_offset */
1203
1204 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 0, /* rightshift */
1206 4, /* size */
1207 32, /* bitsize */
1208 true, /* pc_relative */
1209 0, /* bitpos */
1210 complain_overflow_dont,/* complain_on_overflow */
1211 bfd_elf_generic_reloc, /* special_function */
1212 "R_ARM_LDRS_SB_G1", /* name */
1213 false, /* partial_inplace */
1214 0xffffffff, /* src_mask */
1215 0xffffffff, /* dst_mask */
1216 true), /* pcrel_offset */
1217
1218 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 0, /* rightshift */
1220 4, /* size */
1221 32, /* bitsize */
1222 true, /* pc_relative */
1223 0, /* bitpos */
1224 complain_overflow_dont,/* complain_on_overflow */
1225 bfd_elf_generic_reloc, /* special_function */
1226 "R_ARM_LDRS_SB_G2", /* name */
1227 false, /* partial_inplace */
1228 0xffffffff, /* src_mask */
1229 0xffffffff, /* dst_mask */
1230 true), /* pcrel_offset */
1231
1232 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 0, /* rightshift */
1234 4, /* size */
1235 32, /* bitsize */
1236 true, /* pc_relative */
1237 0, /* bitpos */
1238 complain_overflow_dont,/* complain_on_overflow */
1239 bfd_elf_generic_reloc, /* special_function */
1240 "R_ARM_LDC_SB_G0", /* name */
1241 false, /* partial_inplace */
1242 0xffffffff, /* src_mask */
1243 0xffffffff, /* dst_mask */
1244 true), /* pcrel_offset */
1245
1246 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 0, /* rightshift */
1248 4, /* size */
1249 32, /* bitsize */
1250 true, /* pc_relative */
1251 0, /* bitpos */
1252 complain_overflow_dont,/* complain_on_overflow */
1253 bfd_elf_generic_reloc, /* special_function */
1254 "R_ARM_LDC_SB_G1", /* name */
1255 false, /* partial_inplace */
1256 0xffffffff, /* src_mask */
1257 0xffffffff, /* dst_mask */
1258 true), /* pcrel_offset */
1259
1260 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 0, /* rightshift */
1262 4, /* size */
1263 32, /* bitsize */
1264 true, /* pc_relative */
1265 0, /* bitpos */
1266 complain_overflow_dont,/* complain_on_overflow */
1267 bfd_elf_generic_reloc, /* special_function */
1268 "R_ARM_LDC_SB_G2", /* name */
1269 false, /* partial_inplace */
1270 0xffffffff, /* src_mask */
1271 0xffffffff, /* dst_mask */
1272 true), /* pcrel_offset */
1273
1274 /* End of group relocations. */
1275
1276 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 0, /* rightshift */
1278 4, /* size */
1279 16, /* bitsize */
1280 false, /* pc_relative */
1281 0, /* bitpos */
1282 complain_overflow_dont,/* complain_on_overflow */
1283 bfd_elf_generic_reloc, /* special_function */
1284 "R_ARM_MOVW_BREL_NC", /* name */
1285 false, /* partial_inplace */
1286 0x0000ffff, /* src_mask */
1287 0x0000ffff, /* dst_mask */
1288 false), /* pcrel_offset */
1289
1290 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 0, /* rightshift */
1292 4, /* size */
1293 16, /* bitsize */
1294 false, /* pc_relative */
1295 0, /* bitpos */
1296 complain_overflow_bitfield,/* complain_on_overflow */
1297 bfd_elf_generic_reloc, /* special_function */
1298 "R_ARM_MOVT_BREL", /* name */
1299 false, /* partial_inplace */
1300 0x0000ffff, /* src_mask */
1301 0x0000ffff, /* dst_mask */
1302 false), /* pcrel_offset */
1303
1304 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 0, /* rightshift */
1306 4, /* size */
1307 16, /* bitsize */
1308 false, /* pc_relative */
1309 0, /* bitpos */
1310 complain_overflow_dont,/* complain_on_overflow */
1311 bfd_elf_generic_reloc, /* special_function */
1312 "R_ARM_MOVW_BREL", /* name */
1313 false, /* partial_inplace */
1314 0x0000ffff, /* src_mask */
1315 0x0000ffff, /* dst_mask */
1316 false), /* pcrel_offset */
1317
1318 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 0, /* rightshift */
1320 4, /* size */
1321 16, /* bitsize */
1322 false, /* pc_relative */
1323 0, /* bitpos */
1324 complain_overflow_dont,/* complain_on_overflow */
1325 bfd_elf_generic_reloc, /* special_function */
1326 "R_ARM_THM_MOVW_BREL_NC",/* name */
1327 false, /* partial_inplace */
1328 0x040f70ff, /* src_mask */
1329 0x040f70ff, /* dst_mask */
1330 false), /* pcrel_offset */
1331
1332 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 0, /* rightshift */
1334 4, /* size */
1335 16, /* bitsize */
1336 false, /* pc_relative */
1337 0, /* bitpos */
1338 complain_overflow_bitfield,/* complain_on_overflow */
1339 bfd_elf_generic_reloc, /* special_function */
1340 "R_ARM_THM_MOVT_BREL", /* name */
1341 false, /* partial_inplace */
1342 0x040f70ff, /* src_mask */
1343 0x040f70ff, /* dst_mask */
1344 false), /* pcrel_offset */
1345
1346 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 0, /* rightshift */
1348 4, /* size */
1349 16, /* bitsize */
1350 false, /* pc_relative */
1351 0, /* bitpos */
1352 complain_overflow_dont,/* complain_on_overflow */
1353 bfd_elf_generic_reloc, /* special_function */
1354 "R_ARM_THM_MOVW_BREL", /* name */
1355 false, /* partial_inplace */
1356 0x040f70ff, /* src_mask */
1357 0x040f70ff, /* dst_mask */
1358 false), /* pcrel_offset */
1359
1360 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 0, /* rightshift */
1362 4, /* size */
1363 32, /* bitsize */
1364 false, /* pc_relative */
1365 0, /* bitpos */
1366 complain_overflow_bitfield,/* complain_on_overflow */
1367 NULL, /* special_function */
1368 "R_ARM_TLS_GOTDESC", /* name */
1369 true, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 false), /* pcrel_offset */
1373
1374 HOWTO (R_ARM_TLS_CALL, /* type */
1375 0, /* rightshift */
1376 4, /* size */
1377 24, /* bitsize */
1378 false, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_TLS_CALL", /* name */
1383 false, /* partial_inplace */
1384 0x00ffffff, /* src_mask */
1385 0x00ffffff, /* dst_mask */
1386 false), /* pcrel_offset */
1387
1388 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 0, /* rightshift */
1390 4, /* size */
1391 0, /* bitsize */
1392 false, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont,/* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_TLS_DESCSEQ", /* name */
1397 false, /* partial_inplace */
1398 0x00000000, /* src_mask */
1399 0x00000000, /* dst_mask */
1400 false), /* pcrel_offset */
1401
1402 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 0, /* rightshift */
1404 4, /* size */
1405 24, /* bitsize */
1406 false, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_dont,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_THM_TLS_CALL", /* name */
1411 false, /* partial_inplace */
1412 0x07ff07ff, /* src_mask */
1413 0x07ff07ff, /* dst_mask */
1414 false), /* pcrel_offset */
1415
1416 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 0, /* rightshift */
1418 4, /* size */
1419 32, /* bitsize */
1420 false, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_dont,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_PLT32_ABS", /* name */
1425 false, /* partial_inplace */
1426 0xffffffff, /* src_mask */
1427 0xffffffff, /* dst_mask */
1428 false), /* pcrel_offset */
1429
1430 HOWTO (R_ARM_GOT_ABS, /* type */
1431 0, /* rightshift */
1432 4, /* size */
1433 32, /* bitsize */
1434 false, /* pc_relative */
1435 0, /* bitpos */
1436 complain_overflow_dont,/* complain_on_overflow */
1437 bfd_elf_generic_reloc, /* special_function */
1438 "R_ARM_GOT_ABS", /* name */
1439 false, /* partial_inplace */
1440 0xffffffff, /* src_mask */
1441 0xffffffff, /* dst_mask */
1442 false), /* pcrel_offset */
1443
1444 HOWTO (R_ARM_GOT_PREL, /* type */
1445 0, /* rightshift */
1446 4, /* size */
1447 32, /* bitsize */
1448 true, /* pc_relative */
1449 0, /* bitpos */
1450 complain_overflow_dont, /* complain_on_overflow */
1451 bfd_elf_generic_reloc, /* special_function */
1452 "R_ARM_GOT_PREL", /* name */
1453 false, /* partial_inplace */
1454 0xffffffff, /* src_mask */
1455 0xffffffff, /* dst_mask */
1456 true), /* pcrel_offset */
1457
1458 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 0, /* rightshift */
1460 4, /* size */
1461 12, /* bitsize */
1462 false, /* pc_relative */
1463 0, /* bitpos */
1464 complain_overflow_bitfield,/* complain_on_overflow */
1465 bfd_elf_generic_reloc, /* special_function */
1466 "R_ARM_GOT_BREL12", /* name */
1467 false, /* partial_inplace */
1468 0x00000fff, /* src_mask */
1469 0x00000fff, /* dst_mask */
1470 false), /* pcrel_offset */
1471
1472 HOWTO (R_ARM_GOTOFF12, /* type */
1473 0, /* rightshift */
1474 4, /* size */
1475 12, /* bitsize */
1476 false, /* pc_relative */
1477 0, /* bitpos */
1478 complain_overflow_bitfield,/* complain_on_overflow */
1479 bfd_elf_generic_reloc, /* special_function */
1480 "R_ARM_GOTOFF12", /* name */
1481 false, /* partial_inplace */
1482 0x00000fff, /* src_mask */
1483 0x00000fff, /* dst_mask */
1484 false), /* pcrel_offset */
1485
1486 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487
1488 /* GNU extension to record C++ vtable member usage */
1489 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 0, /* rightshift */
1491 4, /* size */
1492 0, /* bitsize */
1493 false, /* pc_relative */
1494 0, /* bitpos */
1495 complain_overflow_dont, /* complain_on_overflow */
1496 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1497 "R_ARM_GNU_VTENTRY", /* name */
1498 false, /* partial_inplace */
1499 0, /* src_mask */
1500 0, /* dst_mask */
1501 false), /* pcrel_offset */
1502
1503 /* GNU extension to record C++ vtable hierarchy */
1504 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 0, /* rightshift */
1506 4, /* size */
1507 0, /* bitsize */
1508 false, /* pc_relative */
1509 0, /* bitpos */
1510 complain_overflow_dont, /* complain_on_overflow */
1511 NULL, /* special_function */
1512 "R_ARM_GNU_VTINHERIT", /* name */
1513 false, /* partial_inplace */
1514 0, /* src_mask */
1515 0, /* dst_mask */
1516 false), /* pcrel_offset */
1517
1518 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* rightshift */
1520 2, /* size */
1521 11, /* bitsize */
1522 true, /* pc_relative */
1523 0, /* bitpos */
1524 complain_overflow_signed, /* complain_on_overflow */
1525 bfd_elf_generic_reloc, /* special_function */
1526 "R_ARM_THM_JUMP11", /* name */
1527 false, /* partial_inplace */
1528 0x000007ff, /* src_mask */
1529 0x000007ff, /* dst_mask */
1530 true), /* pcrel_offset */
1531
1532 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* rightshift */
1534 2, /* size */
1535 8, /* bitsize */
1536 true, /* pc_relative */
1537 0, /* bitpos */
1538 complain_overflow_signed, /* complain_on_overflow */
1539 bfd_elf_generic_reloc, /* special_function */
1540 "R_ARM_THM_JUMP8", /* name */
1541 false, /* partial_inplace */
1542 0x000000ff, /* src_mask */
1543 0x000000ff, /* dst_mask */
1544 true), /* pcrel_offset */
1545
1546 /* TLS relocations */
1547 HOWTO (R_ARM_TLS_GD32, /* type */
1548 0, /* rightshift */
1549 4, /* size */
1550 32, /* bitsize */
1551 false, /* pc_relative */
1552 0, /* bitpos */
1553 complain_overflow_bitfield,/* complain_on_overflow */
1554 NULL, /* special_function */
1555 "R_ARM_TLS_GD32", /* name */
1556 true, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 false), /* pcrel_offset */
1560
1561 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 0, /* rightshift */
1563 4, /* size */
1564 32, /* bitsize */
1565 false, /* pc_relative */
1566 0, /* bitpos */
1567 complain_overflow_bitfield,/* complain_on_overflow */
1568 bfd_elf_generic_reloc, /* special_function */
1569 "R_ARM_TLS_LDM32", /* name */
1570 true, /* partial_inplace */
1571 0xffffffff, /* src_mask */
1572 0xffffffff, /* dst_mask */
1573 false), /* pcrel_offset */
1574
1575 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 0, /* rightshift */
1577 4, /* size */
1578 32, /* bitsize */
1579 false, /* pc_relative */
1580 0, /* bitpos */
1581 complain_overflow_bitfield,/* complain_on_overflow */
1582 bfd_elf_generic_reloc, /* special_function */
1583 "R_ARM_TLS_LDO32", /* name */
1584 true, /* partial_inplace */
1585 0xffffffff, /* src_mask */
1586 0xffffffff, /* dst_mask */
1587 false), /* pcrel_offset */
1588
1589 HOWTO (R_ARM_TLS_IE32, /* type */
1590 0, /* rightshift */
1591 4, /* size */
1592 32, /* bitsize */
1593 false, /* pc_relative */
1594 0, /* bitpos */
1595 complain_overflow_bitfield,/* complain_on_overflow */
1596 NULL, /* special_function */
1597 "R_ARM_TLS_IE32", /* name */
1598 true, /* partial_inplace */
1599 0xffffffff, /* src_mask */
1600 0xffffffff, /* dst_mask */
1601 false), /* pcrel_offset */
1602
1603 HOWTO (R_ARM_TLS_LE32, /* type */
1604 0, /* rightshift */
1605 4, /* size */
1606 32, /* bitsize */
1607 false, /* pc_relative */
1608 0, /* bitpos */
1609 complain_overflow_bitfield,/* complain_on_overflow */
1610 NULL, /* special_function */
1611 "R_ARM_TLS_LE32", /* name */
1612 true, /* partial_inplace */
1613 0xffffffff, /* src_mask */
1614 0xffffffff, /* dst_mask */
1615 false), /* pcrel_offset */
1616
1617 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 0, /* rightshift */
1619 4, /* size */
1620 12, /* bitsize */
1621 false, /* pc_relative */
1622 0, /* bitpos */
1623 complain_overflow_bitfield,/* complain_on_overflow */
1624 bfd_elf_generic_reloc, /* special_function */
1625 "R_ARM_TLS_LDO12", /* name */
1626 false, /* partial_inplace */
1627 0x00000fff, /* src_mask */
1628 0x00000fff, /* dst_mask */
1629 false), /* pcrel_offset */
1630
1631 HOWTO (R_ARM_TLS_LE12, /* type */
1632 0, /* rightshift */
1633 4, /* size */
1634 12, /* bitsize */
1635 false, /* pc_relative */
1636 0, /* bitpos */
1637 complain_overflow_bitfield,/* complain_on_overflow */
1638 bfd_elf_generic_reloc, /* special_function */
1639 "R_ARM_TLS_LE12", /* name */
1640 false, /* partial_inplace */
1641 0x00000fff, /* src_mask */
1642 0x00000fff, /* dst_mask */
1643 false), /* pcrel_offset */
1644
1645 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 0, /* rightshift */
1647 4, /* size */
1648 12, /* bitsize */
1649 false, /* pc_relative */
1650 0, /* bitpos */
1651 complain_overflow_bitfield,/* complain_on_overflow */
1652 bfd_elf_generic_reloc, /* special_function */
1653 "R_ARM_TLS_IE12GP", /* name */
1654 false, /* partial_inplace */
1655 0x00000fff, /* src_mask */
1656 0x00000fff, /* dst_mask */
1657 false), /* pcrel_offset */
1658
1659 /* 112-127 private relocations. */
1660 EMPTY_HOWTO (112),
1661 EMPTY_HOWTO (113),
1662 EMPTY_HOWTO (114),
1663 EMPTY_HOWTO (115),
1664 EMPTY_HOWTO (116),
1665 EMPTY_HOWTO (117),
1666 EMPTY_HOWTO (118),
1667 EMPTY_HOWTO (119),
1668 EMPTY_HOWTO (120),
1669 EMPTY_HOWTO (121),
1670 EMPTY_HOWTO (122),
1671 EMPTY_HOWTO (123),
1672 EMPTY_HOWTO (124),
1673 EMPTY_HOWTO (125),
1674 EMPTY_HOWTO (126),
1675 EMPTY_HOWTO (127),
1676
1677 /* R_ARM_ME_TOO, obsolete. */
1678 EMPTY_HOWTO (128),
1679
1680 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 0, /* rightshift */
1682 2, /* size */
1683 0, /* bitsize */
1684 false, /* pc_relative */
1685 0, /* bitpos */
1686 complain_overflow_dont,/* complain_on_overflow */
1687 bfd_elf_generic_reloc, /* special_function */
1688 "R_ARM_THM_TLS_DESCSEQ",/* name */
1689 false, /* partial_inplace */
1690 0x00000000, /* src_mask */
1691 0x00000000, /* dst_mask */
1692 false), /* pcrel_offset */
1693 EMPTY_HOWTO (130),
1694 EMPTY_HOWTO (131),
1695 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1696 0, /* rightshift. */
1697 2, /* size. */
1698 16, /* bitsize. */
1699 false, /* pc_relative. */
1700 0, /* bitpos. */
1701 complain_overflow_bitfield,/* complain_on_overflow. */
1702 bfd_elf_generic_reloc, /* special_function. */
1703 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1704 false, /* partial_inplace. */
1705 0x00000000, /* src_mask. */
1706 0x00000000, /* dst_mask. */
1707 false), /* pcrel_offset. */
1708 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1709 0, /* rightshift. */
1710 2, /* size. */
1711 16, /* bitsize. */
1712 false, /* pc_relative. */
1713 0, /* bitpos. */
1714 complain_overflow_bitfield,/* complain_on_overflow. */
1715 bfd_elf_generic_reloc, /* special_function. */
1716 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1717 false, /* partial_inplace. */
1718 0x00000000, /* src_mask. */
1719 0x00000000, /* dst_mask. */
1720 false), /* pcrel_offset. */
1721 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1722 0, /* rightshift. */
1723 2, /* size. */
1724 16, /* bitsize. */
1725 false, /* pc_relative. */
1726 0, /* bitpos. */
1727 complain_overflow_bitfield,/* complain_on_overflow. */
1728 bfd_elf_generic_reloc, /* special_function. */
1729 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1730 false, /* partial_inplace. */
1731 0x00000000, /* src_mask. */
1732 0x00000000, /* dst_mask. */
1733 false), /* pcrel_offset. */
1734 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1735 0, /* rightshift. */
1736 2, /* size. */
1737 16, /* bitsize. */
1738 false, /* pc_relative. */
1739 0, /* bitpos. */
1740 complain_overflow_bitfield,/* complain_on_overflow. */
1741 bfd_elf_generic_reloc, /* special_function. */
1742 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1743 false, /* partial_inplace. */
1744 0x00000000, /* src_mask. */
1745 0x00000000, /* dst_mask. */
1746 false), /* pcrel_offset. */
1747 /* Relocations for Armv8.1-M Mainline. */
1748 HOWTO (R_ARM_THM_BF16, /* type. */
1749 0, /* rightshift. */
1750 2, /* size. */
1751 16, /* bitsize. */
1752 true, /* pc_relative. */
1753 0, /* bitpos. */
1754 complain_overflow_dont,/* do not complain_on_overflow. */
1755 bfd_elf_generic_reloc, /* special_function. */
1756 "R_ARM_THM_BF16", /* name. */
1757 false, /* partial_inplace. */
1758 0x001f0ffe, /* src_mask. */
1759 0x001f0ffe, /* dst_mask. */
1760 true), /* pcrel_offset. */
1761 HOWTO (R_ARM_THM_BF12, /* type. */
1762 0, /* rightshift. */
1763 2, /* size. */
1764 12, /* bitsize. */
1765 true, /* pc_relative. */
1766 0, /* bitpos. */
1767 complain_overflow_dont,/* do not complain_on_overflow. */
1768 bfd_elf_generic_reloc, /* special_function. */
1769 "R_ARM_THM_BF12", /* name. */
1770 false, /* partial_inplace. */
1771 0x00010ffe, /* src_mask. */
1772 0x00010ffe, /* dst_mask. */
1773 true), /* pcrel_offset. */
1774 HOWTO (R_ARM_THM_BF18, /* type. */
1775 0, /* rightshift. */
1776 2, /* size. */
1777 18, /* bitsize. */
1778 true, /* pc_relative. */
1779 0, /* bitpos. */
1780 complain_overflow_dont,/* do not complain_on_overflow. */
1781 bfd_elf_generic_reloc, /* special_function. */
1782 "R_ARM_THM_BF18", /* name. */
1783 false, /* partial_inplace. */
1784 0x007f0ffe, /* src_mask. */
1785 0x007f0ffe, /* dst_mask. */
1786 true), /* pcrel_offset. */
1787 };
1788
1789 /* 160 onwards: */
1790 static reloc_howto_type elf32_arm_howto_table_2[8] =
1791 {
1792 HOWTO (R_ARM_IRELATIVE, /* type */
1793 0, /* rightshift */
1794 4, /* size */
1795 32, /* bitsize */
1796 false, /* pc_relative */
1797 0, /* bitpos */
1798 complain_overflow_bitfield,/* complain_on_overflow */
1799 bfd_elf_generic_reloc, /* special_function */
1800 "R_ARM_IRELATIVE", /* name */
1801 true, /* partial_inplace */
1802 0xffffffff, /* src_mask */
1803 0xffffffff, /* dst_mask */
1804 false), /* pcrel_offset */
1805 HOWTO (R_ARM_GOTFUNCDESC, /* type */
1806 0, /* rightshift */
1807 4, /* size */
1808 32, /* bitsize */
1809 false, /* pc_relative */
1810 0, /* bitpos */
1811 complain_overflow_bitfield,/* complain_on_overflow */
1812 bfd_elf_generic_reloc, /* special_function */
1813 "R_ARM_GOTFUNCDESC", /* name */
1814 false, /* partial_inplace */
1815 0, /* src_mask */
1816 0xffffffff, /* dst_mask */
1817 false), /* pcrel_offset */
1818 HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */
1819 0, /* rightshift */
1820 4, /* size */
1821 32, /* bitsize */
1822 false, /* pc_relative */
1823 0, /* bitpos */
1824 complain_overflow_bitfield,/* complain_on_overflow */
1825 bfd_elf_generic_reloc, /* special_function */
1826 "R_ARM_GOTOFFFUNCDESC",/* name */
1827 false, /* partial_inplace */
1828 0, /* src_mask */
1829 0xffffffff, /* dst_mask */
1830 false), /* pcrel_offset */
1831 HOWTO (R_ARM_FUNCDESC, /* type */
1832 0, /* rightshift */
1833 4, /* size */
1834 32, /* bitsize */
1835 false, /* pc_relative */
1836 0, /* bitpos */
1837 complain_overflow_bitfield,/* complain_on_overflow */
1838 bfd_elf_generic_reloc, /* special_function */
1839 "R_ARM_FUNCDESC", /* name */
1840 false, /* partial_inplace */
1841 0, /* src_mask */
1842 0xffffffff, /* dst_mask */
1843 false), /* pcrel_offset */
1844 HOWTO (R_ARM_FUNCDESC_VALUE, /* type */
1845 0, /* rightshift */
1846 4, /* size */
1847 64, /* bitsize */
1848 false, /* pc_relative */
1849 0, /* bitpos */
1850 complain_overflow_bitfield,/* complain_on_overflow */
1851 bfd_elf_generic_reloc, /* special_function */
1852 "R_ARM_FUNCDESC_VALUE",/* name */
1853 false, /* partial_inplace */
1854 0, /* src_mask */
1855 0xffffffff, /* dst_mask */
1856 false), /* pcrel_offset */
1857 HOWTO (R_ARM_TLS_GD32_FDPIC, /* type */
1858 0, /* rightshift */
1859 4, /* size */
1860 32, /* bitsize */
1861 false, /* pc_relative */
1862 0, /* bitpos */
1863 complain_overflow_bitfield,/* complain_on_overflow */
1864 bfd_elf_generic_reloc, /* special_function */
1865 "R_ARM_TLS_GD32_FDPIC",/* name */
1866 false, /* partial_inplace */
1867 0, /* src_mask */
1868 0xffffffff, /* dst_mask */
1869 false), /* pcrel_offset */
1870 HOWTO (R_ARM_TLS_LDM32_FDPIC, /* type */
1871 0, /* rightshift */
1872 4, /* size */
1873 32, /* bitsize */
1874 false, /* pc_relative */
1875 0, /* bitpos */
1876 complain_overflow_bitfield,/* complain_on_overflow */
1877 bfd_elf_generic_reloc, /* special_function */
1878 "R_ARM_TLS_LDM32_FDPIC",/* name */
1879 false, /* partial_inplace */
1880 0, /* src_mask */
1881 0xffffffff, /* dst_mask */
1882 false), /* pcrel_offset */
1883 HOWTO (R_ARM_TLS_IE32_FDPIC, /* type */
1884 0, /* rightshift */
1885 4, /* size */
1886 32, /* bitsize */
1887 false, /* pc_relative */
1888 0, /* bitpos */
1889 complain_overflow_bitfield,/* complain_on_overflow */
1890 bfd_elf_generic_reloc, /* special_function */
1891 "R_ARM_TLS_IE32_FDPIC",/* name */
1892 false, /* partial_inplace */
1893 0, /* src_mask */
1894 0xffffffff, /* dst_mask */
1895 false), /* pcrel_offset */
1896 };
1897
1898 /* 249-255 extended, currently unused, relocations: */
1899 static reloc_howto_type elf32_arm_howto_table_3[4] =
1900 {
1901 HOWTO (R_ARM_RREL32, /* type */
1902 0, /* rightshift */
1903 0, /* size */
1904 0, /* bitsize */
1905 false, /* pc_relative */
1906 0, /* bitpos */
1907 complain_overflow_dont,/* complain_on_overflow */
1908 bfd_elf_generic_reloc, /* special_function */
1909 "R_ARM_RREL32", /* name */
1910 false, /* partial_inplace */
1911 0, /* src_mask */
1912 0, /* dst_mask */
1913 false), /* pcrel_offset */
1914
1915 HOWTO (R_ARM_RABS32, /* type */
1916 0, /* rightshift */
1917 0, /* size */
1918 0, /* bitsize */
1919 false, /* pc_relative */
1920 0, /* bitpos */
1921 complain_overflow_dont,/* complain_on_overflow */
1922 bfd_elf_generic_reloc, /* special_function */
1923 "R_ARM_RABS32", /* name */
1924 false, /* partial_inplace */
1925 0, /* src_mask */
1926 0, /* dst_mask */
1927 false), /* pcrel_offset */
1928
1929 HOWTO (R_ARM_RPC24, /* type */
1930 0, /* rightshift */
1931 0, /* size */
1932 0, /* bitsize */
1933 false, /* pc_relative */
1934 0, /* bitpos */
1935 complain_overflow_dont,/* complain_on_overflow */
1936 bfd_elf_generic_reloc, /* special_function */
1937 "R_ARM_RPC24", /* name */
1938 false, /* partial_inplace */
1939 0, /* src_mask */
1940 0, /* dst_mask */
1941 false), /* pcrel_offset */
1942
1943 HOWTO (R_ARM_RBASE, /* type */
1944 0, /* rightshift */
1945 0, /* size */
1946 0, /* bitsize */
1947 false, /* pc_relative */
1948 0, /* bitpos */
1949 complain_overflow_dont,/* complain_on_overflow */
1950 bfd_elf_generic_reloc, /* special_function */
1951 "R_ARM_RBASE", /* name */
1952 false, /* partial_inplace */
1953 0, /* src_mask */
1954 0, /* dst_mask */
1955 false) /* pcrel_offset */
1956 };
1957
1958 static reloc_howto_type *
1959 elf32_arm_howto_from_type (unsigned int r_type)
1960 {
1961 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1962 return &elf32_arm_howto_table_1[r_type];
1963
1964 if (r_type >= R_ARM_IRELATIVE
1965 && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2))
1966 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1967
1968 if (r_type >= R_ARM_RREL32
1969 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1970 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1971
1972 return NULL;
1973 }
1974
1975 static bool
1976 elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc,
1977 Elf_Internal_Rela * elf_reloc)
1978 {
1979 unsigned int r_type;
1980
1981 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1982 if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL)
1983 {
1984 /* xgettext:c-format */
1985 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1986 abfd, r_type);
1987 bfd_set_error (bfd_error_bad_value);
1988 return false;
1989 }
1990 return true;
1991 }
1992
1993 struct elf32_arm_reloc_map
1994 {
1995 bfd_reloc_code_real_type bfd_reloc_val;
1996 unsigned char elf_reloc_val;
1997 };
1998
1999 /* All entries in this list must also be present in elf32_arm_howto_table. */
2000 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
2001 {
2002 {BFD_RELOC_NONE, R_ARM_NONE},
2003 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
2004 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
2005 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
2006 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
2007 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
2008 {BFD_RELOC_32, R_ARM_ABS32},
2009 {BFD_RELOC_32_PCREL, R_ARM_REL32},
2010 {BFD_RELOC_8, R_ARM_ABS8},
2011 {BFD_RELOC_16, R_ARM_ABS16},
2012 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
2013 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
2014 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
2015 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
2016 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
2017 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
2018 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
2019 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
2020 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
2021 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
2022 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
2023 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
2024 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
2025 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
2026 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
2027 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
2028 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
2029 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
2030 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
2031 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
2032 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
2033 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
2034 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
2035 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
2036 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
2037 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
2038 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
2039 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
2040 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
2041 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
2042 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
2043 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
2044 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
2045 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
2046 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
2047 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
2048 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
2049 {BFD_RELOC_ARM_GOTFUNCDESC, R_ARM_GOTFUNCDESC},
2050 {BFD_RELOC_ARM_GOTOFFFUNCDESC, R_ARM_GOTOFFFUNCDESC},
2051 {BFD_RELOC_ARM_FUNCDESC, R_ARM_FUNCDESC},
2052 {BFD_RELOC_ARM_FUNCDESC_VALUE, R_ARM_FUNCDESC_VALUE},
2053 {BFD_RELOC_ARM_TLS_GD32_FDPIC, R_ARM_TLS_GD32_FDPIC},
2054 {BFD_RELOC_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_LDM32_FDPIC},
2055 {BFD_RELOC_ARM_TLS_IE32_FDPIC, R_ARM_TLS_IE32_FDPIC},
2056 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
2057 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
2058 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
2059 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
2060 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
2061 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
2062 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
2063 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
2064 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
2065 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
2066 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
2067 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
2068 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
2069 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
2070 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
2071 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
2072 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
2073 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
2074 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
2075 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
2076 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
2077 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
2078 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
2079 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
2080 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
2081 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
2082 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
2083 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
2084 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
2085 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
2086 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
2087 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
2088 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
2089 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
2090 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
2091 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
2092 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
2093 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
2094 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
2095 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
2096 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
2097 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
2098 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC},
2099 {BFD_RELOC_ARM_THUMB_BF17, R_ARM_THM_BF16},
2100 {BFD_RELOC_ARM_THUMB_BF13, R_ARM_THM_BF12},
2101 {BFD_RELOC_ARM_THUMB_BF19, R_ARM_THM_BF18}
2102 };
2103
2104 static reloc_howto_type *
2105 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2106 bfd_reloc_code_real_type code)
2107 {
2108 unsigned int i;
2109
2110 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
2111 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
2112 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
2113
2114 return NULL;
2115 }
2116
2117 static reloc_howto_type *
2118 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2119 const char *r_name)
2120 {
2121 unsigned int i;
2122
2123 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
2124 if (elf32_arm_howto_table_1[i].name != NULL
2125 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
2126 return &elf32_arm_howto_table_1[i];
2127
2128 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
2129 if (elf32_arm_howto_table_2[i].name != NULL
2130 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
2131 return &elf32_arm_howto_table_2[i];
2132
2133 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
2134 if (elf32_arm_howto_table_3[i].name != NULL
2135 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
2136 return &elf32_arm_howto_table_3[i];
2137
2138 return NULL;
2139 }
2140
2141 /* Support for core dump NOTE sections. */
2142
2143 static bool
2144 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2145 {
2146 int offset;
2147 size_t size;
2148
2149 switch (note->descsz)
2150 {
2151 default:
2152 return false;
2153
2154 case 148: /* Linux/ARM 32-bit. */
2155 /* pr_cursig */
2156 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2157
2158 /* pr_pid */
2159 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2160
2161 /* pr_reg */
2162 offset = 72;
2163 size = 72;
2164
2165 break;
2166 }
2167
2168 /* Make a ".reg/999" section. */
2169 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2170 size, note->descpos + offset);
2171 }
2172
2173 static bool
2174 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2175 {
2176 switch (note->descsz)
2177 {
2178 default:
2179 return false;
2180
2181 case 124: /* Linux/ARM elf_prpsinfo. */
2182 elf_tdata (abfd)->core->pid
2183 = bfd_get_32 (abfd, note->descdata + 12);
2184 elf_tdata (abfd)->core->program
2185 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2186 elf_tdata (abfd)->core->command
2187 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2188 }
2189
2190 /* Note that for some reason, a spurious space is tacked
2191 onto the end of the args in some (at least one anyway)
2192 implementations, so strip it off if it exists. */
2193 {
2194 char *command = elf_tdata (abfd)->core->command;
2195 int n = strlen (command);
2196
2197 if (0 < n && command[n - 1] == ' ')
2198 command[n - 1] = '\0';
2199 }
2200
2201 return true;
2202 }
2203
2204 static char *
2205 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2206 int note_type, ...)
2207 {
2208 switch (note_type)
2209 {
2210 default:
2211 return NULL;
2212
2213 case NT_PRPSINFO:
2214 {
2215 char data[124] ATTRIBUTE_NONSTRING;
2216 va_list ap;
2217
2218 va_start (ap, note_type);
2219 memset (data, 0, sizeof (data));
2220 strncpy (data + 28, va_arg (ap, const char *), 16);
2221 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2222 DIAGNOSTIC_PUSH;
2223 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
2224 -Wstringop-truncation:
2225 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
2226 */
2227 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
2228 #endif
2229 strncpy (data + 44, va_arg (ap, const char *), 80);
2230 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2231 DIAGNOSTIC_POP;
2232 #endif
2233 va_end (ap);
2234
2235 return elfcore_write_note (abfd, buf, bufsiz,
2236 "CORE", note_type, data, sizeof (data));
2237 }
2238
2239 case NT_PRSTATUS:
2240 {
2241 char data[148];
2242 va_list ap;
2243 long pid;
2244 int cursig;
2245 const void *greg;
2246
2247 va_start (ap, note_type);
2248 memset (data, 0, sizeof (data));
2249 pid = va_arg (ap, long);
2250 bfd_put_32 (abfd, pid, data + 24);
2251 cursig = va_arg (ap, int);
2252 bfd_put_16 (abfd, cursig, data + 12);
2253 greg = va_arg (ap, const void *);
2254 memcpy (data + 72, greg, 72);
2255 va_end (ap);
2256
2257 return elfcore_write_note (abfd, buf, bufsiz,
2258 "CORE", note_type, data, sizeof (data));
2259 }
2260 }
2261 }
2262
2263 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2264 #define TARGET_LITTLE_NAME "elf32-littlearm"
2265 #define TARGET_BIG_SYM arm_elf32_be_vec
2266 #define TARGET_BIG_NAME "elf32-bigarm"
2267
2268 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2269 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2270 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2271
2272 typedef unsigned long int insn32;
2273 typedef unsigned short int insn16;
2274
2275 /* In lieu of proper flags, assume all EABIv4 or later objects are
2276 interworkable. */
2277 #define INTERWORK_FLAG(abfd) \
2278 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2279 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2280 || ((abfd)->flags & BFD_LINKER_CREATED))
2281
2282 /* The linker script knows the section names for placement.
2283 The entry_names are used to do simple name mangling on the stubs.
2284 Given a function name, and its type, the stub can be found. The
2285 name can be changed. The only requirement is the %s be present. */
2286 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2287 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2288
2289 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2290 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2291
2292 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2293 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2294
2295 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2296 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2297
2298 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2299 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2300
2301 #define STUB_ENTRY_NAME "__%s_veneer"
2302
2303 #define CMSE_PREFIX "__acle_se_"
2304
2305 #define CMSE_STUB_NAME ".gnu.sgstubs"
2306
2307 /* The name of the dynamic interpreter. This is put in the .interp
2308 section. */
2309 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2310
2311 /* FDPIC default stack size. */
2312 #define DEFAULT_STACK_SIZE 0x8000
2313
2314 static const unsigned long tls_trampoline [] =
2315 {
2316 0xe08e0000, /* add r0, lr, r0 */
2317 0xe5901004, /* ldr r1, [r0,#4] */
2318 0xe12fff11, /* bx r1 */
2319 };
2320
2321 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2322 {
2323 0xe52d2004, /* push {r2} */
2324 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2325 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2326 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2327 0xe081100f, /* 2: add r1, pc */
2328 0xe12fff12, /* bx r2 */
2329 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2330 + dl_tlsdesc_lazy_resolver(GOT) */
2331 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2332 };
2333
2334 /* NOTE: [Thumb nop sequence]
2335 When adding code that transitions from Thumb to Arm the instruction that
2336 should be used for the alignment padding should be 0xe7fd (b .-2) instead of
2337 a nop for performance reasons. */
2338
2339 /* ARM FDPIC PLT entry. */
2340 /* The last 5 words contain PLT lazy fragment code and data. */
2341 static const bfd_vma elf32_arm_fdpic_plt_entry [] =
2342 {
2343 0xe59fc008, /* ldr r12, .L1 */
2344 0xe08cc009, /* add r12, r12, r9 */
2345 0xe59c9004, /* ldr r9, [r12, #4] */
2346 0xe59cf000, /* ldr pc, [r12] */
2347 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */
2348 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */
2349 0xe51fc00c, /* ldr r12, [pc, #-12] */
2350 0xe92d1000, /* push {r12} */
2351 0xe599c004, /* ldr r12, [r9, #4] */
2352 0xe599f000, /* ldr pc, [r9] */
2353 };
2354
2355 /* Thumb FDPIC PLT entry. */
2356 /* The last 5 words contain PLT lazy fragment code and data. */
2357 static const bfd_vma elf32_arm_fdpic_thumb_plt_entry [] =
2358 {
2359 0xc00cf8df, /* ldr.w r12, .L1 */
2360 0x0c09eb0c, /* add.w r12, r12, r9 */
2361 0x9004f8dc, /* ldr.w r9, [r12, #4] */
2362 0xf000f8dc, /* ldr.w pc, [r12] */
2363 0x00000000, /* .L1 .word foo(GOTOFFFUNCDESC) */
2364 0x00000000, /* .L2 .word foo(funcdesc_value_reloc_offset) */
2365 0xc008f85f, /* ldr.w r12, .L2 */
2366 0xcd04f84d, /* push {r12} */
2367 0xc004f8d9, /* ldr.w r12, [r9, #4] */
2368 0xf000f8d9, /* ldr.w pc, [r9] */
2369 };
2370
2371 #ifdef FOUR_WORD_PLT
2372
2373 /* The first entry in a procedure linkage table looks like
2374 this. It is set up so that any shared library function that is
2375 called before the relocation has been set up calls the dynamic
2376 linker first. */
2377 static const bfd_vma elf32_arm_plt0_entry [] =
2378 {
2379 0xe52de004, /* str lr, [sp, #-4]! */
2380 0xe59fe010, /* ldr lr, [pc, #16] */
2381 0xe08fe00e, /* add lr, pc, lr */
2382 0xe5bef008, /* ldr pc, [lr, #8]! */
2383 };
2384
2385 /* Subsequent entries in a procedure linkage table look like
2386 this. */
2387 static const bfd_vma elf32_arm_plt_entry [] =
2388 {
2389 0xe28fc600, /* add ip, pc, #NN */
2390 0xe28cca00, /* add ip, ip, #NN */
2391 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2392 0x00000000, /* unused */
2393 };
2394
2395 #else /* not FOUR_WORD_PLT */
2396
2397 /* The first entry in a procedure linkage table looks like
2398 this. It is set up so that any shared library function that is
2399 called before the relocation has been set up calls the dynamic
2400 linker first. */
2401 static const bfd_vma elf32_arm_plt0_entry [] =
2402 {
2403 0xe52de004, /* str lr, [sp, #-4]! */
2404 0xe59fe004, /* ldr lr, [pc, #4] */
2405 0xe08fe00e, /* add lr, pc, lr */
2406 0xe5bef008, /* ldr pc, [lr, #8]! */
2407 0x00000000, /* &GOT[0] - . */
2408 };
2409
2410 /* By default subsequent entries in a procedure linkage table look like
2411 this. Offsets that don't fit into 28 bits will cause link error. */
2412 static const bfd_vma elf32_arm_plt_entry_short [] =
2413 {
2414 0xe28fc600, /* add ip, pc, #0xNN00000 */
2415 0xe28cca00, /* add ip, ip, #0xNN000 */
2416 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2417 };
2418
2419 /* When explicitly asked, we'll use this "long" entry format
2420 which can cope with arbitrary displacements. */
2421 static const bfd_vma elf32_arm_plt_entry_long [] =
2422 {
2423 0xe28fc200, /* add ip, pc, #0xN0000000 */
2424 0xe28cc600, /* add ip, ip, #0xNN00000 */
2425 0xe28cca00, /* add ip, ip, #0xNN000 */
2426 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2427 };
2428
2429 static bool elf32_arm_use_long_plt_entry = false;
2430
2431 #endif /* not FOUR_WORD_PLT */
2432
2433 /* The first entry in a procedure linkage table looks like this.
2434 It is set up so that any shared library function that is called before the
2435 relocation has been set up calls the dynamic linker first. */
2436 static const bfd_vma elf32_thumb2_plt0_entry [] =
2437 {
2438 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2439 an instruction maybe encoded to one or two array elements. */
2440 0xf8dfb500, /* push {lr} */
2441 0x44fee008, /* ldr.w lr, [pc, #8] */
2442 /* add lr, pc */
2443 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2444 0x00000000, /* &GOT[0] - . */
2445 };
2446
2447 /* Subsequent entries in a procedure linkage table for thumb only target
2448 look like this. */
2449 static const bfd_vma elf32_thumb2_plt_entry [] =
2450 {
2451 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2452 an instruction maybe encoded to one or two array elements. */
2453 0x0c00f240, /* movw ip, #0xNNNN */
2454 0x0c00f2c0, /* movt ip, #0xNNNN */
2455 0xf8dc44fc, /* add ip, pc */
2456 0xe7fcf000 /* ldr.w pc, [ip] */
2457 /* b .-4 */
2458 };
2459
2460 /* The format of the first entry in the procedure linkage table
2461 for a VxWorks executable. */
2462 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2463 {
2464 0xe52dc008, /* str ip,[sp,#-8]! */
2465 0xe59fc000, /* ldr ip,[pc] */
2466 0xe59cf008, /* ldr pc,[ip,#8] */
2467 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2468 };
2469
2470 /* The format of subsequent entries in a VxWorks executable. */
2471 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2472 {
2473 0xe59fc000, /* ldr ip,[pc] */
2474 0xe59cf000, /* ldr pc,[ip] */
2475 0x00000000, /* .long @got */
2476 0xe59fc000, /* ldr ip,[pc] */
2477 0xea000000, /* b _PLT */
2478 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2479 };
2480
2481 /* The format of entries in a VxWorks shared library. */
2482 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2483 {
2484 0xe59fc000, /* ldr ip,[pc] */
2485 0xe79cf009, /* ldr pc,[ip,r9] */
2486 0x00000000, /* .long @got */
2487 0xe59fc000, /* ldr ip,[pc] */
2488 0xe599f008, /* ldr pc,[r9,#8] */
2489 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2490 };
2491
2492 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2493 #define PLT_THUMB_STUB_SIZE 4
2494 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2495 {
2496 0x4778, /* bx pc */
2497 0xe7fd /* b .-2 */
2498 };
2499
2500 /* The first entry in a procedure linkage table looks like
2501 this. It is set up so that any shared library function that is
2502 called before the relocation has been set up calls the dynamic
2503 linker first. */
2504 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2505 {
2506 /* First bundle: */
2507 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2508 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2509 0xe08cc00f, /* add ip, ip, pc */
2510 0xe52dc008, /* str ip, [sp, #-8]! */
2511 /* Second bundle: */
2512 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2513 0xe59cc000, /* ldr ip, [ip] */
2514 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2515 0xe12fff1c, /* bx ip */
2516 /* Third bundle: */
2517 0xe320f000, /* nop */
2518 0xe320f000, /* nop */
2519 0xe320f000, /* nop */
2520 /* .Lplt_tail: */
2521 0xe50dc004, /* str ip, [sp, #-4] */
2522 /* Fourth bundle: */
2523 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2524 0xe59cc000, /* ldr ip, [ip] */
2525 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2526 0xe12fff1c, /* bx ip */
2527 };
2528 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2529
2530 /* Subsequent entries in a procedure linkage table look like this. */
2531 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2532 {
2533 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2534 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2535 0xe08cc00f, /* add ip, ip, pc */
2536 0xea000000, /* b .Lplt_tail */
2537 };
2538
2539 /* PR 28924:
2540 There was a bug due to too high values of THM_MAX_FWD_BRANCH_OFFSET and
2541 THM2_MAX_FWD_BRANCH_OFFSET. The first macro concerns the case when Thumb-2
2542 is not available, and second macro when Thumb-2 is available. Among other
2543 things, they affect the range of branches represented as BLX instructions
2544 in Encoding T2 defined in Section A8.8.25 of the ARM Architecture
2545 Reference Manual ARMv7-A and ARMv7-R edition issue C.d. Such branches are
2546 specified there to have a maximum forward offset that is a multiple of 4.
2547 Previously, the respective values defined here were multiples of 2 but not
2548 4 and they are included in comments for reference. */
2549 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2550 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2551 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) - 4 + 4)
2552 /* #def THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) - 2 + 4) */
2553 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2554 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 4) + 4)
2555 /* #def THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4) */
2556 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2557 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2558 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2559
2560 enum stub_insn_type
2561 {
2562 THUMB16_TYPE = 1,
2563 THUMB32_TYPE,
2564 ARM_TYPE,
2565 DATA_TYPE
2566 };
2567
2568 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2569 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2570 is inserted in arm_build_one_stub(). */
2571 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2572 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2573 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2574 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2575 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2576 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2577 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2578 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2579
2580 typedef struct
2581 {
2582 bfd_vma data;
2583 enum stub_insn_type type;
2584 unsigned int r_type;
2585 int reloc_addend;
2586 } insn_sequence;
2587
2588 /* See note [Thumb nop sequence] when adding a veneer. */
2589
2590 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2591 to reach the stub if necessary. */
2592 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2593 {
2594 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2595 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2596 };
2597
2598 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2599 available. */
2600 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2601 {
2602 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2603 ARM_INSN (0xe12fff1c), /* bx ip */
2604 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2605 };
2606
2607 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2608 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2609 {
2610 THUMB16_INSN (0xb401), /* push {r0} */
2611 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2612 THUMB16_INSN (0x4684), /* mov ip, r0 */
2613 THUMB16_INSN (0xbc01), /* pop {r0} */
2614 THUMB16_INSN (0x4760), /* bx ip */
2615 THUMB16_INSN (0xbf00), /* nop */
2616 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2617 };
2618
2619 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2620 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2621 {
2622 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2623 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2624 };
2625
2626 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2627 M-profile architectures. */
2628 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2629 {
2630 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2631 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2632 THUMB16_INSN (0x4760), /* bx ip */
2633 };
2634
2635 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2636 allowed. */
2637 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2638 {
2639 THUMB16_INSN (0x4778), /* bx pc */
2640 THUMB16_INSN (0xe7fd), /* b .-2 */
2641 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2642 ARM_INSN (0xe12fff1c), /* bx ip */
2643 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2644 };
2645
2646 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2647 available. */
2648 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2649 {
2650 THUMB16_INSN (0x4778), /* bx pc */
2651 THUMB16_INSN (0xe7fd), /* b .-2 */
2652 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2653 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2654 };
2655
2656 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2657 one, when the destination is close enough. */
2658 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2659 {
2660 THUMB16_INSN (0x4778), /* bx pc */
2661 THUMB16_INSN (0xe7fd), /* b .-2 */
2662 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2663 };
2664
2665 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2666 blx to reach the stub if necessary. */
2667 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2668 {
2669 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2670 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2671 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2672 };
2673
2674 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2675 blx to reach the stub if necessary. We can not add into pc;
2676 it is not guaranteed to mode switch (different in ARMv6 and
2677 ARMv7). */
2678 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2679 {
2680 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2681 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2682 ARM_INSN (0xe12fff1c), /* bx ip */
2683 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2684 };
2685
2686 /* V4T ARM -> ARM long branch stub, PIC. */
2687 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2688 {
2689 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2690 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2691 ARM_INSN (0xe12fff1c), /* bx ip */
2692 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2693 };
2694
2695 /* V4T Thumb -> ARM long branch stub, PIC. */
2696 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2697 {
2698 THUMB16_INSN (0x4778), /* bx pc */
2699 THUMB16_INSN (0xe7fd), /* b .-2 */
2700 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2701 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2702 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2703 };
2704
2705 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2706 architectures. */
2707 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2708 {
2709 THUMB16_INSN (0xb401), /* push {r0} */
2710 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2711 THUMB16_INSN (0x46fc), /* mov ip, pc */
2712 THUMB16_INSN (0x4484), /* add ip, r0 */
2713 THUMB16_INSN (0xbc01), /* pop {r0} */
2714 THUMB16_INSN (0x4760), /* bx ip */
2715 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2716 };
2717
2718 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2719 allowed. */
2720 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2721 {
2722 THUMB16_INSN (0x4778), /* bx pc */
2723 THUMB16_INSN (0xe7fd), /* b .-2 */
2724 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2725 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2726 ARM_INSN (0xe12fff1c), /* bx ip */
2727 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2728 };
2729
2730 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2731 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2732 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2733 {
2734 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2735 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2736 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2737 };
2738
2739 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2740 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2741 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2742 {
2743 THUMB16_INSN (0x4778), /* bx pc */
2744 THUMB16_INSN (0xe7fd), /* b .-2 */
2745 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2746 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2747 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2748 };
2749
2750 /* NaCl ARM -> ARM long branch stub. */
2751 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2752 {
2753 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2754 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2755 ARM_INSN (0xe12fff1c), /* bx ip */
2756 ARM_INSN (0xe320f000), /* nop */
2757 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2758 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2759 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2760 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2761 };
2762
2763 /* NaCl ARM -> ARM long branch stub, PIC. */
2764 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2765 {
2766 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2767 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2768 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2769 ARM_INSN (0xe12fff1c), /* bx ip */
2770 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2771 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2772 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2773 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2774 };
2775
2776 /* Stub used for transition to secure state (aka SG veneer). */
2777 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2778 {
2779 THUMB32_INSN (0xe97fe97f), /* sg. */
2780 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2781 };
2782
2783
2784 /* Cortex-A8 erratum-workaround stubs. */
2785
2786 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2787 can't use a conditional branch to reach this stub). */
2788
2789 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2790 {
2791 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2792 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2793 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2794 };
2795
2796 /* Stub used for b.w and bl.w instructions. */
2797
2798 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2799 {
2800 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2801 };
2802
2803 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2804 {
2805 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2806 };
2807
2808 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2809 instruction (which switches to ARM mode) to point to this stub. Jump to the
2810 real destination using an ARM-mode branch. */
2811
2812 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2813 {
2814 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2815 };
2816
2817 /* For each section group there can be a specially created linker section
2818 to hold the stubs for that group. The name of the stub section is based
2819 upon the name of another section within that group with the suffix below
2820 applied.
2821
2822 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2823 create what appeared to be a linker stub section when it actually
2824 contained user code/data. For example, consider this fragment:
2825
2826 const char * stubborn_problems[] = { "np" };
2827
2828 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2829 section called:
2830
2831 .data.rel.local.stubborn_problems
2832
2833 This then causes problems in arm32_arm_build_stubs() as it triggers:
2834
2835 // Ignore non-stub sections.
2836 if (!strstr (stub_sec->name, STUB_SUFFIX))
2837 continue;
2838
2839 And so the section would be ignored instead of being processed. Hence
2840 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2841 C identifier. */
2842 #define STUB_SUFFIX ".__stub"
2843
2844 /* One entry per long/short branch stub defined above. */
2845 #define DEF_STUBS \
2846 DEF_STUB (long_branch_any_any) \
2847 DEF_STUB (long_branch_v4t_arm_thumb) \
2848 DEF_STUB (long_branch_thumb_only) \
2849 DEF_STUB (long_branch_v4t_thumb_thumb) \
2850 DEF_STUB (long_branch_v4t_thumb_arm) \
2851 DEF_STUB (short_branch_v4t_thumb_arm) \
2852 DEF_STUB (long_branch_any_arm_pic) \
2853 DEF_STUB (long_branch_any_thumb_pic) \
2854 DEF_STUB (long_branch_v4t_thumb_thumb_pic) \
2855 DEF_STUB (long_branch_v4t_arm_thumb_pic) \
2856 DEF_STUB (long_branch_v4t_thumb_arm_pic) \
2857 DEF_STUB (long_branch_thumb_only_pic) \
2858 DEF_STUB (long_branch_any_tls_pic) \
2859 DEF_STUB (long_branch_v4t_thumb_tls_pic) \
2860 DEF_STUB (long_branch_arm_nacl) \
2861 DEF_STUB (long_branch_arm_nacl_pic) \
2862 DEF_STUB (cmse_branch_thumb_only) \
2863 DEF_STUB (a8_veneer_b_cond) \
2864 DEF_STUB (a8_veneer_b) \
2865 DEF_STUB (a8_veneer_bl) \
2866 DEF_STUB (a8_veneer_blx) \
2867 DEF_STUB (long_branch_thumb2_only) \
2868 DEF_STUB (long_branch_thumb2_only_pure)
2869
2870 #define DEF_STUB(x) arm_stub_##x,
2871 enum elf32_arm_stub_type
2872 {
2873 arm_stub_none,
2874 DEF_STUBS
2875 max_stub_type
2876 };
2877 #undef DEF_STUB
2878
2879 /* Note the first a8_veneer type. */
2880 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2881
2882 typedef struct
2883 {
2884 const insn_sequence* template_sequence;
2885 int template_size;
2886 } stub_def;
2887
2888 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2889 static const stub_def stub_definitions[] =
2890 {
2891 {NULL, 0},
2892 DEF_STUBS
2893 };
2894
2895 struct elf32_arm_stub_hash_entry
2896 {
2897 /* Base hash table entry structure. */
2898 struct bfd_hash_entry root;
2899
2900 /* The stub section. */
2901 asection *stub_sec;
2902
2903 /* Offset within stub_sec of the beginning of this stub. */
2904 bfd_vma stub_offset;
2905
2906 /* Given the symbol's value and its section we can determine its final
2907 value when building the stubs (so the stub knows where to jump). */
2908 bfd_vma target_value;
2909 asection *target_section;
2910
2911 /* Same as above but for the source of the branch to the stub. Used for
2912 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2913 such, source section does not need to be recorded since Cortex-A8 erratum
2914 workaround stubs are only generated when both source and target are in the
2915 same section. */
2916 bfd_vma source_value;
2917
2918 /* The instruction which caused this stub to be generated (only valid for
2919 Cortex-A8 erratum workaround stubs at present). */
2920 unsigned long orig_insn;
2921
2922 /* The stub type. */
2923 enum elf32_arm_stub_type stub_type;
2924 /* Its encoding size in bytes. */
2925 int stub_size;
2926 /* Its template. */
2927 const insn_sequence *stub_template;
2928 /* The size of the template (number of entries). */
2929 int stub_template_size;
2930
2931 /* The symbol table entry, if any, that this was derived from. */
2932 struct elf32_arm_link_hash_entry *h;
2933
2934 /* Type of branch. */
2935 enum arm_st_branch_type branch_type;
2936
2937 /* Where this stub is being called from, or, in the case of combined
2938 stub sections, the first input section in the group. */
2939 asection *id_sec;
2940
2941 /* The name for the local symbol at the start of this stub. The
2942 stub name in the hash table has to be unique; this does not, so
2943 it can be friendlier. */
2944 char *output_name;
2945 };
2946
2947 /* Used to build a map of a section. This is required for mixed-endian
2948 code/data. */
2949
2950 typedef struct elf32_elf_section_map
2951 {
2952 bfd_vma vma;
2953 char type;
2954 }
2955 elf32_arm_section_map;
2956
2957 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2958
2959 typedef enum
2960 {
2961 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2962 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2963 VFP11_ERRATUM_ARM_VENEER,
2964 VFP11_ERRATUM_THUMB_VENEER
2965 }
2966 elf32_vfp11_erratum_type;
2967
2968 typedef struct elf32_vfp11_erratum_list
2969 {
2970 struct elf32_vfp11_erratum_list *next;
2971 bfd_vma vma;
2972 union
2973 {
2974 struct
2975 {
2976 struct elf32_vfp11_erratum_list *veneer;
2977 unsigned int vfp_insn;
2978 } b;
2979 struct
2980 {
2981 struct elf32_vfp11_erratum_list *branch;
2982 unsigned int id;
2983 } v;
2984 } u;
2985 elf32_vfp11_erratum_type type;
2986 }
2987 elf32_vfp11_erratum_list;
2988
2989 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2990 veneer. */
2991 typedef enum
2992 {
2993 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2994 STM32L4XX_ERRATUM_VENEER
2995 }
2996 elf32_stm32l4xx_erratum_type;
2997
2998 typedef struct elf32_stm32l4xx_erratum_list
2999 {
3000 struct elf32_stm32l4xx_erratum_list *next;
3001 bfd_vma vma;
3002 union
3003 {
3004 struct
3005 {
3006 struct elf32_stm32l4xx_erratum_list *veneer;
3007 unsigned int insn;
3008 } b;
3009 struct
3010 {
3011 struct elf32_stm32l4xx_erratum_list *branch;
3012 unsigned int id;
3013 } v;
3014 } u;
3015 elf32_stm32l4xx_erratum_type type;
3016 }
3017 elf32_stm32l4xx_erratum_list;
3018
3019 typedef enum
3020 {
3021 DELETE_EXIDX_ENTRY,
3022 INSERT_EXIDX_CANTUNWIND_AT_END
3023 }
3024 arm_unwind_edit_type;
3025
3026 /* A (sorted) list of edits to apply to an unwind table. */
3027 typedef struct arm_unwind_table_edit
3028 {
3029 arm_unwind_edit_type type;
3030 /* Note: we sometimes want to insert an unwind entry corresponding to a
3031 section different from the one we're currently writing out, so record the
3032 (text) section this edit relates to here. */
3033 asection *linked_section;
3034 unsigned int index;
3035 struct arm_unwind_table_edit *next;
3036 }
3037 arm_unwind_table_edit;
3038
3039 typedef struct _arm_elf_section_data
3040 {
3041 /* Information about mapping symbols. */
3042 struct bfd_elf_section_data elf;
3043 unsigned int mapcount;
3044 unsigned int mapsize;
3045 elf32_arm_section_map *map;
3046 /* Information about CPU errata. */
3047 unsigned int erratumcount;
3048 elf32_vfp11_erratum_list *erratumlist;
3049 unsigned int stm32l4xx_erratumcount;
3050 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
3051 unsigned int additional_reloc_count;
3052 /* Information about unwind tables. */
3053 union
3054 {
3055 /* Unwind info attached to a text section. */
3056 struct
3057 {
3058 asection *arm_exidx_sec;
3059 } text;
3060
3061 /* Unwind info attached to an .ARM.exidx section. */
3062 struct
3063 {
3064 arm_unwind_table_edit *unwind_edit_list;
3065 arm_unwind_table_edit *unwind_edit_tail;
3066 } exidx;
3067 } u;
3068 }
3069 _arm_elf_section_data;
3070
3071 #define elf32_arm_section_data(sec) \
3072 ((_arm_elf_section_data *) elf_section_data (sec))
3073
3074 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
3075 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
3076 so may be created multiple times: we use an array of these entries whilst
3077 relaxing which we can refresh easily, then create stubs for each potentially
3078 erratum-triggering instruction once we've settled on a solution. */
3079
3080 struct a8_erratum_fix
3081 {
3082 bfd *input_bfd;
3083 asection *section;
3084 bfd_vma offset;
3085 bfd_vma target_offset;
3086 unsigned long orig_insn;
3087 char *stub_name;
3088 enum elf32_arm_stub_type stub_type;
3089 enum arm_st_branch_type branch_type;
3090 };
3091
3092 /* A table of relocs applied to branches which might trigger Cortex-A8
3093 erratum. */
3094
3095 struct a8_erratum_reloc
3096 {
3097 bfd_vma from;
3098 bfd_vma destination;
3099 struct elf32_arm_link_hash_entry *hash;
3100 const char *sym_name;
3101 unsigned int r_type;
3102 enum arm_st_branch_type branch_type;
3103 bool non_a8_stub;
3104 };
3105
3106 /* The size of the thread control block. */
3107 #define TCB_SIZE 8
3108
3109 /* ARM-specific information about a PLT entry, over and above the usual
3110 gotplt_union. */
3111 struct arm_plt_info
3112 {
3113 /* We reference count Thumb references to a PLT entry separately,
3114 so that we can emit the Thumb trampoline only if needed. */
3115 bfd_signed_vma thumb_refcount;
3116
3117 /* Some references from Thumb code may be eliminated by BL->BLX
3118 conversion, so record them separately. */
3119 bfd_signed_vma maybe_thumb_refcount;
3120
3121 /* How many of the recorded PLT accesses were from non-call relocations.
3122 This information is useful when deciding whether anything takes the
3123 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
3124 non-call references to the function should resolve directly to the
3125 real runtime target. */
3126 unsigned int noncall_refcount;
3127
3128 /* Since PLT entries have variable size if the Thumb prologue is
3129 used, we need to record the index into .got.plt instead of
3130 recomputing it from the PLT offset. */
3131 bfd_signed_vma got_offset;
3132 };
3133
3134 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
3135 struct arm_local_iplt_info
3136 {
3137 /* The information that is usually found in the generic ELF part of
3138 the hash table entry. */
3139 union gotplt_union root;
3140
3141 /* The information that is usually found in the ARM-specific part of
3142 the hash table entry. */
3143 struct arm_plt_info arm;
3144
3145 /* A list of all potential dynamic relocations against this symbol. */
3146 struct elf_dyn_relocs *dyn_relocs;
3147 };
3148
3149 /* Structure to handle FDPIC support for local functions. */
3150 struct fdpic_local
3151 {
3152 unsigned int funcdesc_cnt;
3153 unsigned int gotofffuncdesc_cnt;
3154 int funcdesc_offset;
3155 };
3156
3157 struct elf_arm_obj_tdata
3158 {
3159 struct elf_obj_tdata root;
3160
3161 /* Zero to warn when linking objects with incompatible enum sizes. */
3162 int no_enum_size_warning;
3163
3164 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3165 int no_wchar_size_warning;
3166
3167 /* The number of entries in each of the arrays in this strcuture.
3168 Used to avoid buffer overruns. */
3169 bfd_size_type num_entries;
3170
3171 /* tls_type for each local got entry. */
3172 char *local_got_tls_type;
3173
3174 /* GOTPLT entries for TLS descriptors. */
3175 bfd_vma *local_tlsdesc_gotent;
3176
3177 /* Information for local symbols that need entries in .iplt. */
3178 struct arm_local_iplt_info **local_iplt;
3179
3180 /* Maintains FDPIC counters and funcdesc info. */
3181 struct fdpic_local *local_fdpic_cnts;
3182 };
3183
3184 #define elf_arm_tdata(bfd) \
3185 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3186
3187 #define elf32_arm_num_entries(bfd) \
3188 (elf_arm_tdata (bfd)->num_entries)
3189
3190 #define elf32_arm_local_got_tls_type(bfd) \
3191 (elf_arm_tdata (bfd)->local_got_tls_type)
3192
3193 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3194 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3195
3196 #define elf32_arm_local_iplt(bfd) \
3197 (elf_arm_tdata (bfd)->local_iplt)
3198
3199 #define elf32_arm_local_fdpic_cnts(bfd) \
3200 (elf_arm_tdata (bfd)->local_fdpic_cnts)
3201
3202 #define is_arm_elf(bfd) \
3203 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3204 && elf_tdata (bfd) != NULL \
3205 && elf_object_id (bfd) == ARM_ELF_DATA)
3206
3207 static bool
3208 elf32_arm_mkobject (bfd *abfd)
3209 {
3210 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
3211 ARM_ELF_DATA);
3212 }
3213
3214 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3215
3216 /* Structure to handle FDPIC support for extern functions. */
3217 struct fdpic_global {
3218 unsigned int gotofffuncdesc_cnt;
3219 unsigned int gotfuncdesc_cnt;
3220 unsigned int funcdesc_cnt;
3221 int funcdesc_offset;
3222 int gotfuncdesc_offset;
3223 };
3224
3225 /* Arm ELF linker hash entry. */
3226 struct elf32_arm_link_hash_entry
3227 {
3228 struct elf_link_hash_entry root;
3229
3230 /* ARM-specific PLT information. */
3231 struct arm_plt_info plt;
3232
3233 #define GOT_UNKNOWN 0
3234 #define GOT_NORMAL 1
3235 #define GOT_TLS_GD 2
3236 #define GOT_TLS_IE 4
3237 #define GOT_TLS_GDESC 8
3238 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3239 unsigned int tls_type : 8;
3240
3241 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3242 unsigned int is_iplt : 1;
3243
3244 unsigned int unused : 23;
3245
3246 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3247 starting at the end of the jump table. */
3248 bfd_vma tlsdesc_got;
3249
3250 /* The symbol marking the real symbol location for exported thumb
3251 symbols with Arm stubs. */
3252 struct elf_link_hash_entry *export_glue;
3253
3254 /* A pointer to the most recently used stub hash entry against this
3255 symbol. */
3256 struct elf32_arm_stub_hash_entry *stub_cache;
3257
3258 /* Counter for FDPIC relocations against this symbol. */
3259 struct fdpic_global fdpic_cnts;
3260 };
3261
3262 /* Traverse an arm ELF linker hash table. */
3263 #define elf32_arm_link_hash_traverse(table, func, info) \
3264 (elf_link_hash_traverse \
3265 (&(table)->root, \
3266 (bool (*) (struct elf_link_hash_entry *, void *)) (func), \
3267 (info)))
3268
3269 /* Get the ARM elf linker hash table from a link_info structure. */
3270 #define elf32_arm_hash_table(p) \
3271 ((is_elf_hash_table ((p)->hash) \
3272 && elf_hash_table_id (elf_hash_table (p)) == ARM_ELF_DATA) \
3273 ? (struct elf32_arm_link_hash_table *) (p)->hash : NULL)
3274
3275 #define arm_stub_hash_lookup(table, string, create, copy) \
3276 ((struct elf32_arm_stub_hash_entry *) \
3277 bfd_hash_lookup ((table), (string), (create), (copy)))
3278
3279 /* Array to keep track of which stub sections have been created, and
3280 information on stub grouping. */
3281 struct map_stub
3282 {
3283 /* This is the section to which stubs in the group will be
3284 attached. */
3285 asection *link_sec;
3286 /* The stub section. */
3287 asection *stub_sec;
3288 };
3289
3290 #define elf32_arm_compute_jump_table_size(htab) \
3291 ((htab)->next_tls_desc_index * 4)
3292
3293 /* ARM ELF linker hash table. */
3294 struct elf32_arm_link_hash_table
3295 {
3296 /* The main hash table. */
3297 struct elf_link_hash_table root;
3298
3299 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3300 bfd_size_type thumb_glue_size;
3301
3302 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3303 bfd_size_type arm_glue_size;
3304
3305 /* The size in bytes of section containing the ARMv4 BX veneers. */
3306 bfd_size_type bx_glue_size;
3307
3308 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3309 veneer has been populated. */
3310 bfd_vma bx_glue_offset[15];
3311
3312 /* The size in bytes of the section containing glue for VFP11 erratum
3313 veneers. */
3314 bfd_size_type vfp11_erratum_glue_size;
3315
3316 /* The size in bytes of the section containing glue for STM32L4XX erratum
3317 veneers. */
3318 bfd_size_type stm32l4xx_erratum_glue_size;
3319
3320 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3321 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3322 elf32_arm_write_section(). */
3323 struct a8_erratum_fix *a8_erratum_fixes;
3324 unsigned int num_a8_erratum_fixes;
3325
3326 /* An arbitrary input BFD chosen to hold the glue sections. */
3327 bfd * bfd_of_glue_owner;
3328
3329 /* Nonzero to output a BE8 image. */
3330 int byteswap_code;
3331
3332 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3333 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3334 int target1_is_rel;
3335
3336 /* The relocation to use for R_ARM_TARGET2 relocations. */
3337 int target2_reloc;
3338
3339 /* 0 = Ignore R_ARM_V4BX.
3340 1 = Convert BX to MOV PC.
3341 2 = Generate v4 interworing stubs. */
3342 int fix_v4bx;
3343
3344 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3345 int fix_cortex_a8;
3346
3347 /* Whether we should fix the ARM1176 BLX immediate issue. */
3348 int fix_arm1176;
3349
3350 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3351 int use_blx;
3352
3353 /* What sort of code sequences we should look for which may trigger the
3354 VFP11 denorm erratum. */
3355 bfd_arm_vfp11_fix vfp11_fix;
3356
3357 /* Global counter for the number of fixes we have emitted. */
3358 int num_vfp11_fixes;
3359
3360 /* What sort of code sequences we should look for which may trigger the
3361 STM32L4XX erratum. */
3362 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3363
3364 /* Global counter for the number of fixes we have emitted. */
3365 int num_stm32l4xx_fixes;
3366
3367 /* Nonzero to force PIC branch veneers. */
3368 int pic_veneer;
3369
3370 /* The number of bytes in the initial entry in the PLT. */
3371 bfd_size_type plt_header_size;
3372
3373 /* The number of bytes in the subsequent PLT etries. */
3374 bfd_size_type plt_entry_size;
3375
3376 /* True if the target uses REL relocations. */
3377 bool use_rel;
3378
3379 /* Nonzero if import library must be a secure gateway import library
3380 as per ARMv8-M Security Extensions. */
3381 int cmse_implib;
3382
3383 /* The import library whose symbols' address must remain stable in
3384 the import library generated. */
3385 bfd *in_implib_bfd;
3386
3387 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3388 bfd_vma next_tls_desc_index;
3389
3390 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3391 bfd_vma num_tls_desc;
3392
3393 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3394 asection *srelplt2;
3395
3396 /* Offset in .plt section of tls_arm_trampoline. */
3397 bfd_vma tls_trampoline;
3398
3399 /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
3400 union
3401 {
3402 bfd_signed_vma refcount;
3403 bfd_vma offset;
3404 } tls_ldm_got;
3405
3406 /* For convenience in allocate_dynrelocs. */
3407 bfd * obfd;
3408
3409 /* The amount of space used by the reserved portion of the sgotplt
3410 section, plus whatever space is used by the jump slots. */
3411 bfd_vma sgotplt_jump_table_size;
3412
3413 /* The stub hash table. */
3414 struct bfd_hash_table stub_hash_table;
3415
3416 /* Linker stub bfd. */
3417 bfd *stub_bfd;
3418
3419 /* Linker call-backs. */
3420 asection * (*add_stub_section) (const char *, asection *, asection *,
3421 unsigned int);
3422 void (*layout_sections_again) (void);
3423
3424 /* Array to keep track of which stub sections have been created, and
3425 information on stub grouping. */
3426 struct map_stub *stub_group;
3427
3428 /* Input stub section holding secure gateway veneers. */
3429 asection *cmse_stub_sec;
3430
3431 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3432 start to be allocated. */
3433 bfd_vma new_cmse_stub_offset;
3434
3435 /* Number of elements in stub_group. */
3436 unsigned int top_id;
3437
3438 /* Assorted information used by elf32_arm_size_stubs. */
3439 unsigned int bfd_count;
3440 unsigned int top_index;
3441 asection **input_list;
3442
3443 /* True if the target system uses FDPIC. */
3444 int fdpic_p;
3445
3446 /* Fixup section. Used for FDPIC. */
3447 asection *srofixup;
3448 };
3449
3450 /* Add an FDPIC read-only fixup. */
3451 static void
3452 arm_elf_add_rofixup (bfd *output_bfd, asection *srofixup, bfd_vma offset)
3453 {
3454 bfd_vma fixup_offset;
3455
3456 fixup_offset = srofixup->reloc_count++ * 4;
3457 BFD_ASSERT (fixup_offset < srofixup->size);
3458 bfd_put_32 (output_bfd, offset, srofixup->contents + fixup_offset);
3459 }
3460
3461 static inline int
3462 ctz (unsigned int mask)
3463 {
3464 #if GCC_VERSION >= 3004
3465 return __builtin_ctz (mask);
3466 #else
3467 unsigned int i;
3468
3469 for (i = 0; i < 8 * sizeof (mask); i++)
3470 {
3471 if (mask & 0x1)
3472 break;
3473 mask = (mask >> 1);
3474 }
3475 return i;
3476 #endif
3477 }
3478
3479 static inline int
3480 elf32_arm_popcount (unsigned int mask)
3481 {
3482 #if GCC_VERSION >= 3004
3483 return __builtin_popcount (mask);
3484 #else
3485 unsigned int i;
3486 int sum = 0;
3487
3488 for (i = 0; i < 8 * sizeof (mask); i++)
3489 {
3490 if (mask & 0x1)
3491 sum++;
3492 mask = (mask >> 1);
3493 }
3494 return sum;
3495 #endif
3496 }
3497
3498 static void elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
3499 asection *sreloc, Elf_Internal_Rela *rel);
3500
3501 static void
3502 arm_elf_fill_funcdesc (bfd *output_bfd,
3503 struct bfd_link_info *info,
3504 int *funcdesc_offset,
3505 int dynindx,
3506 int offset,
3507 bfd_vma addr,
3508 bfd_vma dynreloc_value,
3509 bfd_vma seg)
3510 {
3511 if ((*funcdesc_offset & 1) == 0)
3512 {
3513 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
3514 asection *sgot = globals->root.sgot;
3515
3516 if (bfd_link_pic (info))
3517 {
3518 asection *srelgot = globals->root.srelgot;
3519 Elf_Internal_Rela outrel;
3520
3521 outrel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
3522 outrel.r_offset = sgot->output_section->vma + sgot->output_offset + offset;
3523 outrel.r_addend = 0;
3524
3525 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
3526 bfd_put_32 (output_bfd, addr, sgot->contents + offset);
3527 bfd_put_32 (output_bfd, seg, sgot->contents + offset + 4);
3528 }
3529 else
3530 {
3531 struct elf_link_hash_entry *hgot = globals->root.hgot;
3532 bfd_vma got_value = hgot->root.u.def.value
3533 + hgot->root.u.def.section->output_section->vma
3534 + hgot->root.u.def.section->output_offset;
3535
3536 arm_elf_add_rofixup (output_bfd, globals->srofixup,
3537 sgot->output_section->vma + sgot->output_offset
3538 + offset);
3539 arm_elf_add_rofixup (output_bfd, globals->srofixup,
3540 sgot->output_section->vma + sgot->output_offset
3541 + offset + 4);
3542 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + offset);
3543 bfd_put_32 (output_bfd, got_value, sgot->contents + offset + 4);
3544 }
3545 *funcdesc_offset |= 1;
3546 }
3547 }
3548
3549 /* Create an entry in an ARM ELF linker hash table. */
3550
3551 static struct bfd_hash_entry *
3552 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3553 struct bfd_hash_table * table,
3554 const char * string)
3555 {
3556 struct elf32_arm_link_hash_entry * ret =
3557 (struct elf32_arm_link_hash_entry *) entry;
3558
3559 /* Allocate the structure if it has not already been allocated by a
3560 subclass. */
3561 if (ret == NULL)
3562 ret = (struct elf32_arm_link_hash_entry *)
3563 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3564 if (ret == NULL)
3565 return (struct bfd_hash_entry *) ret;
3566
3567 /* Call the allocation method of the superclass. */
3568 ret = ((struct elf32_arm_link_hash_entry *)
3569 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3570 table, string));
3571 if (ret != NULL)
3572 {
3573 ret->tls_type = GOT_UNKNOWN;
3574 ret->tlsdesc_got = (bfd_vma) -1;
3575 ret->plt.thumb_refcount = 0;
3576 ret->plt.maybe_thumb_refcount = 0;
3577 ret->plt.noncall_refcount = 0;
3578 ret->plt.got_offset = -1;
3579 ret->is_iplt = false;
3580 ret->export_glue = NULL;
3581
3582 ret->stub_cache = NULL;
3583
3584 ret->fdpic_cnts.gotofffuncdesc_cnt = 0;
3585 ret->fdpic_cnts.gotfuncdesc_cnt = 0;
3586 ret->fdpic_cnts.funcdesc_cnt = 0;
3587 ret->fdpic_cnts.funcdesc_offset = -1;
3588 ret->fdpic_cnts.gotfuncdesc_offset = -1;
3589 }
3590
3591 return (struct bfd_hash_entry *) ret;
3592 }
3593
3594 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3595 symbols. */
3596
3597 static bool
3598 elf32_arm_allocate_local_sym_info (bfd *abfd)
3599 {
3600 if (elf_local_got_refcounts (abfd) == NULL)
3601 {
3602 bfd_size_type num_syms;
3603
3604 elf32_arm_num_entries (abfd) = 0;
3605
3606 /* Whilst it might be tempting to allocate a single block of memory and
3607 then divide it up amoungst the arrays in the elf_arm_obj_tdata
3608 structure, this interferes with the work of memory checkers looking
3609 for buffer overruns. So allocate each array individually. */
3610
3611 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3612
3613 elf_local_got_refcounts (abfd) = bfd_zalloc
3614 (abfd, num_syms * sizeof (* elf_local_got_refcounts (abfd)));
3615
3616 if (elf_local_got_refcounts (abfd) == NULL)
3617 return false;
3618
3619 elf32_arm_local_tlsdesc_gotent (abfd) = bfd_zalloc
3620 (abfd, num_syms * sizeof (* elf32_arm_local_tlsdesc_gotent (abfd)));
3621
3622 if (elf32_arm_local_tlsdesc_gotent (abfd) == NULL)
3623 return false;
3624
3625 elf32_arm_local_iplt (abfd) = bfd_zalloc
3626 (abfd, num_syms * sizeof (* elf32_arm_local_iplt (abfd)));
3627
3628 if (elf32_arm_local_iplt (abfd) == NULL)
3629 return false;
3630
3631 elf32_arm_local_fdpic_cnts (abfd) = bfd_zalloc
3632 (abfd, num_syms * sizeof (* elf32_arm_local_fdpic_cnts (abfd)));
3633
3634 if (elf32_arm_local_fdpic_cnts (abfd) == NULL)
3635 return false;
3636
3637 elf32_arm_local_got_tls_type (abfd) = bfd_zalloc
3638 (abfd, num_syms * sizeof (* elf32_arm_local_got_tls_type (abfd)));
3639
3640 if (elf32_arm_local_got_tls_type (abfd) == NULL)
3641 return false;
3642
3643 elf32_arm_num_entries (abfd) = num_syms;
3644
3645 #if GCC_VERSION >= 3000
3646 BFD_ASSERT (__alignof__ (*elf32_arm_local_tlsdesc_gotent (abfd))
3647 <= __alignof__ (*elf_local_got_refcounts (abfd)));
3648 BFD_ASSERT (__alignof__ (*elf32_arm_local_iplt (abfd))
3649 <= __alignof__ (*elf32_arm_local_tlsdesc_gotent (abfd)));
3650 BFD_ASSERT (__alignof__ (*elf32_arm_local_fdpic_cnts (abfd))
3651 <= __alignof__ (*elf32_arm_local_iplt (abfd)));
3652 BFD_ASSERT (__alignof__ (*elf32_arm_local_got_tls_type (abfd))
3653 <= __alignof__ (*elf32_arm_local_fdpic_cnts (abfd)));
3654 #endif
3655 }
3656 return true;
3657 }
3658
3659 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3660 to input bfd ABFD. Create the information if it doesn't already exist.
3661 Return null if an allocation fails. */
3662
3663 static struct arm_local_iplt_info *
3664 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3665 {
3666 struct arm_local_iplt_info **ptr;
3667
3668 if (!elf32_arm_allocate_local_sym_info (abfd))
3669 return NULL;
3670
3671 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3672 BFD_ASSERT (r_symndx < elf32_arm_num_entries (abfd));
3673 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3674 if (*ptr == NULL)
3675 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3676 return *ptr;
3677 }
3678
3679 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3680 in ABFD's symbol table. If the symbol is global, H points to its
3681 hash table entry, otherwise H is null.
3682
3683 Return true if the symbol does have PLT information. When returning
3684 true, point *ROOT_PLT at the target-independent reference count/offset
3685 union and *ARM_PLT at the ARM-specific information. */
3686
3687 static bool
3688 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3689 struct elf32_arm_link_hash_entry *h,
3690 unsigned long r_symndx, union gotplt_union **root_plt,
3691 struct arm_plt_info **arm_plt)
3692 {
3693 struct arm_local_iplt_info *local_iplt;
3694
3695 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3696 return false;
3697
3698 if (h != NULL)
3699 {
3700 *root_plt = &h->root.plt;
3701 *arm_plt = &h->plt;
3702 return true;
3703 }
3704
3705 if (elf32_arm_local_iplt (abfd) == NULL)
3706 return false;
3707
3708 if (r_symndx >= elf32_arm_num_entries (abfd))
3709 return false;
3710
3711 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3712 if (local_iplt == NULL)
3713 return false;
3714
3715 *root_plt = &local_iplt->root;
3716 *arm_plt = &local_iplt->arm;
3717 return true;
3718 }
3719
3720 static bool using_thumb_only (struct elf32_arm_link_hash_table *globals);
3721
3722 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3723 before it. */
3724
3725 static bool
3726 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3727 struct arm_plt_info *arm_plt)
3728 {
3729 struct elf32_arm_link_hash_table *htab;
3730
3731 htab = elf32_arm_hash_table (info);
3732
3733 return (!using_thumb_only (htab) && (arm_plt->thumb_refcount != 0
3734 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0)));
3735 }
3736
3737 /* Return a pointer to the head of the dynamic reloc list that should
3738 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3739 ABFD's symbol table. Return null if an error occurs. */
3740
3741 static struct elf_dyn_relocs **
3742 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3743 Elf_Internal_Sym *isym)
3744 {
3745 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3746 {
3747 struct arm_local_iplt_info *local_iplt;
3748
3749 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3750 if (local_iplt == NULL)
3751 return NULL;
3752 return &local_iplt->dyn_relocs;
3753 }
3754 else
3755 {
3756 /* Track dynamic relocs needed for local syms too.
3757 We really need local syms available to do this
3758 easily. Oh well. */
3759 asection *s;
3760 void *vpp;
3761
3762 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3763 if (s == NULL)
3764 return NULL;
3765
3766 vpp = &elf_section_data (s)->local_dynrel;
3767 return (struct elf_dyn_relocs **) vpp;
3768 }
3769 }
3770
3771 /* Initialize an entry in the stub hash table. */
3772
3773 static struct bfd_hash_entry *
3774 stub_hash_newfunc (struct bfd_hash_entry *entry,
3775 struct bfd_hash_table *table,
3776 const char *string)
3777 {
3778 /* Allocate the structure if it has not already been allocated by a
3779 subclass. */
3780 if (entry == NULL)
3781 {
3782 entry = (struct bfd_hash_entry *)
3783 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3784 if (entry == NULL)
3785 return entry;
3786 }
3787
3788 /* Call the allocation method of the superclass. */
3789 entry = bfd_hash_newfunc (entry, table, string);
3790 if (entry != NULL)
3791 {
3792 struct elf32_arm_stub_hash_entry *eh;
3793
3794 /* Initialize the local fields. */
3795 eh = (struct elf32_arm_stub_hash_entry *) entry;
3796 eh->stub_sec = NULL;
3797 eh->stub_offset = (bfd_vma) -1;
3798 eh->source_value = 0;
3799 eh->target_value = 0;
3800 eh->target_section = NULL;
3801 eh->orig_insn = 0;
3802 eh->stub_type = arm_stub_none;
3803 eh->stub_size = 0;
3804 eh->stub_template = NULL;
3805 eh->stub_template_size = -1;
3806 eh->h = NULL;
3807 eh->id_sec = NULL;
3808 eh->output_name = NULL;
3809 }
3810
3811 return entry;
3812 }
3813
3814 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3815 shortcuts to them in our hash table. */
3816
3817 static bool
3818 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3819 {
3820 struct elf32_arm_link_hash_table *htab;
3821
3822 htab = elf32_arm_hash_table (info);
3823 if (htab == NULL)
3824 return false;
3825
3826 if (! _bfd_elf_create_got_section (dynobj, info))
3827 return false;
3828
3829 /* Also create .rofixup. */
3830 if (htab->fdpic_p)
3831 {
3832 htab->srofixup = bfd_make_section_with_flags (dynobj, ".rofixup",
3833 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3834 | SEC_IN_MEMORY | SEC_LINKER_CREATED | SEC_READONLY));
3835 if (htab->srofixup == NULL
3836 || !bfd_set_section_alignment (htab->srofixup, 2))
3837 return false;
3838 }
3839
3840 return true;
3841 }
3842
3843 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3844
3845 static bool
3846 create_ifunc_sections (struct bfd_link_info *info)
3847 {
3848 struct elf32_arm_link_hash_table *htab;
3849 const struct elf_backend_data *bed;
3850 bfd *dynobj;
3851 asection *s;
3852 flagword flags;
3853
3854 htab = elf32_arm_hash_table (info);
3855 dynobj = htab->root.dynobj;
3856 bed = get_elf_backend_data (dynobj);
3857 flags = bed->dynamic_sec_flags;
3858
3859 if (htab->root.iplt == NULL)
3860 {
3861 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3862 flags | SEC_READONLY | SEC_CODE);
3863 if (s == NULL
3864 || !bfd_set_section_alignment (s, bed->plt_alignment))
3865 return false;
3866 htab->root.iplt = s;
3867 }
3868
3869 if (htab->root.irelplt == NULL)
3870 {
3871 s = bfd_make_section_anyway_with_flags (dynobj,
3872 RELOC_SECTION (htab, ".iplt"),
3873 flags | SEC_READONLY);
3874 if (s == NULL
3875 || !bfd_set_section_alignment (s, bed->s->log_file_align))
3876 return false;
3877 htab->root.irelplt = s;
3878 }
3879
3880 if (htab->root.igotplt == NULL)
3881 {
3882 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3883 if (s == NULL
3884 || !bfd_set_section_alignment (s, bed->s->log_file_align))
3885 return false;
3886 htab->root.igotplt = s;
3887 }
3888 return true;
3889 }
3890
3891 /* Determine if we're dealing with a Thumb only architecture. */
3892
3893 static bool
3894 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3895 {
3896 int arch;
3897 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3898 Tag_CPU_arch_profile);
3899
3900 if (profile)
3901 return profile == 'M';
3902
3903 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3904
3905 /* Force return logic to be reviewed for each new architecture. */
3906 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3907
3908 if (arch == TAG_CPU_ARCH_V6_M
3909 || arch == TAG_CPU_ARCH_V6S_M
3910 || arch == TAG_CPU_ARCH_V7E_M
3911 || arch == TAG_CPU_ARCH_V8M_BASE
3912 || arch == TAG_CPU_ARCH_V8M_MAIN
3913 || arch == TAG_CPU_ARCH_V8_1M_MAIN)
3914 return true;
3915
3916 return false;
3917 }
3918
3919 /* Determine if we're dealing with a Thumb-2 object. */
3920
3921 static bool
3922 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3923 {
3924 int arch;
3925 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3926 Tag_THUMB_ISA_use);
3927
3928 /* No use of thumb permitted, or a legacy thumb-1/2 definition. */
3929 if (thumb_isa < 3)
3930 return thumb_isa == 2;
3931
3932 /* Variant of thumb is described by the architecture tag. */
3933 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3934
3935 /* Force return logic to be reviewed for each new architecture. */
3936 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3937
3938 return (arch == TAG_CPU_ARCH_V6T2
3939 || arch == TAG_CPU_ARCH_V7
3940 || arch == TAG_CPU_ARCH_V7E_M
3941 || arch == TAG_CPU_ARCH_V8
3942 || arch == TAG_CPU_ARCH_V8R
3943 || arch == TAG_CPU_ARCH_V8M_MAIN
3944 || arch == TAG_CPU_ARCH_V8_1M_MAIN);
3945 }
3946
3947 /* Determine whether Thumb-2 BL instruction is available. */
3948
3949 static bool
3950 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3951 {
3952 int arch =
3953 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3954
3955 /* Force return logic to be reviewed for each new architecture. */
3956 BFD_ASSERT (arch <= TAG_CPU_ARCH_V9);
3957
3958 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3959 return (arch == TAG_CPU_ARCH_V6T2
3960 || arch >= TAG_CPU_ARCH_V7);
3961 }
3962
3963 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3964 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3965 hash table. */
3966
3967 static bool
3968 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3969 {
3970 struct elf32_arm_link_hash_table *htab;
3971
3972 htab = elf32_arm_hash_table (info);
3973 if (htab == NULL)
3974 return false;
3975
3976 if (!htab->root.sgot && !create_got_section (dynobj, info))
3977 return false;
3978
3979 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3980 return false;
3981
3982 if (htab->root.target_os == is_vxworks)
3983 {
3984 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3985 return false;
3986
3987 if (bfd_link_pic (info))
3988 {
3989 htab->plt_header_size = 0;
3990 htab->plt_entry_size
3991 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3992 }
3993 else
3994 {
3995 htab->plt_header_size
3996 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3997 htab->plt_entry_size
3998 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3999 }
4000
4001 if (elf_elfheader (dynobj))
4002 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
4003 }
4004 else
4005 {
4006 /* PR ld/16017
4007 Test for thumb only architectures. Note - we cannot just call
4008 using_thumb_only() as the attributes in the output bfd have not been
4009 initialised at this point, so instead we use the input bfd. */
4010 bfd * saved_obfd = htab->obfd;
4011
4012 htab->obfd = dynobj;
4013 if (using_thumb_only (htab))
4014 {
4015 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
4016 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
4017 }
4018 htab->obfd = saved_obfd;
4019 }
4020
4021 if (htab->fdpic_p) {
4022 htab->plt_header_size = 0;
4023 if (info->flags & DF_BIND_NOW)
4024 htab->plt_entry_size = 4 * (ARRAY_SIZE (elf32_arm_fdpic_plt_entry) - 5);
4025 else
4026 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_fdpic_plt_entry);
4027 }
4028
4029 if (!htab->root.splt
4030 || !htab->root.srelplt
4031 || !htab->root.sdynbss
4032 || (!bfd_link_pic (info) && !htab->root.srelbss))
4033 abort ();
4034
4035 return true;
4036 }
4037
4038 /* Copy the extra info we tack onto an elf_link_hash_entry. */
4039
4040 static void
4041 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
4042 struct elf_link_hash_entry *dir,
4043 struct elf_link_hash_entry *ind)
4044 {
4045 struct elf32_arm_link_hash_entry *edir, *eind;
4046
4047 edir = (struct elf32_arm_link_hash_entry *) dir;
4048 eind = (struct elf32_arm_link_hash_entry *) ind;
4049
4050 if (ind->root.type == bfd_link_hash_indirect)
4051 {
4052 /* Copy over PLT info. */
4053 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
4054 eind->plt.thumb_refcount = 0;
4055 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
4056 eind->plt.maybe_thumb_refcount = 0;
4057 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
4058 eind->plt.noncall_refcount = 0;
4059
4060 /* Copy FDPIC counters. */
4061 edir->fdpic_cnts.gotofffuncdesc_cnt += eind->fdpic_cnts.gotofffuncdesc_cnt;
4062 edir->fdpic_cnts.gotfuncdesc_cnt += eind->fdpic_cnts.gotfuncdesc_cnt;
4063 edir->fdpic_cnts.funcdesc_cnt += eind->fdpic_cnts.funcdesc_cnt;
4064
4065 /* We should only allocate a function to .iplt once the final
4066 symbol information is known. */
4067 BFD_ASSERT (!eind->is_iplt);
4068
4069 if (dir->got.refcount <= 0)
4070 {
4071 edir->tls_type = eind->tls_type;
4072 eind->tls_type = GOT_UNKNOWN;
4073 }
4074 }
4075
4076 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
4077 }
4078
4079 /* Destroy an ARM elf linker hash table. */
4080
4081 static void
4082 elf32_arm_link_hash_table_free (bfd *obfd)
4083 {
4084 struct elf32_arm_link_hash_table *ret
4085 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
4086
4087 bfd_hash_table_free (&ret->stub_hash_table);
4088 _bfd_elf_link_hash_table_free (obfd);
4089 }
4090
4091 /* Create an ARM elf linker hash table. */
4092
4093 static struct bfd_link_hash_table *
4094 elf32_arm_link_hash_table_create (bfd *abfd)
4095 {
4096 struct elf32_arm_link_hash_table *ret;
4097 size_t amt = sizeof (struct elf32_arm_link_hash_table);
4098
4099 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
4100 if (ret == NULL)
4101 return NULL;
4102
4103 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
4104 elf32_arm_link_hash_newfunc,
4105 sizeof (struct elf32_arm_link_hash_entry),
4106 ARM_ELF_DATA))
4107 {
4108 free (ret);
4109 return NULL;
4110 }
4111
4112 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
4113 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
4114 #ifdef FOUR_WORD_PLT
4115 ret->plt_header_size = 16;
4116 ret->plt_entry_size = 16;
4117 #else
4118 ret->plt_header_size = 20;
4119 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
4120 #endif
4121 ret->use_rel = true;
4122 ret->obfd = abfd;
4123 ret->fdpic_p = 0;
4124
4125 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
4126 sizeof (struct elf32_arm_stub_hash_entry)))
4127 {
4128 _bfd_elf_link_hash_table_free (abfd);
4129 return NULL;
4130 }
4131 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
4132
4133 return &ret->root.root;
4134 }
4135
4136 /* Determine what kind of NOPs are available. */
4137
4138 static bool
4139 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
4140 {
4141 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4142 Tag_CPU_arch);
4143
4144 /* Force return logic to be reviewed for each new architecture. */
4145 BFD_ASSERT (arch <= TAG_CPU_ARCH_V9);
4146
4147 return (arch == TAG_CPU_ARCH_V6T2
4148 || arch == TAG_CPU_ARCH_V6K
4149 || arch == TAG_CPU_ARCH_V7
4150 || arch == TAG_CPU_ARCH_V8
4151 || arch == TAG_CPU_ARCH_V8R
4152 || arch == TAG_CPU_ARCH_V9);
4153 }
4154
4155 static bool
4156 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
4157 {
4158 switch (stub_type)
4159 {
4160 case arm_stub_long_branch_thumb_only:
4161 case arm_stub_long_branch_thumb2_only:
4162 case arm_stub_long_branch_thumb2_only_pure:
4163 case arm_stub_long_branch_v4t_thumb_arm:
4164 case arm_stub_short_branch_v4t_thumb_arm:
4165 case arm_stub_long_branch_v4t_thumb_arm_pic:
4166 case arm_stub_long_branch_v4t_thumb_tls_pic:
4167 case arm_stub_long_branch_thumb_only_pic:
4168 case arm_stub_cmse_branch_thumb_only:
4169 return true;
4170 case arm_stub_none:
4171 BFD_FAIL ();
4172 return false;
4173 break;
4174 default:
4175 return false;
4176 }
4177 }
4178
4179 /* Determine the type of stub needed, if any, for a call. */
4180
4181 static enum elf32_arm_stub_type
4182 arm_type_of_stub (struct bfd_link_info *info,
4183 asection *input_sec,
4184 const Elf_Internal_Rela *rel,
4185 unsigned char st_type,
4186 enum arm_st_branch_type *actual_branch_type,
4187 struct elf32_arm_link_hash_entry *hash,
4188 bfd_vma destination,
4189 asection *sym_sec,
4190 bfd *input_bfd,
4191 const char *name)
4192 {
4193 bfd_vma location;
4194 bfd_signed_vma branch_offset;
4195 unsigned int r_type;
4196 struct elf32_arm_link_hash_table * globals;
4197 bool thumb2, thumb2_bl, thumb_only;
4198 enum elf32_arm_stub_type stub_type = arm_stub_none;
4199 int use_plt = 0;
4200 enum arm_st_branch_type branch_type = *actual_branch_type;
4201 union gotplt_union *root_plt;
4202 struct arm_plt_info *arm_plt;
4203 int arch;
4204 int thumb2_movw;
4205
4206 if (branch_type == ST_BRANCH_LONG)
4207 return stub_type;
4208
4209 globals = elf32_arm_hash_table (info);
4210 if (globals == NULL)
4211 return stub_type;
4212
4213 thumb_only = using_thumb_only (globals);
4214 thumb2 = using_thumb2 (globals);
4215 thumb2_bl = using_thumb2_bl (globals);
4216
4217 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
4218
4219 /* True for architectures that implement the thumb2 movw instruction. */
4220 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
4221
4222 /* Determine where the call point is. */
4223 location = (input_sec->output_offset
4224 + input_sec->output_section->vma
4225 + rel->r_offset);
4226
4227 r_type = ELF32_R_TYPE (rel->r_info);
4228
4229 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4230 are considering a function call relocation. */
4231 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4232 || r_type == R_ARM_THM_JUMP19)
4233 && branch_type == ST_BRANCH_TO_ARM)
4234 branch_type = ST_BRANCH_TO_THUMB;
4235
4236 /* For TLS call relocs, it is the caller's responsibility to provide
4237 the address of the appropriate trampoline. */
4238 if (r_type != R_ARM_TLS_CALL
4239 && r_type != R_ARM_THM_TLS_CALL
4240 && elf32_arm_get_plt_info (input_bfd, globals, hash,
4241 ELF32_R_SYM (rel->r_info), &root_plt,
4242 &arm_plt)
4243 && root_plt->offset != (bfd_vma) -1)
4244 {
4245 asection *splt;
4246
4247 if (hash == NULL || hash->is_iplt)
4248 splt = globals->root.iplt;
4249 else
4250 splt = globals->root.splt;
4251 if (splt != NULL)
4252 {
4253 use_plt = 1;
4254
4255 /* Note when dealing with PLT entries: the main PLT stub is in
4256 ARM mode, so if the branch is in Thumb mode, another
4257 Thumb->ARM stub will be inserted later just before the ARM
4258 PLT stub. If a long branch stub is needed, we'll add a
4259 Thumb->Arm one and branch directly to the ARM PLT entry.
4260 Here, we have to check if a pre-PLT Thumb->ARM stub
4261 is needed and if it will be close enough. */
4262
4263 destination = (splt->output_section->vma
4264 + splt->output_offset
4265 + root_plt->offset);
4266 st_type = STT_FUNC;
4267
4268 /* Thumb branch/call to PLT: it can become a branch to ARM
4269 or to Thumb. We must perform the same checks and
4270 corrections as in elf32_arm_final_link_relocate. */
4271 if ((r_type == R_ARM_THM_CALL)
4272 || (r_type == R_ARM_THM_JUMP24))
4273 {
4274 if (globals->use_blx
4275 && r_type == R_ARM_THM_CALL
4276 && !thumb_only)
4277 {
4278 /* If the Thumb BLX instruction is available, convert
4279 the BL to a BLX instruction to call the ARM-mode
4280 PLT entry. */
4281 branch_type = ST_BRANCH_TO_ARM;
4282 }
4283 else
4284 {
4285 if (!thumb_only)
4286 /* Target the Thumb stub before the ARM PLT entry. */
4287 destination -= PLT_THUMB_STUB_SIZE;
4288 branch_type = ST_BRANCH_TO_THUMB;
4289 }
4290 }
4291 else
4292 {
4293 branch_type = ST_BRANCH_TO_ARM;
4294 }
4295 }
4296 }
4297 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4298 BFD_ASSERT (st_type != STT_GNU_IFUNC);
4299
4300 branch_offset = (bfd_signed_vma)(destination - location);
4301
4302 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4303 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
4304 {
4305 /* Handle cases where:
4306 - this call goes too far (different Thumb/Thumb2 max
4307 distance)
4308 - it's a Thumb->Arm call and blx is not available, or it's a
4309 Thumb->Arm branch (not bl). A stub is needed in this case,
4310 but only if this call is not through a PLT entry. Indeed,
4311 PLT stubs handle mode switching already. */
4312 if ((!thumb2_bl
4313 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4314 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4315 || (thumb2_bl
4316 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4317 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4318 || (thumb2
4319 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4320 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4321 && (r_type == R_ARM_THM_JUMP19))
4322 || (branch_type == ST_BRANCH_TO_ARM
4323 && (((r_type == R_ARM_THM_CALL
4324 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4325 || (r_type == R_ARM_THM_JUMP24)
4326 || (r_type == R_ARM_THM_JUMP19))
4327 && !use_plt))
4328 {
4329 /* If we need to insert a Thumb-Thumb long branch stub to a
4330 PLT, use one that branches directly to the ARM PLT
4331 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4332 stub, undo this now. */
4333 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4334 {
4335 branch_type = ST_BRANCH_TO_ARM;
4336 branch_offset += PLT_THUMB_STUB_SIZE;
4337 }
4338
4339 if (branch_type == ST_BRANCH_TO_THUMB)
4340 {
4341 /* Thumb to thumb. */
4342 if (!thumb_only)
4343 {
4344 if (input_sec->flags & SEC_ELF_PURECODE)
4345 _bfd_error_handler
4346 (_("%pB(%pA): warning: long branch veneers used in"
4347 " section with SHF_ARM_PURECODE section"
4348 " attribute is only supported for M-profile"
4349 " targets that implement the movw instruction"),
4350 input_bfd, input_sec);
4351
4352 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4353 /* PIC stubs. */
4354 ? ((globals->use_blx
4355 && (r_type == R_ARM_THM_CALL))
4356 /* V5T and above. Stub starts with ARM code, so
4357 we must be able to switch mode before
4358 reaching it, which is only possible for 'bl'
4359 (ie R_ARM_THM_CALL relocation). */
4360 ? arm_stub_long_branch_any_thumb_pic
4361 /* On V4T, use Thumb code only. */
4362 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4363
4364 /* non-PIC stubs. */
4365 : ((globals->use_blx
4366 && (r_type == R_ARM_THM_CALL))
4367 /* V5T and above. */
4368 ? arm_stub_long_branch_any_any
4369 /* V4T. */
4370 : arm_stub_long_branch_v4t_thumb_thumb);
4371 }
4372 else
4373 {
4374 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4375 stub_type = arm_stub_long_branch_thumb2_only_pure;
4376 else
4377 {
4378 if (input_sec->flags & SEC_ELF_PURECODE)
4379 _bfd_error_handler
4380 (_("%pB(%pA): warning: long branch veneers used in"
4381 " section with SHF_ARM_PURECODE section"
4382 " attribute is only supported for M-profile"
4383 " targets that implement the movw instruction"),
4384 input_bfd, input_sec);
4385
4386 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4387 /* PIC stub. */
4388 ? arm_stub_long_branch_thumb_only_pic
4389 /* non-PIC stub. */
4390 : (thumb2 ? arm_stub_long_branch_thumb2_only
4391 : arm_stub_long_branch_thumb_only);
4392 }
4393 }
4394 }
4395 else
4396 {
4397 if (input_sec->flags & SEC_ELF_PURECODE)
4398 _bfd_error_handler
4399 (_("%pB(%pA): warning: long branch veneers used in"
4400 " section with SHF_ARM_PURECODE section"
4401 " attribute is only supported" " for M-profile"
4402 " targets that implement the movw instruction"),
4403 input_bfd, input_sec);
4404
4405 /* Thumb to arm. */
4406 if (sym_sec != NULL
4407 && sym_sec->owner != NULL
4408 && !INTERWORK_FLAG (sym_sec->owner))
4409 {
4410 _bfd_error_handler
4411 (_("%pB(%s): warning: interworking not enabled;"
4412 " first occurrence: %pB: %s call to %s"),
4413 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
4414 }
4415
4416 stub_type =
4417 (bfd_link_pic (info) | globals->pic_veneer)
4418 /* PIC stubs. */
4419 ? (r_type == R_ARM_THM_TLS_CALL
4420 /* TLS PIC stubs. */
4421 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4422 : arm_stub_long_branch_v4t_thumb_tls_pic)
4423 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4424 /* V5T PIC and above. */
4425 ? arm_stub_long_branch_any_arm_pic
4426 /* V4T PIC stub. */
4427 : arm_stub_long_branch_v4t_thumb_arm_pic))
4428
4429 /* non-PIC stubs. */
4430 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4431 /* V5T and above. */
4432 ? arm_stub_long_branch_any_any
4433 /* V4T. */
4434 : arm_stub_long_branch_v4t_thumb_arm);
4435
4436 /* Handle v4t short branches. */
4437 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4438 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4439 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4440 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4441 }
4442 }
4443 }
4444 else if (r_type == R_ARM_CALL
4445 || r_type == R_ARM_JUMP24
4446 || r_type == R_ARM_PLT32
4447 || r_type == R_ARM_TLS_CALL)
4448 {
4449 if (input_sec->flags & SEC_ELF_PURECODE)
4450 _bfd_error_handler
4451 (_("%pB(%pA): warning: long branch veneers used in"
4452 " section with SHF_ARM_PURECODE section"
4453 " attribute is only supported for M-profile"
4454 " targets that implement the movw instruction"),
4455 input_bfd, input_sec);
4456 if (branch_type == ST_BRANCH_TO_THUMB)
4457 {
4458 /* Arm to thumb. */
4459
4460 if (sym_sec != NULL
4461 && sym_sec->owner != NULL
4462 && !INTERWORK_FLAG (sym_sec->owner))
4463 {
4464 _bfd_error_handler
4465 (_("%pB(%s): warning: interworking not enabled;"
4466 " first occurrence: %pB: %s call to %s"),
4467 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
4468 }
4469
4470 /* We have an extra 2-bytes reach because of
4471 the mode change (bit 24 (H) of BLX encoding). */
4472 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4473 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4474 || (r_type == R_ARM_CALL && !globals->use_blx)
4475 || (r_type == R_ARM_JUMP24)
4476 || (r_type == R_ARM_PLT32))
4477 {
4478 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4479 /* PIC stubs. */
4480 ? ((globals->use_blx)
4481 /* V5T and above. */
4482 ? arm_stub_long_branch_any_thumb_pic
4483 /* V4T stub. */
4484 : arm_stub_long_branch_v4t_arm_thumb_pic)
4485
4486 /* non-PIC stubs. */
4487 : ((globals->use_blx)
4488 /* V5T and above. */
4489 ? arm_stub_long_branch_any_any
4490 /* V4T. */
4491 : arm_stub_long_branch_v4t_arm_thumb);
4492 }
4493 }
4494 else
4495 {
4496 /* Arm to arm. */
4497 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4498 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4499 {
4500 stub_type =
4501 (bfd_link_pic (info) | globals->pic_veneer)
4502 /* PIC stubs. */
4503 ? (r_type == R_ARM_TLS_CALL
4504 /* TLS PIC Stub. */
4505 ? arm_stub_long_branch_any_tls_pic
4506 : (globals->root.target_os == is_nacl
4507 ? arm_stub_long_branch_arm_nacl_pic
4508 : arm_stub_long_branch_any_arm_pic))
4509 /* non-PIC stubs. */
4510 : (globals->root.target_os == is_nacl
4511 ? arm_stub_long_branch_arm_nacl
4512 : arm_stub_long_branch_any_any);
4513 }
4514 }
4515 }
4516
4517 /* If a stub is needed, record the actual destination type. */
4518 if (stub_type != arm_stub_none)
4519 *actual_branch_type = branch_type;
4520
4521 return stub_type;
4522 }
4523
4524 /* Build a name for an entry in the stub hash table. */
4525
4526 static char *
4527 elf32_arm_stub_name (const asection *input_section,
4528 const asection *sym_sec,
4529 const struct elf32_arm_link_hash_entry *hash,
4530 const Elf_Internal_Rela *rel,
4531 enum elf32_arm_stub_type stub_type)
4532 {
4533 char *stub_name;
4534 bfd_size_type len;
4535
4536 if (hash)
4537 {
4538 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4539 stub_name = (char *) bfd_malloc (len);
4540 if (stub_name != NULL)
4541 sprintf (stub_name, "%08x_%s+%x_%d",
4542 input_section->id & 0xffffffff,
4543 hash->root.root.root.string,
4544 (int) rel->r_addend & 0xffffffff,
4545 (int) stub_type);
4546 }
4547 else
4548 {
4549 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4550 stub_name = (char *) bfd_malloc (len);
4551 if (stub_name != NULL)
4552 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4553 input_section->id & 0xffffffff,
4554 sym_sec->id & 0xffffffff,
4555 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4556 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4557 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4558 (int) rel->r_addend & 0xffffffff,
4559 (int) stub_type);
4560 }
4561
4562 return stub_name;
4563 }
4564
4565 /* Look up an entry in the stub hash. Stub entries are cached because
4566 creating the stub name takes a bit of time. */
4567
4568 static struct elf32_arm_stub_hash_entry *
4569 elf32_arm_get_stub_entry (const asection *input_section,
4570 const asection *sym_sec,
4571 struct elf_link_hash_entry *hash,
4572 const Elf_Internal_Rela *rel,
4573 struct elf32_arm_link_hash_table *htab,
4574 enum elf32_arm_stub_type stub_type)
4575 {
4576 struct elf32_arm_stub_hash_entry *stub_entry;
4577 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4578 const asection *id_sec;
4579
4580 if ((input_section->flags & SEC_CODE) == 0)
4581 return NULL;
4582
4583 /* If the input section is the CMSE stubs one and it needs a long
4584 branch stub to reach it's final destination, give up with an
4585 error message: this is not supported. See PR ld/24709. */
4586 if (!strncmp (input_section->name, CMSE_STUB_NAME, strlen (CMSE_STUB_NAME)))
4587 {
4588 bfd *output_bfd = htab->obfd;
4589 asection *out_sec = bfd_get_section_by_name (output_bfd, CMSE_STUB_NAME);
4590
4591 _bfd_error_handler (_("ERROR: CMSE stub (%s section) too far "
4592 "(%#" PRIx64 ") from destination (%#" PRIx64 ")"),
4593 CMSE_STUB_NAME,
4594 (uint64_t)out_sec->output_section->vma
4595 + out_sec->output_offset,
4596 (uint64_t)sym_sec->output_section->vma
4597 + sym_sec->output_offset
4598 + h->root.root.u.def.value);
4599 /* Exit, rather than leave incompletely processed
4600 relocations. */
4601 xexit (1);
4602 }
4603
4604 /* If this input section is part of a group of sections sharing one
4605 stub section, then use the id of the first section in the group.
4606 Stub names need to include a section id, as there may well be
4607 more than one stub used to reach say, printf, and we need to
4608 distinguish between them. */
4609 BFD_ASSERT (input_section->id <= htab->top_id);
4610 id_sec = htab->stub_group[input_section->id].link_sec;
4611
4612 if (h != NULL && h->stub_cache != NULL
4613 && h->stub_cache->h == h
4614 && h->stub_cache->id_sec == id_sec
4615 && h->stub_cache->stub_type == stub_type)
4616 {
4617 stub_entry = h->stub_cache;
4618 }
4619 else
4620 {
4621 char *stub_name;
4622
4623 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4624 if (stub_name == NULL)
4625 return NULL;
4626
4627 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4628 stub_name, false, false);
4629 if (h != NULL)
4630 h->stub_cache = stub_entry;
4631
4632 free (stub_name);
4633 }
4634
4635 return stub_entry;
4636 }
4637
4638 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4639 section. */
4640
4641 static bool
4642 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4643 {
4644 if (stub_type >= max_stub_type)
4645 abort (); /* Should be unreachable. */
4646
4647 switch (stub_type)
4648 {
4649 case arm_stub_cmse_branch_thumb_only:
4650 return true;
4651
4652 default:
4653 return false;
4654 }
4655
4656 abort (); /* Should be unreachable. */
4657 }
4658
4659 /* Required alignment (as a power of 2) for the dedicated section holding
4660 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4661 with input sections. */
4662
4663 static int
4664 arm_dedicated_stub_output_section_required_alignment
4665 (enum elf32_arm_stub_type stub_type)
4666 {
4667 if (stub_type >= max_stub_type)
4668 abort (); /* Should be unreachable. */
4669
4670 switch (stub_type)
4671 {
4672 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4673 boundary. */
4674 case arm_stub_cmse_branch_thumb_only:
4675 return 5;
4676
4677 default:
4678 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4679 return 0;
4680 }
4681
4682 abort (); /* Should be unreachable. */
4683 }
4684
4685 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4686 NULL if veneers of this type are interspersed with input sections. */
4687
4688 static const char *
4689 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4690 {
4691 if (stub_type >= max_stub_type)
4692 abort (); /* Should be unreachable. */
4693
4694 switch (stub_type)
4695 {
4696 case arm_stub_cmse_branch_thumb_only:
4697 return CMSE_STUB_NAME;
4698
4699 default:
4700 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4701 return NULL;
4702 }
4703
4704 abort (); /* Should be unreachable. */
4705 }
4706
4707 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4708 returns the address of the hash table field in HTAB holding a pointer to the
4709 corresponding input section. Otherwise, returns NULL. */
4710
4711 static asection **
4712 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4713 enum elf32_arm_stub_type stub_type)
4714 {
4715 if (stub_type >= max_stub_type)
4716 abort (); /* Should be unreachable. */
4717
4718 switch (stub_type)
4719 {
4720 case arm_stub_cmse_branch_thumb_only:
4721 return &htab->cmse_stub_sec;
4722
4723 default:
4724 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4725 return NULL;
4726 }
4727
4728 abort (); /* Should be unreachable. */
4729 }
4730
4731 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4732 is the section that branch into veneer and can be NULL if stub should go in
4733 a dedicated output section. Returns a pointer to the stub section, and the
4734 section to which the stub section will be attached (in *LINK_SEC_P).
4735 LINK_SEC_P may be NULL. */
4736
4737 static asection *
4738 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4739 struct elf32_arm_link_hash_table *htab,
4740 enum elf32_arm_stub_type stub_type)
4741 {
4742 asection *link_sec, *out_sec, **stub_sec_p;
4743 const char *stub_sec_prefix;
4744 bool dedicated_output_section =
4745 arm_dedicated_stub_output_section_required (stub_type);
4746 int align;
4747
4748 if (dedicated_output_section)
4749 {
4750 bfd *output_bfd = htab->obfd;
4751 const char *out_sec_name =
4752 arm_dedicated_stub_output_section_name (stub_type);
4753 link_sec = NULL;
4754 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4755 stub_sec_prefix = out_sec_name;
4756 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4757 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4758 if (out_sec == NULL)
4759 {
4760 _bfd_error_handler (_("no address assigned to the veneers output "
4761 "section %s"), out_sec_name);
4762 return NULL;
4763 }
4764 }
4765 else
4766 {
4767 BFD_ASSERT (section->id <= htab->top_id);
4768 link_sec = htab->stub_group[section->id].link_sec;
4769 BFD_ASSERT (link_sec != NULL);
4770 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4771 if (*stub_sec_p == NULL)
4772 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4773 stub_sec_prefix = link_sec->name;
4774 out_sec = link_sec->output_section;
4775 align = htab->root.target_os == is_nacl ? 4 : 3;
4776 }
4777
4778 if (*stub_sec_p == NULL)
4779 {
4780 size_t namelen;
4781 bfd_size_type len;
4782 char *s_name;
4783
4784 namelen = strlen (stub_sec_prefix);
4785 len = namelen + sizeof (STUB_SUFFIX);
4786 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4787 if (s_name == NULL)
4788 return NULL;
4789
4790 memcpy (s_name, stub_sec_prefix, namelen);
4791 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4792 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4793 align);
4794 if (*stub_sec_p == NULL)
4795 return NULL;
4796
4797 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4798 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4799 | SEC_KEEP;
4800 }
4801
4802 if (!dedicated_output_section)
4803 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4804
4805 if (link_sec_p)
4806 *link_sec_p = link_sec;
4807
4808 return *stub_sec_p;
4809 }
4810
4811 /* Add a new stub entry to the stub hash. Not all fields of the new
4812 stub entry are initialised. */
4813
4814 static struct elf32_arm_stub_hash_entry *
4815 elf32_arm_add_stub (const char *stub_name, asection *section,
4816 struct elf32_arm_link_hash_table *htab,
4817 enum elf32_arm_stub_type stub_type)
4818 {
4819 asection *link_sec;
4820 asection *stub_sec;
4821 struct elf32_arm_stub_hash_entry *stub_entry;
4822
4823 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4824 stub_type);
4825 if (stub_sec == NULL)
4826 return NULL;
4827
4828 /* Enter this entry into the linker stub hash table. */
4829 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4830 true, false);
4831 if (stub_entry == NULL)
4832 {
4833 if (section == NULL)
4834 section = stub_sec;
4835 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4836 section->owner, stub_name);
4837 return NULL;
4838 }
4839
4840 stub_entry->stub_sec = stub_sec;
4841 stub_entry->stub_offset = (bfd_vma) -1;
4842 stub_entry->id_sec = link_sec;
4843
4844 return stub_entry;
4845 }
4846
4847 /* Store an Arm insn into an output section not processed by
4848 elf32_arm_write_section. */
4849
4850 static void
4851 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4852 bfd * output_bfd, bfd_vma val, void * ptr)
4853 {
4854 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4855 bfd_putl32 (val, ptr);
4856 else
4857 bfd_putb32 (val, ptr);
4858 }
4859
4860 /* Store a 16-bit Thumb insn into an output section not processed by
4861 elf32_arm_write_section. */
4862
4863 static void
4864 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4865 bfd * output_bfd, bfd_vma val, void * ptr)
4866 {
4867 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4868 bfd_putl16 (val, ptr);
4869 else
4870 bfd_putb16 (val, ptr);
4871 }
4872
4873 /* Store a Thumb2 insn into an output section not processed by
4874 elf32_arm_write_section. */
4875
4876 static void
4877 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4878 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4879 {
4880 /* T2 instructions are 16-bit streamed. */
4881 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4882 {
4883 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4884 bfd_putl16 ((val & 0xffff), ptr + 2);
4885 }
4886 else
4887 {
4888 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4889 bfd_putb16 ((val & 0xffff), ptr + 2);
4890 }
4891 }
4892
4893 /* If it's possible to change R_TYPE to a more efficient access
4894 model, return the new reloc type. */
4895
4896 static unsigned
4897 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4898 struct elf_link_hash_entry *h)
4899 {
4900 int is_local = (h == NULL);
4901
4902 if (bfd_link_dll (info)
4903 || (h && h->root.type == bfd_link_hash_undefweak))
4904 return r_type;
4905
4906 /* We do not support relaxations for Old TLS models. */
4907 switch (r_type)
4908 {
4909 case R_ARM_TLS_GOTDESC:
4910 case R_ARM_TLS_CALL:
4911 case R_ARM_THM_TLS_CALL:
4912 case R_ARM_TLS_DESCSEQ:
4913 case R_ARM_THM_TLS_DESCSEQ:
4914 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4915 }
4916
4917 return r_type;
4918 }
4919
4920 static bfd_reloc_status_type elf32_arm_final_link_relocate
4921 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4922 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4923 const char *, unsigned char, enum arm_st_branch_type,
4924 struct elf_link_hash_entry *, bool *, char **);
4925
4926 static unsigned int
4927 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4928 {
4929 switch (stub_type)
4930 {
4931 case arm_stub_a8_veneer_b_cond:
4932 case arm_stub_a8_veneer_b:
4933 case arm_stub_a8_veneer_bl:
4934 return 2;
4935
4936 case arm_stub_long_branch_any_any:
4937 case arm_stub_long_branch_v4t_arm_thumb:
4938 case arm_stub_long_branch_thumb_only:
4939 case arm_stub_long_branch_thumb2_only:
4940 case arm_stub_long_branch_thumb2_only_pure:
4941 case arm_stub_long_branch_v4t_thumb_thumb:
4942 case arm_stub_long_branch_v4t_thumb_arm:
4943 case arm_stub_short_branch_v4t_thumb_arm:
4944 case arm_stub_long_branch_any_arm_pic:
4945 case arm_stub_long_branch_any_thumb_pic:
4946 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4947 case arm_stub_long_branch_v4t_arm_thumb_pic:
4948 case arm_stub_long_branch_v4t_thumb_arm_pic:
4949 case arm_stub_long_branch_thumb_only_pic:
4950 case arm_stub_long_branch_any_tls_pic:
4951 case arm_stub_long_branch_v4t_thumb_tls_pic:
4952 case arm_stub_cmse_branch_thumb_only:
4953 case arm_stub_a8_veneer_blx:
4954 return 4;
4955
4956 case arm_stub_long_branch_arm_nacl:
4957 case arm_stub_long_branch_arm_nacl_pic:
4958 return 16;
4959
4960 default:
4961 abort (); /* Should be unreachable. */
4962 }
4963 }
4964
4965 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4966 veneering (TRUE) or have their own symbol (FALSE). */
4967
4968 static bool
4969 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4970 {
4971 if (stub_type >= max_stub_type)
4972 abort (); /* Should be unreachable. */
4973
4974 switch (stub_type)
4975 {
4976 case arm_stub_cmse_branch_thumb_only:
4977 return true;
4978
4979 default:
4980 return false;
4981 }
4982
4983 abort (); /* Should be unreachable. */
4984 }
4985
4986 /* Returns the padding needed for the dedicated section used stubs of type
4987 STUB_TYPE. */
4988
4989 static int
4990 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4991 {
4992 if (stub_type >= max_stub_type)
4993 abort (); /* Should be unreachable. */
4994
4995 switch (stub_type)
4996 {
4997 case arm_stub_cmse_branch_thumb_only:
4998 return 32;
4999
5000 default:
5001 return 0;
5002 }
5003
5004 abort (); /* Should be unreachable. */
5005 }
5006
5007 /* If veneers of type STUB_TYPE should go in a dedicated output section,
5008 returns the address of the hash table field in HTAB holding the offset at
5009 which new veneers should be layed out in the stub section. */
5010
5011 static bfd_vma*
5012 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
5013 enum elf32_arm_stub_type stub_type)
5014 {
5015 switch (stub_type)
5016 {
5017 case arm_stub_cmse_branch_thumb_only:
5018 return &htab->new_cmse_stub_offset;
5019
5020 default:
5021 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
5022 return NULL;
5023 }
5024 }
5025
5026 static bool
5027 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
5028 void * in_arg)
5029 {
5030 #define MAXRELOCS 3
5031 bool removed_sg_veneer;
5032 struct elf32_arm_stub_hash_entry *stub_entry;
5033 struct elf32_arm_link_hash_table *globals;
5034 struct bfd_link_info *info;
5035 asection *stub_sec;
5036 bfd *stub_bfd;
5037 bfd_byte *loc;
5038 bfd_vma sym_value;
5039 int template_size;
5040 int size;
5041 const insn_sequence *template_sequence;
5042 int i;
5043 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
5044 int stub_reloc_offset[MAXRELOCS] = {0, 0};
5045 int nrelocs = 0;
5046 int just_allocated = 0;
5047
5048 /* Massage our args to the form they really have. */
5049 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5050 info = (struct bfd_link_info *) in_arg;
5051
5052 /* Fail if the target section could not be assigned to an output
5053 section. The user should fix his linker script. */
5054 if (stub_entry->target_section->output_section == NULL
5055 && info->non_contiguous_regions)
5056 info->callbacks->einfo (_("%F%P: Could not assign `%pA' to an output section. "
5057 "Retry without --enable-non-contiguous-regions.\n"),
5058 stub_entry->target_section);
5059
5060 globals = elf32_arm_hash_table (info);
5061 if (globals == NULL)
5062 return false;
5063
5064 stub_sec = stub_entry->stub_sec;
5065
5066 if ((globals->fix_cortex_a8 < 0)
5067 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
5068 /* We have to do less-strictly-aligned fixes last. */
5069 return true;
5070
5071 /* Assign a slot at the end of section if none assigned yet. */
5072 if (stub_entry->stub_offset == (bfd_vma) -1)
5073 {
5074 stub_entry->stub_offset = stub_sec->size;
5075 just_allocated = 1;
5076 }
5077 loc = stub_sec->contents + stub_entry->stub_offset;
5078
5079 stub_bfd = stub_sec->owner;
5080
5081 /* This is the address of the stub destination. */
5082 sym_value = (stub_entry->target_value
5083 + stub_entry->target_section->output_offset
5084 + stub_entry->target_section->output_section->vma);
5085
5086 template_sequence = stub_entry->stub_template;
5087 template_size = stub_entry->stub_template_size;
5088
5089 size = 0;
5090 for (i = 0; i < template_size; i++)
5091 {
5092 switch (template_sequence[i].type)
5093 {
5094 case THUMB16_TYPE:
5095 {
5096 bfd_vma data = (bfd_vma) template_sequence[i].data;
5097 if (template_sequence[i].reloc_addend != 0)
5098 {
5099 /* We've borrowed the reloc_addend field to mean we should
5100 insert a condition code into this (Thumb-1 branch)
5101 instruction. See THUMB16_BCOND_INSN. */
5102 BFD_ASSERT ((data & 0xff00) == 0xd000);
5103 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
5104 }
5105 bfd_put_16 (stub_bfd, data, loc + size);
5106 size += 2;
5107 }
5108 break;
5109
5110 case THUMB32_TYPE:
5111 bfd_put_16 (stub_bfd,
5112 (template_sequence[i].data >> 16) & 0xffff,
5113 loc + size);
5114 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
5115 loc + size + 2);
5116 if (template_sequence[i].r_type != R_ARM_NONE)
5117 {
5118 stub_reloc_idx[nrelocs] = i;
5119 stub_reloc_offset[nrelocs++] = size;
5120 }
5121 size += 4;
5122 break;
5123
5124 case ARM_TYPE:
5125 bfd_put_32 (stub_bfd, template_sequence[i].data,
5126 loc + size);
5127 /* Handle cases where the target is encoded within the
5128 instruction. */
5129 if (template_sequence[i].r_type == R_ARM_JUMP24)
5130 {
5131 stub_reloc_idx[nrelocs] = i;
5132 stub_reloc_offset[nrelocs++] = size;
5133 }
5134 size += 4;
5135 break;
5136
5137 case DATA_TYPE:
5138 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
5139 stub_reloc_idx[nrelocs] = i;
5140 stub_reloc_offset[nrelocs++] = size;
5141 size += 4;
5142 break;
5143
5144 default:
5145 BFD_FAIL ();
5146 return false;
5147 }
5148 }
5149
5150 if (just_allocated)
5151 stub_sec->size += size;
5152
5153 /* Stub size has already been computed in arm_size_one_stub. Check
5154 consistency. */
5155 BFD_ASSERT (size == stub_entry->stub_size);
5156
5157 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
5158 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
5159 sym_value |= 1;
5160
5161 /* Assume non empty slots have at least one and at most MAXRELOCS entries
5162 to relocate in each stub. */
5163 removed_sg_veneer =
5164 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5165 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
5166
5167 for (i = 0; i < nrelocs; i++)
5168 {
5169 Elf_Internal_Rela rel;
5170 bool unresolved_reloc;
5171 char *error_message;
5172 bfd_vma points_to =
5173 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
5174
5175 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
5176 rel.r_info = ELF32_R_INFO (0,
5177 template_sequence[stub_reloc_idx[i]].r_type);
5178 rel.r_addend = 0;
5179
5180 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
5181 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5182 template should refer back to the instruction after the original
5183 branch. We use target_section as Cortex-A8 erratum workaround stubs
5184 are only generated when both source and target are in the same
5185 section. */
5186 points_to = stub_entry->target_section->output_section->vma
5187 + stub_entry->target_section->output_offset
5188 + stub_entry->source_value;
5189
5190 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5191 (template_sequence[stub_reloc_idx[i]].r_type),
5192 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
5193 points_to, info, stub_entry->target_section, "", STT_FUNC,
5194 stub_entry->branch_type,
5195 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
5196 &error_message);
5197 }
5198
5199 return true;
5200 #undef MAXRELOCS
5201 }
5202
5203 /* Calculate the template, template size and instruction size for a stub.
5204 Return value is the instruction size. */
5205
5206 static unsigned int
5207 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
5208 const insn_sequence **stub_template,
5209 int *stub_template_size)
5210 {
5211 const insn_sequence *template_sequence = NULL;
5212 int template_size = 0, i;
5213 unsigned int size;
5214
5215 template_sequence = stub_definitions[stub_type].template_sequence;
5216 if (stub_template)
5217 *stub_template = template_sequence;
5218
5219 template_size = stub_definitions[stub_type].template_size;
5220 if (stub_template_size)
5221 *stub_template_size = template_size;
5222
5223 size = 0;
5224 for (i = 0; i < template_size; i++)
5225 {
5226 switch (template_sequence[i].type)
5227 {
5228 case THUMB16_TYPE:
5229 size += 2;
5230 break;
5231
5232 case ARM_TYPE:
5233 case THUMB32_TYPE:
5234 case DATA_TYPE:
5235 size += 4;
5236 break;
5237
5238 default:
5239 BFD_FAIL ();
5240 return 0;
5241 }
5242 }
5243
5244 return size;
5245 }
5246
5247 /* As above, but don't actually build the stub. Just bump offset so
5248 we know stub section sizes. */
5249
5250 static bool
5251 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
5252 void *in_arg ATTRIBUTE_UNUSED)
5253 {
5254 struct elf32_arm_stub_hash_entry *stub_entry;
5255 const insn_sequence *template_sequence;
5256 int template_size, size;
5257
5258 /* Massage our args to the form they really have. */
5259 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5260
5261 BFD_ASSERT ((stub_entry->stub_type > arm_stub_none)
5262 && stub_entry->stub_type < ARRAY_SIZE (stub_definitions));
5263
5264 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
5265 &template_size);
5266
5267 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
5268 if (stub_entry->stub_template_size)
5269 {
5270 stub_entry->stub_size = size;
5271 stub_entry->stub_template = template_sequence;
5272 stub_entry->stub_template_size = template_size;
5273 }
5274
5275 /* Already accounted for. */
5276 if (stub_entry->stub_offset != (bfd_vma) -1)
5277 return true;
5278
5279 size = (size + 7) & ~7;
5280 stub_entry->stub_sec->size += size;
5281
5282 return true;
5283 }
5284
5285 /* External entry points for sizing and building linker stubs. */
5286
5287 /* Set up various things so that we can make a list of input sections
5288 for each output section included in the link. Returns -1 on error,
5289 0 when no stubs will be needed, and 1 on success. */
5290
5291 int
5292 elf32_arm_setup_section_lists (bfd *output_bfd,
5293 struct bfd_link_info *info)
5294 {
5295 bfd *input_bfd;
5296 unsigned int bfd_count;
5297 unsigned int top_id, top_index;
5298 asection *section;
5299 asection **input_list, **list;
5300 size_t amt;
5301 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5302
5303 if (htab == NULL)
5304 return 0;
5305
5306 /* Count the number of input BFDs and find the top input section id. */
5307 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
5308 input_bfd != NULL;
5309 input_bfd = input_bfd->link.next)
5310 {
5311 bfd_count += 1;
5312 for (section = input_bfd->sections;
5313 section != NULL;
5314 section = section->next)
5315 {
5316 if (top_id < section->id)
5317 top_id = section->id;
5318 }
5319 }
5320 htab->bfd_count = bfd_count;
5321
5322 amt = sizeof (struct map_stub) * (top_id + 1);
5323 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
5324 if (htab->stub_group == NULL)
5325 return -1;
5326 htab->top_id = top_id;
5327
5328 /* We can't use output_bfd->section_count here to find the top output
5329 section index as some sections may have been removed, and
5330 _bfd_strip_section_from_output doesn't renumber the indices. */
5331 for (section = output_bfd->sections, top_index = 0;
5332 section != NULL;
5333 section = section->next)
5334 {
5335 if (top_index < section->index)
5336 top_index = section->index;
5337 }
5338
5339 htab->top_index = top_index;
5340 amt = sizeof (asection *) * (top_index + 1);
5341 input_list = (asection **) bfd_malloc (amt);
5342 htab->input_list = input_list;
5343 if (input_list == NULL)
5344 return -1;
5345
5346 /* For sections we aren't interested in, mark their entries with a
5347 value we can check later. */
5348 list = input_list + top_index;
5349 do
5350 *list = bfd_abs_section_ptr;
5351 while (list-- != input_list);
5352
5353 for (section = output_bfd->sections;
5354 section != NULL;
5355 section = section->next)
5356 {
5357 if ((section->flags & SEC_CODE) != 0)
5358 input_list[section->index] = NULL;
5359 }
5360
5361 return 1;
5362 }
5363
5364 /* The linker repeatedly calls this function for each input section,
5365 in the order that input sections are linked into output sections.
5366 Build lists of input sections to determine groupings between which
5367 we may insert linker stubs. */
5368
5369 void
5370 elf32_arm_next_input_section (struct bfd_link_info *info,
5371 asection *isec)
5372 {
5373 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5374
5375 if (htab == NULL)
5376 return;
5377
5378 if (isec->output_section->index <= htab->top_index)
5379 {
5380 asection **list = htab->input_list + isec->output_section->index;
5381
5382 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5383 {
5384 /* Steal the link_sec pointer for our list. */
5385 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5386 /* This happens to make the list in reverse order,
5387 which we reverse later. */
5388 PREV_SEC (isec) = *list;
5389 *list = isec;
5390 }
5391 }
5392 }
5393
5394 /* See whether we can group stub sections together. Grouping stub
5395 sections may result in fewer stubs. More importantly, we need to
5396 put all .init* and .fini* stubs at the end of the .init or
5397 .fini output sections respectively, because glibc splits the
5398 _init and _fini functions into multiple parts. Putting a stub in
5399 the middle of a function is not a good idea. */
5400
5401 static void
5402 group_sections (struct elf32_arm_link_hash_table *htab,
5403 bfd_size_type stub_group_size,
5404 bool stubs_always_after_branch)
5405 {
5406 asection **list = htab->input_list;
5407
5408 do
5409 {
5410 asection *tail = *list;
5411 asection *head;
5412
5413 if (tail == bfd_abs_section_ptr)
5414 continue;
5415
5416 /* Reverse the list: we must avoid placing stubs at the
5417 beginning of the section because the beginning of the text
5418 section may be required for an interrupt vector in bare metal
5419 code. */
5420 #define NEXT_SEC PREV_SEC
5421 head = NULL;
5422 while (tail != NULL)
5423 {
5424 /* Pop from tail. */
5425 asection *item = tail;
5426 tail = PREV_SEC (item);
5427
5428 /* Push on head. */
5429 NEXT_SEC (item) = head;
5430 head = item;
5431 }
5432
5433 while (head != NULL)
5434 {
5435 asection *curr;
5436 asection *next;
5437 bfd_vma stub_group_start = head->output_offset;
5438 bfd_vma end_of_next;
5439
5440 curr = head;
5441 while (NEXT_SEC (curr) != NULL)
5442 {
5443 next = NEXT_SEC (curr);
5444 end_of_next = next->output_offset + next->size;
5445 if (end_of_next - stub_group_start >= stub_group_size)
5446 /* End of NEXT is too far from start, so stop. */
5447 break;
5448 /* Add NEXT to the group. */
5449 curr = next;
5450 }
5451
5452 /* OK, the size from the start to the start of CURR is less
5453 than stub_group_size and thus can be handled by one stub
5454 section. (Or the head section is itself larger than
5455 stub_group_size, in which case we may be toast.)
5456 We should really be keeping track of the total size of
5457 stubs added here, as stubs contribute to the final output
5458 section size. */
5459 do
5460 {
5461 next = NEXT_SEC (head);
5462 /* Set up this stub group. */
5463 htab->stub_group[head->id].link_sec = curr;
5464 }
5465 while (head != curr && (head = next) != NULL);
5466
5467 /* But wait, there's more! Input sections up to stub_group_size
5468 bytes after the stub section can be handled by it too. */
5469 if (!stubs_always_after_branch)
5470 {
5471 stub_group_start = curr->output_offset + curr->size;
5472
5473 while (next != NULL)
5474 {
5475 end_of_next = next->output_offset + next->size;
5476 if (end_of_next - stub_group_start >= stub_group_size)
5477 /* End of NEXT is too far from stubs, so stop. */
5478 break;
5479 /* Add NEXT to the stub group. */
5480 head = next;
5481 next = NEXT_SEC (head);
5482 htab->stub_group[head->id].link_sec = curr;
5483 }
5484 }
5485 head = next;
5486 }
5487 }
5488 while (list++ != htab->input_list + htab->top_index);
5489
5490 free (htab->input_list);
5491 #undef PREV_SEC
5492 #undef NEXT_SEC
5493 }
5494
5495 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5496 erratum fix. */
5497
5498 static int
5499 a8_reloc_compare (const void *a, const void *b)
5500 {
5501 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5502 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5503
5504 if (ra->from < rb->from)
5505 return -1;
5506 else if (ra->from > rb->from)
5507 return 1;
5508 else
5509 return 0;
5510 }
5511
5512 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5513 const char *, char **);
5514
5515 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5516 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5517 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5518 otherwise. */
5519
5520 static bool
5521 cortex_a8_erratum_scan (bfd *input_bfd,
5522 struct bfd_link_info *info,
5523 struct a8_erratum_fix **a8_fixes_p,
5524 unsigned int *num_a8_fixes_p,
5525 unsigned int *a8_fix_table_size_p,
5526 struct a8_erratum_reloc *a8_relocs,
5527 unsigned int num_a8_relocs,
5528 unsigned prev_num_a8_fixes,
5529 bool *stub_changed_p)
5530 {
5531 asection *section;
5532 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5533 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5534 unsigned int num_a8_fixes = *num_a8_fixes_p;
5535 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5536
5537 if (htab == NULL)
5538 return false;
5539
5540 for (section = input_bfd->sections;
5541 section != NULL;
5542 section = section->next)
5543 {
5544 bfd_byte *contents = NULL;
5545 struct _arm_elf_section_data *sec_data;
5546 unsigned int span;
5547 bfd_vma base_vma;
5548
5549 if (elf_section_type (section) != SHT_PROGBITS
5550 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5551 || (section->flags & SEC_EXCLUDE) != 0
5552 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5553 || (section->output_section == bfd_abs_section_ptr))
5554 continue;
5555
5556 base_vma = section->output_section->vma + section->output_offset;
5557
5558 if (elf_section_data (section)->this_hdr.contents != NULL)
5559 contents = elf_section_data (section)->this_hdr.contents;
5560 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5561 return true;
5562
5563 sec_data = elf32_arm_section_data (section);
5564
5565 for (span = 0; span < sec_data->mapcount; span++)
5566 {
5567 unsigned int span_start = sec_data->map[span].vma;
5568 unsigned int span_end = (span == sec_data->mapcount - 1)
5569 ? section->size : sec_data->map[span + 1].vma;
5570 unsigned int i;
5571 char span_type = sec_data->map[span].type;
5572 bool last_was_32bit = false, last_was_branch = false;
5573
5574 if (span_type != 't')
5575 continue;
5576
5577 /* Span is entirely within a single 4KB region: skip scanning. */
5578 if (((base_vma + span_start) & ~0xfff)
5579 == ((base_vma + span_end) & ~0xfff))
5580 continue;
5581
5582 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5583
5584 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5585 * The branch target is in the same 4KB region as the
5586 first half of the branch.
5587 * The instruction before the branch is a 32-bit
5588 length non-branch instruction. */
5589 for (i = span_start; i < span_end;)
5590 {
5591 unsigned int insn = bfd_getl16 (&contents[i]);
5592 bool insn_32bit = false, is_blx = false, is_b = false;
5593 bool is_bl = false, is_bcc = false, is_32bit_branch;
5594
5595 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5596 insn_32bit = true;
5597
5598 if (insn_32bit)
5599 {
5600 /* Load the rest of the insn (in manual-friendly order). */
5601 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5602
5603 /* Encoding T4: B<c>.W. */
5604 is_b = (insn & 0xf800d000) == 0xf0009000;
5605 /* Encoding T1: BL<c>.W. */
5606 is_bl = (insn & 0xf800d000) == 0xf000d000;
5607 /* Encoding T2: BLX<c>.W. */
5608 is_blx = (insn & 0xf800d000) == 0xf000c000;
5609 /* Encoding T3: B<c>.W (not permitted in IT block). */
5610 is_bcc = (insn & 0xf800d000) == 0xf0008000
5611 && (insn & 0x07f00000) != 0x03800000;
5612 }
5613
5614 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5615
5616 if (((base_vma + i) & 0xfff) == 0xffe
5617 && insn_32bit
5618 && is_32bit_branch
5619 && last_was_32bit
5620 && ! last_was_branch)
5621 {
5622 bfd_signed_vma offset = 0;
5623 bool force_target_arm = false;
5624 bool force_target_thumb = false;
5625 bfd_vma target;
5626 enum elf32_arm_stub_type stub_type = arm_stub_none;
5627 struct a8_erratum_reloc key, *found;
5628 bool use_plt = false;
5629
5630 key.from = base_vma + i;
5631 found = (struct a8_erratum_reloc *)
5632 bsearch (&key, a8_relocs, num_a8_relocs,
5633 sizeof (struct a8_erratum_reloc),
5634 &a8_reloc_compare);
5635
5636 if (found)
5637 {
5638 char *error_message = NULL;
5639 struct elf_link_hash_entry *entry;
5640
5641 /* We don't care about the error returned from this
5642 function, only if there is glue or not. */
5643 entry = find_thumb_glue (info, found->sym_name,
5644 &error_message);
5645
5646 if (entry)
5647 found->non_a8_stub = true;
5648
5649 /* Keep a simpler condition, for the sake of clarity. */
5650 if (htab->root.splt != NULL && found->hash != NULL
5651 && found->hash->root.plt.offset != (bfd_vma) -1)
5652 use_plt = true;
5653
5654 if (found->r_type == R_ARM_THM_CALL)
5655 {
5656 if (found->branch_type == ST_BRANCH_TO_ARM
5657 || use_plt)
5658 force_target_arm = true;
5659 else
5660 force_target_thumb = true;
5661 }
5662 }
5663
5664 /* Check if we have an offending branch instruction. */
5665
5666 if (found && found->non_a8_stub)
5667 /* We've already made a stub for this instruction, e.g.
5668 it's a long branch or a Thumb->ARM stub. Assume that
5669 stub will suffice to work around the A8 erratum (see
5670 setting of always_after_branch above). */
5671 ;
5672 else if (is_bcc)
5673 {
5674 offset = (insn & 0x7ff) << 1;
5675 offset |= (insn & 0x3f0000) >> 4;
5676 offset |= (insn & 0x2000) ? 0x40000 : 0;
5677 offset |= (insn & 0x800) ? 0x80000 : 0;
5678 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5679 if (offset & 0x100000)
5680 offset |= ~ ((bfd_signed_vma) 0xfffff);
5681 stub_type = arm_stub_a8_veneer_b_cond;
5682 }
5683 else if (is_b || is_bl || is_blx)
5684 {
5685 int s = (insn & 0x4000000) != 0;
5686 int j1 = (insn & 0x2000) != 0;
5687 int j2 = (insn & 0x800) != 0;
5688 int i1 = !(j1 ^ s);
5689 int i2 = !(j2 ^ s);
5690
5691 offset = (insn & 0x7ff) << 1;
5692 offset |= (insn & 0x3ff0000) >> 4;
5693 offset |= i2 << 22;
5694 offset |= i1 << 23;
5695 offset |= s << 24;
5696 if (offset & 0x1000000)
5697 offset |= ~ ((bfd_signed_vma) 0xffffff);
5698
5699 if (is_blx)
5700 offset &= ~ ((bfd_signed_vma) 3);
5701
5702 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5703 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5704 }
5705
5706 if (stub_type != arm_stub_none)
5707 {
5708 bfd_vma pc_for_insn = base_vma + i + 4;
5709
5710 /* The original instruction is a BL, but the target is
5711 an ARM instruction. If we were not making a stub,
5712 the BL would have been converted to a BLX. Use the
5713 BLX stub instead in that case. */
5714 if (htab->use_blx && force_target_arm
5715 && stub_type == arm_stub_a8_veneer_bl)
5716 {
5717 stub_type = arm_stub_a8_veneer_blx;
5718 is_blx = true;
5719 is_bl = false;
5720 }
5721 /* Conversely, if the original instruction was
5722 BLX but the target is Thumb mode, use the BL
5723 stub. */
5724 else if (force_target_thumb
5725 && stub_type == arm_stub_a8_veneer_blx)
5726 {
5727 stub_type = arm_stub_a8_veneer_bl;
5728 is_blx = false;
5729 is_bl = true;
5730 }
5731
5732 if (is_blx)
5733 pc_for_insn &= ~ ((bfd_vma) 3);
5734
5735 /* If we found a relocation, use the proper destination,
5736 not the offset in the (unrelocated) instruction.
5737 Note this is always done if we switched the stub type
5738 above. */
5739 if (found)
5740 offset =
5741 (bfd_signed_vma) (found->destination - pc_for_insn);
5742
5743 /* If the stub will use a Thumb-mode branch to a
5744 PLT target, redirect it to the preceding Thumb
5745 entry point. */
5746 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5747 offset -= PLT_THUMB_STUB_SIZE;
5748
5749 target = pc_for_insn + offset;
5750
5751 /* The BLX stub is ARM-mode code. Adjust the offset to
5752 take the different PC value (+8 instead of +4) into
5753 account. */
5754 if (stub_type == arm_stub_a8_veneer_blx)
5755 offset += 4;
5756
5757 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5758 {
5759 char *stub_name = NULL;
5760
5761 if (num_a8_fixes == a8_fix_table_size)
5762 {
5763 a8_fix_table_size *= 2;
5764 a8_fixes = (struct a8_erratum_fix *)
5765 bfd_realloc (a8_fixes,
5766 sizeof (struct a8_erratum_fix)
5767 * a8_fix_table_size);
5768 }
5769
5770 if (num_a8_fixes < prev_num_a8_fixes)
5771 {
5772 /* If we're doing a subsequent scan,
5773 check if we've found the same fix as
5774 before, and try and reuse the stub
5775 name. */
5776 stub_name = a8_fixes[num_a8_fixes].stub_name;
5777 if ((a8_fixes[num_a8_fixes].section != section)
5778 || (a8_fixes[num_a8_fixes].offset != i))
5779 {
5780 free (stub_name);
5781 stub_name = NULL;
5782 *stub_changed_p = true;
5783 }
5784 }
5785
5786 if (!stub_name)
5787 {
5788 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5789 if (stub_name != NULL)
5790 sprintf (stub_name, "%x:%x", section->id, i);
5791 }
5792
5793 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5794 a8_fixes[num_a8_fixes].section = section;
5795 a8_fixes[num_a8_fixes].offset = i;
5796 a8_fixes[num_a8_fixes].target_offset =
5797 target - base_vma;
5798 a8_fixes[num_a8_fixes].orig_insn = insn;
5799 a8_fixes[num_a8_fixes].stub_name = stub_name;
5800 a8_fixes[num_a8_fixes].stub_type = stub_type;
5801 a8_fixes[num_a8_fixes].branch_type =
5802 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5803
5804 num_a8_fixes++;
5805 }
5806 }
5807 }
5808
5809 i += insn_32bit ? 4 : 2;
5810 last_was_32bit = insn_32bit;
5811 last_was_branch = is_32bit_branch;
5812 }
5813 }
5814
5815 if (elf_section_data (section)->this_hdr.contents == NULL)
5816 free (contents);
5817 }
5818
5819 *a8_fixes_p = a8_fixes;
5820 *num_a8_fixes_p = num_a8_fixes;
5821 *a8_fix_table_size_p = a8_fix_table_size;
5822
5823 return false;
5824 }
5825
5826 /* Create or update a stub entry depending on whether the stub can already be
5827 found in HTAB. The stub is identified by:
5828 - its type STUB_TYPE
5829 - its source branch (note that several can share the same stub) whose
5830 section and relocation (if any) are given by SECTION and IRELA
5831 respectively
5832 - its target symbol whose input section, hash, name, value and branch type
5833 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5834 respectively
5835
5836 If found, the value of the stub's target symbol is updated from SYM_VALUE
5837 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5838 TRUE and the stub entry is initialized.
5839
5840 Returns the stub that was created or updated, or NULL if an error
5841 occurred. */
5842
5843 static struct elf32_arm_stub_hash_entry *
5844 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5845 enum elf32_arm_stub_type stub_type, asection *section,
5846 Elf_Internal_Rela *irela, asection *sym_sec,
5847 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5848 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5849 bool *new_stub)
5850 {
5851 const asection *id_sec;
5852 char *stub_name;
5853 struct elf32_arm_stub_hash_entry *stub_entry;
5854 unsigned int r_type;
5855 bool sym_claimed = arm_stub_sym_claimed (stub_type);
5856
5857 BFD_ASSERT (stub_type != arm_stub_none);
5858 *new_stub = false;
5859
5860 if (sym_claimed)
5861 stub_name = sym_name;
5862 else
5863 {
5864 BFD_ASSERT (irela);
5865 BFD_ASSERT (section);
5866 BFD_ASSERT (section->id <= htab->top_id);
5867
5868 /* Support for grouping stub sections. */
5869 id_sec = htab->stub_group[section->id].link_sec;
5870
5871 /* Get the name of this stub. */
5872 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5873 stub_type);
5874 if (!stub_name)
5875 return NULL;
5876 }
5877
5878 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, false,
5879 false);
5880 /* The proper stub has already been created, just update its value. */
5881 if (stub_entry != NULL)
5882 {
5883 if (!sym_claimed)
5884 free (stub_name);
5885 stub_entry->target_value = sym_value;
5886 return stub_entry;
5887 }
5888
5889 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5890 if (stub_entry == NULL)
5891 {
5892 if (!sym_claimed)
5893 free (stub_name);
5894 return NULL;
5895 }
5896
5897 stub_entry->target_value = sym_value;
5898 stub_entry->target_section = sym_sec;
5899 stub_entry->stub_type = stub_type;
5900 stub_entry->h = hash;
5901 stub_entry->branch_type = branch_type;
5902
5903 if (sym_claimed)
5904 stub_entry->output_name = sym_name;
5905 else
5906 {
5907 if (sym_name == NULL)
5908 sym_name = "unnamed";
5909 stub_entry->output_name = (char *)
5910 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5911 + strlen (sym_name));
5912 if (stub_entry->output_name == NULL)
5913 {
5914 free (stub_name);
5915 return NULL;
5916 }
5917
5918 /* For historical reasons, use the existing names for ARM-to-Thumb and
5919 Thumb-to-ARM stubs. */
5920 r_type = ELF32_R_TYPE (irela->r_info);
5921 if ((r_type == (unsigned int) R_ARM_THM_CALL
5922 || r_type == (unsigned int) R_ARM_THM_JUMP24
5923 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5924 && branch_type == ST_BRANCH_TO_ARM)
5925 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5926 else if ((r_type == (unsigned int) R_ARM_CALL
5927 || r_type == (unsigned int) R_ARM_JUMP24)
5928 && branch_type == ST_BRANCH_TO_THUMB)
5929 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5930 else
5931 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5932 }
5933
5934 *new_stub = true;
5935 return stub_entry;
5936 }
5937
5938 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5939 gateway veneer to transition from non secure to secure state and create them
5940 accordingly.
5941
5942 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5943 defines the conditions that govern Secure Gateway veneer creation for a
5944 given symbol <SYM> as follows:
5945 - it has function type
5946 - it has non local binding
5947 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5948 same type, binding and value as <SYM> (called normal symbol).
5949 An entry function can handle secure state transition itself in which case
5950 its special symbol would have a different value from the normal symbol.
5951
5952 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5953 entry mapping while HTAB gives the name to hash entry mapping.
5954 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5955 created.
5956
5957 The return value gives whether a stub failed to be allocated. */
5958
5959 static bool
5960 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5961 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5962 int *cmse_stub_created)
5963 {
5964 const struct elf_backend_data *bed;
5965 Elf_Internal_Shdr *symtab_hdr;
5966 unsigned i, j, sym_count, ext_start;
5967 Elf_Internal_Sym *cmse_sym, *local_syms;
5968 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5969 enum arm_st_branch_type branch_type;
5970 char *sym_name, *lsym_name;
5971 bfd_vma sym_value;
5972 asection *section;
5973 struct elf32_arm_stub_hash_entry *stub_entry;
5974 bool is_v8m, new_stub, cmse_invalid, ret = true;
5975
5976 bed = get_elf_backend_data (input_bfd);
5977 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5978 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5979 ext_start = symtab_hdr->sh_info;
5980 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5981 && out_attr[Tag_CPU_arch_profile].i == 'M');
5982
5983 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5984 if (local_syms == NULL)
5985 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5986 symtab_hdr->sh_info, 0, NULL, NULL,
5987 NULL);
5988 if (symtab_hdr->sh_info && local_syms == NULL)
5989 return false;
5990
5991 /* Scan symbols. */
5992 for (i = 0; i < sym_count; i++)
5993 {
5994 cmse_invalid = false;
5995
5996 if (i < ext_start)
5997 {
5998 cmse_sym = &local_syms[i];
5999 sym_name = bfd_elf_string_from_elf_section (input_bfd,
6000 symtab_hdr->sh_link,
6001 cmse_sym->st_name);
6002 if (!sym_name || !startswith (sym_name, CMSE_PREFIX))
6003 continue;
6004
6005 /* Special symbol with local binding. */
6006 cmse_invalid = true;
6007 }
6008 else
6009 {
6010 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
6011 if (cmse_hash == NULL)
6012 continue;
6013
6014 sym_name = (char *) cmse_hash->root.root.root.string;
6015 if (!startswith (sym_name, CMSE_PREFIX))
6016 continue;
6017
6018 /* Special symbol has incorrect binding or type. */
6019 if ((cmse_hash->root.root.type != bfd_link_hash_defined
6020 && cmse_hash->root.root.type != bfd_link_hash_defweak)
6021 || cmse_hash->root.type != STT_FUNC)
6022 cmse_invalid = true;
6023 }
6024
6025 if (!is_v8m)
6026 {
6027 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
6028 "ARMv8-M architecture or later"),
6029 input_bfd, sym_name);
6030 is_v8m = true; /* Avoid multiple warning. */
6031 ret = false;
6032 }
6033
6034 if (cmse_invalid)
6035 {
6036 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
6037 " a global or weak function symbol"),
6038 input_bfd, sym_name);
6039 ret = false;
6040 if (i < ext_start)
6041 continue;
6042 }
6043
6044 sym_name += strlen (CMSE_PREFIX);
6045 hash = (struct elf32_arm_link_hash_entry *)
6046 elf_link_hash_lookup (&(htab)->root, sym_name, false, false, true);
6047
6048 /* No associated normal symbol or it is neither global nor weak. */
6049 if (!hash
6050 || (hash->root.root.type != bfd_link_hash_defined
6051 && hash->root.root.type != bfd_link_hash_defweak)
6052 || hash->root.type != STT_FUNC)
6053 {
6054 /* Initialize here to avoid warning about use of possibly
6055 uninitialized variable. */
6056 j = 0;
6057
6058 if (!hash)
6059 {
6060 /* Searching for a normal symbol with local binding. */
6061 for (; j < ext_start; j++)
6062 {
6063 lsym_name =
6064 bfd_elf_string_from_elf_section (input_bfd,
6065 symtab_hdr->sh_link,
6066 local_syms[j].st_name);
6067 if (!strcmp (sym_name, lsym_name))
6068 break;
6069 }
6070 }
6071
6072 if (hash || j < ext_start)
6073 {
6074 _bfd_error_handler
6075 (_("%pB: invalid standard symbol `%s'; it must be "
6076 "a global or weak function symbol"),
6077 input_bfd, sym_name);
6078 }
6079 else
6080 _bfd_error_handler
6081 (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name);
6082 ret = false;
6083 if (!hash)
6084 continue;
6085 }
6086
6087 sym_value = hash->root.root.u.def.value;
6088 section = hash->root.root.u.def.section;
6089
6090 if (cmse_hash->root.root.u.def.section != section)
6091 {
6092 _bfd_error_handler
6093 (_("%pB: `%s' and its special symbol are in different sections"),
6094 input_bfd, sym_name);
6095 ret = false;
6096 }
6097 if (cmse_hash->root.root.u.def.value != sym_value)
6098 continue; /* Ignore: could be an entry function starting with SG. */
6099
6100 /* If this section is a link-once section that will be discarded, then
6101 don't create any stubs. */
6102 if (section->output_section == NULL)
6103 {
6104 _bfd_error_handler
6105 (_("%pB: entry function `%s' not output"), input_bfd, sym_name);
6106 continue;
6107 }
6108
6109 if (hash->root.size == 0)
6110 {
6111 _bfd_error_handler
6112 (_("%pB: entry function `%s' is empty"), input_bfd, sym_name);
6113 ret = false;
6114 }
6115
6116 if (!ret)
6117 continue;
6118 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6119 stub_entry
6120 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6121 NULL, NULL, section, hash, sym_name,
6122 sym_value, branch_type, &new_stub);
6123
6124 if (stub_entry == NULL)
6125 ret = false;
6126 else
6127 {
6128 BFD_ASSERT (new_stub);
6129 (*cmse_stub_created)++;
6130 }
6131 }
6132
6133 if (!symtab_hdr->contents)
6134 free (local_syms);
6135 return ret;
6136 }
6137
6138 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
6139 code entry function, ie can be called from non secure code without using a
6140 veneer. */
6141
6142 static bool
6143 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
6144 {
6145 bfd_byte contents[4];
6146 uint32_t first_insn;
6147 asection *section;
6148 file_ptr offset;
6149 bfd *abfd;
6150
6151 /* Defined symbol of function type. */
6152 if (hash->root.root.type != bfd_link_hash_defined
6153 && hash->root.root.type != bfd_link_hash_defweak)
6154 return false;
6155 if (hash->root.type != STT_FUNC)
6156 return false;
6157
6158 /* Read first instruction. */
6159 section = hash->root.root.u.def.section;
6160 abfd = section->owner;
6161 offset = hash->root.root.u.def.value - section->vma;
6162 if (!bfd_get_section_contents (abfd, section, contents, offset,
6163 sizeof (contents)))
6164 return false;
6165
6166 first_insn = bfd_get_32 (abfd, contents);
6167
6168 /* Starts by SG instruction. */
6169 return first_insn == 0xe97fe97f;
6170 }
6171
6172 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6173 secure gateway veneers (ie. the veneers was not in the input import library)
6174 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
6175
6176 static bool
6177 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
6178 {
6179 struct elf32_arm_stub_hash_entry *stub_entry;
6180 struct bfd_link_info *info;
6181
6182 /* Massage our args to the form they really have. */
6183 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
6184 info = (struct bfd_link_info *) gen_info;
6185
6186 if (info->out_implib_bfd)
6187 return true;
6188
6189 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
6190 return true;
6191
6192 if (stub_entry->stub_offset == (bfd_vma) -1)
6193 _bfd_error_handler (" %s", stub_entry->output_name);
6194
6195 return true;
6196 }
6197
6198 /* Set offset of each secure gateway veneers so that its address remain
6199 identical to the one in the input import library referred by
6200 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
6201 (present in input import library but absent from the executable being
6202 linked) or if new veneers appeared and there is no output import library
6203 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6204 number of secure gateway veneers found in the input import library.
6205
6206 The function returns whether an error occurred. If no error occurred,
6207 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6208 and this function and HTAB->new_cmse_stub_offset is set to the biggest
6209 veneer observed set for new veneers to be layed out after. */
6210
6211 static bool
6212 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
6213 struct elf32_arm_link_hash_table *htab,
6214 int *cmse_stub_created)
6215 {
6216 long symsize;
6217 char *sym_name;
6218 flagword flags;
6219 long i, symcount;
6220 bfd *in_implib_bfd;
6221 asection *stub_out_sec;
6222 bool ret = true;
6223 Elf_Internal_Sym *intsym;
6224 const char *out_sec_name;
6225 bfd_size_type cmse_stub_size;
6226 asymbol **sympp = NULL, *sym;
6227 struct elf32_arm_link_hash_entry *hash;
6228 const insn_sequence *cmse_stub_template;
6229 struct elf32_arm_stub_hash_entry *stub_entry;
6230 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
6231 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
6232 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
6233
6234 /* No input secure gateway import library. */
6235 if (!htab->in_implib_bfd)
6236 return true;
6237
6238 in_implib_bfd = htab->in_implib_bfd;
6239 if (!htab->cmse_implib)
6240 {
6241 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6242 "Gateway import libraries"), in_implib_bfd);
6243 return false;
6244 }
6245
6246 /* Get symbol table size. */
6247 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
6248 if (symsize < 0)
6249 return false;
6250
6251 /* Read in the input secure gateway import library's symbol table. */
6252 sympp = (asymbol **) bfd_malloc (symsize);
6253 if (sympp == NULL)
6254 return false;
6255
6256 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
6257 if (symcount < 0)
6258 {
6259 ret = false;
6260 goto free_sym_buf;
6261 }
6262
6263 htab->new_cmse_stub_offset = 0;
6264 cmse_stub_size =
6265 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
6266 &cmse_stub_template,
6267 &cmse_stub_template_size);
6268 out_sec_name =
6269 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
6270 stub_out_sec =
6271 bfd_get_section_by_name (htab->obfd, out_sec_name);
6272 if (stub_out_sec != NULL)
6273 cmse_stub_sec_vma = stub_out_sec->vma;
6274
6275 /* Set addresses of veneers mentionned in input secure gateway import
6276 library's symbol table. */
6277 for (i = 0; i < symcount; i++)
6278 {
6279 sym = sympp[i];
6280 flags = sym->flags;
6281 sym_name = (char *) bfd_asymbol_name (sym);
6282 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
6283
6284 if (sym->section != bfd_abs_section_ptr
6285 || !(flags & (BSF_GLOBAL | BSF_WEAK))
6286 || (flags & BSF_FUNCTION) != BSF_FUNCTION
6287 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
6288 != ST_BRANCH_TO_THUMB))
6289 {
6290 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6291 "symbol should be absolute, global and "
6292 "refer to Thumb functions"),
6293 in_implib_bfd, sym_name);
6294 ret = false;
6295 continue;
6296 }
6297
6298 veneer_value = bfd_asymbol_value (sym);
6299 stub_offset = veneer_value - cmse_stub_sec_vma;
6300 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
6301 false, false);
6302 hash = (struct elf32_arm_link_hash_entry *)
6303 elf_link_hash_lookup (&(htab)->root, sym_name, false, false, true);
6304
6305 /* Stub entry should have been created by cmse_scan or the symbol be of
6306 a secure function callable from non secure code. */
6307 if (!stub_entry && !hash)
6308 {
6309 bool new_stub;
6310
6311 _bfd_error_handler
6312 (_("entry function `%s' disappeared from secure code"), sym_name);
6313 hash = (struct elf32_arm_link_hash_entry *)
6314 elf_link_hash_lookup (&(htab)->root, sym_name, true, true, true);
6315 stub_entry
6316 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6317 NULL, NULL, bfd_abs_section_ptr, hash,
6318 sym_name, veneer_value,
6319 ST_BRANCH_TO_THUMB, &new_stub);
6320 if (stub_entry == NULL)
6321 ret = false;
6322 else
6323 {
6324 BFD_ASSERT (new_stub);
6325 new_cmse_stubs_created++;
6326 (*cmse_stub_created)++;
6327 }
6328 stub_entry->stub_template_size = stub_entry->stub_size = 0;
6329 stub_entry->stub_offset = stub_offset;
6330 }
6331 /* Symbol found is not callable from non secure code. */
6332 else if (!stub_entry)
6333 {
6334 if (!cmse_entry_fct_p (hash))
6335 {
6336 _bfd_error_handler (_("`%s' refers to a non entry function"),
6337 sym_name);
6338 ret = false;
6339 }
6340 continue;
6341 }
6342 else
6343 {
6344 /* Only stubs for SG veneers should have been created. */
6345 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6346
6347 /* Check visibility hasn't changed. */
6348 if (!!(flags & BSF_GLOBAL)
6349 != (hash->root.root.type == bfd_link_hash_defined))
6350 _bfd_error_handler
6351 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd,
6352 sym_name);
6353
6354 stub_entry->stub_offset = stub_offset;
6355 }
6356
6357 /* Size should match that of a SG veneer. */
6358 if (intsym->st_size != cmse_stub_size)
6359 {
6360 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6361 in_implib_bfd, sym_name);
6362 ret = false;
6363 }
6364
6365 /* Previous veneer address is before current SG veneer section. */
6366 if (veneer_value < cmse_stub_sec_vma)
6367 {
6368 /* Avoid offset underflow. */
6369 if (stub_entry)
6370 stub_entry->stub_offset = 0;
6371 stub_offset = 0;
6372 ret = false;
6373 }
6374
6375 /* Complain if stub offset not a multiple of stub size. */
6376 if (stub_offset % cmse_stub_size)
6377 {
6378 _bfd_error_handler
6379 (_("offset of veneer for entry function `%s' not a multiple of "
6380 "its size"), sym_name);
6381 ret = false;
6382 }
6383
6384 if (!ret)
6385 continue;
6386
6387 new_cmse_stubs_created--;
6388 if (veneer_value < cmse_stub_array_start)
6389 cmse_stub_array_start = veneer_value;
6390 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6391 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6392 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6393 }
6394
6395 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6396 {
6397 BFD_ASSERT (new_cmse_stubs_created > 0);
6398 _bfd_error_handler
6399 (_("new entry function(s) introduced but no output import library "
6400 "specified:"));
6401 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6402 }
6403
6404 if (cmse_stub_array_start != cmse_stub_sec_vma)
6405 {
6406 _bfd_error_handler
6407 (_("start address of `%s' is different from previous link"),
6408 out_sec_name);
6409 ret = false;
6410 }
6411
6412 free_sym_buf:
6413 free (sympp);
6414 return ret;
6415 }
6416
6417 /* Determine and set the size of the stub section for a final link.
6418
6419 The basic idea here is to examine all the relocations looking for
6420 PC-relative calls to a target that is unreachable with a "bl"
6421 instruction. */
6422
6423 bool
6424 elf32_arm_size_stubs (bfd *output_bfd,
6425 bfd *stub_bfd,
6426 struct bfd_link_info *info,
6427 bfd_signed_vma group_size,
6428 asection * (*add_stub_section) (const char *, asection *,
6429 asection *,
6430 unsigned int),
6431 void (*layout_sections_again) (void))
6432 {
6433 bool ret = true;
6434 obj_attribute *out_attr;
6435 int cmse_stub_created = 0;
6436 bfd_size_type stub_group_size;
6437 bool m_profile, stubs_always_after_branch, first_veneer_scan = true;
6438 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6439 struct a8_erratum_fix *a8_fixes = NULL;
6440 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6441 struct a8_erratum_reloc *a8_relocs = NULL;
6442 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6443
6444 if (htab == NULL)
6445 return false;
6446
6447 if (htab->fix_cortex_a8)
6448 {
6449 a8_fixes = (struct a8_erratum_fix *)
6450 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6451 a8_relocs = (struct a8_erratum_reloc *)
6452 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6453 }
6454
6455 /* Propagate mach to stub bfd, because it may not have been
6456 finalized when we created stub_bfd. */
6457 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6458 bfd_get_mach (output_bfd));
6459
6460 /* Stash our params away. */
6461 htab->stub_bfd = stub_bfd;
6462 htab->add_stub_section = add_stub_section;
6463 htab->layout_sections_again = layout_sections_again;
6464 stubs_always_after_branch = group_size < 0;
6465
6466 out_attr = elf_known_obj_attributes_proc (output_bfd);
6467 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6468
6469 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6470 as the first half of a 32-bit branch straddling two 4K pages. This is a
6471 crude way of enforcing that. */
6472 if (htab->fix_cortex_a8)
6473 stubs_always_after_branch = 1;
6474
6475 if (group_size < 0)
6476 stub_group_size = -group_size;
6477 else
6478 stub_group_size = group_size;
6479
6480 if (stub_group_size == 1)
6481 {
6482 /* Default values. */
6483 /* Thumb branch range is +-4MB has to be used as the default
6484 maximum size (a given section can contain both ARM and Thumb
6485 code, so the worst case has to be taken into account).
6486
6487 This value is 24K less than that, which allows for 2025
6488 12-byte stubs. If we exceed that, then we will fail to link.
6489 The user will have to relink with an explicit group size
6490 option. */
6491 stub_group_size = 4170000;
6492 }
6493
6494 group_sections (htab, stub_group_size, stubs_always_after_branch);
6495
6496 /* If we're applying the cortex A8 fix, we need to determine the
6497 program header size now, because we cannot change it later --
6498 that could alter section placements. Notice the A8 erratum fix
6499 ends up requiring the section addresses to remain unchanged
6500 modulo the page size. That's something we cannot represent
6501 inside BFD, and we don't want to force the section alignment to
6502 be the page size. */
6503 if (htab->fix_cortex_a8)
6504 (*htab->layout_sections_again) ();
6505
6506 while (1)
6507 {
6508 bfd *input_bfd;
6509 unsigned int bfd_indx;
6510 asection *stub_sec;
6511 enum elf32_arm_stub_type stub_type;
6512 bool stub_changed = false;
6513 unsigned prev_num_a8_fixes = num_a8_fixes;
6514
6515 num_a8_fixes = 0;
6516 for (input_bfd = info->input_bfds, bfd_indx = 0;
6517 input_bfd != NULL;
6518 input_bfd = input_bfd->link.next, bfd_indx++)
6519 {
6520 Elf_Internal_Shdr *symtab_hdr;
6521 asection *section;
6522 Elf_Internal_Sym *local_syms = NULL;
6523
6524 if (!is_arm_elf (input_bfd))
6525 continue;
6526 if ((input_bfd->flags & DYNAMIC) != 0
6527 && (elf_sym_hashes (input_bfd) == NULL
6528 || (elf_dyn_lib_class (input_bfd) & DYN_AS_NEEDED) != 0))
6529 continue;
6530
6531 num_a8_relocs = 0;
6532
6533 /* We'll need the symbol table in a second. */
6534 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6535 if (symtab_hdr->sh_info == 0)
6536 continue;
6537
6538 /* Limit scan of symbols to object file whose profile is
6539 Microcontroller to not hinder performance in the general case. */
6540 if (m_profile && first_veneer_scan)
6541 {
6542 struct elf_link_hash_entry **sym_hashes;
6543
6544 sym_hashes = elf_sym_hashes (input_bfd);
6545 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6546 &cmse_stub_created))
6547 goto error_ret_free_local;
6548
6549 if (cmse_stub_created != 0)
6550 stub_changed = true;
6551 }
6552
6553 /* Walk over each section attached to the input bfd. */
6554 for (section = input_bfd->sections;
6555 section != NULL;
6556 section = section->next)
6557 {
6558 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6559
6560 /* If there aren't any relocs, then there's nothing more
6561 to do. */
6562 if ((section->flags & SEC_RELOC) == 0
6563 || section->reloc_count == 0
6564 || (section->flags & SEC_CODE) == 0)
6565 continue;
6566
6567 /* If this section is a link-once section that will be
6568 discarded, then don't create any stubs. */
6569 if (section->output_section == NULL
6570 || section->output_section->owner != output_bfd)
6571 continue;
6572
6573 /* Get the relocs. */
6574 internal_relocs
6575 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6576 NULL, info->keep_memory);
6577 if (internal_relocs == NULL)
6578 goto error_ret_free_local;
6579
6580 /* Now examine each relocation. */
6581 irela = internal_relocs;
6582 irelaend = irela + section->reloc_count;
6583 for (; irela < irelaend; irela++)
6584 {
6585 unsigned int r_type, r_indx;
6586 asection *sym_sec;
6587 bfd_vma sym_value;
6588 bfd_vma destination;
6589 struct elf32_arm_link_hash_entry *hash;
6590 const char *sym_name;
6591 unsigned char st_type;
6592 enum arm_st_branch_type branch_type;
6593 bool created_stub = false;
6594
6595 r_type = ELF32_R_TYPE (irela->r_info);
6596 r_indx = ELF32_R_SYM (irela->r_info);
6597
6598 if (r_type >= (unsigned int) R_ARM_max)
6599 {
6600 bfd_set_error (bfd_error_bad_value);
6601 error_ret_free_internal:
6602 if (elf_section_data (section)->relocs == NULL)
6603 free (internal_relocs);
6604 /* Fall through. */
6605 error_ret_free_local:
6606 if (symtab_hdr->contents != (unsigned char *) local_syms)
6607 free (local_syms);
6608 return false;
6609 }
6610
6611 hash = NULL;
6612 if (r_indx >= symtab_hdr->sh_info)
6613 hash = elf32_arm_hash_entry
6614 (elf_sym_hashes (input_bfd)
6615 [r_indx - symtab_hdr->sh_info]);
6616
6617 /* Only look for stubs on branch instructions, or
6618 non-relaxed TLSCALL */
6619 if ((r_type != (unsigned int) R_ARM_CALL)
6620 && (r_type != (unsigned int) R_ARM_THM_CALL)
6621 && (r_type != (unsigned int) R_ARM_JUMP24)
6622 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6623 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6624 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6625 && (r_type != (unsigned int) R_ARM_PLT32)
6626 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6627 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6628 && r_type == (elf32_arm_tls_transition
6629 (info, r_type,
6630 (struct elf_link_hash_entry *) hash))
6631 && ((hash ? hash->tls_type
6632 : (elf32_arm_local_got_tls_type
6633 (input_bfd)[r_indx]))
6634 & GOT_TLS_GDESC) != 0))
6635 continue;
6636
6637 /* Now determine the call target, its name, value,
6638 section. */
6639 sym_sec = NULL;
6640 sym_value = 0;
6641 destination = 0;
6642 sym_name = NULL;
6643
6644 if (r_type == (unsigned int) R_ARM_TLS_CALL
6645 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6646 {
6647 /* A non-relaxed TLS call. The target is the
6648 plt-resident trampoline and nothing to do
6649 with the symbol. */
6650 BFD_ASSERT (htab->tls_trampoline > 0);
6651 sym_sec = htab->root.splt;
6652 sym_value = htab->tls_trampoline;
6653 hash = 0;
6654 st_type = STT_FUNC;
6655 branch_type = ST_BRANCH_TO_ARM;
6656 }
6657 else if (!hash)
6658 {
6659 /* It's a local symbol. */
6660 Elf_Internal_Sym *sym;
6661
6662 if (local_syms == NULL)
6663 {
6664 local_syms
6665 = (Elf_Internal_Sym *) symtab_hdr->contents;
6666 if (local_syms == NULL)
6667 local_syms
6668 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6669 symtab_hdr->sh_info, 0,
6670 NULL, NULL, NULL);
6671 if (local_syms == NULL)
6672 goto error_ret_free_internal;
6673 }
6674
6675 sym = local_syms + r_indx;
6676 if (sym->st_shndx == SHN_UNDEF)
6677 sym_sec = bfd_und_section_ptr;
6678 else if (sym->st_shndx == SHN_ABS)
6679 sym_sec = bfd_abs_section_ptr;
6680 else if (sym->st_shndx == SHN_COMMON)
6681 sym_sec = bfd_com_section_ptr;
6682 else
6683 sym_sec =
6684 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6685
6686 if (!sym_sec)
6687 /* This is an undefined symbol. It can never
6688 be resolved. */
6689 continue;
6690
6691 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6692 sym_value = sym->st_value;
6693 destination = (sym_value + irela->r_addend
6694 + sym_sec->output_offset
6695 + sym_sec->output_section->vma);
6696 st_type = ELF_ST_TYPE (sym->st_info);
6697 branch_type =
6698 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6699 sym_name
6700 = bfd_elf_string_from_elf_section (input_bfd,
6701 symtab_hdr->sh_link,
6702 sym->st_name);
6703 }
6704 else
6705 {
6706 /* It's an external symbol. */
6707 while (hash->root.root.type == bfd_link_hash_indirect
6708 || hash->root.root.type == bfd_link_hash_warning)
6709 hash = ((struct elf32_arm_link_hash_entry *)
6710 hash->root.root.u.i.link);
6711
6712 if (hash->root.root.type == bfd_link_hash_defined
6713 || hash->root.root.type == bfd_link_hash_defweak)
6714 {
6715 sym_sec = hash->root.root.u.def.section;
6716 sym_value = hash->root.root.u.def.value;
6717
6718 struct elf32_arm_link_hash_table *globals =
6719 elf32_arm_hash_table (info);
6720
6721 /* For a destination in a shared library,
6722 use the PLT stub as target address to
6723 decide whether a branch stub is
6724 needed. */
6725 if (globals != NULL
6726 && globals->root.splt != NULL
6727 && hash != NULL
6728 && hash->root.plt.offset != (bfd_vma) -1)
6729 {
6730 sym_sec = globals->root.splt;
6731 sym_value = hash->root.plt.offset;
6732 if (sym_sec->output_section != NULL)
6733 destination = (sym_value
6734 + sym_sec->output_offset
6735 + sym_sec->output_section->vma);
6736 }
6737 else if (sym_sec->output_section != NULL)
6738 destination = (sym_value + irela->r_addend
6739 + sym_sec->output_offset
6740 + sym_sec->output_section->vma);
6741 }
6742 else if ((hash->root.root.type == bfd_link_hash_undefined)
6743 || (hash->root.root.type == bfd_link_hash_undefweak))
6744 {
6745 /* For a shared library, use the PLT stub as
6746 target address to decide whether a long
6747 branch stub is needed.
6748 For absolute code, they cannot be handled. */
6749 struct elf32_arm_link_hash_table *globals =
6750 elf32_arm_hash_table (info);
6751
6752 if (globals != NULL
6753 && globals->root.splt != NULL
6754 && hash != NULL
6755 && hash->root.plt.offset != (bfd_vma) -1)
6756 {
6757 sym_sec = globals->root.splt;
6758 sym_value = hash->root.plt.offset;
6759 if (sym_sec->output_section != NULL)
6760 destination = (sym_value
6761 + sym_sec->output_offset
6762 + sym_sec->output_section->vma);
6763 }
6764 else
6765 continue;
6766 }
6767 else
6768 {
6769 bfd_set_error (bfd_error_bad_value);
6770 goto error_ret_free_internal;
6771 }
6772 st_type = hash->root.type;
6773 branch_type =
6774 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6775 sym_name = hash->root.root.root.string;
6776 }
6777
6778 do
6779 {
6780 bool new_stub;
6781 struct elf32_arm_stub_hash_entry *stub_entry;
6782
6783 /* Determine what (if any) linker stub is needed. */
6784 stub_type = arm_type_of_stub (info, section, irela,
6785 st_type, &branch_type,
6786 hash, destination, sym_sec,
6787 input_bfd, sym_name);
6788 if (stub_type == arm_stub_none)
6789 break;
6790
6791 /* We've either created a stub for this reloc already,
6792 or we are about to. */
6793 stub_entry =
6794 elf32_arm_create_stub (htab, stub_type, section, irela,
6795 sym_sec, hash,
6796 (char *) sym_name, sym_value,
6797 branch_type, &new_stub);
6798
6799 created_stub = stub_entry != NULL;
6800 if (!created_stub)
6801 goto error_ret_free_internal;
6802 else if (!new_stub)
6803 break;
6804 else
6805 stub_changed = true;
6806 }
6807 while (0);
6808
6809 /* Look for relocations which might trigger Cortex-A8
6810 erratum. */
6811 if (htab->fix_cortex_a8
6812 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6813 || r_type == (unsigned int) R_ARM_THM_JUMP19
6814 || r_type == (unsigned int) R_ARM_THM_CALL
6815 || r_type == (unsigned int) R_ARM_THM_XPC22))
6816 {
6817 bfd_vma from = section->output_section->vma
6818 + section->output_offset
6819 + irela->r_offset;
6820
6821 if ((from & 0xfff) == 0xffe)
6822 {
6823 /* Found a candidate. Note we haven't checked the
6824 destination is within 4K here: if we do so (and
6825 don't create an entry in a8_relocs) we can't tell
6826 that a branch should have been relocated when
6827 scanning later. */
6828 if (num_a8_relocs == a8_reloc_table_size)
6829 {
6830 a8_reloc_table_size *= 2;
6831 a8_relocs = (struct a8_erratum_reloc *)
6832 bfd_realloc (a8_relocs,
6833 sizeof (struct a8_erratum_reloc)
6834 * a8_reloc_table_size);
6835 }
6836
6837 a8_relocs[num_a8_relocs].from = from;
6838 a8_relocs[num_a8_relocs].destination = destination;
6839 a8_relocs[num_a8_relocs].r_type = r_type;
6840 a8_relocs[num_a8_relocs].branch_type = branch_type;
6841 a8_relocs[num_a8_relocs].sym_name = sym_name;
6842 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6843 a8_relocs[num_a8_relocs].hash = hash;
6844
6845 num_a8_relocs++;
6846 }
6847 }
6848 }
6849
6850 /* We're done with the internal relocs, free them. */
6851 if (elf_section_data (section)->relocs == NULL)
6852 free (internal_relocs);
6853 }
6854
6855 if (htab->fix_cortex_a8)
6856 {
6857 /* Sort relocs which might apply to Cortex-A8 erratum. */
6858 qsort (a8_relocs, num_a8_relocs,
6859 sizeof (struct a8_erratum_reloc),
6860 &a8_reloc_compare);
6861
6862 /* Scan for branches which might trigger Cortex-A8 erratum. */
6863 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6864 &num_a8_fixes, &a8_fix_table_size,
6865 a8_relocs, num_a8_relocs,
6866 prev_num_a8_fixes, &stub_changed)
6867 != 0)
6868 goto error_ret_free_local;
6869 }
6870
6871 if (local_syms != NULL
6872 && symtab_hdr->contents != (unsigned char *) local_syms)
6873 {
6874 if (!info->keep_memory)
6875 free (local_syms);
6876 else
6877 symtab_hdr->contents = (unsigned char *) local_syms;
6878 }
6879 }
6880
6881 if (first_veneer_scan
6882 && !set_cmse_veneer_addr_from_implib (info, htab,
6883 &cmse_stub_created))
6884 ret = false;
6885
6886 if (prev_num_a8_fixes != num_a8_fixes)
6887 stub_changed = true;
6888
6889 if (!stub_changed)
6890 break;
6891
6892 /* OK, we've added some stubs. Find out the new size of the
6893 stub sections. */
6894 for (stub_sec = htab->stub_bfd->sections;
6895 stub_sec != NULL;
6896 stub_sec = stub_sec->next)
6897 {
6898 /* Ignore non-stub sections. */
6899 if (!strstr (stub_sec->name, STUB_SUFFIX))
6900 continue;
6901
6902 stub_sec->size = 0;
6903 }
6904
6905 /* Add new SG veneers after those already in the input import
6906 library. */
6907 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6908 stub_type++)
6909 {
6910 bfd_vma *start_offset_p;
6911 asection **stub_sec_p;
6912
6913 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6914 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6915 if (start_offset_p == NULL)
6916 continue;
6917
6918 BFD_ASSERT (stub_sec_p != NULL);
6919 if (*stub_sec_p != NULL)
6920 (*stub_sec_p)->size = *start_offset_p;
6921 }
6922
6923 /* Compute stub section size, considering padding. */
6924 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6925 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6926 stub_type++)
6927 {
6928 int size, padding;
6929 asection **stub_sec_p;
6930
6931 padding = arm_dedicated_stub_section_padding (stub_type);
6932 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6933 /* Skip if no stub input section or no stub section padding
6934 required. */
6935 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6936 continue;
6937 /* Stub section padding required but no dedicated section. */
6938 BFD_ASSERT (stub_sec_p);
6939
6940 size = (*stub_sec_p)->size;
6941 size = (size + padding - 1) & ~(padding - 1);
6942 (*stub_sec_p)->size = size;
6943 }
6944
6945 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6946 if (htab->fix_cortex_a8)
6947 for (i = 0; i < num_a8_fixes; i++)
6948 {
6949 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6950 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6951
6952 if (stub_sec == NULL)
6953 return false;
6954
6955 stub_sec->size
6956 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6957 NULL);
6958 }
6959
6960
6961 /* Ask the linker to do its stuff. */
6962 (*htab->layout_sections_again) ();
6963 first_veneer_scan = false;
6964 }
6965
6966 /* Add stubs for Cortex-A8 erratum fixes now. */
6967 if (htab->fix_cortex_a8)
6968 {
6969 for (i = 0; i < num_a8_fixes; i++)
6970 {
6971 struct elf32_arm_stub_hash_entry *stub_entry;
6972 char *stub_name = a8_fixes[i].stub_name;
6973 asection *section = a8_fixes[i].section;
6974 unsigned int section_id = a8_fixes[i].section->id;
6975 asection *link_sec = htab->stub_group[section_id].link_sec;
6976 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6977 const insn_sequence *template_sequence;
6978 int template_size, size = 0;
6979
6980 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6981 true, false);
6982 if (stub_entry == NULL)
6983 {
6984 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6985 section->owner, stub_name);
6986 return false;
6987 }
6988
6989 stub_entry->stub_sec = stub_sec;
6990 stub_entry->stub_offset = (bfd_vma) -1;
6991 stub_entry->id_sec = link_sec;
6992 stub_entry->stub_type = a8_fixes[i].stub_type;
6993 stub_entry->source_value = a8_fixes[i].offset;
6994 stub_entry->target_section = a8_fixes[i].section;
6995 stub_entry->target_value = a8_fixes[i].target_offset;
6996 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6997 stub_entry->branch_type = a8_fixes[i].branch_type;
6998
6999 size = find_stub_size_and_template (a8_fixes[i].stub_type,
7000 &template_sequence,
7001 &template_size);
7002
7003 stub_entry->stub_size = size;
7004 stub_entry->stub_template = template_sequence;
7005 stub_entry->stub_template_size = template_size;
7006 }
7007
7008 /* Stash the Cortex-A8 erratum fix array for use later in
7009 elf32_arm_write_section(). */
7010 htab->a8_erratum_fixes = a8_fixes;
7011 htab->num_a8_erratum_fixes = num_a8_fixes;
7012 }
7013 else
7014 {
7015 htab->a8_erratum_fixes = NULL;
7016 htab->num_a8_erratum_fixes = 0;
7017 }
7018 return ret;
7019 }
7020
7021 /* Build all the stubs associated with the current output file. The
7022 stubs are kept in a hash table attached to the main linker hash
7023 table. We also set up the .plt entries for statically linked PIC
7024 functions here. This function is called via arm_elf_finish in the
7025 linker. */
7026
7027 bool
7028 elf32_arm_build_stubs (struct bfd_link_info *info)
7029 {
7030 asection *stub_sec;
7031 struct bfd_hash_table *table;
7032 enum elf32_arm_stub_type stub_type;
7033 struct elf32_arm_link_hash_table *htab;
7034
7035 htab = elf32_arm_hash_table (info);
7036 if (htab == NULL)
7037 return false;
7038
7039 for (stub_sec = htab->stub_bfd->sections;
7040 stub_sec != NULL;
7041 stub_sec = stub_sec->next)
7042 {
7043 bfd_size_type size;
7044
7045 /* Ignore non-stub sections. */
7046 if (!strstr (stub_sec->name, STUB_SUFFIX))
7047 continue;
7048
7049 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
7050 must at least be done for stub section requiring padding and for SG
7051 veneers to ensure that a non secure code branching to a removed SG
7052 veneer causes an error. */
7053 size = stub_sec->size;
7054 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
7055 if (stub_sec->contents == NULL && size != 0)
7056 return false;
7057
7058 stub_sec->size = 0;
7059 }
7060
7061 /* Add new SG veneers after those already in the input import library. */
7062 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7063 {
7064 bfd_vma *start_offset_p;
7065 asection **stub_sec_p;
7066
7067 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
7068 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
7069 if (start_offset_p == NULL)
7070 continue;
7071
7072 BFD_ASSERT (stub_sec_p != NULL);
7073 if (*stub_sec_p != NULL)
7074 (*stub_sec_p)->size = *start_offset_p;
7075 }
7076
7077 /* Build the stubs as directed by the stub hash table. */
7078 table = &htab->stub_hash_table;
7079 bfd_hash_traverse (table, arm_build_one_stub, info);
7080 if (htab->fix_cortex_a8)
7081 {
7082 /* Place the cortex a8 stubs last. */
7083 htab->fix_cortex_a8 = -1;
7084 bfd_hash_traverse (table, arm_build_one_stub, info);
7085 }
7086
7087 return true;
7088 }
7089
7090 /* Locate the Thumb encoded calling stub for NAME. */
7091
7092 static struct elf_link_hash_entry *
7093 find_thumb_glue (struct bfd_link_info *link_info,
7094 const char *name,
7095 char **error_message)
7096 {
7097 char *tmp_name;
7098 struct elf_link_hash_entry *hash;
7099 struct elf32_arm_link_hash_table *hash_table;
7100
7101 /* We need a pointer to the armelf specific hash table. */
7102 hash_table = elf32_arm_hash_table (link_info);
7103 if (hash_table == NULL)
7104 return NULL;
7105
7106 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7107 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
7108
7109 BFD_ASSERT (tmp_name);
7110
7111 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
7112
7113 hash = elf_link_hash_lookup
7114 (&(hash_table)->root, tmp_name, false, false, true);
7115
7116 if (hash == NULL
7117 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7118 "Thumb", tmp_name, name) == -1)
7119 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7120
7121 free (tmp_name);
7122
7123 return hash;
7124 }
7125
7126 /* Locate the ARM encoded calling stub for NAME. */
7127
7128 static struct elf_link_hash_entry *
7129 find_arm_glue (struct bfd_link_info *link_info,
7130 const char *name,
7131 char **error_message)
7132 {
7133 char *tmp_name;
7134 struct elf_link_hash_entry *myh;
7135 struct elf32_arm_link_hash_table *hash_table;
7136
7137 /* We need a pointer to the elfarm specific hash table. */
7138 hash_table = elf32_arm_hash_table (link_info);
7139 if (hash_table == NULL)
7140 return NULL;
7141
7142 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7143 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7144 BFD_ASSERT (tmp_name);
7145
7146 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7147
7148 myh = elf_link_hash_lookup
7149 (&(hash_table)->root, tmp_name, false, false, true);
7150
7151 if (myh == NULL
7152 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7153 "ARM", tmp_name, name) == -1)
7154 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7155
7156 free (tmp_name);
7157
7158 return myh;
7159 }
7160
7161 /* ARM->Thumb glue (static images):
7162
7163 .arm
7164 __func_from_arm:
7165 ldr r12, __func_addr
7166 bx r12
7167 __func_addr:
7168 .word func @ behave as if you saw a ARM_32 reloc.
7169
7170 (v5t static images)
7171 .arm
7172 __func_from_arm:
7173 ldr pc, __func_addr
7174 __func_addr:
7175 .word func @ behave as if you saw a ARM_32 reloc.
7176
7177 (relocatable images)
7178 .arm
7179 __func_from_arm:
7180 ldr r12, __func_offset
7181 add r12, r12, pc
7182 bx r12
7183 __func_offset:
7184 .word func - . */
7185
7186 #define ARM2THUMB_STATIC_GLUE_SIZE 12
7187 static const insn32 a2t1_ldr_insn = 0xe59fc000;
7188 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
7189 static const insn32 a2t3_func_addr_insn = 0x00000001;
7190
7191 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7192 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
7193 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
7194
7195 #define ARM2THUMB_PIC_GLUE_SIZE 16
7196 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
7197 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
7198 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
7199
7200 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
7201
7202 .thumb .thumb
7203 .align 2 .align 2
7204 __func_from_thumb: __func_from_thumb:
7205 bx pc push {r6, lr}
7206 nop ldr r6, __func_addr
7207 .arm mov lr, pc
7208 b func bx r6
7209 .arm
7210 ;; back_to_thumb
7211 ldmia r13! {r6, lr}
7212 bx lr
7213 __func_addr:
7214 .word func */
7215
7216 #define THUMB2ARM_GLUE_SIZE 8
7217 static const insn16 t2a1_bx_pc_insn = 0x4778;
7218 static const insn16 t2a2_noop_insn = 0x46c0;
7219 static const insn32 t2a3_b_insn = 0xea000000;
7220
7221 #define VFP11_ERRATUM_VENEER_SIZE 8
7222 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7223 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7224
7225 #define ARM_BX_VENEER_SIZE 12
7226 static const insn32 armbx1_tst_insn = 0xe3100001;
7227 static const insn32 armbx2_moveq_insn = 0x01a0f000;
7228 static const insn32 armbx3_bx_insn = 0xe12fff10;
7229
7230 #ifndef ELFARM_NABI_C_INCLUDED
7231 static void
7232 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
7233 {
7234 asection * s;
7235 bfd_byte * contents;
7236
7237 if (size == 0)
7238 {
7239 /* Do not include empty glue sections in the output. */
7240 if (abfd != NULL)
7241 {
7242 s = bfd_get_linker_section (abfd, name);
7243 if (s != NULL)
7244 s->flags |= SEC_EXCLUDE;
7245 }
7246 return;
7247 }
7248
7249 BFD_ASSERT (abfd != NULL);
7250
7251 s = bfd_get_linker_section (abfd, name);
7252 BFD_ASSERT (s != NULL);
7253
7254 contents = (bfd_byte *) bfd_zalloc (abfd, size);
7255
7256 BFD_ASSERT (s->size == size);
7257 s->contents = contents;
7258 }
7259
7260 bool
7261 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
7262 {
7263 struct elf32_arm_link_hash_table * globals;
7264
7265 globals = elf32_arm_hash_table (info);
7266 BFD_ASSERT (globals != NULL);
7267
7268 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7269 globals->arm_glue_size,
7270 ARM2THUMB_GLUE_SECTION_NAME);
7271
7272 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7273 globals->thumb_glue_size,
7274 THUMB2ARM_GLUE_SECTION_NAME);
7275
7276 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7277 globals->vfp11_erratum_glue_size,
7278 VFP11_ERRATUM_VENEER_SECTION_NAME);
7279
7280 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7281 globals->stm32l4xx_erratum_glue_size,
7282 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7283
7284 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7285 globals->bx_glue_size,
7286 ARM_BX_GLUE_SECTION_NAME);
7287
7288 return true;
7289 }
7290
7291 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7292 returns the symbol identifying the stub. */
7293
7294 static struct elf_link_hash_entry *
7295 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
7296 struct elf_link_hash_entry * h)
7297 {
7298 const char * name = h->root.root.string;
7299 asection * s;
7300 char * tmp_name;
7301 struct elf_link_hash_entry * myh;
7302 struct bfd_link_hash_entry * bh;
7303 struct elf32_arm_link_hash_table * globals;
7304 bfd_vma val;
7305 bfd_size_type size;
7306
7307 globals = elf32_arm_hash_table (link_info);
7308 BFD_ASSERT (globals != NULL);
7309 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7310
7311 s = bfd_get_linker_section
7312 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
7313
7314 BFD_ASSERT (s != NULL);
7315
7316 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7317 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7318 BFD_ASSERT (tmp_name);
7319
7320 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7321
7322 myh = elf_link_hash_lookup
7323 (&(globals)->root, tmp_name, false, false, true);
7324
7325 if (myh != NULL)
7326 {
7327 /* We've already seen this guy. */
7328 free (tmp_name);
7329 return myh;
7330 }
7331
7332 /* The only trick here is using hash_table->arm_glue_size as the value.
7333 Even though the section isn't allocated yet, this is where we will be
7334 putting it. The +1 on the value marks that the stub has not been
7335 output yet - not that it is a Thumb function. */
7336 bh = NULL;
7337 val = globals->arm_glue_size + 1;
7338 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7339 tmp_name, BSF_GLOBAL, s, val,
7340 NULL, true, false, &bh);
7341
7342 myh = (struct elf_link_hash_entry *) bh;
7343 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7344 myh->forced_local = 1;
7345
7346 free (tmp_name);
7347
7348 if (bfd_link_pic (link_info)
7349 || globals->root.is_relocatable_executable
7350 || globals->pic_veneer)
7351 size = ARM2THUMB_PIC_GLUE_SIZE;
7352 else if (globals->use_blx)
7353 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7354 else
7355 size = ARM2THUMB_STATIC_GLUE_SIZE;
7356
7357 s->size += size;
7358 globals->arm_glue_size += size;
7359
7360 return myh;
7361 }
7362
7363 /* Allocate space for ARMv4 BX veneers. */
7364
7365 static void
7366 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7367 {
7368 asection * s;
7369 struct elf32_arm_link_hash_table *globals;
7370 char *tmp_name;
7371 struct elf_link_hash_entry *myh;
7372 struct bfd_link_hash_entry *bh;
7373 bfd_vma val;
7374
7375 /* BX PC does not need a veneer. */
7376 if (reg == 15)
7377 return;
7378
7379 globals = elf32_arm_hash_table (link_info);
7380 BFD_ASSERT (globals != NULL);
7381 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7382
7383 /* Check if this veneer has already been allocated. */
7384 if (globals->bx_glue_offset[reg])
7385 return;
7386
7387 s = bfd_get_linker_section
7388 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7389
7390 BFD_ASSERT (s != NULL);
7391
7392 /* Add symbol for veneer. */
7393 tmp_name = (char *)
7394 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7395 BFD_ASSERT (tmp_name);
7396
7397 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7398
7399 myh = elf_link_hash_lookup
7400 (&(globals)->root, tmp_name, false, false, false);
7401
7402 BFD_ASSERT (myh == NULL);
7403
7404 bh = NULL;
7405 val = globals->bx_glue_size;
7406 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7407 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7408 NULL, true, false, &bh);
7409
7410 myh = (struct elf_link_hash_entry *) bh;
7411 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7412 myh->forced_local = 1;
7413
7414 s->size += ARM_BX_VENEER_SIZE;
7415 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7416 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7417 }
7418
7419
7420 /* Add an entry to the code/data map for section SEC. */
7421
7422 static void
7423 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7424 {
7425 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7426 unsigned int newidx;
7427
7428 if (sec_data->map == NULL)
7429 {
7430 sec_data->map = (elf32_arm_section_map *)
7431 bfd_malloc (sizeof (elf32_arm_section_map));
7432 sec_data->mapcount = 0;
7433 sec_data->mapsize = 1;
7434 }
7435
7436 newidx = sec_data->mapcount++;
7437
7438 if (sec_data->mapcount > sec_data->mapsize)
7439 {
7440 sec_data->mapsize *= 2;
7441 sec_data->map = (elf32_arm_section_map *)
7442 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7443 * sizeof (elf32_arm_section_map));
7444 }
7445
7446 if (sec_data->map)
7447 {
7448 sec_data->map[newidx].vma = vma;
7449 sec_data->map[newidx].type = type;
7450 }
7451 }
7452
7453
7454 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7455 veneers are handled for now. */
7456
7457 static bfd_vma
7458 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7459 elf32_vfp11_erratum_list *branch,
7460 bfd *branch_bfd,
7461 asection *branch_sec,
7462 unsigned int offset)
7463 {
7464 asection *s;
7465 struct elf32_arm_link_hash_table *hash_table;
7466 char *tmp_name;
7467 struct elf_link_hash_entry *myh;
7468 struct bfd_link_hash_entry *bh;
7469 bfd_vma val;
7470 struct _arm_elf_section_data *sec_data;
7471 elf32_vfp11_erratum_list *newerr;
7472
7473 hash_table = elf32_arm_hash_table (link_info);
7474 BFD_ASSERT (hash_table != NULL);
7475 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7476
7477 s = bfd_get_linker_section
7478 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7479
7480 sec_data = elf32_arm_section_data (s);
7481
7482 BFD_ASSERT (s != NULL);
7483
7484 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7485 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7486 BFD_ASSERT (tmp_name);
7487
7488 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7489 hash_table->num_vfp11_fixes);
7490
7491 myh = elf_link_hash_lookup
7492 (&(hash_table)->root, tmp_name, false, false, false);
7493
7494 BFD_ASSERT (myh == NULL);
7495
7496 bh = NULL;
7497 val = hash_table->vfp11_erratum_glue_size;
7498 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7499 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7500 NULL, true, false, &bh);
7501
7502 myh = (struct elf_link_hash_entry *) bh;
7503 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7504 myh->forced_local = 1;
7505
7506 /* Link veneer back to calling location. */
7507 sec_data->erratumcount += 1;
7508 newerr = (elf32_vfp11_erratum_list *)
7509 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7510
7511 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7512 newerr->vma = -1;
7513 newerr->u.v.branch = branch;
7514 newerr->u.v.id = hash_table->num_vfp11_fixes;
7515 branch->u.b.veneer = newerr;
7516
7517 newerr->next = sec_data->erratumlist;
7518 sec_data->erratumlist = newerr;
7519
7520 /* A symbol for the return from the veneer. */
7521 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7522 hash_table->num_vfp11_fixes);
7523
7524 myh = elf_link_hash_lookup
7525 (&(hash_table)->root, tmp_name, false, false, false);
7526
7527 if (myh != NULL)
7528 abort ();
7529
7530 bh = NULL;
7531 val = offset + 4;
7532 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7533 branch_sec, val, NULL, true, false, &bh);
7534
7535 myh = (struct elf_link_hash_entry *) bh;
7536 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7537 myh->forced_local = 1;
7538
7539 free (tmp_name);
7540
7541 /* Generate a mapping symbol for the veneer section, and explicitly add an
7542 entry for that symbol to the code/data map for the section. */
7543 if (hash_table->vfp11_erratum_glue_size == 0)
7544 {
7545 bh = NULL;
7546 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7547 ever requires this erratum fix. */
7548 _bfd_generic_link_add_one_symbol (link_info,
7549 hash_table->bfd_of_glue_owner, "$a",
7550 BSF_LOCAL, s, 0, NULL,
7551 true, false, &bh);
7552
7553 myh = (struct elf_link_hash_entry *) bh;
7554 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7555 myh->forced_local = 1;
7556
7557 /* The elf32_arm_init_maps function only cares about symbols from input
7558 BFDs. We must make a note of this generated mapping symbol
7559 ourselves so that code byteswapping works properly in
7560 elf32_arm_write_section. */
7561 elf32_arm_section_map_add (s, 'a', 0);
7562 }
7563
7564 s->size += VFP11_ERRATUM_VENEER_SIZE;
7565 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7566 hash_table->num_vfp11_fixes++;
7567
7568 /* The offset of the veneer. */
7569 return val;
7570 }
7571
7572 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7573 veneers need to be handled because used only in Cortex-M. */
7574
7575 static bfd_vma
7576 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7577 elf32_stm32l4xx_erratum_list *branch,
7578 bfd *branch_bfd,
7579 asection *branch_sec,
7580 unsigned int offset,
7581 bfd_size_type veneer_size)
7582 {
7583 asection *s;
7584 struct elf32_arm_link_hash_table *hash_table;
7585 char *tmp_name;
7586 struct elf_link_hash_entry *myh;
7587 struct bfd_link_hash_entry *bh;
7588 bfd_vma val;
7589 struct _arm_elf_section_data *sec_data;
7590 elf32_stm32l4xx_erratum_list *newerr;
7591
7592 hash_table = elf32_arm_hash_table (link_info);
7593 BFD_ASSERT (hash_table != NULL);
7594 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7595
7596 s = bfd_get_linker_section
7597 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7598
7599 BFD_ASSERT (s != NULL);
7600
7601 sec_data = elf32_arm_section_data (s);
7602
7603 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7604 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7605 BFD_ASSERT (tmp_name);
7606
7607 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7608 hash_table->num_stm32l4xx_fixes);
7609
7610 myh = elf_link_hash_lookup
7611 (&(hash_table)->root, tmp_name, false, false, false);
7612
7613 BFD_ASSERT (myh == NULL);
7614
7615 bh = NULL;
7616 val = hash_table->stm32l4xx_erratum_glue_size;
7617 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7618 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7619 NULL, true, false, &bh);
7620
7621 myh = (struct elf_link_hash_entry *) bh;
7622 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7623 myh->forced_local = 1;
7624
7625 /* Link veneer back to calling location. */
7626 sec_data->stm32l4xx_erratumcount += 1;
7627 newerr = (elf32_stm32l4xx_erratum_list *)
7628 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7629
7630 newerr->type = STM32L4XX_ERRATUM_VENEER;
7631 newerr->vma = -1;
7632 newerr->u.v.branch = branch;
7633 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7634 branch->u.b.veneer = newerr;
7635
7636 newerr->next = sec_data->stm32l4xx_erratumlist;
7637 sec_data->stm32l4xx_erratumlist = newerr;
7638
7639 /* A symbol for the return from the veneer. */
7640 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7641 hash_table->num_stm32l4xx_fixes);
7642
7643 myh = elf_link_hash_lookup
7644 (&(hash_table)->root, tmp_name, false, false, false);
7645
7646 if (myh != NULL)
7647 abort ();
7648
7649 bh = NULL;
7650 val = offset + 4;
7651 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7652 branch_sec, val, NULL, true, false, &bh);
7653
7654 myh = (struct elf_link_hash_entry *) bh;
7655 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7656 myh->forced_local = 1;
7657
7658 free (tmp_name);
7659
7660 /* Generate a mapping symbol for the veneer section, and explicitly add an
7661 entry for that symbol to the code/data map for the section. */
7662 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7663 {
7664 bh = NULL;
7665 /* Creates a THUMB symbol since there is no other choice. */
7666 _bfd_generic_link_add_one_symbol (link_info,
7667 hash_table->bfd_of_glue_owner, "$t",
7668 BSF_LOCAL, s, 0, NULL,
7669 true, false, &bh);
7670
7671 myh = (struct elf_link_hash_entry *) bh;
7672 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7673 myh->forced_local = 1;
7674
7675 /* The elf32_arm_init_maps function only cares about symbols from input
7676 BFDs. We must make a note of this generated mapping symbol
7677 ourselves so that code byteswapping works properly in
7678 elf32_arm_write_section. */
7679 elf32_arm_section_map_add (s, 't', 0);
7680 }
7681
7682 s->size += veneer_size;
7683 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7684 hash_table->num_stm32l4xx_fixes++;
7685
7686 /* The offset of the veneer. */
7687 return val;
7688 }
7689
7690 #define ARM_GLUE_SECTION_FLAGS \
7691 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7692 | SEC_READONLY | SEC_LINKER_CREATED)
7693
7694 /* Create a fake section for use by the ARM backend of the linker. */
7695
7696 static bool
7697 arm_make_glue_section (bfd * abfd, const char * name)
7698 {
7699 asection * sec;
7700
7701 sec = bfd_get_linker_section (abfd, name);
7702 if (sec != NULL)
7703 /* Already made. */
7704 return true;
7705
7706 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7707
7708 if (sec == NULL
7709 || !bfd_set_section_alignment (sec, 2))
7710 return false;
7711
7712 /* Set the gc mark to prevent the section from being removed by garbage
7713 collection, despite the fact that no relocs refer to this section. */
7714 sec->gc_mark = 1;
7715
7716 return true;
7717 }
7718
7719 /* Set size of .plt entries. This function is called from the
7720 linker scripts in ld/emultempl/{armelf}.em. */
7721
7722 void
7723 bfd_elf32_arm_use_long_plt (void)
7724 {
7725 elf32_arm_use_long_plt_entry = true;
7726 }
7727
7728 /* Add the glue sections to ABFD. This function is called from the
7729 linker scripts in ld/emultempl/{armelf}.em. */
7730
7731 bool
7732 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7733 struct bfd_link_info *info)
7734 {
7735 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7736 bool dostm32l4xx = globals
7737 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7738 bool addglue;
7739
7740 /* If we are only performing a partial
7741 link do not bother adding the glue. */
7742 if (bfd_link_relocatable (info))
7743 return true;
7744
7745 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7746 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7747 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7748 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7749
7750 if (!dostm32l4xx)
7751 return addglue;
7752
7753 return addglue
7754 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7755 }
7756
7757 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7758 ensures they are not marked for deletion by
7759 strip_excluded_output_sections () when veneers are going to be created
7760 later. Not doing so would trigger assert on empty section size in
7761 lang_size_sections_1 (). */
7762
7763 void
7764 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7765 {
7766 enum elf32_arm_stub_type stub_type;
7767
7768 /* If we are only performing a partial
7769 link do not bother adding the glue. */
7770 if (bfd_link_relocatable (info))
7771 return;
7772
7773 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7774 {
7775 asection *out_sec;
7776 const char *out_sec_name;
7777
7778 if (!arm_dedicated_stub_output_section_required (stub_type))
7779 continue;
7780
7781 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7782 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7783 if (out_sec != NULL)
7784 out_sec->flags |= SEC_KEEP;
7785 }
7786 }
7787
7788 /* Select a BFD to be used to hold the sections used by the glue code.
7789 This function is called from the linker scripts in ld/emultempl/
7790 {armelf/pe}.em. */
7791
7792 bool
7793 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7794 {
7795 struct elf32_arm_link_hash_table *globals;
7796
7797 /* If we are only performing a partial link
7798 do not bother getting a bfd to hold the glue. */
7799 if (bfd_link_relocatable (info))
7800 return true;
7801
7802 /* Make sure we don't attach the glue sections to a dynamic object. */
7803 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7804
7805 globals = elf32_arm_hash_table (info);
7806 BFD_ASSERT (globals != NULL);
7807
7808 if (globals->bfd_of_glue_owner != NULL)
7809 return true;
7810
7811 /* Save the bfd for later use. */
7812 globals->bfd_of_glue_owner = abfd;
7813
7814 return true;
7815 }
7816
7817 static void
7818 check_use_blx (struct elf32_arm_link_hash_table *globals)
7819 {
7820 int cpu_arch;
7821
7822 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7823 Tag_CPU_arch);
7824
7825 if (globals->fix_arm1176)
7826 {
7827 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7828 globals->use_blx = 1;
7829 }
7830 else
7831 {
7832 if (cpu_arch > TAG_CPU_ARCH_V4T)
7833 globals->use_blx = 1;
7834 }
7835 }
7836
7837 bool
7838 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7839 struct bfd_link_info *link_info)
7840 {
7841 Elf_Internal_Shdr *symtab_hdr;
7842 Elf_Internal_Rela *internal_relocs = NULL;
7843 Elf_Internal_Rela *irel, *irelend;
7844 bfd_byte *contents = NULL;
7845
7846 asection *sec;
7847 struct elf32_arm_link_hash_table *globals;
7848
7849 /* If we are only performing a partial link do not bother
7850 to construct any glue. */
7851 if (bfd_link_relocatable (link_info))
7852 return true;
7853
7854 /* Here we have a bfd that is to be included on the link. We have a
7855 hook to do reloc rummaging, before section sizes are nailed down. */
7856 globals = elf32_arm_hash_table (link_info);
7857 BFD_ASSERT (globals != NULL);
7858
7859 check_use_blx (globals);
7860
7861 if (globals->byteswap_code && !bfd_big_endian (abfd))
7862 {
7863 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7864 abfd);
7865 return false;
7866 }
7867
7868 /* PR 5398: If we have not decided to include any loadable sections in
7869 the output then we will not have a glue owner bfd. This is OK, it
7870 just means that there is nothing else for us to do here. */
7871 if (globals->bfd_of_glue_owner == NULL)
7872 return true;
7873
7874 /* Rummage around all the relocs and map the glue vectors. */
7875 sec = abfd->sections;
7876
7877 if (sec == NULL)
7878 return true;
7879
7880 for (; sec != NULL; sec = sec->next)
7881 {
7882 if (sec->reloc_count == 0)
7883 continue;
7884
7885 if ((sec->flags & SEC_EXCLUDE) != 0)
7886 continue;
7887
7888 symtab_hdr = & elf_symtab_hdr (abfd);
7889
7890 /* Load the relocs. */
7891 internal_relocs
7892 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, false);
7893
7894 if (internal_relocs == NULL)
7895 goto error_return;
7896
7897 irelend = internal_relocs + sec->reloc_count;
7898 for (irel = internal_relocs; irel < irelend; irel++)
7899 {
7900 long r_type;
7901 unsigned long r_index;
7902
7903 struct elf_link_hash_entry *h;
7904
7905 r_type = ELF32_R_TYPE (irel->r_info);
7906 r_index = ELF32_R_SYM (irel->r_info);
7907
7908 /* These are the only relocation types we care about. */
7909 if ( r_type != R_ARM_PC24
7910 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7911 continue;
7912
7913 /* Get the section contents if we haven't done so already. */
7914 if (contents == NULL)
7915 {
7916 /* Get cached copy if it exists. */
7917 if (elf_section_data (sec)->this_hdr.contents != NULL)
7918 contents = elf_section_data (sec)->this_hdr.contents;
7919 else
7920 {
7921 /* Go get them off disk. */
7922 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7923 goto error_return;
7924 }
7925 }
7926
7927 if (r_type == R_ARM_V4BX)
7928 {
7929 int reg;
7930
7931 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7932 record_arm_bx_glue (link_info, reg);
7933 continue;
7934 }
7935
7936 /* If the relocation is not against a symbol it cannot concern us. */
7937 h = NULL;
7938
7939 /* We don't care about local symbols. */
7940 if (r_index < symtab_hdr->sh_info)
7941 continue;
7942
7943 /* This is an external symbol. */
7944 r_index -= symtab_hdr->sh_info;
7945 h = (struct elf_link_hash_entry *)
7946 elf_sym_hashes (abfd)[r_index];
7947
7948 /* If the relocation is against a static symbol it must be within
7949 the current section and so cannot be a cross ARM/Thumb relocation. */
7950 if (h == NULL)
7951 continue;
7952
7953 /* If the call will go through a PLT entry then we do not need
7954 glue. */
7955 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7956 continue;
7957
7958 switch (r_type)
7959 {
7960 case R_ARM_PC24:
7961 /* This one is a call from arm code. We need to look up
7962 the target of the call. If it is a thumb target, we
7963 insert glue. */
7964 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7965 == ST_BRANCH_TO_THUMB)
7966 record_arm_to_thumb_glue (link_info, h);
7967 break;
7968
7969 default:
7970 abort ();
7971 }
7972 }
7973
7974 if (elf_section_data (sec)->this_hdr.contents != contents)
7975 free (contents);
7976 contents = NULL;
7977
7978 if (elf_section_data (sec)->relocs != internal_relocs)
7979 free (internal_relocs);
7980 internal_relocs = NULL;
7981 }
7982
7983 return true;
7984
7985 error_return:
7986 if (elf_section_data (sec)->this_hdr.contents != contents)
7987 free (contents);
7988 if (elf_section_data (sec)->relocs != internal_relocs)
7989 free (internal_relocs);
7990
7991 return false;
7992 }
7993 #endif
7994
7995
7996 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7997
7998 void
7999 bfd_elf32_arm_init_maps (bfd *abfd)
8000 {
8001 Elf_Internal_Sym *isymbuf;
8002 Elf_Internal_Shdr *hdr;
8003 unsigned int i, localsyms;
8004
8005 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
8006 if (! is_arm_elf (abfd))
8007 return;
8008
8009 if ((abfd->flags & DYNAMIC) != 0)
8010 return;
8011
8012 hdr = & elf_symtab_hdr (abfd);
8013 localsyms = hdr->sh_info;
8014
8015 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
8016 should contain the number of local symbols, which should come before any
8017 global symbols. Mapping symbols are always local. */
8018 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
8019 NULL);
8020
8021 /* No internal symbols read? Skip this BFD. */
8022 if (isymbuf == NULL)
8023 return;
8024
8025 for (i = 0; i < localsyms; i++)
8026 {
8027 Elf_Internal_Sym *isym = &isymbuf[i];
8028 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8029 const char *name;
8030
8031 if (sec != NULL
8032 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
8033 {
8034 name = bfd_elf_string_from_elf_section (abfd,
8035 hdr->sh_link, isym->st_name);
8036
8037 if (bfd_is_arm_special_symbol_name (name,
8038 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
8039 elf32_arm_section_map_add (sec, name[1], isym->st_value);
8040 }
8041 }
8042 }
8043
8044
8045 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
8046 say what they wanted. */
8047
8048 void
8049 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
8050 {
8051 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8052 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8053
8054 if (globals == NULL)
8055 return;
8056
8057 if (globals->fix_cortex_a8 == -1)
8058 {
8059 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
8060 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
8061 && (out_attr[Tag_CPU_arch_profile].i == 'A'
8062 || out_attr[Tag_CPU_arch_profile].i == 0))
8063 globals->fix_cortex_a8 = 1;
8064 else
8065 globals->fix_cortex_a8 = 0;
8066 }
8067 }
8068
8069
8070 void
8071 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
8072 {
8073 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8074 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8075
8076 if (globals == NULL)
8077 return;
8078 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
8079 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
8080 {
8081 switch (globals->vfp11_fix)
8082 {
8083 case BFD_ARM_VFP11_FIX_DEFAULT:
8084 case BFD_ARM_VFP11_FIX_NONE:
8085 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8086 break;
8087
8088 default:
8089 /* Give a warning, but do as the user requests anyway. */
8090 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
8091 "workaround is not necessary for target architecture"), obfd);
8092 }
8093 }
8094 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
8095 /* For earlier architectures, we might need the workaround, but do not
8096 enable it by default. If users is running with broken hardware, they
8097 must enable the erratum fix explicitly. */
8098 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8099 }
8100
8101 void
8102 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
8103 {
8104 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8105 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8106
8107 if (globals == NULL)
8108 return;
8109
8110 /* We assume only Cortex-M4 may require the fix. */
8111 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
8112 || out_attr[Tag_CPU_arch_profile].i != 'M')
8113 {
8114 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
8115 /* Give a warning, but do as the user requests anyway. */
8116 _bfd_error_handler
8117 (_("%pB: warning: selected STM32L4XX erratum "
8118 "workaround is not necessary for target architecture"), obfd);
8119 }
8120 }
8121
8122 enum bfd_arm_vfp11_pipe
8123 {
8124 VFP11_FMAC,
8125 VFP11_LS,
8126 VFP11_DS,
8127 VFP11_BAD
8128 };
8129
8130 /* Return a VFP register number. This is encoded as RX:X for single-precision
8131 registers, or X:RX for double-precision registers, where RX is the group of
8132 four bits in the instruction encoding and X is the single extension bit.
8133 RX and X fields are specified using their lowest (starting) bit. The return
8134 value is:
8135
8136 0...31: single-precision registers s0...s31
8137 32...63: double-precision registers d0...d31.
8138
8139 Although X should be zero for VFP11 (encoding d0...d15 only), we might
8140 encounter VFP3 instructions, so we allow the full range for DP registers. */
8141
8142 static unsigned int
8143 bfd_arm_vfp11_regno (unsigned int insn, bool is_double, unsigned int rx,
8144 unsigned int x)
8145 {
8146 if (is_double)
8147 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
8148 else
8149 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
8150 }
8151
8152 /* Set bits in *WMASK according to a register number REG as encoded by
8153 bfd_arm_vfp11_regno(). Ignore d16-d31. */
8154
8155 static void
8156 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
8157 {
8158 if (reg < 32)
8159 *wmask |= 1 << reg;
8160 else if (reg < 48)
8161 *wmask |= 3 << ((reg - 32) * 2);
8162 }
8163
8164 /* Return TRUE if WMASK overwrites anything in REGS. */
8165
8166 static bool
8167 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
8168 {
8169 int i;
8170
8171 for (i = 0; i < numregs; i++)
8172 {
8173 unsigned int reg = regs[i];
8174
8175 if (reg < 32 && (wmask & (1 << reg)) != 0)
8176 return true;
8177
8178 reg -= 32;
8179
8180 if (reg >= 16)
8181 continue;
8182
8183 if ((wmask & (3 << (reg * 2))) != 0)
8184 return true;
8185 }
8186
8187 return false;
8188 }
8189
8190 /* In this function, we're interested in two things: finding input registers
8191 for VFP data-processing instructions, and finding the set of registers which
8192 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
8193 hold the written set, so FLDM etc. are easy to deal with (we're only
8194 interested in 32 SP registers or 16 dp registers, due to the VFP version
8195 implemented by the chip in question). DP registers are marked by setting
8196 both SP registers in the write mask). */
8197
8198 static enum bfd_arm_vfp11_pipe
8199 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
8200 int *numregs)
8201 {
8202 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
8203 bool is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
8204
8205 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
8206 {
8207 unsigned int pqrs;
8208 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8209 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8210
8211 pqrs = ((insn & 0x00800000) >> 20)
8212 | ((insn & 0x00300000) >> 19)
8213 | ((insn & 0x00000040) >> 6);
8214
8215 switch (pqrs)
8216 {
8217 case 0: /* fmac[sd]. */
8218 case 1: /* fnmac[sd]. */
8219 case 2: /* fmsc[sd]. */
8220 case 3: /* fnmsc[sd]. */
8221 vpipe = VFP11_FMAC;
8222 bfd_arm_vfp11_write_mask (destmask, fd);
8223 regs[0] = fd;
8224 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8225 regs[2] = fm;
8226 *numregs = 3;
8227 break;
8228
8229 case 4: /* fmul[sd]. */
8230 case 5: /* fnmul[sd]. */
8231 case 6: /* fadd[sd]. */
8232 case 7: /* fsub[sd]. */
8233 vpipe = VFP11_FMAC;
8234 goto vfp_binop;
8235
8236 case 8: /* fdiv[sd]. */
8237 vpipe = VFP11_DS;
8238 vfp_binop:
8239 bfd_arm_vfp11_write_mask (destmask, fd);
8240 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8241 regs[1] = fm;
8242 *numregs = 2;
8243 break;
8244
8245 case 15: /* extended opcode. */
8246 {
8247 unsigned int extn = ((insn >> 15) & 0x1e)
8248 | ((insn >> 7) & 1);
8249
8250 switch (extn)
8251 {
8252 case 0: /* fcpy[sd]. */
8253 case 1: /* fabs[sd]. */
8254 case 2: /* fneg[sd]. */
8255 case 8: /* fcmp[sd]. */
8256 case 9: /* fcmpe[sd]. */
8257 case 10: /* fcmpz[sd]. */
8258 case 11: /* fcmpez[sd]. */
8259 case 16: /* fuito[sd]. */
8260 case 17: /* fsito[sd]. */
8261 case 24: /* ftoui[sd]. */
8262 case 25: /* ftouiz[sd]. */
8263 case 26: /* ftosi[sd]. */
8264 case 27: /* ftosiz[sd]. */
8265 /* These instructions will not bounce due to underflow. */
8266 *numregs = 0;
8267 vpipe = VFP11_FMAC;
8268 break;
8269
8270 case 3: /* fsqrt[sd]. */
8271 /* fsqrt cannot underflow, but it can (perhaps) overwrite
8272 registers to cause the erratum in previous instructions. */
8273 bfd_arm_vfp11_write_mask (destmask, fd);
8274 vpipe = VFP11_DS;
8275 break;
8276
8277 case 15: /* fcvt{ds,sd}. */
8278 {
8279 int rnum = 0;
8280
8281 bfd_arm_vfp11_write_mask (destmask, fd);
8282
8283 /* Only FCVTSD can underflow. */
8284 if ((insn & 0x100) != 0)
8285 regs[rnum++] = fm;
8286
8287 *numregs = rnum;
8288
8289 vpipe = VFP11_FMAC;
8290 }
8291 break;
8292
8293 default:
8294 return VFP11_BAD;
8295 }
8296 }
8297 break;
8298
8299 default:
8300 return VFP11_BAD;
8301 }
8302 }
8303 /* Two-register transfer. */
8304 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
8305 {
8306 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8307
8308 if ((insn & 0x100000) == 0)
8309 {
8310 if (is_double)
8311 bfd_arm_vfp11_write_mask (destmask, fm);
8312 else
8313 {
8314 bfd_arm_vfp11_write_mask (destmask, fm);
8315 bfd_arm_vfp11_write_mask (destmask, fm + 1);
8316 }
8317 }
8318
8319 vpipe = VFP11_LS;
8320 }
8321 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
8322 {
8323 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8324 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
8325
8326 switch (puw)
8327 {
8328 case 0: /* Two-reg transfer. We should catch these above. */
8329 abort ();
8330
8331 case 2: /* fldm[sdx]. */
8332 case 3:
8333 case 5:
8334 {
8335 unsigned int i, offset = insn & 0xff;
8336
8337 if (is_double)
8338 offset >>= 1;
8339
8340 for (i = fd; i < fd + offset; i++)
8341 bfd_arm_vfp11_write_mask (destmask, i);
8342 }
8343 break;
8344
8345 case 4: /* fld[sd]. */
8346 case 6:
8347 bfd_arm_vfp11_write_mask (destmask, fd);
8348 break;
8349
8350 default:
8351 return VFP11_BAD;
8352 }
8353
8354 vpipe = VFP11_LS;
8355 }
8356 /* Single-register transfer. Note L==0. */
8357 else if ((insn & 0x0f100e10) == 0x0e000a10)
8358 {
8359 unsigned int opcode = (insn >> 21) & 7;
8360 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8361
8362 switch (opcode)
8363 {
8364 case 0: /* fmsr/fmdlr. */
8365 case 1: /* fmdhr. */
8366 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8367 destination register. I don't know if this is exactly right,
8368 but it is the conservative choice. */
8369 bfd_arm_vfp11_write_mask (destmask, fn);
8370 break;
8371
8372 case 7: /* fmxr. */
8373 break;
8374 }
8375
8376 vpipe = VFP11_LS;
8377 }
8378
8379 return vpipe;
8380 }
8381
8382
8383 static int elf32_arm_compare_mapping (const void * a, const void * b);
8384
8385
8386 /* Look for potentially-troublesome code sequences which might trigger the
8387 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8388 (available from ARM) for details of the erratum. A short version is
8389 described in ld.texinfo. */
8390
8391 bool
8392 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8393 {
8394 asection *sec;
8395 bfd_byte *contents = NULL;
8396 int state = 0;
8397 int regs[3], numregs = 0;
8398 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8399 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8400
8401 if (globals == NULL)
8402 return false;
8403
8404 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8405 The states transition as follows:
8406
8407 0 -> 1 (vector) or 0 -> 2 (scalar)
8408 A VFP FMAC-pipeline instruction has been seen. Fill
8409 regs[0]..regs[numregs-1] with its input operands. Remember this
8410 instruction in 'first_fmac'.
8411
8412 1 -> 2
8413 Any instruction, except for a VFP instruction which overwrites
8414 regs[*].
8415
8416 1 -> 3 [ -> 0 ] or
8417 2 -> 3 [ -> 0 ]
8418 A VFP instruction has been seen which overwrites any of regs[*].
8419 We must make a veneer! Reset state to 0 before examining next
8420 instruction.
8421
8422 2 -> 0
8423 If we fail to match anything in state 2, reset to state 0 and reset
8424 the instruction pointer to the instruction after 'first_fmac'.
8425
8426 If the VFP11 vector mode is in use, there must be at least two unrelated
8427 instructions between anti-dependent VFP11 instructions to properly avoid
8428 triggering the erratum, hence the use of the extra state 1. */
8429
8430 /* If we are only performing a partial link do not bother
8431 to construct any glue. */
8432 if (bfd_link_relocatable (link_info))
8433 return true;
8434
8435 /* Skip if this bfd does not correspond to an ELF image. */
8436 if (! is_arm_elf (abfd))
8437 return true;
8438
8439 /* We should have chosen a fix type by the time we get here. */
8440 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8441
8442 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8443 return true;
8444
8445 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8446 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8447 return true;
8448
8449 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8450 {
8451 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8452 struct _arm_elf_section_data *sec_data;
8453
8454 /* If we don't have executable progbits, we're not interested in this
8455 section. Also skip if section is to be excluded. */
8456 if (elf_section_type (sec) != SHT_PROGBITS
8457 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8458 || (sec->flags & SEC_EXCLUDE) != 0
8459 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8460 || sec->output_section == bfd_abs_section_ptr
8461 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8462 continue;
8463
8464 sec_data = elf32_arm_section_data (sec);
8465
8466 if (sec_data->mapcount == 0)
8467 continue;
8468
8469 if (elf_section_data (sec)->this_hdr.contents != NULL)
8470 contents = elf_section_data (sec)->this_hdr.contents;
8471 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8472 goto error_return;
8473
8474 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8475 elf32_arm_compare_mapping);
8476
8477 for (span = 0; span < sec_data->mapcount; span++)
8478 {
8479 unsigned int span_start = sec_data->map[span].vma;
8480 unsigned int span_end = (span == sec_data->mapcount - 1)
8481 ? sec->size : sec_data->map[span + 1].vma;
8482 char span_type = sec_data->map[span].type;
8483
8484 /* FIXME: Only ARM mode is supported at present. We may need to
8485 support Thumb-2 mode also at some point. */
8486 if (span_type != 'a')
8487 continue;
8488
8489 for (i = span_start; i < span_end;)
8490 {
8491 unsigned int next_i = i + 4;
8492 unsigned int insn = bfd_big_endian (abfd)
8493 ? (((unsigned) contents[i] << 24)
8494 | (contents[i + 1] << 16)
8495 | (contents[i + 2] << 8)
8496 | contents[i + 3])
8497 : (((unsigned) contents[i + 3] << 24)
8498 | (contents[i + 2] << 16)
8499 | (contents[i + 1] << 8)
8500 | contents[i]);
8501 unsigned int writemask = 0;
8502 enum bfd_arm_vfp11_pipe vpipe;
8503
8504 switch (state)
8505 {
8506 case 0:
8507 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8508 &numregs);
8509 /* I'm assuming the VFP11 erratum can trigger with denorm
8510 operands on either the FMAC or the DS pipeline. This might
8511 lead to slightly overenthusiastic veneer insertion. */
8512 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8513 {
8514 state = use_vector ? 1 : 2;
8515 first_fmac = i;
8516 veneer_of_insn = insn;
8517 }
8518 break;
8519
8520 case 1:
8521 {
8522 int other_regs[3], other_numregs;
8523 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8524 other_regs,
8525 &other_numregs);
8526 if (vpipe != VFP11_BAD
8527 && bfd_arm_vfp11_antidependency (writemask, regs,
8528 numregs))
8529 state = 3;
8530 else
8531 state = 2;
8532 }
8533 break;
8534
8535 case 2:
8536 {
8537 int other_regs[3], other_numregs;
8538 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8539 other_regs,
8540 &other_numregs);
8541 if (vpipe != VFP11_BAD
8542 && bfd_arm_vfp11_antidependency (writemask, regs,
8543 numregs))
8544 state = 3;
8545 else
8546 {
8547 state = 0;
8548 next_i = first_fmac + 4;
8549 }
8550 }
8551 break;
8552
8553 case 3:
8554 abort (); /* Should be unreachable. */
8555 }
8556
8557 if (state == 3)
8558 {
8559 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8560 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8561
8562 elf32_arm_section_data (sec)->erratumcount += 1;
8563
8564 newerr->u.b.vfp_insn = veneer_of_insn;
8565
8566 switch (span_type)
8567 {
8568 case 'a':
8569 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8570 break;
8571
8572 default:
8573 abort ();
8574 }
8575
8576 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8577 first_fmac);
8578
8579 newerr->vma = -1;
8580
8581 newerr->next = sec_data->erratumlist;
8582 sec_data->erratumlist = newerr;
8583
8584 state = 0;
8585 }
8586
8587 i = next_i;
8588 }
8589 }
8590
8591 if (elf_section_data (sec)->this_hdr.contents != contents)
8592 free (contents);
8593 contents = NULL;
8594 }
8595
8596 return true;
8597
8598 error_return:
8599 if (elf_section_data (sec)->this_hdr.contents != contents)
8600 free (contents);
8601
8602 return false;
8603 }
8604
8605 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8606 after sections have been laid out, using specially-named symbols. */
8607
8608 void
8609 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8610 struct bfd_link_info *link_info)
8611 {
8612 asection *sec;
8613 struct elf32_arm_link_hash_table *globals;
8614 char *tmp_name;
8615
8616 if (bfd_link_relocatable (link_info))
8617 return;
8618
8619 /* Skip if this bfd does not correspond to an ELF image. */
8620 if (! is_arm_elf (abfd))
8621 return;
8622
8623 globals = elf32_arm_hash_table (link_info);
8624 if (globals == NULL)
8625 return;
8626
8627 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8628 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8629 BFD_ASSERT (tmp_name);
8630
8631 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8632 {
8633 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8634 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8635
8636 for (; errnode != NULL; errnode = errnode->next)
8637 {
8638 struct elf_link_hash_entry *myh;
8639 bfd_vma vma;
8640
8641 switch (errnode->type)
8642 {
8643 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8644 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8645 /* Find veneer symbol. */
8646 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8647 errnode->u.b.veneer->u.v.id);
8648
8649 myh = elf_link_hash_lookup
8650 (&(globals)->root, tmp_name, false, false, true);
8651
8652 if (myh == NULL)
8653 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8654 abfd, "VFP11", tmp_name);
8655
8656 vma = myh->root.u.def.section->output_section->vma
8657 + myh->root.u.def.section->output_offset
8658 + myh->root.u.def.value;
8659
8660 errnode->u.b.veneer->vma = vma;
8661 break;
8662
8663 case VFP11_ERRATUM_ARM_VENEER:
8664 case VFP11_ERRATUM_THUMB_VENEER:
8665 /* Find return location. */
8666 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8667 errnode->u.v.id);
8668
8669 myh = elf_link_hash_lookup
8670 (&(globals)->root, tmp_name, false, false, true);
8671
8672 if (myh == NULL)
8673 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8674 abfd, "VFP11", tmp_name);
8675
8676 vma = myh->root.u.def.section->output_section->vma
8677 + myh->root.u.def.section->output_offset
8678 + myh->root.u.def.value;
8679
8680 errnode->u.v.branch->vma = vma;
8681 break;
8682
8683 default:
8684 abort ();
8685 }
8686 }
8687 }
8688
8689 free (tmp_name);
8690 }
8691
8692 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8693 return locations after sections have been laid out, using
8694 specially-named symbols. */
8695
8696 void
8697 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8698 struct bfd_link_info *link_info)
8699 {
8700 asection *sec;
8701 struct elf32_arm_link_hash_table *globals;
8702 char *tmp_name;
8703
8704 if (bfd_link_relocatable (link_info))
8705 return;
8706
8707 /* Skip if this bfd does not correspond to an ELF image. */
8708 if (! is_arm_elf (abfd))
8709 return;
8710
8711 globals = elf32_arm_hash_table (link_info);
8712 if (globals == NULL)
8713 return;
8714
8715 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8716 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8717 BFD_ASSERT (tmp_name);
8718
8719 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8720 {
8721 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8722 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8723
8724 for (; errnode != NULL; errnode = errnode->next)
8725 {
8726 struct elf_link_hash_entry *myh;
8727 bfd_vma vma;
8728
8729 switch (errnode->type)
8730 {
8731 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8732 /* Find veneer symbol. */
8733 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8734 errnode->u.b.veneer->u.v.id);
8735
8736 myh = elf_link_hash_lookup
8737 (&(globals)->root, tmp_name, false, false, true);
8738
8739 if (myh == NULL)
8740 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8741 abfd, "STM32L4XX", tmp_name);
8742
8743 vma = myh->root.u.def.section->output_section->vma
8744 + myh->root.u.def.section->output_offset
8745 + myh->root.u.def.value;
8746
8747 errnode->u.b.veneer->vma = vma;
8748 break;
8749
8750 case STM32L4XX_ERRATUM_VENEER:
8751 /* Find return location. */
8752 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8753 errnode->u.v.id);
8754
8755 myh = elf_link_hash_lookup
8756 (&(globals)->root, tmp_name, false, false, true);
8757
8758 if (myh == NULL)
8759 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8760 abfd, "STM32L4XX", tmp_name);
8761
8762 vma = myh->root.u.def.section->output_section->vma
8763 + myh->root.u.def.section->output_offset
8764 + myh->root.u.def.value;
8765
8766 errnode->u.v.branch->vma = vma;
8767 break;
8768
8769 default:
8770 abort ();
8771 }
8772 }
8773 }
8774
8775 free (tmp_name);
8776 }
8777
8778 static inline bool
8779 is_thumb2_ldmia (const insn32 insn)
8780 {
8781 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8782 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8783 return (insn & 0xffd02000) == 0xe8900000;
8784 }
8785
8786 static inline bool
8787 is_thumb2_ldmdb (const insn32 insn)
8788 {
8789 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8790 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8791 return (insn & 0xffd02000) == 0xe9100000;
8792 }
8793
8794 static inline bool
8795 is_thumb2_vldm (const insn32 insn)
8796 {
8797 /* A6.5 Extension register load or store instruction
8798 A7.7.229
8799 We look for SP 32-bit and DP 64-bit registers.
8800 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8801 <list> is consecutive 64-bit registers
8802 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8803 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8804 <list> is consecutive 32-bit registers
8805 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8806 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8807 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8808 return
8809 (((insn & 0xfe100f00) == 0xec100b00) ||
8810 ((insn & 0xfe100f00) == 0xec100a00))
8811 && /* (IA without !). */
8812 (((((insn << 7) >> 28) & 0xd) == 0x4)
8813 /* (IA with !), includes VPOP (when reg number is SP). */
8814 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8815 /* (DB with !). */
8816 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8817 }
8818
8819 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8820 VLDM opcode and:
8821 - computes the number and the mode of memory accesses
8822 - decides if the replacement should be done:
8823 . replaces only if > 8-word accesses
8824 . or (testing purposes only) replaces all accesses. */
8825
8826 static bool
8827 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8828 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8829 {
8830 int nb_words = 0;
8831
8832 /* The field encoding the register list is the same for both LDMIA
8833 and LDMDB encodings. */
8834 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8835 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8836 else if (is_thumb2_vldm (insn))
8837 nb_words = (insn & 0xff);
8838
8839 /* DEFAULT mode accounts for the real bug condition situation,
8840 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8841 return (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT
8842 ? nb_words > 8
8843 : stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL);
8844 }
8845
8846 /* Look for potentially-troublesome code sequences which might trigger
8847 the STM STM32L4XX erratum. */
8848
8849 bool
8850 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8851 struct bfd_link_info *link_info)
8852 {
8853 asection *sec;
8854 bfd_byte *contents = NULL;
8855 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8856
8857 if (globals == NULL)
8858 return false;
8859
8860 /* If we are only performing a partial link do not bother
8861 to construct any glue. */
8862 if (bfd_link_relocatable (link_info))
8863 return true;
8864
8865 /* Skip if this bfd does not correspond to an ELF image. */
8866 if (! is_arm_elf (abfd))
8867 return true;
8868
8869 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8870 return true;
8871
8872 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8873 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8874 return true;
8875
8876 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8877 {
8878 unsigned int i, span;
8879 struct _arm_elf_section_data *sec_data;
8880
8881 /* If we don't have executable progbits, we're not interested in this
8882 section. Also skip if section is to be excluded. */
8883 if (elf_section_type (sec) != SHT_PROGBITS
8884 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8885 || (sec->flags & SEC_EXCLUDE) != 0
8886 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8887 || sec->output_section == bfd_abs_section_ptr
8888 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8889 continue;
8890
8891 sec_data = elf32_arm_section_data (sec);
8892
8893 if (sec_data->mapcount == 0)
8894 continue;
8895
8896 if (elf_section_data (sec)->this_hdr.contents != NULL)
8897 contents = elf_section_data (sec)->this_hdr.contents;
8898 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8899 goto error_return;
8900
8901 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8902 elf32_arm_compare_mapping);
8903
8904 for (span = 0; span < sec_data->mapcount; span++)
8905 {
8906 unsigned int span_start = sec_data->map[span].vma;
8907 unsigned int span_end = (span == sec_data->mapcount - 1)
8908 ? sec->size : sec_data->map[span + 1].vma;
8909 char span_type = sec_data->map[span].type;
8910 int itblock_current_pos = 0;
8911
8912 /* Only Thumb2 mode need be supported with this CM4 specific
8913 code, we should not encounter any arm mode eg span_type
8914 != 'a'. */
8915 if (span_type != 't')
8916 continue;
8917
8918 for (i = span_start; i < span_end;)
8919 {
8920 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8921 bool insn_32bit = false;
8922 bool is_ldm = false;
8923 bool is_vldm = false;
8924 bool is_not_last_in_it_block = false;
8925
8926 /* The first 16-bits of all 32-bit thumb2 instructions start
8927 with opcode[15..13]=0b111 and the encoded op1 can be anything
8928 except opcode[12..11]!=0b00.
8929 See 32-bit Thumb instruction encoding. */
8930 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8931 insn_32bit = true;
8932
8933 /* Compute the predicate that tells if the instruction
8934 is concerned by the IT block
8935 - Creates an error if there is a ldm that is not
8936 last in the IT block thus cannot be replaced
8937 - Otherwise we can create a branch at the end of the
8938 IT block, it will be controlled naturally by IT
8939 with the proper pseudo-predicate
8940 - So the only interesting predicate is the one that
8941 tells that we are not on the last item of an IT
8942 block. */
8943 if (itblock_current_pos != 0)
8944 is_not_last_in_it_block = !!--itblock_current_pos;
8945
8946 if (insn_32bit)
8947 {
8948 /* Load the rest of the insn (in manual-friendly order). */
8949 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8950 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8951 is_vldm = is_thumb2_vldm (insn);
8952
8953 /* Veneers are created for (v)ldm depending on
8954 option flags and memory accesses conditions; but
8955 if the instruction is not the last instruction of
8956 an IT block, we cannot create a jump there, so we
8957 bail out. */
8958 if ((is_ldm || is_vldm)
8959 && stm32l4xx_need_create_replacing_stub
8960 (insn, globals->stm32l4xx_fix))
8961 {
8962 if (is_not_last_in_it_block)
8963 {
8964 _bfd_error_handler
8965 /* xgettext:c-format */
8966 (_("%pB(%pA+%#x): error: multiple load detected"
8967 " in non-last IT block instruction:"
8968 " STM32L4XX veneer cannot be generated; "
8969 "use gcc option -mrestrict-it to generate"
8970 " only one instruction per IT block"),
8971 abfd, sec, i);
8972 }
8973 else
8974 {
8975 elf32_stm32l4xx_erratum_list *newerr =
8976 (elf32_stm32l4xx_erratum_list *)
8977 bfd_zmalloc
8978 (sizeof (elf32_stm32l4xx_erratum_list));
8979
8980 elf32_arm_section_data (sec)
8981 ->stm32l4xx_erratumcount += 1;
8982 newerr->u.b.insn = insn;
8983 /* We create only thumb branches. */
8984 newerr->type =
8985 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8986 record_stm32l4xx_erratum_veneer
8987 (link_info, newerr, abfd, sec,
8988 i,
8989 is_ldm ?
8990 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8991 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8992 newerr->vma = -1;
8993 newerr->next = sec_data->stm32l4xx_erratumlist;
8994 sec_data->stm32l4xx_erratumlist = newerr;
8995 }
8996 }
8997 }
8998 else
8999 {
9000 /* A7.7.37 IT p208
9001 IT blocks are only encoded in T1
9002 Encoding T1: IT{x{y{z}}} <firstcond>
9003 1 0 1 1 - 1 1 1 1 - firstcond - mask
9004 if mask = '0000' then see 'related encodings'
9005 We don't deal with UNPREDICTABLE, just ignore these.
9006 There can be no nested IT blocks so an IT block
9007 is naturally a new one for which it is worth
9008 computing its size. */
9009 bool is_newitblock = ((insn & 0xff00) == 0xbf00)
9010 && ((insn & 0x000f) != 0x0000);
9011 /* If we have a new IT block we compute its size. */
9012 if (is_newitblock)
9013 {
9014 /* Compute the number of instructions controlled
9015 by the IT block, it will be used to decide
9016 whether we are inside an IT block or not. */
9017 unsigned int mask = insn & 0x000f;
9018 itblock_current_pos = 4 - ctz (mask);
9019 }
9020 }
9021
9022 i += insn_32bit ? 4 : 2;
9023 }
9024 }
9025
9026 if (elf_section_data (sec)->this_hdr.contents != contents)
9027 free (contents);
9028 contents = NULL;
9029 }
9030
9031 return true;
9032
9033 error_return:
9034 if (elf_section_data (sec)->this_hdr.contents != contents)
9035 free (contents);
9036
9037 return false;
9038 }
9039
9040 /* Set target relocation values needed during linking. */
9041
9042 void
9043 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
9044 struct bfd_link_info *link_info,
9045 struct elf32_arm_params *params)
9046 {
9047 struct elf32_arm_link_hash_table *globals;
9048
9049 globals = elf32_arm_hash_table (link_info);
9050 if (globals == NULL)
9051 return;
9052
9053 globals->target1_is_rel = params->target1_is_rel;
9054 if (globals->fdpic_p)
9055 globals->target2_reloc = R_ARM_GOT32;
9056 else if (strcmp (params->target2_type, "rel") == 0)
9057 globals->target2_reloc = R_ARM_REL32;
9058 else if (strcmp (params->target2_type, "abs") == 0)
9059 globals->target2_reloc = R_ARM_ABS32;
9060 else if (strcmp (params->target2_type, "got-rel") == 0)
9061 globals->target2_reloc = R_ARM_GOT_PREL;
9062 else
9063 {
9064 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
9065 params->target2_type);
9066 }
9067 globals->fix_v4bx = params->fix_v4bx;
9068 globals->use_blx |= params->use_blx;
9069 globals->vfp11_fix = params->vfp11_denorm_fix;
9070 globals->stm32l4xx_fix = params->stm32l4xx_fix;
9071 if (globals->fdpic_p)
9072 globals->pic_veneer = 1;
9073 else
9074 globals->pic_veneer = params->pic_veneer;
9075 globals->fix_cortex_a8 = params->fix_cortex_a8;
9076 globals->fix_arm1176 = params->fix_arm1176;
9077 globals->cmse_implib = params->cmse_implib;
9078 globals->in_implib_bfd = params->in_implib_bfd;
9079
9080 BFD_ASSERT (is_arm_elf (output_bfd));
9081 elf_arm_tdata (output_bfd)->no_enum_size_warning
9082 = params->no_enum_size_warning;
9083 elf_arm_tdata (output_bfd)->no_wchar_size_warning
9084 = params->no_wchar_size_warning;
9085 }
9086
9087 /* Replace the target offset of a Thumb bl or b.w instruction. */
9088
9089 static void
9090 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
9091 {
9092 bfd_vma upper;
9093 bfd_vma lower;
9094 int reloc_sign;
9095
9096 BFD_ASSERT ((offset & 1) == 0);
9097
9098 upper = bfd_get_16 (abfd, insn);
9099 lower = bfd_get_16 (abfd, insn + 2);
9100 reloc_sign = (offset < 0) ? 1 : 0;
9101 upper = (upper & ~(bfd_vma) 0x7ff)
9102 | ((offset >> 12) & 0x3ff)
9103 | (reloc_sign << 10);
9104 lower = (lower & ~(bfd_vma) 0x2fff)
9105 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
9106 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
9107 | ((offset >> 1) & 0x7ff);
9108 bfd_put_16 (abfd, upper, insn);
9109 bfd_put_16 (abfd, lower, insn + 2);
9110 }
9111
9112 /* Thumb code calling an ARM function. */
9113
9114 static int
9115 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
9116 const char * name,
9117 bfd * input_bfd,
9118 bfd * output_bfd,
9119 asection * input_section,
9120 bfd_byte * hit_data,
9121 asection * sym_sec,
9122 bfd_vma offset,
9123 bfd_signed_vma addend,
9124 bfd_vma val,
9125 char **error_message)
9126 {
9127 asection * s = 0;
9128 bfd_vma my_offset;
9129 long int ret_offset;
9130 struct elf_link_hash_entry * myh;
9131 struct elf32_arm_link_hash_table * globals;
9132
9133 myh = find_thumb_glue (info, name, error_message);
9134 if (myh == NULL)
9135 return false;
9136
9137 globals = elf32_arm_hash_table (info);
9138 BFD_ASSERT (globals != NULL);
9139 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9140
9141 my_offset = myh->root.u.def.value;
9142
9143 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9144 THUMB2ARM_GLUE_SECTION_NAME);
9145
9146 BFD_ASSERT (s != NULL);
9147 BFD_ASSERT (s->contents != NULL);
9148 BFD_ASSERT (s->output_section != NULL);
9149
9150 if ((my_offset & 0x01) == 0x01)
9151 {
9152 if (sym_sec != NULL
9153 && sym_sec->owner != NULL
9154 && !INTERWORK_FLAG (sym_sec->owner))
9155 {
9156 _bfd_error_handler
9157 (_("%pB(%s): warning: interworking not enabled;"
9158 " first occurrence: %pB: %s call to %s"),
9159 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
9160
9161 return false;
9162 }
9163
9164 --my_offset;
9165 myh->root.u.def.value = my_offset;
9166
9167 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
9168 s->contents + my_offset);
9169
9170 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
9171 s->contents + my_offset + 2);
9172
9173 ret_offset =
9174 /* Address of destination of the stub. */
9175 ((bfd_signed_vma) val)
9176 - ((bfd_signed_vma)
9177 /* Offset from the start of the current section
9178 to the start of the stubs. */
9179 (s->output_offset
9180 /* Offset of the start of this stub from the start of the stubs. */
9181 + my_offset
9182 /* Address of the start of the current section. */
9183 + s->output_section->vma)
9184 /* The branch instruction is 4 bytes into the stub. */
9185 + 4
9186 /* ARM branches work from the pc of the instruction + 8. */
9187 + 8);
9188
9189 put_arm_insn (globals, output_bfd,
9190 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
9191 s->contents + my_offset + 4);
9192 }
9193
9194 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
9195
9196 /* Now go back and fix up the original BL insn to point to here. */
9197 ret_offset =
9198 /* Address of where the stub is located. */
9199 (s->output_section->vma + s->output_offset + my_offset)
9200 /* Address of where the BL is located. */
9201 - (input_section->output_section->vma + input_section->output_offset
9202 + offset)
9203 /* Addend in the relocation. */
9204 - addend
9205 /* Biassing for PC-relative addressing. */
9206 - 8;
9207
9208 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
9209
9210 return true;
9211 }
9212
9213 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
9214
9215 static struct elf_link_hash_entry *
9216 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
9217 const char * name,
9218 bfd * input_bfd,
9219 bfd * output_bfd,
9220 asection * sym_sec,
9221 bfd_vma val,
9222 asection * s,
9223 char ** error_message)
9224 {
9225 bfd_vma my_offset;
9226 long int ret_offset;
9227 struct elf_link_hash_entry * myh;
9228 struct elf32_arm_link_hash_table * globals;
9229
9230 myh = find_arm_glue (info, name, error_message);
9231 if (myh == NULL)
9232 return NULL;
9233
9234 globals = elf32_arm_hash_table (info);
9235 BFD_ASSERT (globals != NULL);
9236 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9237
9238 my_offset = myh->root.u.def.value;
9239
9240 if ((my_offset & 0x01) == 0x01)
9241 {
9242 if (sym_sec != NULL
9243 && sym_sec->owner != NULL
9244 && !INTERWORK_FLAG (sym_sec->owner))
9245 {
9246 _bfd_error_handler
9247 (_("%pB(%s): warning: interworking not enabled;"
9248 " first occurrence: %pB: %s call to %s"),
9249 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
9250 }
9251
9252 --my_offset;
9253 myh->root.u.def.value = my_offset;
9254
9255 if (bfd_link_pic (info)
9256 || globals->root.is_relocatable_executable
9257 || globals->pic_veneer)
9258 {
9259 /* For relocatable objects we can't use absolute addresses,
9260 so construct the address from a relative offset. */
9261 /* TODO: If the offset is small it's probably worth
9262 constructing the address with adds. */
9263 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
9264 s->contents + my_offset);
9265 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
9266 s->contents + my_offset + 4);
9267 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
9268 s->contents + my_offset + 8);
9269 /* Adjust the offset by 4 for the position of the add,
9270 and 8 for the pipeline offset. */
9271 ret_offset = (val - (s->output_offset
9272 + s->output_section->vma
9273 + my_offset + 12))
9274 | 1;
9275 bfd_put_32 (output_bfd, ret_offset,
9276 s->contents + my_offset + 12);
9277 }
9278 else if (globals->use_blx)
9279 {
9280 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
9281 s->contents + my_offset);
9282
9283 /* It's a thumb address. Add the low order bit. */
9284 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
9285 s->contents + my_offset + 4);
9286 }
9287 else
9288 {
9289 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
9290 s->contents + my_offset);
9291
9292 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
9293 s->contents + my_offset + 4);
9294
9295 /* It's a thumb address. Add the low order bit. */
9296 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
9297 s->contents + my_offset + 8);
9298
9299 my_offset += 12;
9300 }
9301 }
9302
9303 BFD_ASSERT (my_offset <= globals->arm_glue_size);
9304
9305 return myh;
9306 }
9307
9308 /* Arm code calling a Thumb function. */
9309
9310 static int
9311 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
9312 const char * name,
9313 bfd * input_bfd,
9314 bfd * output_bfd,
9315 asection * input_section,
9316 bfd_byte * hit_data,
9317 asection * sym_sec,
9318 bfd_vma offset,
9319 bfd_signed_vma addend,
9320 bfd_vma val,
9321 char **error_message)
9322 {
9323 unsigned long int tmp;
9324 bfd_vma my_offset;
9325 asection * s;
9326 long int ret_offset;
9327 struct elf_link_hash_entry * myh;
9328 struct elf32_arm_link_hash_table * globals;
9329
9330 globals = elf32_arm_hash_table (info);
9331 BFD_ASSERT (globals != NULL);
9332 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9333
9334 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9335 ARM2THUMB_GLUE_SECTION_NAME);
9336 BFD_ASSERT (s != NULL);
9337 BFD_ASSERT (s->contents != NULL);
9338 BFD_ASSERT (s->output_section != NULL);
9339
9340 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9341 sym_sec, val, s, error_message);
9342 if (!myh)
9343 return false;
9344
9345 my_offset = myh->root.u.def.value;
9346 tmp = bfd_get_32 (input_bfd, hit_data);
9347 tmp = tmp & 0xFF000000;
9348
9349 /* Somehow these are both 4 too far, so subtract 8. */
9350 ret_offset = (s->output_offset
9351 + my_offset
9352 + s->output_section->vma
9353 - (input_section->output_offset
9354 + input_section->output_section->vma
9355 + offset + addend)
9356 - 8);
9357
9358 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9359
9360 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9361
9362 return true;
9363 }
9364
9365 /* Populate Arm stub for an exported Thumb function. */
9366
9367 static bool
9368 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9369 {
9370 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9371 asection * s;
9372 struct elf_link_hash_entry * myh;
9373 struct elf32_arm_link_hash_entry *eh;
9374 struct elf32_arm_link_hash_table * globals;
9375 asection *sec;
9376 bfd_vma val;
9377 char *error_message;
9378
9379 eh = elf32_arm_hash_entry (h);
9380 /* Allocate stubs for exported Thumb functions on v4t. */
9381 if (eh->export_glue == NULL)
9382 return true;
9383
9384 globals = elf32_arm_hash_table (info);
9385 BFD_ASSERT (globals != NULL);
9386 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9387
9388 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9389 ARM2THUMB_GLUE_SECTION_NAME);
9390 BFD_ASSERT (s != NULL);
9391 BFD_ASSERT (s->contents != NULL);
9392 BFD_ASSERT (s->output_section != NULL);
9393
9394 sec = eh->export_glue->root.u.def.section;
9395
9396 BFD_ASSERT (sec->output_section != NULL);
9397
9398 val = eh->export_glue->root.u.def.value + sec->output_offset
9399 + sec->output_section->vma;
9400
9401 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9402 h->root.u.def.section->owner,
9403 globals->obfd, sec, val, s,
9404 &error_message);
9405 BFD_ASSERT (myh);
9406 return true;
9407 }
9408
9409 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9410
9411 static bfd_vma
9412 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9413 {
9414 bfd_byte *p;
9415 bfd_vma glue_addr;
9416 asection *s;
9417 struct elf32_arm_link_hash_table *globals;
9418
9419 globals = elf32_arm_hash_table (info);
9420 BFD_ASSERT (globals != NULL);
9421 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9422
9423 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9424 ARM_BX_GLUE_SECTION_NAME);
9425 BFD_ASSERT (s != NULL);
9426 BFD_ASSERT (s->contents != NULL);
9427 BFD_ASSERT (s->output_section != NULL);
9428
9429 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9430
9431 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9432
9433 if ((globals->bx_glue_offset[reg] & 1) == 0)
9434 {
9435 p = s->contents + glue_addr;
9436 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9437 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9438 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9439 globals->bx_glue_offset[reg] |= 1;
9440 }
9441
9442 return glue_addr + s->output_section->vma + s->output_offset;
9443 }
9444
9445 /* Generate Arm stubs for exported Thumb symbols. */
9446 static void
9447 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9448 struct bfd_link_info *link_info)
9449 {
9450 struct elf32_arm_link_hash_table * globals;
9451
9452 if (link_info == NULL)
9453 /* Ignore this if we are not called by the ELF backend linker. */
9454 return;
9455
9456 globals = elf32_arm_hash_table (link_info);
9457 if (globals == NULL)
9458 return;
9459
9460 /* If blx is available then exported Thumb symbols are OK and there is
9461 nothing to do. */
9462 if (globals->use_blx)
9463 return;
9464
9465 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9466 link_info);
9467 }
9468
9469 /* Reserve space for COUNT dynamic relocations in relocation selection
9470 SRELOC. */
9471
9472 static void
9473 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9474 bfd_size_type count)
9475 {
9476 struct elf32_arm_link_hash_table *htab;
9477
9478 htab = elf32_arm_hash_table (info);
9479 BFD_ASSERT (htab->root.dynamic_sections_created);
9480 if (sreloc == NULL)
9481 abort ();
9482 sreloc->size += RELOC_SIZE (htab) * count;
9483 }
9484
9485 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9486 dynamic, the relocations should go in SRELOC, otherwise they should
9487 go in the special .rel.iplt section. */
9488
9489 static void
9490 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9491 bfd_size_type count)
9492 {
9493 struct elf32_arm_link_hash_table *htab;
9494
9495 htab = elf32_arm_hash_table (info);
9496 if (!htab->root.dynamic_sections_created)
9497 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9498 else
9499 {
9500 BFD_ASSERT (sreloc != NULL);
9501 sreloc->size += RELOC_SIZE (htab) * count;
9502 }
9503 }
9504
9505 /* Add relocation REL to the end of relocation section SRELOC. */
9506
9507 static void
9508 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9509 asection *sreloc, Elf_Internal_Rela *rel)
9510 {
9511 bfd_byte *loc;
9512 struct elf32_arm_link_hash_table *htab;
9513
9514 htab = elf32_arm_hash_table (info);
9515 if (!htab->root.dynamic_sections_created
9516 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9517 sreloc = htab->root.irelplt;
9518 if (sreloc == NULL)
9519 abort ();
9520 loc = sreloc->contents;
9521 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9522 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9523 abort ();
9524 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9525 }
9526
9527 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9528 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9529 to .plt. */
9530
9531 static void
9532 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9533 bool is_iplt_entry,
9534 union gotplt_union *root_plt,
9535 struct arm_plt_info *arm_plt)
9536 {
9537 struct elf32_arm_link_hash_table *htab;
9538 asection *splt;
9539 asection *sgotplt;
9540
9541 htab = elf32_arm_hash_table (info);
9542
9543 if (is_iplt_entry)
9544 {
9545 splt = htab->root.iplt;
9546 sgotplt = htab->root.igotplt;
9547
9548 /* NaCl uses a special first entry in .iplt too. */
9549 if (htab->root.target_os == is_nacl && splt->size == 0)
9550 splt->size += htab->plt_header_size;
9551
9552 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9553 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9554 }
9555 else
9556 {
9557 splt = htab->root.splt;
9558 sgotplt = htab->root.sgotplt;
9559
9560 if (htab->fdpic_p)
9561 {
9562 /* Allocate room for R_ARM_FUNCDESC_VALUE. */
9563 /* For lazy binding, relocations will be put into .rel.plt, in
9564 .rel.got otherwise. */
9565 /* FIXME: today we don't support lazy binding so put it in .rel.got */
9566 if (info->flags & DF_BIND_NOW)
9567 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
9568 else
9569 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9570 }
9571 else
9572 {
9573 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9574 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9575 }
9576
9577 /* If this is the first .plt entry, make room for the special
9578 first entry. */
9579 if (splt->size == 0)
9580 splt->size += htab->plt_header_size;
9581
9582 htab->next_tls_desc_index++;
9583 }
9584
9585 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9586 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9587 splt->size += PLT_THUMB_STUB_SIZE;
9588 root_plt->offset = splt->size;
9589 splt->size += htab->plt_entry_size;
9590
9591 /* We also need to make an entry in the .got.plt section, which
9592 will be placed in the .got section by the linker script. */
9593 if (is_iplt_entry)
9594 arm_plt->got_offset = sgotplt->size;
9595 else
9596 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9597 if (htab->fdpic_p)
9598 /* Function descriptor takes 64 bits in GOT. */
9599 sgotplt->size += 8;
9600 else
9601 sgotplt->size += 4;
9602 }
9603
9604 static bfd_vma
9605 arm_movw_immediate (bfd_vma value)
9606 {
9607 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9608 }
9609
9610 static bfd_vma
9611 arm_movt_immediate (bfd_vma value)
9612 {
9613 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9614 }
9615
9616 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9617 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9618 Otherwise, DYNINDX is the index of the symbol in the dynamic
9619 symbol table and SYM_VALUE is undefined.
9620
9621 ROOT_PLT points to the offset of the PLT entry from the start of its
9622 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9623 bookkeeping information.
9624
9625 Returns FALSE if there was a problem. */
9626
9627 static bool
9628 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9629 union gotplt_union *root_plt,
9630 struct arm_plt_info *arm_plt,
9631 int dynindx, bfd_vma sym_value)
9632 {
9633 struct elf32_arm_link_hash_table *htab;
9634 asection *sgot;
9635 asection *splt;
9636 asection *srel;
9637 bfd_byte *loc;
9638 bfd_vma plt_index;
9639 Elf_Internal_Rela rel;
9640 bfd_vma got_header_size;
9641
9642 htab = elf32_arm_hash_table (info);
9643
9644 /* Pick the appropriate sections and sizes. */
9645 if (dynindx == -1)
9646 {
9647 splt = htab->root.iplt;
9648 sgot = htab->root.igotplt;
9649 srel = htab->root.irelplt;
9650
9651 /* There are no reserved entries in .igot.plt, and no special
9652 first entry in .iplt. */
9653 got_header_size = 0;
9654 }
9655 else
9656 {
9657 splt = htab->root.splt;
9658 sgot = htab->root.sgotplt;
9659 srel = htab->root.srelplt;
9660
9661 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9662 }
9663 BFD_ASSERT (splt != NULL && srel != NULL);
9664
9665 bfd_vma got_offset, got_address, plt_address;
9666 bfd_vma got_displacement, initial_got_entry;
9667 bfd_byte * ptr;
9668
9669 BFD_ASSERT (sgot != NULL);
9670
9671 /* Get the offset into the .(i)got.plt table of the entry that
9672 corresponds to this function. */
9673 got_offset = (arm_plt->got_offset & -2);
9674
9675 /* Get the index in the procedure linkage table which
9676 corresponds to this symbol. This is the index of this symbol
9677 in all the symbols for which we are making plt entries.
9678 After the reserved .got.plt entries, all symbols appear in
9679 the same order as in .plt. */
9680 if (htab->fdpic_p)
9681 /* Function descriptor takes 8 bytes. */
9682 plt_index = (got_offset - got_header_size) / 8;
9683 else
9684 plt_index = (got_offset - got_header_size) / 4;
9685
9686 /* Calculate the address of the GOT entry. */
9687 got_address = (sgot->output_section->vma
9688 + sgot->output_offset
9689 + got_offset);
9690
9691 /* ...and the address of the PLT entry. */
9692 plt_address = (splt->output_section->vma
9693 + splt->output_offset
9694 + root_plt->offset);
9695
9696 ptr = splt->contents + root_plt->offset;
9697 if (htab->root.target_os == is_vxworks && bfd_link_pic (info))
9698 {
9699 unsigned int i;
9700 bfd_vma val;
9701
9702 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9703 {
9704 val = elf32_arm_vxworks_shared_plt_entry[i];
9705 if (i == 2)
9706 val |= got_address - sgot->output_section->vma;
9707 if (i == 5)
9708 val |= plt_index * RELOC_SIZE (htab);
9709 if (i == 2 || i == 5)
9710 bfd_put_32 (output_bfd, val, ptr);
9711 else
9712 put_arm_insn (htab, output_bfd, val, ptr);
9713 }
9714 }
9715 else if (htab->root.target_os == is_vxworks)
9716 {
9717 unsigned int i;
9718 bfd_vma val;
9719
9720 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9721 {
9722 val = elf32_arm_vxworks_exec_plt_entry[i];
9723 if (i == 2)
9724 val |= got_address;
9725 if (i == 4)
9726 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9727 if (i == 5)
9728 val |= plt_index * RELOC_SIZE (htab);
9729 if (i == 2 || i == 5)
9730 bfd_put_32 (output_bfd, val, ptr);
9731 else
9732 put_arm_insn (htab, output_bfd, val, ptr);
9733 }
9734
9735 loc = (htab->srelplt2->contents
9736 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9737
9738 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9739 referencing the GOT for this PLT entry. */
9740 rel.r_offset = plt_address + 8;
9741 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9742 rel.r_addend = got_offset;
9743 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9744 loc += RELOC_SIZE (htab);
9745
9746 /* Create the R_ARM_ABS32 relocation referencing the
9747 beginning of the PLT for this GOT entry. */
9748 rel.r_offset = got_address;
9749 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9750 rel.r_addend = 0;
9751 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9752 }
9753 else if (htab->root.target_os == is_nacl)
9754 {
9755 /* Calculate the displacement between the PLT slot and the
9756 common tail that's part of the special initial PLT slot. */
9757 int32_t tail_displacement
9758 = ((splt->output_section->vma + splt->output_offset
9759 + ARM_NACL_PLT_TAIL_OFFSET)
9760 - (plt_address + htab->plt_entry_size + 4));
9761 BFD_ASSERT ((tail_displacement & 3) == 0);
9762 tail_displacement >>= 2;
9763
9764 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9765 || (-tail_displacement & 0xff000000) == 0);
9766
9767 /* Calculate the displacement between the PLT slot and the entry
9768 in the GOT. The offset accounts for the value produced by
9769 adding to pc in the penultimate instruction of the PLT stub. */
9770 got_displacement = (got_address
9771 - (plt_address + htab->plt_entry_size));
9772
9773 /* NaCl does not support interworking at all. */
9774 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9775
9776 put_arm_insn (htab, output_bfd,
9777 elf32_arm_nacl_plt_entry[0]
9778 | arm_movw_immediate (got_displacement),
9779 ptr + 0);
9780 put_arm_insn (htab, output_bfd,
9781 elf32_arm_nacl_plt_entry[1]
9782 | arm_movt_immediate (got_displacement),
9783 ptr + 4);
9784 put_arm_insn (htab, output_bfd,
9785 elf32_arm_nacl_plt_entry[2],
9786 ptr + 8);
9787 put_arm_insn (htab, output_bfd,
9788 elf32_arm_nacl_plt_entry[3]
9789 | (tail_displacement & 0x00ffffff),
9790 ptr + 12);
9791 }
9792 else if (htab->fdpic_p)
9793 {
9794 const bfd_vma *plt_entry = using_thumb_only (htab)
9795 ? elf32_arm_fdpic_thumb_plt_entry
9796 : elf32_arm_fdpic_plt_entry;
9797
9798 /* Fill-up Thumb stub if needed. */
9799 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9800 {
9801 put_thumb_insn (htab, output_bfd,
9802 elf32_arm_plt_thumb_stub[0], ptr - 4);
9803 put_thumb_insn (htab, output_bfd,
9804 elf32_arm_plt_thumb_stub[1], ptr - 2);
9805 }
9806 /* As we are using 32 bit instructions even for the Thumb
9807 version, we have to use 'put_arm_insn' instead of
9808 'put_thumb_insn'. */
9809 put_arm_insn (htab, output_bfd, plt_entry[0], ptr + 0);
9810 put_arm_insn (htab, output_bfd, plt_entry[1], ptr + 4);
9811 put_arm_insn (htab, output_bfd, plt_entry[2], ptr + 8);
9812 put_arm_insn (htab, output_bfd, plt_entry[3], ptr + 12);
9813 bfd_put_32 (output_bfd, got_offset, ptr + 16);
9814
9815 if (!(info->flags & DF_BIND_NOW))
9816 {
9817 /* funcdesc_value_reloc_offset. */
9818 bfd_put_32 (output_bfd,
9819 htab->root.srelplt->reloc_count * RELOC_SIZE (htab),
9820 ptr + 20);
9821 put_arm_insn (htab, output_bfd, plt_entry[6], ptr + 24);
9822 put_arm_insn (htab, output_bfd, plt_entry[7], ptr + 28);
9823 put_arm_insn (htab, output_bfd, plt_entry[8], ptr + 32);
9824 put_arm_insn (htab, output_bfd, plt_entry[9], ptr + 36);
9825 }
9826 }
9827 else if (using_thumb_only (htab))
9828 {
9829 /* PR ld/16017: Generate thumb only PLT entries. */
9830 if (!using_thumb2 (htab))
9831 {
9832 /* FIXME: We ought to be able to generate thumb-1 PLT
9833 instructions... */
9834 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9835 output_bfd);
9836 return false;
9837 }
9838
9839 /* Calculate the displacement between the PLT slot and the entry in
9840 the GOT. The 12-byte offset accounts for the value produced by
9841 adding to pc in the 3rd instruction of the PLT stub. */
9842 got_displacement = got_address - (plt_address + 12);
9843
9844 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9845 instead of 'put_thumb_insn'. */
9846 put_arm_insn (htab, output_bfd,
9847 elf32_thumb2_plt_entry[0]
9848 | ((got_displacement & 0x000000ff) << 16)
9849 | ((got_displacement & 0x00000700) << 20)
9850 | ((got_displacement & 0x00000800) >> 1)
9851 | ((got_displacement & 0x0000f000) >> 12),
9852 ptr + 0);
9853 put_arm_insn (htab, output_bfd,
9854 elf32_thumb2_plt_entry[1]
9855 | ((got_displacement & 0x00ff0000) )
9856 | ((got_displacement & 0x07000000) << 4)
9857 | ((got_displacement & 0x08000000) >> 17)
9858 | ((got_displacement & 0xf0000000) >> 28),
9859 ptr + 4);
9860 put_arm_insn (htab, output_bfd,
9861 elf32_thumb2_plt_entry[2],
9862 ptr + 8);
9863 put_arm_insn (htab, output_bfd,
9864 elf32_thumb2_plt_entry[3],
9865 ptr + 12);
9866 }
9867 else
9868 {
9869 /* Calculate the displacement between the PLT slot and the
9870 entry in the GOT. The eight-byte offset accounts for the
9871 value produced by adding to pc in the first instruction
9872 of the PLT stub. */
9873 got_displacement = got_address - (plt_address + 8);
9874
9875 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9876 {
9877 put_thumb_insn (htab, output_bfd,
9878 elf32_arm_plt_thumb_stub[0], ptr - 4);
9879 put_thumb_insn (htab, output_bfd,
9880 elf32_arm_plt_thumb_stub[1], ptr - 2);
9881 }
9882
9883 if (!elf32_arm_use_long_plt_entry)
9884 {
9885 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9886
9887 put_arm_insn (htab, output_bfd,
9888 elf32_arm_plt_entry_short[0]
9889 | ((got_displacement & 0x0ff00000) >> 20),
9890 ptr + 0);
9891 put_arm_insn (htab, output_bfd,
9892 elf32_arm_plt_entry_short[1]
9893 | ((got_displacement & 0x000ff000) >> 12),
9894 ptr+ 4);
9895 put_arm_insn (htab, output_bfd,
9896 elf32_arm_plt_entry_short[2]
9897 | (got_displacement & 0x00000fff),
9898 ptr + 8);
9899 #ifdef FOUR_WORD_PLT
9900 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9901 #endif
9902 }
9903 else
9904 {
9905 put_arm_insn (htab, output_bfd,
9906 elf32_arm_plt_entry_long[0]
9907 | ((got_displacement & 0xf0000000) >> 28),
9908 ptr + 0);
9909 put_arm_insn (htab, output_bfd,
9910 elf32_arm_plt_entry_long[1]
9911 | ((got_displacement & 0x0ff00000) >> 20),
9912 ptr + 4);
9913 put_arm_insn (htab, output_bfd,
9914 elf32_arm_plt_entry_long[2]
9915 | ((got_displacement & 0x000ff000) >> 12),
9916 ptr+ 8);
9917 put_arm_insn (htab, output_bfd,
9918 elf32_arm_plt_entry_long[3]
9919 | (got_displacement & 0x00000fff),
9920 ptr + 12);
9921 }
9922 }
9923
9924 /* Fill in the entry in the .rel(a).(i)plt section. */
9925 rel.r_offset = got_address;
9926 rel.r_addend = 0;
9927 if (dynindx == -1)
9928 {
9929 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9930 The dynamic linker or static executable then calls SYM_VALUE
9931 to determine the correct run-time value of the .igot.plt entry. */
9932 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9933 initial_got_entry = sym_value;
9934 }
9935 else
9936 {
9937 /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
9938 used by PLT entry. */
9939 if (htab->fdpic_p)
9940 {
9941 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
9942 initial_got_entry = 0;
9943 }
9944 else
9945 {
9946 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9947 initial_got_entry = (splt->output_section->vma
9948 + splt->output_offset);
9949
9950 /* PR ld/16017
9951 When thumb only we need to set the LSB for any address that
9952 will be used with an interworking branch instruction. */
9953 if (using_thumb_only (htab))
9954 initial_got_entry |= 1;
9955 }
9956 }
9957
9958 /* Fill in the entry in the global offset table. */
9959 bfd_put_32 (output_bfd, initial_got_entry,
9960 sgot->contents + got_offset);
9961
9962 if (htab->fdpic_p && !(info->flags & DF_BIND_NOW))
9963 {
9964 /* Setup initial funcdesc value. */
9965 /* FIXME: we don't support lazy binding because there is a
9966 race condition between both words getting written and
9967 some other thread attempting to read them. The ARM
9968 architecture does not have an atomic 64 bit load/store
9969 instruction that could be used to prevent it; it is
9970 recommended that threaded FDPIC applications run with the
9971 LD_BIND_NOW environment variable set. */
9972 bfd_put_32 (output_bfd, plt_address + 0x18,
9973 sgot->contents + got_offset);
9974 bfd_put_32 (output_bfd, -1 /*TODO*/,
9975 sgot->contents + got_offset + 4);
9976 }
9977
9978 if (dynindx == -1)
9979 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9980 else
9981 {
9982 if (htab->fdpic_p)
9983 {
9984 /* For FDPIC we put PLT relocationss into .rel.got when not
9985 lazy binding otherwise we put them in .rel.plt. For now,
9986 we don't support lazy binding so put it in .rel.got. */
9987 if (info->flags & DF_BIND_NOW)
9988 elf32_arm_add_dynreloc (output_bfd, info, htab->root.srelgot, &rel);
9989 else
9990 elf32_arm_add_dynreloc (output_bfd, info, htab->root.srelplt, &rel);
9991 }
9992 else
9993 {
9994 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9995 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9996 }
9997 }
9998
9999 return true;
10000 }
10001
10002 /* Some relocations map to different relocations depending on the
10003 target. Return the real relocation. */
10004
10005 static int
10006 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
10007 int r_type)
10008 {
10009 switch (r_type)
10010 {
10011 case R_ARM_TARGET1:
10012 if (globals->target1_is_rel)
10013 return R_ARM_REL32;
10014 else
10015 return R_ARM_ABS32;
10016
10017 case R_ARM_TARGET2:
10018 return globals->target2_reloc;
10019
10020 default:
10021 return r_type;
10022 }
10023 }
10024
10025 /* Return the base VMA address which should be subtracted from real addresses
10026 when resolving @dtpoff relocation.
10027 This is PT_TLS segment p_vaddr. */
10028
10029 static bfd_vma
10030 dtpoff_base (struct bfd_link_info *info)
10031 {
10032 /* If tls_sec is NULL, we should have signalled an error already. */
10033 if (elf_hash_table (info)->tls_sec == NULL)
10034 return 0;
10035 return elf_hash_table (info)->tls_sec->vma;
10036 }
10037
10038 /* Return the relocation value for @tpoff relocation
10039 if STT_TLS virtual address is ADDRESS. */
10040
10041 static bfd_vma
10042 tpoff (struct bfd_link_info *info, bfd_vma address)
10043 {
10044 struct elf_link_hash_table *htab = elf_hash_table (info);
10045 bfd_vma base;
10046
10047 /* If tls_sec is NULL, we should have signalled an error already. */
10048 if (htab->tls_sec == NULL)
10049 return 0;
10050 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
10051 return address - htab->tls_sec->vma + base;
10052 }
10053
10054 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
10055 VALUE is the relocation value. */
10056
10057 static bfd_reloc_status_type
10058 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
10059 {
10060 if (value > 0xfff)
10061 return bfd_reloc_overflow;
10062
10063 value |= bfd_get_32 (abfd, data) & 0xfffff000;
10064 bfd_put_32 (abfd, value, data);
10065 return bfd_reloc_ok;
10066 }
10067
10068 /* Handle TLS relaxations. Relaxing is possible for symbols that use
10069 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
10070 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
10071
10072 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
10073 is to then call final_link_relocate. Return other values in the
10074 case of error.
10075
10076 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
10077 the pre-relaxed code. It would be nice if the relocs were updated
10078 to match the optimization. */
10079
10080 static bfd_reloc_status_type
10081 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
10082 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
10083 Elf_Internal_Rela *rel, unsigned long is_local)
10084 {
10085 unsigned long insn;
10086
10087 switch (ELF32_R_TYPE (rel->r_info))
10088 {
10089 default:
10090 return bfd_reloc_notsupported;
10091
10092 case R_ARM_TLS_GOTDESC:
10093 if (is_local)
10094 insn = 0;
10095 else
10096 {
10097 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10098 if (insn & 1)
10099 insn -= 5; /* THUMB */
10100 else
10101 insn -= 8; /* ARM */
10102 }
10103 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10104 return bfd_reloc_continue;
10105
10106 case R_ARM_THM_TLS_DESCSEQ:
10107 /* Thumb insn. */
10108 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
10109 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
10110 {
10111 if (is_local)
10112 /* nop */
10113 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10114 }
10115 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
10116 {
10117 if (is_local)
10118 /* nop */
10119 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10120 else
10121 /* ldr rx,[ry] */
10122 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
10123 }
10124 else if ((insn & 0xff87) == 0x4780) /* blx rx */
10125 {
10126 if (is_local)
10127 /* nop */
10128 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10129 else
10130 /* mov r0, rx */
10131 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
10132 contents + rel->r_offset);
10133 }
10134 else
10135 {
10136 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
10137 /* It's a 32 bit instruction, fetch the rest of it for
10138 error generation. */
10139 insn = (insn << 16)
10140 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
10141 _bfd_error_handler
10142 /* xgettext:c-format */
10143 (_("%pB(%pA+%#" PRIx64 "): "
10144 "unexpected %s instruction '%#lx' in TLS trampoline"),
10145 input_bfd, input_sec, (uint64_t) rel->r_offset,
10146 "Thumb", insn);
10147 return bfd_reloc_notsupported;
10148 }
10149 break;
10150
10151 case R_ARM_TLS_DESCSEQ:
10152 /* arm insn. */
10153 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10154 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
10155 {
10156 if (is_local)
10157 /* mov rx, ry */
10158 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
10159 contents + rel->r_offset);
10160 }
10161 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
10162 {
10163 if (is_local)
10164 /* nop */
10165 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10166 else
10167 /* ldr rx,[ry] */
10168 bfd_put_32 (input_bfd, insn & 0xfffff000,
10169 contents + rel->r_offset);
10170 }
10171 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
10172 {
10173 if (is_local)
10174 /* nop */
10175 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10176 else
10177 /* mov r0, rx */
10178 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
10179 contents + rel->r_offset);
10180 }
10181 else
10182 {
10183 _bfd_error_handler
10184 /* xgettext:c-format */
10185 (_("%pB(%pA+%#" PRIx64 "): "
10186 "unexpected %s instruction '%#lx' in TLS trampoline"),
10187 input_bfd, input_sec, (uint64_t) rel->r_offset,
10188 "ARM", insn);
10189 return bfd_reloc_notsupported;
10190 }
10191 break;
10192
10193 case R_ARM_TLS_CALL:
10194 /* GD->IE relaxation, turn the instruction into 'nop' or
10195 'ldr r0, [pc,r0]' */
10196 insn = is_local ? 0xe1a00000 : 0xe79f0000;
10197 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10198 break;
10199
10200 case R_ARM_THM_TLS_CALL:
10201 /* GD->IE relaxation. */
10202 if (!is_local)
10203 /* add r0,pc; ldr r0, [r0] */
10204 insn = 0x44786800;
10205 else if (using_thumb2 (globals))
10206 /* nop.w */
10207 insn = 0xf3af8000;
10208 else
10209 /* nop; nop */
10210 insn = 0xbf00bf00;
10211
10212 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
10213 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
10214 break;
10215 }
10216 return bfd_reloc_ok;
10217 }
10218
10219 /* For a given value of n, calculate the value of G_n as required to
10220 deal with group relocations. We return it in the form of an
10221 encoded constant-and-rotation, together with the final residual. If n is
10222 specified as less than zero, then final_residual is filled with the
10223 input value and no further action is performed. */
10224
10225 static bfd_vma
10226 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
10227 {
10228 int current_n;
10229 bfd_vma g_n;
10230 bfd_vma encoded_g_n = 0;
10231 bfd_vma residual = value; /* Also known as Y_n. */
10232
10233 for (current_n = 0; current_n <= n; current_n++)
10234 {
10235 int shift;
10236
10237 /* Calculate which part of the value to mask. */
10238 if (residual == 0)
10239 shift = 0;
10240 else
10241 {
10242 int msb;
10243
10244 /* Determine the most significant bit in the residual and
10245 align the resulting value to a 2-bit boundary. */
10246 for (msb = 30; msb >= 0; msb -= 2)
10247 if (residual & (3u << msb))
10248 break;
10249
10250 /* The desired shift is now (msb - 6), or zero, whichever
10251 is the greater. */
10252 shift = msb - 6;
10253 if (shift < 0)
10254 shift = 0;
10255 }
10256
10257 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
10258 g_n = residual & (0xff << shift);
10259 encoded_g_n = (g_n >> shift)
10260 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
10261
10262 /* Calculate the residual for the next time around. */
10263 residual &= ~g_n;
10264 }
10265
10266 *final_residual = residual;
10267
10268 return encoded_g_n;
10269 }
10270
10271 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
10272 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
10273
10274 static int
10275 identify_add_or_sub (bfd_vma insn)
10276 {
10277 int opcode = insn & 0x1e00000;
10278
10279 if (opcode == 1 << 23) /* ADD */
10280 return 1;
10281
10282 if (opcode == 1 << 22) /* SUB */
10283 return -1;
10284
10285 return 0;
10286 }
10287
10288 /* Perform a relocation as part of a final link. */
10289
10290 static bfd_reloc_status_type
10291 elf32_arm_final_link_relocate (reloc_howto_type * howto,
10292 bfd * input_bfd,
10293 bfd * output_bfd,
10294 asection * input_section,
10295 bfd_byte * contents,
10296 Elf_Internal_Rela * rel,
10297 bfd_vma value,
10298 struct bfd_link_info * info,
10299 asection * sym_sec,
10300 const char * sym_name,
10301 unsigned char st_type,
10302 enum arm_st_branch_type branch_type,
10303 struct elf_link_hash_entry * h,
10304 bool * unresolved_reloc_p,
10305 char ** error_message)
10306 {
10307 unsigned long r_type = howto->type;
10308 unsigned long r_symndx;
10309 bfd_byte * hit_data = contents + rel->r_offset;
10310 bfd_vma * local_got_offsets;
10311 bfd_vma * local_tlsdesc_gotents;
10312 asection * sgot;
10313 asection * splt;
10314 asection * sreloc = NULL;
10315 asection * srelgot;
10316 bfd_vma addend;
10317 bfd_signed_vma signed_addend;
10318 unsigned char dynreloc_st_type;
10319 bfd_vma dynreloc_value;
10320 struct elf32_arm_link_hash_table * globals;
10321 struct elf32_arm_link_hash_entry *eh;
10322 union gotplt_union *root_plt;
10323 struct arm_plt_info *arm_plt;
10324 bfd_vma plt_offset;
10325 bfd_vma gotplt_offset;
10326 bool has_iplt_entry;
10327 bool resolved_to_zero;
10328
10329 globals = elf32_arm_hash_table (info);
10330 if (globals == NULL)
10331 return bfd_reloc_notsupported;
10332
10333 BFD_ASSERT (is_arm_elf (input_bfd));
10334 BFD_ASSERT (howto != NULL);
10335
10336 /* Some relocation types map to different relocations depending on the
10337 target. We pick the right one here. */
10338 r_type = arm_real_reloc_type (globals, r_type);
10339
10340 /* It is possible to have linker relaxations on some TLS access
10341 models. Update our information here. */
10342 r_type = elf32_arm_tls_transition (info, r_type, h);
10343
10344 if (r_type != howto->type)
10345 howto = elf32_arm_howto_from_type (r_type);
10346
10347 eh = (struct elf32_arm_link_hash_entry *) h;
10348 sgot = globals->root.sgot;
10349 local_got_offsets = elf_local_got_offsets (input_bfd);
10350 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
10351
10352 if (globals->root.dynamic_sections_created)
10353 srelgot = globals->root.srelgot;
10354 else
10355 srelgot = NULL;
10356
10357 r_symndx = ELF32_R_SYM (rel->r_info);
10358
10359 if (globals->use_rel)
10360 {
10361 bfd_vma sign;
10362
10363 switch (bfd_get_reloc_size (howto))
10364 {
10365 case 1: addend = bfd_get_8 (input_bfd, hit_data); break;
10366 case 2: addend = bfd_get_16 (input_bfd, hit_data); break;
10367 case 4: addend = bfd_get_32 (input_bfd, hit_data); break;
10368 default: addend = 0; break;
10369 }
10370 /* Note: the addend and signed_addend calculated here are
10371 incorrect for any split field. */
10372 addend &= howto->src_mask;
10373 sign = howto->src_mask & ~(howto->src_mask >> 1);
10374 signed_addend = (addend ^ sign) - sign;
10375 signed_addend = (bfd_vma) signed_addend << howto->rightshift;
10376 addend <<= howto->rightshift;
10377 }
10378 else
10379 addend = signed_addend = rel->r_addend;
10380
10381 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10382 are resolving a function call relocation. */
10383 if (using_thumb_only (globals)
10384 && (r_type == R_ARM_THM_CALL
10385 || r_type == R_ARM_THM_JUMP24)
10386 && branch_type == ST_BRANCH_TO_ARM)
10387 branch_type = ST_BRANCH_TO_THUMB;
10388
10389 /* Record the symbol information that should be used in dynamic
10390 relocations. */
10391 dynreloc_st_type = st_type;
10392 dynreloc_value = value;
10393 if (branch_type == ST_BRANCH_TO_THUMB)
10394 dynreloc_value |= 1;
10395
10396 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10397 VALUE appropriately for relocations that we resolve at link time. */
10398 has_iplt_entry = false;
10399 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
10400 &arm_plt)
10401 && root_plt->offset != (bfd_vma) -1)
10402 {
10403 plt_offset = root_plt->offset;
10404 gotplt_offset = arm_plt->got_offset;
10405
10406 if (h == NULL || eh->is_iplt)
10407 {
10408 has_iplt_entry = true;
10409 splt = globals->root.iplt;
10410
10411 /* Populate .iplt entries here, because not all of them will
10412 be seen by finish_dynamic_symbol. The lower bit is set if
10413 we have already populated the entry. */
10414 if (plt_offset & 1)
10415 plt_offset--;
10416 else
10417 {
10418 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
10419 -1, dynreloc_value))
10420 root_plt->offset |= 1;
10421 else
10422 return bfd_reloc_notsupported;
10423 }
10424
10425 /* Static relocations always resolve to the .iplt entry. */
10426 st_type = STT_FUNC;
10427 value = (splt->output_section->vma
10428 + splt->output_offset
10429 + plt_offset);
10430 branch_type = ST_BRANCH_TO_ARM;
10431
10432 /* If there are non-call relocations that resolve to the .iplt
10433 entry, then all dynamic ones must too. */
10434 if (arm_plt->noncall_refcount != 0)
10435 {
10436 dynreloc_st_type = st_type;
10437 dynreloc_value = value;
10438 }
10439 }
10440 else
10441 /* We populate the .plt entry in finish_dynamic_symbol. */
10442 splt = globals->root.splt;
10443 }
10444 else
10445 {
10446 splt = NULL;
10447 plt_offset = (bfd_vma) -1;
10448 gotplt_offset = (bfd_vma) -1;
10449 }
10450
10451 resolved_to_zero = (h != NULL
10452 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
10453
10454 switch (r_type)
10455 {
10456 case R_ARM_NONE:
10457 /* We don't need to find a value for this symbol. It's just a
10458 marker. */
10459 *unresolved_reloc_p = false;
10460 return bfd_reloc_ok;
10461
10462 case R_ARM_ABS12:
10463 if (globals->root.target_os != is_vxworks)
10464 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10465 /* Fall through. */
10466
10467 case R_ARM_PC24:
10468 case R_ARM_ABS32:
10469 case R_ARM_ABS32_NOI:
10470 case R_ARM_REL32:
10471 case R_ARM_REL32_NOI:
10472 case R_ARM_CALL:
10473 case R_ARM_JUMP24:
10474 case R_ARM_XPC25:
10475 case R_ARM_PREL31:
10476 case R_ARM_PLT32:
10477 /* Handle relocations which should use the PLT entry. ABS32/REL32
10478 will use the symbol's value, which may point to a PLT entry, but we
10479 don't need to handle that here. If we created a PLT entry, all
10480 branches in this object should go to it, except if the PLT is too
10481 far away, in which case a long branch stub should be inserted. */
10482 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10483 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10484 && r_type != R_ARM_CALL
10485 && r_type != R_ARM_JUMP24
10486 && r_type != R_ARM_PLT32)
10487 && plt_offset != (bfd_vma) -1)
10488 {
10489 /* If we've created a .plt section, and assigned a PLT entry
10490 to this function, it must either be a STT_GNU_IFUNC reference
10491 or not be known to bind locally. In other cases, we should
10492 have cleared the PLT entry by now. */
10493 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10494
10495 value = (splt->output_section->vma
10496 + splt->output_offset
10497 + plt_offset);
10498 *unresolved_reloc_p = false;
10499 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10500 contents, rel->r_offset, value,
10501 rel->r_addend);
10502 }
10503
10504 /* When generating a shared object or relocatable executable, these
10505 relocations are copied into the output file to be resolved at
10506 run time. */
10507 if ((bfd_link_pic (info)
10508 || globals->root.is_relocatable_executable
10509 || globals->fdpic_p)
10510 && (input_section->flags & SEC_ALLOC)
10511 && !(globals->root.target_os == is_vxworks
10512 && strcmp (input_section->output_section->name,
10513 ".tls_vars") == 0)
10514 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10515 || !SYMBOL_CALLS_LOCAL (info, h))
10516 && !(input_bfd == globals->stub_bfd
10517 && strstr (input_section->name, STUB_SUFFIX))
10518 && (h == NULL
10519 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10520 && !resolved_to_zero)
10521 || h->root.type != bfd_link_hash_undefweak)
10522 && r_type != R_ARM_PC24
10523 && r_type != R_ARM_CALL
10524 && r_type != R_ARM_JUMP24
10525 && r_type != R_ARM_PREL31
10526 && r_type != R_ARM_PLT32)
10527 {
10528 Elf_Internal_Rela outrel;
10529 bool skip, relocate;
10530 int isrofixup = 0;
10531
10532 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10533 && !h->def_regular)
10534 {
10535 char *v = _("shared object");
10536
10537 if (bfd_link_executable (info))
10538 v = _("PIE executable");
10539
10540 _bfd_error_handler
10541 (_("%pB: relocation %s against external or undefined symbol `%s'"
10542 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10543 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10544 return bfd_reloc_notsupported;
10545 }
10546
10547 *unresolved_reloc_p = false;
10548
10549 if (sreloc == NULL && globals->root.dynamic_sections_created)
10550 {
10551 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10552 ! globals->use_rel);
10553
10554 if (sreloc == NULL)
10555 return bfd_reloc_notsupported;
10556 }
10557
10558 skip = false;
10559 relocate = false;
10560
10561 outrel.r_addend = addend;
10562 outrel.r_offset =
10563 _bfd_elf_section_offset (output_bfd, info, input_section,
10564 rel->r_offset);
10565 if (outrel.r_offset == (bfd_vma) -1)
10566 skip = true;
10567 else if (outrel.r_offset == (bfd_vma) -2)
10568 skip = true, relocate = true;
10569 outrel.r_offset += (input_section->output_section->vma
10570 + input_section->output_offset);
10571
10572 if (skip)
10573 memset (&outrel, 0, sizeof outrel);
10574 else if (h != NULL
10575 && h->dynindx != -1
10576 && (!bfd_link_pic (info)
10577 || !(bfd_link_pie (info)
10578 || SYMBOLIC_BIND (info, h))
10579 || !h->def_regular))
10580 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10581 else
10582 {
10583 int symbol;
10584
10585 /* This symbol is local, or marked to become local. */
10586 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI
10587 || (globals->fdpic_p && !bfd_link_pic (info)));
10588 /* On SVR4-ish systems, the dynamic loader cannot
10589 relocate the text and data segments independently,
10590 so the symbol does not matter. */
10591 symbol = 0;
10592 if (dynreloc_st_type == STT_GNU_IFUNC)
10593 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10594 to the .iplt entry. Instead, every non-call reference
10595 must use an R_ARM_IRELATIVE relocation to obtain the
10596 correct run-time address. */
10597 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10598 else if (globals->fdpic_p && !bfd_link_pic (info))
10599 isrofixup = 1;
10600 else
10601 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10602 if (globals->use_rel)
10603 relocate = true;
10604 else
10605 outrel.r_addend += dynreloc_value;
10606 }
10607
10608 if (isrofixup)
10609 arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset);
10610 else
10611 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10612
10613 /* If this reloc is against an external symbol, we do not want to
10614 fiddle with the addend. Otherwise, we need to include the symbol
10615 value so that it becomes an addend for the dynamic reloc. */
10616 if (! relocate)
10617 return bfd_reloc_ok;
10618
10619 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10620 contents, rel->r_offset,
10621 dynreloc_value, (bfd_vma) 0);
10622 }
10623 else switch (r_type)
10624 {
10625 case R_ARM_ABS12:
10626 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10627
10628 case R_ARM_XPC25: /* Arm BLX instruction. */
10629 case R_ARM_CALL:
10630 case R_ARM_JUMP24:
10631 case R_ARM_PC24: /* Arm B/BL instruction. */
10632 case R_ARM_PLT32:
10633 {
10634 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10635
10636 if (r_type == R_ARM_XPC25)
10637 {
10638 /* Check for Arm calling Arm function. */
10639 /* FIXME: Should we translate the instruction into a BL
10640 instruction instead ? */
10641 if (branch_type != ST_BRANCH_TO_THUMB)
10642 _bfd_error_handler
10643 (_("\%pB: warning: %s BLX instruction targets"
10644 " %s function '%s'"),
10645 input_bfd, "ARM",
10646 "ARM", h ? h->root.root.string : "(local)");
10647 }
10648 else if (r_type == R_ARM_PC24)
10649 {
10650 /* Check for Arm calling Thumb function. */
10651 if (branch_type == ST_BRANCH_TO_THUMB)
10652 {
10653 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10654 output_bfd, input_section,
10655 hit_data, sym_sec, rel->r_offset,
10656 signed_addend, value,
10657 error_message))
10658 return bfd_reloc_ok;
10659 else
10660 return bfd_reloc_dangerous;
10661 }
10662 }
10663
10664 /* Check if a stub has to be inserted because the
10665 destination is too far or we are changing mode. */
10666 if ( r_type == R_ARM_CALL
10667 || r_type == R_ARM_JUMP24
10668 || r_type == R_ARM_PLT32)
10669 {
10670 enum elf32_arm_stub_type stub_type = arm_stub_none;
10671 struct elf32_arm_link_hash_entry *hash;
10672
10673 hash = (struct elf32_arm_link_hash_entry *) h;
10674 stub_type = arm_type_of_stub (info, input_section, rel,
10675 st_type, &branch_type,
10676 hash, value, sym_sec,
10677 input_bfd, sym_name);
10678
10679 if (stub_type != arm_stub_none)
10680 {
10681 /* The target is out of reach, so redirect the
10682 branch to the local stub for this function. */
10683 stub_entry = elf32_arm_get_stub_entry (input_section,
10684 sym_sec, h,
10685 rel, globals,
10686 stub_type);
10687 {
10688 if (stub_entry != NULL)
10689 value = (stub_entry->stub_offset
10690 + stub_entry->stub_sec->output_offset
10691 + stub_entry->stub_sec->output_section->vma);
10692
10693 if (plt_offset != (bfd_vma) -1)
10694 *unresolved_reloc_p = false;
10695 }
10696 }
10697 else
10698 {
10699 /* If the call goes through a PLT entry, make sure to
10700 check distance to the right destination address. */
10701 if (plt_offset != (bfd_vma) -1)
10702 {
10703 value = (splt->output_section->vma
10704 + splt->output_offset
10705 + plt_offset);
10706 *unresolved_reloc_p = false;
10707 /* The PLT entry is in ARM mode, regardless of the
10708 target function. */
10709 branch_type = ST_BRANCH_TO_ARM;
10710 }
10711 }
10712 }
10713
10714 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10715 where:
10716 S is the address of the symbol in the relocation.
10717 P is address of the instruction being relocated.
10718 A is the addend (extracted from the instruction) in bytes.
10719
10720 S is held in 'value'.
10721 P is the base address of the section containing the
10722 instruction plus the offset of the reloc into that
10723 section, ie:
10724 (input_section->output_section->vma +
10725 input_section->output_offset +
10726 rel->r_offset).
10727 A is the addend, converted into bytes, ie:
10728 (signed_addend * 4)
10729
10730 Note: None of these operations have knowledge of the pipeline
10731 size of the processor, thus it is up to the assembler to
10732 encode this information into the addend. */
10733 value -= (input_section->output_section->vma
10734 + input_section->output_offset);
10735 value -= rel->r_offset;
10736 value += signed_addend;
10737
10738 signed_addend = value;
10739 signed_addend >>= howto->rightshift;
10740
10741 /* A branch to an undefined weak symbol is turned into a jump to
10742 the next instruction unless a PLT entry will be created.
10743 Do the same for local undefined symbols (but not for STN_UNDEF).
10744 The jump to the next instruction is optimized as a NOP depending
10745 on the architecture. */
10746 if (h ? (h->root.type == bfd_link_hash_undefweak
10747 && plt_offset == (bfd_vma) -1)
10748 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10749 {
10750 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10751
10752 if (arch_has_arm_nop (globals))
10753 value |= 0x0320f000;
10754 else
10755 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10756 }
10757 else
10758 {
10759 /* Perform a signed range check. */
10760 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10761 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10762 return bfd_reloc_overflow;
10763
10764 addend = (value & 2);
10765
10766 value = (signed_addend & howto->dst_mask)
10767 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10768
10769 if (r_type == R_ARM_CALL)
10770 {
10771 /* Set the H bit in the BLX instruction. */
10772 if (branch_type == ST_BRANCH_TO_THUMB)
10773 {
10774 if (addend)
10775 value |= (1 << 24);
10776 else
10777 value &= ~(bfd_vma)(1 << 24);
10778 }
10779
10780 /* Select the correct instruction (BL or BLX). */
10781 /* Only if we are not handling a BL to a stub. In this
10782 case, mode switching is performed by the stub. */
10783 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10784 value |= (1 << 28);
10785 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10786 {
10787 value &= ~(bfd_vma)(1 << 28);
10788 value |= (1 << 24);
10789 }
10790 }
10791 }
10792 }
10793 break;
10794
10795 case R_ARM_ABS32:
10796 value += addend;
10797 if (branch_type == ST_BRANCH_TO_THUMB)
10798 value |= 1;
10799 break;
10800
10801 case R_ARM_ABS32_NOI:
10802 value += addend;
10803 break;
10804
10805 case R_ARM_REL32:
10806 value += addend;
10807 if (branch_type == ST_BRANCH_TO_THUMB)
10808 value |= 1;
10809 value -= (input_section->output_section->vma
10810 + input_section->output_offset + rel->r_offset);
10811 break;
10812
10813 case R_ARM_REL32_NOI:
10814 value += addend;
10815 value -= (input_section->output_section->vma
10816 + input_section->output_offset + rel->r_offset);
10817 break;
10818
10819 case R_ARM_PREL31:
10820 value -= (input_section->output_section->vma
10821 + input_section->output_offset + rel->r_offset);
10822 value += signed_addend;
10823 if (! h || h->root.type != bfd_link_hash_undefweak)
10824 {
10825 /* Check for overflow. */
10826 if ((value ^ (value >> 1)) & (1 << 30))
10827 return bfd_reloc_overflow;
10828 }
10829 value &= 0x7fffffff;
10830 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10831 if (branch_type == ST_BRANCH_TO_THUMB)
10832 value |= 1;
10833 break;
10834 }
10835
10836 bfd_put_32 (input_bfd, value, hit_data);
10837 return bfd_reloc_ok;
10838
10839 case R_ARM_ABS8:
10840 value += addend;
10841
10842 /* There is no way to tell whether the user intended to use a signed or
10843 unsigned addend. When checking for overflow we accept either,
10844 as specified by the AAELF. */
10845 if ((long) value > 0xff || (long) value < -0x80)
10846 return bfd_reloc_overflow;
10847
10848 bfd_put_8 (input_bfd, value, hit_data);
10849 return bfd_reloc_ok;
10850
10851 case R_ARM_ABS16:
10852 value += addend;
10853
10854 /* See comment for R_ARM_ABS8. */
10855 if ((long) value > 0xffff || (long) value < -0x8000)
10856 return bfd_reloc_overflow;
10857
10858 bfd_put_16 (input_bfd, value, hit_data);
10859 return bfd_reloc_ok;
10860
10861 case R_ARM_THM_ABS5:
10862 /* Support ldr and str instructions for the thumb. */
10863 if (globals->use_rel)
10864 {
10865 /* Need to refetch addend. */
10866 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10867 /* ??? Need to determine shift amount from operand size. */
10868 addend >>= howto->rightshift;
10869 }
10870 value += addend;
10871
10872 /* ??? Isn't value unsigned? */
10873 if ((long) value > 0x1f || (long) value < -0x10)
10874 return bfd_reloc_overflow;
10875
10876 /* ??? Value needs to be properly shifted into place first. */
10877 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10878 bfd_put_16 (input_bfd, value, hit_data);
10879 return bfd_reloc_ok;
10880
10881 case R_ARM_THM_ALU_PREL_11_0:
10882 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10883 {
10884 bfd_vma insn;
10885 bfd_signed_vma relocation;
10886
10887 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10888 | bfd_get_16 (input_bfd, hit_data + 2);
10889
10890 if (globals->use_rel)
10891 {
10892 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10893 | ((insn & (1 << 26)) >> 15);
10894 if (insn & 0xf00000)
10895 signed_addend = -signed_addend;
10896 }
10897
10898 relocation = value + signed_addend;
10899 relocation -= Pa (input_section->output_section->vma
10900 + input_section->output_offset
10901 + rel->r_offset);
10902
10903 /* PR 21523: Use an absolute value. The user of this reloc will
10904 have already selected an ADD or SUB insn appropriately. */
10905 value = llabs (relocation);
10906
10907 if (value >= 0x1000)
10908 return bfd_reloc_overflow;
10909
10910 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10911 if (branch_type == ST_BRANCH_TO_THUMB)
10912 value |= 1;
10913
10914 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10915 | ((value & 0x700) << 4)
10916 | ((value & 0x800) << 15);
10917 if (relocation < 0)
10918 insn |= 0xa00000;
10919
10920 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10921 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10922
10923 return bfd_reloc_ok;
10924 }
10925
10926 case R_ARM_THM_PC8:
10927 /* PR 10073: This reloc is not generated by the GNU toolchain,
10928 but it is supported for compatibility with third party libraries
10929 generated by other compilers, specifically the ARM/IAR. */
10930 {
10931 bfd_vma insn;
10932 bfd_signed_vma relocation;
10933
10934 insn = bfd_get_16 (input_bfd, hit_data);
10935
10936 if (globals->use_rel)
10937 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10938
10939 relocation = value + addend;
10940 relocation -= Pa (input_section->output_section->vma
10941 + input_section->output_offset
10942 + rel->r_offset);
10943
10944 value = relocation;
10945
10946 /* We do not check for overflow of this reloc. Although strictly
10947 speaking this is incorrect, it appears to be necessary in order
10948 to work with IAR generated relocs. Since GCC and GAS do not
10949 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10950 a problem for them. */
10951 value &= 0x3fc;
10952
10953 insn = (insn & 0xff00) | (value >> 2);
10954
10955 bfd_put_16 (input_bfd, insn, hit_data);
10956
10957 return bfd_reloc_ok;
10958 }
10959
10960 case R_ARM_THM_PC12:
10961 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10962 {
10963 bfd_vma insn;
10964 bfd_signed_vma relocation;
10965
10966 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10967 | bfd_get_16 (input_bfd, hit_data + 2);
10968
10969 if (globals->use_rel)
10970 {
10971 signed_addend = insn & 0xfff;
10972 if (!(insn & (1 << 23)))
10973 signed_addend = -signed_addend;
10974 }
10975
10976 relocation = value + signed_addend;
10977 relocation -= Pa (input_section->output_section->vma
10978 + input_section->output_offset
10979 + rel->r_offset);
10980
10981 value = relocation;
10982
10983 if (value >= 0x1000)
10984 return bfd_reloc_overflow;
10985
10986 insn = (insn & 0xff7ff000) | value;
10987 if (relocation >= 0)
10988 insn |= (1 << 23);
10989
10990 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10991 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10992
10993 return bfd_reloc_ok;
10994 }
10995
10996 case R_ARM_THM_XPC22:
10997 case R_ARM_THM_CALL:
10998 case R_ARM_THM_JUMP24:
10999 /* Thumb BL (branch long instruction). */
11000 {
11001 bfd_vma relocation;
11002 bfd_vma reloc_sign;
11003 bool overflow = false;
11004 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11005 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11006 bfd_signed_vma reloc_signed_max;
11007 bfd_signed_vma reloc_signed_min;
11008 bfd_vma check;
11009 bfd_signed_vma signed_check;
11010 int bitsize;
11011 const int thumb2 = using_thumb2 (globals);
11012 const int thumb2_bl = using_thumb2_bl (globals);
11013
11014 /* A branch to an undefined weak symbol is turned into a jump to
11015 the next instruction unless a PLT entry will be created.
11016 The jump to the next instruction is optimized as a NOP.W for
11017 Thumb-2 enabled architectures. */
11018 if (h && h->root.type == bfd_link_hash_undefweak
11019 && plt_offset == (bfd_vma) -1)
11020 {
11021 if (thumb2)
11022 {
11023 bfd_put_16 (input_bfd, 0xf3af, hit_data);
11024 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
11025 }
11026 else
11027 {
11028 bfd_put_16 (input_bfd, 0xe000, hit_data);
11029 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
11030 }
11031 return bfd_reloc_ok;
11032 }
11033
11034 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
11035 with Thumb-1) involving the J1 and J2 bits. */
11036 if (globals->use_rel)
11037 {
11038 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
11039 bfd_vma upper = upper_insn & 0x3ff;
11040 bfd_vma lower = lower_insn & 0x7ff;
11041 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
11042 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
11043 bfd_vma i1 = j1 ^ s ? 0 : 1;
11044 bfd_vma i2 = j2 ^ s ? 0 : 1;
11045
11046 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
11047 /* Sign extend. */
11048 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
11049
11050 signed_addend = addend;
11051 }
11052
11053 if (r_type == R_ARM_THM_XPC22)
11054 {
11055 /* Check for Thumb to Thumb call. */
11056 /* FIXME: Should we translate the instruction into a BL
11057 instruction instead ? */
11058 if (branch_type == ST_BRANCH_TO_THUMB)
11059 _bfd_error_handler
11060 (_("%pB: warning: %s BLX instruction targets"
11061 " %s function '%s'"),
11062 input_bfd, "Thumb",
11063 "Thumb", h ? h->root.root.string : "(local)");
11064 }
11065 else
11066 {
11067 /* If it is not a call to Thumb, assume call to Arm.
11068 If it is a call relative to a section name, then it is not a
11069 function call at all, but rather a long jump. Calls through
11070 the PLT do not require stubs. */
11071 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
11072 {
11073 if (globals->use_blx && r_type == R_ARM_THM_CALL)
11074 {
11075 /* Convert BL to BLX. */
11076 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11077 }
11078 else if (( r_type != R_ARM_THM_CALL)
11079 && (r_type != R_ARM_THM_JUMP24))
11080 {
11081 if (elf32_thumb_to_arm_stub
11082 (info, sym_name, input_bfd, output_bfd, input_section,
11083 hit_data, sym_sec, rel->r_offset, signed_addend, value,
11084 error_message))
11085 return bfd_reloc_ok;
11086 else
11087 return bfd_reloc_dangerous;
11088 }
11089 }
11090 else if (branch_type == ST_BRANCH_TO_THUMB
11091 && globals->use_blx
11092 && r_type == R_ARM_THM_CALL)
11093 {
11094 /* Make sure this is a BL. */
11095 lower_insn |= 0x1800;
11096 }
11097 }
11098
11099 enum elf32_arm_stub_type stub_type = arm_stub_none;
11100 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
11101 {
11102 /* Check if a stub has to be inserted because the destination
11103 is too far. */
11104 struct elf32_arm_stub_hash_entry *stub_entry;
11105 struct elf32_arm_link_hash_entry *hash;
11106
11107 hash = (struct elf32_arm_link_hash_entry *) h;
11108
11109 stub_type = arm_type_of_stub (info, input_section, rel,
11110 st_type, &branch_type,
11111 hash, value, sym_sec,
11112 input_bfd, sym_name);
11113
11114 if (stub_type != arm_stub_none)
11115 {
11116 /* The target is out of reach or we are changing modes, so
11117 redirect the branch to the local stub for this
11118 function. */
11119 stub_entry = elf32_arm_get_stub_entry (input_section,
11120 sym_sec, h,
11121 rel, globals,
11122 stub_type);
11123 if (stub_entry != NULL)
11124 {
11125 value = (stub_entry->stub_offset
11126 + stub_entry->stub_sec->output_offset
11127 + stub_entry->stub_sec->output_section->vma);
11128
11129 if (plt_offset != (bfd_vma) -1)
11130 *unresolved_reloc_p = false;
11131 }
11132
11133 /* If this call becomes a call to Arm, force BLX. */
11134 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
11135 {
11136 if ((stub_entry
11137 && !arm_stub_is_thumb (stub_entry->stub_type))
11138 || branch_type != ST_BRANCH_TO_THUMB)
11139 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11140 }
11141 }
11142 }
11143
11144 /* Handle calls via the PLT. */
11145 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
11146 {
11147 value = (splt->output_section->vma
11148 + splt->output_offset
11149 + plt_offset);
11150
11151 if (globals->use_blx
11152 && r_type == R_ARM_THM_CALL
11153 && ! using_thumb_only (globals))
11154 {
11155 /* If the Thumb BLX instruction is available, convert
11156 the BL to a BLX instruction to call the ARM-mode
11157 PLT entry. */
11158 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11159 branch_type = ST_BRANCH_TO_ARM;
11160 }
11161 else
11162 {
11163 if (! using_thumb_only (globals))
11164 /* Target the Thumb stub before the ARM PLT entry. */
11165 value -= PLT_THUMB_STUB_SIZE;
11166 branch_type = ST_BRANCH_TO_THUMB;
11167 }
11168 *unresolved_reloc_p = false;
11169 }
11170
11171 relocation = value + signed_addend;
11172
11173 relocation -= (input_section->output_section->vma
11174 + input_section->output_offset
11175 + rel->r_offset);
11176
11177 check = relocation >> howto->rightshift;
11178
11179 /* If this is a signed value, the rightshift just dropped
11180 leading 1 bits (assuming twos complement). */
11181 if ((bfd_signed_vma) relocation >= 0)
11182 signed_check = check;
11183 else
11184 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
11185
11186 /* Calculate the permissable maximum and minimum values for
11187 this relocation according to whether we're relocating for
11188 Thumb-2 or not. */
11189 bitsize = howto->bitsize;
11190 if (!thumb2_bl)
11191 bitsize -= 2;
11192 reloc_signed_max = (1 << (bitsize - 1)) - 1;
11193 reloc_signed_min = ~reloc_signed_max;
11194
11195 /* Assumes two's complement. */
11196 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11197 overflow = true;
11198
11199 if ((lower_insn & 0x5000) == 0x4000)
11200 /* For a BLX instruction, make sure that the relocation is rounded up
11201 to a word boundary. This follows the semantics of the instruction
11202 which specifies that bit 1 of the target address will come from bit
11203 1 of the base address. */
11204 relocation = (relocation + 2) & ~ 3;
11205
11206 /* Put RELOCATION back into the insn. Assumes two's complement.
11207 We use the Thumb-2 encoding, which is safe even if dealing with
11208 a Thumb-1 instruction by virtue of our overflow check above. */
11209 reloc_sign = (signed_check < 0) ? 1 : 0;
11210 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
11211 | ((relocation >> 12) & 0x3ff)
11212 | (reloc_sign << 10);
11213 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
11214 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
11215 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
11216 | ((relocation >> 1) & 0x7ff);
11217
11218 /* Put the relocated value back in the object file: */
11219 bfd_put_16 (input_bfd, upper_insn, hit_data);
11220 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11221
11222 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11223 }
11224 break;
11225
11226 case R_ARM_THM_JUMP19:
11227 /* Thumb32 conditional branch instruction. */
11228 {
11229 bfd_vma relocation;
11230 bool overflow = false;
11231 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11232 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11233 bfd_signed_vma reloc_signed_max = 0xffffe;
11234 bfd_signed_vma reloc_signed_min = -0x100000;
11235 bfd_signed_vma signed_check;
11236 enum elf32_arm_stub_type stub_type = arm_stub_none;
11237 struct elf32_arm_stub_hash_entry *stub_entry;
11238 struct elf32_arm_link_hash_entry *hash;
11239
11240 /* Need to refetch the addend, reconstruct the top three bits,
11241 and squish the two 11 bit pieces together. */
11242 if (globals->use_rel)
11243 {
11244 bfd_vma S = (upper_insn & 0x0400) >> 10;
11245 bfd_vma upper = (upper_insn & 0x003f);
11246 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
11247 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
11248 bfd_vma lower = (lower_insn & 0x07ff);
11249
11250 upper |= J1 << 6;
11251 upper |= J2 << 7;
11252 upper |= (!S) << 8;
11253 upper -= 0x0100; /* Sign extend. */
11254
11255 addend = (upper << 12) | (lower << 1);
11256 signed_addend = addend;
11257 }
11258
11259 /* Handle calls via the PLT. */
11260 if (plt_offset != (bfd_vma) -1)
11261 {
11262 value = (splt->output_section->vma
11263 + splt->output_offset
11264 + plt_offset);
11265 /* Target the Thumb stub before the ARM PLT entry. */
11266 value -= PLT_THUMB_STUB_SIZE;
11267 *unresolved_reloc_p = false;
11268 }
11269
11270 hash = (struct elf32_arm_link_hash_entry *)h;
11271
11272 stub_type = arm_type_of_stub (info, input_section, rel,
11273 st_type, &branch_type,
11274 hash, value, sym_sec,
11275 input_bfd, sym_name);
11276 if (stub_type != arm_stub_none)
11277 {
11278 stub_entry = elf32_arm_get_stub_entry (input_section,
11279 sym_sec, h,
11280 rel, globals,
11281 stub_type);
11282 if (stub_entry != NULL)
11283 {
11284 value = (stub_entry->stub_offset
11285 + stub_entry->stub_sec->output_offset
11286 + stub_entry->stub_sec->output_section->vma);
11287 }
11288 }
11289
11290 relocation = value + signed_addend;
11291 relocation -= (input_section->output_section->vma
11292 + input_section->output_offset
11293 + rel->r_offset);
11294 signed_check = (bfd_signed_vma) relocation;
11295
11296 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11297 overflow = true;
11298
11299 /* Put RELOCATION back into the insn. */
11300 {
11301 bfd_vma S = (relocation & 0x00100000) >> 20;
11302 bfd_vma J2 = (relocation & 0x00080000) >> 19;
11303 bfd_vma J1 = (relocation & 0x00040000) >> 18;
11304 bfd_vma hi = (relocation & 0x0003f000) >> 12;
11305 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
11306
11307 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
11308 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
11309 }
11310
11311 /* Put the relocated value back in the object file: */
11312 bfd_put_16 (input_bfd, upper_insn, hit_data);
11313 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11314
11315 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11316 }
11317
11318 case R_ARM_THM_JUMP11:
11319 case R_ARM_THM_JUMP8:
11320 case R_ARM_THM_JUMP6:
11321 /* Thumb B (branch) instruction). */
11322 {
11323 bfd_signed_vma relocation;
11324 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
11325 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
11326 bfd_signed_vma signed_check;
11327
11328 /* CZB cannot jump backward. */
11329 if (r_type == R_ARM_THM_JUMP6)
11330 {
11331 reloc_signed_min = 0;
11332 if (globals->use_rel)
11333 signed_addend = ((addend & 0x200) >> 3) | ((addend & 0xf8) >> 2);
11334 }
11335
11336 relocation = value + signed_addend;
11337
11338 relocation -= (input_section->output_section->vma
11339 + input_section->output_offset
11340 + rel->r_offset);
11341
11342 relocation >>= howto->rightshift;
11343 signed_check = relocation;
11344
11345 if (r_type == R_ARM_THM_JUMP6)
11346 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
11347 else
11348 relocation &= howto->dst_mask;
11349 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
11350
11351 bfd_put_16 (input_bfd, relocation, hit_data);
11352
11353 /* Assumes two's complement. */
11354 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11355 return bfd_reloc_overflow;
11356
11357 return bfd_reloc_ok;
11358 }
11359
11360 case R_ARM_ALU_PCREL7_0:
11361 case R_ARM_ALU_PCREL15_8:
11362 case R_ARM_ALU_PCREL23_15:
11363 {
11364 bfd_vma insn;
11365 bfd_vma relocation;
11366
11367 insn = bfd_get_32 (input_bfd, hit_data);
11368 if (globals->use_rel)
11369 {
11370 /* Extract the addend. */
11371 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
11372 signed_addend = addend;
11373 }
11374 relocation = value + signed_addend;
11375
11376 relocation -= (input_section->output_section->vma
11377 + input_section->output_offset
11378 + rel->r_offset);
11379 insn = (insn & ~0xfff)
11380 | ((howto->bitpos << 7) & 0xf00)
11381 | ((relocation >> howto->bitpos) & 0xff);
11382 bfd_put_32 (input_bfd, value, hit_data);
11383 }
11384 return bfd_reloc_ok;
11385
11386 case R_ARM_GNU_VTINHERIT:
11387 case R_ARM_GNU_VTENTRY:
11388 return bfd_reloc_ok;
11389
11390 case R_ARM_GOTOFF32:
11391 /* Relocation is relative to the start of the
11392 global offset table. */
11393
11394 BFD_ASSERT (sgot != NULL);
11395 if (sgot == NULL)
11396 return bfd_reloc_notsupported;
11397
11398 /* If we are addressing a Thumb function, we need to adjust the
11399 address by one, so that attempts to call the function pointer will
11400 correctly interpret it as Thumb code. */
11401 if (branch_type == ST_BRANCH_TO_THUMB)
11402 value += 1;
11403
11404 /* Note that sgot->output_offset is not involved in this
11405 calculation. We always want the start of .got. If we
11406 define _GLOBAL_OFFSET_TABLE in a different way, as is
11407 permitted by the ABI, we might have to change this
11408 calculation. */
11409 value -= sgot->output_section->vma;
11410 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11411 contents, rel->r_offset, value,
11412 rel->r_addend);
11413
11414 case R_ARM_GOTPC:
11415 /* Use global offset table as symbol value. */
11416 BFD_ASSERT (sgot != NULL);
11417
11418 if (sgot == NULL)
11419 return bfd_reloc_notsupported;
11420
11421 *unresolved_reloc_p = false;
11422 value = sgot->output_section->vma;
11423 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11424 contents, rel->r_offset, value,
11425 rel->r_addend);
11426
11427 case R_ARM_GOT32:
11428 case R_ARM_GOT_PREL:
11429 /* Relocation is to the entry for this symbol in the
11430 global offset table. */
11431 if (sgot == NULL)
11432 return bfd_reloc_notsupported;
11433
11434 if (dynreloc_st_type == STT_GNU_IFUNC
11435 && plt_offset != (bfd_vma) -1
11436 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11437 {
11438 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11439 symbol, and the relocation resolves directly to the runtime
11440 target rather than to the .iplt entry. This means that any
11441 .got entry would be the same value as the .igot.plt entry,
11442 so there's no point creating both. */
11443 sgot = globals->root.igotplt;
11444 value = sgot->output_offset + gotplt_offset;
11445 }
11446 else if (h != NULL)
11447 {
11448 bfd_vma off;
11449
11450 off = h->got.offset;
11451 BFD_ASSERT (off != (bfd_vma) -1);
11452 if ((off & 1) != 0)
11453 {
11454 /* We have already processsed one GOT relocation against
11455 this symbol. */
11456 off &= ~1;
11457 if (globals->root.dynamic_sections_created
11458 && !SYMBOL_REFERENCES_LOCAL (info, h))
11459 *unresolved_reloc_p = false;
11460 }
11461 else
11462 {
11463 Elf_Internal_Rela outrel;
11464 int isrofixup = 0;
11465
11466 if (((h->dynindx != -1) || globals->fdpic_p)
11467 && !SYMBOL_REFERENCES_LOCAL (info, h))
11468 {
11469 /* If the symbol doesn't resolve locally in a static
11470 object, we have an undefined reference. If the
11471 symbol doesn't resolve locally in a dynamic object,
11472 it should be resolved by the dynamic linker. */
11473 if (globals->root.dynamic_sections_created)
11474 {
11475 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11476 *unresolved_reloc_p = false;
11477 }
11478 else
11479 outrel.r_info = 0;
11480 outrel.r_addend = 0;
11481 }
11482 else
11483 {
11484 if (dynreloc_st_type == STT_GNU_IFUNC)
11485 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11486 else if (bfd_link_pic (info)
11487 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
11488 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11489 else
11490 {
11491 outrel.r_info = 0;
11492 if (globals->fdpic_p)
11493 isrofixup = 1;
11494 }
11495 outrel.r_addend = dynreloc_value;
11496 }
11497
11498 /* The GOT entry is initialized to zero by default.
11499 See if we should install a different value. */
11500 if (outrel.r_addend != 0
11501 && (globals->use_rel || outrel.r_info == 0))
11502 {
11503 bfd_put_32 (output_bfd, outrel.r_addend,
11504 sgot->contents + off);
11505 outrel.r_addend = 0;
11506 }
11507
11508 if (isrofixup)
11509 arm_elf_add_rofixup (output_bfd,
11510 elf32_arm_hash_table (info)->srofixup,
11511 sgot->output_section->vma
11512 + sgot->output_offset + off);
11513
11514 else if (outrel.r_info != 0)
11515 {
11516 outrel.r_offset = (sgot->output_section->vma
11517 + sgot->output_offset
11518 + off);
11519 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11520 }
11521
11522 h->got.offset |= 1;
11523 }
11524 value = sgot->output_offset + off;
11525 }
11526 else
11527 {
11528 bfd_vma off;
11529
11530 BFD_ASSERT (local_got_offsets != NULL
11531 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11532
11533 off = local_got_offsets[r_symndx];
11534
11535 /* The offset must always be a multiple of 4. We use the
11536 least significant bit to record whether we have already
11537 generated the necessary reloc. */
11538 if ((off & 1) != 0)
11539 off &= ~1;
11540 else
11541 {
11542 Elf_Internal_Rela outrel;
11543 int isrofixup = 0;
11544
11545 if (dynreloc_st_type == STT_GNU_IFUNC)
11546 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11547 else if (bfd_link_pic (info))
11548 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11549 else
11550 {
11551 outrel.r_info = 0;
11552 if (globals->fdpic_p)
11553 isrofixup = 1;
11554 }
11555
11556 /* The GOT entry is initialized to zero by default.
11557 See if we should install a different value. */
11558 if (globals->use_rel || outrel.r_info == 0)
11559 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11560
11561 if (isrofixup)
11562 arm_elf_add_rofixup (output_bfd,
11563 globals->srofixup,
11564 sgot->output_section->vma
11565 + sgot->output_offset + off);
11566
11567 else if (outrel.r_info != 0)
11568 {
11569 outrel.r_addend = addend + dynreloc_value;
11570 outrel.r_offset = (sgot->output_section->vma
11571 + sgot->output_offset
11572 + off);
11573 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11574 }
11575
11576 local_got_offsets[r_symndx] |= 1;
11577 }
11578
11579 value = sgot->output_offset + off;
11580 }
11581 if (r_type != R_ARM_GOT32)
11582 value += sgot->output_section->vma;
11583
11584 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11585 contents, rel->r_offset, value,
11586 rel->r_addend);
11587
11588 case R_ARM_TLS_LDO32:
11589 value = value - dtpoff_base (info);
11590
11591 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11592 contents, rel->r_offset, value,
11593 rel->r_addend);
11594
11595 case R_ARM_TLS_LDM32:
11596 case R_ARM_TLS_LDM32_FDPIC:
11597 {
11598 bfd_vma off;
11599
11600 if (sgot == NULL)
11601 abort ();
11602
11603 off = globals->tls_ldm_got.offset;
11604
11605 if ((off & 1) != 0)
11606 off &= ~1;
11607 else
11608 {
11609 /* If we don't know the module number, create a relocation
11610 for it. */
11611 if (bfd_link_dll (info))
11612 {
11613 Elf_Internal_Rela outrel;
11614
11615 if (srelgot == NULL)
11616 abort ();
11617
11618 outrel.r_addend = 0;
11619 outrel.r_offset = (sgot->output_section->vma
11620 + sgot->output_offset + off);
11621 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11622
11623 if (globals->use_rel)
11624 bfd_put_32 (output_bfd, outrel.r_addend,
11625 sgot->contents + off);
11626
11627 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11628 }
11629 else
11630 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11631
11632 globals->tls_ldm_got.offset |= 1;
11633 }
11634
11635 if (r_type == R_ARM_TLS_LDM32_FDPIC)
11636 {
11637 bfd_put_32 (output_bfd,
11638 globals->root.sgot->output_offset + off,
11639 contents + rel->r_offset);
11640
11641 return bfd_reloc_ok;
11642 }
11643 else
11644 {
11645 value = sgot->output_section->vma + sgot->output_offset + off
11646 - (input_section->output_section->vma
11647 + input_section->output_offset + rel->r_offset);
11648
11649 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11650 contents, rel->r_offset, value,
11651 rel->r_addend);
11652 }
11653 }
11654
11655 case R_ARM_TLS_CALL:
11656 case R_ARM_THM_TLS_CALL:
11657 case R_ARM_TLS_GD32:
11658 case R_ARM_TLS_GD32_FDPIC:
11659 case R_ARM_TLS_IE32:
11660 case R_ARM_TLS_IE32_FDPIC:
11661 case R_ARM_TLS_GOTDESC:
11662 case R_ARM_TLS_DESCSEQ:
11663 case R_ARM_THM_TLS_DESCSEQ:
11664 {
11665 bfd_vma off, offplt;
11666 int indx = 0;
11667 char tls_type;
11668
11669 BFD_ASSERT (sgot != NULL);
11670
11671 if (h != NULL)
11672 {
11673 bool dyn;
11674 dyn = globals->root.dynamic_sections_created;
11675 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11676 bfd_link_pic (info),
11677 h)
11678 && (!bfd_link_pic (info)
11679 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11680 {
11681 *unresolved_reloc_p = false;
11682 indx = h->dynindx;
11683 }
11684 off = h->got.offset;
11685 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11686 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11687 }
11688 else
11689 {
11690 BFD_ASSERT (local_got_offsets != NULL);
11691
11692 if (r_symndx >= elf32_arm_num_entries (input_bfd))
11693 {
11694 _bfd_error_handler (_("\
11695 %pB: expected symbol index in range 0..%lu but found local symbol with index %lu"),
11696 input_bfd,
11697 (unsigned long) elf32_arm_num_entries (input_bfd),
11698 r_symndx);
11699 return false;
11700 }
11701 off = local_got_offsets[r_symndx];
11702 offplt = local_tlsdesc_gotents[r_symndx];
11703 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11704 }
11705
11706 /* Linker relaxations happens from one of the
11707 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11708 if (ELF32_R_TYPE (rel->r_info) != r_type)
11709 tls_type = GOT_TLS_IE;
11710
11711 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11712
11713 if ((off & 1) != 0)
11714 off &= ~1;
11715 else
11716 {
11717 bool need_relocs = false;
11718 Elf_Internal_Rela outrel;
11719 int cur_off = off;
11720
11721 /* The GOT entries have not been initialized yet. Do it
11722 now, and emit any relocations. If both an IE GOT and a
11723 GD GOT are necessary, we emit the GD first. */
11724
11725 if ((bfd_link_dll (info) || indx != 0)
11726 && (h == NULL
11727 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11728 && !resolved_to_zero)
11729 || h->root.type != bfd_link_hash_undefweak))
11730 {
11731 need_relocs = true;
11732 BFD_ASSERT (srelgot != NULL);
11733 }
11734
11735 if (tls_type & GOT_TLS_GDESC)
11736 {
11737 bfd_byte *loc;
11738
11739 /* We should have relaxed, unless this is an undefined
11740 weak symbol. */
11741 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11742 || bfd_link_dll (info));
11743 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11744 <= globals->root.sgotplt->size);
11745
11746 outrel.r_addend = 0;
11747 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11748 + globals->root.sgotplt->output_offset
11749 + offplt
11750 + globals->sgotplt_jump_table_size);
11751
11752 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11753 sreloc = globals->root.srelplt;
11754 loc = sreloc->contents;
11755 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11756 BFD_ASSERT (loc + RELOC_SIZE (globals)
11757 <= sreloc->contents + sreloc->size);
11758
11759 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11760
11761 /* For globals, the first word in the relocation gets
11762 the relocation index and the top bit set, or zero,
11763 if we're binding now. For locals, it gets the
11764 symbol's offset in the tls section. */
11765 bfd_put_32 (output_bfd,
11766 !h ? value - elf_hash_table (info)->tls_sec->vma
11767 : info->flags & DF_BIND_NOW ? 0
11768 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11769 globals->root.sgotplt->contents + offplt
11770 + globals->sgotplt_jump_table_size);
11771
11772 /* Second word in the relocation is always zero. */
11773 bfd_put_32 (output_bfd, 0,
11774 globals->root.sgotplt->contents + offplt
11775 + globals->sgotplt_jump_table_size + 4);
11776 }
11777 if (tls_type & GOT_TLS_GD)
11778 {
11779 if (need_relocs)
11780 {
11781 outrel.r_addend = 0;
11782 outrel.r_offset = (sgot->output_section->vma
11783 + sgot->output_offset
11784 + cur_off);
11785 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11786
11787 if (globals->use_rel)
11788 bfd_put_32 (output_bfd, outrel.r_addend,
11789 sgot->contents + cur_off);
11790
11791 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11792
11793 if (indx == 0)
11794 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11795 sgot->contents + cur_off + 4);
11796 else
11797 {
11798 outrel.r_addend = 0;
11799 outrel.r_info = ELF32_R_INFO (indx,
11800 R_ARM_TLS_DTPOFF32);
11801 outrel.r_offset += 4;
11802
11803 if (globals->use_rel)
11804 bfd_put_32 (output_bfd, outrel.r_addend,
11805 sgot->contents + cur_off + 4);
11806
11807 elf32_arm_add_dynreloc (output_bfd, info,
11808 srelgot, &outrel);
11809 }
11810 }
11811 else
11812 {
11813 /* If we are not emitting relocations for a
11814 general dynamic reference, then we must be in a
11815 static link or an executable link with the
11816 symbol binding locally. Mark it as belonging
11817 to module 1, the executable. */
11818 bfd_put_32 (output_bfd, 1,
11819 sgot->contents + cur_off);
11820 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11821 sgot->contents + cur_off + 4);
11822 }
11823
11824 cur_off += 8;
11825 }
11826
11827 if (tls_type & GOT_TLS_IE)
11828 {
11829 if (need_relocs)
11830 {
11831 if (indx == 0)
11832 outrel.r_addend = value - dtpoff_base (info);
11833 else
11834 outrel.r_addend = 0;
11835 outrel.r_offset = (sgot->output_section->vma
11836 + sgot->output_offset
11837 + cur_off);
11838 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11839
11840 if (globals->use_rel)
11841 bfd_put_32 (output_bfd, outrel.r_addend,
11842 sgot->contents + cur_off);
11843
11844 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11845 }
11846 else
11847 bfd_put_32 (output_bfd, tpoff (info, value),
11848 sgot->contents + cur_off);
11849 cur_off += 4;
11850 }
11851
11852 if (h != NULL)
11853 h->got.offset |= 1;
11854 else
11855 local_got_offsets[r_symndx] |= 1;
11856 }
11857
11858 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32 && r_type != R_ARM_TLS_GD32_FDPIC)
11859 off += 8;
11860 else if (tls_type & GOT_TLS_GDESC)
11861 off = offplt;
11862
11863 if (ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
11864 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL)
11865 {
11866 bfd_signed_vma offset;
11867 /* TLS stubs are arm mode. The original symbol is a
11868 data object, so branch_type is bogus. */
11869 branch_type = ST_BRANCH_TO_ARM;
11870 enum elf32_arm_stub_type stub_type
11871 = arm_type_of_stub (info, input_section, rel,
11872 st_type, &branch_type,
11873 (struct elf32_arm_link_hash_entry *)h,
11874 globals->tls_trampoline, globals->root.splt,
11875 input_bfd, sym_name);
11876
11877 if (stub_type != arm_stub_none)
11878 {
11879 struct elf32_arm_stub_hash_entry *stub_entry
11880 = elf32_arm_get_stub_entry
11881 (input_section, globals->root.splt, 0, rel,
11882 globals, stub_type);
11883 offset = (stub_entry->stub_offset
11884 + stub_entry->stub_sec->output_offset
11885 + stub_entry->stub_sec->output_section->vma);
11886 }
11887 else
11888 offset = (globals->root.splt->output_section->vma
11889 + globals->root.splt->output_offset
11890 + globals->tls_trampoline);
11891
11892 if (ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL)
11893 {
11894 unsigned long inst;
11895
11896 offset -= (input_section->output_section->vma
11897 + input_section->output_offset
11898 + rel->r_offset + 8);
11899
11900 inst = offset >> 2;
11901 inst &= 0x00ffffff;
11902 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11903 }
11904 else
11905 {
11906 /* Thumb blx encodes the offset in a complicated
11907 fashion. */
11908 unsigned upper_insn, lower_insn;
11909 unsigned neg;
11910
11911 offset -= (input_section->output_section->vma
11912 + input_section->output_offset
11913 + rel->r_offset + 4);
11914
11915 if (stub_type != arm_stub_none
11916 && arm_stub_is_thumb (stub_type))
11917 {
11918 lower_insn = 0xd000;
11919 }
11920 else
11921 {
11922 lower_insn = 0xc000;
11923 /* Round up the offset to a word boundary. */
11924 offset = (offset + 2) & ~2;
11925 }
11926
11927 neg = offset < 0;
11928 upper_insn = (0xf000
11929 | ((offset >> 12) & 0x3ff)
11930 | (neg << 10));
11931 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11932 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11933 | ((offset >> 1) & 0x7ff);
11934 bfd_put_16 (input_bfd, upper_insn, hit_data);
11935 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11936 return bfd_reloc_ok;
11937 }
11938 }
11939 /* These relocations needs special care, as besides the fact
11940 they point somewhere in .gotplt, the addend must be
11941 adjusted accordingly depending on the type of instruction
11942 we refer to. */
11943 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11944 {
11945 unsigned long data, insn;
11946 unsigned thumb;
11947
11948 data = bfd_get_signed_32 (input_bfd, hit_data);
11949 thumb = data & 1;
11950 data &= ~1ul;
11951
11952 if (thumb)
11953 {
11954 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11955 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11956 insn = (insn << 16)
11957 | bfd_get_16 (input_bfd,
11958 contents + rel->r_offset - data + 2);
11959 if ((insn & 0xf800c000) == 0xf000c000)
11960 /* bl/blx */
11961 value = -6;
11962 else if ((insn & 0xffffff00) == 0x4400)
11963 /* add */
11964 value = -5;
11965 else
11966 {
11967 _bfd_error_handler
11968 /* xgettext:c-format */
11969 (_("%pB(%pA+%#" PRIx64 "): "
11970 "unexpected %s instruction '%#lx' "
11971 "referenced by TLS_GOTDESC"),
11972 input_bfd, input_section, (uint64_t) rel->r_offset,
11973 "Thumb", insn);
11974 return bfd_reloc_notsupported;
11975 }
11976 }
11977 else
11978 {
11979 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11980
11981 switch (insn >> 24)
11982 {
11983 case 0xeb: /* bl */
11984 case 0xfa: /* blx */
11985 value = -4;
11986 break;
11987
11988 case 0xe0: /* add */
11989 value = -8;
11990 break;
11991
11992 default:
11993 _bfd_error_handler
11994 /* xgettext:c-format */
11995 (_("%pB(%pA+%#" PRIx64 "): "
11996 "unexpected %s instruction '%#lx' "
11997 "referenced by TLS_GOTDESC"),
11998 input_bfd, input_section, (uint64_t) rel->r_offset,
11999 "ARM", insn);
12000 return bfd_reloc_notsupported;
12001 }
12002 }
12003
12004 value += ((globals->root.sgotplt->output_section->vma
12005 + globals->root.sgotplt->output_offset + off)
12006 - (input_section->output_section->vma
12007 + input_section->output_offset
12008 + rel->r_offset)
12009 + globals->sgotplt_jump_table_size);
12010 }
12011 else
12012 value = ((globals->root.sgot->output_section->vma
12013 + globals->root.sgot->output_offset + off)
12014 - (input_section->output_section->vma
12015 + input_section->output_offset + rel->r_offset));
12016
12017 if (globals->fdpic_p && (r_type == R_ARM_TLS_GD32_FDPIC ||
12018 r_type == R_ARM_TLS_IE32_FDPIC))
12019 {
12020 /* For FDPIC relocations, resolve to the offset of the GOT
12021 entry from the start of GOT. */
12022 bfd_put_32 (output_bfd,
12023 globals->root.sgot->output_offset + off,
12024 contents + rel->r_offset);
12025
12026 return bfd_reloc_ok;
12027 }
12028 else
12029 {
12030 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12031 contents, rel->r_offset, value,
12032 rel->r_addend);
12033 }
12034 }
12035
12036 case R_ARM_TLS_LE32:
12037 if (bfd_link_dll (info))
12038 {
12039 _bfd_error_handler
12040 /* xgettext:c-format */
12041 (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted "
12042 "in shared object"),
12043 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name);
12044 return bfd_reloc_notsupported;
12045 }
12046 else
12047 value = tpoff (info, value);
12048
12049 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12050 contents, rel->r_offset, value,
12051 rel->r_addend);
12052
12053 case R_ARM_V4BX:
12054 if (globals->fix_v4bx)
12055 {
12056 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12057
12058 /* Ensure that we have a BX instruction. */
12059 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
12060
12061 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
12062 {
12063 /* Branch to veneer. */
12064 bfd_vma glue_addr;
12065 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
12066 glue_addr -= input_section->output_section->vma
12067 + input_section->output_offset
12068 + rel->r_offset + 8;
12069 insn = (insn & 0xf0000000) | 0x0a000000
12070 | ((glue_addr >> 2) & 0x00ffffff);
12071 }
12072 else
12073 {
12074 /* Preserve Rm (lowest four bits) and the condition code
12075 (highest four bits). Other bits encode MOV PC,Rm. */
12076 insn = (insn & 0xf000000f) | 0x01a0f000;
12077 }
12078
12079 bfd_put_32 (input_bfd, insn, hit_data);
12080 }
12081 return bfd_reloc_ok;
12082
12083 case R_ARM_MOVW_ABS_NC:
12084 case R_ARM_MOVT_ABS:
12085 case R_ARM_MOVW_PREL_NC:
12086 case R_ARM_MOVT_PREL:
12087 /* Until we properly support segment-base-relative addressing then
12088 we assume the segment base to be zero, as for the group relocations.
12089 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
12090 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
12091 case R_ARM_MOVW_BREL_NC:
12092 case R_ARM_MOVW_BREL:
12093 case R_ARM_MOVT_BREL:
12094 {
12095 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12096
12097 if (globals->use_rel)
12098 {
12099 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
12100 signed_addend = (addend ^ 0x8000) - 0x8000;
12101 }
12102
12103 value += signed_addend;
12104
12105 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
12106 value -= (input_section->output_section->vma
12107 + input_section->output_offset + rel->r_offset);
12108
12109 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
12110 return bfd_reloc_overflow;
12111
12112 if (branch_type == ST_BRANCH_TO_THUMB)
12113 value |= 1;
12114
12115 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
12116 || r_type == R_ARM_MOVT_BREL)
12117 value >>= 16;
12118
12119 insn &= 0xfff0f000;
12120 insn |= value & 0xfff;
12121 insn |= (value & 0xf000) << 4;
12122 bfd_put_32 (input_bfd, insn, hit_data);
12123 }
12124 return bfd_reloc_ok;
12125
12126 case R_ARM_THM_MOVW_ABS_NC:
12127 case R_ARM_THM_MOVT_ABS:
12128 case R_ARM_THM_MOVW_PREL_NC:
12129 case R_ARM_THM_MOVT_PREL:
12130 /* Until we properly support segment-base-relative addressing then
12131 we assume the segment base to be zero, as for the above relocations.
12132 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
12133 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
12134 as R_ARM_THM_MOVT_ABS. */
12135 case R_ARM_THM_MOVW_BREL_NC:
12136 case R_ARM_THM_MOVW_BREL:
12137 case R_ARM_THM_MOVT_BREL:
12138 {
12139 bfd_vma insn;
12140
12141 insn = bfd_get_16 (input_bfd, hit_data) << 16;
12142 insn |= bfd_get_16 (input_bfd, hit_data + 2);
12143
12144 if (globals->use_rel)
12145 {
12146 addend = ((insn >> 4) & 0xf000)
12147 | ((insn >> 15) & 0x0800)
12148 | ((insn >> 4) & 0x0700)
12149 | (insn & 0x00ff);
12150 signed_addend = (addend ^ 0x8000) - 0x8000;
12151 }
12152
12153 value += signed_addend;
12154
12155 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
12156 value -= (input_section->output_section->vma
12157 + input_section->output_offset + rel->r_offset);
12158
12159 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
12160 return bfd_reloc_overflow;
12161
12162 if (branch_type == ST_BRANCH_TO_THUMB)
12163 value |= 1;
12164
12165 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
12166 || r_type == R_ARM_THM_MOVT_BREL)
12167 value >>= 16;
12168
12169 insn &= 0xfbf08f00;
12170 insn |= (value & 0xf000) << 4;
12171 insn |= (value & 0x0800) << 15;
12172 insn |= (value & 0x0700) << 4;
12173 insn |= (value & 0x00ff);
12174
12175 bfd_put_16 (input_bfd, insn >> 16, hit_data);
12176 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
12177 }
12178 return bfd_reloc_ok;
12179
12180 case R_ARM_ALU_PC_G0_NC:
12181 case R_ARM_ALU_PC_G1_NC:
12182 case R_ARM_ALU_PC_G0:
12183 case R_ARM_ALU_PC_G1:
12184 case R_ARM_ALU_PC_G2:
12185 case R_ARM_ALU_SB_G0_NC:
12186 case R_ARM_ALU_SB_G1_NC:
12187 case R_ARM_ALU_SB_G0:
12188 case R_ARM_ALU_SB_G1:
12189 case R_ARM_ALU_SB_G2:
12190 {
12191 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12192 bfd_vma pc = input_section->output_section->vma
12193 + input_section->output_offset + rel->r_offset;
12194 /* sb is the origin of the *segment* containing the symbol. */
12195 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12196 bfd_vma residual;
12197 bfd_vma g_n;
12198 bfd_signed_vma signed_value;
12199 int group = 0;
12200
12201 /* Determine which group of bits to select. */
12202 switch (r_type)
12203 {
12204 case R_ARM_ALU_PC_G0_NC:
12205 case R_ARM_ALU_PC_G0:
12206 case R_ARM_ALU_SB_G0_NC:
12207 case R_ARM_ALU_SB_G0:
12208 group = 0;
12209 break;
12210
12211 case R_ARM_ALU_PC_G1_NC:
12212 case R_ARM_ALU_PC_G1:
12213 case R_ARM_ALU_SB_G1_NC:
12214 case R_ARM_ALU_SB_G1:
12215 group = 1;
12216 break;
12217
12218 case R_ARM_ALU_PC_G2:
12219 case R_ARM_ALU_SB_G2:
12220 group = 2;
12221 break;
12222
12223 default:
12224 abort ();
12225 }
12226
12227 /* If REL, extract the addend from the insn. If RELA, it will
12228 have already been fetched for us. */
12229 if (globals->use_rel)
12230 {
12231 int negative;
12232 bfd_vma constant = insn & 0xff;
12233 bfd_vma rotation = (insn & 0xf00) >> 8;
12234
12235 if (rotation == 0)
12236 signed_addend = constant;
12237 else
12238 {
12239 /* Compensate for the fact that in the instruction, the
12240 rotation is stored in multiples of 2 bits. */
12241 rotation *= 2;
12242
12243 /* Rotate "constant" right by "rotation" bits. */
12244 signed_addend = (constant >> rotation) |
12245 (constant << (8 * sizeof (bfd_vma) - rotation));
12246 }
12247
12248 /* Determine if the instruction is an ADD or a SUB.
12249 (For REL, this determines the sign of the addend.) */
12250 negative = identify_add_or_sub (insn);
12251 if (negative == 0)
12252 {
12253 _bfd_error_handler
12254 /* xgettext:c-format */
12255 (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions "
12256 "are allowed for ALU group relocations"),
12257 input_bfd, input_section, (uint64_t) rel->r_offset);
12258 return bfd_reloc_overflow;
12259 }
12260
12261 signed_addend *= negative;
12262 }
12263
12264 /* Compute the value (X) to go in the place. */
12265 if (r_type == R_ARM_ALU_PC_G0_NC
12266 || r_type == R_ARM_ALU_PC_G1_NC
12267 || r_type == R_ARM_ALU_PC_G0
12268 || r_type == R_ARM_ALU_PC_G1
12269 || r_type == R_ARM_ALU_PC_G2)
12270 /* PC relative. */
12271 signed_value = value - pc + signed_addend;
12272 else
12273 /* Section base relative. */
12274 signed_value = value - sb + signed_addend;
12275
12276 /* If the target symbol is a Thumb function, then set the
12277 Thumb bit in the address. */
12278 if (branch_type == ST_BRANCH_TO_THUMB)
12279 signed_value |= 1;
12280
12281 /* Calculate the value of the relevant G_n, in encoded
12282 constant-with-rotation format. */
12283 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12284 group, &residual);
12285
12286 /* Check for overflow if required. */
12287 if ((r_type == R_ARM_ALU_PC_G0
12288 || r_type == R_ARM_ALU_PC_G1
12289 || r_type == R_ARM_ALU_PC_G2
12290 || r_type == R_ARM_ALU_SB_G0
12291 || r_type == R_ARM_ALU_SB_G1
12292 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
12293 {
12294 _bfd_error_handler
12295 /* xgettext:c-format */
12296 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12297 "splitting %#" PRIx64 " for group relocation %s"),
12298 input_bfd, input_section, (uint64_t) rel->r_offset,
12299 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12300 howto->name);
12301 return bfd_reloc_overflow;
12302 }
12303
12304 /* Mask out the value and the ADD/SUB part of the opcode; take care
12305 not to destroy the S bit. */
12306 insn &= 0xff1ff000;
12307
12308 /* Set the opcode according to whether the value to go in the
12309 place is negative. */
12310 if (signed_value < 0)
12311 insn |= 1 << 22;
12312 else
12313 insn |= 1 << 23;
12314
12315 /* Encode the offset. */
12316 insn |= g_n;
12317
12318 bfd_put_32 (input_bfd, insn, hit_data);
12319 }
12320 return bfd_reloc_ok;
12321
12322 case R_ARM_LDR_PC_G0:
12323 case R_ARM_LDR_PC_G1:
12324 case R_ARM_LDR_PC_G2:
12325 case R_ARM_LDR_SB_G0:
12326 case R_ARM_LDR_SB_G1:
12327 case R_ARM_LDR_SB_G2:
12328 {
12329 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12330 bfd_vma pc = input_section->output_section->vma
12331 + input_section->output_offset + rel->r_offset;
12332 /* sb is the origin of the *segment* containing the symbol. */
12333 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12334 bfd_vma residual;
12335 bfd_signed_vma signed_value;
12336 int group = 0;
12337
12338 /* Determine which groups of bits to calculate. */
12339 switch (r_type)
12340 {
12341 case R_ARM_LDR_PC_G0:
12342 case R_ARM_LDR_SB_G0:
12343 group = 0;
12344 break;
12345
12346 case R_ARM_LDR_PC_G1:
12347 case R_ARM_LDR_SB_G1:
12348 group = 1;
12349 break;
12350
12351 case R_ARM_LDR_PC_G2:
12352 case R_ARM_LDR_SB_G2:
12353 group = 2;
12354 break;
12355
12356 default:
12357 abort ();
12358 }
12359
12360 /* If REL, extract the addend from the insn. If RELA, it will
12361 have already been fetched for us. */
12362 if (globals->use_rel)
12363 {
12364 int negative = (insn & (1 << 23)) ? 1 : -1;
12365 signed_addend = negative * (insn & 0xfff);
12366 }
12367
12368 /* Compute the value (X) to go in the place. */
12369 if (r_type == R_ARM_LDR_PC_G0
12370 || r_type == R_ARM_LDR_PC_G1
12371 || r_type == R_ARM_LDR_PC_G2)
12372 /* PC relative. */
12373 signed_value = value - pc + signed_addend;
12374 else
12375 /* Section base relative. */
12376 signed_value = value - sb + signed_addend;
12377
12378 /* Calculate the value of the relevant G_{n-1} to obtain
12379 the residual at that stage. */
12380 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12381 group - 1, &residual);
12382
12383 /* Check for overflow. */
12384 if (residual >= 0x1000)
12385 {
12386 _bfd_error_handler
12387 /* xgettext:c-format */
12388 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12389 "splitting %#" PRIx64 " for group relocation %s"),
12390 input_bfd, input_section, (uint64_t) rel->r_offset,
12391 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12392 howto->name);
12393 return bfd_reloc_overflow;
12394 }
12395
12396 /* Mask out the value and U bit. */
12397 insn &= 0xff7ff000;
12398
12399 /* Set the U bit if the value to go in the place is non-negative. */
12400 if (signed_value >= 0)
12401 insn |= 1 << 23;
12402
12403 /* Encode the offset. */
12404 insn |= residual;
12405
12406 bfd_put_32 (input_bfd, insn, hit_data);
12407 }
12408 return bfd_reloc_ok;
12409
12410 case R_ARM_LDRS_PC_G0:
12411 case R_ARM_LDRS_PC_G1:
12412 case R_ARM_LDRS_PC_G2:
12413 case R_ARM_LDRS_SB_G0:
12414 case R_ARM_LDRS_SB_G1:
12415 case R_ARM_LDRS_SB_G2:
12416 {
12417 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12418 bfd_vma pc = input_section->output_section->vma
12419 + input_section->output_offset + rel->r_offset;
12420 /* sb is the origin of the *segment* containing the symbol. */
12421 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12422 bfd_vma residual;
12423 bfd_signed_vma signed_value;
12424 int group = 0;
12425
12426 /* Determine which groups of bits to calculate. */
12427 switch (r_type)
12428 {
12429 case R_ARM_LDRS_PC_G0:
12430 case R_ARM_LDRS_SB_G0:
12431 group = 0;
12432 break;
12433
12434 case R_ARM_LDRS_PC_G1:
12435 case R_ARM_LDRS_SB_G1:
12436 group = 1;
12437 break;
12438
12439 case R_ARM_LDRS_PC_G2:
12440 case R_ARM_LDRS_SB_G2:
12441 group = 2;
12442 break;
12443
12444 default:
12445 abort ();
12446 }
12447
12448 /* If REL, extract the addend from the insn. If RELA, it will
12449 have already been fetched for us. */
12450 if (globals->use_rel)
12451 {
12452 int negative = (insn & (1 << 23)) ? 1 : -1;
12453 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
12454 }
12455
12456 /* Compute the value (X) to go in the place. */
12457 if (r_type == R_ARM_LDRS_PC_G0
12458 || r_type == R_ARM_LDRS_PC_G1
12459 || r_type == R_ARM_LDRS_PC_G2)
12460 /* PC relative. */
12461 signed_value = value - pc + signed_addend;
12462 else
12463 /* Section base relative. */
12464 signed_value = value - sb + signed_addend;
12465
12466 /* Calculate the value of the relevant G_{n-1} to obtain
12467 the residual at that stage. */
12468 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12469 group - 1, &residual);
12470
12471 /* Check for overflow. */
12472 if (residual >= 0x100)
12473 {
12474 _bfd_error_handler
12475 /* xgettext:c-format */
12476 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12477 "splitting %#" PRIx64 " for group relocation %s"),
12478 input_bfd, input_section, (uint64_t) rel->r_offset,
12479 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12480 howto->name);
12481 return bfd_reloc_overflow;
12482 }
12483
12484 /* Mask out the value and U bit. */
12485 insn &= 0xff7ff0f0;
12486
12487 /* Set the U bit if the value to go in the place is non-negative. */
12488 if (signed_value >= 0)
12489 insn |= 1 << 23;
12490
12491 /* Encode the offset. */
12492 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12493
12494 bfd_put_32 (input_bfd, insn, hit_data);
12495 }
12496 return bfd_reloc_ok;
12497
12498 case R_ARM_LDC_PC_G0:
12499 case R_ARM_LDC_PC_G1:
12500 case R_ARM_LDC_PC_G2:
12501 case R_ARM_LDC_SB_G0:
12502 case R_ARM_LDC_SB_G1:
12503 case R_ARM_LDC_SB_G2:
12504 {
12505 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12506 bfd_vma pc = input_section->output_section->vma
12507 + input_section->output_offset + rel->r_offset;
12508 /* sb is the origin of the *segment* containing the symbol. */
12509 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12510 bfd_vma residual;
12511 bfd_signed_vma signed_value;
12512 int group = 0;
12513
12514 /* Determine which groups of bits to calculate. */
12515 switch (r_type)
12516 {
12517 case R_ARM_LDC_PC_G0:
12518 case R_ARM_LDC_SB_G0:
12519 group = 0;
12520 break;
12521
12522 case R_ARM_LDC_PC_G1:
12523 case R_ARM_LDC_SB_G1:
12524 group = 1;
12525 break;
12526
12527 case R_ARM_LDC_PC_G2:
12528 case R_ARM_LDC_SB_G2:
12529 group = 2;
12530 break;
12531
12532 default:
12533 abort ();
12534 }
12535
12536 /* If REL, extract the addend from the insn. If RELA, it will
12537 have already been fetched for us. */
12538 if (globals->use_rel)
12539 {
12540 int negative = (insn & (1 << 23)) ? 1 : -1;
12541 signed_addend = negative * ((insn & 0xff) << 2);
12542 }
12543
12544 /* Compute the value (X) to go in the place. */
12545 if (r_type == R_ARM_LDC_PC_G0
12546 || r_type == R_ARM_LDC_PC_G1
12547 || r_type == R_ARM_LDC_PC_G2)
12548 /* PC relative. */
12549 signed_value = value - pc + signed_addend;
12550 else
12551 /* Section base relative. */
12552 signed_value = value - sb + signed_addend;
12553
12554 /* Calculate the value of the relevant G_{n-1} to obtain
12555 the residual at that stage. */
12556 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12557 group - 1, &residual);
12558
12559 /* Check for overflow. (The absolute value to go in the place must be
12560 divisible by four and, after having been divided by four, must
12561 fit in eight bits.) */
12562 if ((residual & 0x3) != 0 || residual >= 0x400)
12563 {
12564 _bfd_error_handler
12565 /* xgettext:c-format */
12566 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12567 "splitting %#" PRIx64 " for group relocation %s"),
12568 input_bfd, input_section, (uint64_t) rel->r_offset,
12569 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12570 howto->name);
12571 return bfd_reloc_overflow;
12572 }
12573
12574 /* Mask out the value and U bit. */
12575 insn &= 0xff7fff00;
12576
12577 /* Set the U bit if the value to go in the place is non-negative. */
12578 if (signed_value >= 0)
12579 insn |= 1 << 23;
12580
12581 /* Encode the offset. */
12582 insn |= residual >> 2;
12583
12584 bfd_put_32 (input_bfd, insn, hit_data);
12585 }
12586 return bfd_reloc_ok;
12587
12588 case R_ARM_THM_ALU_ABS_G0_NC:
12589 case R_ARM_THM_ALU_ABS_G1_NC:
12590 case R_ARM_THM_ALU_ABS_G2_NC:
12591 case R_ARM_THM_ALU_ABS_G3_NC:
12592 {
12593 const int shift_array[4] = {0, 8, 16, 24};
12594 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12595 bfd_vma addr = value;
12596 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12597
12598 /* Compute address. */
12599 if (globals->use_rel)
12600 signed_addend = insn & 0xff;
12601 addr += signed_addend;
12602 if (branch_type == ST_BRANCH_TO_THUMB)
12603 addr |= 1;
12604 /* Clean imm8 insn. */
12605 insn &= 0xff00;
12606 /* And update with correct part of address. */
12607 insn |= (addr >> shift) & 0xff;
12608 /* Update insn. */
12609 bfd_put_16 (input_bfd, insn, hit_data);
12610 }
12611
12612 *unresolved_reloc_p = false;
12613 return bfd_reloc_ok;
12614
12615 case R_ARM_GOTOFFFUNCDESC:
12616 {
12617 if (h == NULL)
12618 {
12619 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts (input_bfd);
12620 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12621
12622 if (r_symndx >= elf32_arm_num_entries (input_bfd))
12623 {
12624 * error_message = _("local symbol index too big");
12625 return bfd_reloc_dangerous;
12626 }
12627
12628 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12629 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12630 bfd_vma seg = -1;
12631
12632 if (bfd_link_pic (info) && dynindx == 0)
12633 {
12634 * error_message = _("no dynamic index information available");
12635 return bfd_reloc_dangerous;
12636 }
12637
12638 /* Resolve relocation. */
12639 bfd_put_32 (output_bfd, (offset + sgot->output_offset)
12640 , contents + rel->r_offset);
12641 /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12642 not done yet. */
12643 arm_elf_fill_funcdesc (output_bfd, info,
12644 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12645 dynindx, offset, addr, dynreloc_value, seg);
12646 }
12647 else
12648 {
12649 int dynindx;
12650 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12651 bfd_vma addr;
12652 bfd_vma seg = -1;
12653
12654 /* For static binaries, sym_sec can be null. */
12655 if (sym_sec)
12656 {
12657 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12658 addr = dynreloc_value - sym_sec->output_section->vma;
12659 }
12660 else
12661 {
12662 dynindx = 0;
12663 addr = 0;
12664 }
12665
12666 if (bfd_link_pic (info) && dynindx == 0)
12667 {
12668 * error_message = _("no dynamic index information available");
12669 return bfd_reloc_dangerous;
12670 }
12671
12672 /* This case cannot occur since funcdesc is allocated by
12673 the dynamic loader so we cannot resolve the relocation. */
12674 if (h->dynindx != -1)
12675 {
12676 * error_message = _("invalid dynamic index");
12677 return bfd_reloc_dangerous;
12678 }
12679
12680 /* Resolve relocation. */
12681 bfd_put_32 (output_bfd, (offset + sgot->output_offset),
12682 contents + rel->r_offset);
12683 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12684 arm_elf_fill_funcdesc (output_bfd, info,
12685 &eh->fdpic_cnts.funcdesc_offset,
12686 dynindx, offset, addr, dynreloc_value, seg);
12687 }
12688 }
12689 *unresolved_reloc_p = false;
12690 return bfd_reloc_ok;
12691
12692 case R_ARM_GOTFUNCDESC:
12693 {
12694 if (h != NULL)
12695 {
12696 Elf_Internal_Rela outrel;
12697
12698 /* Resolve relocation. */
12699 bfd_put_32 (output_bfd, ((eh->fdpic_cnts.gotfuncdesc_offset & ~1)
12700 + sgot->output_offset),
12701 contents + rel->r_offset);
12702 /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */
12703 if (h->dynindx == -1)
12704 {
12705 int dynindx;
12706 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12707 bfd_vma addr;
12708 bfd_vma seg = -1;
12709
12710 /* For static binaries sym_sec can be null. */
12711 if (sym_sec)
12712 {
12713 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12714 addr = dynreloc_value - sym_sec->output_section->vma;
12715 }
12716 else
12717 {
12718 dynindx = 0;
12719 addr = 0;
12720 }
12721
12722 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12723 arm_elf_fill_funcdesc (output_bfd, info,
12724 &eh->fdpic_cnts.funcdesc_offset,
12725 dynindx, offset, addr, dynreloc_value, seg);
12726 }
12727
12728 /* Add a dynamic relocation on GOT entry if not already done. */
12729 if ((eh->fdpic_cnts.gotfuncdesc_offset & 1) == 0)
12730 {
12731 if (h->dynindx == -1)
12732 {
12733 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12734 if (h->root.type == bfd_link_hash_undefweak)
12735 bfd_put_32 (output_bfd, 0, sgot->contents
12736 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12737 else
12738 bfd_put_32 (output_bfd, sgot->output_section->vma
12739 + sgot->output_offset
12740 + (eh->fdpic_cnts.funcdesc_offset & ~1),
12741 sgot->contents
12742 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12743 }
12744 else
12745 {
12746 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12747 }
12748 outrel.r_offset = sgot->output_section->vma
12749 + sgot->output_offset
12750 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1);
12751 outrel.r_addend = 0;
12752 if (h->dynindx == -1 && !bfd_link_pic (info))
12753 if (h->root.type == bfd_link_hash_undefweak)
12754 arm_elf_add_rofixup (output_bfd, globals->srofixup, -1);
12755 else
12756 arm_elf_add_rofixup (output_bfd, globals->srofixup,
12757 outrel.r_offset);
12758 else
12759 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12760 eh->fdpic_cnts.gotfuncdesc_offset |= 1;
12761 }
12762 }
12763 else
12764 {
12765 /* Such relocation on static function should not have been
12766 emitted by the compiler. */
12767 return bfd_reloc_notsupported;
12768 }
12769 }
12770 *unresolved_reloc_p = false;
12771 return bfd_reloc_ok;
12772
12773 case R_ARM_FUNCDESC:
12774 {
12775 if (h == NULL)
12776 {
12777 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts (input_bfd);
12778 Elf_Internal_Rela outrel;
12779 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12780
12781 if (r_symndx >= elf32_arm_num_entries (input_bfd))
12782 {
12783 * error_message = _("local symbol index too big");
12784 return bfd_reloc_dangerous;
12785 }
12786
12787 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12788 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12789 bfd_vma seg = -1;
12790
12791 if (bfd_link_pic (info) && dynindx == 0)
12792 {
12793 * error_message = _("dynamic index information not available");
12794 return bfd_reloc_dangerous;
12795 }
12796
12797 /* Replace static FUNCDESC relocation with a
12798 R_ARM_RELATIVE dynamic relocation or with a rofixup for
12799 executable. */
12800 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12801 outrel.r_offset = input_section->output_section->vma
12802 + input_section->output_offset + rel->r_offset;
12803 outrel.r_addend = 0;
12804 if (bfd_link_pic (info))
12805 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12806 else
12807 arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset);
12808
12809 bfd_put_32 (input_bfd, sgot->output_section->vma
12810 + sgot->output_offset + offset, hit_data);
12811
12812 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12813 arm_elf_fill_funcdesc (output_bfd, info,
12814 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12815 dynindx, offset, addr, dynreloc_value, seg);
12816 }
12817 else
12818 {
12819 if (h->dynindx == -1)
12820 {
12821 int dynindx;
12822 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12823 bfd_vma addr;
12824 bfd_vma seg = -1;
12825 Elf_Internal_Rela outrel;
12826
12827 /* For static binaries sym_sec can be null. */
12828 if (sym_sec)
12829 {
12830 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12831 addr = dynreloc_value - sym_sec->output_section->vma;
12832 }
12833 else
12834 {
12835 dynindx = 0;
12836 addr = 0;
12837 }
12838
12839 if (bfd_link_pic (info) && dynindx == 0)
12840 abort ();
12841
12842 /* Replace static FUNCDESC relocation with a
12843 R_ARM_RELATIVE dynamic relocation. */
12844 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12845 outrel.r_offset = input_section->output_section->vma
12846 + input_section->output_offset + rel->r_offset;
12847 outrel.r_addend = 0;
12848 if (bfd_link_pic (info))
12849 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12850 else
12851 arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset);
12852
12853 bfd_put_32 (input_bfd, sgot->output_section->vma
12854 + sgot->output_offset + offset, hit_data);
12855
12856 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12857 arm_elf_fill_funcdesc (output_bfd, info,
12858 &eh->fdpic_cnts.funcdesc_offset,
12859 dynindx, offset, addr, dynreloc_value, seg);
12860 }
12861 else
12862 {
12863 Elf_Internal_Rela outrel;
12864
12865 /* Add a dynamic relocation. */
12866 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12867 outrel.r_offset = input_section->output_section->vma
12868 + input_section->output_offset + rel->r_offset;
12869 outrel.r_addend = 0;
12870 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12871 }
12872 }
12873 }
12874 *unresolved_reloc_p = false;
12875 return bfd_reloc_ok;
12876
12877 case R_ARM_THM_BF16:
12878 {
12879 bfd_vma relocation;
12880 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12881 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12882
12883 if (globals->use_rel)
12884 {
12885 bfd_vma immA = (upper_insn & 0x001f);
12886 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12887 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12888 addend = (immA << 12);
12889 addend |= (immB << 2);
12890 addend |= (immC << 1);
12891 addend |= 1;
12892 /* Sign extend. */
12893 signed_addend = (addend & 0x10000) ? addend - (1 << 17) : addend;
12894 }
12895
12896 relocation = value + signed_addend;
12897 relocation -= (input_section->output_section->vma
12898 + input_section->output_offset
12899 + rel->r_offset);
12900
12901 /* Put RELOCATION back into the insn. */
12902 {
12903 bfd_vma immA = (relocation & 0x0001f000) >> 12;
12904 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12905 bfd_vma immC = (relocation & 0x00000002) >> 1;
12906
12907 upper_insn = (upper_insn & 0xffe0) | immA;
12908 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12909 }
12910
12911 /* Put the relocated value back in the object file: */
12912 bfd_put_16 (input_bfd, upper_insn, hit_data);
12913 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12914
12915 return bfd_reloc_ok;
12916 }
12917
12918 case R_ARM_THM_BF12:
12919 {
12920 bfd_vma relocation;
12921 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12922 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12923
12924 if (globals->use_rel)
12925 {
12926 bfd_vma immA = (upper_insn & 0x0001);
12927 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12928 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12929 addend = (immA << 12);
12930 addend |= (immB << 2);
12931 addend |= (immC << 1);
12932 addend |= 1;
12933 /* Sign extend. */
12934 addend = (addend & 0x1000) ? addend - (1 << 13) : addend;
12935 signed_addend = addend;
12936 }
12937
12938 relocation = value + signed_addend;
12939 relocation -= (input_section->output_section->vma
12940 + input_section->output_offset
12941 + rel->r_offset);
12942
12943 /* Put RELOCATION back into the insn. */
12944 {
12945 bfd_vma immA = (relocation & 0x00001000) >> 12;
12946 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12947 bfd_vma immC = (relocation & 0x00000002) >> 1;
12948
12949 upper_insn = (upper_insn & 0xfffe) | immA;
12950 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12951 }
12952
12953 /* Put the relocated value back in the object file: */
12954 bfd_put_16 (input_bfd, upper_insn, hit_data);
12955 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12956
12957 return bfd_reloc_ok;
12958 }
12959
12960 case R_ARM_THM_BF18:
12961 {
12962 bfd_vma relocation;
12963 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12964 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12965
12966 if (globals->use_rel)
12967 {
12968 bfd_vma immA = (upper_insn & 0x007f);
12969 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12970 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12971 addend = (immA << 12);
12972 addend |= (immB << 2);
12973 addend |= (immC << 1);
12974 addend |= 1;
12975 /* Sign extend. */
12976 addend = (addend & 0x40000) ? addend - (1 << 19) : addend;
12977 signed_addend = addend;
12978 }
12979
12980 relocation = value + signed_addend;
12981 relocation -= (input_section->output_section->vma
12982 + input_section->output_offset
12983 + rel->r_offset);
12984
12985 /* Put RELOCATION back into the insn. */
12986 {
12987 bfd_vma immA = (relocation & 0x0007f000) >> 12;
12988 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12989 bfd_vma immC = (relocation & 0x00000002) >> 1;
12990
12991 upper_insn = (upper_insn & 0xff80) | immA;
12992 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12993 }
12994
12995 /* Put the relocated value back in the object file: */
12996 bfd_put_16 (input_bfd, upper_insn, hit_data);
12997 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12998
12999 return bfd_reloc_ok;
13000 }
13001
13002 default:
13003 return bfd_reloc_notsupported;
13004 }
13005 }
13006
13007 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
13008 static void
13009 arm_add_to_rel (bfd * abfd,
13010 bfd_byte * address,
13011 reloc_howto_type * howto,
13012 bfd_signed_vma increment)
13013 {
13014 bfd_signed_vma addend;
13015
13016 if (howto->type == R_ARM_THM_CALL
13017 || howto->type == R_ARM_THM_JUMP24)
13018 {
13019 int upper_insn, lower_insn;
13020 int upper, lower;
13021
13022 upper_insn = bfd_get_16 (abfd, address);
13023 lower_insn = bfd_get_16 (abfd, address + 2);
13024 upper = upper_insn & 0x7ff;
13025 lower = lower_insn & 0x7ff;
13026
13027 addend = (upper << 12) | (lower << 1);
13028 addend += increment;
13029 addend >>= 1;
13030
13031 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
13032 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
13033
13034 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
13035 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
13036 }
13037 else
13038 {
13039 bfd_vma contents;
13040
13041 contents = bfd_get_32 (abfd, address);
13042
13043 /* Get the (signed) value from the instruction. */
13044 addend = contents & howto->src_mask;
13045 if (addend & ((howto->src_mask + 1) >> 1))
13046 {
13047 bfd_signed_vma mask;
13048
13049 mask = -1;
13050 mask &= ~ howto->src_mask;
13051 addend |= mask;
13052 }
13053
13054 /* Add in the increment, (which is a byte value). */
13055 switch (howto->type)
13056 {
13057 default:
13058 addend += increment;
13059 break;
13060
13061 case R_ARM_PC24:
13062 case R_ARM_PLT32:
13063 case R_ARM_CALL:
13064 case R_ARM_JUMP24:
13065 addend *= bfd_get_reloc_size (howto);
13066 addend += increment;
13067
13068 /* Should we check for overflow here ? */
13069
13070 /* Drop any undesired bits. */
13071 addend >>= howto->rightshift;
13072 break;
13073 }
13074
13075 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
13076
13077 bfd_put_32 (abfd, contents, address);
13078 }
13079 }
13080
13081 #define IS_ARM_TLS_RELOC(R_TYPE) \
13082 ((R_TYPE) == R_ARM_TLS_GD32 \
13083 || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \
13084 || (R_TYPE) == R_ARM_TLS_LDO32 \
13085 || (R_TYPE) == R_ARM_TLS_LDM32 \
13086 || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \
13087 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
13088 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
13089 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
13090 || (R_TYPE) == R_ARM_TLS_LE32 \
13091 || (R_TYPE) == R_ARM_TLS_IE32 \
13092 || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \
13093 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
13094
13095 /* Specific set of relocations for the gnu tls dialect. */
13096 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
13097 ((R_TYPE) == R_ARM_TLS_GOTDESC \
13098 || (R_TYPE) == R_ARM_TLS_CALL \
13099 || (R_TYPE) == R_ARM_THM_TLS_CALL \
13100 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
13101 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
13102
13103 /* Relocate an ARM ELF section. */
13104
13105 static int
13106 elf32_arm_relocate_section (bfd * output_bfd,
13107 struct bfd_link_info * info,
13108 bfd * input_bfd,
13109 asection * input_section,
13110 bfd_byte * contents,
13111 Elf_Internal_Rela * relocs,
13112 Elf_Internal_Sym * local_syms,
13113 asection ** local_sections)
13114 {
13115 Elf_Internal_Shdr *symtab_hdr;
13116 struct elf_link_hash_entry **sym_hashes;
13117 Elf_Internal_Rela *rel;
13118 Elf_Internal_Rela *relend;
13119 const char *name;
13120 struct elf32_arm_link_hash_table * globals;
13121
13122 globals = elf32_arm_hash_table (info);
13123 if (globals == NULL)
13124 return false;
13125
13126 symtab_hdr = & elf_symtab_hdr (input_bfd);
13127 sym_hashes = elf_sym_hashes (input_bfd);
13128
13129 rel = relocs;
13130 relend = relocs + input_section->reloc_count;
13131 for (; rel < relend; rel++)
13132 {
13133 int r_type;
13134 reloc_howto_type * howto;
13135 unsigned long r_symndx;
13136 Elf_Internal_Sym * sym;
13137 asection * sec;
13138 struct elf_link_hash_entry * h;
13139 bfd_vma relocation;
13140 bfd_reloc_status_type r;
13141 arelent bfd_reloc;
13142 char sym_type;
13143 bool unresolved_reloc = false;
13144 char *error_message = NULL;
13145
13146 r_symndx = ELF32_R_SYM (rel->r_info);
13147 r_type = ELF32_R_TYPE (rel->r_info);
13148 r_type = arm_real_reloc_type (globals, r_type);
13149
13150 if ( r_type == R_ARM_GNU_VTENTRY
13151 || r_type == R_ARM_GNU_VTINHERIT)
13152 continue;
13153
13154 howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
13155
13156 if (howto == NULL)
13157 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
13158
13159 h = NULL;
13160 sym = NULL;
13161 sec = NULL;
13162
13163 if (r_symndx < symtab_hdr->sh_info)
13164 {
13165 sym = local_syms + r_symndx;
13166 sym_type = ELF32_ST_TYPE (sym->st_info);
13167 sec = local_sections[r_symndx];
13168
13169 /* An object file might have a reference to a local
13170 undefined symbol. This is a daft object file, but we
13171 should at least do something about it. V4BX & NONE
13172 relocations do not use the symbol and are explicitly
13173 allowed to use the undefined symbol, so allow those.
13174 Likewise for relocations against STN_UNDEF. */
13175 if (r_type != R_ARM_V4BX
13176 && r_type != R_ARM_NONE
13177 && r_symndx != STN_UNDEF
13178 && bfd_is_und_section (sec)
13179 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
13180 (*info->callbacks->undefined_symbol)
13181 (info, bfd_elf_string_from_elf_section
13182 (input_bfd, symtab_hdr->sh_link, sym->st_name),
13183 input_bfd, input_section,
13184 rel->r_offset, true);
13185
13186 if (globals->use_rel)
13187 {
13188 relocation = (sec->output_section->vma
13189 + sec->output_offset
13190 + sym->st_value);
13191 if (!bfd_link_relocatable (info)
13192 && (sec->flags & SEC_MERGE)
13193 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13194 {
13195 asection *msec;
13196 bfd_vma addend, value;
13197
13198 switch (r_type)
13199 {
13200 case R_ARM_MOVW_ABS_NC:
13201 case R_ARM_MOVT_ABS:
13202 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13203 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
13204 addend = (addend ^ 0x8000) - 0x8000;
13205 break;
13206
13207 case R_ARM_THM_MOVW_ABS_NC:
13208 case R_ARM_THM_MOVT_ABS:
13209 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
13210 << 16;
13211 value |= bfd_get_16 (input_bfd,
13212 contents + rel->r_offset + 2);
13213 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
13214 | ((value & 0x04000000) >> 15);
13215 addend = (addend ^ 0x8000) - 0x8000;
13216 break;
13217
13218 default:
13219 if (howto->rightshift
13220 || (howto->src_mask & (howto->src_mask + 1)))
13221 {
13222 _bfd_error_handler
13223 /* xgettext:c-format */
13224 (_("%pB(%pA+%#" PRIx64 "): "
13225 "%s relocation against SEC_MERGE section"),
13226 input_bfd, input_section,
13227 (uint64_t) rel->r_offset, howto->name);
13228 return false;
13229 }
13230
13231 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13232
13233 /* Get the (signed) value from the instruction. */
13234 addend = value & howto->src_mask;
13235 if (addend & ((howto->src_mask + 1) >> 1))
13236 {
13237 bfd_signed_vma mask;
13238
13239 mask = -1;
13240 mask &= ~ howto->src_mask;
13241 addend |= mask;
13242 }
13243 break;
13244 }
13245
13246 msec = sec;
13247 addend =
13248 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
13249 - relocation;
13250 addend += msec->output_section->vma + msec->output_offset;
13251
13252 /* Cases here must match those in the preceding
13253 switch statement. */
13254 switch (r_type)
13255 {
13256 case R_ARM_MOVW_ABS_NC:
13257 case R_ARM_MOVT_ABS:
13258 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
13259 | (addend & 0xfff);
13260 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13261 break;
13262
13263 case R_ARM_THM_MOVW_ABS_NC:
13264 case R_ARM_THM_MOVT_ABS:
13265 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
13266 | (addend & 0xff) | ((addend & 0x0800) << 15);
13267 bfd_put_16 (input_bfd, value >> 16,
13268 contents + rel->r_offset);
13269 bfd_put_16 (input_bfd, value,
13270 contents + rel->r_offset + 2);
13271 break;
13272
13273 default:
13274 value = (value & ~ howto->dst_mask)
13275 | (addend & howto->dst_mask);
13276 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13277 break;
13278 }
13279 }
13280 }
13281 else
13282 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
13283 }
13284 else
13285 {
13286 bool warned, ignored;
13287
13288 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
13289 r_symndx, symtab_hdr, sym_hashes,
13290 h, sec, relocation,
13291 unresolved_reloc, warned, ignored);
13292
13293 sym_type = h->type;
13294 }
13295
13296 if (sec != NULL && discarded_section (sec))
13297 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
13298 rel, 1, relend, howto, 0, contents);
13299
13300 if (bfd_link_relocatable (info))
13301 {
13302 /* This is a relocatable link. We don't have to change
13303 anything, unless the reloc is against a section symbol,
13304 in which case we have to adjust according to where the
13305 section symbol winds up in the output section. */
13306 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13307 {
13308 if (globals->use_rel)
13309 arm_add_to_rel (input_bfd, contents + rel->r_offset,
13310 howto, (bfd_signed_vma) sec->output_offset);
13311 else
13312 rel->r_addend += sec->output_offset;
13313 }
13314 continue;
13315 }
13316
13317 if (h != NULL)
13318 name = h->root.root.string;
13319 else
13320 {
13321 name = (bfd_elf_string_from_elf_section
13322 (input_bfd, symtab_hdr->sh_link, sym->st_name));
13323 if (name == NULL || *name == '\0')
13324 name = bfd_section_name (sec);
13325 }
13326
13327 if (r_symndx != STN_UNDEF
13328 && r_type != R_ARM_NONE
13329 && (h == NULL
13330 || h->root.type == bfd_link_hash_defined
13331 || h->root.type == bfd_link_hash_defweak)
13332 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
13333 {
13334 _bfd_error_handler
13335 ((sym_type == STT_TLS
13336 /* xgettext:c-format */
13337 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
13338 /* xgettext:c-format */
13339 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
13340 input_bfd,
13341 input_section,
13342 (uint64_t) rel->r_offset,
13343 howto->name,
13344 name);
13345 }
13346
13347 /* We call elf32_arm_final_link_relocate unless we're completely
13348 done, i.e., the relaxation produced the final output we want,
13349 and we won't let anybody mess with it. Also, we have to do
13350 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
13351 both in relaxed and non-relaxed cases. */
13352 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
13353 || (IS_ARM_TLS_GNU_RELOC (r_type)
13354 && !((h ? elf32_arm_hash_entry (h)->tls_type :
13355 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
13356 & GOT_TLS_GDESC)))
13357 {
13358 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
13359 contents, rel, h == NULL);
13360 /* This may have been marked unresolved because it came from
13361 a shared library. But we've just dealt with that. */
13362 unresolved_reloc = 0;
13363 }
13364 else
13365 r = bfd_reloc_continue;
13366
13367 if (r == bfd_reloc_continue)
13368 {
13369 unsigned char branch_type =
13370 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
13371 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
13372
13373 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
13374 input_section, contents, rel,
13375 relocation, info, sec, name,
13376 sym_type, branch_type, h,
13377 &unresolved_reloc,
13378 &error_message);
13379 }
13380
13381 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13382 because such sections are not SEC_ALLOC and thus ld.so will
13383 not process them. */
13384 if (unresolved_reloc
13385 && !((input_section->flags & SEC_DEBUGGING) != 0
13386 && h->def_dynamic)
13387 && _bfd_elf_section_offset (output_bfd, info, input_section,
13388 rel->r_offset) != (bfd_vma) -1)
13389 {
13390 _bfd_error_handler
13391 /* xgettext:c-format */
13392 (_("%pB(%pA+%#" PRIx64 "): "
13393 "unresolvable %s relocation against symbol `%s'"),
13394 input_bfd,
13395 input_section,
13396 (uint64_t) rel->r_offset,
13397 howto->name,
13398 h->root.root.string);
13399 return false;
13400 }
13401
13402 if (r != bfd_reloc_ok)
13403 {
13404 switch (r)
13405 {
13406 case bfd_reloc_overflow:
13407 /* If the overflowing reloc was to an undefined symbol,
13408 we have already printed one error message and there
13409 is no point complaining again. */
13410 if (!h || h->root.type != bfd_link_hash_undefined)
13411 (*info->callbacks->reloc_overflow)
13412 (info, (h ? &h->root : NULL), name, howto->name,
13413 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
13414 break;
13415
13416 case bfd_reloc_undefined:
13417 (*info->callbacks->undefined_symbol)
13418 (info, name, input_bfd, input_section, rel->r_offset, true);
13419 break;
13420
13421 case bfd_reloc_outofrange:
13422 error_message = _("out of range");
13423 goto common_error;
13424
13425 case bfd_reloc_notsupported:
13426 error_message = _("unsupported relocation");
13427 goto common_error;
13428
13429 case bfd_reloc_dangerous:
13430 /* error_message should already be set. */
13431 goto common_error;
13432
13433 default:
13434 error_message = _("unknown error");
13435 /* Fall through. */
13436
13437 common_error:
13438 BFD_ASSERT (error_message != NULL);
13439 (*info->callbacks->reloc_dangerous)
13440 (info, error_message, input_bfd, input_section, rel->r_offset);
13441 break;
13442 }
13443 }
13444 }
13445
13446 return true;
13447 }
13448
13449 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
13450 adds the edit to the start of the list. (The list must be built in order of
13451 ascending TINDEX: the function's callers are primarily responsible for
13452 maintaining that condition). */
13453
13454 static void
13455 add_unwind_table_edit (arm_unwind_table_edit **head,
13456 arm_unwind_table_edit **tail,
13457 arm_unwind_edit_type type,
13458 asection *linked_section,
13459 unsigned int tindex)
13460 {
13461 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
13462 xmalloc (sizeof (arm_unwind_table_edit));
13463
13464 new_edit->type = type;
13465 new_edit->linked_section = linked_section;
13466 new_edit->index = tindex;
13467
13468 if (tindex > 0)
13469 {
13470 new_edit->next = NULL;
13471
13472 if (*tail)
13473 (*tail)->next = new_edit;
13474
13475 (*tail) = new_edit;
13476
13477 if (!*head)
13478 (*head) = new_edit;
13479 }
13480 else
13481 {
13482 new_edit->next = *head;
13483
13484 if (!*tail)
13485 *tail = new_edit;
13486
13487 *head = new_edit;
13488 }
13489 }
13490
13491 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
13492
13493 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
13494
13495 static void
13496 adjust_exidx_size (asection *exidx_sec, int adjust)
13497 {
13498 asection *out_sec;
13499
13500 if (!exidx_sec->rawsize)
13501 exidx_sec->rawsize = exidx_sec->size;
13502
13503 bfd_set_section_size (exidx_sec, exidx_sec->size + adjust);
13504 out_sec = exidx_sec->output_section;
13505 /* Adjust size of output section. */
13506 bfd_set_section_size (out_sec, out_sec->size + adjust);
13507 }
13508
13509 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
13510
13511 static void
13512 insert_cantunwind_after (asection *text_sec, asection *exidx_sec)
13513 {
13514 struct _arm_elf_section_data *exidx_arm_data;
13515
13516 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13517 add_unwind_table_edit
13518 (&exidx_arm_data->u.exidx.unwind_edit_list,
13519 &exidx_arm_data->u.exidx.unwind_edit_tail,
13520 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
13521
13522 exidx_arm_data->additional_reloc_count++;
13523
13524 adjust_exidx_size (exidx_sec, 8);
13525 }
13526
13527 /* Scan .ARM.exidx tables, and create a list describing edits which should be
13528 made to those tables, such that:
13529
13530 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13531 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13532 codes which have been inlined into the index).
13533
13534 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13535
13536 The edits are applied when the tables are written
13537 (in elf32_arm_write_section). */
13538
13539 bool
13540 elf32_arm_fix_exidx_coverage (asection **text_section_order,
13541 unsigned int num_text_sections,
13542 struct bfd_link_info *info,
13543 bool merge_exidx_entries)
13544 {
13545 bfd *inp;
13546 unsigned int last_second_word = 0, i;
13547 asection *last_exidx_sec = NULL;
13548 asection *last_text_sec = NULL;
13549 int last_unwind_type = -1;
13550
13551 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13552 text sections. */
13553 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
13554 {
13555 asection *sec;
13556
13557 for (sec = inp->sections; sec != NULL; sec = sec->next)
13558 {
13559 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
13560 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
13561
13562 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
13563 continue;
13564
13565 if (elf_sec->linked_to)
13566 {
13567 Elf_Internal_Shdr *linked_hdr
13568 = &elf_section_data (elf_sec->linked_to)->this_hdr;
13569 struct _arm_elf_section_data *linked_sec_arm_data
13570 = get_arm_elf_section_data (linked_hdr->bfd_section);
13571
13572 if (linked_sec_arm_data == NULL)
13573 continue;
13574
13575 /* Link this .ARM.exidx section back from the text section it
13576 describes. */
13577 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
13578 }
13579 }
13580 }
13581
13582 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
13583 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13584 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
13585
13586 for (i = 0; i < num_text_sections; i++)
13587 {
13588 asection *sec = text_section_order[i];
13589 asection *exidx_sec;
13590 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
13591 struct _arm_elf_section_data *exidx_arm_data;
13592 bfd_byte *contents = NULL;
13593 int deleted_exidx_bytes = 0;
13594 bfd_vma j;
13595 arm_unwind_table_edit *unwind_edit_head = NULL;
13596 arm_unwind_table_edit *unwind_edit_tail = NULL;
13597 Elf_Internal_Shdr *hdr;
13598 bfd *ibfd;
13599
13600 if (arm_data == NULL)
13601 continue;
13602
13603 exidx_sec = arm_data->u.text.arm_exidx_sec;
13604 if (exidx_sec == NULL)
13605 {
13606 /* Section has no unwind data. */
13607 if (last_unwind_type == 0 || !last_exidx_sec)
13608 continue;
13609
13610 /* Ignore zero sized sections. */
13611 if (sec->size == 0)
13612 continue;
13613
13614 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13615 last_unwind_type = 0;
13616 continue;
13617 }
13618
13619 /* Skip /DISCARD/ sections. */
13620 if (bfd_is_abs_section (exidx_sec->output_section))
13621 continue;
13622
13623 hdr = &elf_section_data (exidx_sec)->this_hdr;
13624 if (hdr->sh_type != SHT_ARM_EXIDX)
13625 continue;
13626
13627 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13628 if (exidx_arm_data == NULL)
13629 continue;
13630
13631 ibfd = exidx_sec->owner;
13632
13633 if (hdr->contents != NULL)
13634 contents = hdr->contents;
13635 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
13636 /* An error? */
13637 continue;
13638
13639 if (last_unwind_type > 0)
13640 {
13641 unsigned int first_word = bfd_get_32 (ibfd, contents);
13642 /* Add cantunwind if first unwind item does not match section
13643 start. */
13644 if (first_word != sec->vma)
13645 {
13646 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13647 last_unwind_type = 0;
13648 }
13649 }
13650
13651 for (j = 0; j < hdr->sh_size; j += 8)
13652 {
13653 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
13654 int unwind_type;
13655 int elide = 0;
13656
13657 /* An EXIDX_CANTUNWIND entry. */
13658 if (second_word == 1)
13659 {
13660 if (last_unwind_type == 0)
13661 elide = 1;
13662 unwind_type = 0;
13663 }
13664 /* Inlined unwinding data. Merge if equal to previous. */
13665 else if ((second_word & 0x80000000) != 0)
13666 {
13667 if (merge_exidx_entries
13668 && last_second_word == second_word && last_unwind_type == 1)
13669 elide = 1;
13670 unwind_type = 1;
13671 last_second_word = second_word;
13672 }
13673 /* Normal table entry. In theory we could merge these too,
13674 but duplicate entries are likely to be much less common. */
13675 else
13676 unwind_type = 2;
13677
13678 if (elide && !bfd_link_relocatable (info))
13679 {
13680 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
13681 DELETE_EXIDX_ENTRY, NULL, j / 8);
13682
13683 deleted_exidx_bytes += 8;
13684 }
13685
13686 last_unwind_type = unwind_type;
13687 }
13688
13689 /* Free contents if we allocated it ourselves. */
13690 if (contents != hdr->contents)
13691 free (contents);
13692
13693 /* Record edits to be applied later (in elf32_arm_write_section). */
13694 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
13695 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
13696
13697 if (deleted_exidx_bytes > 0)
13698 adjust_exidx_size (exidx_sec, - deleted_exidx_bytes);
13699
13700 last_exidx_sec = exidx_sec;
13701 last_text_sec = sec;
13702 }
13703
13704 /* Add terminating CANTUNWIND entry. */
13705 if (!bfd_link_relocatable (info) && last_exidx_sec
13706 && last_unwind_type != 0)
13707 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13708
13709 return true;
13710 }
13711
13712 static bool
13713 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
13714 bfd *ibfd, const char *name)
13715 {
13716 asection *sec, *osec;
13717
13718 sec = bfd_get_linker_section (ibfd, name);
13719 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
13720 return true;
13721
13722 osec = sec->output_section;
13723 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
13724 return true;
13725
13726 if (! bfd_set_section_contents (obfd, osec, sec->contents,
13727 sec->output_offset, sec->size))
13728 return false;
13729
13730 return true;
13731 }
13732
13733 static bool
13734 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
13735 {
13736 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
13737 asection *sec, *osec;
13738
13739 if (globals == NULL)
13740 return false;
13741
13742 /* Invoke the regular ELF backend linker to do all the work. */
13743 if (!bfd_elf_final_link (abfd, info))
13744 return false;
13745
13746 /* Process stub sections (eg BE8 encoding, ...). */
13747 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
13748 unsigned int i;
13749 for (i=0; i<htab->top_id; i++)
13750 {
13751 sec = htab->stub_group[i].stub_sec;
13752 /* Only process it once, in its link_sec slot. */
13753 if (sec && i == htab->stub_group[i].link_sec->id)
13754 {
13755 osec = sec->output_section;
13756 elf32_arm_write_section (abfd, info, sec, sec->contents);
13757 if (! bfd_set_section_contents (abfd, osec, sec->contents,
13758 sec->output_offset, sec->size))
13759 return false;
13760 }
13761 }
13762
13763 /* Write out any glue sections now that we have created all the
13764 stubs. */
13765 if (globals->bfd_of_glue_owner != NULL)
13766 {
13767 if (! elf32_arm_output_glue_section (info, abfd,
13768 globals->bfd_of_glue_owner,
13769 ARM2THUMB_GLUE_SECTION_NAME))
13770 return false;
13771
13772 if (! elf32_arm_output_glue_section (info, abfd,
13773 globals->bfd_of_glue_owner,
13774 THUMB2ARM_GLUE_SECTION_NAME))
13775 return false;
13776
13777 if (! elf32_arm_output_glue_section (info, abfd,
13778 globals->bfd_of_glue_owner,
13779 VFP11_ERRATUM_VENEER_SECTION_NAME))
13780 return false;
13781
13782 if (! elf32_arm_output_glue_section (info, abfd,
13783 globals->bfd_of_glue_owner,
13784 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
13785 return false;
13786
13787 if (! elf32_arm_output_glue_section (info, abfd,
13788 globals->bfd_of_glue_owner,
13789 ARM_BX_GLUE_SECTION_NAME))
13790 return false;
13791 }
13792
13793 return true;
13794 }
13795
13796 /* Return a best guess for the machine number based on the attributes. */
13797
13798 static unsigned int
13799 bfd_arm_get_mach_from_attributes (bfd * abfd)
13800 {
13801 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
13802
13803 switch (arch)
13804 {
13805 case TAG_CPU_ARCH_PRE_V4: return bfd_mach_arm_3M;
13806 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
13807 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
13808 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
13809
13810 case TAG_CPU_ARCH_V5TE:
13811 {
13812 char * name;
13813
13814 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
13815 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
13816
13817 if (name)
13818 {
13819 if (strcmp (name, "IWMMXT2") == 0)
13820 return bfd_mach_arm_iWMMXt2;
13821
13822 if (strcmp (name, "IWMMXT") == 0)
13823 return bfd_mach_arm_iWMMXt;
13824
13825 if (strcmp (name, "XSCALE") == 0)
13826 {
13827 int wmmx;
13828
13829 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
13830 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
13831 switch (wmmx)
13832 {
13833 case 1: return bfd_mach_arm_iWMMXt;
13834 case 2: return bfd_mach_arm_iWMMXt2;
13835 default: return bfd_mach_arm_XScale;
13836 }
13837 }
13838 }
13839
13840 return bfd_mach_arm_5TE;
13841 }
13842
13843 case TAG_CPU_ARCH_V5TEJ:
13844 return bfd_mach_arm_5TEJ;
13845 case TAG_CPU_ARCH_V6:
13846 return bfd_mach_arm_6;
13847 case TAG_CPU_ARCH_V6KZ:
13848 return bfd_mach_arm_6KZ;
13849 case TAG_CPU_ARCH_V6T2:
13850 return bfd_mach_arm_6T2;
13851 case TAG_CPU_ARCH_V6K:
13852 return bfd_mach_arm_6K;
13853 case TAG_CPU_ARCH_V7:
13854 return bfd_mach_arm_7;
13855 case TAG_CPU_ARCH_V6_M:
13856 return bfd_mach_arm_6M;
13857 case TAG_CPU_ARCH_V6S_M:
13858 return bfd_mach_arm_6SM;
13859 case TAG_CPU_ARCH_V7E_M:
13860 return bfd_mach_arm_7EM;
13861 case TAG_CPU_ARCH_V8:
13862 return bfd_mach_arm_8;
13863 case TAG_CPU_ARCH_V8R:
13864 return bfd_mach_arm_8R;
13865 case TAG_CPU_ARCH_V8M_BASE:
13866 return bfd_mach_arm_8M_BASE;
13867 case TAG_CPU_ARCH_V8M_MAIN:
13868 return bfd_mach_arm_8M_MAIN;
13869 case TAG_CPU_ARCH_V8_1M_MAIN:
13870 return bfd_mach_arm_8_1M_MAIN;
13871 case TAG_CPU_ARCH_V9:
13872 return bfd_mach_arm_9;
13873
13874 default:
13875 /* Force entry to be added for any new known Tag_CPU_arch value. */
13876 BFD_ASSERT (arch > MAX_TAG_CPU_ARCH);
13877
13878 /* Unknown Tag_CPU_arch value. */
13879 return bfd_mach_arm_unknown;
13880 }
13881 }
13882
13883 /* Set the right machine number. */
13884
13885 static bool
13886 elf32_arm_object_p (bfd *abfd)
13887 {
13888 unsigned int mach;
13889
13890 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
13891
13892 if (mach == bfd_mach_arm_unknown)
13893 {
13894 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13895 mach = bfd_mach_arm_ep9312;
13896 else
13897 mach = bfd_arm_get_mach_from_attributes (abfd);
13898 }
13899
13900 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13901 return true;
13902 }
13903
13904 /* Function to keep ARM specific flags in the ELF header. */
13905
13906 static bool
13907 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13908 {
13909 if (elf_flags_init (abfd)
13910 && elf_elfheader (abfd)->e_flags != flags)
13911 {
13912 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13913 {
13914 if (flags & EF_ARM_INTERWORK)
13915 _bfd_error_handler
13916 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13917 abfd);
13918 else
13919 _bfd_error_handler
13920 (_("warning: clearing the interworking flag of %pB due to outside request"),
13921 abfd);
13922 }
13923 }
13924 else
13925 {
13926 elf_elfheader (abfd)->e_flags = flags;
13927 elf_flags_init (abfd) = true;
13928 }
13929
13930 return true;
13931 }
13932
13933 /* Copy backend specific data from one object module to another. */
13934
13935 static bool
13936 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13937 {
13938 flagword in_flags;
13939 flagword out_flags;
13940
13941 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13942 return true;
13943
13944 in_flags = elf_elfheader (ibfd)->e_flags;
13945 out_flags = elf_elfheader (obfd)->e_flags;
13946
13947 if (elf_flags_init (obfd)
13948 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13949 && in_flags != out_flags)
13950 {
13951 /* Cannot mix APCS26 and APCS32 code. */
13952 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13953 return false;
13954
13955 /* Cannot mix float APCS and non-float APCS code. */
13956 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13957 return false;
13958
13959 /* If the src and dest have different interworking flags
13960 then turn off the interworking bit. */
13961 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13962 {
13963 if (out_flags & EF_ARM_INTERWORK)
13964 _bfd_error_handler
13965 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13966 obfd, ibfd);
13967
13968 in_flags &= ~EF_ARM_INTERWORK;
13969 }
13970
13971 /* Likewise for PIC, though don't warn for this case. */
13972 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13973 in_flags &= ~EF_ARM_PIC;
13974 }
13975
13976 elf_elfheader (obfd)->e_flags = in_flags;
13977 elf_flags_init (obfd) = true;
13978
13979 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13980 }
13981
13982 /* Values for Tag_ABI_PCS_R9_use. */
13983 enum
13984 {
13985 AEABI_R9_V6,
13986 AEABI_R9_SB,
13987 AEABI_R9_TLS,
13988 AEABI_R9_unused
13989 };
13990
13991 /* Values for Tag_ABI_PCS_RW_data. */
13992 enum
13993 {
13994 AEABI_PCS_RW_data_absolute,
13995 AEABI_PCS_RW_data_PCrel,
13996 AEABI_PCS_RW_data_SBrel,
13997 AEABI_PCS_RW_data_unused
13998 };
13999
14000 /* Values for Tag_ABI_enum_size. */
14001 enum
14002 {
14003 AEABI_enum_unused,
14004 AEABI_enum_short,
14005 AEABI_enum_wide,
14006 AEABI_enum_forced_wide
14007 };
14008
14009 /* Determine whether an object attribute tag takes an integer, a
14010 string or both. */
14011
14012 static int
14013 elf32_arm_obj_attrs_arg_type (int tag)
14014 {
14015 if (tag == Tag_compatibility)
14016 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
14017 else if (tag == Tag_nodefaults)
14018 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
14019 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
14020 return ATTR_TYPE_FLAG_STR_VAL;
14021 else if (tag < 32)
14022 return ATTR_TYPE_FLAG_INT_VAL;
14023 else
14024 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
14025 }
14026
14027 /* The ABI defines that Tag_conformance should be emitted first, and that
14028 Tag_nodefaults should be second (if either is defined). This sets those
14029 two positions, and bumps up the position of all the remaining tags to
14030 compensate. */
14031 static int
14032 elf32_arm_obj_attrs_order (int num)
14033 {
14034 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
14035 return Tag_conformance;
14036 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
14037 return Tag_nodefaults;
14038 if ((num - 2) < Tag_nodefaults)
14039 return num - 2;
14040 if ((num - 1) < Tag_conformance)
14041 return num - 1;
14042 return num;
14043 }
14044
14045 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
14046 static bool
14047 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
14048 {
14049 if ((tag & 127) < 64)
14050 {
14051 _bfd_error_handler
14052 (_("%pB: unknown mandatory EABI object attribute %d"),
14053 abfd, tag);
14054 bfd_set_error (bfd_error_bad_value);
14055 return false;
14056 }
14057 else
14058 {
14059 _bfd_error_handler
14060 (_("warning: %pB: unknown EABI object attribute %d"),
14061 abfd, tag);
14062 return true;
14063 }
14064 }
14065
14066 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
14067 Returns -1 if no architecture could be read. */
14068
14069 static int
14070 get_secondary_compatible_arch (bfd *abfd)
14071 {
14072 obj_attribute *attr =
14073 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
14074
14075 /* Note: the tag and its argument below are uleb128 values, though
14076 currently-defined values fit in one byte for each. */
14077 if (attr->s
14078 && attr->s[0] == Tag_CPU_arch
14079 && (attr->s[1] & 128) != 128
14080 && attr->s[2] == 0)
14081 return attr->s[1];
14082
14083 /* This tag is "safely ignorable", so don't complain if it looks funny. */
14084 return -1;
14085 }
14086
14087 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
14088 The tag is removed if ARCH is -1. */
14089
14090 static void
14091 set_secondary_compatible_arch (bfd *abfd, int arch)
14092 {
14093 obj_attribute *attr =
14094 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
14095
14096 if (arch == -1)
14097 {
14098 attr->s = NULL;
14099 return;
14100 }
14101
14102 /* Note: the tag and its argument below are uleb128 values, though
14103 currently-defined values fit in one byte for each. */
14104 if (!attr->s)
14105 attr->s = (char *) bfd_alloc (abfd, 3);
14106 attr->s[0] = Tag_CPU_arch;
14107 attr->s[1] = arch;
14108 attr->s[2] = '\0';
14109 }
14110
14111 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
14112 into account. */
14113
14114 static int
14115 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
14116 int newtag, int secondary_compat)
14117 {
14118 #define T(X) TAG_CPU_ARCH_##X
14119 int tagl, tagh, result;
14120 const int v6t2[] =
14121 {
14122 T(V6T2), /* PRE_V4. */
14123 T(V6T2), /* V4. */
14124 T(V6T2), /* V4T. */
14125 T(V6T2), /* V5T. */
14126 T(V6T2), /* V5TE. */
14127 T(V6T2), /* V5TEJ. */
14128 T(V6T2), /* V6. */
14129 T(V7), /* V6KZ. */
14130 T(V6T2) /* V6T2. */
14131 };
14132 const int v6k[] =
14133 {
14134 T(V6K), /* PRE_V4. */
14135 T(V6K), /* V4. */
14136 T(V6K), /* V4T. */
14137 T(V6K), /* V5T. */
14138 T(V6K), /* V5TE. */
14139 T(V6K), /* V5TEJ. */
14140 T(V6K), /* V6. */
14141 T(V6KZ), /* V6KZ. */
14142 T(V7), /* V6T2. */
14143 T(V6K) /* V6K. */
14144 };
14145 const int v7[] =
14146 {
14147 T(V7), /* PRE_V4. */
14148 T(V7), /* V4. */
14149 T(V7), /* V4T. */
14150 T(V7), /* V5T. */
14151 T(V7), /* V5TE. */
14152 T(V7), /* V5TEJ. */
14153 T(V7), /* V6. */
14154 T(V7), /* V6KZ. */
14155 T(V7), /* V6T2. */
14156 T(V7), /* V6K. */
14157 T(V7) /* V7. */
14158 };
14159 const int v6_m[] =
14160 {
14161 -1, /* PRE_V4. */
14162 -1, /* V4. */
14163 T(V6K), /* V4T. */
14164 T(V6K), /* V5T. */
14165 T(V6K), /* V5TE. */
14166 T(V6K), /* V5TEJ. */
14167 T(V6K), /* V6. */
14168 T(V6KZ), /* V6KZ. */
14169 T(V7), /* V6T2. */
14170 T(V6K), /* V6K. */
14171 T(V7), /* V7. */
14172 T(V6_M) /* V6_M. */
14173 };
14174 const int v6s_m[] =
14175 {
14176 -1, /* PRE_V4. */
14177 -1, /* V4. */
14178 T(V6K), /* V4T. */
14179 T(V6K), /* V5T. */
14180 T(V6K), /* V5TE. */
14181 T(V6K), /* V5TEJ. */
14182 T(V6K), /* V6. */
14183 T(V6KZ), /* V6KZ. */
14184 T(V7), /* V6T2. */
14185 T(V6K), /* V6K. */
14186 T(V7), /* V7. */
14187 T(V6S_M), /* V6_M. */
14188 T(V6S_M) /* V6S_M. */
14189 };
14190 const int v7e_m[] =
14191 {
14192 -1, /* PRE_V4. */
14193 -1, /* V4. */
14194 T(V7E_M), /* V4T. */
14195 T(V7E_M), /* V5T. */
14196 T(V7E_M), /* V5TE. */
14197 T(V7E_M), /* V5TEJ. */
14198 T(V7E_M), /* V6. */
14199 T(V7E_M), /* V6KZ. */
14200 T(V7E_M), /* V6T2. */
14201 T(V7E_M), /* V6K. */
14202 T(V7E_M), /* V7. */
14203 T(V7E_M), /* V6_M. */
14204 T(V7E_M), /* V6S_M. */
14205 T(V7E_M) /* V7E_M. */
14206 };
14207 const int v8[] =
14208 {
14209 T(V8), /* PRE_V4. */
14210 T(V8), /* V4. */
14211 T(V8), /* V4T. */
14212 T(V8), /* V5T. */
14213 T(V8), /* V5TE. */
14214 T(V8), /* V5TEJ. */
14215 T(V8), /* V6. */
14216 T(V8), /* V6KZ. */
14217 T(V8), /* V6T2. */
14218 T(V8), /* V6K. */
14219 T(V8), /* V7. */
14220 T(V8), /* V6_M. */
14221 T(V8), /* V6S_M. */
14222 T(V8), /* V7E_M. */
14223 T(V8), /* V8. */
14224 T(V8), /* V8-R. */
14225 T(V8), /* V8-M.BASE. */
14226 T(V8), /* V8-M.MAIN. */
14227 T(V8), /* V8.1. */
14228 T(V8), /* V8.2. */
14229 T(V8), /* V8.3. */
14230 T(V8), /* V8.1-M.MAIN. */
14231 };
14232 const int v8r[] =
14233 {
14234 T(V8R), /* PRE_V4. */
14235 T(V8R), /* V4. */
14236 T(V8R), /* V4T. */
14237 T(V8R), /* V5T. */
14238 T(V8R), /* V5TE. */
14239 T(V8R), /* V5TEJ. */
14240 T(V8R), /* V6. */
14241 T(V8R), /* V6KZ. */
14242 T(V8R), /* V6T2. */
14243 T(V8R), /* V6K. */
14244 T(V8R), /* V7. */
14245 T(V8R), /* V6_M. */
14246 T(V8R), /* V6S_M. */
14247 T(V8R), /* V7E_M. */
14248 T(V8), /* V8. */
14249 T(V8R), /* V8R. */
14250 };
14251 const int v8m_baseline[] =
14252 {
14253 -1, /* PRE_V4. */
14254 -1, /* V4. */
14255 -1, /* V4T. */
14256 -1, /* V5T. */
14257 -1, /* V5TE. */
14258 -1, /* V5TEJ. */
14259 -1, /* V6. */
14260 -1, /* V6KZ. */
14261 -1, /* V6T2. */
14262 -1, /* V6K. */
14263 -1, /* V7. */
14264 T(V8M_BASE), /* V6_M. */
14265 T(V8M_BASE), /* V6S_M. */
14266 -1, /* V7E_M. */
14267 -1, /* V8. */
14268 -1, /* V8R. */
14269 T(V8M_BASE) /* V8-M BASELINE. */
14270 };
14271 const int v8m_mainline[] =
14272 {
14273 -1, /* PRE_V4. */
14274 -1, /* V4. */
14275 -1, /* V4T. */
14276 -1, /* V5T. */
14277 -1, /* V5TE. */
14278 -1, /* V5TEJ. */
14279 -1, /* V6. */
14280 -1, /* V6KZ. */
14281 -1, /* V6T2. */
14282 -1, /* V6K. */
14283 T(V8M_MAIN), /* V7. */
14284 T(V8M_MAIN), /* V6_M. */
14285 T(V8M_MAIN), /* V6S_M. */
14286 T(V8M_MAIN), /* V7E_M. */
14287 -1, /* V8. */
14288 -1, /* V8R. */
14289 T(V8M_MAIN), /* V8-M BASELINE. */
14290 T(V8M_MAIN) /* V8-M MAINLINE. */
14291 };
14292 const int v8_1m_mainline[] =
14293 {
14294 -1, /* PRE_V4. */
14295 -1, /* V4. */
14296 -1, /* V4T. */
14297 -1, /* V5T. */
14298 -1, /* V5TE. */
14299 -1, /* V5TEJ. */
14300 -1, /* V6. */
14301 -1, /* V6KZ. */
14302 -1, /* V6T2. */
14303 -1, /* V6K. */
14304 T(V8_1M_MAIN), /* V7. */
14305 T(V8_1M_MAIN), /* V6_M. */
14306 T(V8_1M_MAIN), /* V6S_M. */
14307 T(V8_1M_MAIN), /* V7E_M. */
14308 -1, /* V8. */
14309 -1, /* V8R. */
14310 T(V8_1M_MAIN), /* V8-M BASELINE. */
14311 T(V8_1M_MAIN), /* V8-M MAINLINE. */
14312 -1, /* Unused (18). */
14313 -1, /* Unused (19). */
14314 -1, /* Unused (20). */
14315 T(V8_1M_MAIN) /* V8.1-M MAINLINE. */
14316 };
14317 const int v9[] =
14318 {
14319 T(V9), /* PRE_V4. */
14320 T(V9), /* V4. */
14321 T(V9), /* V4T. */
14322 T(V9), /* V5T. */
14323 T(V9), /* V5TE. */
14324 T(V9), /* V5TEJ. */
14325 T(V9), /* V6. */
14326 T(V9), /* V6KZ. */
14327 T(V9), /* V6T2. */
14328 T(V9), /* V6K. */
14329 T(V9), /* V7. */
14330 T(V9), /* V6_M. */
14331 T(V9), /* V6S_M. */
14332 T(V9), /* V7E_M. */
14333 T(V9), /* V8. */
14334 T(V9), /* V8-R. */
14335 T(V9), /* V8-M.BASE. */
14336 T(V9), /* V8-M.MAIN. */
14337 T(V9), /* V8.1. */
14338 T(V9), /* V8.2. */
14339 T(V9), /* V8.3. */
14340 T(V9), /* V8.1-M.MAIN. */
14341 T(V9), /* V9. */
14342 };
14343 const int v4t_plus_v6_m[] =
14344 {
14345 -1, /* PRE_V4. */
14346 -1, /* V4. */
14347 T(V4T), /* V4T. */
14348 T(V5T), /* V5T. */
14349 T(V5TE), /* V5TE. */
14350 T(V5TEJ), /* V5TEJ. */
14351 T(V6), /* V6. */
14352 T(V6KZ), /* V6KZ. */
14353 T(V6T2), /* V6T2. */
14354 T(V6K), /* V6K. */
14355 T(V7), /* V7. */
14356 T(V6_M), /* V6_M. */
14357 T(V6S_M), /* V6S_M. */
14358 T(V7E_M), /* V7E_M. */
14359 T(V8), /* V8. */
14360 -1, /* V8R. */
14361 T(V8M_BASE), /* V8-M BASELINE. */
14362 T(V8M_MAIN), /* V8-M MAINLINE. */
14363 -1, /* Unused (18). */
14364 -1, /* Unused (19). */
14365 -1, /* Unused (20). */
14366 T(V8_1M_MAIN), /* V8.1-M MAINLINE. */
14367 T(V9), /* V9. */
14368 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
14369 };
14370 const int *comb[] =
14371 {
14372 v6t2,
14373 v6k,
14374 v7,
14375 v6_m,
14376 v6s_m,
14377 v7e_m,
14378 v8,
14379 v8r,
14380 v8m_baseline,
14381 v8m_mainline,
14382 NULL,
14383 NULL,
14384 NULL,
14385 v8_1m_mainline,
14386 v9,
14387 /* Pseudo-architecture. */
14388 v4t_plus_v6_m
14389 };
14390
14391 /* Check we've not got a higher architecture than we know about. */
14392
14393 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
14394 {
14395 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd);
14396 return -1;
14397 }
14398
14399 /* Override old tag if we have a Tag_also_compatible_with on the output. */
14400
14401 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
14402 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
14403 oldtag = T(V4T_PLUS_V6_M);
14404
14405 /* And override the new tag if we have a Tag_also_compatible_with on the
14406 input. */
14407
14408 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
14409 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
14410 newtag = T(V4T_PLUS_V6_M);
14411
14412 tagl = (oldtag < newtag) ? oldtag : newtag;
14413 result = tagh = (oldtag > newtag) ? oldtag : newtag;
14414
14415 /* Architectures before V6KZ add features monotonically. */
14416 if (tagh <= TAG_CPU_ARCH_V6KZ)
14417 return result;
14418
14419 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
14420
14421 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
14422 as the canonical version. */
14423 if (result == T(V4T_PLUS_V6_M))
14424 {
14425 result = T(V4T);
14426 *secondary_compat_out = T(V6_M);
14427 }
14428 else
14429 *secondary_compat_out = -1;
14430
14431 if (result == -1)
14432 {
14433 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
14434 ibfd, oldtag, newtag);
14435 return -1;
14436 }
14437
14438 return result;
14439 #undef T
14440 }
14441
14442 /* Query attributes object to see if integer divide instructions may be
14443 present in an object. */
14444 static bool
14445 elf32_arm_attributes_accept_div (const obj_attribute *attr)
14446 {
14447 int arch = attr[Tag_CPU_arch].i;
14448 int profile = attr[Tag_CPU_arch_profile].i;
14449
14450 switch (attr[Tag_DIV_use].i)
14451 {
14452 case 0:
14453 /* Integer divide allowed if instruction contained in archetecture. */
14454 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
14455 return true;
14456 else if (arch >= TAG_CPU_ARCH_V7E_M)
14457 return true;
14458 else
14459 return false;
14460
14461 case 1:
14462 /* Integer divide explicitly prohibited. */
14463 return false;
14464
14465 default:
14466 /* Unrecognised case - treat as allowing divide everywhere. */
14467 case 2:
14468 /* Integer divide allowed in ARM state. */
14469 return true;
14470 }
14471 }
14472
14473 /* Query attributes object to see if integer divide instructions are
14474 forbidden to be in the object. This is not the inverse of
14475 elf32_arm_attributes_accept_div. */
14476 static bool
14477 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
14478 {
14479 return attr[Tag_DIV_use].i == 1;
14480 }
14481
14482 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
14483 are conflicting attributes. */
14484
14485 static bool
14486 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
14487 {
14488 bfd *obfd = info->output_bfd;
14489 obj_attribute *in_attr;
14490 obj_attribute *out_attr;
14491 /* Some tags have 0 = don't care, 1 = strong requirement,
14492 2 = weak requirement. */
14493 static const int order_021[3] = {0, 2, 1};
14494 int i;
14495 bool result = true;
14496 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
14497
14498 /* Skip the linker stubs file. This preserves previous behavior
14499 of accepting unknown attributes in the first input file - but
14500 is that a bug? */
14501 if (ibfd->flags & BFD_LINKER_CREATED)
14502 return true;
14503
14504 /* Skip any input that hasn't attribute section.
14505 This enables to link object files without attribute section with
14506 any others. */
14507 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
14508 return true;
14509
14510 if (!elf_known_obj_attributes_proc (obfd)[0].i)
14511 {
14512 /* This is the first object. Copy the attributes. */
14513 _bfd_elf_copy_obj_attributes (ibfd, obfd);
14514
14515 out_attr = elf_known_obj_attributes_proc (obfd);
14516
14517 /* Use the Tag_null value to indicate the attributes have been
14518 initialized. */
14519 out_attr[0].i = 1;
14520
14521 /* We do not output objects with Tag_MPextension_use_legacy - we move
14522 the attribute's value to Tag_MPextension_use. */
14523 if (out_attr[Tag_MPextension_use_legacy].i != 0)
14524 {
14525 if (out_attr[Tag_MPextension_use].i != 0
14526 && out_attr[Tag_MPextension_use_legacy].i
14527 != out_attr[Tag_MPextension_use].i)
14528 {
14529 _bfd_error_handler
14530 (_("Error: %pB has both the current and legacy "
14531 "Tag_MPextension_use attributes"), ibfd);
14532 result = false;
14533 }
14534
14535 out_attr[Tag_MPextension_use] =
14536 out_attr[Tag_MPextension_use_legacy];
14537 out_attr[Tag_MPextension_use_legacy].type = 0;
14538 out_attr[Tag_MPextension_use_legacy].i = 0;
14539 }
14540
14541 /* PR 28859 and 28848: Handle the case where the first input file,
14542 eg crti.o, has a Tag_ABI_HardFP_use of 3 but no Tag_FP_arch set.
14543 Using Tag_ABI_HardFP_use in this way is deprecated, so reset the
14544 attribute to zero.
14545 FIXME: Should we handle other non-zero values of Tag_ABI_HardFO_use ? */
14546 if (out_attr[Tag_ABI_HardFP_use].i == 3 && out_attr[Tag_FP_arch].i == 0)
14547 out_attr[Tag_ABI_HardFP_use].i = 0;
14548
14549 return result;
14550 }
14551
14552 in_attr = elf_known_obj_attributes_proc (ibfd);
14553 out_attr = elf_known_obj_attributes_proc (obfd);
14554 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
14555 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
14556 {
14557 /* Ignore mismatches if the object doesn't use floating point or is
14558 floating point ABI independent. */
14559 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
14560 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14561 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
14562 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
14563 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14564 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
14565 {
14566 _bfd_error_handler
14567 (_("error: %pB uses VFP register arguments, %pB does not"),
14568 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
14569 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
14570 result = false;
14571 }
14572 }
14573
14574 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
14575 {
14576 /* Merge this attribute with existing attributes. */
14577 switch (i)
14578 {
14579 case Tag_CPU_raw_name:
14580 case Tag_CPU_name:
14581 /* These are merged after Tag_CPU_arch. */
14582 break;
14583
14584 case Tag_ABI_optimization_goals:
14585 case Tag_ABI_FP_optimization_goals:
14586 /* Use the first value seen. */
14587 break;
14588
14589 case Tag_CPU_arch:
14590 {
14591 int secondary_compat = -1, secondary_compat_out = -1;
14592 unsigned int saved_out_attr = out_attr[i].i;
14593 int arch_attr;
14594 static const char *name_table[] =
14595 {
14596 /* These aren't real CPU names, but we can't guess
14597 that from the architecture version alone. */
14598 "Pre v4",
14599 "ARM v4",
14600 "ARM v4T",
14601 "ARM v5T",
14602 "ARM v5TE",
14603 "ARM v5TEJ",
14604 "ARM v6",
14605 "ARM v6KZ",
14606 "ARM v6T2",
14607 "ARM v6K",
14608 "ARM v7",
14609 "ARM v6-M",
14610 "ARM v6S-M",
14611 "ARM v7E-M",
14612 "ARM v8",
14613 "ARM v8-R",
14614 "ARM v8-M.baseline",
14615 "ARM v8-M.mainline",
14616 "ARM v8.1-A",
14617 "ARM v8.2-A",
14618 "ARM v8.3-A",
14619 "ARM v8.1-M.mainline",
14620 "ARM v9",
14621 };
14622
14623 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
14624 secondary_compat = get_secondary_compatible_arch (ibfd);
14625 secondary_compat_out = get_secondary_compatible_arch (obfd);
14626 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
14627 &secondary_compat_out,
14628 in_attr[i].i,
14629 secondary_compat);
14630
14631 /* Return with error if failed to merge. */
14632 if (arch_attr == -1)
14633 return false;
14634
14635 out_attr[i].i = arch_attr;
14636
14637 set_secondary_compatible_arch (obfd, secondary_compat_out);
14638
14639 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
14640 if (out_attr[i].i == saved_out_attr)
14641 ; /* Leave the names alone. */
14642 else if (out_attr[i].i == in_attr[i].i)
14643 {
14644 /* The output architecture has been changed to match the
14645 input architecture. Use the input names. */
14646 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
14647 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
14648 : NULL;
14649 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
14650 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
14651 : NULL;
14652 }
14653 else
14654 {
14655 out_attr[Tag_CPU_name].s = NULL;
14656 out_attr[Tag_CPU_raw_name].s = NULL;
14657 }
14658
14659 /* If we still don't have a value for Tag_CPU_name,
14660 make one up now. Tag_CPU_raw_name remains blank. */
14661 if (out_attr[Tag_CPU_name].s == NULL
14662 && out_attr[i].i < ARRAY_SIZE (name_table))
14663 out_attr[Tag_CPU_name].s =
14664 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
14665 }
14666 break;
14667
14668 case Tag_ARM_ISA_use:
14669 case Tag_THUMB_ISA_use:
14670 case Tag_WMMX_arch:
14671 case Tag_Advanced_SIMD_arch:
14672 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
14673 case Tag_ABI_FP_rounding:
14674 case Tag_ABI_FP_exceptions:
14675 case Tag_ABI_FP_user_exceptions:
14676 case Tag_ABI_FP_number_model:
14677 case Tag_FP_HP_extension:
14678 case Tag_CPU_unaligned_access:
14679 case Tag_T2EE_use:
14680 case Tag_MPextension_use:
14681 case Tag_MVE_arch:
14682 case Tag_PAC_extension:
14683 case Tag_BTI_extension:
14684 case Tag_BTI_use:
14685 case Tag_PACRET_use:
14686 /* Use the largest value specified. */
14687 if (in_attr[i].i > out_attr[i].i)
14688 out_attr[i].i = in_attr[i].i;
14689 break;
14690
14691 case Tag_ABI_align_preserved:
14692 case Tag_ABI_PCS_RO_data:
14693 /* Use the smallest value specified. */
14694 if (in_attr[i].i < out_attr[i].i)
14695 out_attr[i].i = in_attr[i].i;
14696 break;
14697
14698 case Tag_ABI_align_needed:
14699 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
14700 && (in_attr[Tag_ABI_align_preserved].i == 0
14701 || out_attr[Tag_ABI_align_preserved].i == 0))
14702 {
14703 /* This error message should be enabled once all non-conformant
14704 binaries in the toolchain have had the attributes set
14705 properly.
14706 _bfd_error_handler
14707 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14708 obfd, ibfd);
14709 result = false; */
14710 }
14711 /* Fall through. */
14712 case Tag_ABI_FP_denormal:
14713 case Tag_ABI_PCS_GOT_use:
14714 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14715 value if greater than 2 (for future-proofing). */
14716 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
14717 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
14718 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
14719 out_attr[i].i = in_attr[i].i;
14720 break;
14721
14722 case Tag_Virtualization_use:
14723 /* The virtualization tag effectively stores two bits of
14724 information: the intended use of TrustZone (in bit 0), and the
14725 intended use of Virtualization (in bit 1). */
14726 if (out_attr[i].i == 0)
14727 out_attr[i].i = in_attr[i].i;
14728 else if (in_attr[i].i != 0
14729 && in_attr[i].i != out_attr[i].i)
14730 {
14731 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
14732 out_attr[i].i = 3;
14733 else
14734 {
14735 _bfd_error_handler
14736 (_("error: %pB: unable to merge virtualization attributes "
14737 "with %pB"),
14738 obfd, ibfd);
14739 result = false;
14740 }
14741 }
14742 break;
14743
14744 case Tag_CPU_arch_profile:
14745 if (out_attr[i].i != in_attr[i].i)
14746 {
14747 /* 0 will merge with anything.
14748 'A' and 'S' merge to 'A'.
14749 'R' and 'S' merge to 'R'.
14750 'M' and 'A|R|S' is an error. */
14751 if (out_attr[i].i == 0
14752 || (out_attr[i].i == 'S'
14753 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
14754 out_attr[i].i = in_attr[i].i;
14755 else if (in_attr[i].i == 0
14756 || (in_attr[i].i == 'S'
14757 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
14758 ; /* Do nothing. */
14759 else
14760 {
14761 _bfd_error_handler
14762 (_("error: %pB: conflicting architecture profiles %c/%c"),
14763 ibfd,
14764 in_attr[i].i ? in_attr[i].i : '0',
14765 out_attr[i].i ? out_attr[i].i : '0');
14766 result = false;
14767 }
14768 }
14769 break;
14770
14771 case Tag_DSP_extension:
14772 /* No need to change output value if any of:
14773 - pre (<=) ARMv5T input architecture (do not have DSP)
14774 - M input profile not ARMv7E-M and do not have DSP. */
14775 if (in_attr[Tag_CPU_arch].i <= 3
14776 || (in_attr[Tag_CPU_arch_profile].i == 'M'
14777 && in_attr[Tag_CPU_arch].i != 13
14778 && in_attr[i].i == 0))
14779 ; /* Do nothing. */
14780 /* Output value should be 0 if DSP part of architecture, ie.
14781 - post (>=) ARMv5te architecture output
14782 - A, R or S profile output or ARMv7E-M output architecture. */
14783 else if (out_attr[Tag_CPU_arch].i >= 4
14784 && (out_attr[Tag_CPU_arch_profile].i == 'A'
14785 || out_attr[Tag_CPU_arch_profile].i == 'R'
14786 || out_attr[Tag_CPU_arch_profile].i == 'S'
14787 || out_attr[Tag_CPU_arch].i == 13))
14788 out_attr[i].i = 0;
14789 /* Otherwise, DSP instructions are added and not part of output
14790 architecture. */
14791 else
14792 out_attr[i].i = 1;
14793 break;
14794
14795 case Tag_FP_arch:
14796 {
14797 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14798 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14799 when it's 0. It might mean absence of FP hardware if
14800 Tag_FP_arch is zero. */
14801
14802 #define VFP_VERSION_COUNT 9
14803 static const struct
14804 {
14805 int ver;
14806 int regs;
14807 } vfp_versions[VFP_VERSION_COUNT] =
14808 {
14809 {0, 0},
14810 {1, 16},
14811 {2, 16},
14812 {3, 32},
14813 {3, 16},
14814 {4, 32},
14815 {4, 16},
14816 {8, 32},
14817 {8, 16}
14818 };
14819 int ver;
14820 int regs;
14821 int newval;
14822
14823 /* If the output has no requirement about FP hardware,
14824 follow the requirement of the input. */
14825 if (out_attr[i].i == 0)
14826 {
14827 /* This assert is still reasonable, we shouldn't
14828 produce the suspicious build attribute
14829 combination (See below for in_attr). */
14830 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
14831 out_attr[i].i = in_attr[i].i;
14832 out_attr[Tag_ABI_HardFP_use].i
14833 = in_attr[Tag_ABI_HardFP_use].i;
14834 break;
14835 }
14836 /* If the input has no requirement about FP hardware, do
14837 nothing. */
14838 else if (in_attr[i].i == 0)
14839 {
14840 /* We used to assert that Tag_ABI_HardFP_use was
14841 zero here, but we should never assert when
14842 consuming an object file that has suspicious
14843 build attributes. The single precision variant
14844 of 'no FP architecture' is still 'no FP
14845 architecture', so we just ignore the tag in this
14846 case. */
14847 break;
14848 }
14849
14850 /* Both the input and the output have nonzero Tag_FP_arch.
14851 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
14852
14853 /* If both the input and the output have zero Tag_ABI_HardFP_use,
14854 do nothing. */
14855 if (in_attr[Tag_ABI_HardFP_use].i == 0
14856 && out_attr[Tag_ABI_HardFP_use].i == 0)
14857 ;
14858 /* If the input and the output have different Tag_ABI_HardFP_use,
14859 the combination of them is 0 (implied by Tag_FP_arch). */
14860 else if (in_attr[Tag_ABI_HardFP_use].i
14861 != out_attr[Tag_ABI_HardFP_use].i)
14862 out_attr[Tag_ABI_HardFP_use].i = 0;
14863
14864 /* Now we can handle Tag_FP_arch. */
14865
14866 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14867 pick the biggest. */
14868 if (in_attr[i].i >= VFP_VERSION_COUNT
14869 && in_attr[i].i > out_attr[i].i)
14870 {
14871 out_attr[i] = in_attr[i];
14872 break;
14873 }
14874 /* The output uses the superset of input features
14875 (ISA version) and registers. */
14876 ver = vfp_versions[in_attr[i].i].ver;
14877 if (ver < vfp_versions[out_attr[i].i].ver)
14878 ver = vfp_versions[out_attr[i].i].ver;
14879 regs = vfp_versions[in_attr[i].i].regs;
14880 if (regs < vfp_versions[out_attr[i].i].regs)
14881 regs = vfp_versions[out_attr[i].i].regs;
14882 /* This assumes all possible supersets are also a valid
14883 options. */
14884 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
14885 {
14886 if (regs == vfp_versions[newval].regs
14887 && ver == vfp_versions[newval].ver)
14888 break;
14889 }
14890 out_attr[i].i = newval;
14891 }
14892 break;
14893 case Tag_PCS_config:
14894 if (out_attr[i].i == 0)
14895 out_attr[i].i = in_attr[i].i;
14896 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
14897 {
14898 /* It's sometimes ok to mix different configs, so this is only
14899 a warning. */
14900 _bfd_error_handler
14901 (_("warning: %pB: conflicting platform configuration"), ibfd);
14902 }
14903 break;
14904 case Tag_ABI_PCS_R9_use:
14905 if (in_attr[i].i != out_attr[i].i
14906 && out_attr[i].i != AEABI_R9_unused
14907 && in_attr[i].i != AEABI_R9_unused)
14908 {
14909 _bfd_error_handler
14910 (_("error: %pB: conflicting use of R9"), ibfd);
14911 result = false;
14912 }
14913 if (out_attr[i].i == AEABI_R9_unused)
14914 out_attr[i].i = in_attr[i].i;
14915 break;
14916 case Tag_ABI_PCS_RW_data:
14917 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
14918 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
14919 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
14920 {
14921 _bfd_error_handler
14922 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14923 ibfd);
14924 result = false;
14925 }
14926 /* Use the smallest value specified. */
14927 if (in_attr[i].i < out_attr[i].i)
14928 out_attr[i].i = in_attr[i].i;
14929 break;
14930 case Tag_ABI_PCS_wchar_t:
14931 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
14932 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
14933 {
14934 _bfd_error_handler
14935 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14936 ibfd, in_attr[i].i, out_attr[i].i);
14937 }
14938 else if (in_attr[i].i && !out_attr[i].i)
14939 out_attr[i].i = in_attr[i].i;
14940 break;
14941 case Tag_ABI_enum_size:
14942 if (in_attr[i].i != AEABI_enum_unused)
14943 {
14944 if (out_attr[i].i == AEABI_enum_unused
14945 || out_attr[i].i == AEABI_enum_forced_wide)
14946 {
14947 /* The existing object is compatible with anything.
14948 Use whatever requirements the new object has. */
14949 out_attr[i].i = in_attr[i].i;
14950 }
14951 else if (in_attr[i].i != AEABI_enum_forced_wide
14952 && out_attr[i].i != in_attr[i].i
14953 && !elf_arm_tdata (obfd)->no_enum_size_warning)
14954 {
14955 static const char *aeabi_enum_names[] =
14956 { "", "variable-size", "32-bit", "" };
14957 const char *in_name =
14958 in_attr[i].i < ARRAY_SIZE (aeabi_enum_names)
14959 ? aeabi_enum_names[in_attr[i].i]
14960 : "<unknown>";
14961 const char *out_name =
14962 out_attr[i].i < ARRAY_SIZE (aeabi_enum_names)
14963 ? aeabi_enum_names[out_attr[i].i]
14964 : "<unknown>";
14965 _bfd_error_handler
14966 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14967 ibfd, in_name, out_name);
14968 }
14969 }
14970 break;
14971 case Tag_ABI_VFP_args:
14972 /* Aready done. */
14973 break;
14974 case Tag_ABI_WMMX_args:
14975 if (in_attr[i].i != out_attr[i].i)
14976 {
14977 _bfd_error_handler
14978 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14979 ibfd, obfd);
14980 result = false;
14981 }
14982 break;
14983 case Tag_compatibility:
14984 /* Merged in target-independent code. */
14985 break;
14986 case Tag_ABI_HardFP_use:
14987 /* This is handled along with Tag_FP_arch. */
14988 break;
14989 case Tag_ABI_FP_16bit_format:
14990 if (in_attr[i].i != 0 && out_attr[i].i != 0)
14991 {
14992 if (in_attr[i].i != out_attr[i].i)
14993 {
14994 _bfd_error_handler
14995 (_("error: fp16 format mismatch between %pB and %pB"),
14996 ibfd, obfd);
14997 result = false;
14998 }
14999 }
15000 if (in_attr[i].i != 0)
15001 out_attr[i].i = in_attr[i].i;
15002 break;
15003
15004 case Tag_DIV_use:
15005 /* A value of zero on input means that the divide instruction may
15006 be used if available in the base architecture as specified via
15007 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
15008 the user did not want divide instructions. A value of 2
15009 explicitly means that divide instructions were allowed in ARM
15010 and Thumb state. */
15011 if (in_attr[i].i == out_attr[i].i)
15012 /* Do nothing. */ ;
15013 else if (elf32_arm_attributes_forbid_div (in_attr)
15014 && !elf32_arm_attributes_accept_div (out_attr))
15015 out_attr[i].i = 1;
15016 else if (elf32_arm_attributes_forbid_div (out_attr)
15017 && elf32_arm_attributes_accept_div (in_attr))
15018 out_attr[i].i = in_attr[i].i;
15019 else if (in_attr[i].i == 2)
15020 out_attr[i].i = in_attr[i].i;
15021 break;
15022
15023 case Tag_MPextension_use_legacy:
15024 /* We don't output objects with Tag_MPextension_use_legacy - we
15025 move the value to Tag_MPextension_use. */
15026 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
15027 {
15028 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
15029 {
15030 _bfd_error_handler
15031 (_("%pB has both the current and legacy "
15032 "Tag_MPextension_use attributes"),
15033 ibfd);
15034 result = false;
15035 }
15036 }
15037
15038 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
15039 out_attr[Tag_MPextension_use] = in_attr[i];
15040
15041 break;
15042
15043 case Tag_nodefaults:
15044 /* This tag is set if it exists, but the value is unused (and is
15045 typically zero). We don't actually need to do anything here -
15046 the merge happens automatically when the type flags are merged
15047 below. */
15048 break;
15049 case Tag_also_compatible_with:
15050 /* Already done in Tag_CPU_arch. */
15051 break;
15052 case Tag_conformance:
15053 /* Keep the attribute if it matches. Throw it away otherwise.
15054 No attribute means no claim to conform. */
15055 if (!in_attr[i].s || !out_attr[i].s
15056 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
15057 out_attr[i].s = NULL;
15058 break;
15059
15060 default:
15061 result
15062 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
15063 }
15064
15065 /* If out_attr was copied from in_attr then it won't have a type yet. */
15066 if (in_attr[i].type && !out_attr[i].type)
15067 out_attr[i].type = in_attr[i].type;
15068 }
15069
15070 /* Merge Tag_compatibility attributes and any common GNU ones. */
15071 if (!_bfd_elf_merge_object_attributes (ibfd, info))
15072 return false;
15073
15074 /* Check for any attributes not known on ARM. */
15075 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
15076
15077 return result;
15078 }
15079
15080
15081 /* Return TRUE if the two EABI versions are incompatible. */
15082
15083 static bool
15084 elf32_arm_versions_compatible (unsigned iver, unsigned over)
15085 {
15086 /* v4 and v5 are the same spec before and after it was released,
15087 so allow mixing them. */
15088 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
15089 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
15090 return true;
15091
15092 return (iver == over);
15093 }
15094
15095 /* Merge backend specific data from an object file to the output
15096 object file when linking. */
15097
15098 static bool
15099 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
15100
15101 /* Display the flags field. */
15102
15103 static bool
15104 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
15105 {
15106 FILE * file = (FILE *) ptr;
15107 unsigned long flags;
15108
15109 BFD_ASSERT (abfd != NULL && ptr != NULL);
15110
15111 /* Print normal ELF private data. */
15112 _bfd_elf_print_private_bfd_data (abfd, ptr);
15113
15114 flags = elf_elfheader (abfd)->e_flags;
15115 /* Ignore init flag - it may not be set, despite the flags field
15116 containing valid data. */
15117
15118 fprintf (file, _("private flags = 0x%lx:"), elf_elfheader (abfd)->e_flags);
15119
15120 switch (EF_ARM_EABI_VERSION (flags))
15121 {
15122 case EF_ARM_EABI_UNKNOWN:
15123 /* The following flag bits are GNU extensions and not part of the
15124 official ARM ELF extended ABI. Hence they are only decoded if
15125 the EABI version is not set. */
15126 if (flags & EF_ARM_INTERWORK)
15127 fprintf (file, _(" [interworking enabled]"));
15128
15129 if (flags & EF_ARM_APCS_26)
15130 fprintf (file, " [APCS-26]");
15131 else
15132 fprintf (file, " [APCS-32]");
15133
15134 if (flags & EF_ARM_VFP_FLOAT)
15135 fprintf (file, _(" [VFP float format]"));
15136 else if (flags & EF_ARM_MAVERICK_FLOAT)
15137 fprintf (file, _(" [Maverick float format]"));
15138 else
15139 fprintf (file, _(" [FPA float format]"));
15140
15141 if (flags & EF_ARM_APCS_FLOAT)
15142 fprintf (file, _(" [floats passed in float registers]"));
15143
15144 if (flags & EF_ARM_PIC)
15145 fprintf (file, _(" [position independent]"));
15146
15147 if (flags & EF_ARM_NEW_ABI)
15148 fprintf (file, _(" [new ABI]"));
15149
15150 if (flags & EF_ARM_OLD_ABI)
15151 fprintf (file, _(" [old ABI]"));
15152
15153 if (flags & EF_ARM_SOFT_FLOAT)
15154 fprintf (file, _(" [software FP]"));
15155
15156 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
15157 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
15158 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
15159 | EF_ARM_MAVERICK_FLOAT);
15160 break;
15161
15162 case EF_ARM_EABI_VER1:
15163 fprintf (file, _(" [Version1 EABI]"));
15164
15165 if (flags & EF_ARM_SYMSARESORTED)
15166 fprintf (file, _(" [sorted symbol table]"));
15167 else
15168 fprintf (file, _(" [unsorted symbol table]"));
15169
15170 flags &= ~ EF_ARM_SYMSARESORTED;
15171 break;
15172
15173 case EF_ARM_EABI_VER2:
15174 fprintf (file, _(" [Version2 EABI]"));
15175
15176 if (flags & EF_ARM_SYMSARESORTED)
15177 fprintf (file, _(" [sorted symbol table]"));
15178 else
15179 fprintf (file, _(" [unsorted symbol table]"));
15180
15181 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
15182 fprintf (file, _(" [dynamic symbols use segment index]"));
15183
15184 if (flags & EF_ARM_MAPSYMSFIRST)
15185 fprintf (file, _(" [mapping symbols precede others]"));
15186
15187 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
15188 | EF_ARM_MAPSYMSFIRST);
15189 break;
15190
15191 case EF_ARM_EABI_VER3:
15192 fprintf (file, _(" [Version3 EABI]"));
15193 break;
15194
15195 case EF_ARM_EABI_VER4:
15196 fprintf (file, _(" [Version4 EABI]"));
15197 goto eabi;
15198
15199 case EF_ARM_EABI_VER5:
15200 fprintf (file, _(" [Version5 EABI]"));
15201
15202 if (flags & EF_ARM_ABI_FLOAT_SOFT)
15203 fprintf (file, _(" [soft-float ABI]"));
15204
15205 if (flags & EF_ARM_ABI_FLOAT_HARD)
15206 fprintf (file, _(" [hard-float ABI]"));
15207
15208 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
15209
15210 eabi:
15211 if (flags & EF_ARM_BE8)
15212 fprintf (file, _(" [BE8]"));
15213
15214 if (flags & EF_ARM_LE8)
15215 fprintf (file, _(" [LE8]"));
15216
15217 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
15218 break;
15219
15220 default:
15221 fprintf (file, _(" <EABI version unrecognised>"));
15222 break;
15223 }
15224
15225 flags &= ~ EF_ARM_EABIMASK;
15226
15227 if (flags & EF_ARM_RELEXEC)
15228 fprintf (file, _(" [relocatable executable]"));
15229
15230 if (flags & EF_ARM_PIC)
15231 fprintf (file, _(" [position independent]"));
15232
15233 if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC)
15234 fprintf (file, _(" [FDPIC ABI supplement]"));
15235
15236 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC);
15237
15238 if (flags)
15239 fprintf (file, _(" <Unrecognised flag bits set>"));
15240
15241 fputc ('\n', file);
15242
15243 return true;
15244 }
15245
15246 static int
15247 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
15248 {
15249 switch (ELF_ST_TYPE (elf_sym->st_info))
15250 {
15251 case STT_ARM_TFUNC:
15252 return ELF_ST_TYPE (elf_sym->st_info);
15253
15254 case STT_ARM_16BIT:
15255 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
15256 This allows us to distinguish between data used by Thumb instructions
15257 and non-data (which is probably code) inside Thumb regions of an
15258 executable. */
15259 if (type != STT_OBJECT && type != STT_TLS)
15260 return ELF_ST_TYPE (elf_sym->st_info);
15261 break;
15262
15263 default:
15264 break;
15265 }
15266
15267 return type;
15268 }
15269
15270 static asection *
15271 elf32_arm_gc_mark_hook (asection *sec,
15272 struct bfd_link_info *info,
15273 Elf_Internal_Rela *rel,
15274 struct elf_link_hash_entry *h,
15275 Elf_Internal_Sym *sym)
15276 {
15277 if (h != NULL)
15278 switch (ELF32_R_TYPE (rel->r_info))
15279 {
15280 case R_ARM_GNU_VTINHERIT:
15281 case R_ARM_GNU_VTENTRY:
15282 return NULL;
15283 }
15284
15285 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
15286 }
15287
15288 /* Look through the relocs for a section during the first phase. */
15289
15290 static bool
15291 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
15292 asection *sec, const Elf_Internal_Rela *relocs)
15293 {
15294 Elf_Internal_Shdr *symtab_hdr;
15295 struct elf_link_hash_entry **sym_hashes;
15296 const Elf_Internal_Rela *rel;
15297 const Elf_Internal_Rela *rel_end;
15298 bfd *dynobj;
15299 asection *sreloc;
15300 struct elf32_arm_link_hash_table *htab;
15301 bool call_reloc_p;
15302 bool may_become_dynamic_p;
15303 bool may_need_local_target_p;
15304 unsigned long nsyms;
15305
15306 if (bfd_link_relocatable (info))
15307 return true;
15308
15309 BFD_ASSERT (is_arm_elf (abfd));
15310
15311 htab = elf32_arm_hash_table (info);
15312 if (htab == NULL)
15313 return false;
15314
15315 sreloc = NULL;
15316
15317 /* Create dynamic sections for relocatable executables so that we can
15318 copy relocations. */
15319 if (htab->root.is_relocatable_executable
15320 && ! htab->root.dynamic_sections_created)
15321 {
15322 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
15323 return false;
15324 }
15325
15326 if (htab->root.dynobj == NULL)
15327 htab->root.dynobj = abfd;
15328 if (!create_ifunc_sections (info))
15329 return false;
15330
15331 dynobj = htab->root.dynobj;
15332
15333 symtab_hdr = & elf_symtab_hdr (abfd);
15334 sym_hashes = elf_sym_hashes (abfd);
15335 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
15336
15337 rel_end = relocs + sec->reloc_count;
15338 for (rel = relocs; rel < rel_end; rel++)
15339 {
15340 Elf_Internal_Sym *isym;
15341 struct elf_link_hash_entry *h;
15342 struct elf32_arm_link_hash_entry *eh;
15343 unsigned int r_symndx;
15344 int r_type;
15345
15346 r_symndx = ELF32_R_SYM (rel->r_info);
15347 r_type = ELF32_R_TYPE (rel->r_info);
15348 r_type = arm_real_reloc_type (htab, r_type);
15349
15350 if (r_symndx >= nsyms
15351 /* PR 9934: It is possible to have relocations that do not
15352 refer to symbols, thus it is also possible to have an
15353 object file containing relocations but no symbol table. */
15354 && (r_symndx > STN_UNDEF || nsyms > 0))
15355 {
15356 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
15357 r_symndx);
15358 return false;
15359 }
15360
15361 h = NULL;
15362 isym = NULL;
15363 if (nsyms > 0)
15364 {
15365 if (r_symndx < symtab_hdr->sh_info)
15366 {
15367 /* A local symbol. */
15368 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache,
15369 abfd, r_symndx);
15370 if (isym == NULL)
15371 return false;
15372 }
15373 else
15374 {
15375 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
15376 while (h->root.type == bfd_link_hash_indirect
15377 || h->root.type == bfd_link_hash_warning)
15378 h = (struct elf_link_hash_entry *) h->root.u.i.link;
15379 }
15380 }
15381
15382 eh = (struct elf32_arm_link_hash_entry *) h;
15383
15384 call_reloc_p = false;
15385 may_become_dynamic_p = false;
15386 may_need_local_target_p = false;
15387
15388 /* Could be done earlier, if h were already available. */
15389 r_type = elf32_arm_tls_transition (info, r_type, h);
15390 switch (r_type)
15391 {
15392 case R_ARM_GOTOFFFUNCDESC:
15393 {
15394 if (h == NULL)
15395 {
15396 if (!elf32_arm_allocate_local_sym_info (abfd))
15397 return false;
15398 if (r_symndx >= elf32_arm_num_entries (abfd))
15399 return false;
15400 elf32_arm_local_fdpic_cnts (abfd) [r_symndx].gotofffuncdesc_cnt += 1;
15401 elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_offset = -1;
15402 }
15403 else
15404 {
15405 eh->fdpic_cnts.gotofffuncdesc_cnt++;
15406 }
15407 }
15408 break;
15409
15410 case R_ARM_GOTFUNCDESC:
15411 {
15412 if (h == NULL)
15413 {
15414 /* Such a relocation is not supposed to be generated
15415 by gcc on a static function. */
15416 /* Anyway if needed it could be handled. */
15417 return false;
15418 }
15419 else
15420 {
15421 eh->fdpic_cnts.gotfuncdesc_cnt++;
15422 }
15423 }
15424 break;
15425
15426 case R_ARM_FUNCDESC:
15427 {
15428 if (h == NULL)
15429 {
15430 if (!elf32_arm_allocate_local_sym_info (abfd))
15431 return false;
15432 if (r_symndx >= elf32_arm_num_entries (abfd))
15433 return false;
15434 elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_cnt += 1;
15435 elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_offset = -1;
15436 }
15437 else
15438 {
15439 eh->fdpic_cnts.funcdesc_cnt++;
15440 }
15441 }
15442 break;
15443
15444 case R_ARM_GOT32:
15445 case R_ARM_GOT_PREL:
15446 case R_ARM_TLS_GD32:
15447 case R_ARM_TLS_GD32_FDPIC:
15448 case R_ARM_TLS_IE32:
15449 case R_ARM_TLS_IE32_FDPIC:
15450 case R_ARM_TLS_GOTDESC:
15451 case R_ARM_TLS_DESCSEQ:
15452 case R_ARM_THM_TLS_DESCSEQ:
15453 case R_ARM_TLS_CALL:
15454 case R_ARM_THM_TLS_CALL:
15455 /* This symbol requires a global offset table entry. */
15456 {
15457 int tls_type, old_tls_type;
15458
15459 switch (r_type)
15460 {
15461 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
15462 case R_ARM_TLS_GD32_FDPIC: tls_type = GOT_TLS_GD; break;
15463
15464 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
15465 case R_ARM_TLS_IE32_FDPIC: tls_type = GOT_TLS_IE; break;
15466
15467 case R_ARM_TLS_GOTDESC:
15468 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
15469 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
15470 tls_type = GOT_TLS_GDESC; break;
15471
15472 default: tls_type = GOT_NORMAL; break;
15473 }
15474
15475 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
15476 info->flags |= DF_STATIC_TLS;
15477
15478 if (h != NULL)
15479 {
15480 h->got.refcount++;
15481 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
15482 }
15483 else
15484 {
15485 /* This is a global offset table entry for a local symbol. */
15486 if (!elf32_arm_allocate_local_sym_info (abfd))
15487 return false;
15488 if (r_symndx >= elf32_arm_num_entries (abfd))
15489 {
15490 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
15491 r_symndx);
15492 return false;
15493 }
15494
15495 elf_local_got_refcounts (abfd)[r_symndx] += 1;
15496 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
15497 }
15498
15499 /* If a variable is accessed with both tls methods, two
15500 slots may be created. */
15501 if (GOT_TLS_GD_ANY_P (old_tls_type)
15502 && GOT_TLS_GD_ANY_P (tls_type))
15503 tls_type |= old_tls_type;
15504
15505 /* We will already have issued an error message if there
15506 is a TLS/non-TLS mismatch, based on the symbol
15507 type. So just combine any TLS types needed. */
15508 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
15509 && tls_type != GOT_NORMAL)
15510 tls_type |= old_tls_type;
15511
15512 /* If the symbol is accessed in both IE and GDESC
15513 method, we're able to relax. Turn off the GDESC flag,
15514 without messing up with any other kind of tls types
15515 that may be involved. */
15516 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
15517 tls_type &= ~GOT_TLS_GDESC;
15518
15519 if (old_tls_type != tls_type)
15520 {
15521 if (h != NULL)
15522 elf32_arm_hash_entry (h)->tls_type = tls_type;
15523 else
15524 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
15525 }
15526 }
15527 /* Fall through. */
15528
15529 case R_ARM_TLS_LDM32:
15530 case R_ARM_TLS_LDM32_FDPIC:
15531 if (r_type == R_ARM_TLS_LDM32 || r_type == R_ARM_TLS_LDM32_FDPIC)
15532 htab->tls_ldm_got.refcount++;
15533 /* Fall through. */
15534
15535 case R_ARM_GOTOFF32:
15536 case R_ARM_GOTPC:
15537 if (htab->root.sgot == NULL
15538 && !create_got_section (htab->root.dynobj, info))
15539 return false;
15540 break;
15541
15542 case R_ARM_PC24:
15543 case R_ARM_PLT32:
15544 case R_ARM_CALL:
15545 case R_ARM_JUMP24:
15546 case R_ARM_PREL31:
15547 case R_ARM_THM_CALL:
15548 case R_ARM_THM_JUMP24:
15549 case R_ARM_THM_JUMP19:
15550 call_reloc_p = true;
15551 may_need_local_target_p = true;
15552 break;
15553
15554 case R_ARM_ABS12:
15555 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15556 ldr __GOTT_INDEX__ offsets. */
15557 if (htab->root.target_os != is_vxworks)
15558 {
15559 may_need_local_target_p = true;
15560 break;
15561 }
15562 else goto jump_over;
15563
15564 /* Fall through. */
15565
15566 case R_ARM_MOVW_ABS_NC:
15567 case R_ARM_MOVT_ABS:
15568 case R_ARM_THM_MOVW_ABS_NC:
15569 case R_ARM_THM_MOVT_ABS:
15570 if (bfd_link_pic (info))
15571 {
15572 _bfd_error_handler
15573 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15574 abfd, elf32_arm_howto_table_1[r_type].name,
15575 (h) ? h->root.root.string : "a local symbol");
15576 bfd_set_error (bfd_error_bad_value);
15577 return false;
15578 }
15579
15580 /* Fall through. */
15581 case R_ARM_ABS32:
15582 case R_ARM_ABS32_NOI:
15583 jump_over:
15584 if (h != NULL && bfd_link_executable (info))
15585 {
15586 h->pointer_equality_needed = 1;
15587 }
15588 /* Fall through. */
15589 case R_ARM_REL32:
15590 case R_ARM_REL32_NOI:
15591 case R_ARM_MOVW_PREL_NC:
15592 case R_ARM_MOVT_PREL:
15593 case R_ARM_THM_MOVW_PREL_NC:
15594 case R_ARM_THM_MOVT_PREL:
15595
15596 /* Should the interworking branches be listed here? */
15597 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable
15598 || htab->fdpic_p)
15599 && (sec->flags & SEC_ALLOC) != 0)
15600 {
15601 if (h == NULL
15602 && elf32_arm_howto_from_type (r_type)->pc_relative)
15603 {
15604 /* In shared libraries and relocatable executables,
15605 we treat local relative references as calls;
15606 see the related SYMBOL_CALLS_LOCAL code in
15607 allocate_dynrelocs. */
15608 call_reloc_p = true;
15609 may_need_local_target_p = true;
15610 }
15611 else
15612 /* We are creating a shared library or relocatable
15613 executable, and this is a reloc against a global symbol,
15614 or a non-PC-relative reloc against a local symbol.
15615 We may need to copy the reloc into the output. */
15616 may_become_dynamic_p = true;
15617 }
15618 else
15619 may_need_local_target_p = true;
15620 break;
15621
15622 /* This relocation describes the C++ object vtable hierarchy.
15623 Reconstruct it for later use during GC. */
15624 case R_ARM_GNU_VTINHERIT:
15625 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
15626 return false;
15627 break;
15628
15629 /* This relocation describes which C++ vtable entries are actually
15630 used. Record for later use during GC. */
15631 case R_ARM_GNU_VTENTRY:
15632 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
15633 return false;
15634 break;
15635 }
15636
15637 if (h != NULL)
15638 {
15639 if (call_reloc_p)
15640 /* We may need a .plt entry if the function this reloc
15641 refers to is in a different object, regardless of the
15642 symbol's type. We can't tell for sure yet, because
15643 something later might force the symbol local. */
15644 h->needs_plt = 1;
15645 else if (may_need_local_target_p)
15646 /* If this reloc is in a read-only section, we might
15647 need a copy reloc. We can't check reliably at this
15648 stage whether the section is read-only, as input
15649 sections have not yet been mapped to output sections.
15650 Tentatively set the flag for now, and correct in
15651 adjust_dynamic_symbol. */
15652 h->non_got_ref = 1;
15653 }
15654
15655 if (may_need_local_target_p
15656 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
15657 {
15658 union gotplt_union *root_plt;
15659 struct arm_plt_info *arm_plt;
15660 struct arm_local_iplt_info *local_iplt;
15661
15662 if (h != NULL)
15663 {
15664 root_plt = &h->plt;
15665 arm_plt = &eh->plt;
15666 }
15667 else
15668 {
15669 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
15670 if (local_iplt == NULL)
15671 return false;
15672 root_plt = &local_iplt->root;
15673 arm_plt = &local_iplt->arm;
15674 }
15675
15676 /* If the symbol is a function that doesn't bind locally,
15677 this relocation will need a PLT entry. */
15678 if (root_plt->refcount != -1)
15679 root_plt->refcount += 1;
15680
15681 if (!call_reloc_p)
15682 arm_plt->noncall_refcount++;
15683
15684 /* It's too early to use htab->use_blx here, so we have to
15685 record possible blx references separately from
15686 relocs that definitely need a thumb stub. */
15687
15688 if (r_type == R_ARM_THM_CALL)
15689 arm_plt->maybe_thumb_refcount += 1;
15690
15691 if (r_type == R_ARM_THM_JUMP24
15692 || r_type == R_ARM_THM_JUMP19)
15693 arm_plt->thumb_refcount += 1;
15694 }
15695
15696 if (may_become_dynamic_p)
15697 {
15698 struct elf_dyn_relocs *p, **head;
15699
15700 /* Create a reloc section in dynobj. */
15701 if (sreloc == NULL)
15702 {
15703 sreloc = _bfd_elf_make_dynamic_reloc_section
15704 (sec, dynobj, 2, abfd, ! htab->use_rel);
15705
15706 if (sreloc == NULL)
15707 return false;
15708 }
15709
15710 /* If this is a global symbol, count the number of
15711 relocations we need for this symbol. */
15712 if (h != NULL)
15713 head = &h->dyn_relocs;
15714 else
15715 {
15716 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
15717 if (head == NULL)
15718 return false;
15719 }
15720
15721 p = *head;
15722 if (p == NULL || p->sec != sec)
15723 {
15724 size_t amt = sizeof *p;
15725
15726 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
15727 if (p == NULL)
15728 return false;
15729 p->next = *head;
15730 *head = p;
15731 p->sec = sec;
15732 p->count = 0;
15733 p->pc_count = 0;
15734 }
15735
15736 if (elf32_arm_howto_from_type (r_type)->pc_relative)
15737 p->pc_count += 1;
15738 p->count += 1;
15739 if (h == NULL && htab->fdpic_p && !bfd_link_pic (info)
15740 && r_type != R_ARM_ABS32 && r_type != R_ARM_ABS32_NOI)
15741 {
15742 /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15743 that will become rofixup. */
15744 /* This is due to the fact that we suppose all will become rofixup. */
15745 _bfd_error_handler
15746 (_("FDPIC does not yet support %s relocation"
15747 " to become dynamic for executable"),
15748 elf32_arm_howto_table_1[r_type].name);
15749 abort ();
15750 }
15751 }
15752 }
15753
15754 return true;
15755 }
15756
15757 static void
15758 elf32_arm_update_relocs (asection *o,
15759 struct bfd_elf_section_reloc_data *reldata)
15760 {
15761 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
15762 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
15763 const struct elf_backend_data *bed;
15764 _arm_elf_section_data *eado;
15765 struct bfd_link_order *p;
15766 bfd_byte *erela_head, *erela;
15767 Elf_Internal_Rela *irela_head, *irela;
15768 Elf_Internal_Shdr *rel_hdr;
15769 bfd *abfd;
15770 unsigned int count;
15771
15772 eado = get_arm_elf_section_data (o);
15773
15774 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
15775 return;
15776
15777 abfd = o->owner;
15778 bed = get_elf_backend_data (abfd);
15779 rel_hdr = reldata->hdr;
15780
15781 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
15782 {
15783 swap_in = bed->s->swap_reloc_in;
15784 swap_out = bed->s->swap_reloc_out;
15785 }
15786 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
15787 {
15788 swap_in = bed->s->swap_reloca_in;
15789 swap_out = bed->s->swap_reloca_out;
15790 }
15791 else
15792 abort ();
15793
15794 erela_head = rel_hdr->contents;
15795 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
15796 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
15797
15798 erela = erela_head;
15799 irela = irela_head;
15800 count = 0;
15801
15802 for (p = o->map_head.link_order; p; p = p->next)
15803 {
15804 if (p->type == bfd_section_reloc_link_order
15805 || p->type == bfd_symbol_reloc_link_order)
15806 {
15807 (*swap_in) (abfd, erela, irela);
15808 erela += rel_hdr->sh_entsize;
15809 irela++;
15810 count++;
15811 }
15812 else if (p->type == bfd_indirect_link_order)
15813 {
15814 struct bfd_elf_section_reloc_data *input_reldata;
15815 arm_unwind_table_edit *edit_list, *edit_tail;
15816 _arm_elf_section_data *eadi;
15817 bfd_size_type j;
15818 bfd_vma offset;
15819 asection *i;
15820
15821 i = p->u.indirect.section;
15822
15823 eadi = get_arm_elf_section_data (i);
15824 edit_list = eadi->u.exidx.unwind_edit_list;
15825 edit_tail = eadi->u.exidx.unwind_edit_tail;
15826 offset = i->output_offset;
15827
15828 if (eadi->elf.rel.hdr &&
15829 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
15830 input_reldata = &eadi->elf.rel;
15831 else if (eadi->elf.rela.hdr &&
15832 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
15833 input_reldata = &eadi->elf.rela;
15834 else
15835 abort ();
15836
15837 if (edit_list)
15838 {
15839 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15840 {
15841 arm_unwind_table_edit *edit_node, *edit_next;
15842 bfd_vma bias;
15843 bfd_vma reloc_index;
15844
15845 (*swap_in) (abfd, erela, irela);
15846 reloc_index = (irela->r_offset - offset) / 8;
15847
15848 bias = 0;
15849 edit_node = edit_list;
15850 for (edit_next = edit_list;
15851 edit_next && edit_next->index <= reloc_index;
15852 edit_next = edit_node->next)
15853 {
15854 bias++;
15855 edit_node = edit_next;
15856 }
15857
15858 if (edit_node->type != DELETE_EXIDX_ENTRY
15859 || edit_node->index != reloc_index)
15860 {
15861 irela->r_offset -= bias * 8;
15862 irela++;
15863 count++;
15864 }
15865
15866 erela += rel_hdr->sh_entsize;
15867 }
15868
15869 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
15870 {
15871 /* New relocation entity. */
15872 asection *text_sec = edit_tail->linked_section;
15873 asection *text_out = text_sec->output_section;
15874 bfd_vma exidx_offset = offset + i->size - 8;
15875
15876 irela->r_addend = 0;
15877 irela->r_offset = exidx_offset;
15878 irela->r_info = ELF32_R_INFO
15879 (text_out->target_index, R_ARM_PREL31);
15880 irela++;
15881 count++;
15882 }
15883 }
15884 else
15885 {
15886 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15887 {
15888 (*swap_in) (abfd, erela, irela);
15889 erela += rel_hdr->sh_entsize;
15890 irela++;
15891 }
15892
15893 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15894 }
15895 }
15896 }
15897
15898 reldata->count = count;
15899 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15900
15901 erela = erela_head;
15902 irela = irela_head;
15903 while (count > 0)
15904 {
15905 (*swap_out) (abfd, irela, erela);
15906 erela += rel_hdr->sh_entsize;
15907 irela++;
15908 count--;
15909 }
15910
15911 free (irela_head);
15912
15913 /* Hashes are no longer valid. */
15914 free (reldata->hashes);
15915 reldata->hashes = NULL;
15916 }
15917
15918 /* Unwinding tables are not referenced directly. This pass marks them as
15919 required if the corresponding code section is marked. Similarly, ARMv8-M
15920 secure entry functions can only be referenced by SG veneers which are
15921 created after the GC process. They need to be marked in case they reside in
15922 their own section (as would be the case if code was compiled with
15923 -ffunction-sections). */
15924
15925 static bool
15926 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15927 elf_gc_mark_hook_fn gc_mark_hook)
15928 {
15929 bfd *sub;
15930 Elf_Internal_Shdr **elf_shdrp;
15931 asection *cmse_sec;
15932 obj_attribute *out_attr;
15933 Elf_Internal_Shdr *symtab_hdr;
15934 unsigned i, sym_count, ext_start;
15935 const struct elf_backend_data *bed;
15936 struct elf_link_hash_entry **sym_hashes;
15937 struct elf32_arm_link_hash_entry *cmse_hash;
15938 bool again, is_v8m, first_bfd_browse = true;
15939 bool debug_sec_need_to_be_marked = false;
15940 asection *isec;
15941
15942 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15943
15944 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15945 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15946 && out_attr[Tag_CPU_arch_profile].i == 'M';
15947
15948 /* Marking EH data may cause additional code sections to be marked,
15949 requiring multiple passes. */
15950 again = true;
15951 while (again)
15952 {
15953 again = false;
15954 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15955 {
15956 asection *o;
15957
15958 if (! is_arm_elf (sub))
15959 continue;
15960
15961 elf_shdrp = elf_elfsections (sub);
15962 for (o = sub->sections; o != NULL; o = o->next)
15963 {
15964 Elf_Internal_Shdr *hdr;
15965
15966 hdr = &elf_section_data (o)->this_hdr;
15967 if (hdr->sh_type == SHT_ARM_EXIDX
15968 && hdr->sh_link
15969 && hdr->sh_link < elf_numsections (sub)
15970 && !o->gc_mark
15971 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15972 {
15973 again = true;
15974 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15975 return false;
15976 }
15977 }
15978
15979 /* Mark section holding ARMv8-M secure entry functions. We mark all
15980 of them so no need for a second browsing. */
15981 if (is_v8m && first_bfd_browse)
15982 {
15983 sym_hashes = elf_sym_hashes (sub);
15984 bed = get_elf_backend_data (sub);
15985 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15986 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15987 ext_start = symtab_hdr->sh_info;
15988
15989 /* Scan symbols. */
15990 for (i = ext_start; i < sym_count; i++)
15991 {
15992 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15993 if (cmse_hash == NULL)
15994 continue;
15995
15996 /* Assume it is a special symbol. If not, cmse_scan will
15997 warn about it and user can do something about it. */
15998 if (startswith (cmse_hash->root.root.root.string,
15999 CMSE_PREFIX))
16000 {
16001 cmse_sec = cmse_hash->root.root.u.def.section;
16002 if (!cmse_sec->gc_mark
16003 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
16004 return false;
16005 /* The debug sections related to these secure entry
16006 functions are marked on enabling below flag. */
16007 debug_sec_need_to_be_marked = true;
16008 }
16009 }
16010
16011 if (debug_sec_need_to_be_marked)
16012 {
16013 /* Looping over all the sections of the object file containing
16014 Armv8-M secure entry functions and marking all the debug
16015 sections. */
16016 for (isec = sub->sections; isec != NULL; isec = isec->next)
16017 {
16018 /* If not a debug sections, skip it. */
16019 if (!isec->gc_mark && (isec->flags & SEC_DEBUGGING))
16020 isec->gc_mark = 1 ;
16021 }
16022 debug_sec_need_to_be_marked = false;
16023 }
16024 }
16025 }
16026 first_bfd_browse = false;
16027 }
16028
16029 return true;
16030 }
16031
16032 /* Treat mapping symbols as special target symbols. */
16033
16034 static bool
16035 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
16036 {
16037 return bfd_is_arm_special_symbol_name (sym->name,
16038 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
16039 }
16040
16041 /* If the ELF symbol SYM might be a function in SEC, return the
16042 function size and set *CODE_OFF to the function's entry point,
16043 otherwise return zero. */
16044
16045 static bfd_size_type
16046 elf32_arm_maybe_function_sym (const asymbol *sym, asection *sec,
16047 bfd_vma *code_off)
16048 {
16049 bfd_size_type size;
16050 elf_symbol_type * elf_sym = (elf_symbol_type *) sym;
16051
16052 if ((sym->flags & (BSF_SECTION_SYM | BSF_FILE | BSF_OBJECT
16053 | BSF_THREAD_LOCAL | BSF_RELC | BSF_SRELC)) != 0
16054 || sym->section != sec)
16055 return 0;
16056
16057 size = (sym->flags & BSF_SYNTHETIC) ? 0 : elf_sym->internal_elf_sym.st_size;
16058
16059 if (!(sym->flags & BSF_SYNTHETIC))
16060 switch (ELF_ST_TYPE (elf_sym->internal_elf_sym.st_info))
16061 {
16062 case STT_NOTYPE:
16063 /* Ignore symbols created by the annobin plugin for gcc and clang.
16064 These symbols are hidden, local, notype and have a size of 0. */
16065 if (size == 0
16066 && sym->flags & BSF_LOCAL
16067 && ELF_ST_VISIBILITY (elf_sym->internal_elf_sym.st_other) == STV_HIDDEN)
16068 return 0;
16069 /* Fall through. */
16070 case STT_FUNC:
16071 case STT_ARM_TFUNC:
16072 /* FIXME: Allow STT_GNU_IFUNC as well ? */
16073 break;
16074 default:
16075 return 0;
16076 }
16077
16078 if ((sym->flags & BSF_LOCAL)
16079 && bfd_is_arm_special_symbol_name (sym->name,
16080 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
16081 return 0;
16082
16083 *code_off = sym->value;
16084
16085 /* Do not return 0 for the function's size. */
16086 return size ? size : 1;
16087
16088 }
16089
16090 static bool
16091 elf32_arm_find_inliner_info (bfd * abfd,
16092 const char ** filename_ptr,
16093 const char ** functionname_ptr,
16094 unsigned int * line_ptr)
16095 {
16096 bool found;
16097 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
16098 functionname_ptr, line_ptr,
16099 & elf_tdata (abfd)->dwarf2_find_line_info);
16100 return found;
16101 }
16102
16103 /* Adjust a symbol defined by a dynamic object and referenced by a
16104 regular object. The current definition is in some section of the
16105 dynamic object, but we're not including those sections. We have to
16106 change the definition to something the rest of the link can
16107 understand. */
16108
16109 static bool
16110 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
16111 struct elf_link_hash_entry * h)
16112 {
16113 bfd * dynobj;
16114 asection *s, *srel;
16115 struct elf32_arm_link_hash_entry * eh;
16116 struct elf32_arm_link_hash_table *globals;
16117
16118 globals = elf32_arm_hash_table (info);
16119 if (globals == NULL)
16120 return false;
16121
16122 dynobj = elf_hash_table (info)->dynobj;
16123
16124 /* Make sure we know what is going on here. */
16125 BFD_ASSERT (dynobj != NULL
16126 && (h->needs_plt
16127 || h->type == STT_GNU_IFUNC
16128 || h->is_weakalias
16129 || (h->def_dynamic
16130 && h->ref_regular
16131 && !h->def_regular)));
16132
16133 eh = (struct elf32_arm_link_hash_entry *) h;
16134
16135 /* If this is a function, put it in the procedure linkage table. We
16136 will fill in the contents of the procedure linkage table later,
16137 when we know the address of the .got section. */
16138 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
16139 {
16140 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
16141 symbol binds locally. */
16142 if (h->plt.refcount <= 0
16143 || (h->type != STT_GNU_IFUNC
16144 && (SYMBOL_CALLS_LOCAL (info, h)
16145 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16146 && h->root.type == bfd_link_hash_undefweak))))
16147 {
16148 /* This case can occur if we saw a PLT32 reloc in an input
16149 file, but the symbol was never referred to by a dynamic
16150 object, or if all references were garbage collected. In
16151 such a case, we don't actually need to build a procedure
16152 linkage table, and we can just do a PC24 reloc instead. */
16153 h->plt.offset = (bfd_vma) -1;
16154 eh->plt.thumb_refcount = 0;
16155 eh->plt.maybe_thumb_refcount = 0;
16156 eh->plt.noncall_refcount = 0;
16157 h->needs_plt = 0;
16158 }
16159
16160 return true;
16161 }
16162 else
16163 {
16164 /* It's possible that we incorrectly decided a .plt reloc was
16165 needed for an R_ARM_PC24 or similar reloc to a non-function sym
16166 in check_relocs. We can't decide accurately between function
16167 and non-function syms in check-relocs; Objects loaded later in
16168 the link may change h->type. So fix it now. */
16169 h->plt.offset = (bfd_vma) -1;
16170 eh->plt.thumb_refcount = 0;
16171 eh->plt.maybe_thumb_refcount = 0;
16172 eh->plt.noncall_refcount = 0;
16173 }
16174
16175 /* If this is a weak symbol, and there is a real definition, the
16176 processor independent code will have arranged for us to see the
16177 real definition first, and we can just use the same value. */
16178 if (h->is_weakalias)
16179 {
16180 struct elf_link_hash_entry *def = weakdef (h);
16181 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
16182 h->root.u.def.section = def->root.u.def.section;
16183 h->root.u.def.value = def->root.u.def.value;
16184 return true;
16185 }
16186
16187 /* If there are no non-GOT references, we do not need a copy
16188 relocation. */
16189 if (!h->non_got_ref)
16190 return true;
16191
16192 /* This is a reference to a symbol defined by a dynamic object which
16193 is not a function. */
16194
16195 /* If we are creating a shared library, we must presume that the
16196 only references to the symbol are via the global offset table.
16197 For such cases we need not do anything here; the relocations will
16198 be handled correctly by relocate_section. Relocatable executables
16199 can reference data in shared objects directly, so we don't need to
16200 do anything here. */
16201 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
16202 return true;
16203
16204 /* We must allocate the symbol in our .dynbss section, which will
16205 become part of the .bss section of the executable. There will be
16206 an entry for this symbol in the .dynsym section. The dynamic
16207 object will contain position independent code, so all references
16208 from the dynamic object to this symbol will go through the global
16209 offset table. The dynamic linker will use the .dynsym entry to
16210 determine the address it must put in the global offset table, so
16211 both the dynamic object and the regular object will refer to the
16212 same memory location for the variable. */
16213 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
16214 linker to copy the initial value out of the dynamic object and into
16215 the runtime process image. We need to remember the offset into the
16216 .rel(a).bss section we are going to use. */
16217 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
16218 {
16219 s = globals->root.sdynrelro;
16220 srel = globals->root.sreldynrelro;
16221 }
16222 else
16223 {
16224 s = globals->root.sdynbss;
16225 srel = globals->root.srelbss;
16226 }
16227 if (info->nocopyreloc == 0
16228 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
16229 && h->size != 0)
16230 {
16231 elf32_arm_allocate_dynrelocs (info, srel, 1);
16232 h->needs_copy = 1;
16233 }
16234
16235 return _bfd_elf_adjust_dynamic_copy (info, h, s);
16236 }
16237
16238 /* Allocate space in .plt, .got and associated reloc sections for
16239 dynamic relocs. */
16240
16241 static bool
16242 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
16243 {
16244 struct bfd_link_info *info;
16245 struct elf32_arm_link_hash_table *htab;
16246 struct elf32_arm_link_hash_entry *eh;
16247 struct elf_dyn_relocs *p;
16248
16249 if (h->root.type == bfd_link_hash_indirect)
16250 return true;
16251
16252 eh = (struct elf32_arm_link_hash_entry *) h;
16253
16254 info = (struct bfd_link_info *) inf;
16255 htab = elf32_arm_hash_table (info);
16256 if (htab == NULL)
16257 return false;
16258
16259 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
16260 && h->plt.refcount > 0)
16261 {
16262 /* Make sure this symbol is output as a dynamic symbol.
16263 Undefined weak syms won't yet be marked as dynamic. */
16264 if (h->dynindx == -1 && !h->forced_local
16265 && h->root.type == bfd_link_hash_undefweak)
16266 {
16267 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16268 return false;
16269 }
16270
16271 /* If the call in the PLT entry binds locally, the associated
16272 GOT entry should use an R_ARM_IRELATIVE relocation instead of
16273 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
16274 than the .plt section. */
16275 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
16276 {
16277 eh->is_iplt = 1;
16278 if (eh->plt.noncall_refcount == 0
16279 && SYMBOL_REFERENCES_LOCAL (info, h))
16280 /* All non-call references can be resolved directly.
16281 This means that they can (and in some cases, must)
16282 resolve directly to the run-time target, rather than
16283 to the PLT. That in turns means that any .got entry
16284 would be equal to the .igot.plt entry, so there's
16285 no point having both. */
16286 h->got.refcount = 0;
16287 }
16288
16289 if (bfd_link_pic (info)
16290 || eh->is_iplt
16291 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
16292 {
16293 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
16294
16295 /* If this symbol is not defined in a regular file, and we are
16296 not generating a shared library, then set the symbol to this
16297 location in the .plt. This is required to make function
16298 pointers compare as equal between the normal executable and
16299 the shared library. */
16300 if (! bfd_link_pic (info)
16301 && !h->def_regular)
16302 {
16303 h->root.u.def.section = htab->root.splt;
16304 h->root.u.def.value = h->plt.offset;
16305
16306 /* Make sure the function is not marked as Thumb, in case
16307 it is the target of an ABS32 relocation, which will
16308 point to the PLT entry. */
16309 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16310 }
16311
16312 /* VxWorks executables have a second set of relocations for
16313 each PLT entry. They go in a separate relocation section,
16314 which is processed by the kernel loader. */
16315 if (htab->root.target_os == is_vxworks && !bfd_link_pic (info))
16316 {
16317 /* There is a relocation for the initial PLT entry:
16318 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
16319 if (h->plt.offset == htab->plt_header_size)
16320 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
16321
16322 /* There are two extra relocations for each subsequent
16323 PLT entry: an R_ARM_32 relocation for the GOT entry,
16324 and an R_ARM_32 relocation for the PLT entry. */
16325 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
16326 }
16327 }
16328 else
16329 {
16330 h->plt.offset = (bfd_vma) -1;
16331 h->needs_plt = 0;
16332 }
16333 }
16334 else
16335 {
16336 h->plt.offset = (bfd_vma) -1;
16337 h->needs_plt = 0;
16338 }
16339
16340 eh = (struct elf32_arm_link_hash_entry *) h;
16341 eh->tlsdesc_got = (bfd_vma) -1;
16342
16343 if (h->got.refcount > 0)
16344 {
16345 asection *s;
16346 bool dyn;
16347 int tls_type = elf32_arm_hash_entry (h)->tls_type;
16348 int indx;
16349
16350 /* Make sure this symbol is output as a dynamic symbol.
16351 Undefined weak syms won't yet be marked as dynamic. */
16352 if (htab->root.dynamic_sections_created
16353 && h->dynindx == -1
16354 && !h->forced_local
16355 && h->root.type == bfd_link_hash_undefweak)
16356 {
16357 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16358 return false;
16359 }
16360
16361 s = htab->root.sgot;
16362 h->got.offset = s->size;
16363
16364 if (tls_type == GOT_UNKNOWN)
16365 abort ();
16366
16367 if (tls_type == GOT_NORMAL)
16368 /* Non-TLS symbols need one GOT slot. */
16369 s->size += 4;
16370 else
16371 {
16372 if (tls_type & GOT_TLS_GDESC)
16373 {
16374 /* R_ARM_TLS_DESC needs 2 GOT slots. */
16375 eh->tlsdesc_got
16376 = (htab->root.sgotplt->size
16377 - elf32_arm_compute_jump_table_size (htab));
16378 htab->root.sgotplt->size += 8;
16379 h->got.offset = (bfd_vma) -2;
16380 /* plt.got_offset needs to know there's a TLS_DESC
16381 reloc in the middle of .got.plt. */
16382 htab->num_tls_desc++;
16383 }
16384
16385 if (tls_type & GOT_TLS_GD)
16386 {
16387 /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
16388 consecutive GOT slots. If the symbol is both GD
16389 and GDESC, got.offset may have been
16390 overwritten. */
16391 h->got.offset = s->size;
16392 s->size += 8;
16393 }
16394
16395 if (tls_type & GOT_TLS_IE)
16396 /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
16397 slot. */
16398 s->size += 4;
16399 }
16400
16401 dyn = htab->root.dynamic_sections_created;
16402
16403 indx = 0;
16404 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
16405 && (!bfd_link_pic (info)
16406 || !SYMBOL_REFERENCES_LOCAL (info, h)))
16407 indx = h->dynindx;
16408
16409 if (tls_type != GOT_NORMAL
16410 && (bfd_link_dll (info) || indx != 0)
16411 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16412 || h->root.type != bfd_link_hash_undefweak))
16413 {
16414 if (tls_type & GOT_TLS_IE)
16415 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16416
16417 if (tls_type & GOT_TLS_GD)
16418 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16419
16420 if (tls_type & GOT_TLS_GDESC)
16421 {
16422 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
16423 /* GDESC needs a trampoline to jump to. */
16424 htab->tls_trampoline = -1;
16425 }
16426
16427 /* Only GD needs it. GDESC just emits one relocation per
16428 2 entries. */
16429 if ((tls_type & GOT_TLS_GD) && indx != 0)
16430 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16431 }
16432 else if (((indx != -1) || htab->fdpic_p)
16433 && !SYMBOL_REFERENCES_LOCAL (info, h))
16434 {
16435 if (htab->root.dynamic_sections_created)
16436 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
16437 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16438 }
16439 else if (h->type == STT_GNU_IFUNC
16440 && eh->plt.noncall_refcount == 0)
16441 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16442 they all resolve dynamically instead. Reserve room for the
16443 GOT entry's R_ARM_IRELATIVE relocation. */
16444 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
16445 else if (bfd_link_pic (info)
16446 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16447 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
16448 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16449 else if (htab->fdpic_p && tls_type == GOT_NORMAL)
16450 /* Reserve room for rofixup for FDPIC executable. */
16451 /* TLS relocs do not need space since they are completely
16452 resolved. */
16453 htab->srofixup->size += 4;
16454 }
16455 else
16456 h->got.offset = (bfd_vma) -1;
16457
16458 /* FDPIC support. */
16459 if (eh->fdpic_cnts.gotofffuncdesc_cnt > 0)
16460 {
16461 /* Symbol musn't be exported. */
16462 if (h->dynindx != -1)
16463 abort ();
16464
16465 /* We only allocate one function descriptor with its associated
16466 relocation. */
16467 if (eh->fdpic_cnts.funcdesc_offset == -1)
16468 {
16469 asection *s = htab->root.sgot;
16470
16471 eh->fdpic_cnts.funcdesc_offset = s->size;
16472 s->size += 8;
16473 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16474 if (bfd_link_pic (info))
16475 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16476 else
16477 htab->srofixup->size += 8;
16478 }
16479 }
16480
16481 if (eh->fdpic_cnts.gotfuncdesc_cnt > 0)
16482 {
16483 asection *s = htab->root.sgot;
16484
16485 if (htab->root.dynamic_sections_created && h->dynindx == -1
16486 && !h->forced_local)
16487 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16488 return false;
16489
16490 if (h->dynindx == -1)
16491 {
16492 /* We only allocate one function descriptor with its
16493 associated relocation. */
16494 if (eh->fdpic_cnts.funcdesc_offset == -1)
16495 {
16496
16497 eh->fdpic_cnts.funcdesc_offset = s->size;
16498 s->size += 8;
16499 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two
16500 rofixups. */
16501 if (bfd_link_pic (info))
16502 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16503 else
16504 htab->srofixup->size += 8;
16505 }
16506 }
16507
16508 /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16509 R_ARM_RELATIVE/rofixup relocation on it. */
16510 eh->fdpic_cnts.gotfuncdesc_offset = s->size;
16511 s->size += 4;
16512 if (h->dynindx == -1 && !bfd_link_pic (info))
16513 htab->srofixup->size += 4;
16514 else
16515 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16516 }
16517
16518 if (eh->fdpic_cnts.funcdesc_cnt > 0)
16519 {
16520 if (htab->root.dynamic_sections_created && h->dynindx == -1
16521 && !h->forced_local)
16522 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16523 return false;
16524
16525 if (h->dynindx == -1)
16526 {
16527 /* We only allocate one function descriptor with its
16528 associated relocation. */
16529 if (eh->fdpic_cnts.funcdesc_offset == -1)
16530 {
16531 asection *s = htab->root.sgot;
16532
16533 eh->fdpic_cnts.funcdesc_offset = s->size;
16534 s->size += 8;
16535 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two
16536 rofixups. */
16537 if (bfd_link_pic (info))
16538 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16539 else
16540 htab->srofixup->size += 8;
16541 }
16542 }
16543 if (h->dynindx == -1 && !bfd_link_pic (info))
16544 {
16545 /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */
16546 htab->srofixup->size += 4 * eh->fdpic_cnts.funcdesc_cnt;
16547 }
16548 else
16549 {
16550 /* Will need one dynamic reloc per reference. will be either
16551 R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */
16552 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot,
16553 eh->fdpic_cnts.funcdesc_cnt);
16554 }
16555 }
16556
16557 /* Allocate stubs for exported Thumb functions on v4t. */
16558 if (!htab->use_blx && h->dynindx != -1
16559 && h->def_regular
16560 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
16561 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
16562 {
16563 struct elf_link_hash_entry * th;
16564 struct bfd_link_hash_entry * bh;
16565 struct elf_link_hash_entry * myh;
16566 char name[1024];
16567 asection *s;
16568 bh = NULL;
16569 /* Create a new symbol to regist the real location of the function. */
16570 s = h->root.u.def.section;
16571 sprintf (name, "__real_%s", h->root.root.string);
16572 _bfd_generic_link_add_one_symbol (info, s->owner,
16573 name, BSF_GLOBAL, s,
16574 h->root.u.def.value,
16575 NULL, true, false, &bh);
16576
16577 myh = (struct elf_link_hash_entry *) bh;
16578 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
16579 myh->forced_local = 1;
16580 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
16581 eh->export_glue = myh;
16582 th = record_arm_to_thumb_glue (info, h);
16583 /* Point the symbol at the stub. */
16584 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
16585 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16586 h->root.u.def.section = th->root.u.def.section;
16587 h->root.u.def.value = th->root.u.def.value & ~1;
16588 }
16589
16590 if (h->dyn_relocs == NULL)
16591 return true;
16592
16593 /* In the shared -Bsymbolic case, discard space allocated for
16594 dynamic pc-relative relocs against symbols which turn out to be
16595 defined in regular objects. For the normal shared case, discard
16596 space for pc-relative relocs that have become local due to symbol
16597 visibility changes. */
16598
16599 if (bfd_link_pic (info)
16600 || htab->root.is_relocatable_executable
16601 || htab->fdpic_p)
16602 {
16603 /* Relocs that use pc_count are PC-relative forms, which will appear
16604 on something like ".long foo - ." or "movw REG, foo - .". We want
16605 calls to protected symbols to resolve directly to the function
16606 rather than going via the plt. If people want function pointer
16607 comparisons to work as expected then they should avoid writing
16608 assembly like ".long foo - .". */
16609 if (SYMBOL_CALLS_LOCAL (info, h))
16610 {
16611 struct elf_dyn_relocs **pp;
16612
16613 for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
16614 {
16615 p->count -= p->pc_count;
16616 p->pc_count = 0;
16617 if (p->count == 0)
16618 *pp = p->next;
16619 else
16620 pp = &p->next;
16621 }
16622 }
16623
16624 if (htab->root.target_os == is_vxworks)
16625 {
16626 struct elf_dyn_relocs **pp;
16627
16628 for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
16629 {
16630 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
16631 *pp = p->next;
16632 else
16633 pp = &p->next;
16634 }
16635 }
16636
16637 /* Also discard relocs on undefined weak syms with non-default
16638 visibility. */
16639 if (h->dyn_relocs != NULL
16640 && h->root.type == bfd_link_hash_undefweak)
16641 {
16642 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16643 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16644 h->dyn_relocs = NULL;
16645
16646 /* Make sure undefined weak symbols are output as a dynamic
16647 symbol in PIEs. */
16648 else if (htab->root.dynamic_sections_created && h->dynindx == -1
16649 && !h->forced_local)
16650 {
16651 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16652 return false;
16653 }
16654 }
16655
16656 else if (htab->root.is_relocatable_executable && h->dynindx == -1
16657 && h->root.type == bfd_link_hash_new)
16658 {
16659 /* Output absolute symbols so that we can create relocations
16660 against them. For normal symbols we output a relocation
16661 against the section that contains them. */
16662 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16663 return false;
16664 }
16665
16666 }
16667 else
16668 {
16669 /* For the non-shared case, discard space for relocs against
16670 symbols which turn out to need copy relocs or are not
16671 dynamic. */
16672
16673 if (!h->non_got_ref
16674 && ((h->def_dynamic
16675 && !h->def_regular)
16676 || (htab->root.dynamic_sections_created
16677 && (h->root.type == bfd_link_hash_undefweak
16678 || h->root.type == bfd_link_hash_undefined))))
16679 {
16680 /* Make sure this symbol is output as a dynamic symbol.
16681 Undefined weak syms won't yet be marked as dynamic. */
16682 if (h->dynindx == -1 && !h->forced_local
16683 && h->root.type == bfd_link_hash_undefweak)
16684 {
16685 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16686 return false;
16687 }
16688
16689 /* If that succeeded, we know we'll be keeping all the
16690 relocs. */
16691 if (h->dynindx != -1)
16692 goto keep;
16693 }
16694
16695 h->dyn_relocs = NULL;
16696
16697 keep: ;
16698 }
16699
16700 /* Finally, allocate space. */
16701 for (p = h->dyn_relocs; p != NULL; p = p->next)
16702 {
16703 asection *sreloc = elf_section_data (p->sec)->sreloc;
16704
16705 if (h->type == STT_GNU_IFUNC
16706 && eh->plt.noncall_refcount == 0
16707 && SYMBOL_REFERENCES_LOCAL (info, h))
16708 elf32_arm_allocate_irelocs (info, sreloc, p->count);
16709 else if (h->dynindx != -1
16710 && (!bfd_link_pic (info) || !info->symbolic || !h->def_regular))
16711 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16712 else if (htab->fdpic_p && !bfd_link_pic (info))
16713 htab->srofixup->size += 4 * p->count;
16714 else
16715 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16716 }
16717
16718 return true;
16719 }
16720
16721 void
16722 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
16723 int byteswap_code)
16724 {
16725 struct elf32_arm_link_hash_table *globals;
16726
16727 globals = elf32_arm_hash_table (info);
16728 if (globals == NULL)
16729 return;
16730
16731 globals->byteswap_code = byteswap_code;
16732 }
16733
16734 /* Set the sizes of the dynamic sections. */
16735
16736 static bool
16737 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
16738 struct bfd_link_info * info)
16739 {
16740 bfd * dynobj;
16741 asection * s;
16742 bool relocs;
16743 bfd *ibfd;
16744 struct elf32_arm_link_hash_table *htab;
16745
16746 htab = elf32_arm_hash_table (info);
16747 if (htab == NULL)
16748 return false;
16749
16750 dynobj = elf_hash_table (info)->dynobj;
16751 BFD_ASSERT (dynobj != NULL);
16752 check_use_blx (htab);
16753
16754 if (elf_hash_table (info)->dynamic_sections_created)
16755 {
16756 /* Set the contents of the .interp section to the interpreter. */
16757 if (bfd_link_executable (info) && !info->nointerp)
16758 {
16759 s = bfd_get_linker_section (dynobj, ".interp");
16760 BFD_ASSERT (s != NULL);
16761 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
16762 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
16763 }
16764 }
16765
16766 /* Set up .got offsets for local syms, and space for local dynamic
16767 relocs. */
16768 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16769 {
16770 bfd_signed_vma *local_got;
16771 bfd_signed_vma *end_local_got;
16772 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
16773 char *local_tls_type;
16774 bfd_vma *local_tlsdesc_gotent;
16775 bfd_size_type locsymcount;
16776 Elf_Internal_Shdr *symtab_hdr;
16777 asection *srel;
16778 unsigned int symndx;
16779 struct fdpic_local *local_fdpic_cnts;
16780
16781 if (! is_arm_elf (ibfd))
16782 continue;
16783
16784 for (s = ibfd->sections; s != NULL; s = s->next)
16785 {
16786 struct elf_dyn_relocs *p;
16787
16788 for (p = (struct elf_dyn_relocs *)
16789 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
16790 {
16791 if (!bfd_is_abs_section (p->sec)
16792 && bfd_is_abs_section (p->sec->output_section))
16793 {
16794 /* Input section has been discarded, either because
16795 it is a copy of a linkonce section or due to
16796 linker script /DISCARD/, so we'll be discarding
16797 the relocs too. */
16798 }
16799 else if (htab->root.target_os == is_vxworks
16800 && strcmp (p->sec->output_section->name,
16801 ".tls_vars") == 0)
16802 {
16803 /* Relocations in vxworks .tls_vars sections are
16804 handled specially by the loader. */
16805 }
16806 else if (p->count != 0)
16807 {
16808 srel = elf_section_data (p->sec)->sreloc;
16809 if (htab->fdpic_p && !bfd_link_pic (info))
16810 htab->srofixup->size += 4 * p->count;
16811 else
16812 elf32_arm_allocate_dynrelocs (info, srel, p->count);
16813 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
16814 info->flags |= DF_TEXTREL;
16815 }
16816 }
16817 }
16818
16819 local_got = elf_local_got_refcounts (ibfd);
16820 if (local_got == NULL)
16821 continue;
16822
16823 symtab_hdr = & elf_symtab_hdr (ibfd);
16824 locsymcount = symtab_hdr->sh_info;
16825 end_local_got = local_got + locsymcount;
16826 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
16827 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
16828 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
16829 local_fdpic_cnts = elf32_arm_local_fdpic_cnts (ibfd);
16830 symndx = 0;
16831 s = htab->root.sgot;
16832 srel = htab->root.srelgot;
16833 for (; local_got < end_local_got;
16834 ++local_got, ++local_iplt_ptr, ++local_tls_type,
16835 ++local_tlsdesc_gotent, ++symndx, ++local_fdpic_cnts)
16836 {
16837 if (symndx >= elf32_arm_num_entries (ibfd))
16838 return false;
16839
16840 *local_tlsdesc_gotent = (bfd_vma) -1;
16841 local_iplt = *local_iplt_ptr;
16842
16843 /* FDPIC support. */
16844 if (local_fdpic_cnts->gotofffuncdesc_cnt > 0)
16845 {
16846 if (local_fdpic_cnts->funcdesc_offset == -1)
16847 {
16848 local_fdpic_cnts->funcdesc_offset = s->size;
16849 s->size += 8;
16850
16851 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16852 if (bfd_link_pic (info))
16853 elf32_arm_allocate_dynrelocs (info, srel, 1);
16854 else
16855 htab->srofixup->size += 8;
16856 }
16857 }
16858
16859 if (local_fdpic_cnts->funcdesc_cnt > 0)
16860 {
16861 if (local_fdpic_cnts->funcdesc_offset == -1)
16862 {
16863 local_fdpic_cnts->funcdesc_offset = s->size;
16864 s->size += 8;
16865
16866 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16867 if (bfd_link_pic (info))
16868 elf32_arm_allocate_dynrelocs (info, srel, 1);
16869 else
16870 htab->srofixup->size += 8;
16871 }
16872
16873 /* We will add n R_ARM_RELATIVE relocations or n rofixups. */
16874 if (bfd_link_pic (info))
16875 elf32_arm_allocate_dynrelocs (info, srel, local_fdpic_cnts->funcdesc_cnt);
16876 else
16877 htab->srofixup->size += 4 * local_fdpic_cnts->funcdesc_cnt;
16878 }
16879
16880 if (local_iplt != NULL)
16881 {
16882 struct elf_dyn_relocs *p;
16883
16884 if (local_iplt->root.refcount > 0)
16885 {
16886 elf32_arm_allocate_plt_entry (info, true,
16887 &local_iplt->root,
16888 &local_iplt->arm);
16889 if (local_iplt->arm.noncall_refcount == 0)
16890 /* All references to the PLT are calls, so all
16891 non-call references can resolve directly to the
16892 run-time target. This means that the .got entry
16893 would be the same as the .igot.plt entry, so there's
16894 no point creating both. */
16895 *local_got = 0;
16896 }
16897 else
16898 {
16899 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
16900 local_iplt->root.offset = (bfd_vma) -1;
16901 }
16902
16903 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
16904 {
16905 asection *psrel;
16906
16907 psrel = elf_section_data (p->sec)->sreloc;
16908 if (local_iplt->arm.noncall_refcount == 0)
16909 elf32_arm_allocate_irelocs (info, psrel, p->count);
16910 else
16911 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
16912 }
16913 }
16914 if (*local_got > 0)
16915 {
16916 Elf_Internal_Sym *isym;
16917
16918 *local_got = s->size;
16919 if (*local_tls_type & GOT_TLS_GD)
16920 /* TLS_GD relocs need an 8-byte structure in the GOT. */
16921 s->size += 8;
16922 if (*local_tls_type & GOT_TLS_GDESC)
16923 {
16924 *local_tlsdesc_gotent = htab->root.sgotplt->size
16925 - elf32_arm_compute_jump_table_size (htab);
16926 htab->root.sgotplt->size += 8;
16927 *local_got = (bfd_vma) -2;
16928 /* plt.got_offset needs to know there's a TLS_DESC
16929 reloc in the middle of .got.plt. */
16930 htab->num_tls_desc++;
16931 }
16932 if (*local_tls_type & GOT_TLS_IE)
16933 s->size += 4;
16934
16935 if (*local_tls_type & GOT_NORMAL)
16936 {
16937 /* If the symbol is both GD and GDESC, *local_got
16938 may have been overwritten. */
16939 *local_got = s->size;
16940 s->size += 4;
16941 }
16942
16943 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, ibfd,
16944 symndx);
16945 if (isym == NULL)
16946 return false;
16947
16948 /* If all references to an STT_GNU_IFUNC PLT are calls,
16949 then all non-call references, including this GOT entry,
16950 resolve directly to the run-time target. */
16951 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
16952 && (local_iplt == NULL
16953 || local_iplt->arm.noncall_refcount == 0))
16954 elf32_arm_allocate_irelocs (info, srel, 1);
16955 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC || htab->fdpic_p)
16956 {
16957 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC)))
16958 elf32_arm_allocate_dynrelocs (info, srel, 1);
16959 else if (htab->fdpic_p && *local_tls_type & GOT_NORMAL)
16960 htab->srofixup->size += 4;
16961
16962 if ((bfd_link_pic (info) || htab->fdpic_p)
16963 && *local_tls_type & GOT_TLS_GDESC)
16964 {
16965 elf32_arm_allocate_dynrelocs (info,
16966 htab->root.srelplt, 1);
16967 htab->tls_trampoline = -1;
16968 }
16969 }
16970 }
16971 else
16972 *local_got = (bfd_vma) -1;
16973 }
16974 }
16975
16976 if (htab->tls_ldm_got.refcount > 0)
16977 {
16978 /* Allocate two GOT entries and one dynamic relocation (if necessary)
16979 for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
16980 htab->tls_ldm_got.offset = htab->root.sgot->size;
16981 htab->root.sgot->size += 8;
16982 if (bfd_link_pic (info))
16983 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16984 }
16985 else
16986 htab->tls_ldm_got.offset = -1;
16987
16988 /* At the very end of the .rofixup section is a pointer to the GOT,
16989 reserve space for it. */
16990 if (htab->fdpic_p && htab->srofixup != NULL)
16991 htab->srofixup->size += 4;
16992
16993 /* Allocate global sym .plt and .got entries, and space for global
16994 sym dynamic relocs. */
16995 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
16996
16997 /* Here we rummage through the found bfds to collect glue information. */
16998 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16999 {
17000 if (! is_arm_elf (ibfd))
17001 continue;
17002
17003 /* Initialise mapping tables for code/data. */
17004 bfd_elf32_arm_init_maps (ibfd);
17005
17006 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
17007 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
17008 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
17009 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd);
17010 }
17011
17012 /* Allocate space for the glue sections now that we've sized them. */
17013 bfd_elf32_arm_allocate_interworking_sections (info);
17014
17015 /* For every jump slot reserved in the sgotplt, reloc_count is
17016 incremented. However, when we reserve space for TLS descriptors,
17017 it's not incremented, so in order to compute the space reserved
17018 for them, it suffices to multiply the reloc count by the jump
17019 slot size. */
17020 if (htab->root.srelplt)
17021 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size (htab);
17022
17023 if (htab->tls_trampoline)
17024 {
17025 if (htab->root.splt->size == 0)
17026 htab->root.splt->size += htab->plt_header_size;
17027
17028 htab->tls_trampoline = htab->root.splt->size;
17029 htab->root.splt->size += htab->plt_entry_size;
17030
17031 /* If we're not using lazy TLS relocations, don't generate the
17032 PLT and GOT entries they require. */
17033 if ((info->flags & DF_BIND_NOW))
17034 htab->root.tlsdesc_plt = 0;
17035 else
17036 {
17037 htab->root.tlsdesc_got = htab->root.sgot->size;
17038 htab->root.sgot->size += 4;
17039
17040 htab->root.tlsdesc_plt = htab->root.splt->size;
17041 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
17042 }
17043 }
17044
17045 /* The check_relocs and adjust_dynamic_symbol entry points have
17046 determined the sizes of the various dynamic sections. Allocate
17047 memory for them. */
17048 relocs = false;
17049 for (s = dynobj->sections; s != NULL; s = s->next)
17050 {
17051 const char * name;
17052
17053 if ((s->flags & SEC_LINKER_CREATED) == 0)
17054 continue;
17055
17056 /* It's OK to base decisions on the section name, because none
17057 of the dynobj section names depend upon the input files. */
17058 name = bfd_section_name (s);
17059
17060 if (s == htab->root.splt)
17061 {
17062 /* Remember whether there is a PLT. */
17063 ;
17064 }
17065 else if (startswith (name, ".rel"))
17066 {
17067 if (s->size != 0)
17068 {
17069 /* Remember whether there are any reloc sections other
17070 than .rel(a).plt and .rela.plt.unloaded. */
17071 if (s != htab->root.srelplt && s != htab->srelplt2)
17072 relocs = true;
17073
17074 /* We use the reloc_count field as a counter if we need
17075 to copy relocs into the output file. */
17076 s->reloc_count = 0;
17077 }
17078 }
17079 else if (s != htab->root.sgot
17080 && s != htab->root.sgotplt
17081 && s != htab->root.iplt
17082 && s != htab->root.igotplt
17083 && s != htab->root.sdynbss
17084 && s != htab->root.sdynrelro
17085 && s != htab->srofixup)
17086 {
17087 /* It's not one of our sections, so don't allocate space. */
17088 continue;
17089 }
17090
17091 if (s->size == 0)
17092 {
17093 /* If we don't need this section, strip it from the
17094 output file. This is mostly to handle .rel(a).bss and
17095 .rel(a).plt. We must create both sections in
17096 create_dynamic_sections, because they must be created
17097 before the linker maps input sections to output
17098 sections. The linker does that before
17099 adjust_dynamic_symbol is called, and it is that
17100 function which decides whether anything needs to go
17101 into these sections. */
17102 s->flags |= SEC_EXCLUDE;
17103 continue;
17104 }
17105
17106 if ((s->flags & SEC_HAS_CONTENTS) == 0)
17107 continue;
17108
17109 /* Allocate memory for the section contents. */
17110 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
17111 if (s->contents == NULL)
17112 return false;
17113 }
17114
17115 return _bfd_elf_maybe_vxworks_add_dynamic_tags (output_bfd, info,
17116 relocs);
17117 }
17118
17119 /* Size sections even though they're not dynamic. We use it to setup
17120 _TLS_MODULE_BASE_, if needed. */
17121
17122 static bool
17123 elf32_arm_always_size_sections (bfd *output_bfd,
17124 struct bfd_link_info *info)
17125 {
17126 asection *tls_sec;
17127 struct elf32_arm_link_hash_table *htab;
17128
17129 htab = elf32_arm_hash_table (info);
17130
17131 if (bfd_link_relocatable (info))
17132 return true;
17133
17134 tls_sec = elf_hash_table (info)->tls_sec;
17135
17136 if (tls_sec)
17137 {
17138 struct elf_link_hash_entry *tlsbase;
17139
17140 tlsbase = elf_link_hash_lookup
17141 (elf_hash_table (info), "_TLS_MODULE_BASE_", true, true, false);
17142
17143 if (tlsbase)
17144 {
17145 struct bfd_link_hash_entry *bh = NULL;
17146 const struct elf_backend_data *bed
17147 = get_elf_backend_data (output_bfd);
17148
17149 if (!(_bfd_generic_link_add_one_symbol
17150 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
17151 tls_sec, 0, NULL, false,
17152 bed->collect, &bh)))
17153 return false;
17154
17155 tlsbase->type = STT_TLS;
17156 tlsbase = (struct elf_link_hash_entry *)bh;
17157 tlsbase->def_regular = 1;
17158 tlsbase->other = STV_HIDDEN;
17159 (*bed->elf_backend_hide_symbol) (info, tlsbase, true);
17160 }
17161 }
17162
17163 if (htab->fdpic_p && !bfd_link_relocatable (info)
17164 && !bfd_elf_stack_segment_size (output_bfd, info,
17165 "__stacksize", DEFAULT_STACK_SIZE))
17166 return false;
17167
17168 return true;
17169 }
17170
17171 /* Finish up dynamic symbol handling. We set the contents of various
17172 dynamic sections here. */
17173
17174 static bool
17175 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
17176 struct bfd_link_info * info,
17177 struct elf_link_hash_entry * h,
17178 Elf_Internal_Sym * sym)
17179 {
17180 struct elf32_arm_link_hash_table *htab;
17181 struct elf32_arm_link_hash_entry *eh;
17182
17183 htab = elf32_arm_hash_table (info);
17184 if (htab == NULL)
17185 return false;
17186
17187 eh = (struct elf32_arm_link_hash_entry *) h;
17188
17189 if (h->plt.offset != (bfd_vma) -1)
17190 {
17191 if (!eh->is_iplt)
17192 {
17193 BFD_ASSERT (h->dynindx != -1);
17194 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
17195 h->dynindx, 0))
17196 return false;
17197 }
17198
17199 if (!h->def_regular)
17200 {
17201 /* Mark the symbol as undefined, rather than as defined in
17202 the .plt section. */
17203 sym->st_shndx = SHN_UNDEF;
17204 /* If the symbol is weak we need to clear the value.
17205 Otherwise, the PLT entry would provide a definition for
17206 the symbol even if the symbol wasn't defined anywhere,
17207 and so the symbol would never be NULL. Leave the value if
17208 there were any relocations where pointer equality matters
17209 (this is a clue for the dynamic linker, to make function
17210 pointer comparisons work between an application and shared
17211 library). */
17212 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
17213 sym->st_value = 0;
17214 }
17215 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
17216 {
17217 /* At least one non-call relocation references this .iplt entry,
17218 so the .iplt entry is the function's canonical address. */
17219 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
17220 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
17221 sym->st_shndx = (_bfd_elf_section_from_bfd_section
17222 (output_bfd, htab->root.iplt->output_section));
17223 sym->st_value = (h->plt.offset
17224 + htab->root.iplt->output_section->vma
17225 + htab->root.iplt->output_offset);
17226 }
17227 }
17228
17229 if (h->needs_copy)
17230 {
17231 asection * s;
17232 Elf_Internal_Rela rel;
17233
17234 /* This symbol needs a copy reloc. Set it up. */
17235 BFD_ASSERT (h->dynindx != -1
17236 && (h->root.type == bfd_link_hash_defined
17237 || h->root.type == bfd_link_hash_defweak));
17238
17239 rel.r_addend = 0;
17240 rel.r_offset = (h->root.u.def.value
17241 + h->root.u.def.section->output_section->vma
17242 + h->root.u.def.section->output_offset);
17243 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
17244 if (h->root.u.def.section == htab->root.sdynrelro)
17245 s = htab->root.sreldynrelro;
17246 else
17247 s = htab->root.srelbss;
17248 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
17249 }
17250
17251 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
17252 and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute:
17253 it is relative to the ".got" section. */
17254 if (h == htab->root.hdynamic
17255 || (!htab->fdpic_p
17256 && htab->root.target_os != is_vxworks
17257 && h == htab->root.hgot))
17258 sym->st_shndx = SHN_ABS;
17259
17260 return true;
17261 }
17262
17263 static void
17264 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17265 void *contents,
17266 const unsigned long *template, unsigned count)
17267 {
17268 unsigned ix;
17269
17270 for (ix = 0; ix != count; ix++)
17271 {
17272 unsigned long insn = template[ix];
17273
17274 /* Emit mov pc,rx if bx is not permitted. */
17275 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
17276 insn = (insn & 0xf000000f) | 0x01a0f000;
17277 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
17278 }
17279 }
17280
17281 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
17282 other variants, NaCl needs this entry in a static executable's
17283 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
17284 zero. For .iplt really only the last bundle is useful, and .iplt
17285 could have a shorter first entry, with each individual PLT entry's
17286 relative branch calculated differently so it targets the last
17287 bundle instead of the instruction before it (labelled .Lplt_tail
17288 above). But it's simpler to keep the size and layout of PLT0
17289 consistent with the dynamic case, at the cost of some dead code at
17290 the start of .iplt and the one dead store to the stack at the start
17291 of .Lplt_tail. */
17292 static void
17293 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17294 asection *plt, bfd_vma got_displacement)
17295 {
17296 unsigned int i;
17297
17298 put_arm_insn (htab, output_bfd,
17299 elf32_arm_nacl_plt0_entry[0]
17300 | arm_movw_immediate (got_displacement),
17301 plt->contents + 0);
17302 put_arm_insn (htab, output_bfd,
17303 elf32_arm_nacl_plt0_entry[1]
17304 | arm_movt_immediate (got_displacement),
17305 plt->contents + 4);
17306
17307 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
17308 put_arm_insn (htab, output_bfd,
17309 elf32_arm_nacl_plt0_entry[i],
17310 plt->contents + (i * 4));
17311 }
17312
17313 /* Finish up the dynamic sections. */
17314
17315 static bool
17316 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
17317 {
17318 bfd * dynobj;
17319 asection * sgot;
17320 asection * sdyn;
17321 struct elf32_arm_link_hash_table *htab;
17322
17323 htab = elf32_arm_hash_table (info);
17324 if (htab == NULL)
17325 return false;
17326
17327 dynobj = elf_hash_table (info)->dynobj;
17328
17329 sgot = htab->root.sgotplt;
17330 /* A broken linker script might have discarded the dynamic sections.
17331 Catch this here so that we do not seg-fault later on. */
17332 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
17333 return false;
17334 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
17335
17336 if (elf_hash_table (info)->dynamic_sections_created)
17337 {
17338 asection *splt;
17339 Elf32_External_Dyn *dyncon, *dynconend;
17340
17341 splt = htab->root.splt;
17342 BFD_ASSERT (splt != NULL && sdyn != NULL);
17343 BFD_ASSERT (sgot != NULL);
17344
17345 dyncon = (Elf32_External_Dyn *) sdyn->contents;
17346 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
17347
17348 for (; dyncon < dynconend; dyncon++)
17349 {
17350 Elf_Internal_Dyn dyn;
17351 const char * name;
17352 asection * s;
17353
17354 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
17355
17356 switch (dyn.d_tag)
17357 {
17358 default:
17359 if (htab->root.target_os == is_vxworks
17360 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
17361 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17362 break;
17363
17364 case DT_HASH:
17365 case DT_STRTAB:
17366 case DT_SYMTAB:
17367 case DT_VERSYM:
17368 case DT_VERDEF:
17369 case DT_VERNEED:
17370 break;
17371
17372 case DT_PLTGOT:
17373 name = ".got.plt";
17374 goto get_vma;
17375 case DT_JMPREL:
17376 name = RELOC_SECTION (htab, ".plt");
17377 get_vma:
17378 s = bfd_get_linker_section (dynobj, name);
17379 if (s == NULL)
17380 {
17381 _bfd_error_handler
17382 (_("could not find section %s"), name);
17383 bfd_set_error (bfd_error_invalid_operation);
17384 return false;
17385 }
17386 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
17387 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17388 break;
17389
17390 case DT_PLTRELSZ:
17391 s = htab->root.srelplt;
17392 BFD_ASSERT (s != NULL);
17393 dyn.d_un.d_val = s->size;
17394 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17395 break;
17396
17397 case DT_RELSZ:
17398 case DT_RELASZ:
17399 case DT_REL:
17400 case DT_RELA:
17401 break;
17402
17403 case DT_TLSDESC_PLT:
17404 s = htab->root.splt;
17405 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17406 + htab->root.tlsdesc_plt);
17407 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17408 break;
17409
17410 case DT_TLSDESC_GOT:
17411 s = htab->root.sgot;
17412 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17413 + htab->root.tlsdesc_got);
17414 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17415 break;
17416
17417 /* Set the bottom bit of DT_INIT/FINI if the
17418 corresponding function is Thumb. */
17419 case DT_INIT:
17420 name = info->init_function;
17421 goto get_sym;
17422 case DT_FINI:
17423 name = info->fini_function;
17424 get_sym:
17425 /* If it wasn't set by elf_bfd_final_link
17426 then there is nothing to adjust. */
17427 if (dyn.d_un.d_val != 0)
17428 {
17429 struct elf_link_hash_entry * eh;
17430
17431 eh = elf_link_hash_lookup (elf_hash_table (info), name,
17432 false, false, true);
17433 if (eh != NULL
17434 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
17435 == ST_BRANCH_TO_THUMB)
17436 {
17437 dyn.d_un.d_val |= 1;
17438 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17439 }
17440 }
17441 break;
17442 }
17443 }
17444
17445 /* Fill in the first entry in the procedure linkage table. */
17446 if (splt->size > 0 && htab->plt_header_size)
17447 {
17448 const bfd_vma *plt0_entry;
17449 bfd_vma got_address, plt_address, got_displacement;
17450
17451 /* Calculate the addresses of the GOT and PLT. */
17452 got_address = sgot->output_section->vma + sgot->output_offset;
17453 plt_address = splt->output_section->vma + splt->output_offset;
17454
17455 if (htab->root.target_os == is_vxworks)
17456 {
17457 /* The VxWorks GOT is relocated by the dynamic linker.
17458 Therefore, we must emit relocations rather than simply
17459 computing the values now. */
17460 Elf_Internal_Rela rel;
17461
17462 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
17463 put_arm_insn (htab, output_bfd, plt0_entry[0],
17464 splt->contents + 0);
17465 put_arm_insn (htab, output_bfd, plt0_entry[1],
17466 splt->contents + 4);
17467 put_arm_insn (htab, output_bfd, plt0_entry[2],
17468 splt->contents + 8);
17469 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
17470
17471 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
17472 rel.r_offset = plt_address + 12;
17473 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17474 rel.r_addend = 0;
17475 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
17476 htab->srelplt2->contents);
17477 }
17478 else if (htab->root.target_os == is_nacl)
17479 arm_nacl_put_plt0 (htab, output_bfd, splt,
17480 got_address + 8 - (plt_address + 16));
17481 else if (using_thumb_only (htab))
17482 {
17483 got_displacement = got_address - (plt_address + 12);
17484
17485 plt0_entry = elf32_thumb2_plt0_entry;
17486 put_arm_insn (htab, output_bfd, plt0_entry[0],
17487 splt->contents + 0);
17488 put_arm_insn (htab, output_bfd, plt0_entry[1],
17489 splt->contents + 4);
17490 put_arm_insn (htab, output_bfd, plt0_entry[2],
17491 splt->contents + 8);
17492
17493 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
17494 }
17495 else
17496 {
17497 got_displacement = got_address - (plt_address + 16);
17498
17499 plt0_entry = elf32_arm_plt0_entry;
17500 put_arm_insn (htab, output_bfd, plt0_entry[0],
17501 splt->contents + 0);
17502 put_arm_insn (htab, output_bfd, plt0_entry[1],
17503 splt->contents + 4);
17504 put_arm_insn (htab, output_bfd, plt0_entry[2],
17505 splt->contents + 8);
17506 put_arm_insn (htab, output_bfd, plt0_entry[3],
17507 splt->contents + 12);
17508
17509 #ifdef FOUR_WORD_PLT
17510 /* The displacement value goes in the otherwise-unused
17511 last word of the second entry. */
17512 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
17513 #else
17514 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
17515 #endif
17516 }
17517 }
17518
17519 /* UnixWare sets the entsize of .plt to 4, although that doesn't
17520 really seem like the right value. */
17521 if (splt->output_section->owner == output_bfd)
17522 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
17523
17524 if (htab->root.tlsdesc_plt)
17525 {
17526 bfd_vma got_address
17527 = sgot->output_section->vma + sgot->output_offset;
17528 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
17529 + htab->root.sgot->output_offset);
17530 bfd_vma plt_address
17531 = splt->output_section->vma + splt->output_offset;
17532
17533 arm_put_trampoline (htab, output_bfd,
17534 splt->contents + htab->root.tlsdesc_plt,
17535 dl_tlsdesc_lazy_trampoline, 6);
17536
17537 bfd_put_32 (output_bfd,
17538 gotplt_address + htab->root.tlsdesc_got
17539 - (plt_address + htab->root.tlsdesc_plt)
17540 - dl_tlsdesc_lazy_trampoline[6],
17541 splt->contents + htab->root.tlsdesc_plt + 24);
17542 bfd_put_32 (output_bfd,
17543 got_address - (plt_address + htab->root.tlsdesc_plt)
17544 - dl_tlsdesc_lazy_trampoline[7],
17545 splt->contents + htab->root.tlsdesc_plt + 24 + 4);
17546 }
17547
17548 if (htab->tls_trampoline)
17549 {
17550 arm_put_trampoline (htab, output_bfd,
17551 splt->contents + htab->tls_trampoline,
17552 tls_trampoline, 3);
17553 #ifdef FOUR_WORD_PLT
17554 bfd_put_32 (output_bfd, 0x00000000,
17555 splt->contents + htab->tls_trampoline + 12);
17556 #endif
17557 }
17558
17559 if (htab->root.target_os == is_vxworks
17560 && !bfd_link_pic (info)
17561 && htab->root.splt->size > 0)
17562 {
17563 /* Correct the .rel(a).plt.unloaded relocations. They will have
17564 incorrect symbol indexes. */
17565 int num_plts;
17566 unsigned char *p;
17567
17568 num_plts = ((htab->root.splt->size - htab->plt_header_size)
17569 / htab->plt_entry_size);
17570 p = htab->srelplt2->contents + RELOC_SIZE (htab);
17571
17572 for (; num_plts; num_plts--)
17573 {
17574 Elf_Internal_Rela rel;
17575
17576 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17577 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17578 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17579 p += RELOC_SIZE (htab);
17580
17581 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17582 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
17583 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17584 p += RELOC_SIZE (htab);
17585 }
17586 }
17587 }
17588
17589 if (htab->root.target_os == is_nacl
17590 && htab->root.iplt != NULL
17591 && htab->root.iplt->size > 0)
17592 /* NaCl uses a special first entry in .iplt too. */
17593 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
17594
17595 /* Fill in the first three entries in the global offset table. */
17596 if (sgot)
17597 {
17598 if (sgot->size > 0)
17599 {
17600 if (sdyn == NULL)
17601 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
17602 else
17603 bfd_put_32 (output_bfd,
17604 sdyn->output_section->vma + sdyn->output_offset,
17605 sgot->contents);
17606 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
17607 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
17608 }
17609
17610 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
17611 }
17612
17613 /* At the very end of the .rofixup section is a pointer to the GOT. */
17614 if (htab->fdpic_p && htab->srofixup != NULL)
17615 {
17616 struct elf_link_hash_entry *hgot = htab->root.hgot;
17617
17618 bfd_vma got_value = hgot->root.u.def.value
17619 + hgot->root.u.def.section->output_section->vma
17620 + hgot->root.u.def.section->output_offset;
17621
17622 arm_elf_add_rofixup (output_bfd, htab->srofixup, got_value);
17623
17624 /* Make sure we allocated and generated the same number of fixups. */
17625 BFD_ASSERT (htab->srofixup->reloc_count * 4 == htab->srofixup->size);
17626 }
17627
17628 return true;
17629 }
17630
17631 static bool
17632 elf32_arm_init_file_header (bfd *abfd, struct bfd_link_info *link_info)
17633 {
17634 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
17635 struct elf32_arm_link_hash_table *globals;
17636 struct elf_segment_map *m;
17637
17638 if (!_bfd_elf_init_file_header (abfd, link_info))
17639 return false;
17640
17641 i_ehdrp = elf_elfheader (abfd);
17642
17643 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
17644 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
17645 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
17646
17647 if (link_info)
17648 {
17649 globals = elf32_arm_hash_table (link_info);
17650 if (globals != NULL && globals->byteswap_code)
17651 i_ehdrp->e_flags |= EF_ARM_BE8;
17652
17653 if (globals->fdpic_p)
17654 i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC;
17655 }
17656
17657 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
17658 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
17659 {
17660 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
17661 if (abi == AEABI_VFP_args_vfp)
17662 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
17663 else
17664 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
17665 }
17666
17667 /* Scan segment to set p_flags attribute if it contains only sections with
17668 SHF_ARM_PURECODE flag. */
17669 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
17670 {
17671 unsigned int j;
17672
17673 if (m->count == 0)
17674 continue;
17675 for (j = 0; j < m->count; j++)
17676 {
17677 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
17678 break;
17679 }
17680 if (j == m->count)
17681 {
17682 m->p_flags = PF_X;
17683 m->p_flags_valid = 1;
17684 }
17685 }
17686 return true;
17687 }
17688
17689 static enum elf_reloc_type_class
17690 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
17691 const asection *rel_sec ATTRIBUTE_UNUSED,
17692 const Elf_Internal_Rela *rela)
17693 {
17694 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
17695
17696 if (htab->root.dynsym != NULL
17697 && htab->root.dynsym->contents != NULL)
17698 {
17699 /* Check relocation against STT_GNU_IFUNC symbol if there are
17700 dynamic symbols. */
17701 bfd *abfd = info->output_bfd;
17702 const struct elf_backend_data *bed = get_elf_backend_data (abfd);
17703 unsigned long r_symndx = ELF32_R_SYM (rela->r_info);
17704 if (r_symndx != STN_UNDEF)
17705 {
17706 Elf_Internal_Sym sym;
17707 if (!bed->s->swap_symbol_in (abfd,
17708 (htab->root.dynsym->contents
17709 + r_symndx * bed->s->sizeof_sym),
17710 0, &sym))
17711 {
17712 /* xgettext:c-format */
17713 _bfd_error_handler (_("%pB symbol number %lu references"
17714 " nonexistent SHT_SYMTAB_SHNDX section"),
17715 abfd, r_symndx);
17716 /* Ideally an error class should be returned here. */
17717 }
17718 else if (ELF_ST_TYPE (sym.st_info) == STT_GNU_IFUNC)
17719 return reloc_class_ifunc;
17720 }
17721 }
17722
17723 switch ((int) ELF32_R_TYPE (rela->r_info))
17724 {
17725 case R_ARM_RELATIVE:
17726 return reloc_class_relative;
17727 case R_ARM_JUMP_SLOT:
17728 return reloc_class_plt;
17729 case R_ARM_COPY:
17730 return reloc_class_copy;
17731 case R_ARM_IRELATIVE:
17732 return reloc_class_ifunc;
17733 default:
17734 return reloc_class_normal;
17735 }
17736 }
17737
17738 static void
17739 arm_final_write_processing (bfd *abfd)
17740 {
17741 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
17742 }
17743
17744 static bool
17745 elf32_arm_final_write_processing (bfd *abfd)
17746 {
17747 arm_final_write_processing (abfd);
17748 return _bfd_elf_final_write_processing (abfd);
17749 }
17750
17751 /* Return TRUE if this is an unwinding table entry. */
17752
17753 static bool
17754 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
17755 {
17756 return (startswith (name, ELF_STRING_ARM_unwind)
17757 || startswith (name, ELF_STRING_ARM_unwind_once));
17758 }
17759
17760
17761 /* Set the type and flags for an ARM section. We do this by
17762 the section name, which is a hack, but ought to work. */
17763
17764 static bool
17765 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
17766 {
17767 const char * name;
17768
17769 name = bfd_section_name (sec);
17770
17771 if (is_arm_elf_unwind_section_name (abfd, name))
17772 {
17773 hdr->sh_type = SHT_ARM_EXIDX;
17774 hdr->sh_flags |= SHF_LINK_ORDER;
17775 }
17776
17777 if (sec->flags & SEC_ELF_PURECODE)
17778 hdr->sh_flags |= SHF_ARM_PURECODE;
17779
17780 return true;
17781 }
17782
17783 /* Handle an ARM specific section when reading an object file. This is
17784 called when bfd_section_from_shdr finds a section with an unknown
17785 type. */
17786
17787 static bool
17788 elf32_arm_section_from_shdr (bfd *abfd,
17789 Elf_Internal_Shdr * hdr,
17790 const char *name,
17791 int shindex)
17792 {
17793 /* There ought to be a place to keep ELF backend specific flags, but
17794 at the moment there isn't one. We just keep track of the
17795 sections by their name, instead. Fortunately, the ABI gives
17796 names for all the ARM specific sections, so we will probably get
17797 away with this. */
17798 switch (hdr->sh_type)
17799 {
17800 case SHT_ARM_EXIDX:
17801 case SHT_ARM_PREEMPTMAP:
17802 case SHT_ARM_ATTRIBUTES:
17803 break;
17804
17805 default:
17806 return false;
17807 }
17808
17809 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
17810 return false;
17811
17812 return true;
17813 }
17814
17815 static _arm_elf_section_data *
17816 get_arm_elf_section_data (asection * sec)
17817 {
17818 if (sec && sec->owner && is_arm_elf (sec->owner))
17819 return elf32_arm_section_data (sec);
17820 else
17821 return NULL;
17822 }
17823
17824 typedef struct
17825 {
17826 void *flaginfo;
17827 struct bfd_link_info *info;
17828 asection *sec;
17829 int sec_shndx;
17830 int (*func) (void *, const char *, Elf_Internal_Sym *,
17831 asection *, struct elf_link_hash_entry *);
17832 } output_arch_syminfo;
17833
17834 enum map_symbol_type
17835 {
17836 ARM_MAP_ARM,
17837 ARM_MAP_THUMB,
17838 ARM_MAP_DATA
17839 };
17840
17841
17842 /* Output a single mapping symbol. */
17843
17844 static bool
17845 elf32_arm_output_map_sym (output_arch_syminfo *osi,
17846 enum map_symbol_type type,
17847 bfd_vma offset)
17848 {
17849 static const char *names[3] = {"$a", "$t", "$d"};
17850 Elf_Internal_Sym sym;
17851
17852 sym.st_value = osi->sec->output_section->vma
17853 + osi->sec->output_offset
17854 + offset;
17855 sym.st_size = 0;
17856 sym.st_other = 0;
17857 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
17858 sym.st_shndx = osi->sec_shndx;
17859 sym.st_target_internal = 0;
17860 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
17861 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
17862 }
17863
17864 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
17865 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
17866
17867 static bool
17868 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
17869 bool is_iplt_entry_p,
17870 union gotplt_union *root_plt,
17871 struct arm_plt_info *arm_plt)
17872 {
17873 struct elf32_arm_link_hash_table *htab;
17874 bfd_vma addr, plt_header_size;
17875
17876 if (root_plt->offset == (bfd_vma) -1)
17877 return true;
17878
17879 htab = elf32_arm_hash_table (osi->info);
17880 if (htab == NULL)
17881 return false;
17882
17883 if (is_iplt_entry_p)
17884 {
17885 osi->sec = htab->root.iplt;
17886 plt_header_size = 0;
17887 }
17888 else
17889 {
17890 osi->sec = htab->root.splt;
17891 plt_header_size = htab->plt_header_size;
17892 }
17893 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
17894 (osi->info->output_bfd, osi->sec->output_section));
17895
17896 addr = root_plt->offset & -2;
17897 if (htab->root.target_os == is_vxworks)
17898 {
17899 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17900 return false;
17901 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
17902 return false;
17903 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
17904 return false;
17905 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
17906 return false;
17907 }
17908 else if (htab->root.target_os == is_nacl)
17909 {
17910 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17911 return false;
17912 }
17913 else if (htab->fdpic_p)
17914 {
17915 enum map_symbol_type type = using_thumb_only (htab)
17916 ? ARM_MAP_THUMB
17917 : ARM_MAP_ARM;
17918
17919 if (elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt))
17920 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17921 return false;
17922 if (!elf32_arm_output_map_sym (osi, type, addr))
17923 return false;
17924 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 16))
17925 return false;
17926 if (htab->plt_entry_size == 4 * ARRAY_SIZE (elf32_arm_fdpic_plt_entry))
17927 if (!elf32_arm_output_map_sym (osi, type, addr + 24))
17928 return false;
17929 }
17930 else if (using_thumb_only (htab))
17931 {
17932 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
17933 return false;
17934 }
17935 else
17936 {
17937 bool thumb_stub_p;
17938
17939 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
17940 if (thumb_stub_p)
17941 {
17942 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17943 return false;
17944 }
17945 #ifdef FOUR_WORD_PLT
17946 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17947 return false;
17948 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17949 return false;
17950 #else
17951 /* A three-word PLT with no Thumb thunk contains only Arm code,
17952 so only need to output a mapping symbol for the first PLT entry and
17953 entries with thumb thunks. */
17954 if (thumb_stub_p || addr == plt_header_size)
17955 {
17956 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17957 return false;
17958 }
17959 #endif
17960 }
17961
17962 return true;
17963 }
17964
17965 /* Output mapping symbols for PLT entries associated with H. */
17966
17967 static bool
17968 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
17969 {
17970 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
17971 struct elf32_arm_link_hash_entry *eh;
17972
17973 if (h->root.type == bfd_link_hash_indirect)
17974 return true;
17975
17976 if (h->root.type == bfd_link_hash_warning)
17977 /* When warning symbols are created, they **replace** the "real"
17978 entry in the hash table, thus we never get to see the real
17979 symbol in a hash traversal. So look at it now. */
17980 h = (struct elf_link_hash_entry *) h->root.u.i.link;
17981
17982 eh = (struct elf32_arm_link_hash_entry *) h;
17983 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
17984 &h->plt, &eh->plt);
17985 }
17986
17987 /* Bind a veneered symbol to its veneer identified by its hash entry
17988 STUB_ENTRY. The veneered location thus loose its symbol. */
17989
17990 static void
17991 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
17992 {
17993 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
17994
17995 BFD_ASSERT (hash);
17996 hash->root.root.u.def.section = stub_entry->stub_sec;
17997 hash->root.root.u.def.value = stub_entry->stub_offset;
17998 hash->root.size = stub_entry->stub_size;
17999 }
18000
18001 /* Output a single local symbol for a generated stub. */
18002
18003 static bool
18004 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
18005 bfd_vma offset, bfd_vma size)
18006 {
18007 Elf_Internal_Sym sym;
18008
18009 sym.st_value = osi->sec->output_section->vma
18010 + osi->sec->output_offset
18011 + offset;
18012 sym.st_size = size;
18013 sym.st_other = 0;
18014 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
18015 sym.st_shndx = osi->sec_shndx;
18016 sym.st_target_internal = 0;
18017 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
18018 }
18019
18020 static bool
18021 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
18022 void * in_arg)
18023 {
18024 struct elf32_arm_stub_hash_entry *stub_entry;
18025 asection *stub_sec;
18026 bfd_vma addr;
18027 char *stub_name;
18028 output_arch_syminfo *osi;
18029 const insn_sequence *template_sequence;
18030 enum stub_insn_type prev_type;
18031 int size;
18032 int i;
18033 enum map_symbol_type sym_type;
18034
18035 /* Massage our args to the form they really have. */
18036 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18037 osi = (output_arch_syminfo *) in_arg;
18038
18039 stub_sec = stub_entry->stub_sec;
18040
18041 /* Ensure this stub is attached to the current section being
18042 processed. */
18043 if (stub_sec != osi->sec)
18044 return true;
18045
18046 addr = (bfd_vma) stub_entry->stub_offset;
18047 template_sequence = stub_entry->stub_template;
18048
18049 if (arm_stub_sym_claimed (stub_entry->stub_type))
18050 arm_stub_claim_sym (stub_entry);
18051 else
18052 {
18053 stub_name = stub_entry->output_name;
18054 switch (template_sequence[0].type)
18055 {
18056 case ARM_TYPE:
18057 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
18058 stub_entry->stub_size))
18059 return false;
18060 break;
18061 case THUMB16_TYPE:
18062 case THUMB32_TYPE:
18063 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
18064 stub_entry->stub_size))
18065 return false;
18066 break;
18067 default:
18068 BFD_FAIL ();
18069 return 0;
18070 }
18071 }
18072
18073 prev_type = DATA_TYPE;
18074 size = 0;
18075 for (i = 0; i < stub_entry->stub_template_size; i++)
18076 {
18077 switch (template_sequence[i].type)
18078 {
18079 case ARM_TYPE:
18080 sym_type = ARM_MAP_ARM;
18081 break;
18082
18083 case THUMB16_TYPE:
18084 case THUMB32_TYPE:
18085 sym_type = ARM_MAP_THUMB;
18086 break;
18087
18088 case DATA_TYPE:
18089 sym_type = ARM_MAP_DATA;
18090 break;
18091
18092 default:
18093 BFD_FAIL ();
18094 return false;
18095 }
18096
18097 if (template_sequence[i].type != prev_type)
18098 {
18099 prev_type = template_sequence[i].type;
18100 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
18101 return false;
18102 }
18103
18104 switch (template_sequence[i].type)
18105 {
18106 case ARM_TYPE:
18107 case THUMB32_TYPE:
18108 size += 4;
18109 break;
18110
18111 case THUMB16_TYPE:
18112 size += 2;
18113 break;
18114
18115 case DATA_TYPE:
18116 size += 4;
18117 break;
18118
18119 default:
18120 BFD_FAIL ();
18121 return false;
18122 }
18123 }
18124
18125 return true;
18126 }
18127
18128 /* Output mapping symbols for linker generated sections,
18129 and for those data-only sections that do not have a
18130 $d. */
18131
18132 static bool
18133 elf32_arm_output_arch_local_syms (bfd *output_bfd,
18134 struct bfd_link_info *info,
18135 void *flaginfo,
18136 int (*func) (void *, const char *,
18137 Elf_Internal_Sym *,
18138 asection *,
18139 struct elf_link_hash_entry *))
18140 {
18141 output_arch_syminfo osi;
18142 struct elf32_arm_link_hash_table *htab;
18143 bfd_vma offset;
18144 bfd_size_type size;
18145 bfd *input_bfd;
18146
18147 if (info->strip == strip_all
18148 && !info->emitrelocations
18149 && !bfd_link_relocatable (info))
18150 return true;
18151
18152 htab = elf32_arm_hash_table (info);
18153 if (htab == NULL)
18154 return false;
18155
18156 check_use_blx (htab);
18157
18158 osi.flaginfo = flaginfo;
18159 osi.info = info;
18160 osi.func = func;
18161
18162 /* Add a $d mapping symbol to data-only sections that
18163 don't have any mapping symbol. This may result in (harmless) redundant
18164 mapping symbols. */
18165 for (input_bfd = info->input_bfds;
18166 input_bfd != NULL;
18167 input_bfd = input_bfd->link.next)
18168 {
18169 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
18170 for (osi.sec = input_bfd->sections;
18171 osi.sec != NULL;
18172 osi.sec = osi.sec->next)
18173 {
18174 if (osi.sec->output_section != NULL
18175 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
18176 != 0)
18177 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
18178 == SEC_HAS_CONTENTS
18179 && get_arm_elf_section_data (osi.sec) != NULL
18180 && get_arm_elf_section_data (osi.sec)->mapcount == 0
18181 && osi.sec->size > 0
18182 && (osi.sec->flags & SEC_EXCLUDE) == 0)
18183 {
18184 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18185 (output_bfd, osi.sec->output_section);
18186 if (osi.sec_shndx != (int)SHN_BAD)
18187 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
18188 }
18189 }
18190 }
18191
18192 /* ARM->Thumb glue. */
18193 if (htab->arm_glue_size > 0)
18194 {
18195 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18196 ARM2THUMB_GLUE_SECTION_NAME);
18197
18198 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18199 (output_bfd, osi.sec->output_section);
18200 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
18201 || htab->pic_veneer)
18202 size = ARM2THUMB_PIC_GLUE_SIZE;
18203 else if (htab->use_blx)
18204 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
18205 else
18206 size = ARM2THUMB_STATIC_GLUE_SIZE;
18207
18208 for (offset = 0; offset < htab->arm_glue_size; offset += size)
18209 {
18210 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
18211 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
18212 }
18213 }
18214
18215 /* Thumb->ARM glue. */
18216 if (htab->thumb_glue_size > 0)
18217 {
18218 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18219 THUMB2ARM_GLUE_SECTION_NAME);
18220
18221 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18222 (output_bfd, osi.sec->output_section);
18223 size = THUMB2ARM_GLUE_SIZE;
18224
18225 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
18226 {
18227 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
18228 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
18229 }
18230 }
18231
18232 /* ARMv4 BX veneers. */
18233 if (htab->bx_glue_size > 0)
18234 {
18235 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18236 ARM_BX_GLUE_SECTION_NAME);
18237
18238 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18239 (output_bfd, osi.sec->output_section);
18240
18241 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
18242 }
18243
18244 /* Long calls stubs. */
18245 if (htab->stub_bfd && htab->stub_bfd->sections)
18246 {
18247 asection* stub_sec;
18248
18249 for (stub_sec = htab->stub_bfd->sections;
18250 stub_sec != NULL;
18251 stub_sec = stub_sec->next)
18252 {
18253 /* Ignore non-stub sections. */
18254 if (!strstr (stub_sec->name, STUB_SUFFIX))
18255 continue;
18256
18257 osi.sec = stub_sec;
18258
18259 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18260 (output_bfd, osi.sec->output_section);
18261
18262 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
18263 }
18264 }
18265
18266 /* Finally, output mapping symbols for the PLT. */
18267 if (htab->root.splt && htab->root.splt->size > 0)
18268 {
18269 osi.sec = htab->root.splt;
18270 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18271 (output_bfd, osi.sec->output_section));
18272
18273 /* Output mapping symbols for the plt header. */
18274 if (htab->root.target_os == is_vxworks)
18275 {
18276 /* VxWorks shared libraries have no PLT header. */
18277 if (!bfd_link_pic (info))
18278 {
18279 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18280 return false;
18281 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18282 return false;
18283 }
18284 }
18285 else if (htab->root.target_os == is_nacl)
18286 {
18287 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18288 return false;
18289 }
18290 else if (using_thumb_only (htab) && !htab->fdpic_p)
18291 {
18292 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
18293 return false;
18294 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18295 return false;
18296 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
18297 return false;
18298 }
18299 else if (!htab->fdpic_p)
18300 {
18301 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18302 return false;
18303 #ifndef FOUR_WORD_PLT
18304 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
18305 return false;
18306 #endif
18307 }
18308 }
18309 if (htab->root.target_os == is_nacl
18310 && htab->root.iplt
18311 && htab->root.iplt->size > 0)
18312 {
18313 /* NaCl uses a special first entry in .iplt too. */
18314 osi.sec = htab->root.iplt;
18315 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18316 (output_bfd, osi.sec->output_section));
18317 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18318 return false;
18319 }
18320 if ((htab->root.splt && htab->root.splt->size > 0)
18321 || (htab->root.iplt && htab->root.iplt->size > 0))
18322 {
18323 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
18324 for (input_bfd = info->input_bfds;
18325 input_bfd != NULL;
18326 input_bfd = input_bfd->link.next)
18327 {
18328 struct arm_local_iplt_info **local_iplt;
18329 unsigned int i, num_syms;
18330
18331 local_iplt = elf32_arm_local_iplt (input_bfd);
18332 if (local_iplt != NULL)
18333 {
18334 num_syms = elf_symtab_hdr (input_bfd).sh_info;
18335 if (num_syms > elf32_arm_num_entries (input_bfd))
18336 {
18337 _bfd_error_handler (_("\
18338 %pB: Number of symbols in input file has increased from %lu to %u\n"),
18339 input_bfd,
18340 (unsigned long) elf32_arm_num_entries (input_bfd),
18341 num_syms);
18342 return false;
18343 }
18344 for (i = 0; i < num_syms; i++)
18345 if (local_iplt[i] != NULL
18346 && !elf32_arm_output_plt_map_1 (&osi, true,
18347 &local_iplt[i]->root,
18348 &local_iplt[i]->arm))
18349 return false;
18350 }
18351 }
18352 }
18353 if (htab->root.tlsdesc_plt != 0)
18354 {
18355 /* Mapping symbols for the lazy tls trampoline. */
18356 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM,
18357 htab->root.tlsdesc_plt))
18358 return false;
18359
18360 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18361 htab->root.tlsdesc_plt + 24))
18362 return false;
18363 }
18364 if (htab->tls_trampoline != 0)
18365 {
18366 /* Mapping symbols for the tls trampoline. */
18367 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
18368 return false;
18369 #ifdef FOUR_WORD_PLT
18370 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18371 htab->tls_trampoline + 12))
18372 return false;
18373 #endif
18374 }
18375
18376 return true;
18377 }
18378
18379 /* Filter normal symbols of CMSE entry functions of ABFD to include in
18380 the import library. All SYMCOUNT symbols of ABFD can be examined
18381 from their pointers in SYMS. Pointers of symbols to keep should be
18382 stored continuously at the beginning of that array.
18383
18384 Returns the number of symbols to keep. */
18385
18386 static unsigned int
18387 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18388 struct bfd_link_info *info,
18389 asymbol **syms, long symcount)
18390 {
18391 size_t maxnamelen;
18392 char *cmse_name;
18393 long src_count, dst_count = 0;
18394 struct elf32_arm_link_hash_table *htab;
18395
18396 htab = elf32_arm_hash_table (info);
18397 if (!htab->stub_bfd || !htab->stub_bfd->sections)
18398 symcount = 0;
18399
18400 maxnamelen = 128;
18401 cmse_name = (char *) bfd_malloc (maxnamelen);
18402 BFD_ASSERT (cmse_name);
18403
18404 for (src_count = 0; src_count < symcount; src_count++)
18405 {
18406 struct elf32_arm_link_hash_entry *cmse_hash;
18407 asymbol *sym;
18408 flagword flags;
18409 char *name;
18410 size_t namelen;
18411
18412 sym = syms[src_count];
18413 flags = sym->flags;
18414 name = (char *) bfd_asymbol_name (sym);
18415
18416 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
18417 continue;
18418 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
18419 continue;
18420
18421 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
18422 if (namelen > maxnamelen)
18423 {
18424 cmse_name = (char *)
18425 bfd_realloc (cmse_name, namelen);
18426 maxnamelen = namelen;
18427 }
18428 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
18429 cmse_hash = (struct elf32_arm_link_hash_entry *)
18430 elf_link_hash_lookup (&(htab)->root, cmse_name, false, false, true);
18431
18432 if (!cmse_hash
18433 || (cmse_hash->root.root.type != bfd_link_hash_defined
18434 && cmse_hash->root.root.type != bfd_link_hash_defweak)
18435 || cmse_hash->root.type != STT_FUNC)
18436 continue;
18437
18438 syms[dst_count++] = sym;
18439 }
18440 free (cmse_name);
18441
18442 syms[dst_count] = NULL;
18443
18444 return dst_count;
18445 }
18446
18447 /* Filter symbols of ABFD to include in the import library. All
18448 SYMCOUNT symbols of ABFD can be examined from their pointers in
18449 SYMS. Pointers of symbols to keep should be stored continuously at
18450 the beginning of that array.
18451
18452 Returns the number of symbols to keep. */
18453
18454 static unsigned int
18455 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18456 struct bfd_link_info *info,
18457 asymbol **syms, long symcount)
18458 {
18459 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
18460
18461 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18462 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18463 library to be a relocatable object file. */
18464 BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
18465 if (globals->cmse_implib)
18466 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
18467 else
18468 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
18469 }
18470
18471 /* Allocate target specific section data. */
18472
18473 static bool
18474 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
18475 {
18476 if (!sec->used_by_bfd)
18477 {
18478 _arm_elf_section_data *sdata;
18479 size_t amt = sizeof (*sdata);
18480
18481 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
18482 if (sdata == NULL)
18483 return false;
18484 sec->used_by_bfd = sdata;
18485 }
18486
18487 return _bfd_elf_new_section_hook (abfd, sec);
18488 }
18489
18490
18491 /* Used to order a list of mapping symbols by address. */
18492
18493 static int
18494 elf32_arm_compare_mapping (const void * a, const void * b)
18495 {
18496 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
18497 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
18498
18499 if (amap->vma > bmap->vma)
18500 return 1;
18501 else if (amap->vma < bmap->vma)
18502 return -1;
18503 else if (amap->type > bmap->type)
18504 /* Ensure results do not depend on the host qsort for objects with
18505 multiple mapping symbols at the same address by sorting on type
18506 after vma. */
18507 return 1;
18508 else if (amap->type < bmap->type)
18509 return -1;
18510 else
18511 return 0;
18512 }
18513
18514 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
18515
18516 static unsigned long
18517 offset_prel31 (unsigned long addr, bfd_vma offset)
18518 {
18519 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
18520 }
18521
18522 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18523 relocations. */
18524
18525 static void
18526 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
18527 {
18528 unsigned long first_word = bfd_get_32 (output_bfd, from);
18529 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
18530
18531 /* High bit of first word is supposed to be zero. */
18532 if ((first_word & 0x80000000ul) == 0)
18533 first_word = offset_prel31 (first_word, offset);
18534
18535 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18536 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
18537 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
18538 second_word = offset_prel31 (second_word, offset);
18539
18540 bfd_put_32 (output_bfd, first_word, to);
18541 bfd_put_32 (output_bfd, second_word, to + 4);
18542 }
18543
18544 /* Data for make_branch_to_a8_stub(). */
18545
18546 struct a8_branch_to_stub_data
18547 {
18548 asection *writing_section;
18549 bfd_byte *contents;
18550 };
18551
18552
18553 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
18554 places for a particular section. */
18555
18556 static bool
18557 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
18558 void *in_arg)
18559 {
18560 struct elf32_arm_stub_hash_entry *stub_entry;
18561 struct a8_branch_to_stub_data *data;
18562 bfd_byte *contents;
18563 unsigned long branch_insn;
18564 bfd_vma veneered_insn_loc, veneer_entry_loc;
18565 bfd_signed_vma branch_offset;
18566 bfd *abfd;
18567 unsigned int loc;
18568
18569 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18570 data = (struct a8_branch_to_stub_data *) in_arg;
18571
18572 if (stub_entry->target_section != data->writing_section
18573 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
18574 return true;
18575
18576 contents = data->contents;
18577
18578 /* We use target_section as Cortex-A8 erratum workaround stubs are only
18579 generated when both source and target are in the same section. */
18580 veneered_insn_loc = stub_entry->target_section->output_section->vma
18581 + stub_entry->target_section->output_offset
18582 + stub_entry->source_value;
18583
18584 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
18585 + stub_entry->stub_sec->output_offset
18586 + stub_entry->stub_offset;
18587
18588 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
18589 veneered_insn_loc &= ~3u;
18590
18591 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
18592
18593 abfd = stub_entry->target_section->owner;
18594 loc = stub_entry->source_value;
18595
18596 /* We attempt to avoid this condition by setting stubs_always_after_branch
18597 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18598 This check is just to be on the safe side... */
18599 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
18600 {
18601 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18602 "allocated in unsafe location"), abfd);
18603 return false;
18604 }
18605
18606 switch (stub_entry->stub_type)
18607 {
18608 case arm_stub_a8_veneer_b:
18609 case arm_stub_a8_veneer_b_cond:
18610 branch_insn = 0xf0009000;
18611 goto jump24;
18612
18613 case arm_stub_a8_veneer_blx:
18614 branch_insn = 0xf000e800;
18615 goto jump24;
18616
18617 case arm_stub_a8_veneer_bl:
18618 {
18619 unsigned int i1, j1, i2, j2, s;
18620
18621 branch_insn = 0xf000d000;
18622
18623 jump24:
18624 if (branch_offset < -16777216 || branch_offset > 16777214)
18625 {
18626 /* There's not much we can do apart from complain if this
18627 happens. */
18628 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18629 "of range (input file too large)"), abfd);
18630 return false;
18631 }
18632
18633 /* i1 = not(j1 eor s), so:
18634 not i1 = j1 eor s
18635 j1 = (not i1) eor s. */
18636
18637 branch_insn |= (branch_offset >> 1) & 0x7ff;
18638 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
18639 i2 = (branch_offset >> 22) & 1;
18640 i1 = (branch_offset >> 23) & 1;
18641 s = (branch_offset >> 24) & 1;
18642 j1 = (!i1) ^ s;
18643 j2 = (!i2) ^ s;
18644 branch_insn |= j2 << 11;
18645 branch_insn |= j1 << 13;
18646 branch_insn |= s << 26;
18647 }
18648 break;
18649
18650 default:
18651 BFD_FAIL ();
18652 return false;
18653 }
18654
18655 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
18656 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
18657
18658 return true;
18659 }
18660
18661 /* Beginning of stm32l4xx work-around. */
18662
18663 /* Functions encoding instructions necessary for the emission of the
18664 fix-stm32l4xx-629360.
18665 Encoding is extracted from the
18666 ARM (C) Architecture Reference Manual
18667 ARMv7-A and ARMv7-R edition
18668 ARM DDI 0406C.b (ID072512). */
18669
18670 static inline bfd_vma
18671 create_instruction_branch_absolute (int branch_offset)
18672 {
18673 /* A8.8.18 B (A8-334)
18674 B target_address (Encoding T4). */
18675 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
18676 /* jump offset is: S:I1:I2:imm10:imm11:0. */
18677 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
18678
18679 int s = ((branch_offset & 0x1000000) >> 24);
18680 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
18681 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
18682
18683 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
18684 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
18685
18686 bfd_vma patched_inst = 0xf0009000
18687 | s << 26 /* S. */
18688 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
18689 | j1 << 13 /* J1. */
18690 | j2 << 11 /* J2. */
18691 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
18692
18693 return patched_inst;
18694 }
18695
18696 static inline bfd_vma
18697 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
18698 {
18699 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18700 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
18701 bfd_vma patched_inst = 0xe8900000
18702 | (/*W=*/wback << 21)
18703 | (base_reg << 16)
18704 | (reg_mask & 0x0000ffff);
18705
18706 return patched_inst;
18707 }
18708
18709 static inline bfd_vma
18710 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
18711 {
18712 /* A8.8.60 LDMDB/LDMEA (A8-402)
18713 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
18714 bfd_vma patched_inst = 0xe9100000
18715 | (/*W=*/wback << 21)
18716 | (base_reg << 16)
18717 | (reg_mask & 0x0000ffff);
18718
18719 return patched_inst;
18720 }
18721
18722 static inline bfd_vma
18723 create_instruction_mov (int target_reg, int source_reg)
18724 {
18725 /* A8.8.103 MOV (register) (A8-486)
18726 MOV Rd, Rm (Encoding T1). */
18727 bfd_vma patched_inst = 0x4600
18728 | (target_reg & 0x7)
18729 | ((target_reg & 0x8) >> 3) << 7
18730 | (source_reg << 3);
18731
18732 return patched_inst;
18733 }
18734
18735 static inline bfd_vma
18736 create_instruction_sub (int target_reg, int source_reg, int value)
18737 {
18738 /* A8.8.221 SUB (immediate) (A8-708)
18739 SUB Rd, Rn, #value (Encoding T3). */
18740 bfd_vma patched_inst = 0xf1a00000
18741 | (target_reg << 8)
18742 | (source_reg << 16)
18743 | (/*S=*/0 << 20)
18744 | ((value & 0x800) >> 11) << 26
18745 | ((value & 0x700) >> 8) << 12
18746 | (value & 0x0ff);
18747
18748 return patched_inst;
18749 }
18750
18751 static inline bfd_vma
18752 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
18753 int first_reg)
18754 {
18755 /* A8.8.332 VLDM (A8-922)
18756 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
18757 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
18758 | (/*W=*/wback << 21)
18759 | (base_reg << 16)
18760 | (num_words & 0x000000ff)
18761 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
18762 | (first_reg & 0x00000001) << 22;
18763
18764 return patched_inst;
18765 }
18766
18767 static inline bfd_vma
18768 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
18769 int first_reg)
18770 {
18771 /* A8.8.332 VLDM (A8-922)
18772 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
18773 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
18774 | (base_reg << 16)
18775 | (num_words & 0x000000ff)
18776 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
18777 | (first_reg & 0x00000001) << 22;
18778
18779 return patched_inst;
18780 }
18781
18782 static inline bfd_vma
18783 create_instruction_udf_w (int value)
18784 {
18785 /* A8.8.247 UDF (A8-758)
18786 Undefined (Encoding T2). */
18787 bfd_vma patched_inst = 0xf7f0a000
18788 | (value & 0x00000fff)
18789 | (value & 0x000f0000) << 16;
18790
18791 return patched_inst;
18792 }
18793
18794 static inline bfd_vma
18795 create_instruction_udf (int value)
18796 {
18797 /* A8.8.247 UDF (A8-758)
18798 Undefined (Encoding T1). */
18799 bfd_vma patched_inst = 0xde00
18800 | (value & 0xff);
18801
18802 return patched_inst;
18803 }
18804
18805 /* Functions writing an instruction in memory, returning the next
18806 memory position to write to. */
18807
18808 static inline bfd_byte *
18809 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
18810 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18811 {
18812 put_thumb2_insn (htab, output_bfd, insn, pt);
18813 return pt + 4;
18814 }
18815
18816 static inline bfd_byte *
18817 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
18818 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18819 {
18820 put_thumb_insn (htab, output_bfd, insn, pt);
18821 return pt + 2;
18822 }
18823
18824 /* Function filling up a region in memory with T1 and T2 UDFs taking
18825 care of alignment. */
18826
18827 static bfd_byte *
18828 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
18829 bfd * output_bfd,
18830 const bfd_byte * const base_stub_contents,
18831 bfd_byte * const from_stub_contents,
18832 const bfd_byte * const end_stub_contents)
18833 {
18834 bfd_byte *current_stub_contents = from_stub_contents;
18835
18836 /* Fill the remaining of the stub with deterministic contents : UDF
18837 instructions.
18838 Check if realignment is needed on modulo 4 frontier using T1, to
18839 further use T2. */
18840 if ((current_stub_contents < end_stub_contents)
18841 && !((current_stub_contents - base_stub_contents) % 2)
18842 && ((current_stub_contents - base_stub_contents) % 4))
18843 current_stub_contents =
18844 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18845 create_instruction_udf (0));
18846
18847 for (; current_stub_contents < end_stub_contents;)
18848 current_stub_contents =
18849 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18850 create_instruction_udf_w (0));
18851
18852 return current_stub_contents;
18853 }
18854
18855 /* Functions writing the stream of instructions equivalent to the
18856 derived sequence for ldmia, ldmdb, vldm respectively. */
18857
18858 static void
18859 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
18860 bfd * output_bfd,
18861 const insn32 initial_insn,
18862 const bfd_byte *const initial_insn_addr,
18863 bfd_byte *const base_stub_contents)
18864 {
18865 int wback = (initial_insn & 0x00200000) >> 21;
18866 int ri, rn = (initial_insn & 0x000F0000) >> 16;
18867 int insn_all_registers = initial_insn & 0x0000ffff;
18868 int insn_low_registers, insn_high_registers;
18869 int usable_register_mask;
18870 int nb_registers = elf32_arm_popcount (insn_all_registers);
18871 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18872 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18873 bfd_byte *current_stub_contents = base_stub_contents;
18874
18875 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
18876
18877 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18878 smaller than 8 registers load sequences that do not cause the
18879 hardware issue. */
18880 if (nb_registers <= 8)
18881 {
18882 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18883 current_stub_contents =
18884 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18885 initial_insn);
18886
18887 /* B initial_insn_addr+4. */
18888 if (!restore_pc)
18889 current_stub_contents =
18890 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18891 create_instruction_branch_absolute
18892 (initial_insn_addr - current_stub_contents));
18893
18894 /* Fill the remaining of the stub with deterministic contents. */
18895 current_stub_contents =
18896 stm32l4xx_fill_stub_udf (htab, output_bfd,
18897 base_stub_contents, current_stub_contents,
18898 base_stub_contents +
18899 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18900
18901 return;
18902 }
18903
18904 /* - reg_list[13] == 0. */
18905 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
18906
18907 /* - reg_list[14] & reg_list[15] != 1. */
18908 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18909
18910 /* - if (wback==1) reg_list[rn] == 0. */
18911 BFD_ASSERT (!wback || !restore_rn);
18912
18913 /* - nb_registers > 8. */
18914 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18915
18916 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18917
18918 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
18919 - One with the 7 lowest registers (register mask 0x007F)
18920 This LDM will finally contain between 2 and 7 registers
18921 - One with the 7 highest registers (register mask 0xDF80)
18922 This ldm will finally contain between 2 and 7 registers. */
18923 insn_low_registers = insn_all_registers & 0x007F;
18924 insn_high_registers = insn_all_registers & 0xDF80;
18925
18926 /* A spare register may be needed during this veneer to temporarily
18927 handle the base register. This register will be restored with the
18928 last LDM operation.
18929 The usable register may be any general purpose register (that
18930 excludes PC, SP, LR : register mask is 0x1FFF). */
18931 usable_register_mask = 0x1FFF;
18932
18933 /* Generate the stub function. */
18934 if (wback)
18935 {
18936 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
18937 current_stub_contents =
18938 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18939 create_instruction_ldmia
18940 (rn, /*wback=*/1, insn_low_registers));
18941
18942 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
18943 current_stub_contents =
18944 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18945 create_instruction_ldmia
18946 (rn, /*wback=*/1, insn_high_registers));
18947 if (!restore_pc)
18948 {
18949 /* B initial_insn_addr+4. */
18950 current_stub_contents =
18951 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18952 create_instruction_branch_absolute
18953 (initial_insn_addr - current_stub_contents));
18954 }
18955 }
18956 else /* if (!wback). */
18957 {
18958 ri = rn;
18959
18960 /* If Rn is not part of the high-register-list, move it there. */
18961 if (!(insn_high_registers & (1 << rn)))
18962 {
18963 /* Choose a Ri in the high-register-list that will be restored. */
18964 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18965
18966 /* MOV Ri, Rn. */
18967 current_stub_contents =
18968 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18969 create_instruction_mov (ri, rn));
18970 }
18971
18972 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18973 current_stub_contents =
18974 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18975 create_instruction_ldmia
18976 (ri, /*wback=*/1, insn_low_registers));
18977
18978 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
18979 current_stub_contents =
18980 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18981 create_instruction_ldmia
18982 (ri, /*wback=*/0, insn_high_registers));
18983
18984 if (!restore_pc)
18985 {
18986 /* B initial_insn_addr+4. */
18987 current_stub_contents =
18988 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18989 create_instruction_branch_absolute
18990 (initial_insn_addr - current_stub_contents));
18991 }
18992 }
18993
18994 /* Fill the remaining of the stub with deterministic contents. */
18995 current_stub_contents =
18996 stm32l4xx_fill_stub_udf (htab, output_bfd,
18997 base_stub_contents, current_stub_contents,
18998 base_stub_contents +
18999 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19000 }
19001
19002 static void
19003 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
19004 bfd * output_bfd,
19005 const insn32 initial_insn,
19006 const bfd_byte *const initial_insn_addr,
19007 bfd_byte *const base_stub_contents)
19008 {
19009 int wback = (initial_insn & 0x00200000) >> 21;
19010 int ri, rn = (initial_insn & 0x000f0000) >> 16;
19011 int insn_all_registers = initial_insn & 0x0000ffff;
19012 int insn_low_registers, insn_high_registers;
19013 int usable_register_mask;
19014 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
19015 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
19016 int nb_registers = elf32_arm_popcount (insn_all_registers);
19017 bfd_byte *current_stub_contents = base_stub_contents;
19018
19019 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
19020
19021 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19022 smaller than 8 registers load sequences that do not cause the
19023 hardware issue. */
19024 if (nb_registers <= 8)
19025 {
19026 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
19027 current_stub_contents =
19028 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19029 initial_insn);
19030
19031 /* B initial_insn_addr+4. */
19032 current_stub_contents =
19033 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19034 create_instruction_branch_absolute
19035 (initial_insn_addr - current_stub_contents));
19036
19037 /* Fill the remaining of the stub with deterministic contents. */
19038 current_stub_contents =
19039 stm32l4xx_fill_stub_udf (htab, output_bfd,
19040 base_stub_contents, current_stub_contents,
19041 base_stub_contents +
19042 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19043
19044 return;
19045 }
19046
19047 /* - reg_list[13] == 0. */
19048 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
19049
19050 /* - reg_list[14] & reg_list[15] != 1. */
19051 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
19052
19053 /* - if (wback==1) reg_list[rn] == 0. */
19054 BFD_ASSERT (!wback || !restore_rn);
19055
19056 /* - nb_registers > 8. */
19057 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
19058
19059 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
19060
19061 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
19062 - One with the 7 lowest registers (register mask 0x007F)
19063 This LDM will finally contain between 2 and 7 registers
19064 - One with the 7 highest registers (register mask 0xDF80)
19065 This ldm will finally contain between 2 and 7 registers. */
19066 insn_low_registers = insn_all_registers & 0x007F;
19067 insn_high_registers = insn_all_registers & 0xDF80;
19068
19069 /* A spare register may be needed during this veneer to temporarily
19070 handle the base register. This register will be restored with
19071 the last LDM operation.
19072 The usable register may be any general purpose register (that excludes
19073 PC, SP, LR : register mask is 0x1FFF). */
19074 usable_register_mask = 0x1FFF;
19075
19076 /* Generate the stub function. */
19077 if (!wback && !restore_pc && !restore_rn)
19078 {
19079 /* Choose a Ri in the low-register-list that will be restored. */
19080 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19081
19082 /* MOV Ri, Rn. */
19083 current_stub_contents =
19084 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19085 create_instruction_mov (ri, rn));
19086
19087 /* LDMDB Ri!, {R-high-register-list}. */
19088 current_stub_contents =
19089 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19090 create_instruction_ldmdb
19091 (ri, /*wback=*/1, insn_high_registers));
19092
19093 /* LDMDB Ri, {R-low-register-list}. */
19094 current_stub_contents =
19095 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19096 create_instruction_ldmdb
19097 (ri, /*wback=*/0, insn_low_registers));
19098
19099 /* B initial_insn_addr+4. */
19100 current_stub_contents =
19101 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19102 create_instruction_branch_absolute
19103 (initial_insn_addr - current_stub_contents));
19104 }
19105 else if (wback && !restore_pc && !restore_rn)
19106 {
19107 /* LDMDB Rn!, {R-high-register-list}. */
19108 current_stub_contents =
19109 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19110 create_instruction_ldmdb
19111 (rn, /*wback=*/1, insn_high_registers));
19112
19113 /* LDMDB Rn!, {R-low-register-list}. */
19114 current_stub_contents =
19115 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19116 create_instruction_ldmdb
19117 (rn, /*wback=*/1, insn_low_registers));
19118
19119 /* B initial_insn_addr+4. */
19120 current_stub_contents =
19121 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19122 create_instruction_branch_absolute
19123 (initial_insn_addr - current_stub_contents));
19124 }
19125 else if (!wback && restore_pc && !restore_rn)
19126 {
19127 /* Choose a Ri in the high-register-list that will be restored. */
19128 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19129
19130 /* SUB Ri, Rn, #(4*nb_registers). */
19131 current_stub_contents =
19132 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19133 create_instruction_sub (ri, rn, (4 * nb_registers)));
19134
19135 /* LDMIA Ri!, {R-low-register-list}. */
19136 current_stub_contents =
19137 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19138 create_instruction_ldmia
19139 (ri, /*wback=*/1, insn_low_registers));
19140
19141 /* LDMIA Ri, {R-high-register-list}. */
19142 current_stub_contents =
19143 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19144 create_instruction_ldmia
19145 (ri, /*wback=*/0, insn_high_registers));
19146 }
19147 else if (wback && restore_pc && !restore_rn)
19148 {
19149 /* Choose a Ri in the high-register-list that will be restored. */
19150 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19151
19152 /* SUB Rn, Rn, #(4*nb_registers) */
19153 current_stub_contents =
19154 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19155 create_instruction_sub (rn, rn, (4 * nb_registers)));
19156
19157 /* MOV Ri, Rn. */
19158 current_stub_contents =
19159 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19160 create_instruction_mov (ri, rn));
19161
19162 /* LDMIA Ri!, {R-low-register-list}. */
19163 current_stub_contents =
19164 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19165 create_instruction_ldmia
19166 (ri, /*wback=*/1, insn_low_registers));
19167
19168 /* LDMIA Ri, {R-high-register-list}. */
19169 current_stub_contents =
19170 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19171 create_instruction_ldmia
19172 (ri, /*wback=*/0, insn_high_registers));
19173 }
19174 else if (!wback && !restore_pc && restore_rn)
19175 {
19176 ri = rn;
19177 if (!(insn_low_registers & (1 << rn)))
19178 {
19179 /* Choose a Ri in the low-register-list that will be restored. */
19180 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19181
19182 /* MOV Ri, Rn. */
19183 current_stub_contents =
19184 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19185 create_instruction_mov (ri, rn));
19186 }
19187
19188 /* LDMDB Ri!, {R-high-register-list}. */
19189 current_stub_contents =
19190 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19191 create_instruction_ldmdb
19192 (ri, /*wback=*/1, insn_high_registers));
19193
19194 /* LDMDB Ri, {R-low-register-list}. */
19195 current_stub_contents =
19196 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19197 create_instruction_ldmdb
19198 (ri, /*wback=*/0, insn_low_registers));
19199
19200 /* B initial_insn_addr+4. */
19201 current_stub_contents =
19202 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19203 create_instruction_branch_absolute
19204 (initial_insn_addr - current_stub_contents));
19205 }
19206 else if (!wback && restore_pc && restore_rn)
19207 {
19208 ri = rn;
19209 if (!(insn_high_registers & (1 << rn)))
19210 {
19211 /* Choose a Ri in the high-register-list that will be restored. */
19212 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19213 }
19214
19215 /* SUB Ri, Rn, #(4*nb_registers). */
19216 current_stub_contents =
19217 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19218 create_instruction_sub (ri, rn, (4 * nb_registers)));
19219
19220 /* LDMIA Ri!, {R-low-register-list}. */
19221 current_stub_contents =
19222 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19223 create_instruction_ldmia
19224 (ri, /*wback=*/1, insn_low_registers));
19225
19226 /* LDMIA Ri, {R-high-register-list}. */
19227 current_stub_contents =
19228 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19229 create_instruction_ldmia
19230 (ri, /*wback=*/0, insn_high_registers));
19231 }
19232 else if (wback && restore_rn)
19233 {
19234 /* The assembler should not have accepted to encode this. */
19235 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
19236 "undefined behavior.\n");
19237 }
19238
19239 /* Fill the remaining of the stub with deterministic contents. */
19240 current_stub_contents =
19241 stm32l4xx_fill_stub_udf (htab, output_bfd,
19242 base_stub_contents, current_stub_contents,
19243 base_stub_contents +
19244 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19245
19246 }
19247
19248 static void
19249 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
19250 bfd * output_bfd,
19251 const insn32 initial_insn,
19252 const bfd_byte *const initial_insn_addr,
19253 bfd_byte *const base_stub_contents)
19254 {
19255 int num_words = initial_insn & 0xff;
19256 bfd_byte *current_stub_contents = base_stub_contents;
19257
19258 BFD_ASSERT (is_thumb2_vldm (initial_insn));
19259
19260 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19261 smaller than 8 words load sequences that do not cause the
19262 hardware issue. */
19263 if (num_words <= 8)
19264 {
19265 /* Untouched instruction. */
19266 current_stub_contents =
19267 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19268 initial_insn);
19269
19270 /* B initial_insn_addr+4. */
19271 current_stub_contents =
19272 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19273 create_instruction_branch_absolute
19274 (initial_insn_addr - current_stub_contents));
19275 }
19276 else
19277 {
19278 bool is_dp = /* DP encoding. */
19279 (initial_insn & 0xfe100f00) == 0xec100b00;
19280 bool is_ia_nobang = /* (IA without !). */
19281 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
19282 bool is_ia_bang = /* (IA with !) - includes VPOP. */
19283 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
19284 bool is_db_bang = /* (DB with !). */
19285 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
19286 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
19287 /* d = UInt (Vd:D);. */
19288 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
19289 | (((unsigned int)initial_insn << 9) >> 31);
19290
19291 /* Compute the number of 8-words chunks needed to split. */
19292 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
19293 int chunk;
19294
19295 /* The test coverage has been done assuming the following
19296 hypothesis that exactly one of the previous is_ predicates is
19297 true. */
19298 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
19299 && !(is_ia_nobang & is_ia_bang & is_db_bang));
19300
19301 /* We treat the cutting of the words in one pass for all
19302 cases, then we emit the adjustments:
19303
19304 vldm rx, {...}
19305 -> vldm rx!, {8_words_or_less} for each needed 8_word
19306 -> sub rx, rx, #size (list)
19307
19308 vldm rx!, {...}
19309 -> vldm rx!, {8_words_or_less} for each needed 8_word
19310 This also handles vpop instruction (when rx is sp)
19311
19312 vldmd rx!, {...}
19313 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
19314 for (chunk = 0; chunk < chunks; ++chunk)
19315 {
19316 bfd_vma new_insn = 0;
19317
19318 if (is_ia_nobang || is_ia_bang)
19319 {
19320 new_insn = create_instruction_vldmia
19321 (base_reg,
19322 is_dp,
19323 /*wback= . */1,
19324 chunks - (chunk + 1) ?
19325 8 : num_words - chunk * 8,
19326 first_reg + chunk * 8);
19327 }
19328 else if (is_db_bang)
19329 {
19330 new_insn = create_instruction_vldmdb
19331 (base_reg,
19332 is_dp,
19333 chunks - (chunk + 1) ?
19334 8 : num_words - chunk * 8,
19335 first_reg + chunk * 8);
19336 }
19337
19338 if (new_insn)
19339 current_stub_contents =
19340 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19341 new_insn);
19342 }
19343
19344 /* Only this case requires the base register compensation
19345 subtract. */
19346 if (is_ia_nobang)
19347 {
19348 current_stub_contents =
19349 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19350 create_instruction_sub
19351 (base_reg, base_reg, 4*num_words));
19352 }
19353
19354 /* B initial_insn_addr+4. */
19355 current_stub_contents =
19356 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19357 create_instruction_branch_absolute
19358 (initial_insn_addr - current_stub_contents));
19359 }
19360
19361 /* Fill the remaining of the stub with deterministic contents. */
19362 current_stub_contents =
19363 stm32l4xx_fill_stub_udf (htab, output_bfd,
19364 base_stub_contents, current_stub_contents,
19365 base_stub_contents +
19366 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
19367 }
19368
19369 static void
19370 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
19371 bfd * output_bfd,
19372 const insn32 wrong_insn,
19373 const bfd_byte *const wrong_insn_addr,
19374 bfd_byte *const stub_contents)
19375 {
19376 if (is_thumb2_ldmia (wrong_insn))
19377 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
19378 wrong_insn, wrong_insn_addr,
19379 stub_contents);
19380 else if (is_thumb2_ldmdb (wrong_insn))
19381 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
19382 wrong_insn, wrong_insn_addr,
19383 stub_contents);
19384 else if (is_thumb2_vldm (wrong_insn))
19385 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
19386 wrong_insn, wrong_insn_addr,
19387 stub_contents);
19388 }
19389
19390 /* End of stm32l4xx work-around. */
19391
19392
19393 /* Do code byteswapping. Return FALSE afterwards so that the section is
19394 written out as normal. */
19395
19396 static bool
19397 elf32_arm_write_section (bfd *output_bfd,
19398 struct bfd_link_info *link_info,
19399 asection *sec,
19400 bfd_byte *contents)
19401 {
19402 unsigned int mapcount, errcount;
19403 _arm_elf_section_data *arm_data;
19404 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
19405 elf32_arm_section_map *map;
19406 elf32_vfp11_erratum_list *errnode;
19407 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
19408 bfd_vma ptr;
19409 bfd_vma end;
19410 bfd_vma offset = sec->output_section->vma + sec->output_offset;
19411 bfd_byte tmp;
19412 unsigned int i;
19413
19414 if (globals == NULL)
19415 return false;
19416
19417 /* If this section has not been allocated an _arm_elf_section_data
19418 structure then we cannot record anything. */
19419 arm_data = get_arm_elf_section_data (sec);
19420 if (arm_data == NULL)
19421 return false;
19422
19423 mapcount = arm_data->mapcount;
19424 map = arm_data->map;
19425 errcount = arm_data->erratumcount;
19426
19427 if (errcount != 0)
19428 {
19429 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
19430
19431 for (errnode = arm_data->erratumlist; errnode != 0;
19432 errnode = errnode->next)
19433 {
19434 bfd_vma target = errnode->vma - offset;
19435
19436 switch (errnode->type)
19437 {
19438 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
19439 {
19440 bfd_vma branch_to_veneer;
19441 /* Original condition code of instruction, plus bit mask for
19442 ARM B instruction. */
19443 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
19444 | 0x0a000000;
19445
19446 /* The instruction is before the label. */
19447 target -= 4;
19448
19449 /* Above offset included in -4 below. */
19450 branch_to_veneer = errnode->u.b.veneer->vma
19451 - errnode->vma - 4;
19452
19453 if ((signed) branch_to_veneer < -(1 << 25)
19454 || (signed) branch_to_veneer >= (1 << 25))
19455 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19456 "range"), output_bfd);
19457
19458 insn |= (branch_to_veneer >> 2) & 0xffffff;
19459 contents[endianflip ^ target] = insn & 0xff;
19460 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19461 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19462 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19463 }
19464 break;
19465
19466 case VFP11_ERRATUM_ARM_VENEER:
19467 {
19468 bfd_vma branch_from_veneer;
19469 unsigned int insn;
19470
19471 /* Take size of veneer into account. */
19472 branch_from_veneer = errnode->u.v.branch->vma
19473 - errnode->vma - 12;
19474
19475 if ((signed) branch_from_veneer < -(1 << 25)
19476 || (signed) branch_from_veneer >= (1 << 25))
19477 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19478 "range"), output_bfd);
19479
19480 /* Original instruction. */
19481 insn = errnode->u.v.branch->u.b.vfp_insn;
19482 contents[endianflip ^ target] = insn & 0xff;
19483 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19484 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19485 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19486
19487 /* Branch back to insn after original insn. */
19488 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
19489 contents[endianflip ^ (target + 4)] = insn & 0xff;
19490 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
19491 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
19492 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
19493 }
19494 break;
19495
19496 default:
19497 abort ();
19498 }
19499 }
19500 }
19501
19502 if (arm_data->stm32l4xx_erratumcount != 0)
19503 {
19504 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
19505 stm32l4xx_errnode != 0;
19506 stm32l4xx_errnode = stm32l4xx_errnode->next)
19507 {
19508 bfd_vma target = stm32l4xx_errnode->vma - offset;
19509
19510 switch (stm32l4xx_errnode->type)
19511 {
19512 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
19513 {
19514 unsigned int insn;
19515 bfd_vma branch_to_veneer =
19516 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
19517
19518 if ((signed) branch_to_veneer < -(1 << 24)
19519 || (signed) branch_to_veneer >= (1 << 24))
19520 {
19521 bfd_vma out_of_range =
19522 ((signed) branch_to_veneer < -(1 << 24)) ?
19523 - branch_to_veneer - (1 << 24) :
19524 ((signed) branch_to_veneer >= (1 << 24)) ?
19525 branch_to_veneer - (1 << 24) : 0;
19526
19527 _bfd_error_handler
19528 (_("%pB(%#" PRIx64 "): error: "
19529 "cannot create STM32L4XX veneer; "
19530 "jump out of range by %" PRId64 " bytes; "
19531 "cannot encode branch instruction"),
19532 output_bfd,
19533 (uint64_t) (stm32l4xx_errnode->vma - 4),
19534 (int64_t) out_of_range);
19535 continue;
19536 }
19537
19538 insn = create_instruction_branch_absolute
19539 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
19540
19541 /* The instruction is before the label. */
19542 target -= 4;
19543
19544 put_thumb2_insn (globals, output_bfd,
19545 (bfd_vma) insn, contents + target);
19546 }
19547 break;
19548
19549 case STM32L4XX_ERRATUM_VENEER:
19550 {
19551 bfd_byte * veneer;
19552 bfd_byte * veneer_r;
19553 unsigned int insn;
19554
19555 veneer = contents + target;
19556 veneer_r = veneer
19557 + stm32l4xx_errnode->u.b.veneer->vma
19558 - stm32l4xx_errnode->vma - 4;
19559
19560 if ((signed) (veneer_r - veneer -
19561 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
19562 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
19563 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
19564 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
19565 || (signed) (veneer_r - veneer) >= (1 << 24))
19566 {
19567 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19568 "veneer"), output_bfd);
19569 continue;
19570 }
19571
19572 /* Original instruction. */
19573 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
19574
19575 stm32l4xx_create_replacing_stub
19576 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
19577 }
19578 break;
19579
19580 default:
19581 abort ();
19582 }
19583 }
19584 }
19585
19586 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
19587 {
19588 arm_unwind_table_edit *edit_node
19589 = arm_data->u.exidx.unwind_edit_list;
19590 /* Now, sec->size is the size of the section we will write. The original
19591 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19592 markers) was sec->rawsize. (This isn't the case if we perform no
19593 edits, then rawsize will be zero and we should use size). */
19594 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
19595 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
19596 unsigned int in_index, out_index;
19597 bfd_vma add_to_offsets = 0;
19598
19599 if (edited_contents == NULL)
19600 return false;
19601 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
19602 {
19603 if (edit_node)
19604 {
19605 unsigned int edit_index = edit_node->index;
19606
19607 if (in_index < edit_index && in_index * 8 < input_size)
19608 {
19609 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19610 contents + in_index * 8, add_to_offsets);
19611 out_index++;
19612 in_index++;
19613 }
19614 else if (in_index == edit_index
19615 || (in_index * 8 >= input_size
19616 && edit_index == UINT_MAX))
19617 {
19618 switch (edit_node->type)
19619 {
19620 case DELETE_EXIDX_ENTRY:
19621 in_index++;
19622 add_to_offsets += 8;
19623 break;
19624
19625 case INSERT_EXIDX_CANTUNWIND_AT_END:
19626 {
19627 asection *text_sec = edit_node->linked_section;
19628 bfd_vma text_offset = text_sec->output_section->vma
19629 + text_sec->output_offset
19630 + text_sec->size;
19631 bfd_vma exidx_offset = offset + out_index * 8;
19632 unsigned long prel31_offset;
19633
19634 /* Note: this is meant to be equivalent to an
19635 R_ARM_PREL31 relocation. These synthetic
19636 EXIDX_CANTUNWIND markers are not relocated by the
19637 usual BFD method. */
19638 prel31_offset = (text_offset - exidx_offset)
19639 & 0x7ffffffful;
19640 if (bfd_link_relocatable (link_info))
19641 {
19642 /* Here relocation for new EXIDX_CANTUNWIND is
19643 created, so there is no need to
19644 adjust offset by hand. */
19645 prel31_offset = text_sec->output_offset
19646 + text_sec->size;
19647 }
19648
19649 /* First address we can't unwind. */
19650 bfd_put_32 (output_bfd, prel31_offset,
19651 &edited_contents[out_index * 8]);
19652
19653 /* Code for EXIDX_CANTUNWIND. */
19654 bfd_put_32 (output_bfd, 0x1,
19655 &edited_contents[out_index * 8 + 4]);
19656
19657 out_index++;
19658 add_to_offsets -= 8;
19659 }
19660 break;
19661 }
19662
19663 edit_node = edit_node->next;
19664 }
19665 }
19666 else
19667 {
19668 /* No more edits, copy remaining entries verbatim. */
19669 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19670 contents + in_index * 8, add_to_offsets);
19671 out_index++;
19672 in_index++;
19673 }
19674 }
19675
19676 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
19677 bfd_set_section_contents (output_bfd, sec->output_section,
19678 edited_contents,
19679 (file_ptr) sec->output_offset, sec->size);
19680
19681 return true;
19682 }
19683
19684 /* Fix code to point to Cortex-A8 erratum stubs. */
19685 if (globals->fix_cortex_a8)
19686 {
19687 struct a8_branch_to_stub_data data;
19688
19689 data.writing_section = sec;
19690 data.contents = contents;
19691
19692 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
19693 & data);
19694 }
19695
19696 if (mapcount == 0)
19697 return false;
19698
19699 if (globals->byteswap_code)
19700 {
19701 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
19702
19703 ptr = map[0].vma;
19704 for (i = 0; i < mapcount; i++)
19705 {
19706 if (i == mapcount - 1)
19707 end = sec->size;
19708 else
19709 end = map[i + 1].vma;
19710
19711 switch (map[i].type)
19712 {
19713 case 'a':
19714 /* Byte swap code words. */
19715 while (ptr + 3 < end)
19716 {
19717 tmp = contents[ptr];
19718 contents[ptr] = contents[ptr + 3];
19719 contents[ptr + 3] = tmp;
19720 tmp = contents[ptr + 1];
19721 contents[ptr + 1] = contents[ptr + 2];
19722 contents[ptr + 2] = tmp;
19723 ptr += 4;
19724 }
19725 break;
19726
19727 case 't':
19728 /* Byte swap code halfwords. */
19729 while (ptr + 1 < end)
19730 {
19731 tmp = contents[ptr];
19732 contents[ptr] = contents[ptr + 1];
19733 contents[ptr + 1] = tmp;
19734 ptr += 2;
19735 }
19736 break;
19737
19738 case 'd':
19739 /* Leave data alone. */
19740 break;
19741 }
19742 ptr = end;
19743 }
19744 }
19745
19746 free (map);
19747 arm_data->mapcount = -1;
19748 arm_data->mapsize = 0;
19749 arm_data->map = NULL;
19750
19751 return false;
19752 }
19753
19754 /* Mangle thumb function symbols as we read them in. */
19755
19756 static bool
19757 elf32_arm_swap_symbol_in (bfd * abfd,
19758 const void *psrc,
19759 const void *pshn,
19760 Elf_Internal_Sym *dst)
19761 {
19762 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
19763 return false;
19764 dst->st_target_internal = 0;
19765
19766 /* New EABI objects mark thumb function symbols by setting the low bit of
19767 the address. */
19768 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
19769 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
19770 {
19771 if (dst->st_value & 1)
19772 {
19773 dst->st_value &= ~(bfd_vma) 1;
19774 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
19775 ST_BRANCH_TO_THUMB);
19776 }
19777 else
19778 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
19779 }
19780 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
19781 {
19782 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
19783 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
19784 }
19785 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
19786 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
19787 else
19788 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
19789
19790 return true;
19791 }
19792
19793
19794 /* Mangle thumb function symbols as we write them out. */
19795
19796 static void
19797 elf32_arm_swap_symbol_out (bfd *abfd,
19798 const Elf_Internal_Sym *src,
19799 void *cdst,
19800 void *shndx)
19801 {
19802 Elf_Internal_Sym newsym;
19803
19804 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19805 of the address set, as per the new EABI. We do this unconditionally
19806 because objcopy does not set the elf header flags until after
19807 it writes out the symbol table. */
19808 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
19809 {
19810 newsym = *src;
19811 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
19812 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
19813 if (newsym.st_shndx != SHN_UNDEF)
19814 {
19815 /* Do this only for defined symbols. At link type, the static
19816 linker will simulate the work of dynamic linker of resolving
19817 symbols and will carry over the thumbness of found symbols to
19818 the output symbol table. It's not clear how it happens, but
19819 the thumbness of undefined symbols can well be different at
19820 runtime, and writing '1' for them will be confusing for users
19821 and possibly for dynamic linker itself.
19822 */
19823 newsym.st_value |= 1;
19824 }
19825
19826 src = &newsym;
19827 }
19828 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
19829 }
19830
19831 /* Add the PT_ARM_EXIDX program header. */
19832
19833 static bool
19834 elf32_arm_modify_segment_map (bfd *abfd,
19835 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19836 {
19837 struct elf_segment_map *m;
19838 asection *sec;
19839
19840 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19841 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19842 {
19843 /* If there is already a PT_ARM_EXIDX header, then we do not
19844 want to add another one. This situation arises when running
19845 "strip"; the input binary already has the header. */
19846 m = elf_seg_map (abfd);
19847 while (m && m->p_type != PT_ARM_EXIDX)
19848 m = m->next;
19849 if (!m)
19850 {
19851 m = (struct elf_segment_map *)
19852 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
19853 if (m == NULL)
19854 return false;
19855 m->p_type = PT_ARM_EXIDX;
19856 m->count = 1;
19857 m->sections[0] = sec;
19858
19859 m->next = elf_seg_map (abfd);
19860 elf_seg_map (abfd) = m;
19861 }
19862 }
19863
19864 return true;
19865 }
19866
19867 /* We may add a PT_ARM_EXIDX program header. */
19868
19869 static int
19870 elf32_arm_additional_program_headers (bfd *abfd,
19871 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19872 {
19873 asection *sec;
19874
19875 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19876 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19877 return 1;
19878 else
19879 return 0;
19880 }
19881
19882 /* Hook called by the linker routine which adds symbols from an object
19883 file. */
19884
19885 static bool
19886 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
19887 Elf_Internal_Sym *sym, const char **namep,
19888 flagword *flagsp, asection **secp, bfd_vma *valp)
19889 {
19890 if (elf32_arm_hash_table (info) == NULL)
19891 return false;
19892
19893 if (elf32_arm_hash_table (info)->root.target_os == is_vxworks
19894 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
19895 flagsp, secp, valp))
19896 return false;
19897
19898 return true;
19899 }
19900
19901 /* We use this to override swap_symbol_in and swap_symbol_out. */
19902 const struct elf_size_info elf32_arm_size_info =
19903 {
19904 sizeof (Elf32_External_Ehdr),
19905 sizeof (Elf32_External_Phdr),
19906 sizeof (Elf32_External_Shdr),
19907 sizeof (Elf32_External_Rel),
19908 sizeof (Elf32_External_Rela),
19909 sizeof (Elf32_External_Sym),
19910 sizeof (Elf32_External_Dyn),
19911 sizeof (Elf_External_Note),
19912 4,
19913 1,
19914 32, 2,
19915 ELFCLASS32, EV_CURRENT,
19916 bfd_elf32_write_out_phdrs,
19917 bfd_elf32_write_shdrs_and_ehdr,
19918 bfd_elf32_checksum_contents,
19919 bfd_elf32_write_relocs,
19920 elf32_arm_swap_symbol_in,
19921 elf32_arm_swap_symbol_out,
19922 bfd_elf32_slurp_reloc_table,
19923 bfd_elf32_slurp_symbol_table,
19924 bfd_elf32_swap_dyn_in,
19925 bfd_elf32_swap_dyn_out,
19926 bfd_elf32_swap_reloc_in,
19927 bfd_elf32_swap_reloc_out,
19928 bfd_elf32_swap_reloca_in,
19929 bfd_elf32_swap_reloca_out
19930 };
19931
19932 static bfd_vma
19933 read_code32 (const bfd *abfd, const bfd_byte *addr)
19934 {
19935 /* V7 BE8 code is always little endian. */
19936 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19937 return bfd_getl32 (addr);
19938
19939 return bfd_get_32 (abfd, addr);
19940 }
19941
19942 static bfd_vma
19943 read_code16 (const bfd *abfd, const bfd_byte *addr)
19944 {
19945 /* V7 BE8 code is always little endian. */
19946 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19947 return bfd_getl16 (addr);
19948
19949 return bfd_get_16 (abfd, addr);
19950 }
19951
19952 /* Return size of plt0 entry starting at ADDR
19953 or (bfd_vma) -1 if size can not be determined. */
19954
19955 static bfd_vma
19956 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
19957 {
19958 bfd_vma first_word;
19959 bfd_vma plt0_size;
19960
19961 first_word = read_code32 (abfd, addr);
19962
19963 if (first_word == elf32_arm_plt0_entry[0])
19964 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19965 else if (first_word == elf32_thumb2_plt0_entry[0])
19966 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19967 else
19968 /* We don't yet handle this PLT format. */
19969 return (bfd_vma) -1;
19970
19971 return plt0_size;
19972 }
19973
19974 /* Return size of plt entry starting at offset OFFSET
19975 of plt section located at address START
19976 or (bfd_vma) -1 if size can not be determined. */
19977
19978 static bfd_vma
19979 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
19980 {
19981 bfd_vma first_insn;
19982 bfd_vma plt_size = 0;
19983 const bfd_byte *addr = start + offset;
19984
19985 /* PLT entry size if fixed on Thumb-only platforms. */
19986 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
19987 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
19988
19989 /* Respect Thumb stub if necessary. */
19990 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
19991 {
19992 plt_size += 2 * ARRAY_SIZE (elf32_arm_plt_thumb_stub);
19993 }
19994
19995 /* Strip immediate from first add. */
19996 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
19997
19998 #ifdef FOUR_WORD_PLT
19999 if (first_insn == elf32_arm_plt_entry[0])
20000 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
20001 #else
20002 if (first_insn == elf32_arm_plt_entry_long[0])
20003 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
20004 else if (first_insn == elf32_arm_plt_entry_short[0])
20005 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
20006 #endif
20007 else
20008 /* We don't yet handle this PLT format. */
20009 return (bfd_vma) -1;
20010
20011 return plt_size;
20012 }
20013
20014 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
20015
20016 static long
20017 elf32_arm_get_synthetic_symtab (bfd *abfd,
20018 long symcount ATTRIBUTE_UNUSED,
20019 asymbol **syms ATTRIBUTE_UNUSED,
20020 long dynsymcount,
20021 asymbol **dynsyms,
20022 asymbol **ret)
20023 {
20024 asection *relplt;
20025 asymbol *s;
20026 arelent *p;
20027 long count, i, n;
20028 size_t size;
20029 Elf_Internal_Shdr *hdr;
20030 char *names;
20031 asection *plt;
20032 bfd_vma offset;
20033 bfd_byte *data;
20034
20035 *ret = NULL;
20036
20037 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
20038 return 0;
20039
20040 if (dynsymcount <= 0)
20041 return 0;
20042
20043 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
20044 if (relplt == NULL)
20045 return 0;
20046
20047 hdr = &elf_section_data (relplt)->this_hdr;
20048 if (hdr->sh_link != elf_dynsymtab (abfd)
20049 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
20050 return 0;
20051
20052 plt = bfd_get_section_by_name (abfd, ".plt");
20053 if (plt == NULL)
20054 return 0;
20055
20056 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, true))
20057 return -1;
20058
20059 data = plt->contents;
20060 if (data == NULL)
20061 {
20062 if (!bfd_get_full_section_contents (abfd, plt, &data)
20063 || data == NULL)
20064 return -1;
20065 plt->contents = data;
20066 plt->flags |= SEC_IN_MEMORY;
20067 }
20068
20069 count = relplt->size / hdr->sh_entsize;
20070 size = count * sizeof (asymbol);
20071 p = relplt->relocation;
20072 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
20073 {
20074 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
20075 if (p->addend != 0)
20076 size += sizeof ("+0x") - 1 + 8;
20077 }
20078
20079 s = *ret = (asymbol *) bfd_malloc (size);
20080 if (s == NULL)
20081 return -1;
20082
20083 offset = elf32_arm_plt0_size (abfd, data);
20084 if (offset == (bfd_vma) -1)
20085 return -1;
20086
20087 names = (char *) (s + count);
20088 p = relplt->relocation;
20089 n = 0;
20090 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
20091 {
20092 size_t len;
20093
20094 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
20095 if (plt_size == (bfd_vma) -1)
20096 break;
20097
20098 *s = **p->sym_ptr_ptr;
20099 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
20100 we are defining a symbol, ensure one of them is set. */
20101 if ((s->flags & BSF_LOCAL) == 0)
20102 s->flags |= BSF_GLOBAL;
20103 s->flags |= BSF_SYNTHETIC;
20104 s->section = plt;
20105 s->value = offset;
20106 s->name = names;
20107 s->udata.p = NULL;
20108 len = strlen ((*p->sym_ptr_ptr)->name);
20109 memcpy (names, (*p->sym_ptr_ptr)->name, len);
20110 names += len;
20111 if (p->addend != 0)
20112 {
20113 char buf[30], *a;
20114
20115 memcpy (names, "+0x", sizeof ("+0x") - 1);
20116 names += sizeof ("+0x") - 1;
20117 bfd_sprintf_vma (abfd, buf, p->addend);
20118 for (a = buf; *a == '0'; ++a)
20119 ;
20120 len = strlen (a);
20121 memcpy (names, a, len);
20122 names += len;
20123 }
20124 memcpy (names, "@plt", sizeof ("@plt"));
20125 names += sizeof ("@plt");
20126 ++s, ++n;
20127 offset += plt_size;
20128 }
20129
20130 return n;
20131 }
20132
20133 static bool
20134 elf32_arm_section_flags (const Elf_Internal_Shdr *hdr)
20135 {
20136 if (hdr->sh_flags & SHF_ARM_PURECODE)
20137 hdr->bfd_section->flags |= SEC_ELF_PURECODE;
20138 return true;
20139 }
20140
20141 static flagword
20142 elf32_arm_lookup_section_flags (char *flag_name)
20143 {
20144 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
20145 return SHF_ARM_PURECODE;
20146
20147 return SEC_NO_FLAGS;
20148 }
20149
20150 static unsigned int
20151 elf32_arm_count_additional_relocs (asection *sec)
20152 {
20153 struct _arm_elf_section_data *arm_data;
20154 arm_data = get_arm_elf_section_data (sec);
20155
20156 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
20157 }
20158
20159 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
20160 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
20161 FALSE otherwise. ISECTION is the best guess matching section from the
20162 input bfd IBFD, but it might be NULL. */
20163
20164 static bool
20165 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
20166 bfd *obfd ATTRIBUTE_UNUSED,
20167 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
20168 Elf_Internal_Shdr *osection)
20169 {
20170 switch (osection->sh_type)
20171 {
20172 case SHT_ARM_EXIDX:
20173 {
20174 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
20175 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
20176 unsigned i = 0;
20177
20178 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
20179 osection->sh_info = 0;
20180
20181 /* The sh_link field must be set to the text section associated with
20182 this index section. Unfortunately the ARM EHABI does not specify
20183 exactly how to determine this association. Our caller does try
20184 to match up OSECTION with its corresponding input section however
20185 so that is a good first guess. */
20186 if (isection != NULL
20187 && osection->bfd_section != NULL
20188 && isection->bfd_section != NULL
20189 && isection->bfd_section->output_section != NULL
20190 && isection->bfd_section->output_section == osection->bfd_section
20191 && iheaders != NULL
20192 && isection->sh_link > 0
20193 && isection->sh_link < elf_numsections (ibfd)
20194 && iheaders[isection->sh_link]->bfd_section != NULL
20195 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
20196 )
20197 {
20198 for (i = elf_numsections (obfd); i-- > 0;)
20199 if (oheaders[i]->bfd_section
20200 == iheaders[isection->sh_link]->bfd_section->output_section)
20201 break;
20202 }
20203
20204 if (i == 0)
20205 {
20206 /* Failing that we have to find a matching section ourselves. If
20207 we had the output section name available we could compare that
20208 with input section names. Unfortunately we don't. So instead
20209 we use a simple heuristic and look for the nearest executable
20210 section before this one. */
20211 for (i = elf_numsections (obfd); i-- > 0;)
20212 if (oheaders[i] == osection)
20213 break;
20214 if (i == 0)
20215 break;
20216
20217 while (i-- > 0)
20218 if (oheaders[i]->sh_type == SHT_PROGBITS
20219 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
20220 == (SHF_ALLOC | SHF_EXECINSTR))
20221 break;
20222 }
20223
20224 if (i)
20225 {
20226 osection->sh_link = i;
20227 /* If the text section was part of a group
20228 then the index section should be too. */
20229 if (oheaders[i]->sh_flags & SHF_GROUP)
20230 osection->sh_flags |= SHF_GROUP;
20231 return true;
20232 }
20233 }
20234 break;
20235
20236 case SHT_ARM_PREEMPTMAP:
20237 osection->sh_flags = SHF_ALLOC;
20238 break;
20239
20240 case SHT_ARM_ATTRIBUTES:
20241 case SHT_ARM_DEBUGOVERLAY:
20242 case SHT_ARM_OVERLAYSECTION:
20243 default:
20244 break;
20245 }
20246
20247 return false;
20248 }
20249
20250 /* Returns TRUE if NAME is an ARM mapping symbol.
20251 Traditionally the symbols $a, $d and $t have been used.
20252 The ARM ELF standard also defines $x (for A64 code). It also allows a
20253 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
20254 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
20255 not support them here. $t.x indicates the start of ThumbEE instructions. */
20256
20257 static bool
20258 is_arm_mapping_symbol (const char * name)
20259 {
20260 return name != NULL /* Paranoia. */
20261 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
20262 the mapping symbols could have acquired a prefix.
20263 We do not support this here, since such symbols no
20264 longer conform to the ARM ELF ABI. */
20265 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
20266 && (name[2] == 0 || name[2] == '.');
20267 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
20268 any characters that follow the period are legal characters for the body
20269 of a symbol's name. For now we just assume that this is the case. */
20270 }
20271
20272 /* Make sure that mapping symbols in object files are not removed via the
20273 "strip --strip-unneeded" tool. These symbols are needed in order to
20274 correctly generate interworking veneers, and for byte swapping code
20275 regions. Once an object file has been linked, it is safe to remove the
20276 symbols as they will no longer be needed. */
20277
20278 static void
20279 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
20280 {
20281 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
20282 && sym->section != bfd_abs_section_ptr
20283 && is_arm_mapping_symbol (sym->name))
20284 sym->flags |= BSF_KEEP;
20285 }
20286
20287 #undef elf_backend_copy_special_section_fields
20288 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
20289
20290 #define ELF_ARCH bfd_arch_arm
20291 #define ELF_TARGET_ID ARM_ELF_DATA
20292 #define ELF_MACHINE_CODE EM_ARM
20293 #define ELF_MAXPAGESIZE 0x1000
20294 #define ELF_COMMONPAGESIZE 0x1000
20295
20296 #define bfd_elf32_mkobject elf32_arm_mkobject
20297
20298 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
20299 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
20300 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
20301 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
20302 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
20303 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
20304 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
20305 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
20306 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
20307 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
20308 #define bfd_elf32_bfd_final_link elf32_arm_final_link
20309 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
20310
20311 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
20312 #define elf_backend_maybe_function_sym elf32_arm_maybe_function_sym
20313 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
20314 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
20315 #define elf_backend_check_relocs elf32_arm_check_relocs
20316 #define elf_backend_update_relocs elf32_arm_update_relocs
20317 #define elf_backend_relocate_section elf32_arm_relocate_section
20318 #define elf_backend_write_section elf32_arm_write_section
20319 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
20320 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
20321 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
20322 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
20323 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
20324 #define elf_backend_always_size_sections elf32_arm_always_size_sections
20325 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
20326 #define elf_backend_init_file_header elf32_arm_init_file_header
20327 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
20328 #define elf_backend_object_p elf32_arm_object_p
20329 #define elf_backend_fake_sections elf32_arm_fake_sections
20330 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
20331 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20332 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
20333 #define elf_backend_size_info elf32_arm_size_info
20334 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20335 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
20336 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
20337 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
20338 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
20339 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
20340 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
20341 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
20342
20343 #define elf_backend_can_refcount 1
20344 #define elf_backend_can_gc_sections 1
20345 #define elf_backend_plt_readonly 1
20346 #define elf_backend_want_got_plt 1
20347 #define elf_backend_want_plt_sym 0
20348 #define elf_backend_want_dynrelro 1
20349 #define elf_backend_may_use_rel_p 1
20350 #define elf_backend_may_use_rela_p 0
20351 #define elf_backend_default_use_rela_p 0
20352 #define elf_backend_dtrel_excludes_plt 1
20353
20354 #define elf_backend_got_header_size 12
20355 #define elf_backend_extern_protected_data 0
20356
20357 #undef elf_backend_obj_attrs_vendor
20358 #define elf_backend_obj_attrs_vendor "aeabi"
20359 #undef elf_backend_obj_attrs_section
20360 #define elf_backend_obj_attrs_section ".ARM.attributes"
20361 #undef elf_backend_obj_attrs_arg_type
20362 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
20363 #undef elf_backend_obj_attrs_section_type
20364 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
20365 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
20366 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
20367
20368 #undef elf_backend_section_flags
20369 #define elf_backend_section_flags elf32_arm_section_flags
20370 #undef elf_backend_lookup_section_flags_hook
20371 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20372
20373 #define elf_backend_linux_prpsinfo32_ugid16 true
20374
20375 #include "elf32-target.h"
20376
20377 /* Native Client targets. */
20378
20379 #undef TARGET_LITTLE_SYM
20380 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
20381 #undef TARGET_LITTLE_NAME
20382 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
20383 #undef TARGET_BIG_SYM
20384 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
20385 #undef TARGET_BIG_NAME
20386 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
20387
20388 /* Like elf32_arm_link_hash_table_create -- but overrides
20389 appropriately for NaCl. */
20390
20391 static struct bfd_link_hash_table *
20392 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
20393 {
20394 struct bfd_link_hash_table *ret;
20395
20396 ret = elf32_arm_link_hash_table_create (abfd);
20397 if (ret)
20398 {
20399 struct elf32_arm_link_hash_table *htab
20400 = (struct elf32_arm_link_hash_table *) ret;
20401
20402 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
20403 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
20404 }
20405 return ret;
20406 }
20407
20408 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
20409 really need to use elf32_arm_modify_segment_map. But we do it
20410 anyway just to reduce gratuitous differences with the stock ARM backend. */
20411
20412 static bool
20413 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
20414 {
20415 return (elf32_arm_modify_segment_map (abfd, info)
20416 && nacl_modify_segment_map (abfd, info));
20417 }
20418
20419 static bool
20420 elf32_arm_nacl_final_write_processing (bfd *abfd)
20421 {
20422 arm_final_write_processing (abfd);
20423 return nacl_final_write_processing (abfd);
20424 }
20425
20426 static bfd_vma
20427 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
20428 const arelent *rel ATTRIBUTE_UNUSED)
20429 {
20430 return plt->vma
20431 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
20432 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
20433 }
20434
20435 #undef elf32_bed
20436 #define elf32_bed elf32_arm_nacl_bed
20437 #undef bfd_elf32_bfd_link_hash_table_create
20438 #define bfd_elf32_bfd_link_hash_table_create \
20439 elf32_arm_nacl_link_hash_table_create
20440 #undef elf_backend_plt_alignment
20441 #define elf_backend_plt_alignment 4
20442 #undef elf_backend_modify_segment_map
20443 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
20444 #undef elf_backend_modify_headers
20445 #define elf_backend_modify_headers nacl_modify_headers
20446 #undef elf_backend_final_write_processing
20447 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
20448 #undef bfd_elf32_get_synthetic_symtab
20449 #undef elf_backend_plt_sym_val
20450 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
20451 #undef elf_backend_copy_special_section_fields
20452
20453 #undef ELF_MINPAGESIZE
20454 #undef ELF_COMMONPAGESIZE
20455
20456 #undef ELF_TARGET_OS
20457 #define ELF_TARGET_OS is_nacl
20458
20459 #include "elf32-target.h"
20460
20461 /* Reset to defaults. */
20462 #undef elf_backend_plt_alignment
20463 #undef elf_backend_modify_segment_map
20464 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20465 #undef elf_backend_modify_headers
20466 #undef elf_backend_final_write_processing
20467 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20468 #undef ELF_MINPAGESIZE
20469 #undef ELF_COMMONPAGESIZE
20470 #define ELF_COMMONPAGESIZE 0x1000
20471
20472
20473 /* FDPIC Targets. */
20474
20475 #undef TARGET_LITTLE_SYM
20476 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
20477 #undef TARGET_LITTLE_NAME
20478 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
20479 #undef TARGET_BIG_SYM
20480 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
20481 #undef TARGET_BIG_NAME
20482 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
20483 #undef elf_match_priority
20484 #define elf_match_priority 128
20485 #undef ELF_OSABI
20486 #define ELF_OSABI ELFOSABI_ARM_FDPIC
20487
20488 /* Like elf32_arm_link_hash_table_create -- but overrides
20489 appropriately for FDPIC. */
20490
20491 static struct bfd_link_hash_table *
20492 elf32_arm_fdpic_link_hash_table_create (bfd *abfd)
20493 {
20494 struct bfd_link_hash_table *ret;
20495
20496 ret = elf32_arm_link_hash_table_create (abfd);
20497 if (ret)
20498 {
20499 struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret;
20500
20501 htab->fdpic_p = 1;
20502 }
20503 return ret;
20504 }
20505
20506 /* We need dynamic symbols for every section, since segments can
20507 relocate independently. */
20508 static bool
20509 elf32_arm_fdpic_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED,
20510 struct bfd_link_info *info
20511 ATTRIBUTE_UNUSED,
20512 asection *p ATTRIBUTE_UNUSED)
20513 {
20514 switch (elf_section_data (p)->this_hdr.sh_type)
20515 {
20516 case SHT_PROGBITS:
20517 case SHT_NOBITS:
20518 /* If sh_type is yet undecided, assume it could be
20519 SHT_PROGBITS/SHT_NOBITS. */
20520 case SHT_NULL:
20521 return false;
20522
20523 /* There shouldn't be section relative relocations
20524 against any other section. */
20525 default:
20526 return true;
20527 }
20528 }
20529
20530 #undef elf32_bed
20531 #define elf32_bed elf32_arm_fdpic_bed
20532
20533 #undef bfd_elf32_bfd_link_hash_table_create
20534 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
20535
20536 #undef elf_backend_omit_section_dynsym
20537 #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym
20538
20539 #undef ELF_TARGET_OS
20540
20541 #include "elf32-target.h"
20542
20543 #undef elf_match_priority
20544 #undef ELF_OSABI
20545 #undef elf_backend_omit_section_dynsym
20546
20547 /* VxWorks Targets. */
20548
20549 #undef TARGET_LITTLE_SYM
20550 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
20551 #undef TARGET_LITTLE_NAME
20552 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
20553 #undef TARGET_BIG_SYM
20554 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
20555 #undef TARGET_BIG_NAME
20556 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
20557
20558 /* Like elf32_arm_link_hash_table_create -- but overrides
20559 appropriately for VxWorks. */
20560
20561 static struct bfd_link_hash_table *
20562 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
20563 {
20564 struct bfd_link_hash_table *ret;
20565
20566 ret = elf32_arm_link_hash_table_create (abfd);
20567 if (ret)
20568 {
20569 struct elf32_arm_link_hash_table *htab
20570 = (struct elf32_arm_link_hash_table *) ret;
20571 htab->use_rel = 0;
20572 }
20573 return ret;
20574 }
20575
20576 static bool
20577 elf32_arm_vxworks_final_write_processing (bfd *abfd)
20578 {
20579 arm_final_write_processing (abfd);
20580 return elf_vxworks_final_write_processing (abfd);
20581 }
20582
20583 #undef elf32_bed
20584 #define elf32_bed elf32_arm_vxworks_bed
20585
20586 #undef bfd_elf32_bfd_link_hash_table_create
20587 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
20588 #undef elf_backend_final_write_processing
20589 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
20590 #undef elf_backend_emit_relocs
20591 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
20592
20593 #undef elf_backend_may_use_rel_p
20594 #define elf_backend_may_use_rel_p 0
20595 #undef elf_backend_may_use_rela_p
20596 #define elf_backend_may_use_rela_p 1
20597 #undef elf_backend_default_use_rela_p
20598 #define elf_backend_default_use_rela_p 1
20599 #undef elf_backend_want_plt_sym
20600 #define elf_backend_want_plt_sym 1
20601 #undef ELF_MAXPAGESIZE
20602 #define ELF_MAXPAGESIZE 0x1000
20603 #undef ELF_TARGET_OS
20604 #define ELF_TARGET_OS is_vxworks
20605
20606 #include "elf32-target.h"
20607
20608
20609 /* Merge backend specific data from an object file to the output
20610 object file when linking. */
20611
20612 static bool
20613 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
20614 {
20615 bfd *obfd = info->output_bfd;
20616 flagword out_flags;
20617 flagword in_flags;
20618 bool flags_compatible = true;
20619 asection *sec;
20620
20621 /* Check if we have the same endianness. */
20622 if (! _bfd_generic_verify_endian_match (ibfd, info))
20623 return false;
20624
20625 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
20626 return true;
20627
20628 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
20629 return false;
20630
20631 /* The input BFD must have had its flags initialised. */
20632 /* The following seems bogus to me -- The flags are initialized in
20633 the assembler but I don't think an elf_flags_init field is
20634 written into the object. */
20635 /* BFD_ASSERT (elf_flags_init (ibfd)); */
20636
20637 in_flags = elf_elfheader (ibfd)->e_flags;
20638 out_flags = elf_elfheader (obfd)->e_flags;
20639
20640 /* In theory there is no reason why we couldn't handle this. However
20641 in practice it isn't even close to working and there is no real
20642 reason to want it. */
20643 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
20644 && !(ibfd->flags & DYNAMIC)
20645 && (in_flags & EF_ARM_BE8))
20646 {
20647 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20648 ibfd);
20649 return false;
20650 }
20651
20652 if (!elf_flags_init (obfd))
20653 {
20654 /* If the input is the default architecture and had the default
20655 flags then do not bother setting the flags for the output
20656 architecture, instead allow future merges to do this. If no
20657 future merges ever set these flags then they will retain their
20658 uninitialised values, which surprise surprise, correspond
20659 to the default values. */
20660 if (bfd_get_arch_info (ibfd)->the_default
20661 && elf_elfheader (ibfd)->e_flags == 0)
20662 return true;
20663
20664 elf_flags_init (obfd) = true;
20665 elf_elfheader (obfd)->e_flags = in_flags;
20666
20667 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
20668 && bfd_get_arch_info (obfd)->the_default)
20669 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
20670
20671 return true;
20672 }
20673
20674 /* Determine what should happen if the input ARM architecture
20675 does not match the output ARM architecture. */
20676 if (! bfd_arm_merge_machines (ibfd, obfd))
20677 return false;
20678
20679 /* Identical flags must be compatible. */
20680 if (in_flags == out_flags)
20681 return true;
20682
20683 /* Check to see if the input BFD actually contains any sections. If
20684 not, its flags may not have been initialised either, but it
20685 cannot actually cause any incompatiblity. Do not short-circuit
20686 dynamic objects; their section list may be emptied by
20687 elf_link_add_object_symbols.
20688
20689 Also check to see if there are no code sections in the input.
20690 In this case there is no need to check for code specific flags.
20691 XXX - do we need to worry about floating-point format compatability
20692 in data sections ? */
20693 if (!(ibfd->flags & DYNAMIC))
20694 {
20695 bool null_input_bfd = true;
20696 bool only_data_sections = true;
20697
20698 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
20699 {
20700 /* Ignore synthetic glue sections. */
20701 if (strcmp (sec->name, ".glue_7")
20702 && strcmp (sec->name, ".glue_7t"))
20703 {
20704 if ((bfd_section_flags (sec)
20705 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20706 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20707 only_data_sections = false;
20708
20709 null_input_bfd = false;
20710 break;
20711 }
20712 }
20713
20714 if (null_input_bfd || only_data_sections)
20715 return true;
20716 }
20717
20718 /* Complain about various flag mismatches. */
20719 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
20720 EF_ARM_EABI_VERSION (out_flags)))
20721 {
20722 _bfd_error_handler
20723 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20724 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
20725 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
20726 return false;
20727 }
20728
20729 /* Not sure what needs to be checked for EABI versions >= 1. */
20730 /* VxWorks libraries do not use these flags. */
20731 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
20732 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
20733 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
20734 {
20735 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
20736 {
20737 _bfd_error_handler
20738 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20739 ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
20740 obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
20741 flags_compatible = false;
20742 }
20743
20744 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
20745 {
20746 if (in_flags & EF_ARM_APCS_FLOAT)
20747 _bfd_error_handler
20748 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20749 ibfd, obfd);
20750 else
20751 _bfd_error_handler
20752 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20753 ibfd, obfd);
20754
20755 flags_compatible = false;
20756 }
20757
20758 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
20759 {
20760 if (in_flags & EF_ARM_VFP_FLOAT)
20761 _bfd_error_handler
20762 (_("error: %pB uses %s instructions, whereas %pB does not"),
20763 ibfd, "VFP", obfd);
20764 else
20765 _bfd_error_handler
20766 (_("error: %pB uses %s instructions, whereas %pB does not"),
20767 ibfd, "FPA", obfd);
20768
20769 flags_compatible = false;
20770 }
20771
20772 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
20773 {
20774 if (in_flags & EF_ARM_MAVERICK_FLOAT)
20775 _bfd_error_handler
20776 (_("error: %pB uses %s instructions, whereas %pB does not"),
20777 ibfd, "Maverick", obfd);
20778 else
20779 _bfd_error_handler
20780 (_("error: %pB does not use %s instructions, whereas %pB does"),
20781 ibfd, "Maverick", obfd);
20782
20783 flags_compatible = false;
20784 }
20785
20786 #ifdef EF_ARM_SOFT_FLOAT
20787 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
20788 {
20789 /* We can allow interworking between code that is VFP format
20790 layout, and uses either soft float or integer regs for
20791 passing floating point arguments and results. We already
20792 know that the APCS_FLOAT flags match; similarly for VFP
20793 flags. */
20794 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
20795 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
20796 {
20797 if (in_flags & EF_ARM_SOFT_FLOAT)
20798 _bfd_error_handler
20799 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20800 ibfd, obfd);
20801 else
20802 _bfd_error_handler
20803 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20804 ibfd, obfd);
20805
20806 flags_compatible = false;
20807 }
20808 }
20809 #endif
20810
20811 /* Interworking mismatch is only a warning. */
20812 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
20813 {
20814 if (in_flags & EF_ARM_INTERWORK)
20815 {
20816 _bfd_error_handler
20817 (_("warning: %pB supports interworking, whereas %pB does not"),
20818 ibfd, obfd);
20819 }
20820 else
20821 {
20822 _bfd_error_handler
20823 (_("warning: %pB does not support interworking, whereas %pB does"),
20824 ibfd, obfd);
20825 }
20826 }
20827 }
20828
20829 return flags_compatible;
20830 }
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