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BFD whitespace fixes
[thirdparty/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2019 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "libiberty.h"
26 #include "libbfd.h"
27 #include "elf-bfd.h"
28 #include "elf-nacl.h"
29 #include "elf-vxworks.h"
30 #include "elf/arm.h"
31
32 /* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34 #define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37 /* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39 #define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44 /* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46 #define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51 /* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53 #define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
58 #define elf_info_to_howto NULL
59 #define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61 #define ARM_ELF_ABI_VERSION 0
62 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
64 /* The Adjusted Place, as defined by AAELF. */
65 #define Pa(X) ((X) & 0xfffffffc)
66
67 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
68 struct bfd_link_info *link_info,
69 asection *sec,
70 bfd_byte *contents);
71
72 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
73 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
74 in that slot. */
75
76 static reloc_howto_type elf32_arm_howto_table_1[] =
77 {
78 /* No relocation. */
79 HOWTO (R_ARM_NONE, /* type */
80 0, /* rightshift */
81 3, /* size (0 = byte, 1 = short, 2 = long) */
82 0, /* bitsize */
83 FALSE, /* pc_relative */
84 0, /* bitpos */
85 complain_overflow_dont,/* complain_on_overflow */
86 bfd_elf_generic_reloc, /* special_function */
87 "R_ARM_NONE", /* name */
88 FALSE, /* partial_inplace */
89 0, /* src_mask */
90 0, /* dst_mask */
91 FALSE), /* pcrel_offset */
92
93 HOWTO (R_ARM_PC24, /* type */
94 2, /* rightshift */
95 2, /* size (0 = byte, 1 = short, 2 = long) */
96 24, /* bitsize */
97 TRUE, /* pc_relative */
98 0, /* bitpos */
99 complain_overflow_signed,/* complain_on_overflow */
100 bfd_elf_generic_reloc, /* special_function */
101 "R_ARM_PC24", /* name */
102 FALSE, /* partial_inplace */
103 0x00ffffff, /* src_mask */
104 0x00ffffff, /* dst_mask */
105 TRUE), /* pcrel_offset */
106
107 /* 32 bit absolute */
108 HOWTO (R_ARM_ABS32, /* type */
109 0, /* rightshift */
110 2, /* size (0 = byte, 1 = short, 2 = long) */
111 32, /* bitsize */
112 FALSE, /* pc_relative */
113 0, /* bitpos */
114 complain_overflow_bitfield,/* complain_on_overflow */
115 bfd_elf_generic_reloc, /* special_function */
116 "R_ARM_ABS32", /* name */
117 FALSE, /* partial_inplace */
118 0xffffffff, /* src_mask */
119 0xffffffff, /* dst_mask */
120 FALSE), /* pcrel_offset */
121
122 /* standard 32bit pc-relative reloc */
123 HOWTO (R_ARM_REL32, /* type */
124 0, /* rightshift */
125 2, /* size (0 = byte, 1 = short, 2 = long) */
126 32, /* bitsize */
127 TRUE, /* pc_relative */
128 0, /* bitpos */
129 complain_overflow_bitfield,/* complain_on_overflow */
130 bfd_elf_generic_reloc, /* special_function */
131 "R_ARM_REL32", /* name */
132 FALSE, /* partial_inplace */
133 0xffffffff, /* src_mask */
134 0xffffffff, /* dst_mask */
135 TRUE), /* pcrel_offset */
136
137 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
138 HOWTO (R_ARM_LDR_PC_G0, /* type */
139 0, /* rightshift */
140 0, /* size (0 = byte, 1 = short, 2 = long) */
141 32, /* bitsize */
142 TRUE, /* pc_relative */
143 0, /* bitpos */
144 complain_overflow_dont,/* complain_on_overflow */
145 bfd_elf_generic_reloc, /* special_function */
146 "R_ARM_LDR_PC_G0", /* name */
147 FALSE, /* partial_inplace */
148 0xffffffff, /* src_mask */
149 0xffffffff, /* dst_mask */
150 TRUE), /* pcrel_offset */
151
152 /* 16 bit absolute */
153 HOWTO (R_ARM_ABS16, /* type */
154 0, /* rightshift */
155 1, /* size (0 = byte, 1 = short, 2 = long) */
156 16, /* bitsize */
157 FALSE, /* pc_relative */
158 0, /* bitpos */
159 complain_overflow_bitfield,/* complain_on_overflow */
160 bfd_elf_generic_reloc, /* special_function */
161 "R_ARM_ABS16", /* name */
162 FALSE, /* partial_inplace */
163 0x0000ffff, /* src_mask */
164 0x0000ffff, /* dst_mask */
165 FALSE), /* pcrel_offset */
166
167 /* 12 bit absolute */
168 HOWTO (R_ARM_ABS12, /* type */
169 0, /* rightshift */
170 2, /* size (0 = byte, 1 = short, 2 = long) */
171 12, /* bitsize */
172 FALSE, /* pc_relative */
173 0, /* bitpos */
174 complain_overflow_bitfield,/* complain_on_overflow */
175 bfd_elf_generic_reloc, /* special_function */
176 "R_ARM_ABS12", /* name */
177 FALSE, /* partial_inplace */
178 0x00000fff, /* src_mask */
179 0x00000fff, /* dst_mask */
180 FALSE), /* pcrel_offset */
181
182 HOWTO (R_ARM_THM_ABS5, /* type */
183 6, /* rightshift */
184 1, /* size (0 = byte, 1 = short, 2 = long) */
185 5, /* bitsize */
186 FALSE, /* pc_relative */
187 0, /* bitpos */
188 complain_overflow_bitfield,/* complain_on_overflow */
189 bfd_elf_generic_reloc, /* special_function */
190 "R_ARM_THM_ABS5", /* name */
191 FALSE, /* partial_inplace */
192 0x000007e0, /* src_mask */
193 0x000007e0, /* dst_mask */
194 FALSE), /* pcrel_offset */
195
196 /* 8 bit absolute */
197 HOWTO (R_ARM_ABS8, /* type */
198 0, /* rightshift */
199 0, /* size (0 = byte, 1 = short, 2 = long) */
200 8, /* bitsize */
201 FALSE, /* pc_relative */
202 0, /* bitpos */
203 complain_overflow_bitfield,/* complain_on_overflow */
204 bfd_elf_generic_reloc, /* special_function */
205 "R_ARM_ABS8", /* name */
206 FALSE, /* partial_inplace */
207 0x000000ff, /* src_mask */
208 0x000000ff, /* dst_mask */
209 FALSE), /* pcrel_offset */
210
211 HOWTO (R_ARM_SBREL32, /* type */
212 0, /* rightshift */
213 2, /* size (0 = byte, 1 = short, 2 = long) */
214 32, /* bitsize */
215 FALSE, /* pc_relative */
216 0, /* bitpos */
217 complain_overflow_dont,/* complain_on_overflow */
218 bfd_elf_generic_reloc, /* special_function */
219 "R_ARM_SBREL32", /* name */
220 FALSE, /* partial_inplace */
221 0xffffffff, /* src_mask */
222 0xffffffff, /* dst_mask */
223 FALSE), /* pcrel_offset */
224
225 HOWTO (R_ARM_THM_CALL, /* type */
226 1, /* rightshift */
227 2, /* size (0 = byte, 1 = short, 2 = long) */
228 24, /* bitsize */
229 TRUE, /* pc_relative */
230 0, /* bitpos */
231 complain_overflow_signed,/* complain_on_overflow */
232 bfd_elf_generic_reloc, /* special_function */
233 "R_ARM_THM_CALL", /* name */
234 FALSE, /* partial_inplace */
235 0x07ff2fff, /* src_mask */
236 0x07ff2fff, /* dst_mask */
237 TRUE), /* pcrel_offset */
238
239 HOWTO (R_ARM_THM_PC8, /* type */
240 1, /* rightshift */
241 1, /* size (0 = byte, 1 = short, 2 = long) */
242 8, /* bitsize */
243 TRUE, /* pc_relative */
244 0, /* bitpos */
245 complain_overflow_signed,/* complain_on_overflow */
246 bfd_elf_generic_reloc, /* special_function */
247 "R_ARM_THM_PC8", /* name */
248 FALSE, /* partial_inplace */
249 0x000000ff, /* src_mask */
250 0x000000ff, /* dst_mask */
251 TRUE), /* pcrel_offset */
252
253 HOWTO (R_ARM_BREL_ADJ, /* type */
254 1, /* rightshift */
255 1, /* size (0 = byte, 1 = short, 2 = long) */
256 32, /* bitsize */
257 FALSE, /* pc_relative */
258 0, /* bitpos */
259 complain_overflow_signed,/* complain_on_overflow */
260 bfd_elf_generic_reloc, /* special_function */
261 "R_ARM_BREL_ADJ", /* name */
262 FALSE, /* partial_inplace */
263 0xffffffff, /* src_mask */
264 0xffffffff, /* dst_mask */
265 FALSE), /* pcrel_offset */
266
267 HOWTO (R_ARM_TLS_DESC, /* type */
268 0, /* rightshift */
269 2, /* size (0 = byte, 1 = short, 2 = long) */
270 32, /* bitsize */
271 FALSE, /* pc_relative */
272 0, /* bitpos */
273 complain_overflow_bitfield,/* complain_on_overflow */
274 bfd_elf_generic_reloc, /* special_function */
275 "R_ARM_TLS_DESC", /* name */
276 FALSE, /* partial_inplace */
277 0xffffffff, /* src_mask */
278 0xffffffff, /* dst_mask */
279 FALSE), /* pcrel_offset */
280
281 HOWTO (R_ARM_THM_SWI8, /* type */
282 0, /* rightshift */
283 0, /* size (0 = byte, 1 = short, 2 = long) */
284 0, /* bitsize */
285 FALSE, /* pc_relative */
286 0, /* bitpos */
287 complain_overflow_signed,/* complain_on_overflow */
288 bfd_elf_generic_reloc, /* special_function */
289 "R_ARM_SWI8", /* name */
290 FALSE, /* partial_inplace */
291 0x00000000, /* src_mask */
292 0x00000000, /* dst_mask */
293 FALSE), /* pcrel_offset */
294
295 /* BLX instruction for the ARM. */
296 HOWTO (R_ARM_XPC25, /* type */
297 2, /* rightshift */
298 2, /* size (0 = byte, 1 = short, 2 = long) */
299 24, /* bitsize */
300 TRUE, /* pc_relative */
301 0, /* bitpos */
302 complain_overflow_signed,/* complain_on_overflow */
303 bfd_elf_generic_reloc, /* special_function */
304 "R_ARM_XPC25", /* name */
305 FALSE, /* partial_inplace */
306 0x00ffffff, /* src_mask */
307 0x00ffffff, /* dst_mask */
308 TRUE), /* pcrel_offset */
309
310 /* BLX instruction for the Thumb. */
311 HOWTO (R_ARM_THM_XPC22, /* type */
312 2, /* rightshift */
313 2, /* size (0 = byte, 1 = short, 2 = long) */
314 24, /* bitsize */
315 TRUE, /* pc_relative */
316 0, /* bitpos */
317 complain_overflow_signed,/* complain_on_overflow */
318 bfd_elf_generic_reloc, /* special_function */
319 "R_ARM_THM_XPC22", /* name */
320 FALSE, /* partial_inplace */
321 0x07ff2fff, /* src_mask */
322 0x07ff2fff, /* dst_mask */
323 TRUE), /* pcrel_offset */
324
325 /* Dynamic TLS relocations. */
326
327 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
328 0, /* rightshift */
329 2, /* size (0 = byte, 1 = short, 2 = long) */
330 32, /* bitsize */
331 FALSE, /* pc_relative */
332 0, /* bitpos */
333 complain_overflow_bitfield,/* complain_on_overflow */
334 bfd_elf_generic_reloc, /* special_function */
335 "R_ARM_TLS_DTPMOD32", /* name */
336 TRUE, /* partial_inplace */
337 0xffffffff, /* src_mask */
338 0xffffffff, /* dst_mask */
339 FALSE), /* pcrel_offset */
340
341 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
342 0, /* rightshift */
343 2, /* size (0 = byte, 1 = short, 2 = long) */
344 32, /* bitsize */
345 FALSE, /* pc_relative */
346 0, /* bitpos */
347 complain_overflow_bitfield,/* complain_on_overflow */
348 bfd_elf_generic_reloc, /* special_function */
349 "R_ARM_TLS_DTPOFF32", /* name */
350 TRUE, /* partial_inplace */
351 0xffffffff, /* src_mask */
352 0xffffffff, /* dst_mask */
353 FALSE), /* pcrel_offset */
354
355 HOWTO (R_ARM_TLS_TPOFF32, /* type */
356 0, /* rightshift */
357 2, /* size (0 = byte, 1 = short, 2 = long) */
358 32, /* bitsize */
359 FALSE, /* pc_relative */
360 0, /* bitpos */
361 complain_overflow_bitfield,/* complain_on_overflow */
362 bfd_elf_generic_reloc, /* special_function */
363 "R_ARM_TLS_TPOFF32", /* name */
364 TRUE, /* partial_inplace */
365 0xffffffff, /* src_mask */
366 0xffffffff, /* dst_mask */
367 FALSE), /* pcrel_offset */
368
369 /* Relocs used in ARM Linux */
370
371 HOWTO (R_ARM_COPY, /* type */
372 0, /* rightshift */
373 2, /* size (0 = byte, 1 = short, 2 = long) */
374 32, /* bitsize */
375 FALSE, /* pc_relative */
376 0, /* bitpos */
377 complain_overflow_bitfield,/* complain_on_overflow */
378 bfd_elf_generic_reloc, /* special_function */
379 "R_ARM_COPY", /* name */
380 TRUE, /* partial_inplace */
381 0xffffffff, /* src_mask */
382 0xffffffff, /* dst_mask */
383 FALSE), /* pcrel_offset */
384
385 HOWTO (R_ARM_GLOB_DAT, /* type */
386 0, /* rightshift */
387 2, /* size (0 = byte, 1 = short, 2 = long) */
388 32, /* bitsize */
389 FALSE, /* pc_relative */
390 0, /* bitpos */
391 complain_overflow_bitfield,/* complain_on_overflow */
392 bfd_elf_generic_reloc, /* special_function */
393 "R_ARM_GLOB_DAT", /* name */
394 TRUE, /* partial_inplace */
395 0xffffffff, /* src_mask */
396 0xffffffff, /* dst_mask */
397 FALSE), /* pcrel_offset */
398
399 HOWTO (R_ARM_JUMP_SLOT, /* type */
400 0, /* rightshift */
401 2, /* size (0 = byte, 1 = short, 2 = long) */
402 32, /* bitsize */
403 FALSE, /* pc_relative */
404 0, /* bitpos */
405 complain_overflow_bitfield,/* complain_on_overflow */
406 bfd_elf_generic_reloc, /* special_function */
407 "R_ARM_JUMP_SLOT", /* name */
408 TRUE, /* partial_inplace */
409 0xffffffff, /* src_mask */
410 0xffffffff, /* dst_mask */
411 FALSE), /* pcrel_offset */
412
413 HOWTO (R_ARM_RELATIVE, /* type */
414 0, /* rightshift */
415 2, /* size (0 = byte, 1 = short, 2 = long) */
416 32, /* bitsize */
417 FALSE, /* pc_relative */
418 0, /* bitpos */
419 complain_overflow_bitfield,/* complain_on_overflow */
420 bfd_elf_generic_reloc, /* special_function */
421 "R_ARM_RELATIVE", /* name */
422 TRUE, /* partial_inplace */
423 0xffffffff, /* src_mask */
424 0xffffffff, /* dst_mask */
425 FALSE), /* pcrel_offset */
426
427 HOWTO (R_ARM_GOTOFF32, /* type */
428 0, /* rightshift */
429 2, /* size (0 = byte, 1 = short, 2 = long) */
430 32, /* bitsize */
431 FALSE, /* pc_relative */
432 0, /* bitpos */
433 complain_overflow_bitfield,/* complain_on_overflow */
434 bfd_elf_generic_reloc, /* special_function */
435 "R_ARM_GOTOFF32", /* name */
436 TRUE, /* partial_inplace */
437 0xffffffff, /* src_mask */
438 0xffffffff, /* dst_mask */
439 FALSE), /* pcrel_offset */
440
441 HOWTO (R_ARM_GOTPC, /* type */
442 0, /* rightshift */
443 2, /* size (0 = byte, 1 = short, 2 = long) */
444 32, /* bitsize */
445 TRUE, /* pc_relative */
446 0, /* bitpos */
447 complain_overflow_bitfield,/* complain_on_overflow */
448 bfd_elf_generic_reloc, /* special_function */
449 "R_ARM_GOTPC", /* name */
450 TRUE, /* partial_inplace */
451 0xffffffff, /* src_mask */
452 0xffffffff, /* dst_mask */
453 TRUE), /* pcrel_offset */
454
455 HOWTO (R_ARM_GOT32, /* type */
456 0, /* rightshift */
457 2, /* size (0 = byte, 1 = short, 2 = long) */
458 32, /* bitsize */
459 FALSE, /* pc_relative */
460 0, /* bitpos */
461 complain_overflow_bitfield,/* complain_on_overflow */
462 bfd_elf_generic_reloc, /* special_function */
463 "R_ARM_GOT32", /* name */
464 TRUE, /* partial_inplace */
465 0xffffffff, /* src_mask */
466 0xffffffff, /* dst_mask */
467 FALSE), /* pcrel_offset */
468
469 HOWTO (R_ARM_PLT32, /* type */
470 2, /* rightshift */
471 2, /* size (0 = byte, 1 = short, 2 = long) */
472 24, /* bitsize */
473 TRUE, /* pc_relative */
474 0, /* bitpos */
475 complain_overflow_bitfield,/* complain_on_overflow */
476 bfd_elf_generic_reloc, /* special_function */
477 "R_ARM_PLT32", /* name */
478 FALSE, /* partial_inplace */
479 0x00ffffff, /* src_mask */
480 0x00ffffff, /* dst_mask */
481 TRUE), /* pcrel_offset */
482
483 HOWTO (R_ARM_CALL, /* type */
484 2, /* rightshift */
485 2, /* size (0 = byte, 1 = short, 2 = long) */
486 24, /* bitsize */
487 TRUE, /* pc_relative */
488 0, /* bitpos */
489 complain_overflow_signed,/* complain_on_overflow */
490 bfd_elf_generic_reloc, /* special_function */
491 "R_ARM_CALL", /* name */
492 FALSE, /* partial_inplace */
493 0x00ffffff, /* src_mask */
494 0x00ffffff, /* dst_mask */
495 TRUE), /* pcrel_offset */
496
497 HOWTO (R_ARM_JUMP24, /* type */
498 2, /* rightshift */
499 2, /* size (0 = byte, 1 = short, 2 = long) */
500 24, /* bitsize */
501 TRUE, /* pc_relative */
502 0, /* bitpos */
503 complain_overflow_signed,/* complain_on_overflow */
504 bfd_elf_generic_reloc, /* special_function */
505 "R_ARM_JUMP24", /* name */
506 FALSE, /* partial_inplace */
507 0x00ffffff, /* src_mask */
508 0x00ffffff, /* dst_mask */
509 TRUE), /* pcrel_offset */
510
511 HOWTO (R_ARM_THM_JUMP24, /* type */
512 1, /* rightshift */
513 2, /* size (0 = byte, 1 = short, 2 = long) */
514 24, /* bitsize */
515 TRUE, /* pc_relative */
516 0, /* bitpos */
517 complain_overflow_signed,/* complain_on_overflow */
518 bfd_elf_generic_reloc, /* special_function */
519 "R_ARM_THM_JUMP24", /* name */
520 FALSE, /* partial_inplace */
521 0x07ff2fff, /* src_mask */
522 0x07ff2fff, /* dst_mask */
523 TRUE), /* pcrel_offset */
524
525 HOWTO (R_ARM_BASE_ABS, /* type */
526 0, /* rightshift */
527 2, /* size (0 = byte, 1 = short, 2 = long) */
528 32, /* bitsize */
529 FALSE, /* pc_relative */
530 0, /* bitpos */
531 complain_overflow_dont,/* complain_on_overflow */
532 bfd_elf_generic_reloc, /* special_function */
533 "R_ARM_BASE_ABS", /* name */
534 FALSE, /* partial_inplace */
535 0xffffffff, /* src_mask */
536 0xffffffff, /* dst_mask */
537 FALSE), /* pcrel_offset */
538
539 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
540 0, /* rightshift */
541 2, /* size (0 = byte, 1 = short, 2 = long) */
542 12, /* bitsize */
543 TRUE, /* pc_relative */
544 0, /* bitpos */
545 complain_overflow_dont,/* complain_on_overflow */
546 bfd_elf_generic_reloc, /* special_function */
547 "R_ARM_ALU_PCREL_7_0", /* name */
548 FALSE, /* partial_inplace */
549 0x00000fff, /* src_mask */
550 0x00000fff, /* dst_mask */
551 TRUE), /* pcrel_offset */
552
553 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
554 0, /* rightshift */
555 2, /* size (0 = byte, 1 = short, 2 = long) */
556 12, /* bitsize */
557 TRUE, /* pc_relative */
558 8, /* bitpos */
559 complain_overflow_dont,/* complain_on_overflow */
560 bfd_elf_generic_reloc, /* special_function */
561 "R_ARM_ALU_PCREL_15_8",/* name */
562 FALSE, /* partial_inplace */
563 0x00000fff, /* src_mask */
564 0x00000fff, /* dst_mask */
565 TRUE), /* pcrel_offset */
566
567 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
568 0, /* rightshift */
569 2, /* size (0 = byte, 1 = short, 2 = long) */
570 12, /* bitsize */
571 TRUE, /* pc_relative */
572 16, /* bitpos */
573 complain_overflow_dont,/* complain_on_overflow */
574 bfd_elf_generic_reloc, /* special_function */
575 "R_ARM_ALU_PCREL_23_15",/* name */
576 FALSE, /* partial_inplace */
577 0x00000fff, /* src_mask */
578 0x00000fff, /* dst_mask */
579 TRUE), /* pcrel_offset */
580
581 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
582 0, /* rightshift */
583 2, /* size (0 = byte, 1 = short, 2 = long) */
584 12, /* bitsize */
585 FALSE, /* pc_relative */
586 0, /* bitpos */
587 complain_overflow_dont,/* complain_on_overflow */
588 bfd_elf_generic_reloc, /* special_function */
589 "R_ARM_LDR_SBREL_11_0",/* name */
590 FALSE, /* partial_inplace */
591 0x00000fff, /* src_mask */
592 0x00000fff, /* dst_mask */
593 FALSE), /* pcrel_offset */
594
595 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
596 0, /* rightshift */
597 2, /* size (0 = byte, 1 = short, 2 = long) */
598 8, /* bitsize */
599 FALSE, /* pc_relative */
600 12, /* bitpos */
601 complain_overflow_dont,/* complain_on_overflow */
602 bfd_elf_generic_reloc, /* special_function */
603 "R_ARM_ALU_SBREL_19_12",/* name */
604 FALSE, /* partial_inplace */
605 0x000ff000, /* src_mask */
606 0x000ff000, /* dst_mask */
607 FALSE), /* pcrel_offset */
608
609 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
610 0, /* rightshift */
611 2, /* size (0 = byte, 1 = short, 2 = long) */
612 8, /* bitsize */
613 FALSE, /* pc_relative */
614 20, /* bitpos */
615 complain_overflow_dont,/* complain_on_overflow */
616 bfd_elf_generic_reloc, /* special_function */
617 "R_ARM_ALU_SBREL_27_20",/* name */
618 FALSE, /* partial_inplace */
619 0x0ff00000, /* src_mask */
620 0x0ff00000, /* dst_mask */
621 FALSE), /* pcrel_offset */
622
623 HOWTO (R_ARM_TARGET1, /* type */
624 0, /* rightshift */
625 2, /* size (0 = byte, 1 = short, 2 = long) */
626 32, /* bitsize */
627 FALSE, /* pc_relative */
628 0, /* bitpos */
629 complain_overflow_dont,/* complain_on_overflow */
630 bfd_elf_generic_reloc, /* special_function */
631 "R_ARM_TARGET1", /* name */
632 FALSE, /* partial_inplace */
633 0xffffffff, /* src_mask */
634 0xffffffff, /* dst_mask */
635 FALSE), /* pcrel_offset */
636
637 HOWTO (R_ARM_ROSEGREL32, /* type */
638 0, /* rightshift */
639 2, /* size (0 = byte, 1 = short, 2 = long) */
640 32, /* bitsize */
641 FALSE, /* pc_relative */
642 0, /* bitpos */
643 complain_overflow_dont,/* complain_on_overflow */
644 bfd_elf_generic_reloc, /* special_function */
645 "R_ARM_ROSEGREL32", /* name */
646 FALSE, /* partial_inplace */
647 0xffffffff, /* src_mask */
648 0xffffffff, /* dst_mask */
649 FALSE), /* pcrel_offset */
650
651 HOWTO (R_ARM_V4BX, /* type */
652 0, /* rightshift */
653 2, /* size (0 = byte, 1 = short, 2 = long) */
654 32, /* bitsize */
655 FALSE, /* pc_relative */
656 0, /* bitpos */
657 complain_overflow_dont,/* complain_on_overflow */
658 bfd_elf_generic_reloc, /* special_function */
659 "R_ARM_V4BX", /* name */
660 FALSE, /* partial_inplace */
661 0xffffffff, /* src_mask */
662 0xffffffff, /* dst_mask */
663 FALSE), /* pcrel_offset */
664
665 HOWTO (R_ARM_TARGET2, /* type */
666 0, /* rightshift */
667 2, /* size (0 = byte, 1 = short, 2 = long) */
668 32, /* bitsize */
669 FALSE, /* pc_relative */
670 0, /* bitpos */
671 complain_overflow_signed,/* complain_on_overflow */
672 bfd_elf_generic_reloc, /* special_function */
673 "R_ARM_TARGET2", /* name */
674 FALSE, /* partial_inplace */
675 0xffffffff, /* src_mask */
676 0xffffffff, /* dst_mask */
677 TRUE), /* pcrel_offset */
678
679 HOWTO (R_ARM_PREL31, /* type */
680 0, /* rightshift */
681 2, /* size (0 = byte, 1 = short, 2 = long) */
682 31, /* bitsize */
683 TRUE, /* pc_relative */
684 0, /* bitpos */
685 complain_overflow_signed,/* complain_on_overflow */
686 bfd_elf_generic_reloc, /* special_function */
687 "R_ARM_PREL31", /* name */
688 FALSE, /* partial_inplace */
689 0x7fffffff, /* src_mask */
690 0x7fffffff, /* dst_mask */
691 TRUE), /* pcrel_offset */
692
693 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
694 0, /* rightshift */
695 2, /* size (0 = byte, 1 = short, 2 = long) */
696 16, /* bitsize */
697 FALSE, /* pc_relative */
698 0, /* bitpos */
699 complain_overflow_dont,/* complain_on_overflow */
700 bfd_elf_generic_reloc, /* special_function */
701 "R_ARM_MOVW_ABS_NC", /* name */
702 FALSE, /* partial_inplace */
703 0x000f0fff, /* src_mask */
704 0x000f0fff, /* dst_mask */
705 FALSE), /* pcrel_offset */
706
707 HOWTO (R_ARM_MOVT_ABS, /* type */
708 0, /* rightshift */
709 2, /* size (0 = byte, 1 = short, 2 = long) */
710 16, /* bitsize */
711 FALSE, /* pc_relative */
712 0, /* bitpos */
713 complain_overflow_bitfield,/* complain_on_overflow */
714 bfd_elf_generic_reloc, /* special_function */
715 "R_ARM_MOVT_ABS", /* name */
716 FALSE, /* partial_inplace */
717 0x000f0fff, /* src_mask */
718 0x000f0fff, /* dst_mask */
719 FALSE), /* pcrel_offset */
720
721 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
722 0, /* rightshift */
723 2, /* size (0 = byte, 1 = short, 2 = long) */
724 16, /* bitsize */
725 TRUE, /* pc_relative */
726 0, /* bitpos */
727 complain_overflow_dont,/* complain_on_overflow */
728 bfd_elf_generic_reloc, /* special_function */
729 "R_ARM_MOVW_PREL_NC", /* name */
730 FALSE, /* partial_inplace */
731 0x000f0fff, /* src_mask */
732 0x000f0fff, /* dst_mask */
733 TRUE), /* pcrel_offset */
734
735 HOWTO (R_ARM_MOVT_PREL, /* type */
736 0, /* rightshift */
737 2, /* size (0 = byte, 1 = short, 2 = long) */
738 16, /* bitsize */
739 TRUE, /* pc_relative */
740 0, /* bitpos */
741 complain_overflow_bitfield,/* complain_on_overflow */
742 bfd_elf_generic_reloc, /* special_function */
743 "R_ARM_MOVT_PREL", /* name */
744 FALSE, /* partial_inplace */
745 0x000f0fff, /* src_mask */
746 0x000f0fff, /* dst_mask */
747 TRUE), /* pcrel_offset */
748
749 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
750 0, /* rightshift */
751 2, /* size (0 = byte, 1 = short, 2 = long) */
752 16, /* bitsize */
753 FALSE, /* pc_relative */
754 0, /* bitpos */
755 complain_overflow_dont,/* complain_on_overflow */
756 bfd_elf_generic_reloc, /* special_function */
757 "R_ARM_THM_MOVW_ABS_NC",/* name */
758 FALSE, /* partial_inplace */
759 0x040f70ff, /* src_mask */
760 0x040f70ff, /* dst_mask */
761 FALSE), /* pcrel_offset */
762
763 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
764 0, /* rightshift */
765 2, /* size (0 = byte, 1 = short, 2 = long) */
766 16, /* bitsize */
767 FALSE, /* pc_relative */
768 0, /* bitpos */
769 complain_overflow_bitfield,/* complain_on_overflow */
770 bfd_elf_generic_reloc, /* special_function */
771 "R_ARM_THM_MOVT_ABS", /* name */
772 FALSE, /* partial_inplace */
773 0x040f70ff, /* src_mask */
774 0x040f70ff, /* dst_mask */
775 FALSE), /* pcrel_offset */
776
777 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
778 0, /* rightshift */
779 2, /* size (0 = byte, 1 = short, 2 = long) */
780 16, /* bitsize */
781 TRUE, /* pc_relative */
782 0, /* bitpos */
783 complain_overflow_dont,/* complain_on_overflow */
784 bfd_elf_generic_reloc, /* special_function */
785 "R_ARM_THM_MOVW_PREL_NC",/* name */
786 FALSE, /* partial_inplace */
787 0x040f70ff, /* src_mask */
788 0x040f70ff, /* dst_mask */
789 TRUE), /* pcrel_offset */
790
791 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
792 0, /* rightshift */
793 2, /* size (0 = byte, 1 = short, 2 = long) */
794 16, /* bitsize */
795 TRUE, /* pc_relative */
796 0, /* bitpos */
797 complain_overflow_bitfield,/* complain_on_overflow */
798 bfd_elf_generic_reloc, /* special_function */
799 "R_ARM_THM_MOVT_PREL", /* name */
800 FALSE, /* partial_inplace */
801 0x040f70ff, /* src_mask */
802 0x040f70ff, /* dst_mask */
803 TRUE), /* pcrel_offset */
804
805 HOWTO (R_ARM_THM_JUMP19, /* type */
806 1, /* rightshift */
807 2, /* size (0 = byte, 1 = short, 2 = long) */
808 19, /* bitsize */
809 TRUE, /* pc_relative */
810 0, /* bitpos */
811 complain_overflow_signed,/* complain_on_overflow */
812 bfd_elf_generic_reloc, /* special_function */
813 "R_ARM_THM_JUMP19", /* name */
814 FALSE, /* partial_inplace */
815 0x043f2fff, /* src_mask */
816 0x043f2fff, /* dst_mask */
817 TRUE), /* pcrel_offset */
818
819 HOWTO (R_ARM_THM_JUMP6, /* type */
820 1, /* rightshift */
821 1, /* size (0 = byte, 1 = short, 2 = long) */
822 6, /* bitsize */
823 TRUE, /* pc_relative */
824 0, /* bitpos */
825 complain_overflow_unsigned,/* complain_on_overflow */
826 bfd_elf_generic_reloc, /* special_function */
827 "R_ARM_THM_JUMP6", /* name */
828 FALSE, /* partial_inplace */
829 0x02f8, /* src_mask */
830 0x02f8, /* dst_mask */
831 TRUE), /* pcrel_offset */
832
833 /* These are declared as 13-bit signed relocations because we can
834 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
835 versa. */
836 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
837 0, /* rightshift */
838 2, /* size (0 = byte, 1 = short, 2 = long) */
839 13, /* bitsize */
840 TRUE, /* pc_relative */
841 0, /* bitpos */
842 complain_overflow_dont,/* complain_on_overflow */
843 bfd_elf_generic_reloc, /* special_function */
844 "R_ARM_THM_ALU_PREL_11_0",/* name */
845 FALSE, /* partial_inplace */
846 0xffffffff, /* src_mask */
847 0xffffffff, /* dst_mask */
848 TRUE), /* pcrel_offset */
849
850 HOWTO (R_ARM_THM_PC12, /* type */
851 0, /* rightshift */
852 2, /* size (0 = byte, 1 = short, 2 = long) */
853 13, /* bitsize */
854 TRUE, /* pc_relative */
855 0, /* bitpos */
856 complain_overflow_dont,/* complain_on_overflow */
857 bfd_elf_generic_reloc, /* special_function */
858 "R_ARM_THM_PC12", /* name */
859 FALSE, /* partial_inplace */
860 0xffffffff, /* src_mask */
861 0xffffffff, /* dst_mask */
862 TRUE), /* pcrel_offset */
863
864 HOWTO (R_ARM_ABS32_NOI, /* type */
865 0, /* rightshift */
866 2, /* size (0 = byte, 1 = short, 2 = long) */
867 32, /* bitsize */
868 FALSE, /* pc_relative */
869 0, /* bitpos */
870 complain_overflow_dont,/* complain_on_overflow */
871 bfd_elf_generic_reloc, /* special_function */
872 "R_ARM_ABS32_NOI", /* name */
873 FALSE, /* partial_inplace */
874 0xffffffff, /* src_mask */
875 0xffffffff, /* dst_mask */
876 FALSE), /* pcrel_offset */
877
878 HOWTO (R_ARM_REL32_NOI, /* type */
879 0, /* rightshift */
880 2, /* size (0 = byte, 1 = short, 2 = long) */
881 32, /* bitsize */
882 TRUE, /* pc_relative */
883 0, /* bitpos */
884 complain_overflow_dont,/* complain_on_overflow */
885 bfd_elf_generic_reloc, /* special_function */
886 "R_ARM_REL32_NOI", /* name */
887 FALSE, /* partial_inplace */
888 0xffffffff, /* src_mask */
889 0xffffffff, /* dst_mask */
890 FALSE), /* pcrel_offset */
891
892 /* Group relocations. */
893
894 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
895 0, /* rightshift */
896 2, /* size (0 = byte, 1 = short, 2 = long) */
897 32, /* bitsize */
898 TRUE, /* pc_relative */
899 0, /* bitpos */
900 complain_overflow_dont,/* complain_on_overflow */
901 bfd_elf_generic_reloc, /* special_function */
902 "R_ARM_ALU_PC_G0_NC", /* name */
903 FALSE, /* partial_inplace */
904 0xffffffff, /* src_mask */
905 0xffffffff, /* dst_mask */
906 TRUE), /* pcrel_offset */
907
908 HOWTO (R_ARM_ALU_PC_G0, /* type */
909 0, /* rightshift */
910 2, /* size (0 = byte, 1 = short, 2 = long) */
911 32, /* bitsize */
912 TRUE, /* pc_relative */
913 0, /* bitpos */
914 complain_overflow_dont,/* complain_on_overflow */
915 bfd_elf_generic_reloc, /* special_function */
916 "R_ARM_ALU_PC_G0", /* name */
917 FALSE, /* partial_inplace */
918 0xffffffff, /* src_mask */
919 0xffffffff, /* dst_mask */
920 TRUE), /* pcrel_offset */
921
922 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
923 0, /* rightshift */
924 2, /* size (0 = byte, 1 = short, 2 = long) */
925 32, /* bitsize */
926 TRUE, /* pc_relative */
927 0, /* bitpos */
928 complain_overflow_dont,/* complain_on_overflow */
929 bfd_elf_generic_reloc, /* special_function */
930 "R_ARM_ALU_PC_G1_NC", /* name */
931 FALSE, /* partial_inplace */
932 0xffffffff, /* src_mask */
933 0xffffffff, /* dst_mask */
934 TRUE), /* pcrel_offset */
935
936 HOWTO (R_ARM_ALU_PC_G1, /* type */
937 0, /* rightshift */
938 2, /* size (0 = byte, 1 = short, 2 = long) */
939 32, /* bitsize */
940 TRUE, /* pc_relative */
941 0, /* bitpos */
942 complain_overflow_dont,/* complain_on_overflow */
943 bfd_elf_generic_reloc, /* special_function */
944 "R_ARM_ALU_PC_G1", /* name */
945 FALSE, /* partial_inplace */
946 0xffffffff, /* src_mask */
947 0xffffffff, /* dst_mask */
948 TRUE), /* pcrel_offset */
949
950 HOWTO (R_ARM_ALU_PC_G2, /* type */
951 0, /* rightshift */
952 2, /* size (0 = byte, 1 = short, 2 = long) */
953 32, /* bitsize */
954 TRUE, /* pc_relative */
955 0, /* bitpos */
956 complain_overflow_dont,/* complain_on_overflow */
957 bfd_elf_generic_reloc, /* special_function */
958 "R_ARM_ALU_PC_G2", /* name */
959 FALSE, /* partial_inplace */
960 0xffffffff, /* src_mask */
961 0xffffffff, /* dst_mask */
962 TRUE), /* pcrel_offset */
963
964 HOWTO (R_ARM_LDR_PC_G1, /* type */
965 0, /* rightshift */
966 2, /* size (0 = byte, 1 = short, 2 = long) */
967 32, /* bitsize */
968 TRUE, /* pc_relative */
969 0, /* bitpos */
970 complain_overflow_dont,/* complain_on_overflow */
971 bfd_elf_generic_reloc, /* special_function */
972 "R_ARM_LDR_PC_G1", /* name */
973 FALSE, /* partial_inplace */
974 0xffffffff, /* src_mask */
975 0xffffffff, /* dst_mask */
976 TRUE), /* pcrel_offset */
977
978 HOWTO (R_ARM_LDR_PC_G2, /* type */
979 0, /* rightshift */
980 2, /* size (0 = byte, 1 = short, 2 = long) */
981 32, /* bitsize */
982 TRUE, /* pc_relative */
983 0, /* bitpos */
984 complain_overflow_dont,/* complain_on_overflow */
985 bfd_elf_generic_reloc, /* special_function */
986 "R_ARM_LDR_PC_G2", /* name */
987 FALSE, /* partial_inplace */
988 0xffffffff, /* src_mask */
989 0xffffffff, /* dst_mask */
990 TRUE), /* pcrel_offset */
991
992 HOWTO (R_ARM_LDRS_PC_G0, /* type */
993 0, /* rightshift */
994 2, /* size (0 = byte, 1 = short, 2 = long) */
995 32, /* bitsize */
996 TRUE, /* pc_relative */
997 0, /* bitpos */
998 complain_overflow_dont,/* complain_on_overflow */
999 bfd_elf_generic_reloc, /* special_function */
1000 "R_ARM_LDRS_PC_G0", /* name */
1001 FALSE, /* partial_inplace */
1002 0xffffffff, /* src_mask */
1003 0xffffffff, /* dst_mask */
1004 TRUE), /* pcrel_offset */
1005
1006 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1007 0, /* rightshift */
1008 2, /* size (0 = byte, 1 = short, 2 = long) */
1009 32, /* bitsize */
1010 TRUE, /* pc_relative */
1011 0, /* bitpos */
1012 complain_overflow_dont,/* complain_on_overflow */
1013 bfd_elf_generic_reloc, /* special_function */
1014 "R_ARM_LDRS_PC_G1", /* name */
1015 FALSE, /* partial_inplace */
1016 0xffffffff, /* src_mask */
1017 0xffffffff, /* dst_mask */
1018 TRUE), /* pcrel_offset */
1019
1020 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1021 0, /* rightshift */
1022 2, /* size (0 = byte, 1 = short, 2 = long) */
1023 32, /* bitsize */
1024 TRUE, /* pc_relative */
1025 0, /* bitpos */
1026 complain_overflow_dont,/* complain_on_overflow */
1027 bfd_elf_generic_reloc, /* special_function */
1028 "R_ARM_LDRS_PC_G2", /* name */
1029 FALSE, /* partial_inplace */
1030 0xffffffff, /* src_mask */
1031 0xffffffff, /* dst_mask */
1032 TRUE), /* pcrel_offset */
1033
1034 HOWTO (R_ARM_LDC_PC_G0, /* type */
1035 0, /* rightshift */
1036 2, /* size (0 = byte, 1 = short, 2 = long) */
1037 32, /* bitsize */
1038 TRUE, /* pc_relative */
1039 0, /* bitpos */
1040 complain_overflow_dont,/* complain_on_overflow */
1041 bfd_elf_generic_reloc, /* special_function */
1042 "R_ARM_LDC_PC_G0", /* name */
1043 FALSE, /* partial_inplace */
1044 0xffffffff, /* src_mask */
1045 0xffffffff, /* dst_mask */
1046 TRUE), /* pcrel_offset */
1047
1048 HOWTO (R_ARM_LDC_PC_G1, /* type */
1049 0, /* rightshift */
1050 2, /* size (0 = byte, 1 = short, 2 = long) */
1051 32, /* bitsize */
1052 TRUE, /* pc_relative */
1053 0, /* bitpos */
1054 complain_overflow_dont,/* complain_on_overflow */
1055 bfd_elf_generic_reloc, /* special_function */
1056 "R_ARM_LDC_PC_G1", /* name */
1057 FALSE, /* partial_inplace */
1058 0xffffffff, /* src_mask */
1059 0xffffffff, /* dst_mask */
1060 TRUE), /* pcrel_offset */
1061
1062 HOWTO (R_ARM_LDC_PC_G2, /* type */
1063 0, /* rightshift */
1064 2, /* size (0 = byte, 1 = short, 2 = long) */
1065 32, /* bitsize */
1066 TRUE, /* pc_relative */
1067 0, /* bitpos */
1068 complain_overflow_dont,/* complain_on_overflow */
1069 bfd_elf_generic_reloc, /* special_function */
1070 "R_ARM_LDC_PC_G2", /* name */
1071 FALSE, /* partial_inplace */
1072 0xffffffff, /* src_mask */
1073 0xffffffff, /* dst_mask */
1074 TRUE), /* pcrel_offset */
1075
1076 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1077 0, /* rightshift */
1078 2, /* size (0 = byte, 1 = short, 2 = long) */
1079 32, /* bitsize */
1080 TRUE, /* pc_relative */
1081 0, /* bitpos */
1082 complain_overflow_dont,/* complain_on_overflow */
1083 bfd_elf_generic_reloc, /* special_function */
1084 "R_ARM_ALU_SB_G0_NC", /* name */
1085 FALSE, /* partial_inplace */
1086 0xffffffff, /* src_mask */
1087 0xffffffff, /* dst_mask */
1088 TRUE), /* pcrel_offset */
1089
1090 HOWTO (R_ARM_ALU_SB_G0, /* type */
1091 0, /* rightshift */
1092 2, /* size (0 = byte, 1 = short, 2 = long) */
1093 32, /* bitsize */
1094 TRUE, /* pc_relative */
1095 0, /* bitpos */
1096 complain_overflow_dont,/* complain_on_overflow */
1097 bfd_elf_generic_reloc, /* special_function */
1098 "R_ARM_ALU_SB_G0", /* name */
1099 FALSE, /* partial_inplace */
1100 0xffffffff, /* src_mask */
1101 0xffffffff, /* dst_mask */
1102 TRUE), /* pcrel_offset */
1103
1104 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1105 0, /* rightshift */
1106 2, /* size (0 = byte, 1 = short, 2 = long) */
1107 32, /* bitsize */
1108 TRUE, /* pc_relative */
1109 0, /* bitpos */
1110 complain_overflow_dont,/* complain_on_overflow */
1111 bfd_elf_generic_reloc, /* special_function */
1112 "R_ARM_ALU_SB_G1_NC", /* name */
1113 FALSE, /* partial_inplace */
1114 0xffffffff, /* src_mask */
1115 0xffffffff, /* dst_mask */
1116 TRUE), /* pcrel_offset */
1117
1118 HOWTO (R_ARM_ALU_SB_G1, /* type */
1119 0, /* rightshift */
1120 2, /* size (0 = byte, 1 = short, 2 = long) */
1121 32, /* bitsize */
1122 TRUE, /* pc_relative */
1123 0, /* bitpos */
1124 complain_overflow_dont,/* complain_on_overflow */
1125 bfd_elf_generic_reloc, /* special_function */
1126 "R_ARM_ALU_SB_G1", /* name */
1127 FALSE, /* partial_inplace */
1128 0xffffffff, /* src_mask */
1129 0xffffffff, /* dst_mask */
1130 TRUE), /* pcrel_offset */
1131
1132 HOWTO (R_ARM_ALU_SB_G2, /* type */
1133 0, /* rightshift */
1134 2, /* size (0 = byte, 1 = short, 2 = long) */
1135 32, /* bitsize */
1136 TRUE, /* pc_relative */
1137 0, /* bitpos */
1138 complain_overflow_dont,/* complain_on_overflow */
1139 bfd_elf_generic_reloc, /* special_function */
1140 "R_ARM_ALU_SB_G2", /* name */
1141 FALSE, /* partial_inplace */
1142 0xffffffff, /* src_mask */
1143 0xffffffff, /* dst_mask */
1144 TRUE), /* pcrel_offset */
1145
1146 HOWTO (R_ARM_LDR_SB_G0, /* type */
1147 0, /* rightshift */
1148 2, /* size (0 = byte, 1 = short, 2 = long) */
1149 32, /* bitsize */
1150 TRUE, /* pc_relative */
1151 0, /* bitpos */
1152 complain_overflow_dont,/* complain_on_overflow */
1153 bfd_elf_generic_reloc, /* special_function */
1154 "R_ARM_LDR_SB_G0", /* name */
1155 FALSE, /* partial_inplace */
1156 0xffffffff, /* src_mask */
1157 0xffffffff, /* dst_mask */
1158 TRUE), /* pcrel_offset */
1159
1160 HOWTO (R_ARM_LDR_SB_G1, /* type */
1161 0, /* rightshift */
1162 2, /* size (0 = byte, 1 = short, 2 = long) */
1163 32, /* bitsize */
1164 TRUE, /* pc_relative */
1165 0, /* bitpos */
1166 complain_overflow_dont,/* complain_on_overflow */
1167 bfd_elf_generic_reloc, /* special_function */
1168 "R_ARM_LDR_SB_G1", /* name */
1169 FALSE, /* partial_inplace */
1170 0xffffffff, /* src_mask */
1171 0xffffffff, /* dst_mask */
1172 TRUE), /* pcrel_offset */
1173
1174 HOWTO (R_ARM_LDR_SB_G2, /* type */
1175 0, /* rightshift */
1176 2, /* size (0 = byte, 1 = short, 2 = long) */
1177 32, /* bitsize */
1178 TRUE, /* pc_relative */
1179 0, /* bitpos */
1180 complain_overflow_dont,/* complain_on_overflow */
1181 bfd_elf_generic_reloc, /* special_function */
1182 "R_ARM_LDR_SB_G2", /* name */
1183 FALSE, /* partial_inplace */
1184 0xffffffff, /* src_mask */
1185 0xffffffff, /* dst_mask */
1186 TRUE), /* pcrel_offset */
1187
1188 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1189 0, /* rightshift */
1190 2, /* size (0 = byte, 1 = short, 2 = long) */
1191 32, /* bitsize */
1192 TRUE, /* pc_relative */
1193 0, /* bitpos */
1194 complain_overflow_dont,/* complain_on_overflow */
1195 bfd_elf_generic_reloc, /* special_function */
1196 "R_ARM_LDRS_SB_G0", /* name */
1197 FALSE, /* partial_inplace */
1198 0xffffffff, /* src_mask */
1199 0xffffffff, /* dst_mask */
1200 TRUE), /* pcrel_offset */
1201
1202 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1203 0, /* rightshift */
1204 2, /* size (0 = byte, 1 = short, 2 = long) */
1205 32, /* bitsize */
1206 TRUE, /* pc_relative */
1207 0, /* bitpos */
1208 complain_overflow_dont,/* complain_on_overflow */
1209 bfd_elf_generic_reloc, /* special_function */
1210 "R_ARM_LDRS_SB_G1", /* name */
1211 FALSE, /* partial_inplace */
1212 0xffffffff, /* src_mask */
1213 0xffffffff, /* dst_mask */
1214 TRUE), /* pcrel_offset */
1215
1216 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1217 0, /* rightshift */
1218 2, /* size (0 = byte, 1 = short, 2 = long) */
1219 32, /* bitsize */
1220 TRUE, /* pc_relative */
1221 0, /* bitpos */
1222 complain_overflow_dont,/* complain_on_overflow */
1223 bfd_elf_generic_reloc, /* special_function */
1224 "R_ARM_LDRS_SB_G2", /* name */
1225 FALSE, /* partial_inplace */
1226 0xffffffff, /* src_mask */
1227 0xffffffff, /* dst_mask */
1228 TRUE), /* pcrel_offset */
1229
1230 HOWTO (R_ARM_LDC_SB_G0, /* type */
1231 0, /* rightshift */
1232 2, /* size (0 = byte, 1 = short, 2 = long) */
1233 32, /* bitsize */
1234 TRUE, /* pc_relative */
1235 0, /* bitpos */
1236 complain_overflow_dont,/* complain_on_overflow */
1237 bfd_elf_generic_reloc, /* special_function */
1238 "R_ARM_LDC_SB_G0", /* name */
1239 FALSE, /* partial_inplace */
1240 0xffffffff, /* src_mask */
1241 0xffffffff, /* dst_mask */
1242 TRUE), /* pcrel_offset */
1243
1244 HOWTO (R_ARM_LDC_SB_G1, /* type */
1245 0, /* rightshift */
1246 2, /* size (0 = byte, 1 = short, 2 = long) */
1247 32, /* bitsize */
1248 TRUE, /* pc_relative */
1249 0, /* bitpos */
1250 complain_overflow_dont,/* complain_on_overflow */
1251 bfd_elf_generic_reloc, /* special_function */
1252 "R_ARM_LDC_SB_G1", /* name */
1253 FALSE, /* partial_inplace */
1254 0xffffffff, /* src_mask */
1255 0xffffffff, /* dst_mask */
1256 TRUE), /* pcrel_offset */
1257
1258 HOWTO (R_ARM_LDC_SB_G2, /* type */
1259 0, /* rightshift */
1260 2, /* size (0 = byte, 1 = short, 2 = long) */
1261 32, /* bitsize */
1262 TRUE, /* pc_relative */
1263 0, /* bitpos */
1264 complain_overflow_dont,/* complain_on_overflow */
1265 bfd_elf_generic_reloc, /* special_function */
1266 "R_ARM_LDC_SB_G2", /* name */
1267 FALSE, /* partial_inplace */
1268 0xffffffff, /* src_mask */
1269 0xffffffff, /* dst_mask */
1270 TRUE), /* pcrel_offset */
1271
1272 /* End of group relocations. */
1273
1274 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1275 0, /* rightshift */
1276 2, /* size (0 = byte, 1 = short, 2 = long) */
1277 16, /* bitsize */
1278 FALSE, /* pc_relative */
1279 0, /* bitpos */
1280 complain_overflow_dont,/* complain_on_overflow */
1281 bfd_elf_generic_reloc, /* special_function */
1282 "R_ARM_MOVW_BREL_NC", /* name */
1283 FALSE, /* partial_inplace */
1284 0x0000ffff, /* src_mask */
1285 0x0000ffff, /* dst_mask */
1286 FALSE), /* pcrel_offset */
1287
1288 HOWTO (R_ARM_MOVT_BREL, /* type */
1289 0, /* rightshift */
1290 2, /* size (0 = byte, 1 = short, 2 = long) */
1291 16, /* bitsize */
1292 FALSE, /* pc_relative */
1293 0, /* bitpos */
1294 complain_overflow_bitfield,/* complain_on_overflow */
1295 bfd_elf_generic_reloc, /* special_function */
1296 "R_ARM_MOVT_BREL", /* name */
1297 FALSE, /* partial_inplace */
1298 0x0000ffff, /* src_mask */
1299 0x0000ffff, /* dst_mask */
1300 FALSE), /* pcrel_offset */
1301
1302 HOWTO (R_ARM_MOVW_BREL, /* type */
1303 0, /* rightshift */
1304 2, /* size (0 = byte, 1 = short, 2 = long) */
1305 16, /* bitsize */
1306 FALSE, /* pc_relative */
1307 0, /* bitpos */
1308 complain_overflow_dont,/* complain_on_overflow */
1309 bfd_elf_generic_reloc, /* special_function */
1310 "R_ARM_MOVW_BREL", /* name */
1311 FALSE, /* partial_inplace */
1312 0x0000ffff, /* src_mask */
1313 0x0000ffff, /* dst_mask */
1314 FALSE), /* pcrel_offset */
1315
1316 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1317 0, /* rightshift */
1318 2, /* size (0 = byte, 1 = short, 2 = long) */
1319 16, /* bitsize */
1320 FALSE, /* pc_relative */
1321 0, /* bitpos */
1322 complain_overflow_dont,/* complain_on_overflow */
1323 bfd_elf_generic_reloc, /* special_function */
1324 "R_ARM_THM_MOVW_BREL_NC",/* name */
1325 FALSE, /* partial_inplace */
1326 0x040f70ff, /* src_mask */
1327 0x040f70ff, /* dst_mask */
1328 FALSE), /* pcrel_offset */
1329
1330 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1331 0, /* rightshift */
1332 2, /* size (0 = byte, 1 = short, 2 = long) */
1333 16, /* bitsize */
1334 FALSE, /* pc_relative */
1335 0, /* bitpos */
1336 complain_overflow_bitfield,/* complain_on_overflow */
1337 bfd_elf_generic_reloc, /* special_function */
1338 "R_ARM_THM_MOVT_BREL", /* name */
1339 FALSE, /* partial_inplace */
1340 0x040f70ff, /* src_mask */
1341 0x040f70ff, /* dst_mask */
1342 FALSE), /* pcrel_offset */
1343
1344 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1345 0, /* rightshift */
1346 2, /* size (0 = byte, 1 = short, 2 = long) */
1347 16, /* bitsize */
1348 FALSE, /* pc_relative */
1349 0, /* bitpos */
1350 complain_overflow_dont,/* complain_on_overflow */
1351 bfd_elf_generic_reloc, /* special_function */
1352 "R_ARM_THM_MOVW_BREL", /* name */
1353 FALSE, /* partial_inplace */
1354 0x040f70ff, /* src_mask */
1355 0x040f70ff, /* dst_mask */
1356 FALSE), /* pcrel_offset */
1357
1358 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1359 0, /* rightshift */
1360 2, /* size (0 = byte, 1 = short, 2 = long) */
1361 32, /* bitsize */
1362 FALSE, /* pc_relative */
1363 0, /* bitpos */
1364 complain_overflow_bitfield,/* complain_on_overflow */
1365 NULL, /* special_function */
1366 "R_ARM_TLS_GOTDESC", /* name */
1367 TRUE, /* partial_inplace */
1368 0xffffffff, /* src_mask */
1369 0xffffffff, /* dst_mask */
1370 FALSE), /* pcrel_offset */
1371
1372 HOWTO (R_ARM_TLS_CALL, /* type */
1373 0, /* rightshift */
1374 2, /* size (0 = byte, 1 = short, 2 = long) */
1375 24, /* bitsize */
1376 FALSE, /* pc_relative */
1377 0, /* bitpos */
1378 complain_overflow_dont,/* complain_on_overflow */
1379 bfd_elf_generic_reloc, /* special_function */
1380 "R_ARM_TLS_CALL", /* name */
1381 FALSE, /* partial_inplace */
1382 0x00ffffff, /* src_mask */
1383 0x00ffffff, /* dst_mask */
1384 FALSE), /* pcrel_offset */
1385
1386 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1387 0, /* rightshift */
1388 2, /* size (0 = byte, 1 = short, 2 = long) */
1389 0, /* bitsize */
1390 FALSE, /* pc_relative */
1391 0, /* bitpos */
1392 complain_overflow_bitfield,/* complain_on_overflow */
1393 bfd_elf_generic_reloc, /* special_function */
1394 "R_ARM_TLS_DESCSEQ", /* name */
1395 FALSE, /* partial_inplace */
1396 0x00000000, /* src_mask */
1397 0x00000000, /* dst_mask */
1398 FALSE), /* pcrel_offset */
1399
1400 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1401 0, /* rightshift */
1402 2, /* size (0 = byte, 1 = short, 2 = long) */
1403 24, /* bitsize */
1404 FALSE, /* pc_relative */
1405 0, /* bitpos */
1406 complain_overflow_dont,/* complain_on_overflow */
1407 bfd_elf_generic_reloc, /* special_function */
1408 "R_ARM_THM_TLS_CALL", /* name */
1409 FALSE, /* partial_inplace */
1410 0x07ff07ff, /* src_mask */
1411 0x07ff07ff, /* dst_mask */
1412 FALSE), /* pcrel_offset */
1413
1414 HOWTO (R_ARM_PLT32_ABS, /* type */
1415 0, /* rightshift */
1416 2, /* size (0 = byte, 1 = short, 2 = long) */
1417 32, /* bitsize */
1418 FALSE, /* pc_relative */
1419 0, /* bitpos */
1420 complain_overflow_dont,/* complain_on_overflow */
1421 bfd_elf_generic_reloc, /* special_function */
1422 "R_ARM_PLT32_ABS", /* name */
1423 FALSE, /* partial_inplace */
1424 0xffffffff, /* src_mask */
1425 0xffffffff, /* dst_mask */
1426 FALSE), /* pcrel_offset */
1427
1428 HOWTO (R_ARM_GOT_ABS, /* type */
1429 0, /* rightshift */
1430 2, /* size (0 = byte, 1 = short, 2 = long) */
1431 32, /* bitsize */
1432 FALSE, /* pc_relative */
1433 0, /* bitpos */
1434 complain_overflow_dont,/* complain_on_overflow */
1435 bfd_elf_generic_reloc, /* special_function */
1436 "R_ARM_GOT_ABS", /* name */
1437 FALSE, /* partial_inplace */
1438 0xffffffff, /* src_mask */
1439 0xffffffff, /* dst_mask */
1440 FALSE), /* pcrel_offset */
1441
1442 HOWTO (R_ARM_GOT_PREL, /* type */
1443 0, /* rightshift */
1444 2, /* size (0 = byte, 1 = short, 2 = long) */
1445 32, /* bitsize */
1446 TRUE, /* pc_relative */
1447 0, /* bitpos */
1448 complain_overflow_dont, /* complain_on_overflow */
1449 bfd_elf_generic_reloc, /* special_function */
1450 "R_ARM_GOT_PREL", /* name */
1451 FALSE, /* partial_inplace */
1452 0xffffffff, /* src_mask */
1453 0xffffffff, /* dst_mask */
1454 TRUE), /* pcrel_offset */
1455
1456 HOWTO (R_ARM_GOT_BREL12, /* type */
1457 0, /* rightshift */
1458 2, /* size (0 = byte, 1 = short, 2 = long) */
1459 12, /* bitsize */
1460 FALSE, /* pc_relative */
1461 0, /* bitpos */
1462 complain_overflow_bitfield,/* complain_on_overflow */
1463 bfd_elf_generic_reloc, /* special_function */
1464 "R_ARM_GOT_BREL12", /* name */
1465 FALSE, /* partial_inplace */
1466 0x00000fff, /* src_mask */
1467 0x00000fff, /* dst_mask */
1468 FALSE), /* pcrel_offset */
1469
1470 HOWTO (R_ARM_GOTOFF12, /* type */
1471 0, /* rightshift */
1472 2, /* size (0 = byte, 1 = short, 2 = long) */
1473 12, /* bitsize */
1474 FALSE, /* pc_relative */
1475 0, /* bitpos */
1476 complain_overflow_bitfield,/* complain_on_overflow */
1477 bfd_elf_generic_reloc, /* special_function */
1478 "R_ARM_GOTOFF12", /* name */
1479 FALSE, /* partial_inplace */
1480 0x00000fff, /* src_mask */
1481 0x00000fff, /* dst_mask */
1482 FALSE), /* pcrel_offset */
1483
1484 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1485
1486 /* GNU extension to record C++ vtable member usage */
1487 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1488 0, /* rightshift */
1489 2, /* size (0 = byte, 1 = short, 2 = long) */
1490 0, /* bitsize */
1491 FALSE, /* pc_relative */
1492 0, /* bitpos */
1493 complain_overflow_dont, /* complain_on_overflow */
1494 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1495 "R_ARM_GNU_VTENTRY", /* name */
1496 FALSE, /* partial_inplace */
1497 0, /* src_mask */
1498 0, /* dst_mask */
1499 FALSE), /* pcrel_offset */
1500
1501 /* GNU extension to record C++ vtable hierarchy */
1502 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1503 0, /* rightshift */
1504 2, /* size (0 = byte, 1 = short, 2 = long) */
1505 0, /* bitsize */
1506 FALSE, /* pc_relative */
1507 0, /* bitpos */
1508 complain_overflow_dont, /* complain_on_overflow */
1509 NULL, /* special_function */
1510 "R_ARM_GNU_VTINHERIT", /* name */
1511 FALSE, /* partial_inplace */
1512 0, /* src_mask */
1513 0, /* dst_mask */
1514 FALSE), /* pcrel_offset */
1515
1516 HOWTO (R_ARM_THM_JUMP11, /* type */
1517 1, /* rightshift */
1518 1, /* size (0 = byte, 1 = short, 2 = long) */
1519 11, /* bitsize */
1520 TRUE, /* pc_relative */
1521 0, /* bitpos */
1522 complain_overflow_signed, /* complain_on_overflow */
1523 bfd_elf_generic_reloc, /* special_function */
1524 "R_ARM_THM_JUMP11", /* name */
1525 FALSE, /* partial_inplace */
1526 0x000007ff, /* src_mask */
1527 0x000007ff, /* dst_mask */
1528 TRUE), /* pcrel_offset */
1529
1530 HOWTO (R_ARM_THM_JUMP8, /* type */
1531 1, /* rightshift */
1532 1, /* size (0 = byte, 1 = short, 2 = long) */
1533 8, /* bitsize */
1534 TRUE, /* pc_relative */
1535 0, /* bitpos */
1536 complain_overflow_signed, /* complain_on_overflow */
1537 bfd_elf_generic_reloc, /* special_function */
1538 "R_ARM_THM_JUMP8", /* name */
1539 FALSE, /* partial_inplace */
1540 0x000000ff, /* src_mask */
1541 0x000000ff, /* dst_mask */
1542 TRUE), /* pcrel_offset */
1543
1544 /* TLS relocations */
1545 HOWTO (R_ARM_TLS_GD32, /* type */
1546 0, /* rightshift */
1547 2, /* size (0 = byte, 1 = short, 2 = long) */
1548 32, /* bitsize */
1549 FALSE, /* pc_relative */
1550 0, /* bitpos */
1551 complain_overflow_bitfield,/* complain_on_overflow */
1552 NULL, /* special_function */
1553 "R_ARM_TLS_GD32", /* name */
1554 TRUE, /* partial_inplace */
1555 0xffffffff, /* src_mask */
1556 0xffffffff, /* dst_mask */
1557 FALSE), /* pcrel_offset */
1558
1559 HOWTO (R_ARM_TLS_LDM32, /* type */
1560 0, /* rightshift */
1561 2, /* size (0 = byte, 1 = short, 2 = long) */
1562 32, /* bitsize */
1563 FALSE, /* pc_relative */
1564 0, /* bitpos */
1565 complain_overflow_bitfield,/* complain_on_overflow */
1566 bfd_elf_generic_reloc, /* special_function */
1567 "R_ARM_TLS_LDM32", /* name */
1568 TRUE, /* partial_inplace */
1569 0xffffffff, /* src_mask */
1570 0xffffffff, /* dst_mask */
1571 FALSE), /* pcrel_offset */
1572
1573 HOWTO (R_ARM_TLS_LDO32, /* type */
1574 0, /* rightshift */
1575 2, /* size (0 = byte, 1 = short, 2 = long) */
1576 32, /* bitsize */
1577 FALSE, /* pc_relative */
1578 0, /* bitpos */
1579 complain_overflow_bitfield,/* complain_on_overflow */
1580 bfd_elf_generic_reloc, /* special_function */
1581 "R_ARM_TLS_LDO32", /* name */
1582 TRUE, /* partial_inplace */
1583 0xffffffff, /* src_mask */
1584 0xffffffff, /* dst_mask */
1585 FALSE), /* pcrel_offset */
1586
1587 HOWTO (R_ARM_TLS_IE32, /* type */
1588 0, /* rightshift */
1589 2, /* size (0 = byte, 1 = short, 2 = long) */
1590 32, /* bitsize */
1591 FALSE, /* pc_relative */
1592 0, /* bitpos */
1593 complain_overflow_bitfield,/* complain_on_overflow */
1594 NULL, /* special_function */
1595 "R_ARM_TLS_IE32", /* name */
1596 TRUE, /* partial_inplace */
1597 0xffffffff, /* src_mask */
1598 0xffffffff, /* dst_mask */
1599 FALSE), /* pcrel_offset */
1600
1601 HOWTO (R_ARM_TLS_LE32, /* type */
1602 0, /* rightshift */
1603 2, /* size (0 = byte, 1 = short, 2 = long) */
1604 32, /* bitsize */
1605 FALSE, /* pc_relative */
1606 0, /* bitpos */
1607 complain_overflow_bitfield,/* complain_on_overflow */
1608 NULL, /* special_function */
1609 "R_ARM_TLS_LE32", /* name */
1610 TRUE, /* partial_inplace */
1611 0xffffffff, /* src_mask */
1612 0xffffffff, /* dst_mask */
1613 FALSE), /* pcrel_offset */
1614
1615 HOWTO (R_ARM_TLS_LDO12, /* type */
1616 0, /* rightshift */
1617 2, /* size (0 = byte, 1 = short, 2 = long) */
1618 12, /* bitsize */
1619 FALSE, /* pc_relative */
1620 0, /* bitpos */
1621 complain_overflow_bitfield,/* complain_on_overflow */
1622 bfd_elf_generic_reloc, /* special_function */
1623 "R_ARM_TLS_LDO12", /* name */
1624 FALSE, /* partial_inplace */
1625 0x00000fff, /* src_mask */
1626 0x00000fff, /* dst_mask */
1627 FALSE), /* pcrel_offset */
1628
1629 HOWTO (R_ARM_TLS_LE12, /* type */
1630 0, /* rightshift */
1631 2, /* size (0 = byte, 1 = short, 2 = long) */
1632 12, /* bitsize */
1633 FALSE, /* pc_relative */
1634 0, /* bitpos */
1635 complain_overflow_bitfield,/* complain_on_overflow */
1636 bfd_elf_generic_reloc, /* special_function */
1637 "R_ARM_TLS_LE12", /* name */
1638 FALSE, /* partial_inplace */
1639 0x00000fff, /* src_mask */
1640 0x00000fff, /* dst_mask */
1641 FALSE), /* pcrel_offset */
1642
1643 HOWTO (R_ARM_TLS_IE12GP, /* type */
1644 0, /* rightshift */
1645 2, /* size (0 = byte, 1 = short, 2 = long) */
1646 12, /* bitsize */
1647 FALSE, /* pc_relative */
1648 0, /* bitpos */
1649 complain_overflow_bitfield,/* complain_on_overflow */
1650 bfd_elf_generic_reloc, /* special_function */
1651 "R_ARM_TLS_IE12GP", /* name */
1652 FALSE, /* partial_inplace */
1653 0x00000fff, /* src_mask */
1654 0x00000fff, /* dst_mask */
1655 FALSE), /* pcrel_offset */
1656
1657 /* 112-127 private relocations. */
1658 EMPTY_HOWTO (112),
1659 EMPTY_HOWTO (113),
1660 EMPTY_HOWTO (114),
1661 EMPTY_HOWTO (115),
1662 EMPTY_HOWTO (116),
1663 EMPTY_HOWTO (117),
1664 EMPTY_HOWTO (118),
1665 EMPTY_HOWTO (119),
1666 EMPTY_HOWTO (120),
1667 EMPTY_HOWTO (121),
1668 EMPTY_HOWTO (122),
1669 EMPTY_HOWTO (123),
1670 EMPTY_HOWTO (124),
1671 EMPTY_HOWTO (125),
1672 EMPTY_HOWTO (126),
1673 EMPTY_HOWTO (127),
1674
1675 /* R_ARM_ME_TOO, obsolete. */
1676 EMPTY_HOWTO (128),
1677
1678 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1679 0, /* rightshift */
1680 1, /* size (0 = byte, 1 = short, 2 = long) */
1681 0, /* bitsize */
1682 FALSE, /* pc_relative */
1683 0, /* bitpos */
1684 complain_overflow_bitfield,/* complain_on_overflow */
1685 bfd_elf_generic_reloc, /* special_function */
1686 "R_ARM_THM_TLS_DESCSEQ",/* name */
1687 FALSE, /* partial_inplace */
1688 0x00000000, /* src_mask */
1689 0x00000000, /* dst_mask */
1690 FALSE), /* pcrel_offset */
1691 EMPTY_HOWTO (130),
1692 EMPTY_HOWTO (131),
1693 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1694 0, /* rightshift. */
1695 1, /* size (0 = byte, 1 = short, 2 = long). */
1696 16, /* bitsize. */
1697 FALSE, /* pc_relative. */
1698 0, /* bitpos. */
1699 complain_overflow_bitfield,/* complain_on_overflow. */
1700 bfd_elf_generic_reloc, /* special_function. */
1701 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1702 FALSE, /* partial_inplace. */
1703 0x00000000, /* src_mask. */
1704 0x00000000, /* dst_mask. */
1705 FALSE), /* pcrel_offset. */
1706 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1707 0, /* rightshift. */
1708 1, /* size (0 = byte, 1 = short, 2 = long). */
1709 16, /* bitsize. */
1710 FALSE, /* pc_relative. */
1711 0, /* bitpos. */
1712 complain_overflow_bitfield,/* complain_on_overflow. */
1713 bfd_elf_generic_reloc, /* special_function. */
1714 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1715 FALSE, /* partial_inplace. */
1716 0x00000000, /* src_mask. */
1717 0x00000000, /* dst_mask. */
1718 FALSE), /* pcrel_offset. */
1719 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1720 0, /* rightshift. */
1721 1, /* size (0 = byte, 1 = short, 2 = long). */
1722 16, /* bitsize. */
1723 FALSE, /* pc_relative. */
1724 0, /* bitpos. */
1725 complain_overflow_bitfield,/* complain_on_overflow. */
1726 bfd_elf_generic_reloc, /* special_function. */
1727 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1728 FALSE, /* partial_inplace. */
1729 0x00000000, /* src_mask. */
1730 0x00000000, /* dst_mask. */
1731 FALSE), /* pcrel_offset. */
1732 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1733 0, /* rightshift. */
1734 1, /* size (0 = byte, 1 = short, 2 = long). */
1735 16, /* bitsize. */
1736 FALSE, /* pc_relative. */
1737 0, /* bitpos. */
1738 complain_overflow_bitfield,/* complain_on_overflow. */
1739 bfd_elf_generic_reloc, /* special_function. */
1740 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1741 FALSE, /* partial_inplace. */
1742 0x00000000, /* src_mask. */
1743 0x00000000, /* dst_mask. */
1744 FALSE), /* pcrel_offset. */
1745 };
1746
1747 /* 160 onwards: */
1748 static reloc_howto_type elf32_arm_howto_table_2[8] =
1749 {
1750 HOWTO (R_ARM_IRELATIVE, /* type */
1751 0, /* rightshift */
1752 2, /* size (0 = byte, 1 = short, 2 = long) */
1753 32, /* bitsize */
1754 FALSE, /* pc_relative */
1755 0, /* bitpos */
1756 complain_overflow_bitfield,/* complain_on_overflow */
1757 bfd_elf_generic_reloc, /* special_function */
1758 "R_ARM_IRELATIVE", /* name */
1759 TRUE, /* partial_inplace */
1760 0xffffffff, /* src_mask */
1761 0xffffffff, /* dst_mask */
1762 FALSE), /* pcrel_offset */
1763 HOWTO (R_ARM_GOTFUNCDESC, /* type */
1764 0, /* rightshift */
1765 2, /* size (0 = byte, 1 = short, 2 = long) */
1766 32, /* bitsize */
1767 FALSE, /* pc_relative */
1768 0, /* bitpos */
1769 complain_overflow_bitfield,/* complain_on_overflow */
1770 bfd_elf_generic_reloc, /* special_function */
1771 "R_ARM_GOTFUNCDESC", /* name */
1772 FALSE, /* partial_inplace */
1773 0, /* src_mask */
1774 0xffffffff, /* dst_mask */
1775 FALSE), /* pcrel_offset */
1776 HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */
1777 0, /* rightshift */
1778 2, /* size (0 = byte, 1 = short, 2 = long) */
1779 32, /* bitsize */
1780 FALSE, /* pc_relative */
1781 0, /* bitpos */
1782 complain_overflow_bitfield,/* complain_on_overflow */
1783 bfd_elf_generic_reloc, /* special_function */
1784 "R_ARM_GOTOFFFUNCDESC",/* name */
1785 FALSE, /* partial_inplace */
1786 0, /* src_mask */
1787 0xffffffff, /* dst_mask */
1788 FALSE), /* pcrel_offset */
1789 HOWTO (R_ARM_FUNCDESC, /* type */
1790 0, /* rightshift */
1791 2, /* size (0 = byte, 1 = short, 2 = long) */
1792 32, /* bitsize */
1793 FALSE, /* pc_relative */
1794 0, /* bitpos */
1795 complain_overflow_bitfield,/* complain_on_overflow */
1796 bfd_elf_generic_reloc, /* special_function */
1797 "R_ARM_FUNCDESC", /* name */
1798 FALSE, /* partial_inplace */
1799 0, /* src_mask */
1800 0xffffffff, /* dst_mask */
1801 FALSE), /* pcrel_offset */
1802 HOWTO (R_ARM_FUNCDESC_VALUE, /* type */
1803 0, /* rightshift */
1804 2, /* size (0 = byte, 1 = short, 2 = long) */
1805 64, /* bitsize */
1806 FALSE, /* pc_relative */
1807 0, /* bitpos */
1808 complain_overflow_bitfield,/* complain_on_overflow */
1809 bfd_elf_generic_reloc, /* special_function */
1810 "R_ARM_FUNCDESC_VALUE",/* name */
1811 FALSE, /* partial_inplace */
1812 0, /* src_mask */
1813 0xffffffff, /* dst_mask */
1814 FALSE), /* pcrel_offset */
1815 HOWTO (R_ARM_TLS_GD32_FDPIC, /* type */
1816 0, /* rightshift */
1817 2, /* size (0 = byte, 1 = short, 2 = long) */
1818 32, /* bitsize */
1819 FALSE, /* pc_relative */
1820 0, /* bitpos */
1821 complain_overflow_bitfield,/* complain_on_overflow */
1822 bfd_elf_generic_reloc, /* special_function */
1823 "R_ARM_TLS_GD32_FDPIC",/* name */
1824 FALSE, /* partial_inplace */
1825 0, /* src_mask */
1826 0xffffffff, /* dst_mask */
1827 FALSE), /* pcrel_offset */
1828 HOWTO (R_ARM_TLS_LDM32_FDPIC, /* type */
1829 0, /* rightshift */
1830 2, /* size (0 = byte, 1 = short, 2 = long) */
1831 32, /* bitsize */
1832 FALSE, /* pc_relative */
1833 0, /* bitpos */
1834 complain_overflow_bitfield,/* complain_on_overflow */
1835 bfd_elf_generic_reloc, /* special_function */
1836 "R_ARM_TLS_LDM32_FDPIC",/* name */
1837 FALSE, /* partial_inplace */
1838 0, /* src_mask */
1839 0xffffffff, /* dst_mask */
1840 FALSE), /* pcrel_offset */
1841 HOWTO (R_ARM_TLS_IE32_FDPIC, /* type */
1842 0, /* rightshift */
1843 2, /* size (0 = byte, 1 = short, 2 = long) */
1844 32, /* bitsize */
1845 FALSE, /* pc_relative */
1846 0, /* bitpos */
1847 complain_overflow_bitfield,/* complain_on_overflow */
1848 bfd_elf_generic_reloc, /* special_function */
1849 "R_ARM_TLS_IE32_FDPIC",/* name */
1850 FALSE, /* partial_inplace */
1851 0, /* src_mask */
1852 0xffffffff, /* dst_mask */
1853 FALSE), /* pcrel_offset */
1854 };
1855
1856 /* 249-255 extended, currently unused, relocations: */
1857 static reloc_howto_type elf32_arm_howto_table_3[4] =
1858 {
1859 HOWTO (R_ARM_RREL32, /* type */
1860 0, /* rightshift */
1861 0, /* size (0 = byte, 1 = short, 2 = long) */
1862 0, /* bitsize */
1863 FALSE, /* pc_relative */
1864 0, /* bitpos */
1865 complain_overflow_dont,/* complain_on_overflow */
1866 bfd_elf_generic_reloc, /* special_function */
1867 "R_ARM_RREL32", /* name */
1868 FALSE, /* partial_inplace */
1869 0, /* src_mask */
1870 0, /* dst_mask */
1871 FALSE), /* pcrel_offset */
1872
1873 HOWTO (R_ARM_RABS32, /* type */
1874 0, /* rightshift */
1875 0, /* size (0 = byte, 1 = short, 2 = long) */
1876 0, /* bitsize */
1877 FALSE, /* pc_relative */
1878 0, /* bitpos */
1879 complain_overflow_dont,/* complain_on_overflow */
1880 bfd_elf_generic_reloc, /* special_function */
1881 "R_ARM_RABS32", /* name */
1882 FALSE, /* partial_inplace */
1883 0, /* src_mask */
1884 0, /* dst_mask */
1885 FALSE), /* pcrel_offset */
1886
1887 HOWTO (R_ARM_RPC24, /* type */
1888 0, /* rightshift */
1889 0, /* size (0 = byte, 1 = short, 2 = long) */
1890 0, /* bitsize */
1891 FALSE, /* pc_relative */
1892 0, /* bitpos */
1893 complain_overflow_dont,/* complain_on_overflow */
1894 bfd_elf_generic_reloc, /* special_function */
1895 "R_ARM_RPC24", /* name */
1896 FALSE, /* partial_inplace */
1897 0, /* src_mask */
1898 0, /* dst_mask */
1899 FALSE), /* pcrel_offset */
1900
1901 HOWTO (R_ARM_RBASE, /* type */
1902 0, /* rightshift */
1903 0, /* size (0 = byte, 1 = short, 2 = long) */
1904 0, /* bitsize */
1905 FALSE, /* pc_relative */
1906 0, /* bitpos */
1907 complain_overflow_dont,/* complain_on_overflow */
1908 bfd_elf_generic_reloc, /* special_function */
1909 "R_ARM_RBASE", /* name */
1910 FALSE, /* partial_inplace */
1911 0, /* src_mask */
1912 0, /* dst_mask */
1913 FALSE) /* pcrel_offset */
1914 };
1915
1916 static reloc_howto_type *
1917 elf32_arm_howto_from_type (unsigned int r_type)
1918 {
1919 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1920 return &elf32_arm_howto_table_1[r_type];
1921
1922 if (r_type >= R_ARM_IRELATIVE
1923 && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2))
1924 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1925
1926 if (r_type >= R_ARM_RREL32
1927 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1928 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1929
1930 return NULL;
1931 }
1932
1933 static bfd_boolean
1934 elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc,
1935 Elf_Internal_Rela * elf_reloc)
1936 {
1937 unsigned int r_type;
1938
1939 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1940 if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL)
1941 {
1942 /* xgettext:c-format */
1943 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1944 abfd, r_type);
1945 bfd_set_error (bfd_error_bad_value);
1946 return FALSE;
1947 }
1948 return TRUE;
1949 }
1950
1951 struct elf32_arm_reloc_map
1952 {
1953 bfd_reloc_code_real_type bfd_reloc_val;
1954 unsigned char elf_reloc_val;
1955 };
1956
1957 /* All entries in this list must also be present in elf32_arm_howto_table. */
1958 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1959 {
1960 {BFD_RELOC_NONE, R_ARM_NONE},
1961 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1962 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1963 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1964 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1965 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1966 {BFD_RELOC_32, R_ARM_ABS32},
1967 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1968 {BFD_RELOC_8, R_ARM_ABS8},
1969 {BFD_RELOC_16, R_ARM_ABS16},
1970 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1971 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1972 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1973 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1974 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1975 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1976 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1977 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1978 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1979 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1980 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1981 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1982 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1983 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1984 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1985 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1986 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1987 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1988 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1989 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1990 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1991 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1992 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1993 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1994 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1995 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1996 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1997 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1998 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1999 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
2000 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
2001 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
2002 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
2003 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
2004 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
2005 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
2006 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
2007 {BFD_RELOC_ARM_GOTFUNCDESC, R_ARM_GOTFUNCDESC},
2008 {BFD_RELOC_ARM_GOTOFFFUNCDESC, R_ARM_GOTOFFFUNCDESC},
2009 {BFD_RELOC_ARM_FUNCDESC, R_ARM_FUNCDESC},
2010 {BFD_RELOC_ARM_FUNCDESC_VALUE, R_ARM_FUNCDESC_VALUE},
2011 {BFD_RELOC_ARM_TLS_GD32_FDPIC, R_ARM_TLS_GD32_FDPIC},
2012 {BFD_RELOC_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_LDM32_FDPIC},
2013 {BFD_RELOC_ARM_TLS_IE32_FDPIC, R_ARM_TLS_IE32_FDPIC},
2014 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
2015 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
2016 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
2017 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
2018 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
2019 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
2020 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
2021 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
2022 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
2023 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
2024 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
2025 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
2026 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
2027 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
2028 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
2029 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
2030 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
2031 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
2032 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
2033 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
2034 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
2035 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
2036 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
2037 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
2038 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
2039 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
2040 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
2041 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
2042 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
2043 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
2044 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
2045 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
2046 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
2047 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
2048 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
2049 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
2050 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
2051 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
2052 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
2053 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
2054 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
2055 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
2056 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
2057 };
2058
2059 static reloc_howto_type *
2060 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2061 bfd_reloc_code_real_type code)
2062 {
2063 unsigned int i;
2064
2065 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
2066 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
2067 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
2068
2069 return NULL;
2070 }
2071
2072 static reloc_howto_type *
2073 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2074 const char *r_name)
2075 {
2076 unsigned int i;
2077
2078 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
2079 if (elf32_arm_howto_table_1[i].name != NULL
2080 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
2081 return &elf32_arm_howto_table_1[i];
2082
2083 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
2084 if (elf32_arm_howto_table_2[i].name != NULL
2085 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
2086 return &elf32_arm_howto_table_2[i];
2087
2088 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
2089 if (elf32_arm_howto_table_3[i].name != NULL
2090 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
2091 return &elf32_arm_howto_table_3[i];
2092
2093 return NULL;
2094 }
2095
2096 /* Support for core dump NOTE sections. */
2097
2098 static bfd_boolean
2099 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2100 {
2101 int offset;
2102 size_t size;
2103
2104 switch (note->descsz)
2105 {
2106 default:
2107 return FALSE;
2108
2109 case 148: /* Linux/ARM 32-bit. */
2110 /* pr_cursig */
2111 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2112
2113 /* pr_pid */
2114 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2115
2116 /* pr_reg */
2117 offset = 72;
2118 size = 72;
2119
2120 break;
2121 }
2122
2123 /* Make a ".reg/999" section. */
2124 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2125 size, note->descpos + offset);
2126 }
2127
2128 static bfd_boolean
2129 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2130 {
2131 switch (note->descsz)
2132 {
2133 default:
2134 return FALSE;
2135
2136 case 124: /* Linux/ARM elf_prpsinfo. */
2137 elf_tdata (abfd)->core->pid
2138 = bfd_get_32 (abfd, note->descdata + 12);
2139 elf_tdata (abfd)->core->program
2140 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2141 elf_tdata (abfd)->core->command
2142 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2143 }
2144
2145 /* Note that for some reason, a spurious space is tacked
2146 onto the end of the args in some (at least one anyway)
2147 implementations, so strip it off if it exists. */
2148 {
2149 char *command = elf_tdata (abfd)->core->command;
2150 int n = strlen (command);
2151
2152 if (0 < n && command[n - 1] == ' ')
2153 command[n - 1] = '\0';
2154 }
2155
2156 return TRUE;
2157 }
2158
2159 static char *
2160 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2161 int note_type, ...)
2162 {
2163 switch (note_type)
2164 {
2165 default:
2166 return NULL;
2167
2168 case NT_PRPSINFO:
2169 {
2170 char data[124] ATTRIBUTE_NONSTRING;
2171 va_list ap;
2172
2173 va_start (ap, note_type);
2174 memset (data, 0, sizeof (data));
2175 strncpy (data + 28, va_arg (ap, const char *), 16);
2176 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2177 DIAGNOSTIC_PUSH;
2178 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
2179 -Wstringop-truncation:
2180 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
2181 */
2182 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
2183 #endif
2184 strncpy (data + 44, va_arg (ap, const char *), 80);
2185 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2186 DIAGNOSTIC_POP;
2187 #endif
2188 va_end (ap);
2189
2190 return elfcore_write_note (abfd, buf, bufsiz,
2191 "CORE", note_type, data, sizeof (data));
2192 }
2193
2194 case NT_PRSTATUS:
2195 {
2196 char data[148];
2197 va_list ap;
2198 long pid;
2199 int cursig;
2200 const void *greg;
2201
2202 va_start (ap, note_type);
2203 memset (data, 0, sizeof (data));
2204 pid = va_arg (ap, long);
2205 bfd_put_32 (abfd, pid, data + 24);
2206 cursig = va_arg (ap, int);
2207 bfd_put_16 (abfd, cursig, data + 12);
2208 greg = va_arg (ap, const void *);
2209 memcpy (data + 72, greg, 72);
2210 va_end (ap);
2211
2212 return elfcore_write_note (abfd, buf, bufsiz,
2213 "CORE", note_type, data, sizeof (data));
2214 }
2215 }
2216 }
2217
2218 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2219 #define TARGET_LITTLE_NAME "elf32-littlearm"
2220 #define TARGET_BIG_SYM arm_elf32_be_vec
2221 #define TARGET_BIG_NAME "elf32-bigarm"
2222
2223 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2224 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2225 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2226
2227 typedef unsigned long int insn32;
2228 typedef unsigned short int insn16;
2229
2230 /* In lieu of proper flags, assume all EABIv4 or later objects are
2231 interworkable. */
2232 #define INTERWORK_FLAG(abfd) \
2233 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2234 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2235 || ((abfd)->flags & BFD_LINKER_CREATED))
2236
2237 /* The linker script knows the section names for placement.
2238 The entry_names are used to do simple name mangling on the stubs.
2239 Given a function name, and its type, the stub can be found. The
2240 name can be changed. The only requirement is the %s be present. */
2241 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2242 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2243
2244 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2245 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2246
2247 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2248 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2249
2250 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2251 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2252
2253 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2254 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2255
2256 #define STUB_ENTRY_NAME "__%s_veneer"
2257
2258 #define CMSE_PREFIX "__acle_se_"
2259
2260 /* The name of the dynamic interpreter. This is put in the .interp
2261 section. */
2262 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2263
2264 /* FDPIC default stack size. */
2265 #define DEFAULT_STACK_SIZE 0x8000
2266
2267 static const unsigned long tls_trampoline [] =
2268 {
2269 0xe08e0000, /* add r0, lr, r0 */
2270 0xe5901004, /* ldr r1, [r0,#4] */
2271 0xe12fff11, /* bx r1 */
2272 };
2273
2274 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2275 {
2276 0xe52d2004, /* push {r2} */
2277 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2278 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2279 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2280 0xe081100f, /* 2: add r1, pc */
2281 0xe12fff12, /* bx r2 */
2282 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2283 + dl_tlsdesc_lazy_resolver(GOT) */
2284 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2285 };
2286
2287 /* ARM FDPIC PLT entry. */
2288 /* The last 5 words contain PLT lazy fragment code and data. */
2289 static const bfd_vma elf32_arm_fdpic_plt_entry [] =
2290 {
2291 0xe59fc008, /* ldr r12, .L1 */
2292 0xe08cc009, /* add r12, r12, r9 */
2293 0xe59c9004, /* ldr r9, [r12, #4] */
2294 0xe59cf000, /* ldr pc, [r12] */
2295 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */
2296 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */
2297 0xe51fc00c, /* ldr r12, [pc, #-12] */
2298 0xe92d1000, /* push {r12} */
2299 0xe599c004, /* ldr r12, [r9, #4] */
2300 0xe599f000, /* ldr pc, [r9] */
2301 };
2302
2303 /* Thumb FDPIC PLT entry. */
2304 /* The last 5 words contain PLT lazy fragment code and data. */
2305 static const bfd_vma elf32_arm_fdpic_thumb_plt_entry [] =
2306 {
2307 0xc00cf8df, /* ldr.w r12, .L1 */
2308 0x0c09eb0c, /* add.w r12, r12, r9 */
2309 0x9004f8dc, /* ldr.w r9, [r12, #4] */
2310 0xf000f8dc, /* ldr.w pc, [r12] */
2311 0x00000000, /* .L1 .word foo(GOTOFFFUNCDESC) */
2312 0x00000000, /* .L2 .word foo(funcdesc_value_reloc_offset) */
2313 0xc008f85f, /* ldr.w r12, .L2 */
2314 0xcd04f84d, /* push {r12} */
2315 0xc004f8d9, /* ldr.w r12, [r9, #4] */
2316 0xf000f8d9, /* ldr.w pc, [r9] */
2317 };
2318
2319 #ifdef FOUR_WORD_PLT
2320
2321 /* The first entry in a procedure linkage table looks like
2322 this. It is set up so that any shared library function that is
2323 called before the relocation has been set up calls the dynamic
2324 linker first. */
2325 static const bfd_vma elf32_arm_plt0_entry [] =
2326 {
2327 0xe52de004, /* str lr, [sp, #-4]! */
2328 0xe59fe010, /* ldr lr, [pc, #16] */
2329 0xe08fe00e, /* add lr, pc, lr */
2330 0xe5bef008, /* ldr pc, [lr, #8]! */
2331 };
2332
2333 /* Subsequent entries in a procedure linkage table look like
2334 this. */
2335 static const bfd_vma elf32_arm_plt_entry [] =
2336 {
2337 0xe28fc600, /* add ip, pc, #NN */
2338 0xe28cca00, /* add ip, ip, #NN */
2339 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2340 0x00000000, /* unused */
2341 };
2342
2343 #else /* not FOUR_WORD_PLT */
2344
2345 /* The first entry in a procedure linkage table looks like
2346 this. It is set up so that any shared library function that is
2347 called before the relocation has been set up calls the dynamic
2348 linker first. */
2349 static const bfd_vma elf32_arm_plt0_entry [] =
2350 {
2351 0xe52de004, /* str lr, [sp, #-4]! */
2352 0xe59fe004, /* ldr lr, [pc, #4] */
2353 0xe08fe00e, /* add lr, pc, lr */
2354 0xe5bef008, /* ldr pc, [lr, #8]! */
2355 0x00000000, /* &GOT[0] - . */
2356 };
2357
2358 /* By default subsequent entries in a procedure linkage table look like
2359 this. Offsets that don't fit into 28 bits will cause link error. */
2360 static const bfd_vma elf32_arm_plt_entry_short [] =
2361 {
2362 0xe28fc600, /* add ip, pc, #0xNN00000 */
2363 0xe28cca00, /* add ip, ip, #0xNN000 */
2364 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2365 };
2366
2367 /* When explicitly asked, we'll use this "long" entry format
2368 which can cope with arbitrary displacements. */
2369 static const bfd_vma elf32_arm_plt_entry_long [] =
2370 {
2371 0xe28fc200, /* add ip, pc, #0xN0000000 */
2372 0xe28cc600, /* add ip, ip, #0xNN00000 */
2373 0xe28cca00, /* add ip, ip, #0xNN000 */
2374 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2375 };
2376
2377 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2378
2379 #endif /* not FOUR_WORD_PLT */
2380
2381 /* The first entry in a procedure linkage table looks like this.
2382 It is set up so that any shared library function that is called before the
2383 relocation has been set up calls the dynamic linker first. */
2384 static const bfd_vma elf32_thumb2_plt0_entry [] =
2385 {
2386 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2387 an instruction maybe encoded to one or two array elements. */
2388 0xf8dfb500, /* push {lr} */
2389 0x44fee008, /* ldr.w lr, [pc, #8] */
2390 /* add lr, pc */
2391 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2392 0x00000000, /* &GOT[0] - . */
2393 };
2394
2395 /* Subsequent entries in a procedure linkage table for thumb only target
2396 look like this. */
2397 static const bfd_vma elf32_thumb2_plt_entry [] =
2398 {
2399 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2400 an instruction maybe encoded to one or two array elements. */
2401 0x0c00f240, /* movw ip, #0xNNNN */
2402 0x0c00f2c0, /* movt ip, #0xNNNN */
2403 0xf8dc44fc, /* add ip, pc */
2404 0xbf00f000 /* ldr.w pc, [ip] */
2405 /* nop */
2406 };
2407
2408 /* The format of the first entry in the procedure linkage table
2409 for a VxWorks executable. */
2410 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2411 {
2412 0xe52dc008, /* str ip,[sp,#-8]! */
2413 0xe59fc000, /* ldr ip,[pc] */
2414 0xe59cf008, /* ldr pc,[ip,#8] */
2415 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2416 };
2417
2418 /* The format of subsequent entries in a VxWorks executable. */
2419 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2420 {
2421 0xe59fc000, /* ldr ip,[pc] */
2422 0xe59cf000, /* ldr pc,[ip] */
2423 0x00000000, /* .long @got */
2424 0xe59fc000, /* ldr ip,[pc] */
2425 0xea000000, /* b _PLT */
2426 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2427 };
2428
2429 /* The format of entries in a VxWorks shared library. */
2430 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2431 {
2432 0xe59fc000, /* ldr ip,[pc] */
2433 0xe79cf009, /* ldr pc,[ip,r9] */
2434 0x00000000, /* .long @got */
2435 0xe59fc000, /* ldr ip,[pc] */
2436 0xe599f008, /* ldr pc,[r9,#8] */
2437 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2438 };
2439
2440 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2441 #define PLT_THUMB_STUB_SIZE 4
2442 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2443 {
2444 0x4778, /* bx pc */
2445 0x46c0 /* nop */
2446 };
2447
2448 /* The entries in a PLT when using a DLL-based target with multiple
2449 address spaces. */
2450 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2451 {
2452 0xe51ff004, /* ldr pc, [pc, #-4] */
2453 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2454 };
2455
2456 /* The first entry in a procedure linkage table looks like
2457 this. It is set up so that any shared library function that is
2458 called before the relocation has been set up calls the dynamic
2459 linker first. */
2460 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2461 {
2462 /* First bundle: */
2463 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2464 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2465 0xe08cc00f, /* add ip, ip, pc */
2466 0xe52dc008, /* str ip, [sp, #-8]! */
2467 /* Second bundle: */
2468 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2469 0xe59cc000, /* ldr ip, [ip] */
2470 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2471 0xe12fff1c, /* bx ip */
2472 /* Third bundle: */
2473 0xe320f000, /* nop */
2474 0xe320f000, /* nop */
2475 0xe320f000, /* nop */
2476 /* .Lplt_tail: */
2477 0xe50dc004, /* str ip, [sp, #-4] */
2478 /* Fourth bundle: */
2479 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2480 0xe59cc000, /* ldr ip, [ip] */
2481 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2482 0xe12fff1c, /* bx ip */
2483 };
2484 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2485
2486 /* Subsequent entries in a procedure linkage table look like this. */
2487 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2488 {
2489 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2490 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2491 0xe08cc00f, /* add ip, ip, pc */
2492 0xea000000, /* b .Lplt_tail */
2493 };
2494
2495 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2496 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2497 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2498 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2499 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2500 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2501 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2502 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2503
2504 enum stub_insn_type
2505 {
2506 THUMB16_TYPE = 1,
2507 THUMB32_TYPE,
2508 ARM_TYPE,
2509 DATA_TYPE
2510 };
2511
2512 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2513 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2514 is inserted in arm_build_one_stub(). */
2515 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2516 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2517 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2518 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2519 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2520 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2521 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2522 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2523
2524 typedef struct
2525 {
2526 bfd_vma data;
2527 enum stub_insn_type type;
2528 unsigned int r_type;
2529 int reloc_addend;
2530 } insn_sequence;
2531
2532 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2533 to reach the stub if necessary. */
2534 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2535 {
2536 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2537 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2538 };
2539
2540 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2541 available. */
2542 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2543 {
2544 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2545 ARM_INSN (0xe12fff1c), /* bx ip */
2546 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2547 };
2548
2549 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2550 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2551 {
2552 THUMB16_INSN (0xb401), /* push {r0} */
2553 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2554 THUMB16_INSN (0x4684), /* mov ip, r0 */
2555 THUMB16_INSN (0xbc01), /* pop {r0} */
2556 THUMB16_INSN (0x4760), /* bx ip */
2557 THUMB16_INSN (0xbf00), /* nop */
2558 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2559 };
2560
2561 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2562 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2563 {
2564 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2565 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2566 };
2567
2568 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2569 M-profile architectures. */
2570 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2571 {
2572 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2573 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2574 THUMB16_INSN (0x4760), /* bx ip */
2575 };
2576
2577 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2578 allowed. */
2579 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2580 {
2581 THUMB16_INSN (0x4778), /* bx pc */
2582 THUMB16_INSN (0x46c0), /* nop */
2583 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2584 ARM_INSN (0xe12fff1c), /* bx ip */
2585 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2586 };
2587
2588 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2589 available. */
2590 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2591 {
2592 THUMB16_INSN (0x4778), /* bx pc */
2593 THUMB16_INSN (0x46c0), /* nop */
2594 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2595 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2596 };
2597
2598 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2599 one, when the destination is close enough. */
2600 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2601 {
2602 THUMB16_INSN (0x4778), /* bx pc */
2603 THUMB16_INSN (0x46c0), /* nop */
2604 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2605 };
2606
2607 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2608 blx to reach the stub if necessary. */
2609 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2610 {
2611 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2612 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2613 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2614 };
2615
2616 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2617 blx to reach the stub if necessary. We can not add into pc;
2618 it is not guaranteed to mode switch (different in ARMv6 and
2619 ARMv7). */
2620 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2621 {
2622 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2623 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2624 ARM_INSN (0xe12fff1c), /* bx ip */
2625 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2626 };
2627
2628 /* V4T ARM -> ARM long branch stub, PIC. */
2629 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2630 {
2631 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2632 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2633 ARM_INSN (0xe12fff1c), /* bx ip */
2634 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2635 };
2636
2637 /* V4T Thumb -> ARM long branch stub, PIC. */
2638 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2639 {
2640 THUMB16_INSN (0x4778), /* bx pc */
2641 THUMB16_INSN (0x46c0), /* nop */
2642 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2643 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2644 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2645 };
2646
2647 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2648 architectures. */
2649 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2650 {
2651 THUMB16_INSN (0xb401), /* push {r0} */
2652 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2653 THUMB16_INSN (0x46fc), /* mov ip, pc */
2654 THUMB16_INSN (0x4484), /* add ip, r0 */
2655 THUMB16_INSN (0xbc01), /* pop {r0} */
2656 THUMB16_INSN (0x4760), /* bx ip */
2657 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2658 };
2659
2660 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2661 allowed. */
2662 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2663 {
2664 THUMB16_INSN (0x4778), /* bx pc */
2665 THUMB16_INSN (0x46c0), /* nop */
2666 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2667 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2668 ARM_INSN (0xe12fff1c), /* bx ip */
2669 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2670 };
2671
2672 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2673 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2674 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2675 {
2676 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2677 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2678 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2679 };
2680
2681 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2682 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2683 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2684 {
2685 THUMB16_INSN (0x4778), /* bx pc */
2686 THUMB16_INSN (0x46c0), /* nop */
2687 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2688 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2689 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2690 };
2691
2692 /* NaCl ARM -> ARM long branch stub. */
2693 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2694 {
2695 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2696 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2697 ARM_INSN (0xe12fff1c), /* bx ip */
2698 ARM_INSN (0xe320f000), /* nop */
2699 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2700 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2701 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2702 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2703 };
2704
2705 /* NaCl ARM -> ARM long branch stub, PIC. */
2706 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2707 {
2708 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2709 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2710 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2711 ARM_INSN (0xe12fff1c), /* bx ip */
2712 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2713 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2714 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2715 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2716 };
2717
2718 /* Stub used for transition to secure state (aka SG veneer). */
2719 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2720 {
2721 THUMB32_INSN (0xe97fe97f), /* sg. */
2722 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2723 };
2724
2725
2726 /* Cortex-A8 erratum-workaround stubs. */
2727
2728 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2729 can't use a conditional branch to reach this stub). */
2730
2731 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2732 {
2733 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2734 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2735 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2736 };
2737
2738 /* Stub used for b.w and bl.w instructions. */
2739
2740 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2741 {
2742 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2743 };
2744
2745 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2746 {
2747 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2748 };
2749
2750 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2751 instruction (which switches to ARM mode) to point to this stub. Jump to the
2752 real destination using an ARM-mode branch. */
2753
2754 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2755 {
2756 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2757 };
2758
2759 /* For each section group there can be a specially created linker section
2760 to hold the stubs for that group. The name of the stub section is based
2761 upon the name of another section within that group with the suffix below
2762 applied.
2763
2764 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2765 create what appeared to be a linker stub section when it actually
2766 contained user code/data. For example, consider this fragment:
2767
2768 const char * stubborn_problems[] = { "np" };
2769
2770 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2771 section called:
2772
2773 .data.rel.local.stubborn_problems
2774
2775 This then causes problems in arm32_arm_build_stubs() as it triggers:
2776
2777 // Ignore non-stub sections.
2778 if (!strstr (stub_sec->name, STUB_SUFFIX))
2779 continue;
2780
2781 And so the section would be ignored instead of being processed. Hence
2782 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2783 C identifier. */
2784 #define STUB_SUFFIX ".__stub"
2785
2786 /* One entry per long/short branch stub defined above. */
2787 #define DEF_STUBS \
2788 DEF_STUB(long_branch_any_any) \
2789 DEF_STUB(long_branch_v4t_arm_thumb) \
2790 DEF_STUB(long_branch_thumb_only) \
2791 DEF_STUB(long_branch_v4t_thumb_thumb) \
2792 DEF_STUB(long_branch_v4t_thumb_arm) \
2793 DEF_STUB(short_branch_v4t_thumb_arm) \
2794 DEF_STUB(long_branch_any_arm_pic) \
2795 DEF_STUB(long_branch_any_thumb_pic) \
2796 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2797 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2798 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2799 DEF_STUB(long_branch_thumb_only_pic) \
2800 DEF_STUB(long_branch_any_tls_pic) \
2801 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2802 DEF_STUB(long_branch_arm_nacl) \
2803 DEF_STUB(long_branch_arm_nacl_pic) \
2804 DEF_STUB(cmse_branch_thumb_only) \
2805 DEF_STUB(a8_veneer_b_cond) \
2806 DEF_STUB(a8_veneer_b) \
2807 DEF_STUB(a8_veneer_bl) \
2808 DEF_STUB(a8_veneer_blx) \
2809 DEF_STUB(long_branch_thumb2_only) \
2810 DEF_STUB(long_branch_thumb2_only_pure)
2811
2812 #define DEF_STUB(x) arm_stub_##x,
2813 enum elf32_arm_stub_type
2814 {
2815 arm_stub_none,
2816 DEF_STUBS
2817 max_stub_type
2818 };
2819 #undef DEF_STUB
2820
2821 /* Note the first a8_veneer type. */
2822 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2823
2824 typedef struct
2825 {
2826 const insn_sequence* template_sequence;
2827 int template_size;
2828 } stub_def;
2829
2830 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2831 static const stub_def stub_definitions[] =
2832 {
2833 {NULL, 0},
2834 DEF_STUBS
2835 };
2836
2837 struct elf32_arm_stub_hash_entry
2838 {
2839 /* Base hash table entry structure. */
2840 struct bfd_hash_entry root;
2841
2842 /* The stub section. */
2843 asection *stub_sec;
2844
2845 /* Offset within stub_sec of the beginning of this stub. */
2846 bfd_vma stub_offset;
2847
2848 /* Given the symbol's value and its section we can determine its final
2849 value when building the stubs (so the stub knows where to jump). */
2850 bfd_vma target_value;
2851 asection *target_section;
2852
2853 /* Same as above but for the source of the branch to the stub. Used for
2854 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2855 such, source section does not need to be recorded since Cortex-A8 erratum
2856 workaround stubs are only generated when both source and target are in the
2857 same section. */
2858 bfd_vma source_value;
2859
2860 /* The instruction which caused this stub to be generated (only valid for
2861 Cortex-A8 erratum workaround stubs at present). */
2862 unsigned long orig_insn;
2863
2864 /* The stub type. */
2865 enum elf32_arm_stub_type stub_type;
2866 /* Its encoding size in bytes. */
2867 int stub_size;
2868 /* Its template. */
2869 const insn_sequence *stub_template;
2870 /* The size of the template (number of entries). */
2871 int stub_template_size;
2872
2873 /* The symbol table entry, if any, that this was derived from. */
2874 struct elf32_arm_link_hash_entry *h;
2875
2876 /* Type of branch. */
2877 enum arm_st_branch_type branch_type;
2878
2879 /* Where this stub is being called from, or, in the case of combined
2880 stub sections, the first input section in the group. */
2881 asection *id_sec;
2882
2883 /* The name for the local symbol at the start of this stub. The
2884 stub name in the hash table has to be unique; this does not, so
2885 it can be friendlier. */
2886 char *output_name;
2887 };
2888
2889 /* Used to build a map of a section. This is required for mixed-endian
2890 code/data. */
2891
2892 typedef struct elf32_elf_section_map
2893 {
2894 bfd_vma vma;
2895 char type;
2896 }
2897 elf32_arm_section_map;
2898
2899 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2900
2901 typedef enum
2902 {
2903 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2904 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2905 VFP11_ERRATUM_ARM_VENEER,
2906 VFP11_ERRATUM_THUMB_VENEER
2907 }
2908 elf32_vfp11_erratum_type;
2909
2910 typedef struct elf32_vfp11_erratum_list
2911 {
2912 struct elf32_vfp11_erratum_list *next;
2913 bfd_vma vma;
2914 union
2915 {
2916 struct
2917 {
2918 struct elf32_vfp11_erratum_list *veneer;
2919 unsigned int vfp_insn;
2920 } b;
2921 struct
2922 {
2923 struct elf32_vfp11_erratum_list *branch;
2924 unsigned int id;
2925 } v;
2926 } u;
2927 elf32_vfp11_erratum_type type;
2928 }
2929 elf32_vfp11_erratum_list;
2930
2931 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2932 veneer. */
2933 typedef enum
2934 {
2935 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2936 STM32L4XX_ERRATUM_VENEER
2937 }
2938 elf32_stm32l4xx_erratum_type;
2939
2940 typedef struct elf32_stm32l4xx_erratum_list
2941 {
2942 struct elf32_stm32l4xx_erratum_list *next;
2943 bfd_vma vma;
2944 union
2945 {
2946 struct
2947 {
2948 struct elf32_stm32l4xx_erratum_list *veneer;
2949 unsigned int insn;
2950 } b;
2951 struct
2952 {
2953 struct elf32_stm32l4xx_erratum_list *branch;
2954 unsigned int id;
2955 } v;
2956 } u;
2957 elf32_stm32l4xx_erratum_type type;
2958 }
2959 elf32_stm32l4xx_erratum_list;
2960
2961 typedef enum
2962 {
2963 DELETE_EXIDX_ENTRY,
2964 INSERT_EXIDX_CANTUNWIND_AT_END
2965 }
2966 arm_unwind_edit_type;
2967
2968 /* A (sorted) list of edits to apply to an unwind table. */
2969 typedef struct arm_unwind_table_edit
2970 {
2971 arm_unwind_edit_type type;
2972 /* Note: we sometimes want to insert an unwind entry corresponding to a
2973 section different from the one we're currently writing out, so record the
2974 (text) section this edit relates to here. */
2975 asection *linked_section;
2976 unsigned int index;
2977 struct arm_unwind_table_edit *next;
2978 }
2979 arm_unwind_table_edit;
2980
2981 typedef struct _arm_elf_section_data
2982 {
2983 /* Information about mapping symbols. */
2984 struct bfd_elf_section_data elf;
2985 unsigned int mapcount;
2986 unsigned int mapsize;
2987 elf32_arm_section_map *map;
2988 /* Information about CPU errata. */
2989 unsigned int erratumcount;
2990 elf32_vfp11_erratum_list *erratumlist;
2991 unsigned int stm32l4xx_erratumcount;
2992 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2993 unsigned int additional_reloc_count;
2994 /* Information about unwind tables. */
2995 union
2996 {
2997 /* Unwind info attached to a text section. */
2998 struct
2999 {
3000 asection *arm_exidx_sec;
3001 } text;
3002
3003 /* Unwind info attached to an .ARM.exidx section. */
3004 struct
3005 {
3006 arm_unwind_table_edit *unwind_edit_list;
3007 arm_unwind_table_edit *unwind_edit_tail;
3008 } exidx;
3009 } u;
3010 }
3011 _arm_elf_section_data;
3012
3013 #define elf32_arm_section_data(sec) \
3014 ((_arm_elf_section_data *) elf_section_data (sec))
3015
3016 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
3017 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
3018 so may be created multiple times: we use an array of these entries whilst
3019 relaxing which we can refresh easily, then create stubs for each potentially
3020 erratum-triggering instruction once we've settled on a solution. */
3021
3022 struct a8_erratum_fix
3023 {
3024 bfd *input_bfd;
3025 asection *section;
3026 bfd_vma offset;
3027 bfd_vma target_offset;
3028 unsigned long orig_insn;
3029 char *stub_name;
3030 enum elf32_arm_stub_type stub_type;
3031 enum arm_st_branch_type branch_type;
3032 };
3033
3034 /* A table of relocs applied to branches which might trigger Cortex-A8
3035 erratum. */
3036
3037 struct a8_erratum_reloc
3038 {
3039 bfd_vma from;
3040 bfd_vma destination;
3041 struct elf32_arm_link_hash_entry *hash;
3042 const char *sym_name;
3043 unsigned int r_type;
3044 enum arm_st_branch_type branch_type;
3045 bfd_boolean non_a8_stub;
3046 };
3047
3048 /* The size of the thread control block. */
3049 #define TCB_SIZE 8
3050
3051 /* ARM-specific information about a PLT entry, over and above the usual
3052 gotplt_union. */
3053 struct arm_plt_info
3054 {
3055 /* We reference count Thumb references to a PLT entry separately,
3056 so that we can emit the Thumb trampoline only if needed. */
3057 bfd_signed_vma thumb_refcount;
3058
3059 /* Some references from Thumb code may be eliminated by BL->BLX
3060 conversion, so record them separately. */
3061 bfd_signed_vma maybe_thumb_refcount;
3062
3063 /* How many of the recorded PLT accesses were from non-call relocations.
3064 This information is useful when deciding whether anything takes the
3065 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
3066 non-call references to the function should resolve directly to the
3067 real runtime target. */
3068 unsigned int noncall_refcount;
3069
3070 /* Since PLT entries have variable size if the Thumb prologue is
3071 used, we need to record the index into .got.plt instead of
3072 recomputing it from the PLT offset. */
3073 bfd_signed_vma got_offset;
3074 };
3075
3076 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
3077 struct arm_local_iplt_info
3078 {
3079 /* The information that is usually found in the generic ELF part of
3080 the hash table entry. */
3081 union gotplt_union root;
3082
3083 /* The information that is usually found in the ARM-specific part of
3084 the hash table entry. */
3085 struct arm_plt_info arm;
3086
3087 /* A list of all potential dynamic relocations against this symbol. */
3088 struct elf_dyn_relocs *dyn_relocs;
3089 };
3090
3091 /* Structure to handle FDPIC support for local functions. */
3092 struct fdpic_local {
3093 unsigned int funcdesc_cnt;
3094 unsigned int gotofffuncdesc_cnt;
3095 int funcdesc_offset;
3096 };
3097
3098 struct elf_arm_obj_tdata
3099 {
3100 struct elf_obj_tdata root;
3101
3102 /* tls_type for each local got entry. */
3103 char *local_got_tls_type;
3104
3105 /* GOTPLT entries for TLS descriptors. */
3106 bfd_vma *local_tlsdesc_gotent;
3107
3108 /* Information for local symbols that need entries in .iplt. */
3109 struct arm_local_iplt_info **local_iplt;
3110
3111 /* Zero to warn when linking objects with incompatible enum sizes. */
3112 int no_enum_size_warning;
3113
3114 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3115 int no_wchar_size_warning;
3116
3117 /* Maintains FDPIC counters and funcdesc info. */
3118 struct fdpic_local *local_fdpic_cnts;
3119 };
3120
3121 #define elf_arm_tdata(bfd) \
3122 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3123
3124 #define elf32_arm_local_got_tls_type(bfd) \
3125 (elf_arm_tdata (bfd)->local_got_tls_type)
3126
3127 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3128 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3129
3130 #define elf32_arm_local_iplt(bfd) \
3131 (elf_arm_tdata (bfd)->local_iplt)
3132
3133 #define elf32_arm_local_fdpic_cnts(bfd) \
3134 (elf_arm_tdata (bfd)->local_fdpic_cnts)
3135
3136 #define is_arm_elf(bfd) \
3137 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3138 && elf_tdata (bfd) != NULL \
3139 && elf_object_id (bfd) == ARM_ELF_DATA)
3140
3141 static bfd_boolean
3142 elf32_arm_mkobject (bfd *abfd)
3143 {
3144 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
3145 ARM_ELF_DATA);
3146 }
3147
3148 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3149
3150 /* Structure to handle FDPIC support for extern functions. */
3151 struct fdpic_global {
3152 unsigned int gotofffuncdesc_cnt;
3153 unsigned int gotfuncdesc_cnt;
3154 unsigned int funcdesc_cnt;
3155 int funcdesc_offset;
3156 int gotfuncdesc_offset;
3157 };
3158
3159 /* Arm ELF linker hash entry. */
3160 struct elf32_arm_link_hash_entry
3161 {
3162 struct elf_link_hash_entry root;
3163
3164 /* Track dynamic relocs copied for this symbol. */
3165 struct elf_dyn_relocs *dyn_relocs;
3166
3167 /* ARM-specific PLT information. */
3168 struct arm_plt_info plt;
3169
3170 #define GOT_UNKNOWN 0
3171 #define GOT_NORMAL 1
3172 #define GOT_TLS_GD 2
3173 #define GOT_TLS_IE 4
3174 #define GOT_TLS_GDESC 8
3175 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3176 unsigned int tls_type : 8;
3177
3178 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3179 unsigned int is_iplt : 1;
3180
3181 unsigned int unused : 23;
3182
3183 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3184 starting at the end of the jump table. */
3185 bfd_vma tlsdesc_got;
3186
3187 /* The symbol marking the real symbol location for exported thumb
3188 symbols with Arm stubs. */
3189 struct elf_link_hash_entry *export_glue;
3190
3191 /* A pointer to the most recently used stub hash entry against this
3192 symbol. */
3193 struct elf32_arm_stub_hash_entry *stub_cache;
3194
3195 /* Counter for FDPIC relocations against this symbol. */
3196 struct fdpic_global fdpic_cnts;
3197 };
3198
3199 /* Traverse an arm ELF linker hash table. */
3200 #define elf32_arm_link_hash_traverse(table, func, info) \
3201 (elf_link_hash_traverse \
3202 (&(table)->root, \
3203 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3204 (info)))
3205
3206 /* Get the ARM elf linker hash table from a link_info structure. */
3207 #define elf32_arm_hash_table(info) \
3208 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3209 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3210
3211 #define arm_stub_hash_lookup(table, string, create, copy) \
3212 ((struct elf32_arm_stub_hash_entry *) \
3213 bfd_hash_lookup ((table), (string), (create), (copy)))
3214
3215 /* Array to keep track of which stub sections have been created, and
3216 information on stub grouping. */
3217 struct map_stub
3218 {
3219 /* This is the section to which stubs in the group will be
3220 attached. */
3221 asection *link_sec;
3222 /* The stub section. */
3223 asection *stub_sec;
3224 };
3225
3226 #define elf32_arm_compute_jump_table_size(htab) \
3227 ((htab)->next_tls_desc_index * 4)
3228
3229 /* ARM ELF linker hash table. */
3230 struct elf32_arm_link_hash_table
3231 {
3232 /* The main hash table. */
3233 struct elf_link_hash_table root;
3234
3235 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3236 bfd_size_type thumb_glue_size;
3237
3238 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3239 bfd_size_type arm_glue_size;
3240
3241 /* The size in bytes of section containing the ARMv4 BX veneers. */
3242 bfd_size_type bx_glue_size;
3243
3244 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3245 veneer has been populated. */
3246 bfd_vma bx_glue_offset[15];
3247
3248 /* The size in bytes of the section containing glue for VFP11 erratum
3249 veneers. */
3250 bfd_size_type vfp11_erratum_glue_size;
3251
3252 /* The size in bytes of the section containing glue for STM32L4XX erratum
3253 veneers. */
3254 bfd_size_type stm32l4xx_erratum_glue_size;
3255
3256 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3257 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3258 elf32_arm_write_section(). */
3259 struct a8_erratum_fix *a8_erratum_fixes;
3260 unsigned int num_a8_erratum_fixes;
3261
3262 /* An arbitrary input BFD chosen to hold the glue sections. */
3263 bfd * bfd_of_glue_owner;
3264
3265 /* Nonzero to output a BE8 image. */
3266 int byteswap_code;
3267
3268 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3269 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3270 int target1_is_rel;
3271
3272 /* The relocation to use for R_ARM_TARGET2 relocations. */
3273 int target2_reloc;
3274
3275 /* 0 = Ignore R_ARM_V4BX.
3276 1 = Convert BX to MOV PC.
3277 2 = Generate v4 interworing stubs. */
3278 int fix_v4bx;
3279
3280 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3281 int fix_cortex_a8;
3282
3283 /* Whether we should fix the ARM1176 BLX immediate issue. */
3284 int fix_arm1176;
3285
3286 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3287 int use_blx;
3288
3289 /* What sort of code sequences we should look for which may trigger the
3290 VFP11 denorm erratum. */
3291 bfd_arm_vfp11_fix vfp11_fix;
3292
3293 /* Global counter for the number of fixes we have emitted. */
3294 int num_vfp11_fixes;
3295
3296 /* What sort of code sequences we should look for which may trigger the
3297 STM32L4XX erratum. */
3298 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3299
3300 /* Global counter for the number of fixes we have emitted. */
3301 int num_stm32l4xx_fixes;
3302
3303 /* Nonzero to force PIC branch veneers. */
3304 int pic_veneer;
3305
3306 /* The number of bytes in the initial entry in the PLT. */
3307 bfd_size_type plt_header_size;
3308
3309 /* The number of bytes in the subsequent PLT etries. */
3310 bfd_size_type plt_entry_size;
3311
3312 /* True if the target system is VxWorks. */
3313 int vxworks_p;
3314
3315 /* True if the target system is Symbian OS. */
3316 int symbian_p;
3317
3318 /* True if the target system is Native Client. */
3319 int nacl_p;
3320
3321 /* True if the target uses REL relocations. */
3322 bfd_boolean use_rel;
3323
3324 /* Nonzero if import library must be a secure gateway import library
3325 as per ARMv8-M Security Extensions. */
3326 int cmse_implib;
3327
3328 /* The import library whose symbols' address must remain stable in
3329 the import library generated. */
3330 bfd *in_implib_bfd;
3331
3332 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3333 bfd_vma next_tls_desc_index;
3334
3335 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3336 bfd_vma num_tls_desc;
3337
3338 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3339 asection *srelplt2;
3340
3341 /* The offset into splt of the PLT entry for the TLS descriptor
3342 resolver. Special values are 0, if not necessary (or not found
3343 to be necessary yet), and -1 if needed but not determined
3344 yet. */
3345 bfd_vma dt_tlsdesc_plt;
3346
3347 /* The offset into sgot of the GOT entry used by the PLT entry
3348 above. */
3349 bfd_vma dt_tlsdesc_got;
3350
3351 /* Offset in .plt section of tls_arm_trampoline. */
3352 bfd_vma tls_trampoline;
3353
3354 /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
3355 union
3356 {
3357 bfd_signed_vma refcount;
3358 bfd_vma offset;
3359 } tls_ldm_got;
3360
3361 /* Small local sym cache. */
3362 struct sym_cache sym_cache;
3363
3364 /* For convenience in allocate_dynrelocs. */
3365 bfd * obfd;
3366
3367 /* The amount of space used by the reserved portion of the sgotplt
3368 section, plus whatever space is used by the jump slots. */
3369 bfd_vma sgotplt_jump_table_size;
3370
3371 /* The stub hash table. */
3372 struct bfd_hash_table stub_hash_table;
3373
3374 /* Linker stub bfd. */
3375 bfd *stub_bfd;
3376
3377 /* Linker call-backs. */
3378 asection * (*add_stub_section) (const char *, asection *, asection *,
3379 unsigned int);
3380 void (*layout_sections_again) (void);
3381
3382 /* Array to keep track of which stub sections have been created, and
3383 information on stub grouping. */
3384 struct map_stub *stub_group;
3385
3386 /* Input stub section holding secure gateway veneers. */
3387 asection *cmse_stub_sec;
3388
3389 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3390 start to be allocated. */
3391 bfd_vma new_cmse_stub_offset;
3392
3393 /* Number of elements in stub_group. */
3394 unsigned int top_id;
3395
3396 /* Assorted information used by elf32_arm_size_stubs. */
3397 unsigned int bfd_count;
3398 unsigned int top_index;
3399 asection **input_list;
3400
3401 /* True if the target system uses FDPIC. */
3402 int fdpic_p;
3403
3404 /* Fixup section. Used for FDPIC. */
3405 asection *srofixup;
3406 };
3407
3408 /* Add an FDPIC read-only fixup. */
3409 static void
3410 arm_elf_add_rofixup (bfd *output_bfd, asection *srofixup, bfd_vma offset)
3411 {
3412 bfd_vma fixup_offset;
3413
3414 fixup_offset = srofixup->reloc_count++ * 4;
3415 BFD_ASSERT (fixup_offset < srofixup->size);
3416 bfd_put_32 (output_bfd, offset, srofixup->contents + fixup_offset);
3417 }
3418
3419 static inline int
3420 ctz (unsigned int mask)
3421 {
3422 #if GCC_VERSION >= 3004
3423 return __builtin_ctz (mask);
3424 #else
3425 unsigned int i;
3426
3427 for (i = 0; i < 8 * sizeof (mask); i++)
3428 {
3429 if (mask & 0x1)
3430 break;
3431 mask = (mask >> 1);
3432 }
3433 return i;
3434 #endif
3435 }
3436
3437 static inline int
3438 elf32_arm_popcount (unsigned int mask)
3439 {
3440 #if GCC_VERSION >= 3004
3441 return __builtin_popcount (mask);
3442 #else
3443 unsigned int i;
3444 int sum = 0;
3445
3446 for (i = 0; i < 8 * sizeof (mask); i++)
3447 {
3448 if (mask & 0x1)
3449 sum++;
3450 mask = (mask >> 1);
3451 }
3452 return sum;
3453 #endif
3454 }
3455
3456 static void elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
3457 asection *sreloc, Elf_Internal_Rela *rel);
3458
3459 static void
3460 arm_elf_fill_funcdesc(bfd *output_bfd,
3461 struct bfd_link_info *info,
3462 int *funcdesc_offset,
3463 int dynindx,
3464 int offset,
3465 bfd_vma addr,
3466 bfd_vma dynreloc_value,
3467 bfd_vma seg)
3468 {
3469 if ((*funcdesc_offset & 1) == 0)
3470 {
3471 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
3472 asection *sgot = globals->root.sgot;
3473
3474 if (bfd_link_pic(info))
3475 {
3476 asection *srelgot = globals->root.srelgot;
3477 Elf_Internal_Rela outrel;
3478
3479 outrel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
3480 outrel.r_offset = sgot->output_section->vma + sgot->output_offset + offset;
3481 outrel.r_addend = 0;
3482
3483 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
3484 bfd_put_32 (output_bfd, addr, sgot->contents + offset);
3485 bfd_put_32 (output_bfd, seg, sgot->contents + offset + 4);
3486 }
3487 else
3488 {
3489 struct elf_link_hash_entry *hgot = globals->root.hgot;
3490 bfd_vma got_value = hgot->root.u.def.value
3491 + hgot->root.u.def.section->output_section->vma
3492 + hgot->root.u.def.section->output_offset;
3493
3494 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3495 sgot->output_section->vma + sgot->output_offset
3496 + offset);
3497 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3498 sgot->output_section->vma + sgot->output_offset
3499 + offset + 4);
3500 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + offset);
3501 bfd_put_32 (output_bfd, got_value, sgot->contents + offset + 4);
3502 }
3503 *funcdesc_offset |= 1;
3504 }
3505 }
3506
3507 /* Create an entry in an ARM ELF linker hash table. */
3508
3509 static struct bfd_hash_entry *
3510 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3511 struct bfd_hash_table * table,
3512 const char * string)
3513 {
3514 struct elf32_arm_link_hash_entry * ret =
3515 (struct elf32_arm_link_hash_entry *) entry;
3516
3517 /* Allocate the structure if it has not already been allocated by a
3518 subclass. */
3519 if (ret == NULL)
3520 ret = (struct elf32_arm_link_hash_entry *)
3521 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3522 if (ret == NULL)
3523 return (struct bfd_hash_entry *) ret;
3524
3525 /* Call the allocation method of the superclass. */
3526 ret = ((struct elf32_arm_link_hash_entry *)
3527 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3528 table, string));
3529 if (ret != NULL)
3530 {
3531 ret->dyn_relocs = NULL;
3532 ret->tls_type = GOT_UNKNOWN;
3533 ret->tlsdesc_got = (bfd_vma) -1;
3534 ret->plt.thumb_refcount = 0;
3535 ret->plt.maybe_thumb_refcount = 0;
3536 ret->plt.noncall_refcount = 0;
3537 ret->plt.got_offset = -1;
3538 ret->is_iplt = FALSE;
3539 ret->export_glue = NULL;
3540
3541 ret->stub_cache = NULL;
3542
3543 ret->fdpic_cnts.gotofffuncdesc_cnt = 0;
3544 ret->fdpic_cnts.gotfuncdesc_cnt = 0;
3545 ret->fdpic_cnts.funcdesc_cnt = 0;
3546 ret->fdpic_cnts.funcdesc_offset = -1;
3547 ret->fdpic_cnts.gotfuncdesc_offset = -1;
3548 }
3549
3550 return (struct bfd_hash_entry *) ret;
3551 }
3552
3553 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3554 symbols. */
3555
3556 static bfd_boolean
3557 elf32_arm_allocate_local_sym_info (bfd *abfd)
3558 {
3559 if (elf_local_got_refcounts (abfd) == NULL)
3560 {
3561 bfd_size_type num_syms;
3562 bfd_size_type size;
3563 char *data;
3564
3565 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3566 size = num_syms * (sizeof (bfd_signed_vma)
3567 + sizeof (struct arm_local_iplt_info *)
3568 + sizeof (bfd_vma)
3569 + sizeof (char)
3570 + sizeof (struct fdpic_local));
3571 data = bfd_zalloc (abfd, size);
3572 if (data == NULL)
3573 return FALSE;
3574
3575 elf32_arm_local_fdpic_cnts (abfd) = (struct fdpic_local *) data;
3576 data += num_syms * sizeof (struct fdpic_local);
3577
3578 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3579 data += num_syms * sizeof (bfd_signed_vma);
3580
3581 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3582 data += num_syms * sizeof (struct arm_local_iplt_info *);
3583
3584 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3585 data += num_syms * sizeof (bfd_vma);
3586
3587 elf32_arm_local_got_tls_type (abfd) = data;
3588 }
3589 return TRUE;
3590 }
3591
3592 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3593 to input bfd ABFD. Create the information if it doesn't already exist.
3594 Return null if an allocation fails. */
3595
3596 static struct arm_local_iplt_info *
3597 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3598 {
3599 struct arm_local_iplt_info **ptr;
3600
3601 if (!elf32_arm_allocate_local_sym_info (abfd))
3602 return NULL;
3603
3604 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3605 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3606 if (*ptr == NULL)
3607 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3608 return *ptr;
3609 }
3610
3611 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3612 in ABFD's symbol table. If the symbol is global, H points to its
3613 hash table entry, otherwise H is null.
3614
3615 Return true if the symbol does have PLT information. When returning
3616 true, point *ROOT_PLT at the target-independent reference count/offset
3617 union and *ARM_PLT at the ARM-specific information. */
3618
3619 static bfd_boolean
3620 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3621 struct elf32_arm_link_hash_entry *h,
3622 unsigned long r_symndx, union gotplt_union **root_plt,
3623 struct arm_plt_info **arm_plt)
3624 {
3625 struct arm_local_iplt_info *local_iplt;
3626
3627 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3628 return FALSE;
3629
3630 if (h != NULL)
3631 {
3632 *root_plt = &h->root.plt;
3633 *arm_plt = &h->plt;
3634 return TRUE;
3635 }
3636
3637 if (elf32_arm_local_iplt (abfd) == NULL)
3638 return FALSE;
3639
3640 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3641 if (local_iplt == NULL)
3642 return FALSE;
3643
3644 *root_plt = &local_iplt->root;
3645 *arm_plt = &local_iplt->arm;
3646 return TRUE;
3647 }
3648
3649 static bfd_boolean using_thumb_only (struct elf32_arm_link_hash_table *globals);
3650
3651 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3652 before it. */
3653
3654 static bfd_boolean
3655 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3656 struct arm_plt_info *arm_plt)
3657 {
3658 struct elf32_arm_link_hash_table *htab;
3659
3660 htab = elf32_arm_hash_table (info);
3661
3662 return (!using_thumb_only(htab) && (arm_plt->thumb_refcount != 0
3663 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0)));
3664 }
3665
3666 /* Return a pointer to the head of the dynamic reloc list that should
3667 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3668 ABFD's symbol table. Return null if an error occurs. */
3669
3670 static struct elf_dyn_relocs **
3671 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3672 Elf_Internal_Sym *isym)
3673 {
3674 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3675 {
3676 struct arm_local_iplt_info *local_iplt;
3677
3678 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3679 if (local_iplt == NULL)
3680 return NULL;
3681 return &local_iplt->dyn_relocs;
3682 }
3683 else
3684 {
3685 /* Track dynamic relocs needed for local syms too.
3686 We really need local syms available to do this
3687 easily. Oh well. */
3688 asection *s;
3689 void *vpp;
3690
3691 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3692 if (s == NULL)
3693 abort ();
3694
3695 vpp = &elf_section_data (s)->local_dynrel;
3696 return (struct elf_dyn_relocs **) vpp;
3697 }
3698 }
3699
3700 /* Initialize an entry in the stub hash table. */
3701
3702 static struct bfd_hash_entry *
3703 stub_hash_newfunc (struct bfd_hash_entry *entry,
3704 struct bfd_hash_table *table,
3705 const char *string)
3706 {
3707 /* Allocate the structure if it has not already been allocated by a
3708 subclass. */
3709 if (entry == NULL)
3710 {
3711 entry = (struct bfd_hash_entry *)
3712 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3713 if (entry == NULL)
3714 return entry;
3715 }
3716
3717 /* Call the allocation method of the superclass. */
3718 entry = bfd_hash_newfunc (entry, table, string);
3719 if (entry != NULL)
3720 {
3721 struct elf32_arm_stub_hash_entry *eh;
3722
3723 /* Initialize the local fields. */
3724 eh = (struct elf32_arm_stub_hash_entry *) entry;
3725 eh->stub_sec = NULL;
3726 eh->stub_offset = (bfd_vma) -1;
3727 eh->source_value = 0;
3728 eh->target_value = 0;
3729 eh->target_section = NULL;
3730 eh->orig_insn = 0;
3731 eh->stub_type = arm_stub_none;
3732 eh->stub_size = 0;
3733 eh->stub_template = NULL;
3734 eh->stub_template_size = -1;
3735 eh->h = NULL;
3736 eh->id_sec = NULL;
3737 eh->output_name = NULL;
3738 }
3739
3740 return entry;
3741 }
3742
3743 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3744 shortcuts to them in our hash table. */
3745
3746 static bfd_boolean
3747 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3748 {
3749 struct elf32_arm_link_hash_table *htab;
3750
3751 htab = elf32_arm_hash_table (info);
3752 if (htab == NULL)
3753 return FALSE;
3754
3755 /* BPABI objects never have a GOT, or associated sections. */
3756 if (htab->symbian_p)
3757 return TRUE;
3758
3759 if (! _bfd_elf_create_got_section (dynobj, info))
3760 return FALSE;
3761
3762 /* Also create .rofixup. */
3763 if (htab->fdpic_p)
3764 {
3765 htab->srofixup = bfd_make_section_with_flags (dynobj, ".rofixup",
3766 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3767 | SEC_IN_MEMORY | SEC_LINKER_CREATED | SEC_READONLY));
3768 if (htab->srofixup == NULL || ! bfd_set_section_alignment (dynobj, htab->srofixup, 2))
3769 return FALSE;
3770 }
3771
3772 return TRUE;
3773 }
3774
3775 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3776
3777 static bfd_boolean
3778 create_ifunc_sections (struct bfd_link_info *info)
3779 {
3780 struct elf32_arm_link_hash_table *htab;
3781 const struct elf_backend_data *bed;
3782 bfd *dynobj;
3783 asection *s;
3784 flagword flags;
3785
3786 htab = elf32_arm_hash_table (info);
3787 dynobj = htab->root.dynobj;
3788 bed = get_elf_backend_data (dynobj);
3789 flags = bed->dynamic_sec_flags;
3790
3791 if (htab->root.iplt == NULL)
3792 {
3793 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3794 flags | SEC_READONLY | SEC_CODE);
3795 if (s == NULL
3796 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3797 return FALSE;
3798 htab->root.iplt = s;
3799 }
3800
3801 if (htab->root.irelplt == NULL)
3802 {
3803 s = bfd_make_section_anyway_with_flags (dynobj,
3804 RELOC_SECTION (htab, ".iplt"),
3805 flags | SEC_READONLY);
3806 if (s == NULL
3807 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3808 return FALSE;
3809 htab->root.irelplt = s;
3810 }
3811
3812 if (htab->root.igotplt == NULL)
3813 {
3814 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3815 if (s == NULL
3816 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3817 return FALSE;
3818 htab->root.igotplt = s;
3819 }
3820 return TRUE;
3821 }
3822
3823 /* Determine if we're dealing with a Thumb only architecture. */
3824
3825 static bfd_boolean
3826 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3827 {
3828 int arch;
3829 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3830 Tag_CPU_arch_profile);
3831
3832 if (profile)
3833 return profile == 'M';
3834
3835 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3836
3837 /* Force return logic to be reviewed for each new architecture. */
3838 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3839
3840 if (arch == TAG_CPU_ARCH_V6_M
3841 || arch == TAG_CPU_ARCH_V6S_M
3842 || arch == TAG_CPU_ARCH_V7E_M
3843 || arch == TAG_CPU_ARCH_V8M_BASE
3844 || arch == TAG_CPU_ARCH_V8M_MAIN)
3845 return TRUE;
3846
3847 return FALSE;
3848 }
3849
3850 /* Determine if we're dealing with a Thumb-2 object. */
3851
3852 static bfd_boolean
3853 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3854 {
3855 int arch;
3856 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3857 Tag_THUMB_ISA_use);
3858
3859 if (thumb_isa)
3860 return thumb_isa == 2;
3861
3862 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3863
3864 /* Force return logic to be reviewed for each new architecture. */
3865 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3866
3867 return (arch == TAG_CPU_ARCH_V6T2
3868 || arch == TAG_CPU_ARCH_V7
3869 || arch == TAG_CPU_ARCH_V7E_M
3870 || arch == TAG_CPU_ARCH_V8
3871 || arch == TAG_CPU_ARCH_V8R
3872 || arch == TAG_CPU_ARCH_V8M_MAIN);
3873 }
3874
3875 /* Determine whether Thumb-2 BL instruction is available. */
3876
3877 static bfd_boolean
3878 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3879 {
3880 int arch =
3881 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3882
3883 /* Force return logic to be reviewed for each new architecture. */
3884 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3885
3886 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3887 return (arch == TAG_CPU_ARCH_V6T2
3888 || arch >= TAG_CPU_ARCH_V7);
3889 }
3890
3891 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3892 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3893 hash table. */
3894
3895 static bfd_boolean
3896 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3897 {
3898 struct elf32_arm_link_hash_table *htab;
3899
3900 htab = elf32_arm_hash_table (info);
3901 if (htab == NULL)
3902 return FALSE;
3903
3904 if (!htab->root.sgot && !create_got_section (dynobj, info))
3905 return FALSE;
3906
3907 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3908 return FALSE;
3909
3910 if (htab->vxworks_p)
3911 {
3912 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3913 return FALSE;
3914
3915 if (bfd_link_pic (info))
3916 {
3917 htab->plt_header_size = 0;
3918 htab->plt_entry_size
3919 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3920 }
3921 else
3922 {
3923 htab->plt_header_size
3924 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3925 htab->plt_entry_size
3926 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3927 }
3928
3929 if (elf_elfheader (dynobj))
3930 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3931 }
3932 else
3933 {
3934 /* PR ld/16017
3935 Test for thumb only architectures. Note - we cannot just call
3936 using_thumb_only() as the attributes in the output bfd have not been
3937 initialised at this point, so instead we use the input bfd. */
3938 bfd * saved_obfd = htab->obfd;
3939
3940 htab->obfd = dynobj;
3941 if (using_thumb_only (htab))
3942 {
3943 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3944 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3945 }
3946 htab->obfd = saved_obfd;
3947 }
3948
3949 if (htab->fdpic_p) {
3950 htab->plt_header_size = 0;
3951 if (info->flags & DF_BIND_NOW)
3952 htab->plt_entry_size = 4 * (ARRAY_SIZE(elf32_arm_fdpic_plt_entry) - 5);
3953 else
3954 htab->plt_entry_size = 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry);
3955 }
3956
3957 if (!htab->root.splt
3958 || !htab->root.srelplt
3959 || !htab->root.sdynbss
3960 || (!bfd_link_pic (info) && !htab->root.srelbss))
3961 abort ();
3962
3963 return TRUE;
3964 }
3965
3966 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3967
3968 static void
3969 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3970 struct elf_link_hash_entry *dir,
3971 struct elf_link_hash_entry *ind)
3972 {
3973 struct elf32_arm_link_hash_entry *edir, *eind;
3974
3975 edir = (struct elf32_arm_link_hash_entry *) dir;
3976 eind = (struct elf32_arm_link_hash_entry *) ind;
3977
3978 if (eind->dyn_relocs != NULL)
3979 {
3980 if (edir->dyn_relocs != NULL)
3981 {
3982 struct elf_dyn_relocs **pp;
3983 struct elf_dyn_relocs *p;
3984
3985 /* Add reloc counts against the indirect sym to the direct sym
3986 list. Merge any entries against the same section. */
3987 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3988 {
3989 struct elf_dyn_relocs *q;
3990
3991 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3992 if (q->sec == p->sec)
3993 {
3994 q->pc_count += p->pc_count;
3995 q->count += p->count;
3996 *pp = p->next;
3997 break;
3998 }
3999 if (q == NULL)
4000 pp = &p->next;
4001 }
4002 *pp = edir->dyn_relocs;
4003 }
4004
4005 edir->dyn_relocs = eind->dyn_relocs;
4006 eind->dyn_relocs = NULL;
4007 }
4008
4009 if (ind->root.type == bfd_link_hash_indirect)
4010 {
4011 /* Copy over PLT info. */
4012 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
4013 eind->plt.thumb_refcount = 0;
4014 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
4015 eind->plt.maybe_thumb_refcount = 0;
4016 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
4017 eind->plt.noncall_refcount = 0;
4018
4019 /* Copy FDPIC counters. */
4020 edir->fdpic_cnts.gotofffuncdesc_cnt += eind->fdpic_cnts.gotofffuncdesc_cnt;
4021 edir->fdpic_cnts.gotfuncdesc_cnt += eind->fdpic_cnts.gotfuncdesc_cnt;
4022 edir->fdpic_cnts.funcdesc_cnt += eind->fdpic_cnts.funcdesc_cnt;
4023
4024 /* We should only allocate a function to .iplt once the final
4025 symbol information is known. */
4026 BFD_ASSERT (!eind->is_iplt);
4027
4028 if (dir->got.refcount <= 0)
4029 {
4030 edir->tls_type = eind->tls_type;
4031 eind->tls_type = GOT_UNKNOWN;
4032 }
4033 }
4034
4035 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
4036 }
4037
4038 /* Destroy an ARM elf linker hash table. */
4039
4040 static void
4041 elf32_arm_link_hash_table_free (bfd *obfd)
4042 {
4043 struct elf32_arm_link_hash_table *ret
4044 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
4045
4046 bfd_hash_table_free (&ret->stub_hash_table);
4047 _bfd_elf_link_hash_table_free (obfd);
4048 }
4049
4050 /* Create an ARM elf linker hash table. */
4051
4052 static struct bfd_link_hash_table *
4053 elf32_arm_link_hash_table_create (bfd *abfd)
4054 {
4055 struct elf32_arm_link_hash_table *ret;
4056 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
4057
4058 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
4059 if (ret == NULL)
4060 return NULL;
4061
4062 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
4063 elf32_arm_link_hash_newfunc,
4064 sizeof (struct elf32_arm_link_hash_entry),
4065 ARM_ELF_DATA))
4066 {
4067 free (ret);
4068 return NULL;
4069 }
4070
4071 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
4072 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
4073 #ifdef FOUR_WORD_PLT
4074 ret->plt_header_size = 16;
4075 ret->plt_entry_size = 16;
4076 #else
4077 ret->plt_header_size = 20;
4078 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
4079 #endif
4080 ret->use_rel = TRUE;
4081 ret->obfd = abfd;
4082 ret->fdpic_p = 0;
4083
4084 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
4085 sizeof (struct elf32_arm_stub_hash_entry)))
4086 {
4087 _bfd_elf_link_hash_table_free (abfd);
4088 return NULL;
4089 }
4090 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
4091
4092 return &ret->root.root;
4093 }
4094
4095 /* Determine what kind of NOPs are available. */
4096
4097 static bfd_boolean
4098 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
4099 {
4100 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4101 Tag_CPU_arch);
4102
4103 /* Force return logic to be reviewed for each new architecture. */
4104 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
4105
4106 return (arch == TAG_CPU_ARCH_V6T2
4107 || arch == TAG_CPU_ARCH_V6K
4108 || arch == TAG_CPU_ARCH_V7
4109 || arch == TAG_CPU_ARCH_V8
4110 || arch == TAG_CPU_ARCH_V8R);
4111 }
4112
4113 static bfd_boolean
4114 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
4115 {
4116 switch (stub_type)
4117 {
4118 case arm_stub_long_branch_thumb_only:
4119 case arm_stub_long_branch_thumb2_only:
4120 case arm_stub_long_branch_thumb2_only_pure:
4121 case arm_stub_long_branch_v4t_thumb_arm:
4122 case arm_stub_short_branch_v4t_thumb_arm:
4123 case arm_stub_long_branch_v4t_thumb_arm_pic:
4124 case arm_stub_long_branch_v4t_thumb_tls_pic:
4125 case arm_stub_long_branch_thumb_only_pic:
4126 case arm_stub_cmse_branch_thumb_only:
4127 return TRUE;
4128 case arm_stub_none:
4129 BFD_FAIL ();
4130 return FALSE;
4131 break;
4132 default:
4133 return FALSE;
4134 }
4135 }
4136
4137 /* Determine the type of stub needed, if any, for a call. */
4138
4139 static enum elf32_arm_stub_type
4140 arm_type_of_stub (struct bfd_link_info *info,
4141 asection *input_sec,
4142 const Elf_Internal_Rela *rel,
4143 unsigned char st_type,
4144 enum arm_st_branch_type *actual_branch_type,
4145 struct elf32_arm_link_hash_entry *hash,
4146 bfd_vma destination,
4147 asection *sym_sec,
4148 bfd *input_bfd,
4149 const char *name)
4150 {
4151 bfd_vma location;
4152 bfd_signed_vma branch_offset;
4153 unsigned int r_type;
4154 struct elf32_arm_link_hash_table * globals;
4155 bfd_boolean thumb2, thumb2_bl, thumb_only;
4156 enum elf32_arm_stub_type stub_type = arm_stub_none;
4157 int use_plt = 0;
4158 enum arm_st_branch_type branch_type = *actual_branch_type;
4159 union gotplt_union *root_plt;
4160 struct arm_plt_info *arm_plt;
4161 int arch;
4162 int thumb2_movw;
4163
4164 if (branch_type == ST_BRANCH_LONG)
4165 return stub_type;
4166
4167 globals = elf32_arm_hash_table (info);
4168 if (globals == NULL)
4169 return stub_type;
4170
4171 thumb_only = using_thumb_only (globals);
4172 thumb2 = using_thumb2 (globals);
4173 thumb2_bl = using_thumb2_bl (globals);
4174
4175 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
4176
4177 /* True for architectures that implement the thumb2 movw instruction. */
4178 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
4179
4180 /* Determine where the call point is. */
4181 location = (input_sec->output_offset
4182 + input_sec->output_section->vma
4183 + rel->r_offset);
4184
4185 r_type = ELF32_R_TYPE (rel->r_info);
4186
4187 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4188 are considering a function call relocation. */
4189 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4190 || r_type == R_ARM_THM_JUMP19)
4191 && branch_type == ST_BRANCH_TO_ARM)
4192 branch_type = ST_BRANCH_TO_THUMB;
4193
4194 /* For TLS call relocs, it is the caller's responsibility to provide
4195 the address of the appropriate trampoline. */
4196 if (r_type != R_ARM_TLS_CALL
4197 && r_type != R_ARM_THM_TLS_CALL
4198 && elf32_arm_get_plt_info (input_bfd, globals, hash,
4199 ELF32_R_SYM (rel->r_info), &root_plt,
4200 &arm_plt)
4201 && root_plt->offset != (bfd_vma) -1)
4202 {
4203 asection *splt;
4204
4205 if (hash == NULL || hash->is_iplt)
4206 splt = globals->root.iplt;
4207 else
4208 splt = globals->root.splt;
4209 if (splt != NULL)
4210 {
4211 use_plt = 1;
4212
4213 /* Note when dealing with PLT entries: the main PLT stub is in
4214 ARM mode, so if the branch is in Thumb mode, another
4215 Thumb->ARM stub will be inserted later just before the ARM
4216 PLT stub. If a long branch stub is needed, we'll add a
4217 Thumb->Arm one and branch directly to the ARM PLT entry.
4218 Here, we have to check if a pre-PLT Thumb->ARM stub
4219 is needed and if it will be close enough. */
4220
4221 destination = (splt->output_section->vma
4222 + splt->output_offset
4223 + root_plt->offset);
4224 st_type = STT_FUNC;
4225
4226 /* Thumb branch/call to PLT: it can become a branch to ARM
4227 or to Thumb. We must perform the same checks and
4228 corrections as in elf32_arm_final_link_relocate. */
4229 if ((r_type == R_ARM_THM_CALL)
4230 || (r_type == R_ARM_THM_JUMP24))
4231 {
4232 if (globals->use_blx
4233 && r_type == R_ARM_THM_CALL
4234 && !thumb_only)
4235 {
4236 /* If the Thumb BLX instruction is available, convert
4237 the BL to a BLX instruction to call the ARM-mode
4238 PLT entry. */
4239 branch_type = ST_BRANCH_TO_ARM;
4240 }
4241 else
4242 {
4243 if (!thumb_only)
4244 /* Target the Thumb stub before the ARM PLT entry. */
4245 destination -= PLT_THUMB_STUB_SIZE;
4246 branch_type = ST_BRANCH_TO_THUMB;
4247 }
4248 }
4249 else
4250 {
4251 branch_type = ST_BRANCH_TO_ARM;
4252 }
4253 }
4254 }
4255 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4256 BFD_ASSERT (st_type != STT_GNU_IFUNC);
4257
4258 branch_offset = (bfd_signed_vma)(destination - location);
4259
4260 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4261 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
4262 {
4263 /* Handle cases where:
4264 - this call goes too far (different Thumb/Thumb2 max
4265 distance)
4266 - it's a Thumb->Arm call and blx is not available, or it's a
4267 Thumb->Arm branch (not bl). A stub is needed in this case,
4268 but only if this call is not through a PLT entry. Indeed,
4269 PLT stubs handle mode switching already. */
4270 if ((!thumb2_bl
4271 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4272 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4273 || (thumb2_bl
4274 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4275 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4276 || (thumb2
4277 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4278 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4279 && (r_type == R_ARM_THM_JUMP19))
4280 || (branch_type == ST_BRANCH_TO_ARM
4281 && (((r_type == R_ARM_THM_CALL
4282 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4283 || (r_type == R_ARM_THM_JUMP24)
4284 || (r_type == R_ARM_THM_JUMP19))
4285 && !use_plt))
4286 {
4287 /* If we need to insert a Thumb-Thumb long branch stub to a
4288 PLT, use one that branches directly to the ARM PLT
4289 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4290 stub, undo this now. */
4291 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4292 {
4293 branch_type = ST_BRANCH_TO_ARM;
4294 branch_offset += PLT_THUMB_STUB_SIZE;
4295 }
4296
4297 if (branch_type == ST_BRANCH_TO_THUMB)
4298 {
4299 /* Thumb to thumb. */
4300 if (!thumb_only)
4301 {
4302 if (input_sec->flags & SEC_ELF_PURECODE)
4303 _bfd_error_handler
4304 (_("%pB(%pA): warning: long branch veneers used in"
4305 " section with SHF_ARM_PURECODE section"
4306 " attribute is only supported for M-profile"
4307 " targets that implement the movw instruction"),
4308 input_bfd, input_sec);
4309
4310 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4311 /* PIC stubs. */
4312 ? ((globals->use_blx
4313 && (r_type == R_ARM_THM_CALL))
4314 /* V5T and above. Stub starts with ARM code, so
4315 we must be able to switch mode before
4316 reaching it, which is only possible for 'bl'
4317 (ie R_ARM_THM_CALL relocation). */
4318 ? arm_stub_long_branch_any_thumb_pic
4319 /* On V4T, use Thumb code only. */
4320 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4321
4322 /* non-PIC stubs. */
4323 : ((globals->use_blx
4324 && (r_type == R_ARM_THM_CALL))
4325 /* V5T and above. */
4326 ? arm_stub_long_branch_any_any
4327 /* V4T. */
4328 : arm_stub_long_branch_v4t_thumb_thumb);
4329 }
4330 else
4331 {
4332 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4333 stub_type = arm_stub_long_branch_thumb2_only_pure;
4334 else
4335 {
4336 if (input_sec->flags & SEC_ELF_PURECODE)
4337 _bfd_error_handler
4338 (_("%pB(%pA): warning: long branch veneers used in"
4339 " section with SHF_ARM_PURECODE section"
4340 " attribute is only supported for M-profile"
4341 " targets that implement the movw instruction"),
4342 input_bfd, input_sec);
4343
4344 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4345 /* PIC stub. */
4346 ? arm_stub_long_branch_thumb_only_pic
4347 /* non-PIC stub. */
4348 : (thumb2 ? arm_stub_long_branch_thumb2_only
4349 : arm_stub_long_branch_thumb_only);
4350 }
4351 }
4352 }
4353 else
4354 {
4355 if (input_sec->flags & SEC_ELF_PURECODE)
4356 _bfd_error_handler
4357 (_("%pB(%pA): warning: long branch veneers used in"
4358 " section with SHF_ARM_PURECODE section"
4359 " attribute is only supported" " for M-profile"
4360 " targets that implement the movw instruction"),
4361 input_bfd, input_sec);
4362
4363 /* Thumb to arm. */
4364 if (sym_sec != NULL
4365 && sym_sec->owner != NULL
4366 && !INTERWORK_FLAG (sym_sec->owner))
4367 {
4368 _bfd_error_handler
4369 (_("%pB(%s): warning: interworking not enabled;"
4370 " first occurrence: %pB: %s call to %s"),
4371 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
4372 }
4373
4374 stub_type =
4375 (bfd_link_pic (info) | globals->pic_veneer)
4376 /* PIC stubs. */
4377 ? (r_type == R_ARM_THM_TLS_CALL
4378 /* TLS PIC stubs. */
4379 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4380 : arm_stub_long_branch_v4t_thumb_tls_pic)
4381 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4382 /* V5T PIC and above. */
4383 ? arm_stub_long_branch_any_arm_pic
4384 /* V4T PIC stub. */
4385 : arm_stub_long_branch_v4t_thumb_arm_pic))
4386
4387 /* non-PIC stubs. */
4388 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4389 /* V5T and above. */
4390 ? arm_stub_long_branch_any_any
4391 /* V4T. */
4392 : arm_stub_long_branch_v4t_thumb_arm);
4393
4394 /* Handle v4t short branches. */
4395 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4396 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4397 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4398 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4399 }
4400 }
4401 }
4402 else if (r_type == R_ARM_CALL
4403 || r_type == R_ARM_JUMP24
4404 || r_type == R_ARM_PLT32
4405 || r_type == R_ARM_TLS_CALL)
4406 {
4407 if (input_sec->flags & SEC_ELF_PURECODE)
4408 _bfd_error_handler
4409 (_("%pB(%pA): warning: long branch veneers used in"
4410 " section with SHF_ARM_PURECODE section"
4411 " attribute is only supported for M-profile"
4412 " targets that implement the movw instruction"),
4413 input_bfd, input_sec);
4414 if (branch_type == ST_BRANCH_TO_THUMB)
4415 {
4416 /* Arm to thumb. */
4417
4418 if (sym_sec != NULL
4419 && sym_sec->owner != NULL
4420 && !INTERWORK_FLAG (sym_sec->owner))
4421 {
4422 _bfd_error_handler
4423 (_("%pB(%s): warning: interworking not enabled;"
4424 " first occurrence: %pB: %s call to %s"),
4425 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
4426 }
4427
4428 /* We have an extra 2-bytes reach because of
4429 the mode change (bit 24 (H) of BLX encoding). */
4430 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4431 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4432 || (r_type == R_ARM_CALL && !globals->use_blx)
4433 || (r_type == R_ARM_JUMP24)
4434 || (r_type == R_ARM_PLT32))
4435 {
4436 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4437 /* PIC stubs. */
4438 ? ((globals->use_blx)
4439 /* V5T and above. */
4440 ? arm_stub_long_branch_any_thumb_pic
4441 /* V4T stub. */
4442 : arm_stub_long_branch_v4t_arm_thumb_pic)
4443
4444 /* non-PIC stubs. */
4445 : ((globals->use_blx)
4446 /* V5T and above. */
4447 ? arm_stub_long_branch_any_any
4448 /* V4T. */
4449 : arm_stub_long_branch_v4t_arm_thumb);
4450 }
4451 }
4452 else
4453 {
4454 /* Arm to arm. */
4455 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4456 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4457 {
4458 stub_type =
4459 (bfd_link_pic (info) | globals->pic_veneer)
4460 /* PIC stubs. */
4461 ? (r_type == R_ARM_TLS_CALL
4462 /* TLS PIC Stub. */
4463 ? arm_stub_long_branch_any_tls_pic
4464 : (globals->nacl_p
4465 ? arm_stub_long_branch_arm_nacl_pic
4466 : arm_stub_long_branch_any_arm_pic))
4467 /* non-PIC stubs. */
4468 : (globals->nacl_p
4469 ? arm_stub_long_branch_arm_nacl
4470 : arm_stub_long_branch_any_any);
4471 }
4472 }
4473 }
4474
4475 /* If a stub is needed, record the actual destination type. */
4476 if (stub_type != arm_stub_none)
4477 *actual_branch_type = branch_type;
4478
4479 return stub_type;
4480 }
4481
4482 /* Build a name for an entry in the stub hash table. */
4483
4484 static char *
4485 elf32_arm_stub_name (const asection *input_section,
4486 const asection *sym_sec,
4487 const struct elf32_arm_link_hash_entry *hash,
4488 const Elf_Internal_Rela *rel,
4489 enum elf32_arm_stub_type stub_type)
4490 {
4491 char *stub_name;
4492 bfd_size_type len;
4493
4494 if (hash)
4495 {
4496 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4497 stub_name = (char *) bfd_malloc (len);
4498 if (stub_name != NULL)
4499 sprintf (stub_name, "%08x_%s+%x_%d",
4500 input_section->id & 0xffffffff,
4501 hash->root.root.root.string,
4502 (int) rel->r_addend & 0xffffffff,
4503 (int) stub_type);
4504 }
4505 else
4506 {
4507 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4508 stub_name = (char *) bfd_malloc (len);
4509 if (stub_name != NULL)
4510 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4511 input_section->id & 0xffffffff,
4512 sym_sec->id & 0xffffffff,
4513 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4514 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4515 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4516 (int) rel->r_addend & 0xffffffff,
4517 (int) stub_type);
4518 }
4519
4520 return stub_name;
4521 }
4522
4523 /* Look up an entry in the stub hash. Stub entries are cached because
4524 creating the stub name takes a bit of time. */
4525
4526 static struct elf32_arm_stub_hash_entry *
4527 elf32_arm_get_stub_entry (const asection *input_section,
4528 const asection *sym_sec,
4529 struct elf_link_hash_entry *hash,
4530 const Elf_Internal_Rela *rel,
4531 struct elf32_arm_link_hash_table *htab,
4532 enum elf32_arm_stub_type stub_type)
4533 {
4534 struct elf32_arm_stub_hash_entry *stub_entry;
4535 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4536 const asection *id_sec;
4537
4538 if ((input_section->flags & SEC_CODE) == 0)
4539 return NULL;
4540
4541 /* If this input section is part of a group of sections sharing one
4542 stub section, then use the id of the first section in the group.
4543 Stub names need to include a section id, as there may well be
4544 more than one stub used to reach say, printf, and we need to
4545 distinguish between them. */
4546 BFD_ASSERT (input_section->id <= htab->top_id);
4547 id_sec = htab->stub_group[input_section->id].link_sec;
4548
4549 if (h != NULL && h->stub_cache != NULL
4550 && h->stub_cache->h == h
4551 && h->stub_cache->id_sec == id_sec
4552 && h->stub_cache->stub_type == stub_type)
4553 {
4554 stub_entry = h->stub_cache;
4555 }
4556 else
4557 {
4558 char *stub_name;
4559
4560 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4561 if (stub_name == NULL)
4562 return NULL;
4563
4564 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4565 stub_name, FALSE, FALSE);
4566 if (h != NULL)
4567 h->stub_cache = stub_entry;
4568
4569 free (stub_name);
4570 }
4571
4572 return stub_entry;
4573 }
4574
4575 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4576 section. */
4577
4578 static bfd_boolean
4579 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4580 {
4581 if (stub_type >= max_stub_type)
4582 abort (); /* Should be unreachable. */
4583
4584 switch (stub_type)
4585 {
4586 case arm_stub_cmse_branch_thumb_only:
4587 return TRUE;
4588
4589 default:
4590 return FALSE;
4591 }
4592
4593 abort (); /* Should be unreachable. */
4594 }
4595
4596 /* Required alignment (as a power of 2) for the dedicated section holding
4597 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4598 with input sections. */
4599
4600 static int
4601 arm_dedicated_stub_output_section_required_alignment
4602 (enum elf32_arm_stub_type stub_type)
4603 {
4604 if (stub_type >= max_stub_type)
4605 abort (); /* Should be unreachable. */
4606
4607 switch (stub_type)
4608 {
4609 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4610 boundary. */
4611 case arm_stub_cmse_branch_thumb_only:
4612 return 5;
4613
4614 default:
4615 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4616 return 0;
4617 }
4618
4619 abort (); /* Should be unreachable. */
4620 }
4621
4622 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4623 NULL if veneers of this type are interspersed with input sections. */
4624
4625 static const char *
4626 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4627 {
4628 if (stub_type >= max_stub_type)
4629 abort (); /* Should be unreachable. */
4630
4631 switch (stub_type)
4632 {
4633 case arm_stub_cmse_branch_thumb_only:
4634 return ".gnu.sgstubs";
4635
4636 default:
4637 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4638 return NULL;
4639 }
4640
4641 abort (); /* Should be unreachable. */
4642 }
4643
4644 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4645 returns the address of the hash table field in HTAB holding a pointer to the
4646 corresponding input section. Otherwise, returns NULL. */
4647
4648 static asection **
4649 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4650 enum elf32_arm_stub_type stub_type)
4651 {
4652 if (stub_type >= max_stub_type)
4653 abort (); /* Should be unreachable. */
4654
4655 switch (stub_type)
4656 {
4657 case arm_stub_cmse_branch_thumb_only:
4658 return &htab->cmse_stub_sec;
4659
4660 default:
4661 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4662 return NULL;
4663 }
4664
4665 abort (); /* Should be unreachable. */
4666 }
4667
4668 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4669 is the section that branch into veneer and can be NULL if stub should go in
4670 a dedicated output section. Returns a pointer to the stub section, and the
4671 section to which the stub section will be attached (in *LINK_SEC_P).
4672 LINK_SEC_P may be NULL. */
4673
4674 static asection *
4675 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4676 struct elf32_arm_link_hash_table *htab,
4677 enum elf32_arm_stub_type stub_type)
4678 {
4679 asection *link_sec, *out_sec, **stub_sec_p;
4680 const char *stub_sec_prefix;
4681 bfd_boolean dedicated_output_section =
4682 arm_dedicated_stub_output_section_required (stub_type);
4683 int align;
4684
4685 if (dedicated_output_section)
4686 {
4687 bfd *output_bfd = htab->obfd;
4688 const char *out_sec_name =
4689 arm_dedicated_stub_output_section_name (stub_type);
4690 link_sec = NULL;
4691 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4692 stub_sec_prefix = out_sec_name;
4693 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4694 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4695 if (out_sec == NULL)
4696 {
4697 _bfd_error_handler (_("no address assigned to the veneers output "
4698 "section %s"), out_sec_name);
4699 return NULL;
4700 }
4701 }
4702 else
4703 {
4704 BFD_ASSERT (section->id <= htab->top_id);
4705 link_sec = htab->stub_group[section->id].link_sec;
4706 BFD_ASSERT (link_sec != NULL);
4707 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4708 if (*stub_sec_p == NULL)
4709 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4710 stub_sec_prefix = link_sec->name;
4711 out_sec = link_sec->output_section;
4712 align = htab->nacl_p ? 4 : 3;
4713 }
4714
4715 if (*stub_sec_p == NULL)
4716 {
4717 size_t namelen;
4718 bfd_size_type len;
4719 char *s_name;
4720
4721 namelen = strlen (stub_sec_prefix);
4722 len = namelen + sizeof (STUB_SUFFIX);
4723 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4724 if (s_name == NULL)
4725 return NULL;
4726
4727 memcpy (s_name, stub_sec_prefix, namelen);
4728 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4729 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4730 align);
4731 if (*stub_sec_p == NULL)
4732 return NULL;
4733
4734 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4735 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4736 | SEC_KEEP;
4737 }
4738
4739 if (!dedicated_output_section)
4740 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4741
4742 if (link_sec_p)
4743 *link_sec_p = link_sec;
4744
4745 return *stub_sec_p;
4746 }
4747
4748 /* Add a new stub entry to the stub hash. Not all fields of the new
4749 stub entry are initialised. */
4750
4751 static struct elf32_arm_stub_hash_entry *
4752 elf32_arm_add_stub (const char *stub_name, asection *section,
4753 struct elf32_arm_link_hash_table *htab,
4754 enum elf32_arm_stub_type stub_type)
4755 {
4756 asection *link_sec;
4757 asection *stub_sec;
4758 struct elf32_arm_stub_hash_entry *stub_entry;
4759
4760 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4761 stub_type);
4762 if (stub_sec == NULL)
4763 return NULL;
4764
4765 /* Enter this entry into the linker stub hash table. */
4766 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4767 TRUE, FALSE);
4768 if (stub_entry == NULL)
4769 {
4770 if (section == NULL)
4771 section = stub_sec;
4772 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4773 section->owner, stub_name);
4774 return NULL;
4775 }
4776
4777 stub_entry->stub_sec = stub_sec;
4778 stub_entry->stub_offset = (bfd_vma) -1;
4779 stub_entry->id_sec = link_sec;
4780
4781 return stub_entry;
4782 }
4783
4784 /* Store an Arm insn into an output section not processed by
4785 elf32_arm_write_section. */
4786
4787 static void
4788 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4789 bfd * output_bfd, bfd_vma val, void * ptr)
4790 {
4791 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4792 bfd_putl32 (val, ptr);
4793 else
4794 bfd_putb32 (val, ptr);
4795 }
4796
4797 /* Store a 16-bit Thumb insn into an output section not processed by
4798 elf32_arm_write_section. */
4799
4800 static void
4801 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4802 bfd * output_bfd, bfd_vma val, void * ptr)
4803 {
4804 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4805 bfd_putl16 (val, ptr);
4806 else
4807 bfd_putb16 (val, ptr);
4808 }
4809
4810 /* Store a Thumb2 insn into an output section not processed by
4811 elf32_arm_write_section. */
4812
4813 static void
4814 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4815 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4816 {
4817 /* T2 instructions are 16-bit streamed. */
4818 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4819 {
4820 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4821 bfd_putl16 ((val & 0xffff), ptr + 2);
4822 }
4823 else
4824 {
4825 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4826 bfd_putb16 ((val & 0xffff), ptr + 2);
4827 }
4828 }
4829
4830 /* If it's possible to change R_TYPE to a more efficient access
4831 model, return the new reloc type. */
4832
4833 static unsigned
4834 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4835 struct elf_link_hash_entry *h)
4836 {
4837 int is_local = (h == NULL);
4838
4839 if (bfd_link_pic (info)
4840 || (h && h->root.type == bfd_link_hash_undefweak))
4841 return r_type;
4842
4843 /* We do not support relaxations for Old TLS models. */
4844 switch (r_type)
4845 {
4846 case R_ARM_TLS_GOTDESC:
4847 case R_ARM_TLS_CALL:
4848 case R_ARM_THM_TLS_CALL:
4849 case R_ARM_TLS_DESCSEQ:
4850 case R_ARM_THM_TLS_DESCSEQ:
4851 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4852 }
4853
4854 return r_type;
4855 }
4856
4857 static bfd_reloc_status_type elf32_arm_final_link_relocate
4858 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4859 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4860 const char *, unsigned char, enum arm_st_branch_type,
4861 struct elf_link_hash_entry *, bfd_boolean *, char **);
4862
4863 static unsigned int
4864 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4865 {
4866 switch (stub_type)
4867 {
4868 case arm_stub_a8_veneer_b_cond:
4869 case arm_stub_a8_veneer_b:
4870 case arm_stub_a8_veneer_bl:
4871 return 2;
4872
4873 case arm_stub_long_branch_any_any:
4874 case arm_stub_long_branch_v4t_arm_thumb:
4875 case arm_stub_long_branch_thumb_only:
4876 case arm_stub_long_branch_thumb2_only:
4877 case arm_stub_long_branch_thumb2_only_pure:
4878 case arm_stub_long_branch_v4t_thumb_thumb:
4879 case arm_stub_long_branch_v4t_thumb_arm:
4880 case arm_stub_short_branch_v4t_thumb_arm:
4881 case arm_stub_long_branch_any_arm_pic:
4882 case arm_stub_long_branch_any_thumb_pic:
4883 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4884 case arm_stub_long_branch_v4t_arm_thumb_pic:
4885 case arm_stub_long_branch_v4t_thumb_arm_pic:
4886 case arm_stub_long_branch_thumb_only_pic:
4887 case arm_stub_long_branch_any_tls_pic:
4888 case arm_stub_long_branch_v4t_thumb_tls_pic:
4889 case arm_stub_cmse_branch_thumb_only:
4890 case arm_stub_a8_veneer_blx:
4891 return 4;
4892
4893 case arm_stub_long_branch_arm_nacl:
4894 case arm_stub_long_branch_arm_nacl_pic:
4895 return 16;
4896
4897 default:
4898 abort (); /* Should be unreachable. */
4899 }
4900 }
4901
4902 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4903 veneering (TRUE) or have their own symbol (FALSE). */
4904
4905 static bfd_boolean
4906 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4907 {
4908 if (stub_type >= max_stub_type)
4909 abort (); /* Should be unreachable. */
4910
4911 switch (stub_type)
4912 {
4913 case arm_stub_cmse_branch_thumb_only:
4914 return TRUE;
4915
4916 default:
4917 return FALSE;
4918 }
4919
4920 abort (); /* Should be unreachable. */
4921 }
4922
4923 /* Returns the padding needed for the dedicated section used stubs of type
4924 STUB_TYPE. */
4925
4926 static int
4927 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4928 {
4929 if (stub_type >= max_stub_type)
4930 abort (); /* Should be unreachable. */
4931
4932 switch (stub_type)
4933 {
4934 case arm_stub_cmse_branch_thumb_only:
4935 return 32;
4936
4937 default:
4938 return 0;
4939 }
4940
4941 abort (); /* Should be unreachable. */
4942 }
4943
4944 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4945 returns the address of the hash table field in HTAB holding the offset at
4946 which new veneers should be layed out in the stub section. */
4947
4948 static bfd_vma*
4949 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4950 enum elf32_arm_stub_type stub_type)
4951 {
4952 switch (stub_type)
4953 {
4954 case arm_stub_cmse_branch_thumb_only:
4955 return &htab->new_cmse_stub_offset;
4956
4957 default:
4958 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4959 return NULL;
4960 }
4961 }
4962
4963 static bfd_boolean
4964 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4965 void * in_arg)
4966 {
4967 #define MAXRELOCS 3
4968 bfd_boolean removed_sg_veneer;
4969 struct elf32_arm_stub_hash_entry *stub_entry;
4970 struct elf32_arm_link_hash_table *globals;
4971 struct bfd_link_info *info;
4972 asection *stub_sec;
4973 bfd *stub_bfd;
4974 bfd_byte *loc;
4975 bfd_vma sym_value;
4976 int template_size;
4977 int size;
4978 const insn_sequence *template_sequence;
4979 int i;
4980 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4981 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4982 int nrelocs = 0;
4983 int just_allocated = 0;
4984
4985 /* Massage our args to the form they really have. */
4986 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4987 info = (struct bfd_link_info *) in_arg;
4988
4989 globals = elf32_arm_hash_table (info);
4990 if (globals == NULL)
4991 return FALSE;
4992
4993 stub_sec = stub_entry->stub_sec;
4994
4995 if ((globals->fix_cortex_a8 < 0)
4996 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4997 /* We have to do less-strictly-aligned fixes last. */
4998 return TRUE;
4999
5000 /* Assign a slot at the end of section if none assigned yet. */
5001 if (stub_entry->stub_offset == (bfd_vma) -1)
5002 {
5003 stub_entry->stub_offset = stub_sec->size;
5004 just_allocated = 1;
5005 }
5006 loc = stub_sec->contents + stub_entry->stub_offset;
5007
5008 stub_bfd = stub_sec->owner;
5009
5010 /* This is the address of the stub destination. */
5011 sym_value = (stub_entry->target_value
5012 + stub_entry->target_section->output_offset
5013 + stub_entry->target_section->output_section->vma);
5014
5015 template_sequence = stub_entry->stub_template;
5016 template_size = stub_entry->stub_template_size;
5017
5018 size = 0;
5019 for (i = 0; i < template_size; i++)
5020 {
5021 switch (template_sequence[i].type)
5022 {
5023 case THUMB16_TYPE:
5024 {
5025 bfd_vma data = (bfd_vma) template_sequence[i].data;
5026 if (template_sequence[i].reloc_addend != 0)
5027 {
5028 /* We've borrowed the reloc_addend field to mean we should
5029 insert a condition code into this (Thumb-1 branch)
5030 instruction. See THUMB16_BCOND_INSN. */
5031 BFD_ASSERT ((data & 0xff00) == 0xd000);
5032 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
5033 }
5034 bfd_put_16 (stub_bfd, data, loc + size);
5035 size += 2;
5036 }
5037 break;
5038
5039 case THUMB32_TYPE:
5040 bfd_put_16 (stub_bfd,
5041 (template_sequence[i].data >> 16) & 0xffff,
5042 loc + size);
5043 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
5044 loc + size + 2);
5045 if (template_sequence[i].r_type != R_ARM_NONE)
5046 {
5047 stub_reloc_idx[nrelocs] = i;
5048 stub_reloc_offset[nrelocs++] = size;
5049 }
5050 size += 4;
5051 break;
5052
5053 case ARM_TYPE:
5054 bfd_put_32 (stub_bfd, template_sequence[i].data,
5055 loc + size);
5056 /* Handle cases where the target is encoded within the
5057 instruction. */
5058 if (template_sequence[i].r_type == R_ARM_JUMP24)
5059 {
5060 stub_reloc_idx[nrelocs] = i;
5061 stub_reloc_offset[nrelocs++] = size;
5062 }
5063 size += 4;
5064 break;
5065
5066 case DATA_TYPE:
5067 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
5068 stub_reloc_idx[nrelocs] = i;
5069 stub_reloc_offset[nrelocs++] = size;
5070 size += 4;
5071 break;
5072
5073 default:
5074 BFD_FAIL ();
5075 return FALSE;
5076 }
5077 }
5078
5079 if (just_allocated)
5080 stub_sec->size += size;
5081
5082 /* Stub size has already been computed in arm_size_one_stub. Check
5083 consistency. */
5084 BFD_ASSERT (size == stub_entry->stub_size);
5085
5086 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
5087 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
5088 sym_value |= 1;
5089
5090 /* Assume non empty slots have at least one and at most MAXRELOCS entries
5091 to relocate in each stub. */
5092 removed_sg_veneer =
5093 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5094 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
5095
5096 for (i = 0; i < nrelocs; i++)
5097 {
5098 Elf_Internal_Rela rel;
5099 bfd_boolean unresolved_reloc;
5100 char *error_message;
5101 bfd_vma points_to =
5102 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
5103
5104 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
5105 rel.r_info = ELF32_R_INFO (0,
5106 template_sequence[stub_reloc_idx[i]].r_type);
5107 rel.r_addend = 0;
5108
5109 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
5110 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5111 template should refer back to the instruction after the original
5112 branch. We use target_section as Cortex-A8 erratum workaround stubs
5113 are only generated when both source and target are in the same
5114 section. */
5115 points_to = stub_entry->target_section->output_section->vma
5116 + stub_entry->target_section->output_offset
5117 + stub_entry->source_value;
5118
5119 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5120 (template_sequence[stub_reloc_idx[i]].r_type),
5121 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
5122 points_to, info, stub_entry->target_section, "", STT_FUNC,
5123 stub_entry->branch_type,
5124 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
5125 &error_message);
5126 }
5127
5128 return TRUE;
5129 #undef MAXRELOCS
5130 }
5131
5132 /* Calculate the template, template size and instruction size for a stub.
5133 Return value is the instruction size. */
5134
5135 static unsigned int
5136 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
5137 const insn_sequence **stub_template,
5138 int *stub_template_size)
5139 {
5140 const insn_sequence *template_sequence = NULL;
5141 int template_size = 0, i;
5142 unsigned int size;
5143
5144 template_sequence = stub_definitions[stub_type].template_sequence;
5145 if (stub_template)
5146 *stub_template = template_sequence;
5147
5148 template_size = stub_definitions[stub_type].template_size;
5149 if (stub_template_size)
5150 *stub_template_size = template_size;
5151
5152 size = 0;
5153 for (i = 0; i < template_size; i++)
5154 {
5155 switch (template_sequence[i].type)
5156 {
5157 case THUMB16_TYPE:
5158 size += 2;
5159 break;
5160
5161 case ARM_TYPE:
5162 case THUMB32_TYPE:
5163 case DATA_TYPE:
5164 size += 4;
5165 break;
5166
5167 default:
5168 BFD_FAIL ();
5169 return 0;
5170 }
5171 }
5172
5173 return size;
5174 }
5175
5176 /* As above, but don't actually build the stub. Just bump offset so
5177 we know stub section sizes. */
5178
5179 static bfd_boolean
5180 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
5181 void *in_arg ATTRIBUTE_UNUSED)
5182 {
5183 struct elf32_arm_stub_hash_entry *stub_entry;
5184 const insn_sequence *template_sequence;
5185 int template_size, size;
5186
5187 /* Massage our args to the form they really have. */
5188 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5189
5190 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
5191 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
5192
5193 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
5194 &template_size);
5195
5196 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
5197 if (stub_entry->stub_template_size)
5198 {
5199 stub_entry->stub_size = size;
5200 stub_entry->stub_template = template_sequence;
5201 stub_entry->stub_template_size = template_size;
5202 }
5203
5204 /* Already accounted for. */
5205 if (stub_entry->stub_offset != (bfd_vma) -1)
5206 return TRUE;
5207
5208 size = (size + 7) & ~7;
5209 stub_entry->stub_sec->size += size;
5210
5211 return TRUE;
5212 }
5213
5214 /* External entry points for sizing and building linker stubs. */
5215
5216 /* Set up various things so that we can make a list of input sections
5217 for each output section included in the link. Returns -1 on error,
5218 0 when no stubs will be needed, and 1 on success. */
5219
5220 int
5221 elf32_arm_setup_section_lists (bfd *output_bfd,
5222 struct bfd_link_info *info)
5223 {
5224 bfd *input_bfd;
5225 unsigned int bfd_count;
5226 unsigned int top_id, top_index;
5227 asection *section;
5228 asection **input_list, **list;
5229 bfd_size_type amt;
5230 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5231
5232 if (htab == NULL)
5233 return 0;
5234 if (! is_elf_hash_table (htab))
5235 return 0;
5236
5237 /* Count the number of input BFDs and find the top input section id. */
5238 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
5239 input_bfd != NULL;
5240 input_bfd = input_bfd->link.next)
5241 {
5242 bfd_count += 1;
5243 for (section = input_bfd->sections;
5244 section != NULL;
5245 section = section->next)
5246 {
5247 if (top_id < section->id)
5248 top_id = section->id;
5249 }
5250 }
5251 htab->bfd_count = bfd_count;
5252
5253 amt = sizeof (struct map_stub) * (top_id + 1);
5254 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
5255 if (htab->stub_group == NULL)
5256 return -1;
5257 htab->top_id = top_id;
5258
5259 /* We can't use output_bfd->section_count here to find the top output
5260 section index as some sections may have been removed, and
5261 _bfd_strip_section_from_output doesn't renumber the indices. */
5262 for (section = output_bfd->sections, top_index = 0;
5263 section != NULL;
5264 section = section->next)
5265 {
5266 if (top_index < section->index)
5267 top_index = section->index;
5268 }
5269
5270 htab->top_index = top_index;
5271 amt = sizeof (asection *) * (top_index + 1);
5272 input_list = (asection **) bfd_malloc (amt);
5273 htab->input_list = input_list;
5274 if (input_list == NULL)
5275 return -1;
5276
5277 /* For sections we aren't interested in, mark their entries with a
5278 value we can check later. */
5279 list = input_list + top_index;
5280 do
5281 *list = bfd_abs_section_ptr;
5282 while (list-- != input_list);
5283
5284 for (section = output_bfd->sections;
5285 section != NULL;
5286 section = section->next)
5287 {
5288 if ((section->flags & SEC_CODE) != 0)
5289 input_list[section->index] = NULL;
5290 }
5291
5292 return 1;
5293 }
5294
5295 /* The linker repeatedly calls this function for each input section,
5296 in the order that input sections are linked into output sections.
5297 Build lists of input sections to determine groupings between which
5298 we may insert linker stubs. */
5299
5300 void
5301 elf32_arm_next_input_section (struct bfd_link_info *info,
5302 asection *isec)
5303 {
5304 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5305
5306 if (htab == NULL)
5307 return;
5308
5309 if (isec->output_section->index <= htab->top_index)
5310 {
5311 asection **list = htab->input_list + isec->output_section->index;
5312
5313 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5314 {
5315 /* Steal the link_sec pointer for our list. */
5316 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5317 /* This happens to make the list in reverse order,
5318 which we reverse later. */
5319 PREV_SEC (isec) = *list;
5320 *list = isec;
5321 }
5322 }
5323 }
5324
5325 /* See whether we can group stub sections together. Grouping stub
5326 sections may result in fewer stubs. More importantly, we need to
5327 put all .init* and .fini* stubs at the end of the .init or
5328 .fini output sections respectively, because glibc splits the
5329 _init and _fini functions into multiple parts. Putting a stub in
5330 the middle of a function is not a good idea. */
5331
5332 static void
5333 group_sections (struct elf32_arm_link_hash_table *htab,
5334 bfd_size_type stub_group_size,
5335 bfd_boolean stubs_always_after_branch)
5336 {
5337 asection **list = htab->input_list;
5338
5339 do
5340 {
5341 asection *tail = *list;
5342 asection *head;
5343
5344 if (tail == bfd_abs_section_ptr)
5345 continue;
5346
5347 /* Reverse the list: we must avoid placing stubs at the
5348 beginning of the section because the beginning of the text
5349 section may be required for an interrupt vector in bare metal
5350 code. */
5351 #define NEXT_SEC PREV_SEC
5352 head = NULL;
5353 while (tail != NULL)
5354 {
5355 /* Pop from tail. */
5356 asection *item = tail;
5357 tail = PREV_SEC (item);
5358
5359 /* Push on head. */
5360 NEXT_SEC (item) = head;
5361 head = item;
5362 }
5363
5364 while (head != NULL)
5365 {
5366 asection *curr;
5367 asection *next;
5368 bfd_vma stub_group_start = head->output_offset;
5369 bfd_vma end_of_next;
5370
5371 curr = head;
5372 while (NEXT_SEC (curr) != NULL)
5373 {
5374 next = NEXT_SEC (curr);
5375 end_of_next = next->output_offset + next->size;
5376 if (end_of_next - stub_group_start >= stub_group_size)
5377 /* End of NEXT is too far from start, so stop. */
5378 break;
5379 /* Add NEXT to the group. */
5380 curr = next;
5381 }
5382
5383 /* OK, the size from the start to the start of CURR is less
5384 than stub_group_size and thus can be handled by one stub
5385 section. (Or the head section is itself larger than
5386 stub_group_size, in which case we may be toast.)
5387 We should really be keeping track of the total size of
5388 stubs added here, as stubs contribute to the final output
5389 section size. */
5390 do
5391 {
5392 next = NEXT_SEC (head);
5393 /* Set up this stub group. */
5394 htab->stub_group[head->id].link_sec = curr;
5395 }
5396 while (head != curr && (head = next) != NULL);
5397
5398 /* But wait, there's more! Input sections up to stub_group_size
5399 bytes after the stub section can be handled by it too. */
5400 if (!stubs_always_after_branch)
5401 {
5402 stub_group_start = curr->output_offset + curr->size;
5403
5404 while (next != NULL)
5405 {
5406 end_of_next = next->output_offset + next->size;
5407 if (end_of_next - stub_group_start >= stub_group_size)
5408 /* End of NEXT is too far from stubs, so stop. */
5409 break;
5410 /* Add NEXT to the stub group. */
5411 head = next;
5412 next = NEXT_SEC (head);
5413 htab->stub_group[head->id].link_sec = curr;
5414 }
5415 }
5416 head = next;
5417 }
5418 }
5419 while (list++ != htab->input_list + htab->top_index);
5420
5421 free (htab->input_list);
5422 #undef PREV_SEC
5423 #undef NEXT_SEC
5424 }
5425
5426 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5427 erratum fix. */
5428
5429 static int
5430 a8_reloc_compare (const void *a, const void *b)
5431 {
5432 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5433 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5434
5435 if (ra->from < rb->from)
5436 return -1;
5437 else if (ra->from > rb->from)
5438 return 1;
5439 else
5440 return 0;
5441 }
5442
5443 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5444 const char *, char **);
5445
5446 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5447 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5448 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5449 otherwise. */
5450
5451 static bfd_boolean
5452 cortex_a8_erratum_scan (bfd *input_bfd,
5453 struct bfd_link_info *info,
5454 struct a8_erratum_fix **a8_fixes_p,
5455 unsigned int *num_a8_fixes_p,
5456 unsigned int *a8_fix_table_size_p,
5457 struct a8_erratum_reloc *a8_relocs,
5458 unsigned int num_a8_relocs,
5459 unsigned prev_num_a8_fixes,
5460 bfd_boolean *stub_changed_p)
5461 {
5462 asection *section;
5463 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5464 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5465 unsigned int num_a8_fixes = *num_a8_fixes_p;
5466 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5467
5468 if (htab == NULL)
5469 return FALSE;
5470
5471 for (section = input_bfd->sections;
5472 section != NULL;
5473 section = section->next)
5474 {
5475 bfd_byte *contents = NULL;
5476 struct _arm_elf_section_data *sec_data;
5477 unsigned int span;
5478 bfd_vma base_vma;
5479
5480 if (elf_section_type (section) != SHT_PROGBITS
5481 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5482 || (section->flags & SEC_EXCLUDE) != 0
5483 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5484 || (section->output_section == bfd_abs_section_ptr))
5485 continue;
5486
5487 base_vma = section->output_section->vma + section->output_offset;
5488
5489 if (elf_section_data (section)->this_hdr.contents != NULL)
5490 contents = elf_section_data (section)->this_hdr.contents;
5491 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5492 return TRUE;
5493
5494 sec_data = elf32_arm_section_data (section);
5495
5496 for (span = 0; span < sec_data->mapcount; span++)
5497 {
5498 unsigned int span_start = sec_data->map[span].vma;
5499 unsigned int span_end = (span == sec_data->mapcount - 1)
5500 ? section->size : sec_data->map[span + 1].vma;
5501 unsigned int i;
5502 char span_type = sec_data->map[span].type;
5503 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5504
5505 if (span_type != 't')
5506 continue;
5507
5508 /* Span is entirely within a single 4KB region: skip scanning. */
5509 if (((base_vma + span_start) & ~0xfff)
5510 == ((base_vma + span_end) & ~0xfff))
5511 continue;
5512
5513 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5514
5515 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5516 * The branch target is in the same 4KB region as the
5517 first half of the branch.
5518 * The instruction before the branch is a 32-bit
5519 length non-branch instruction. */
5520 for (i = span_start; i < span_end;)
5521 {
5522 unsigned int insn = bfd_getl16 (&contents[i]);
5523 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5524 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5525
5526 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5527 insn_32bit = TRUE;
5528
5529 if (insn_32bit)
5530 {
5531 /* Load the rest of the insn (in manual-friendly order). */
5532 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5533
5534 /* Encoding T4: B<c>.W. */
5535 is_b = (insn & 0xf800d000) == 0xf0009000;
5536 /* Encoding T1: BL<c>.W. */
5537 is_bl = (insn & 0xf800d000) == 0xf000d000;
5538 /* Encoding T2: BLX<c>.W. */
5539 is_blx = (insn & 0xf800d000) == 0xf000c000;
5540 /* Encoding T3: B<c>.W (not permitted in IT block). */
5541 is_bcc = (insn & 0xf800d000) == 0xf0008000
5542 && (insn & 0x07f00000) != 0x03800000;
5543 }
5544
5545 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5546
5547 if (((base_vma + i) & 0xfff) == 0xffe
5548 && insn_32bit
5549 && is_32bit_branch
5550 && last_was_32bit
5551 && ! last_was_branch)
5552 {
5553 bfd_signed_vma offset = 0;
5554 bfd_boolean force_target_arm = FALSE;
5555 bfd_boolean force_target_thumb = FALSE;
5556 bfd_vma target;
5557 enum elf32_arm_stub_type stub_type = arm_stub_none;
5558 struct a8_erratum_reloc key, *found;
5559 bfd_boolean use_plt = FALSE;
5560
5561 key.from = base_vma + i;
5562 found = (struct a8_erratum_reloc *)
5563 bsearch (&key, a8_relocs, num_a8_relocs,
5564 sizeof (struct a8_erratum_reloc),
5565 &a8_reloc_compare);
5566
5567 if (found)
5568 {
5569 char *error_message = NULL;
5570 struct elf_link_hash_entry *entry;
5571
5572 /* We don't care about the error returned from this
5573 function, only if there is glue or not. */
5574 entry = find_thumb_glue (info, found->sym_name,
5575 &error_message);
5576
5577 if (entry)
5578 found->non_a8_stub = TRUE;
5579
5580 /* Keep a simpler condition, for the sake of clarity. */
5581 if (htab->root.splt != NULL && found->hash != NULL
5582 && found->hash->root.plt.offset != (bfd_vma) -1)
5583 use_plt = TRUE;
5584
5585 if (found->r_type == R_ARM_THM_CALL)
5586 {
5587 if (found->branch_type == ST_BRANCH_TO_ARM
5588 || use_plt)
5589 force_target_arm = TRUE;
5590 else
5591 force_target_thumb = TRUE;
5592 }
5593 }
5594
5595 /* Check if we have an offending branch instruction. */
5596
5597 if (found && found->non_a8_stub)
5598 /* We've already made a stub for this instruction, e.g.
5599 it's a long branch or a Thumb->ARM stub. Assume that
5600 stub will suffice to work around the A8 erratum (see
5601 setting of always_after_branch above). */
5602 ;
5603 else if (is_bcc)
5604 {
5605 offset = (insn & 0x7ff) << 1;
5606 offset |= (insn & 0x3f0000) >> 4;
5607 offset |= (insn & 0x2000) ? 0x40000 : 0;
5608 offset |= (insn & 0x800) ? 0x80000 : 0;
5609 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5610 if (offset & 0x100000)
5611 offset |= ~ ((bfd_signed_vma) 0xfffff);
5612 stub_type = arm_stub_a8_veneer_b_cond;
5613 }
5614 else if (is_b || is_bl || is_blx)
5615 {
5616 int s = (insn & 0x4000000) != 0;
5617 int j1 = (insn & 0x2000) != 0;
5618 int j2 = (insn & 0x800) != 0;
5619 int i1 = !(j1 ^ s);
5620 int i2 = !(j2 ^ s);
5621
5622 offset = (insn & 0x7ff) << 1;
5623 offset |= (insn & 0x3ff0000) >> 4;
5624 offset |= i2 << 22;
5625 offset |= i1 << 23;
5626 offset |= s << 24;
5627 if (offset & 0x1000000)
5628 offset |= ~ ((bfd_signed_vma) 0xffffff);
5629
5630 if (is_blx)
5631 offset &= ~ ((bfd_signed_vma) 3);
5632
5633 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5634 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5635 }
5636
5637 if (stub_type != arm_stub_none)
5638 {
5639 bfd_vma pc_for_insn = base_vma + i + 4;
5640
5641 /* The original instruction is a BL, but the target is
5642 an ARM instruction. If we were not making a stub,
5643 the BL would have been converted to a BLX. Use the
5644 BLX stub instead in that case. */
5645 if (htab->use_blx && force_target_arm
5646 && stub_type == arm_stub_a8_veneer_bl)
5647 {
5648 stub_type = arm_stub_a8_veneer_blx;
5649 is_blx = TRUE;
5650 is_bl = FALSE;
5651 }
5652 /* Conversely, if the original instruction was
5653 BLX but the target is Thumb mode, use the BL
5654 stub. */
5655 else if (force_target_thumb
5656 && stub_type == arm_stub_a8_veneer_blx)
5657 {
5658 stub_type = arm_stub_a8_veneer_bl;
5659 is_blx = FALSE;
5660 is_bl = TRUE;
5661 }
5662
5663 if (is_blx)
5664 pc_for_insn &= ~ ((bfd_vma) 3);
5665
5666 /* If we found a relocation, use the proper destination,
5667 not the offset in the (unrelocated) instruction.
5668 Note this is always done if we switched the stub type
5669 above. */
5670 if (found)
5671 offset =
5672 (bfd_signed_vma) (found->destination - pc_for_insn);
5673
5674 /* If the stub will use a Thumb-mode branch to a
5675 PLT target, redirect it to the preceding Thumb
5676 entry point. */
5677 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5678 offset -= PLT_THUMB_STUB_SIZE;
5679
5680 target = pc_for_insn + offset;
5681
5682 /* The BLX stub is ARM-mode code. Adjust the offset to
5683 take the different PC value (+8 instead of +4) into
5684 account. */
5685 if (stub_type == arm_stub_a8_veneer_blx)
5686 offset += 4;
5687
5688 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5689 {
5690 char *stub_name = NULL;
5691
5692 if (num_a8_fixes == a8_fix_table_size)
5693 {
5694 a8_fix_table_size *= 2;
5695 a8_fixes = (struct a8_erratum_fix *)
5696 bfd_realloc (a8_fixes,
5697 sizeof (struct a8_erratum_fix)
5698 * a8_fix_table_size);
5699 }
5700
5701 if (num_a8_fixes < prev_num_a8_fixes)
5702 {
5703 /* If we're doing a subsequent scan,
5704 check if we've found the same fix as
5705 before, and try and reuse the stub
5706 name. */
5707 stub_name = a8_fixes[num_a8_fixes].stub_name;
5708 if ((a8_fixes[num_a8_fixes].section != section)
5709 || (a8_fixes[num_a8_fixes].offset != i))
5710 {
5711 free (stub_name);
5712 stub_name = NULL;
5713 *stub_changed_p = TRUE;
5714 }
5715 }
5716
5717 if (!stub_name)
5718 {
5719 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5720 if (stub_name != NULL)
5721 sprintf (stub_name, "%x:%x", section->id, i);
5722 }
5723
5724 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5725 a8_fixes[num_a8_fixes].section = section;
5726 a8_fixes[num_a8_fixes].offset = i;
5727 a8_fixes[num_a8_fixes].target_offset =
5728 target - base_vma;
5729 a8_fixes[num_a8_fixes].orig_insn = insn;
5730 a8_fixes[num_a8_fixes].stub_name = stub_name;
5731 a8_fixes[num_a8_fixes].stub_type = stub_type;
5732 a8_fixes[num_a8_fixes].branch_type =
5733 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5734
5735 num_a8_fixes++;
5736 }
5737 }
5738 }
5739
5740 i += insn_32bit ? 4 : 2;
5741 last_was_32bit = insn_32bit;
5742 last_was_branch = is_32bit_branch;
5743 }
5744 }
5745
5746 if (elf_section_data (section)->this_hdr.contents == NULL)
5747 free (contents);
5748 }
5749
5750 *a8_fixes_p = a8_fixes;
5751 *num_a8_fixes_p = num_a8_fixes;
5752 *a8_fix_table_size_p = a8_fix_table_size;
5753
5754 return FALSE;
5755 }
5756
5757 /* Create or update a stub entry depending on whether the stub can already be
5758 found in HTAB. The stub is identified by:
5759 - its type STUB_TYPE
5760 - its source branch (note that several can share the same stub) whose
5761 section and relocation (if any) are given by SECTION and IRELA
5762 respectively
5763 - its target symbol whose input section, hash, name, value and branch type
5764 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5765 respectively
5766
5767 If found, the value of the stub's target symbol is updated from SYM_VALUE
5768 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5769 TRUE and the stub entry is initialized.
5770
5771 Returns the stub that was created or updated, or NULL if an error
5772 occurred. */
5773
5774 static struct elf32_arm_stub_hash_entry *
5775 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5776 enum elf32_arm_stub_type stub_type, asection *section,
5777 Elf_Internal_Rela *irela, asection *sym_sec,
5778 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5779 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5780 bfd_boolean *new_stub)
5781 {
5782 const asection *id_sec;
5783 char *stub_name;
5784 struct elf32_arm_stub_hash_entry *stub_entry;
5785 unsigned int r_type;
5786 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5787
5788 BFD_ASSERT (stub_type != arm_stub_none);
5789 *new_stub = FALSE;
5790
5791 if (sym_claimed)
5792 stub_name = sym_name;
5793 else
5794 {
5795 BFD_ASSERT (irela);
5796 BFD_ASSERT (section);
5797 BFD_ASSERT (section->id <= htab->top_id);
5798
5799 /* Support for grouping stub sections. */
5800 id_sec = htab->stub_group[section->id].link_sec;
5801
5802 /* Get the name of this stub. */
5803 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5804 stub_type);
5805 if (!stub_name)
5806 return NULL;
5807 }
5808
5809 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5810 FALSE);
5811 /* The proper stub has already been created, just update its value. */
5812 if (stub_entry != NULL)
5813 {
5814 if (!sym_claimed)
5815 free (stub_name);
5816 stub_entry->target_value = sym_value;
5817 return stub_entry;
5818 }
5819
5820 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5821 if (stub_entry == NULL)
5822 {
5823 if (!sym_claimed)
5824 free (stub_name);
5825 return NULL;
5826 }
5827
5828 stub_entry->target_value = sym_value;
5829 stub_entry->target_section = sym_sec;
5830 stub_entry->stub_type = stub_type;
5831 stub_entry->h = hash;
5832 stub_entry->branch_type = branch_type;
5833
5834 if (sym_claimed)
5835 stub_entry->output_name = sym_name;
5836 else
5837 {
5838 if (sym_name == NULL)
5839 sym_name = "unnamed";
5840 stub_entry->output_name = (char *)
5841 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5842 + strlen (sym_name));
5843 if (stub_entry->output_name == NULL)
5844 {
5845 free (stub_name);
5846 return NULL;
5847 }
5848
5849 /* For historical reasons, use the existing names for ARM-to-Thumb and
5850 Thumb-to-ARM stubs. */
5851 r_type = ELF32_R_TYPE (irela->r_info);
5852 if ((r_type == (unsigned int) R_ARM_THM_CALL
5853 || r_type == (unsigned int) R_ARM_THM_JUMP24
5854 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5855 && branch_type == ST_BRANCH_TO_ARM)
5856 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5857 else if ((r_type == (unsigned int) R_ARM_CALL
5858 || r_type == (unsigned int) R_ARM_JUMP24)
5859 && branch_type == ST_BRANCH_TO_THUMB)
5860 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5861 else
5862 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5863 }
5864
5865 *new_stub = TRUE;
5866 return stub_entry;
5867 }
5868
5869 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5870 gateway veneer to transition from non secure to secure state and create them
5871 accordingly.
5872
5873 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5874 defines the conditions that govern Secure Gateway veneer creation for a
5875 given symbol <SYM> as follows:
5876 - it has function type
5877 - it has non local binding
5878 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5879 same type, binding and value as <SYM> (called normal symbol).
5880 An entry function can handle secure state transition itself in which case
5881 its special symbol would have a different value from the normal symbol.
5882
5883 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5884 entry mapping while HTAB gives the name to hash entry mapping.
5885 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5886 created.
5887
5888 The return value gives whether a stub failed to be allocated. */
5889
5890 static bfd_boolean
5891 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5892 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5893 int *cmse_stub_created)
5894 {
5895 const struct elf_backend_data *bed;
5896 Elf_Internal_Shdr *symtab_hdr;
5897 unsigned i, j, sym_count, ext_start;
5898 Elf_Internal_Sym *cmse_sym, *local_syms;
5899 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5900 enum arm_st_branch_type branch_type;
5901 char *sym_name, *lsym_name;
5902 bfd_vma sym_value;
5903 asection *section;
5904 struct elf32_arm_stub_hash_entry *stub_entry;
5905 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5906
5907 bed = get_elf_backend_data (input_bfd);
5908 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5909 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5910 ext_start = symtab_hdr->sh_info;
5911 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5912 && out_attr[Tag_CPU_arch_profile].i == 'M');
5913
5914 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5915 if (local_syms == NULL)
5916 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5917 symtab_hdr->sh_info, 0, NULL, NULL,
5918 NULL);
5919 if (symtab_hdr->sh_info && local_syms == NULL)
5920 return FALSE;
5921
5922 /* Scan symbols. */
5923 for (i = 0; i < sym_count; i++)
5924 {
5925 cmse_invalid = FALSE;
5926
5927 if (i < ext_start)
5928 {
5929 cmse_sym = &local_syms[i];
5930 /* Not a special symbol. */
5931 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal))
5932 continue;
5933 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5934 symtab_hdr->sh_link,
5935 cmse_sym->st_name);
5936 /* Special symbol with local binding. */
5937 cmse_invalid = TRUE;
5938 }
5939 else
5940 {
5941 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5942 sym_name = (char *) cmse_hash->root.root.root.string;
5943
5944 /* Not a special symbol. */
5945 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
5946 continue;
5947
5948 /* Special symbol has incorrect binding or type. */
5949 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5950 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5951 || cmse_hash->root.type != STT_FUNC)
5952 cmse_invalid = TRUE;
5953 }
5954
5955 if (!is_v8m)
5956 {
5957 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
5958 "ARMv8-M architecture or later"),
5959 input_bfd, sym_name);
5960 is_v8m = TRUE; /* Avoid multiple warning. */
5961 ret = FALSE;
5962 }
5963
5964 if (cmse_invalid)
5965 {
5966 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
5967 " a global or weak function symbol"),
5968 input_bfd, sym_name);
5969 ret = FALSE;
5970 if (i < ext_start)
5971 continue;
5972 }
5973
5974 sym_name += strlen (CMSE_PREFIX);
5975 hash = (struct elf32_arm_link_hash_entry *)
5976 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5977
5978 /* No associated normal symbol or it is neither global nor weak. */
5979 if (!hash
5980 || (hash->root.root.type != bfd_link_hash_defined
5981 && hash->root.root.type != bfd_link_hash_defweak)
5982 || hash->root.type != STT_FUNC)
5983 {
5984 /* Initialize here to avoid warning about use of possibly
5985 uninitialized variable. */
5986 j = 0;
5987
5988 if (!hash)
5989 {
5990 /* Searching for a normal symbol with local binding. */
5991 for (; j < ext_start; j++)
5992 {
5993 lsym_name =
5994 bfd_elf_string_from_elf_section (input_bfd,
5995 symtab_hdr->sh_link,
5996 local_syms[j].st_name);
5997 if (!strcmp (sym_name, lsym_name))
5998 break;
5999 }
6000 }
6001
6002 if (hash || j < ext_start)
6003 {
6004 _bfd_error_handler
6005 (_("%pB: invalid standard symbol `%s'; it must be "
6006 "a global or weak function symbol"),
6007 input_bfd, sym_name);
6008 }
6009 else
6010 _bfd_error_handler
6011 (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name);
6012 ret = FALSE;
6013 if (!hash)
6014 continue;
6015 }
6016
6017 sym_value = hash->root.root.u.def.value;
6018 section = hash->root.root.u.def.section;
6019
6020 if (cmse_hash->root.root.u.def.section != section)
6021 {
6022 _bfd_error_handler
6023 (_("%pB: `%s' and its special symbol are in different sections"),
6024 input_bfd, sym_name);
6025 ret = FALSE;
6026 }
6027 if (cmse_hash->root.root.u.def.value != sym_value)
6028 continue; /* Ignore: could be an entry function starting with SG. */
6029
6030 /* If this section is a link-once section that will be discarded, then
6031 don't create any stubs. */
6032 if (section->output_section == NULL)
6033 {
6034 _bfd_error_handler
6035 (_("%pB: entry function `%s' not output"), input_bfd, sym_name);
6036 continue;
6037 }
6038
6039 if (hash->root.size == 0)
6040 {
6041 _bfd_error_handler
6042 (_("%pB: entry function `%s' is empty"), input_bfd, sym_name);
6043 ret = FALSE;
6044 }
6045
6046 if (!ret)
6047 continue;
6048 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6049 stub_entry
6050 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6051 NULL, NULL, section, hash, sym_name,
6052 sym_value, branch_type, &new_stub);
6053
6054 if (stub_entry == NULL)
6055 ret = FALSE;
6056 else
6057 {
6058 BFD_ASSERT (new_stub);
6059 (*cmse_stub_created)++;
6060 }
6061 }
6062
6063 if (!symtab_hdr->contents)
6064 free (local_syms);
6065 return ret;
6066 }
6067
6068 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
6069 code entry function, ie can be called from non secure code without using a
6070 veneer. */
6071
6072 static bfd_boolean
6073 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
6074 {
6075 bfd_byte contents[4];
6076 uint32_t first_insn;
6077 asection *section;
6078 file_ptr offset;
6079 bfd *abfd;
6080
6081 /* Defined symbol of function type. */
6082 if (hash->root.root.type != bfd_link_hash_defined
6083 && hash->root.root.type != bfd_link_hash_defweak)
6084 return FALSE;
6085 if (hash->root.type != STT_FUNC)
6086 return FALSE;
6087
6088 /* Read first instruction. */
6089 section = hash->root.root.u.def.section;
6090 abfd = section->owner;
6091 offset = hash->root.root.u.def.value - section->vma;
6092 if (!bfd_get_section_contents (abfd, section, contents, offset,
6093 sizeof (contents)))
6094 return FALSE;
6095
6096 first_insn = bfd_get_32 (abfd, contents);
6097
6098 /* Starts by SG instruction. */
6099 return first_insn == 0xe97fe97f;
6100 }
6101
6102 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6103 secure gateway veneers (ie. the veneers was not in the input import library)
6104 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
6105
6106 static bfd_boolean
6107 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
6108 {
6109 struct elf32_arm_stub_hash_entry *stub_entry;
6110 struct bfd_link_info *info;
6111
6112 /* Massage our args to the form they really have. */
6113 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
6114 info = (struct bfd_link_info *) gen_info;
6115
6116 if (info->out_implib_bfd)
6117 return TRUE;
6118
6119 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
6120 return TRUE;
6121
6122 if (stub_entry->stub_offset == (bfd_vma) -1)
6123 _bfd_error_handler (" %s", stub_entry->output_name);
6124
6125 return TRUE;
6126 }
6127
6128 /* Set offset of each secure gateway veneers so that its address remain
6129 identical to the one in the input import library referred by
6130 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
6131 (present in input import library but absent from the executable being
6132 linked) or if new veneers appeared and there is no output import library
6133 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6134 number of secure gateway veneers found in the input import library.
6135
6136 The function returns whether an error occurred. If no error occurred,
6137 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6138 and this function and HTAB->new_cmse_stub_offset is set to the biggest
6139 veneer observed set for new veneers to be layed out after. */
6140
6141 static bfd_boolean
6142 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
6143 struct elf32_arm_link_hash_table *htab,
6144 int *cmse_stub_created)
6145 {
6146 long symsize;
6147 char *sym_name;
6148 flagword flags;
6149 long i, symcount;
6150 bfd *in_implib_bfd;
6151 asection *stub_out_sec;
6152 bfd_boolean ret = TRUE;
6153 Elf_Internal_Sym *intsym;
6154 const char *out_sec_name;
6155 bfd_size_type cmse_stub_size;
6156 asymbol **sympp = NULL, *sym;
6157 struct elf32_arm_link_hash_entry *hash;
6158 const insn_sequence *cmse_stub_template;
6159 struct elf32_arm_stub_hash_entry *stub_entry;
6160 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
6161 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
6162 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
6163
6164 /* No input secure gateway import library. */
6165 if (!htab->in_implib_bfd)
6166 return TRUE;
6167
6168 in_implib_bfd = htab->in_implib_bfd;
6169 if (!htab->cmse_implib)
6170 {
6171 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6172 "Gateway import libraries"), in_implib_bfd);
6173 return FALSE;
6174 }
6175
6176 /* Get symbol table size. */
6177 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
6178 if (symsize < 0)
6179 return FALSE;
6180
6181 /* Read in the input secure gateway import library's symbol table. */
6182 sympp = (asymbol **) xmalloc (symsize);
6183 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
6184 if (symcount < 0)
6185 {
6186 ret = FALSE;
6187 goto free_sym_buf;
6188 }
6189
6190 htab->new_cmse_stub_offset = 0;
6191 cmse_stub_size =
6192 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
6193 &cmse_stub_template,
6194 &cmse_stub_template_size);
6195 out_sec_name =
6196 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
6197 stub_out_sec =
6198 bfd_get_section_by_name (htab->obfd, out_sec_name);
6199 if (stub_out_sec != NULL)
6200 cmse_stub_sec_vma = stub_out_sec->vma;
6201
6202 /* Set addresses of veneers mentionned in input secure gateway import
6203 library's symbol table. */
6204 for (i = 0; i < symcount; i++)
6205 {
6206 sym = sympp[i];
6207 flags = sym->flags;
6208 sym_name = (char *) bfd_asymbol_name (sym);
6209 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
6210
6211 if (sym->section != bfd_abs_section_ptr
6212 || !(flags & (BSF_GLOBAL | BSF_WEAK))
6213 || (flags & BSF_FUNCTION) != BSF_FUNCTION
6214 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
6215 != ST_BRANCH_TO_THUMB))
6216 {
6217 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6218 "symbol should be absolute, global and "
6219 "refer to Thumb functions"),
6220 in_implib_bfd, sym_name);
6221 ret = FALSE;
6222 continue;
6223 }
6224
6225 veneer_value = bfd_asymbol_value (sym);
6226 stub_offset = veneer_value - cmse_stub_sec_vma;
6227 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
6228 FALSE, FALSE);
6229 hash = (struct elf32_arm_link_hash_entry *)
6230 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
6231
6232 /* Stub entry should have been created by cmse_scan or the symbol be of
6233 a secure function callable from non secure code. */
6234 if (!stub_entry && !hash)
6235 {
6236 bfd_boolean new_stub;
6237
6238 _bfd_error_handler
6239 (_("entry function `%s' disappeared from secure code"), sym_name);
6240 hash = (struct elf32_arm_link_hash_entry *)
6241 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
6242 stub_entry
6243 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6244 NULL, NULL, bfd_abs_section_ptr, hash,
6245 sym_name, veneer_value,
6246 ST_BRANCH_TO_THUMB, &new_stub);
6247 if (stub_entry == NULL)
6248 ret = FALSE;
6249 else
6250 {
6251 BFD_ASSERT (new_stub);
6252 new_cmse_stubs_created++;
6253 (*cmse_stub_created)++;
6254 }
6255 stub_entry->stub_template_size = stub_entry->stub_size = 0;
6256 stub_entry->stub_offset = stub_offset;
6257 }
6258 /* Symbol found is not callable from non secure code. */
6259 else if (!stub_entry)
6260 {
6261 if (!cmse_entry_fct_p (hash))
6262 {
6263 _bfd_error_handler (_("`%s' refers to a non entry function"),
6264 sym_name);
6265 ret = FALSE;
6266 }
6267 continue;
6268 }
6269 else
6270 {
6271 /* Only stubs for SG veneers should have been created. */
6272 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6273
6274 /* Check visibility hasn't changed. */
6275 if (!!(flags & BSF_GLOBAL)
6276 != (hash->root.root.type == bfd_link_hash_defined))
6277 _bfd_error_handler
6278 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd,
6279 sym_name);
6280
6281 stub_entry->stub_offset = stub_offset;
6282 }
6283
6284 /* Size should match that of a SG veneer. */
6285 if (intsym->st_size != cmse_stub_size)
6286 {
6287 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6288 in_implib_bfd, sym_name);
6289 ret = FALSE;
6290 }
6291
6292 /* Previous veneer address is before current SG veneer section. */
6293 if (veneer_value < cmse_stub_sec_vma)
6294 {
6295 /* Avoid offset underflow. */
6296 if (stub_entry)
6297 stub_entry->stub_offset = 0;
6298 stub_offset = 0;
6299 ret = FALSE;
6300 }
6301
6302 /* Complain if stub offset not a multiple of stub size. */
6303 if (stub_offset % cmse_stub_size)
6304 {
6305 _bfd_error_handler
6306 (_("offset of veneer for entry function `%s' not a multiple of "
6307 "its size"), sym_name);
6308 ret = FALSE;
6309 }
6310
6311 if (!ret)
6312 continue;
6313
6314 new_cmse_stubs_created--;
6315 if (veneer_value < cmse_stub_array_start)
6316 cmse_stub_array_start = veneer_value;
6317 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6318 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6319 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6320 }
6321
6322 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6323 {
6324 BFD_ASSERT (new_cmse_stubs_created > 0);
6325 _bfd_error_handler
6326 (_("new entry function(s) introduced but no output import library "
6327 "specified:"));
6328 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6329 }
6330
6331 if (cmse_stub_array_start != cmse_stub_sec_vma)
6332 {
6333 _bfd_error_handler
6334 (_("start address of `%s' is different from previous link"),
6335 out_sec_name);
6336 ret = FALSE;
6337 }
6338
6339 free_sym_buf:
6340 free (sympp);
6341 return ret;
6342 }
6343
6344 /* Determine and set the size of the stub section for a final link.
6345
6346 The basic idea here is to examine all the relocations looking for
6347 PC-relative calls to a target that is unreachable with a "bl"
6348 instruction. */
6349
6350 bfd_boolean
6351 elf32_arm_size_stubs (bfd *output_bfd,
6352 bfd *stub_bfd,
6353 struct bfd_link_info *info,
6354 bfd_signed_vma group_size,
6355 asection * (*add_stub_section) (const char *, asection *,
6356 asection *,
6357 unsigned int),
6358 void (*layout_sections_again) (void))
6359 {
6360 bfd_boolean ret = TRUE;
6361 obj_attribute *out_attr;
6362 int cmse_stub_created = 0;
6363 bfd_size_type stub_group_size;
6364 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6365 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6366 struct a8_erratum_fix *a8_fixes = NULL;
6367 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6368 struct a8_erratum_reloc *a8_relocs = NULL;
6369 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6370
6371 if (htab == NULL)
6372 return FALSE;
6373
6374 if (htab->fix_cortex_a8)
6375 {
6376 a8_fixes = (struct a8_erratum_fix *)
6377 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6378 a8_relocs = (struct a8_erratum_reloc *)
6379 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6380 }
6381
6382 /* Propagate mach to stub bfd, because it may not have been
6383 finalized when we created stub_bfd. */
6384 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6385 bfd_get_mach (output_bfd));
6386
6387 /* Stash our params away. */
6388 htab->stub_bfd = stub_bfd;
6389 htab->add_stub_section = add_stub_section;
6390 htab->layout_sections_again = layout_sections_again;
6391 stubs_always_after_branch = group_size < 0;
6392
6393 out_attr = elf_known_obj_attributes_proc (output_bfd);
6394 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6395
6396 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6397 as the first half of a 32-bit branch straddling two 4K pages. This is a
6398 crude way of enforcing that. */
6399 if (htab->fix_cortex_a8)
6400 stubs_always_after_branch = 1;
6401
6402 if (group_size < 0)
6403 stub_group_size = -group_size;
6404 else
6405 stub_group_size = group_size;
6406
6407 if (stub_group_size == 1)
6408 {
6409 /* Default values. */
6410 /* Thumb branch range is +-4MB has to be used as the default
6411 maximum size (a given section can contain both ARM and Thumb
6412 code, so the worst case has to be taken into account).
6413
6414 This value is 24K less than that, which allows for 2025
6415 12-byte stubs. If we exceed that, then we will fail to link.
6416 The user will have to relink with an explicit group size
6417 option. */
6418 stub_group_size = 4170000;
6419 }
6420
6421 group_sections (htab, stub_group_size, stubs_always_after_branch);
6422
6423 /* If we're applying the cortex A8 fix, we need to determine the
6424 program header size now, because we cannot change it later --
6425 that could alter section placements. Notice the A8 erratum fix
6426 ends up requiring the section addresses to remain unchanged
6427 modulo the page size. That's something we cannot represent
6428 inside BFD, and we don't want to force the section alignment to
6429 be the page size. */
6430 if (htab->fix_cortex_a8)
6431 (*htab->layout_sections_again) ();
6432
6433 while (1)
6434 {
6435 bfd *input_bfd;
6436 unsigned int bfd_indx;
6437 asection *stub_sec;
6438 enum elf32_arm_stub_type stub_type;
6439 bfd_boolean stub_changed = FALSE;
6440 unsigned prev_num_a8_fixes = num_a8_fixes;
6441
6442 num_a8_fixes = 0;
6443 for (input_bfd = info->input_bfds, bfd_indx = 0;
6444 input_bfd != NULL;
6445 input_bfd = input_bfd->link.next, bfd_indx++)
6446 {
6447 Elf_Internal_Shdr *symtab_hdr;
6448 asection *section;
6449 Elf_Internal_Sym *local_syms = NULL;
6450
6451 if (!is_arm_elf (input_bfd)
6452 || (elf_dyn_lib_class (input_bfd) & DYN_AS_NEEDED) != 0)
6453 continue;
6454
6455 num_a8_relocs = 0;
6456
6457 /* We'll need the symbol table in a second. */
6458 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6459 if (symtab_hdr->sh_info == 0)
6460 continue;
6461
6462 /* Limit scan of symbols to object file whose profile is
6463 Microcontroller to not hinder performance in the general case. */
6464 if (m_profile && first_veneer_scan)
6465 {
6466 struct elf_link_hash_entry **sym_hashes;
6467
6468 sym_hashes = elf_sym_hashes (input_bfd);
6469 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6470 &cmse_stub_created))
6471 goto error_ret_free_local;
6472
6473 if (cmse_stub_created != 0)
6474 stub_changed = TRUE;
6475 }
6476
6477 /* Walk over each section attached to the input bfd. */
6478 for (section = input_bfd->sections;
6479 section != NULL;
6480 section = section->next)
6481 {
6482 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6483
6484 /* If there aren't any relocs, then there's nothing more
6485 to do. */
6486 if ((section->flags & SEC_RELOC) == 0
6487 || section->reloc_count == 0
6488 || (section->flags & SEC_CODE) == 0)
6489 continue;
6490
6491 /* If this section is a link-once section that will be
6492 discarded, then don't create any stubs. */
6493 if (section->output_section == NULL
6494 || section->output_section->owner != output_bfd)
6495 continue;
6496
6497 /* Get the relocs. */
6498 internal_relocs
6499 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6500 NULL, info->keep_memory);
6501 if (internal_relocs == NULL)
6502 goto error_ret_free_local;
6503
6504 /* Now examine each relocation. */
6505 irela = internal_relocs;
6506 irelaend = irela + section->reloc_count;
6507 for (; irela < irelaend; irela++)
6508 {
6509 unsigned int r_type, r_indx;
6510 asection *sym_sec;
6511 bfd_vma sym_value;
6512 bfd_vma destination;
6513 struct elf32_arm_link_hash_entry *hash;
6514 const char *sym_name;
6515 unsigned char st_type;
6516 enum arm_st_branch_type branch_type;
6517 bfd_boolean created_stub = FALSE;
6518
6519 r_type = ELF32_R_TYPE (irela->r_info);
6520 r_indx = ELF32_R_SYM (irela->r_info);
6521
6522 if (r_type >= (unsigned int) R_ARM_max)
6523 {
6524 bfd_set_error (bfd_error_bad_value);
6525 error_ret_free_internal:
6526 if (elf_section_data (section)->relocs == NULL)
6527 free (internal_relocs);
6528 /* Fall through. */
6529 error_ret_free_local:
6530 if (local_syms != NULL
6531 && (symtab_hdr->contents
6532 != (unsigned char *) local_syms))
6533 free (local_syms);
6534 return FALSE;
6535 }
6536
6537 hash = NULL;
6538 if (r_indx >= symtab_hdr->sh_info)
6539 hash = elf32_arm_hash_entry
6540 (elf_sym_hashes (input_bfd)
6541 [r_indx - symtab_hdr->sh_info]);
6542
6543 /* Only look for stubs on branch instructions, or
6544 non-relaxed TLSCALL */
6545 if ((r_type != (unsigned int) R_ARM_CALL)
6546 && (r_type != (unsigned int) R_ARM_THM_CALL)
6547 && (r_type != (unsigned int) R_ARM_JUMP24)
6548 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6549 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6550 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6551 && (r_type != (unsigned int) R_ARM_PLT32)
6552 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6553 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6554 && r_type == elf32_arm_tls_transition
6555 (info, r_type, &hash->root)
6556 && ((hash ? hash->tls_type
6557 : (elf32_arm_local_got_tls_type
6558 (input_bfd)[r_indx]))
6559 & GOT_TLS_GDESC) != 0))
6560 continue;
6561
6562 /* Now determine the call target, its name, value,
6563 section. */
6564 sym_sec = NULL;
6565 sym_value = 0;
6566 destination = 0;
6567 sym_name = NULL;
6568
6569 if (r_type == (unsigned int) R_ARM_TLS_CALL
6570 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6571 {
6572 /* A non-relaxed TLS call. The target is the
6573 plt-resident trampoline and nothing to do
6574 with the symbol. */
6575 BFD_ASSERT (htab->tls_trampoline > 0);
6576 sym_sec = htab->root.splt;
6577 sym_value = htab->tls_trampoline;
6578 hash = 0;
6579 st_type = STT_FUNC;
6580 branch_type = ST_BRANCH_TO_ARM;
6581 }
6582 else if (!hash)
6583 {
6584 /* It's a local symbol. */
6585 Elf_Internal_Sym *sym;
6586
6587 if (local_syms == NULL)
6588 {
6589 local_syms
6590 = (Elf_Internal_Sym *) symtab_hdr->contents;
6591 if (local_syms == NULL)
6592 local_syms
6593 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6594 symtab_hdr->sh_info, 0,
6595 NULL, NULL, NULL);
6596 if (local_syms == NULL)
6597 goto error_ret_free_internal;
6598 }
6599
6600 sym = local_syms + r_indx;
6601 if (sym->st_shndx == SHN_UNDEF)
6602 sym_sec = bfd_und_section_ptr;
6603 else if (sym->st_shndx == SHN_ABS)
6604 sym_sec = bfd_abs_section_ptr;
6605 else if (sym->st_shndx == SHN_COMMON)
6606 sym_sec = bfd_com_section_ptr;
6607 else
6608 sym_sec =
6609 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6610
6611 if (!sym_sec)
6612 /* This is an undefined symbol. It can never
6613 be resolved. */
6614 continue;
6615
6616 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6617 sym_value = sym->st_value;
6618 destination = (sym_value + irela->r_addend
6619 + sym_sec->output_offset
6620 + sym_sec->output_section->vma);
6621 st_type = ELF_ST_TYPE (sym->st_info);
6622 branch_type =
6623 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6624 sym_name
6625 = bfd_elf_string_from_elf_section (input_bfd,
6626 symtab_hdr->sh_link,
6627 sym->st_name);
6628 }
6629 else
6630 {
6631 /* It's an external symbol. */
6632 while (hash->root.root.type == bfd_link_hash_indirect
6633 || hash->root.root.type == bfd_link_hash_warning)
6634 hash = ((struct elf32_arm_link_hash_entry *)
6635 hash->root.root.u.i.link);
6636
6637 if (hash->root.root.type == bfd_link_hash_defined
6638 || hash->root.root.type == bfd_link_hash_defweak)
6639 {
6640 sym_sec = hash->root.root.u.def.section;
6641 sym_value = hash->root.root.u.def.value;
6642
6643 struct elf32_arm_link_hash_table *globals =
6644 elf32_arm_hash_table (info);
6645
6646 /* For a destination in a shared library,
6647 use the PLT stub as target address to
6648 decide whether a branch stub is
6649 needed. */
6650 if (globals != NULL
6651 && globals->root.splt != NULL
6652 && hash != NULL
6653 && hash->root.plt.offset != (bfd_vma) -1)
6654 {
6655 sym_sec = globals->root.splt;
6656 sym_value = hash->root.plt.offset;
6657 if (sym_sec->output_section != NULL)
6658 destination = (sym_value
6659 + sym_sec->output_offset
6660 + sym_sec->output_section->vma);
6661 }
6662 else if (sym_sec->output_section != NULL)
6663 destination = (sym_value + irela->r_addend
6664 + sym_sec->output_offset
6665 + sym_sec->output_section->vma);
6666 }
6667 else if ((hash->root.root.type == bfd_link_hash_undefined)
6668 || (hash->root.root.type == bfd_link_hash_undefweak))
6669 {
6670 /* For a shared library, use the PLT stub as
6671 target address to decide whether a long
6672 branch stub is needed.
6673 For absolute code, they cannot be handled. */
6674 struct elf32_arm_link_hash_table *globals =
6675 elf32_arm_hash_table (info);
6676
6677 if (globals != NULL
6678 && globals->root.splt != NULL
6679 && hash != NULL
6680 && hash->root.plt.offset != (bfd_vma) -1)
6681 {
6682 sym_sec = globals->root.splt;
6683 sym_value = hash->root.plt.offset;
6684 if (sym_sec->output_section != NULL)
6685 destination = (sym_value
6686 + sym_sec->output_offset
6687 + sym_sec->output_section->vma);
6688 }
6689 else
6690 continue;
6691 }
6692 else
6693 {
6694 bfd_set_error (bfd_error_bad_value);
6695 goto error_ret_free_internal;
6696 }
6697 st_type = hash->root.type;
6698 branch_type =
6699 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6700 sym_name = hash->root.root.root.string;
6701 }
6702
6703 do
6704 {
6705 bfd_boolean new_stub;
6706 struct elf32_arm_stub_hash_entry *stub_entry;
6707
6708 /* Determine what (if any) linker stub is needed. */
6709 stub_type = arm_type_of_stub (info, section, irela,
6710 st_type, &branch_type,
6711 hash, destination, sym_sec,
6712 input_bfd, sym_name);
6713 if (stub_type == arm_stub_none)
6714 break;
6715
6716 /* We've either created a stub for this reloc already,
6717 or we are about to. */
6718 stub_entry =
6719 elf32_arm_create_stub (htab, stub_type, section, irela,
6720 sym_sec, hash,
6721 (char *) sym_name, sym_value,
6722 branch_type, &new_stub);
6723
6724 created_stub = stub_entry != NULL;
6725 if (!created_stub)
6726 goto error_ret_free_internal;
6727 else if (!new_stub)
6728 break;
6729 else
6730 stub_changed = TRUE;
6731 }
6732 while (0);
6733
6734 /* Look for relocations which might trigger Cortex-A8
6735 erratum. */
6736 if (htab->fix_cortex_a8
6737 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6738 || r_type == (unsigned int) R_ARM_THM_JUMP19
6739 || r_type == (unsigned int) R_ARM_THM_CALL
6740 || r_type == (unsigned int) R_ARM_THM_XPC22))
6741 {
6742 bfd_vma from = section->output_section->vma
6743 + section->output_offset
6744 + irela->r_offset;
6745
6746 if ((from & 0xfff) == 0xffe)
6747 {
6748 /* Found a candidate. Note we haven't checked the
6749 destination is within 4K here: if we do so (and
6750 don't create an entry in a8_relocs) we can't tell
6751 that a branch should have been relocated when
6752 scanning later. */
6753 if (num_a8_relocs == a8_reloc_table_size)
6754 {
6755 a8_reloc_table_size *= 2;
6756 a8_relocs = (struct a8_erratum_reloc *)
6757 bfd_realloc (a8_relocs,
6758 sizeof (struct a8_erratum_reloc)
6759 * a8_reloc_table_size);
6760 }
6761
6762 a8_relocs[num_a8_relocs].from = from;
6763 a8_relocs[num_a8_relocs].destination = destination;
6764 a8_relocs[num_a8_relocs].r_type = r_type;
6765 a8_relocs[num_a8_relocs].branch_type = branch_type;
6766 a8_relocs[num_a8_relocs].sym_name = sym_name;
6767 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6768 a8_relocs[num_a8_relocs].hash = hash;
6769
6770 num_a8_relocs++;
6771 }
6772 }
6773 }
6774
6775 /* We're done with the internal relocs, free them. */
6776 if (elf_section_data (section)->relocs == NULL)
6777 free (internal_relocs);
6778 }
6779
6780 if (htab->fix_cortex_a8)
6781 {
6782 /* Sort relocs which might apply to Cortex-A8 erratum. */
6783 qsort (a8_relocs, num_a8_relocs,
6784 sizeof (struct a8_erratum_reloc),
6785 &a8_reloc_compare);
6786
6787 /* Scan for branches which might trigger Cortex-A8 erratum. */
6788 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6789 &num_a8_fixes, &a8_fix_table_size,
6790 a8_relocs, num_a8_relocs,
6791 prev_num_a8_fixes, &stub_changed)
6792 != 0)
6793 goto error_ret_free_local;
6794 }
6795
6796 if (local_syms != NULL
6797 && symtab_hdr->contents != (unsigned char *) local_syms)
6798 {
6799 if (!info->keep_memory)
6800 free (local_syms);
6801 else
6802 symtab_hdr->contents = (unsigned char *) local_syms;
6803 }
6804 }
6805
6806 if (first_veneer_scan
6807 && !set_cmse_veneer_addr_from_implib (info, htab,
6808 &cmse_stub_created))
6809 ret = FALSE;
6810
6811 if (prev_num_a8_fixes != num_a8_fixes)
6812 stub_changed = TRUE;
6813
6814 if (!stub_changed)
6815 break;
6816
6817 /* OK, we've added some stubs. Find out the new size of the
6818 stub sections. */
6819 for (stub_sec = htab->stub_bfd->sections;
6820 stub_sec != NULL;
6821 stub_sec = stub_sec->next)
6822 {
6823 /* Ignore non-stub sections. */
6824 if (!strstr (stub_sec->name, STUB_SUFFIX))
6825 continue;
6826
6827 stub_sec->size = 0;
6828 }
6829
6830 /* Add new SG veneers after those already in the input import
6831 library. */
6832 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6833 stub_type++)
6834 {
6835 bfd_vma *start_offset_p;
6836 asection **stub_sec_p;
6837
6838 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6839 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6840 if (start_offset_p == NULL)
6841 continue;
6842
6843 BFD_ASSERT (stub_sec_p != NULL);
6844 if (*stub_sec_p != NULL)
6845 (*stub_sec_p)->size = *start_offset_p;
6846 }
6847
6848 /* Compute stub section size, considering padding. */
6849 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6850 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6851 stub_type++)
6852 {
6853 int size, padding;
6854 asection **stub_sec_p;
6855
6856 padding = arm_dedicated_stub_section_padding (stub_type);
6857 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6858 /* Skip if no stub input section or no stub section padding
6859 required. */
6860 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6861 continue;
6862 /* Stub section padding required but no dedicated section. */
6863 BFD_ASSERT (stub_sec_p);
6864
6865 size = (*stub_sec_p)->size;
6866 size = (size + padding - 1) & ~(padding - 1);
6867 (*stub_sec_p)->size = size;
6868 }
6869
6870 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6871 if (htab->fix_cortex_a8)
6872 for (i = 0; i < num_a8_fixes; i++)
6873 {
6874 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6875 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6876
6877 if (stub_sec == NULL)
6878 return FALSE;
6879
6880 stub_sec->size
6881 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6882 NULL);
6883 }
6884
6885
6886 /* Ask the linker to do its stuff. */
6887 (*htab->layout_sections_again) ();
6888 first_veneer_scan = FALSE;
6889 }
6890
6891 /* Add stubs for Cortex-A8 erratum fixes now. */
6892 if (htab->fix_cortex_a8)
6893 {
6894 for (i = 0; i < num_a8_fixes; i++)
6895 {
6896 struct elf32_arm_stub_hash_entry *stub_entry;
6897 char *stub_name = a8_fixes[i].stub_name;
6898 asection *section = a8_fixes[i].section;
6899 unsigned int section_id = a8_fixes[i].section->id;
6900 asection *link_sec = htab->stub_group[section_id].link_sec;
6901 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6902 const insn_sequence *template_sequence;
6903 int template_size, size = 0;
6904
6905 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6906 TRUE, FALSE);
6907 if (stub_entry == NULL)
6908 {
6909 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6910 section->owner, stub_name);
6911 return FALSE;
6912 }
6913
6914 stub_entry->stub_sec = stub_sec;
6915 stub_entry->stub_offset = (bfd_vma) -1;
6916 stub_entry->id_sec = link_sec;
6917 stub_entry->stub_type = a8_fixes[i].stub_type;
6918 stub_entry->source_value = a8_fixes[i].offset;
6919 stub_entry->target_section = a8_fixes[i].section;
6920 stub_entry->target_value = a8_fixes[i].target_offset;
6921 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6922 stub_entry->branch_type = a8_fixes[i].branch_type;
6923
6924 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6925 &template_sequence,
6926 &template_size);
6927
6928 stub_entry->stub_size = size;
6929 stub_entry->stub_template = template_sequence;
6930 stub_entry->stub_template_size = template_size;
6931 }
6932
6933 /* Stash the Cortex-A8 erratum fix array for use later in
6934 elf32_arm_write_section(). */
6935 htab->a8_erratum_fixes = a8_fixes;
6936 htab->num_a8_erratum_fixes = num_a8_fixes;
6937 }
6938 else
6939 {
6940 htab->a8_erratum_fixes = NULL;
6941 htab->num_a8_erratum_fixes = 0;
6942 }
6943 return ret;
6944 }
6945
6946 /* Build all the stubs associated with the current output file. The
6947 stubs are kept in a hash table attached to the main linker hash
6948 table. We also set up the .plt entries for statically linked PIC
6949 functions here. This function is called via arm_elf_finish in the
6950 linker. */
6951
6952 bfd_boolean
6953 elf32_arm_build_stubs (struct bfd_link_info *info)
6954 {
6955 asection *stub_sec;
6956 struct bfd_hash_table *table;
6957 enum elf32_arm_stub_type stub_type;
6958 struct elf32_arm_link_hash_table *htab;
6959
6960 htab = elf32_arm_hash_table (info);
6961 if (htab == NULL)
6962 return FALSE;
6963
6964 for (stub_sec = htab->stub_bfd->sections;
6965 stub_sec != NULL;
6966 stub_sec = stub_sec->next)
6967 {
6968 bfd_size_type size;
6969
6970 /* Ignore non-stub sections. */
6971 if (!strstr (stub_sec->name, STUB_SUFFIX))
6972 continue;
6973
6974 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6975 must at least be done for stub section requiring padding and for SG
6976 veneers to ensure that a non secure code branching to a removed SG
6977 veneer causes an error. */
6978 size = stub_sec->size;
6979 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
6980 if (stub_sec->contents == NULL && size != 0)
6981 return FALSE;
6982
6983 stub_sec->size = 0;
6984 }
6985
6986 /* Add new SG veneers after those already in the input import library. */
6987 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
6988 {
6989 bfd_vma *start_offset_p;
6990 asection **stub_sec_p;
6991
6992 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6993 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6994 if (start_offset_p == NULL)
6995 continue;
6996
6997 BFD_ASSERT (stub_sec_p != NULL);
6998 if (*stub_sec_p != NULL)
6999 (*stub_sec_p)->size = *start_offset_p;
7000 }
7001
7002 /* Build the stubs as directed by the stub hash table. */
7003 table = &htab->stub_hash_table;
7004 bfd_hash_traverse (table, arm_build_one_stub, info);
7005 if (htab->fix_cortex_a8)
7006 {
7007 /* Place the cortex a8 stubs last. */
7008 htab->fix_cortex_a8 = -1;
7009 bfd_hash_traverse (table, arm_build_one_stub, info);
7010 }
7011
7012 return TRUE;
7013 }
7014
7015 /* Locate the Thumb encoded calling stub for NAME. */
7016
7017 static struct elf_link_hash_entry *
7018 find_thumb_glue (struct bfd_link_info *link_info,
7019 const char *name,
7020 char **error_message)
7021 {
7022 char *tmp_name;
7023 struct elf_link_hash_entry *hash;
7024 struct elf32_arm_link_hash_table *hash_table;
7025
7026 /* We need a pointer to the armelf specific hash table. */
7027 hash_table = elf32_arm_hash_table (link_info);
7028 if (hash_table == NULL)
7029 return NULL;
7030
7031 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7032 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
7033
7034 BFD_ASSERT (tmp_name);
7035
7036 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
7037
7038 hash = elf_link_hash_lookup
7039 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
7040
7041 if (hash == NULL
7042 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7043 "Thumb", tmp_name, name) == -1)
7044 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7045
7046 free (tmp_name);
7047
7048 return hash;
7049 }
7050
7051 /* Locate the ARM encoded calling stub for NAME. */
7052
7053 static struct elf_link_hash_entry *
7054 find_arm_glue (struct bfd_link_info *link_info,
7055 const char *name,
7056 char **error_message)
7057 {
7058 char *tmp_name;
7059 struct elf_link_hash_entry *myh;
7060 struct elf32_arm_link_hash_table *hash_table;
7061
7062 /* We need a pointer to the elfarm specific hash table. */
7063 hash_table = elf32_arm_hash_table (link_info);
7064 if (hash_table == NULL)
7065 return NULL;
7066
7067 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7068 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7069
7070 BFD_ASSERT (tmp_name);
7071
7072 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7073
7074 myh = elf_link_hash_lookup
7075 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
7076
7077 if (myh == NULL
7078 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7079 "ARM", tmp_name, name) == -1)
7080 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7081
7082 free (tmp_name);
7083
7084 return myh;
7085 }
7086
7087 /* ARM->Thumb glue (static images):
7088
7089 .arm
7090 __func_from_arm:
7091 ldr r12, __func_addr
7092 bx r12
7093 __func_addr:
7094 .word func @ behave as if you saw a ARM_32 reloc.
7095
7096 (v5t static images)
7097 .arm
7098 __func_from_arm:
7099 ldr pc, __func_addr
7100 __func_addr:
7101 .word func @ behave as if you saw a ARM_32 reloc.
7102
7103 (relocatable images)
7104 .arm
7105 __func_from_arm:
7106 ldr r12, __func_offset
7107 add r12, r12, pc
7108 bx r12
7109 __func_offset:
7110 .word func - . */
7111
7112 #define ARM2THUMB_STATIC_GLUE_SIZE 12
7113 static const insn32 a2t1_ldr_insn = 0xe59fc000;
7114 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
7115 static const insn32 a2t3_func_addr_insn = 0x00000001;
7116
7117 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7118 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
7119 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
7120
7121 #define ARM2THUMB_PIC_GLUE_SIZE 16
7122 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
7123 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
7124 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
7125
7126 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
7127
7128 .thumb .thumb
7129 .align 2 .align 2
7130 __func_from_thumb: __func_from_thumb:
7131 bx pc push {r6, lr}
7132 nop ldr r6, __func_addr
7133 .arm mov lr, pc
7134 b func bx r6
7135 .arm
7136 ;; back_to_thumb
7137 ldmia r13! {r6, lr}
7138 bx lr
7139 __func_addr:
7140 .word func */
7141
7142 #define THUMB2ARM_GLUE_SIZE 8
7143 static const insn16 t2a1_bx_pc_insn = 0x4778;
7144 static const insn16 t2a2_noop_insn = 0x46c0;
7145 static const insn32 t2a3_b_insn = 0xea000000;
7146
7147 #define VFP11_ERRATUM_VENEER_SIZE 8
7148 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7149 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7150
7151 #define ARM_BX_VENEER_SIZE 12
7152 static const insn32 armbx1_tst_insn = 0xe3100001;
7153 static const insn32 armbx2_moveq_insn = 0x01a0f000;
7154 static const insn32 armbx3_bx_insn = 0xe12fff10;
7155
7156 #ifndef ELFARM_NABI_C_INCLUDED
7157 static void
7158 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
7159 {
7160 asection * s;
7161 bfd_byte * contents;
7162
7163 if (size == 0)
7164 {
7165 /* Do not include empty glue sections in the output. */
7166 if (abfd != NULL)
7167 {
7168 s = bfd_get_linker_section (abfd, name);
7169 if (s != NULL)
7170 s->flags |= SEC_EXCLUDE;
7171 }
7172 return;
7173 }
7174
7175 BFD_ASSERT (abfd != NULL);
7176
7177 s = bfd_get_linker_section (abfd, name);
7178 BFD_ASSERT (s != NULL);
7179
7180 contents = (bfd_byte *) bfd_alloc (abfd, size);
7181
7182 BFD_ASSERT (s->size == size);
7183 s->contents = contents;
7184 }
7185
7186 bfd_boolean
7187 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
7188 {
7189 struct elf32_arm_link_hash_table * globals;
7190
7191 globals = elf32_arm_hash_table (info);
7192 BFD_ASSERT (globals != NULL);
7193
7194 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7195 globals->arm_glue_size,
7196 ARM2THUMB_GLUE_SECTION_NAME);
7197
7198 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7199 globals->thumb_glue_size,
7200 THUMB2ARM_GLUE_SECTION_NAME);
7201
7202 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7203 globals->vfp11_erratum_glue_size,
7204 VFP11_ERRATUM_VENEER_SECTION_NAME);
7205
7206 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7207 globals->stm32l4xx_erratum_glue_size,
7208 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7209
7210 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7211 globals->bx_glue_size,
7212 ARM_BX_GLUE_SECTION_NAME);
7213
7214 return TRUE;
7215 }
7216
7217 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7218 returns the symbol identifying the stub. */
7219
7220 static struct elf_link_hash_entry *
7221 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
7222 struct elf_link_hash_entry * h)
7223 {
7224 const char * name = h->root.root.string;
7225 asection * s;
7226 char * tmp_name;
7227 struct elf_link_hash_entry * myh;
7228 struct bfd_link_hash_entry * bh;
7229 struct elf32_arm_link_hash_table * globals;
7230 bfd_vma val;
7231 bfd_size_type size;
7232
7233 globals = elf32_arm_hash_table (link_info);
7234 BFD_ASSERT (globals != NULL);
7235 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7236
7237 s = bfd_get_linker_section
7238 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
7239
7240 BFD_ASSERT (s != NULL);
7241
7242 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7243 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7244
7245 BFD_ASSERT (tmp_name);
7246
7247 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7248
7249 myh = elf_link_hash_lookup
7250 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7251
7252 if (myh != NULL)
7253 {
7254 /* We've already seen this guy. */
7255 free (tmp_name);
7256 return myh;
7257 }
7258
7259 /* The only trick here is using hash_table->arm_glue_size as the value.
7260 Even though the section isn't allocated yet, this is where we will be
7261 putting it. The +1 on the value marks that the stub has not been
7262 output yet - not that it is a Thumb function. */
7263 bh = NULL;
7264 val = globals->arm_glue_size + 1;
7265 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7266 tmp_name, BSF_GLOBAL, s, val,
7267 NULL, TRUE, FALSE, &bh);
7268
7269 myh = (struct elf_link_hash_entry *) bh;
7270 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7271 myh->forced_local = 1;
7272
7273 free (tmp_name);
7274
7275 if (bfd_link_pic (link_info)
7276 || globals->root.is_relocatable_executable
7277 || globals->pic_veneer)
7278 size = ARM2THUMB_PIC_GLUE_SIZE;
7279 else if (globals->use_blx)
7280 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7281 else
7282 size = ARM2THUMB_STATIC_GLUE_SIZE;
7283
7284 s->size += size;
7285 globals->arm_glue_size += size;
7286
7287 return myh;
7288 }
7289
7290 /* Allocate space for ARMv4 BX veneers. */
7291
7292 static void
7293 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7294 {
7295 asection * s;
7296 struct elf32_arm_link_hash_table *globals;
7297 char *tmp_name;
7298 struct elf_link_hash_entry *myh;
7299 struct bfd_link_hash_entry *bh;
7300 bfd_vma val;
7301
7302 /* BX PC does not need a veneer. */
7303 if (reg == 15)
7304 return;
7305
7306 globals = elf32_arm_hash_table (link_info);
7307 BFD_ASSERT (globals != NULL);
7308 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7309
7310 /* Check if this veneer has already been allocated. */
7311 if (globals->bx_glue_offset[reg])
7312 return;
7313
7314 s = bfd_get_linker_section
7315 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7316
7317 BFD_ASSERT (s != NULL);
7318
7319 /* Add symbol for veneer. */
7320 tmp_name = (char *)
7321 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7322
7323 BFD_ASSERT (tmp_name);
7324
7325 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7326
7327 myh = elf_link_hash_lookup
7328 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7329
7330 BFD_ASSERT (myh == NULL);
7331
7332 bh = NULL;
7333 val = globals->bx_glue_size;
7334 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7335 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7336 NULL, TRUE, FALSE, &bh);
7337
7338 myh = (struct elf_link_hash_entry *) bh;
7339 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7340 myh->forced_local = 1;
7341
7342 s->size += ARM_BX_VENEER_SIZE;
7343 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7344 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7345 }
7346
7347
7348 /* Add an entry to the code/data map for section SEC. */
7349
7350 static void
7351 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7352 {
7353 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7354 unsigned int newidx;
7355
7356 if (sec_data->map == NULL)
7357 {
7358 sec_data->map = (elf32_arm_section_map *)
7359 bfd_malloc (sizeof (elf32_arm_section_map));
7360 sec_data->mapcount = 0;
7361 sec_data->mapsize = 1;
7362 }
7363
7364 newidx = sec_data->mapcount++;
7365
7366 if (sec_data->mapcount > sec_data->mapsize)
7367 {
7368 sec_data->mapsize *= 2;
7369 sec_data->map = (elf32_arm_section_map *)
7370 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7371 * sizeof (elf32_arm_section_map));
7372 }
7373
7374 if (sec_data->map)
7375 {
7376 sec_data->map[newidx].vma = vma;
7377 sec_data->map[newidx].type = type;
7378 }
7379 }
7380
7381
7382 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7383 veneers are handled for now. */
7384
7385 static bfd_vma
7386 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7387 elf32_vfp11_erratum_list *branch,
7388 bfd *branch_bfd,
7389 asection *branch_sec,
7390 unsigned int offset)
7391 {
7392 asection *s;
7393 struct elf32_arm_link_hash_table *hash_table;
7394 char *tmp_name;
7395 struct elf_link_hash_entry *myh;
7396 struct bfd_link_hash_entry *bh;
7397 bfd_vma val;
7398 struct _arm_elf_section_data *sec_data;
7399 elf32_vfp11_erratum_list *newerr;
7400
7401 hash_table = elf32_arm_hash_table (link_info);
7402 BFD_ASSERT (hash_table != NULL);
7403 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7404
7405 s = bfd_get_linker_section
7406 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7407
7408 sec_data = elf32_arm_section_data (s);
7409
7410 BFD_ASSERT (s != NULL);
7411
7412 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7413 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7414
7415 BFD_ASSERT (tmp_name);
7416
7417 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7418 hash_table->num_vfp11_fixes);
7419
7420 myh = elf_link_hash_lookup
7421 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7422
7423 BFD_ASSERT (myh == NULL);
7424
7425 bh = NULL;
7426 val = hash_table->vfp11_erratum_glue_size;
7427 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7428 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7429 NULL, TRUE, FALSE, &bh);
7430
7431 myh = (struct elf_link_hash_entry *) bh;
7432 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7433 myh->forced_local = 1;
7434
7435 /* Link veneer back to calling location. */
7436 sec_data->erratumcount += 1;
7437 newerr = (elf32_vfp11_erratum_list *)
7438 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7439
7440 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7441 newerr->vma = -1;
7442 newerr->u.v.branch = branch;
7443 newerr->u.v.id = hash_table->num_vfp11_fixes;
7444 branch->u.b.veneer = newerr;
7445
7446 newerr->next = sec_data->erratumlist;
7447 sec_data->erratumlist = newerr;
7448
7449 /* A symbol for the return from the veneer. */
7450 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7451 hash_table->num_vfp11_fixes);
7452
7453 myh = elf_link_hash_lookup
7454 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7455
7456 if (myh != NULL)
7457 abort ();
7458
7459 bh = NULL;
7460 val = offset + 4;
7461 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7462 branch_sec, val, NULL, TRUE, FALSE, &bh);
7463
7464 myh = (struct elf_link_hash_entry *) bh;
7465 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7466 myh->forced_local = 1;
7467
7468 free (tmp_name);
7469
7470 /* Generate a mapping symbol for the veneer section, and explicitly add an
7471 entry for that symbol to the code/data map for the section. */
7472 if (hash_table->vfp11_erratum_glue_size == 0)
7473 {
7474 bh = NULL;
7475 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7476 ever requires this erratum fix. */
7477 _bfd_generic_link_add_one_symbol (link_info,
7478 hash_table->bfd_of_glue_owner, "$a",
7479 BSF_LOCAL, s, 0, NULL,
7480 TRUE, FALSE, &bh);
7481
7482 myh = (struct elf_link_hash_entry *) bh;
7483 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7484 myh->forced_local = 1;
7485
7486 /* The elf32_arm_init_maps function only cares about symbols from input
7487 BFDs. We must make a note of this generated mapping symbol
7488 ourselves so that code byteswapping works properly in
7489 elf32_arm_write_section. */
7490 elf32_arm_section_map_add (s, 'a', 0);
7491 }
7492
7493 s->size += VFP11_ERRATUM_VENEER_SIZE;
7494 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7495 hash_table->num_vfp11_fixes++;
7496
7497 /* The offset of the veneer. */
7498 return val;
7499 }
7500
7501 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7502 veneers need to be handled because used only in Cortex-M. */
7503
7504 static bfd_vma
7505 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7506 elf32_stm32l4xx_erratum_list *branch,
7507 bfd *branch_bfd,
7508 asection *branch_sec,
7509 unsigned int offset,
7510 bfd_size_type veneer_size)
7511 {
7512 asection *s;
7513 struct elf32_arm_link_hash_table *hash_table;
7514 char *tmp_name;
7515 struct elf_link_hash_entry *myh;
7516 struct bfd_link_hash_entry *bh;
7517 bfd_vma val;
7518 struct _arm_elf_section_data *sec_data;
7519 elf32_stm32l4xx_erratum_list *newerr;
7520
7521 hash_table = elf32_arm_hash_table (link_info);
7522 BFD_ASSERT (hash_table != NULL);
7523 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7524
7525 s = bfd_get_linker_section
7526 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7527
7528 BFD_ASSERT (s != NULL);
7529
7530 sec_data = elf32_arm_section_data (s);
7531
7532 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7533 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7534
7535 BFD_ASSERT (tmp_name);
7536
7537 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7538 hash_table->num_stm32l4xx_fixes);
7539
7540 myh = elf_link_hash_lookup
7541 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7542
7543 BFD_ASSERT (myh == NULL);
7544
7545 bh = NULL;
7546 val = hash_table->stm32l4xx_erratum_glue_size;
7547 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7548 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7549 NULL, TRUE, FALSE, &bh);
7550
7551 myh = (struct elf_link_hash_entry *) bh;
7552 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7553 myh->forced_local = 1;
7554
7555 /* Link veneer back to calling location. */
7556 sec_data->stm32l4xx_erratumcount += 1;
7557 newerr = (elf32_stm32l4xx_erratum_list *)
7558 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7559
7560 newerr->type = STM32L4XX_ERRATUM_VENEER;
7561 newerr->vma = -1;
7562 newerr->u.v.branch = branch;
7563 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7564 branch->u.b.veneer = newerr;
7565
7566 newerr->next = sec_data->stm32l4xx_erratumlist;
7567 sec_data->stm32l4xx_erratumlist = newerr;
7568
7569 /* A symbol for the return from the veneer. */
7570 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7571 hash_table->num_stm32l4xx_fixes);
7572
7573 myh = elf_link_hash_lookup
7574 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7575
7576 if (myh != NULL)
7577 abort ();
7578
7579 bh = NULL;
7580 val = offset + 4;
7581 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7582 branch_sec, val, NULL, TRUE, FALSE, &bh);
7583
7584 myh = (struct elf_link_hash_entry *) bh;
7585 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7586 myh->forced_local = 1;
7587
7588 free (tmp_name);
7589
7590 /* Generate a mapping symbol for the veneer section, and explicitly add an
7591 entry for that symbol to the code/data map for the section. */
7592 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7593 {
7594 bh = NULL;
7595 /* Creates a THUMB symbol since there is no other choice. */
7596 _bfd_generic_link_add_one_symbol (link_info,
7597 hash_table->bfd_of_glue_owner, "$t",
7598 BSF_LOCAL, s, 0, NULL,
7599 TRUE, FALSE, &bh);
7600
7601 myh = (struct elf_link_hash_entry *) bh;
7602 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7603 myh->forced_local = 1;
7604
7605 /* The elf32_arm_init_maps function only cares about symbols from input
7606 BFDs. We must make a note of this generated mapping symbol
7607 ourselves so that code byteswapping works properly in
7608 elf32_arm_write_section. */
7609 elf32_arm_section_map_add (s, 't', 0);
7610 }
7611
7612 s->size += veneer_size;
7613 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7614 hash_table->num_stm32l4xx_fixes++;
7615
7616 /* The offset of the veneer. */
7617 return val;
7618 }
7619
7620 #define ARM_GLUE_SECTION_FLAGS \
7621 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7622 | SEC_READONLY | SEC_LINKER_CREATED)
7623
7624 /* Create a fake section for use by the ARM backend of the linker. */
7625
7626 static bfd_boolean
7627 arm_make_glue_section (bfd * abfd, const char * name)
7628 {
7629 asection * sec;
7630
7631 sec = bfd_get_linker_section (abfd, name);
7632 if (sec != NULL)
7633 /* Already made. */
7634 return TRUE;
7635
7636 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7637
7638 if (sec == NULL
7639 || !bfd_set_section_alignment (abfd, sec, 2))
7640 return FALSE;
7641
7642 /* Set the gc mark to prevent the section from being removed by garbage
7643 collection, despite the fact that no relocs refer to this section. */
7644 sec->gc_mark = 1;
7645
7646 return TRUE;
7647 }
7648
7649 /* Set size of .plt entries. This function is called from the
7650 linker scripts in ld/emultempl/{armelf}.em. */
7651
7652 void
7653 bfd_elf32_arm_use_long_plt (void)
7654 {
7655 elf32_arm_use_long_plt_entry = TRUE;
7656 }
7657
7658 /* Add the glue sections to ABFD. This function is called from the
7659 linker scripts in ld/emultempl/{armelf}.em. */
7660
7661 bfd_boolean
7662 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7663 struct bfd_link_info *info)
7664 {
7665 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7666 bfd_boolean dostm32l4xx = globals
7667 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7668 bfd_boolean addglue;
7669
7670 /* If we are only performing a partial
7671 link do not bother adding the glue. */
7672 if (bfd_link_relocatable (info))
7673 return TRUE;
7674
7675 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7676 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7677 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7678 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7679
7680 if (!dostm32l4xx)
7681 return addglue;
7682
7683 return addglue
7684 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7685 }
7686
7687 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7688 ensures they are not marked for deletion by
7689 strip_excluded_output_sections () when veneers are going to be created
7690 later. Not doing so would trigger assert on empty section size in
7691 lang_size_sections_1 (). */
7692
7693 void
7694 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7695 {
7696 enum elf32_arm_stub_type stub_type;
7697
7698 /* If we are only performing a partial
7699 link do not bother adding the glue. */
7700 if (bfd_link_relocatable (info))
7701 return;
7702
7703 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7704 {
7705 asection *out_sec;
7706 const char *out_sec_name;
7707
7708 if (!arm_dedicated_stub_output_section_required (stub_type))
7709 continue;
7710
7711 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7712 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7713 if (out_sec != NULL)
7714 out_sec->flags |= SEC_KEEP;
7715 }
7716 }
7717
7718 /* Select a BFD to be used to hold the sections used by the glue code.
7719 This function is called from the linker scripts in ld/emultempl/
7720 {armelf/pe}.em. */
7721
7722 bfd_boolean
7723 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7724 {
7725 struct elf32_arm_link_hash_table *globals;
7726
7727 /* If we are only performing a partial link
7728 do not bother getting a bfd to hold the glue. */
7729 if (bfd_link_relocatable (info))
7730 return TRUE;
7731
7732 /* Make sure we don't attach the glue sections to a dynamic object. */
7733 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7734
7735 globals = elf32_arm_hash_table (info);
7736 BFD_ASSERT (globals != NULL);
7737
7738 if (globals->bfd_of_glue_owner != NULL)
7739 return TRUE;
7740
7741 /* Save the bfd for later use. */
7742 globals->bfd_of_glue_owner = abfd;
7743
7744 return TRUE;
7745 }
7746
7747 static void
7748 check_use_blx (struct elf32_arm_link_hash_table *globals)
7749 {
7750 int cpu_arch;
7751
7752 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7753 Tag_CPU_arch);
7754
7755 if (globals->fix_arm1176)
7756 {
7757 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7758 globals->use_blx = 1;
7759 }
7760 else
7761 {
7762 if (cpu_arch > TAG_CPU_ARCH_V4T)
7763 globals->use_blx = 1;
7764 }
7765 }
7766
7767 bfd_boolean
7768 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7769 struct bfd_link_info *link_info)
7770 {
7771 Elf_Internal_Shdr *symtab_hdr;
7772 Elf_Internal_Rela *internal_relocs = NULL;
7773 Elf_Internal_Rela *irel, *irelend;
7774 bfd_byte *contents = NULL;
7775
7776 asection *sec;
7777 struct elf32_arm_link_hash_table *globals;
7778
7779 /* If we are only performing a partial link do not bother
7780 to construct any glue. */
7781 if (bfd_link_relocatable (link_info))
7782 return TRUE;
7783
7784 /* Here we have a bfd that is to be included on the link. We have a
7785 hook to do reloc rummaging, before section sizes are nailed down. */
7786 globals = elf32_arm_hash_table (link_info);
7787 BFD_ASSERT (globals != NULL);
7788
7789 check_use_blx (globals);
7790
7791 if (globals->byteswap_code && !bfd_big_endian (abfd))
7792 {
7793 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7794 abfd);
7795 return FALSE;
7796 }
7797
7798 /* PR 5398: If we have not decided to include any loadable sections in
7799 the output then we will not have a glue owner bfd. This is OK, it
7800 just means that there is nothing else for us to do here. */
7801 if (globals->bfd_of_glue_owner == NULL)
7802 return TRUE;
7803
7804 /* Rummage around all the relocs and map the glue vectors. */
7805 sec = abfd->sections;
7806
7807 if (sec == NULL)
7808 return TRUE;
7809
7810 for (; sec != NULL; sec = sec->next)
7811 {
7812 if (sec->reloc_count == 0)
7813 continue;
7814
7815 if ((sec->flags & SEC_EXCLUDE) != 0)
7816 continue;
7817
7818 symtab_hdr = & elf_symtab_hdr (abfd);
7819
7820 /* Load the relocs. */
7821 internal_relocs
7822 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7823
7824 if (internal_relocs == NULL)
7825 goto error_return;
7826
7827 irelend = internal_relocs + sec->reloc_count;
7828 for (irel = internal_relocs; irel < irelend; irel++)
7829 {
7830 long r_type;
7831 unsigned long r_index;
7832
7833 struct elf_link_hash_entry *h;
7834
7835 r_type = ELF32_R_TYPE (irel->r_info);
7836 r_index = ELF32_R_SYM (irel->r_info);
7837
7838 /* These are the only relocation types we care about. */
7839 if ( r_type != R_ARM_PC24
7840 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7841 continue;
7842
7843 /* Get the section contents if we haven't done so already. */
7844 if (contents == NULL)
7845 {
7846 /* Get cached copy if it exists. */
7847 if (elf_section_data (sec)->this_hdr.contents != NULL)
7848 contents = elf_section_data (sec)->this_hdr.contents;
7849 else
7850 {
7851 /* Go get them off disk. */
7852 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7853 goto error_return;
7854 }
7855 }
7856
7857 if (r_type == R_ARM_V4BX)
7858 {
7859 int reg;
7860
7861 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7862 record_arm_bx_glue (link_info, reg);
7863 continue;
7864 }
7865
7866 /* If the relocation is not against a symbol it cannot concern us. */
7867 h = NULL;
7868
7869 /* We don't care about local symbols. */
7870 if (r_index < symtab_hdr->sh_info)
7871 continue;
7872
7873 /* This is an external symbol. */
7874 r_index -= symtab_hdr->sh_info;
7875 h = (struct elf_link_hash_entry *)
7876 elf_sym_hashes (abfd)[r_index];
7877
7878 /* If the relocation is against a static symbol it must be within
7879 the current section and so cannot be a cross ARM/Thumb relocation. */
7880 if (h == NULL)
7881 continue;
7882
7883 /* If the call will go through a PLT entry then we do not need
7884 glue. */
7885 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7886 continue;
7887
7888 switch (r_type)
7889 {
7890 case R_ARM_PC24:
7891 /* This one is a call from arm code. We need to look up
7892 the target of the call. If it is a thumb target, we
7893 insert glue. */
7894 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7895 == ST_BRANCH_TO_THUMB)
7896 record_arm_to_thumb_glue (link_info, h);
7897 break;
7898
7899 default:
7900 abort ();
7901 }
7902 }
7903
7904 if (contents != NULL
7905 && elf_section_data (sec)->this_hdr.contents != contents)
7906 free (contents);
7907 contents = NULL;
7908
7909 if (internal_relocs != NULL
7910 && elf_section_data (sec)->relocs != internal_relocs)
7911 free (internal_relocs);
7912 internal_relocs = NULL;
7913 }
7914
7915 return TRUE;
7916
7917 error_return:
7918 if (contents != NULL
7919 && elf_section_data (sec)->this_hdr.contents != contents)
7920 free (contents);
7921 if (internal_relocs != NULL
7922 && elf_section_data (sec)->relocs != internal_relocs)
7923 free (internal_relocs);
7924
7925 return FALSE;
7926 }
7927 #endif
7928
7929
7930 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7931
7932 void
7933 bfd_elf32_arm_init_maps (bfd *abfd)
7934 {
7935 Elf_Internal_Sym *isymbuf;
7936 Elf_Internal_Shdr *hdr;
7937 unsigned int i, localsyms;
7938
7939 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7940 if (! is_arm_elf (abfd))
7941 return;
7942
7943 if ((abfd->flags & DYNAMIC) != 0)
7944 return;
7945
7946 hdr = & elf_symtab_hdr (abfd);
7947 localsyms = hdr->sh_info;
7948
7949 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7950 should contain the number of local symbols, which should come before any
7951 global symbols. Mapping symbols are always local. */
7952 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7953 NULL);
7954
7955 /* No internal symbols read? Skip this BFD. */
7956 if (isymbuf == NULL)
7957 return;
7958
7959 for (i = 0; i < localsyms; i++)
7960 {
7961 Elf_Internal_Sym *isym = &isymbuf[i];
7962 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7963 const char *name;
7964
7965 if (sec != NULL
7966 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
7967 {
7968 name = bfd_elf_string_from_elf_section (abfd,
7969 hdr->sh_link, isym->st_name);
7970
7971 if (bfd_is_arm_special_symbol_name (name,
7972 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
7973 elf32_arm_section_map_add (sec, name[1], isym->st_value);
7974 }
7975 }
7976 }
7977
7978
7979 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7980 say what they wanted. */
7981
7982 void
7983 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
7984 {
7985 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7986 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7987
7988 if (globals == NULL)
7989 return;
7990
7991 if (globals->fix_cortex_a8 == -1)
7992 {
7993 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7994 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
7995 && (out_attr[Tag_CPU_arch_profile].i == 'A'
7996 || out_attr[Tag_CPU_arch_profile].i == 0))
7997 globals->fix_cortex_a8 = 1;
7998 else
7999 globals->fix_cortex_a8 = 0;
8000 }
8001 }
8002
8003
8004 void
8005 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
8006 {
8007 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8008 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8009
8010 if (globals == NULL)
8011 return;
8012 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
8013 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
8014 {
8015 switch (globals->vfp11_fix)
8016 {
8017 case BFD_ARM_VFP11_FIX_DEFAULT:
8018 case BFD_ARM_VFP11_FIX_NONE:
8019 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8020 break;
8021
8022 default:
8023 /* Give a warning, but do as the user requests anyway. */
8024 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
8025 "workaround is not necessary for target architecture"), obfd);
8026 }
8027 }
8028 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
8029 /* For earlier architectures, we might need the workaround, but do not
8030 enable it by default. If users is running with broken hardware, they
8031 must enable the erratum fix explicitly. */
8032 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8033 }
8034
8035 void
8036 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
8037 {
8038 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8039 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8040
8041 if (globals == NULL)
8042 return;
8043
8044 /* We assume only Cortex-M4 may require the fix. */
8045 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
8046 || out_attr[Tag_CPU_arch_profile].i != 'M')
8047 {
8048 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
8049 /* Give a warning, but do as the user requests anyway. */
8050 _bfd_error_handler
8051 (_("%pB: warning: selected STM32L4XX erratum "
8052 "workaround is not necessary for target architecture"), obfd);
8053 }
8054 }
8055
8056 enum bfd_arm_vfp11_pipe
8057 {
8058 VFP11_FMAC,
8059 VFP11_LS,
8060 VFP11_DS,
8061 VFP11_BAD
8062 };
8063
8064 /* Return a VFP register number. This is encoded as RX:X for single-precision
8065 registers, or X:RX for double-precision registers, where RX is the group of
8066 four bits in the instruction encoding and X is the single extension bit.
8067 RX and X fields are specified using their lowest (starting) bit. The return
8068 value is:
8069
8070 0...31: single-precision registers s0...s31
8071 32...63: double-precision registers d0...d31.
8072
8073 Although X should be zero for VFP11 (encoding d0...d15 only), we might
8074 encounter VFP3 instructions, so we allow the full range for DP registers. */
8075
8076 static unsigned int
8077 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
8078 unsigned int x)
8079 {
8080 if (is_double)
8081 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
8082 else
8083 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
8084 }
8085
8086 /* Set bits in *WMASK according to a register number REG as encoded by
8087 bfd_arm_vfp11_regno(). Ignore d16-d31. */
8088
8089 static void
8090 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
8091 {
8092 if (reg < 32)
8093 *wmask |= 1 << reg;
8094 else if (reg < 48)
8095 *wmask |= 3 << ((reg - 32) * 2);
8096 }
8097
8098 /* Return TRUE if WMASK overwrites anything in REGS. */
8099
8100 static bfd_boolean
8101 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
8102 {
8103 int i;
8104
8105 for (i = 0; i < numregs; i++)
8106 {
8107 unsigned int reg = regs[i];
8108
8109 if (reg < 32 && (wmask & (1 << reg)) != 0)
8110 return TRUE;
8111
8112 reg -= 32;
8113
8114 if (reg >= 16)
8115 continue;
8116
8117 if ((wmask & (3 << (reg * 2))) != 0)
8118 return TRUE;
8119 }
8120
8121 return FALSE;
8122 }
8123
8124 /* In this function, we're interested in two things: finding input registers
8125 for VFP data-processing instructions, and finding the set of registers which
8126 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
8127 hold the written set, so FLDM etc. are easy to deal with (we're only
8128 interested in 32 SP registers or 16 dp registers, due to the VFP version
8129 implemented by the chip in question). DP registers are marked by setting
8130 both SP registers in the write mask). */
8131
8132 static enum bfd_arm_vfp11_pipe
8133 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
8134 int *numregs)
8135 {
8136 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
8137 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
8138
8139 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
8140 {
8141 unsigned int pqrs;
8142 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8143 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8144
8145 pqrs = ((insn & 0x00800000) >> 20)
8146 | ((insn & 0x00300000) >> 19)
8147 | ((insn & 0x00000040) >> 6);
8148
8149 switch (pqrs)
8150 {
8151 case 0: /* fmac[sd]. */
8152 case 1: /* fnmac[sd]. */
8153 case 2: /* fmsc[sd]. */
8154 case 3: /* fnmsc[sd]. */
8155 vpipe = VFP11_FMAC;
8156 bfd_arm_vfp11_write_mask (destmask, fd);
8157 regs[0] = fd;
8158 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8159 regs[2] = fm;
8160 *numregs = 3;
8161 break;
8162
8163 case 4: /* fmul[sd]. */
8164 case 5: /* fnmul[sd]. */
8165 case 6: /* fadd[sd]. */
8166 case 7: /* fsub[sd]. */
8167 vpipe = VFP11_FMAC;
8168 goto vfp_binop;
8169
8170 case 8: /* fdiv[sd]. */
8171 vpipe = VFP11_DS;
8172 vfp_binop:
8173 bfd_arm_vfp11_write_mask (destmask, fd);
8174 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8175 regs[1] = fm;
8176 *numregs = 2;
8177 break;
8178
8179 case 15: /* extended opcode. */
8180 {
8181 unsigned int extn = ((insn >> 15) & 0x1e)
8182 | ((insn >> 7) & 1);
8183
8184 switch (extn)
8185 {
8186 case 0: /* fcpy[sd]. */
8187 case 1: /* fabs[sd]. */
8188 case 2: /* fneg[sd]. */
8189 case 8: /* fcmp[sd]. */
8190 case 9: /* fcmpe[sd]. */
8191 case 10: /* fcmpz[sd]. */
8192 case 11: /* fcmpez[sd]. */
8193 case 16: /* fuito[sd]. */
8194 case 17: /* fsito[sd]. */
8195 case 24: /* ftoui[sd]. */
8196 case 25: /* ftouiz[sd]. */
8197 case 26: /* ftosi[sd]. */
8198 case 27: /* ftosiz[sd]. */
8199 /* These instructions will not bounce due to underflow. */
8200 *numregs = 0;
8201 vpipe = VFP11_FMAC;
8202 break;
8203
8204 case 3: /* fsqrt[sd]. */
8205 /* fsqrt cannot underflow, but it can (perhaps) overwrite
8206 registers to cause the erratum in previous instructions. */
8207 bfd_arm_vfp11_write_mask (destmask, fd);
8208 vpipe = VFP11_DS;
8209 break;
8210
8211 case 15: /* fcvt{ds,sd}. */
8212 {
8213 int rnum = 0;
8214
8215 bfd_arm_vfp11_write_mask (destmask, fd);
8216
8217 /* Only FCVTSD can underflow. */
8218 if ((insn & 0x100) != 0)
8219 regs[rnum++] = fm;
8220
8221 *numregs = rnum;
8222
8223 vpipe = VFP11_FMAC;
8224 }
8225 break;
8226
8227 default:
8228 return VFP11_BAD;
8229 }
8230 }
8231 break;
8232
8233 default:
8234 return VFP11_BAD;
8235 }
8236 }
8237 /* Two-register transfer. */
8238 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
8239 {
8240 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8241
8242 if ((insn & 0x100000) == 0)
8243 {
8244 if (is_double)
8245 bfd_arm_vfp11_write_mask (destmask, fm);
8246 else
8247 {
8248 bfd_arm_vfp11_write_mask (destmask, fm);
8249 bfd_arm_vfp11_write_mask (destmask, fm + 1);
8250 }
8251 }
8252
8253 vpipe = VFP11_LS;
8254 }
8255 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
8256 {
8257 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8258 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
8259
8260 switch (puw)
8261 {
8262 case 0: /* Two-reg transfer. We should catch these above. */
8263 abort ();
8264
8265 case 2: /* fldm[sdx]. */
8266 case 3:
8267 case 5:
8268 {
8269 unsigned int i, offset = insn & 0xff;
8270
8271 if (is_double)
8272 offset >>= 1;
8273
8274 for (i = fd; i < fd + offset; i++)
8275 bfd_arm_vfp11_write_mask (destmask, i);
8276 }
8277 break;
8278
8279 case 4: /* fld[sd]. */
8280 case 6:
8281 bfd_arm_vfp11_write_mask (destmask, fd);
8282 break;
8283
8284 default:
8285 return VFP11_BAD;
8286 }
8287
8288 vpipe = VFP11_LS;
8289 }
8290 /* Single-register transfer. Note L==0. */
8291 else if ((insn & 0x0f100e10) == 0x0e000a10)
8292 {
8293 unsigned int opcode = (insn >> 21) & 7;
8294 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8295
8296 switch (opcode)
8297 {
8298 case 0: /* fmsr/fmdlr. */
8299 case 1: /* fmdhr. */
8300 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8301 destination register. I don't know if this is exactly right,
8302 but it is the conservative choice. */
8303 bfd_arm_vfp11_write_mask (destmask, fn);
8304 break;
8305
8306 case 7: /* fmxr. */
8307 break;
8308 }
8309
8310 vpipe = VFP11_LS;
8311 }
8312
8313 return vpipe;
8314 }
8315
8316
8317 static int elf32_arm_compare_mapping (const void * a, const void * b);
8318
8319
8320 /* Look for potentially-troublesome code sequences which might trigger the
8321 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8322 (available from ARM) for details of the erratum. A short version is
8323 described in ld.texinfo. */
8324
8325 bfd_boolean
8326 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8327 {
8328 asection *sec;
8329 bfd_byte *contents = NULL;
8330 int state = 0;
8331 int regs[3], numregs = 0;
8332 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8333 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8334
8335 if (globals == NULL)
8336 return FALSE;
8337
8338 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8339 The states transition as follows:
8340
8341 0 -> 1 (vector) or 0 -> 2 (scalar)
8342 A VFP FMAC-pipeline instruction has been seen. Fill
8343 regs[0]..regs[numregs-1] with its input operands. Remember this
8344 instruction in 'first_fmac'.
8345
8346 1 -> 2
8347 Any instruction, except for a VFP instruction which overwrites
8348 regs[*].
8349
8350 1 -> 3 [ -> 0 ] or
8351 2 -> 3 [ -> 0 ]
8352 A VFP instruction has been seen which overwrites any of regs[*].
8353 We must make a veneer! Reset state to 0 before examining next
8354 instruction.
8355
8356 2 -> 0
8357 If we fail to match anything in state 2, reset to state 0 and reset
8358 the instruction pointer to the instruction after 'first_fmac'.
8359
8360 If the VFP11 vector mode is in use, there must be at least two unrelated
8361 instructions between anti-dependent VFP11 instructions to properly avoid
8362 triggering the erratum, hence the use of the extra state 1. */
8363
8364 /* If we are only performing a partial link do not bother
8365 to construct any glue. */
8366 if (bfd_link_relocatable (link_info))
8367 return TRUE;
8368
8369 /* Skip if this bfd does not correspond to an ELF image. */
8370 if (! is_arm_elf (abfd))
8371 return TRUE;
8372
8373 /* We should have chosen a fix type by the time we get here. */
8374 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8375
8376 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8377 return TRUE;
8378
8379 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8380 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8381 return TRUE;
8382
8383 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8384 {
8385 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8386 struct _arm_elf_section_data *sec_data;
8387
8388 /* If we don't have executable progbits, we're not interested in this
8389 section. Also skip if section is to be excluded. */
8390 if (elf_section_type (sec) != SHT_PROGBITS
8391 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8392 || (sec->flags & SEC_EXCLUDE) != 0
8393 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8394 || sec->output_section == bfd_abs_section_ptr
8395 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8396 continue;
8397
8398 sec_data = elf32_arm_section_data (sec);
8399
8400 if (sec_data->mapcount == 0)
8401 continue;
8402
8403 if (elf_section_data (sec)->this_hdr.contents != NULL)
8404 contents = elf_section_data (sec)->this_hdr.contents;
8405 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8406 goto error_return;
8407
8408 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8409 elf32_arm_compare_mapping);
8410
8411 for (span = 0; span < sec_data->mapcount; span++)
8412 {
8413 unsigned int span_start = sec_data->map[span].vma;
8414 unsigned int span_end = (span == sec_data->mapcount - 1)
8415 ? sec->size : sec_data->map[span + 1].vma;
8416 char span_type = sec_data->map[span].type;
8417
8418 /* FIXME: Only ARM mode is supported at present. We may need to
8419 support Thumb-2 mode also at some point. */
8420 if (span_type != 'a')
8421 continue;
8422
8423 for (i = span_start; i < span_end;)
8424 {
8425 unsigned int next_i = i + 4;
8426 unsigned int insn = bfd_big_endian (abfd)
8427 ? (contents[i] << 24)
8428 | (contents[i + 1] << 16)
8429 | (contents[i + 2] << 8)
8430 | contents[i + 3]
8431 : (contents[i + 3] << 24)
8432 | (contents[i + 2] << 16)
8433 | (contents[i + 1] << 8)
8434 | contents[i];
8435 unsigned int writemask = 0;
8436 enum bfd_arm_vfp11_pipe vpipe;
8437
8438 switch (state)
8439 {
8440 case 0:
8441 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8442 &numregs);
8443 /* I'm assuming the VFP11 erratum can trigger with denorm
8444 operands on either the FMAC or the DS pipeline. This might
8445 lead to slightly overenthusiastic veneer insertion. */
8446 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8447 {
8448 state = use_vector ? 1 : 2;
8449 first_fmac = i;
8450 veneer_of_insn = insn;
8451 }
8452 break;
8453
8454 case 1:
8455 {
8456 int other_regs[3], other_numregs;
8457 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8458 other_regs,
8459 &other_numregs);
8460 if (vpipe != VFP11_BAD
8461 && bfd_arm_vfp11_antidependency (writemask, regs,
8462 numregs))
8463 state = 3;
8464 else
8465 state = 2;
8466 }
8467 break;
8468
8469 case 2:
8470 {
8471 int other_regs[3], other_numregs;
8472 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8473 other_regs,
8474 &other_numregs);
8475 if (vpipe != VFP11_BAD
8476 && bfd_arm_vfp11_antidependency (writemask, regs,
8477 numregs))
8478 state = 3;
8479 else
8480 {
8481 state = 0;
8482 next_i = first_fmac + 4;
8483 }
8484 }
8485 break;
8486
8487 case 3:
8488 abort (); /* Should be unreachable. */
8489 }
8490
8491 if (state == 3)
8492 {
8493 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8494 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8495
8496 elf32_arm_section_data (sec)->erratumcount += 1;
8497
8498 newerr->u.b.vfp_insn = veneer_of_insn;
8499
8500 switch (span_type)
8501 {
8502 case 'a':
8503 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8504 break;
8505
8506 default:
8507 abort ();
8508 }
8509
8510 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8511 first_fmac);
8512
8513 newerr->vma = -1;
8514
8515 newerr->next = sec_data->erratumlist;
8516 sec_data->erratumlist = newerr;
8517
8518 state = 0;
8519 }
8520
8521 i = next_i;
8522 }
8523 }
8524
8525 if (contents != NULL
8526 && elf_section_data (sec)->this_hdr.contents != contents)
8527 free (contents);
8528 contents = NULL;
8529 }
8530
8531 return TRUE;
8532
8533 error_return:
8534 if (contents != NULL
8535 && elf_section_data (sec)->this_hdr.contents != contents)
8536 free (contents);
8537
8538 return FALSE;
8539 }
8540
8541 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8542 after sections have been laid out, using specially-named symbols. */
8543
8544 void
8545 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8546 struct bfd_link_info *link_info)
8547 {
8548 asection *sec;
8549 struct elf32_arm_link_hash_table *globals;
8550 char *tmp_name;
8551
8552 if (bfd_link_relocatable (link_info))
8553 return;
8554
8555 /* Skip if this bfd does not correspond to an ELF image. */
8556 if (! is_arm_elf (abfd))
8557 return;
8558
8559 globals = elf32_arm_hash_table (link_info);
8560 if (globals == NULL)
8561 return;
8562
8563 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8564 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8565
8566 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8567 {
8568 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8569 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8570
8571 for (; errnode != NULL; errnode = errnode->next)
8572 {
8573 struct elf_link_hash_entry *myh;
8574 bfd_vma vma;
8575
8576 switch (errnode->type)
8577 {
8578 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8579 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8580 /* Find veneer symbol. */
8581 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8582 errnode->u.b.veneer->u.v.id);
8583
8584 myh = elf_link_hash_lookup
8585 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8586
8587 if (myh == NULL)
8588 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8589 abfd, "VFP11", tmp_name);
8590
8591 vma = myh->root.u.def.section->output_section->vma
8592 + myh->root.u.def.section->output_offset
8593 + myh->root.u.def.value;
8594
8595 errnode->u.b.veneer->vma = vma;
8596 break;
8597
8598 case VFP11_ERRATUM_ARM_VENEER:
8599 case VFP11_ERRATUM_THUMB_VENEER:
8600 /* Find return location. */
8601 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8602 errnode->u.v.id);
8603
8604 myh = elf_link_hash_lookup
8605 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8606
8607 if (myh == NULL)
8608 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8609 abfd, "VFP11", tmp_name);
8610
8611 vma = myh->root.u.def.section->output_section->vma
8612 + myh->root.u.def.section->output_offset
8613 + myh->root.u.def.value;
8614
8615 errnode->u.v.branch->vma = vma;
8616 break;
8617
8618 default:
8619 abort ();
8620 }
8621 }
8622 }
8623
8624 free (tmp_name);
8625 }
8626
8627 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8628 return locations after sections have been laid out, using
8629 specially-named symbols. */
8630
8631 void
8632 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8633 struct bfd_link_info *link_info)
8634 {
8635 asection *sec;
8636 struct elf32_arm_link_hash_table *globals;
8637 char *tmp_name;
8638
8639 if (bfd_link_relocatable (link_info))
8640 return;
8641
8642 /* Skip if this bfd does not correspond to an ELF image. */
8643 if (! is_arm_elf (abfd))
8644 return;
8645
8646 globals = elf32_arm_hash_table (link_info);
8647 if (globals == NULL)
8648 return;
8649
8650 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8651 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8652
8653 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8654 {
8655 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8656 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8657
8658 for (; errnode != NULL; errnode = errnode->next)
8659 {
8660 struct elf_link_hash_entry *myh;
8661 bfd_vma vma;
8662
8663 switch (errnode->type)
8664 {
8665 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8666 /* Find veneer symbol. */
8667 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8668 errnode->u.b.veneer->u.v.id);
8669
8670 myh = elf_link_hash_lookup
8671 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8672
8673 if (myh == NULL)
8674 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8675 abfd, "STM32L4XX", tmp_name);
8676
8677 vma = myh->root.u.def.section->output_section->vma
8678 + myh->root.u.def.section->output_offset
8679 + myh->root.u.def.value;
8680
8681 errnode->u.b.veneer->vma = vma;
8682 break;
8683
8684 case STM32L4XX_ERRATUM_VENEER:
8685 /* Find return location. */
8686 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8687 errnode->u.v.id);
8688
8689 myh = elf_link_hash_lookup
8690 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8691
8692 if (myh == NULL)
8693 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8694 abfd, "STM32L4XX", tmp_name);
8695
8696 vma = myh->root.u.def.section->output_section->vma
8697 + myh->root.u.def.section->output_offset
8698 + myh->root.u.def.value;
8699
8700 errnode->u.v.branch->vma = vma;
8701 break;
8702
8703 default:
8704 abort ();
8705 }
8706 }
8707 }
8708
8709 free (tmp_name);
8710 }
8711
8712 static inline bfd_boolean
8713 is_thumb2_ldmia (const insn32 insn)
8714 {
8715 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8716 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8717 return (insn & 0xffd02000) == 0xe8900000;
8718 }
8719
8720 static inline bfd_boolean
8721 is_thumb2_ldmdb (const insn32 insn)
8722 {
8723 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8724 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8725 return (insn & 0xffd02000) == 0xe9100000;
8726 }
8727
8728 static inline bfd_boolean
8729 is_thumb2_vldm (const insn32 insn)
8730 {
8731 /* A6.5 Extension register load or store instruction
8732 A7.7.229
8733 We look for SP 32-bit and DP 64-bit registers.
8734 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8735 <list> is consecutive 64-bit registers
8736 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8737 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8738 <list> is consecutive 32-bit registers
8739 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8740 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8741 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8742 return
8743 (((insn & 0xfe100f00) == 0xec100b00) ||
8744 ((insn & 0xfe100f00) == 0xec100a00))
8745 && /* (IA without !). */
8746 (((((insn << 7) >> 28) & 0xd) == 0x4)
8747 /* (IA with !), includes VPOP (when reg number is SP). */
8748 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8749 /* (DB with !). */
8750 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8751 }
8752
8753 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8754 VLDM opcode and:
8755 - computes the number and the mode of memory accesses
8756 - decides if the replacement should be done:
8757 . replaces only if > 8-word accesses
8758 . or (testing purposes only) replaces all accesses. */
8759
8760 static bfd_boolean
8761 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8762 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8763 {
8764 int nb_words = 0;
8765
8766 /* The field encoding the register list is the same for both LDMIA
8767 and LDMDB encodings. */
8768 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8769 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8770 else if (is_thumb2_vldm (insn))
8771 nb_words = (insn & 0xff);
8772
8773 /* DEFAULT mode accounts for the real bug condition situation,
8774 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8775 return
8776 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8777 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8778 }
8779
8780 /* Look for potentially-troublesome code sequences which might trigger
8781 the STM STM32L4XX erratum. */
8782
8783 bfd_boolean
8784 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8785 struct bfd_link_info *link_info)
8786 {
8787 asection *sec;
8788 bfd_byte *contents = NULL;
8789 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8790
8791 if (globals == NULL)
8792 return FALSE;
8793
8794 /* If we are only performing a partial link do not bother
8795 to construct any glue. */
8796 if (bfd_link_relocatable (link_info))
8797 return TRUE;
8798
8799 /* Skip if this bfd does not correspond to an ELF image. */
8800 if (! is_arm_elf (abfd))
8801 return TRUE;
8802
8803 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8804 return TRUE;
8805
8806 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8807 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8808 return TRUE;
8809
8810 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8811 {
8812 unsigned int i, span;
8813 struct _arm_elf_section_data *sec_data;
8814
8815 /* If we don't have executable progbits, we're not interested in this
8816 section. Also skip if section is to be excluded. */
8817 if (elf_section_type (sec) != SHT_PROGBITS
8818 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8819 || (sec->flags & SEC_EXCLUDE) != 0
8820 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8821 || sec->output_section == bfd_abs_section_ptr
8822 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8823 continue;
8824
8825 sec_data = elf32_arm_section_data (sec);
8826
8827 if (sec_data->mapcount == 0)
8828 continue;
8829
8830 if (elf_section_data (sec)->this_hdr.contents != NULL)
8831 contents = elf_section_data (sec)->this_hdr.contents;
8832 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8833 goto error_return;
8834
8835 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8836 elf32_arm_compare_mapping);
8837
8838 for (span = 0; span < sec_data->mapcount; span++)
8839 {
8840 unsigned int span_start = sec_data->map[span].vma;
8841 unsigned int span_end = (span == sec_data->mapcount - 1)
8842 ? sec->size : sec_data->map[span + 1].vma;
8843 char span_type = sec_data->map[span].type;
8844 int itblock_current_pos = 0;
8845
8846 /* Only Thumb2 mode need be supported with this CM4 specific
8847 code, we should not encounter any arm mode eg span_type
8848 != 'a'. */
8849 if (span_type != 't')
8850 continue;
8851
8852 for (i = span_start; i < span_end;)
8853 {
8854 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8855 bfd_boolean insn_32bit = FALSE;
8856 bfd_boolean is_ldm = FALSE;
8857 bfd_boolean is_vldm = FALSE;
8858 bfd_boolean is_not_last_in_it_block = FALSE;
8859
8860 /* The first 16-bits of all 32-bit thumb2 instructions start
8861 with opcode[15..13]=0b111 and the encoded op1 can be anything
8862 except opcode[12..11]!=0b00.
8863 See 32-bit Thumb instruction encoding. */
8864 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8865 insn_32bit = TRUE;
8866
8867 /* Compute the predicate that tells if the instruction
8868 is concerned by the IT block
8869 - Creates an error if there is a ldm that is not
8870 last in the IT block thus cannot be replaced
8871 - Otherwise we can create a branch at the end of the
8872 IT block, it will be controlled naturally by IT
8873 with the proper pseudo-predicate
8874 - So the only interesting predicate is the one that
8875 tells that we are not on the last item of an IT
8876 block. */
8877 if (itblock_current_pos != 0)
8878 is_not_last_in_it_block = !!--itblock_current_pos;
8879
8880 if (insn_32bit)
8881 {
8882 /* Load the rest of the insn (in manual-friendly order). */
8883 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8884 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8885 is_vldm = is_thumb2_vldm (insn);
8886
8887 /* Veneers are created for (v)ldm depending on
8888 option flags and memory accesses conditions; but
8889 if the instruction is not the last instruction of
8890 an IT block, we cannot create a jump there, so we
8891 bail out. */
8892 if ((is_ldm || is_vldm)
8893 && stm32l4xx_need_create_replacing_stub
8894 (insn, globals->stm32l4xx_fix))
8895 {
8896 if (is_not_last_in_it_block)
8897 {
8898 _bfd_error_handler
8899 /* xgettext:c-format */
8900 (_("%pB(%pA+%#x): error: multiple load detected"
8901 " in non-last IT block instruction:"
8902 " STM32L4XX veneer cannot be generated; "
8903 "use gcc option -mrestrict-it to generate"
8904 " only one instruction per IT block"),
8905 abfd, sec, i);
8906 }
8907 else
8908 {
8909 elf32_stm32l4xx_erratum_list *newerr =
8910 (elf32_stm32l4xx_erratum_list *)
8911 bfd_zmalloc
8912 (sizeof (elf32_stm32l4xx_erratum_list));
8913
8914 elf32_arm_section_data (sec)
8915 ->stm32l4xx_erratumcount += 1;
8916 newerr->u.b.insn = insn;
8917 /* We create only thumb branches. */
8918 newerr->type =
8919 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8920 record_stm32l4xx_erratum_veneer
8921 (link_info, newerr, abfd, sec,
8922 i,
8923 is_ldm ?
8924 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8925 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8926 newerr->vma = -1;
8927 newerr->next = sec_data->stm32l4xx_erratumlist;
8928 sec_data->stm32l4xx_erratumlist = newerr;
8929 }
8930 }
8931 }
8932 else
8933 {
8934 /* A7.7.37 IT p208
8935 IT blocks are only encoded in T1
8936 Encoding T1: IT{x{y{z}}} <firstcond>
8937 1 0 1 1 - 1 1 1 1 - firstcond - mask
8938 if mask = '0000' then see 'related encodings'
8939 We don't deal with UNPREDICTABLE, just ignore these.
8940 There can be no nested IT blocks so an IT block
8941 is naturally a new one for which it is worth
8942 computing its size. */
8943 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00)
8944 && ((insn & 0x000f) != 0x0000);
8945 /* If we have a new IT block we compute its size. */
8946 if (is_newitblock)
8947 {
8948 /* Compute the number of instructions controlled
8949 by the IT block, it will be used to decide
8950 whether we are inside an IT block or not. */
8951 unsigned int mask = insn & 0x000f;
8952 itblock_current_pos = 4 - ctz (mask);
8953 }
8954 }
8955
8956 i += insn_32bit ? 4 : 2;
8957 }
8958 }
8959
8960 if (contents != NULL
8961 && elf_section_data (sec)->this_hdr.contents != contents)
8962 free (contents);
8963 contents = NULL;
8964 }
8965
8966 return TRUE;
8967
8968 error_return:
8969 if (contents != NULL
8970 && elf_section_data (sec)->this_hdr.contents != contents)
8971 free (contents);
8972
8973 return FALSE;
8974 }
8975
8976 /* Set target relocation values needed during linking. */
8977
8978 void
8979 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
8980 struct bfd_link_info *link_info,
8981 struct elf32_arm_params *params)
8982 {
8983 struct elf32_arm_link_hash_table *globals;
8984
8985 globals = elf32_arm_hash_table (link_info);
8986 if (globals == NULL)
8987 return;
8988
8989 globals->target1_is_rel = params->target1_is_rel;
8990 if (globals->fdpic_p)
8991 globals->target2_reloc = R_ARM_GOT32;
8992 else if (strcmp (params->target2_type, "rel") == 0)
8993 globals->target2_reloc = R_ARM_REL32;
8994 else if (strcmp (params->target2_type, "abs") == 0)
8995 globals->target2_reloc = R_ARM_ABS32;
8996 else if (strcmp (params->target2_type, "got-rel") == 0)
8997 globals->target2_reloc = R_ARM_GOT_PREL;
8998 else
8999 {
9000 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
9001 params->target2_type);
9002 }
9003 globals->fix_v4bx = params->fix_v4bx;
9004 globals->use_blx |= params->use_blx;
9005 globals->vfp11_fix = params->vfp11_denorm_fix;
9006 globals->stm32l4xx_fix = params->stm32l4xx_fix;
9007 if (globals->fdpic_p)
9008 globals->pic_veneer = 1;
9009 else
9010 globals->pic_veneer = params->pic_veneer;
9011 globals->fix_cortex_a8 = params->fix_cortex_a8;
9012 globals->fix_arm1176 = params->fix_arm1176;
9013 globals->cmse_implib = params->cmse_implib;
9014 globals->in_implib_bfd = params->in_implib_bfd;
9015
9016 BFD_ASSERT (is_arm_elf (output_bfd));
9017 elf_arm_tdata (output_bfd)->no_enum_size_warning
9018 = params->no_enum_size_warning;
9019 elf_arm_tdata (output_bfd)->no_wchar_size_warning
9020 = params->no_wchar_size_warning;
9021 }
9022
9023 /* Replace the target offset of a Thumb bl or b.w instruction. */
9024
9025 static void
9026 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
9027 {
9028 bfd_vma upper;
9029 bfd_vma lower;
9030 int reloc_sign;
9031
9032 BFD_ASSERT ((offset & 1) == 0);
9033
9034 upper = bfd_get_16 (abfd, insn);
9035 lower = bfd_get_16 (abfd, insn + 2);
9036 reloc_sign = (offset < 0) ? 1 : 0;
9037 upper = (upper & ~(bfd_vma) 0x7ff)
9038 | ((offset >> 12) & 0x3ff)
9039 | (reloc_sign << 10);
9040 lower = (lower & ~(bfd_vma) 0x2fff)
9041 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
9042 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
9043 | ((offset >> 1) & 0x7ff);
9044 bfd_put_16 (abfd, upper, insn);
9045 bfd_put_16 (abfd, lower, insn + 2);
9046 }
9047
9048 /* Thumb code calling an ARM function. */
9049
9050 static int
9051 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
9052 const char * name,
9053 bfd * input_bfd,
9054 bfd * output_bfd,
9055 asection * input_section,
9056 bfd_byte * hit_data,
9057 asection * sym_sec,
9058 bfd_vma offset,
9059 bfd_signed_vma addend,
9060 bfd_vma val,
9061 char **error_message)
9062 {
9063 asection * s = 0;
9064 bfd_vma my_offset;
9065 long int ret_offset;
9066 struct elf_link_hash_entry * myh;
9067 struct elf32_arm_link_hash_table * globals;
9068
9069 myh = find_thumb_glue (info, name, error_message);
9070 if (myh == NULL)
9071 return FALSE;
9072
9073 globals = elf32_arm_hash_table (info);
9074 BFD_ASSERT (globals != NULL);
9075 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9076
9077 my_offset = myh->root.u.def.value;
9078
9079 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9080 THUMB2ARM_GLUE_SECTION_NAME);
9081
9082 BFD_ASSERT (s != NULL);
9083 BFD_ASSERT (s->contents != NULL);
9084 BFD_ASSERT (s->output_section != NULL);
9085
9086 if ((my_offset & 0x01) == 0x01)
9087 {
9088 if (sym_sec != NULL
9089 && sym_sec->owner != NULL
9090 && !INTERWORK_FLAG (sym_sec->owner))
9091 {
9092 _bfd_error_handler
9093 (_("%pB(%s): warning: interworking not enabled;"
9094 " first occurrence: %pB: %s call to %s"),
9095 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
9096
9097 return FALSE;
9098 }
9099
9100 --my_offset;
9101 myh->root.u.def.value = my_offset;
9102
9103 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
9104 s->contents + my_offset);
9105
9106 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
9107 s->contents + my_offset + 2);
9108
9109 ret_offset =
9110 /* Address of destination of the stub. */
9111 ((bfd_signed_vma) val)
9112 - ((bfd_signed_vma)
9113 /* Offset from the start of the current section
9114 to the start of the stubs. */
9115 (s->output_offset
9116 /* Offset of the start of this stub from the start of the stubs. */
9117 + my_offset
9118 /* Address of the start of the current section. */
9119 + s->output_section->vma)
9120 /* The branch instruction is 4 bytes into the stub. */
9121 + 4
9122 /* ARM branches work from the pc of the instruction + 8. */
9123 + 8);
9124
9125 put_arm_insn (globals, output_bfd,
9126 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
9127 s->contents + my_offset + 4);
9128 }
9129
9130 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
9131
9132 /* Now go back and fix up the original BL insn to point to here. */
9133 ret_offset =
9134 /* Address of where the stub is located. */
9135 (s->output_section->vma + s->output_offset + my_offset)
9136 /* Address of where the BL is located. */
9137 - (input_section->output_section->vma + input_section->output_offset
9138 + offset)
9139 /* Addend in the relocation. */
9140 - addend
9141 /* Biassing for PC-relative addressing. */
9142 - 8;
9143
9144 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
9145
9146 return TRUE;
9147 }
9148
9149 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
9150
9151 static struct elf_link_hash_entry *
9152 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
9153 const char * name,
9154 bfd * input_bfd,
9155 bfd * output_bfd,
9156 asection * sym_sec,
9157 bfd_vma val,
9158 asection * s,
9159 char ** error_message)
9160 {
9161 bfd_vma my_offset;
9162 long int ret_offset;
9163 struct elf_link_hash_entry * myh;
9164 struct elf32_arm_link_hash_table * globals;
9165
9166 myh = find_arm_glue (info, name, error_message);
9167 if (myh == NULL)
9168 return NULL;
9169
9170 globals = elf32_arm_hash_table (info);
9171 BFD_ASSERT (globals != NULL);
9172 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9173
9174 my_offset = myh->root.u.def.value;
9175
9176 if ((my_offset & 0x01) == 0x01)
9177 {
9178 if (sym_sec != NULL
9179 && sym_sec->owner != NULL
9180 && !INTERWORK_FLAG (sym_sec->owner))
9181 {
9182 _bfd_error_handler
9183 (_("%pB(%s): warning: interworking not enabled;"
9184 " first occurrence: %pB: %s call to %s"),
9185 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
9186 }
9187
9188 --my_offset;
9189 myh->root.u.def.value = my_offset;
9190
9191 if (bfd_link_pic (info)
9192 || globals->root.is_relocatable_executable
9193 || globals->pic_veneer)
9194 {
9195 /* For relocatable objects we can't use absolute addresses,
9196 so construct the address from a relative offset. */
9197 /* TODO: If the offset is small it's probably worth
9198 constructing the address with adds. */
9199 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
9200 s->contents + my_offset);
9201 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
9202 s->contents + my_offset + 4);
9203 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
9204 s->contents + my_offset + 8);
9205 /* Adjust the offset by 4 for the position of the add,
9206 and 8 for the pipeline offset. */
9207 ret_offset = (val - (s->output_offset
9208 + s->output_section->vma
9209 + my_offset + 12))
9210 | 1;
9211 bfd_put_32 (output_bfd, ret_offset,
9212 s->contents + my_offset + 12);
9213 }
9214 else if (globals->use_blx)
9215 {
9216 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
9217 s->contents + my_offset);
9218
9219 /* It's a thumb address. Add the low order bit. */
9220 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
9221 s->contents + my_offset + 4);
9222 }
9223 else
9224 {
9225 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
9226 s->contents + my_offset);
9227
9228 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
9229 s->contents + my_offset + 4);
9230
9231 /* It's a thumb address. Add the low order bit. */
9232 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
9233 s->contents + my_offset + 8);
9234
9235 my_offset += 12;
9236 }
9237 }
9238
9239 BFD_ASSERT (my_offset <= globals->arm_glue_size);
9240
9241 return myh;
9242 }
9243
9244 /* Arm code calling a Thumb function. */
9245
9246 static int
9247 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
9248 const char * name,
9249 bfd * input_bfd,
9250 bfd * output_bfd,
9251 asection * input_section,
9252 bfd_byte * hit_data,
9253 asection * sym_sec,
9254 bfd_vma offset,
9255 bfd_signed_vma addend,
9256 bfd_vma val,
9257 char **error_message)
9258 {
9259 unsigned long int tmp;
9260 bfd_vma my_offset;
9261 asection * s;
9262 long int ret_offset;
9263 struct elf_link_hash_entry * myh;
9264 struct elf32_arm_link_hash_table * globals;
9265
9266 globals = elf32_arm_hash_table (info);
9267 BFD_ASSERT (globals != NULL);
9268 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9269
9270 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9271 ARM2THUMB_GLUE_SECTION_NAME);
9272 BFD_ASSERT (s != NULL);
9273 BFD_ASSERT (s->contents != NULL);
9274 BFD_ASSERT (s->output_section != NULL);
9275
9276 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9277 sym_sec, val, s, error_message);
9278 if (!myh)
9279 return FALSE;
9280
9281 my_offset = myh->root.u.def.value;
9282 tmp = bfd_get_32 (input_bfd, hit_data);
9283 tmp = tmp & 0xFF000000;
9284
9285 /* Somehow these are both 4 too far, so subtract 8. */
9286 ret_offset = (s->output_offset
9287 + my_offset
9288 + s->output_section->vma
9289 - (input_section->output_offset
9290 + input_section->output_section->vma
9291 + offset + addend)
9292 - 8);
9293
9294 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9295
9296 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9297
9298 return TRUE;
9299 }
9300
9301 /* Populate Arm stub for an exported Thumb function. */
9302
9303 static bfd_boolean
9304 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9305 {
9306 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9307 asection * s;
9308 struct elf_link_hash_entry * myh;
9309 struct elf32_arm_link_hash_entry *eh;
9310 struct elf32_arm_link_hash_table * globals;
9311 asection *sec;
9312 bfd_vma val;
9313 char *error_message;
9314
9315 eh = elf32_arm_hash_entry (h);
9316 /* Allocate stubs for exported Thumb functions on v4t. */
9317 if (eh->export_glue == NULL)
9318 return TRUE;
9319
9320 globals = elf32_arm_hash_table (info);
9321 BFD_ASSERT (globals != NULL);
9322 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9323
9324 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9325 ARM2THUMB_GLUE_SECTION_NAME);
9326 BFD_ASSERT (s != NULL);
9327 BFD_ASSERT (s->contents != NULL);
9328 BFD_ASSERT (s->output_section != NULL);
9329
9330 sec = eh->export_glue->root.u.def.section;
9331
9332 BFD_ASSERT (sec->output_section != NULL);
9333
9334 val = eh->export_glue->root.u.def.value + sec->output_offset
9335 + sec->output_section->vma;
9336
9337 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9338 h->root.u.def.section->owner,
9339 globals->obfd, sec, val, s,
9340 &error_message);
9341 BFD_ASSERT (myh);
9342 return TRUE;
9343 }
9344
9345 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9346
9347 static bfd_vma
9348 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9349 {
9350 bfd_byte *p;
9351 bfd_vma glue_addr;
9352 asection *s;
9353 struct elf32_arm_link_hash_table *globals;
9354
9355 globals = elf32_arm_hash_table (info);
9356 BFD_ASSERT (globals != NULL);
9357 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9358
9359 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9360 ARM_BX_GLUE_SECTION_NAME);
9361 BFD_ASSERT (s != NULL);
9362 BFD_ASSERT (s->contents != NULL);
9363 BFD_ASSERT (s->output_section != NULL);
9364
9365 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9366
9367 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9368
9369 if ((globals->bx_glue_offset[reg] & 1) == 0)
9370 {
9371 p = s->contents + glue_addr;
9372 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9373 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9374 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9375 globals->bx_glue_offset[reg] |= 1;
9376 }
9377
9378 return glue_addr + s->output_section->vma + s->output_offset;
9379 }
9380
9381 /* Generate Arm stubs for exported Thumb symbols. */
9382 static void
9383 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9384 struct bfd_link_info *link_info)
9385 {
9386 struct elf32_arm_link_hash_table * globals;
9387
9388 if (link_info == NULL)
9389 /* Ignore this if we are not called by the ELF backend linker. */
9390 return;
9391
9392 globals = elf32_arm_hash_table (link_info);
9393 if (globals == NULL)
9394 return;
9395
9396 /* If blx is available then exported Thumb symbols are OK and there is
9397 nothing to do. */
9398 if (globals->use_blx)
9399 return;
9400
9401 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9402 link_info);
9403 }
9404
9405 /* Reserve space for COUNT dynamic relocations in relocation selection
9406 SRELOC. */
9407
9408 static void
9409 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9410 bfd_size_type count)
9411 {
9412 struct elf32_arm_link_hash_table *htab;
9413
9414 htab = elf32_arm_hash_table (info);
9415 BFD_ASSERT (htab->root.dynamic_sections_created);
9416 if (sreloc == NULL)
9417 abort ();
9418 sreloc->size += RELOC_SIZE (htab) * count;
9419 }
9420
9421 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9422 dynamic, the relocations should go in SRELOC, otherwise they should
9423 go in the special .rel.iplt section. */
9424
9425 static void
9426 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9427 bfd_size_type count)
9428 {
9429 struct elf32_arm_link_hash_table *htab;
9430
9431 htab = elf32_arm_hash_table (info);
9432 if (!htab->root.dynamic_sections_created)
9433 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9434 else
9435 {
9436 BFD_ASSERT (sreloc != NULL);
9437 sreloc->size += RELOC_SIZE (htab) * count;
9438 }
9439 }
9440
9441 /* Add relocation REL to the end of relocation section SRELOC. */
9442
9443 static void
9444 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9445 asection *sreloc, Elf_Internal_Rela *rel)
9446 {
9447 bfd_byte *loc;
9448 struct elf32_arm_link_hash_table *htab;
9449
9450 htab = elf32_arm_hash_table (info);
9451 if (!htab->root.dynamic_sections_created
9452 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9453 sreloc = htab->root.irelplt;
9454 if (sreloc == NULL)
9455 abort ();
9456 loc = sreloc->contents;
9457 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9458 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9459 abort ();
9460 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9461 }
9462
9463 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9464 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9465 to .plt. */
9466
9467 static void
9468 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9469 bfd_boolean is_iplt_entry,
9470 union gotplt_union *root_plt,
9471 struct arm_plt_info *arm_plt)
9472 {
9473 struct elf32_arm_link_hash_table *htab;
9474 asection *splt;
9475 asection *sgotplt;
9476
9477 htab = elf32_arm_hash_table (info);
9478
9479 if (is_iplt_entry)
9480 {
9481 splt = htab->root.iplt;
9482 sgotplt = htab->root.igotplt;
9483
9484 /* NaCl uses a special first entry in .iplt too. */
9485 if (htab->nacl_p && splt->size == 0)
9486 splt->size += htab->plt_header_size;
9487
9488 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9489 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9490 }
9491 else
9492 {
9493 splt = htab->root.splt;
9494 sgotplt = htab->root.sgotplt;
9495
9496 if (htab->fdpic_p)
9497 {
9498 /* Allocate room for R_ARM_FUNCDESC_VALUE. */
9499 /* For lazy binding, relocations will be put into .rel.plt, in
9500 .rel.got otherwise. */
9501 /* FIXME: today we don't support lazy binding so put it in .rel.got */
9502 if (info->flags & DF_BIND_NOW)
9503 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
9504 else
9505 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9506 }
9507 else
9508 {
9509 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9510 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9511 }
9512
9513 /* If this is the first .plt entry, make room for the special
9514 first entry. */
9515 if (splt->size == 0)
9516 splt->size += htab->plt_header_size;
9517
9518 htab->next_tls_desc_index++;
9519 }
9520
9521 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9522 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9523 splt->size += PLT_THUMB_STUB_SIZE;
9524 root_plt->offset = splt->size;
9525 splt->size += htab->plt_entry_size;
9526
9527 if (!htab->symbian_p)
9528 {
9529 /* We also need to make an entry in the .got.plt section, which
9530 will be placed in the .got section by the linker script. */
9531 if (is_iplt_entry)
9532 arm_plt->got_offset = sgotplt->size;
9533 else
9534 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9535 if (htab->fdpic_p)
9536 /* Function descriptor takes 64 bits in GOT. */
9537 sgotplt->size += 8;
9538 else
9539 sgotplt->size += 4;
9540 }
9541 }
9542
9543 static bfd_vma
9544 arm_movw_immediate (bfd_vma value)
9545 {
9546 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9547 }
9548
9549 static bfd_vma
9550 arm_movt_immediate (bfd_vma value)
9551 {
9552 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9553 }
9554
9555 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9556 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9557 Otherwise, DYNINDX is the index of the symbol in the dynamic
9558 symbol table and SYM_VALUE is undefined.
9559
9560 ROOT_PLT points to the offset of the PLT entry from the start of its
9561 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9562 bookkeeping information.
9563
9564 Returns FALSE if there was a problem. */
9565
9566 static bfd_boolean
9567 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9568 union gotplt_union *root_plt,
9569 struct arm_plt_info *arm_plt,
9570 int dynindx, bfd_vma sym_value)
9571 {
9572 struct elf32_arm_link_hash_table *htab;
9573 asection *sgot;
9574 asection *splt;
9575 asection *srel;
9576 bfd_byte *loc;
9577 bfd_vma plt_index;
9578 Elf_Internal_Rela rel;
9579 bfd_vma plt_header_size;
9580 bfd_vma got_header_size;
9581
9582 htab = elf32_arm_hash_table (info);
9583
9584 /* Pick the appropriate sections and sizes. */
9585 if (dynindx == -1)
9586 {
9587 splt = htab->root.iplt;
9588 sgot = htab->root.igotplt;
9589 srel = htab->root.irelplt;
9590
9591 /* There are no reserved entries in .igot.plt, and no special
9592 first entry in .iplt. */
9593 got_header_size = 0;
9594 plt_header_size = 0;
9595 }
9596 else
9597 {
9598 splt = htab->root.splt;
9599 sgot = htab->root.sgotplt;
9600 srel = htab->root.srelplt;
9601
9602 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9603 plt_header_size = htab->plt_header_size;
9604 }
9605 BFD_ASSERT (splt != NULL && srel != NULL);
9606
9607 /* Fill in the entry in the procedure linkage table. */
9608 if (htab->symbian_p)
9609 {
9610 BFD_ASSERT (dynindx >= 0);
9611 put_arm_insn (htab, output_bfd,
9612 elf32_arm_symbian_plt_entry[0],
9613 splt->contents + root_plt->offset);
9614 bfd_put_32 (output_bfd,
9615 elf32_arm_symbian_plt_entry[1],
9616 splt->contents + root_plt->offset + 4);
9617
9618 /* Fill in the entry in the .rel.plt section. */
9619 rel.r_offset = (splt->output_section->vma
9620 + splt->output_offset
9621 + root_plt->offset + 4);
9622 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9623
9624 /* Get the index in the procedure linkage table which
9625 corresponds to this symbol. This is the index of this symbol
9626 in all the symbols for which we are making plt entries. The
9627 first entry in the procedure linkage table is reserved. */
9628 plt_index = ((root_plt->offset - plt_header_size)
9629 / htab->plt_entry_size);
9630 }
9631 else
9632 {
9633 bfd_vma got_offset, got_address, plt_address;
9634 bfd_vma got_displacement, initial_got_entry;
9635 bfd_byte * ptr;
9636
9637 BFD_ASSERT (sgot != NULL);
9638
9639 /* Get the offset into the .(i)got.plt table of the entry that
9640 corresponds to this function. */
9641 got_offset = (arm_plt->got_offset & -2);
9642
9643 /* Get the index in the procedure linkage table which
9644 corresponds to this symbol. This is the index of this symbol
9645 in all the symbols for which we are making plt entries.
9646 After the reserved .got.plt entries, all symbols appear in
9647 the same order as in .plt. */
9648 if (htab->fdpic_p)
9649 /* Function descriptor takes 8 bytes. */
9650 plt_index = (got_offset - got_header_size) / 8;
9651 else
9652 plt_index = (got_offset - got_header_size) / 4;
9653
9654 /* Calculate the address of the GOT entry. */
9655 got_address = (sgot->output_section->vma
9656 + sgot->output_offset
9657 + got_offset);
9658
9659 /* ...and the address of the PLT entry. */
9660 plt_address = (splt->output_section->vma
9661 + splt->output_offset
9662 + root_plt->offset);
9663
9664 ptr = splt->contents + root_plt->offset;
9665 if (htab->vxworks_p && bfd_link_pic (info))
9666 {
9667 unsigned int i;
9668 bfd_vma val;
9669
9670 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9671 {
9672 val = elf32_arm_vxworks_shared_plt_entry[i];
9673 if (i == 2)
9674 val |= got_address - sgot->output_section->vma;
9675 if (i == 5)
9676 val |= plt_index * RELOC_SIZE (htab);
9677 if (i == 2 || i == 5)
9678 bfd_put_32 (output_bfd, val, ptr);
9679 else
9680 put_arm_insn (htab, output_bfd, val, ptr);
9681 }
9682 }
9683 else if (htab->vxworks_p)
9684 {
9685 unsigned int i;
9686 bfd_vma val;
9687
9688 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9689 {
9690 val = elf32_arm_vxworks_exec_plt_entry[i];
9691 if (i == 2)
9692 val |= got_address;
9693 if (i == 4)
9694 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9695 if (i == 5)
9696 val |= plt_index * RELOC_SIZE (htab);
9697 if (i == 2 || i == 5)
9698 bfd_put_32 (output_bfd, val, ptr);
9699 else
9700 put_arm_insn (htab, output_bfd, val, ptr);
9701 }
9702
9703 loc = (htab->srelplt2->contents
9704 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9705
9706 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9707 referencing the GOT for this PLT entry. */
9708 rel.r_offset = plt_address + 8;
9709 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9710 rel.r_addend = got_offset;
9711 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9712 loc += RELOC_SIZE (htab);
9713
9714 /* Create the R_ARM_ABS32 relocation referencing the
9715 beginning of the PLT for this GOT entry. */
9716 rel.r_offset = got_address;
9717 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9718 rel.r_addend = 0;
9719 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9720 }
9721 else if (htab->nacl_p)
9722 {
9723 /* Calculate the displacement between the PLT slot and the
9724 common tail that's part of the special initial PLT slot. */
9725 int32_t tail_displacement
9726 = ((splt->output_section->vma + splt->output_offset
9727 + ARM_NACL_PLT_TAIL_OFFSET)
9728 - (plt_address + htab->plt_entry_size + 4));
9729 BFD_ASSERT ((tail_displacement & 3) == 0);
9730 tail_displacement >>= 2;
9731
9732 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9733 || (-tail_displacement & 0xff000000) == 0);
9734
9735 /* Calculate the displacement between the PLT slot and the entry
9736 in the GOT. The offset accounts for the value produced by
9737 adding to pc in the penultimate instruction of the PLT stub. */
9738 got_displacement = (got_address
9739 - (plt_address + htab->plt_entry_size));
9740
9741 /* NaCl does not support interworking at all. */
9742 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9743
9744 put_arm_insn (htab, output_bfd,
9745 elf32_arm_nacl_plt_entry[0]
9746 | arm_movw_immediate (got_displacement),
9747 ptr + 0);
9748 put_arm_insn (htab, output_bfd,
9749 elf32_arm_nacl_plt_entry[1]
9750 | arm_movt_immediate (got_displacement),
9751 ptr + 4);
9752 put_arm_insn (htab, output_bfd,
9753 elf32_arm_nacl_plt_entry[2],
9754 ptr + 8);
9755 put_arm_insn (htab, output_bfd,
9756 elf32_arm_nacl_plt_entry[3]
9757 | (tail_displacement & 0x00ffffff),
9758 ptr + 12);
9759 }
9760 else if (htab->fdpic_p)
9761 {
9762 const bfd_vma *plt_entry = using_thumb_only(htab)
9763 ? elf32_arm_fdpic_thumb_plt_entry
9764 : elf32_arm_fdpic_plt_entry;
9765
9766 /* Fill-up Thumb stub if needed. */
9767 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9768 {
9769 put_thumb_insn (htab, output_bfd,
9770 elf32_arm_plt_thumb_stub[0], ptr - 4);
9771 put_thumb_insn (htab, output_bfd,
9772 elf32_arm_plt_thumb_stub[1], ptr - 2);
9773 }
9774 /* As we are using 32 bit instructions even for the Thumb
9775 version, we have to use 'put_arm_insn' instead of
9776 'put_thumb_insn'. */
9777 put_arm_insn(htab, output_bfd, plt_entry[0], ptr + 0);
9778 put_arm_insn(htab, output_bfd, plt_entry[1], ptr + 4);
9779 put_arm_insn(htab, output_bfd, plt_entry[2], ptr + 8);
9780 put_arm_insn(htab, output_bfd, plt_entry[3], ptr + 12);
9781 bfd_put_32 (output_bfd, got_offset, ptr + 16);
9782
9783 if (!(info->flags & DF_BIND_NOW))
9784 {
9785 /* funcdesc_value_reloc_offset. */
9786 bfd_put_32 (output_bfd,
9787 htab->root.srelplt->reloc_count * RELOC_SIZE (htab),
9788 ptr + 20);
9789 put_arm_insn(htab, output_bfd, plt_entry[6], ptr + 24);
9790 put_arm_insn(htab, output_bfd, plt_entry[7], ptr + 28);
9791 put_arm_insn(htab, output_bfd, plt_entry[8], ptr + 32);
9792 put_arm_insn(htab, output_bfd, plt_entry[9], ptr + 36);
9793 }
9794 }
9795 else if (using_thumb_only (htab))
9796 {
9797 /* PR ld/16017: Generate thumb only PLT entries. */
9798 if (!using_thumb2 (htab))
9799 {
9800 /* FIXME: We ought to be able to generate thumb-1 PLT
9801 instructions... */
9802 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9803 output_bfd);
9804 return FALSE;
9805 }
9806
9807 /* Calculate the displacement between the PLT slot and the entry in
9808 the GOT. The 12-byte offset accounts for the value produced by
9809 adding to pc in the 3rd instruction of the PLT stub. */
9810 got_displacement = got_address - (plt_address + 12);
9811
9812 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9813 instead of 'put_thumb_insn'. */
9814 put_arm_insn (htab, output_bfd,
9815 elf32_thumb2_plt_entry[0]
9816 | ((got_displacement & 0x000000ff) << 16)
9817 | ((got_displacement & 0x00000700) << 20)
9818 | ((got_displacement & 0x00000800) >> 1)
9819 | ((got_displacement & 0x0000f000) >> 12),
9820 ptr + 0);
9821 put_arm_insn (htab, output_bfd,
9822 elf32_thumb2_plt_entry[1]
9823 | ((got_displacement & 0x00ff0000) )
9824 | ((got_displacement & 0x07000000) << 4)
9825 | ((got_displacement & 0x08000000) >> 17)
9826 | ((got_displacement & 0xf0000000) >> 28),
9827 ptr + 4);
9828 put_arm_insn (htab, output_bfd,
9829 elf32_thumb2_plt_entry[2],
9830 ptr + 8);
9831 put_arm_insn (htab, output_bfd,
9832 elf32_thumb2_plt_entry[3],
9833 ptr + 12);
9834 }
9835 else
9836 {
9837 /* Calculate the displacement between the PLT slot and the
9838 entry in the GOT. The eight-byte offset accounts for the
9839 value produced by adding to pc in the first instruction
9840 of the PLT stub. */
9841 got_displacement = got_address - (plt_address + 8);
9842
9843 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9844 {
9845 put_thumb_insn (htab, output_bfd,
9846 elf32_arm_plt_thumb_stub[0], ptr - 4);
9847 put_thumb_insn (htab, output_bfd,
9848 elf32_arm_plt_thumb_stub[1], ptr - 2);
9849 }
9850
9851 if (!elf32_arm_use_long_plt_entry)
9852 {
9853 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9854
9855 put_arm_insn (htab, output_bfd,
9856 elf32_arm_plt_entry_short[0]
9857 | ((got_displacement & 0x0ff00000) >> 20),
9858 ptr + 0);
9859 put_arm_insn (htab, output_bfd,
9860 elf32_arm_plt_entry_short[1]
9861 | ((got_displacement & 0x000ff000) >> 12),
9862 ptr+ 4);
9863 put_arm_insn (htab, output_bfd,
9864 elf32_arm_plt_entry_short[2]
9865 | (got_displacement & 0x00000fff),
9866 ptr + 8);
9867 #ifdef FOUR_WORD_PLT
9868 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9869 #endif
9870 }
9871 else
9872 {
9873 put_arm_insn (htab, output_bfd,
9874 elf32_arm_plt_entry_long[0]
9875 | ((got_displacement & 0xf0000000) >> 28),
9876 ptr + 0);
9877 put_arm_insn (htab, output_bfd,
9878 elf32_arm_plt_entry_long[1]
9879 | ((got_displacement & 0x0ff00000) >> 20),
9880 ptr + 4);
9881 put_arm_insn (htab, output_bfd,
9882 elf32_arm_plt_entry_long[2]
9883 | ((got_displacement & 0x000ff000) >> 12),
9884 ptr+ 8);
9885 put_arm_insn (htab, output_bfd,
9886 elf32_arm_plt_entry_long[3]
9887 | (got_displacement & 0x00000fff),
9888 ptr + 12);
9889 }
9890 }
9891
9892 /* Fill in the entry in the .rel(a).(i)plt section. */
9893 rel.r_offset = got_address;
9894 rel.r_addend = 0;
9895 if (dynindx == -1)
9896 {
9897 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9898 The dynamic linker or static executable then calls SYM_VALUE
9899 to determine the correct run-time value of the .igot.plt entry. */
9900 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9901 initial_got_entry = sym_value;
9902 }
9903 else
9904 {
9905 /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
9906 used by PLT entry. */
9907 if (htab->fdpic_p)
9908 {
9909 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
9910 initial_got_entry = 0;
9911 }
9912 else
9913 {
9914 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9915 initial_got_entry = (splt->output_section->vma
9916 + splt->output_offset);
9917 }
9918 }
9919
9920 /* Fill in the entry in the global offset table. */
9921 bfd_put_32 (output_bfd, initial_got_entry,
9922 sgot->contents + got_offset);
9923
9924 if (htab->fdpic_p && !(info->flags & DF_BIND_NOW))
9925 {
9926 /* Setup initial funcdesc value. */
9927 /* FIXME: we don't support lazy binding because there is a
9928 race condition between both words getting written and
9929 some other thread attempting to read them. The ARM
9930 architecture does not have an atomic 64 bit load/store
9931 instruction that could be used to prevent it; it is
9932 recommended that threaded FDPIC applications run with the
9933 LD_BIND_NOW environment variable set. */
9934 bfd_put_32(output_bfd, plt_address + 0x18,
9935 sgot->contents + got_offset);
9936 bfd_put_32(output_bfd, -1 /*TODO*/,
9937 sgot->contents + got_offset + 4);
9938 }
9939 }
9940
9941 if (dynindx == -1)
9942 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9943 else
9944 {
9945 if (htab->fdpic_p)
9946 {
9947 /* For FDPIC we put PLT relocationss into .rel.got when not
9948 lazy binding otherwise we put them in .rel.plt. For now,
9949 we don't support lazy binding so put it in .rel.got. */
9950 if (info->flags & DF_BIND_NOW)
9951 elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelgot, &rel);
9952 else
9953 elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelplt, &rel);
9954 }
9955 else
9956 {
9957 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9958 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9959 }
9960 }
9961
9962 return TRUE;
9963 }
9964
9965 /* Some relocations map to different relocations depending on the
9966 target. Return the real relocation. */
9967
9968 static int
9969 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
9970 int r_type)
9971 {
9972 switch (r_type)
9973 {
9974 case R_ARM_TARGET1:
9975 if (globals->target1_is_rel)
9976 return R_ARM_REL32;
9977 else
9978 return R_ARM_ABS32;
9979
9980 case R_ARM_TARGET2:
9981 return globals->target2_reloc;
9982
9983 default:
9984 return r_type;
9985 }
9986 }
9987
9988 /* Return the base VMA address which should be subtracted from real addresses
9989 when resolving @dtpoff relocation.
9990 This is PT_TLS segment p_vaddr. */
9991
9992 static bfd_vma
9993 dtpoff_base (struct bfd_link_info *info)
9994 {
9995 /* If tls_sec is NULL, we should have signalled an error already. */
9996 if (elf_hash_table (info)->tls_sec == NULL)
9997 return 0;
9998 return elf_hash_table (info)->tls_sec->vma;
9999 }
10000
10001 /* Return the relocation value for @tpoff relocation
10002 if STT_TLS virtual address is ADDRESS. */
10003
10004 static bfd_vma
10005 tpoff (struct bfd_link_info *info, bfd_vma address)
10006 {
10007 struct elf_link_hash_table *htab = elf_hash_table (info);
10008 bfd_vma base;
10009
10010 /* If tls_sec is NULL, we should have signalled an error already. */
10011 if (htab->tls_sec == NULL)
10012 return 0;
10013 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
10014 return address - htab->tls_sec->vma + base;
10015 }
10016
10017 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
10018 VALUE is the relocation value. */
10019
10020 static bfd_reloc_status_type
10021 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
10022 {
10023 if (value > 0xfff)
10024 return bfd_reloc_overflow;
10025
10026 value |= bfd_get_32 (abfd, data) & 0xfffff000;
10027 bfd_put_32 (abfd, value, data);
10028 return bfd_reloc_ok;
10029 }
10030
10031 /* Handle TLS relaxations. Relaxing is possible for symbols that use
10032 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
10033 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
10034
10035 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
10036 is to then call final_link_relocate. Return other values in the
10037 case of error.
10038
10039 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
10040 the pre-relaxed code. It would be nice if the relocs were updated
10041 to match the optimization. */
10042
10043 static bfd_reloc_status_type
10044 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
10045 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
10046 Elf_Internal_Rela *rel, unsigned long is_local)
10047 {
10048 unsigned long insn;
10049
10050 switch (ELF32_R_TYPE (rel->r_info))
10051 {
10052 default:
10053 return bfd_reloc_notsupported;
10054
10055 case R_ARM_TLS_GOTDESC:
10056 if (is_local)
10057 insn = 0;
10058 else
10059 {
10060 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10061 if (insn & 1)
10062 insn -= 5; /* THUMB */
10063 else
10064 insn -= 8; /* ARM */
10065 }
10066 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10067 return bfd_reloc_continue;
10068
10069 case R_ARM_THM_TLS_DESCSEQ:
10070 /* Thumb insn. */
10071 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
10072 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
10073 {
10074 if (is_local)
10075 /* nop */
10076 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10077 }
10078 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
10079 {
10080 if (is_local)
10081 /* nop */
10082 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10083 else
10084 /* ldr rx,[ry] */
10085 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
10086 }
10087 else if ((insn & 0xff87) == 0x4780) /* blx rx */
10088 {
10089 if (is_local)
10090 /* nop */
10091 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10092 else
10093 /* mov r0, rx */
10094 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
10095 contents + rel->r_offset);
10096 }
10097 else
10098 {
10099 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
10100 /* It's a 32 bit instruction, fetch the rest of it for
10101 error generation. */
10102 insn = (insn << 16)
10103 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
10104 _bfd_error_handler
10105 /* xgettext:c-format */
10106 (_("%pB(%pA+%#" PRIx64 "): "
10107 "unexpected %s instruction '%#lx' in TLS trampoline"),
10108 input_bfd, input_sec, (uint64_t) rel->r_offset,
10109 "Thumb", insn);
10110 return bfd_reloc_notsupported;
10111 }
10112 break;
10113
10114 case R_ARM_TLS_DESCSEQ:
10115 /* arm insn. */
10116 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10117 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
10118 {
10119 if (is_local)
10120 /* mov rx, ry */
10121 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
10122 contents + rel->r_offset);
10123 }
10124 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
10125 {
10126 if (is_local)
10127 /* nop */
10128 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10129 else
10130 /* ldr rx,[ry] */
10131 bfd_put_32 (input_bfd, insn & 0xfffff000,
10132 contents + rel->r_offset);
10133 }
10134 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
10135 {
10136 if (is_local)
10137 /* nop */
10138 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10139 else
10140 /* mov r0, rx */
10141 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
10142 contents + rel->r_offset);
10143 }
10144 else
10145 {
10146 _bfd_error_handler
10147 /* xgettext:c-format */
10148 (_("%pB(%pA+%#" PRIx64 "): "
10149 "unexpected %s instruction '%#lx' in TLS trampoline"),
10150 input_bfd, input_sec, (uint64_t) rel->r_offset,
10151 "ARM", insn);
10152 return bfd_reloc_notsupported;
10153 }
10154 break;
10155
10156 case R_ARM_TLS_CALL:
10157 /* GD->IE relaxation, turn the instruction into 'nop' or
10158 'ldr r0, [pc,r0]' */
10159 insn = is_local ? 0xe1a00000 : 0xe79f0000;
10160 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10161 break;
10162
10163 case R_ARM_THM_TLS_CALL:
10164 /* GD->IE relaxation. */
10165 if (!is_local)
10166 /* add r0,pc; ldr r0, [r0] */
10167 insn = 0x44786800;
10168 else if (using_thumb2 (globals))
10169 /* nop.w */
10170 insn = 0xf3af8000;
10171 else
10172 /* nop; nop */
10173 insn = 0xbf00bf00;
10174
10175 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
10176 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
10177 break;
10178 }
10179 return bfd_reloc_ok;
10180 }
10181
10182 /* For a given value of n, calculate the value of G_n as required to
10183 deal with group relocations. We return it in the form of an
10184 encoded constant-and-rotation, together with the final residual. If n is
10185 specified as less than zero, then final_residual is filled with the
10186 input value and no further action is performed. */
10187
10188 static bfd_vma
10189 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
10190 {
10191 int current_n;
10192 bfd_vma g_n;
10193 bfd_vma encoded_g_n = 0;
10194 bfd_vma residual = value; /* Also known as Y_n. */
10195
10196 for (current_n = 0; current_n <= n; current_n++)
10197 {
10198 int shift;
10199
10200 /* Calculate which part of the value to mask. */
10201 if (residual == 0)
10202 shift = 0;
10203 else
10204 {
10205 int msb;
10206
10207 /* Determine the most significant bit in the residual and
10208 align the resulting value to a 2-bit boundary. */
10209 for (msb = 30; msb >= 0; msb -= 2)
10210 if (residual & (3 << msb))
10211 break;
10212
10213 /* The desired shift is now (msb - 6), or zero, whichever
10214 is the greater. */
10215 shift = msb - 6;
10216 if (shift < 0)
10217 shift = 0;
10218 }
10219
10220 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
10221 g_n = residual & (0xff << shift);
10222 encoded_g_n = (g_n >> shift)
10223 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
10224
10225 /* Calculate the residual for the next time around. */
10226 residual &= ~g_n;
10227 }
10228
10229 *final_residual = residual;
10230
10231 return encoded_g_n;
10232 }
10233
10234 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
10235 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
10236
10237 static int
10238 identify_add_or_sub (bfd_vma insn)
10239 {
10240 int opcode = insn & 0x1e00000;
10241
10242 if (opcode == 1 << 23) /* ADD */
10243 return 1;
10244
10245 if (opcode == 1 << 22) /* SUB */
10246 return -1;
10247
10248 return 0;
10249 }
10250
10251 /* Perform a relocation as part of a final link. */
10252
10253 static bfd_reloc_status_type
10254 elf32_arm_final_link_relocate (reloc_howto_type * howto,
10255 bfd * input_bfd,
10256 bfd * output_bfd,
10257 asection * input_section,
10258 bfd_byte * contents,
10259 Elf_Internal_Rela * rel,
10260 bfd_vma value,
10261 struct bfd_link_info * info,
10262 asection * sym_sec,
10263 const char * sym_name,
10264 unsigned char st_type,
10265 enum arm_st_branch_type branch_type,
10266 struct elf_link_hash_entry * h,
10267 bfd_boolean * unresolved_reloc_p,
10268 char ** error_message)
10269 {
10270 unsigned long r_type = howto->type;
10271 unsigned long r_symndx;
10272 bfd_byte * hit_data = contents + rel->r_offset;
10273 bfd_vma * local_got_offsets;
10274 bfd_vma * local_tlsdesc_gotents;
10275 asection * sgot;
10276 asection * splt;
10277 asection * sreloc = NULL;
10278 asection * srelgot;
10279 bfd_vma addend;
10280 bfd_signed_vma signed_addend;
10281 unsigned char dynreloc_st_type;
10282 bfd_vma dynreloc_value;
10283 struct elf32_arm_link_hash_table * globals;
10284 struct elf32_arm_link_hash_entry *eh;
10285 union gotplt_union *root_plt;
10286 struct arm_plt_info *arm_plt;
10287 bfd_vma plt_offset;
10288 bfd_vma gotplt_offset;
10289 bfd_boolean has_iplt_entry;
10290 bfd_boolean resolved_to_zero;
10291
10292 globals = elf32_arm_hash_table (info);
10293 if (globals == NULL)
10294 return bfd_reloc_notsupported;
10295
10296 BFD_ASSERT (is_arm_elf (input_bfd));
10297 BFD_ASSERT (howto != NULL);
10298
10299 /* Some relocation types map to different relocations depending on the
10300 target. We pick the right one here. */
10301 r_type = arm_real_reloc_type (globals, r_type);
10302
10303 /* It is possible to have linker relaxations on some TLS access
10304 models. Update our information here. */
10305 r_type = elf32_arm_tls_transition (info, r_type, h);
10306
10307 if (r_type != howto->type)
10308 howto = elf32_arm_howto_from_type (r_type);
10309
10310 eh = (struct elf32_arm_link_hash_entry *) h;
10311 sgot = globals->root.sgot;
10312 local_got_offsets = elf_local_got_offsets (input_bfd);
10313 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
10314
10315 if (globals->root.dynamic_sections_created)
10316 srelgot = globals->root.srelgot;
10317 else
10318 srelgot = NULL;
10319
10320 r_symndx = ELF32_R_SYM (rel->r_info);
10321
10322 if (globals->use_rel)
10323 {
10324 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
10325
10326 if (addend & ((howto->src_mask + 1) >> 1))
10327 {
10328 signed_addend = -1;
10329 signed_addend &= ~ howto->src_mask;
10330 signed_addend |= addend;
10331 }
10332 else
10333 signed_addend = addend;
10334 }
10335 else
10336 addend = signed_addend = rel->r_addend;
10337
10338 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10339 are resolving a function call relocation. */
10340 if (using_thumb_only (globals)
10341 && (r_type == R_ARM_THM_CALL
10342 || r_type == R_ARM_THM_JUMP24)
10343 && branch_type == ST_BRANCH_TO_ARM)
10344 branch_type = ST_BRANCH_TO_THUMB;
10345
10346 /* Record the symbol information that should be used in dynamic
10347 relocations. */
10348 dynreloc_st_type = st_type;
10349 dynreloc_value = value;
10350 if (branch_type == ST_BRANCH_TO_THUMB)
10351 dynreloc_value |= 1;
10352
10353 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10354 VALUE appropriately for relocations that we resolve at link time. */
10355 has_iplt_entry = FALSE;
10356 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
10357 &arm_plt)
10358 && root_plt->offset != (bfd_vma) -1)
10359 {
10360 plt_offset = root_plt->offset;
10361 gotplt_offset = arm_plt->got_offset;
10362
10363 if (h == NULL || eh->is_iplt)
10364 {
10365 has_iplt_entry = TRUE;
10366 splt = globals->root.iplt;
10367
10368 /* Populate .iplt entries here, because not all of them will
10369 be seen by finish_dynamic_symbol. The lower bit is set if
10370 we have already populated the entry. */
10371 if (plt_offset & 1)
10372 plt_offset--;
10373 else
10374 {
10375 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
10376 -1, dynreloc_value))
10377 root_plt->offset |= 1;
10378 else
10379 return bfd_reloc_notsupported;
10380 }
10381
10382 /* Static relocations always resolve to the .iplt entry. */
10383 st_type = STT_FUNC;
10384 value = (splt->output_section->vma
10385 + splt->output_offset
10386 + plt_offset);
10387 branch_type = ST_BRANCH_TO_ARM;
10388
10389 /* If there are non-call relocations that resolve to the .iplt
10390 entry, then all dynamic ones must too. */
10391 if (arm_plt->noncall_refcount != 0)
10392 {
10393 dynreloc_st_type = st_type;
10394 dynreloc_value = value;
10395 }
10396 }
10397 else
10398 /* We populate the .plt entry in finish_dynamic_symbol. */
10399 splt = globals->root.splt;
10400 }
10401 else
10402 {
10403 splt = NULL;
10404 plt_offset = (bfd_vma) -1;
10405 gotplt_offset = (bfd_vma) -1;
10406 }
10407
10408 resolved_to_zero = (h != NULL
10409 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
10410
10411 switch (r_type)
10412 {
10413 case R_ARM_NONE:
10414 /* We don't need to find a value for this symbol. It's just a
10415 marker. */
10416 *unresolved_reloc_p = FALSE;
10417 return bfd_reloc_ok;
10418
10419 case R_ARM_ABS12:
10420 if (!globals->vxworks_p)
10421 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10422 /* Fall through. */
10423
10424 case R_ARM_PC24:
10425 case R_ARM_ABS32:
10426 case R_ARM_ABS32_NOI:
10427 case R_ARM_REL32:
10428 case R_ARM_REL32_NOI:
10429 case R_ARM_CALL:
10430 case R_ARM_JUMP24:
10431 case R_ARM_XPC25:
10432 case R_ARM_PREL31:
10433 case R_ARM_PLT32:
10434 /* Handle relocations which should use the PLT entry. ABS32/REL32
10435 will use the symbol's value, which may point to a PLT entry, but we
10436 don't need to handle that here. If we created a PLT entry, all
10437 branches in this object should go to it, except if the PLT is too
10438 far away, in which case a long branch stub should be inserted. */
10439 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10440 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10441 && r_type != R_ARM_CALL
10442 && r_type != R_ARM_JUMP24
10443 && r_type != R_ARM_PLT32)
10444 && plt_offset != (bfd_vma) -1)
10445 {
10446 /* If we've created a .plt section, and assigned a PLT entry
10447 to this function, it must either be a STT_GNU_IFUNC reference
10448 or not be known to bind locally. In other cases, we should
10449 have cleared the PLT entry by now. */
10450 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10451
10452 value = (splt->output_section->vma
10453 + splt->output_offset
10454 + plt_offset);
10455 *unresolved_reloc_p = FALSE;
10456 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10457 contents, rel->r_offset, value,
10458 rel->r_addend);
10459 }
10460
10461 /* When generating a shared object or relocatable executable, these
10462 relocations are copied into the output file to be resolved at
10463 run time. */
10464 if ((bfd_link_pic (info)
10465 || globals->root.is_relocatable_executable
10466 || globals->fdpic_p)
10467 && (input_section->flags & SEC_ALLOC)
10468 && !(globals->vxworks_p
10469 && strcmp (input_section->output_section->name,
10470 ".tls_vars") == 0)
10471 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10472 || !SYMBOL_CALLS_LOCAL (info, h))
10473 && !(input_bfd == globals->stub_bfd
10474 && strstr (input_section->name, STUB_SUFFIX))
10475 && (h == NULL
10476 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10477 && !resolved_to_zero)
10478 || h->root.type != bfd_link_hash_undefweak)
10479 && r_type != R_ARM_PC24
10480 && r_type != R_ARM_CALL
10481 && r_type != R_ARM_JUMP24
10482 && r_type != R_ARM_PREL31
10483 && r_type != R_ARM_PLT32)
10484 {
10485 Elf_Internal_Rela outrel;
10486 bfd_boolean skip, relocate;
10487 int isrofixup = 0;
10488
10489 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10490 && !h->def_regular)
10491 {
10492 char *v = _("shared object");
10493
10494 if (bfd_link_executable (info))
10495 v = _("PIE executable");
10496
10497 _bfd_error_handler
10498 (_("%pB: relocation %s against external or undefined symbol `%s'"
10499 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10500 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10501 return bfd_reloc_notsupported;
10502 }
10503
10504 *unresolved_reloc_p = FALSE;
10505
10506 if (sreloc == NULL && globals->root.dynamic_sections_created)
10507 {
10508 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10509 ! globals->use_rel);
10510
10511 if (sreloc == NULL)
10512 return bfd_reloc_notsupported;
10513 }
10514
10515 skip = FALSE;
10516 relocate = FALSE;
10517
10518 outrel.r_addend = addend;
10519 outrel.r_offset =
10520 _bfd_elf_section_offset (output_bfd, info, input_section,
10521 rel->r_offset);
10522 if (outrel.r_offset == (bfd_vma) -1)
10523 skip = TRUE;
10524 else if (outrel.r_offset == (bfd_vma) -2)
10525 skip = TRUE, relocate = TRUE;
10526 outrel.r_offset += (input_section->output_section->vma
10527 + input_section->output_offset);
10528
10529 if (skip)
10530 memset (&outrel, 0, sizeof outrel);
10531 else if (h != NULL
10532 && h->dynindx != -1
10533 && (!bfd_link_pic (info)
10534 || !(bfd_link_pie (info)
10535 || SYMBOLIC_BIND (info, h))
10536 || !h->def_regular))
10537 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10538 else
10539 {
10540 int symbol;
10541
10542 /* This symbol is local, or marked to become local. */
10543 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI
10544 || (globals->fdpic_p && !bfd_link_pic(info)));
10545 if (globals->symbian_p)
10546 {
10547 asection *osec;
10548
10549 /* On Symbian OS, the data segment and text segement
10550 can be relocated independently. Therefore, we
10551 must indicate the segment to which this
10552 relocation is relative. The BPABI allows us to
10553 use any symbol in the right segment; we just use
10554 the section symbol as it is convenient. (We
10555 cannot use the symbol given by "h" directly as it
10556 will not appear in the dynamic symbol table.)
10557
10558 Note that the dynamic linker ignores the section
10559 symbol value, so we don't subtract osec->vma
10560 from the emitted reloc addend. */
10561 if (sym_sec)
10562 osec = sym_sec->output_section;
10563 else
10564 osec = input_section->output_section;
10565 symbol = elf_section_data (osec)->dynindx;
10566 if (symbol == 0)
10567 {
10568 struct elf_link_hash_table *htab = elf_hash_table (info);
10569
10570 if ((osec->flags & SEC_READONLY) == 0
10571 && htab->data_index_section != NULL)
10572 osec = htab->data_index_section;
10573 else
10574 osec = htab->text_index_section;
10575 symbol = elf_section_data (osec)->dynindx;
10576 }
10577 BFD_ASSERT (symbol != 0);
10578 }
10579 else
10580 /* On SVR4-ish systems, the dynamic loader cannot
10581 relocate the text and data segments independently,
10582 so the symbol does not matter. */
10583 symbol = 0;
10584 if (dynreloc_st_type == STT_GNU_IFUNC)
10585 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10586 to the .iplt entry. Instead, every non-call reference
10587 must use an R_ARM_IRELATIVE relocation to obtain the
10588 correct run-time address. */
10589 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10590 else if (globals->fdpic_p && !bfd_link_pic(info))
10591 isrofixup = 1;
10592 else
10593 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10594 if (globals->use_rel)
10595 relocate = TRUE;
10596 else
10597 outrel.r_addend += dynreloc_value;
10598 }
10599
10600 if (isrofixup)
10601 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
10602 else
10603 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10604
10605 /* If this reloc is against an external symbol, we do not want to
10606 fiddle with the addend. Otherwise, we need to include the symbol
10607 value so that it becomes an addend for the dynamic reloc. */
10608 if (! relocate)
10609 return bfd_reloc_ok;
10610
10611 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10612 contents, rel->r_offset,
10613 dynreloc_value, (bfd_vma) 0);
10614 }
10615 else switch (r_type)
10616 {
10617 case R_ARM_ABS12:
10618 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10619
10620 case R_ARM_XPC25: /* Arm BLX instruction. */
10621 case R_ARM_CALL:
10622 case R_ARM_JUMP24:
10623 case R_ARM_PC24: /* Arm B/BL instruction. */
10624 case R_ARM_PLT32:
10625 {
10626 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10627
10628 if (r_type == R_ARM_XPC25)
10629 {
10630 /* Check for Arm calling Arm function. */
10631 /* FIXME: Should we translate the instruction into a BL
10632 instruction instead ? */
10633 if (branch_type != ST_BRANCH_TO_THUMB)
10634 _bfd_error_handler
10635 (_("\%pB: warning: %s BLX instruction targets"
10636 " %s function '%s'"),
10637 input_bfd, "ARM",
10638 "ARM", h ? h->root.root.string : "(local)");
10639 }
10640 else if (r_type == R_ARM_PC24)
10641 {
10642 /* Check for Arm calling Thumb function. */
10643 if (branch_type == ST_BRANCH_TO_THUMB)
10644 {
10645 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10646 output_bfd, input_section,
10647 hit_data, sym_sec, rel->r_offset,
10648 signed_addend, value,
10649 error_message))
10650 return bfd_reloc_ok;
10651 else
10652 return bfd_reloc_dangerous;
10653 }
10654 }
10655
10656 /* Check if a stub has to be inserted because the
10657 destination is too far or we are changing mode. */
10658 if ( r_type == R_ARM_CALL
10659 || r_type == R_ARM_JUMP24
10660 || r_type == R_ARM_PLT32)
10661 {
10662 enum elf32_arm_stub_type stub_type = arm_stub_none;
10663 struct elf32_arm_link_hash_entry *hash;
10664
10665 hash = (struct elf32_arm_link_hash_entry *) h;
10666 stub_type = arm_type_of_stub (info, input_section, rel,
10667 st_type, &branch_type,
10668 hash, value, sym_sec,
10669 input_bfd, sym_name);
10670
10671 if (stub_type != arm_stub_none)
10672 {
10673 /* The target is out of reach, so redirect the
10674 branch to the local stub for this function. */
10675 stub_entry = elf32_arm_get_stub_entry (input_section,
10676 sym_sec, h,
10677 rel, globals,
10678 stub_type);
10679 {
10680 if (stub_entry != NULL)
10681 value = (stub_entry->stub_offset
10682 + stub_entry->stub_sec->output_offset
10683 + stub_entry->stub_sec->output_section->vma);
10684
10685 if (plt_offset != (bfd_vma) -1)
10686 *unresolved_reloc_p = FALSE;
10687 }
10688 }
10689 else
10690 {
10691 /* If the call goes through a PLT entry, make sure to
10692 check distance to the right destination address. */
10693 if (plt_offset != (bfd_vma) -1)
10694 {
10695 value = (splt->output_section->vma
10696 + splt->output_offset
10697 + plt_offset);
10698 *unresolved_reloc_p = FALSE;
10699 /* The PLT entry is in ARM mode, regardless of the
10700 target function. */
10701 branch_type = ST_BRANCH_TO_ARM;
10702 }
10703 }
10704 }
10705
10706 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10707 where:
10708 S is the address of the symbol in the relocation.
10709 P is address of the instruction being relocated.
10710 A is the addend (extracted from the instruction) in bytes.
10711
10712 S is held in 'value'.
10713 P is the base address of the section containing the
10714 instruction plus the offset of the reloc into that
10715 section, ie:
10716 (input_section->output_section->vma +
10717 input_section->output_offset +
10718 rel->r_offset).
10719 A is the addend, converted into bytes, ie:
10720 (signed_addend * 4)
10721
10722 Note: None of these operations have knowledge of the pipeline
10723 size of the processor, thus it is up to the assembler to
10724 encode this information into the addend. */
10725 value -= (input_section->output_section->vma
10726 + input_section->output_offset);
10727 value -= rel->r_offset;
10728 if (globals->use_rel)
10729 value += (signed_addend << howto->size);
10730 else
10731 /* RELA addends do not have to be adjusted by howto->size. */
10732 value += signed_addend;
10733
10734 signed_addend = value;
10735 signed_addend >>= howto->rightshift;
10736
10737 /* A branch to an undefined weak symbol is turned into a jump to
10738 the next instruction unless a PLT entry will be created.
10739 Do the same for local undefined symbols (but not for STN_UNDEF).
10740 The jump to the next instruction is optimized as a NOP depending
10741 on the architecture. */
10742 if (h ? (h->root.type == bfd_link_hash_undefweak
10743 && plt_offset == (bfd_vma) -1)
10744 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10745 {
10746 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10747
10748 if (arch_has_arm_nop (globals))
10749 value |= 0x0320f000;
10750 else
10751 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10752 }
10753 else
10754 {
10755 /* Perform a signed range check. */
10756 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10757 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10758 return bfd_reloc_overflow;
10759
10760 addend = (value & 2);
10761
10762 value = (signed_addend & howto->dst_mask)
10763 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10764
10765 if (r_type == R_ARM_CALL)
10766 {
10767 /* Set the H bit in the BLX instruction. */
10768 if (branch_type == ST_BRANCH_TO_THUMB)
10769 {
10770 if (addend)
10771 value |= (1 << 24);
10772 else
10773 value &= ~(bfd_vma)(1 << 24);
10774 }
10775
10776 /* Select the correct instruction (BL or BLX). */
10777 /* Only if we are not handling a BL to a stub. In this
10778 case, mode switching is performed by the stub. */
10779 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10780 value |= (1 << 28);
10781 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10782 {
10783 value &= ~(bfd_vma)(1 << 28);
10784 value |= (1 << 24);
10785 }
10786 }
10787 }
10788 }
10789 break;
10790
10791 case R_ARM_ABS32:
10792 value += addend;
10793 if (branch_type == ST_BRANCH_TO_THUMB)
10794 value |= 1;
10795 break;
10796
10797 case R_ARM_ABS32_NOI:
10798 value += addend;
10799 break;
10800
10801 case R_ARM_REL32:
10802 value += addend;
10803 if (branch_type == ST_BRANCH_TO_THUMB)
10804 value |= 1;
10805 value -= (input_section->output_section->vma
10806 + input_section->output_offset + rel->r_offset);
10807 break;
10808
10809 case R_ARM_REL32_NOI:
10810 value += addend;
10811 value -= (input_section->output_section->vma
10812 + input_section->output_offset + rel->r_offset);
10813 break;
10814
10815 case R_ARM_PREL31:
10816 value -= (input_section->output_section->vma
10817 + input_section->output_offset + rel->r_offset);
10818 value += signed_addend;
10819 if (! h || h->root.type != bfd_link_hash_undefweak)
10820 {
10821 /* Check for overflow. */
10822 if ((value ^ (value >> 1)) & (1 << 30))
10823 return bfd_reloc_overflow;
10824 }
10825 value &= 0x7fffffff;
10826 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10827 if (branch_type == ST_BRANCH_TO_THUMB)
10828 value |= 1;
10829 break;
10830 }
10831
10832 bfd_put_32 (input_bfd, value, hit_data);
10833 return bfd_reloc_ok;
10834
10835 case R_ARM_ABS8:
10836 /* PR 16202: Refectch the addend using the correct size. */
10837 if (globals->use_rel)
10838 addend = bfd_get_8 (input_bfd, hit_data);
10839 value += addend;
10840
10841 /* There is no way to tell whether the user intended to use a signed or
10842 unsigned addend. When checking for overflow we accept either,
10843 as specified by the AAELF. */
10844 if ((long) value > 0xff || (long) value < -0x80)
10845 return bfd_reloc_overflow;
10846
10847 bfd_put_8 (input_bfd, value, hit_data);
10848 return bfd_reloc_ok;
10849
10850 case R_ARM_ABS16:
10851 /* PR 16202: Refectch the addend using the correct size. */
10852 if (globals->use_rel)
10853 addend = bfd_get_16 (input_bfd, hit_data);
10854 value += addend;
10855
10856 /* See comment for R_ARM_ABS8. */
10857 if ((long) value > 0xffff || (long) value < -0x8000)
10858 return bfd_reloc_overflow;
10859
10860 bfd_put_16 (input_bfd, value, hit_data);
10861 return bfd_reloc_ok;
10862
10863 case R_ARM_THM_ABS5:
10864 /* Support ldr and str instructions for the thumb. */
10865 if (globals->use_rel)
10866 {
10867 /* Need to refetch addend. */
10868 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10869 /* ??? Need to determine shift amount from operand size. */
10870 addend >>= howto->rightshift;
10871 }
10872 value += addend;
10873
10874 /* ??? Isn't value unsigned? */
10875 if ((long) value > 0x1f || (long) value < -0x10)
10876 return bfd_reloc_overflow;
10877
10878 /* ??? Value needs to be properly shifted into place first. */
10879 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10880 bfd_put_16 (input_bfd, value, hit_data);
10881 return bfd_reloc_ok;
10882
10883 case R_ARM_THM_ALU_PREL_11_0:
10884 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10885 {
10886 bfd_vma insn;
10887 bfd_signed_vma relocation;
10888
10889 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10890 | bfd_get_16 (input_bfd, hit_data + 2);
10891
10892 if (globals->use_rel)
10893 {
10894 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10895 | ((insn & (1 << 26)) >> 15);
10896 if (insn & 0xf00000)
10897 signed_addend = -signed_addend;
10898 }
10899
10900 relocation = value + signed_addend;
10901 relocation -= Pa (input_section->output_section->vma
10902 + input_section->output_offset
10903 + rel->r_offset);
10904
10905 /* PR 21523: Use an absolute value. The user of this reloc will
10906 have already selected an ADD or SUB insn appropriately. */
10907 value = llabs (relocation);
10908
10909 if (value >= 0x1000)
10910 return bfd_reloc_overflow;
10911
10912 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10913 if (branch_type == ST_BRANCH_TO_THUMB)
10914 value |= 1;
10915
10916 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10917 | ((value & 0x700) << 4)
10918 | ((value & 0x800) << 15);
10919 if (relocation < 0)
10920 insn |= 0xa00000;
10921
10922 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10923 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10924
10925 return bfd_reloc_ok;
10926 }
10927
10928 case R_ARM_THM_PC8:
10929 /* PR 10073: This reloc is not generated by the GNU toolchain,
10930 but it is supported for compatibility with third party libraries
10931 generated by other compilers, specifically the ARM/IAR. */
10932 {
10933 bfd_vma insn;
10934 bfd_signed_vma relocation;
10935
10936 insn = bfd_get_16 (input_bfd, hit_data);
10937
10938 if (globals->use_rel)
10939 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10940
10941 relocation = value + addend;
10942 relocation -= Pa (input_section->output_section->vma
10943 + input_section->output_offset
10944 + rel->r_offset);
10945
10946 value = relocation;
10947
10948 /* We do not check for overflow of this reloc. Although strictly
10949 speaking this is incorrect, it appears to be necessary in order
10950 to work with IAR generated relocs. Since GCC and GAS do not
10951 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10952 a problem for them. */
10953 value &= 0x3fc;
10954
10955 insn = (insn & 0xff00) | (value >> 2);
10956
10957 bfd_put_16 (input_bfd, insn, hit_data);
10958
10959 return bfd_reloc_ok;
10960 }
10961
10962 case R_ARM_THM_PC12:
10963 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10964 {
10965 bfd_vma insn;
10966 bfd_signed_vma relocation;
10967
10968 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10969 | bfd_get_16 (input_bfd, hit_data + 2);
10970
10971 if (globals->use_rel)
10972 {
10973 signed_addend = insn & 0xfff;
10974 if (!(insn & (1 << 23)))
10975 signed_addend = -signed_addend;
10976 }
10977
10978 relocation = value + signed_addend;
10979 relocation -= Pa (input_section->output_section->vma
10980 + input_section->output_offset
10981 + rel->r_offset);
10982
10983 value = relocation;
10984
10985 if (value >= 0x1000)
10986 return bfd_reloc_overflow;
10987
10988 insn = (insn & 0xff7ff000) | value;
10989 if (relocation >= 0)
10990 insn |= (1 << 23);
10991
10992 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10993 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10994
10995 return bfd_reloc_ok;
10996 }
10997
10998 case R_ARM_THM_XPC22:
10999 case R_ARM_THM_CALL:
11000 case R_ARM_THM_JUMP24:
11001 /* Thumb BL (branch long instruction). */
11002 {
11003 bfd_vma relocation;
11004 bfd_vma reloc_sign;
11005 bfd_boolean overflow = FALSE;
11006 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11007 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11008 bfd_signed_vma reloc_signed_max;
11009 bfd_signed_vma reloc_signed_min;
11010 bfd_vma check;
11011 bfd_signed_vma signed_check;
11012 int bitsize;
11013 const int thumb2 = using_thumb2 (globals);
11014 const int thumb2_bl = using_thumb2_bl (globals);
11015
11016 /* A branch to an undefined weak symbol is turned into a jump to
11017 the next instruction unless a PLT entry will be created.
11018 The jump to the next instruction is optimized as a NOP.W for
11019 Thumb-2 enabled architectures. */
11020 if (h && h->root.type == bfd_link_hash_undefweak
11021 && plt_offset == (bfd_vma) -1)
11022 {
11023 if (thumb2)
11024 {
11025 bfd_put_16 (input_bfd, 0xf3af, hit_data);
11026 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
11027 }
11028 else
11029 {
11030 bfd_put_16 (input_bfd, 0xe000, hit_data);
11031 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
11032 }
11033 return bfd_reloc_ok;
11034 }
11035
11036 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
11037 with Thumb-1) involving the J1 and J2 bits. */
11038 if (globals->use_rel)
11039 {
11040 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
11041 bfd_vma upper = upper_insn & 0x3ff;
11042 bfd_vma lower = lower_insn & 0x7ff;
11043 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
11044 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
11045 bfd_vma i1 = j1 ^ s ? 0 : 1;
11046 bfd_vma i2 = j2 ^ s ? 0 : 1;
11047
11048 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
11049 /* Sign extend. */
11050 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
11051
11052 signed_addend = addend;
11053 }
11054
11055 if (r_type == R_ARM_THM_XPC22)
11056 {
11057 /* Check for Thumb to Thumb call. */
11058 /* FIXME: Should we translate the instruction into a BL
11059 instruction instead ? */
11060 if (branch_type == ST_BRANCH_TO_THUMB)
11061 _bfd_error_handler
11062 (_("%pB: warning: %s BLX instruction targets"
11063 " %s function '%s'"),
11064 input_bfd, "Thumb",
11065 "Thumb", h ? h->root.root.string : "(local)");
11066 }
11067 else
11068 {
11069 /* If it is not a call to Thumb, assume call to Arm.
11070 If it is a call relative to a section name, then it is not a
11071 function call at all, but rather a long jump. Calls through
11072 the PLT do not require stubs. */
11073 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
11074 {
11075 if (globals->use_blx && r_type == R_ARM_THM_CALL)
11076 {
11077 /* Convert BL to BLX. */
11078 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11079 }
11080 else if (( r_type != R_ARM_THM_CALL)
11081 && (r_type != R_ARM_THM_JUMP24))
11082 {
11083 if (elf32_thumb_to_arm_stub
11084 (info, sym_name, input_bfd, output_bfd, input_section,
11085 hit_data, sym_sec, rel->r_offset, signed_addend, value,
11086 error_message))
11087 return bfd_reloc_ok;
11088 else
11089 return bfd_reloc_dangerous;
11090 }
11091 }
11092 else if (branch_type == ST_BRANCH_TO_THUMB
11093 && globals->use_blx
11094 && r_type == R_ARM_THM_CALL)
11095 {
11096 /* Make sure this is a BL. */
11097 lower_insn |= 0x1800;
11098 }
11099 }
11100
11101 enum elf32_arm_stub_type stub_type = arm_stub_none;
11102 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
11103 {
11104 /* Check if a stub has to be inserted because the destination
11105 is too far. */
11106 struct elf32_arm_stub_hash_entry *stub_entry;
11107 struct elf32_arm_link_hash_entry *hash;
11108
11109 hash = (struct elf32_arm_link_hash_entry *) h;
11110
11111 stub_type = arm_type_of_stub (info, input_section, rel,
11112 st_type, &branch_type,
11113 hash, value, sym_sec,
11114 input_bfd, sym_name);
11115
11116 if (stub_type != arm_stub_none)
11117 {
11118 /* The target is out of reach or we are changing modes, so
11119 redirect the branch to the local stub for this
11120 function. */
11121 stub_entry = elf32_arm_get_stub_entry (input_section,
11122 sym_sec, h,
11123 rel, globals,
11124 stub_type);
11125 if (stub_entry != NULL)
11126 {
11127 value = (stub_entry->stub_offset
11128 + stub_entry->stub_sec->output_offset
11129 + stub_entry->stub_sec->output_section->vma);
11130
11131 if (plt_offset != (bfd_vma) -1)
11132 *unresolved_reloc_p = FALSE;
11133 }
11134
11135 /* If this call becomes a call to Arm, force BLX. */
11136 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
11137 {
11138 if ((stub_entry
11139 && !arm_stub_is_thumb (stub_entry->stub_type))
11140 || branch_type != ST_BRANCH_TO_THUMB)
11141 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11142 }
11143 }
11144 }
11145
11146 /* Handle calls via the PLT. */
11147 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
11148 {
11149 value = (splt->output_section->vma
11150 + splt->output_offset
11151 + plt_offset);
11152
11153 if (globals->use_blx
11154 && r_type == R_ARM_THM_CALL
11155 && ! using_thumb_only (globals))
11156 {
11157 /* If the Thumb BLX instruction is available, convert
11158 the BL to a BLX instruction to call the ARM-mode
11159 PLT entry. */
11160 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11161 branch_type = ST_BRANCH_TO_ARM;
11162 }
11163 else
11164 {
11165 if (! using_thumb_only (globals))
11166 /* Target the Thumb stub before the ARM PLT entry. */
11167 value -= PLT_THUMB_STUB_SIZE;
11168 branch_type = ST_BRANCH_TO_THUMB;
11169 }
11170 *unresolved_reloc_p = FALSE;
11171 }
11172
11173 relocation = value + signed_addend;
11174
11175 relocation -= (input_section->output_section->vma
11176 + input_section->output_offset
11177 + rel->r_offset);
11178
11179 check = relocation >> howto->rightshift;
11180
11181 /* If this is a signed value, the rightshift just dropped
11182 leading 1 bits (assuming twos complement). */
11183 if ((bfd_signed_vma) relocation >= 0)
11184 signed_check = check;
11185 else
11186 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
11187
11188 /* Calculate the permissable maximum and minimum values for
11189 this relocation according to whether we're relocating for
11190 Thumb-2 or not. */
11191 bitsize = howto->bitsize;
11192 if (!thumb2_bl)
11193 bitsize -= 2;
11194 reloc_signed_max = (1 << (bitsize - 1)) - 1;
11195 reloc_signed_min = ~reloc_signed_max;
11196
11197 /* Assumes two's complement. */
11198 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11199 overflow = TRUE;
11200
11201 if ((lower_insn & 0x5000) == 0x4000)
11202 /* For a BLX instruction, make sure that the relocation is rounded up
11203 to a word boundary. This follows the semantics of the instruction
11204 which specifies that bit 1 of the target address will come from bit
11205 1 of the base address. */
11206 relocation = (relocation + 2) & ~ 3;
11207
11208 /* Put RELOCATION back into the insn. Assumes two's complement.
11209 We use the Thumb-2 encoding, which is safe even if dealing with
11210 a Thumb-1 instruction by virtue of our overflow check above. */
11211 reloc_sign = (signed_check < 0) ? 1 : 0;
11212 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
11213 | ((relocation >> 12) & 0x3ff)
11214 | (reloc_sign << 10);
11215 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
11216 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
11217 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
11218 | ((relocation >> 1) & 0x7ff);
11219
11220 /* Put the relocated value back in the object file: */
11221 bfd_put_16 (input_bfd, upper_insn, hit_data);
11222 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11223
11224 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11225 }
11226 break;
11227
11228 case R_ARM_THM_JUMP19:
11229 /* Thumb32 conditional branch instruction. */
11230 {
11231 bfd_vma relocation;
11232 bfd_boolean overflow = FALSE;
11233 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11234 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11235 bfd_signed_vma reloc_signed_max = 0xffffe;
11236 bfd_signed_vma reloc_signed_min = -0x100000;
11237 bfd_signed_vma signed_check;
11238 enum elf32_arm_stub_type stub_type = arm_stub_none;
11239 struct elf32_arm_stub_hash_entry *stub_entry;
11240 struct elf32_arm_link_hash_entry *hash;
11241
11242 /* Need to refetch the addend, reconstruct the top three bits,
11243 and squish the two 11 bit pieces together. */
11244 if (globals->use_rel)
11245 {
11246 bfd_vma S = (upper_insn & 0x0400) >> 10;
11247 bfd_vma upper = (upper_insn & 0x003f);
11248 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
11249 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
11250 bfd_vma lower = (lower_insn & 0x07ff);
11251
11252 upper |= J1 << 6;
11253 upper |= J2 << 7;
11254 upper |= (!S) << 8;
11255 upper -= 0x0100; /* Sign extend. */
11256
11257 addend = (upper << 12) | (lower << 1);
11258 signed_addend = addend;
11259 }
11260
11261 /* Handle calls via the PLT. */
11262 if (plt_offset != (bfd_vma) -1)
11263 {
11264 value = (splt->output_section->vma
11265 + splt->output_offset
11266 + plt_offset);
11267 /* Target the Thumb stub before the ARM PLT entry. */
11268 value -= PLT_THUMB_STUB_SIZE;
11269 *unresolved_reloc_p = FALSE;
11270 }
11271
11272 hash = (struct elf32_arm_link_hash_entry *)h;
11273
11274 stub_type = arm_type_of_stub (info, input_section, rel,
11275 st_type, &branch_type,
11276 hash, value, sym_sec,
11277 input_bfd, sym_name);
11278 if (stub_type != arm_stub_none)
11279 {
11280 stub_entry = elf32_arm_get_stub_entry (input_section,
11281 sym_sec, h,
11282 rel, globals,
11283 stub_type);
11284 if (stub_entry != NULL)
11285 {
11286 value = (stub_entry->stub_offset
11287 + stub_entry->stub_sec->output_offset
11288 + stub_entry->stub_sec->output_section->vma);
11289 }
11290 }
11291
11292 relocation = value + signed_addend;
11293 relocation -= (input_section->output_section->vma
11294 + input_section->output_offset
11295 + rel->r_offset);
11296 signed_check = (bfd_signed_vma) relocation;
11297
11298 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11299 overflow = TRUE;
11300
11301 /* Put RELOCATION back into the insn. */
11302 {
11303 bfd_vma S = (relocation & 0x00100000) >> 20;
11304 bfd_vma J2 = (relocation & 0x00080000) >> 19;
11305 bfd_vma J1 = (relocation & 0x00040000) >> 18;
11306 bfd_vma hi = (relocation & 0x0003f000) >> 12;
11307 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
11308
11309 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
11310 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
11311 }
11312
11313 /* Put the relocated value back in the object file: */
11314 bfd_put_16 (input_bfd, upper_insn, hit_data);
11315 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11316
11317 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11318 }
11319
11320 case R_ARM_THM_JUMP11:
11321 case R_ARM_THM_JUMP8:
11322 case R_ARM_THM_JUMP6:
11323 /* Thumb B (branch) instruction). */
11324 {
11325 bfd_signed_vma relocation;
11326 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
11327 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
11328 bfd_signed_vma signed_check;
11329
11330 /* CZB cannot jump backward. */
11331 if (r_type == R_ARM_THM_JUMP6)
11332 reloc_signed_min = 0;
11333
11334 if (globals->use_rel)
11335 {
11336 /* Need to refetch addend. */
11337 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
11338 if (addend & ((howto->src_mask + 1) >> 1))
11339 {
11340 signed_addend = -1;
11341 signed_addend &= ~ howto->src_mask;
11342 signed_addend |= addend;
11343 }
11344 else
11345 signed_addend = addend;
11346 /* The value in the insn has been right shifted. We need to
11347 undo this, so that we can perform the address calculation
11348 in terms of bytes. */
11349 signed_addend <<= howto->rightshift;
11350 }
11351 relocation = value + signed_addend;
11352
11353 relocation -= (input_section->output_section->vma
11354 + input_section->output_offset
11355 + rel->r_offset);
11356
11357 relocation >>= howto->rightshift;
11358 signed_check = relocation;
11359
11360 if (r_type == R_ARM_THM_JUMP6)
11361 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
11362 else
11363 relocation &= howto->dst_mask;
11364 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
11365
11366 bfd_put_16 (input_bfd, relocation, hit_data);
11367
11368 /* Assumes two's complement. */
11369 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11370 return bfd_reloc_overflow;
11371
11372 return bfd_reloc_ok;
11373 }
11374
11375 case R_ARM_ALU_PCREL7_0:
11376 case R_ARM_ALU_PCREL15_8:
11377 case R_ARM_ALU_PCREL23_15:
11378 {
11379 bfd_vma insn;
11380 bfd_vma relocation;
11381
11382 insn = bfd_get_32 (input_bfd, hit_data);
11383 if (globals->use_rel)
11384 {
11385 /* Extract the addend. */
11386 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
11387 signed_addend = addend;
11388 }
11389 relocation = value + signed_addend;
11390
11391 relocation -= (input_section->output_section->vma
11392 + input_section->output_offset
11393 + rel->r_offset);
11394 insn = (insn & ~0xfff)
11395 | ((howto->bitpos << 7) & 0xf00)
11396 | ((relocation >> howto->bitpos) & 0xff);
11397 bfd_put_32 (input_bfd, value, hit_data);
11398 }
11399 return bfd_reloc_ok;
11400
11401 case R_ARM_GNU_VTINHERIT:
11402 case R_ARM_GNU_VTENTRY:
11403 return bfd_reloc_ok;
11404
11405 case R_ARM_GOTOFF32:
11406 /* Relocation is relative to the start of the
11407 global offset table. */
11408
11409 BFD_ASSERT (sgot != NULL);
11410 if (sgot == NULL)
11411 return bfd_reloc_notsupported;
11412
11413 /* If we are addressing a Thumb function, we need to adjust the
11414 address by one, so that attempts to call the function pointer will
11415 correctly interpret it as Thumb code. */
11416 if (branch_type == ST_BRANCH_TO_THUMB)
11417 value += 1;
11418
11419 /* Note that sgot->output_offset is not involved in this
11420 calculation. We always want the start of .got. If we
11421 define _GLOBAL_OFFSET_TABLE in a different way, as is
11422 permitted by the ABI, we might have to change this
11423 calculation. */
11424 value -= sgot->output_section->vma;
11425 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11426 contents, rel->r_offset, value,
11427 rel->r_addend);
11428
11429 case R_ARM_GOTPC:
11430 /* Use global offset table as symbol value. */
11431 BFD_ASSERT (sgot != NULL);
11432
11433 if (sgot == NULL)
11434 return bfd_reloc_notsupported;
11435
11436 *unresolved_reloc_p = FALSE;
11437 value = sgot->output_section->vma;
11438 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11439 contents, rel->r_offset, value,
11440 rel->r_addend);
11441
11442 case R_ARM_GOT32:
11443 case R_ARM_GOT_PREL:
11444 /* Relocation is to the entry for this symbol in the
11445 global offset table. */
11446 if (sgot == NULL)
11447 return bfd_reloc_notsupported;
11448
11449 if (dynreloc_st_type == STT_GNU_IFUNC
11450 && plt_offset != (bfd_vma) -1
11451 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11452 {
11453 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11454 symbol, and the relocation resolves directly to the runtime
11455 target rather than to the .iplt entry. This means that any
11456 .got entry would be the same value as the .igot.plt entry,
11457 so there's no point creating both. */
11458 sgot = globals->root.igotplt;
11459 value = sgot->output_offset + gotplt_offset;
11460 }
11461 else if (h != NULL)
11462 {
11463 bfd_vma off;
11464
11465 off = h->got.offset;
11466 BFD_ASSERT (off != (bfd_vma) -1);
11467 if ((off & 1) != 0)
11468 {
11469 /* We have already processsed one GOT relocation against
11470 this symbol. */
11471 off &= ~1;
11472 if (globals->root.dynamic_sections_created
11473 && !SYMBOL_REFERENCES_LOCAL (info, h))
11474 *unresolved_reloc_p = FALSE;
11475 }
11476 else
11477 {
11478 Elf_Internal_Rela outrel;
11479 int isrofixup = 0;
11480
11481 if (((h->dynindx != -1) || globals->fdpic_p)
11482 && !SYMBOL_REFERENCES_LOCAL (info, h))
11483 {
11484 /* If the symbol doesn't resolve locally in a static
11485 object, we have an undefined reference. If the
11486 symbol doesn't resolve locally in a dynamic object,
11487 it should be resolved by the dynamic linker. */
11488 if (globals->root.dynamic_sections_created)
11489 {
11490 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11491 *unresolved_reloc_p = FALSE;
11492 }
11493 else
11494 outrel.r_info = 0;
11495 outrel.r_addend = 0;
11496 }
11497 else
11498 {
11499 if (dynreloc_st_type == STT_GNU_IFUNC)
11500 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11501 else if (bfd_link_pic (info)
11502 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11503 || h->root.type != bfd_link_hash_undefweak))
11504 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11505 else
11506 {
11507 outrel.r_info = 0;
11508 if (globals->fdpic_p)
11509 isrofixup = 1;
11510 }
11511 outrel.r_addend = dynreloc_value;
11512 }
11513
11514 /* The GOT entry is initialized to zero by default.
11515 See if we should install a different value. */
11516 if (outrel.r_addend != 0
11517 && (globals->use_rel || outrel.r_info == 0))
11518 {
11519 bfd_put_32 (output_bfd, outrel.r_addend,
11520 sgot->contents + off);
11521 outrel.r_addend = 0;
11522 }
11523
11524 if (isrofixup)
11525 arm_elf_add_rofixup (output_bfd,
11526 elf32_arm_hash_table(info)->srofixup,
11527 sgot->output_section->vma
11528 + sgot->output_offset + off);
11529
11530 else if (outrel.r_info != 0)
11531 {
11532 outrel.r_offset = (sgot->output_section->vma
11533 + sgot->output_offset
11534 + off);
11535 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11536 }
11537
11538 h->got.offset |= 1;
11539 }
11540 value = sgot->output_offset + off;
11541 }
11542 else
11543 {
11544 bfd_vma off;
11545
11546 BFD_ASSERT (local_got_offsets != NULL
11547 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11548
11549 off = local_got_offsets[r_symndx];
11550
11551 /* The offset must always be a multiple of 4. We use the
11552 least significant bit to record whether we have already
11553 generated the necessary reloc. */
11554 if ((off & 1) != 0)
11555 off &= ~1;
11556 else
11557 {
11558 Elf_Internal_Rela outrel;
11559 int isrofixup = 0;
11560
11561 if (dynreloc_st_type == STT_GNU_IFUNC)
11562 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11563 else if (bfd_link_pic (info))
11564 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11565 else
11566 {
11567 outrel.r_info = 0;
11568 if (globals->fdpic_p)
11569 isrofixup = 1;
11570 }
11571
11572 /* The GOT entry is initialized to zero by default.
11573 See if we should install a different value. */
11574 if (globals->use_rel || outrel.r_info == 0)
11575 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11576
11577 if (isrofixup)
11578 arm_elf_add_rofixup (output_bfd,
11579 globals->srofixup,
11580 sgot->output_section->vma
11581 + sgot->output_offset + off);
11582
11583 else if (outrel.r_info != 0)
11584 {
11585 outrel.r_addend = addend + dynreloc_value;
11586 outrel.r_offset = (sgot->output_section->vma
11587 + sgot->output_offset
11588 + off);
11589 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11590 }
11591
11592 local_got_offsets[r_symndx] |= 1;
11593 }
11594
11595 value = sgot->output_offset + off;
11596 }
11597 if (r_type != R_ARM_GOT32)
11598 value += sgot->output_section->vma;
11599
11600 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11601 contents, rel->r_offset, value,
11602 rel->r_addend);
11603
11604 case R_ARM_TLS_LDO32:
11605 value = value - dtpoff_base (info);
11606
11607 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11608 contents, rel->r_offset, value,
11609 rel->r_addend);
11610
11611 case R_ARM_TLS_LDM32:
11612 case R_ARM_TLS_LDM32_FDPIC:
11613 {
11614 bfd_vma off;
11615
11616 if (sgot == NULL)
11617 abort ();
11618
11619 off = globals->tls_ldm_got.offset;
11620
11621 if ((off & 1) != 0)
11622 off &= ~1;
11623 else
11624 {
11625 /* If we don't know the module number, create a relocation
11626 for it. */
11627 if (bfd_link_pic (info))
11628 {
11629 Elf_Internal_Rela outrel;
11630
11631 if (srelgot == NULL)
11632 abort ();
11633
11634 outrel.r_addend = 0;
11635 outrel.r_offset = (sgot->output_section->vma
11636 + sgot->output_offset + off);
11637 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11638
11639 if (globals->use_rel)
11640 bfd_put_32 (output_bfd, outrel.r_addend,
11641 sgot->contents + off);
11642
11643 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11644 }
11645 else
11646 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11647
11648 globals->tls_ldm_got.offset |= 1;
11649 }
11650
11651 if (r_type == R_ARM_TLS_LDM32_FDPIC)
11652 {
11653 bfd_put_32(output_bfd,
11654 globals->root.sgot->output_offset + off,
11655 contents + rel->r_offset);
11656
11657 return bfd_reloc_ok;
11658 }
11659 else
11660 {
11661 value = sgot->output_section->vma + sgot->output_offset + off
11662 - (input_section->output_section->vma
11663 + input_section->output_offset + rel->r_offset);
11664
11665 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11666 contents, rel->r_offset, value,
11667 rel->r_addend);
11668 }
11669 }
11670
11671 case R_ARM_TLS_CALL:
11672 case R_ARM_THM_TLS_CALL:
11673 case R_ARM_TLS_GD32:
11674 case R_ARM_TLS_GD32_FDPIC:
11675 case R_ARM_TLS_IE32:
11676 case R_ARM_TLS_IE32_FDPIC:
11677 case R_ARM_TLS_GOTDESC:
11678 case R_ARM_TLS_DESCSEQ:
11679 case R_ARM_THM_TLS_DESCSEQ:
11680 {
11681 bfd_vma off, offplt;
11682 int indx = 0;
11683 char tls_type;
11684
11685 BFD_ASSERT (sgot != NULL);
11686
11687 if (h != NULL)
11688 {
11689 bfd_boolean dyn;
11690 dyn = globals->root.dynamic_sections_created;
11691 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11692 bfd_link_pic (info),
11693 h)
11694 && (!bfd_link_pic (info)
11695 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11696 {
11697 *unresolved_reloc_p = FALSE;
11698 indx = h->dynindx;
11699 }
11700 off = h->got.offset;
11701 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11702 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11703 }
11704 else
11705 {
11706 BFD_ASSERT (local_got_offsets != NULL);
11707 off = local_got_offsets[r_symndx];
11708 offplt = local_tlsdesc_gotents[r_symndx];
11709 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11710 }
11711
11712 /* Linker relaxations happens from one of the
11713 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11714 if (ELF32_R_TYPE(rel->r_info) != r_type)
11715 tls_type = GOT_TLS_IE;
11716
11717 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11718
11719 if ((off & 1) != 0)
11720 off &= ~1;
11721 else
11722 {
11723 bfd_boolean need_relocs = FALSE;
11724 Elf_Internal_Rela outrel;
11725 int cur_off = off;
11726
11727 /* The GOT entries have not been initialized yet. Do it
11728 now, and emit any relocations. If both an IE GOT and a
11729 GD GOT are necessary, we emit the GD first. */
11730
11731 if ((bfd_link_pic (info) || indx != 0)
11732 && (h == NULL
11733 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11734 && !resolved_to_zero)
11735 || h->root.type != bfd_link_hash_undefweak))
11736 {
11737 need_relocs = TRUE;
11738 BFD_ASSERT (srelgot != NULL);
11739 }
11740
11741 if (tls_type & GOT_TLS_GDESC)
11742 {
11743 bfd_byte *loc;
11744
11745 /* We should have relaxed, unless this is an undefined
11746 weak symbol. */
11747 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11748 || bfd_link_pic (info));
11749 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11750 <= globals->root.sgotplt->size);
11751
11752 outrel.r_addend = 0;
11753 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11754 + globals->root.sgotplt->output_offset
11755 + offplt
11756 + globals->sgotplt_jump_table_size);
11757
11758 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11759 sreloc = globals->root.srelplt;
11760 loc = sreloc->contents;
11761 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11762 BFD_ASSERT (loc + RELOC_SIZE (globals)
11763 <= sreloc->contents + sreloc->size);
11764
11765 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11766
11767 /* For globals, the first word in the relocation gets
11768 the relocation index and the top bit set, or zero,
11769 if we're binding now. For locals, it gets the
11770 symbol's offset in the tls section. */
11771 bfd_put_32 (output_bfd,
11772 !h ? value - elf_hash_table (info)->tls_sec->vma
11773 : info->flags & DF_BIND_NOW ? 0
11774 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11775 globals->root.sgotplt->contents + offplt
11776 + globals->sgotplt_jump_table_size);
11777
11778 /* Second word in the relocation is always zero. */
11779 bfd_put_32 (output_bfd, 0,
11780 globals->root.sgotplt->contents + offplt
11781 + globals->sgotplt_jump_table_size + 4);
11782 }
11783 if (tls_type & GOT_TLS_GD)
11784 {
11785 if (need_relocs)
11786 {
11787 outrel.r_addend = 0;
11788 outrel.r_offset = (sgot->output_section->vma
11789 + sgot->output_offset
11790 + cur_off);
11791 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11792
11793 if (globals->use_rel)
11794 bfd_put_32 (output_bfd, outrel.r_addend,
11795 sgot->contents + cur_off);
11796
11797 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11798
11799 if (indx == 0)
11800 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11801 sgot->contents + cur_off + 4);
11802 else
11803 {
11804 outrel.r_addend = 0;
11805 outrel.r_info = ELF32_R_INFO (indx,
11806 R_ARM_TLS_DTPOFF32);
11807 outrel.r_offset += 4;
11808
11809 if (globals->use_rel)
11810 bfd_put_32 (output_bfd, outrel.r_addend,
11811 sgot->contents + cur_off + 4);
11812
11813 elf32_arm_add_dynreloc (output_bfd, info,
11814 srelgot, &outrel);
11815 }
11816 }
11817 else
11818 {
11819 /* If we are not emitting relocations for a
11820 general dynamic reference, then we must be in a
11821 static link or an executable link with the
11822 symbol binding locally. Mark it as belonging
11823 to module 1, the executable. */
11824 bfd_put_32 (output_bfd, 1,
11825 sgot->contents + cur_off);
11826 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11827 sgot->contents + cur_off + 4);
11828 }
11829
11830 cur_off += 8;
11831 }
11832
11833 if (tls_type & GOT_TLS_IE)
11834 {
11835 if (need_relocs)
11836 {
11837 if (indx == 0)
11838 outrel.r_addend = value - dtpoff_base (info);
11839 else
11840 outrel.r_addend = 0;
11841 outrel.r_offset = (sgot->output_section->vma
11842 + sgot->output_offset
11843 + cur_off);
11844 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11845
11846 if (globals->use_rel)
11847 bfd_put_32 (output_bfd, outrel.r_addend,
11848 sgot->contents + cur_off);
11849
11850 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11851 }
11852 else
11853 bfd_put_32 (output_bfd, tpoff (info, value),
11854 sgot->contents + cur_off);
11855 cur_off += 4;
11856 }
11857
11858 if (h != NULL)
11859 h->got.offset |= 1;
11860 else
11861 local_got_offsets[r_symndx] |= 1;
11862 }
11863
11864 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32 && r_type != R_ARM_TLS_GD32_FDPIC)
11865 off += 8;
11866 else if (tls_type & GOT_TLS_GDESC)
11867 off = offplt;
11868
11869 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11870 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11871 {
11872 bfd_signed_vma offset;
11873 /* TLS stubs are arm mode. The original symbol is a
11874 data object, so branch_type is bogus. */
11875 branch_type = ST_BRANCH_TO_ARM;
11876 enum elf32_arm_stub_type stub_type
11877 = arm_type_of_stub (info, input_section, rel,
11878 st_type, &branch_type,
11879 (struct elf32_arm_link_hash_entry *)h,
11880 globals->tls_trampoline, globals->root.splt,
11881 input_bfd, sym_name);
11882
11883 if (stub_type != arm_stub_none)
11884 {
11885 struct elf32_arm_stub_hash_entry *stub_entry
11886 = elf32_arm_get_stub_entry
11887 (input_section, globals->root.splt, 0, rel,
11888 globals, stub_type);
11889 offset = (stub_entry->stub_offset
11890 + stub_entry->stub_sec->output_offset
11891 + stub_entry->stub_sec->output_section->vma);
11892 }
11893 else
11894 offset = (globals->root.splt->output_section->vma
11895 + globals->root.splt->output_offset
11896 + globals->tls_trampoline);
11897
11898 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11899 {
11900 unsigned long inst;
11901
11902 offset -= (input_section->output_section->vma
11903 + input_section->output_offset
11904 + rel->r_offset + 8);
11905
11906 inst = offset >> 2;
11907 inst &= 0x00ffffff;
11908 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11909 }
11910 else
11911 {
11912 /* Thumb blx encodes the offset in a complicated
11913 fashion. */
11914 unsigned upper_insn, lower_insn;
11915 unsigned neg;
11916
11917 offset -= (input_section->output_section->vma
11918 + input_section->output_offset
11919 + rel->r_offset + 4);
11920
11921 if (stub_type != arm_stub_none
11922 && arm_stub_is_thumb (stub_type))
11923 {
11924 lower_insn = 0xd000;
11925 }
11926 else
11927 {
11928 lower_insn = 0xc000;
11929 /* Round up the offset to a word boundary. */
11930 offset = (offset + 2) & ~2;
11931 }
11932
11933 neg = offset < 0;
11934 upper_insn = (0xf000
11935 | ((offset >> 12) & 0x3ff)
11936 | (neg << 10));
11937 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11938 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11939 | ((offset >> 1) & 0x7ff);
11940 bfd_put_16 (input_bfd, upper_insn, hit_data);
11941 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11942 return bfd_reloc_ok;
11943 }
11944 }
11945 /* These relocations needs special care, as besides the fact
11946 they point somewhere in .gotplt, the addend must be
11947 adjusted accordingly depending on the type of instruction
11948 we refer to. */
11949 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11950 {
11951 unsigned long data, insn;
11952 unsigned thumb;
11953
11954 data = bfd_get_32 (input_bfd, hit_data);
11955 thumb = data & 1;
11956 data &= ~1u;
11957
11958 if (thumb)
11959 {
11960 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11961 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11962 insn = (insn << 16)
11963 | bfd_get_16 (input_bfd,
11964 contents + rel->r_offset - data + 2);
11965 if ((insn & 0xf800c000) == 0xf000c000)
11966 /* bl/blx */
11967 value = -6;
11968 else if ((insn & 0xffffff00) == 0x4400)
11969 /* add */
11970 value = -5;
11971 else
11972 {
11973 _bfd_error_handler
11974 /* xgettext:c-format */
11975 (_("%pB(%pA+%#" PRIx64 "): "
11976 "unexpected %s instruction '%#lx' "
11977 "referenced by TLS_GOTDESC"),
11978 input_bfd, input_section, (uint64_t) rel->r_offset,
11979 "Thumb", insn);
11980 return bfd_reloc_notsupported;
11981 }
11982 }
11983 else
11984 {
11985 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11986
11987 switch (insn >> 24)
11988 {
11989 case 0xeb: /* bl */
11990 case 0xfa: /* blx */
11991 value = -4;
11992 break;
11993
11994 case 0xe0: /* add */
11995 value = -8;
11996 break;
11997
11998 default:
11999 _bfd_error_handler
12000 /* xgettext:c-format */
12001 (_("%pB(%pA+%#" PRIx64 "): "
12002 "unexpected %s instruction '%#lx' "
12003 "referenced by TLS_GOTDESC"),
12004 input_bfd, input_section, (uint64_t) rel->r_offset,
12005 "ARM", insn);
12006 return bfd_reloc_notsupported;
12007 }
12008 }
12009
12010 value += ((globals->root.sgotplt->output_section->vma
12011 + globals->root.sgotplt->output_offset + off)
12012 - (input_section->output_section->vma
12013 + input_section->output_offset
12014 + rel->r_offset)
12015 + globals->sgotplt_jump_table_size);
12016 }
12017 else
12018 value = ((globals->root.sgot->output_section->vma
12019 + globals->root.sgot->output_offset + off)
12020 - (input_section->output_section->vma
12021 + input_section->output_offset + rel->r_offset));
12022
12023 if (globals->fdpic_p && (r_type == R_ARM_TLS_GD32_FDPIC ||
12024 r_type == R_ARM_TLS_IE32_FDPIC))
12025 {
12026 /* For FDPIC relocations, resolve to the offset of the GOT
12027 entry from the start of GOT. */
12028 bfd_put_32(output_bfd,
12029 globals->root.sgot->output_offset + off,
12030 contents + rel->r_offset);
12031
12032 return bfd_reloc_ok;
12033 }
12034 else
12035 {
12036 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12037 contents, rel->r_offset, value,
12038 rel->r_addend);
12039 }
12040 }
12041
12042 case R_ARM_TLS_LE32:
12043 if (bfd_link_dll (info))
12044 {
12045 _bfd_error_handler
12046 /* xgettext:c-format */
12047 (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted "
12048 "in shared object"),
12049 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name);
12050 return bfd_reloc_notsupported;
12051 }
12052 else
12053 value = tpoff (info, value);
12054
12055 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12056 contents, rel->r_offset, value,
12057 rel->r_addend);
12058
12059 case R_ARM_V4BX:
12060 if (globals->fix_v4bx)
12061 {
12062 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12063
12064 /* Ensure that we have a BX instruction. */
12065 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
12066
12067 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
12068 {
12069 /* Branch to veneer. */
12070 bfd_vma glue_addr;
12071 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
12072 glue_addr -= input_section->output_section->vma
12073 + input_section->output_offset
12074 + rel->r_offset + 8;
12075 insn = (insn & 0xf0000000) | 0x0a000000
12076 | ((glue_addr >> 2) & 0x00ffffff);
12077 }
12078 else
12079 {
12080 /* Preserve Rm (lowest four bits) and the condition code
12081 (highest four bits). Other bits encode MOV PC,Rm. */
12082 insn = (insn & 0xf000000f) | 0x01a0f000;
12083 }
12084
12085 bfd_put_32 (input_bfd, insn, hit_data);
12086 }
12087 return bfd_reloc_ok;
12088
12089 case R_ARM_MOVW_ABS_NC:
12090 case R_ARM_MOVT_ABS:
12091 case R_ARM_MOVW_PREL_NC:
12092 case R_ARM_MOVT_PREL:
12093 /* Until we properly support segment-base-relative addressing then
12094 we assume the segment base to be zero, as for the group relocations.
12095 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
12096 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
12097 case R_ARM_MOVW_BREL_NC:
12098 case R_ARM_MOVW_BREL:
12099 case R_ARM_MOVT_BREL:
12100 {
12101 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12102
12103 if (globals->use_rel)
12104 {
12105 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
12106 signed_addend = (addend ^ 0x8000) - 0x8000;
12107 }
12108
12109 value += signed_addend;
12110
12111 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
12112 value -= (input_section->output_section->vma
12113 + input_section->output_offset + rel->r_offset);
12114
12115 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
12116 return bfd_reloc_overflow;
12117
12118 if (branch_type == ST_BRANCH_TO_THUMB)
12119 value |= 1;
12120
12121 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
12122 || r_type == R_ARM_MOVT_BREL)
12123 value >>= 16;
12124
12125 insn &= 0xfff0f000;
12126 insn |= value & 0xfff;
12127 insn |= (value & 0xf000) << 4;
12128 bfd_put_32 (input_bfd, insn, hit_data);
12129 }
12130 return bfd_reloc_ok;
12131
12132 case R_ARM_THM_MOVW_ABS_NC:
12133 case R_ARM_THM_MOVT_ABS:
12134 case R_ARM_THM_MOVW_PREL_NC:
12135 case R_ARM_THM_MOVT_PREL:
12136 /* Until we properly support segment-base-relative addressing then
12137 we assume the segment base to be zero, as for the above relocations.
12138 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
12139 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
12140 as R_ARM_THM_MOVT_ABS. */
12141 case R_ARM_THM_MOVW_BREL_NC:
12142 case R_ARM_THM_MOVW_BREL:
12143 case R_ARM_THM_MOVT_BREL:
12144 {
12145 bfd_vma insn;
12146
12147 insn = bfd_get_16 (input_bfd, hit_data) << 16;
12148 insn |= bfd_get_16 (input_bfd, hit_data + 2);
12149
12150 if (globals->use_rel)
12151 {
12152 addend = ((insn >> 4) & 0xf000)
12153 | ((insn >> 15) & 0x0800)
12154 | ((insn >> 4) & 0x0700)
12155 | (insn & 0x00ff);
12156 signed_addend = (addend ^ 0x8000) - 0x8000;
12157 }
12158
12159 value += signed_addend;
12160
12161 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
12162 value -= (input_section->output_section->vma
12163 + input_section->output_offset + rel->r_offset);
12164
12165 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
12166 return bfd_reloc_overflow;
12167
12168 if (branch_type == ST_BRANCH_TO_THUMB)
12169 value |= 1;
12170
12171 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
12172 || r_type == R_ARM_THM_MOVT_BREL)
12173 value >>= 16;
12174
12175 insn &= 0xfbf08f00;
12176 insn |= (value & 0xf000) << 4;
12177 insn |= (value & 0x0800) << 15;
12178 insn |= (value & 0x0700) << 4;
12179 insn |= (value & 0x00ff);
12180
12181 bfd_put_16 (input_bfd, insn >> 16, hit_data);
12182 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
12183 }
12184 return bfd_reloc_ok;
12185
12186 case R_ARM_ALU_PC_G0_NC:
12187 case R_ARM_ALU_PC_G1_NC:
12188 case R_ARM_ALU_PC_G0:
12189 case R_ARM_ALU_PC_G1:
12190 case R_ARM_ALU_PC_G2:
12191 case R_ARM_ALU_SB_G0_NC:
12192 case R_ARM_ALU_SB_G1_NC:
12193 case R_ARM_ALU_SB_G0:
12194 case R_ARM_ALU_SB_G1:
12195 case R_ARM_ALU_SB_G2:
12196 {
12197 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12198 bfd_vma pc = input_section->output_section->vma
12199 + input_section->output_offset + rel->r_offset;
12200 /* sb is the origin of the *segment* containing the symbol. */
12201 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12202 bfd_vma residual;
12203 bfd_vma g_n;
12204 bfd_signed_vma signed_value;
12205 int group = 0;
12206
12207 /* Determine which group of bits to select. */
12208 switch (r_type)
12209 {
12210 case R_ARM_ALU_PC_G0_NC:
12211 case R_ARM_ALU_PC_G0:
12212 case R_ARM_ALU_SB_G0_NC:
12213 case R_ARM_ALU_SB_G0:
12214 group = 0;
12215 break;
12216
12217 case R_ARM_ALU_PC_G1_NC:
12218 case R_ARM_ALU_PC_G1:
12219 case R_ARM_ALU_SB_G1_NC:
12220 case R_ARM_ALU_SB_G1:
12221 group = 1;
12222 break;
12223
12224 case R_ARM_ALU_PC_G2:
12225 case R_ARM_ALU_SB_G2:
12226 group = 2;
12227 break;
12228
12229 default:
12230 abort ();
12231 }
12232
12233 /* If REL, extract the addend from the insn. If RELA, it will
12234 have already been fetched for us. */
12235 if (globals->use_rel)
12236 {
12237 int negative;
12238 bfd_vma constant = insn & 0xff;
12239 bfd_vma rotation = (insn & 0xf00) >> 8;
12240
12241 if (rotation == 0)
12242 signed_addend = constant;
12243 else
12244 {
12245 /* Compensate for the fact that in the instruction, the
12246 rotation is stored in multiples of 2 bits. */
12247 rotation *= 2;
12248
12249 /* Rotate "constant" right by "rotation" bits. */
12250 signed_addend = (constant >> rotation) |
12251 (constant << (8 * sizeof (bfd_vma) - rotation));
12252 }
12253
12254 /* Determine if the instruction is an ADD or a SUB.
12255 (For REL, this determines the sign of the addend.) */
12256 negative = identify_add_or_sub (insn);
12257 if (negative == 0)
12258 {
12259 _bfd_error_handler
12260 /* xgettext:c-format */
12261 (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions "
12262 "are allowed for ALU group relocations"),
12263 input_bfd, input_section, (uint64_t) rel->r_offset);
12264 return bfd_reloc_overflow;
12265 }
12266
12267 signed_addend *= negative;
12268 }
12269
12270 /* Compute the value (X) to go in the place. */
12271 if (r_type == R_ARM_ALU_PC_G0_NC
12272 || r_type == R_ARM_ALU_PC_G1_NC
12273 || r_type == R_ARM_ALU_PC_G0
12274 || r_type == R_ARM_ALU_PC_G1
12275 || r_type == R_ARM_ALU_PC_G2)
12276 /* PC relative. */
12277 signed_value = value - pc + signed_addend;
12278 else
12279 /* Section base relative. */
12280 signed_value = value - sb + signed_addend;
12281
12282 /* If the target symbol is a Thumb function, then set the
12283 Thumb bit in the address. */
12284 if (branch_type == ST_BRANCH_TO_THUMB)
12285 signed_value |= 1;
12286
12287 /* Calculate the value of the relevant G_n, in encoded
12288 constant-with-rotation format. */
12289 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12290 group, &residual);
12291
12292 /* Check for overflow if required. */
12293 if ((r_type == R_ARM_ALU_PC_G0
12294 || r_type == R_ARM_ALU_PC_G1
12295 || r_type == R_ARM_ALU_PC_G2
12296 || r_type == R_ARM_ALU_SB_G0
12297 || r_type == R_ARM_ALU_SB_G1
12298 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
12299 {
12300 _bfd_error_handler
12301 /* xgettext:c-format */
12302 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12303 "splitting %#" PRIx64 " for group relocation %s"),
12304 input_bfd, input_section, (uint64_t) rel->r_offset,
12305 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12306 howto->name);
12307 return bfd_reloc_overflow;
12308 }
12309
12310 /* Mask out the value and the ADD/SUB part of the opcode; take care
12311 not to destroy the S bit. */
12312 insn &= 0xff1ff000;
12313
12314 /* Set the opcode according to whether the value to go in the
12315 place is negative. */
12316 if (signed_value < 0)
12317 insn |= 1 << 22;
12318 else
12319 insn |= 1 << 23;
12320
12321 /* Encode the offset. */
12322 insn |= g_n;
12323
12324 bfd_put_32 (input_bfd, insn, hit_data);
12325 }
12326 return bfd_reloc_ok;
12327
12328 case R_ARM_LDR_PC_G0:
12329 case R_ARM_LDR_PC_G1:
12330 case R_ARM_LDR_PC_G2:
12331 case R_ARM_LDR_SB_G0:
12332 case R_ARM_LDR_SB_G1:
12333 case R_ARM_LDR_SB_G2:
12334 {
12335 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12336 bfd_vma pc = input_section->output_section->vma
12337 + input_section->output_offset + rel->r_offset;
12338 /* sb is the origin of the *segment* containing the symbol. */
12339 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12340 bfd_vma residual;
12341 bfd_signed_vma signed_value;
12342 int group = 0;
12343
12344 /* Determine which groups of bits to calculate. */
12345 switch (r_type)
12346 {
12347 case R_ARM_LDR_PC_G0:
12348 case R_ARM_LDR_SB_G0:
12349 group = 0;
12350 break;
12351
12352 case R_ARM_LDR_PC_G1:
12353 case R_ARM_LDR_SB_G1:
12354 group = 1;
12355 break;
12356
12357 case R_ARM_LDR_PC_G2:
12358 case R_ARM_LDR_SB_G2:
12359 group = 2;
12360 break;
12361
12362 default:
12363 abort ();
12364 }
12365
12366 /* If REL, extract the addend from the insn. If RELA, it will
12367 have already been fetched for us. */
12368 if (globals->use_rel)
12369 {
12370 int negative = (insn & (1 << 23)) ? 1 : -1;
12371 signed_addend = negative * (insn & 0xfff);
12372 }
12373
12374 /* Compute the value (X) to go in the place. */
12375 if (r_type == R_ARM_LDR_PC_G0
12376 || r_type == R_ARM_LDR_PC_G1
12377 || r_type == R_ARM_LDR_PC_G2)
12378 /* PC relative. */
12379 signed_value = value - pc + signed_addend;
12380 else
12381 /* Section base relative. */
12382 signed_value = value - sb + signed_addend;
12383
12384 /* Calculate the value of the relevant G_{n-1} to obtain
12385 the residual at that stage. */
12386 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12387 group - 1, &residual);
12388
12389 /* Check for overflow. */
12390 if (residual >= 0x1000)
12391 {
12392 _bfd_error_handler
12393 /* xgettext:c-format */
12394 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12395 "splitting %#" PRIx64 " for group relocation %s"),
12396 input_bfd, input_section, (uint64_t) rel->r_offset,
12397 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12398 howto->name);
12399 return bfd_reloc_overflow;
12400 }
12401
12402 /* Mask out the value and U bit. */
12403 insn &= 0xff7ff000;
12404
12405 /* Set the U bit if the value to go in the place is non-negative. */
12406 if (signed_value >= 0)
12407 insn |= 1 << 23;
12408
12409 /* Encode the offset. */
12410 insn |= residual;
12411
12412 bfd_put_32 (input_bfd, insn, hit_data);
12413 }
12414 return bfd_reloc_ok;
12415
12416 case R_ARM_LDRS_PC_G0:
12417 case R_ARM_LDRS_PC_G1:
12418 case R_ARM_LDRS_PC_G2:
12419 case R_ARM_LDRS_SB_G0:
12420 case R_ARM_LDRS_SB_G1:
12421 case R_ARM_LDRS_SB_G2:
12422 {
12423 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12424 bfd_vma pc = input_section->output_section->vma
12425 + input_section->output_offset + rel->r_offset;
12426 /* sb is the origin of the *segment* containing the symbol. */
12427 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12428 bfd_vma residual;
12429 bfd_signed_vma signed_value;
12430 int group = 0;
12431
12432 /* Determine which groups of bits to calculate. */
12433 switch (r_type)
12434 {
12435 case R_ARM_LDRS_PC_G0:
12436 case R_ARM_LDRS_SB_G0:
12437 group = 0;
12438 break;
12439
12440 case R_ARM_LDRS_PC_G1:
12441 case R_ARM_LDRS_SB_G1:
12442 group = 1;
12443 break;
12444
12445 case R_ARM_LDRS_PC_G2:
12446 case R_ARM_LDRS_SB_G2:
12447 group = 2;
12448 break;
12449
12450 default:
12451 abort ();
12452 }
12453
12454 /* If REL, extract the addend from the insn. If RELA, it will
12455 have already been fetched for us. */
12456 if (globals->use_rel)
12457 {
12458 int negative = (insn & (1 << 23)) ? 1 : -1;
12459 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
12460 }
12461
12462 /* Compute the value (X) to go in the place. */
12463 if (r_type == R_ARM_LDRS_PC_G0
12464 || r_type == R_ARM_LDRS_PC_G1
12465 || r_type == R_ARM_LDRS_PC_G2)
12466 /* PC relative. */
12467 signed_value = value - pc + signed_addend;
12468 else
12469 /* Section base relative. */
12470 signed_value = value - sb + signed_addend;
12471
12472 /* Calculate the value of the relevant G_{n-1} to obtain
12473 the residual at that stage. */
12474 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12475 group - 1, &residual);
12476
12477 /* Check for overflow. */
12478 if (residual >= 0x100)
12479 {
12480 _bfd_error_handler
12481 /* xgettext:c-format */
12482 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12483 "splitting %#" PRIx64 " for group relocation %s"),
12484 input_bfd, input_section, (uint64_t) rel->r_offset,
12485 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12486 howto->name);
12487 return bfd_reloc_overflow;
12488 }
12489
12490 /* Mask out the value and U bit. */
12491 insn &= 0xff7ff0f0;
12492
12493 /* Set the U bit if the value to go in the place is non-negative. */
12494 if (signed_value >= 0)
12495 insn |= 1 << 23;
12496
12497 /* Encode the offset. */
12498 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12499
12500 bfd_put_32 (input_bfd, insn, hit_data);
12501 }
12502 return bfd_reloc_ok;
12503
12504 case R_ARM_LDC_PC_G0:
12505 case R_ARM_LDC_PC_G1:
12506 case R_ARM_LDC_PC_G2:
12507 case R_ARM_LDC_SB_G0:
12508 case R_ARM_LDC_SB_G1:
12509 case R_ARM_LDC_SB_G2:
12510 {
12511 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12512 bfd_vma pc = input_section->output_section->vma
12513 + input_section->output_offset + rel->r_offset;
12514 /* sb is the origin of the *segment* containing the symbol. */
12515 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12516 bfd_vma residual;
12517 bfd_signed_vma signed_value;
12518 int group = 0;
12519
12520 /* Determine which groups of bits to calculate. */
12521 switch (r_type)
12522 {
12523 case R_ARM_LDC_PC_G0:
12524 case R_ARM_LDC_SB_G0:
12525 group = 0;
12526 break;
12527
12528 case R_ARM_LDC_PC_G1:
12529 case R_ARM_LDC_SB_G1:
12530 group = 1;
12531 break;
12532
12533 case R_ARM_LDC_PC_G2:
12534 case R_ARM_LDC_SB_G2:
12535 group = 2;
12536 break;
12537
12538 default:
12539 abort ();
12540 }
12541
12542 /* If REL, extract the addend from the insn. If RELA, it will
12543 have already been fetched for us. */
12544 if (globals->use_rel)
12545 {
12546 int negative = (insn & (1 << 23)) ? 1 : -1;
12547 signed_addend = negative * ((insn & 0xff) << 2);
12548 }
12549
12550 /* Compute the value (X) to go in the place. */
12551 if (r_type == R_ARM_LDC_PC_G0
12552 || r_type == R_ARM_LDC_PC_G1
12553 || r_type == R_ARM_LDC_PC_G2)
12554 /* PC relative. */
12555 signed_value = value - pc + signed_addend;
12556 else
12557 /* Section base relative. */
12558 signed_value = value - sb + signed_addend;
12559
12560 /* Calculate the value of the relevant G_{n-1} to obtain
12561 the residual at that stage. */
12562 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12563 group - 1, &residual);
12564
12565 /* Check for overflow. (The absolute value to go in the place must be
12566 divisible by four and, after having been divided by four, must
12567 fit in eight bits.) */
12568 if ((residual & 0x3) != 0 || residual >= 0x400)
12569 {
12570 _bfd_error_handler
12571 /* xgettext:c-format */
12572 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12573 "splitting %#" PRIx64 " for group relocation %s"),
12574 input_bfd, input_section, (uint64_t) rel->r_offset,
12575 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12576 howto->name);
12577 return bfd_reloc_overflow;
12578 }
12579
12580 /* Mask out the value and U bit. */
12581 insn &= 0xff7fff00;
12582
12583 /* Set the U bit if the value to go in the place is non-negative. */
12584 if (signed_value >= 0)
12585 insn |= 1 << 23;
12586
12587 /* Encode the offset. */
12588 insn |= residual >> 2;
12589
12590 bfd_put_32 (input_bfd, insn, hit_data);
12591 }
12592 return bfd_reloc_ok;
12593
12594 case R_ARM_THM_ALU_ABS_G0_NC:
12595 case R_ARM_THM_ALU_ABS_G1_NC:
12596 case R_ARM_THM_ALU_ABS_G2_NC:
12597 case R_ARM_THM_ALU_ABS_G3_NC:
12598 {
12599 const int shift_array[4] = {0, 8, 16, 24};
12600 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12601 bfd_vma addr = value;
12602 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12603
12604 /* Compute address. */
12605 if (globals->use_rel)
12606 signed_addend = insn & 0xff;
12607 addr += signed_addend;
12608 if (branch_type == ST_BRANCH_TO_THUMB)
12609 addr |= 1;
12610 /* Clean imm8 insn. */
12611 insn &= 0xff00;
12612 /* And update with correct part of address. */
12613 insn |= (addr >> shift) & 0xff;
12614 /* Update insn. */
12615 bfd_put_16 (input_bfd, insn, hit_data);
12616 }
12617
12618 *unresolved_reloc_p = FALSE;
12619 return bfd_reloc_ok;
12620
12621 case R_ARM_GOTOFFFUNCDESC:
12622 {
12623 if (h == NULL)
12624 {
12625 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12626 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12627 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12628 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12629 bfd_vma seg = -1;
12630
12631 if (bfd_link_pic(info) && dynindx == 0)
12632 abort();
12633
12634 /* Resolve relocation. */
12635 bfd_put_32(output_bfd, (offset + sgot->output_offset)
12636 , contents + rel->r_offset);
12637 /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12638 not done yet. */
12639 arm_elf_fill_funcdesc(output_bfd, info,
12640 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12641 dynindx, offset, addr, dynreloc_value, seg);
12642 }
12643 else
12644 {
12645 int dynindx;
12646 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12647 bfd_vma addr;
12648 bfd_vma seg = -1;
12649
12650 /* For static binaries, sym_sec can be null. */
12651 if (sym_sec)
12652 {
12653 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12654 addr = dynreloc_value - sym_sec->output_section->vma;
12655 }
12656 else
12657 {
12658 dynindx = 0;
12659 addr = 0;
12660 }
12661
12662 if (bfd_link_pic(info) && dynindx == 0)
12663 abort();
12664
12665 /* This case cannot occur since funcdesc is allocated by
12666 the dynamic loader so we cannot resolve the relocation. */
12667 if (h->dynindx != -1)
12668 abort();
12669
12670 /* Resolve relocation. */
12671 bfd_put_32(output_bfd, (offset + sgot->output_offset),
12672 contents + rel->r_offset);
12673 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12674 arm_elf_fill_funcdesc(output_bfd, info,
12675 &eh->fdpic_cnts.funcdesc_offset,
12676 dynindx, offset, addr, dynreloc_value, seg);
12677 }
12678 }
12679 *unresolved_reloc_p = FALSE;
12680 return bfd_reloc_ok;
12681
12682 case R_ARM_GOTFUNCDESC:
12683 {
12684 if (h != NULL)
12685 {
12686 Elf_Internal_Rela outrel;
12687
12688 /* Resolve relocation. */
12689 bfd_put_32(output_bfd, ((eh->fdpic_cnts.gotfuncdesc_offset & ~1)
12690 + sgot->output_offset),
12691 contents + rel->r_offset);
12692 /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */
12693 if(h->dynindx == -1)
12694 {
12695 int dynindx;
12696 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12697 bfd_vma addr;
12698 bfd_vma seg = -1;
12699
12700 /* For static binaries sym_sec can be null. */
12701 if (sym_sec)
12702 {
12703 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12704 addr = dynreloc_value - sym_sec->output_section->vma;
12705 }
12706 else
12707 {
12708 dynindx = 0;
12709 addr = 0;
12710 }
12711
12712 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12713 arm_elf_fill_funcdesc(output_bfd, info,
12714 &eh->fdpic_cnts.funcdesc_offset,
12715 dynindx, offset, addr, dynreloc_value, seg);
12716 }
12717
12718 /* Add a dynamic relocation on GOT entry if not already done. */
12719 if ((eh->fdpic_cnts.gotfuncdesc_offset & 1) == 0)
12720 {
12721 if (h->dynindx == -1)
12722 {
12723 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12724 if (h->root.type == bfd_link_hash_undefweak)
12725 bfd_put_32(output_bfd, 0, sgot->contents
12726 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12727 else
12728 bfd_put_32(output_bfd, sgot->output_section->vma
12729 + sgot->output_offset
12730 + (eh->fdpic_cnts.funcdesc_offset & ~1),
12731 sgot->contents
12732 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12733 }
12734 else
12735 {
12736 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12737 }
12738 outrel.r_offset = sgot->output_section->vma
12739 + sgot->output_offset
12740 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1);
12741 outrel.r_addend = 0;
12742 if (h->dynindx == -1 && !bfd_link_pic(info))
12743 if (h->root.type == bfd_link_hash_undefweak)
12744 arm_elf_add_rofixup(output_bfd, globals->srofixup, -1);
12745 else
12746 arm_elf_add_rofixup(output_bfd, globals->srofixup,
12747 outrel.r_offset);
12748 else
12749 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12750 eh->fdpic_cnts.gotfuncdesc_offset |= 1;
12751 }
12752 }
12753 else
12754 {
12755 /* Such relocation on static function should not have been
12756 emitted by the compiler. */
12757 abort();
12758 }
12759 }
12760 *unresolved_reloc_p = FALSE;
12761 return bfd_reloc_ok;
12762
12763 case R_ARM_FUNCDESC:
12764 {
12765 if (h == NULL)
12766 {
12767 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12768 Elf_Internal_Rela outrel;
12769 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12770 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12771 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12772 bfd_vma seg = -1;
12773
12774 if (bfd_link_pic(info) && dynindx == 0)
12775 abort();
12776
12777 /* Replace static FUNCDESC relocation with a
12778 R_ARM_RELATIVE dynamic relocation or with a rofixup for
12779 executable. */
12780 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12781 outrel.r_offset = input_section->output_section->vma
12782 + input_section->output_offset + rel->r_offset;
12783 outrel.r_addend = 0;
12784 if (bfd_link_pic(info))
12785 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12786 else
12787 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12788
12789 bfd_put_32 (input_bfd, sgot->output_section->vma
12790 + sgot->output_offset + offset, hit_data);
12791
12792 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12793 arm_elf_fill_funcdesc(output_bfd, info,
12794 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12795 dynindx, offset, addr, dynreloc_value, seg);
12796 }
12797 else
12798 {
12799 if (h->dynindx == -1)
12800 {
12801 int dynindx;
12802 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12803 bfd_vma addr;
12804 bfd_vma seg = -1;
12805 Elf_Internal_Rela outrel;
12806
12807 /* For static binaries sym_sec can be null. */
12808 if (sym_sec)
12809 {
12810 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12811 addr = dynreloc_value - sym_sec->output_section->vma;
12812 }
12813 else
12814 {
12815 dynindx = 0;
12816 addr = 0;
12817 }
12818
12819 if (bfd_link_pic(info) && dynindx == 0)
12820 abort();
12821
12822 /* Replace static FUNCDESC relocation with a
12823 R_ARM_RELATIVE dynamic relocation. */
12824 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12825 outrel.r_offset = input_section->output_section->vma
12826 + input_section->output_offset + rel->r_offset;
12827 outrel.r_addend = 0;
12828 if (bfd_link_pic(info))
12829 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12830 else
12831 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12832
12833 bfd_put_32 (input_bfd, sgot->output_section->vma
12834 + sgot->output_offset + offset, hit_data);
12835
12836 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12837 arm_elf_fill_funcdesc(output_bfd, info,
12838 &eh->fdpic_cnts.funcdesc_offset,
12839 dynindx, offset, addr, dynreloc_value, seg);
12840 }
12841 else
12842 {
12843 Elf_Internal_Rela outrel;
12844
12845 /* Add a dynamic relocation. */
12846 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12847 outrel.r_offset = input_section->output_section->vma
12848 + input_section->output_offset + rel->r_offset;
12849 outrel.r_addend = 0;
12850 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12851 }
12852 }
12853 }
12854 *unresolved_reloc_p = FALSE;
12855 return bfd_reloc_ok;
12856
12857 default:
12858 return bfd_reloc_notsupported;
12859 }
12860 }
12861
12862 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12863 static void
12864 arm_add_to_rel (bfd * abfd,
12865 bfd_byte * address,
12866 reloc_howto_type * howto,
12867 bfd_signed_vma increment)
12868 {
12869 bfd_signed_vma addend;
12870
12871 if (howto->type == R_ARM_THM_CALL
12872 || howto->type == R_ARM_THM_JUMP24)
12873 {
12874 int upper_insn, lower_insn;
12875 int upper, lower;
12876
12877 upper_insn = bfd_get_16 (abfd, address);
12878 lower_insn = bfd_get_16 (abfd, address + 2);
12879 upper = upper_insn & 0x7ff;
12880 lower = lower_insn & 0x7ff;
12881
12882 addend = (upper << 12) | (lower << 1);
12883 addend += increment;
12884 addend >>= 1;
12885
12886 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
12887 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
12888
12889 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
12890 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
12891 }
12892 else
12893 {
12894 bfd_vma contents;
12895
12896 contents = bfd_get_32 (abfd, address);
12897
12898 /* Get the (signed) value from the instruction. */
12899 addend = contents & howto->src_mask;
12900 if (addend & ((howto->src_mask + 1) >> 1))
12901 {
12902 bfd_signed_vma mask;
12903
12904 mask = -1;
12905 mask &= ~ howto->src_mask;
12906 addend |= mask;
12907 }
12908
12909 /* Add in the increment, (which is a byte value). */
12910 switch (howto->type)
12911 {
12912 default:
12913 addend += increment;
12914 break;
12915
12916 case R_ARM_PC24:
12917 case R_ARM_PLT32:
12918 case R_ARM_CALL:
12919 case R_ARM_JUMP24:
12920 addend <<= howto->size;
12921 addend += increment;
12922
12923 /* Should we check for overflow here ? */
12924
12925 /* Drop any undesired bits. */
12926 addend >>= howto->rightshift;
12927 break;
12928 }
12929
12930 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
12931
12932 bfd_put_32 (abfd, contents, address);
12933 }
12934 }
12935
12936 #define IS_ARM_TLS_RELOC(R_TYPE) \
12937 ((R_TYPE) == R_ARM_TLS_GD32 \
12938 || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \
12939 || (R_TYPE) == R_ARM_TLS_LDO32 \
12940 || (R_TYPE) == R_ARM_TLS_LDM32 \
12941 || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \
12942 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12943 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12944 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12945 || (R_TYPE) == R_ARM_TLS_LE32 \
12946 || (R_TYPE) == R_ARM_TLS_IE32 \
12947 || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \
12948 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12949
12950 /* Specific set of relocations for the gnu tls dialect. */
12951 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12952 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12953 || (R_TYPE) == R_ARM_TLS_CALL \
12954 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12955 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12956 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12957
12958 /* Relocate an ARM ELF section. */
12959
12960 static bfd_boolean
12961 elf32_arm_relocate_section (bfd * output_bfd,
12962 struct bfd_link_info * info,
12963 bfd * input_bfd,
12964 asection * input_section,
12965 bfd_byte * contents,
12966 Elf_Internal_Rela * relocs,
12967 Elf_Internal_Sym * local_syms,
12968 asection ** local_sections)
12969 {
12970 Elf_Internal_Shdr *symtab_hdr;
12971 struct elf_link_hash_entry **sym_hashes;
12972 Elf_Internal_Rela *rel;
12973 Elf_Internal_Rela *relend;
12974 const char *name;
12975 struct elf32_arm_link_hash_table * globals;
12976
12977 globals = elf32_arm_hash_table (info);
12978 if (globals == NULL)
12979 return FALSE;
12980
12981 symtab_hdr = & elf_symtab_hdr (input_bfd);
12982 sym_hashes = elf_sym_hashes (input_bfd);
12983
12984 rel = relocs;
12985 relend = relocs + input_section->reloc_count;
12986 for (; rel < relend; rel++)
12987 {
12988 int r_type;
12989 reloc_howto_type * howto;
12990 unsigned long r_symndx;
12991 Elf_Internal_Sym * sym;
12992 asection * sec;
12993 struct elf_link_hash_entry * h;
12994 bfd_vma relocation;
12995 bfd_reloc_status_type r;
12996 arelent bfd_reloc;
12997 char sym_type;
12998 bfd_boolean unresolved_reloc = FALSE;
12999 char *error_message = NULL;
13000
13001 r_symndx = ELF32_R_SYM (rel->r_info);
13002 r_type = ELF32_R_TYPE (rel->r_info);
13003 r_type = arm_real_reloc_type (globals, r_type);
13004
13005 if ( r_type == R_ARM_GNU_VTENTRY
13006 || r_type == R_ARM_GNU_VTINHERIT)
13007 continue;
13008
13009 howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
13010
13011 if (howto == NULL)
13012 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
13013
13014 h = NULL;
13015 sym = NULL;
13016 sec = NULL;
13017
13018 if (r_symndx < symtab_hdr->sh_info)
13019 {
13020 sym = local_syms + r_symndx;
13021 sym_type = ELF32_ST_TYPE (sym->st_info);
13022 sec = local_sections[r_symndx];
13023
13024 /* An object file might have a reference to a local
13025 undefined symbol. This is a daft object file, but we
13026 should at least do something about it. V4BX & NONE
13027 relocations do not use the symbol and are explicitly
13028 allowed to use the undefined symbol, so allow those.
13029 Likewise for relocations against STN_UNDEF. */
13030 if (r_type != R_ARM_V4BX
13031 && r_type != R_ARM_NONE
13032 && r_symndx != STN_UNDEF
13033 && bfd_is_und_section (sec)
13034 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
13035 (*info->callbacks->undefined_symbol)
13036 (info, bfd_elf_string_from_elf_section
13037 (input_bfd, symtab_hdr->sh_link, sym->st_name),
13038 input_bfd, input_section,
13039 rel->r_offset, TRUE);
13040
13041 if (globals->use_rel)
13042 {
13043 relocation = (sec->output_section->vma
13044 + sec->output_offset
13045 + sym->st_value);
13046 if (!bfd_link_relocatable (info)
13047 && (sec->flags & SEC_MERGE)
13048 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13049 {
13050 asection *msec;
13051 bfd_vma addend, value;
13052
13053 switch (r_type)
13054 {
13055 case R_ARM_MOVW_ABS_NC:
13056 case R_ARM_MOVT_ABS:
13057 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13058 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
13059 addend = (addend ^ 0x8000) - 0x8000;
13060 break;
13061
13062 case R_ARM_THM_MOVW_ABS_NC:
13063 case R_ARM_THM_MOVT_ABS:
13064 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
13065 << 16;
13066 value |= bfd_get_16 (input_bfd,
13067 contents + rel->r_offset + 2);
13068 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
13069 | ((value & 0x04000000) >> 15);
13070 addend = (addend ^ 0x8000) - 0x8000;
13071 break;
13072
13073 default:
13074 if (howto->rightshift
13075 || (howto->src_mask & (howto->src_mask + 1)))
13076 {
13077 _bfd_error_handler
13078 /* xgettext:c-format */
13079 (_("%pB(%pA+%#" PRIx64 "): "
13080 "%s relocation against SEC_MERGE section"),
13081 input_bfd, input_section,
13082 (uint64_t) rel->r_offset, howto->name);
13083 return FALSE;
13084 }
13085
13086 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13087
13088 /* Get the (signed) value from the instruction. */
13089 addend = value & howto->src_mask;
13090 if (addend & ((howto->src_mask + 1) >> 1))
13091 {
13092 bfd_signed_vma mask;
13093
13094 mask = -1;
13095 mask &= ~ howto->src_mask;
13096 addend |= mask;
13097 }
13098 break;
13099 }
13100
13101 msec = sec;
13102 addend =
13103 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
13104 - relocation;
13105 addend += msec->output_section->vma + msec->output_offset;
13106
13107 /* Cases here must match those in the preceding
13108 switch statement. */
13109 switch (r_type)
13110 {
13111 case R_ARM_MOVW_ABS_NC:
13112 case R_ARM_MOVT_ABS:
13113 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
13114 | (addend & 0xfff);
13115 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13116 break;
13117
13118 case R_ARM_THM_MOVW_ABS_NC:
13119 case R_ARM_THM_MOVT_ABS:
13120 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
13121 | (addend & 0xff) | ((addend & 0x0800) << 15);
13122 bfd_put_16 (input_bfd, value >> 16,
13123 contents + rel->r_offset);
13124 bfd_put_16 (input_bfd, value,
13125 contents + rel->r_offset + 2);
13126 break;
13127
13128 default:
13129 value = (value & ~ howto->dst_mask)
13130 | (addend & howto->dst_mask);
13131 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13132 break;
13133 }
13134 }
13135 }
13136 else
13137 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
13138 }
13139 else
13140 {
13141 bfd_boolean warned, ignored;
13142
13143 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
13144 r_symndx, symtab_hdr, sym_hashes,
13145 h, sec, relocation,
13146 unresolved_reloc, warned, ignored);
13147
13148 sym_type = h->type;
13149 }
13150
13151 if (sec != NULL && discarded_section (sec))
13152 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
13153 rel, 1, relend, howto, 0, contents);
13154
13155 if (bfd_link_relocatable (info))
13156 {
13157 /* This is a relocatable link. We don't have to change
13158 anything, unless the reloc is against a section symbol,
13159 in which case we have to adjust according to where the
13160 section symbol winds up in the output section. */
13161 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13162 {
13163 if (globals->use_rel)
13164 arm_add_to_rel (input_bfd, contents + rel->r_offset,
13165 howto, (bfd_signed_vma) sec->output_offset);
13166 else
13167 rel->r_addend += sec->output_offset;
13168 }
13169 continue;
13170 }
13171
13172 if (h != NULL)
13173 name = h->root.root.string;
13174 else
13175 {
13176 name = (bfd_elf_string_from_elf_section
13177 (input_bfd, symtab_hdr->sh_link, sym->st_name));
13178 if (name == NULL || *name == '\0')
13179 name = bfd_section_name (input_bfd, sec);
13180 }
13181
13182 if (r_symndx != STN_UNDEF
13183 && r_type != R_ARM_NONE
13184 && (h == NULL
13185 || h->root.type == bfd_link_hash_defined
13186 || h->root.type == bfd_link_hash_defweak)
13187 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
13188 {
13189 _bfd_error_handler
13190 ((sym_type == STT_TLS
13191 /* xgettext:c-format */
13192 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
13193 /* xgettext:c-format */
13194 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
13195 input_bfd,
13196 input_section,
13197 (uint64_t) rel->r_offset,
13198 howto->name,
13199 name);
13200 }
13201
13202 /* We call elf32_arm_final_link_relocate unless we're completely
13203 done, i.e., the relaxation produced the final output we want,
13204 and we won't let anybody mess with it. Also, we have to do
13205 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
13206 both in relaxed and non-relaxed cases. */
13207 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
13208 || (IS_ARM_TLS_GNU_RELOC (r_type)
13209 && !((h ? elf32_arm_hash_entry (h)->tls_type :
13210 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
13211 & GOT_TLS_GDESC)))
13212 {
13213 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
13214 contents, rel, h == NULL);
13215 /* This may have been marked unresolved because it came from
13216 a shared library. But we've just dealt with that. */
13217 unresolved_reloc = 0;
13218 }
13219 else
13220 r = bfd_reloc_continue;
13221
13222 if (r == bfd_reloc_continue)
13223 {
13224 unsigned char branch_type =
13225 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
13226 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
13227
13228 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
13229 input_section, contents, rel,
13230 relocation, info, sec, name,
13231 sym_type, branch_type, h,
13232 &unresolved_reloc,
13233 &error_message);
13234 }
13235
13236 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13237 because such sections are not SEC_ALLOC and thus ld.so will
13238 not process them. */
13239 if (unresolved_reloc
13240 && !((input_section->flags & SEC_DEBUGGING) != 0
13241 && h->def_dynamic)
13242 && _bfd_elf_section_offset (output_bfd, info, input_section,
13243 rel->r_offset) != (bfd_vma) -1)
13244 {
13245 _bfd_error_handler
13246 /* xgettext:c-format */
13247 (_("%pB(%pA+%#" PRIx64 "): "
13248 "unresolvable %s relocation against symbol `%s'"),
13249 input_bfd,
13250 input_section,
13251 (uint64_t) rel->r_offset,
13252 howto->name,
13253 h->root.root.string);
13254 return FALSE;
13255 }
13256
13257 if (r != bfd_reloc_ok)
13258 {
13259 switch (r)
13260 {
13261 case bfd_reloc_overflow:
13262 /* If the overflowing reloc was to an undefined symbol,
13263 we have already printed one error message and there
13264 is no point complaining again. */
13265 if (!h || h->root.type != bfd_link_hash_undefined)
13266 (*info->callbacks->reloc_overflow)
13267 (info, (h ? &h->root : NULL), name, howto->name,
13268 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
13269 break;
13270
13271 case bfd_reloc_undefined:
13272 (*info->callbacks->undefined_symbol)
13273 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
13274 break;
13275
13276 case bfd_reloc_outofrange:
13277 error_message = _("out of range");
13278 goto common_error;
13279
13280 case bfd_reloc_notsupported:
13281 error_message = _("unsupported relocation");
13282 goto common_error;
13283
13284 case bfd_reloc_dangerous:
13285 /* error_message should already be set. */
13286 goto common_error;
13287
13288 default:
13289 error_message = _("unknown error");
13290 /* Fall through. */
13291
13292 common_error:
13293 BFD_ASSERT (error_message != NULL);
13294 (*info->callbacks->reloc_dangerous)
13295 (info, error_message, input_bfd, input_section, rel->r_offset);
13296 break;
13297 }
13298 }
13299 }
13300
13301 return TRUE;
13302 }
13303
13304 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
13305 adds the edit to the start of the list. (The list must be built in order of
13306 ascending TINDEX: the function's callers are primarily responsible for
13307 maintaining that condition). */
13308
13309 static void
13310 add_unwind_table_edit (arm_unwind_table_edit **head,
13311 arm_unwind_table_edit **tail,
13312 arm_unwind_edit_type type,
13313 asection *linked_section,
13314 unsigned int tindex)
13315 {
13316 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
13317 xmalloc (sizeof (arm_unwind_table_edit));
13318
13319 new_edit->type = type;
13320 new_edit->linked_section = linked_section;
13321 new_edit->index = tindex;
13322
13323 if (tindex > 0)
13324 {
13325 new_edit->next = NULL;
13326
13327 if (*tail)
13328 (*tail)->next = new_edit;
13329
13330 (*tail) = new_edit;
13331
13332 if (!*head)
13333 (*head) = new_edit;
13334 }
13335 else
13336 {
13337 new_edit->next = *head;
13338
13339 if (!*tail)
13340 *tail = new_edit;
13341
13342 *head = new_edit;
13343 }
13344 }
13345
13346 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
13347
13348 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
13349 static void
13350 adjust_exidx_size(asection *exidx_sec, int adjust)
13351 {
13352 asection *out_sec;
13353
13354 if (!exidx_sec->rawsize)
13355 exidx_sec->rawsize = exidx_sec->size;
13356
13357 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
13358 out_sec = exidx_sec->output_section;
13359 /* Adjust size of output section. */
13360 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
13361 }
13362
13363 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
13364 static void
13365 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
13366 {
13367 struct _arm_elf_section_data *exidx_arm_data;
13368
13369 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13370 add_unwind_table_edit (
13371 &exidx_arm_data->u.exidx.unwind_edit_list,
13372 &exidx_arm_data->u.exidx.unwind_edit_tail,
13373 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
13374
13375 exidx_arm_data->additional_reloc_count++;
13376
13377 adjust_exidx_size(exidx_sec, 8);
13378 }
13379
13380 /* Scan .ARM.exidx tables, and create a list describing edits which should be
13381 made to those tables, such that:
13382
13383 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13384 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13385 codes which have been inlined into the index).
13386
13387 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13388
13389 The edits are applied when the tables are written
13390 (in elf32_arm_write_section). */
13391
13392 bfd_boolean
13393 elf32_arm_fix_exidx_coverage (asection **text_section_order,
13394 unsigned int num_text_sections,
13395 struct bfd_link_info *info,
13396 bfd_boolean merge_exidx_entries)
13397 {
13398 bfd *inp;
13399 unsigned int last_second_word = 0, i;
13400 asection *last_exidx_sec = NULL;
13401 asection *last_text_sec = NULL;
13402 int last_unwind_type = -1;
13403
13404 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13405 text sections. */
13406 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
13407 {
13408 asection *sec;
13409
13410 for (sec = inp->sections; sec != NULL; sec = sec->next)
13411 {
13412 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
13413 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
13414
13415 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
13416 continue;
13417
13418 if (elf_sec->linked_to)
13419 {
13420 Elf_Internal_Shdr *linked_hdr
13421 = &elf_section_data (elf_sec->linked_to)->this_hdr;
13422 struct _arm_elf_section_data *linked_sec_arm_data
13423 = get_arm_elf_section_data (linked_hdr->bfd_section);
13424
13425 if (linked_sec_arm_data == NULL)
13426 continue;
13427
13428 /* Link this .ARM.exidx section back from the text section it
13429 describes. */
13430 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
13431 }
13432 }
13433 }
13434
13435 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
13436 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13437 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
13438
13439 for (i = 0; i < num_text_sections; i++)
13440 {
13441 asection *sec = text_section_order[i];
13442 asection *exidx_sec;
13443 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
13444 struct _arm_elf_section_data *exidx_arm_data;
13445 bfd_byte *contents = NULL;
13446 int deleted_exidx_bytes = 0;
13447 bfd_vma j;
13448 arm_unwind_table_edit *unwind_edit_head = NULL;
13449 arm_unwind_table_edit *unwind_edit_tail = NULL;
13450 Elf_Internal_Shdr *hdr;
13451 bfd *ibfd;
13452
13453 if (arm_data == NULL)
13454 continue;
13455
13456 exidx_sec = arm_data->u.text.arm_exidx_sec;
13457 if (exidx_sec == NULL)
13458 {
13459 /* Section has no unwind data. */
13460 if (last_unwind_type == 0 || !last_exidx_sec)
13461 continue;
13462
13463 /* Ignore zero sized sections. */
13464 if (sec->size == 0)
13465 continue;
13466
13467 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13468 last_unwind_type = 0;
13469 continue;
13470 }
13471
13472 /* Skip /DISCARD/ sections. */
13473 if (bfd_is_abs_section (exidx_sec->output_section))
13474 continue;
13475
13476 hdr = &elf_section_data (exidx_sec)->this_hdr;
13477 if (hdr->sh_type != SHT_ARM_EXIDX)
13478 continue;
13479
13480 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13481 if (exidx_arm_data == NULL)
13482 continue;
13483
13484 ibfd = exidx_sec->owner;
13485
13486 if (hdr->contents != NULL)
13487 contents = hdr->contents;
13488 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
13489 /* An error? */
13490 continue;
13491
13492 if (last_unwind_type > 0)
13493 {
13494 unsigned int first_word = bfd_get_32 (ibfd, contents);
13495 /* Add cantunwind if first unwind item does not match section
13496 start. */
13497 if (first_word != sec->vma)
13498 {
13499 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13500 last_unwind_type = 0;
13501 }
13502 }
13503
13504 for (j = 0; j < hdr->sh_size; j += 8)
13505 {
13506 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
13507 int unwind_type;
13508 int elide = 0;
13509
13510 /* An EXIDX_CANTUNWIND entry. */
13511 if (second_word == 1)
13512 {
13513 if (last_unwind_type == 0)
13514 elide = 1;
13515 unwind_type = 0;
13516 }
13517 /* Inlined unwinding data. Merge if equal to previous. */
13518 else if ((second_word & 0x80000000) != 0)
13519 {
13520 if (merge_exidx_entries
13521 && last_second_word == second_word && last_unwind_type == 1)
13522 elide = 1;
13523 unwind_type = 1;
13524 last_second_word = second_word;
13525 }
13526 /* Normal table entry. In theory we could merge these too,
13527 but duplicate entries are likely to be much less common. */
13528 else
13529 unwind_type = 2;
13530
13531 if (elide && !bfd_link_relocatable (info))
13532 {
13533 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
13534 DELETE_EXIDX_ENTRY, NULL, j / 8);
13535
13536 deleted_exidx_bytes += 8;
13537 }
13538
13539 last_unwind_type = unwind_type;
13540 }
13541
13542 /* Free contents if we allocated it ourselves. */
13543 if (contents != hdr->contents)
13544 free (contents);
13545
13546 /* Record edits to be applied later (in elf32_arm_write_section). */
13547 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
13548 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
13549
13550 if (deleted_exidx_bytes > 0)
13551 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
13552
13553 last_exidx_sec = exidx_sec;
13554 last_text_sec = sec;
13555 }
13556
13557 /* Add terminating CANTUNWIND entry. */
13558 if (!bfd_link_relocatable (info) && last_exidx_sec
13559 && last_unwind_type != 0)
13560 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13561
13562 return TRUE;
13563 }
13564
13565 static bfd_boolean
13566 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
13567 bfd *ibfd, const char *name)
13568 {
13569 asection *sec, *osec;
13570
13571 sec = bfd_get_linker_section (ibfd, name);
13572 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
13573 return TRUE;
13574
13575 osec = sec->output_section;
13576 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
13577 return TRUE;
13578
13579 if (! bfd_set_section_contents (obfd, osec, sec->contents,
13580 sec->output_offset, sec->size))
13581 return FALSE;
13582
13583 return TRUE;
13584 }
13585
13586 static bfd_boolean
13587 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
13588 {
13589 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
13590 asection *sec, *osec;
13591
13592 if (globals == NULL)
13593 return FALSE;
13594
13595 /* Invoke the regular ELF backend linker to do all the work. */
13596 if (!bfd_elf_final_link (abfd, info))
13597 return FALSE;
13598
13599 /* Process stub sections (eg BE8 encoding, ...). */
13600 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
13601 unsigned int i;
13602 for (i=0; i<htab->top_id; i++)
13603 {
13604 sec = htab->stub_group[i].stub_sec;
13605 /* Only process it once, in its link_sec slot. */
13606 if (sec && i == htab->stub_group[i].link_sec->id)
13607 {
13608 osec = sec->output_section;
13609 elf32_arm_write_section (abfd, info, sec, sec->contents);
13610 if (! bfd_set_section_contents (abfd, osec, sec->contents,
13611 sec->output_offset, sec->size))
13612 return FALSE;
13613 }
13614 }
13615
13616 /* Write out any glue sections now that we have created all the
13617 stubs. */
13618 if (globals->bfd_of_glue_owner != NULL)
13619 {
13620 if (! elf32_arm_output_glue_section (info, abfd,
13621 globals->bfd_of_glue_owner,
13622 ARM2THUMB_GLUE_SECTION_NAME))
13623 return FALSE;
13624
13625 if (! elf32_arm_output_glue_section (info, abfd,
13626 globals->bfd_of_glue_owner,
13627 THUMB2ARM_GLUE_SECTION_NAME))
13628 return FALSE;
13629
13630 if (! elf32_arm_output_glue_section (info, abfd,
13631 globals->bfd_of_glue_owner,
13632 VFP11_ERRATUM_VENEER_SECTION_NAME))
13633 return FALSE;
13634
13635 if (! elf32_arm_output_glue_section (info, abfd,
13636 globals->bfd_of_glue_owner,
13637 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
13638 return FALSE;
13639
13640 if (! elf32_arm_output_glue_section (info, abfd,
13641 globals->bfd_of_glue_owner,
13642 ARM_BX_GLUE_SECTION_NAME))
13643 return FALSE;
13644 }
13645
13646 return TRUE;
13647 }
13648
13649 /* Return a best guess for the machine number based on the attributes. */
13650
13651 static unsigned int
13652 bfd_arm_get_mach_from_attributes (bfd * abfd)
13653 {
13654 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
13655
13656 switch (arch)
13657 {
13658 case TAG_CPU_ARCH_PRE_V4: return bfd_mach_arm_3M;
13659 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
13660 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
13661 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
13662
13663 case TAG_CPU_ARCH_V5TE:
13664 {
13665 char * name;
13666
13667 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
13668 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
13669
13670 if (name)
13671 {
13672 if (strcmp (name, "IWMMXT2") == 0)
13673 return bfd_mach_arm_iWMMXt2;
13674
13675 if (strcmp (name, "IWMMXT") == 0)
13676 return bfd_mach_arm_iWMMXt;
13677
13678 if (strcmp (name, "XSCALE") == 0)
13679 {
13680 int wmmx;
13681
13682 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
13683 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
13684 switch (wmmx)
13685 {
13686 case 1: return bfd_mach_arm_iWMMXt;
13687 case 2: return bfd_mach_arm_iWMMXt2;
13688 default: return bfd_mach_arm_XScale;
13689 }
13690 }
13691 }
13692
13693 return bfd_mach_arm_5TE;
13694 }
13695
13696 case TAG_CPU_ARCH_V5TEJ:
13697 return bfd_mach_arm_5TEJ;
13698 case TAG_CPU_ARCH_V6:
13699 return bfd_mach_arm_6;
13700 case TAG_CPU_ARCH_V6KZ:
13701 return bfd_mach_arm_6KZ;
13702 case TAG_CPU_ARCH_V6T2:
13703 return bfd_mach_arm_6T2;
13704 case TAG_CPU_ARCH_V6K:
13705 return bfd_mach_arm_6K;
13706 case TAG_CPU_ARCH_V7:
13707 return bfd_mach_arm_7;
13708 case TAG_CPU_ARCH_V6_M:
13709 return bfd_mach_arm_6M;
13710 case TAG_CPU_ARCH_V6S_M:
13711 return bfd_mach_arm_6SM;
13712 case TAG_CPU_ARCH_V7E_M:
13713 return bfd_mach_arm_7EM;
13714 case TAG_CPU_ARCH_V8:
13715 return bfd_mach_arm_8;
13716 case TAG_CPU_ARCH_V8R:
13717 return bfd_mach_arm_8R;
13718 case TAG_CPU_ARCH_V8M_BASE:
13719 return bfd_mach_arm_8M_BASE;
13720 case TAG_CPU_ARCH_V8M_MAIN:
13721 return bfd_mach_arm_8M_MAIN;
13722
13723 default:
13724 /* Force entry to be added for any new known Tag_CPU_arch value. */
13725 BFD_ASSERT (arch > MAX_TAG_CPU_ARCH);
13726
13727 /* Unknown Tag_CPU_arch value. */
13728 return bfd_mach_arm_unknown;
13729 }
13730 }
13731
13732 /* Set the right machine number. */
13733
13734 static bfd_boolean
13735 elf32_arm_object_p (bfd *abfd)
13736 {
13737 unsigned int mach;
13738
13739 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
13740
13741 if (mach == bfd_mach_arm_unknown)
13742 {
13743 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13744 mach = bfd_mach_arm_ep9312;
13745 else
13746 mach = bfd_arm_get_mach_from_attributes (abfd);
13747 }
13748
13749 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13750 return TRUE;
13751 }
13752
13753 /* Function to keep ARM specific flags in the ELF header. */
13754
13755 static bfd_boolean
13756 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13757 {
13758 if (elf_flags_init (abfd)
13759 && elf_elfheader (abfd)->e_flags != flags)
13760 {
13761 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13762 {
13763 if (flags & EF_ARM_INTERWORK)
13764 _bfd_error_handler
13765 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13766 abfd);
13767 else
13768 _bfd_error_handler
13769 (_("warning: clearing the interworking flag of %pB due to outside request"),
13770 abfd);
13771 }
13772 }
13773 else
13774 {
13775 elf_elfheader (abfd)->e_flags = flags;
13776 elf_flags_init (abfd) = TRUE;
13777 }
13778
13779 return TRUE;
13780 }
13781
13782 /* Copy backend specific data from one object module to another. */
13783
13784 static bfd_boolean
13785 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13786 {
13787 flagword in_flags;
13788 flagword out_flags;
13789
13790 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13791 return TRUE;
13792
13793 in_flags = elf_elfheader (ibfd)->e_flags;
13794 out_flags = elf_elfheader (obfd)->e_flags;
13795
13796 if (elf_flags_init (obfd)
13797 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13798 && in_flags != out_flags)
13799 {
13800 /* Cannot mix APCS26 and APCS32 code. */
13801 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13802 return FALSE;
13803
13804 /* Cannot mix float APCS and non-float APCS code. */
13805 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13806 return FALSE;
13807
13808 /* If the src and dest have different interworking flags
13809 then turn off the interworking bit. */
13810 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13811 {
13812 if (out_flags & EF_ARM_INTERWORK)
13813 _bfd_error_handler
13814 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13815 obfd, ibfd);
13816
13817 in_flags &= ~EF_ARM_INTERWORK;
13818 }
13819
13820 /* Likewise for PIC, though don't warn for this case. */
13821 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13822 in_flags &= ~EF_ARM_PIC;
13823 }
13824
13825 elf_elfheader (obfd)->e_flags = in_flags;
13826 elf_flags_init (obfd) = TRUE;
13827
13828 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13829 }
13830
13831 /* Values for Tag_ABI_PCS_R9_use. */
13832 enum
13833 {
13834 AEABI_R9_V6,
13835 AEABI_R9_SB,
13836 AEABI_R9_TLS,
13837 AEABI_R9_unused
13838 };
13839
13840 /* Values for Tag_ABI_PCS_RW_data. */
13841 enum
13842 {
13843 AEABI_PCS_RW_data_absolute,
13844 AEABI_PCS_RW_data_PCrel,
13845 AEABI_PCS_RW_data_SBrel,
13846 AEABI_PCS_RW_data_unused
13847 };
13848
13849 /* Values for Tag_ABI_enum_size. */
13850 enum
13851 {
13852 AEABI_enum_unused,
13853 AEABI_enum_short,
13854 AEABI_enum_wide,
13855 AEABI_enum_forced_wide
13856 };
13857
13858 /* Determine whether an object attribute tag takes an integer, a
13859 string or both. */
13860
13861 static int
13862 elf32_arm_obj_attrs_arg_type (int tag)
13863 {
13864 if (tag == Tag_compatibility)
13865 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
13866 else if (tag == Tag_nodefaults)
13867 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
13868 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
13869 return ATTR_TYPE_FLAG_STR_VAL;
13870 else if (tag < 32)
13871 return ATTR_TYPE_FLAG_INT_VAL;
13872 else
13873 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
13874 }
13875
13876 /* The ABI defines that Tag_conformance should be emitted first, and that
13877 Tag_nodefaults should be second (if either is defined). This sets those
13878 two positions, and bumps up the position of all the remaining tags to
13879 compensate. */
13880 static int
13881 elf32_arm_obj_attrs_order (int num)
13882 {
13883 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
13884 return Tag_conformance;
13885 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
13886 return Tag_nodefaults;
13887 if ((num - 2) < Tag_nodefaults)
13888 return num - 2;
13889 if ((num - 1) < Tag_conformance)
13890 return num - 1;
13891 return num;
13892 }
13893
13894 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13895 static bfd_boolean
13896 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
13897 {
13898 if ((tag & 127) < 64)
13899 {
13900 _bfd_error_handler
13901 (_("%pB: unknown mandatory EABI object attribute %d"),
13902 abfd, tag);
13903 bfd_set_error (bfd_error_bad_value);
13904 return FALSE;
13905 }
13906 else
13907 {
13908 _bfd_error_handler
13909 (_("warning: %pB: unknown EABI object attribute %d"),
13910 abfd, tag);
13911 return TRUE;
13912 }
13913 }
13914
13915 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13916 Returns -1 if no architecture could be read. */
13917
13918 static int
13919 get_secondary_compatible_arch (bfd *abfd)
13920 {
13921 obj_attribute *attr =
13922 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13923
13924 /* Note: the tag and its argument below are uleb128 values, though
13925 currently-defined values fit in one byte for each. */
13926 if (attr->s
13927 && attr->s[0] == Tag_CPU_arch
13928 && (attr->s[1] & 128) != 128
13929 && attr->s[2] == 0)
13930 return attr->s[1];
13931
13932 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13933 return -1;
13934 }
13935
13936 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13937 The tag is removed if ARCH is -1. */
13938
13939 static void
13940 set_secondary_compatible_arch (bfd *abfd, int arch)
13941 {
13942 obj_attribute *attr =
13943 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13944
13945 if (arch == -1)
13946 {
13947 attr->s = NULL;
13948 return;
13949 }
13950
13951 /* Note: the tag and its argument below are uleb128 values, though
13952 currently-defined values fit in one byte for each. */
13953 if (!attr->s)
13954 attr->s = (char *) bfd_alloc (abfd, 3);
13955 attr->s[0] = Tag_CPU_arch;
13956 attr->s[1] = arch;
13957 attr->s[2] = '\0';
13958 }
13959
13960 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13961 into account. */
13962
13963 static int
13964 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
13965 int newtag, int secondary_compat)
13966 {
13967 #define T(X) TAG_CPU_ARCH_##X
13968 int tagl, tagh, result;
13969 const int v6t2[] =
13970 {
13971 T(V6T2), /* PRE_V4. */
13972 T(V6T2), /* V4. */
13973 T(V6T2), /* V4T. */
13974 T(V6T2), /* V5T. */
13975 T(V6T2), /* V5TE. */
13976 T(V6T2), /* V5TEJ. */
13977 T(V6T2), /* V6. */
13978 T(V7), /* V6KZ. */
13979 T(V6T2) /* V6T2. */
13980 };
13981 const int v6k[] =
13982 {
13983 T(V6K), /* PRE_V4. */
13984 T(V6K), /* V4. */
13985 T(V6K), /* V4T. */
13986 T(V6K), /* V5T. */
13987 T(V6K), /* V5TE. */
13988 T(V6K), /* V5TEJ. */
13989 T(V6K), /* V6. */
13990 T(V6KZ), /* V6KZ. */
13991 T(V7), /* V6T2. */
13992 T(V6K) /* V6K. */
13993 };
13994 const int v7[] =
13995 {
13996 T(V7), /* PRE_V4. */
13997 T(V7), /* V4. */
13998 T(V7), /* V4T. */
13999 T(V7), /* V5T. */
14000 T(V7), /* V5TE. */
14001 T(V7), /* V5TEJ. */
14002 T(V7), /* V6. */
14003 T(V7), /* V6KZ. */
14004 T(V7), /* V6T2. */
14005 T(V7), /* V6K. */
14006 T(V7) /* V7. */
14007 };
14008 const int v6_m[] =
14009 {
14010 -1, /* PRE_V4. */
14011 -1, /* V4. */
14012 T(V6K), /* V4T. */
14013 T(V6K), /* V5T. */
14014 T(V6K), /* V5TE. */
14015 T(V6K), /* V5TEJ. */
14016 T(V6K), /* V6. */
14017 T(V6KZ), /* V6KZ. */
14018 T(V7), /* V6T2. */
14019 T(V6K), /* V6K. */
14020 T(V7), /* V7. */
14021 T(V6_M) /* V6_M. */
14022 };
14023 const int v6s_m[] =
14024 {
14025 -1, /* PRE_V4. */
14026 -1, /* V4. */
14027 T(V6K), /* V4T. */
14028 T(V6K), /* V5T. */
14029 T(V6K), /* V5TE. */
14030 T(V6K), /* V5TEJ. */
14031 T(V6K), /* V6. */
14032 T(V6KZ), /* V6KZ. */
14033 T(V7), /* V6T2. */
14034 T(V6K), /* V6K. */
14035 T(V7), /* V7. */
14036 T(V6S_M), /* V6_M. */
14037 T(V6S_M) /* V6S_M. */
14038 };
14039 const int v7e_m[] =
14040 {
14041 -1, /* PRE_V4. */
14042 -1, /* V4. */
14043 T(V7E_M), /* V4T. */
14044 T(V7E_M), /* V5T. */
14045 T(V7E_M), /* V5TE. */
14046 T(V7E_M), /* V5TEJ. */
14047 T(V7E_M), /* V6. */
14048 T(V7E_M), /* V6KZ. */
14049 T(V7E_M), /* V6T2. */
14050 T(V7E_M), /* V6K. */
14051 T(V7E_M), /* V7. */
14052 T(V7E_M), /* V6_M. */
14053 T(V7E_M), /* V6S_M. */
14054 T(V7E_M) /* V7E_M. */
14055 };
14056 const int v8[] =
14057 {
14058 T(V8), /* PRE_V4. */
14059 T(V8), /* V4. */
14060 T(V8), /* V4T. */
14061 T(V8), /* V5T. */
14062 T(V8), /* V5TE. */
14063 T(V8), /* V5TEJ. */
14064 T(V8), /* V6. */
14065 T(V8), /* V6KZ. */
14066 T(V8), /* V6T2. */
14067 T(V8), /* V6K. */
14068 T(V8), /* V7. */
14069 T(V8), /* V6_M. */
14070 T(V8), /* V6S_M. */
14071 T(V8), /* V7E_M. */
14072 T(V8) /* V8. */
14073 };
14074 const int v8r[] =
14075 {
14076 T(V8R), /* PRE_V4. */
14077 T(V8R), /* V4. */
14078 T(V8R), /* V4T. */
14079 T(V8R), /* V5T. */
14080 T(V8R), /* V5TE. */
14081 T(V8R), /* V5TEJ. */
14082 T(V8R), /* V6. */
14083 T(V8R), /* V6KZ. */
14084 T(V8R), /* V6T2. */
14085 T(V8R), /* V6K. */
14086 T(V8R), /* V7. */
14087 T(V8R), /* V6_M. */
14088 T(V8R), /* V6S_M. */
14089 T(V8R), /* V7E_M. */
14090 T(V8), /* V8. */
14091 T(V8R), /* V8R. */
14092 };
14093 const int v8m_baseline[] =
14094 {
14095 -1, /* PRE_V4. */
14096 -1, /* V4. */
14097 -1, /* V4T. */
14098 -1, /* V5T. */
14099 -1, /* V5TE. */
14100 -1, /* V5TEJ. */
14101 -1, /* V6. */
14102 -1, /* V6KZ. */
14103 -1, /* V6T2. */
14104 -1, /* V6K. */
14105 -1, /* V7. */
14106 T(V8M_BASE), /* V6_M. */
14107 T(V8M_BASE), /* V6S_M. */
14108 -1, /* V7E_M. */
14109 -1, /* V8. */
14110 -1, /* V8R. */
14111 T(V8M_BASE) /* V8-M BASELINE. */
14112 };
14113 const int v8m_mainline[] =
14114 {
14115 -1, /* PRE_V4. */
14116 -1, /* V4. */
14117 -1, /* V4T. */
14118 -1, /* V5T. */
14119 -1, /* V5TE. */
14120 -1, /* V5TEJ. */
14121 -1, /* V6. */
14122 -1, /* V6KZ. */
14123 -1, /* V6T2. */
14124 -1, /* V6K. */
14125 T(V8M_MAIN), /* V7. */
14126 T(V8M_MAIN), /* V6_M. */
14127 T(V8M_MAIN), /* V6S_M. */
14128 T(V8M_MAIN), /* V7E_M. */
14129 -1, /* V8. */
14130 -1, /* V8R. */
14131 T(V8M_MAIN), /* V8-M BASELINE. */
14132 T(V8M_MAIN) /* V8-M MAINLINE. */
14133 };
14134 const int v4t_plus_v6_m[] =
14135 {
14136 -1, /* PRE_V4. */
14137 -1, /* V4. */
14138 T(V4T), /* V4T. */
14139 T(V5T), /* V5T. */
14140 T(V5TE), /* V5TE. */
14141 T(V5TEJ), /* V5TEJ. */
14142 T(V6), /* V6. */
14143 T(V6KZ), /* V6KZ. */
14144 T(V6T2), /* V6T2. */
14145 T(V6K), /* V6K. */
14146 T(V7), /* V7. */
14147 T(V6_M), /* V6_M. */
14148 T(V6S_M), /* V6S_M. */
14149 T(V7E_M), /* V7E_M. */
14150 T(V8), /* V8. */
14151 -1, /* V8R. */
14152 T(V8M_BASE), /* V8-M BASELINE. */
14153 T(V8M_MAIN), /* V8-M MAINLINE. */
14154 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
14155 };
14156 const int *comb[] =
14157 {
14158 v6t2,
14159 v6k,
14160 v7,
14161 v6_m,
14162 v6s_m,
14163 v7e_m,
14164 v8,
14165 v8r,
14166 v8m_baseline,
14167 v8m_mainline,
14168 /* Pseudo-architecture. */
14169 v4t_plus_v6_m
14170 };
14171
14172 /* Check we've not got a higher architecture than we know about. */
14173
14174 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
14175 {
14176 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd);
14177 return -1;
14178 }
14179
14180 /* Override old tag if we have a Tag_also_compatible_with on the output. */
14181
14182 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
14183 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
14184 oldtag = T(V4T_PLUS_V6_M);
14185
14186 /* And override the new tag if we have a Tag_also_compatible_with on the
14187 input. */
14188
14189 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
14190 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
14191 newtag = T(V4T_PLUS_V6_M);
14192
14193 tagl = (oldtag < newtag) ? oldtag : newtag;
14194 result = tagh = (oldtag > newtag) ? oldtag : newtag;
14195
14196 /* Architectures before V6KZ add features monotonically. */
14197 if (tagh <= TAG_CPU_ARCH_V6KZ)
14198 return result;
14199
14200 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
14201
14202 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
14203 as the canonical version. */
14204 if (result == T(V4T_PLUS_V6_M))
14205 {
14206 result = T(V4T);
14207 *secondary_compat_out = T(V6_M);
14208 }
14209 else
14210 *secondary_compat_out = -1;
14211
14212 if (result == -1)
14213 {
14214 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
14215 ibfd, oldtag, newtag);
14216 return -1;
14217 }
14218
14219 return result;
14220 #undef T
14221 }
14222
14223 /* Query attributes object to see if integer divide instructions may be
14224 present in an object. */
14225 static bfd_boolean
14226 elf32_arm_attributes_accept_div (const obj_attribute *attr)
14227 {
14228 int arch = attr[Tag_CPU_arch].i;
14229 int profile = attr[Tag_CPU_arch_profile].i;
14230
14231 switch (attr[Tag_DIV_use].i)
14232 {
14233 case 0:
14234 /* Integer divide allowed if instruction contained in archetecture. */
14235 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
14236 return TRUE;
14237 else if (arch >= TAG_CPU_ARCH_V7E_M)
14238 return TRUE;
14239 else
14240 return FALSE;
14241
14242 case 1:
14243 /* Integer divide explicitly prohibited. */
14244 return FALSE;
14245
14246 default:
14247 /* Unrecognised case - treat as allowing divide everywhere. */
14248 case 2:
14249 /* Integer divide allowed in ARM state. */
14250 return TRUE;
14251 }
14252 }
14253
14254 /* Query attributes object to see if integer divide instructions are
14255 forbidden to be in the object. This is not the inverse of
14256 elf32_arm_attributes_accept_div. */
14257 static bfd_boolean
14258 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
14259 {
14260 return attr[Tag_DIV_use].i == 1;
14261 }
14262
14263 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
14264 are conflicting attributes. */
14265
14266 static bfd_boolean
14267 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
14268 {
14269 bfd *obfd = info->output_bfd;
14270 obj_attribute *in_attr;
14271 obj_attribute *out_attr;
14272 /* Some tags have 0 = don't care, 1 = strong requirement,
14273 2 = weak requirement. */
14274 static const int order_021[3] = {0, 2, 1};
14275 int i;
14276 bfd_boolean result = TRUE;
14277 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
14278
14279 /* Skip the linker stubs file. This preserves previous behavior
14280 of accepting unknown attributes in the first input file - but
14281 is that a bug? */
14282 if (ibfd->flags & BFD_LINKER_CREATED)
14283 return TRUE;
14284
14285 /* Skip any input that hasn't attribute section.
14286 This enables to link object files without attribute section with
14287 any others. */
14288 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
14289 return TRUE;
14290
14291 if (!elf_known_obj_attributes_proc (obfd)[0].i)
14292 {
14293 /* This is the first object. Copy the attributes. */
14294 _bfd_elf_copy_obj_attributes (ibfd, obfd);
14295
14296 out_attr = elf_known_obj_attributes_proc (obfd);
14297
14298 /* Use the Tag_null value to indicate the attributes have been
14299 initialized. */
14300 out_attr[0].i = 1;
14301
14302 /* We do not output objects with Tag_MPextension_use_legacy - we move
14303 the attribute's value to Tag_MPextension_use. */
14304 if (out_attr[Tag_MPextension_use_legacy].i != 0)
14305 {
14306 if (out_attr[Tag_MPextension_use].i != 0
14307 && out_attr[Tag_MPextension_use_legacy].i
14308 != out_attr[Tag_MPextension_use].i)
14309 {
14310 _bfd_error_handler
14311 (_("Error: %pB has both the current and legacy "
14312 "Tag_MPextension_use attributes"), ibfd);
14313 result = FALSE;
14314 }
14315
14316 out_attr[Tag_MPextension_use] =
14317 out_attr[Tag_MPextension_use_legacy];
14318 out_attr[Tag_MPextension_use_legacy].type = 0;
14319 out_attr[Tag_MPextension_use_legacy].i = 0;
14320 }
14321
14322 return result;
14323 }
14324
14325 in_attr = elf_known_obj_attributes_proc (ibfd);
14326 out_attr = elf_known_obj_attributes_proc (obfd);
14327 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
14328 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
14329 {
14330 /* Ignore mismatches if the object doesn't use floating point or is
14331 floating point ABI independent. */
14332 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
14333 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14334 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
14335 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
14336 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14337 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
14338 {
14339 _bfd_error_handler
14340 (_("error: %pB uses VFP register arguments, %pB does not"),
14341 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
14342 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
14343 result = FALSE;
14344 }
14345 }
14346
14347 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
14348 {
14349 /* Merge this attribute with existing attributes. */
14350 switch (i)
14351 {
14352 case Tag_CPU_raw_name:
14353 case Tag_CPU_name:
14354 /* These are merged after Tag_CPU_arch. */
14355 break;
14356
14357 case Tag_ABI_optimization_goals:
14358 case Tag_ABI_FP_optimization_goals:
14359 /* Use the first value seen. */
14360 break;
14361
14362 case Tag_CPU_arch:
14363 {
14364 int secondary_compat = -1, secondary_compat_out = -1;
14365 unsigned int saved_out_attr = out_attr[i].i;
14366 int arch_attr;
14367 static const char *name_table[] =
14368 {
14369 /* These aren't real CPU names, but we can't guess
14370 that from the architecture version alone. */
14371 "Pre v4",
14372 "ARM v4",
14373 "ARM v4T",
14374 "ARM v5T",
14375 "ARM v5TE",
14376 "ARM v5TEJ",
14377 "ARM v6",
14378 "ARM v6KZ",
14379 "ARM v6T2",
14380 "ARM v6K",
14381 "ARM v7",
14382 "ARM v6-M",
14383 "ARM v6S-M",
14384 "ARM v8",
14385 "",
14386 "ARM v8-M.baseline",
14387 "ARM v8-M.mainline",
14388 };
14389
14390 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
14391 secondary_compat = get_secondary_compatible_arch (ibfd);
14392 secondary_compat_out = get_secondary_compatible_arch (obfd);
14393 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
14394 &secondary_compat_out,
14395 in_attr[i].i,
14396 secondary_compat);
14397
14398 /* Return with error if failed to merge. */
14399 if (arch_attr == -1)
14400 return FALSE;
14401
14402 out_attr[i].i = arch_attr;
14403
14404 set_secondary_compatible_arch (obfd, secondary_compat_out);
14405
14406 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
14407 if (out_attr[i].i == saved_out_attr)
14408 ; /* Leave the names alone. */
14409 else if (out_attr[i].i == in_attr[i].i)
14410 {
14411 /* The output architecture has been changed to match the
14412 input architecture. Use the input names. */
14413 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
14414 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
14415 : NULL;
14416 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
14417 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
14418 : NULL;
14419 }
14420 else
14421 {
14422 out_attr[Tag_CPU_name].s = NULL;
14423 out_attr[Tag_CPU_raw_name].s = NULL;
14424 }
14425
14426 /* If we still don't have a value for Tag_CPU_name,
14427 make one up now. Tag_CPU_raw_name remains blank. */
14428 if (out_attr[Tag_CPU_name].s == NULL
14429 && out_attr[i].i < ARRAY_SIZE (name_table))
14430 out_attr[Tag_CPU_name].s =
14431 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
14432 }
14433 break;
14434
14435 case Tag_ARM_ISA_use:
14436 case Tag_THUMB_ISA_use:
14437 case Tag_WMMX_arch:
14438 case Tag_Advanced_SIMD_arch:
14439 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
14440 case Tag_ABI_FP_rounding:
14441 case Tag_ABI_FP_exceptions:
14442 case Tag_ABI_FP_user_exceptions:
14443 case Tag_ABI_FP_number_model:
14444 case Tag_FP_HP_extension:
14445 case Tag_CPU_unaligned_access:
14446 case Tag_T2EE_use:
14447 case Tag_MPextension_use:
14448 /* Use the largest value specified. */
14449 if (in_attr[i].i > out_attr[i].i)
14450 out_attr[i].i = in_attr[i].i;
14451 break;
14452
14453 case Tag_ABI_align_preserved:
14454 case Tag_ABI_PCS_RO_data:
14455 /* Use the smallest value specified. */
14456 if (in_attr[i].i < out_attr[i].i)
14457 out_attr[i].i = in_attr[i].i;
14458 break;
14459
14460 case Tag_ABI_align_needed:
14461 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
14462 && (in_attr[Tag_ABI_align_preserved].i == 0
14463 || out_attr[Tag_ABI_align_preserved].i == 0))
14464 {
14465 /* This error message should be enabled once all non-conformant
14466 binaries in the toolchain have had the attributes set
14467 properly.
14468 _bfd_error_handler
14469 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14470 obfd, ibfd);
14471 result = FALSE; */
14472 }
14473 /* Fall through. */
14474 case Tag_ABI_FP_denormal:
14475 case Tag_ABI_PCS_GOT_use:
14476 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14477 value if greater than 2 (for future-proofing). */
14478 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
14479 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
14480 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
14481 out_attr[i].i = in_attr[i].i;
14482 break;
14483
14484 case Tag_Virtualization_use:
14485 /* The virtualization tag effectively stores two bits of
14486 information: the intended use of TrustZone (in bit 0), and the
14487 intended use of Virtualization (in bit 1). */
14488 if (out_attr[i].i == 0)
14489 out_attr[i].i = in_attr[i].i;
14490 else if (in_attr[i].i != 0
14491 && in_attr[i].i != out_attr[i].i)
14492 {
14493 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
14494 out_attr[i].i = 3;
14495 else
14496 {
14497 _bfd_error_handler
14498 (_("error: %pB: unable to merge virtualization attributes "
14499 "with %pB"),
14500 obfd, ibfd);
14501 result = FALSE;
14502 }
14503 }
14504 break;
14505
14506 case Tag_CPU_arch_profile:
14507 if (out_attr[i].i != in_attr[i].i)
14508 {
14509 /* 0 will merge with anything.
14510 'A' and 'S' merge to 'A'.
14511 'R' and 'S' merge to 'R'.
14512 'M' and 'A|R|S' is an error. */
14513 if (out_attr[i].i == 0
14514 || (out_attr[i].i == 'S'
14515 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
14516 out_attr[i].i = in_attr[i].i;
14517 else if (in_attr[i].i == 0
14518 || (in_attr[i].i == 'S'
14519 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
14520 ; /* Do nothing. */
14521 else
14522 {
14523 _bfd_error_handler
14524 (_("error: %pB: conflicting architecture profiles %c/%c"),
14525 ibfd,
14526 in_attr[i].i ? in_attr[i].i : '0',
14527 out_attr[i].i ? out_attr[i].i : '0');
14528 result = FALSE;
14529 }
14530 }
14531 break;
14532
14533 case Tag_DSP_extension:
14534 /* No need to change output value if any of:
14535 - pre (<=) ARMv5T input architecture (do not have DSP)
14536 - M input profile not ARMv7E-M and do not have DSP. */
14537 if (in_attr[Tag_CPU_arch].i <= 3
14538 || (in_attr[Tag_CPU_arch_profile].i == 'M'
14539 && in_attr[Tag_CPU_arch].i != 13
14540 && in_attr[i].i == 0))
14541 ; /* Do nothing. */
14542 /* Output value should be 0 if DSP part of architecture, ie.
14543 - post (>=) ARMv5te architecture output
14544 - A, R or S profile output or ARMv7E-M output architecture. */
14545 else if (out_attr[Tag_CPU_arch].i >= 4
14546 && (out_attr[Tag_CPU_arch_profile].i == 'A'
14547 || out_attr[Tag_CPU_arch_profile].i == 'R'
14548 || out_attr[Tag_CPU_arch_profile].i == 'S'
14549 || out_attr[Tag_CPU_arch].i == 13))
14550 out_attr[i].i = 0;
14551 /* Otherwise, DSP instructions are added and not part of output
14552 architecture. */
14553 else
14554 out_attr[i].i = 1;
14555 break;
14556
14557 case Tag_FP_arch:
14558 {
14559 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14560 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14561 when it's 0. It might mean absence of FP hardware if
14562 Tag_FP_arch is zero. */
14563
14564 #define VFP_VERSION_COUNT 9
14565 static const struct
14566 {
14567 int ver;
14568 int regs;
14569 } vfp_versions[VFP_VERSION_COUNT] =
14570 {
14571 {0, 0},
14572 {1, 16},
14573 {2, 16},
14574 {3, 32},
14575 {3, 16},
14576 {4, 32},
14577 {4, 16},
14578 {8, 32},
14579 {8, 16}
14580 };
14581 int ver;
14582 int regs;
14583 int newval;
14584
14585 /* If the output has no requirement about FP hardware,
14586 follow the requirement of the input. */
14587 if (out_attr[i].i == 0)
14588 {
14589 /* This assert is still reasonable, we shouldn't
14590 produce the suspicious build attribute
14591 combination (See below for in_attr). */
14592 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
14593 out_attr[i].i = in_attr[i].i;
14594 out_attr[Tag_ABI_HardFP_use].i
14595 = in_attr[Tag_ABI_HardFP_use].i;
14596 break;
14597 }
14598 /* If the input has no requirement about FP hardware, do
14599 nothing. */
14600 else if (in_attr[i].i == 0)
14601 {
14602 /* We used to assert that Tag_ABI_HardFP_use was
14603 zero here, but we should never assert when
14604 consuming an object file that has suspicious
14605 build attributes. The single precision variant
14606 of 'no FP architecture' is still 'no FP
14607 architecture', so we just ignore the tag in this
14608 case. */
14609 break;
14610 }
14611
14612 /* Both the input and the output have nonzero Tag_FP_arch.
14613 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
14614
14615 /* If both the input and the output have zero Tag_ABI_HardFP_use,
14616 do nothing. */
14617 if (in_attr[Tag_ABI_HardFP_use].i == 0
14618 && out_attr[Tag_ABI_HardFP_use].i == 0)
14619 ;
14620 /* If the input and the output have different Tag_ABI_HardFP_use,
14621 the combination of them is 0 (implied by Tag_FP_arch). */
14622 else if (in_attr[Tag_ABI_HardFP_use].i
14623 != out_attr[Tag_ABI_HardFP_use].i)
14624 out_attr[Tag_ABI_HardFP_use].i = 0;
14625
14626 /* Now we can handle Tag_FP_arch. */
14627
14628 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14629 pick the biggest. */
14630 if (in_attr[i].i >= VFP_VERSION_COUNT
14631 && in_attr[i].i > out_attr[i].i)
14632 {
14633 out_attr[i] = in_attr[i];
14634 break;
14635 }
14636 /* The output uses the superset of input features
14637 (ISA version) and registers. */
14638 ver = vfp_versions[in_attr[i].i].ver;
14639 if (ver < vfp_versions[out_attr[i].i].ver)
14640 ver = vfp_versions[out_attr[i].i].ver;
14641 regs = vfp_versions[in_attr[i].i].regs;
14642 if (regs < vfp_versions[out_attr[i].i].regs)
14643 regs = vfp_versions[out_attr[i].i].regs;
14644 /* This assumes all possible supersets are also a valid
14645 options. */
14646 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
14647 {
14648 if (regs == vfp_versions[newval].regs
14649 && ver == vfp_versions[newval].ver)
14650 break;
14651 }
14652 out_attr[i].i = newval;
14653 }
14654 break;
14655 case Tag_PCS_config:
14656 if (out_attr[i].i == 0)
14657 out_attr[i].i = in_attr[i].i;
14658 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
14659 {
14660 /* It's sometimes ok to mix different configs, so this is only
14661 a warning. */
14662 _bfd_error_handler
14663 (_("warning: %pB: conflicting platform configuration"), ibfd);
14664 }
14665 break;
14666 case Tag_ABI_PCS_R9_use:
14667 if (in_attr[i].i != out_attr[i].i
14668 && out_attr[i].i != AEABI_R9_unused
14669 && in_attr[i].i != AEABI_R9_unused)
14670 {
14671 _bfd_error_handler
14672 (_("error: %pB: conflicting use of R9"), ibfd);
14673 result = FALSE;
14674 }
14675 if (out_attr[i].i == AEABI_R9_unused)
14676 out_attr[i].i = in_attr[i].i;
14677 break;
14678 case Tag_ABI_PCS_RW_data:
14679 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
14680 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
14681 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
14682 {
14683 _bfd_error_handler
14684 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14685 ibfd);
14686 result = FALSE;
14687 }
14688 /* Use the smallest value specified. */
14689 if (in_attr[i].i < out_attr[i].i)
14690 out_attr[i].i = in_attr[i].i;
14691 break;
14692 case Tag_ABI_PCS_wchar_t:
14693 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
14694 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
14695 {
14696 _bfd_error_handler
14697 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14698 ibfd, in_attr[i].i, out_attr[i].i);
14699 }
14700 else if (in_attr[i].i && !out_attr[i].i)
14701 out_attr[i].i = in_attr[i].i;
14702 break;
14703 case Tag_ABI_enum_size:
14704 if (in_attr[i].i != AEABI_enum_unused)
14705 {
14706 if (out_attr[i].i == AEABI_enum_unused
14707 || out_attr[i].i == AEABI_enum_forced_wide)
14708 {
14709 /* The existing object is compatible with anything.
14710 Use whatever requirements the new object has. */
14711 out_attr[i].i = in_attr[i].i;
14712 }
14713 else if (in_attr[i].i != AEABI_enum_forced_wide
14714 && out_attr[i].i != in_attr[i].i
14715 && !elf_arm_tdata (obfd)->no_enum_size_warning)
14716 {
14717 static const char *aeabi_enum_names[] =
14718 { "", "variable-size", "32-bit", "" };
14719 const char *in_name =
14720 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14721 ? aeabi_enum_names[in_attr[i].i]
14722 : "<unknown>";
14723 const char *out_name =
14724 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14725 ? aeabi_enum_names[out_attr[i].i]
14726 : "<unknown>";
14727 _bfd_error_handler
14728 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14729 ibfd, in_name, out_name);
14730 }
14731 }
14732 break;
14733 case Tag_ABI_VFP_args:
14734 /* Aready done. */
14735 break;
14736 case Tag_ABI_WMMX_args:
14737 if (in_attr[i].i != out_attr[i].i)
14738 {
14739 _bfd_error_handler
14740 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14741 ibfd, obfd);
14742 result = FALSE;
14743 }
14744 break;
14745 case Tag_compatibility:
14746 /* Merged in target-independent code. */
14747 break;
14748 case Tag_ABI_HardFP_use:
14749 /* This is handled along with Tag_FP_arch. */
14750 break;
14751 case Tag_ABI_FP_16bit_format:
14752 if (in_attr[i].i != 0 && out_attr[i].i != 0)
14753 {
14754 if (in_attr[i].i != out_attr[i].i)
14755 {
14756 _bfd_error_handler
14757 (_("error: fp16 format mismatch between %pB and %pB"),
14758 ibfd, obfd);
14759 result = FALSE;
14760 }
14761 }
14762 if (in_attr[i].i != 0)
14763 out_attr[i].i = in_attr[i].i;
14764 break;
14765
14766 case Tag_DIV_use:
14767 /* A value of zero on input means that the divide instruction may
14768 be used if available in the base architecture as specified via
14769 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14770 the user did not want divide instructions. A value of 2
14771 explicitly means that divide instructions were allowed in ARM
14772 and Thumb state. */
14773 if (in_attr[i].i == out_attr[i].i)
14774 /* Do nothing. */ ;
14775 else if (elf32_arm_attributes_forbid_div (in_attr)
14776 && !elf32_arm_attributes_accept_div (out_attr))
14777 out_attr[i].i = 1;
14778 else if (elf32_arm_attributes_forbid_div (out_attr)
14779 && elf32_arm_attributes_accept_div (in_attr))
14780 out_attr[i].i = in_attr[i].i;
14781 else if (in_attr[i].i == 2)
14782 out_attr[i].i = in_attr[i].i;
14783 break;
14784
14785 case Tag_MPextension_use_legacy:
14786 /* We don't output objects with Tag_MPextension_use_legacy - we
14787 move the value to Tag_MPextension_use. */
14788 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
14789 {
14790 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
14791 {
14792 _bfd_error_handler
14793 (_("%pB has both the current and legacy "
14794 "Tag_MPextension_use attributes"),
14795 ibfd);
14796 result = FALSE;
14797 }
14798 }
14799
14800 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
14801 out_attr[Tag_MPextension_use] = in_attr[i];
14802
14803 break;
14804
14805 case Tag_nodefaults:
14806 /* This tag is set if it exists, but the value is unused (and is
14807 typically zero). We don't actually need to do anything here -
14808 the merge happens automatically when the type flags are merged
14809 below. */
14810 break;
14811 case Tag_also_compatible_with:
14812 /* Already done in Tag_CPU_arch. */
14813 break;
14814 case Tag_conformance:
14815 /* Keep the attribute if it matches. Throw it away otherwise.
14816 No attribute means no claim to conform. */
14817 if (!in_attr[i].s || !out_attr[i].s
14818 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
14819 out_attr[i].s = NULL;
14820 break;
14821
14822 default:
14823 result
14824 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
14825 }
14826
14827 /* If out_attr was copied from in_attr then it won't have a type yet. */
14828 if (in_attr[i].type && !out_attr[i].type)
14829 out_attr[i].type = in_attr[i].type;
14830 }
14831
14832 /* Merge Tag_compatibility attributes and any common GNU ones. */
14833 if (!_bfd_elf_merge_object_attributes (ibfd, info))
14834 return FALSE;
14835
14836 /* Check for any attributes not known on ARM. */
14837 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
14838
14839 return result;
14840 }
14841
14842
14843 /* Return TRUE if the two EABI versions are incompatible. */
14844
14845 static bfd_boolean
14846 elf32_arm_versions_compatible (unsigned iver, unsigned over)
14847 {
14848 /* v4 and v5 are the same spec before and after it was released,
14849 so allow mixing them. */
14850 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
14851 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
14852 return TRUE;
14853
14854 return (iver == over);
14855 }
14856
14857 /* Merge backend specific data from an object file to the output
14858 object file when linking. */
14859
14860 static bfd_boolean
14861 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
14862
14863 /* Display the flags field. */
14864
14865 static bfd_boolean
14866 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
14867 {
14868 FILE * file = (FILE *) ptr;
14869 unsigned long flags;
14870
14871 BFD_ASSERT (abfd != NULL && ptr != NULL);
14872
14873 /* Print normal ELF private data. */
14874 _bfd_elf_print_private_bfd_data (abfd, ptr);
14875
14876 flags = elf_elfheader (abfd)->e_flags;
14877 /* Ignore init flag - it may not be set, despite the flags field
14878 containing valid data. */
14879
14880 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
14881
14882 switch (EF_ARM_EABI_VERSION (flags))
14883 {
14884 case EF_ARM_EABI_UNKNOWN:
14885 /* The following flag bits are GNU extensions and not part of the
14886 official ARM ELF extended ABI. Hence they are only decoded if
14887 the EABI version is not set. */
14888 if (flags & EF_ARM_INTERWORK)
14889 fprintf (file, _(" [interworking enabled]"));
14890
14891 if (flags & EF_ARM_APCS_26)
14892 fprintf (file, " [APCS-26]");
14893 else
14894 fprintf (file, " [APCS-32]");
14895
14896 if (flags & EF_ARM_VFP_FLOAT)
14897 fprintf (file, _(" [VFP float format]"));
14898 else if (flags & EF_ARM_MAVERICK_FLOAT)
14899 fprintf (file, _(" [Maverick float format]"));
14900 else
14901 fprintf (file, _(" [FPA float format]"));
14902
14903 if (flags & EF_ARM_APCS_FLOAT)
14904 fprintf (file, _(" [floats passed in float registers]"));
14905
14906 if (flags & EF_ARM_PIC)
14907 fprintf (file, _(" [position independent]"));
14908
14909 if (flags & EF_ARM_NEW_ABI)
14910 fprintf (file, _(" [new ABI]"));
14911
14912 if (flags & EF_ARM_OLD_ABI)
14913 fprintf (file, _(" [old ABI]"));
14914
14915 if (flags & EF_ARM_SOFT_FLOAT)
14916 fprintf (file, _(" [software FP]"));
14917
14918 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
14919 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
14920 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
14921 | EF_ARM_MAVERICK_FLOAT);
14922 break;
14923
14924 case EF_ARM_EABI_VER1:
14925 fprintf (file, _(" [Version1 EABI]"));
14926
14927 if (flags & EF_ARM_SYMSARESORTED)
14928 fprintf (file, _(" [sorted symbol table]"));
14929 else
14930 fprintf (file, _(" [unsorted symbol table]"));
14931
14932 flags &= ~ EF_ARM_SYMSARESORTED;
14933 break;
14934
14935 case EF_ARM_EABI_VER2:
14936 fprintf (file, _(" [Version2 EABI]"));
14937
14938 if (flags & EF_ARM_SYMSARESORTED)
14939 fprintf (file, _(" [sorted symbol table]"));
14940 else
14941 fprintf (file, _(" [unsorted symbol table]"));
14942
14943 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
14944 fprintf (file, _(" [dynamic symbols use segment index]"));
14945
14946 if (flags & EF_ARM_MAPSYMSFIRST)
14947 fprintf (file, _(" [mapping symbols precede others]"));
14948
14949 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
14950 | EF_ARM_MAPSYMSFIRST);
14951 break;
14952
14953 case EF_ARM_EABI_VER3:
14954 fprintf (file, _(" [Version3 EABI]"));
14955 break;
14956
14957 case EF_ARM_EABI_VER4:
14958 fprintf (file, _(" [Version4 EABI]"));
14959 goto eabi;
14960
14961 case EF_ARM_EABI_VER5:
14962 fprintf (file, _(" [Version5 EABI]"));
14963
14964 if (flags & EF_ARM_ABI_FLOAT_SOFT)
14965 fprintf (file, _(" [soft-float ABI]"));
14966
14967 if (flags & EF_ARM_ABI_FLOAT_HARD)
14968 fprintf (file, _(" [hard-float ABI]"));
14969
14970 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
14971
14972 eabi:
14973 if (flags & EF_ARM_BE8)
14974 fprintf (file, _(" [BE8]"));
14975
14976 if (flags & EF_ARM_LE8)
14977 fprintf (file, _(" [LE8]"));
14978
14979 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
14980 break;
14981
14982 default:
14983 fprintf (file, _(" <EABI version unrecognised>"));
14984 break;
14985 }
14986
14987 flags &= ~ EF_ARM_EABIMASK;
14988
14989 if (flags & EF_ARM_RELEXEC)
14990 fprintf (file, _(" [relocatable executable]"));
14991
14992 if (flags & EF_ARM_PIC)
14993 fprintf (file, _(" [position independent]"));
14994
14995 if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC)
14996 fprintf (file, _(" [FDPIC ABI supplement]"));
14997
14998 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC);
14999
15000 if (flags)
15001 fprintf (file, _("<Unrecognised flag bits set>"));
15002
15003 fputc ('\n', file);
15004
15005 return TRUE;
15006 }
15007
15008 static int
15009 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
15010 {
15011 switch (ELF_ST_TYPE (elf_sym->st_info))
15012 {
15013 case STT_ARM_TFUNC:
15014 return ELF_ST_TYPE (elf_sym->st_info);
15015
15016 case STT_ARM_16BIT:
15017 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
15018 This allows us to distinguish between data used by Thumb instructions
15019 and non-data (which is probably code) inside Thumb regions of an
15020 executable. */
15021 if (type != STT_OBJECT && type != STT_TLS)
15022 return ELF_ST_TYPE (elf_sym->st_info);
15023 break;
15024
15025 default:
15026 break;
15027 }
15028
15029 return type;
15030 }
15031
15032 static asection *
15033 elf32_arm_gc_mark_hook (asection *sec,
15034 struct bfd_link_info *info,
15035 Elf_Internal_Rela *rel,
15036 struct elf_link_hash_entry *h,
15037 Elf_Internal_Sym *sym)
15038 {
15039 if (h != NULL)
15040 switch (ELF32_R_TYPE (rel->r_info))
15041 {
15042 case R_ARM_GNU_VTINHERIT:
15043 case R_ARM_GNU_VTENTRY:
15044 return NULL;
15045 }
15046
15047 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
15048 }
15049
15050 /* Look through the relocs for a section during the first phase. */
15051
15052 static bfd_boolean
15053 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
15054 asection *sec, const Elf_Internal_Rela *relocs)
15055 {
15056 Elf_Internal_Shdr *symtab_hdr;
15057 struct elf_link_hash_entry **sym_hashes;
15058 const Elf_Internal_Rela *rel;
15059 const Elf_Internal_Rela *rel_end;
15060 bfd *dynobj;
15061 asection *sreloc;
15062 struct elf32_arm_link_hash_table *htab;
15063 bfd_boolean call_reloc_p;
15064 bfd_boolean may_become_dynamic_p;
15065 bfd_boolean may_need_local_target_p;
15066 unsigned long nsyms;
15067
15068 if (bfd_link_relocatable (info))
15069 return TRUE;
15070
15071 BFD_ASSERT (is_arm_elf (abfd));
15072
15073 htab = elf32_arm_hash_table (info);
15074 if (htab == NULL)
15075 return FALSE;
15076
15077 sreloc = NULL;
15078
15079 /* Create dynamic sections for relocatable executables so that we can
15080 copy relocations. */
15081 if (htab->root.is_relocatable_executable
15082 && ! htab->root.dynamic_sections_created)
15083 {
15084 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
15085 return FALSE;
15086 }
15087
15088 if (htab->root.dynobj == NULL)
15089 htab->root.dynobj = abfd;
15090 if (!create_ifunc_sections (info))
15091 return FALSE;
15092
15093 dynobj = htab->root.dynobj;
15094
15095 symtab_hdr = & elf_symtab_hdr (abfd);
15096 sym_hashes = elf_sym_hashes (abfd);
15097 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
15098
15099 rel_end = relocs + sec->reloc_count;
15100 for (rel = relocs; rel < rel_end; rel++)
15101 {
15102 Elf_Internal_Sym *isym;
15103 struct elf_link_hash_entry *h;
15104 struct elf32_arm_link_hash_entry *eh;
15105 unsigned int r_symndx;
15106 int r_type;
15107
15108 r_symndx = ELF32_R_SYM (rel->r_info);
15109 r_type = ELF32_R_TYPE (rel->r_info);
15110 r_type = arm_real_reloc_type (htab, r_type);
15111
15112 if (r_symndx >= nsyms
15113 /* PR 9934: It is possible to have relocations that do not
15114 refer to symbols, thus it is also possible to have an
15115 object file containing relocations but no symbol table. */
15116 && (r_symndx > STN_UNDEF || nsyms > 0))
15117 {
15118 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
15119 r_symndx);
15120 return FALSE;
15121 }
15122
15123 h = NULL;
15124 isym = NULL;
15125 if (nsyms > 0)
15126 {
15127 if (r_symndx < symtab_hdr->sh_info)
15128 {
15129 /* A local symbol. */
15130 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
15131 abfd, r_symndx);
15132 if (isym == NULL)
15133 return FALSE;
15134 }
15135 else
15136 {
15137 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
15138 while (h->root.type == bfd_link_hash_indirect
15139 || h->root.type == bfd_link_hash_warning)
15140 h = (struct elf_link_hash_entry *) h->root.u.i.link;
15141 }
15142 }
15143
15144 eh = (struct elf32_arm_link_hash_entry *) h;
15145
15146 call_reloc_p = FALSE;
15147 may_become_dynamic_p = FALSE;
15148 may_need_local_target_p = FALSE;
15149
15150 /* Could be done earlier, if h were already available. */
15151 r_type = elf32_arm_tls_transition (info, r_type, h);
15152 switch (r_type)
15153 {
15154 case R_ARM_GOTOFFFUNCDESC:
15155 {
15156 if (h == NULL)
15157 {
15158 if (!elf32_arm_allocate_local_sym_info (abfd))
15159 return FALSE;
15160 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].gotofffuncdesc_cnt += 1;
15161 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
15162 }
15163 else
15164 {
15165 eh->fdpic_cnts.gotofffuncdesc_cnt++;
15166 }
15167 }
15168 break;
15169
15170 case R_ARM_GOTFUNCDESC:
15171 {
15172 if (h == NULL)
15173 {
15174 /* Such a relocation is not supposed to be generated
15175 by gcc on a static function. */
15176 /* Anyway if needed it could be handled. */
15177 abort();
15178 }
15179 else
15180 {
15181 eh->fdpic_cnts.gotfuncdesc_cnt++;
15182 }
15183 }
15184 break;
15185
15186 case R_ARM_FUNCDESC:
15187 {
15188 if (h == NULL)
15189 {
15190 if (!elf32_arm_allocate_local_sym_info (abfd))
15191 return FALSE;
15192 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_cnt += 1;
15193 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
15194 }
15195 else
15196 {
15197 eh->fdpic_cnts.funcdesc_cnt++;
15198 }
15199 }
15200 break;
15201
15202 case R_ARM_GOT32:
15203 case R_ARM_GOT_PREL:
15204 case R_ARM_TLS_GD32:
15205 case R_ARM_TLS_GD32_FDPIC:
15206 case R_ARM_TLS_IE32:
15207 case R_ARM_TLS_IE32_FDPIC:
15208 case R_ARM_TLS_GOTDESC:
15209 case R_ARM_TLS_DESCSEQ:
15210 case R_ARM_THM_TLS_DESCSEQ:
15211 case R_ARM_TLS_CALL:
15212 case R_ARM_THM_TLS_CALL:
15213 /* This symbol requires a global offset table entry. */
15214 {
15215 int tls_type, old_tls_type;
15216
15217 switch (r_type)
15218 {
15219 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
15220 case R_ARM_TLS_GD32_FDPIC: tls_type = GOT_TLS_GD; break;
15221
15222 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
15223 case R_ARM_TLS_IE32_FDPIC: tls_type = GOT_TLS_IE; break;
15224
15225 case R_ARM_TLS_GOTDESC:
15226 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
15227 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
15228 tls_type = GOT_TLS_GDESC; break;
15229
15230 default: tls_type = GOT_NORMAL; break;
15231 }
15232
15233 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
15234 info->flags |= DF_STATIC_TLS;
15235
15236 if (h != NULL)
15237 {
15238 h->got.refcount++;
15239 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
15240 }
15241 else
15242 {
15243 /* This is a global offset table entry for a local symbol. */
15244 if (!elf32_arm_allocate_local_sym_info (abfd))
15245 return FALSE;
15246 elf_local_got_refcounts (abfd)[r_symndx] += 1;
15247 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
15248 }
15249
15250 /* If a variable is accessed with both tls methods, two
15251 slots may be created. */
15252 if (GOT_TLS_GD_ANY_P (old_tls_type)
15253 && GOT_TLS_GD_ANY_P (tls_type))
15254 tls_type |= old_tls_type;
15255
15256 /* We will already have issued an error message if there
15257 is a TLS/non-TLS mismatch, based on the symbol
15258 type. So just combine any TLS types needed. */
15259 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
15260 && tls_type != GOT_NORMAL)
15261 tls_type |= old_tls_type;
15262
15263 /* If the symbol is accessed in both IE and GDESC
15264 method, we're able to relax. Turn off the GDESC flag,
15265 without messing up with any other kind of tls types
15266 that may be involved. */
15267 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
15268 tls_type &= ~GOT_TLS_GDESC;
15269
15270 if (old_tls_type != tls_type)
15271 {
15272 if (h != NULL)
15273 elf32_arm_hash_entry (h)->tls_type = tls_type;
15274 else
15275 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
15276 }
15277 }
15278 /* Fall through. */
15279
15280 case R_ARM_TLS_LDM32:
15281 case R_ARM_TLS_LDM32_FDPIC:
15282 if (r_type == R_ARM_TLS_LDM32 || r_type == R_ARM_TLS_LDM32_FDPIC)
15283 htab->tls_ldm_got.refcount++;
15284 /* Fall through. */
15285
15286 case R_ARM_GOTOFF32:
15287 case R_ARM_GOTPC:
15288 if (htab->root.sgot == NULL
15289 && !create_got_section (htab->root.dynobj, info))
15290 return FALSE;
15291 break;
15292
15293 case R_ARM_PC24:
15294 case R_ARM_PLT32:
15295 case R_ARM_CALL:
15296 case R_ARM_JUMP24:
15297 case R_ARM_PREL31:
15298 case R_ARM_THM_CALL:
15299 case R_ARM_THM_JUMP24:
15300 case R_ARM_THM_JUMP19:
15301 call_reloc_p = TRUE;
15302 may_need_local_target_p = TRUE;
15303 break;
15304
15305 case R_ARM_ABS12:
15306 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15307 ldr __GOTT_INDEX__ offsets. */
15308 if (!htab->vxworks_p)
15309 {
15310 may_need_local_target_p = TRUE;
15311 break;
15312 }
15313 else goto jump_over;
15314
15315 /* Fall through. */
15316
15317 case R_ARM_MOVW_ABS_NC:
15318 case R_ARM_MOVT_ABS:
15319 case R_ARM_THM_MOVW_ABS_NC:
15320 case R_ARM_THM_MOVT_ABS:
15321 if (bfd_link_pic (info))
15322 {
15323 _bfd_error_handler
15324 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15325 abfd, elf32_arm_howto_table_1[r_type].name,
15326 (h) ? h->root.root.string : "a local symbol");
15327 bfd_set_error (bfd_error_bad_value);
15328 return FALSE;
15329 }
15330
15331 /* Fall through. */
15332 case R_ARM_ABS32:
15333 case R_ARM_ABS32_NOI:
15334 jump_over:
15335 if (h != NULL && bfd_link_executable (info))
15336 {
15337 h->pointer_equality_needed = 1;
15338 }
15339 /* Fall through. */
15340 case R_ARM_REL32:
15341 case R_ARM_REL32_NOI:
15342 case R_ARM_MOVW_PREL_NC:
15343 case R_ARM_MOVT_PREL:
15344 case R_ARM_THM_MOVW_PREL_NC:
15345 case R_ARM_THM_MOVT_PREL:
15346
15347 /* Should the interworking branches be listed here? */
15348 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable
15349 || htab->fdpic_p)
15350 && (sec->flags & SEC_ALLOC) != 0)
15351 {
15352 if (h == NULL
15353 && elf32_arm_howto_from_type (r_type)->pc_relative)
15354 {
15355 /* In shared libraries and relocatable executables,
15356 we treat local relative references as calls;
15357 see the related SYMBOL_CALLS_LOCAL code in
15358 allocate_dynrelocs. */
15359 call_reloc_p = TRUE;
15360 may_need_local_target_p = TRUE;
15361 }
15362 else
15363 /* We are creating a shared library or relocatable
15364 executable, and this is a reloc against a global symbol,
15365 or a non-PC-relative reloc against a local symbol.
15366 We may need to copy the reloc into the output. */
15367 may_become_dynamic_p = TRUE;
15368 }
15369 else
15370 may_need_local_target_p = TRUE;
15371 break;
15372
15373 /* This relocation describes the C++ object vtable hierarchy.
15374 Reconstruct it for later use during GC. */
15375 case R_ARM_GNU_VTINHERIT:
15376 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
15377 return FALSE;
15378 break;
15379
15380 /* This relocation describes which C++ vtable entries are actually
15381 used. Record for later use during GC. */
15382 case R_ARM_GNU_VTENTRY:
15383 BFD_ASSERT (h != NULL);
15384 if (h != NULL
15385 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
15386 return FALSE;
15387 break;
15388 }
15389
15390 if (h != NULL)
15391 {
15392 if (call_reloc_p)
15393 /* We may need a .plt entry if the function this reloc
15394 refers to is in a different object, regardless of the
15395 symbol's type. We can't tell for sure yet, because
15396 something later might force the symbol local. */
15397 h->needs_plt = 1;
15398 else if (may_need_local_target_p)
15399 /* If this reloc is in a read-only section, we might
15400 need a copy reloc. We can't check reliably at this
15401 stage whether the section is read-only, as input
15402 sections have not yet been mapped to output sections.
15403 Tentatively set the flag for now, and correct in
15404 adjust_dynamic_symbol. */
15405 h->non_got_ref = 1;
15406 }
15407
15408 if (may_need_local_target_p
15409 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
15410 {
15411 union gotplt_union *root_plt;
15412 struct arm_plt_info *arm_plt;
15413 struct arm_local_iplt_info *local_iplt;
15414
15415 if (h != NULL)
15416 {
15417 root_plt = &h->plt;
15418 arm_plt = &eh->plt;
15419 }
15420 else
15421 {
15422 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
15423 if (local_iplt == NULL)
15424 return FALSE;
15425 root_plt = &local_iplt->root;
15426 arm_plt = &local_iplt->arm;
15427 }
15428
15429 /* If the symbol is a function that doesn't bind locally,
15430 this relocation will need a PLT entry. */
15431 if (root_plt->refcount != -1)
15432 root_plt->refcount += 1;
15433
15434 if (!call_reloc_p)
15435 arm_plt->noncall_refcount++;
15436
15437 /* It's too early to use htab->use_blx here, so we have to
15438 record possible blx references separately from
15439 relocs that definitely need a thumb stub. */
15440
15441 if (r_type == R_ARM_THM_CALL)
15442 arm_plt->maybe_thumb_refcount += 1;
15443
15444 if (r_type == R_ARM_THM_JUMP24
15445 || r_type == R_ARM_THM_JUMP19)
15446 arm_plt->thumb_refcount += 1;
15447 }
15448
15449 if (may_become_dynamic_p)
15450 {
15451 struct elf_dyn_relocs *p, **head;
15452
15453 /* Create a reloc section in dynobj. */
15454 if (sreloc == NULL)
15455 {
15456 sreloc = _bfd_elf_make_dynamic_reloc_section
15457 (sec, dynobj, 2, abfd, ! htab->use_rel);
15458
15459 if (sreloc == NULL)
15460 return FALSE;
15461
15462 /* BPABI objects never have dynamic relocations mapped. */
15463 if (htab->symbian_p)
15464 {
15465 flagword flags;
15466
15467 flags = bfd_get_section_flags (dynobj, sreloc);
15468 flags &= ~(SEC_LOAD | SEC_ALLOC);
15469 bfd_set_section_flags (dynobj, sreloc, flags);
15470 }
15471 }
15472
15473 /* If this is a global symbol, count the number of
15474 relocations we need for this symbol. */
15475 if (h != NULL)
15476 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
15477 else
15478 {
15479 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
15480 if (head == NULL)
15481 return FALSE;
15482 }
15483
15484 p = *head;
15485 if (p == NULL || p->sec != sec)
15486 {
15487 bfd_size_type amt = sizeof *p;
15488
15489 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
15490 if (p == NULL)
15491 return FALSE;
15492 p->next = *head;
15493 *head = p;
15494 p->sec = sec;
15495 p->count = 0;
15496 p->pc_count = 0;
15497 }
15498
15499 if (elf32_arm_howto_from_type (r_type)->pc_relative)
15500 p->pc_count += 1;
15501 p->count += 1;
15502 if (h == NULL && htab->fdpic_p && !bfd_link_pic(info)
15503 && r_type != R_ARM_ABS32 && r_type != R_ARM_ABS32_NOI) {
15504 /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15505 that will become rofixup. */
15506 /* This is due to the fact that we suppose all will become rofixup. */
15507 fprintf(stderr, "FDPIC does not yet support %d relocation to become dynamic for executable\n", r_type);
15508 _bfd_error_handler
15509 (_("FDPIC does not yet support %s relocation"
15510 " to become dynamic for executable"),
15511 elf32_arm_howto_table_1[r_type].name);
15512 abort();
15513 }
15514 }
15515 }
15516
15517 return TRUE;
15518 }
15519
15520 static void
15521 elf32_arm_update_relocs (asection *o,
15522 struct bfd_elf_section_reloc_data *reldata)
15523 {
15524 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
15525 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
15526 const struct elf_backend_data *bed;
15527 _arm_elf_section_data *eado;
15528 struct bfd_link_order *p;
15529 bfd_byte *erela_head, *erela;
15530 Elf_Internal_Rela *irela_head, *irela;
15531 Elf_Internal_Shdr *rel_hdr;
15532 bfd *abfd;
15533 unsigned int count;
15534
15535 eado = get_arm_elf_section_data (o);
15536
15537 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
15538 return;
15539
15540 abfd = o->owner;
15541 bed = get_elf_backend_data (abfd);
15542 rel_hdr = reldata->hdr;
15543
15544 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
15545 {
15546 swap_in = bed->s->swap_reloc_in;
15547 swap_out = bed->s->swap_reloc_out;
15548 }
15549 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
15550 {
15551 swap_in = bed->s->swap_reloca_in;
15552 swap_out = bed->s->swap_reloca_out;
15553 }
15554 else
15555 abort ();
15556
15557 erela_head = rel_hdr->contents;
15558 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
15559 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
15560
15561 erela = erela_head;
15562 irela = irela_head;
15563 count = 0;
15564
15565 for (p = o->map_head.link_order; p; p = p->next)
15566 {
15567 if (p->type == bfd_section_reloc_link_order
15568 || p->type == bfd_symbol_reloc_link_order)
15569 {
15570 (*swap_in) (abfd, erela, irela);
15571 erela += rel_hdr->sh_entsize;
15572 irela++;
15573 count++;
15574 }
15575 else if (p->type == bfd_indirect_link_order)
15576 {
15577 struct bfd_elf_section_reloc_data *input_reldata;
15578 arm_unwind_table_edit *edit_list, *edit_tail;
15579 _arm_elf_section_data *eadi;
15580 bfd_size_type j;
15581 bfd_vma offset;
15582 asection *i;
15583
15584 i = p->u.indirect.section;
15585
15586 eadi = get_arm_elf_section_data (i);
15587 edit_list = eadi->u.exidx.unwind_edit_list;
15588 edit_tail = eadi->u.exidx.unwind_edit_tail;
15589 offset = o->vma + i->output_offset;
15590
15591 if (eadi->elf.rel.hdr &&
15592 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
15593 input_reldata = &eadi->elf.rel;
15594 else if (eadi->elf.rela.hdr &&
15595 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
15596 input_reldata = &eadi->elf.rela;
15597 else
15598 abort ();
15599
15600 if (edit_list)
15601 {
15602 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15603 {
15604 arm_unwind_table_edit *edit_node, *edit_next;
15605 bfd_vma bias;
15606 bfd_vma reloc_index;
15607
15608 (*swap_in) (abfd, erela, irela);
15609 reloc_index = (irela->r_offset - offset) / 8;
15610
15611 bias = 0;
15612 edit_node = edit_list;
15613 for (edit_next = edit_list;
15614 edit_next && edit_next->index <= reloc_index;
15615 edit_next = edit_node->next)
15616 {
15617 bias++;
15618 edit_node = edit_next;
15619 }
15620
15621 if (edit_node->type != DELETE_EXIDX_ENTRY
15622 || edit_node->index != reloc_index)
15623 {
15624 irela->r_offset -= bias * 8;
15625 irela++;
15626 count++;
15627 }
15628
15629 erela += rel_hdr->sh_entsize;
15630 }
15631
15632 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
15633 {
15634 /* New relocation entity. */
15635 asection *text_sec = edit_tail->linked_section;
15636 asection *text_out = text_sec->output_section;
15637 bfd_vma exidx_offset = offset + i->size - 8;
15638
15639 irela->r_addend = 0;
15640 irela->r_offset = exidx_offset;
15641 irela->r_info = ELF32_R_INFO
15642 (text_out->target_index, R_ARM_PREL31);
15643 irela++;
15644 count++;
15645 }
15646 }
15647 else
15648 {
15649 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15650 {
15651 (*swap_in) (abfd, erela, irela);
15652 erela += rel_hdr->sh_entsize;
15653 irela++;
15654 }
15655
15656 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15657 }
15658 }
15659 }
15660
15661 reldata->count = count;
15662 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15663
15664 erela = erela_head;
15665 irela = irela_head;
15666 while (count > 0)
15667 {
15668 (*swap_out) (abfd, irela, erela);
15669 erela += rel_hdr->sh_entsize;
15670 irela++;
15671 count--;
15672 }
15673
15674 free (irela_head);
15675
15676 /* Hashes are no longer valid. */
15677 free (reldata->hashes);
15678 reldata->hashes = NULL;
15679 }
15680
15681 /* Unwinding tables are not referenced directly. This pass marks them as
15682 required if the corresponding code section is marked. Similarly, ARMv8-M
15683 secure entry functions can only be referenced by SG veneers which are
15684 created after the GC process. They need to be marked in case they reside in
15685 their own section (as would be the case if code was compiled with
15686 -ffunction-sections). */
15687
15688 static bfd_boolean
15689 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15690 elf_gc_mark_hook_fn gc_mark_hook)
15691 {
15692 bfd *sub;
15693 Elf_Internal_Shdr **elf_shdrp;
15694 asection *cmse_sec;
15695 obj_attribute *out_attr;
15696 Elf_Internal_Shdr *symtab_hdr;
15697 unsigned i, sym_count, ext_start;
15698 const struct elf_backend_data *bed;
15699 struct elf_link_hash_entry **sym_hashes;
15700 struct elf32_arm_link_hash_entry *cmse_hash;
15701 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
15702
15703 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15704
15705 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15706 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15707 && out_attr[Tag_CPU_arch_profile].i == 'M';
15708
15709 /* Marking EH data may cause additional code sections to be marked,
15710 requiring multiple passes. */
15711 again = TRUE;
15712 while (again)
15713 {
15714 again = FALSE;
15715 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15716 {
15717 asection *o;
15718
15719 if (! is_arm_elf (sub))
15720 continue;
15721
15722 elf_shdrp = elf_elfsections (sub);
15723 for (o = sub->sections; o != NULL; o = o->next)
15724 {
15725 Elf_Internal_Shdr *hdr;
15726
15727 hdr = &elf_section_data (o)->this_hdr;
15728 if (hdr->sh_type == SHT_ARM_EXIDX
15729 && hdr->sh_link
15730 && hdr->sh_link < elf_numsections (sub)
15731 && !o->gc_mark
15732 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15733 {
15734 again = TRUE;
15735 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15736 return FALSE;
15737 }
15738 }
15739
15740 /* Mark section holding ARMv8-M secure entry functions. We mark all
15741 of them so no need for a second browsing. */
15742 if (is_v8m && first_bfd_browse)
15743 {
15744 sym_hashes = elf_sym_hashes (sub);
15745 bed = get_elf_backend_data (sub);
15746 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15747 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15748 ext_start = symtab_hdr->sh_info;
15749
15750 /* Scan symbols. */
15751 for (i = ext_start; i < sym_count; i++)
15752 {
15753 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15754
15755 /* Assume it is a special symbol. If not, cmse_scan will
15756 warn about it and user can do something about it. */
15757 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
15758 {
15759 cmse_sec = cmse_hash->root.root.u.def.section;
15760 if (!cmse_sec->gc_mark
15761 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15762 return FALSE;
15763 }
15764 }
15765 }
15766 }
15767 first_bfd_browse = FALSE;
15768 }
15769
15770 return TRUE;
15771 }
15772
15773 /* Treat mapping symbols as special target symbols. */
15774
15775 static bfd_boolean
15776 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
15777 {
15778 return bfd_is_arm_special_symbol_name (sym->name,
15779 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
15780 }
15781
15782 /* This is a copy of elf_find_function() from elf.c except that
15783 ARM mapping symbols are ignored when looking for function names
15784 and STT_ARM_TFUNC is considered to a function type. */
15785
15786 static bfd_boolean
15787 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
15788 asymbol ** symbols,
15789 asection * section,
15790 bfd_vma offset,
15791 const char ** filename_ptr,
15792 const char ** functionname_ptr)
15793 {
15794 const char * filename = NULL;
15795 asymbol * func = NULL;
15796 bfd_vma low_func = 0;
15797 asymbol ** p;
15798
15799 for (p = symbols; *p != NULL; p++)
15800 {
15801 elf_symbol_type *q;
15802
15803 q = (elf_symbol_type *) *p;
15804
15805 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
15806 {
15807 default:
15808 break;
15809 case STT_FILE:
15810 filename = bfd_asymbol_name (&q->symbol);
15811 break;
15812 case STT_FUNC:
15813 case STT_ARM_TFUNC:
15814 case STT_NOTYPE:
15815 /* Skip mapping symbols. */
15816 if ((q->symbol.flags & BSF_LOCAL)
15817 && bfd_is_arm_special_symbol_name (q->symbol.name,
15818 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
15819 continue;
15820 /* Fall through. */
15821 if (bfd_get_section (&q->symbol) == section
15822 && q->symbol.value >= low_func
15823 && q->symbol.value <= offset)
15824 {
15825 func = (asymbol *) q;
15826 low_func = q->symbol.value;
15827 }
15828 break;
15829 }
15830 }
15831
15832 if (func == NULL)
15833 return FALSE;
15834
15835 if (filename_ptr)
15836 *filename_ptr = filename;
15837 if (functionname_ptr)
15838 *functionname_ptr = bfd_asymbol_name (func);
15839
15840 return TRUE;
15841 }
15842
15843
15844 /* Find the nearest line to a particular section and offset, for error
15845 reporting. This code is a duplicate of the code in elf.c, except
15846 that it uses arm_elf_find_function. */
15847
15848 static bfd_boolean
15849 elf32_arm_find_nearest_line (bfd * abfd,
15850 asymbol ** symbols,
15851 asection * section,
15852 bfd_vma offset,
15853 const char ** filename_ptr,
15854 const char ** functionname_ptr,
15855 unsigned int * line_ptr,
15856 unsigned int * discriminator_ptr)
15857 {
15858 bfd_boolean found = FALSE;
15859
15860 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
15861 filename_ptr, functionname_ptr,
15862 line_ptr, discriminator_ptr,
15863 dwarf_debug_sections, 0,
15864 & elf_tdata (abfd)->dwarf2_find_line_info))
15865 {
15866 if (!*functionname_ptr)
15867 arm_elf_find_function (abfd, symbols, section, offset,
15868 *filename_ptr ? NULL : filename_ptr,
15869 functionname_ptr);
15870
15871 return TRUE;
15872 }
15873
15874 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15875 uses DWARF1. */
15876
15877 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
15878 & found, filename_ptr,
15879 functionname_ptr, line_ptr,
15880 & elf_tdata (abfd)->line_info))
15881 return FALSE;
15882
15883 if (found && (*functionname_ptr || *line_ptr))
15884 return TRUE;
15885
15886 if (symbols == NULL)
15887 return FALSE;
15888
15889 if (! arm_elf_find_function (abfd, symbols, section, offset,
15890 filename_ptr, functionname_ptr))
15891 return FALSE;
15892
15893 *line_ptr = 0;
15894 return TRUE;
15895 }
15896
15897 static bfd_boolean
15898 elf32_arm_find_inliner_info (bfd * abfd,
15899 const char ** filename_ptr,
15900 const char ** functionname_ptr,
15901 unsigned int * line_ptr)
15902 {
15903 bfd_boolean found;
15904 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
15905 functionname_ptr, line_ptr,
15906 & elf_tdata (abfd)->dwarf2_find_line_info);
15907 return found;
15908 }
15909
15910 /* Find dynamic relocs for H that apply to read-only sections. */
15911
15912 static asection *
15913 readonly_dynrelocs (struct elf_link_hash_entry *h)
15914 {
15915 struct elf_dyn_relocs *p;
15916
15917 for (p = elf32_arm_hash_entry (h)->dyn_relocs; p != NULL; p = p->next)
15918 {
15919 asection *s = p->sec->output_section;
15920
15921 if (s != NULL && (s->flags & SEC_READONLY) != 0)
15922 return p->sec;
15923 }
15924 return NULL;
15925 }
15926
15927 /* Adjust a symbol defined by a dynamic object and referenced by a
15928 regular object. The current definition is in some section of the
15929 dynamic object, but we're not including those sections. We have to
15930 change the definition to something the rest of the link can
15931 understand. */
15932
15933 static bfd_boolean
15934 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
15935 struct elf_link_hash_entry * h)
15936 {
15937 bfd * dynobj;
15938 asection *s, *srel;
15939 struct elf32_arm_link_hash_entry * eh;
15940 struct elf32_arm_link_hash_table *globals;
15941
15942 globals = elf32_arm_hash_table (info);
15943 if (globals == NULL)
15944 return FALSE;
15945
15946 dynobj = elf_hash_table (info)->dynobj;
15947
15948 /* Make sure we know what is going on here. */
15949 BFD_ASSERT (dynobj != NULL
15950 && (h->needs_plt
15951 || h->type == STT_GNU_IFUNC
15952 || h->is_weakalias
15953 || (h->def_dynamic
15954 && h->ref_regular
15955 && !h->def_regular)));
15956
15957 eh = (struct elf32_arm_link_hash_entry *) h;
15958
15959 /* If this is a function, put it in the procedure linkage table. We
15960 will fill in the contents of the procedure linkage table later,
15961 when we know the address of the .got section. */
15962 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
15963 {
15964 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15965 symbol binds locally. */
15966 if (h->plt.refcount <= 0
15967 || (h->type != STT_GNU_IFUNC
15968 && (SYMBOL_CALLS_LOCAL (info, h)
15969 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15970 && h->root.type == bfd_link_hash_undefweak))))
15971 {
15972 /* This case can occur if we saw a PLT32 reloc in an input
15973 file, but the symbol was never referred to by a dynamic
15974 object, or if all references were garbage collected. In
15975 such a case, we don't actually need to build a procedure
15976 linkage table, and we can just do a PC24 reloc instead. */
15977 h->plt.offset = (bfd_vma) -1;
15978 eh->plt.thumb_refcount = 0;
15979 eh->plt.maybe_thumb_refcount = 0;
15980 eh->plt.noncall_refcount = 0;
15981 h->needs_plt = 0;
15982 }
15983
15984 return TRUE;
15985 }
15986 else
15987 {
15988 /* It's possible that we incorrectly decided a .plt reloc was
15989 needed for an R_ARM_PC24 or similar reloc to a non-function sym
15990 in check_relocs. We can't decide accurately between function
15991 and non-function syms in check-relocs; Objects loaded later in
15992 the link may change h->type. So fix it now. */
15993 h->plt.offset = (bfd_vma) -1;
15994 eh->plt.thumb_refcount = 0;
15995 eh->plt.maybe_thumb_refcount = 0;
15996 eh->plt.noncall_refcount = 0;
15997 }
15998
15999 /* If this is a weak symbol, and there is a real definition, the
16000 processor independent code will have arranged for us to see the
16001 real definition first, and we can just use the same value. */
16002 if (h->is_weakalias)
16003 {
16004 struct elf_link_hash_entry *def = weakdef (h);
16005 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
16006 h->root.u.def.section = def->root.u.def.section;
16007 h->root.u.def.value = def->root.u.def.value;
16008 return TRUE;
16009 }
16010
16011 /* If there are no non-GOT references, we do not need a copy
16012 relocation. */
16013 if (!h->non_got_ref)
16014 return TRUE;
16015
16016 /* This is a reference to a symbol defined by a dynamic object which
16017 is not a function. */
16018
16019 /* If we are creating a shared library, we must presume that the
16020 only references to the symbol are via the global offset table.
16021 For such cases we need not do anything here; the relocations will
16022 be handled correctly by relocate_section. Relocatable executables
16023 can reference data in shared objects directly, so we don't need to
16024 do anything here. */
16025 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
16026 return TRUE;
16027
16028 /* We must allocate the symbol in our .dynbss section, which will
16029 become part of the .bss section of the executable. There will be
16030 an entry for this symbol in the .dynsym section. The dynamic
16031 object will contain position independent code, so all references
16032 from the dynamic object to this symbol will go through the global
16033 offset table. The dynamic linker will use the .dynsym entry to
16034 determine the address it must put in the global offset table, so
16035 both the dynamic object and the regular object will refer to the
16036 same memory location for the variable. */
16037 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
16038 linker to copy the initial value out of the dynamic object and into
16039 the runtime process image. We need to remember the offset into the
16040 .rel(a).bss section we are going to use. */
16041 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
16042 {
16043 s = globals->root.sdynrelro;
16044 srel = globals->root.sreldynrelro;
16045 }
16046 else
16047 {
16048 s = globals->root.sdynbss;
16049 srel = globals->root.srelbss;
16050 }
16051 if (info->nocopyreloc == 0
16052 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
16053 && h->size != 0)
16054 {
16055 elf32_arm_allocate_dynrelocs (info, srel, 1);
16056 h->needs_copy = 1;
16057 }
16058
16059 return _bfd_elf_adjust_dynamic_copy (info, h, s);
16060 }
16061
16062 /* Allocate space in .plt, .got and associated reloc sections for
16063 dynamic relocs. */
16064
16065 static bfd_boolean
16066 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
16067 {
16068 struct bfd_link_info *info;
16069 struct elf32_arm_link_hash_table *htab;
16070 struct elf32_arm_link_hash_entry *eh;
16071 struct elf_dyn_relocs *p;
16072
16073 if (h->root.type == bfd_link_hash_indirect)
16074 return TRUE;
16075
16076 eh = (struct elf32_arm_link_hash_entry *) h;
16077
16078 info = (struct bfd_link_info *) inf;
16079 htab = elf32_arm_hash_table (info);
16080 if (htab == NULL)
16081 return FALSE;
16082
16083 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
16084 && h->plt.refcount > 0)
16085 {
16086 /* Make sure this symbol is output as a dynamic symbol.
16087 Undefined weak syms won't yet be marked as dynamic. */
16088 if (h->dynindx == -1 && !h->forced_local
16089 && h->root.type == bfd_link_hash_undefweak)
16090 {
16091 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16092 return FALSE;
16093 }
16094
16095 /* If the call in the PLT entry binds locally, the associated
16096 GOT entry should use an R_ARM_IRELATIVE relocation instead of
16097 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
16098 than the .plt section. */
16099 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
16100 {
16101 eh->is_iplt = 1;
16102 if (eh->plt.noncall_refcount == 0
16103 && SYMBOL_REFERENCES_LOCAL (info, h))
16104 /* All non-call references can be resolved directly.
16105 This means that they can (and in some cases, must)
16106 resolve directly to the run-time target, rather than
16107 to the PLT. That in turns means that any .got entry
16108 would be equal to the .igot.plt entry, so there's
16109 no point having both. */
16110 h->got.refcount = 0;
16111 }
16112
16113 if (bfd_link_pic (info)
16114 || eh->is_iplt
16115 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
16116 {
16117 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
16118
16119 /* If this symbol is not defined in a regular file, and we are
16120 not generating a shared library, then set the symbol to this
16121 location in the .plt. This is required to make function
16122 pointers compare as equal between the normal executable and
16123 the shared library. */
16124 if (! bfd_link_pic (info)
16125 && !h->def_regular)
16126 {
16127 h->root.u.def.section = htab->root.splt;
16128 h->root.u.def.value = h->plt.offset;
16129
16130 /* Make sure the function is not marked as Thumb, in case
16131 it is the target of an ABS32 relocation, which will
16132 point to the PLT entry. */
16133 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16134 }
16135
16136 /* VxWorks executables have a second set of relocations for
16137 each PLT entry. They go in a separate relocation section,
16138 which is processed by the kernel loader. */
16139 if (htab->vxworks_p && !bfd_link_pic (info))
16140 {
16141 /* There is a relocation for the initial PLT entry:
16142 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
16143 if (h->plt.offset == htab->plt_header_size)
16144 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
16145
16146 /* There are two extra relocations for each subsequent
16147 PLT entry: an R_ARM_32 relocation for the GOT entry,
16148 and an R_ARM_32 relocation for the PLT entry. */
16149 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
16150 }
16151 }
16152 else
16153 {
16154 h->plt.offset = (bfd_vma) -1;
16155 h->needs_plt = 0;
16156 }
16157 }
16158 else
16159 {
16160 h->plt.offset = (bfd_vma) -1;
16161 h->needs_plt = 0;
16162 }
16163
16164 eh = (struct elf32_arm_link_hash_entry *) h;
16165 eh->tlsdesc_got = (bfd_vma) -1;
16166
16167 if (h->got.refcount > 0)
16168 {
16169 asection *s;
16170 bfd_boolean dyn;
16171 int tls_type = elf32_arm_hash_entry (h)->tls_type;
16172 int indx;
16173
16174 /* Make sure this symbol is output as a dynamic symbol.
16175 Undefined weak syms won't yet be marked as dynamic. */
16176 if (htab->root.dynamic_sections_created && h->dynindx == -1 && !h->forced_local
16177 && h->root.type == bfd_link_hash_undefweak)
16178 {
16179 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16180 return FALSE;
16181 }
16182
16183 if (!htab->symbian_p)
16184 {
16185 s = htab->root.sgot;
16186 h->got.offset = s->size;
16187
16188 if (tls_type == GOT_UNKNOWN)
16189 abort ();
16190
16191 if (tls_type == GOT_NORMAL)
16192 /* Non-TLS symbols need one GOT slot. */
16193 s->size += 4;
16194 else
16195 {
16196 if (tls_type & GOT_TLS_GDESC)
16197 {
16198 /* R_ARM_TLS_DESC needs 2 GOT slots. */
16199 eh->tlsdesc_got
16200 = (htab->root.sgotplt->size
16201 - elf32_arm_compute_jump_table_size (htab));
16202 htab->root.sgotplt->size += 8;
16203 h->got.offset = (bfd_vma) -2;
16204 /* plt.got_offset needs to know there's a TLS_DESC
16205 reloc in the middle of .got.plt. */
16206 htab->num_tls_desc++;
16207 }
16208
16209 if (tls_type & GOT_TLS_GD)
16210 {
16211 /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
16212 consecutive GOT slots. If the symbol is both GD
16213 and GDESC, got.offset may have been
16214 overwritten. */
16215 h->got.offset = s->size;
16216 s->size += 8;
16217 }
16218
16219 if (tls_type & GOT_TLS_IE)
16220 /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
16221 slot. */
16222 s->size += 4;
16223 }
16224
16225 dyn = htab->root.dynamic_sections_created;
16226
16227 indx = 0;
16228 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
16229 bfd_link_pic (info),
16230 h)
16231 && (!bfd_link_pic (info)
16232 || !SYMBOL_REFERENCES_LOCAL (info, h)))
16233 indx = h->dynindx;
16234
16235 if (tls_type != GOT_NORMAL
16236 && (bfd_link_pic (info) || indx != 0)
16237 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16238 || h->root.type != bfd_link_hash_undefweak))
16239 {
16240 if (tls_type & GOT_TLS_IE)
16241 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16242
16243 if (tls_type & GOT_TLS_GD)
16244 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16245
16246 if (tls_type & GOT_TLS_GDESC)
16247 {
16248 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
16249 /* GDESC needs a trampoline to jump to. */
16250 htab->tls_trampoline = -1;
16251 }
16252
16253 /* Only GD needs it. GDESC just emits one relocation per
16254 2 entries. */
16255 if ((tls_type & GOT_TLS_GD) && indx != 0)
16256 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16257 }
16258 else if (((indx != -1) || htab->fdpic_p)
16259 && !SYMBOL_REFERENCES_LOCAL (info, h))
16260 {
16261 if (htab->root.dynamic_sections_created)
16262 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
16263 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16264 }
16265 else if (h->type == STT_GNU_IFUNC
16266 && eh->plt.noncall_refcount == 0)
16267 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16268 they all resolve dynamically instead. Reserve room for the
16269 GOT entry's R_ARM_IRELATIVE relocation. */
16270 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
16271 else if (bfd_link_pic (info)
16272 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16273 || h->root.type != bfd_link_hash_undefweak))
16274 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
16275 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16276 else if (htab->fdpic_p && tls_type == GOT_NORMAL)
16277 /* Reserve room for rofixup for FDPIC executable. */
16278 /* TLS relocs do not need space since they are completely
16279 resolved. */
16280 htab->srofixup->size += 4;
16281 }
16282 }
16283 else
16284 h->got.offset = (bfd_vma) -1;
16285
16286 /* FDPIC support. */
16287 if (eh->fdpic_cnts.gotofffuncdesc_cnt > 0)
16288 {
16289 /* Symbol musn't be exported. */
16290 if (h->dynindx != -1)
16291 abort();
16292
16293 /* We only allocate one function descriptor with its associated relocation. */
16294 if (eh->fdpic_cnts.funcdesc_offset == -1)
16295 {
16296 asection *s = htab->root.sgot;
16297
16298 eh->fdpic_cnts.funcdesc_offset = s->size;
16299 s->size += 8;
16300 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16301 if (bfd_link_pic(info))
16302 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16303 else
16304 htab->srofixup->size += 8;
16305 }
16306 }
16307
16308 if (eh->fdpic_cnts.gotfuncdesc_cnt > 0)
16309 {
16310 asection *s = htab->root.sgot;
16311
16312 if (htab->root.dynamic_sections_created && h->dynindx == -1
16313 && !h->forced_local)
16314 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16315 return FALSE;
16316
16317 if (h->dynindx == -1)
16318 {
16319 /* We only allocate one function descriptor with its associated relocation. q */
16320 if (eh->fdpic_cnts.funcdesc_offset == -1)
16321 {
16322
16323 eh->fdpic_cnts.funcdesc_offset = s->size;
16324 s->size += 8;
16325 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16326 if (bfd_link_pic(info))
16327 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16328 else
16329 htab->srofixup->size += 8;
16330 }
16331 }
16332
16333 /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16334 R_ARM_RELATIVE/rofixup relocation on it. */
16335 eh->fdpic_cnts.gotfuncdesc_offset = s->size;
16336 s->size += 4;
16337 if (h->dynindx == -1 && !bfd_link_pic(info))
16338 htab->srofixup->size += 4;
16339 else
16340 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16341 }
16342
16343 if (eh->fdpic_cnts.funcdesc_cnt > 0)
16344 {
16345 if (htab->root.dynamic_sections_created && h->dynindx == -1
16346 && !h->forced_local)
16347 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16348 return FALSE;
16349
16350 if (h->dynindx == -1)
16351 {
16352 /* We only allocate one function descriptor with its associated relocation. */
16353 if (eh->fdpic_cnts.funcdesc_offset == -1)
16354 {
16355 asection *s = htab->root.sgot;
16356
16357 eh->fdpic_cnts.funcdesc_offset = s->size;
16358 s->size += 8;
16359 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16360 if (bfd_link_pic(info))
16361 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16362 else
16363 htab->srofixup->size += 8;
16364 }
16365 }
16366 if (h->dynindx == -1 && !bfd_link_pic(info))
16367 {
16368 /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */
16369 htab->srofixup->size += 4 * eh->fdpic_cnts.funcdesc_cnt;
16370 }
16371 else
16372 {
16373 /* Will need one dynamic reloc per reference. will be either
16374 R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */
16375 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot,
16376 eh->fdpic_cnts.funcdesc_cnt);
16377 }
16378 }
16379
16380 /* Allocate stubs for exported Thumb functions on v4t. */
16381 if (!htab->use_blx && h->dynindx != -1
16382 && h->def_regular
16383 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
16384 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
16385 {
16386 struct elf_link_hash_entry * th;
16387 struct bfd_link_hash_entry * bh;
16388 struct elf_link_hash_entry * myh;
16389 char name[1024];
16390 asection *s;
16391 bh = NULL;
16392 /* Create a new symbol to regist the real location of the function. */
16393 s = h->root.u.def.section;
16394 sprintf (name, "__real_%s", h->root.root.string);
16395 _bfd_generic_link_add_one_symbol (info, s->owner,
16396 name, BSF_GLOBAL, s,
16397 h->root.u.def.value,
16398 NULL, TRUE, FALSE, &bh);
16399
16400 myh = (struct elf_link_hash_entry *) bh;
16401 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
16402 myh->forced_local = 1;
16403 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
16404 eh->export_glue = myh;
16405 th = record_arm_to_thumb_glue (info, h);
16406 /* Point the symbol at the stub. */
16407 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
16408 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16409 h->root.u.def.section = th->root.u.def.section;
16410 h->root.u.def.value = th->root.u.def.value & ~1;
16411 }
16412
16413 if (eh->dyn_relocs == NULL)
16414 return TRUE;
16415
16416 /* In the shared -Bsymbolic case, discard space allocated for
16417 dynamic pc-relative relocs against symbols which turn out to be
16418 defined in regular objects. For the normal shared case, discard
16419 space for pc-relative relocs that have become local due to symbol
16420 visibility changes. */
16421
16422 if (bfd_link_pic (info) || htab->root.is_relocatable_executable || htab->fdpic_p)
16423 {
16424 /* Relocs that use pc_count are PC-relative forms, which will appear
16425 on something like ".long foo - ." or "movw REG, foo - .". We want
16426 calls to protected symbols to resolve directly to the function
16427 rather than going via the plt. If people want function pointer
16428 comparisons to work as expected then they should avoid writing
16429 assembly like ".long foo - .". */
16430 if (SYMBOL_CALLS_LOCAL (info, h))
16431 {
16432 struct elf_dyn_relocs **pp;
16433
16434 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
16435 {
16436 p->count -= p->pc_count;
16437 p->pc_count = 0;
16438 if (p->count == 0)
16439 *pp = p->next;
16440 else
16441 pp = &p->next;
16442 }
16443 }
16444
16445 if (htab->vxworks_p)
16446 {
16447 struct elf_dyn_relocs **pp;
16448
16449 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
16450 {
16451 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
16452 *pp = p->next;
16453 else
16454 pp = &p->next;
16455 }
16456 }
16457
16458 /* Also discard relocs on undefined weak syms with non-default
16459 visibility. */
16460 if (eh->dyn_relocs != NULL
16461 && h->root.type == bfd_link_hash_undefweak)
16462 {
16463 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16464 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16465 eh->dyn_relocs = NULL;
16466
16467 /* Make sure undefined weak symbols are output as a dynamic
16468 symbol in PIEs. */
16469 else if (htab->root.dynamic_sections_created && h->dynindx == -1
16470 && !h->forced_local)
16471 {
16472 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16473 return FALSE;
16474 }
16475 }
16476
16477 else if (htab->root.is_relocatable_executable && h->dynindx == -1
16478 && h->root.type == bfd_link_hash_new)
16479 {
16480 /* Output absolute symbols so that we can create relocations
16481 against them. For normal symbols we output a relocation
16482 against the section that contains them. */
16483 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16484 return FALSE;
16485 }
16486
16487 }
16488 else
16489 {
16490 /* For the non-shared case, discard space for relocs against
16491 symbols which turn out to need copy relocs or are not
16492 dynamic. */
16493
16494 if (!h->non_got_ref
16495 && ((h->def_dynamic
16496 && !h->def_regular)
16497 || (htab->root.dynamic_sections_created
16498 && (h->root.type == bfd_link_hash_undefweak
16499 || h->root.type == bfd_link_hash_undefined))))
16500 {
16501 /* Make sure this symbol is output as a dynamic symbol.
16502 Undefined weak syms won't yet be marked as dynamic. */
16503 if (h->dynindx == -1 && !h->forced_local
16504 && h->root.type == bfd_link_hash_undefweak)
16505 {
16506 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16507 return FALSE;
16508 }
16509
16510 /* If that succeeded, we know we'll be keeping all the
16511 relocs. */
16512 if (h->dynindx != -1)
16513 goto keep;
16514 }
16515
16516 eh->dyn_relocs = NULL;
16517
16518 keep: ;
16519 }
16520
16521 /* Finally, allocate space. */
16522 for (p = eh->dyn_relocs; p != NULL; p = p->next)
16523 {
16524 asection *sreloc = elf_section_data (p->sec)->sreloc;
16525
16526 if (h->type == STT_GNU_IFUNC
16527 && eh->plt.noncall_refcount == 0
16528 && SYMBOL_REFERENCES_LOCAL (info, h))
16529 elf32_arm_allocate_irelocs (info, sreloc, p->count);
16530 else if (h->dynindx != -1 && (!bfd_link_pic(info) || !info->symbolic || !h->def_regular))
16531 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16532 else if (htab->fdpic_p && !bfd_link_pic(info))
16533 htab->srofixup->size += 4 * p->count;
16534 else
16535 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16536 }
16537
16538 return TRUE;
16539 }
16540
16541 /* Set DF_TEXTREL if we find any dynamic relocs that apply to
16542 read-only sections. */
16543
16544 static bfd_boolean
16545 maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p)
16546 {
16547 asection *sec;
16548
16549 if (h->root.type == bfd_link_hash_indirect)
16550 return TRUE;
16551
16552 sec = readonly_dynrelocs (h);
16553 if (sec != NULL)
16554 {
16555 struct bfd_link_info *info = (struct bfd_link_info *) info_p;
16556
16557 info->flags |= DF_TEXTREL;
16558 info->callbacks->minfo
16559 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
16560 sec->owner, h->root.root.string, sec);
16561
16562 /* Not an error, just cut short the traversal. */
16563 return FALSE;
16564 }
16565
16566 return TRUE;
16567 }
16568
16569 void
16570 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
16571 int byteswap_code)
16572 {
16573 struct elf32_arm_link_hash_table *globals;
16574
16575 globals = elf32_arm_hash_table (info);
16576 if (globals == NULL)
16577 return;
16578
16579 globals->byteswap_code = byteswap_code;
16580 }
16581
16582 /* Set the sizes of the dynamic sections. */
16583
16584 static bfd_boolean
16585 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
16586 struct bfd_link_info * info)
16587 {
16588 bfd * dynobj;
16589 asection * s;
16590 bfd_boolean plt;
16591 bfd_boolean relocs;
16592 bfd *ibfd;
16593 struct elf32_arm_link_hash_table *htab;
16594
16595 htab = elf32_arm_hash_table (info);
16596 if (htab == NULL)
16597 return FALSE;
16598
16599 dynobj = elf_hash_table (info)->dynobj;
16600 BFD_ASSERT (dynobj != NULL);
16601 check_use_blx (htab);
16602
16603 if (elf_hash_table (info)->dynamic_sections_created)
16604 {
16605 /* Set the contents of the .interp section to the interpreter. */
16606 if (bfd_link_executable (info) && !info->nointerp)
16607 {
16608 s = bfd_get_linker_section (dynobj, ".interp");
16609 BFD_ASSERT (s != NULL);
16610 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
16611 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
16612 }
16613 }
16614
16615 /* Set up .got offsets for local syms, and space for local dynamic
16616 relocs. */
16617 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16618 {
16619 bfd_signed_vma *local_got;
16620 bfd_signed_vma *end_local_got;
16621 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
16622 char *local_tls_type;
16623 bfd_vma *local_tlsdesc_gotent;
16624 bfd_size_type locsymcount;
16625 Elf_Internal_Shdr *symtab_hdr;
16626 asection *srel;
16627 bfd_boolean is_vxworks = htab->vxworks_p;
16628 unsigned int symndx;
16629 struct fdpic_local *local_fdpic_cnts;
16630
16631 if (! is_arm_elf (ibfd))
16632 continue;
16633
16634 for (s = ibfd->sections; s != NULL; s = s->next)
16635 {
16636 struct elf_dyn_relocs *p;
16637
16638 for (p = (struct elf_dyn_relocs *)
16639 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
16640 {
16641 if (!bfd_is_abs_section (p->sec)
16642 && bfd_is_abs_section (p->sec->output_section))
16643 {
16644 /* Input section has been discarded, either because
16645 it is a copy of a linkonce section or due to
16646 linker script /DISCARD/, so we'll be discarding
16647 the relocs too. */
16648 }
16649 else if (is_vxworks
16650 && strcmp (p->sec->output_section->name,
16651 ".tls_vars") == 0)
16652 {
16653 /* Relocations in vxworks .tls_vars sections are
16654 handled specially by the loader. */
16655 }
16656 else if (p->count != 0)
16657 {
16658 srel = elf_section_data (p->sec)->sreloc;
16659 if (htab->fdpic_p && !bfd_link_pic(info))
16660 htab->srofixup->size += 4 * p->count;
16661 else
16662 elf32_arm_allocate_dynrelocs (info, srel, p->count);
16663 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
16664 info->flags |= DF_TEXTREL;
16665 }
16666 }
16667 }
16668
16669 local_got = elf_local_got_refcounts (ibfd);
16670 if (!local_got)
16671 continue;
16672
16673 symtab_hdr = & elf_symtab_hdr (ibfd);
16674 locsymcount = symtab_hdr->sh_info;
16675 end_local_got = local_got + locsymcount;
16676 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
16677 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
16678 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
16679 local_fdpic_cnts = elf32_arm_local_fdpic_cnts (ibfd);
16680 symndx = 0;
16681 s = htab->root.sgot;
16682 srel = htab->root.srelgot;
16683 for (; local_got < end_local_got;
16684 ++local_got, ++local_iplt_ptr, ++local_tls_type,
16685 ++local_tlsdesc_gotent, ++symndx, ++local_fdpic_cnts)
16686 {
16687 *local_tlsdesc_gotent = (bfd_vma) -1;
16688 local_iplt = *local_iplt_ptr;
16689
16690 /* FDPIC support. */
16691 if (local_fdpic_cnts->gotofffuncdesc_cnt > 0)
16692 {
16693 if (local_fdpic_cnts->funcdesc_offset == -1)
16694 {
16695 local_fdpic_cnts->funcdesc_offset = s->size;
16696 s->size += 8;
16697
16698 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16699 if (bfd_link_pic(info))
16700 elf32_arm_allocate_dynrelocs (info, srel, 1);
16701 else
16702 htab->srofixup->size += 8;
16703 }
16704 }
16705
16706 if (local_fdpic_cnts->funcdesc_cnt > 0)
16707 {
16708 if (local_fdpic_cnts->funcdesc_offset == -1)
16709 {
16710 local_fdpic_cnts->funcdesc_offset = s->size;
16711 s->size += 8;
16712
16713 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16714 if (bfd_link_pic(info))
16715 elf32_arm_allocate_dynrelocs (info, srel, 1);
16716 else
16717 htab->srofixup->size += 8;
16718 }
16719
16720 /* We will add n R_ARM_RELATIVE relocations or n rofixups. */
16721 if (bfd_link_pic(info))
16722 elf32_arm_allocate_dynrelocs (info, srel, local_fdpic_cnts->funcdesc_cnt);
16723 else
16724 htab->srofixup->size += 4 * local_fdpic_cnts->funcdesc_cnt;
16725 }
16726
16727 if (local_iplt != NULL)
16728 {
16729 struct elf_dyn_relocs *p;
16730
16731 if (local_iplt->root.refcount > 0)
16732 {
16733 elf32_arm_allocate_plt_entry (info, TRUE,
16734 &local_iplt->root,
16735 &local_iplt->arm);
16736 if (local_iplt->arm.noncall_refcount == 0)
16737 /* All references to the PLT are calls, so all
16738 non-call references can resolve directly to the
16739 run-time target. This means that the .got entry
16740 would be the same as the .igot.plt entry, so there's
16741 no point creating both. */
16742 *local_got = 0;
16743 }
16744 else
16745 {
16746 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
16747 local_iplt->root.offset = (bfd_vma) -1;
16748 }
16749
16750 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
16751 {
16752 asection *psrel;
16753
16754 psrel = elf_section_data (p->sec)->sreloc;
16755 if (local_iplt->arm.noncall_refcount == 0)
16756 elf32_arm_allocate_irelocs (info, psrel, p->count);
16757 else
16758 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
16759 }
16760 }
16761 if (*local_got > 0)
16762 {
16763 Elf_Internal_Sym *isym;
16764
16765 *local_got = s->size;
16766 if (*local_tls_type & GOT_TLS_GD)
16767 /* TLS_GD relocs need an 8-byte structure in the GOT. */
16768 s->size += 8;
16769 if (*local_tls_type & GOT_TLS_GDESC)
16770 {
16771 *local_tlsdesc_gotent = htab->root.sgotplt->size
16772 - elf32_arm_compute_jump_table_size (htab);
16773 htab->root.sgotplt->size += 8;
16774 *local_got = (bfd_vma) -2;
16775 /* plt.got_offset needs to know there's a TLS_DESC
16776 reloc in the middle of .got.plt. */
16777 htab->num_tls_desc++;
16778 }
16779 if (*local_tls_type & GOT_TLS_IE)
16780 s->size += 4;
16781
16782 if (*local_tls_type & GOT_NORMAL)
16783 {
16784 /* If the symbol is both GD and GDESC, *local_got
16785 may have been overwritten. */
16786 *local_got = s->size;
16787 s->size += 4;
16788 }
16789
16790 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
16791 if (isym == NULL)
16792 return FALSE;
16793
16794 /* If all references to an STT_GNU_IFUNC PLT are calls,
16795 then all non-call references, including this GOT entry,
16796 resolve directly to the run-time target. */
16797 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
16798 && (local_iplt == NULL
16799 || local_iplt->arm.noncall_refcount == 0))
16800 elf32_arm_allocate_irelocs (info, srel, 1);
16801 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC || htab->fdpic_p)
16802 {
16803 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC)))
16804 elf32_arm_allocate_dynrelocs (info, srel, 1);
16805 else if (htab->fdpic_p && *local_tls_type & GOT_NORMAL)
16806 htab->srofixup->size += 4;
16807
16808 if ((bfd_link_pic (info) || htab->fdpic_p)
16809 && *local_tls_type & GOT_TLS_GDESC)
16810 {
16811 elf32_arm_allocate_dynrelocs (info,
16812 htab->root.srelplt, 1);
16813 htab->tls_trampoline = -1;
16814 }
16815 }
16816 }
16817 else
16818 *local_got = (bfd_vma) -1;
16819 }
16820 }
16821
16822 if (htab->tls_ldm_got.refcount > 0)
16823 {
16824 /* Allocate two GOT entries and one dynamic relocation (if necessary)
16825 for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
16826 htab->tls_ldm_got.offset = htab->root.sgot->size;
16827 htab->root.sgot->size += 8;
16828 if (bfd_link_pic (info))
16829 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16830 }
16831 else
16832 htab->tls_ldm_got.offset = -1;
16833
16834 /* At the very end of the .rofixup section is a pointer to the GOT,
16835 reserve space for it. */
16836 if (htab->fdpic_p && htab->srofixup != NULL)
16837 htab->srofixup->size += 4;
16838
16839 /* Allocate global sym .plt and .got entries, and space for global
16840 sym dynamic relocs. */
16841 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
16842
16843 /* Here we rummage through the found bfds to collect glue information. */
16844 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16845 {
16846 if (! is_arm_elf (ibfd))
16847 continue;
16848
16849 /* Initialise mapping tables for code/data. */
16850 bfd_elf32_arm_init_maps (ibfd);
16851
16852 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
16853 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
16854 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
16855 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd);
16856 }
16857
16858 /* Allocate space for the glue sections now that we've sized them. */
16859 bfd_elf32_arm_allocate_interworking_sections (info);
16860
16861 /* For every jump slot reserved in the sgotplt, reloc_count is
16862 incremented. However, when we reserve space for TLS descriptors,
16863 it's not incremented, so in order to compute the space reserved
16864 for them, it suffices to multiply the reloc count by the jump
16865 slot size. */
16866 if (htab->root.srelplt)
16867 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
16868
16869 if (htab->tls_trampoline)
16870 {
16871 if (htab->root.splt->size == 0)
16872 htab->root.splt->size += htab->plt_header_size;
16873
16874 htab->tls_trampoline = htab->root.splt->size;
16875 htab->root.splt->size += htab->plt_entry_size;
16876
16877 /* If we're not using lazy TLS relocations, don't generate the
16878 PLT and GOT entries they require. */
16879 if (!(info->flags & DF_BIND_NOW))
16880 {
16881 htab->dt_tlsdesc_got = htab->root.sgot->size;
16882 htab->root.sgot->size += 4;
16883
16884 htab->dt_tlsdesc_plt = htab->root.splt->size;
16885 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
16886 }
16887 }
16888
16889 /* The check_relocs and adjust_dynamic_symbol entry points have
16890 determined the sizes of the various dynamic sections. Allocate
16891 memory for them. */
16892 plt = FALSE;
16893 relocs = FALSE;
16894 for (s = dynobj->sections; s != NULL; s = s->next)
16895 {
16896 const char * name;
16897
16898 if ((s->flags & SEC_LINKER_CREATED) == 0)
16899 continue;
16900
16901 /* It's OK to base decisions on the section name, because none
16902 of the dynobj section names depend upon the input files. */
16903 name = bfd_get_section_name (dynobj, s);
16904
16905 if (s == htab->root.splt)
16906 {
16907 /* Remember whether there is a PLT. */
16908 plt = s->size != 0;
16909 }
16910 else if (CONST_STRNEQ (name, ".rel"))
16911 {
16912 if (s->size != 0)
16913 {
16914 /* Remember whether there are any reloc sections other
16915 than .rel(a).plt and .rela.plt.unloaded. */
16916 if (s != htab->root.srelplt && s != htab->srelplt2)
16917 relocs = TRUE;
16918
16919 /* We use the reloc_count field as a counter if we need
16920 to copy relocs into the output file. */
16921 s->reloc_count = 0;
16922 }
16923 }
16924 else if (s != htab->root.sgot
16925 && s != htab->root.sgotplt
16926 && s != htab->root.iplt
16927 && s != htab->root.igotplt
16928 && s != htab->root.sdynbss
16929 && s != htab->root.sdynrelro
16930 && s != htab->srofixup)
16931 {
16932 /* It's not one of our sections, so don't allocate space. */
16933 continue;
16934 }
16935
16936 if (s->size == 0)
16937 {
16938 /* If we don't need this section, strip it from the
16939 output file. This is mostly to handle .rel(a).bss and
16940 .rel(a).plt. We must create both sections in
16941 create_dynamic_sections, because they must be created
16942 before the linker maps input sections to output
16943 sections. The linker does that before
16944 adjust_dynamic_symbol is called, and it is that
16945 function which decides whether anything needs to go
16946 into these sections. */
16947 s->flags |= SEC_EXCLUDE;
16948 continue;
16949 }
16950
16951 if ((s->flags & SEC_HAS_CONTENTS) == 0)
16952 continue;
16953
16954 /* Allocate memory for the section contents. */
16955 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
16956 if (s->contents == NULL)
16957 return FALSE;
16958 }
16959
16960 if (elf_hash_table (info)->dynamic_sections_created)
16961 {
16962 /* Add some entries to the .dynamic section. We fill in the
16963 values later, in elf32_arm_finish_dynamic_sections, but we
16964 must add the entries now so that we get the correct size for
16965 the .dynamic section. The DT_DEBUG entry is filled in by the
16966 dynamic linker and used by the debugger. */
16967 #define add_dynamic_entry(TAG, VAL) \
16968 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
16969
16970 if (bfd_link_executable (info))
16971 {
16972 if (!add_dynamic_entry (DT_DEBUG, 0))
16973 return FALSE;
16974 }
16975
16976 if (plt)
16977 {
16978 if ( !add_dynamic_entry (DT_PLTGOT, 0)
16979 || !add_dynamic_entry (DT_PLTRELSZ, 0)
16980 || !add_dynamic_entry (DT_PLTREL,
16981 htab->use_rel ? DT_REL : DT_RELA)
16982 || !add_dynamic_entry (DT_JMPREL, 0))
16983 return FALSE;
16984
16985 if (htab->dt_tlsdesc_plt
16986 && (!add_dynamic_entry (DT_TLSDESC_PLT,0)
16987 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
16988 return FALSE;
16989 }
16990
16991 if (relocs)
16992 {
16993 if (htab->use_rel)
16994 {
16995 if (!add_dynamic_entry (DT_REL, 0)
16996 || !add_dynamic_entry (DT_RELSZ, 0)
16997 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
16998 return FALSE;
16999 }
17000 else
17001 {
17002 if (!add_dynamic_entry (DT_RELA, 0)
17003 || !add_dynamic_entry (DT_RELASZ, 0)
17004 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
17005 return FALSE;
17006 }
17007 }
17008
17009 /* If any dynamic relocs apply to a read-only section,
17010 then we need a DT_TEXTREL entry. */
17011 if ((info->flags & DF_TEXTREL) == 0)
17012 elf_link_hash_traverse (&htab->root, maybe_set_textrel, info);
17013
17014 if ((info->flags & DF_TEXTREL) != 0)
17015 {
17016 if (!add_dynamic_entry (DT_TEXTREL, 0))
17017 return FALSE;
17018 }
17019 if (htab->vxworks_p
17020 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
17021 return FALSE;
17022 }
17023 #undef add_dynamic_entry
17024
17025 return TRUE;
17026 }
17027
17028 /* Size sections even though they're not dynamic. We use it to setup
17029 _TLS_MODULE_BASE_, if needed. */
17030
17031 static bfd_boolean
17032 elf32_arm_always_size_sections (bfd *output_bfd,
17033 struct bfd_link_info *info)
17034 {
17035 asection *tls_sec;
17036 struct elf32_arm_link_hash_table *htab;
17037
17038 htab = elf32_arm_hash_table (info);
17039
17040 if (bfd_link_relocatable (info))
17041 return TRUE;
17042
17043 tls_sec = elf_hash_table (info)->tls_sec;
17044
17045 if (tls_sec)
17046 {
17047 struct elf_link_hash_entry *tlsbase;
17048
17049 tlsbase = elf_link_hash_lookup
17050 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
17051
17052 if (tlsbase)
17053 {
17054 struct bfd_link_hash_entry *bh = NULL;
17055 const struct elf_backend_data *bed
17056 = get_elf_backend_data (output_bfd);
17057
17058 if (!(_bfd_generic_link_add_one_symbol
17059 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
17060 tls_sec, 0, NULL, FALSE,
17061 bed->collect, &bh)))
17062 return FALSE;
17063
17064 tlsbase->type = STT_TLS;
17065 tlsbase = (struct elf_link_hash_entry *)bh;
17066 tlsbase->def_regular = 1;
17067 tlsbase->other = STV_HIDDEN;
17068 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
17069 }
17070 }
17071
17072 if (htab->fdpic_p && !bfd_link_relocatable (info)
17073 && !bfd_elf_stack_segment_size (output_bfd, info,
17074 "__stacksize", DEFAULT_STACK_SIZE))
17075 return FALSE;
17076
17077 return TRUE;
17078 }
17079
17080 /* Finish up dynamic symbol handling. We set the contents of various
17081 dynamic sections here. */
17082
17083 static bfd_boolean
17084 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
17085 struct bfd_link_info * info,
17086 struct elf_link_hash_entry * h,
17087 Elf_Internal_Sym * sym)
17088 {
17089 struct elf32_arm_link_hash_table *htab;
17090 struct elf32_arm_link_hash_entry *eh;
17091
17092 htab = elf32_arm_hash_table (info);
17093 if (htab == NULL)
17094 return FALSE;
17095
17096 eh = (struct elf32_arm_link_hash_entry *) h;
17097
17098 if (h->plt.offset != (bfd_vma) -1)
17099 {
17100 if (!eh->is_iplt)
17101 {
17102 BFD_ASSERT (h->dynindx != -1);
17103 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
17104 h->dynindx, 0))
17105 return FALSE;
17106 }
17107
17108 if (!h->def_regular)
17109 {
17110 /* Mark the symbol as undefined, rather than as defined in
17111 the .plt section. */
17112 sym->st_shndx = SHN_UNDEF;
17113 /* If the symbol is weak we need to clear the value.
17114 Otherwise, the PLT entry would provide a definition for
17115 the symbol even if the symbol wasn't defined anywhere,
17116 and so the symbol would never be NULL. Leave the value if
17117 there were any relocations where pointer equality matters
17118 (this is a clue for the dynamic linker, to make function
17119 pointer comparisons work between an application and shared
17120 library). */
17121 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
17122 sym->st_value = 0;
17123 }
17124 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
17125 {
17126 /* At least one non-call relocation references this .iplt entry,
17127 so the .iplt entry is the function's canonical address. */
17128 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
17129 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
17130 sym->st_shndx = (_bfd_elf_section_from_bfd_section
17131 (output_bfd, htab->root.iplt->output_section));
17132 sym->st_value = (h->plt.offset
17133 + htab->root.iplt->output_section->vma
17134 + htab->root.iplt->output_offset);
17135 }
17136 }
17137
17138 if (h->needs_copy)
17139 {
17140 asection * s;
17141 Elf_Internal_Rela rel;
17142
17143 /* This symbol needs a copy reloc. Set it up. */
17144 BFD_ASSERT (h->dynindx != -1
17145 && (h->root.type == bfd_link_hash_defined
17146 || h->root.type == bfd_link_hash_defweak));
17147
17148 rel.r_addend = 0;
17149 rel.r_offset = (h->root.u.def.value
17150 + h->root.u.def.section->output_section->vma
17151 + h->root.u.def.section->output_offset);
17152 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
17153 if (h->root.u.def.section == htab->root.sdynrelro)
17154 s = htab->root.sreldynrelro;
17155 else
17156 s = htab->root.srelbss;
17157 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
17158 }
17159
17160 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
17161 and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute:
17162 it is relative to the ".got" section. */
17163 if (h == htab->root.hdynamic
17164 || (!htab->fdpic_p && !htab->vxworks_p && h == htab->root.hgot))
17165 sym->st_shndx = SHN_ABS;
17166
17167 return TRUE;
17168 }
17169
17170 static void
17171 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17172 void *contents,
17173 const unsigned long *template, unsigned count)
17174 {
17175 unsigned ix;
17176
17177 for (ix = 0; ix != count; ix++)
17178 {
17179 unsigned long insn = template[ix];
17180
17181 /* Emit mov pc,rx if bx is not permitted. */
17182 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
17183 insn = (insn & 0xf000000f) | 0x01a0f000;
17184 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
17185 }
17186 }
17187
17188 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
17189 other variants, NaCl needs this entry in a static executable's
17190 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
17191 zero. For .iplt really only the last bundle is useful, and .iplt
17192 could have a shorter first entry, with each individual PLT entry's
17193 relative branch calculated differently so it targets the last
17194 bundle instead of the instruction before it (labelled .Lplt_tail
17195 above). But it's simpler to keep the size and layout of PLT0
17196 consistent with the dynamic case, at the cost of some dead code at
17197 the start of .iplt and the one dead store to the stack at the start
17198 of .Lplt_tail. */
17199 static void
17200 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17201 asection *plt, bfd_vma got_displacement)
17202 {
17203 unsigned int i;
17204
17205 put_arm_insn (htab, output_bfd,
17206 elf32_arm_nacl_plt0_entry[0]
17207 | arm_movw_immediate (got_displacement),
17208 plt->contents + 0);
17209 put_arm_insn (htab, output_bfd,
17210 elf32_arm_nacl_plt0_entry[1]
17211 | arm_movt_immediate (got_displacement),
17212 plt->contents + 4);
17213
17214 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
17215 put_arm_insn (htab, output_bfd,
17216 elf32_arm_nacl_plt0_entry[i],
17217 plt->contents + (i * 4));
17218 }
17219
17220 /* Finish up the dynamic sections. */
17221
17222 static bfd_boolean
17223 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
17224 {
17225 bfd * dynobj;
17226 asection * sgot;
17227 asection * sdyn;
17228 struct elf32_arm_link_hash_table *htab;
17229
17230 htab = elf32_arm_hash_table (info);
17231 if (htab == NULL)
17232 return FALSE;
17233
17234 dynobj = elf_hash_table (info)->dynobj;
17235
17236 sgot = htab->root.sgotplt;
17237 /* A broken linker script might have discarded the dynamic sections.
17238 Catch this here so that we do not seg-fault later on. */
17239 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
17240 return FALSE;
17241 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
17242
17243 if (elf_hash_table (info)->dynamic_sections_created)
17244 {
17245 asection *splt;
17246 Elf32_External_Dyn *dyncon, *dynconend;
17247
17248 splt = htab->root.splt;
17249 BFD_ASSERT (splt != NULL && sdyn != NULL);
17250 BFD_ASSERT (htab->symbian_p || sgot != NULL);
17251
17252 dyncon = (Elf32_External_Dyn *) sdyn->contents;
17253 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
17254
17255 for (; dyncon < dynconend; dyncon++)
17256 {
17257 Elf_Internal_Dyn dyn;
17258 const char * name;
17259 asection * s;
17260
17261 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
17262
17263 switch (dyn.d_tag)
17264 {
17265 unsigned int type;
17266
17267 default:
17268 if (htab->vxworks_p
17269 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
17270 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17271 break;
17272
17273 case DT_HASH:
17274 name = ".hash";
17275 goto get_vma_if_bpabi;
17276 case DT_STRTAB:
17277 name = ".dynstr";
17278 goto get_vma_if_bpabi;
17279 case DT_SYMTAB:
17280 name = ".dynsym";
17281 goto get_vma_if_bpabi;
17282 case DT_VERSYM:
17283 name = ".gnu.version";
17284 goto get_vma_if_bpabi;
17285 case DT_VERDEF:
17286 name = ".gnu.version_d";
17287 goto get_vma_if_bpabi;
17288 case DT_VERNEED:
17289 name = ".gnu.version_r";
17290 goto get_vma_if_bpabi;
17291
17292 case DT_PLTGOT:
17293 name = htab->symbian_p ? ".got" : ".got.plt";
17294 goto get_vma;
17295 case DT_JMPREL:
17296 name = RELOC_SECTION (htab, ".plt");
17297 get_vma:
17298 s = bfd_get_linker_section (dynobj, name);
17299 if (s == NULL)
17300 {
17301 _bfd_error_handler
17302 (_("could not find section %s"), name);
17303 bfd_set_error (bfd_error_invalid_operation);
17304 return FALSE;
17305 }
17306 if (!htab->symbian_p)
17307 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
17308 else
17309 /* In the BPABI, tags in the PT_DYNAMIC section point
17310 at the file offset, not the memory address, for the
17311 convenience of the post linker. */
17312 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
17313 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17314 break;
17315
17316 get_vma_if_bpabi:
17317 if (htab->symbian_p)
17318 goto get_vma;
17319 break;
17320
17321 case DT_PLTRELSZ:
17322 s = htab->root.srelplt;
17323 BFD_ASSERT (s != NULL);
17324 dyn.d_un.d_val = s->size;
17325 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17326 break;
17327
17328 case DT_RELSZ:
17329 case DT_RELASZ:
17330 case DT_REL:
17331 case DT_RELA:
17332 /* In the BPABI, the DT_REL tag must point at the file
17333 offset, not the VMA, of the first relocation
17334 section. So, we use code similar to that in
17335 elflink.c, but do not check for SHF_ALLOC on the
17336 relocation section, since relocation sections are
17337 never allocated under the BPABI. PLT relocs are also
17338 included. */
17339 if (htab->symbian_p)
17340 {
17341 unsigned int i;
17342 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
17343 ? SHT_REL : SHT_RELA);
17344 dyn.d_un.d_val = 0;
17345 for (i = 1; i < elf_numsections (output_bfd); i++)
17346 {
17347 Elf_Internal_Shdr *hdr
17348 = elf_elfsections (output_bfd)[i];
17349 if (hdr->sh_type == type)
17350 {
17351 if (dyn.d_tag == DT_RELSZ
17352 || dyn.d_tag == DT_RELASZ)
17353 dyn.d_un.d_val += hdr->sh_size;
17354 else if ((ufile_ptr) hdr->sh_offset
17355 <= dyn.d_un.d_val - 1)
17356 dyn.d_un.d_val = hdr->sh_offset;
17357 }
17358 }
17359 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17360 }
17361 break;
17362
17363 case DT_TLSDESC_PLT:
17364 s = htab->root.splt;
17365 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17366 + htab->dt_tlsdesc_plt);
17367 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17368 break;
17369
17370 case DT_TLSDESC_GOT:
17371 s = htab->root.sgot;
17372 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17373 + htab->dt_tlsdesc_got);
17374 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17375 break;
17376
17377 /* Set the bottom bit of DT_INIT/FINI if the
17378 corresponding function is Thumb. */
17379 case DT_INIT:
17380 name = info->init_function;
17381 goto get_sym;
17382 case DT_FINI:
17383 name = info->fini_function;
17384 get_sym:
17385 /* If it wasn't set by elf_bfd_final_link
17386 then there is nothing to adjust. */
17387 if (dyn.d_un.d_val != 0)
17388 {
17389 struct elf_link_hash_entry * eh;
17390
17391 eh = elf_link_hash_lookup (elf_hash_table (info), name,
17392 FALSE, FALSE, TRUE);
17393 if (eh != NULL
17394 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
17395 == ST_BRANCH_TO_THUMB)
17396 {
17397 dyn.d_un.d_val |= 1;
17398 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17399 }
17400 }
17401 break;
17402 }
17403 }
17404
17405 /* Fill in the first entry in the procedure linkage table. */
17406 if (splt->size > 0 && htab->plt_header_size)
17407 {
17408 const bfd_vma *plt0_entry;
17409 bfd_vma got_address, plt_address, got_displacement;
17410
17411 /* Calculate the addresses of the GOT and PLT. */
17412 got_address = sgot->output_section->vma + sgot->output_offset;
17413 plt_address = splt->output_section->vma + splt->output_offset;
17414
17415 if (htab->vxworks_p)
17416 {
17417 /* The VxWorks GOT is relocated by the dynamic linker.
17418 Therefore, we must emit relocations rather than simply
17419 computing the values now. */
17420 Elf_Internal_Rela rel;
17421
17422 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
17423 put_arm_insn (htab, output_bfd, plt0_entry[0],
17424 splt->contents + 0);
17425 put_arm_insn (htab, output_bfd, plt0_entry[1],
17426 splt->contents + 4);
17427 put_arm_insn (htab, output_bfd, plt0_entry[2],
17428 splt->contents + 8);
17429 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
17430
17431 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
17432 rel.r_offset = plt_address + 12;
17433 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17434 rel.r_addend = 0;
17435 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
17436 htab->srelplt2->contents);
17437 }
17438 else if (htab->nacl_p)
17439 arm_nacl_put_plt0 (htab, output_bfd, splt,
17440 got_address + 8 - (plt_address + 16));
17441 else if (using_thumb_only (htab))
17442 {
17443 got_displacement = got_address - (plt_address + 12);
17444
17445 plt0_entry = elf32_thumb2_plt0_entry;
17446 put_arm_insn (htab, output_bfd, plt0_entry[0],
17447 splt->contents + 0);
17448 put_arm_insn (htab, output_bfd, plt0_entry[1],
17449 splt->contents + 4);
17450 put_arm_insn (htab, output_bfd, plt0_entry[2],
17451 splt->contents + 8);
17452
17453 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
17454 }
17455 else
17456 {
17457 got_displacement = got_address - (plt_address + 16);
17458
17459 plt0_entry = elf32_arm_plt0_entry;
17460 put_arm_insn (htab, output_bfd, plt0_entry[0],
17461 splt->contents + 0);
17462 put_arm_insn (htab, output_bfd, plt0_entry[1],
17463 splt->contents + 4);
17464 put_arm_insn (htab, output_bfd, plt0_entry[2],
17465 splt->contents + 8);
17466 put_arm_insn (htab, output_bfd, plt0_entry[3],
17467 splt->contents + 12);
17468
17469 #ifdef FOUR_WORD_PLT
17470 /* The displacement value goes in the otherwise-unused
17471 last word of the second entry. */
17472 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
17473 #else
17474 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
17475 #endif
17476 }
17477 }
17478
17479 /* UnixWare sets the entsize of .plt to 4, although that doesn't
17480 really seem like the right value. */
17481 if (splt->output_section->owner == output_bfd)
17482 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
17483
17484 if (htab->dt_tlsdesc_plt)
17485 {
17486 bfd_vma got_address
17487 = sgot->output_section->vma + sgot->output_offset;
17488 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
17489 + htab->root.sgot->output_offset);
17490 bfd_vma plt_address
17491 = splt->output_section->vma + splt->output_offset;
17492
17493 arm_put_trampoline (htab, output_bfd,
17494 splt->contents + htab->dt_tlsdesc_plt,
17495 dl_tlsdesc_lazy_trampoline, 6);
17496
17497 bfd_put_32 (output_bfd,
17498 gotplt_address + htab->dt_tlsdesc_got
17499 - (plt_address + htab->dt_tlsdesc_plt)
17500 - dl_tlsdesc_lazy_trampoline[6],
17501 splt->contents + htab->dt_tlsdesc_plt + 24);
17502 bfd_put_32 (output_bfd,
17503 got_address - (plt_address + htab->dt_tlsdesc_plt)
17504 - dl_tlsdesc_lazy_trampoline[7],
17505 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
17506 }
17507
17508 if (htab->tls_trampoline)
17509 {
17510 arm_put_trampoline (htab, output_bfd,
17511 splt->contents + htab->tls_trampoline,
17512 tls_trampoline, 3);
17513 #ifdef FOUR_WORD_PLT
17514 bfd_put_32 (output_bfd, 0x00000000,
17515 splt->contents + htab->tls_trampoline + 12);
17516 #endif
17517 }
17518
17519 if (htab->vxworks_p
17520 && !bfd_link_pic (info)
17521 && htab->root.splt->size > 0)
17522 {
17523 /* Correct the .rel(a).plt.unloaded relocations. They will have
17524 incorrect symbol indexes. */
17525 int num_plts;
17526 unsigned char *p;
17527
17528 num_plts = ((htab->root.splt->size - htab->plt_header_size)
17529 / htab->plt_entry_size);
17530 p = htab->srelplt2->contents + RELOC_SIZE (htab);
17531
17532 for (; num_plts; num_plts--)
17533 {
17534 Elf_Internal_Rela rel;
17535
17536 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17537 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17538 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17539 p += RELOC_SIZE (htab);
17540
17541 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17542 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
17543 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17544 p += RELOC_SIZE (htab);
17545 }
17546 }
17547 }
17548
17549 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
17550 /* NaCl uses a special first entry in .iplt too. */
17551 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
17552
17553 /* Fill in the first three entries in the global offset table. */
17554 if (sgot)
17555 {
17556 if (sgot->size > 0)
17557 {
17558 if (sdyn == NULL)
17559 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
17560 else
17561 bfd_put_32 (output_bfd,
17562 sdyn->output_section->vma + sdyn->output_offset,
17563 sgot->contents);
17564 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
17565 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
17566 }
17567
17568 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
17569 }
17570
17571 /* At the very end of the .rofixup section is a pointer to the GOT. */
17572 if (htab->fdpic_p && htab->srofixup != NULL)
17573 {
17574 struct elf_link_hash_entry *hgot = htab->root.hgot;
17575
17576 bfd_vma got_value = hgot->root.u.def.value
17577 + hgot->root.u.def.section->output_section->vma
17578 + hgot->root.u.def.section->output_offset;
17579
17580 arm_elf_add_rofixup(output_bfd, htab->srofixup, got_value);
17581
17582 /* Make sure we allocated and generated the same number of fixups. */
17583 BFD_ASSERT (htab->srofixup->reloc_count * 4 == htab->srofixup->size);
17584 }
17585
17586 return TRUE;
17587 }
17588
17589 static void
17590 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
17591 {
17592 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
17593 struct elf32_arm_link_hash_table *globals;
17594 struct elf_segment_map *m;
17595
17596 i_ehdrp = elf_elfheader (abfd);
17597
17598 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
17599 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
17600 else
17601 _bfd_elf_post_process_headers (abfd, link_info);
17602 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
17603
17604 if (link_info)
17605 {
17606 globals = elf32_arm_hash_table (link_info);
17607 if (globals != NULL && globals->byteswap_code)
17608 i_ehdrp->e_flags |= EF_ARM_BE8;
17609
17610 if (globals->fdpic_p)
17611 i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC;
17612 }
17613
17614 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
17615 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
17616 {
17617 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
17618 if (abi == AEABI_VFP_args_vfp)
17619 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
17620 else
17621 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
17622 }
17623
17624 /* Scan segment to set p_flags attribute if it contains only sections with
17625 SHF_ARM_PURECODE flag. */
17626 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
17627 {
17628 unsigned int j;
17629
17630 if (m->count == 0)
17631 continue;
17632 for (j = 0; j < m->count; j++)
17633 {
17634 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
17635 break;
17636 }
17637 if (j == m->count)
17638 {
17639 m->p_flags = PF_X;
17640 m->p_flags_valid = 1;
17641 }
17642 }
17643 }
17644
17645 static enum elf_reloc_type_class
17646 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
17647 const asection *rel_sec ATTRIBUTE_UNUSED,
17648 const Elf_Internal_Rela *rela)
17649 {
17650 switch ((int) ELF32_R_TYPE (rela->r_info))
17651 {
17652 case R_ARM_RELATIVE:
17653 return reloc_class_relative;
17654 case R_ARM_JUMP_SLOT:
17655 return reloc_class_plt;
17656 case R_ARM_COPY:
17657 return reloc_class_copy;
17658 case R_ARM_IRELATIVE:
17659 return reloc_class_ifunc;
17660 default:
17661 return reloc_class_normal;
17662 }
17663 }
17664
17665 static void
17666 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
17667 {
17668 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
17669 }
17670
17671 /* Return TRUE if this is an unwinding table entry. */
17672
17673 static bfd_boolean
17674 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
17675 {
17676 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
17677 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
17678 }
17679
17680
17681 /* Set the type and flags for an ARM section. We do this by
17682 the section name, which is a hack, but ought to work. */
17683
17684 static bfd_boolean
17685 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
17686 {
17687 const char * name;
17688
17689 name = bfd_get_section_name (abfd, sec);
17690
17691 if (is_arm_elf_unwind_section_name (abfd, name))
17692 {
17693 hdr->sh_type = SHT_ARM_EXIDX;
17694 hdr->sh_flags |= SHF_LINK_ORDER;
17695 }
17696
17697 if (sec->flags & SEC_ELF_PURECODE)
17698 hdr->sh_flags |= SHF_ARM_PURECODE;
17699
17700 return TRUE;
17701 }
17702
17703 /* Handle an ARM specific section when reading an object file. This is
17704 called when bfd_section_from_shdr finds a section with an unknown
17705 type. */
17706
17707 static bfd_boolean
17708 elf32_arm_section_from_shdr (bfd *abfd,
17709 Elf_Internal_Shdr * hdr,
17710 const char *name,
17711 int shindex)
17712 {
17713 /* There ought to be a place to keep ELF backend specific flags, but
17714 at the moment there isn't one. We just keep track of the
17715 sections by their name, instead. Fortunately, the ABI gives
17716 names for all the ARM specific sections, so we will probably get
17717 away with this. */
17718 switch (hdr->sh_type)
17719 {
17720 case SHT_ARM_EXIDX:
17721 case SHT_ARM_PREEMPTMAP:
17722 case SHT_ARM_ATTRIBUTES:
17723 break;
17724
17725 default:
17726 return FALSE;
17727 }
17728
17729 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
17730 return FALSE;
17731
17732 return TRUE;
17733 }
17734
17735 static _arm_elf_section_data *
17736 get_arm_elf_section_data (asection * sec)
17737 {
17738 if (sec && sec->owner && is_arm_elf (sec->owner))
17739 return elf32_arm_section_data (sec);
17740 else
17741 return NULL;
17742 }
17743
17744 typedef struct
17745 {
17746 void *flaginfo;
17747 struct bfd_link_info *info;
17748 asection *sec;
17749 int sec_shndx;
17750 int (*func) (void *, const char *, Elf_Internal_Sym *,
17751 asection *, struct elf_link_hash_entry *);
17752 } output_arch_syminfo;
17753
17754 enum map_symbol_type
17755 {
17756 ARM_MAP_ARM,
17757 ARM_MAP_THUMB,
17758 ARM_MAP_DATA
17759 };
17760
17761
17762 /* Output a single mapping symbol. */
17763
17764 static bfd_boolean
17765 elf32_arm_output_map_sym (output_arch_syminfo *osi,
17766 enum map_symbol_type type,
17767 bfd_vma offset)
17768 {
17769 static const char *names[3] = {"$a", "$t", "$d"};
17770 Elf_Internal_Sym sym;
17771
17772 sym.st_value = osi->sec->output_section->vma
17773 + osi->sec->output_offset
17774 + offset;
17775 sym.st_size = 0;
17776 sym.st_other = 0;
17777 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
17778 sym.st_shndx = osi->sec_shndx;
17779 sym.st_target_internal = 0;
17780 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
17781 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
17782 }
17783
17784 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
17785 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
17786
17787 static bfd_boolean
17788 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
17789 bfd_boolean is_iplt_entry_p,
17790 union gotplt_union *root_plt,
17791 struct arm_plt_info *arm_plt)
17792 {
17793 struct elf32_arm_link_hash_table *htab;
17794 bfd_vma addr, plt_header_size;
17795
17796 if (root_plt->offset == (bfd_vma) -1)
17797 return TRUE;
17798
17799 htab = elf32_arm_hash_table (osi->info);
17800 if (htab == NULL)
17801 return FALSE;
17802
17803 if (is_iplt_entry_p)
17804 {
17805 osi->sec = htab->root.iplt;
17806 plt_header_size = 0;
17807 }
17808 else
17809 {
17810 osi->sec = htab->root.splt;
17811 plt_header_size = htab->plt_header_size;
17812 }
17813 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
17814 (osi->info->output_bfd, osi->sec->output_section));
17815
17816 addr = root_plt->offset & -2;
17817 if (htab->symbian_p)
17818 {
17819 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17820 return FALSE;
17821 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
17822 return FALSE;
17823 }
17824 else if (htab->vxworks_p)
17825 {
17826 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17827 return FALSE;
17828 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
17829 return FALSE;
17830 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
17831 return FALSE;
17832 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
17833 return FALSE;
17834 }
17835 else if (htab->nacl_p)
17836 {
17837 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17838 return FALSE;
17839 }
17840 else if (htab->fdpic_p)
17841 {
17842 enum map_symbol_type type = using_thumb_only(htab)
17843 ? ARM_MAP_THUMB
17844 : ARM_MAP_ARM;
17845
17846 if (elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt))
17847 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17848 return FALSE;
17849 if (!elf32_arm_output_map_sym (osi, type, addr))
17850 return FALSE;
17851 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 16))
17852 return FALSE;
17853 if (htab->plt_entry_size == 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry))
17854 if (!elf32_arm_output_map_sym (osi, type, addr + 24))
17855 return FALSE;
17856 }
17857 else if (using_thumb_only (htab))
17858 {
17859 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
17860 return FALSE;
17861 }
17862 else
17863 {
17864 bfd_boolean thumb_stub_p;
17865
17866 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
17867 if (thumb_stub_p)
17868 {
17869 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17870 return FALSE;
17871 }
17872 #ifdef FOUR_WORD_PLT
17873 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17874 return FALSE;
17875 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17876 return FALSE;
17877 #else
17878 /* A three-word PLT with no Thumb thunk contains only Arm code,
17879 so only need to output a mapping symbol for the first PLT entry and
17880 entries with thumb thunks. */
17881 if (thumb_stub_p || addr == plt_header_size)
17882 {
17883 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17884 return FALSE;
17885 }
17886 #endif
17887 }
17888
17889 return TRUE;
17890 }
17891
17892 /* Output mapping symbols for PLT entries associated with H. */
17893
17894 static bfd_boolean
17895 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
17896 {
17897 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
17898 struct elf32_arm_link_hash_entry *eh;
17899
17900 if (h->root.type == bfd_link_hash_indirect)
17901 return TRUE;
17902
17903 if (h->root.type == bfd_link_hash_warning)
17904 /* When warning symbols are created, they **replace** the "real"
17905 entry in the hash table, thus we never get to see the real
17906 symbol in a hash traversal. So look at it now. */
17907 h = (struct elf_link_hash_entry *) h->root.u.i.link;
17908
17909 eh = (struct elf32_arm_link_hash_entry *) h;
17910 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
17911 &h->plt, &eh->plt);
17912 }
17913
17914 /* Bind a veneered symbol to its veneer identified by its hash entry
17915 STUB_ENTRY. The veneered location thus loose its symbol. */
17916
17917 static void
17918 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
17919 {
17920 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
17921
17922 BFD_ASSERT (hash);
17923 hash->root.root.u.def.section = stub_entry->stub_sec;
17924 hash->root.root.u.def.value = stub_entry->stub_offset;
17925 hash->root.size = stub_entry->stub_size;
17926 }
17927
17928 /* Output a single local symbol for a generated stub. */
17929
17930 static bfd_boolean
17931 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
17932 bfd_vma offset, bfd_vma size)
17933 {
17934 Elf_Internal_Sym sym;
17935
17936 sym.st_value = osi->sec->output_section->vma
17937 + osi->sec->output_offset
17938 + offset;
17939 sym.st_size = size;
17940 sym.st_other = 0;
17941 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
17942 sym.st_shndx = osi->sec_shndx;
17943 sym.st_target_internal = 0;
17944 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
17945 }
17946
17947 static bfd_boolean
17948 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
17949 void * in_arg)
17950 {
17951 struct elf32_arm_stub_hash_entry *stub_entry;
17952 asection *stub_sec;
17953 bfd_vma addr;
17954 char *stub_name;
17955 output_arch_syminfo *osi;
17956 const insn_sequence *template_sequence;
17957 enum stub_insn_type prev_type;
17958 int size;
17959 int i;
17960 enum map_symbol_type sym_type;
17961
17962 /* Massage our args to the form they really have. */
17963 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17964 osi = (output_arch_syminfo *) in_arg;
17965
17966 stub_sec = stub_entry->stub_sec;
17967
17968 /* Ensure this stub is attached to the current section being
17969 processed. */
17970 if (stub_sec != osi->sec)
17971 return TRUE;
17972
17973 addr = (bfd_vma) stub_entry->stub_offset;
17974 template_sequence = stub_entry->stub_template;
17975
17976 if (arm_stub_sym_claimed (stub_entry->stub_type))
17977 arm_stub_claim_sym (stub_entry);
17978 else
17979 {
17980 stub_name = stub_entry->output_name;
17981 switch (template_sequence[0].type)
17982 {
17983 case ARM_TYPE:
17984 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
17985 stub_entry->stub_size))
17986 return FALSE;
17987 break;
17988 case THUMB16_TYPE:
17989 case THUMB32_TYPE:
17990 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
17991 stub_entry->stub_size))
17992 return FALSE;
17993 break;
17994 default:
17995 BFD_FAIL ();
17996 return 0;
17997 }
17998 }
17999
18000 prev_type = DATA_TYPE;
18001 size = 0;
18002 for (i = 0; i < stub_entry->stub_template_size; i++)
18003 {
18004 switch (template_sequence[i].type)
18005 {
18006 case ARM_TYPE:
18007 sym_type = ARM_MAP_ARM;
18008 break;
18009
18010 case THUMB16_TYPE:
18011 case THUMB32_TYPE:
18012 sym_type = ARM_MAP_THUMB;
18013 break;
18014
18015 case DATA_TYPE:
18016 sym_type = ARM_MAP_DATA;
18017 break;
18018
18019 default:
18020 BFD_FAIL ();
18021 return FALSE;
18022 }
18023
18024 if (template_sequence[i].type != prev_type)
18025 {
18026 prev_type = template_sequence[i].type;
18027 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
18028 return FALSE;
18029 }
18030
18031 switch (template_sequence[i].type)
18032 {
18033 case ARM_TYPE:
18034 case THUMB32_TYPE:
18035 size += 4;
18036 break;
18037
18038 case THUMB16_TYPE:
18039 size += 2;
18040 break;
18041
18042 case DATA_TYPE:
18043 size += 4;
18044 break;
18045
18046 default:
18047 BFD_FAIL ();
18048 return FALSE;
18049 }
18050 }
18051
18052 return TRUE;
18053 }
18054
18055 /* Output mapping symbols for linker generated sections,
18056 and for those data-only sections that do not have a
18057 $d. */
18058
18059 static bfd_boolean
18060 elf32_arm_output_arch_local_syms (bfd *output_bfd,
18061 struct bfd_link_info *info,
18062 void *flaginfo,
18063 int (*func) (void *, const char *,
18064 Elf_Internal_Sym *,
18065 asection *,
18066 struct elf_link_hash_entry *))
18067 {
18068 output_arch_syminfo osi;
18069 struct elf32_arm_link_hash_table *htab;
18070 bfd_vma offset;
18071 bfd_size_type size;
18072 bfd *input_bfd;
18073
18074 htab = elf32_arm_hash_table (info);
18075 if (htab == NULL)
18076 return FALSE;
18077
18078 check_use_blx (htab);
18079
18080 osi.flaginfo = flaginfo;
18081 osi.info = info;
18082 osi.func = func;
18083
18084 /* Add a $d mapping symbol to data-only sections that
18085 don't have any mapping symbol. This may result in (harmless) redundant
18086 mapping symbols. */
18087 for (input_bfd = info->input_bfds;
18088 input_bfd != NULL;
18089 input_bfd = input_bfd->link.next)
18090 {
18091 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
18092 for (osi.sec = input_bfd->sections;
18093 osi.sec != NULL;
18094 osi.sec = osi.sec->next)
18095 {
18096 if (osi.sec->output_section != NULL
18097 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
18098 != 0)
18099 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
18100 == SEC_HAS_CONTENTS
18101 && get_arm_elf_section_data (osi.sec) != NULL
18102 && get_arm_elf_section_data (osi.sec)->mapcount == 0
18103 && osi.sec->size > 0
18104 && (osi.sec->flags & SEC_EXCLUDE) == 0)
18105 {
18106 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18107 (output_bfd, osi.sec->output_section);
18108 if (osi.sec_shndx != (int)SHN_BAD)
18109 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
18110 }
18111 }
18112 }
18113
18114 /* ARM->Thumb glue. */
18115 if (htab->arm_glue_size > 0)
18116 {
18117 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18118 ARM2THUMB_GLUE_SECTION_NAME);
18119
18120 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18121 (output_bfd, osi.sec->output_section);
18122 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
18123 || htab->pic_veneer)
18124 size = ARM2THUMB_PIC_GLUE_SIZE;
18125 else if (htab->use_blx)
18126 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
18127 else
18128 size = ARM2THUMB_STATIC_GLUE_SIZE;
18129
18130 for (offset = 0; offset < htab->arm_glue_size; offset += size)
18131 {
18132 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
18133 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
18134 }
18135 }
18136
18137 /* Thumb->ARM glue. */
18138 if (htab->thumb_glue_size > 0)
18139 {
18140 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18141 THUMB2ARM_GLUE_SECTION_NAME);
18142
18143 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18144 (output_bfd, osi.sec->output_section);
18145 size = THUMB2ARM_GLUE_SIZE;
18146
18147 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
18148 {
18149 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
18150 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
18151 }
18152 }
18153
18154 /* ARMv4 BX veneers. */
18155 if (htab->bx_glue_size > 0)
18156 {
18157 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18158 ARM_BX_GLUE_SECTION_NAME);
18159
18160 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18161 (output_bfd, osi.sec->output_section);
18162
18163 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
18164 }
18165
18166 /* Long calls stubs. */
18167 if (htab->stub_bfd && htab->stub_bfd->sections)
18168 {
18169 asection* stub_sec;
18170
18171 for (stub_sec = htab->stub_bfd->sections;
18172 stub_sec != NULL;
18173 stub_sec = stub_sec->next)
18174 {
18175 /* Ignore non-stub sections. */
18176 if (!strstr (stub_sec->name, STUB_SUFFIX))
18177 continue;
18178
18179 osi.sec = stub_sec;
18180
18181 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18182 (output_bfd, osi.sec->output_section);
18183
18184 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
18185 }
18186 }
18187
18188 /* Finally, output mapping symbols for the PLT. */
18189 if (htab->root.splt && htab->root.splt->size > 0)
18190 {
18191 osi.sec = htab->root.splt;
18192 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18193 (output_bfd, osi.sec->output_section));
18194
18195 /* Output mapping symbols for the plt header. SymbianOS does not have a
18196 plt header. */
18197 if (htab->vxworks_p)
18198 {
18199 /* VxWorks shared libraries have no PLT header. */
18200 if (!bfd_link_pic (info))
18201 {
18202 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18203 return FALSE;
18204 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18205 return FALSE;
18206 }
18207 }
18208 else if (htab->nacl_p)
18209 {
18210 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18211 return FALSE;
18212 }
18213 else if (using_thumb_only (htab) && !htab->fdpic_p)
18214 {
18215 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
18216 return FALSE;
18217 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18218 return FALSE;
18219 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
18220 return FALSE;
18221 }
18222 else if (!htab->symbian_p && !htab->fdpic_p)
18223 {
18224 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18225 return FALSE;
18226 #ifndef FOUR_WORD_PLT
18227 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
18228 return FALSE;
18229 #endif
18230 }
18231 }
18232 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
18233 {
18234 /* NaCl uses a special first entry in .iplt too. */
18235 osi.sec = htab->root.iplt;
18236 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18237 (output_bfd, osi.sec->output_section));
18238 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18239 return FALSE;
18240 }
18241 if ((htab->root.splt && htab->root.splt->size > 0)
18242 || (htab->root.iplt && htab->root.iplt->size > 0))
18243 {
18244 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
18245 for (input_bfd = info->input_bfds;
18246 input_bfd != NULL;
18247 input_bfd = input_bfd->link.next)
18248 {
18249 struct arm_local_iplt_info **local_iplt;
18250 unsigned int i, num_syms;
18251
18252 local_iplt = elf32_arm_local_iplt (input_bfd);
18253 if (local_iplt != NULL)
18254 {
18255 num_syms = elf_symtab_hdr (input_bfd).sh_info;
18256 for (i = 0; i < num_syms; i++)
18257 if (local_iplt[i] != NULL
18258 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
18259 &local_iplt[i]->root,
18260 &local_iplt[i]->arm))
18261 return FALSE;
18262 }
18263 }
18264 }
18265 if (htab->dt_tlsdesc_plt != 0)
18266 {
18267 /* Mapping symbols for the lazy tls trampoline. */
18268 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
18269 return FALSE;
18270
18271 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18272 htab->dt_tlsdesc_plt + 24))
18273 return FALSE;
18274 }
18275 if (htab->tls_trampoline != 0)
18276 {
18277 /* Mapping symbols for the tls trampoline. */
18278 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
18279 return FALSE;
18280 #ifdef FOUR_WORD_PLT
18281 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18282 htab->tls_trampoline + 12))
18283 return FALSE;
18284 #endif
18285 }
18286
18287 return TRUE;
18288 }
18289
18290 /* Filter normal symbols of CMSE entry functions of ABFD to include in
18291 the import library. All SYMCOUNT symbols of ABFD can be examined
18292 from their pointers in SYMS. Pointers of symbols to keep should be
18293 stored continuously at the beginning of that array.
18294
18295 Returns the number of symbols to keep. */
18296
18297 static unsigned int
18298 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18299 struct bfd_link_info *info,
18300 asymbol **syms, long symcount)
18301 {
18302 size_t maxnamelen;
18303 char *cmse_name;
18304 long src_count, dst_count = 0;
18305 struct elf32_arm_link_hash_table *htab;
18306
18307 htab = elf32_arm_hash_table (info);
18308 if (!htab->stub_bfd || !htab->stub_bfd->sections)
18309 symcount = 0;
18310
18311 maxnamelen = 128;
18312 cmse_name = (char *) bfd_malloc (maxnamelen);
18313 for (src_count = 0; src_count < symcount; src_count++)
18314 {
18315 struct elf32_arm_link_hash_entry *cmse_hash;
18316 asymbol *sym;
18317 flagword flags;
18318 char *name;
18319 size_t namelen;
18320
18321 sym = syms[src_count];
18322 flags = sym->flags;
18323 name = (char *) bfd_asymbol_name (sym);
18324
18325 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
18326 continue;
18327 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
18328 continue;
18329
18330 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
18331 if (namelen > maxnamelen)
18332 {
18333 cmse_name = (char *)
18334 bfd_realloc (cmse_name, namelen);
18335 maxnamelen = namelen;
18336 }
18337 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
18338 cmse_hash = (struct elf32_arm_link_hash_entry *)
18339 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
18340
18341 if (!cmse_hash
18342 || (cmse_hash->root.root.type != bfd_link_hash_defined
18343 && cmse_hash->root.root.type != bfd_link_hash_defweak)
18344 || cmse_hash->root.type != STT_FUNC)
18345 continue;
18346
18347 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
18348 continue;
18349
18350 syms[dst_count++] = sym;
18351 }
18352 free (cmse_name);
18353
18354 syms[dst_count] = NULL;
18355
18356 return dst_count;
18357 }
18358
18359 /* Filter symbols of ABFD to include in the import library. All
18360 SYMCOUNT symbols of ABFD can be examined from their pointers in
18361 SYMS. Pointers of symbols to keep should be stored continuously at
18362 the beginning of that array.
18363
18364 Returns the number of symbols to keep. */
18365
18366 static unsigned int
18367 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18368 struct bfd_link_info *info,
18369 asymbol **syms, long symcount)
18370 {
18371 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
18372
18373 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18374 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18375 library to be a relocatable object file. */
18376 BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
18377 if (globals->cmse_implib)
18378 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
18379 else
18380 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
18381 }
18382
18383 /* Allocate target specific section data. */
18384
18385 static bfd_boolean
18386 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
18387 {
18388 if (!sec->used_by_bfd)
18389 {
18390 _arm_elf_section_data *sdata;
18391 bfd_size_type amt = sizeof (*sdata);
18392
18393 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
18394 if (sdata == NULL)
18395 return FALSE;
18396 sec->used_by_bfd = sdata;
18397 }
18398
18399 return _bfd_elf_new_section_hook (abfd, sec);
18400 }
18401
18402
18403 /* Used to order a list of mapping symbols by address. */
18404
18405 static int
18406 elf32_arm_compare_mapping (const void * a, const void * b)
18407 {
18408 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
18409 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
18410
18411 if (amap->vma > bmap->vma)
18412 return 1;
18413 else if (amap->vma < bmap->vma)
18414 return -1;
18415 else if (amap->type > bmap->type)
18416 /* Ensure results do not depend on the host qsort for objects with
18417 multiple mapping symbols at the same address by sorting on type
18418 after vma. */
18419 return 1;
18420 else if (amap->type < bmap->type)
18421 return -1;
18422 else
18423 return 0;
18424 }
18425
18426 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
18427
18428 static unsigned long
18429 offset_prel31 (unsigned long addr, bfd_vma offset)
18430 {
18431 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
18432 }
18433
18434 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18435 relocations. */
18436
18437 static void
18438 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
18439 {
18440 unsigned long first_word = bfd_get_32 (output_bfd, from);
18441 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
18442
18443 /* High bit of first word is supposed to be zero. */
18444 if ((first_word & 0x80000000ul) == 0)
18445 first_word = offset_prel31 (first_word, offset);
18446
18447 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18448 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
18449 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
18450 second_word = offset_prel31 (second_word, offset);
18451
18452 bfd_put_32 (output_bfd, first_word, to);
18453 bfd_put_32 (output_bfd, second_word, to + 4);
18454 }
18455
18456 /* Data for make_branch_to_a8_stub(). */
18457
18458 struct a8_branch_to_stub_data
18459 {
18460 asection *writing_section;
18461 bfd_byte *contents;
18462 };
18463
18464
18465 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
18466 places for a particular section. */
18467
18468 static bfd_boolean
18469 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
18470 void *in_arg)
18471 {
18472 struct elf32_arm_stub_hash_entry *stub_entry;
18473 struct a8_branch_to_stub_data *data;
18474 bfd_byte *contents;
18475 unsigned long branch_insn;
18476 bfd_vma veneered_insn_loc, veneer_entry_loc;
18477 bfd_signed_vma branch_offset;
18478 bfd *abfd;
18479 unsigned int loc;
18480
18481 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18482 data = (struct a8_branch_to_stub_data *) in_arg;
18483
18484 if (stub_entry->target_section != data->writing_section
18485 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
18486 return TRUE;
18487
18488 contents = data->contents;
18489
18490 /* We use target_section as Cortex-A8 erratum workaround stubs are only
18491 generated when both source and target are in the same section. */
18492 veneered_insn_loc = stub_entry->target_section->output_section->vma
18493 + stub_entry->target_section->output_offset
18494 + stub_entry->source_value;
18495
18496 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
18497 + stub_entry->stub_sec->output_offset
18498 + stub_entry->stub_offset;
18499
18500 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
18501 veneered_insn_loc &= ~3u;
18502
18503 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
18504
18505 abfd = stub_entry->target_section->owner;
18506 loc = stub_entry->source_value;
18507
18508 /* We attempt to avoid this condition by setting stubs_always_after_branch
18509 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18510 This check is just to be on the safe side... */
18511 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
18512 {
18513 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18514 "allocated in unsafe location"), abfd);
18515 return FALSE;
18516 }
18517
18518 switch (stub_entry->stub_type)
18519 {
18520 case arm_stub_a8_veneer_b:
18521 case arm_stub_a8_veneer_b_cond:
18522 branch_insn = 0xf0009000;
18523 goto jump24;
18524
18525 case arm_stub_a8_veneer_blx:
18526 branch_insn = 0xf000e800;
18527 goto jump24;
18528
18529 case arm_stub_a8_veneer_bl:
18530 {
18531 unsigned int i1, j1, i2, j2, s;
18532
18533 branch_insn = 0xf000d000;
18534
18535 jump24:
18536 if (branch_offset < -16777216 || branch_offset > 16777214)
18537 {
18538 /* There's not much we can do apart from complain if this
18539 happens. */
18540 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18541 "of range (input file too large)"), abfd);
18542 return FALSE;
18543 }
18544
18545 /* i1 = not(j1 eor s), so:
18546 not i1 = j1 eor s
18547 j1 = (not i1) eor s. */
18548
18549 branch_insn |= (branch_offset >> 1) & 0x7ff;
18550 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
18551 i2 = (branch_offset >> 22) & 1;
18552 i1 = (branch_offset >> 23) & 1;
18553 s = (branch_offset >> 24) & 1;
18554 j1 = (!i1) ^ s;
18555 j2 = (!i2) ^ s;
18556 branch_insn |= j2 << 11;
18557 branch_insn |= j1 << 13;
18558 branch_insn |= s << 26;
18559 }
18560 break;
18561
18562 default:
18563 BFD_FAIL ();
18564 return FALSE;
18565 }
18566
18567 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
18568 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
18569
18570 return TRUE;
18571 }
18572
18573 /* Beginning of stm32l4xx work-around. */
18574
18575 /* Functions encoding instructions necessary for the emission of the
18576 fix-stm32l4xx-629360.
18577 Encoding is extracted from the
18578 ARM (C) Architecture Reference Manual
18579 ARMv7-A and ARMv7-R edition
18580 ARM DDI 0406C.b (ID072512). */
18581
18582 static inline bfd_vma
18583 create_instruction_branch_absolute (int branch_offset)
18584 {
18585 /* A8.8.18 B (A8-334)
18586 B target_address (Encoding T4). */
18587 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
18588 /* jump offset is: S:I1:I2:imm10:imm11:0. */
18589 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
18590
18591 int s = ((branch_offset & 0x1000000) >> 24);
18592 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
18593 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
18594
18595 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
18596 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
18597
18598 bfd_vma patched_inst = 0xf0009000
18599 | s << 26 /* S. */
18600 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
18601 | j1 << 13 /* J1. */
18602 | j2 << 11 /* J2. */
18603 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
18604
18605 return patched_inst;
18606 }
18607
18608 static inline bfd_vma
18609 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
18610 {
18611 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18612 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
18613 bfd_vma patched_inst = 0xe8900000
18614 | (/*W=*/wback << 21)
18615 | (base_reg << 16)
18616 | (reg_mask & 0x0000ffff);
18617
18618 return patched_inst;
18619 }
18620
18621 static inline bfd_vma
18622 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
18623 {
18624 /* A8.8.60 LDMDB/LDMEA (A8-402)
18625 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
18626 bfd_vma patched_inst = 0xe9100000
18627 | (/*W=*/wback << 21)
18628 | (base_reg << 16)
18629 | (reg_mask & 0x0000ffff);
18630
18631 return patched_inst;
18632 }
18633
18634 static inline bfd_vma
18635 create_instruction_mov (int target_reg, int source_reg)
18636 {
18637 /* A8.8.103 MOV (register) (A8-486)
18638 MOV Rd, Rm (Encoding T1). */
18639 bfd_vma patched_inst = 0x4600
18640 | (target_reg & 0x7)
18641 | ((target_reg & 0x8) >> 3) << 7
18642 | (source_reg << 3);
18643
18644 return patched_inst;
18645 }
18646
18647 static inline bfd_vma
18648 create_instruction_sub (int target_reg, int source_reg, int value)
18649 {
18650 /* A8.8.221 SUB (immediate) (A8-708)
18651 SUB Rd, Rn, #value (Encoding T3). */
18652 bfd_vma patched_inst = 0xf1a00000
18653 | (target_reg << 8)
18654 | (source_reg << 16)
18655 | (/*S=*/0 << 20)
18656 | ((value & 0x800) >> 11) << 26
18657 | ((value & 0x700) >> 8) << 12
18658 | (value & 0x0ff);
18659
18660 return patched_inst;
18661 }
18662
18663 static inline bfd_vma
18664 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
18665 int first_reg)
18666 {
18667 /* A8.8.332 VLDM (A8-922)
18668 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
18669 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
18670 | (/*W=*/wback << 21)
18671 | (base_reg << 16)
18672 | (num_words & 0x000000ff)
18673 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
18674 | (first_reg & 0x00000001) << 22;
18675
18676 return patched_inst;
18677 }
18678
18679 static inline bfd_vma
18680 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
18681 int first_reg)
18682 {
18683 /* A8.8.332 VLDM (A8-922)
18684 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
18685 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
18686 | (base_reg << 16)
18687 | (num_words & 0x000000ff)
18688 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
18689 | (first_reg & 0x00000001) << 22;
18690
18691 return patched_inst;
18692 }
18693
18694 static inline bfd_vma
18695 create_instruction_udf_w (int value)
18696 {
18697 /* A8.8.247 UDF (A8-758)
18698 Undefined (Encoding T2). */
18699 bfd_vma patched_inst = 0xf7f0a000
18700 | (value & 0x00000fff)
18701 | (value & 0x000f0000) << 16;
18702
18703 return patched_inst;
18704 }
18705
18706 static inline bfd_vma
18707 create_instruction_udf (int value)
18708 {
18709 /* A8.8.247 UDF (A8-758)
18710 Undefined (Encoding T1). */
18711 bfd_vma patched_inst = 0xde00
18712 | (value & 0xff);
18713
18714 return patched_inst;
18715 }
18716
18717 /* Functions writing an instruction in memory, returning the next
18718 memory position to write to. */
18719
18720 static inline bfd_byte *
18721 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
18722 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18723 {
18724 put_thumb2_insn (htab, output_bfd, insn, pt);
18725 return pt + 4;
18726 }
18727
18728 static inline bfd_byte *
18729 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
18730 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18731 {
18732 put_thumb_insn (htab, output_bfd, insn, pt);
18733 return pt + 2;
18734 }
18735
18736 /* Function filling up a region in memory with T1 and T2 UDFs taking
18737 care of alignment. */
18738
18739 static bfd_byte *
18740 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
18741 bfd * output_bfd,
18742 const bfd_byte * const base_stub_contents,
18743 bfd_byte * const from_stub_contents,
18744 const bfd_byte * const end_stub_contents)
18745 {
18746 bfd_byte *current_stub_contents = from_stub_contents;
18747
18748 /* Fill the remaining of the stub with deterministic contents : UDF
18749 instructions.
18750 Check if realignment is needed on modulo 4 frontier using T1, to
18751 further use T2. */
18752 if ((current_stub_contents < end_stub_contents)
18753 && !((current_stub_contents - base_stub_contents) % 2)
18754 && ((current_stub_contents - base_stub_contents) % 4))
18755 current_stub_contents =
18756 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18757 create_instruction_udf (0));
18758
18759 for (; current_stub_contents < end_stub_contents;)
18760 current_stub_contents =
18761 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18762 create_instruction_udf_w (0));
18763
18764 return current_stub_contents;
18765 }
18766
18767 /* Functions writing the stream of instructions equivalent to the
18768 derived sequence for ldmia, ldmdb, vldm respectively. */
18769
18770 static void
18771 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
18772 bfd * output_bfd,
18773 const insn32 initial_insn,
18774 const bfd_byte *const initial_insn_addr,
18775 bfd_byte *const base_stub_contents)
18776 {
18777 int wback = (initial_insn & 0x00200000) >> 21;
18778 int ri, rn = (initial_insn & 0x000F0000) >> 16;
18779 int insn_all_registers = initial_insn & 0x0000ffff;
18780 int insn_low_registers, insn_high_registers;
18781 int usable_register_mask;
18782 int nb_registers = elf32_arm_popcount (insn_all_registers);
18783 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18784 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18785 bfd_byte *current_stub_contents = base_stub_contents;
18786
18787 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
18788
18789 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18790 smaller than 8 registers load sequences that do not cause the
18791 hardware issue. */
18792 if (nb_registers <= 8)
18793 {
18794 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18795 current_stub_contents =
18796 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18797 initial_insn);
18798
18799 /* B initial_insn_addr+4. */
18800 if (!restore_pc)
18801 current_stub_contents =
18802 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18803 create_instruction_branch_absolute
18804 (initial_insn_addr - current_stub_contents));
18805
18806 /* Fill the remaining of the stub with deterministic contents. */
18807 current_stub_contents =
18808 stm32l4xx_fill_stub_udf (htab, output_bfd,
18809 base_stub_contents, current_stub_contents,
18810 base_stub_contents +
18811 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18812
18813 return;
18814 }
18815
18816 /* - reg_list[13] == 0. */
18817 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
18818
18819 /* - reg_list[14] & reg_list[15] != 1. */
18820 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18821
18822 /* - if (wback==1) reg_list[rn] == 0. */
18823 BFD_ASSERT (!wback || !restore_rn);
18824
18825 /* - nb_registers > 8. */
18826 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18827
18828 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18829
18830 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
18831 - One with the 7 lowest registers (register mask 0x007F)
18832 This LDM will finally contain between 2 and 7 registers
18833 - One with the 7 highest registers (register mask 0xDF80)
18834 This ldm will finally contain between 2 and 7 registers. */
18835 insn_low_registers = insn_all_registers & 0x007F;
18836 insn_high_registers = insn_all_registers & 0xDF80;
18837
18838 /* A spare register may be needed during this veneer to temporarily
18839 handle the base register. This register will be restored with the
18840 last LDM operation.
18841 The usable register may be any general purpose register (that
18842 excludes PC, SP, LR : register mask is 0x1FFF). */
18843 usable_register_mask = 0x1FFF;
18844
18845 /* Generate the stub function. */
18846 if (wback)
18847 {
18848 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
18849 current_stub_contents =
18850 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18851 create_instruction_ldmia
18852 (rn, /*wback=*/1, insn_low_registers));
18853
18854 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
18855 current_stub_contents =
18856 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18857 create_instruction_ldmia
18858 (rn, /*wback=*/1, insn_high_registers));
18859 if (!restore_pc)
18860 {
18861 /* B initial_insn_addr+4. */
18862 current_stub_contents =
18863 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18864 create_instruction_branch_absolute
18865 (initial_insn_addr - current_stub_contents));
18866 }
18867 }
18868 else /* if (!wback). */
18869 {
18870 ri = rn;
18871
18872 /* If Rn is not part of the high-register-list, move it there. */
18873 if (!(insn_high_registers & (1 << rn)))
18874 {
18875 /* Choose a Ri in the high-register-list that will be restored. */
18876 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18877
18878 /* MOV Ri, Rn. */
18879 current_stub_contents =
18880 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18881 create_instruction_mov (ri, rn));
18882 }
18883
18884 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18885 current_stub_contents =
18886 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18887 create_instruction_ldmia
18888 (ri, /*wback=*/1, insn_low_registers));
18889
18890 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
18891 current_stub_contents =
18892 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18893 create_instruction_ldmia
18894 (ri, /*wback=*/0, insn_high_registers));
18895
18896 if (!restore_pc)
18897 {
18898 /* B initial_insn_addr+4. */
18899 current_stub_contents =
18900 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18901 create_instruction_branch_absolute
18902 (initial_insn_addr - current_stub_contents));
18903 }
18904 }
18905
18906 /* Fill the remaining of the stub with deterministic contents. */
18907 current_stub_contents =
18908 stm32l4xx_fill_stub_udf (htab, output_bfd,
18909 base_stub_contents, current_stub_contents,
18910 base_stub_contents +
18911 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18912 }
18913
18914 static void
18915 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
18916 bfd * output_bfd,
18917 const insn32 initial_insn,
18918 const bfd_byte *const initial_insn_addr,
18919 bfd_byte *const base_stub_contents)
18920 {
18921 int wback = (initial_insn & 0x00200000) >> 21;
18922 int ri, rn = (initial_insn & 0x000f0000) >> 16;
18923 int insn_all_registers = initial_insn & 0x0000ffff;
18924 int insn_low_registers, insn_high_registers;
18925 int usable_register_mask;
18926 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18927 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18928 int nb_registers = elf32_arm_popcount (insn_all_registers);
18929 bfd_byte *current_stub_contents = base_stub_contents;
18930
18931 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
18932
18933 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18934 smaller than 8 registers load sequences that do not cause the
18935 hardware issue. */
18936 if (nb_registers <= 8)
18937 {
18938 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18939 current_stub_contents =
18940 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18941 initial_insn);
18942
18943 /* B initial_insn_addr+4. */
18944 current_stub_contents =
18945 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18946 create_instruction_branch_absolute
18947 (initial_insn_addr - current_stub_contents));
18948
18949 /* Fill the remaining of the stub with deterministic contents. */
18950 current_stub_contents =
18951 stm32l4xx_fill_stub_udf (htab, output_bfd,
18952 base_stub_contents, current_stub_contents,
18953 base_stub_contents +
18954 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18955
18956 return;
18957 }
18958
18959 /* - reg_list[13] == 0. */
18960 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
18961
18962 /* - reg_list[14] & reg_list[15] != 1. */
18963 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18964
18965 /* - if (wback==1) reg_list[rn] == 0. */
18966 BFD_ASSERT (!wback || !restore_rn);
18967
18968 /* - nb_registers > 8. */
18969 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18970
18971 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18972
18973 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
18974 - One with the 7 lowest registers (register mask 0x007F)
18975 This LDM will finally contain between 2 and 7 registers
18976 - One with the 7 highest registers (register mask 0xDF80)
18977 This ldm will finally contain between 2 and 7 registers. */
18978 insn_low_registers = insn_all_registers & 0x007F;
18979 insn_high_registers = insn_all_registers & 0xDF80;
18980
18981 /* A spare register may be needed during this veneer to temporarily
18982 handle the base register. This register will be restored with
18983 the last LDM operation.
18984 The usable register may be any general purpose register (that excludes
18985 PC, SP, LR : register mask is 0x1FFF). */
18986 usable_register_mask = 0x1FFF;
18987
18988 /* Generate the stub function. */
18989 if (!wback && !restore_pc && !restore_rn)
18990 {
18991 /* Choose a Ri in the low-register-list that will be restored. */
18992 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18993
18994 /* MOV Ri, Rn. */
18995 current_stub_contents =
18996 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18997 create_instruction_mov (ri, rn));
18998
18999 /* LDMDB Ri!, {R-high-register-list}. */
19000 current_stub_contents =
19001 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19002 create_instruction_ldmdb
19003 (ri, /*wback=*/1, insn_high_registers));
19004
19005 /* LDMDB Ri, {R-low-register-list}. */
19006 current_stub_contents =
19007 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19008 create_instruction_ldmdb
19009 (ri, /*wback=*/0, insn_low_registers));
19010
19011 /* B initial_insn_addr+4. */
19012 current_stub_contents =
19013 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19014 create_instruction_branch_absolute
19015 (initial_insn_addr - current_stub_contents));
19016 }
19017 else if (wback && !restore_pc && !restore_rn)
19018 {
19019 /* LDMDB Rn!, {R-high-register-list}. */
19020 current_stub_contents =
19021 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19022 create_instruction_ldmdb
19023 (rn, /*wback=*/1, insn_high_registers));
19024
19025 /* LDMDB Rn!, {R-low-register-list}. */
19026 current_stub_contents =
19027 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19028 create_instruction_ldmdb
19029 (rn, /*wback=*/1, insn_low_registers));
19030
19031 /* B initial_insn_addr+4. */
19032 current_stub_contents =
19033 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19034 create_instruction_branch_absolute
19035 (initial_insn_addr - current_stub_contents));
19036 }
19037 else if (!wback && restore_pc && !restore_rn)
19038 {
19039 /* Choose a Ri in the high-register-list that will be restored. */
19040 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19041
19042 /* SUB Ri, Rn, #(4*nb_registers). */
19043 current_stub_contents =
19044 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19045 create_instruction_sub (ri, rn, (4 * nb_registers)));
19046
19047 /* LDMIA Ri!, {R-low-register-list}. */
19048 current_stub_contents =
19049 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19050 create_instruction_ldmia
19051 (ri, /*wback=*/1, insn_low_registers));
19052
19053 /* LDMIA Ri, {R-high-register-list}. */
19054 current_stub_contents =
19055 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19056 create_instruction_ldmia
19057 (ri, /*wback=*/0, insn_high_registers));
19058 }
19059 else if (wback && restore_pc && !restore_rn)
19060 {
19061 /* Choose a Ri in the high-register-list that will be restored. */
19062 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19063
19064 /* SUB Rn, Rn, #(4*nb_registers) */
19065 current_stub_contents =
19066 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19067 create_instruction_sub (rn, rn, (4 * nb_registers)));
19068
19069 /* MOV Ri, Rn. */
19070 current_stub_contents =
19071 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19072 create_instruction_mov (ri, rn));
19073
19074 /* LDMIA Ri!, {R-low-register-list}. */
19075 current_stub_contents =
19076 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19077 create_instruction_ldmia
19078 (ri, /*wback=*/1, insn_low_registers));
19079
19080 /* LDMIA Ri, {R-high-register-list}. */
19081 current_stub_contents =
19082 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19083 create_instruction_ldmia
19084 (ri, /*wback=*/0, insn_high_registers));
19085 }
19086 else if (!wback && !restore_pc && restore_rn)
19087 {
19088 ri = rn;
19089 if (!(insn_low_registers & (1 << rn)))
19090 {
19091 /* Choose a Ri in the low-register-list that will be restored. */
19092 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19093
19094 /* MOV Ri, Rn. */
19095 current_stub_contents =
19096 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19097 create_instruction_mov (ri, rn));
19098 }
19099
19100 /* LDMDB Ri!, {R-high-register-list}. */
19101 current_stub_contents =
19102 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19103 create_instruction_ldmdb
19104 (ri, /*wback=*/1, insn_high_registers));
19105
19106 /* LDMDB Ri, {R-low-register-list}. */
19107 current_stub_contents =
19108 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19109 create_instruction_ldmdb
19110 (ri, /*wback=*/0, insn_low_registers));
19111
19112 /* B initial_insn_addr+4. */
19113 current_stub_contents =
19114 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19115 create_instruction_branch_absolute
19116 (initial_insn_addr - current_stub_contents));
19117 }
19118 else if (!wback && restore_pc && restore_rn)
19119 {
19120 ri = rn;
19121 if (!(insn_high_registers & (1 << rn)))
19122 {
19123 /* Choose a Ri in the high-register-list that will be restored. */
19124 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19125 }
19126
19127 /* SUB Ri, Rn, #(4*nb_registers). */
19128 current_stub_contents =
19129 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19130 create_instruction_sub (ri, rn, (4 * nb_registers)));
19131
19132 /* LDMIA Ri!, {R-low-register-list}. */
19133 current_stub_contents =
19134 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19135 create_instruction_ldmia
19136 (ri, /*wback=*/1, insn_low_registers));
19137
19138 /* LDMIA Ri, {R-high-register-list}. */
19139 current_stub_contents =
19140 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19141 create_instruction_ldmia
19142 (ri, /*wback=*/0, insn_high_registers));
19143 }
19144 else if (wback && restore_rn)
19145 {
19146 /* The assembler should not have accepted to encode this. */
19147 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
19148 "undefined behavior.\n");
19149 }
19150
19151 /* Fill the remaining of the stub with deterministic contents. */
19152 current_stub_contents =
19153 stm32l4xx_fill_stub_udf (htab, output_bfd,
19154 base_stub_contents, current_stub_contents,
19155 base_stub_contents +
19156 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19157
19158 }
19159
19160 static void
19161 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
19162 bfd * output_bfd,
19163 const insn32 initial_insn,
19164 const bfd_byte *const initial_insn_addr,
19165 bfd_byte *const base_stub_contents)
19166 {
19167 int num_words = ((unsigned int) initial_insn << 24) >> 24;
19168 bfd_byte *current_stub_contents = base_stub_contents;
19169
19170 BFD_ASSERT (is_thumb2_vldm (initial_insn));
19171
19172 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19173 smaller than 8 words load sequences that do not cause the
19174 hardware issue. */
19175 if (num_words <= 8)
19176 {
19177 /* Untouched instruction. */
19178 current_stub_contents =
19179 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19180 initial_insn);
19181
19182 /* B initial_insn_addr+4. */
19183 current_stub_contents =
19184 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19185 create_instruction_branch_absolute
19186 (initial_insn_addr - current_stub_contents));
19187 }
19188 else
19189 {
19190 bfd_boolean is_dp = /* DP encoding. */
19191 (initial_insn & 0xfe100f00) == 0xec100b00;
19192 bfd_boolean is_ia_nobang = /* (IA without !). */
19193 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
19194 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
19195 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
19196 bfd_boolean is_db_bang = /* (DB with !). */
19197 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
19198 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
19199 /* d = UInt (Vd:D);. */
19200 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
19201 | (((unsigned int)initial_insn << 9) >> 31);
19202
19203 /* Compute the number of 8-words chunks needed to split. */
19204 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
19205 int chunk;
19206
19207 /* The test coverage has been done assuming the following
19208 hypothesis that exactly one of the previous is_ predicates is
19209 true. */
19210 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
19211 && !(is_ia_nobang & is_ia_bang & is_db_bang));
19212
19213 /* We treat the cutting of the words in one pass for all
19214 cases, then we emit the adjustments:
19215
19216 vldm rx, {...}
19217 -> vldm rx!, {8_words_or_less} for each needed 8_word
19218 -> sub rx, rx, #size (list)
19219
19220 vldm rx!, {...}
19221 -> vldm rx!, {8_words_or_less} for each needed 8_word
19222 This also handles vpop instruction (when rx is sp)
19223
19224 vldmd rx!, {...}
19225 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
19226 for (chunk = 0; chunk < chunks; ++chunk)
19227 {
19228 bfd_vma new_insn = 0;
19229
19230 if (is_ia_nobang || is_ia_bang)
19231 {
19232 new_insn = create_instruction_vldmia
19233 (base_reg,
19234 is_dp,
19235 /*wback= . */1,
19236 chunks - (chunk + 1) ?
19237 8 : num_words - chunk * 8,
19238 first_reg + chunk * 8);
19239 }
19240 else if (is_db_bang)
19241 {
19242 new_insn = create_instruction_vldmdb
19243 (base_reg,
19244 is_dp,
19245 chunks - (chunk + 1) ?
19246 8 : num_words - chunk * 8,
19247 first_reg + chunk * 8);
19248 }
19249
19250 if (new_insn)
19251 current_stub_contents =
19252 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19253 new_insn);
19254 }
19255
19256 /* Only this case requires the base register compensation
19257 subtract. */
19258 if (is_ia_nobang)
19259 {
19260 current_stub_contents =
19261 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19262 create_instruction_sub
19263 (base_reg, base_reg, 4*num_words));
19264 }
19265
19266 /* B initial_insn_addr+4. */
19267 current_stub_contents =
19268 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19269 create_instruction_branch_absolute
19270 (initial_insn_addr - current_stub_contents));
19271 }
19272
19273 /* Fill the remaining of the stub with deterministic contents. */
19274 current_stub_contents =
19275 stm32l4xx_fill_stub_udf (htab, output_bfd,
19276 base_stub_contents, current_stub_contents,
19277 base_stub_contents +
19278 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
19279 }
19280
19281 static void
19282 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
19283 bfd * output_bfd,
19284 const insn32 wrong_insn,
19285 const bfd_byte *const wrong_insn_addr,
19286 bfd_byte *const stub_contents)
19287 {
19288 if (is_thumb2_ldmia (wrong_insn))
19289 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
19290 wrong_insn, wrong_insn_addr,
19291 stub_contents);
19292 else if (is_thumb2_ldmdb (wrong_insn))
19293 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
19294 wrong_insn, wrong_insn_addr,
19295 stub_contents);
19296 else if (is_thumb2_vldm (wrong_insn))
19297 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
19298 wrong_insn, wrong_insn_addr,
19299 stub_contents);
19300 }
19301
19302 /* End of stm32l4xx work-around. */
19303
19304
19305 /* Do code byteswapping. Return FALSE afterwards so that the section is
19306 written out as normal. */
19307
19308 static bfd_boolean
19309 elf32_arm_write_section (bfd *output_bfd,
19310 struct bfd_link_info *link_info,
19311 asection *sec,
19312 bfd_byte *contents)
19313 {
19314 unsigned int mapcount, errcount;
19315 _arm_elf_section_data *arm_data;
19316 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
19317 elf32_arm_section_map *map;
19318 elf32_vfp11_erratum_list *errnode;
19319 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
19320 bfd_vma ptr;
19321 bfd_vma end;
19322 bfd_vma offset = sec->output_section->vma + sec->output_offset;
19323 bfd_byte tmp;
19324 unsigned int i;
19325
19326 if (globals == NULL)
19327 return FALSE;
19328
19329 /* If this section has not been allocated an _arm_elf_section_data
19330 structure then we cannot record anything. */
19331 arm_data = get_arm_elf_section_data (sec);
19332 if (arm_data == NULL)
19333 return FALSE;
19334
19335 mapcount = arm_data->mapcount;
19336 map = arm_data->map;
19337 errcount = arm_data->erratumcount;
19338
19339 if (errcount != 0)
19340 {
19341 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
19342
19343 for (errnode = arm_data->erratumlist; errnode != 0;
19344 errnode = errnode->next)
19345 {
19346 bfd_vma target = errnode->vma - offset;
19347
19348 switch (errnode->type)
19349 {
19350 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
19351 {
19352 bfd_vma branch_to_veneer;
19353 /* Original condition code of instruction, plus bit mask for
19354 ARM B instruction. */
19355 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
19356 | 0x0a000000;
19357
19358 /* The instruction is before the label. */
19359 target -= 4;
19360
19361 /* Above offset included in -4 below. */
19362 branch_to_veneer = errnode->u.b.veneer->vma
19363 - errnode->vma - 4;
19364
19365 if ((signed) branch_to_veneer < -(1 << 25)
19366 || (signed) branch_to_veneer >= (1 << 25))
19367 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19368 "range"), output_bfd);
19369
19370 insn |= (branch_to_veneer >> 2) & 0xffffff;
19371 contents[endianflip ^ target] = insn & 0xff;
19372 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19373 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19374 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19375 }
19376 break;
19377
19378 case VFP11_ERRATUM_ARM_VENEER:
19379 {
19380 bfd_vma branch_from_veneer;
19381 unsigned int insn;
19382
19383 /* Take size of veneer into account. */
19384 branch_from_veneer = errnode->u.v.branch->vma
19385 - errnode->vma - 12;
19386
19387 if ((signed) branch_from_veneer < -(1 << 25)
19388 || (signed) branch_from_veneer >= (1 << 25))
19389 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19390 "range"), output_bfd);
19391
19392 /* Original instruction. */
19393 insn = errnode->u.v.branch->u.b.vfp_insn;
19394 contents[endianflip ^ target] = insn & 0xff;
19395 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19396 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19397 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19398
19399 /* Branch back to insn after original insn. */
19400 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
19401 contents[endianflip ^ (target + 4)] = insn & 0xff;
19402 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
19403 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
19404 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
19405 }
19406 break;
19407
19408 default:
19409 abort ();
19410 }
19411 }
19412 }
19413
19414 if (arm_data->stm32l4xx_erratumcount != 0)
19415 {
19416 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
19417 stm32l4xx_errnode != 0;
19418 stm32l4xx_errnode = stm32l4xx_errnode->next)
19419 {
19420 bfd_vma target = stm32l4xx_errnode->vma - offset;
19421
19422 switch (stm32l4xx_errnode->type)
19423 {
19424 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
19425 {
19426 unsigned int insn;
19427 bfd_vma branch_to_veneer =
19428 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
19429
19430 if ((signed) branch_to_veneer < -(1 << 24)
19431 || (signed) branch_to_veneer >= (1 << 24))
19432 {
19433 bfd_vma out_of_range =
19434 ((signed) branch_to_veneer < -(1 << 24)) ?
19435 - branch_to_veneer - (1 << 24) :
19436 ((signed) branch_to_veneer >= (1 << 24)) ?
19437 branch_to_veneer - (1 << 24) : 0;
19438
19439 _bfd_error_handler
19440 (_("%pB(%#" PRIx64 "): error: "
19441 "cannot create STM32L4XX veneer; "
19442 "jump out of range by %" PRId64 " bytes; "
19443 "cannot encode branch instruction"),
19444 output_bfd,
19445 (uint64_t) (stm32l4xx_errnode->vma - 4),
19446 (int64_t) out_of_range);
19447 continue;
19448 }
19449
19450 insn = create_instruction_branch_absolute
19451 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
19452
19453 /* The instruction is before the label. */
19454 target -= 4;
19455
19456 put_thumb2_insn (globals, output_bfd,
19457 (bfd_vma) insn, contents + target);
19458 }
19459 break;
19460
19461 case STM32L4XX_ERRATUM_VENEER:
19462 {
19463 bfd_byte * veneer;
19464 bfd_byte * veneer_r;
19465 unsigned int insn;
19466
19467 veneer = contents + target;
19468 veneer_r = veneer
19469 + stm32l4xx_errnode->u.b.veneer->vma
19470 - stm32l4xx_errnode->vma - 4;
19471
19472 if ((signed) (veneer_r - veneer -
19473 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
19474 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
19475 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
19476 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
19477 || (signed) (veneer_r - veneer) >= (1 << 24))
19478 {
19479 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19480 "veneer"), output_bfd);
19481 continue;
19482 }
19483
19484 /* Original instruction. */
19485 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
19486
19487 stm32l4xx_create_replacing_stub
19488 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
19489 }
19490 break;
19491
19492 default:
19493 abort ();
19494 }
19495 }
19496 }
19497
19498 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
19499 {
19500 arm_unwind_table_edit *edit_node
19501 = arm_data->u.exidx.unwind_edit_list;
19502 /* Now, sec->size is the size of the section we will write. The original
19503 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19504 markers) was sec->rawsize. (This isn't the case if we perform no
19505 edits, then rawsize will be zero and we should use size). */
19506 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
19507 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
19508 unsigned int in_index, out_index;
19509 bfd_vma add_to_offsets = 0;
19510
19511 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
19512 {
19513 if (edit_node)
19514 {
19515 unsigned int edit_index = edit_node->index;
19516
19517 if (in_index < edit_index && in_index * 8 < input_size)
19518 {
19519 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19520 contents + in_index * 8, add_to_offsets);
19521 out_index++;
19522 in_index++;
19523 }
19524 else if (in_index == edit_index
19525 || (in_index * 8 >= input_size
19526 && edit_index == UINT_MAX))
19527 {
19528 switch (edit_node->type)
19529 {
19530 case DELETE_EXIDX_ENTRY:
19531 in_index++;
19532 add_to_offsets += 8;
19533 break;
19534
19535 case INSERT_EXIDX_CANTUNWIND_AT_END:
19536 {
19537 asection *text_sec = edit_node->linked_section;
19538 bfd_vma text_offset = text_sec->output_section->vma
19539 + text_sec->output_offset
19540 + text_sec->size;
19541 bfd_vma exidx_offset = offset + out_index * 8;
19542 unsigned long prel31_offset;
19543
19544 /* Note: this is meant to be equivalent to an
19545 R_ARM_PREL31 relocation. These synthetic
19546 EXIDX_CANTUNWIND markers are not relocated by the
19547 usual BFD method. */
19548 prel31_offset = (text_offset - exidx_offset)
19549 & 0x7ffffffful;
19550 if (bfd_link_relocatable (link_info))
19551 {
19552 /* Here relocation for new EXIDX_CANTUNWIND is
19553 created, so there is no need to
19554 adjust offset by hand. */
19555 prel31_offset = text_sec->output_offset
19556 + text_sec->size;
19557 }
19558
19559 /* First address we can't unwind. */
19560 bfd_put_32 (output_bfd, prel31_offset,
19561 &edited_contents[out_index * 8]);
19562
19563 /* Code for EXIDX_CANTUNWIND. */
19564 bfd_put_32 (output_bfd, 0x1,
19565 &edited_contents[out_index * 8 + 4]);
19566
19567 out_index++;
19568 add_to_offsets -= 8;
19569 }
19570 break;
19571 }
19572
19573 edit_node = edit_node->next;
19574 }
19575 }
19576 else
19577 {
19578 /* No more edits, copy remaining entries verbatim. */
19579 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19580 contents + in_index * 8, add_to_offsets);
19581 out_index++;
19582 in_index++;
19583 }
19584 }
19585
19586 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
19587 bfd_set_section_contents (output_bfd, sec->output_section,
19588 edited_contents,
19589 (file_ptr) sec->output_offset, sec->size);
19590
19591 return TRUE;
19592 }
19593
19594 /* Fix code to point to Cortex-A8 erratum stubs. */
19595 if (globals->fix_cortex_a8)
19596 {
19597 struct a8_branch_to_stub_data data;
19598
19599 data.writing_section = sec;
19600 data.contents = contents;
19601
19602 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
19603 & data);
19604 }
19605
19606 if (mapcount == 0)
19607 return FALSE;
19608
19609 if (globals->byteswap_code)
19610 {
19611 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
19612
19613 ptr = map[0].vma;
19614 for (i = 0; i < mapcount; i++)
19615 {
19616 if (i == mapcount - 1)
19617 end = sec->size;
19618 else
19619 end = map[i + 1].vma;
19620
19621 switch (map[i].type)
19622 {
19623 case 'a':
19624 /* Byte swap code words. */
19625 while (ptr + 3 < end)
19626 {
19627 tmp = contents[ptr];
19628 contents[ptr] = contents[ptr + 3];
19629 contents[ptr + 3] = tmp;
19630 tmp = contents[ptr + 1];
19631 contents[ptr + 1] = contents[ptr + 2];
19632 contents[ptr + 2] = tmp;
19633 ptr += 4;
19634 }
19635 break;
19636
19637 case 't':
19638 /* Byte swap code halfwords. */
19639 while (ptr + 1 < end)
19640 {
19641 tmp = contents[ptr];
19642 contents[ptr] = contents[ptr + 1];
19643 contents[ptr + 1] = tmp;
19644 ptr += 2;
19645 }
19646 break;
19647
19648 case 'd':
19649 /* Leave data alone. */
19650 break;
19651 }
19652 ptr = end;
19653 }
19654 }
19655
19656 free (map);
19657 arm_data->mapcount = -1;
19658 arm_data->mapsize = 0;
19659 arm_data->map = NULL;
19660
19661 return FALSE;
19662 }
19663
19664 /* Mangle thumb function symbols as we read them in. */
19665
19666 static bfd_boolean
19667 elf32_arm_swap_symbol_in (bfd * abfd,
19668 const void *psrc,
19669 const void *pshn,
19670 Elf_Internal_Sym *dst)
19671 {
19672 Elf_Internal_Shdr *symtab_hdr;
19673 const char *name = NULL;
19674
19675 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
19676 return FALSE;
19677 dst->st_target_internal = 0;
19678
19679 /* New EABI objects mark thumb function symbols by setting the low bit of
19680 the address. */
19681 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
19682 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
19683 {
19684 if (dst->st_value & 1)
19685 {
19686 dst->st_value &= ~(bfd_vma) 1;
19687 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
19688 ST_BRANCH_TO_THUMB);
19689 }
19690 else
19691 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
19692 }
19693 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
19694 {
19695 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
19696 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
19697 }
19698 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
19699 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
19700 else
19701 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
19702
19703 /* Mark CMSE special symbols. */
19704 symtab_hdr = & elf_symtab_hdr (abfd);
19705 if (symtab_hdr->sh_size)
19706 name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL);
19707 if (name && CONST_STRNEQ (name, CMSE_PREFIX))
19708 ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal);
19709
19710 return TRUE;
19711 }
19712
19713
19714 /* Mangle thumb function symbols as we write them out. */
19715
19716 static void
19717 elf32_arm_swap_symbol_out (bfd *abfd,
19718 const Elf_Internal_Sym *src,
19719 void *cdst,
19720 void *shndx)
19721 {
19722 Elf_Internal_Sym newsym;
19723
19724 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19725 of the address set, as per the new EABI. We do this unconditionally
19726 because objcopy does not set the elf header flags until after
19727 it writes out the symbol table. */
19728 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
19729 {
19730 newsym = *src;
19731 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
19732 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
19733 if (newsym.st_shndx != SHN_UNDEF)
19734 {
19735 /* Do this only for defined symbols. At link type, the static
19736 linker will simulate the work of dynamic linker of resolving
19737 symbols and will carry over the thumbness of found symbols to
19738 the output symbol table. It's not clear how it happens, but
19739 the thumbness of undefined symbols can well be different at
19740 runtime, and writing '1' for them will be confusing for users
19741 and possibly for dynamic linker itself.
19742 */
19743 newsym.st_value |= 1;
19744 }
19745
19746 src = &newsym;
19747 }
19748 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
19749 }
19750
19751 /* Add the PT_ARM_EXIDX program header. */
19752
19753 static bfd_boolean
19754 elf32_arm_modify_segment_map (bfd *abfd,
19755 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19756 {
19757 struct elf_segment_map *m;
19758 asection *sec;
19759
19760 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19761 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19762 {
19763 /* If there is already a PT_ARM_EXIDX header, then we do not
19764 want to add another one. This situation arises when running
19765 "strip"; the input binary already has the header. */
19766 m = elf_seg_map (abfd);
19767 while (m && m->p_type != PT_ARM_EXIDX)
19768 m = m->next;
19769 if (!m)
19770 {
19771 m = (struct elf_segment_map *)
19772 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
19773 if (m == NULL)
19774 return FALSE;
19775 m->p_type = PT_ARM_EXIDX;
19776 m->count = 1;
19777 m->sections[0] = sec;
19778
19779 m->next = elf_seg_map (abfd);
19780 elf_seg_map (abfd) = m;
19781 }
19782 }
19783
19784 return TRUE;
19785 }
19786
19787 /* We may add a PT_ARM_EXIDX program header. */
19788
19789 static int
19790 elf32_arm_additional_program_headers (bfd *abfd,
19791 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19792 {
19793 asection *sec;
19794
19795 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19796 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19797 return 1;
19798 else
19799 return 0;
19800 }
19801
19802 /* Hook called by the linker routine which adds symbols from an object
19803 file. */
19804
19805 static bfd_boolean
19806 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
19807 Elf_Internal_Sym *sym, const char **namep,
19808 flagword *flagsp, asection **secp, bfd_vma *valp)
19809 {
19810 if (elf32_arm_hash_table (info) == NULL)
19811 return FALSE;
19812
19813 if (elf32_arm_hash_table (info)->vxworks_p
19814 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
19815 flagsp, secp, valp))
19816 return FALSE;
19817
19818 return TRUE;
19819 }
19820
19821 /* We use this to override swap_symbol_in and swap_symbol_out. */
19822 const struct elf_size_info elf32_arm_size_info =
19823 {
19824 sizeof (Elf32_External_Ehdr),
19825 sizeof (Elf32_External_Phdr),
19826 sizeof (Elf32_External_Shdr),
19827 sizeof (Elf32_External_Rel),
19828 sizeof (Elf32_External_Rela),
19829 sizeof (Elf32_External_Sym),
19830 sizeof (Elf32_External_Dyn),
19831 sizeof (Elf_External_Note),
19832 4,
19833 1,
19834 32, 2,
19835 ELFCLASS32, EV_CURRENT,
19836 bfd_elf32_write_out_phdrs,
19837 bfd_elf32_write_shdrs_and_ehdr,
19838 bfd_elf32_checksum_contents,
19839 bfd_elf32_write_relocs,
19840 elf32_arm_swap_symbol_in,
19841 elf32_arm_swap_symbol_out,
19842 bfd_elf32_slurp_reloc_table,
19843 bfd_elf32_slurp_symbol_table,
19844 bfd_elf32_swap_dyn_in,
19845 bfd_elf32_swap_dyn_out,
19846 bfd_elf32_swap_reloc_in,
19847 bfd_elf32_swap_reloc_out,
19848 bfd_elf32_swap_reloca_in,
19849 bfd_elf32_swap_reloca_out
19850 };
19851
19852 static bfd_vma
19853 read_code32 (const bfd *abfd, const bfd_byte *addr)
19854 {
19855 /* V7 BE8 code is always little endian. */
19856 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19857 return bfd_getl32 (addr);
19858
19859 return bfd_get_32 (abfd, addr);
19860 }
19861
19862 static bfd_vma
19863 read_code16 (const bfd *abfd, const bfd_byte *addr)
19864 {
19865 /* V7 BE8 code is always little endian. */
19866 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19867 return bfd_getl16 (addr);
19868
19869 return bfd_get_16 (abfd, addr);
19870 }
19871
19872 /* Return size of plt0 entry starting at ADDR
19873 or (bfd_vma) -1 if size can not be determined. */
19874
19875 static bfd_vma
19876 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
19877 {
19878 bfd_vma first_word;
19879 bfd_vma plt0_size;
19880
19881 first_word = read_code32 (abfd, addr);
19882
19883 if (first_word == elf32_arm_plt0_entry[0])
19884 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19885 else if (first_word == elf32_thumb2_plt0_entry[0])
19886 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19887 else
19888 /* We don't yet handle this PLT format. */
19889 return (bfd_vma) -1;
19890
19891 return plt0_size;
19892 }
19893
19894 /* Return size of plt entry starting at offset OFFSET
19895 of plt section located at address START
19896 or (bfd_vma) -1 if size can not be determined. */
19897
19898 static bfd_vma
19899 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
19900 {
19901 bfd_vma first_insn;
19902 bfd_vma plt_size = 0;
19903 const bfd_byte *addr = start + offset;
19904
19905 /* PLT entry size if fixed on Thumb-only platforms. */
19906 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
19907 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
19908
19909 /* Respect Thumb stub if necessary. */
19910 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
19911 {
19912 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
19913 }
19914
19915 /* Strip immediate from first add. */
19916 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
19917
19918 #ifdef FOUR_WORD_PLT
19919 if (first_insn == elf32_arm_plt_entry[0])
19920 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
19921 #else
19922 if (first_insn == elf32_arm_plt_entry_long[0])
19923 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
19924 else if (first_insn == elf32_arm_plt_entry_short[0])
19925 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
19926 #endif
19927 else
19928 /* We don't yet handle this PLT format. */
19929 return (bfd_vma) -1;
19930
19931 return plt_size;
19932 }
19933
19934 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
19935
19936 static long
19937 elf32_arm_get_synthetic_symtab (bfd *abfd,
19938 long symcount ATTRIBUTE_UNUSED,
19939 asymbol **syms ATTRIBUTE_UNUSED,
19940 long dynsymcount,
19941 asymbol **dynsyms,
19942 asymbol **ret)
19943 {
19944 asection *relplt;
19945 asymbol *s;
19946 arelent *p;
19947 long count, i, n;
19948 size_t size;
19949 Elf_Internal_Shdr *hdr;
19950 char *names;
19951 asection *plt;
19952 bfd_vma offset;
19953 bfd_byte *data;
19954
19955 *ret = NULL;
19956
19957 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
19958 return 0;
19959
19960 if (dynsymcount <= 0)
19961 return 0;
19962
19963 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
19964 if (relplt == NULL)
19965 return 0;
19966
19967 hdr = &elf_section_data (relplt)->this_hdr;
19968 if (hdr->sh_link != elf_dynsymtab (abfd)
19969 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
19970 return 0;
19971
19972 plt = bfd_get_section_by_name (abfd, ".plt");
19973 if (plt == NULL)
19974 return 0;
19975
19976 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
19977 return -1;
19978
19979 data = plt->contents;
19980 if (data == NULL)
19981 {
19982 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
19983 return -1;
19984 bfd_cache_section_contents((asection *) plt, data);
19985 }
19986
19987 count = relplt->size / hdr->sh_entsize;
19988 size = count * sizeof (asymbol);
19989 p = relplt->relocation;
19990 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19991 {
19992 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
19993 if (p->addend != 0)
19994 size += sizeof ("+0x") - 1 + 8;
19995 }
19996
19997 s = *ret = (asymbol *) bfd_malloc (size);
19998 if (s == NULL)
19999 return -1;
20000
20001 offset = elf32_arm_plt0_size (abfd, data);
20002 if (offset == (bfd_vma) -1)
20003 return -1;
20004
20005 names = (char *) (s + count);
20006 p = relplt->relocation;
20007 n = 0;
20008 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
20009 {
20010 size_t len;
20011
20012 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
20013 if (plt_size == (bfd_vma) -1)
20014 break;
20015
20016 *s = **p->sym_ptr_ptr;
20017 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
20018 we are defining a symbol, ensure one of them is set. */
20019 if ((s->flags & BSF_LOCAL) == 0)
20020 s->flags |= BSF_GLOBAL;
20021 s->flags |= BSF_SYNTHETIC;
20022 s->section = plt;
20023 s->value = offset;
20024 s->name = names;
20025 s->udata.p = NULL;
20026 len = strlen ((*p->sym_ptr_ptr)->name);
20027 memcpy (names, (*p->sym_ptr_ptr)->name, len);
20028 names += len;
20029 if (p->addend != 0)
20030 {
20031 char buf[30], *a;
20032
20033 memcpy (names, "+0x", sizeof ("+0x") - 1);
20034 names += sizeof ("+0x") - 1;
20035 bfd_sprintf_vma (abfd, buf, p->addend);
20036 for (a = buf; *a == '0'; ++a)
20037 ;
20038 len = strlen (a);
20039 memcpy (names, a, len);
20040 names += len;
20041 }
20042 memcpy (names, "@plt", sizeof ("@plt"));
20043 names += sizeof ("@plt");
20044 ++s, ++n;
20045 offset += plt_size;
20046 }
20047
20048 return n;
20049 }
20050
20051 static bfd_boolean
20052 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
20053 {
20054 if (hdr->sh_flags & SHF_ARM_PURECODE)
20055 *flags |= SEC_ELF_PURECODE;
20056 return TRUE;
20057 }
20058
20059 static flagword
20060 elf32_arm_lookup_section_flags (char *flag_name)
20061 {
20062 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
20063 return SHF_ARM_PURECODE;
20064
20065 return SEC_NO_FLAGS;
20066 }
20067
20068 static unsigned int
20069 elf32_arm_count_additional_relocs (asection *sec)
20070 {
20071 struct _arm_elf_section_data *arm_data;
20072 arm_data = get_arm_elf_section_data (sec);
20073
20074 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
20075 }
20076
20077 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
20078 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
20079 FALSE otherwise. ISECTION is the best guess matching section from the
20080 input bfd IBFD, but it might be NULL. */
20081
20082 static bfd_boolean
20083 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
20084 bfd *obfd ATTRIBUTE_UNUSED,
20085 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
20086 Elf_Internal_Shdr *osection)
20087 {
20088 switch (osection->sh_type)
20089 {
20090 case SHT_ARM_EXIDX:
20091 {
20092 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
20093 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
20094 unsigned i = 0;
20095
20096 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
20097 osection->sh_info = 0;
20098
20099 /* The sh_link field must be set to the text section associated with
20100 this index section. Unfortunately the ARM EHABI does not specify
20101 exactly how to determine this association. Our caller does try
20102 to match up OSECTION with its corresponding input section however
20103 so that is a good first guess. */
20104 if (isection != NULL
20105 && osection->bfd_section != NULL
20106 && isection->bfd_section != NULL
20107 && isection->bfd_section->output_section != NULL
20108 && isection->bfd_section->output_section == osection->bfd_section
20109 && iheaders != NULL
20110 && isection->sh_link > 0
20111 && isection->sh_link < elf_numsections (ibfd)
20112 && iheaders[isection->sh_link]->bfd_section != NULL
20113 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
20114 )
20115 {
20116 for (i = elf_numsections (obfd); i-- > 0;)
20117 if (oheaders[i]->bfd_section
20118 == iheaders[isection->sh_link]->bfd_section->output_section)
20119 break;
20120 }
20121
20122 if (i == 0)
20123 {
20124 /* Failing that we have to find a matching section ourselves. If
20125 we had the output section name available we could compare that
20126 with input section names. Unfortunately we don't. So instead
20127 we use a simple heuristic and look for the nearest executable
20128 section before this one. */
20129 for (i = elf_numsections (obfd); i-- > 0;)
20130 if (oheaders[i] == osection)
20131 break;
20132 if (i == 0)
20133 break;
20134
20135 while (i-- > 0)
20136 if (oheaders[i]->sh_type == SHT_PROGBITS
20137 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
20138 == (SHF_ALLOC | SHF_EXECINSTR))
20139 break;
20140 }
20141
20142 if (i)
20143 {
20144 osection->sh_link = i;
20145 /* If the text section was part of a group
20146 then the index section should be too. */
20147 if (oheaders[i]->sh_flags & SHF_GROUP)
20148 osection->sh_flags |= SHF_GROUP;
20149 return TRUE;
20150 }
20151 }
20152 break;
20153
20154 case SHT_ARM_PREEMPTMAP:
20155 osection->sh_flags = SHF_ALLOC;
20156 break;
20157
20158 case SHT_ARM_ATTRIBUTES:
20159 case SHT_ARM_DEBUGOVERLAY:
20160 case SHT_ARM_OVERLAYSECTION:
20161 default:
20162 break;
20163 }
20164
20165 return FALSE;
20166 }
20167
20168 /* Returns TRUE if NAME is an ARM mapping symbol.
20169 Traditionally the symbols $a, $d and $t have been used.
20170 The ARM ELF standard also defines $x (for A64 code). It also allows a
20171 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
20172 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
20173 not support them here. $t.x indicates the start of ThumbEE instructions. */
20174
20175 static bfd_boolean
20176 is_arm_mapping_symbol (const char * name)
20177 {
20178 return name != NULL /* Paranoia. */
20179 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
20180 the mapping symbols could have acquired a prefix.
20181 We do not support this here, since such symbols no
20182 longer conform to the ARM ELF ABI. */
20183 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
20184 && (name[2] == 0 || name[2] == '.');
20185 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
20186 any characters that follow the period are legal characters for the body
20187 of a symbol's name. For now we just assume that this is the case. */
20188 }
20189
20190 /* Make sure that mapping symbols in object files are not removed via the
20191 "strip --strip-unneeded" tool. These symbols are needed in order to
20192 correctly generate interworking veneers, and for byte swapping code
20193 regions. Once an object file has been linked, it is safe to remove the
20194 symbols as they will no longer be needed. */
20195
20196 static void
20197 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
20198 {
20199 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
20200 && sym->section != bfd_abs_section_ptr
20201 && is_arm_mapping_symbol (sym->name))
20202 sym->flags |= BSF_KEEP;
20203 }
20204
20205 #undef elf_backend_copy_special_section_fields
20206 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
20207
20208 #define ELF_ARCH bfd_arch_arm
20209 #define ELF_TARGET_ID ARM_ELF_DATA
20210 #define ELF_MACHINE_CODE EM_ARM
20211 #ifdef __QNXTARGET__
20212 #define ELF_MAXPAGESIZE 0x1000
20213 #else
20214 #define ELF_MAXPAGESIZE 0x10000
20215 #endif
20216 #define ELF_MINPAGESIZE 0x1000
20217 #define ELF_COMMONPAGESIZE 0x1000
20218
20219 #define bfd_elf32_mkobject elf32_arm_mkobject
20220
20221 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
20222 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
20223 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
20224 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
20225 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
20226 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
20227 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
20228 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
20229 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
20230 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
20231 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
20232 #define bfd_elf32_bfd_final_link elf32_arm_final_link
20233 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
20234
20235 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
20236 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
20237 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
20238 #define elf_backend_check_relocs elf32_arm_check_relocs
20239 #define elf_backend_update_relocs elf32_arm_update_relocs
20240 #define elf_backend_relocate_section elf32_arm_relocate_section
20241 #define elf_backend_write_section elf32_arm_write_section
20242 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
20243 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
20244 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
20245 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
20246 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
20247 #define elf_backend_always_size_sections elf32_arm_always_size_sections
20248 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
20249 #define elf_backend_post_process_headers elf32_arm_post_process_headers
20250 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
20251 #define elf_backend_object_p elf32_arm_object_p
20252 #define elf_backend_fake_sections elf32_arm_fake_sections
20253 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
20254 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20255 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
20256 #define elf_backend_size_info elf32_arm_size_info
20257 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20258 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
20259 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
20260 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
20261 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
20262 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
20263 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
20264 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
20265
20266 #define elf_backend_can_refcount 1
20267 #define elf_backend_can_gc_sections 1
20268 #define elf_backend_plt_readonly 1
20269 #define elf_backend_want_got_plt 1
20270 #define elf_backend_want_plt_sym 0
20271 #define elf_backend_want_dynrelro 1
20272 #define elf_backend_may_use_rel_p 1
20273 #define elf_backend_may_use_rela_p 0
20274 #define elf_backend_default_use_rela_p 0
20275 #define elf_backend_dtrel_excludes_plt 1
20276
20277 #define elf_backend_got_header_size 12
20278 #define elf_backend_extern_protected_data 1
20279
20280 #undef elf_backend_obj_attrs_vendor
20281 #define elf_backend_obj_attrs_vendor "aeabi"
20282 #undef elf_backend_obj_attrs_section
20283 #define elf_backend_obj_attrs_section ".ARM.attributes"
20284 #undef elf_backend_obj_attrs_arg_type
20285 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
20286 #undef elf_backend_obj_attrs_section_type
20287 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
20288 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
20289 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
20290
20291 #undef elf_backend_section_flags
20292 #define elf_backend_section_flags elf32_arm_section_flags
20293 #undef elf_backend_lookup_section_flags_hook
20294 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20295
20296 #define elf_backend_linux_prpsinfo32_ugid16 TRUE
20297
20298 #include "elf32-target.h"
20299
20300 /* Native Client targets. */
20301
20302 #undef TARGET_LITTLE_SYM
20303 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
20304 #undef TARGET_LITTLE_NAME
20305 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
20306 #undef TARGET_BIG_SYM
20307 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
20308 #undef TARGET_BIG_NAME
20309 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
20310
20311 /* Like elf32_arm_link_hash_table_create -- but overrides
20312 appropriately for NaCl. */
20313
20314 static struct bfd_link_hash_table *
20315 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
20316 {
20317 struct bfd_link_hash_table *ret;
20318
20319 ret = elf32_arm_link_hash_table_create (abfd);
20320 if (ret)
20321 {
20322 struct elf32_arm_link_hash_table *htab
20323 = (struct elf32_arm_link_hash_table *) ret;
20324
20325 htab->nacl_p = 1;
20326
20327 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
20328 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
20329 }
20330 return ret;
20331 }
20332
20333 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
20334 really need to use elf32_arm_modify_segment_map. But we do it
20335 anyway just to reduce gratuitous differences with the stock ARM backend. */
20336
20337 static bfd_boolean
20338 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
20339 {
20340 return (elf32_arm_modify_segment_map (abfd, info)
20341 && nacl_modify_segment_map (abfd, info));
20342 }
20343
20344 static void
20345 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
20346 {
20347 elf32_arm_final_write_processing (abfd, linker);
20348 nacl_final_write_processing (abfd, linker);
20349 }
20350
20351 static bfd_vma
20352 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
20353 const arelent *rel ATTRIBUTE_UNUSED)
20354 {
20355 return plt->vma
20356 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
20357 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
20358 }
20359
20360 #undef elf32_bed
20361 #define elf32_bed elf32_arm_nacl_bed
20362 #undef bfd_elf32_bfd_link_hash_table_create
20363 #define bfd_elf32_bfd_link_hash_table_create \
20364 elf32_arm_nacl_link_hash_table_create
20365 #undef elf_backend_plt_alignment
20366 #define elf_backend_plt_alignment 4
20367 #undef elf_backend_modify_segment_map
20368 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
20369 #undef elf_backend_modify_program_headers
20370 #define elf_backend_modify_program_headers nacl_modify_program_headers
20371 #undef elf_backend_final_write_processing
20372 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
20373 #undef bfd_elf32_get_synthetic_symtab
20374 #undef elf_backend_plt_sym_val
20375 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
20376 #undef elf_backend_copy_special_section_fields
20377
20378 #undef ELF_MINPAGESIZE
20379 #undef ELF_COMMONPAGESIZE
20380
20381
20382 #include "elf32-target.h"
20383
20384 /* Reset to defaults. */
20385 #undef elf_backend_plt_alignment
20386 #undef elf_backend_modify_segment_map
20387 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20388 #undef elf_backend_modify_program_headers
20389 #undef elf_backend_final_write_processing
20390 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20391 #undef ELF_MINPAGESIZE
20392 #define ELF_MINPAGESIZE 0x1000
20393 #undef ELF_COMMONPAGESIZE
20394 #define ELF_COMMONPAGESIZE 0x1000
20395
20396
20397 /* FDPIC Targets. */
20398
20399 #undef TARGET_LITTLE_SYM
20400 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
20401 #undef TARGET_LITTLE_NAME
20402 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
20403 #undef TARGET_BIG_SYM
20404 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
20405 #undef TARGET_BIG_NAME
20406 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
20407 #undef elf_match_priority
20408 #define elf_match_priority 128
20409 #undef ELF_OSABI
20410 #define ELF_OSABI ELFOSABI_ARM_FDPIC
20411
20412 /* Like elf32_arm_link_hash_table_create -- but overrides
20413 appropriately for FDPIC. */
20414
20415 static struct bfd_link_hash_table *
20416 elf32_arm_fdpic_link_hash_table_create (bfd *abfd)
20417 {
20418 struct bfd_link_hash_table *ret;
20419
20420 ret = elf32_arm_link_hash_table_create (abfd);
20421 if (ret)
20422 {
20423 struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret;
20424
20425 htab->fdpic_p = 1;
20426 }
20427 return ret;
20428 }
20429
20430 /* We need dynamic symbols for every section, since segments can
20431 relocate independently. */
20432 static bfd_boolean
20433 elf32_arm_fdpic_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED,
20434 struct bfd_link_info *info
20435 ATTRIBUTE_UNUSED,
20436 asection *p ATTRIBUTE_UNUSED)
20437 {
20438 switch (elf_section_data (p)->this_hdr.sh_type)
20439 {
20440 case SHT_PROGBITS:
20441 case SHT_NOBITS:
20442 /* If sh_type is yet undecided, assume it could be
20443 SHT_PROGBITS/SHT_NOBITS. */
20444 case SHT_NULL:
20445 return FALSE;
20446
20447 /* There shouldn't be section relative relocations
20448 against any other section. */
20449 default:
20450 return TRUE;
20451 }
20452 }
20453
20454 #undef elf32_bed
20455 #define elf32_bed elf32_arm_fdpic_bed
20456
20457 #undef bfd_elf32_bfd_link_hash_table_create
20458 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
20459
20460 #undef elf_backend_omit_section_dynsym
20461 #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym
20462
20463 #include "elf32-target.h"
20464
20465 #undef elf_match_priority
20466 #undef ELF_OSABI
20467 #undef elf_backend_omit_section_dynsym
20468
20469 /* VxWorks Targets. */
20470
20471 #undef TARGET_LITTLE_SYM
20472 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
20473 #undef TARGET_LITTLE_NAME
20474 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
20475 #undef TARGET_BIG_SYM
20476 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
20477 #undef TARGET_BIG_NAME
20478 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
20479
20480 /* Like elf32_arm_link_hash_table_create -- but overrides
20481 appropriately for VxWorks. */
20482
20483 static struct bfd_link_hash_table *
20484 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
20485 {
20486 struct bfd_link_hash_table *ret;
20487
20488 ret = elf32_arm_link_hash_table_create (abfd);
20489 if (ret)
20490 {
20491 struct elf32_arm_link_hash_table *htab
20492 = (struct elf32_arm_link_hash_table *) ret;
20493 htab->use_rel = 0;
20494 htab->vxworks_p = 1;
20495 }
20496 return ret;
20497 }
20498
20499 static void
20500 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
20501 {
20502 elf32_arm_final_write_processing (abfd, linker);
20503 elf_vxworks_final_write_processing (abfd, linker);
20504 }
20505
20506 #undef elf32_bed
20507 #define elf32_bed elf32_arm_vxworks_bed
20508
20509 #undef bfd_elf32_bfd_link_hash_table_create
20510 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
20511 #undef elf_backend_final_write_processing
20512 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
20513 #undef elf_backend_emit_relocs
20514 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
20515
20516 #undef elf_backend_may_use_rel_p
20517 #define elf_backend_may_use_rel_p 0
20518 #undef elf_backend_may_use_rela_p
20519 #define elf_backend_may_use_rela_p 1
20520 #undef elf_backend_default_use_rela_p
20521 #define elf_backend_default_use_rela_p 1
20522 #undef elf_backend_want_plt_sym
20523 #define elf_backend_want_plt_sym 1
20524 #undef ELF_MAXPAGESIZE
20525 #define ELF_MAXPAGESIZE 0x1000
20526
20527 #include "elf32-target.h"
20528
20529
20530 /* Merge backend specific data from an object file to the output
20531 object file when linking. */
20532
20533 static bfd_boolean
20534 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
20535 {
20536 bfd *obfd = info->output_bfd;
20537 flagword out_flags;
20538 flagword in_flags;
20539 bfd_boolean flags_compatible = TRUE;
20540 asection *sec;
20541
20542 /* Check if we have the same endianness. */
20543 if (! _bfd_generic_verify_endian_match (ibfd, info))
20544 return FALSE;
20545
20546 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
20547 return TRUE;
20548
20549 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
20550 return FALSE;
20551
20552 /* The input BFD must have had its flags initialised. */
20553 /* The following seems bogus to me -- The flags are initialized in
20554 the assembler but I don't think an elf_flags_init field is
20555 written into the object. */
20556 /* BFD_ASSERT (elf_flags_init (ibfd)); */
20557
20558 in_flags = elf_elfheader (ibfd)->e_flags;
20559 out_flags = elf_elfheader (obfd)->e_flags;
20560
20561 /* In theory there is no reason why we couldn't handle this. However
20562 in practice it isn't even close to working and there is no real
20563 reason to want it. */
20564 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
20565 && !(ibfd->flags & DYNAMIC)
20566 && (in_flags & EF_ARM_BE8))
20567 {
20568 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20569 ibfd);
20570 return FALSE;
20571 }
20572
20573 if (!elf_flags_init (obfd))
20574 {
20575 /* If the input is the default architecture and had the default
20576 flags then do not bother setting the flags for the output
20577 architecture, instead allow future merges to do this. If no
20578 future merges ever set these flags then they will retain their
20579 uninitialised values, which surprise surprise, correspond
20580 to the default values. */
20581 if (bfd_get_arch_info (ibfd)->the_default
20582 && elf_elfheader (ibfd)->e_flags == 0)
20583 return TRUE;
20584
20585 elf_flags_init (obfd) = TRUE;
20586 elf_elfheader (obfd)->e_flags = in_flags;
20587
20588 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
20589 && bfd_get_arch_info (obfd)->the_default)
20590 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
20591
20592 return TRUE;
20593 }
20594
20595 /* Determine what should happen if the input ARM architecture
20596 does not match the output ARM architecture. */
20597 if (! bfd_arm_merge_machines (ibfd, obfd))
20598 return FALSE;
20599
20600 /* Identical flags must be compatible. */
20601 if (in_flags == out_flags)
20602 return TRUE;
20603
20604 /* Check to see if the input BFD actually contains any sections. If
20605 not, its flags may not have been initialised either, but it
20606 cannot actually cause any incompatiblity. Do not short-circuit
20607 dynamic objects; their section list may be emptied by
20608 elf_link_add_object_symbols.
20609
20610 Also check to see if there are no code sections in the input.
20611 In this case there is no need to check for code specific flags.
20612 XXX - do we need to worry about floating-point format compatability
20613 in data sections ? */
20614 if (!(ibfd->flags & DYNAMIC))
20615 {
20616 bfd_boolean null_input_bfd = TRUE;
20617 bfd_boolean only_data_sections = TRUE;
20618
20619 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
20620 {
20621 /* Ignore synthetic glue sections. */
20622 if (strcmp (sec->name, ".glue_7")
20623 && strcmp (sec->name, ".glue_7t"))
20624 {
20625 if ((bfd_get_section_flags (ibfd, sec)
20626 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20627 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20628 only_data_sections = FALSE;
20629
20630 null_input_bfd = FALSE;
20631 break;
20632 }
20633 }
20634
20635 if (null_input_bfd || only_data_sections)
20636 return TRUE;
20637 }
20638
20639 /* Complain about various flag mismatches. */
20640 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
20641 EF_ARM_EABI_VERSION (out_flags)))
20642 {
20643 _bfd_error_handler
20644 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20645 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
20646 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
20647 return FALSE;
20648 }
20649
20650 /* Not sure what needs to be checked for EABI versions >= 1. */
20651 /* VxWorks libraries do not use these flags. */
20652 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
20653 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
20654 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
20655 {
20656 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
20657 {
20658 _bfd_error_handler
20659 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20660 ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
20661 obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
20662 flags_compatible = FALSE;
20663 }
20664
20665 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
20666 {
20667 if (in_flags & EF_ARM_APCS_FLOAT)
20668 _bfd_error_handler
20669 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20670 ibfd, obfd);
20671 else
20672 _bfd_error_handler
20673 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20674 ibfd, obfd);
20675
20676 flags_compatible = FALSE;
20677 }
20678
20679 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
20680 {
20681 if (in_flags & EF_ARM_VFP_FLOAT)
20682 _bfd_error_handler
20683 (_("error: %pB uses %s instructions, whereas %pB does not"),
20684 ibfd, "VFP", obfd);
20685 else
20686 _bfd_error_handler
20687 (_("error: %pB uses %s instructions, whereas %pB does not"),
20688 ibfd, "FPA", obfd);
20689
20690 flags_compatible = FALSE;
20691 }
20692
20693 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
20694 {
20695 if (in_flags & EF_ARM_MAVERICK_FLOAT)
20696 _bfd_error_handler
20697 (_("error: %pB uses %s instructions, whereas %pB does not"),
20698 ibfd, "Maverick", obfd);
20699 else
20700 _bfd_error_handler
20701 (_("error: %pB does not use %s instructions, whereas %pB does"),
20702 ibfd, "Maverick", obfd);
20703
20704 flags_compatible = FALSE;
20705 }
20706
20707 #ifdef EF_ARM_SOFT_FLOAT
20708 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
20709 {
20710 /* We can allow interworking between code that is VFP format
20711 layout, and uses either soft float or integer regs for
20712 passing floating point arguments and results. We already
20713 know that the APCS_FLOAT flags match; similarly for VFP
20714 flags. */
20715 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
20716 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
20717 {
20718 if (in_flags & EF_ARM_SOFT_FLOAT)
20719 _bfd_error_handler
20720 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20721 ibfd, obfd);
20722 else
20723 _bfd_error_handler
20724 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20725 ibfd, obfd);
20726
20727 flags_compatible = FALSE;
20728 }
20729 }
20730 #endif
20731
20732 /* Interworking mismatch is only a warning. */
20733 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
20734 {
20735 if (in_flags & EF_ARM_INTERWORK)
20736 {
20737 _bfd_error_handler
20738 (_("warning: %pB supports interworking, whereas %pB does not"),
20739 ibfd, obfd);
20740 }
20741 else
20742 {
20743 _bfd_error_handler
20744 (_("warning: %pB does not support interworking, whereas %pB does"),
20745 ibfd, obfd);
20746 }
20747 }
20748 }
20749
20750 return flags_compatible;
20751 }
20752
20753
20754 /* Symbian OS Targets. */
20755
20756 #undef TARGET_LITTLE_SYM
20757 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
20758 #undef TARGET_LITTLE_NAME
20759 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
20760 #undef TARGET_BIG_SYM
20761 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
20762 #undef TARGET_BIG_NAME
20763 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
20764
20765 /* Like elf32_arm_link_hash_table_create -- but overrides
20766 appropriately for Symbian OS. */
20767
20768 static struct bfd_link_hash_table *
20769 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
20770 {
20771 struct bfd_link_hash_table *ret;
20772
20773 ret = elf32_arm_link_hash_table_create (abfd);
20774 if (ret)
20775 {
20776 struct elf32_arm_link_hash_table *htab
20777 = (struct elf32_arm_link_hash_table *)ret;
20778 /* There is no PLT header for Symbian OS. */
20779 htab->plt_header_size = 0;
20780 /* The PLT entries are each one instruction and one word. */
20781 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
20782 htab->symbian_p = 1;
20783 /* Symbian uses armv5t or above, so use_blx is always true. */
20784 htab->use_blx = 1;
20785 htab->root.is_relocatable_executable = 1;
20786 }
20787 return ret;
20788 }
20789
20790 static const struct bfd_elf_special_section
20791 elf32_arm_symbian_special_sections[] =
20792 {
20793 /* In a BPABI executable, the dynamic linking sections do not go in
20794 the loadable read-only segment. The post-linker may wish to
20795 refer to these sections, but they are not part of the final
20796 program image. */
20797 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
20798 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
20799 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
20800 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
20801 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
20802 /* These sections do not need to be writable as the SymbianOS
20803 postlinker will arrange things so that no dynamic relocation is
20804 required. */
20805 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
20806 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
20807 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
20808 { NULL, 0, 0, 0, 0 }
20809 };
20810
20811 static void
20812 elf32_arm_symbian_begin_write_processing (bfd *abfd,
20813 struct bfd_link_info *link_info)
20814 {
20815 /* BPABI objects are never loaded directly by an OS kernel; they are
20816 processed by a postlinker first, into an OS-specific format. If
20817 the D_PAGED bit is set on the file, BFD will align segments on
20818 page boundaries, so that an OS can directly map the file. With
20819 BPABI objects, that just results in wasted space. In addition,
20820 because we clear the D_PAGED bit, map_sections_to_segments will
20821 recognize that the program headers should not be mapped into any
20822 loadable segment. */
20823 abfd->flags &= ~D_PAGED;
20824 elf32_arm_begin_write_processing (abfd, link_info);
20825 }
20826
20827 static bfd_boolean
20828 elf32_arm_symbian_modify_segment_map (bfd *abfd,
20829 struct bfd_link_info *info)
20830 {
20831 struct elf_segment_map *m;
20832 asection *dynsec;
20833
20834 /* BPABI shared libraries and executables should have a PT_DYNAMIC
20835 segment. However, because the .dynamic section is not marked
20836 with SEC_LOAD, the generic ELF code will not create such a
20837 segment. */
20838 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
20839 if (dynsec)
20840 {
20841 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
20842 if (m->p_type == PT_DYNAMIC)
20843 break;
20844
20845 if (m == NULL)
20846 {
20847 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
20848 m->next = elf_seg_map (abfd);
20849 elf_seg_map (abfd) = m;
20850 }
20851 }
20852
20853 /* Also call the generic arm routine. */
20854 return elf32_arm_modify_segment_map (abfd, info);
20855 }
20856
20857 /* Return address for Ith PLT stub in section PLT, for relocation REL
20858 or (bfd_vma) -1 if it should not be included. */
20859
20860 static bfd_vma
20861 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
20862 const arelent *rel ATTRIBUTE_UNUSED)
20863 {
20864 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
20865 }
20866
20867 #undef elf32_bed
20868 #define elf32_bed elf32_arm_symbian_bed
20869
20870 /* The dynamic sections are not allocated on SymbianOS; the postlinker
20871 will process them and then discard them. */
20872 #undef ELF_DYNAMIC_SEC_FLAGS
20873 #define ELF_DYNAMIC_SEC_FLAGS \
20874 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
20875
20876 #undef elf_backend_emit_relocs
20877
20878 #undef bfd_elf32_bfd_link_hash_table_create
20879 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
20880 #undef elf_backend_special_sections
20881 #define elf_backend_special_sections elf32_arm_symbian_special_sections
20882 #undef elf_backend_begin_write_processing
20883 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
20884 #undef elf_backend_final_write_processing
20885 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20886
20887 #undef elf_backend_modify_segment_map
20888 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
20889
20890 /* There is no .got section for BPABI objects, and hence no header. */
20891 #undef elf_backend_got_header_size
20892 #define elf_backend_got_header_size 0
20893
20894 /* Similarly, there is no .got.plt section. */
20895 #undef elf_backend_want_got_plt
20896 #define elf_backend_want_got_plt 0
20897
20898 #undef elf_backend_plt_sym_val
20899 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
20900
20901 #undef elf_backend_may_use_rel_p
20902 #define elf_backend_may_use_rel_p 1
20903 #undef elf_backend_may_use_rela_p
20904 #define elf_backend_may_use_rela_p 0
20905 #undef elf_backend_default_use_rela_p
20906 #define elf_backend_default_use_rela_p 0
20907 #undef elf_backend_want_plt_sym
20908 #define elf_backend_want_plt_sym 0
20909 #undef elf_backend_dtrel_excludes_plt
20910 #define elf_backend_dtrel_excludes_plt 0
20911 #undef ELF_MAXPAGESIZE
20912 #define ELF_MAXPAGESIZE 0x8000
20913
20914 #include "elf32-target.h"
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