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[thirdparty/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2023 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "libiberty.h"
26 #include "libbfd.h"
27 #include "elf-bfd.h"
28 #include "elf-nacl.h"
29 #include "elf-vxworks.h"
30 #include "elf/arm.h"
31 #include "elf32-arm.h"
32 #include "cpu-arm.h"
33
34 /* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36 #define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38
39 /* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41 #define RELOC_SIZE(HTAB) \
42 ((HTAB)->use_rel \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
45
46 /* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48 #define SWAP_RELOC_IN(HTAB) \
49 ((HTAB)->use_rel \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
52
53 /* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55 #define SWAP_RELOC_OUT(HTAB) \
56 ((HTAB)->use_rel \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
59
60 #define elf_info_to_howto NULL
61 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62
63 #define ARM_ELF_ABI_VERSION 0
64 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65
66 /* The Adjusted Place, as defined by AAELF. */
67 #define Pa(X) ((X) & 0xfffffffc)
68
69 static bool elf32_arm_write_section (bfd *output_bfd,
70 struct bfd_link_info *link_info,
71 asection *sec,
72 bfd_byte *contents);
73
74 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
75 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
76 in that slot. */
77
78 static reloc_howto_type elf32_arm_howto_table_1[] =
79 {
80 /* No relocation. */
81 HOWTO (R_ARM_NONE, /* type */
82 0, /* rightshift */
83 0, /* size */
84 0, /* bitsize */
85 false, /* pc_relative */
86 0, /* bitpos */
87 complain_overflow_dont,/* complain_on_overflow */
88 bfd_elf_generic_reloc, /* special_function */
89 "R_ARM_NONE", /* name */
90 false, /* partial_inplace */
91 0, /* src_mask */
92 0, /* dst_mask */
93 false), /* pcrel_offset */
94
95 HOWTO (R_ARM_PC24, /* type */
96 2, /* rightshift */
97 4, /* size */
98 24, /* bitsize */
99 true, /* pc_relative */
100 0, /* bitpos */
101 complain_overflow_signed,/* complain_on_overflow */
102 bfd_elf_generic_reloc, /* special_function */
103 "R_ARM_PC24", /* name */
104 false, /* partial_inplace */
105 0x00ffffff, /* src_mask */
106 0x00ffffff, /* dst_mask */
107 true), /* pcrel_offset */
108
109 /* 32 bit absolute */
110 HOWTO (R_ARM_ABS32, /* type */
111 0, /* rightshift */
112 4, /* size */
113 32, /* bitsize */
114 false, /* pc_relative */
115 0, /* bitpos */
116 complain_overflow_bitfield,/* complain_on_overflow */
117 bfd_elf_generic_reloc, /* special_function */
118 "R_ARM_ABS32", /* name */
119 false, /* partial_inplace */
120 0xffffffff, /* src_mask */
121 0xffffffff, /* dst_mask */
122 false), /* pcrel_offset */
123
124 /* standard 32bit pc-relative reloc */
125 HOWTO (R_ARM_REL32, /* type */
126 0, /* rightshift */
127 4, /* size */
128 32, /* bitsize */
129 true, /* pc_relative */
130 0, /* bitpos */
131 complain_overflow_bitfield,/* complain_on_overflow */
132 bfd_elf_generic_reloc, /* special_function */
133 "R_ARM_REL32", /* name */
134 false, /* partial_inplace */
135 0xffffffff, /* src_mask */
136 0xffffffff, /* dst_mask */
137 true), /* pcrel_offset */
138
139 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
140 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* rightshift */
142 1, /* size */
143 32, /* bitsize */
144 true, /* pc_relative */
145 0, /* bitpos */
146 complain_overflow_dont,/* complain_on_overflow */
147 bfd_elf_generic_reloc, /* special_function */
148 "R_ARM_LDR_PC_G0", /* name */
149 false, /* partial_inplace */
150 0xffffffff, /* src_mask */
151 0xffffffff, /* dst_mask */
152 true), /* pcrel_offset */
153
154 /* 16 bit absolute */
155 HOWTO (R_ARM_ABS16, /* type */
156 0, /* rightshift */
157 2, /* size */
158 16, /* bitsize */
159 false, /* pc_relative */
160 0, /* bitpos */
161 complain_overflow_bitfield,/* complain_on_overflow */
162 bfd_elf_generic_reloc, /* special_function */
163 "R_ARM_ABS16", /* name */
164 false, /* partial_inplace */
165 0x0000ffff, /* src_mask */
166 0x0000ffff, /* dst_mask */
167 false), /* pcrel_offset */
168
169 /* 12 bit absolute */
170 HOWTO (R_ARM_ABS12, /* type */
171 0, /* rightshift */
172 4, /* size */
173 12, /* bitsize */
174 false, /* pc_relative */
175 0, /* bitpos */
176 complain_overflow_bitfield,/* complain_on_overflow */
177 bfd_elf_generic_reloc, /* special_function */
178 "R_ARM_ABS12", /* name */
179 false, /* partial_inplace */
180 0x00000fff, /* src_mask */
181 0x00000fff, /* dst_mask */
182 false), /* pcrel_offset */
183
184 HOWTO (R_ARM_THM_ABS5, /* type */
185 6, /* rightshift */
186 2, /* size */
187 5, /* bitsize */
188 false, /* pc_relative */
189 0, /* bitpos */
190 complain_overflow_bitfield,/* complain_on_overflow */
191 bfd_elf_generic_reloc, /* special_function */
192 "R_ARM_THM_ABS5", /* name */
193 false, /* partial_inplace */
194 0x000007e0, /* src_mask */
195 0x000007e0, /* dst_mask */
196 false), /* pcrel_offset */
197
198 /* 8 bit absolute */
199 HOWTO (R_ARM_ABS8, /* type */
200 0, /* rightshift */
201 1, /* size */
202 8, /* bitsize */
203 false, /* pc_relative */
204 0, /* bitpos */
205 complain_overflow_bitfield,/* complain_on_overflow */
206 bfd_elf_generic_reloc, /* special_function */
207 "R_ARM_ABS8", /* name */
208 false, /* partial_inplace */
209 0x000000ff, /* src_mask */
210 0x000000ff, /* dst_mask */
211 false), /* pcrel_offset */
212
213 HOWTO (R_ARM_SBREL32, /* type */
214 0, /* rightshift */
215 4, /* size */
216 32, /* bitsize */
217 false, /* pc_relative */
218 0, /* bitpos */
219 complain_overflow_dont,/* complain_on_overflow */
220 bfd_elf_generic_reloc, /* special_function */
221 "R_ARM_SBREL32", /* name */
222 false, /* partial_inplace */
223 0xffffffff, /* src_mask */
224 0xffffffff, /* dst_mask */
225 false), /* pcrel_offset */
226
227 HOWTO (R_ARM_THM_CALL, /* type */
228 1, /* rightshift */
229 4, /* size */
230 24, /* bitsize */
231 true, /* pc_relative */
232 0, /* bitpos */
233 complain_overflow_signed,/* complain_on_overflow */
234 bfd_elf_generic_reloc, /* special_function */
235 "R_ARM_THM_CALL", /* name */
236 false, /* partial_inplace */
237 0x07ff2fff, /* src_mask */
238 0x07ff2fff, /* dst_mask */
239 true), /* pcrel_offset */
240
241 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* rightshift */
243 2, /* size */
244 8, /* bitsize */
245 true, /* pc_relative */
246 0, /* bitpos */
247 complain_overflow_signed,/* complain_on_overflow */
248 bfd_elf_generic_reloc, /* special_function */
249 "R_ARM_THM_PC8", /* name */
250 false, /* partial_inplace */
251 0x000000ff, /* src_mask */
252 0x000000ff, /* dst_mask */
253 true), /* pcrel_offset */
254
255 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* rightshift */
257 2, /* size */
258 32, /* bitsize */
259 false, /* pc_relative */
260 0, /* bitpos */
261 complain_overflow_signed,/* complain_on_overflow */
262 bfd_elf_generic_reloc, /* special_function */
263 "R_ARM_BREL_ADJ", /* name */
264 false, /* partial_inplace */
265 0xffffffff, /* src_mask */
266 0xffffffff, /* dst_mask */
267 false), /* pcrel_offset */
268
269 HOWTO (R_ARM_TLS_DESC, /* type */
270 0, /* rightshift */
271 4, /* size */
272 32, /* bitsize */
273 false, /* pc_relative */
274 0, /* bitpos */
275 complain_overflow_bitfield,/* complain_on_overflow */
276 bfd_elf_generic_reloc, /* special_function */
277 "R_ARM_TLS_DESC", /* name */
278 false, /* partial_inplace */
279 0xffffffff, /* src_mask */
280 0xffffffff, /* dst_mask */
281 false), /* pcrel_offset */
282
283 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* rightshift */
285 0, /* size */
286 0, /* bitsize */
287 false, /* pc_relative */
288 0, /* bitpos */
289 complain_overflow_signed,/* complain_on_overflow */
290 bfd_elf_generic_reloc, /* special_function */
291 "R_ARM_SWI8", /* name */
292 false, /* partial_inplace */
293 0x00000000, /* src_mask */
294 0x00000000, /* dst_mask */
295 false), /* pcrel_offset */
296
297 /* BLX instruction for the ARM. */
298 HOWTO (R_ARM_XPC25, /* type */
299 2, /* rightshift */
300 4, /* size */
301 24, /* bitsize */
302 true, /* pc_relative */
303 0, /* bitpos */
304 complain_overflow_signed,/* complain_on_overflow */
305 bfd_elf_generic_reloc, /* special_function */
306 "R_ARM_XPC25", /* name */
307 false, /* partial_inplace */
308 0x00ffffff, /* src_mask */
309 0x00ffffff, /* dst_mask */
310 true), /* pcrel_offset */
311
312 /* BLX instruction for the Thumb. */
313 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* rightshift */
315 4, /* size */
316 24, /* bitsize */
317 true, /* pc_relative */
318 0, /* bitpos */
319 complain_overflow_signed,/* complain_on_overflow */
320 bfd_elf_generic_reloc, /* special_function */
321 "R_ARM_THM_XPC22", /* name */
322 false, /* partial_inplace */
323 0x07ff2fff, /* src_mask */
324 0x07ff2fff, /* dst_mask */
325 true), /* pcrel_offset */
326
327 /* Dynamic TLS relocations. */
328
329 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 0, /* rightshift */
331 4, /* size */
332 32, /* bitsize */
333 false, /* pc_relative */
334 0, /* bitpos */
335 complain_overflow_bitfield,/* complain_on_overflow */
336 bfd_elf_generic_reloc, /* special_function */
337 "R_ARM_TLS_DTPMOD32", /* name */
338 true, /* partial_inplace */
339 0xffffffff, /* src_mask */
340 0xffffffff, /* dst_mask */
341 false), /* pcrel_offset */
342
343 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 0, /* rightshift */
345 4, /* size */
346 32, /* bitsize */
347 false, /* pc_relative */
348 0, /* bitpos */
349 complain_overflow_bitfield,/* complain_on_overflow */
350 bfd_elf_generic_reloc, /* special_function */
351 "R_ARM_TLS_DTPOFF32", /* name */
352 true, /* partial_inplace */
353 0xffffffff, /* src_mask */
354 0xffffffff, /* dst_mask */
355 false), /* pcrel_offset */
356
357 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 0, /* rightshift */
359 4, /* size */
360 32, /* bitsize */
361 false, /* pc_relative */
362 0, /* bitpos */
363 complain_overflow_bitfield,/* complain_on_overflow */
364 bfd_elf_generic_reloc, /* special_function */
365 "R_ARM_TLS_TPOFF32", /* name */
366 true, /* partial_inplace */
367 0xffffffff, /* src_mask */
368 0xffffffff, /* dst_mask */
369 false), /* pcrel_offset */
370
371 /* Relocs used in ARM Linux */
372
373 HOWTO (R_ARM_COPY, /* type */
374 0, /* rightshift */
375 4, /* size */
376 32, /* bitsize */
377 false, /* pc_relative */
378 0, /* bitpos */
379 complain_overflow_bitfield,/* complain_on_overflow */
380 bfd_elf_generic_reloc, /* special_function */
381 "R_ARM_COPY", /* name */
382 true, /* partial_inplace */
383 0xffffffff, /* src_mask */
384 0xffffffff, /* dst_mask */
385 false), /* pcrel_offset */
386
387 HOWTO (R_ARM_GLOB_DAT, /* type */
388 0, /* rightshift */
389 4, /* size */
390 32, /* bitsize */
391 false, /* pc_relative */
392 0, /* bitpos */
393 complain_overflow_bitfield,/* complain_on_overflow */
394 bfd_elf_generic_reloc, /* special_function */
395 "R_ARM_GLOB_DAT", /* name */
396 true, /* partial_inplace */
397 0xffffffff, /* src_mask */
398 0xffffffff, /* dst_mask */
399 false), /* pcrel_offset */
400
401 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 0, /* rightshift */
403 4, /* size */
404 32, /* bitsize */
405 false, /* pc_relative */
406 0, /* bitpos */
407 complain_overflow_bitfield,/* complain_on_overflow */
408 bfd_elf_generic_reloc, /* special_function */
409 "R_ARM_JUMP_SLOT", /* name */
410 true, /* partial_inplace */
411 0xffffffff, /* src_mask */
412 0xffffffff, /* dst_mask */
413 false), /* pcrel_offset */
414
415 HOWTO (R_ARM_RELATIVE, /* type */
416 0, /* rightshift */
417 4, /* size */
418 32, /* bitsize */
419 false, /* pc_relative */
420 0, /* bitpos */
421 complain_overflow_bitfield,/* complain_on_overflow */
422 bfd_elf_generic_reloc, /* special_function */
423 "R_ARM_RELATIVE", /* name */
424 true, /* partial_inplace */
425 0xffffffff, /* src_mask */
426 0xffffffff, /* dst_mask */
427 false), /* pcrel_offset */
428
429 HOWTO (R_ARM_GOTOFF32, /* type */
430 0, /* rightshift */
431 4, /* size */
432 32, /* bitsize */
433 false, /* pc_relative */
434 0, /* bitpos */
435 complain_overflow_bitfield,/* complain_on_overflow */
436 bfd_elf_generic_reloc, /* special_function */
437 "R_ARM_GOTOFF32", /* name */
438 true, /* partial_inplace */
439 0xffffffff, /* src_mask */
440 0xffffffff, /* dst_mask */
441 false), /* pcrel_offset */
442
443 HOWTO (R_ARM_GOTPC, /* type */
444 0, /* rightshift */
445 4, /* size */
446 32, /* bitsize */
447 true, /* pc_relative */
448 0, /* bitpos */
449 complain_overflow_bitfield,/* complain_on_overflow */
450 bfd_elf_generic_reloc, /* special_function */
451 "R_ARM_GOTPC", /* name */
452 true, /* partial_inplace */
453 0xffffffff, /* src_mask */
454 0xffffffff, /* dst_mask */
455 true), /* pcrel_offset */
456
457 HOWTO (R_ARM_GOT32, /* type */
458 0, /* rightshift */
459 4, /* size */
460 32, /* bitsize */
461 false, /* pc_relative */
462 0, /* bitpos */
463 complain_overflow_bitfield,/* complain_on_overflow */
464 bfd_elf_generic_reloc, /* special_function */
465 "R_ARM_GOT32", /* name */
466 true, /* partial_inplace */
467 0xffffffff, /* src_mask */
468 0xffffffff, /* dst_mask */
469 false), /* pcrel_offset */
470
471 HOWTO (R_ARM_PLT32, /* type */
472 2, /* rightshift */
473 4, /* size */
474 24, /* bitsize */
475 true, /* pc_relative */
476 0, /* bitpos */
477 complain_overflow_bitfield,/* complain_on_overflow */
478 bfd_elf_generic_reloc, /* special_function */
479 "R_ARM_PLT32", /* name */
480 false, /* partial_inplace */
481 0x00ffffff, /* src_mask */
482 0x00ffffff, /* dst_mask */
483 true), /* pcrel_offset */
484
485 HOWTO (R_ARM_CALL, /* type */
486 2, /* rightshift */
487 4, /* size */
488 24, /* bitsize */
489 true, /* pc_relative */
490 0, /* bitpos */
491 complain_overflow_signed,/* complain_on_overflow */
492 bfd_elf_generic_reloc, /* special_function */
493 "R_ARM_CALL", /* name */
494 false, /* partial_inplace */
495 0x00ffffff, /* src_mask */
496 0x00ffffff, /* dst_mask */
497 true), /* pcrel_offset */
498
499 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* rightshift */
501 4, /* size */
502 24, /* bitsize */
503 true, /* pc_relative */
504 0, /* bitpos */
505 complain_overflow_signed,/* complain_on_overflow */
506 bfd_elf_generic_reloc, /* special_function */
507 "R_ARM_JUMP24", /* name */
508 false, /* partial_inplace */
509 0x00ffffff, /* src_mask */
510 0x00ffffff, /* dst_mask */
511 true), /* pcrel_offset */
512
513 HOWTO (R_ARM_THM_JUMP24, /* type */
514 1, /* rightshift */
515 4, /* size */
516 24, /* bitsize */
517 true, /* pc_relative */
518 0, /* bitpos */
519 complain_overflow_signed,/* complain_on_overflow */
520 bfd_elf_generic_reloc, /* special_function */
521 "R_ARM_THM_JUMP24", /* name */
522 false, /* partial_inplace */
523 0x07ff2fff, /* src_mask */
524 0x07ff2fff, /* dst_mask */
525 true), /* pcrel_offset */
526
527 HOWTO (R_ARM_BASE_ABS, /* type */
528 0, /* rightshift */
529 4, /* size */
530 32, /* bitsize */
531 false, /* pc_relative */
532 0, /* bitpos */
533 complain_overflow_dont,/* complain_on_overflow */
534 bfd_elf_generic_reloc, /* special_function */
535 "R_ARM_BASE_ABS", /* name */
536 false, /* partial_inplace */
537 0xffffffff, /* src_mask */
538 0xffffffff, /* dst_mask */
539 false), /* pcrel_offset */
540
541 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 0, /* rightshift */
543 4, /* size */
544 12, /* bitsize */
545 true, /* pc_relative */
546 0, /* bitpos */
547 complain_overflow_dont,/* complain_on_overflow */
548 bfd_elf_generic_reloc, /* special_function */
549 "R_ARM_ALU_PCREL_7_0", /* name */
550 false, /* partial_inplace */
551 0x00000fff, /* src_mask */
552 0x00000fff, /* dst_mask */
553 true), /* pcrel_offset */
554
555 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 0, /* rightshift */
557 4, /* size */
558 12, /* bitsize */
559 true, /* pc_relative */
560 8, /* bitpos */
561 complain_overflow_dont,/* complain_on_overflow */
562 bfd_elf_generic_reloc, /* special_function */
563 "R_ARM_ALU_PCREL_15_8",/* name */
564 false, /* partial_inplace */
565 0x00000fff, /* src_mask */
566 0x00000fff, /* dst_mask */
567 true), /* pcrel_offset */
568
569 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 0, /* rightshift */
571 4, /* size */
572 12, /* bitsize */
573 true, /* pc_relative */
574 16, /* bitpos */
575 complain_overflow_dont,/* complain_on_overflow */
576 bfd_elf_generic_reloc, /* special_function */
577 "R_ARM_ALU_PCREL_23_15",/* name */
578 false, /* partial_inplace */
579 0x00000fff, /* src_mask */
580 0x00000fff, /* dst_mask */
581 true), /* pcrel_offset */
582
583 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 0, /* rightshift */
585 4, /* size */
586 12, /* bitsize */
587 false, /* pc_relative */
588 0, /* bitpos */
589 complain_overflow_dont,/* complain_on_overflow */
590 bfd_elf_generic_reloc, /* special_function */
591 "R_ARM_LDR_SBREL_11_0",/* name */
592 false, /* partial_inplace */
593 0x00000fff, /* src_mask */
594 0x00000fff, /* dst_mask */
595 false), /* pcrel_offset */
596
597 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 0, /* rightshift */
599 4, /* size */
600 8, /* bitsize */
601 false, /* pc_relative */
602 12, /* bitpos */
603 complain_overflow_dont,/* complain_on_overflow */
604 bfd_elf_generic_reloc, /* special_function */
605 "R_ARM_ALU_SBREL_19_12",/* name */
606 false, /* partial_inplace */
607 0x000ff000, /* src_mask */
608 0x000ff000, /* dst_mask */
609 false), /* pcrel_offset */
610
611 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 0, /* rightshift */
613 4, /* size */
614 8, /* bitsize */
615 false, /* pc_relative */
616 20, /* bitpos */
617 complain_overflow_dont,/* complain_on_overflow */
618 bfd_elf_generic_reloc, /* special_function */
619 "R_ARM_ALU_SBREL_27_20",/* name */
620 false, /* partial_inplace */
621 0x0ff00000, /* src_mask */
622 0x0ff00000, /* dst_mask */
623 false), /* pcrel_offset */
624
625 HOWTO (R_ARM_TARGET1, /* type */
626 0, /* rightshift */
627 4, /* size */
628 32, /* bitsize */
629 false, /* pc_relative */
630 0, /* bitpos */
631 complain_overflow_dont,/* complain_on_overflow */
632 bfd_elf_generic_reloc, /* special_function */
633 "R_ARM_TARGET1", /* name */
634 false, /* partial_inplace */
635 0xffffffff, /* src_mask */
636 0xffffffff, /* dst_mask */
637 false), /* pcrel_offset */
638
639 HOWTO (R_ARM_ROSEGREL32, /* type */
640 0, /* rightshift */
641 4, /* size */
642 32, /* bitsize */
643 false, /* pc_relative */
644 0, /* bitpos */
645 complain_overflow_dont,/* complain_on_overflow */
646 bfd_elf_generic_reloc, /* special_function */
647 "R_ARM_ROSEGREL32", /* name */
648 false, /* partial_inplace */
649 0xffffffff, /* src_mask */
650 0xffffffff, /* dst_mask */
651 false), /* pcrel_offset */
652
653 HOWTO (R_ARM_V4BX, /* type */
654 0, /* rightshift */
655 4, /* size */
656 32, /* bitsize */
657 false, /* pc_relative */
658 0, /* bitpos */
659 complain_overflow_dont,/* complain_on_overflow */
660 bfd_elf_generic_reloc, /* special_function */
661 "R_ARM_V4BX", /* name */
662 false, /* partial_inplace */
663 0xffffffff, /* src_mask */
664 0xffffffff, /* dst_mask */
665 false), /* pcrel_offset */
666
667 HOWTO (R_ARM_TARGET2, /* type */
668 0, /* rightshift */
669 4, /* size */
670 32, /* bitsize */
671 false, /* pc_relative */
672 0, /* bitpos */
673 complain_overflow_signed,/* complain_on_overflow */
674 bfd_elf_generic_reloc, /* special_function */
675 "R_ARM_TARGET2", /* name */
676 false, /* partial_inplace */
677 0xffffffff, /* src_mask */
678 0xffffffff, /* dst_mask */
679 true), /* pcrel_offset */
680
681 HOWTO (R_ARM_PREL31, /* type */
682 0, /* rightshift */
683 4, /* size */
684 31, /* bitsize */
685 true, /* pc_relative */
686 0, /* bitpos */
687 complain_overflow_signed,/* complain_on_overflow */
688 bfd_elf_generic_reloc, /* special_function */
689 "R_ARM_PREL31", /* name */
690 false, /* partial_inplace */
691 0x7fffffff, /* src_mask */
692 0x7fffffff, /* dst_mask */
693 true), /* pcrel_offset */
694
695 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 0, /* rightshift */
697 4, /* size */
698 16, /* bitsize */
699 false, /* pc_relative */
700 0, /* bitpos */
701 complain_overflow_dont,/* complain_on_overflow */
702 bfd_elf_generic_reloc, /* special_function */
703 "R_ARM_MOVW_ABS_NC", /* name */
704 false, /* partial_inplace */
705 0x000f0fff, /* src_mask */
706 0x000f0fff, /* dst_mask */
707 false), /* pcrel_offset */
708
709 HOWTO (R_ARM_MOVT_ABS, /* type */
710 0, /* rightshift */
711 4, /* size */
712 16, /* bitsize */
713 false, /* pc_relative */
714 0, /* bitpos */
715 complain_overflow_bitfield,/* complain_on_overflow */
716 bfd_elf_generic_reloc, /* special_function */
717 "R_ARM_MOVT_ABS", /* name */
718 false, /* partial_inplace */
719 0x000f0fff, /* src_mask */
720 0x000f0fff, /* dst_mask */
721 false), /* pcrel_offset */
722
723 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 0, /* rightshift */
725 4, /* size */
726 16, /* bitsize */
727 true, /* pc_relative */
728 0, /* bitpos */
729 complain_overflow_dont,/* complain_on_overflow */
730 bfd_elf_generic_reloc, /* special_function */
731 "R_ARM_MOVW_PREL_NC", /* name */
732 false, /* partial_inplace */
733 0x000f0fff, /* src_mask */
734 0x000f0fff, /* dst_mask */
735 true), /* pcrel_offset */
736
737 HOWTO (R_ARM_MOVT_PREL, /* type */
738 0, /* rightshift */
739 4, /* size */
740 16, /* bitsize */
741 true, /* pc_relative */
742 0, /* bitpos */
743 complain_overflow_bitfield,/* complain_on_overflow */
744 bfd_elf_generic_reloc, /* special_function */
745 "R_ARM_MOVT_PREL", /* name */
746 false, /* partial_inplace */
747 0x000f0fff, /* src_mask */
748 0x000f0fff, /* dst_mask */
749 true), /* pcrel_offset */
750
751 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 0, /* rightshift */
753 4, /* size */
754 16, /* bitsize */
755 false, /* pc_relative */
756 0, /* bitpos */
757 complain_overflow_dont,/* complain_on_overflow */
758 bfd_elf_generic_reloc, /* special_function */
759 "R_ARM_THM_MOVW_ABS_NC",/* name */
760 false, /* partial_inplace */
761 0x040f70ff, /* src_mask */
762 0x040f70ff, /* dst_mask */
763 false), /* pcrel_offset */
764
765 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 0, /* rightshift */
767 4, /* size */
768 16, /* bitsize */
769 false, /* pc_relative */
770 0, /* bitpos */
771 complain_overflow_bitfield,/* complain_on_overflow */
772 bfd_elf_generic_reloc, /* special_function */
773 "R_ARM_THM_MOVT_ABS", /* name */
774 false, /* partial_inplace */
775 0x040f70ff, /* src_mask */
776 0x040f70ff, /* dst_mask */
777 false), /* pcrel_offset */
778
779 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 0, /* rightshift */
781 4, /* size */
782 16, /* bitsize */
783 true, /* pc_relative */
784 0, /* bitpos */
785 complain_overflow_dont,/* complain_on_overflow */
786 bfd_elf_generic_reloc, /* special_function */
787 "R_ARM_THM_MOVW_PREL_NC",/* name */
788 false, /* partial_inplace */
789 0x040f70ff, /* src_mask */
790 0x040f70ff, /* dst_mask */
791 true), /* pcrel_offset */
792
793 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 0, /* rightshift */
795 4, /* size */
796 16, /* bitsize */
797 true, /* pc_relative */
798 0, /* bitpos */
799 complain_overflow_bitfield,/* complain_on_overflow */
800 bfd_elf_generic_reloc, /* special_function */
801 "R_ARM_THM_MOVT_PREL", /* name */
802 false, /* partial_inplace */
803 0x040f70ff, /* src_mask */
804 0x040f70ff, /* dst_mask */
805 true), /* pcrel_offset */
806
807 HOWTO (R_ARM_THM_JUMP19, /* type */
808 1, /* rightshift */
809 4, /* size */
810 19, /* bitsize */
811 true, /* pc_relative */
812 0, /* bitpos */
813 complain_overflow_signed,/* complain_on_overflow */
814 bfd_elf_generic_reloc, /* special_function */
815 "R_ARM_THM_JUMP19", /* name */
816 false, /* partial_inplace */
817 0x043f2fff, /* src_mask */
818 0x043f2fff, /* dst_mask */
819 true), /* pcrel_offset */
820
821 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* rightshift */
823 2, /* size */
824 6, /* bitsize */
825 true, /* pc_relative */
826 0, /* bitpos */
827 complain_overflow_unsigned,/* complain_on_overflow */
828 bfd_elf_generic_reloc, /* special_function */
829 "R_ARM_THM_JUMP6", /* name */
830 false, /* partial_inplace */
831 0x02f8, /* src_mask */
832 0x02f8, /* dst_mask */
833 true), /* pcrel_offset */
834
835 /* These are declared as 13-bit signed relocations because we can
836 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 versa. */
838 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 0, /* rightshift */
840 4, /* size */
841 13, /* bitsize */
842 true, /* pc_relative */
843 0, /* bitpos */
844 complain_overflow_dont,/* complain_on_overflow */
845 bfd_elf_generic_reloc, /* special_function */
846 "R_ARM_THM_ALU_PREL_11_0",/* name */
847 false, /* partial_inplace */
848 0xffffffff, /* src_mask */
849 0xffffffff, /* dst_mask */
850 true), /* pcrel_offset */
851
852 HOWTO (R_ARM_THM_PC12, /* type */
853 0, /* rightshift */
854 4, /* size */
855 13, /* bitsize */
856 true, /* pc_relative */
857 0, /* bitpos */
858 complain_overflow_dont,/* complain_on_overflow */
859 bfd_elf_generic_reloc, /* special_function */
860 "R_ARM_THM_PC12", /* name */
861 false, /* partial_inplace */
862 0xffffffff, /* src_mask */
863 0xffffffff, /* dst_mask */
864 true), /* pcrel_offset */
865
866 HOWTO (R_ARM_ABS32_NOI, /* type */
867 0, /* rightshift */
868 4, /* size */
869 32, /* bitsize */
870 false, /* pc_relative */
871 0, /* bitpos */
872 complain_overflow_dont,/* complain_on_overflow */
873 bfd_elf_generic_reloc, /* special_function */
874 "R_ARM_ABS32_NOI", /* name */
875 false, /* partial_inplace */
876 0xffffffff, /* src_mask */
877 0xffffffff, /* dst_mask */
878 false), /* pcrel_offset */
879
880 HOWTO (R_ARM_REL32_NOI, /* type */
881 0, /* rightshift */
882 4, /* size */
883 32, /* bitsize */
884 true, /* pc_relative */
885 0, /* bitpos */
886 complain_overflow_dont,/* complain_on_overflow */
887 bfd_elf_generic_reloc, /* special_function */
888 "R_ARM_REL32_NOI", /* name */
889 false, /* partial_inplace */
890 0xffffffff, /* src_mask */
891 0xffffffff, /* dst_mask */
892 false), /* pcrel_offset */
893
894 /* Group relocations. */
895
896 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 0, /* rightshift */
898 4, /* size */
899 32, /* bitsize */
900 true, /* pc_relative */
901 0, /* bitpos */
902 complain_overflow_dont,/* complain_on_overflow */
903 bfd_elf_generic_reloc, /* special_function */
904 "R_ARM_ALU_PC_G0_NC", /* name */
905 false, /* partial_inplace */
906 0xffffffff, /* src_mask */
907 0xffffffff, /* dst_mask */
908 true), /* pcrel_offset */
909
910 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 0, /* rightshift */
912 4, /* size */
913 32, /* bitsize */
914 true, /* pc_relative */
915 0, /* bitpos */
916 complain_overflow_dont,/* complain_on_overflow */
917 bfd_elf_generic_reloc, /* special_function */
918 "R_ARM_ALU_PC_G0", /* name */
919 false, /* partial_inplace */
920 0xffffffff, /* src_mask */
921 0xffffffff, /* dst_mask */
922 true), /* pcrel_offset */
923
924 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 0, /* rightshift */
926 4, /* size */
927 32, /* bitsize */
928 true, /* pc_relative */
929 0, /* bitpos */
930 complain_overflow_dont,/* complain_on_overflow */
931 bfd_elf_generic_reloc, /* special_function */
932 "R_ARM_ALU_PC_G1_NC", /* name */
933 false, /* partial_inplace */
934 0xffffffff, /* src_mask */
935 0xffffffff, /* dst_mask */
936 true), /* pcrel_offset */
937
938 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 0, /* rightshift */
940 4, /* size */
941 32, /* bitsize */
942 true, /* pc_relative */
943 0, /* bitpos */
944 complain_overflow_dont,/* complain_on_overflow */
945 bfd_elf_generic_reloc, /* special_function */
946 "R_ARM_ALU_PC_G1", /* name */
947 false, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 true), /* pcrel_offset */
951
952 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 0, /* rightshift */
954 4, /* size */
955 32, /* bitsize */
956 true, /* pc_relative */
957 0, /* bitpos */
958 complain_overflow_dont,/* complain_on_overflow */
959 bfd_elf_generic_reloc, /* special_function */
960 "R_ARM_ALU_PC_G2", /* name */
961 false, /* partial_inplace */
962 0xffffffff, /* src_mask */
963 0xffffffff, /* dst_mask */
964 true), /* pcrel_offset */
965
966 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 0, /* rightshift */
968 4, /* size */
969 32, /* bitsize */
970 true, /* pc_relative */
971 0, /* bitpos */
972 complain_overflow_dont,/* complain_on_overflow */
973 bfd_elf_generic_reloc, /* special_function */
974 "R_ARM_LDR_PC_G1", /* name */
975 false, /* partial_inplace */
976 0xffffffff, /* src_mask */
977 0xffffffff, /* dst_mask */
978 true), /* pcrel_offset */
979
980 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 0, /* rightshift */
982 4, /* size */
983 32, /* bitsize */
984 true, /* pc_relative */
985 0, /* bitpos */
986 complain_overflow_dont,/* complain_on_overflow */
987 bfd_elf_generic_reloc, /* special_function */
988 "R_ARM_LDR_PC_G2", /* name */
989 false, /* partial_inplace */
990 0xffffffff, /* src_mask */
991 0xffffffff, /* dst_mask */
992 true), /* pcrel_offset */
993
994 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 0, /* rightshift */
996 4, /* size */
997 32, /* bitsize */
998 true, /* pc_relative */
999 0, /* bitpos */
1000 complain_overflow_dont,/* complain_on_overflow */
1001 bfd_elf_generic_reloc, /* special_function */
1002 "R_ARM_LDRS_PC_G0", /* name */
1003 false, /* partial_inplace */
1004 0xffffffff, /* src_mask */
1005 0xffffffff, /* dst_mask */
1006 true), /* pcrel_offset */
1007
1008 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 0, /* rightshift */
1010 4, /* size */
1011 32, /* bitsize */
1012 true, /* pc_relative */
1013 0, /* bitpos */
1014 complain_overflow_dont,/* complain_on_overflow */
1015 bfd_elf_generic_reloc, /* special_function */
1016 "R_ARM_LDRS_PC_G1", /* name */
1017 false, /* partial_inplace */
1018 0xffffffff, /* src_mask */
1019 0xffffffff, /* dst_mask */
1020 true), /* pcrel_offset */
1021
1022 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 0, /* rightshift */
1024 4, /* size */
1025 32, /* bitsize */
1026 true, /* pc_relative */
1027 0, /* bitpos */
1028 complain_overflow_dont,/* complain_on_overflow */
1029 bfd_elf_generic_reloc, /* special_function */
1030 "R_ARM_LDRS_PC_G2", /* name */
1031 false, /* partial_inplace */
1032 0xffffffff, /* src_mask */
1033 0xffffffff, /* dst_mask */
1034 true), /* pcrel_offset */
1035
1036 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 0, /* rightshift */
1038 4, /* size */
1039 32, /* bitsize */
1040 true, /* pc_relative */
1041 0, /* bitpos */
1042 complain_overflow_dont,/* complain_on_overflow */
1043 bfd_elf_generic_reloc, /* special_function */
1044 "R_ARM_LDC_PC_G0", /* name */
1045 false, /* partial_inplace */
1046 0xffffffff, /* src_mask */
1047 0xffffffff, /* dst_mask */
1048 true), /* pcrel_offset */
1049
1050 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 0, /* rightshift */
1052 4, /* size */
1053 32, /* bitsize */
1054 true, /* pc_relative */
1055 0, /* bitpos */
1056 complain_overflow_dont,/* complain_on_overflow */
1057 bfd_elf_generic_reloc, /* special_function */
1058 "R_ARM_LDC_PC_G1", /* name */
1059 false, /* partial_inplace */
1060 0xffffffff, /* src_mask */
1061 0xffffffff, /* dst_mask */
1062 true), /* pcrel_offset */
1063
1064 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 0, /* rightshift */
1066 4, /* size */
1067 32, /* bitsize */
1068 true, /* pc_relative */
1069 0, /* bitpos */
1070 complain_overflow_dont,/* complain_on_overflow */
1071 bfd_elf_generic_reloc, /* special_function */
1072 "R_ARM_LDC_PC_G2", /* name */
1073 false, /* partial_inplace */
1074 0xffffffff, /* src_mask */
1075 0xffffffff, /* dst_mask */
1076 true), /* pcrel_offset */
1077
1078 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 0, /* rightshift */
1080 4, /* size */
1081 32, /* bitsize */
1082 true, /* pc_relative */
1083 0, /* bitpos */
1084 complain_overflow_dont,/* complain_on_overflow */
1085 bfd_elf_generic_reloc, /* special_function */
1086 "R_ARM_ALU_SB_G0_NC", /* name */
1087 false, /* partial_inplace */
1088 0xffffffff, /* src_mask */
1089 0xffffffff, /* dst_mask */
1090 true), /* pcrel_offset */
1091
1092 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 0, /* rightshift */
1094 4, /* size */
1095 32, /* bitsize */
1096 true, /* pc_relative */
1097 0, /* bitpos */
1098 complain_overflow_dont,/* complain_on_overflow */
1099 bfd_elf_generic_reloc, /* special_function */
1100 "R_ARM_ALU_SB_G0", /* name */
1101 false, /* partial_inplace */
1102 0xffffffff, /* src_mask */
1103 0xffffffff, /* dst_mask */
1104 true), /* pcrel_offset */
1105
1106 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 0, /* rightshift */
1108 4, /* size */
1109 32, /* bitsize */
1110 true, /* pc_relative */
1111 0, /* bitpos */
1112 complain_overflow_dont,/* complain_on_overflow */
1113 bfd_elf_generic_reloc, /* special_function */
1114 "R_ARM_ALU_SB_G1_NC", /* name */
1115 false, /* partial_inplace */
1116 0xffffffff, /* src_mask */
1117 0xffffffff, /* dst_mask */
1118 true), /* pcrel_offset */
1119
1120 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 0, /* rightshift */
1122 4, /* size */
1123 32, /* bitsize */
1124 true, /* pc_relative */
1125 0, /* bitpos */
1126 complain_overflow_dont,/* complain_on_overflow */
1127 bfd_elf_generic_reloc, /* special_function */
1128 "R_ARM_ALU_SB_G1", /* name */
1129 false, /* partial_inplace */
1130 0xffffffff, /* src_mask */
1131 0xffffffff, /* dst_mask */
1132 true), /* pcrel_offset */
1133
1134 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 0, /* rightshift */
1136 4, /* size */
1137 32, /* bitsize */
1138 true, /* pc_relative */
1139 0, /* bitpos */
1140 complain_overflow_dont,/* complain_on_overflow */
1141 bfd_elf_generic_reloc, /* special_function */
1142 "R_ARM_ALU_SB_G2", /* name */
1143 false, /* partial_inplace */
1144 0xffffffff, /* src_mask */
1145 0xffffffff, /* dst_mask */
1146 true), /* pcrel_offset */
1147
1148 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 0, /* rightshift */
1150 4, /* size */
1151 32, /* bitsize */
1152 true, /* pc_relative */
1153 0, /* bitpos */
1154 complain_overflow_dont,/* complain_on_overflow */
1155 bfd_elf_generic_reloc, /* special_function */
1156 "R_ARM_LDR_SB_G0", /* name */
1157 false, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 true), /* pcrel_offset */
1161
1162 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 0, /* rightshift */
1164 4, /* size */
1165 32, /* bitsize */
1166 true, /* pc_relative */
1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 bfd_elf_generic_reloc, /* special_function */
1170 "R_ARM_LDR_SB_G1", /* name */
1171 false, /* partial_inplace */
1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
1174 true), /* pcrel_offset */
1175
1176 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 0, /* rightshift */
1178 4, /* size */
1179 32, /* bitsize */
1180 true, /* pc_relative */
1181 0, /* bitpos */
1182 complain_overflow_dont,/* complain_on_overflow */
1183 bfd_elf_generic_reloc, /* special_function */
1184 "R_ARM_LDR_SB_G2", /* name */
1185 false, /* partial_inplace */
1186 0xffffffff, /* src_mask */
1187 0xffffffff, /* dst_mask */
1188 true), /* pcrel_offset */
1189
1190 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 0, /* rightshift */
1192 4, /* size */
1193 32, /* bitsize */
1194 true, /* pc_relative */
1195 0, /* bitpos */
1196 complain_overflow_dont,/* complain_on_overflow */
1197 bfd_elf_generic_reloc, /* special_function */
1198 "R_ARM_LDRS_SB_G0", /* name */
1199 false, /* partial_inplace */
1200 0xffffffff, /* src_mask */
1201 0xffffffff, /* dst_mask */
1202 true), /* pcrel_offset */
1203
1204 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 0, /* rightshift */
1206 4, /* size */
1207 32, /* bitsize */
1208 true, /* pc_relative */
1209 0, /* bitpos */
1210 complain_overflow_dont,/* complain_on_overflow */
1211 bfd_elf_generic_reloc, /* special_function */
1212 "R_ARM_LDRS_SB_G1", /* name */
1213 false, /* partial_inplace */
1214 0xffffffff, /* src_mask */
1215 0xffffffff, /* dst_mask */
1216 true), /* pcrel_offset */
1217
1218 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 0, /* rightshift */
1220 4, /* size */
1221 32, /* bitsize */
1222 true, /* pc_relative */
1223 0, /* bitpos */
1224 complain_overflow_dont,/* complain_on_overflow */
1225 bfd_elf_generic_reloc, /* special_function */
1226 "R_ARM_LDRS_SB_G2", /* name */
1227 false, /* partial_inplace */
1228 0xffffffff, /* src_mask */
1229 0xffffffff, /* dst_mask */
1230 true), /* pcrel_offset */
1231
1232 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 0, /* rightshift */
1234 4, /* size */
1235 32, /* bitsize */
1236 true, /* pc_relative */
1237 0, /* bitpos */
1238 complain_overflow_dont,/* complain_on_overflow */
1239 bfd_elf_generic_reloc, /* special_function */
1240 "R_ARM_LDC_SB_G0", /* name */
1241 false, /* partial_inplace */
1242 0xffffffff, /* src_mask */
1243 0xffffffff, /* dst_mask */
1244 true), /* pcrel_offset */
1245
1246 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 0, /* rightshift */
1248 4, /* size */
1249 32, /* bitsize */
1250 true, /* pc_relative */
1251 0, /* bitpos */
1252 complain_overflow_dont,/* complain_on_overflow */
1253 bfd_elf_generic_reloc, /* special_function */
1254 "R_ARM_LDC_SB_G1", /* name */
1255 false, /* partial_inplace */
1256 0xffffffff, /* src_mask */
1257 0xffffffff, /* dst_mask */
1258 true), /* pcrel_offset */
1259
1260 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 0, /* rightshift */
1262 4, /* size */
1263 32, /* bitsize */
1264 true, /* pc_relative */
1265 0, /* bitpos */
1266 complain_overflow_dont,/* complain_on_overflow */
1267 bfd_elf_generic_reloc, /* special_function */
1268 "R_ARM_LDC_SB_G2", /* name */
1269 false, /* partial_inplace */
1270 0xffffffff, /* src_mask */
1271 0xffffffff, /* dst_mask */
1272 true), /* pcrel_offset */
1273
1274 /* End of group relocations. */
1275
1276 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 0, /* rightshift */
1278 4, /* size */
1279 16, /* bitsize */
1280 false, /* pc_relative */
1281 0, /* bitpos */
1282 complain_overflow_dont,/* complain_on_overflow */
1283 bfd_elf_generic_reloc, /* special_function */
1284 "R_ARM_MOVW_BREL_NC", /* name */
1285 false, /* partial_inplace */
1286 0x0000ffff, /* src_mask */
1287 0x0000ffff, /* dst_mask */
1288 false), /* pcrel_offset */
1289
1290 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 0, /* rightshift */
1292 4, /* size */
1293 16, /* bitsize */
1294 false, /* pc_relative */
1295 0, /* bitpos */
1296 complain_overflow_bitfield,/* complain_on_overflow */
1297 bfd_elf_generic_reloc, /* special_function */
1298 "R_ARM_MOVT_BREL", /* name */
1299 false, /* partial_inplace */
1300 0x0000ffff, /* src_mask */
1301 0x0000ffff, /* dst_mask */
1302 false), /* pcrel_offset */
1303
1304 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 0, /* rightshift */
1306 4, /* size */
1307 16, /* bitsize */
1308 false, /* pc_relative */
1309 0, /* bitpos */
1310 complain_overflow_dont,/* complain_on_overflow */
1311 bfd_elf_generic_reloc, /* special_function */
1312 "R_ARM_MOVW_BREL", /* name */
1313 false, /* partial_inplace */
1314 0x0000ffff, /* src_mask */
1315 0x0000ffff, /* dst_mask */
1316 false), /* pcrel_offset */
1317
1318 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 0, /* rightshift */
1320 4, /* size */
1321 16, /* bitsize */
1322 false, /* pc_relative */
1323 0, /* bitpos */
1324 complain_overflow_dont,/* complain_on_overflow */
1325 bfd_elf_generic_reloc, /* special_function */
1326 "R_ARM_THM_MOVW_BREL_NC",/* name */
1327 false, /* partial_inplace */
1328 0x040f70ff, /* src_mask */
1329 0x040f70ff, /* dst_mask */
1330 false), /* pcrel_offset */
1331
1332 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 0, /* rightshift */
1334 4, /* size */
1335 16, /* bitsize */
1336 false, /* pc_relative */
1337 0, /* bitpos */
1338 complain_overflow_bitfield,/* complain_on_overflow */
1339 bfd_elf_generic_reloc, /* special_function */
1340 "R_ARM_THM_MOVT_BREL", /* name */
1341 false, /* partial_inplace */
1342 0x040f70ff, /* src_mask */
1343 0x040f70ff, /* dst_mask */
1344 false), /* pcrel_offset */
1345
1346 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 0, /* rightshift */
1348 4, /* size */
1349 16, /* bitsize */
1350 false, /* pc_relative */
1351 0, /* bitpos */
1352 complain_overflow_dont,/* complain_on_overflow */
1353 bfd_elf_generic_reloc, /* special_function */
1354 "R_ARM_THM_MOVW_BREL", /* name */
1355 false, /* partial_inplace */
1356 0x040f70ff, /* src_mask */
1357 0x040f70ff, /* dst_mask */
1358 false), /* pcrel_offset */
1359
1360 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 0, /* rightshift */
1362 4, /* size */
1363 32, /* bitsize */
1364 false, /* pc_relative */
1365 0, /* bitpos */
1366 complain_overflow_bitfield,/* complain_on_overflow */
1367 NULL, /* special_function */
1368 "R_ARM_TLS_GOTDESC", /* name */
1369 true, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 false), /* pcrel_offset */
1373
1374 HOWTO (R_ARM_TLS_CALL, /* type */
1375 0, /* rightshift */
1376 4, /* size */
1377 24, /* bitsize */
1378 false, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_TLS_CALL", /* name */
1383 false, /* partial_inplace */
1384 0x00ffffff, /* src_mask */
1385 0x00ffffff, /* dst_mask */
1386 false), /* pcrel_offset */
1387
1388 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 0, /* rightshift */
1390 4, /* size */
1391 0, /* bitsize */
1392 false, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont,/* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_TLS_DESCSEQ", /* name */
1397 false, /* partial_inplace */
1398 0x00000000, /* src_mask */
1399 0x00000000, /* dst_mask */
1400 false), /* pcrel_offset */
1401
1402 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 0, /* rightshift */
1404 4, /* size */
1405 24, /* bitsize */
1406 false, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_dont,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_THM_TLS_CALL", /* name */
1411 false, /* partial_inplace */
1412 0x07ff07ff, /* src_mask */
1413 0x07ff07ff, /* dst_mask */
1414 false), /* pcrel_offset */
1415
1416 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 0, /* rightshift */
1418 4, /* size */
1419 32, /* bitsize */
1420 false, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_dont,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_PLT32_ABS", /* name */
1425 false, /* partial_inplace */
1426 0xffffffff, /* src_mask */
1427 0xffffffff, /* dst_mask */
1428 false), /* pcrel_offset */
1429
1430 HOWTO (R_ARM_GOT_ABS, /* type */
1431 0, /* rightshift */
1432 4, /* size */
1433 32, /* bitsize */
1434 false, /* pc_relative */
1435 0, /* bitpos */
1436 complain_overflow_dont,/* complain_on_overflow */
1437 bfd_elf_generic_reloc, /* special_function */
1438 "R_ARM_GOT_ABS", /* name */
1439 false, /* partial_inplace */
1440 0xffffffff, /* src_mask */
1441 0xffffffff, /* dst_mask */
1442 false), /* pcrel_offset */
1443
1444 HOWTO (R_ARM_GOT_PREL, /* type */
1445 0, /* rightshift */
1446 4, /* size */
1447 32, /* bitsize */
1448 true, /* pc_relative */
1449 0, /* bitpos */
1450 complain_overflow_dont, /* complain_on_overflow */
1451 bfd_elf_generic_reloc, /* special_function */
1452 "R_ARM_GOT_PREL", /* name */
1453 false, /* partial_inplace */
1454 0xffffffff, /* src_mask */
1455 0xffffffff, /* dst_mask */
1456 true), /* pcrel_offset */
1457
1458 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 0, /* rightshift */
1460 4, /* size */
1461 12, /* bitsize */
1462 false, /* pc_relative */
1463 0, /* bitpos */
1464 complain_overflow_bitfield,/* complain_on_overflow */
1465 bfd_elf_generic_reloc, /* special_function */
1466 "R_ARM_GOT_BREL12", /* name */
1467 false, /* partial_inplace */
1468 0x00000fff, /* src_mask */
1469 0x00000fff, /* dst_mask */
1470 false), /* pcrel_offset */
1471
1472 HOWTO (R_ARM_GOTOFF12, /* type */
1473 0, /* rightshift */
1474 4, /* size */
1475 12, /* bitsize */
1476 false, /* pc_relative */
1477 0, /* bitpos */
1478 complain_overflow_bitfield,/* complain_on_overflow */
1479 bfd_elf_generic_reloc, /* special_function */
1480 "R_ARM_GOTOFF12", /* name */
1481 false, /* partial_inplace */
1482 0x00000fff, /* src_mask */
1483 0x00000fff, /* dst_mask */
1484 false), /* pcrel_offset */
1485
1486 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487
1488 /* GNU extension to record C++ vtable member usage */
1489 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 0, /* rightshift */
1491 4, /* size */
1492 0, /* bitsize */
1493 false, /* pc_relative */
1494 0, /* bitpos */
1495 complain_overflow_dont, /* complain_on_overflow */
1496 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1497 "R_ARM_GNU_VTENTRY", /* name */
1498 false, /* partial_inplace */
1499 0, /* src_mask */
1500 0, /* dst_mask */
1501 false), /* pcrel_offset */
1502
1503 /* GNU extension to record C++ vtable hierarchy */
1504 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 0, /* rightshift */
1506 4, /* size */
1507 0, /* bitsize */
1508 false, /* pc_relative */
1509 0, /* bitpos */
1510 complain_overflow_dont, /* complain_on_overflow */
1511 NULL, /* special_function */
1512 "R_ARM_GNU_VTINHERIT", /* name */
1513 false, /* partial_inplace */
1514 0, /* src_mask */
1515 0, /* dst_mask */
1516 false), /* pcrel_offset */
1517
1518 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* rightshift */
1520 2, /* size */
1521 11, /* bitsize */
1522 true, /* pc_relative */
1523 0, /* bitpos */
1524 complain_overflow_signed, /* complain_on_overflow */
1525 bfd_elf_generic_reloc, /* special_function */
1526 "R_ARM_THM_JUMP11", /* name */
1527 false, /* partial_inplace */
1528 0x000007ff, /* src_mask */
1529 0x000007ff, /* dst_mask */
1530 true), /* pcrel_offset */
1531
1532 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* rightshift */
1534 2, /* size */
1535 8, /* bitsize */
1536 true, /* pc_relative */
1537 0, /* bitpos */
1538 complain_overflow_signed, /* complain_on_overflow */
1539 bfd_elf_generic_reloc, /* special_function */
1540 "R_ARM_THM_JUMP8", /* name */
1541 false, /* partial_inplace */
1542 0x000000ff, /* src_mask */
1543 0x000000ff, /* dst_mask */
1544 true), /* pcrel_offset */
1545
1546 /* TLS relocations */
1547 HOWTO (R_ARM_TLS_GD32, /* type */
1548 0, /* rightshift */
1549 4, /* size */
1550 32, /* bitsize */
1551 false, /* pc_relative */
1552 0, /* bitpos */
1553 complain_overflow_bitfield,/* complain_on_overflow */
1554 NULL, /* special_function */
1555 "R_ARM_TLS_GD32", /* name */
1556 true, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 false), /* pcrel_offset */
1560
1561 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 0, /* rightshift */
1563 4, /* size */
1564 32, /* bitsize */
1565 false, /* pc_relative */
1566 0, /* bitpos */
1567 complain_overflow_bitfield,/* complain_on_overflow */
1568 bfd_elf_generic_reloc, /* special_function */
1569 "R_ARM_TLS_LDM32", /* name */
1570 true, /* partial_inplace */
1571 0xffffffff, /* src_mask */
1572 0xffffffff, /* dst_mask */
1573 false), /* pcrel_offset */
1574
1575 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 0, /* rightshift */
1577 4, /* size */
1578 32, /* bitsize */
1579 false, /* pc_relative */
1580 0, /* bitpos */
1581 complain_overflow_bitfield,/* complain_on_overflow */
1582 bfd_elf_generic_reloc, /* special_function */
1583 "R_ARM_TLS_LDO32", /* name */
1584 true, /* partial_inplace */
1585 0xffffffff, /* src_mask */
1586 0xffffffff, /* dst_mask */
1587 false), /* pcrel_offset */
1588
1589 HOWTO (R_ARM_TLS_IE32, /* type */
1590 0, /* rightshift */
1591 4, /* size */
1592 32, /* bitsize */
1593 false, /* pc_relative */
1594 0, /* bitpos */
1595 complain_overflow_bitfield,/* complain_on_overflow */
1596 NULL, /* special_function */
1597 "R_ARM_TLS_IE32", /* name */
1598 true, /* partial_inplace */
1599 0xffffffff, /* src_mask */
1600 0xffffffff, /* dst_mask */
1601 false), /* pcrel_offset */
1602
1603 HOWTO (R_ARM_TLS_LE32, /* type */
1604 0, /* rightshift */
1605 4, /* size */
1606 32, /* bitsize */
1607 false, /* pc_relative */
1608 0, /* bitpos */
1609 complain_overflow_bitfield,/* complain_on_overflow */
1610 NULL, /* special_function */
1611 "R_ARM_TLS_LE32", /* name */
1612 true, /* partial_inplace */
1613 0xffffffff, /* src_mask */
1614 0xffffffff, /* dst_mask */
1615 false), /* pcrel_offset */
1616
1617 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 0, /* rightshift */
1619 4, /* size */
1620 12, /* bitsize */
1621 false, /* pc_relative */
1622 0, /* bitpos */
1623 complain_overflow_bitfield,/* complain_on_overflow */
1624 bfd_elf_generic_reloc, /* special_function */
1625 "R_ARM_TLS_LDO12", /* name */
1626 false, /* partial_inplace */
1627 0x00000fff, /* src_mask */
1628 0x00000fff, /* dst_mask */
1629 false), /* pcrel_offset */
1630
1631 HOWTO (R_ARM_TLS_LE12, /* type */
1632 0, /* rightshift */
1633 4, /* size */
1634 12, /* bitsize */
1635 false, /* pc_relative */
1636 0, /* bitpos */
1637 complain_overflow_bitfield,/* complain_on_overflow */
1638 bfd_elf_generic_reloc, /* special_function */
1639 "R_ARM_TLS_LE12", /* name */
1640 false, /* partial_inplace */
1641 0x00000fff, /* src_mask */
1642 0x00000fff, /* dst_mask */
1643 false), /* pcrel_offset */
1644
1645 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 0, /* rightshift */
1647 4, /* size */
1648 12, /* bitsize */
1649 false, /* pc_relative */
1650 0, /* bitpos */
1651 complain_overflow_bitfield,/* complain_on_overflow */
1652 bfd_elf_generic_reloc, /* special_function */
1653 "R_ARM_TLS_IE12GP", /* name */
1654 false, /* partial_inplace */
1655 0x00000fff, /* src_mask */
1656 0x00000fff, /* dst_mask */
1657 false), /* pcrel_offset */
1658
1659 /* 112-127 private relocations. */
1660 EMPTY_HOWTO (112),
1661 EMPTY_HOWTO (113),
1662 EMPTY_HOWTO (114),
1663 EMPTY_HOWTO (115),
1664 EMPTY_HOWTO (116),
1665 EMPTY_HOWTO (117),
1666 EMPTY_HOWTO (118),
1667 EMPTY_HOWTO (119),
1668 EMPTY_HOWTO (120),
1669 EMPTY_HOWTO (121),
1670 EMPTY_HOWTO (122),
1671 EMPTY_HOWTO (123),
1672 EMPTY_HOWTO (124),
1673 EMPTY_HOWTO (125),
1674 EMPTY_HOWTO (126),
1675 EMPTY_HOWTO (127),
1676
1677 /* R_ARM_ME_TOO, obsolete. */
1678 EMPTY_HOWTO (128),
1679
1680 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 0, /* rightshift */
1682 2, /* size */
1683 0, /* bitsize */
1684 false, /* pc_relative */
1685 0, /* bitpos */
1686 complain_overflow_dont,/* complain_on_overflow */
1687 bfd_elf_generic_reloc, /* special_function */
1688 "R_ARM_THM_TLS_DESCSEQ",/* name */
1689 false, /* partial_inplace */
1690 0x00000000, /* src_mask */
1691 0x00000000, /* dst_mask */
1692 false), /* pcrel_offset */
1693 EMPTY_HOWTO (130),
1694 EMPTY_HOWTO (131),
1695 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1696 0, /* rightshift. */
1697 2, /* size. */
1698 16, /* bitsize. */
1699 false, /* pc_relative. */
1700 0, /* bitpos. */
1701 complain_overflow_bitfield,/* complain_on_overflow. */
1702 bfd_elf_generic_reloc, /* special_function. */
1703 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1704 false, /* partial_inplace. */
1705 0x00000000, /* src_mask. */
1706 0x00000000, /* dst_mask. */
1707 false), /* pcrel_offset. */
1708 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1709 0, /* rightshift. */
1710 2, /* size. */
1711 16, /* bitsize. */
1712 false, /* pc_relative. */
1713 0, /* bitpos. */
1714 complain_overflow_bitfield,/* complain_on_overflow. */
1715 bfd_elf_generic_reloc, /* special_function. */
1716 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1717 false, /* partial_inplace. */
1718 0x00000000, /* src_mask. */
1719 0x00000000, /* dst_mask. */
1720 false), /* pcrel_offset. */
1721 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1722 0, /* rightshift. */
1723 2, /* size. */
1724 16, /* bitsize. */
1725 false, /* pc_relative. */
1726 0, /* bitpos. */
1727 complain_overflow_bitfield,/* complain_on_overflow. */
1728 bfd_elf_generic_reloc, /* special_function. */
1729 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1730 false, /* partial_inplace. */
1731 0x00000000, /* src_mask. */
1732 0x00000000, /* dst_mask. */
1733 false), /* pcrel_offset. */
1734 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1735 0, /* rightshift. */
1736 2, /* size. */
1737 16, /* bitsize. */
1738 false, /* pc_relative. */
1739 0, /* bitpos. */
1740 complain_overflow_bitfield,/* complain_on_overflow. */
1741 bfd_elf_generic_reloc, /* special_function. */
1742 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1743 false, /* partial_inplace. */
1744 0x00000000, /* src_mask. */
1745 0x00000000, /* dst_mask. */
1746 false), /* pcrel_offset. */
1747 /* Relocations for Armv8.1-M Mainline. */
1748 HOWTO (R_ARM_THM_BF16, /* type. */
1749 0, /* rightshift. */
1750 2, /* size. */
1751 16, /* bitsize. */
1752 true, /* pc_relative. */
1753 0, /* bitpos. */
1754 complain_overflow_dont,/* do not complain_on_overflow. */
1755 bfd_elf_generic_reloc, /* special_function. */
1756 "R_ARM_THM_BF16", /* name. */
1757 false, /* partial_inplace. */
1758 0x001f0ffe, /* src_mask. */
1759 0x001f0ffe, /* dst_mask. */
1760 true), /* pcrel_offset. */
1761 HOWTO (R_ARM_THM_BF12, /* type. */
1762 0, /* rightshift. */
1763 2, /* size. */
1764 12, /* bitsize. */
1765 true, /* pc_relative. */
1766 0, /* bitpos. */
1767 complain_overflow_dont,/* do not complain_on_overflow. */
1768 bfd_elf_generic_reloc, /* special_function. */
1769 "R_ARM_THM_BF12", /* name. */
1770 false, /* partial_inplace. */
1771 0x00010ffe, /* src_mask. */
1772 0x00010ffe, /* dst_mask. */
1773 true), /* pcrel_offset. */
1774 HOWTO (R_ARM_THM_BF18, /* type. */
1775 0, /* rightshift. */
1776 2, /* size. */
1777 18, /* bitsize. */
1778 true, /* pc_relative. */
1779 0, /* bitpos. */
1780 complain_overflow_dont,/* do not complain_on_overflow. */
1781 bfd_elf_generic_reloc, /* special_function. */
1782 "R_ARM_THM_BF18", /* name. */
1783 false, /* partial_inplace. */
1784 0x007f0ffe, /* src_mask. */
1785 0x007f0ffe, /* dst_mask. */
1786 true), /* pcrel_offset. */
1787 };
1788
1789 /* 160 onwards: */
1790 static reloc_howto_type elf32_arm_howto_table_2[8] =
1791 {
1792 HOWTO (R_ARM_IRELATIVE, /* type */
1793 0, /* rightshift */
1794 4, /* size */
1795 32, /* bitsize */
1796 false, /* pc_relative */
1797 0, /* bitpos */
1798 complain_overflow_bitfield,/* complain_on_overflow */
1799 bfd_elf_generic_reloc, /* special_function */
1800 "R_ARM_IRELATIVE", /* name */
1801 true, /* partial_inplace */
1802 0xffffffff, /* src_mask */
1803 0xffffffff, /* dst_mask */
1804 false), /* pcrel_offset */
1805 HOWTO (R_ARM_GOTFUNCDESC, /* type */
1806 0, /* rightshift */
1807 4, /* size */
1808 32, /* bitsize */
1809 false, /* pc_relative */
1810 0, /* bitpos */
1811 complain_overflow_bitfield,/* complain_on_overflow */
1812 bfd_elf_generic_reloc, /* special_function */
1813 "R_ARM_GOTFUNCDESC", /* name */
1814 false, /* partial_inplace */
1815 0, /* src_mask */
1816 0xffffffff, /* dst_mask */
1817 false), /* pcrel_offset */
1818 HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */
1819 0, /* rightshift */
1820 4, /* size */
1821 32, /* bitsize */
1822 false, /* pc_relative */
1823 0, /* bitpos */
1824 complain_overflow_bitfield,/* complain_on_overflow */
1825 bfd_elf_generic_reloc, /* special_function */
1826 "R_ARM_GOTOFFFUNCDESC",/* name */
1827 false, /* partial_inplace */
1828 0, /* src_mask */
1829 0xffffffff, /* dst_mask */
1830 false), /* pcrel_offset */
1831 HOWTO (R_ARM_FUNCDESC, /* type */
1832 0, /* rightshift */
1833 4, /* size */
1834 32, /* bitsize */
1835 false, /* pc_relative */
1836 0, /* bitpos */
1837 complain_overflow_bitfield,/* complain_on_overflow */
1838 bfd_elf_generic_reloc, /* special_function */
1839 "R_ARM_FUNCDESC", /* name */
1840 false, /* partial_inplace */
1841 0, /* src_mask */
1842 0xffffffff, /* dst_mask */
1843 false), /* pcrel_offset */
1844 HOWTO (R_ARM_FUNCDESC_VALUE, /* type */
1845 0, /* rightshift */
1846 4, /* size */
1847 64, /* bitsize */
1848 false, /* pc_relative */
1849 0, /* bitpos */
1850 complain_overflow_bitfield,/* complain_on_overflow */
1851 bfd_elf_generic_reloc, /* special_function */
1852 "R_ARM_FUNCDESC_VALUE",/* name */
1853 false, /* partial_inplace */
1854 0, /* src_mask */
1855 0xffffffff, /* dst_mask */
1856 false), /* pcrel_offset */
1857 HOWTO (R_ARM_TLS_GD32_FDPIC, /* type */
1858 0, /* rightshift */
1859 4, /* size */
1860 32, /* bitsize */
1861 false, /* pc_relative */
1862 0, /* bitpos */
1863 complain_overflow_bitfield,/* complain_on_overflow */
1864 bfd_elf_generic_reloc, /* special_function */
1865 "R_ARM_TLS_GD32_FDPIC",/* name */
1866 false, /* partial_inplace */
1867 0, /* src_mask */
1868 0xffffffff, /* dst_mask */
1869 false), /* pcrel_offset */
1870 HOWTO (R_ARM_TLS_LDM32_FDPIC, /* type */
1871 0, /* rightshift */
1872 4, /* size */
1873 32, /* bitsize */
1874 false, /* pc_relative */
1875 0, /* bitpos */
1876 complain_overflow_bitfield,/* complain_on_overflow */
1877 bfd_elf_generic_reloc, /* special_function */
1878 "R_ARM_TLS_LDM32_FDPIC",/* name */
1879 false, /* partial_inplace */
1880 0, /* src_mask */
1881 0xffffffff, /* dst_mask */
1882 false), /* pcrel_offset */
1883 HOWTO (R_ARM_TLS_IE32_FDPIC, /* type */
1884 0, /* rightshift */
1885 4, /* size */
1886 32, /* bitsize */
1887 false, /* pc_relative */
1888 0, /* bitpos */
1889 complain_overflow_bitfield,/* complain_on_overflow */
1890 bfd_elf_generic_reloc, /* special_function */
1891 "R_ARM_TLS_IE32_FDPIC",/* name */
1892 false, /* partial_inplace */
1893 0, /* src_mask */
1894 0xffffffff, /* dst_mask */
1895 false), /* pcrel_offset */
1896 };
1897
1898 /* 249-255 extended, currently unused, relocations: */
1899 static reloc_howto_type elf32_arm_howto_table_3[4] =
1900 {
1901 HOWTO (R_ARM_RREL32, /* type */
1902 0, /* rightshift */
1903 0, /* size */
1904 0, /* bitsize */
1905 false, /* pc_relative */
1906 0, /* bitpos */
1907 complain_overflow_dont,/* complain_on_overflow */
1908 bfd_elf_generic_reloc, /* special_function */
1909 "R_ARM_RREL32", /* name */
1910 false, /* partial_inplace */
1911 0, /* src_mask */
1912 0, /* dst_mask */
1913 false), /* pcrel_offset */
1914
1915 HOWTO (R_ARM_RABS32, /* type */
1916 0, /* rightshift */
1917 0, /* size */
1918 0, /* bitsize */
1919 false, /* pc_relative */
1920 0, /* bitpos */
1921 complain_overflow_dont,/* complain_on_overflow */
1922 bfd_elf_generic_reloc, /* special_function */
1923 "R_ARM_RABS32", /* name */
1924 false, /* partial_inplace */
1925 0, /* src_mask */
1926 0, /* dst_mask */
1927 false), /* pcrel_offset */
1928
1929 HOWTO (R_ARM_RPC24, /* type */
1930 0, /* rightshift */
1931 0, /* size */
1932 0, /* bitsize */
1933 false, /* pc_relative */
1934 0, /* bitpos */
1935 complain_overflow_dont,/* complain_on_overflow */
1936 bfd_elf_generic_reloc, /* special_function */
1937 "R_ARM_RPC24", /* name */
1938 false, /* partial_inplace */
1939 0, /* src_mask */
1940 0, /* dst_mask */
1941 false), /* pcrel_offset */
1942
1943 HOWTO (R_ARM_RBASE, /* type */
1944 0, /* rightshift */
1945 0, /* size */
1946 0, /* bitsize */
1947 false, /* pc_relative */
1948 0, /* bitpos */
1949 complain_overflow_dont,/* complain_on_overflow */
1950 bfd_elf_generic_reloc, /* special_function */
1951 "R_ARM_RBASE", /* name */
1952 false, /* partial_inplace */
1953 0, /* src_mask */
1954 0, /* dst_mask */
1955 false) /* pcrel_offset */
1956 };
1957
1958 static reloc_howto_type *
1959 elf32_arm_howto_from_type (unsigned int r_type)
1960 {
1961 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1962 return &elf32_arm_howto_table_1[r_type];
1963
1964 if (r_type >= R_ARM_IRELATIVE
1965 && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2))
1966 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1967
1968 if (r_type >= R_ARM_RREL32
1969 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1970 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1971
1972 return NULL;
1973 }
1974
1975 static bool
1976 elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc,
1977 Elf_Internal_Rela * elf_reloc)
1978 {
1979 unsigned int r_type;
1980
1981 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1982 if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL)
1983 {
1984 /* xgettext:c-format */
1985 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1986 abfd, r_type);
1987 bfd_set_error (bfd_error_bad_value);
1988 return false;
1989 }
1990 return true;
1991 }
1992
1993 struct elf32_arm_reloc_map
1994 {
1995 bfd_reloc_code_real_type bfd_reloc_val;
1996 unsigned char elf_reloc_val;
1997 };
1998
1999 /* All entries in this list must also be present in elf32_arm_howto_table. */
2000 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
2001 {
2002 {BFD_RELOC_NONE, R_ARM_NONE},
2003 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
2004 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
2005 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
2006 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
2007 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
2008 {BFD_RELOC_32, R_ARM_ABS32},
2009 {BFD_RELOC_32_PCREL, R_ARM_REL32},
2010 {BFD_RELOC_8, R_ARM_ABS8},
2011 {BFD_RELOC_16, R_ARM_ABS16},
2012 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
2013 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
2014 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
2015 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
2016 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
2017 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
2018 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
2019 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
2020 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
2021 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
2022 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
2023 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
2024 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
2025 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
2026 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
2027 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
2028 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
2029 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
2030 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
2031 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
2032 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
2033 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
2034 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
2035 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
2036 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
2037 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
2038 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
2039 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
2040 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
2041 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
2042 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
2043 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
2044 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
2045 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
2046 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
2047 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
2048 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
2049 {BFD_RELOC_ARM_GOTFUNCDESC, R_ARM_GOTFUNCDESC},
2050 {BFD_RELOC_ARM_GOTOFFFUNCDESC, R_ARM_GOTOFFFUNCDESC},
2051 {BFD_RELOC_ARM_FUNCDESC, R_ARM_FUNCDESC},
2052 {BFD_RELOC_ARM_FUNCDESC_VALUE, R_ARM_FUNCDESC_VALUE},
2053 {BFD_RELOC_ARM_TLS_GD32_FDPIC, R_ARM_TLS_GD32_FDPIC},
2054 {BFD_RELOC_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_LDM32_FDPIC},
2055 {BFD_RELOC_ARM_TLS_IE32_FDPIC, R_ARM_TLS_IE32_FDPIC},
2056 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
2057 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
2058 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
2059 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
2060 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
2061 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
2062 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
2063 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
2064 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
2065 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
2066 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
2067 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
2068 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
2069 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
2070 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
2071 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
2072 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
2073 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
2074 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
2075 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
2076 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
2077 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
2078 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
2079 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
2080 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
2081 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
2082 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
2083 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
2084 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
2085 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
2086 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
2087 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
2088 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
2089 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
2090 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
2091 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
2092 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
2093 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
2094 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
2095 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
2096 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
2097 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
2098 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC},
2099 {BFD_RELOC_ARM_THUMB_BF17, R_ARM_THM_BF16},
2100 {BFD_RELOC_ARM_THUMB_BF13, R_ARM_THM_BF12},
2101 {BFD_RELOC_ARM_THUMB_BF19, R_ARM_THM_BF18}
2102 };
2103
2104 static reloc_howto_type *
2105 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2106 bfd_reloc_code_real_type code)
2107 {
2108 unsigned int i;
2109
2110 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
2111 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
2112 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
2113
2114 return NULL;
2115 }
2116
2117 static reloc_howto_type *
2118 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2119 const char *r_name)
2120 {
2121 unsigned int i;
2122
2123 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
2124 if (elf32_arm_howto_table_1[i].name != NULL
2125 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
2126 return &elf32_arm_howto_table_1[i];
2127
2128 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
2129 if (elf32_arm_howto_table_2[i].name != NULL
2130 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
2131 return &elf32_arm_howto_table_2[i];
2132
2133 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
2134 if (elf32_arm_howto_table_3[i].name != NULL
2135 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
2136 return &elf32_arm_howto_table_3[i];
2137
2138 return NULL;
2139 }
2140
2141 /* Support for core dump NOTE sections. */
2142
2143 static bool
2144 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2145 {
2146 int offset;
2147 size_t size;
2148
2149 switch (note->descsz)
2150 {
2151 default:
2152 return false;
2153
2154 case 148: /* Linux/ARM 32-bit. */
2155 /* pr_cursig */
2156 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2157
2158 /* pr_pid */
2159 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2160
2161 /* pr_reg */
2162 offset = 72;
2163 size = 72;
2164
2165 break;
2166 }
2167
2168 /* Make a ".reg/999" section. */
2169 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2170 size, note->descpos + offset);
2171 }
2172
2173 static bool
2174 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2175 {
2176 switch (note->descsz)
2177 {
2178 default:
2179 return false;
2180
2181 case 124: /* Linux/ARM elf_prpsinfo. */
2182 elf_tdata (abfd)->core->pid
2183 = bfd_get_32 (abfd, note->descdata + 12);
2184 elf_tdata (abfd)->core->program
2185 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2186 elf_tdata (abfd)->core->command
2187 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2188 }
2189
2190 /* Note that for some reason, a spurious space is tacked
2191 onto the end of the args in some (at least one anyway)
2192 implementations, so strip it off if it exists. */
2193 {
2194 char *command = elf_tdata (abfd)->core->command;
2195 int n = strlen (command);
2196
2197 if (0 < n && command[n - 1] == ' ')
2198 command[n - 1] = '\0';
2199 }
2200
2201 return true;
2202 }
2203
2204 static char *
2205 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2206 int note_type, ...)
2207 {
2208 switch (note_type)
2209 {
2210 default:
2211 return NULL;
2212
2213 case NT_PRPSINFO:
2214 {
2215 char data[124] ATTRIBUTE_NONSTRING;
2216 va_list ap;
2217
2218 va_start (ap, note_type);
2219 memset (data, 0, sizeof (data));
2220 strncpy (data + 28, va_arg (ap, const char *), 16);
2221 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2222 DIAGNOSTIC_PUSH;
2223 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
2224 -Wstringop-truncation:
2225 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
2226 */
2227 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
2228 #endif
2229 strncpy (data + 44, va_arg (ap, const char *), 80);
2230 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2231 DIAGNOSTIC_POP;
2232 #endif
2233 va_end (ap);
2234
2235 return elfcore_write_note (abfd, buf, bufsiz,
2236 "CORE", note_type, data, sizeof (data));
2237 }
2238
2239 case NT_PRSTATUS:
2240 {
2241 char data[148];
2242 va_list ap;
2243 long pid;
2244 int cursig;
2245 const void *greg;
2246
2247 va_start (ap, note_type);
2248 memset (data, 0, sizeof (data));
2249 pid = va_arg (ap, long);
2250 bfd_put_32 (abfd, pid, data + 24);
2251 cursig = va_arg (ap, int);
2252 bfd_put_16 (abfd, cursig, data + 12);
2253 greg = va_arg (ap, const void *);
2254 memcpy (data + 72, greg, 72);
2255 va_end (ap);
2256
2257 return elfcore_write_note (abfd, buf, bufsiz,
2258 "CORE", note_type, data, sizeof (data));
2259 }
2260 }
2261 }
2262
2263 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2264 #define TARGET_LITTLE_NAME "elf32-littlearm"
2265 #define TARGET_BIG_SYM arm_elf32_be_vec
2266 #define TARGET_BIG_NAME "elf32-bigarm"
2267
2268 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2269 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2270 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2271
2272 typedef unsigned long int insn32;
2273 typedef unsigned short int insn16;
2274
2275 /* In lieu of proper flags, assume all EABIv4 or later objects are
2276 interworkable. */
2277 #define INTERWORK_FLAG(abfd) \
2278 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2279 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2280 || ((abfd)->flags & BFD_LINKER_CREATED))
2281
2282 /* The linker script knows the section names for placement.
2283 The entry_names are used to do simple name mangling on the stubs.
2284 Given a function name, and its type, the stub can be found. The
2285 name can be changed. The only requirement is the %s be present. */
2286 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2287 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2288
2289 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2290 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2291
2292 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2293 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2294
2295 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2296 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2297
2298 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2299 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2300
2301 #define STUB_ENTRY_NAME "__%s_veneer"
2302
2303 #define CMSE_PREFIX "__acle_se_"
2304
2305 #define CMSE_STUB_NAME ".gnu.sgstubs"
2306
2307 /* The name of the dynamic interpreter. This is put in the .interp
2308 section. */
2309 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2310
2311 /* FDPIC default stack size. */
2312 #define DEFAULT_STACK_SIZE 0x8000
2313
2314 static const unsigned long tls_trampoline [] =
2315 {
2316 0xe08e0000, /* add r0, lr, r0 */
2317 0xe5901004, /* ldr r1, [r0,#4] */
2318 0xe12fff11, /* bx r1 */
2319 };
2320
2321 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2322 {
2323 0xe52d2004, /* push {r2} */
2324 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2325 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2326 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2327 0xe081100f, /* 2: add r1, pc */
2328 0xe12fff12, /* bx r2 */
2329 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2330 + dl_tlsdesc_lazy_resolver(GOT) */
2331 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2332 };
2333
2334 /* NOTE: [Thumb nop sequence]
2335 When adding code that transitions from Thumb to Arm the instruction that
2336 should be used for the alignment padding should be 0xe7fd (b .-2) instead of
2337 a nop for performance reasons. */
2338
2339 /* ARM FDPIC PLT entry. */
2340 /* The last 5 words contain PLT lazy fragment code and data. */
2341 static const bfd_vma elf32_arm_fdpic_plt_entry [] =
2342 {
2343 0xe59fc008, /* ldr r12, .L1 */
2344 0xe08cc009, /* add r12, r12, r9 */
2345 0xe59c9004, /* ldr r9, [r12, #4] */
2346 0xe59cf000, /* ldr pc, [r12] */
2347 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */
2348 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */
2349 0xe51fc00c, /* ldr r12, [pc, #-12] */
2350 0xe92d1000, /* push {r12} */
2351 0xe599c004, /* ldr r12, [r9, #4] */
2352 0xe599f000, /* ldr pc, [r9] */
2353 };
2354
2355 /* Thumb FDPIC PLT entry. */
2356 /* The last 5 words contain PLT lazy fragment code and data. */
2357 static const bfd_vma elf32_arm_fdpic_thumb_plt_entry [] =
2358 {
2359 0xc00cf8df, /* ldr.w r12, .L1 */
2360 0x0c09eb0c, /* add.w r12, r12, r9 */
2361 0x9004f8dc, /* ldr.w r9, [r12, #4] */
2362 0xf000f8dc, /* ldr.w pc, [r12] */
2363 0x00000000, /* .L1 .word foo(GOTOFFFUNCDESC) */
2364 0x00000000, /* .L2 .word foo(funcdesc_value_reloc_offset) */
2365 0xc008f85f, /* ldr.w r12, .L2 */
2366 0xcd04f84d, /* push {r12} */
2367 0xc004f8d9, /* ldr.w r12, [r9, #4] */
2368 0xf000f8d9, /* ldr.w pc, [r9] */
2369 };
2370
2371 #ifdef FOUR_WORD_PLT
2372
2373 /* The first entry in a procedure linkage table looks like
2374 this. It is set up so that any shared library function that is
2375 called before the relocation has been set up calls the dynamic
2376 linker first. */
2377 static const bfd_vma elf32_arm_plt0_entry [] =
2378 {
2379 0xe52de004, /* str lr, [sp, #-4]! */
2380 0xe59fe010, /* ldr lr, [pc, #16] */
2381 0xe08fe00e, /* add lr, pc, lr */
2382 0xe5bef008, /* ldr pc, [lr, #8]! */
2383 };
2384
2385 /* Subsequent entries in a procedure linkage table look like
2386 this. */
2387 static const bfd_vma elf32_arm_plt_entry [] =
2388 {
2389 0xe28fc600, /* add ip, pc, #NN */
2390 0xe28cca00, /* add ip, ip, #NN */
2391 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2392 0x00000000, /* unused */
2393 };
2394
2395 #else /* not FOUR_WORD_PLT */
2396
2397 /* The first entry in a procedure linkage table looks like
2398 this. It is set up so that any shared library function that is
2399 called before the relocation has been set up calls the dynamic
2400 linker first. */
2401 static const bfd_vma elf32_arm_plt0_entry [] =
2402 {
2403 0xe52de004, /* str lr, [sp, #-4]! */
2404 0xe59fe004, /* ldr lr, [pc, #4] */
2405 0xe08fe00e, /* add lr, pc, lr */
2406 0xe5bef008, /* ldr pc, [lr, #8]! */
2407 0x00000000, /* &GOT[0] - . */
2408 };
2409
2410 /* By default subsequent entries in a procedure linkage table look like
2411 this. Offsets that don't fit into 28 bits will cause link error. */
2412 static const bfd_vma elf32_arm_plt_entry_short [] =
2413 {
2414 0xe28fc600, /* add ip, pc, #0xNN00000 */
2415 0xe28cca00, /* add ip, ip, #0xNN000 */
2416 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2417 };
2418
2419 /* When explicitly asked, we'll use this "long" entry format
2420 which can cope with arbitrary displacements. */
2421 static const bfd_vma elf32_arm_plt_entry_long [] =
2422 {
2423 0xe28fc200, /* add ip, pc, #0xN0000000 */
2424 0xe28cc600, /* add ip, ip, #0xNN00000 */
2425 0xe28cca00, /* add ip, ip, #0xNN000 */
2426 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2427 };
2428
2429 static bool elf32_arm_use_long_plt_entry = false;
2430
2431 #endif /* not FOUR_WORD_PLT */
2432
2433 /* The first entry in a procedure linkage table looks like this.
2434 It is set up so that any shared library function that is called before the
2435 relocation has been set up calls the dynamic linker first. */
2436 static const bfd_vma elf32_thumb2_plt0_entry [] =
2437 {
2438 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2439 an instruction maybe encoded to one or two array elements. */
2440 0xf8dfb500, /* push {lr} */
2441 0x44fee008, /* ldr.w lr, [pc, #8] */
2442 /* add lr, pc */
2443 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2444 0x00000000, /* &GOT[0] - . */
2445 };
2446
2447 /* Subsequent entries in a procedure linkage table for thumb only target
2448 look like this. */
2449 static const bfd_vma elf32_thumb2_plt_entry [] =
2450 {
2451 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2452 an instruction maybe encoded to one or two array elements. */
2453 0x0c00f240, /* movw ip, #0xNNNN */
2454 0x0c00f2c0, /* movt ip, #0xNNNN */
2455 0xf8dc44fc, /* add ip, pc */
2456 0xe7fcf000 /* ldr.w pc, [ip] */
2457 /* b .-4 */
2458 };
2459
2460 /* The format of the first entry in the procedure linkage table
2461 for a VxWorks executable. */
2462 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2463 {
2464 0xe52dc008, /* str ip,[sp,#-8]! */
2465 0xe59fc000, /* ldr ip,[pc] */
2466 0xe59cf008, /* ldr pc,[ip,#8] */
2467 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2468 };
2469
2470 /* The format of subsequent entries in a VxWorks executable. */
2471 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2472 {
2473 0xe59fc000, /* ldr ip,[pc] */
2474 0xe59cf000, /* ldr pc,[ip] */
2475 0x00000000, /* .long @got */
2476 0xe59fc000, /* ldr ip,[pc] */
2477 0xea000000, /* b _PLT */
2478 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2479 };
2480
2481 /* The format of entries in a VxWorks shared library. */
2482 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2483 {
2484 0xe59fc000, /* ldr ip,[pc] */
2485 0xe79cf009, /* ldr pc,[ip,r9] */
2486 0x00000000, /* .long @got */
2487 0xe59fc000, /* ldr ip,[pc] */
2488 0xe599f008, /* ldr pc,[r9,#8] */
2489 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2490 };
2491
2492 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2493 #define PLT_THUMB_STUB_SIZE 4
2494 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2495 {
2496 0x4778, /* bx pc */
2497 0xe7fd /* b .-2 */
2498 };
2499
2500 /* The first entry in a procedure linkage table looks like
2501 this. It is set up so that any shared library function that is
2502 called before the relocation has been set up calls the dynamic
2503 linker first. */
2504 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2505 {
2506 /* First bundle: */
2507 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2508 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2509 0xe08cc00f, /* add ip, ip, pc */
2510 0xe52dc008, /* str ip, [sp, #-8]! */
2511 /* Second bundle: */
2512 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2513 0xe59cc000, /* ldr ip, [ip] */
2514 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2515 0xe12fff1c, /* bx ip */
2516 /* Third bundle: */
2517 0xe320f000, /* nop */
2518 0xe320f000, /* nop */
2519 0xe320f000, /* nop */
2520 /* .Lplt_tail: */
2521 0xe50dc004, /* str ip, [sp, #-4] */
2522 /* Fourth bundle: */
2523 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2524 0xe59cc000, /* ldr ip, [ip] */
2525 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2526 0xe12fff1c, /* bx ip */
2527 };
2528 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2529
2530 /* Subsequent entries in a procedure linkage table look like this. */
2531 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2532 {
2533 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2534 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2535 0xe08cc00f, /* add ip, ip, pc */
2536 0xea000000, /* b .Lplt_tail */
2537 };
2538
2539 /* PR 28924:
2540 There was a bug due to too high values of THM_MAX_FWD_BRANCH_OFFSET and
2541 THM2_MAX_FWD_BRANCH_OFFSET. The first macro concerns the case when Thumb-2
2542 is not available, and second macro when Thumb-2 is available. Among other
2543 things, they affect the range of branches represented as BLX instructions
2544 in Encoding T2 defined in Section A8.8.25 of the ARM Architecture
2545 Reference Manual ARMv7-A and ARMv7-R edition issue C.d. Such branches are
2546 specified there to have a maximum forward offset that is a multiple of 4.
2547 Previously, the respective values defined here were multiples of 2 but not
2548 4 and they are included in comments for reference. */
2549 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2550 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2551 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) - 4 + 4)
2552 /* #def THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) - 2 + 4) */
2553 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2554 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 4) + 4)
2555 /* #def THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4) */
2556 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2557 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2558 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2559
2560 enum stub_insn_type
2561 {
2562 THUMB16_TYPE = 1,
2563 THUMB32_TYPE,
2564 ARM_TYPE,
2565 DATA_TYPE
2566 };
2567
2568 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2569 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2570 is inserted in arm_build_one_stub(). */
2571 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2572 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2573 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2574 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2575 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2576 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2577 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2578 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2579
2580 typedef struct
2581 {
2582 bfd_vma data;
2583 enum stub_insn_type type;
2584 unsigned int r_type;
2585 int reloc_addend;
2586 } insn_sequence;
2587
2588 /* See note [Thumb nop sequence] when adding a veneer. */
2589
2590 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2591 to reach the stub if necessary. */
2592 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2593 {
2594 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2595 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2596 };
2597
2598 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2599 available. */
2600 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2601 {
2602 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2603 ARM_INSN (0xe12fff1c), /* bx ip */
2604 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2605 };
2606
2607 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2608 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2609 {
2610 THUMB16_INSN (0xb401), /* push {r0} */
2611 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2612 THUMB16_INSN (0x4684), /* mov ip, r0 */
2613 THUMB16_INSN (0xbc01), /* pop {r0} */
2614 THUMB16_INSN (0x4760), /* bx ip */
2615 THUMB16_INSN (0xbf00), /* nop */
2616 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2617 };
2618
2619 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2620 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2621 {
2622 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2623 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2624 };
2625
2626 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2627 M-profile architectures. */
2628 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2629 {
2630 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2631 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2632 THUMB16_INSN (0x4760), /* bx ip */
2633 };
2634
2635 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2636 allowed. */
2637 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2638 {
2639 THUMB16_INSN (0x4778), /* bx pc */
2640 THUMB16_INSN (0xe7fd), /* b .-2 */
2641 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2642 ARM_INSN (0xe12fff1c), /* bx ip */
2643 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2644 };
2645
2646 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2647 available. */
2648 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2649 {
2650 THUMB16_INSN (0x4778), /* bx pc */
2651 THUMB16_INSN (0xe7fd), /* b .-2 */
2652 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2653 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2654 };
2655
2656 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2657 one, when the destination is close enough. */
2658 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2659 {
2660 THUMB16_INSN (0x4778), /* bx pc */
2661 THUMB16_INSN (0xe7fd), /* b .-2 */
2662 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2663 };
2664
2665 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2666 blx to reach the stub if necessary. */
2667 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2668 {
2669 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2670 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2671 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2672 };
2673
2674 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2675 blx to reach the stub if necessary. We can not add into pc;
2676 it is not guaranteed to mode switch (different in ARMv6 and
2677 ARMv7). */
2678 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2679 {
2680 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2681 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2682 ARM_INSN (0xe12fff1c), /* bx ip */
2683 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2684 };
2685
2686 /* V4T ARM -> ARM long branch stub, PIC. */
2687 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2688 {
2689 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2690 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2691 ARM_INSN (0xe12fff1c), /* bx ip */
2692 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2693 };
2694
2695 /* V4T Thumb -> ARM long branch stub, PIC. */
2696 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2697 {
2698 THUMB16_INSN (0x4778), /* bx pc */
2699 THUMB16_INSN (0xe7fd), /* b .-2 */
2700 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2701 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2702 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2703 };
2704
2705 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2706 architectures. */
2707 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2708 {
2709 THUMB16_INSN (0xb401), /* push {r0} */
2710 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2711 THUMB16_INSN (0x46fc), /* mov ip, pc */
2712 THUMB16_INSN (0x4484), /* add ip, r0 */
2713 THUMB16_INSN (0xbc01), /* pop {r0} */
2714 THUMB16_INSN (0x4760), /* bx ip */
2715 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2716 };
2717
2718 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2719 allowed. */
2720 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2721 {
2722 THUMB16_INSN (0x4778), /* bx pc */
2723 THUMB16_INSN (0xe7fd), /* b .-2 */
2724 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2725 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2726 ARM_INSN (0xe12fff1c), /* bx ip */
2727 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2728 };
2729
2730 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2731 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2732 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2733 {
2734 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2735 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2736 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2737 };
2738
2739 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2740 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2741 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2742 {
2743 THUMB16_INSN (0x4778), /* bx pc */
2744 THUMB16_INSN (0xe7fd), /* b .-2 */
2745 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2746 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2747 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2748 };
2749
2750 /* NaCl ARM -> ARM long branch stub. */
2751 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2752 {
2753 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2754 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2755 ARM_INSN (0xe12fff1c), /* bx ip */
2756 ARM_INSN (0xe320f000), /* nop */
2757 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2758 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2759 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2760 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2761 };
2762
2763 /* NaCl ARM -> ARM long branch stub, PIC. */
2764 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2765 {
2766 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2767 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2768 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2769 ARM_INSN (0xe12fff1c), /* bx ip */
2770 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2771 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2772 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2773 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2774 };
2775
2776 /* Stub used for transition to secure state (aka SG veneer). */
2777 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2778 {
2779 THUMB32_INSN (0xe97fe97f), /* sg. */
2780 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2781 };
2782
2783
2784 /* Cortex-A8 erratum-workaround stubs. */
2785
2786 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2787 can't use a conditional branch to reach this stub). */
2788
2789 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2790 {
2791 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2792 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2793 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2794 };
2795
2796 /* Stub used for b.w and bl.w instructions. */
2797
2798 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2799 {
2800 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2801 };
2802
2803 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2804 {
2805 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2806 };
2807
2808 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2809 instruction (which switches to ARM mode) to point to this stub. Jump to the
2810 real destination using an ARM-mode branch. */
2811
2812 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2813 {
2814 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2815 };
2816
2817 /* For each section group there can be a specially created linker section
2818 to hold the stubs for that group. The name of the stub section is based
2819 upon the name of another section within that group with the suffix below
2820 applied.
2821
2822 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2823 create what appeared to be a linker stub section when it actually
2824 contained user code/data. For example, consider this fragment:
2825
2826 const char * stubborn_problems[] = { "np" };
2827
2828 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2829 section called:
2830
2831 .data.rel.local.stubborn_problems
2832
2833 This then causes problems in arm32_arm_build_stubs() as it triggers:
2834
2835 // Ignore non-stub sections.
2836 if (!strstr (stub_sec->name, STUB_SUFFIX))
2837 continue;
2838
2839 And so the section would be ignored instead of being processed. Hence
2840 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2841 C identifier. */
2842 #define STUB_SUFFIX ".__stub"
2843
2844 /* One entry per long/short branch stub defined above. */
2845 #define DEF_STUBS \
2846 DEF_STUB (long_branch_any_any) \
2847 DEF_STUB (long_branch_v4t_arm_thumb) \
2848 DEF_STUB (long_branch_thumb_only) \
2849 DEF_STUB (long_branch_v4t_thumb_thumb) \
2850 DEF_STUB (long_branch_v4t_thumb_arm) \
2851 DEF_STUB (short_branch_v4t_thumb_arm) \
2852 DEF_STUB (long_branch_any_arm_pic) \
2853 DEF_STUB (long_branch_any_thumb_pic) \
2854 DEF_STUB (long_branch_v4t_thumb_thumb_pic) \
2855 DEF_STUB (long_branch_v4t_arm_thumb_pic) \
2856 DEF_STUB (long_branch_v4t_thumb_arm_pic) \
2857 DEF_STUB (long_branch_thumb_only_pic) \
2858 DEF_STUB (long_branch_any_tls_pic) \
2859 DEF_STUB (long_branch_v4t_thumb_tls_pic) \
2860 DEF_STUB (long_branch_arm_nacl) \
2861 DEF_STUB (long_branch_arm_nacl_pic) \
2862 DEF_STUB (cmse_branch_thumb_only) \
2863 DEF_STUB (a8_veneer_b_cond) \
2864 DEF_STUB (a8_veneer_b) \
2865 DEF_STUB (a8_veneer_bl) \
2866 DEF_STUB (a8_veneer_blx) \
2867 DEF_STUB (long_branch_thumb2_only) \
2868 DEF_STUB (long_branch_thumb2_only_pure)
2869
2870 #define DEF_STUB(x) arm_stub_##x,
2871 enum elf32_arm_stub_type
2872 {
2873 arm_stub_none,
2874 DEF_STUBS
2875 max_stub_type
2876 };
2877 #undef DEF_STUB
2878
2879 /* Note the first a8_veneer type. */
2880 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2881
2882 typedef struct
2883 {
2884 const insn_sequence* template_sequence;
2885 int template_size;
2886 } stub_def;
2887
2888 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2889 static const stub_def stub_definitions[] =
2890 {
2891 {NULL, 0},
2892 DEF_STUBS
2893 };
2894
2895 struct elf32_arm_stub_hash_entry
2896 {
2897 /* Base hash table entry structure. */
2898 struct bfd_hash_entry root;
2899
2900 /* The stub section. */
2901 asection *stub_sec;
2902
2903 /* Offset within stub_sec of the beginning of this stub. */
2904 bfd_vma stub_offset;
2905
2906 /* Given the symbol's value and its section we can determine its final
2907 value when building the stubs (so the stub knows where to jump). */
2908 bfd_vma target_value;
2909 asection *target_section;
2910
2911 /* Same as above but for the source of the branch to the stub. Used for
2912 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2913 such, source section does not need to be recorded since Cortex-A8 erratum
2914 workaround stubs are only generated when both source and target are in the
2915 same section. */
2916 bfd_vma source_value;
2917
2918 /* The instruction which caused this stub to be generated (only valid for
2919 Cortex-A8 erratum workaround stubs at present). */
2920 unsigned long orig_insn;
2921
2922 /* The stub type. */
2923 enum elf32_arm_stub_type stub_type;
2924 /* Its encoding size in bytes. */
2925 int stub_size;
2926 /* Its template. */
2927 const insn_sequence *stub_template;
2928 /* The size of the template (number of entries). */
2929 int stub_template_size;
2930
2931 /* The symbol table entry, if any, that this was derived from. */
2932 struct elf32_arm_link_hash_entry *h;
2933
2934 /* Type of branch. */
2935 enum arm_st_branch_type branch_type;
2936
2937 /* Where this stub is being called from, or, in the case of combined
2938 stub sections, the first input section in the group. */
2939 asection *id_sec;
2940
2941 /* The name for the local symbol at the start of this stub. The
2942 stub name in the hash table has to be unique; this does not, so
2943 it can be friendlier. */
2944 char *output_name;
2945 };
2946
2947 /* Used to build a map of a section. This is required for mixed-endian
2948 code/data. */
2949
2950 typedef struct elf32_elf_section_map
2951 {
2952 bfd_vma vma;
2953 char type;
2954 }
2955 elf32_arm_section_map;
2956
2957 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2958
2959 typedef enum
2960 {
2961 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2962 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2963 VFP11_ERRATUM_ARM_VENEER,
2964 VFP11_ERRATUM_THUMB_VENEER
2965 }
2966 elf32_vfp11_erratum_type;
2967
2968 typedef struct elf32_vfp11_erratum_list
2969 {
2970 struct elf32_vfp11_erratum_list *next;
2971 bfd_vma vma;
2972 union
2973 {
2974 struct
2975 {
2976 struct elf32_vfp11_erratum_list *veneer;
2977 unsigned int vfp_insn;
2978 } b;
2979 struct
2980 {
2981 struct elf32_vfp11_erratum_list *branch;
2982 unsigned int id;
2983 } v;
2984 } u;
2985 elf32_vfp11_erratum_type type;
2986 }
2987 elf32_vfp11_erratum_list;
2988
2989 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2990 veneer. */
2991 typedef enum
2992 {
2993 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2994 STM32L4XX_ERRATUM_VENEER
2995 }
2996 elf32_stm32l4xx_erratum_type;
2997
2998 typedef struct elf32_stm32l4xx_erratum_list
2999 {
3000 struct elf32_stm32l4xx_erratum_list *next;
3001 bfd_vma vma;
3002 union
3003 {
3004 struct
3005 {
3006 struct elf32_stm32l4xx_erratum_list *veneer;
3007 unsigned int insn;
3008 } b;
3009 struct
3010 {
3011 struct elf32_stm32l4xx_erratum_list *branch;
3012 unsigned int id;
3013 } v;
3014 } u;
3015 elf32_stm32l4xx_erratum_type type;
3016 }
3017 elf32_stm32l4xx_erratum_list;
3018
3019 typedef enum
3020 {
3021 DELETE_EXIDX_ENTRY,
3022 INSERT_EXIDX_CANTUNWIND_AT_END
3023 }
3024 arm_unwind_edit_type;
3025
3026 /* A (sorted) list of edits to apply to an unwind table. */
3027 typedef struct arm_unwind_table_edit
3028 {
3029 arm_unwind_edit_type type;
3030 /* Note: we sometimes want to insert an unwind entry corresponding to a
3031 section different from the one we're currently writing out, so record the
3032 (text) section this edit relates to here. */
3033 asection *linked_section;
3034 unsigned int index;
3035 struct arm_unwind_table_edit *next;
3036 }
3037 arm_unwind_table_edit;
3038
3039 typedef struct _arm_elf_section_data
3040 {
3041 /* Information about mapping symbols. */
3042 struct bfd_elf_section_data elf;
3043 unsigned int mapcount;
3044 unsigned int mapsize;
3045 elf32_arm_section_map *map;
3046 /* Information about CPU errata. */
3047 unsigned int erratumcount;
3048 elf32_vfp11_erratum_list *erratumlist;
3049 unsigned int stm32l4xx_erratumcount;
3050 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
3051 unsigned int additional_reloc_count;
3052 /* Information about unwind tables. */
3053 union
3054 {
3055 /* Unwind info attached to a text section. */
3056 struct
3057 {
3058 asection *arm_exidx_sec;
3059 } text;
3060
3061 /* Unwind info attached to an .ARM.exidx section. */
3062 struct
3063 {
3064 arm_unwind_table_edit *unwind_edit_list;
3065 arm_unwind_table_edit *unwind_edit_tail;
3066 } exidx;
3067 } u;
3068 }
3069 _arm_elf_section_data;
3070
3071 #define elf32_arm_section_data(sec) \
3072 ((_arm_elf_section_data *) elf_section_data (sec))
3073
3074 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
3075 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
3076 so may be created multiple times: we use an array of these entries whilst
3077 relaxing which we can refresh easily, then create stubs for each potentially
3078 erratum-triggering instruction once we've settled on a solution. */
3079
3080 struct a8_erratum_fix
3081 {
3082 bfd *input_bfd;
3083 asection *section;
3084 bfd_vma offset;
3085 bfd_vma target_offset;
3086 unsigned long orig_insn;
3087 char *stub_name;
3088 enum elf32_arm_stub_type stub_type;
3089 enum arm_st_branch_type branch_type;
3090 };
3091
3092 /* A table of relocs applied to branches which might trigger Cortex-A8
3093 erratum. */
3094
3095 struct a8_erratum_reloc
3096 {
3097 bfd_vma from;
3098 bfd_vma destination;
3099 struct elf32_arm_link_hash_entry *hash;
3100 const char *sym_name;
3101 unsigned int r_type;
3102 enum arm_st_branch_type branch_type;
3103 bool non_a8_stub;
3104 };
3105
3106 /* The size of the thread control block. */
3107 #define TCB_SIZE 8
3108
3109 /* ARM-specific information about a PLT entry, over and above the usual
3110 gotplt_union. */
3111 struct arm_plt_info
3112 {
3113 /* We reference count Thumb references to a PLT entry separately,
3114 so that we can emit the Thumb trampoline only if needed. */
3115 bfd_signed_vma thumb_refcount;
3116
3117 /* Some references from Thumb code may be eliminated by BL->BLX
3118 conversion, so record them separately. */
3119 bfd_signed_vma maybe_thumb_refcount;
3120
3121 /* How many of the recorded PLT accesses were from non-call relocations.
3122 This information is useful when deciding whether anything takes the
3123 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
3124 non-call references to the function should resolve directly to the
3125 real runtime target. */
3126 unsigned int noncall_refcount;
3127
3128 /* Since PLT entries have variable size if the Thumb prologue is
3129 used, we need to record the index into .got.plt instead of
3130 recomputing it from the PLT offset. */
3131 bfd_signed_vma got_offset;
3132 };
3133
3134 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
3135 struct arm_local_iplt_info
3136 {
3137 /* The information that is usually found in the generic ELF part of
3138 the hash table entry. */
3139 union gotplt_union root;
3140
3141 /* The information that is usually found in the ARM-specific part of
3142 the hash table entry. */
3143 struct arm_plt_info arm;
3144
3145 /* A list of all potential dynamic relocations against this symbol. */
3146 struct elf_dyn_relocs *dyn_relocs;
3147 };
3148
3149 /* Structure to handle FDPIC support for local functions. */
3150 struct fdpic_local
3151 {
3152 unsigned int funcdesc_cnt;
3153 unsigned int gotofffuncdesc_cnt;
3154 int funcdesc_offset;
3155 };
3156
3157 struct elf_arm_obj_tdata
3158 {
3159 struct elf_obj_tdata root;
3160
3161 /* Zero to warn when linking objects with incompatible enum sizes. */
3162 int no_enum_size_warning;
3163
3164 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3165 int no_wchar_size_warning;
3166
3167 /* The number of entries in each of the arrays in this strcuture.
3168 Used to avoid buffer overruns. */
3169 bfd_size_type num_entries;
3170
3171 /* tls_type for each local got entry. */
3172 char *local_got_tls_type;
3173
3174 /* GOTPLT entries for TLS descriptors. */
3175 bfd_vma *local_tlsdesc_gotent;
3176
3177 /* Information for local symbols that need entries in .iplt. */
3178 struct arm_local_iplt_info **local_iplt;
3179
3180 /* Maintains FDPIC counters and funcdesc info. */
3181 struct fdpic_local *local_fdpic_cnts;
3182 };
3183
3184 #define elf_arm_tdata(bfd) \
3185 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3186
3187 #define elf32_arm_num_entries(bfd) \
3188 (elf_arm_tdata (bfd)->num_entries)
3189
3190 #define elf32_arm_local_got_tls_type(bfd) \
3191 (elf_arm_tdata (bfd)->local_got_tls_type)
3192
3193 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3194 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3195
3196 #define elf32_arm_local_iplt(bfd) \
3197 (elf_arm_tdata (bfd)->local_iplt)
3198
3199 #define elf32_arm_local_fdpic_cnts(bfd) \
3200 (elf_arm_tdata (bfd)->local_fdpic_cnts)
3201
3202 #define is_arm_elf(bfd) \
3203 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3204 && elf_tdata (bfd) != NULL \
3205 && elf_object_id (bfd) == ARM_ELF_DATA)
3206
3207 static bool
3208 elf32_arm_mkobject (bfd *abfd)
3209 {
3210 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
3211 ARM_ELF_DATA);
3212 }
3213
3214 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3215
3216 /* Structure to handle FDPIC support for extern functions. */
3217 struct fdpic_global {
3218 unsigned int gotofffuncdesc_cnt;
3219 unsigned int gotfuncdesc_cnt;
3220 unsigned int funcdesc_cnt;
3221 int funcdesc_offset;
3222 int gotfuncdesc_offset;
3223 };
3224
3225 /* Arm ELF linker hash entry. */
3226 struct elf32_arm_link_hash_entry
3227 {
3228 struct elf_link_hash_entry root;
3229
3230 /* ARM-specific PLT information. */
3231 struct arm_plt_info plt;
3232
3233 #define GOT_UNKNOWN 0
3234 #define GOT_NORMAL 1
3235 #define GOT_TLS_GD 2
3236 #define GOT_TLS_IE 4
3237 #define GOT_TLS_GDESC 8
3238 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3239 unsigned int tls_type : 8;
3240
3241 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3242 unsigned int is_iplt : 1;
3243
3244 unsigned int unused : 23;
3245
3246 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3247 starting at the end of the jump table. */
3248 bfd_vma tlsdesc_got;
3249
3250 /* The symbol marking the real symbol location for exported thumb
3251 symbols with Arm stubs. */
3252 struct elf_link_hash_entry *export_glue;
3253
3254 /* A pointer to the most recently used stub hash entry against this
3255 symbol. */
3256 struct elf32_arm_stub_hash_entry *stub_cache;
3257
3258 /* Counter for FDPIC relocations against this symbol. */
3259 struct fdpic_global fdpic_cnts;
3260 };
3261
3262 /* Traverse an arm ELF linker hash table. */
3263 #define elf32_arm_link_hash_traverse(table, func, info) \
3264 (elf_link_hash_traverse \
3265 (&(table)->root, \
3266 (bool (*) (struct elf_link_hash_entry *, void *)) (func), \
3267 (info)))
3268
3269 /* Get the ARM elf linker hash table from a link_info structure. */
3270 #define elf32_arm_hash_table(p) \
3271 ((is_elf_hash_table ((p)->hash) \
3272 && elf_hash_table_id (elf_hash_table (p)) == ARM_ELF_DATA) \
3273 ? (struct elf32_arm_link_hash_table *) (p)->hash : NULL)
3274
3275 #define arm_stub_hash_lookup(table, string, create, copy) \
3276 ((struct elf32_arm_stub_hash_entry *) \
3277 bfd_hash_lookup ((table), (string), (create), (copy)))
3278
3279 /* Array to keep track of which stub sections have been created, and
3280 information on stub grouping. */
3281 struct map_stub
3282 {
3283 /* This is the section to which stubs in the group will be
3284 attached. */
3285 asection *link_sec;
3286 /* The stub section. */
3287 asection *stub_sec;
3288 };
3289
3290 #define elf32_arm_compute_jump_table_size(htab) \
3291 ((htab)->next_tls_desc_index * 4)
3292
3293 /* ARM ELF linker hash table. */
3294 struct elf32_arm_link_hash_table
3295 {
3296 /* The main hash table. */
3297 struct elf_link_hash_table root;
3298
3299 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3300 bfd_size_type thumb_glue_size;
3301
3302 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3303 bfd_size_type arm_glue_size;
3304
3305 /* The size in bytes of section containing the ARMv4 BX veneers. */
3306 bfd_size_type bx_glue_size;
3307
3308 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3309 veneer has been populated. */
3310 bfd_vma bx_glue_offset[15];
3311
3312 /* The size in bytes of the section containing glue for VFP11 erratum
3313 veneers. */
3314 bfd_size_type vfp11_erratum_glue_size;
3315
3316 /* The size in bytes of the section containing glue for STM32L4XX erratum
3317 veneers. */
3318 bfd_size_type stm32l4xx_erratum_glue_size;
3319
3320 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3321 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3322 elf32_arm_write_section(). */
3323 struct a8_erratum_fix *a8_erratum_fixes;
3324 unsigned int num_a8_erratum_fixes;
3325
3326 /* An arbitrary input BFD chosen to hold the glue sections. */
3327 bfd * bfd_of_glue_owner;
3328
3329 /* Nonzero to output a BE8 image. */
3330 int byteswap_code;
3331
3332 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3333 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3334 int target1_is_rel;
3335
3336 /* The relocation to use for R_ARM_TARGET2 relocations. */
3337 int target2_reloc;
3338
3339 /* 0 = Ignore R_ARM_V4BX.
3340 1 = Convert BX to MOV PC.
3341 2 = Generate v4 interworing stubs. */
3342 int fix_v4bx;
3343
3344 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3345 int fix_cortex_a8;
3346
3347 /* Whether we should fix the ARM1176 BLX immediate issue. */
3348 int fix_arm1176;
3349
3350 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3351 int use_blx;
3352
3353 /* What sort of code sequences we should look for which may trigger the
3354 VFP11 denorm erratum. */
3355 bfd_arm_vfp11_fix vfp11_fix;
3356
3357 /* Global counter for the number of fixes we have emitted. */
3358 int num_vfp11_fixes;
3359
3360 /* What sort of code sequences we should look for which may trigger the
3361 STM32L4XX erratum. */
3362 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3363
3364 /* Global counter for the number of fixes we have emitted. */
3365 int num_stm32l4xx_fixes;
3366
3367 /* Nonzero to force PIC branch veneers. */
3368 int pic_veneer;
3369
3370 /* The number of bytes in the initial entry in the PLT. */
3371 bfd_size_type plt_header_size;
3372
3373 /* The number of bytes in the subsequent PLT etries. */
3374 bfd_size_type plt_entry_size;
3375
3376 /* True if the target uses REL relocations. */
3377 bool use_rel;
3378
3379 /* Nonzero if import library must be a secure gateway import library
3380 as per ARMv8-M Security Extensions. */
3381 int cmse_implib;
3382
3383 /* The import library whose symbols' address must remain stable in
3384 the import library generated. */
3385 bfd *in_implib_bfd;
3386
3387 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3388 bfd_vma next_tls_desc_index;
3389
3390 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3391 bfd_vma num_tls_desc;
3392
3393 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3394 asection *srelplt2;
3395
3396 /* Offset in .plt section of tls_arm_trampoline. */
3397 bfd_vma tls_trampoline;
3398
3399 /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
3400 union
3401 {
3402 bfd_signed_vma refcount;
3403 bfd_vma offset;
3404 } tls_ldm_got;
3405
3406 /* For convenience in allocate_dynrelocs. */
3407 bfd * obfd;
3408
3409 /* The amount of space used by the reserved portion of the sgotplt
3410 section, plus whatever space is used by the jump slots. */
3411 bfd_vma sgotplt_jump_table_size;
3412
3413 /* The stub hash table. */
3414 struct bfd_hash_table stub_hash_table;
3415
3416 /* Linker stub bfd. */
3417 bfd *stub_bfd;
3418
3419 /* Linker call-backs. */
3420 asection * (*add_stub_section) (const char *, asection *, asection *,
3421 unsigned int);
3422 void (*layout_sections_again) (void);
3423
3424 /* Array to keep track of which stub sections have been created, and
3425 information on stub grouping. */
3426 struct map_stub *stub_group;
3427
3428 /* Input stub section holding secure gateway veneers. */
3429 asection *cmse_stub_sec;
3430
3431 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3432 start to be allocated. */
3433 bfd_vma new_cmse_stub_offset;
3434
3435 /* Number of elements in stub_group. */
3436 unsigned int top_id;
3437
3438 /* Assorted information used by elf32_arm_size_stubs. */
3439 unsigned int bfd_count;
3440 unsigned int top_index;
3441 asection **input_list;
3442
3443 /* True if the target system uses FDPIC. */
3444 int fdpic_p;
3445
3446 /* Fixup section. Used for FDPIC. */
3447 asection *srofixup;
3448 };
3449
3450 /* Add an FDPIC read-only fixup. */
3451 static void
3452 arm_elf_add_rofixup (bfd *output_bfd, asection *srofixup, bfd_vma offset)
3453 {
3454 bfd_vma fixup_offset;
3455
3456 fixup_offset = srofixup->reloc_count++ * 4;
3457 BFD_ASSERT (fixup_offset < srofixup->size);
3458 bfd_put_32 (output_bfd, offset, srofixup->contents + fixup_offset);
3459 }
3460
3461 static inline int
3462 ctz (unsigned int mask)
3463 {
3464 #if GCC_VERSION >= 3004
3465 return __builtin_ctz (mask);
3466 #else
3467 unsigned int i;
3468
3469 for (i = 0; i < 8 * sizeof (mask); i++)
3470 {
3471 if (mask & 0x1)
3472 break;
3473 mask = (mask >> 1);
3474 }
3475 return i;
3476 #endif
3477 }
3478
3479 static inline int
3480 elf32_arm_popcount (unsigned int mask)
3481 {
3482 #if GCC_VERSION >= 3004
3483 return __builtin_popcount (mask);
3484 #else
3485 unsigned int i;
3486 int sum = 0;
3487
3488 for (i = 0; i < 8 * sizeof (mask); i++)
3489 {
3490 if (mask & 0x1)
3491 sum++;
3492 mask = (mask >> 1);
3493 }
3494 return sum;
3495 #endif
3496 }
3497
3498 static void elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
3499 asection *sreloc, Elf_Internal_Rela *rel);
3500
3501 static void
3502 arm_elf_fill_funcdesc (bfd *output_bfd,
3503 struct bfd_link_info *info,
3504 int *funcdesc_offset,
3505 int dynindx,
3506 int offset,
3507 bfd_vma addr,
3508 bfd_vma dynreloc_value,
3509 bfd_vma seg)
3510 {
3511 if ((*funcdesc_offset & 1) == 0)
3512 {
3513 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
3514 asection *sgot = globals->root.sgot;
3515
3516 if (bfd_link_pic (info))
3517 {
3518 asection *srelgot = globals->root.srelgot;
3519 Elf_Internal_Rela outrel;
3520
3521 outrel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
3522 outrel.r_offset = sgot->output_section->vma + sgot->output_offset + offset;
3523 outrel.r_addend = 0;
3524
3525 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
3526 bfd_put_32 (output_bfd, addr, sgot->contents + offset);
3527 bfd_put_32 (output_bfd, seg, sgot->contents + offset + 4);
3528 }
3529 else
3530 {
3531 struct elf_link_hash_entry *hgot = globals->root.hgot;
3532 bfd_vma got_value = hgot->root.u.def.value
3533 + hgot->root.u.def.section->output_section->vma
3534 + hgot->root.u.def.section->output_offset;
3535
3536 arm_elf_add_rofixup (output_bfd, globals->srofixup,
3537 sgot->output_section->vma + sgot->output_offset
3538 + offset);
3539 arm_elf_add_rofixup (output_bfd, globals->srofixup,
3540 sgot->output_section->vma + sgot->output_offset
3541 + offset + 4);
3542 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + offset);
3543 bfd_put_32 (output_bfd, got_value, sgot->contents + offset + 4);
3544 }
3545 *funcdesc_offset |= 1;
3546 }
3547 }
3548
3549 /* Create an entry in an ARM ELF linker hash table. */
3550
3551 static struct bfd_hash_entry *
3552 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3553 struct bfd_hash_table * table,
3554 const char * string)
3555 {
3556 struct elf32_arm_link_hash_entry * ret =
3557 (struct elf32_arm_link_hash_entry *) entry;
3558
3559 /* Allocate the structure if it has not already been allocated by a
3560 subclass. */
3561 if (ret == NULL)
3562 ret = (struct elf32_arm_link_hash_entry *)
3563 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3564 if (ret == NULL)
3565 return (struct bfd_hash_entry *) ret;
3566
3567 /* Call the allocation method of the superclass. */
3568 ret = ((struct elf32_arm_link_hash_entry *)
3569 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3570 table, string));
3571 if (ret != NULL)
3572 {
3573 ret->tls_type = GOT_UNKNOWN;
3574 ret->tlsdesc_got = (bfd_vma) -1;
3575 ret->plt.thumb_refcount = 0;
3576 ret->plt.maybe_thumb_refcount = 0;
3577 ret->plt.noncall_refcount = 0;
3578 ret->plt.got_offset = -1;
3579 ret->is_iplt = false;
3580 ret->export_glue = NULL;
3581
3582 ret->stub_cache = NULL;
3583
3584 ret->fdpic_cnts.gotofffuncdesc_cnt = 0;
3585 ret->fdpic_cnts.gotfuncdesc_cnt = 0;
3586 ret->fdpic_cnts.funcdesc_cnt = 0;
3587 ret->fdpic_cnts.funcdesc_offset = -1;
3588 ret->fdpic_cnts.gotfuncdesc_offset = -1;
3589 }
3590
3591 return (struct bfd_hash_entry *) ret;
3592 }
3593
3594 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3595 symbols. */
3596
3597 static bool
3598 elf32_arm_allocate_local_sym_info (bfd *abfd)
3599 {
3600 if (elf_local_got_refcounts (abfd) == NULL)
3601 {
3602 bfd_size_type num_syms;
3603
3604 elf32_arm_num_entries (abfd) = 0;
3605
3606 /* Whilst it might be tempting to allocate a single block of memory and
3607 then divide it up amoungst the arrays in the elf_arm_obj_tdata
3608 structure, this interferes with the work of memory checkers looking
3609 for buffer overruns. So allocate each array individually. */
3610
3611 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3612
3613 elf_local_got_refcounts (abfd) = bfd_zalloc
3614 (abfd, num_syms * sizeof (* elf_local_got_refcounts (abfd)));
3615
3616 if (elf_local_got_refcounts (abfd) == NULL)
3617 return false;
3618
3619 elf32_arm_local_tlsdesc_gotent (abfd) = bfd_zalloc
3620 (abfd, num_syms * sizeof (* elf32_arm_local_tlsdesc_gotent (abfd)));
3621
3622 if (elf32_arm_local_tlsdesc_gotent (abfd) == NULL)
3623 return false;
3624
3625 elf32_arm_local_iplt (abfd) = bfd_zalloc
3626 (abfd, num_syms * sizeof (* elf32_arm_local_iplt (abfd)));
3627
3628 if (elf32_arm_local_iplt (abfd) == NULL)
3629 return false;
3630
3631 elf32_arm_local_fdpic_cnts (abfd) = bfd_zalloc
3632 (abfd, num_syms * sizeof (* elf32_arm_local_fdpic_cnts (abfd)));
3633
3634 if (elf32_arm_local_fdpic_cnts (abfd) == NULL)
3635 return false;
3636
3637 elf32_arm_local_got_tls_type (abfd) = bfd_zalloc
3638 (abfd, num_syms * sizeof (* elf32_arm_local_got_tls_type (abfd)));
3639
3640 if (elf32_arm_local_got_tls_type (abfd) == NULL)
3641 return false;
3642
3643 elf32_arm_num_entries (abfd) = num_syms;
3644
3645 #if GCC_VERSION >= 3000
3646 BFD_ASSERT (__alignof__ (*elf32_arm_local_tlsdesc_gotent (abfd))
3647 <= __alignof__ (*elf_local_got_refcounts (abfd)));
3648 BFD_ASSERT (__alignof__ (*elf32_arm_local_iplt (abfd))
3649 <= __alignof__ (*elf32_arm_local_tlsdesc_gotent (abfd)));
3650 BFD_ASSERT (__alignof__ (*elf32_arm_local_fdpic_cnts (abfd))
3651 <= __alignof__ (*elf32_arm_local_iplt (abfd)));
3652 BFD_ASSERT (__alignof__ (*elf32_arm_local_got_tls_type (abfd))
3653 <= __alignof__ (*elf32_arm_local_fdpic_cnts (abfd)));
3654 #endif
3655 }
3656 return true;
3657 }
3658
3659 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3660 to input bfd ABFD. Create the information if it doesn't already exist.
3661 Return null if an allocation fails. */
3662
3663 static struct arm_local_iplt_info *
3664 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3665 {
3666 struct arm_local_iplt_info **ptr;
3667
3668 if (!elf32_arm_allocate_local_sym_info (abfd))
3669 return NULL;
3670
3671 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3672 BFD_ASSERT (r_symndx < elf32_arm_num_entries (abfd));
3673 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3674 if (*ptr == NULL)
3675 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3676 return *ptr;
3677 }
3678
3679 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3680 in ABFD's symbol table. If the symbol is global, H points to its
3681 hash table entry, otherwise H is null.
3682
3683 Return true if the symbol does have PLT information. When returning
3684 true, point *ROOT_PLT at the target-independent reference count/offset
3685 union and *ARM_PLT at the ARM-specific information. */
3686
3687 static bool
3688 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3689 struct elf32_arm_link_hash_entry *h,
3690 unsigned long r_symndx, union gotplt_union **root_plt,
3691 struct arm_plt_info **arm_plt)
3692 {
3693 struct arm_local_iplt_info *local_iplt;
3694
3695 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3696 return false;
3697
3698 if (h != NULL)
3699 {
3700 *root_plt = &h->root.plt;
3701 *arm_plt = &h->plt;
3702 return true;
3703 }
3704
3705 if (elf32_arm_local_iplt (abfd) == NULL)
3706 return false;
3707
3708 if (r_symndx >= elf32_arm_num_entries (abfd))
3709 return false;
3710
3711 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3712 if (local_iplt == NULL)
3713 return false;
3714
3715 *root_plt = &local_iplt->root;
3716 *arm_plt = &local_iplt->arm;
3717 return true;
3718 }
3719
3720 static bool using_thumb_only (struct elf32_arm_link_hash_table *globals);
3721
3722 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3723 before it. */
3724
3725 static bool
3726 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3727 struct arm_plt_info *arm_plt)
3728 {
3729 struct elf32_arm_link_hash_table *htab;
3730
3731 htab = elf32_arm_hash_table (info);
3732
3733 return (!using_thumb_only (htab) && (arm_plt->thumb_refcount != 0
3734 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0)));
3735 }
3736
3737 /* Return a pointer to the head of the dynamic reloc list that should
3738 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3739 ABFD's symbol table. Return null if an error occurs. */
3740
3741 static struct elf_dyn_relocs **
3742 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3743 Elf_Internal_Sym *isym)
3744 {
3745 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3746 {
3747 struct arm_local_iplt_info *local_iplt;
3748
3749 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3750 if (local_iplt == NULL)
3751 return NULL;
3752 return &local_iplt->dyn_relocs;
3753 }
3754 else
3755 {
3756 /* Track dynamic relocs needed for local syms too.
3757 We really need local syms available to do this
3758 easily. Oh well. */
3759 asection *s;
3760 void *vpp;
3761
3762 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3763 if (s == NULL)
3764 return NULL;
3765
3766 vpp = &elf_section_data (s)->local_dynrel;
3767 return (struct elf_dyn_relocs **) vpp;
3768 }
3769 }
3770
3771 /* Initialize an entry in the stub hash table. */
3772
3773 static struct bfd_hash_entry *
3774 stub_hash_newfunc (struct bfd_hash_entry *entry,
3775 struct bfd_hash_table *table,
3776 const char *string)
3777 {
3778 /* Allocate the structure if it has not already been allocated by a
3779 subclass. */
3780 if (entry == NULL)
3781 {
3782 entry = (struct bfd_hash_entry *)
3783 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3784 if (entry == NULL)
3785 return entry;
3786 }
3787
3788 /* Call the allocation method of the superclass. */
3789 entry = bfd_hash_newfunc (entry, table, string);
3790 if (entry != NULL)
3791 {
3792 struct elf32_arm_stub_hash_entry *eh;
3793
3794 /* Initialize the local fields. */
3795 eh = (struct elf32_arm_stub_hash_entry *) entry;
3796 eh->stub_sec = NULL;
3797 eh->stub_offset = (bfd_vma) -1;
3798 eh->source_value = 0;
3799 eh->target_value = 0;
3800 eh->target_section = NULL;
3801 eh->orig_insn = 0;
3802 eh->stub_type = arm_stub_none;
3803 eh->stub_size = 0;
3804 eh->stub_template = NULL;
3805 eh->stub_template_size = -1;
3806 eh->h = NULL;
3807 eh->id_sec = NULL;
3808 eh->output_name = NULL;
3809 }
3810
3811 return entry;
3812 }
3813
3814 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3815 shortcuts to them in our hash table. */
3816
3817 static bool
3818 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3819 {
3820 struct elf32_arm_link_hash_table *htab;
3821
3822 htab = elf32_arm_hash_table (info);
3823 if (htab == NULL)
3824 return false;
3825
3826 if (! _bfd_elf_create_got_section (dynobj, info))
3827 return false;
3828
3829 /* Also create .rofixup. */
3830 if (htab->fdpic_p)
3831 {
3832 htab->srofixup = bfd_make_section_with_flags (dynobj, ".rofixup",
3833 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3834 | SEC_IN_MEMORY | SEC_LINKER_CREATED | SEC_READONLY));
3835 if (htab->srofixup == NULL
3836 || !bfd_set_section_alignment (htab->srofixup, 2))
3837 return false;
3838 }
3839
3840 return true;
3841 }
3842
3843 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3844
3845 static bool
3846 create_ifunc_sections (struct bfd_link_info *info)
3847 {
3848 struct elf32_arm_link_hash_table *htab;
3849 const struct elf_backend_data *bed;
3850 bfd *dynobj;
3851 asection *s;
3852 flagword flags;
3853
3854 htab = elf32_arm_hash_table (info);
3855 dynobj = htab->root.dynobj;
3856 bed = get_elf_backend_data (dynobj);
3857 flags = bed->dynamic_sec_flags;
3858
3859 if (htab->root.iplt == NULL)
3860 {
3861 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3862 flags | SEC_READONLY | SEC_CODE);
3863 if (s == NULL
3864 || !bfd_set_section_alignment (s, bed->plt_alignment))
3865 return false;
3866 htab->root.iplt = s;
3867 }
3868
3869 if (htab->root.irelplt == NULL)
3870 {
3871 s = bfd_make_section_anyway_with_flags (dynobj,
3872 RELOC_SECTION (htab, ".iplt"),
3873 flags | SEC_READONLY);
3874 if (s == NULL
3875 || !bfd_set_section_alignment (s, bed->s->log_file_align))
3876 return false;
3877 htab->root.irelplt = s;
3878 }
3879
3880 if (htab->root.igotplt == NULL)
3881 {
3882 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3883 if (s == NULL
3884 || !bfd_set_section_alignment (s, bed->s->log_file_align))
3885 return false;
3886 htab->root.igotplt = s;
3887 }
3888 return true;
3889 }
3890
3891 /* Determine if we're dealing with a Thumb only architecture. */
3892
3893 static bool
3894 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3895 {
3896 int arch;
3897 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3898 Tag_CPU_arch_profile);
3899
3900 if (profile)
3901 return profile == 'M';
3902
3903 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3904
3905 /* Force return logic to be reviewed for each new architecture. */
3906 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3907
3908 if (arch == TAG_CPU_ARCH_V6_M
3909 || arch == TAG_CPU_ARCH_V6S_M
3910 || arch == TAG_CPU_ARCH_V7E_M
3911 || arch == TAG_CPU_ARCH_V8M_BASE
3912 || arch == TAG_CPU_ARCH_V8M_MAIN
3913 || arch == TAG_CPU_ARCH_V8_1M_MAIN)
3914 return true;
3915
3916 return false;
3917 }
3918
3919 /* Determine if we're dealing with a Thumb-2 object. */
3920
3921 static bool
3922 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3923 {
3924 int arch;
3925 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3926 Tag_THUMB_ISA_use);
3927
3928 /* No use of thumb permitted, or a legacy thumb-1/2 definition. */
3929 if (thumb_isa < 3)
3930 return thumb_isa == 2;
3931
3932 /* Variant of thumb is described by the architecture tag. */
3933 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3934
3935 /* Force return logic to be reviewed for each new architecture. */
3936 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3937
3938 return (arch == TAG_CPU_ARCH_V6T2
3939 || arch == TAG_CPU_ARCH_V7
3940 || arch == TAG_CPU_ARCH_V7E_M
3941 || arch == TAG_CPU_ARCH_V8
3942 || arch == TAG_CPU_ARCH_V8R
3943 || arch == TAG_CPU_ARCH_V8M_MAIN
3944 || arch == TAG_CPU_ARCH_V8_1M_MAIN);
3945 }
3946
3947 /* Determine whether Thumb-2 BL instruction is available. */
3948
3949 static bool
3950 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3951 {
3952 int arch =
3953 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3954
3955 /* Force return logic to be reviewed for each new architecture. */
3956 BFD_ASSERT (arch <= TAG_CPU_ARCH_V9);
3957
3958 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3959 return (arch == TAG_CPU_ARCH_V6T2
3960 || arch >= TAG_CPU_ARCH_V7);
3961 }
3962
3963 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3964 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3965 hash table. */
3966
3967 static bool
3968 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3969 {
3970 struct elf32_arm_link_hash_table *htab;
3971
3972 htab = elf32_arm_hash_table (info);
3973 if (htab == NULL)
3974 return false;
3975
3976 if (!htab->root.sgot && !create_got_section (dynobj, info))
3977 return false;
3978
3979 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3980 return false;
3981
3982 if (htab->root.target_os == is_vxworks)
3983 {
3984 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3985 return false;
3986
3987 if (bfd_link_pic (info))
3988 {
3989 htab->plt_header_size = 0;
3990 htab->plt_entry_size
3991 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3992 }
3993 else
3994 {
3995 htab->plt_header_size
3996 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3997 htab->plt_entry_size
3998 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3999 }
4000
4001 if (elf_elfheader (dynobj))
4002 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
4003 }
4004 else
4005 {
4006 /* PR ld/16017
4007 Test for thumb only architectures. Note - we cannot just call
4008 using_thumb_only() as the attributes in the output bfd have not been
4009 initialised at this point, so instead we use the input bfd. */
4010 bfd * saved_obfd = htab->obfd;
4011
4012 htab->obfd = dynobj;
4013 if (using_thumb_only (htab))
4014 {
4015 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
4016 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
4017 }
4018 htab->obfd = saved_obfd;
4019 }
4020
4021 if (htab->fdpic_p) {
4022 htab->plt_header_size = 0;
4023 if (info->flags & DF_BIND_NOW)
4024 htab->plt_entry_size = 4 * (ARRAY_SIZE (elf32_arm_fdpic_plt_entry) - 5);
4025 else
4026 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_fdpic_plt_entry);
4027 }
4028
4029 if (!htab->root.splt
4030 || !htab->root.srelplt
4031 || !htab->root.sdynbss
4032 || (!bfd_link_pic (info) && !htab->root.srelbss))
4033 abort ();
4034
4035 return true;
4036 }
4037
4038 /* Copy the extra info we tack onto an elf_link_hash_entry. */
4039
4040 static void
4041 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
4042 struct elf_link_hash_entry *dir,
4043 struct elf_link_hash_entry *ind)
4044 {
4045 struct elf32_arm_link_hash_entry *edir, *eind;
4046
4047 edir = (struct elf32_arm_link_hash_entry *) dir;
4048 eind = (struct elf32_arm_link_hash_entry *) ind;
4049
4050 if (ind->root.type == bfd_link_hash_indirect)
4051 {
4052 /* Copy over PLT info. */
4053 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
4054 eind->plt.thumb_refcount = 0;
4055 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
4056 eind->plt.maybe_thumb_refcount = 0;
4057 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
4058 eind->plt.noncall_refcount = 0;
4059
4060 /* Copy FDPIC counters. */
4061 edir->fdpic_cnts.gotofffuncdesc_cnt += eind->fdpic_cnts.gotofffuncdesc_cnt;
4062 edir->fdpic_cnts.gotfuncdesc_cnt += eind->fdpic_cnts.gotfuncdesc_cnt;
4063 edir->fdpic_cnts.funcdesc_cnt += eind->fdpic_cnts.funcdesc_cnt;
4064
4065 /* We should only allocate a function to .iplt once the final
4066 symbol information is known. */
4067 BFD_ASSERT (!eind->is_iplt);
4068
4069 if (dir->got.refcount <= 0)
4070 {
4071 edir->tls_type = eind->tls_type;
4072 eind->tls_type = GOT_UNKNOWN;
4073 }
4074 }
4075
4076 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
4077 }
4078
4079 /* Destroy an ARM elf linker hash table. */
4080
4081 static void
4082 elf32_arm_link_hash_table_free (bfd *obfd)
4083 {
4084 struct elf32_arm_link_hash_table *ret
4085 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
4086
4087 bfd_hash_table_free (&ret->stub_hash_table);
4088 _bfd_elf_link_hash_table_free (obfd);
4089 }
4090
4091 /* Create an ARM elf linker hash table. */
4092
4093 static struct bfd_link_hash_table *
4094 elf32_arm_link_hash_table_create (bfd *abfd)
4095 {
4096 struct elf32_arm_link_hash_table *ret;
4097 size_t amt = sizeof (struct elf32_arm_link_hash_table);
4098
4099 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
4100 if (ret == NULL)
4101 return NULL;
4102
4103 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
4104 elf32_arm_link_hash_newfunc,
4105 sizeof (struct elf32_arm_link_hash_entry),
4106 ARM_ELF_DATA))
4107 {
4108 free (ret);
4109 return NULL;
4110 }
4111
4112 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
4113 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
4114 #ifdef FOUR_WORD_PLT
4115 ret->plt_header_size = 16;
4116 ret->plt_entry_size = 16;
4117 #else
4118 ret->plt_header_size = 20;
4119 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
4120 #endif
4121 ret->use_rel = true;
4122 ret->obfd = abfd;
4123 ret->fdpic_p = 0;
4124
4125 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
4126 sizeof (struct elf32_arm_stub_hash_entry)))
4127 {
4128 _bfd_elf_link_hash_table_free (abfd);
4129 return NULL;
4130 }
4131 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
4132
4133 return &ret->root.root;
4134 }
4135
4136 /* Determine what kind of NOPs are available. */
4137
4138 static bool
4139 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
4140 {
4141 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4142 Tag_CPU_arch);
4143
4144 /* Force return logic to be reviewed for each new architecture. */
4145 BFD_ASSERT (arch <= TAG_CPU_ARCH_V9);
4146
4147 return (arch == TAG_CPU_ARCH_V6T2
4148 || arch == TAG_CPU_ARCH_V6K
4149 || arch == TAG_CPU_ARCH_V7
4150 || arch == TAG_CPU_ARCH_V8
4151 || arch == TAG_CPU_ARCH_V8R
4152 || arch == TAG_CPU_ARCH_V9);
4153 }
4154
4155 static bool
4156 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
4157 {
4158 switch (stub_type)
4159 {
4160 case arm_stub_long_branch_thumb_only:
4161 case arm_stub_long_branch_thumb2_only:
4162 case arm_stub_long_branch_thumb2_only_pure:
4163 case arm_stub_long_branch_v4t_thumb_arm:
4164 case arm_stub_short_branch_v4t_thumb_arm:
4165 case arm_stub_long_branch_v4t_thumb_arm_pic:
4166 case arm_stub_long_branch_v4t_thumb_tls_pic:
4167 case arm_stub_long_branch_thumb_only_pic:
4168 case arm_stub_cmse_branch_thumb_only:
4169 return true;
4170 case arm_stub_none:
4171 BFD_FAIL ();
4172 return false;
4173 break;
4174 default:
4175 return false;
4176 }
4177 }
4178
4179 /* Determine the type of stub needed, if any, for a call. */
4180
4181 static enum elf32_arm_stub_type
4182 arm_type_of_stub (struct bfd_link_info *info,
4183 asection *input_sec,
4184 const Elf_Internal_Rela *rel,
4185 unsigned char st_type,
4186 enum arm_st_branch_type *actual_branch_type,
4187 struct elf32_arm_link_hash_entry *hash,
4188 bfd_vma destination,
4189 asection *sym_sec,
4190 bfd *input_bfd,
4191 const char *name)
4192 {
4193 bfd_vma location;
4194 bfd_signed_vma branch_offset;
4195 unsigned int r_type;
4196 struct elf32_arm_link_hash_table * globals;
4197 bool thumb2, thumb2_bl, thumb_only;
4198 enum elf32_arm_stub_type stub_type = arm_stub_none;
4199 int use_plt = 0;
4200 enum arm_st_branch_type branch_type = *actual_branch_type;
4201 union gotplt_union *root_plt;
4202 struct arm_plt_info *arm_plt;
4203 int arch;
4204 int thumb2_movw;
4205
4206 if (branch_type == ST_BRANCH_LONG)
4207 return stub_type;
4208
4209 globals = elf32_arm_hash_table (info);
4210 if (globals == NULL)
4211 return stub_type;
4212
4213 thumb_only = using_thumb_only (globals);
4214 thumb2 = using_thumb2 (globals);
4215 thumb2_bl = using_thumb2_bl (globals);
4216
4217 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
4218
4219 /* True for architectures that implement the thumb2 movw instruction. */
4220 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
4221
4222 /* Determine where the call point is. */
4223 location = (input_sec->output_offset
4224 + input_sec->output_section->vma
4225 + rel->r_offset);
4226
4227 r_type = ELF32_R_TYPE (rel->r_info);
4228
4229 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4230 are considering a function call relocation. */
4231 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4232 || r_type == R_ARM_THM_JUMP19)
4233 && branch_type == ST_BRANCH_TO_ARM)
4234 branch_type = ST_BRANCH_TO_THUMB;
4235
4236 /* For TLS call relocs, it is the caller's responsibility to provide
4237 the address of the appropriate trampoline. */
4238 if (r_type != R_ARM_TLS_CALL
4239 && r_type != R_ARM_THM_TLS_CALL
4240 && elf32_arm_get_plt_info (input_bfd, globals, hash,
4241 ELF32_R_SYM (rel->r_info), &root_plt,
4242 &arm_plt)
4243 && root_plt->offset != (bfd_vma) -1)
4244 {
4245 asection *splt;
4246
4247 if (hash == NULL || hash->is_iplt)
4248 splt = globals->root.iplt;
4249 else
4250 splt = globals->root.splt;
4251 if (splt != NULL)
4252 {
4253 use_plt = 1;
4254
4255 /* Note when dealing with PLT entries: the main PLT stub is in
4256 ARM mode, so if the branch is in Thumb mode, another
4257 Thumb->ARM stub will be inserted later just before the ARM
4258 PLT stub. If a long branch stub is needed, we'll add a
4259 Thumb->Arm one and branch directly to the ARM PLT entry.
4260 Here, we have to check if a pre-PLT Thumb->ARM stub
4261 is needed and if it will be close enough. */
4262
4263 destination = (splt->output_section->vma
4264 + splt->output_offset
4265 + root_plt->offset);
4266 st_type = STT_FUNC;
4267
4268 /* Thumb branch/call to PLT: it can become a branch to ARM
4269 or to Thumb. We must perform the same checks and
4270 corrections as in elf32_arm_final_link_relocate. */
4271 if ((r_type == R_ARM_THM_CALL)
4272 || (r_type == R_ARM_THM_JUMP24))
4273 {
4274 if (globals->use_blx
4275 && r_type == R_ARM_THM_CALL
4276 && !thumb_only)
4277 {
4278 /* If the Thumb BLX instruction is available, convert
4279 the BL to a BLX instruction to call the ARM-mode
4280 PLT entry. */
4281 branch_type = ST_BRANCH_TO_ARM;
4282 }
4283 else
4284 {
4285 if (!thumb_only)
4286 /* Target the Thumb stub before the ARM PLT entry. */
4287 destination -= PLT_THUMB_STUB_SIZE;
4288 branch_type = ST_BRANCH_TO_THUMB;
4289 }
4290 }
4291 else
4292 {
4293 branch_type = ST_BRANCH_TO_ARM;
4294 }
4295 }
4296 }
4297 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4298 BFD_ASSERT (st_type != STT_GNU_IFUNC);
4299
4300 branch_offset = (bfd_signed_vma)(destination - location);
4301
4302 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4303 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
4304 {
4305 /* Handle cases where:
4306 - this call goes too far (different Thumb/Thumb2 max
4307 distance)
4308 - it's a Thumb->Arm call and blx is not available, or it's a
4309 Thumb->Arm branch (not bl). A stub is needed in this case,
4310 but only if this call is not through a PLT entry. Indeed,
4311 PLT stubs handle mode switching already. */
4312 if ((!thumb2_bl
4313 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4314 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4315 || (thumb2_bl
4316 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4317 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4318 || (thumb2
4319 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4320 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4321 && (r_type == R_ARM_THM_JUMP19))
4322 || (branch_type == ST_BRANCH_TO_ARM
4323 && (((r_type == R_ARM_THM_CALL
4324 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4325 || (r_type == R_ARM_THM_JUMP24)
4326 || (r_type == R_ARM_THM_JUMP19))
4327 && !use_plt))
4328 {
4329 /* If we need to insert a Thumb-Thumb long branch stub to a
4330 PLT, use one that branches directly to the ARM PLT
4331 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4332 stub, undo this now. */
4333 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4334 {
4335 branch_type = ST_BRANCH_TO_ARM;
4336 branch_offset += PLT_THUMB_STUB_SIZE;
4337 }
4338
4339 if (branch_type == ST_BRANCH_TO_THUMB)
4340 {
4341 /* Thumb to thumb. */
4342 if (!thumb_only)
4343 {
4344 if (input_sec->flags & SEC_ELF_PURECODE)
4345 _bfd_error_handler
4346 (_("%pB(%pA): warning: long branch veneers used in"
4347 " section with SHF_ARM_PURECODE section"
4348 " attribute is only supported for M-profile"
4349 " targets that implement the movw instruction"),
4350 input_bfd, input_sec);
4351
4352 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4353 /* PIC stubs. */
4354 ? ((globals->use_blx
4355 && (r_type == R_ARM_THM_CALL))
4356 /* V5T and above. Stub starts with ARM code, so
4357 we must be able to switch mode before
4358 reaching it, which is only possible for 'bl'
4359 (ie R_ARM_THM_CALL relocation). */
4360 ? arm_stub_long_branch_any_thumb_pic
4361 /* On V4T, use Thumb code only. */
4362 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4363
4364 /* non-PIC stubs. */
4365 : ((globals->use_blx
4366 && (r_type == R_ARM_THM_CALL))
4367 /* V5T and above. */
4368 ? arm_stub_long_branch_any_any
4369 /* V4T. */
4370 : arm_stub_long_branch_v4t_thumb_thumb);
4371 }
4372 else
4373 {
4374 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4375 stub_type = arm_stub_long_branch_thumb2_only_pure;
4376 else
4377 {
4378 if (input_sec->flags & SEC_ELF_PURECODE)
4379 _bfd_error_handler
4380 (_("%pB(%pA): warning: long branch veneers used in"
4381 " section with SHF_ARM_PURECODE section"
4382 " attribute is only supported for M-profile"
4383 " targets that implement the movw instruction"),
4384 input_bfd, input_sec);
4385
4386 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4387 /* PIC stub. */
4388 ? arm_stub_long_branch_thumb_only_pic
4389 /* non-PIC stub. */
4390 : (thumb2 ? arm_stub_long_branch_thumb2_only
4391 : arm_stub_long_branch_thumb_only);
4392 }
4393 }
4394 }
4395 else
4396 {
4397 if (input_sec->flags & SEC_ELF_PURECODE)
4398 _bfd_error_handler
4399 (_("%pB(%pA): warning: long branch veneers used in"
4400 " section with SHF_ARM_PURECODE section"
4401 " attribute is only supported" " for M-profile"
4402 " targets that implement the movw instruction"),
4403 input_bfd, input_sec);
4404
4405 /* Thumb to arm. */
4406 if (sym_sec != NULL
4407 && sym_sec->owner != NULL
4408 && !INTERWORK_FLAG (sym_sec->owner))
4409 {
4410 _bfd_error_handler
4411 (_("%pB(%s): warning: interworking not enabled;"
4412 " first occurrence: %pB: %s call to %s"),
4413 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
4414 }
4415
4416 stub_type =
4417 (bfd_link_pic (info) | globals->pic_veneer)
4418 /* PIC stubs. */
4419 ? (r_type == R_ARM_THM_TLS_CALL
4420 /* TLS PIC stubs. */
4421 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4422 : arm_stub_long_branch_v4t_thumb_tls_pic)
4423 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4424 /* V5T PIC and above. */
4425 ? arm_stub_long_branch_any_arm_pic
4426 /* V4T PIC stub. */
4427 : arm_stub_long_branch_v4t_thumb_arm_pic))
4428
4429 /* non-PIC stubs. */
4430 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4431 /* V5T and above. */
4432 ? arm_stub_long_branch_any_any
4433 /* V4T. */
4434 : arm_stub_long_branch_v4t_thumb_arm);
4435
4436 /* Handle v4t short branches. */
4437 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4438 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4439 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4440 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4441 }
4442 }
4443 }
4444 else if (r_type == R_ARM_CALL
4445 || r_type == R_ARM_JUMP24
4446 || r_type == R_ARM_PLT32
4447 || r_type == R_ARM_TLS_CALL)
4448 {
4449 if (input_sec->flags & SEC_ELF_PURECODE)
4450 _bfd_error_handler
4451 (_("%pB(%pA): warning: long branch veneers used in"
4452 " section with SHF_ARM_PURECODE section"
4453 " attribute is only supported for M-profile"
4454 " targets that implement the movw instruction"),
4455 input_bfd, input_sec);
4456 if (branch_type == ST_BRANCH_TO_THUMB)
4457 {
4458 /* Arm to thumb. */
4459
4460 if (sym_sec != NULL
4461 && sym_sec->owner != NULL
4462 && !INTERWORK_FLAG (sym_sec->owner))
4463 {
4464 _bfd_error_handler
4465 (_("%pB(%s): warning: interworking not enabled;"
4466 " first occurrence: %pB: %s call to %s"),
4467 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
4468 }
4469
4470 /* We have an extra 2-bytes reach because of
4471 the mode change (bit 24 (H) of BLX encoding). */
4472 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4473 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4474 || (r_type == R_ARM_CALL && !globals->use_blx)
4475 || (r_type == R_ARM_JUMP24)
4476 || (r_type == R_ARM_PLT32))
4477 {
4478 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4479 /* PIC stubs. */
4480 ? ((globals->use_blx)
4481 /* V5T and above. */
4482 ? arm_stub_long_branch_any_thumb_pic
4483 /* V4T stub. */
4484 : arm_stub_long_branch_v4t_arm_thumb_pic)
4485
4486 /* non-PIC stubs. */
4487 : ((globals->use_blx)
4488 /* V5T and above. */
4489 ? arm_stub_long_branch_any_any
4490 /* V4T. */
4491 : arm_stub_long_branch_v4t_arm_thumb);
4492 }
4493 }
4494 else
4495 {
4496 /* Arm to arm. */
4497 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4498 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4499 {
4500 stub_type =
4501 (bfd_link_pic (info) | globals->pic_veneer)
4502 /* PIC stubs. */
4503 ? (r_type == R_ARM_TLS_CALL
4504 /* TLS PIC Stub. */
4505 ? arm_stub_long_branch_any_tls_pic
4506 : (globals->root.target_os == is_nacl
4507 ? arm_stub_long_branch_arm_nacl_pic
4508 : arm_stub_long_branch_any_arm_pic))
4509 /* non-PIC stubs. */
4510 : (globals->root.target_os == is_nacl
4511 ? arm_stub_long_branch_arm_nacl
4512 : arm_stub_long_branch_any_any);
4513 }
4514 }
4515 }
4516
4517 /* If a stub is needed, record the actual destination type. */
4518 if (stub_type != arm_stub_none)
4519 *actual_branch_type = branch_type;
4520
4521 return stub_type;
4522 }
4523
4524 /* Build a name for an entry in the stub hash table. */
4525
4526 static char *
4527 elf32_arm_stub_name (const asection *input_section,
4528 const asection *sym_sec,
4529 const struct elf32_arm_link_hash_entry *hash,
4530 const Elf_Internal_Rela *rel,
4531 enum elf32_arm_stub_type stub_type)
4532 {
4533 char *stub_name;
4534 bfd_size_type len;
4535
4536 if (hash)
4537 {
4538 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4539 stub_name = (char *) bfd_malloc (len);
4540 if (stub_name != NULL)
4541 sprintf (stub_name, "%08x_%s+%x_%d",
4542 input_section->id & 0xffffffff,
4543 hash->root.root.root.string,
4544 (int) rel->r_addend & 0xffffffff,
4545 (int) stub_type);
4546 }
4547 else
4548 {
4549 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4550 stub_name = (char *) bfd_malloc (len);
4551 if (stub_name != NULL)
4552 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4553 input_section->id & 0xffffffff,
4554 sym_sec->id & 0xffffffff,
4555 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4556 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4557 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4558 (int) rel->r_addend & 0xffffffff,
4559 (int) stub_type);
4560 }
4561
4562 return stub_name;
4563 }
4564
4565 /* Look up an entry in the stub hash. Stub entries are cached because
4566 creating the stub name takes a bit of time. */
4567
4568 static struct elf32_arm_stub_hash_entry *
4569 elf32_arm_get_stub_entry (const asection *input_section,
4570 const asection *sym_sec,
4571 struct elf_link_hash_entry *hash,
4572 const Elf_Internal_Rela *rel,
4573 struct elf32_arm_link_hash_table *htab,
4574 enum elf32_arm_stub_type stub_type)
4575 {
4576 struct elf32_arm_stub_hash_entry *stub_entry;
4577 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4578 const asection *id_sec;
4579
4580 if ((input_section->flags & SEC_CODE) == 0)
4581 return NULL;
4582
4583 /* If the input section is the CMSE stubs one and it needs a long
4584 branch stub to reach it's final destination, give up with an
4585 error message: this is not supported. See PR ld/24709. */
4586 if (!strncmp (input_section->name, CMSE_STUB_NAME, strlen (CMSE_STUB_NAME)))
4587 {
4588 bfd *output_bfd = htab->obfd;
4589 asection *out_sec = bfd_get_section_by_name (output_bfd, CMSE_STUB_NAME);
4590
4591 _bfd_error_handler (_("ERROR: CMSE stub (%s section) too far "
4592 "(%#" PRIx64 ") from destination (%#" PRIx64 ")"),
4593 CMSE_STUB_NAME,
4594 (uint64_t)out_sec->output_section->vma
4595 + out_sec->output_offset,
4596 (uint64_t)sym_sec->output_section->vma
4597 + sym_sec->output_offset
4598 + h->root.root.u.def.value);
4599 /* Exit, rather than leave incompletely processed
4600 relocations. */
4601 xexit (1);
4602 }
4603
4604 /* If this input section is part of a group of sections sharing one
4605 stub section, then use the id of the first section in the group.
4606 Stub names need to include a section id, as there may well be
4607 more than one stub used to reach say, printf, and we need to
4608 distinguish between them. */
4609 BFD_ASSERT (input_section->id <= htab->top_id);
4610 id_sec = htab->stub_group[input_section->id].link_sec;
4611
4612 if (h != NULL && h->stub_cache != NULL
4613 && h->stub_cache->h == h
4614 && h->stub_cache->id_sec == id_sec
4615 && h->stub_cache->stub_type == stub_type)
4616 {
4617 stub_entry = h->stub_cache;
4618 }
4619 else
4620 {
4621 char *stub_name;
4622
4623 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4624 if (stub_name == NULL)
4625 return NULL;
4626
4627 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4628 stub_name, false, false);
4629 if (h != NULL)
4630 h->stub_cache = stub_entry;
4631
4632 free (stub_name);
4633 }
4634
4635 return stub_entry;
4636 }
4637
4638 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4639 section. */
4640
4641 static bool
4642 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4643 {
4644 if (stub_type >= max_stub_type)
4645 abort (); /* Should be unreachable. */
4646
4647 switch (stub_type)
4648 {
4649 case arm_stub_cmse_branch_thumb_only:
4650 return true;
4651
4652 default:
4653 return false;
4654 }
4655
4656 abort (); /* Should be unreachable. */
4657 }
4658
4659 /* Required alignment (as a power of 2) for the dedicated section holding
4660 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4661 with input sections. */
4662
4663 static int
4664 arm_dedicated_stub_output_section_required_alignment
4665 (enum elf32_arm_stub_type stub_type)
4666 {
4667 if (stub_type >= max_stub_type)
4668 abort (); /* Should be unreachable. */
4669
4670 switch (stub_type)
4671 {
4672 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4673 boundary. */
4674 case arm_stub_cmse_branch_thumb_only:
4675 return 5;
4676
4677 default:
4678 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4679 return 0;
4680 }
4681
4682 abort (); /* Should be unreachable. */
4683 }
4684
4685 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4686 NULL if veneers of this type are interspersed with input sections. */
4687
4688 static const char *
4689 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4690 {
4691 if (stub_type >= max_stub_type)
4692 abort (); /* Should be unreachable. */
4693
4694 switch (stub_type)
4695 {
4696 case arm_stub_cmse_branch_thumb_only:
4697 return CMSE_STUB_NAME;
4698
4699 default:
4700 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4701 return NULL;
4702 }
4703
4704 abort (); /* Should be unreachable. */
4705 }
4706
4707 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4708 returns the address of the hash table field in HTAB holding a pointer to the
4709 corresponding input section. Otherwise, returns NULL. */
4710
4711 static asection **
4712 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4713 enum elf32_arm_stub_type stub_type)
4714 {
4715 if (stub_type >= max_stub_type)
4716 abort (); /* Should be unreachable. */
4717
4718 switch (stub_type)
4719 {
4720 case arm_stub_cmse_branch_thumb_only:
4721 return &htab->cmse_stub_sec;
4722
4723 default:
4724 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4725 return NULL;
4726 }
4727
4728 abort (); /* Should be unreachable. */
4729 }
4730
4731 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4732 is the section that branch into veneer and can be NULL if stub should go in
4733 a dedicated output section. Returns a pointer to the stub section, and the
4734 section to which the stub section will be attached (in *LINK_SEC_P).
4735 LINK_SEC_P may be NULL. */
4736
4737 static asection *
4738 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4739 struct elf32_arm_link_hash_table *htab,
4740 enum elf32_arm_stub_type stub_type)
4741 {
4742 asection *link_sec, *out_sec, **stub_sec_p;
4743 const char *stub_sec_prefix;
4744 bool dedicated_output_section =
4745 arm_dedicated_stub_output_section_required (stub_type);
4746 int align;
4747
4748 if (dedicated_output_section)
4749 {
4750 bfd *output_bfd = htab->obfd;
4751 const char *out_sec_name =
4752 arm_dedicated_stub_output_section_name (stub_type);
4753 link_sec = NULL;
4754 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4755 stub_sec_prefix = out_sec_name;
4756 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4757 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4758 if (out_sec == NULL)
4759 {
4760 _bfd_error_handler (_("no address assigned to the veneers output "
4761 "section %s"), out_sec_name);
4762 return NULL;
4763 }
4764 }
4765 else
4766 {
4767 BFD_ASSERT (section->id <= htab->top_id);
4768 link_sec = htab->stub_group[section->id].link_sec;
4769 BFD_ASSERT (link_sec != NULL);
4770 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4771 if (*stub_sec_p == NULL)
4772 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4773 stub_sec_prefix = link_sec->name;
4774 out_sec = link_sec->output_section;
4775 align = htab->root.target_os == is_nacl ? 4 : 3;
4776 }
4777
4778 if (*stub_sec_p == NULL)
4779 {
4780 size_t namelen;
4781 bfd_size_type len;
4782 char *s_name;
4783
4784 namelen = strlen (stub_sec_prefix);
4785 len = namelen + sizeof (STUB_SUFFIX);
4786 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4787 if (s_name == NULL)
4788 return NULL;
4789
4790 memcpy (s_name, stub_sec_prefix, namelen);
4791 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4792 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4793 align);
4794 if (*stub_sec_p == NULL)
4795 return NULL;
4796
4797 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4798 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4799 | SEC_KEEP;
4800 }
4801
4802 if (!dedicated_output_section)
4803 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4804
4805 if (link_sec_p)
4806 *link_sec_p = link_sec;
4807
4808 return *stub_sec_p;
4809 }
4810
4811 /* Add a new stub entry to the stub hash. Not all fields of the new
4812 stub entry are initialised. */
4813
4814 static struct elf32_arm_stub_hash_entry *
4815 elf32_arm_add_stub (const char *stub_name, asection *section,
4816 struct elf32_arm_link_hash_table *htab,
4817 enum elf32_arm_stub_type stub_type)
4818 {
4819 asection *link_sec;
4820 asection *stub_sec;
4821 struct elf32_arm_stub_hash_entry *stub_entry;
4822
4823 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4824 stub_type);
4825 if (stub_sec == NULL)
4826 return NULL;
4827
4828 /* Enter this entry into the linker stub hash table. */
4829 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4830 true, false);
4831 if (stub_entry == NULL)
4832 {
4833 if (section == NULL)
4834 section = stub_sec;
4835 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4836 section->owner, stub_name);
4837 return NULL;
4838 }
4839
4840 stub_entry->stub_sec = stub_sec;
4841 stub_entry->stub_offset = (bfd_vma) -1;
4842 stub_entry->id_sec = link_sec;
4843
4844 return stub_entry;
4845 }
4846
4847 /* Store an Arm insn into an output section not processed by
4848 elf32_arm_write_section. */
4849
4850 static void
4851 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4852 bfd * output_bfd, bfd_vma val, void * ptr)
4853 {
4854 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4855 bfd_putl32 (val, ptr);
4856 else
4857 bfd_putb32 (val, ptr);
4858 }
4859
4860 /* Store a 16-bit Thumb insn into an output section not processed by
4861 elf32_arm_write_section. */
4862
4863 static void
4864 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4865 bfd * output_bfd, bfd_vma val, void * ptr)
4866 {
4867 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4868 bfd_putl16 (val, ptr);
4869 else
4870 bfd_putb16 (val, ptr);
4871 }
4872
4873 /* Store a Thumb2 insn into an output section not processed by
4874 elf32_arm_write_section. */
4875
4876 static void
4877 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4878 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4879 {
4880 /* T2 instructions are 16-bit streamed. */
4881 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4882 {
4883 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4884 bfd_putl16 ((val & 0xffff), ptr + 2);
4885 }
4886 else
4887 {
4888 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4889 bfd_putb16 ((val & 0xffff), ptr + 2);
4890 }
4891 }
4892
4893 /* If it's possible to change R_TYPE to a more efficient access
4894 model, return the new reloc type. */
4895
4896 static unsigned
4897 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4898 struct elf_link_hash_entry *h)
4899 {
4900 int is_local = (h == NULL);
4901
4902 if (bfd_link_dll (info)
4903 || (h && h->root.type == bfd_link_hash_undefweak))
4904 return r_type;
4905
4906 /* We do not support relaxations for Old TLS models. */
4907 switch (r_type)
4908 {
4909 case R_ARM_TLS_GOTDESC:
4910 case R_ARM_TLS_CALL:
4911 case R_ARM_THM_TLS_CALL:
4912 case R_ARM_TLS_DESCSEQ:
4913 case R_ARM_THM_TLS_DESCSEQ:
4914 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4915 }
4916
4917 return r_type;
4918 }
4919
4920 static bfd_reloc_status_type elf32_arm_final_link_relocate
4921 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4922 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4923 const char *, unsigned char, enum arm_st_branch_type,
4924 struct elf_link_hash_entry *, bool *, char **);
4925
4926 static unsigned int
4927 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4928 {
4929 switch (stub_type)
4930 {
4931 case arm_stub_a8_veneer_b_cond:
4932 case arm_stub_a8_veneer_b:
4933 case arm_stub_a8_veneer_bl:
4934 return 2;
4935
4936 case arm_stub_long_branch_any_any:
4937 case arm_stub_long_branch_v4t_arm_thumb:
4938 case arm_stub_long_branch_thumb_only:
4939 case arm_stub_long_branch_thumb2_only:
4940 case arm_stub_long_branch_thumb2_only_pure:
4941 case arm_stub_long_branch_v4t_thumb_thumb:
4942 case arm_stub_long_branch_v4t_thumb_arm:
4943 case arm_stub_short_branch_v4t_thumb_arm:
4944 case arm_stub_long_branch_any_arm_pic:
4945 case arm_stub_long_branch_any_thumb_pic:
4946 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4947 case arm_stub_long_branch_v4t_arm_thumb_pic:
4948 case arm_stub_long_branch_v4t_thumb_arm_pic:
4949 case arm_stub_long_branch_thumb_only_pic:
4950 case arm_stub_long_branch_any_tls_pic:
4951 case arm_stub_long_branch_v4t_thumb_tls_pic:
4952 case arm_stub_cmse_branch_thumb_only:
4953 case arm_stub_a8_veneer_blx:
4954 return 4;
4955
4956 case arm_stub_long_branch_arm_nacl:
4957 case arm_stub_long_branch_arm_nacl_pic:
4958 return 16;
4959
4960 default:
4961 abort (); /* Should be unreachable. */
4962 }
4963 }
4964
4965 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4966 veneering (TRUE) or have their own symbol (FALSE). */
4967
4968 static bool
4969 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4970 {
4971 if (stub_type >= max_stub_type)
4972 abort (); /* Should be unreachable. */
4973
4974 switch (stub_type)
4975 {
4976 case arm_stub_cmse_branch_thumb_only:
4977 return true;
4978
4979 default:
4980 return false;
4981 }
4982
4983 abort (); /* Should be unreachable. */
4984 }
4985
4986 /* Returns the padding needed for the dedicated section used stubs of type
4987 STUB_TYPE. */
4988
4989 static int
4990 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4991 {
4992 if (stub_type >= max_stub_type)
4993 abort (); /* Should be unreachable. */
4994
4995 switch (stub_type)
4996 {
4997 case arm_stub_cmse_branch_thumb_only:
4998 return 32;
4999
5000 default:
5001 return 0;
5002 }
5003
5004 abort (); /* Should be unreachable. */
5005 }
5006
5007 /* If veneers of type STUB_TYPE should go in a dedicated output section,
5008 returns the address of the hash table field in HTAB holding the offset at
5009 which new veneers should be layed out in the stub section. */
5010
5011 static bfd_vma*
5012 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
5013 enum elf32_arm_stub_type stub_type)
5014 {
5015 switch (stub_type)
5016 {
5017 case arm_stub_cmse_branch_thumb_only:
5018 return &htab->new_cmse_stub_offset;
5019
5020 default:
5021 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
5022 return NULL;
5023 }
5024 }
5025
5026 static bool
5027 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
5028 void * in_arg)
5029 {
5030 #define MAXRELOCS 3
5031 bool removed_sg_veneer;
5032 struct elf32_arm_stub_hash_entry *stub_entry;
5033 struct elf32_arm_link_hash_table *globals;
5034 struct bfd_link_info *info;
5035 asection *stub_sec;
5036 bfd *stub_bfd;
5037 bfd_byte *loc;
5038 bfd_vma sym_value;
5039 int template_size;
5040 int size;
5041 const insn_sequence *template_sequence;
5042 int i;
5043 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
5044 int stub_reloc_offset[MAXRELOCS] = {0, 0};
5045 int nrelocs = 0;
5046 int just_allocated = 0;
5047
5048 /* Massage our args to the form they really have. */
5049 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5050 info = (struct bfd_link_info *) in_arg;
5051
5052 /* Fail if the target section could not be assigned to an output
5053 section. The user should fix his linker script. */
5054 if (stub_entry->target_section->output_section == NULL
5055 && info->non_contiguous_regions)
5056 info->callbacks->einfo (_("%F%P: Could not assign `%pA' to an output section. "
5057 "Retry without --enable-non-contiguous-regions.\n"),
5058 stub_entry->target_section);
5059
5060 globals = elf32_arm_hash_table (info);
5061 if (globals == NULL)
5062 return false;
5063
5064 stub_sec = stub_entry->stub_sec;
5065
5066 if ((globals->fix_cortex_a8 < 0)
5067 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
5068 /* We have to do less-strictly-aligned fixes last. */
5069 return true;
5070
5071 /* Assign a slot at the end of section if none assigned yet. */
5072 if (stub_entry->stub_offset == (bfd_vma) -1)
5073 {
5074 stub_entry->stub_offset = stub_sec->size;
5075 just_allocated = 1;
5076 }
5077 loc = stub_sec->contents + stub_entry->stub_offset;
5078
5079 stub_bfd = stub_sec->owner;
5080
5081 /* This is the address of the stub destination. */
5082 sym_value = (stub_entry->target_value
5083 + stub_entry->target_section->output_offset
5084 + stub_entry->target_section->output_section->vma);
5085
5086 template_sequence = stub_entry->stub_template;
5087 template_size = stub_entry->stub_template_size;
5088
5089 size = 0;
5090 for (i = 0; i < template_size; i++)
5091 {
5092 switch (template_sequence[i].type)
5093 {
5094 case THUMB16_TYPE:
5095 {
5096 bfd_vma data = (bfd_vma) template_sequence[i].data;
5097 if (template_sequence[i].reloc_addend != 0)
5098 {
5099 /* We've borrowed the reloc_addend field to mean we should
5100 insert a condition code into this (Thumb-1 branch)
5101 instruction. See THUMB16_BCOND_INSN. */
5102 BFD_ASSERT ((data & 0xff00) == 0xd000);
5103 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
5104 }
5105 bfd_put_16 (stub_bfd, data, loc + size);
5106 size += 2;
5107 }
5108 break;
5109
5110 case THUMB32_TYPE:
5111 bfd_put_16 (stub_bfd,
5112 (template_sequence[i].data >> 16) & 0xffff,
5113 loc + size);
5114 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
5115 loc + size + 2);
5116 if (template_sequence[i].r_type != R_ARM_NONE)
5117 {
5118 stub_reloc_idx[nrelocs] = i;
5119 stub_reloc_offset[nrelocs++] = size;
5120 }
5121 size += 4;
5122 break;
5123
5124 case ARM_TYPE:
5125 bfd_put_32 (stub_bfd, template_sequence[i].data,
5126 loc + size);
5127 /* Handle cases where the target is encoded within the
5128 instruction. */
5129 if (template_sequence[i].r_type == R_ARM_JUMP24)
5130 {
5131 stub_reloc_idx[nrelocs] = i;
5132 stub_reloc_offset[nrelocs++] = size;
5133 }
5134 size += 4;
5135 break;
5136
5137 case DATA_TYPE:
5138 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
5139 stub_reloc_idx[nrelocs] = i;
5140 stub_reloc_offset[nrelocs++] = size;
5141 size += 4;
5142 break;
5143
5144 default:
5145 BFD_FAIL ();
5146 return false;
5147 }
5148 }
5149
5150 if (just_allocated)
5151 stub_sec->size += size;
5152
5153 /* Stub size has already been computed in arm_size_one_stub. Check
5154 consistency. */
5155 BFD_ASSERT (size == stub_entry->stub_size);
5156
5157 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
5158 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
5159 sym_value |= 1;
5160
5161 /* Assume non empty slots have at least one and at most MAXRELOCS entries
5162 to relocate in each stub. */
5163 removed_sg_veneer =
5164 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5165 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
5166
5167 for (i = 0; i < nrelocs; i++)
5168 {
5169 Elf_Internal_Rela rel;
5170 bool unresolved_reloc;
5171 char *error_message;
5172 bfd_vma points_to =
5173 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
5174
5175 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
5176 rel.r_info = ELF32_R_INFO (0,
5177 template_sequence[stub_reloc_idx[i]].r_type);
5178 rel.r_addend = 0;
5179
5180 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
5181 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5182 template should refer back to the instruction after the original
5183 branch. We use target_section as Cortex-A8 erratum workaround stubs
5184 are only generated when both source and target are in the same
5185 section. */
5186 points_to = stub_entry->target_section->output_section->vma
5187 + stub_entry->target_section->output_offset
5188 + stub_entry->source_value;
5189
5190 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5191 (template_sequence[stub_reloc_idx[i]].r_type),
5192 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
5193 points_to, info, stub_entry->target_section, "", STT_FUNC,
5194 stub_entry->branch_type,
5195 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
5196 &error_message);
5197 }
5198
5199 return true;
5200 #undef MAXRELOCS
5201 }
5202
5203 /* Calculate the template, template size and instruction size for a stub.
5204 Return value is the instruction size. */
5205
5206 static unsigned int
5207 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
5208 const insn_sequence **stub_template,
5209 int *stub_template_size)
5210 {
5211 const insn_sequence *template_sequence = NULL;
5212 int template_size = 0, i;
5213 unsigned int size;
5214
5215 template_sequence = stub_definitions[stub_type].template_sequence;
5216 if (stub_template)
5217 *stub_template = template_sequence;
5218
5219 template_size = stub_definitions[stub_type].template_size;
5220 if (stub_template_size)
5221 *stub_template_size = template_size;
5222
5223 size = 0;
5224 for (i = 0; i < template_size; i++)
5225 {
5226 switch (template_sequence[i].type)
5227 {
5228 case THUMB16_TYPE:
5229 size += 2;
5230 break;
5231
5232 case ARM_TYPE:
5233 case THUMB32_TYPE:
5234 case DATA_TYPE:
5235 size += 4;
5236 break;
5237
5238 default:
5239 BFD_FAIL ();
5240 return 0;
5241 }
5242 }
5243
5244 return size;
5245 }
5246
5247 /* As above, but don't actually build the stub. Just bump offset so
5248 we know stub section sizes. */
5249
5250 static bool
5251 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
5252 void *in_arg ATTRIBUTE_UNUSED)
5253 {
5254 struct elf32_arm_stub_hash_entry *stub_entry;
5255 const insn_sequence *template_sequence;
5256 int template_size, size;
5257
5258 /* Massage our args to the form they really have. */
5259 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5260
5261 BFD_ASSERT ((stub_entry->stub_type > arm_stub_none)
5262 && stub_entry->stub_type < ARRAY_SIZE (stub_definitions));
5263
5264 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
5265 &template_size);
5266
5267 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
5268 if (stub_entry->stub_template_size)
5269 {
5270 stub_entry->stub_size = size;
5271 stub_entry->stub_template = template_sequence;
5272 stub_entry->stub_template_size = template_size;
5273 }
5274
5275 /* Already accounted for. */
5276 if (stub_entry->stub_offset != (bfd_vma) -1)
5277 return true;
5278
5279 size = (size + 7) & ~7;
5280 stub_entry->stub_sec->size += size;
5281
5282 return true;
5283 }
5284
5285 /* External entry points for sizing and building linker stubs. */
5286
5287 /* Set up various things so that we can make a list of input sections
5288 for each output section included in the link. Returns -1 on error,
5289 0 when no stubs will be needed, and 1 on success. */
5290
5291 int
5292 elf32_arm_setup_section_lists (bfd *output_bfd,
5293 struct bfd_link_info *info)
5294 {
5295 bfd *input_bfd;
5296 unsigned int bfd_count;
5297 unsigned int top_id, top_index;
5298 asection *section;
5299 asection **input_list, **list;
5300 size_t amt;
5301 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5302
5303 if (htab == NULL)
5304 return 0;
5305
5306 /* Count the number of input BFDs and find the top input section id. */
5307 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
5308 input_bfd != NULL;
5309 input_bfd = input_bfd->link.next)
5310 {
5311 bfd_count += 1;
5312 for (section = input_bfd->sections;
5313 section != NULL;
5314 section = section->next)
5315 {
5316 if (top_id < section->id)
5317 top_id = section->id;
5318 }
5319 }
5320 htab->bfd_count = bfd_count;
5321
5322 amt = sizeof (struct map_stub) * (top_id + 1);
5323 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
5324 if (htab->stub_group == NULL)
5325 return -1;
5326 htab->top_id = top_id;
5327
5328 /* We can't use output_bfd->section_count here to find the top output
5329 section index as some sections may have been removed, and
5330 _bfd_strip_section_from_output doesn't renumber the indices. */
5331 for (section = output_bfd->sections, top_index = 0;
5332 section != NULL;
5333 section = section->next)
5334 {
5335 if (top_index < section->index)
5336 top_index = section->index;
5337 }
5338
5339 htab->top_index = top_index;
5340 amt = sizeof (asection *) * (top_index + 1);
5341 input_list = (asection **) bfd_malloc (amt);
5342 htab->input_list = input_list;
5343 if (input_list == NULL)
5344 return -1;
5345
5346 /* For sections we aren't interested in, mark their entries with a
5347 value we can check later. */
5348 list = input_list + top_index;
5349 do
5350 *list = bfd_abs_section_ptr;
5351 while (list-- != input_list);
5352
5353 for (section = output_bfd->sections;
5354 section != NULL;
5355 section = section->next)
5356 {
5357 if ((section->flags & SEC_CODE) != 0)
5358 input_list[section->index] = NULL;
5359 }
5360
5361 return 1;
5362 }
5363
5364 /* The linker repeatedly calls this function for each input section,
5365 in the order that input sections are linked into output sections.
5366 Build lists of input sections to determine groupings between which
5367 we may insert linker stubs. */
5368
5369 void
5370 elf32_arm_next_input_section (struct bfd_link_info *info,
5371 asection *isec)
5372 {
5373 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5374
5375 if (htab == NULL)
5376 return;
5377
5378 if (isec->output_section->index <= htab->top_index)
5379 {
5380 asection **list = htab->input_list + isec->output_section->index;
5381
5382 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5383 {
5384 /* Steal the link_sec pointer for our list. */
5385 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5386 /* This happens to make the list in reverse order,
5387 which we reverse later. */
5388 PREV_SEC (isec) = *list;
5389 *list = isec;
5390 }
5391 }
5392 }
5393
5394 /* See whether we can group stub sections together. Grouping stub
5395 sections may result in fewer stubs. More importantly, we need to
5396 put all .init* and .fini* stubs at the end of the .init or
5397 .fini output sections respectively, because glibc splits the
5398 _init and _fini functions into multiple parts. Putting a stub in
5399 the middle of a function is not a good idea. */
5400
5401 static void
5402 group_sections (struct elf32_arm_link_hash_table *htab,
5403 bfd_size_type stub_group_size,
5404 bool stubs_always_after_branch)
5405 {
5406 asection **list = htab->input_list;
5407
5408 do
5409 {
5410 asection *tail = *list;
5411 asection *head;
5412
5413 if (tail == bfd_abs_section_ptr)
5414 continue;
5415
5416 /* Reverse the list: we must avoid placing stubs at the
5417 beginning of the section because the beginning of the text
5418 section may be required for an interrupt vector in bare metal
5419 code. */
5420 #define NEXT_SEC PREV_SEC
5421 head = NULL;
5422 while (tail != NULL)
5423 {
5424 /* Pop from tail. */
5425 asection *item = tail;
5426 tail = PREV_SEC (item);
5427
5428 /* Push on head. */
5429 NEXT_SEC (item) = head;
5430 head = item;
5431 }
5432
5433 while (head != NULL)
5434 {
5435 asection *curr;
5436 asection *next;
5437 bfd_vma stub_group_start = head->output_offset;
5438 bfd_vma end_of_next;
5439
5440 curr = head;
5441 while (NEXT_SEC (curr) != NULL)
5442 {
5443 next = NEXT_SEC (curr);
5444 end_of_next = next->output_offset + next->size;
5445 if (end_of_next - stub_group_start >= stub_group_size)
5446 /* End of NEXT is too far from start, so stop. */
5447 break;
5448 /* Add NEXT to the group. */
5449 curr = next;
5450 }
5451
5452 /* OK, the size from the start to the start of CURR is less
5453 than stub_group_size and thus can be handled by one stub
5454 section. (Or the head section is itself larger than
5455 stub_group_size, in which case we may be toast.)
5456 We should really be keeping track of the total size of
5457 stubs added here, as stubs contribute to the final output
5458 section size. */
5459 do
5460 {
5461 next = NEXT_SEC (head);
5462 /* Set up this stub group. */
5463 htab->stub_group[head->id].link_sec = curr;
5464 }
5465 while (head != curr && (head = next) != NULL);
5466
5467 /* But wait, there's more! Input sections up to stub_group_size
5468 bytes after the stub section can be handled by it too. */
5469 if (!stubs_always_after_branch)
5470 {
5471 stub_group_start = curr->output_offset + curr->size;
5472
5473 while (next != NULL)
5474 {
5475 end_of_next = next->output_offset + next->size;
5476 if (end_of_next - stub_group_start >= stub_group_size)
5477 /* End of NEXT is too far from stubs, so stop. */
5478 break;
5479 /* Add NEXT to the stub group. */
5480 head = next;
5481 next = NEXT_SEC (head);
5482 htab->stub_group[head->id].link_sec = curr;
5483 }
5484 }
5485 head = next;
5486 }
5487 }
5488 while (list++ != htab->input_list + htab->top_index);
5489
5490 free (htab->input_list);
5491 #undef PREV_SEC
5492 #undef NEXT_SEC
5493 }
5494
5495 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5496 erratum fix. */
5497
5498 static int
5499 a8_reloc_compare (const void *a, const void *b)
5500 {
5501 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5502 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5503
5504 if (ra->from < rb->from)
5505 return -1;
5506 else if (ra->from > rb->from)
5507 return 1;
5508 else
5509 return 0;
5510 }
5511
5512 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5513 const char *, char **);
5514
5515 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5516 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5517 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5518 otherwise. */
5519
5520 static bool
5521 cortex_a8_erratum_scan (bfd *input_bfd,
5522 struct bfd_link_info *info,
5523 struct a8_erratum_fix **a8_fixes_p,
5524 unsigned int *num_a8_fixes_p,
5525 unsigned int *a8_fix_table_size_p,
5526 struct a8_erratum_reloc *a8_relocs,
5527 unsigned int num_a8_relocs,
5528 unsigned prev_num_a8_fixes,
5529 bool *stub_changed_p)
5530 {
5531 asection *section;
5532 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5533 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5534 unsigned int num_a8_fixes = *num_a8_fixes_p;
5535 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5536
5537 if (htab == NULL)
5538 return false;
5539
5540 for (section = input_bfd->sections;
5541 section != NULL;
5542 section = section->next)
5543 {
5544 bfd_byte *contents = NULL;
5545 struct _arm_elf_section_data *sec_data;
5546 unsigned int span;
5547 bfd_vma base_vma;
5548
5549 if (elf_section_type (section) != SHT_PROGBITS
5550 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5551 || (section->flags & SEC_EXCLUDE) != 0
5552 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5553 || (section->output_section == bfd_abs_section_ptr))
5554 continue;
5555
5556 base_vma = section->output_section->vma + section->output_offset;
5557
5558 if (elf_section_data (section)->this_hdr.contents != NULL)
5559 contents = elf_section_data (section)->this_hdr.contents;
5560 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5561 return true;
5562
5563 sec_data = elf32_arm_section_data (section);
5564
5565 for (span = 0; span < sec_data->mapcount; span++)
5566 {
5567 unsigned int span_start = sec_data->map[span].vma;
5568 unsigned int span_end = (span == sec_data->mapcount - 1)
5569 ? section->size : sec_data->map[span + 1].vma;
5570 unsigned int i;
5571 char span_type = sec_data->map[span].type;
5572 bool last_was_32bit = false, last_was_branch = false;
5573
5574 if (span_type != 't')
5575 continue;
5576
5577 /* Span is entirely within a single 4KB region: skip scanning. */
5578 if (((base_vma + span_start) & ~0xfff)
5579 == ((base_vma + span_end) & ~0xfff))
5580 continue;
5581
5582 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5583
5584 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5585 * The branch target is in the same 4KB region as the
5586 first half of the branch.
5587 * The instruction before the branch is a 32-bit
5588 length non-branch instruction. */
5589 for (i = span_start; i < span_end;)
5590 {
5591 unsigned int insn = bfd_getl16 (&contents[i]);
5592 bool insn_32bit = false, is_blx = false, is_b = false;
5593 bool is_bl = false, is_bcc = false, is_32bit_branch;
5594
5595 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5596 insn_32bit = true;
5597
5598 if (insn_32bit)
5599 {
5600 /* Load the rest of the insn (in manual-friendly order). */
5601 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5602
5603 /* Encoding T4: B<c>.W. */
5604 is_b = (insn & 0xf800d000) == 0xf0009000;
5605 /* Encoding T1: BL<c>.W. */
5606 is_bl = (insn & 0xf800d000) == 0xf000d000;
5607 /* Encoding T2: BLX<c>.W. */
5608 is_blx = (insn & 0xf800d000) == 0xf000c000;
5609 /* Encoding T3: B<c>.W (not permitted in IT block). */
5610 is_bcc = (insn & 0xf800d000) == 0xf0008000
5611 && (insn & 0x07f00000) != 0x03800000;
5612 }
5613
5614 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5615
5616 if (((base_vma + i) & 0xfff) == 0xffe
5617 && insn_32bit
5618 && is_32bit_branch
5619 && last_was_32bit
5620 && ! last_was_branch)
5621 {
5622 bfd_signed_vma offset = 0;
5623 bool force_target_arm = false;
5624 bool force_target_thumb = false;
5625 bfd_vma target;
5626 enum elf32_arm_stub_type stub_type = arm_stub_none;
5627 struct a8_erratum_reloc key, *found;
5628 bool use_plt = false;
5629
5630 key.from = base_vma + i;
5631 found = (struct a8_erratum_reloc *)
5632 bsearch (&key, a8_relocs, num_a8_relocs,
5633 sizeof (struct a8_erratum_reloc),
5634 &a8_reloc_compare);
5635
5636 if (found)
5637 {
5638 char *error_message = NULL;
5639 struct elf_link_hash_entry *entry;
5640
5641 /* We don't care about the error returned from this
5642 function, only if there is glue or not. */
5643 entry = find_thumb_glue (info, found->sym_name,
5644 &error_message);
5645
5646 if (entry)
5647 found->non_a8_stub = true;
5648
5649 /* Keep a simpler condition, for the sake of clarity. */
5650 if (htab->root.splt != NULL && found->hash != NULL
5651 && found->hash->root.plt.offset != (bfd_vma) -1)
5652 use_plt = true;
5653
5654 if (found->r_type == R_ARM_THM_CALL)
5655 {
5656 if (found->branch_type == ST_BRANCH_TO_ARM
5657 || use_plt)
5658 force_target_arm = true;
5659 else
5660 force_target_thumb = true;
5661 }
5662 }
5663
5664 /* Check if we have an offending branch instruction. */
5665
5666 if (found && found->non_a8_stub)
5667 /* We've already made a stub for this instruction, e.g.
5668 it's a long branch or a Thumb->ARM stub. Assume that
5669 stub will suffice to work around the A8 erratum (see
5670 setting of always_after_branch above). */
5671 ;
5672 else if (is_bcc)
5673 {
5674 offset = (insn & 0x7ff) << 1;
5675 offset |= (insn & 0x3f0000) >> 4;
5676 offset |= (insn & 0x2000) ? 0x40000 : 0;
5677 offset |= (insn & 0x800) ? 0x80000 : 0;
5678 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5679 if (offset & 0x100000)
5680 offset |= ~ ((bfd_signed_vma) 0xfffff);
5681 stub_type = arm_stub_a8_veneer_b_cond;
5682 }
5683 else if (is_b || is_bl || is_blx)
5684 {
5685 int s = (insn & 0x4000000) != 0;
5686 int j1 = (insn & 0x2000) != 0;
5687 int j2 = (insn & 0x800) != 0;
5688 int i1 = !(j1 ^ s);
5689 int i2 = !(j2 ^ s);
5690
5691 offset = (insn & 0x7ff) << 1;
5692 offset |= (insn & 0x3ff0000) >> 4;
5693 offset |= i2 << 22;
5694 offset |= i1 << 23;
5695 offset |= s << 24;
5696 if (offset & 0x1000000)
5697 offset |= ~ ((bfd_signed_vma) 0xffffff);
5698
5699 if (is_blx)
5700 offset &= ~ ((bfd_signed_vma) 3);
5701
5702 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5703 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5704 }
5705
5706 if (stub_type != arm_stub_none)
5707 {
5708 bfd_vma pc_for_insn = base_vma + i + 4;
5709
5710 /* The original instruction is a BL, but the target is
5711 an ARM instruction. If we were not making a stub,
5712 the BL would have been converted to a BLX. Use the
5713 BLX stub instead in that case. */
5714 if (htab->use_blx && force_target_arm
5715 && stub_type == arm_stub_a8_veneer_bl)
5716 {
5717 stub_type = arm_stub_a8_veneer_blx;
5718 is_blx = true;
5719 is_bl = false;
5720 }
5721 /* Conversely, if the original instruction was
5722 BLX but the target is Thumb mode, use the BL
5723 stub. */
5724 else if (force_target_thumb
5725 && stub_type == arm_stub_a8_veneer_blx)
5726 {
5727 stub_type = arm_stub_a8_veneer_bl;
5728 is_blx = false;
5729 is_bl = true;
5730 }
5731
5732 if (is_blx)
5733 pc_for_insn &= ~ ((bfd_vma) 3);
5734
5735 /* If we found a relocation, use the proper destination,
5736 not the offset in the (unrelocated) instruction.
5737 Note this is always done if we switched the stub type
5738 above. */
5739 if (found)
5740 offset =
5741 (bfd_signed_vma) (found->destination - pc_for_insn);
5742
5743 /* If the stub will use a Thumb-mode branch to a
5744 PLT target, redirect it to the preceding Thumb
5745 entry point. */
5746 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5747 offset -= PLT_THUMB_STUB_SIZE;
5748
5749 target = pc_for_insn + offset;
5750
5751 /* The BLX stub is ARM-mode code. Adjust the offset to
5752 take the different PC value (+8 instead of +4) into
5753 account. */
5754 if (stub_type == arm_stub_a8_veneer_blx)
5755 offset += 4;
5756
5757 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5758 {
5759 char *stub_name = NULL;
5760
5761 if (num_a8_fixes == a8_fix_table_size)
5762 {
5763 a8_fix_table_size *= 2;
5764 a8_fixes = (struct a8_erratum_fix *)
5765 bfd_realloc (a8_fixes,
5766 sizeof (struct a8_erratum_fix)
5767 * a8_fix_table_size);
5768 }
5769
5770 if (num_a8_fixes < prev_num_a8_fixes)
5771 {
5772 /* If we're doing a subsequent scan,
5773 check if we've found the same fix as
5774 before, and try and reuse the stub
5775 name. */
5776 stub_name = a8_fixes[num_a8_fixes].stub_name;
5777 if ((a8_fixes[num_a8_fixes].section != section)
5778 || (a8_fixes[num_a8_fixes].offset != i))
5779 {
5780 free (stub_name);
5781 stub_name = NULL;
5782 *stub_changed_p = true;
5783 }
5784 }
5785
5786 if (!stub_name)
5787 {
5788 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5789 if (stub_name != NULL)
5790 sprintf (stub_name, "%x:%x", section->id, i);
5791 }
5792
5793 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5794 a8_fixes[num_a8_fixes].section = section;
5795 a8_fixes[num_a8_fixes].offset = i;
5796 a8_fixes[num_a8_fixes].target_offset =
5797 target - base_vma;
5798 a8_fixes[num_a8_fixes].orig_insn = insn;
5799 a8_fixes[num_a8_fixes].stub_name = stub_name;
5800 a8_fixes[num_a8_fixes].stub_type = stub_type;
5801 a8_fixes[num_a8_fixes].branch_type =
5802 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5803
5804 num_a8_fixes++;
5805 }
5806 }
5807 }
5808
5809 i += insn_32bit ? 4 : 2;
5810 last_was_32bit = insn_32bit;
5811 last_was_branch = is_32bit_branch;
5812 }
5813 }
5814
5815 if (elf_section_data (section)->this_hdr.contents == NULL)
5816 free (contents);
5817 }
5818
5819 *a8_fixes_p = a8_fixes;
5820 *num_a8_fixes_p = num_a8_fixes;
5821 *a8_fix_table_size_p = a8_fix_table_size;
5822
5823 return false;
5824 }
5825
5826 /* Create or update a stub entry depending on whether the stub can already be
5827 found in HTAB. The stub is identified by:
5828 - its type STUB_TYPE
5829 - its source branch (note that several can share the same stub) whose
5830 section and relocation (if any) are given by SECTION and IRELA
5831 respectively
5832 - its target symbol whose input section, hash, name, value and branch type
5833 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5834 respectively
5835
5836 If found, the value of the stub's target symbol is updated from SYM_VALUE
5837 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5838 TRUE and the stub entry is initialized.
5839
5840 Returns the stub that was created or updated, or NULL if an error
5841 occurred. */
5842
5843 static struct elf32_arm_stub_hash_entry *
5844 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5845 enum elf32_arm_stub_type stub_type, asection *section,
5846 Elf_Internal_Rela *irela, asection *sym_sec,
5847 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5848 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5849 bool *new_stub)
5850 {
5851 const asection *id_sec;
5852 char *stub_name;
5853 struct elf32_arm_stub_hash_entry *stub_entry;
5854 unsigned int r_type;
5855 bool sym_claimed = arm_stub_sym_claimed (stub_type);
5856
5857 BFD_ASSERT (stub_type != arm_stub_none);
5858 *new_stub = false;
5859
5860 if (sym_claimed)
5861 stub_name = sym_name;
5862 else
5863 {
5864 BFD_ASSERT (irela);
5865 BFD_ASSERT (section);
5866 BFD_ASSERT (section->id <= htab->top_id);
5867
5868 /* Support for grouping stub sections. */
5869 id_sec = htab->stub_group[section->id].link_sec;
5870
5871 /* Get the name of this stub. */
5872 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5873 stub_type);
5874 if (!stub_name)
5875 return NULL;
5876 }
5877
5878 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, false,
5879 false);
5880 /* The proper stub has already been created, just update its value. */
5881 if (stub_entry != NULL)
5882 {
5883 if (!sym_claimed)
5884 free (stub_name);
5885 stub_entry->target_value = sym_value;
5886 return stub_entry;
5887 }
5888
5889 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5890 if (stub_entry == NULL)
5891 {
5892 if (!sym_claimed)
5893 free (stub_name);
5894 return NULL;
5895 }
5896
5897 stub_entry->target_value = sym_value;
5898 stub_entry->target_section = sym_sec;
5899 stub_entry->stub_type = stub_type;
5900 stub_entry->h = hash;
5901 stub_entry->branch_type = branch_type;
5902
5903 if (sym_claimed)
5904 stub_entry->output_name = sym_name;
5905 else
5906 {
5907 if (sym_name == NULL)
5908 sym_name = "unnamed";
5909 stub_entry->output_name = (char *)
5910 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5911 + strlen (sym_name));
5912 if (stub_entry->output_name == NULL)
5913 {
5914 free (stub_name);
5915 return NULL;
5916 }
5917
5918 /* For historical reasons, use the existing names for ARM-to-Thumb and
5919 Thumb-to-ARM stubs. */
5920 r_type = ELF32_R_TYPE (irela->r_info);
5921 if ((r_type == (unsigned int) R_ARM_THM_CALL
5922 || r_type == (unsigned int) R_ARM_THM_JUMP24
5923 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5924 && branch_type == ST_BRANCH_TO_ARM)
5925 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5926 else if ((r_type == (unsigned int) R_ARM_CALL
5927 || r_type == (unsigned int) R_ARM_JUMP24)
5928 && branch_type == ST_BRANCH_TO_THUMB)
5929 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5930 else
5931 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5932 }
5933
5934 *new_stub = true;
5935 return stub_entry;
5936 }
5937
5938 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5939 gateway veneer to transition from non secure to secure state and create them
5940 accordingly.
5941
5942 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5943 defines the conditions that govern Secure Gateway veneer creation for a
5944 given symbol <SYM> as follows:
5945 - it has function type
5946 - it has non local binding
5947 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5948 same type, binding and value as <SYM> (called normal symbol).
5949 An entry function can handle secure state transition itself in which case
5950 its special symbol would have a different value from the normal symbol.
5951
5952 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5953 entry mapping while HTAB gives the name to hash entry mapping.
5954 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5955 created.
5956
5957 The return value gives whether a stub failed to be allocated. */
5958
5959 static bool
5960 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5961 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5962 int *cmse_stub_created)
5963 {
5964 const struct elf_backend_data *bed;
5965 Elf_Internal_Shdr *symtab_hdr;
5966 unsigned i, j, sym_count, ext_start;
5967 Elf_Internal_Sym *cmse_sym, *local_syms;
5968 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5969 enum arm_st_branch_type branch_type;
5970 char *sym_name, *lsym_name;
5971 bfd_vma sym_value;
5972 asection *section;
5973 struct elf32_arm_stub_hash_entry *stub_entry;
5974 bool is_v8m, new_stub, cmse_invalid, ret = true;
5975
5976 bed = get_elf_backend_data (input_bfd);
5977 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5978 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5979 ext_start = symtab_hdr->sh_info;
5980 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5981 && out_attr[Tag_CPU_arch_profile].i == 'M');
5982
5983 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5984 if (local_syms == NULL)
5985 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5986 symtab_hdr->sh_info, 0, NULL, NULL,
5987 NULL);
5988 if (symtab_hdr->sh_info && local_syms == NULL)
5989 return false;
5990
5991 /* Scan symbols. */
5992 for (i = 0; i < sym_count; i++)
5993 {
5994 cmse_invalid = false;
5995
5996 if (i < ext_start)
5997 {
5998 cmse_sym = &local_syms[i];
5999 sym_name = bfd_elf_string_from_elf_section (input_bfd,
6000 symtab_hdr->sh_link,
6001 cmse_sym->st_name);
6002 if (!sym_name || !startswith (sym_name, CMSE_PREFIX))
6003 continue;
6004
6005 /* Special symbol with local binding. */
6006 cmse_invalid = true;
6007 }
6008 else
6009 {
6010 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
6011 if (cmse_hash == NULL)
6012 continue;
6013
6014 sym_name = (char *) cmse_hash->root.root.root.string;
6015 if (!startswith (sym_name, CMSE_PREFIX))
6016 continue;
6017
6018 /* Special symbol has incorrect binding or type. */
6019 if ((cmse_hash->root.root.type != bfd_link_hash_defined
6020 && cmse_hash->root.root.type != bfd_link_hash_defweak)
6021 || cmse_hash->root.type != STT_FUNC)
6022 cmse_invalid = true;
6023 }
6024
6025 if (!is_v8m)
6026 {
6027 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
6028 "ARMv8-M architecture or later"),
6029 input_bfd, sym_name);
6030 is_v8m = true; /* Avoid multiple warning. */
6031 ret = false;
6032 }
6033
6034 if (cmse_invalid)
6035 {
6036 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
6037 " a global or weak function symbol"),
6038 input_bfd, sym_name);
6039 ret = false;
6040 if (i < ext_start)
6041 continue;
6042 }
6043
6044 sym_name += strlen (CMSE_PREFIX);
6045 hash = (struct elf32_arm_link_hash_entry *)
6046 elf_link_hash_lookup (&(htab)->root, sym_name, false, false, true);
6047
6048 /* No associated normal symbol or it is neither global nor weak. */
6049 if (!hash
6050 || (hash->root.root.type != bfd_link_hash_defined
6051 && hash->root.root.type != bfd_link_hash_defweak)
6052 || hash->root.type != STT_FUNC)
6053 {
6054 /* Initialize here to avoid warning about use of possibly
6055 uninitialized variable. */
6056 j = 0;
6057
6058 if (!hash)
6059 {
6060 /* Searching for a normal symbol with local binding. */
6061 for (; j < ext_start; j++)
6062 {
6063 lsym_name =
6064 bfd_elf_string_from_elf_section (input_bfd,
6065 symtab_hdr->sh_link,
6066 local_syms[j].st_name);
6067 if (!strcmp (sym_name, lsym_name))
6068 break;
6069 }
6070 }
6071
6072 if (hash || j < ext_start)
6073 {
6074 _bfd_error_handler
6075 (_("%pB: invalid standard symbol `%s'; it must be "
6076 "a global or weak function symbol"),
6077 input_bfd, sym_name);
6078 }
6079 else
6080 _bfd_error_handler
6081 (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name);
6082 ret = false;
6083 if (!hash)
6084 continue;
6085 }
6086
6087 sym_value = hash->root.root.u.def.value;
6088 section = hash->root.root.u.def.section;
6089
6090 if (cmse_hash->root.root.u.def.section != section)
6091 {
6092 _bfd_error_handler
6093 (_("%pB: `%s' and its special symbol are in different sections"),
6094 input_bfd, sym_name);
6095 ret = false;
6096 }
6097 if (cmse_hash->root.root.u.def.value != sym_value)
6098 continue; /* Ignore: could be an entry function starting with SG. */
6099
6100 /* If this section is a link-once section that will be discarded, then
6101 don't create any stubs. */
6102 if (section->output_section == NULL)
6103 {
6104 _bfd_error_handler
6105 (_("%pB: entry function `%s' not output"), input_bfd, sym_name);
6106 continue;
6107 }
6108
6109 if (hash->root.size == 0)
6110 {
6111 _bfd_error_handler
6112 (_("%pB: entry function `%s' is empty"), input_bfd, sym_name);
6113 ret = false;
6114 }
6115
6116 if (!ret)
6117 continue;
6118 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6119 stub_entry
6120 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6121 NULL, NULL, section, hash, sym_name,
6122 sym_value, branch_type, &new_stub);
6123
6124 if (stub_entry == NULL)
6125 ret = false;
6126 else
6127 {
6128 BFD_ASSERT (new_stub);
6129 (*cmse_stub_created)++;
6130 }
6131 }
6132
6133 if (!symtab_hdr->contents)
6134 free (local_syms);
6135 return ret;
6136 }
6137
6138 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
6139 code entry function, ie can be called from non secure code without using a
6140 veneer. */
6141
6142 static bool
6143 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
6144 {
6145 bfd_byte contents[4];
6146 uint32_t first_insn;
6147 asection *section;
6148 file_ptr offset;
6149 bfd *abfd;
6150
6151 /* Defined symbol of function type. */
6152 if (hash->root.root.type != bfd_link_hash_defined
6153 && hash->root.root.type != bfd_link_hash_defweak)
6154 return false;
6155 if (hash->root.type != STT_FUNC)
6156 return false;
6157
6158 /* Read first instruction. */
6159 section = hash->root.root.u.def.section;
6160 abfd = section->owner;
6161 offset = hash->root.root.u.def.value - section->vma;
6162 if (!bfd_get_section_contents (abfd, section, contents, offset,
6163 sizeof (contents)))
6164 return false;
6165
6166 first_insn = bfd_get_32 (abfd, contents);
6167
6168 /* Starts by SG instruction. */
6169 return first_insn == 0xe97fe97f;
6170 }
6171
6172 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6173 secure gateway veneers (ie. the veneers was not in the input import library)
6174 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
6175
6176 static bool
6177 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
6178 {
6179 struct elf32_arm_stub_hash_entry *stub_entry;
6180 struct bfd_link_info *info;
6181
6182 /* Massage our args to the form they really have. */
6183 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
6184 info = (struct bfd_link_info *) gen_info;
6185
6186 if (info->out_implib_bfd)
6187 return true;
6188
6189 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
6190 return true;
6191
6192 if (stub_entry->stub_offset == (bfd_vma) -1)
6193 _bfd_error_handler (" %s", stub_entry->output_name);
6194
6195 return true;
6196 }
6197
6198 /* Set offset of each secure gateway veneers so that its address remain
6199 identical to the one in the input import library referred by
6200 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
6201 (present in input import library but absent from the executable being
6202 linked) or if new veneers appeared and there is no output import library
6203 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6204 number of secure gateway veneers found in the input import library.
6205
6206 The function returns whether an error occurred. If no error occurred,
6207 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6208 and this function and HTAB->new_cmse_stub_offset is set to the biggest
6209 veneer observed set for new veneers to be layed out after. */
6210
6211 static bool
6212 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
6213 struct elf32_arm_link_hash_table *htab,
6214 int *cmse_stub_created)
6215 {
6216 long symsize;
6217 char *sym_name;
6218 flagword flags;
6219 long i, symcount;
6220 bfd *in_implib_bfd;
6221 asection *stub_out_sec;
6222 bool ret = true;
6223 Elf_Internal_Sym *intsym;
6224 const char *out_sec_name;
6225 bfd_size_type cmse_stub_size;
6226 asymbol **sympp = NULL, *sym;
6227 struct elf32_arm_link_hash_entry *hash;
6228 const insn_sequence *cmse_stub_template;
6229 struct elf32_arm_stub_hash_entry *stub_entry;
6230 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
6231 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
6232 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
6233
6234 /* No input secure gateway import library. */
6235 if (!htab->in_implib_bfd)
6236 return true;
6237
6238 in_implib_bfd = htab->in_implib_bfd;
6239 if (!htab->cmse_implib)
6240 {
6241 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6242 "Gateway import libraries"), in_implib_bfd);
6243 return false;
6244 }
6245
6246 /* Get symbol table size. */
6247 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
6248 if (symsize < 0)
6249 return false;
6250
6251 /* Read in the input secure gateway import library's symbol table. */
6252 sympp = (asymbol **) bfd_malloc (symsize);
6253 if (sympp == NULL)
6254 return false;
6255
6256 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
6257 if (symcount < 0)
6258 {
6259 ret = false;
6260 goto free_sym_buf;
6261 }
6262
6263 htab->new_cmse_stub_offset = 0;
6264 cmse_stub_size =
6265 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
6266 &cmse_stub_template,
6267 &cmse_stub_template_size);
6268 out_sec_name =
6269 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
6270 stub_out_sec =
6271 bfd_get_section_by_name (htab->obfd, out_sec_name);
6272 if (stub_out_sec != NULL)
6273 cmse_stub_sec_vma = stub_out_sec->vma;
6274
6275 /* Set addresses of veneers mentionned in input secure gateway import
6276 library's symbol table. */
6277 for (i = 0; i < symcount; i++)
6278 {
6279 sym = sympp[i];
6280 flags = sym->flags;
6281 sym_name = (char *) bfd_asymbol_name (sym);
6282 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
6283
6284 if (sym->section != bfd_abs_section_ptr
6285 || !(flags & (BSF_GLOBAL | BSF_WEAK))
6286 || (flags & BSF_FUNCTION) != BSF_FUNCTION
6287 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
6288 != ST_BRANCH_TO_THUMB))
6289 {
6290 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6291 "symbol should be absolute, global and "
6292 "refer to Thumb functions"),
6293 in_implib_bfd, sym_name);
6294 ret = false;
6295 continue;
6296 }
6297
6298 veneer_value = bfd_asymbol_value (sym);
6299 stub_offset = veneer_value - cmse_stub_sec_vma;
6300 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
6301 false, false);
6302 hash = (struct elf32_arm_link_hash_entry *)
6303 elf_link_hash_lookup (&(htab)->root, sym_name, false, false, true);
6304
6305 /* Stub entry should have been created by cmse_scan or the symbol be of
6306 a secure function callable from non secure code. */
6307 if (!stub_entry && !hash)
6308 {
6309 bool new_stub;
6310
6311 _bfd_error_handler
6312 (_("entry function `%s' disappeared from secure code"), sym_name);
6313 hash = (struct elf32_arm_link_hash_entry *)
6314 elf_link_hash_lookup (&(htab)->root, sym_name, true, true, true);
6315 stub_entry
6316 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6317 NULL, NULL, bfd_abs_section_ptr, hash,
6318 sym_name, veneer_value,
6319 ST_BRANCH_TO_THUMB, &new_stub);
6320 if (stub_entry == NULL)
6321 ret = false;
6322 else
6323 {
6324 BFD_ASSERT (new_stub);
6325 new_cmse_stubs_created++;
6326 (*cmse_stub_created)++;
6327 }
6328 stub_entry->stub_template_size = stub_entry->stub_size = 0;
6329 stub_entry->stub_offset = stub_offset;
6330 }
6331 /* Symbol found is not callable from non secure code. */
6332 else if (!stub_entry)
6333 {
6334 if (!cmse_entry_fct_p (hash))
6335 {
6336 _bfd_error_handler (_("`%s' refers to a non entry function"),
6337 sym_name);
6338 ret = false;
6339 }
6340 continue;
6341 }
6342 else
6343 {
6344 /* Only stubs for SG veneers should have been created. */
6345 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6346
6347 /* Check visibility hasn't changed. */
6348 if (!!(flags & BSF_GLOBAL)
6349 != (hash->root.root.type == bfd_link_hash_defined))
6350 _bfd_error_handler
6351 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd,
6352 sym_name);
6353
6354 stub_entry->stub_offset = stub_offset;
6355 }
6356
6357 /* Size should match that of a SG veneer. */
6358 if (intsym->st_size != cmse_stub_size)
6359 {
6360 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6361 in_implib_bfd, sym_name);
6362 ret = false;
6363 }
6364
6365 /* Previous veneer address is before current SG veneer section. */
6366 if (veneer_value < cmse_stub_sec_vma)
6367 {
6368 /* Avoid offset underflow. */
6369 if (stub_entry)
6370 stub_entry->stub_offset = 0;
6371 stub_offset = 0;
6372 ret = false;
6373 }
6374
6375 /* Complain if stub offset not a multiple of stub size. */
6376 if (stub_offset % cmse_stub_size)
6377 {
6378 _bfd_error_handler
6379 (_("offset of veneer for entry function `%s' not a multiple of "
6380 "its size"), sym_name);
6381 ret = false;
6382 }
6383
6384 if (!ret)
6385 continue;
6386
6387 new_cmse_stubs_created--;
6388 if (veneer_value < cmse_stub_array_start)
6389 cmse_stub_array_start = veneer_value;
6390 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6391 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6392 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6393 }
6394
6395 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6396 {
6397 BFD_ASSERT (new_cmse_stubs_created > 0);
6398 _bfd_error_handler
6399 (_("new entry function(s) introduced but no output import library "
6400 "specified:"));
6401 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6402 }
6403
6404 if (cmse_stub_array_start != cmse_stub_sec_vma)
6405 {
6406 _bfd_error_handler
6407 (_("start address of `%s' is different from previous link"),
6408 out_sec_name);
6409 ret = false;
6410 }
6411
6412 free_sym_buf:
6413 free (sympp);
6414 return ret;
6415 }
6416
6417 /* Determine and set the size of the stub section for a final link.
6418
6419 The basic idea here is to examine all the relocations looking for
6420 PC-relative calls to a target that is unreachable with a "bl"
6421 instruction. */
6422
6423 bool
6424 elf32_arm_size_stubs (bfd *output_bfd,
6425 bfd *stub_bfd,
6426 struct bfd_link_info *info,
6427 bfd_signed_vma group_size,
6428 asection * (*add_stub_section) (const char *, asection *,
6429 asection *,
6430 unsigned int),
6431 void (*layout_sections_again) (void))
6432 {
6433 bool ret = true;
6434 obj_attribute *out_attr;
6435 int cmse_stub_created = 0;
6436 bfd_size_type stub_group_size;
6437 bool m_profile, stubs_always_after_branch, first_veneer_scan = true;
6438 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6439 struct a8_erratum_fix *a8_fixes = NULL;
6440 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6441 struct a8_erratum_reloc *a8_relocs = NULL;
6442 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6443
6444 if (htab == NULL)
6445 return false;
6446
6447 if (htab->fix_cortex_a8)
6448 {
6449 a8_fixes = (struct a8_erratum_fix *)
6450 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6451 a8_relocs = (struct a8_erratum_reloc *)
6452 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6453 }
6454
6455 /* Propagate mach to stub bfd, because it may not have been
6456 finalized when we created stub_bfd. */
6457 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6458 bfd_get_mach (output_bfd));
6459
6460 /* Stash our params away. */
6461 htab->stub_bfd = stub_bfd;
6462 htab->add_stub_section = add_stub_section;
6463 htab->layout_sections_again = layout_sections_again;
6464 stubs_always_after_branch = group_size < 0;
6465
6466 out_attr = elf_known_obj_attributes_proc (output_bfd);
6467 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6468
6469 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6470 as the first half of a 32-bit branch straddling two 4K pages. This is a
6471 crude way of enforcing that. */
6472 if (htab->fix_cortex_a8)
6473 stubs_always_after_branch = 1;
6474
6475 if (group_size < 0)
6476 stub_group_size = -group_size;
6477 else
6478 stub_group_size = group_size;
6479
6480 if (stub_group_size == 1)
6481 {
6482 /* Default values. */
6483 /* Thumb branch range is +-4MB has to be used as the default
6484 maximum size (a given section can contain both ARM and Thumb
6485 code, so the worst case has to be taken into account).
6486
6487 This value is 24K less than that, which allows for 2025
6488 12-byte stubs. If we exceed that, then we will fail to link.
6489 The user will have to relink with an explicit group size
6490 option. */
6491 stub_group_size = 4170000;
6492 }
6493
6494 group_sections (htab, stub_group_size, stubs_always_after_branch);
6495
6496 /* If we're applying the cortex A8 fix, we need to determine the
6497 program header size now, because we cannot change it later --
6498 that could alter section placements. Notice the A8 erratum fix
6499 ends up requiring the section addresses to remain unchanged
6500 modulo the page size. That's something we cannot represent
6501 inside BFD, and we don't want to force the section alignment to
6502 be the page size. */
6503 if (htab->fix_cortex_a8)
6504 (*htab->layout_sections_again) ();
6505
6506 while (1)
6507 {
6508 bfd *input_bfd;
6509 unsigned int bfd_indx;
6510 asection *stub_sec;
6511 enum elf32_arm_stub_type stub_type;
6512 bool stub_changed = false;
6513 unsigned prev_num_a8_fixes = num_a8_fixes;
6514
6515 num_a8_fixes = 0;
6516 for (input_bfd = info->input_bfds, bfd_indx = 0;
6517 input_bfd != NULL;
6518 input_bfd = input_bfd->link.next, bfd_indx++)
6519 {
6520 Elf_Internal_Shdr *symtab_hdr;
6521 asection *section;
6522 Elf_Internal_Sym *local_syms = NULL;
6523
6524 if (!is_arm_elf (input_bfd))
6525 continue;
6526 if ((input_bfd->flags & DYNAMIC) != 0
6527 && (elf_sym_hashes (input_bfd) == NULL
6528 || (elf_dyn_lib_class (input_bfd) & DYN_AS_NEEDED) != 0))
6529 continue;
6530
6531 num_a8_relocs = 0;
6532
6533 /* We'll need the symbol table in a second. */
6534 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6535 if (symtab_hdr->sh_info == 0)
6536 continue;
6537
6538 /* Limit scan of symbols to object file whose profile is
6539 Microcontroller to not hinder performance in the general case. */
6540 if (m_profile && first_veneer_scan)
6541 {
6542 struct elf_link_hash_entry **sym_hashes;
6543
6544 sym_hashes = elf_sym_hashes (input_bfd);
6545 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6546 &cmse_stub_created))
6547 goto error_ret_free_local;
6548
6549 if (cmse_stub_created != 0)
6550 stub_changed = true;
6551 }
6552
6553 /* Walk over each section attached to the input bfd. */
6554 for (section = input_bfd->sections;
6555 section != NULL;
6556 section = section->next)
6557 {
6558 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6559
6560 /* If there aren't any relocs, then there's nothing more
6561 to do. */
6562 if ((section->flags & SEC_RELOC) == 0
6563 || section->reloc_count == 0
6564 || (section->flags & SEC_CODE) == 0)
6565 continue;
6566
6567 /* If this section is a link-once section that will be
6568 discarded, then don't create any stubs. */
6569 if (section->output_section == NULL
6570 || section->output_section->owner != output_bfd)
6571 continue;
6572
6573 /* Get the relocs. */
6574 internal_relocs
6575 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6576 NULL, info->keep_memory);
6577 if (internal_relocs == NULL)
6578 goto error_ret_free_local;
6579
6580 /* Now examine each relocation. */
6581 irela = internal_relocs;
6582 irelaend = irela + section->reloc_count;
6583 for (; irela < irelaend; irela++)
6584 {
6585 unsigned int r_type, r_indx;
6586 asection *sym_sec;
6587 bfd_vma sym_value;
6588 bfd_vma destination;
6589 struct elf32_arm_link_hash_entry *hash;
6590 const char *sym_name;
6591 unsigned char st_type;
6592 enum arm_st_branch_type branch_type;
6593 bool created_stub = false;
6594
6595 r_type = ELF32_R_TYPE (irela->r_info);
6596 r_indx = ELF32_R_SYM (irela->r_info);
6597
6598 if (r_type >= (unsigned int) R_ARM_max)
6599 {
6600 bfd_set_error (bfd_error_bad_value);
6601 error_ret_free_internal:
6602 if (elf_section_data (section)->relocs == NULL)
6603 free (internal_relocs);
6604 /* Fall through. */
6605 error_ret_free_local:
6606 if (symtab_hdr->contents != (unsigned char *) local_syms)
6607 free (local_syms);
6608 return false;
6609 }
6610
6611 hash = NULL;
6612 if (r_indx >= symtab_hdr->sh_info)
6613 hash = elf32_arm_hash_entry
6614 (elf_sym_hashes (input_bfd)
6615 [r_indx - symtab_hdr->sh_info]);
6616
6617 /* Only look for stubs on branch instructions, or
6618 non-relaxed TLSCALL */
6619 if ((r_type != (unsigned int) R_ARM_CALL)
6620 && (r_type != (unsigned int) R_ARM_THM_CALL)
6621 && (r_type != (unsigned int) R_ARM_JUMP24)
6622 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6623 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6624 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6625 && (r_type != (unsigned int) R_ARM_PLT32)
6626 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6627 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6628 && r_type == (elf32_arm_tls_transition
6629 (info, r_type,
6630 (struct elf_link_hash_entry *) hash))
6631 && ((hash ? hash->tls_type
6632 : (elf32_arm_local_got_tls_type
6633 (input_bfd)[r_indx]))
6634 & GOT_TLS_GDESC) != 0))
6635 continue;
6636
6637 /* Now determine the call target, its name, value,
6638 section. */
6639 sym_sec = NULL;
6640 sym_value = 0;
6641 destination = 0;
6642 sym_name = NULL;
6643
6644 if (r_type == (unsigned int) R_ARM_TLS_CALL
6645 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6646 {
6647 /* A non-relaxed TLS call. The target is the
6648 plt-resident trampoline and nothing to do
6649 with the symbol. */
6650 BFD_ASSERT (htab->tls_trampoline > 0);
6651 sym_sec = htab->root.splt;
6652 sym_value = htab->tls_trampoline;
6653 hash = 0;
6654 st_type = STT_FUNC;
6655 branch_type = ST_BRANCH_TO_ARM;
6656 }
6657 else if (!hash)
6658 {
6659 /* It's a local symbol. */
6660 Elf_Internal_Sym *sym;
6661
6662 if (local_syms == NULL)
6663 {
6664 local_syms
6665 = (Elf_Internal_Sym *) symtab_hdr->contents;
6666 if (local_syms == NULL)
6667 local_syms
6668 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6669 symtab_hdr->sh_info, 0,
6670 NULL, NULL, NULL);
6671 if (local_syms == NULL)
6672 goto error_ret_free_internal;
6673 }
6674
6675 sym = local_syms + r_indx;
6676 if (sym->st_shndx == SHN_UNDEF)
6677 sym_sec = bfd_und_section_ptr;
6678 else if (sym->st_shndx == SHN_ABS)
6679 sym_sec = bfd_abs_section_ptr;
6680 else if (sym->st_shndx == SHN_COMMON)
6681 sym_sec = bfd_com_section_ptr;
6682 else
6683 sym_sec =
6684 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6685
6686 if (!sym_sec)
6687 /* This is an undefined symbol. It can never
6688 be resolved. */
6689 continue;
6690
6691 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6692 sym_value = sym->st_value;
6693 destination = (sym_value + irela->r_addend
6694 + sym_sec->output_offset
6695 + sym_sec->output_section->vma);
6696 st_type = ELF_ST_TYPE (sym->st_info);
6697 branch_type =
6698 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6699 sym_name
6700 = bfd_elf_string_from_elf_section (input_bfd,
6701 symtab_hdr->sh_link,
6702 sym->st_name);
6703 }
6704 else
6705 {
6706 /* It's an external symbol. */
6707 while (hash->root.root.type == bfd_link_hash_indirect
6708 || hash->root.root.type == bfd_link_hash_warning)
6709 hash = ((struct elf32_arm_link_hash_entry *)
6710 hash->root.root.u.i.link);
6711
6712 if (hash->root.root.type == bfd_link_hash_defined
6713 || hash->root.root.type == bfd_link_hash_defweak)
6714 {
6715 sym_sec = hash->root.root.u.def.section;
6716 sym_value = hash->root.root.u.def.value;
6717
6718 struct elf32_arm_link_hash_table *globals =
6719 elf32_arm_hash_table (info);
6720
6721 /* For a destination in a shared library,
6722 use the PLT stub as target address to
6723 decide whether a branch stub is
6724 needed. */
6725 if (globals != NULL
6726 && globals->root.splt != NULL
6727 && hash != NULL
6728 && hash->root.plt.offset != (bfd_vma) -1)
6729 {
6730 sym_sec = globals->root.splt;
6731 sym_value = hash->root.plt.offset;
6732 if (sym_sec->output_section != NULL)
6733 destination = (sym_value
6734 + sym_sec->output_offset
6735 + sym_sec->output_section->vma);
6736 }
6737 else if (sym_sec->output_section != NULL)
6738 destination = (sym_value + irela->r_addend
6739 + sym_sec->output_offset
6740 + sym_sec->output_section->vma);
6741 }
6742 else if ((hash->root.root.type == bfd_link_hash_undefined)
6743 || (hash->root.root.type == bfd_link_hash_undefweak))
6744 {
6745 /* For a shared library, use the PLT stub as
6746 target address to decide whether a long
6747 branch stub is needed.
6748 For absolute code, they cannot be handled. */
6749 struct elf32_arm_link_hash_table *globals =
6750 elf32_arm_hash_table (info);
6751
6752 if (globals != NULL
6753 && globals->root.splt != NULL
6754 && hash != NULL
6755 && hash->root.plt.offset != (bfd_vma) -1)
6756 {
6757 sym_sec = globals->root.splt;
6758 sym_value = hash->root.plt.offset;
6759 if (sym_sec->output_section != NULL)
6760 destination = (sym_value
6761 + sym_sec->output_offset
6762 + sym_sec->output_section->vma);
6763 }
6764 else
6765 continue;
6766 }
6767 else
6768 {
6769 bfd_set_error (bfd_error_bad_value);
6770 goto error_ret_free_internal;
6771 }
6772 st_type = hash->root.type;
6773 branch_type =
6774 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6775 sym_name = hash->root.root.root.string;
6776 }
6777
6778 do
6779 {
6780 bool new_stub;
6781 struct elf32_arm_stub_hash_entry *stub_entry;
6782
6783 /* Determine what (if any) linker stub is needed. */
6784 stub_type = arm_type_of_stub (info, section, irela,
6785 st_type, &branch_type,
6786 hash, destination, sym_sec,
6787 input_bfd, sym_name);
6788 if (stub_type == arm_stub_none)
6789 break;
6790
6791 /* We've either created a stub for this reloc already,
6792 or we are about to. */
6793 stub_entry =
6794 elf32_arm_create_stub (htab, stub_type, section, irela,
6795 sym_sec, hash,
6796 (char *) sym_name, sym_value,
6797 branch_type, &new_stub);
6798
6799 created_stub = stub_entry != NULL;
6800 if (!created_stub)
6801 goto error_ret_free_internal;
6802 else if (!new_stub)
6803 break;
6804 else
6805 stub_changed = true;
6806 }
6807 while (0);
6808
6809 /* Look for relocations which might trigger Cortex-A8
6810 erratum. */
6811 if (htab->fix_cortex_a8
6812 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6813 || r_type == (unsigned int) R_ARM_THM_JUMP19
6814 || r_type == (unsigned int) R_ARM_THM_CALL
6815 || r_type == (unsigned int) R_ARM_THM_XPC22))
6816 {
6817 bfd_vma from = section->output_section->vma
6818 + section->output_offset
6819 + irela->r_offset;
6820
6821 if ((from & 0xfff) == 0xffe)
6822 {
6823 /* Found a candidate. Note we haven't checked the
6824 destination is within 4K here: if we do so (and
6825 don't create an entry in a8_relocs) we can't tell
6826 that a branch should have been relocated when
6827 scanning later. */
6828 if (num_a8_relocs == a8_reloc_table_size)
6829 {
6830 a8_reloc_table_size *= 2;
6831 a8_relocs = (struct a8_erratum_reloc *)
6832 bfd_realloc (a8_relocs,
6833 sizeof (struct a8_erratum_reloc)
6834 * a8_reloc_table_size);
6835 }
6836
6837 a8_relocs[num_a8_relocs].from = from;
6838 a8_relocs[num_a8_relocs].destination = destination;
6839 a8_relocs[num_a8_relocs].r_type = r_type;
6840 a8_relocs[num_a8_relocs].branch_type = branch_type;
6841 a8_relocs[num_a8_relocs].sym_name = sym_name;
6842 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6843 a8_relocs[num_a8_relocs].hash = hash;
6844
6845 num_a8_relocs++;
6846 }
6847 }
6848 }
6849
6850 /* We're done with the internal relocs, free them. */
6851 if (elf_section_data (section)->relocs == NULL)
6852 free (internal_relocs);
6853 }
6854
6855 if (htab->fix_cortex_a8)
6856 {
6857 /* Sort relocs which might apply to Cortex-A8 erratum. */
6858 qsort (a8_relocs, num_a8_relocs,
6859 sizeof (struct a8_erratum_reloc),
6860 &a8_reloc_compare);
6861
6862 /* Scan for branches which might trigger Cortex-A8 erratum. */
6863 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6864 &num_a8_fixes, &a8_fix_table_size,
6865 a8_relocs, num_a8_relocs,
6866 prev_num_a8_fixes, &stub_changed)
6867 != 0)
6868 goto error_ret_free_local;
6869 }
6870
6871 if (local_syms != NULL
6872 && symtab_hdr->contents != (unsigned char *) local_syms)
6873 {
6874 if (!info->keep_memory)
6875 free (local_syms);
6876 else
6877 symtab_hdr->contents = (unsigned char *) local_syms;
6878 }
6879 }
6880
6881 if (first_veneer_scan
6882 && !set_cmse_veneer_addr_from_implib (info, htab,
6883 &cmse_stub_created))
6884 ret = false;
6885
6886 if (prev_num_a8_fixes != num_a8_fixes)
6887 stub_changed = true;
6888
6889 if (!stub_changed)
6890 break;
6891
6892 /* OK, we've added some stubs. Find out the new size of the
6893 stub sections. */
6894 for (stub_sec = htab->stub_bfd->sections;
6895 stub_sec != NULL;
6896 stub_sec = stub_sec->next)
6897 {
6898 /* Ignore non-stub sections. */
6899 if (!strstr (stub_sec->name, STUB_SUFFIX))
6900 continue;
6901
6902 stub_sec->size = 0;
6903 }
6904
6905 /* Add new SG veneers after those already in the input import
6906 library. */
6907 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6908 stub_type++)
6909 {
6910 bfd_vma *start_offset_p;
6911 asection **stub_sec_p;
6912
6913 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6914 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6915 if (start_offset_p == NULL)
6916 continue;
6917
6918 BFD_ASSERT (stub_sec_p != NULL);
6919 if (*stub_sec_p != NULL)
6920 (*stub_sec_p)->size = *start_offset_p;
6921 }
6922
6923 /* Compute stub section size, considering padding. */
6924 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6925 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6926 stub_type++)
6927 {
6928 int size, padding;
6929 asection **stub_sec_p;
6930
6931 padding = arm_dedicated_stub_section_padding (stub_type);
6932 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6933 /* Skip if no stub input section or no stub section padding
6934 required. */
6935 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6936 continue;
6937 /* Stub section padding required but no dedicated section. */
6938 BFD_ASSERT (stub_sec_p);
6939
6940 size = (*stub_sec_p)->size;
6941 size = (size + padding - 1) & ~(padding - 1);
6942 (*stub_sec_p)->size = size;
6943 }
6944
6945 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6946 if (htab->fix_cortex_a8)
6947 for (i = 0; i < num_a8_fixes; i++)
6948 {
6949 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6950 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6951
6952 if (stub_sec == NULL)
6953 return false;
6954
6955 stub_sec->size
6956 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6957 NULL);
6958 }
6959
6960
6961 /* Ask the linker to do its stuff. */
6962 (*htab->layout_sections_again) ();
6963 first_veneer_scan = false;
6964 }
6965
6966 /* Add stubs for Cortex-A8 erratum fixes now. */
6967 if (htab->fix_cortex_a8)
6968 {
6969 for (i = 0; i < num_a8_fixes; i++)
6970 {
6971 struct elf32_arm_stub_hash_entry *stub_entry;
6972 char *stub_name = a8_fixes[i].stub_name;
6973 asection *section = a8_fixes[i].section;
6974 unsigned int section_id = a8_fixes[i].section->id;
6975 asection *link_sec = htab->stub_group[section_id].link_sec;
6976 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6977 const insn_sequence *template_sequence;
6978 int template_size, size = 0;
6979
6980 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6981 true, false);
6982 if (stub_entry == NULL)
6983 {
6984 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6985 section->owner, stub_name);
6986 return false;
6987 }
6988
6989 stub_entry->stub_sec = stub_sec;
6990 stub_entry->stub_offset = (bfd_vma) -1;
6991 stub_entry->id_sec = link_sec;
6992 stub_entry->stub_type = a8_fixes[i].stub_type;
6993 stub_entry->source_value = a8_fixes[i].offset;
6994 stub_entry->target_section = a8_fixes[i].section;
6995 stub_entry->target_value = a8_fixes[i].target_offset;
6996 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6997 stub_entry->branch_type = a8_fixes[i].branch_type;
6998
6999 size = find_stub_size_and_template (a8_fixes[i].stub_type,
7000 &template_sequence,
7001 &template_size);
7002
7003 stub_entry->stub_size = size;
7004 stub_entry->stub_template = template_sequence;
7005 stub_entry->stub_template_size = template_size;
7006 }
7007
7008 /* Stash the Cortex-A8 erratum fix array for use later in
7009 elf32_arm_write_section(). */
7010 htab->a8_erratum_fixes = a8_fixes;
7011 htab->num_a8_erratum_fixes = num_a8_fixes;
7012 }
7013 else
7014 {
7015 htab->a8_erratum_fixes = NULL;
7016 htab->num_a8_erratum_fixes = 0;
7017 }
7018 return ret;
7019 }
7020
7021 /* Build all the stubs associated with the current output file. The
7022 stubs are kept in a hash table attached to the main linker hash
7023 table. We also set up the .plt entries for statically linked PIC
7024 functions here. This function is called via arm_elf_finish in the
7025 linker. */
7026
7027 bool
7028 elf32_arm_build_stubs (struct bfd_link_info *info)
7029 {
7030 asection *stub_sec;
7031 struct bfd_hash_table *table;
7032 enum elf32_arm_stub_type stub_type;
7033 struct elf32_arm_link_hash_table *htab;
7034
7035 htab = elf32_arm_hash_table (info);
7036 if (htab == NULL)
7037 return false;
7038
7039 for (stub_sec = htab->stub_bfd->sections;
7040 stub_sec != NULL;
7041 stub_sec = stub_sec->next)
7042 {
7043 bfd_size_type size;
7044
7045 /* Ignore non-stub sections. */
7046 if (!strstr (stub_sec->name, STUB_SUFFIX))
7047 continue;
7048
7049 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
7050 must at least be done for stub section requiring padding and for SG
7051 veneers to ensure that a non secure code branching to a removed SG
7052 veneer causes an error. */
7053 size = stub_sec->size;
7054 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
7055 if (stub_sec->contents == NULL && size != 0)
7056 return false;
7057
7058 stub_sec->size = 0;
7059 }
7060
7061 /* Add new SG veneers after those already in the input import library. */
7062 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7063 {
7064 bfd_vma *start_offset_p;
7065 asection **stub_sec_p;
7066
7067 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
7068 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
7069 if (start_offset_p == NULL)
7070 continue;
7071
7072 BFD_ASSERT (stub_sec_p != NULL);
7073 if (*stub_sec_p != NULL)
7074 (*stub_sec_p)->size = *start_offset_p;
7075 }
7076
7077 /* Build the stubs as directed by the stub hash table. */
7078 table = &htab->stub_hash_table;
7079 bfd_hash_traverse (table, arm_build_one_stub, info);
7080 if (htab->fix_cortex_a8)
7081 {
7082 /* Place the cortex a8 stubs last. */
7083 htab->fix_cortex_a8 = -1;
7084 bfd_hash_traverse (table, arm_build_one_stub, info);
7085 }
7086
7087 return true;
7088 }
7089
7090 /* Locate the Thumb encoded calling stub for NAME. */
7091
7092 static struct elf_link_hash_entry *
7093 find_thumb_glue (struct bfd_link_info *link_info,
7094 const char *name,
7095 char **error_message)
7096 {
7097 char *tmp_name;
7098 struct elf_link_hash_entry *hash;
7099 struct elf32_arm_link_hash_table *hash_table;
7100
7101 /* We need a pointer to the armelf specific hash table. */
7102 hash_table = elf32_arm_hash_table (link_info);
7103 if (hash_table == NULL)
7104 return NULL;
7105
7106 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7107 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
7108
7109 BFD_ASSERT (tmp_name);
7110
7111 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
7112
7113 hash = elf_link_hash_lookup
7114 (&(hash_table)->root, tmp_name, false, false, true);
7115
7116 if (hash == NULL)
7117 {
7118 *error_message = bfd_asprintf (_("unable to find %s glue '%s' for '%s'"),
7119 "Thumb", tmp_name, name);
7120 if (*error_message == NULL)
7121 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7122 }
7123
7124 free (tmp_name);
7125
7126 return hash;
7127 }
7128
7129 /* Locate the ARM encoded calling stub for NAME. */
7130
7131 static struct elf_link_hash_entry *
7132 find_arm_glue (struct bfd_link_info *link_info,
7133 const char *name,
7134 char **error_message)
7135 {
7136 char *tmp_name;
7137 struct elf_link_hash_entry *myh;
7138 struct elf32_arm_link_hash_table *hash_table;
7139
7140 /* We need a pointer to the elfarm specific hash table. */
7141 hash_table = elf32_arm_hash_table (link_info);
7142 if (hash_table == NULL)
7143 return NULL;
7144
7145 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7146 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7147 BFD_ASSERT (tmp_name);
7148
7149 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7150
7151 myh = elf_link_hash_lookup
7152 (&(hash_table)->root, tmp_name, false, false, true);
7153
7154 if (myh == NULL)
7155 {
7156 *error_message = bfd_asprintf (_("unable to find %s glue '%s' for '%s'"),
7157 "ARM", tmp_name, name);
7158 if (*error_message == NULL)
7159 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7160 }
7161 free (tmp_name);
7162
7163 return myh;
7164 }
7165
7166 /* ARM->Thumb glue (static images):
7167
7168 .arm
7169 __func_from_arm:
7170 ldr r12, __func_addr
7171 bx r12
7172 __func_addr:
7173 .word func @ behave as if you saw a ARM_32 reloc.
7174
7175 (v5t static images)
7176 .arm
7177 __func_from_arm:
7178 ldr pc, __func_addr
7179 __func_addr:
7180 .word func @ behave as if you saw a ARM_32 reloc.
7181
7182 (relocatable images)
7183 .arm
7184 __func_from_arm:
7185 ldr r12, __func_offset
7186 add r12, r12, pc
7187 bx r12
7188 __func_offset:
7189 .word func - . */
7190
7191 #define ARM2THUMB_STATIC_GLUE_SIZE 12
7192 static const insn32 a2t1_ldr_insn = 0xe59fc000;
7193 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
7194 static const insn32 a2t3_func_addr_insn = 0x00000001;
7195
7196 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7197 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
7198 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
7199
7200 #define ARM2THUMB_PIC_GLUE_SIZE 16
7201 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
7202 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
7203 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
7204
7205 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
7206
7207 .thumb .thumb
7208 .align 2 .align 2
7209 __func_from_thumb: __func_from_thumb:
7210 bx pc push {r6, lr}
7211 nop ldr r6, __func_addr
7212 .arm mov lr, pc
7213 b func bx r6
7214 .arm
7215 ;; back_to_thumb
7216 ldmia r13! {r6, lr}
7217 bx lr
7218 __func_addr:
7219 .word func */
7220
7221 #define THUMB2ARM_GLUE_SIZE 8
7222 static const insn16 t2a1_bx_pc_insn = 0x4778;
7223 static const insn16 t2a2_noop_insn = 0x46c0;
7224 static const insn32 t2a3_b_insn = 0xea000000;
7225
7226 #define VFP11_ERRATUM_VENEER_SIZE 8
7227 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7228 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7229
7230 #define ARM_BX_VENEER_SIZE 12
7231 static const insn32 armbx1_tst_insn = 0xe3100001;
7232 static const insn32 armbx2_moveq_insn = 0x01a0f000;
7233 static const insn32 armbx3_bx_insn = 0xe12fff10;
7234
7235 #ifndef ELFARM_NABI_C_INCLUDED
7236 static void
7237 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
7238 {
7239 asection * s;
7240 bfd_byte * contents;
7241
7242 if (size == 0)
7243 {
7244 /* Do not include empty glue sections in the output. */
7245 if (abfd != NULL)
7246 {
7247 s = bfd_get_linker_section (abfd, name);
7248 if (s != NULL)
7249 s->flags |= SEC_EXCLUDE;
7250 }
7251 return;
7252 }
7253
7254 BFD_ASSERT (abfd != NULL);
7255
7256 s = bfd_get_linker_section (abfd, name);
7257 BFD_ASSERT (s != NULL);
7258
7259 contents = (bfd_byte *) bfd_zalloc (abfd, size);
7260
7261 BFD_ASSERT (s->size == size);
7262 s->contents = contents;
7263 }
7264
7265 bool
7266 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
7267 {
7268 struct elf32_arm_link_hash_table * globals;
7269
7270 globals = elf32_arm_hash_table (info);
7271 BFD_ASSERT (globals != NULL);
7272
7273 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7274 globals->arm_glue_size,
7275 ARM2THUMB_GLUE_SECTION_NAME);
7276
7277 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7278 globals->thumb_glue_size,
7279 THUMB2ARM_GLUE_SECTION_NAME);
7280
7281 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7282 globals->vfp11_erratum_glue_size,
7283 VFP11_ERRATUM_VENEER_SECTION_NAME);
7284
7285 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7286 globals->stm32l4xx_erratum_glue_size,
7287 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7288
7289 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7290 globals->bx_glue_size,
7291 ARM_BX_GLUE_SECTION_NAME);
7292
7293 return true;
7294 }
7295
7296 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7297 returns the symbol identifying the stub. */
7298
7299 static struct elf_link_hash_entry *
7300 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
7301 struct elf_link_hash_entry * h)
7302 {
7303 const char * name = h->root.root.string;
7304 asection * s;
7305 char * tmp_name;
7306 struct elf_link_hash_entry * myh;
7307 struct bfd_link_hash_entry * bh;
7308 struct elf32_arm_link_hash_table * globals;
7309 bfd_vma val;
7310 bfd_size_type size;
7311
7312 globals = elf32_arm_hash_table (link_info);
7313 BFD_ASSERT (globals != NULL);
7314 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7315
7316 s = bfd_get_linker_section
7317 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
7318
7319 BFD_ASSERT (s != NULL);
7320
7321 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7322 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7323 BFD_ASSERT (tmp_name);
7324
7325 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7326
7327 myh = elf_link_hash_lookup
7328 (&(globals)->root, tmp_name, false, false, true);
7329
7330 if (myh != NULL)
7331 {
7332 /* We've already seen this guy. */
7333 free (tmp_name);
7334 return myh;
7335 }
7336
7337 /* The only trick here is using hash_table->arm_glue_size as the value.
7338 Even though the section isn't allocated yet, this is where we will be
7339 putting it. The +1 on the value marks that the stub has not been
7340 output yet - not that it is a Thumb function. */
7341 bh = NULL;
7342 val = globals->arm_glue_size + 1;
7343 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7344 tmp_name, BSF_GLOBAL, s, val,
7345 NULL, true, false, &bh);
7346
7347 myh = (struct elf_link_hash_entry *) bh;
7348 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7349 myh->forced_local = 1;
7350
7351 free (tmp_name);
7352
7353 if (bfd_link_pic (link_info)
7354 || globals->root.is_relocatable_executable
7355 || globals->pic_veneer)
7356 size = ARM2THUMB_PIC_GLUE_SIZE;
7357 else if (globals->use_blx)
7358 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7359 else
7360 size = ARM2THUMB_STATIC_GLUE_SIZE;
7361
7362 s->size += size;
7363 globals->arm_glue_size += size;
7364
7365 return myh;
7366 }
7367
7368 /* Allocate space for ARMv4 BX veneers. */
7369
7370 static void
7371 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7372 {
7373 asection * s;
7374 struct elf32_arm_link_hash_table *globals;
7375 char *tmp_name;
7376 struct elf_link_hash_entry *myh;
7377 struct bfd_link_hash_entry *bh;
7378 bfd_vma val;
7379
7380 /* BX PC does not need a veneer. */
7381 if (reg == 15)
7382 return;
7383
7384 globals = elf32_arm_hash_table (link_info);
7385 BFD_ASSERT (globals != NULL);
7386 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7387
7388 /* Check if this veneer has already been allocated. */
7389 if (globals->bx_glue_offset[reg])
7390 return;
7391
7392 s = bfd_get_linker_section
7393 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7394
7395 BFD_ASSERT (s != NULL);
7396
7397 /* Add symbol for veneer. */
7398 tmp_name = (char *)
7399 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7400 BFD_ASSERT (tmp_name);
7401
7402 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7403
7404 myh = elf_link_hash_lookup
7405 (&(globals)->root, tmp_name, false, false, false);
7406
7407 BFD_ASSERT (myh == NULL);
7408
7409 bh = NULL;
7410 val = globals->bx_glue_size;
7411 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7412 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7413 NULL, true, false, &bh);
7414
7415 myh = (struct elf_link_hash_entry *) bh;
7416 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7417 myh->forced_local = 1;
7418
7419 s->size += ARM_BX_VENEER_SIZE;
7420 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7421 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7422 }
7423
7424
7425 /* Add an entry to the code/data map for section SEC. */
7426
7427 static void
7428 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7429 {
7430 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7431 unsigned int newidx;
7432
7433 if (sec_data->map == NULL)
7434 {
7435 sec_data->map = (elf32_arm_section_map *)
7436 bfd_malloc (sizeof (elf32_arm_section_map));
7437 sec_data->mapcount = 0;
7438 sec_data->mapsize = 1;
7439 }
7440
7441 newidx = sec_data->mapcount++;
7442
7443 if (sec_data->mapcount > sec_data->mapsize)
7444 {
7445 sec_data->mapsize *= 2;
7446 sec_data->map = (elf32_arm_section_map *)
7447 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7448 * sizeof (elf32_arm_section_map));
7449 }
7450
7451 if (sec_data->map)
7452 {
7453 sec_data->map[newidx].vma = vma;
7454 sec_data->map[newidx].type = type;
7455 }
7456 }
7457
7458
7459 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7460 veneers are handled for now. */
7461
7462 static bfd_vma
7463 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7464 elf32_vfp11_erratum_list *branch,
7465 bfd *branch_bfd,
7466 asection *branch_sec,
7467 unsigned int offset)
7468 {
7469 asection *s;
7470 struct elf32_arm_link_hash_table *hash_table;
7471 char *tmp_name;
7472 struct elf_link_hash_entry *myh;
7473 struct bfd_link_hash_entry *bh;
7474 bfd_vma val;
7475 struct _arm_elf_section_data *sec_data;
7476 elf32_vfp11_erratum_list *newerr;
7477
7478 hash_table = elf32_arm_hash_table (link_info);
7479 BFD_ASSERT (hash_table != NULL);
7480 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7481
7482 s = bfd_get_linker_section
7483 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7484
7485 sec_data = elf32_arm_section_data (s);
7486
7487 BFD_ASSERT (s != NULL);
7488
7489 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7490 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7491 BFD_ASSERT (tmp_name);
7492
7493 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7494 hash_table->num_vfp11_fixes);
7495
7496 myh = elf_link_hash_lookup
7497 (&(hash_table)->root, tmp_name, false, false, false);
7498
7499 BFD_ASSERT (myh == NULL);
7500
7501 bh = NULL;
7502 val = hash_table->vfp11_erratum_glue_size;
7503 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7504 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7505 NULL, true, false, &bh);
7506
7507 myh = (struct elf_link_hash_entry *) bh;
7508 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7509 myh->forced_local = 1;
7510
7511 /* Link veneer back to calling location. */
7512 sec_data->erratumcount += 1;
7513 newerr = (elf32_vfp11_erratum_list *)
7514 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7515
7516 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7517 newerr->vma = -1;
7518 newerr->u.v.branch = branch;
7519 newerr->u.v.id = hash_table->num_vfp11_fixes;
7520 branch->u.b.veneer = newerr;
7521
7522 newerr->next = sec_data->erratumlist;
7523 sec_data->erratumlist = newerr;
7524
7525 /* A symbol for the return from the veneer. */
7526 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7527 hash_table->num_vfp11_fixes);
7528
7529 myh = elf_link_hash_lookup
7530 (&(hash_table)->root, tmp_name, false, false, false);
7531
7532 if (myh != NULL)
7533 abort ();
7534
7535 bh = NULL;
7536 val = offset + 4;
7537 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7538 branch_sec, val, NULL, true, false, &bh);
7539
7540 myh = (struct elf_link_hash_entry *) bh;
7541 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7542 myh->forced_local = 1;
7543
7544 free (tmp_name);
7545
7546 /* Generate a mapping symbol for the veneer section, and explicitly add an
7547 entry for that symbol to the code/data map for the section. */
7548 if (hash_table->vfp11_erratum_glue_size == 0)
7549 {
7550 bh = NULL;
7551 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7552 ever requires this erratum fix. */
7553 _bfd_generic_link_add_one_symbol (link_info,
7554 hash_table->bfd_of_glue_owner, "$a",
7555 BSF_LOCAL, s, 0, NULL,
7556 true, false, &bh);
7557
7558 myh = (struct elf_link_hash_entry *) bh;
7559 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7560 myh->forced_local = 1;
7561
7562 /* The elf32_arm_init_maps function only cares about symbols from input
7563 BFDs. We must make a note of this generated mapping symbol
7564 ourselves so that code byteswapping works properly in
7565 elf32_arm_write_section. */
7566 elf32_arm_section_map_add (s, 'a', 0);
7567 }
7568
7569 s->size += VFP11_ERRATUM_VENEER_SIZE;
7570 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7571 hash_table->num_vfp11_fixes++;
7572
7573 /* The offset of the veneer. */
7574 return val;
7575 }
7576
7577 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7578 veneers need to be handled because used only in Cortex-M. */
7579
7580 static bfd_vma
7581 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7582 elf32_stm32l4xx_erratum_list *branch,
7583 bfd *branch_bfd,
7584 asection *branch_sec,
7585 unsigned int offset,
7586 bfd_size_type veneer_size)
7587 {
7588 asection *s;
7589 struct elf32_arm_link_hash_table *hash_table;
7590 char *tmp_name;
7591 struct elf_link_hash_entry *myh;
7592 struct bfd_link_hash_entry *bh;
7593 bfd_vma val;
7594 struct _arm_elf_section_data *sec_data;
7595 elf32_stm32l4xx_erratum_list *newerr;
7596
7597 hash_table = elf32_arm_hash_table (link_info);
7598 BFD_ASSERT (hash_table != NULL);
7599 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7600
7601 s = bfd_get_linker_section
7602 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7603
7604 BFD_ASSERT (s != NULL);
7605
7606 sec_data = elf32_arm_section_data (s);
7607
7608 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7609 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7610 BFD_ASSERT (tmp_name);
7611
7612 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7613 hash_table->num_stm32l4xx_fixes);
7614
7615 myh = elf_link_hash_lookup
7616 (&(hash_table)->root, tmp_name, false, false, false);
7617
7618 BFD_ASSERT (myh == NULL);
7619
7620 bh = NULL;
7621 val = hash_table->stm32l4xx_erratum_glue_size;
7622 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7623 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7624 NULL, true, false, &bh);
7625
7626 myh = (struct elf_link_hash_entry *) bh;
7627 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7628 myh->forced_local = 1;
7629
7630 /* Link veneer back to calling location. */
7631 sec_data->stm32l4xx_erratumcount += 1;
7632 newerr = (elf32_stm32l4xx_erratum_list *)
7633 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7634
7635 newerr->type = STM32L4XX_ERRATUM_VENEER;
7636 newerr->vma = -1;
7637 newerr->u.v.branch = branch;
7638 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7639 branch->u.b.veneer = newerr;
7640
7641 newerr->next = sec_data->stm32l4xx_erratumlist;
7642 sec_data->stm32l4xx_erratumlist = newerr;
7643
7644 /* A symbol for the return from the veneer. */
7645 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7646 hash_table->num_stm32l4xx_fixes);
7647
7648 myh = elf_link_hash_lookup
7649 (&(hash_table)->root, tmp_name, false, false, false);
7650
7651 if (myh != NULL)
7652 abort ();
7653
7654 bh = NULL;
7655 val = offset + 4;
7656 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7657 branch_sec, val, NULL, true, false, &bh);
7658
7659 myh = (struct elf_link_hash_entry *) bh;
7660 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7661 myh->forced_local = 1;
7662
7663 free (tmp_name);
7664
7665 /* Generate a mapping symbol for the veneer section, and explicitly add an
7666 entry for that symbol to the code/data map for the section. */
7667 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7668 {
7669 bh = NULL;
7670 /* Creates a THUMB symbol since there is no other choice. */
7671 _bfd_generic_link_add_one_symbol (link_info,
7672 hash_table->bfd_of_glue_owner, "$t",
7673 BSF_LOCAL, s, 0, NULL,
7674 true, false, &bh);
7675
7676 myh = (struct elf_link_hash_entry *) bh;
7677 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7678 myh->forced_local = 1;
7679
7680 /* The elf32_arm_init_maps function only cares about symbols from input
7681 BFDs. We must make a note of this generated mapping symbol
7682 ourselves so that code byteswapping works properly in
7683 elf32_arm_write_section. */
7684 elf32_arm_section_map_add (s, 't', 0);
7685 }
7686
7687 s->size += veneer_size;
7688 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7689 hash_table->num_stm32l4xx_fixes++;
7690
7691 /* The offset of the veneer. */
7692 return val;
7693 }
7694
7695 #define ARM_GLUE_SECTION_FLAGS \
7696 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7697 | SEC_READONLY | SEC_LINKER_CREATED)
7698
7699 /* Create a fake section for use by the ARM backend of the linker. */
7700
7701 static bool
7702 arm_make_glue_section (bfd * abfd, const char * name)
7703 {
7704 asection * sec;
7705
7706 sec = bfd_get_linker_section (abfd, name);
7707 if (sec != NULL)
7708 /* Already made. */
7709 return true;
7710
7711 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7712
7713 if (sec == NULL
7714 || !bfd_set_section_alignment (sec, 2))
7715 return false;
7716
7717 /* Set the gc mark to prevent the section from being removed by garbage
7718 collection, despite the fact that no relocs refer to this section. */
7719 sec->gc_mark = 1;
7720
7721 return true;
7722 }
7723
7724 /* Set size of .plt entries. This function is called from the
7725 linker scripts in ld/emultempl/{armelf}.em. */
7726
7727 void
7728 bfd_elf32_arm_use_long_plt (void)
7729 {
7730 elf32_arm_use_long_plt_entry = true;
7731 }
7732
7733 /* Add the glue sections to ABFD. This function is called from the
7734 linker scripts in ld/emultempl/{armelf}.em. */
7735
7736 bool
7737 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7738 struct bfd_link_info *info)
7739 {
7740 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7741 bool dostm32l4xx = globals
7742 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7743 bool addglue;
7744
7745 /* If we are only performing a partial
7746 link do not bother adding the glue. */
7747 if (bfd_link_relocatable (info))
7748 return true;
7749
7750 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7751 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7752 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7753 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7754
7755 if (!dostm32l4xx)
7756 return addglue;
7757
7758 return addglue
7759 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7760 }
7761
7762 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7763 ensures they are not marked for deletion by
7764 strip_excluded_output_sections () when veneers are going to be created
7765 later. Not doing so would trigger assert on empty section size in
7766 lang_size_sections_1 (). */
7767
7768 void
7769 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7770 {
7771 enum elf32_arm_stub_type stub_type;
7772
7773 /* If we are only performing a partial
7774 link do not bother adding the glue. */
7775 if (bfd_link_relocatable (info))
7776 return;
7777
7778 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7779 {
7780 asection *out_sec;
7781 const char *out_sec_name;
7782
7783 if (!arm_dedicated_stub_output_section_required (stub_type))
7784 continue;
7785
7786 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7787 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7788 if (out_sec != NULL)
7789 out_sec->flags |= SEC_KEEP;
7790 }
7791 }
7792
7793 /* Select a BFD to be used to hold the sections used by the glue code.
7794 This function is called from the linker scripts in ld/emultempl/
7795 {armelf/pe}.em. */
7796
7797 bool
7798 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7799 {
7800 struct elf32_arm_link_hash_table *globals;
7801
7802 /* If we are only performing a partial link
7803 do not bother getting a bfd to hold the glue. */
7804 if (bfd_link_relocatable (info))
7805 return true;
7806
7807 /* Make sure we don't attach the glue sections to a dynamic object. */
7808 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7809
7810 globals = elf32_arm_hash_table (info);
7811 BFD_ASSERT (globals != NULL);
7812
7813 if (globals->bfd_of_glue_owner != NULL)
7814 return true;
7815
7816 /* Save the bfd for later use. */
7817 globals->bfd_of_glue_owner = abfd;
7818
7819 return true;
7820 }
7821
7822 static void
7823 check_use_blx (struct elf32_arm_link_hash_table *globals)
7824 {
7825 int cpu_arch;
7826
7827 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7828 Tag_CPU_arch);
7829
7830 if (globals->fix_arm1176)
7831 {
7832 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7833 globals->use_blx = 1;
7834 }
7835 else
7836 {
7837 if (cpu_arch > TAG_CPU_ARCH_V4T)
7838 globals->use_blx = 1;
7839 }
7840 }
7841
7842 bool
7843 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7844 struct bfd_link_info *link_info)
7845 {
7846 Elf_Internal_Shdr *symtab_hdr;
7847 Elf_Internal_Rela *internal_relocs = NULL;
7848 Elf_Internal_Rela *irel, *irelend;
7849 bfd_byte *contents = NULL;
7850
7851 asection *sec;
7852 struct elf32_arm_link_hash_table *globals;
7853
7854 /* If we are only performing a partial link do not bother
7855 to construct any glue. */
7856 if (bfd_link_relocatable (link_info))
7857 return true;
7858
7859 /* Here we have a bfd that is to be included on the link. We have a
7860 hook to do reloc rummaging, before section sizes are nailed down. */
7861 globals = elf32_arm_hash_table (link_info);
7862 BFD_ASSERT (globals != NULL);
7863
7864 check_use_blx (globals);
7865
7866 if (globals->byteswap_code && !bfd_big_endian (abfd))
7867 {
7868 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7869 abfd);
7870 return false;
7871 }
7872
7873 /* PR 5398: If we have not decided to include any loadable sections in
7874 the output then we will not have a glue owner bfd. This is OK, it
7875 just means that there is nothing else for us to do here. */
7876 if (globals->bfd_of_glue_owner == NULL)
7877 return true;
7878
7879 /* Rummage around all the relocs and map the glue vectors. */
7880 sec = abfd->sections;
7881
7882 if (sec == NULL)
7883 return true;
7884
7885 for (; sec != NULL; sec = sec->next)
7886 {
7887 if (sec->reloc_count == 0)
7888 continue;
7889
7890 if ((sec->flags & SEC_EXCLUDE) != 0
7891 || (sec->flags & SEC_HAS_CONTENTS) == 0)
7892 continue;
7893
7894 symtab_hdr = & elf_symtab_hdr (abfd);
7895
7896 /* Load the relocs. */
7897 internal_relocs
7898 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, false);
7899
7900 if (internal_relocs == NULL)
7901 goto error_return;
7902
7903 irelend = internal_relocs + sec->reloc_count;
7904 for (irel = internal_relocs; irel < irelend; irel++)
7905 {
7906 long r_type;
7907 unsigned long r_index;
7908
7909 struct elf_link_hash_entry *h;
7910
7911 r_type = ELF32_R_TYPE (irel->r_info);
7912 r_index = ELF32_R_SYM (irel->r_info);
7913
7914 /* These are the only relocation types we care about. */
7915 if ( r_type != R_ARM_PC24
7916 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7917 continue;
7918
7919 /* Get the section contents if we haven't done so already. */
7920 if (contents == NULL)
7921 {
7922 /* Get cached copy if it exists. */
7923 if (elf_section_data (sec)->this_hdr.contents != NULL)
7924 contents = elf_section_data (sec)->this_hdr.contents;
7925 else
7926 {
7927 /* Go get them off disk. */
7928 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7929 goto error_return;
7930 }
7931 }
7932
7933 if (r_type == R_ARM_V4BX)
7934 {
7935 int reg;
7936
7937 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7938 record_arm_bx_glue (link_info, reg);
7939 continue;
7940 }
7941
7942 /* If the relocation is not against a symbol it cannot concern us. */
7943 h = NULL;
7944
7945 /* We don't care about local symbols. */
7946 if (r_index < symtab_hdr->sh_info)
7947 continue;
7948
7949 /* This is an external symbol. */
7950 r_index -= symtab_hdr->sh_info;
7951 h = (struct elf_link_hash_entry *)
7952 elf_sym_hashes (abfd)[r_index];
7953
7954 /* If the relocation is against a static symbol it must be within
7955 the current section and so cannot be a cross ARM/Thumb relocation. */
7956 if (h == NULL)
7957 continue;
7958
7959 /* If the call will go through a PLT entry then we do not need
7960 glue. */
7961 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7962 continue;
7963
7964 switch (r_type)
7965 {
7966 case R_ARM_PC24:
7967 /* This one is a call from arm code. We need to look up
7968 the target of the call. If it is a thumb target, we
7969 insert glue. */
7970 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7971 == ST_BRANCH_TO_THUMB)
7972 record_arm_to_thumb_glue (link_info, h);
7973 break;
7974
7975 default:
7976 abort ();
7977 }
7978 }
7979
7980 if (elf_section_data (sec)->this_hdr.contents != contents)
7981 free (contents);
7982 contents = NULL;
7983
7984 if (elf_section_data (sec)->relocs != internal_relocs)
7985 free (internal_relocs);
7986 internal_relocs = NULL;
7987 }
7988
7989 return true;
7990
7991 error_return:
7992 if (elf_section_data (sec)->this_hdr.contents != contents)
7993 free (contents);
7994 if (elf_section_data (sec)->relocs != internal_relocs)
7995 free (internal_relocs);
7996
7997 return false;
7998 }
7999 #endif
8000
8001
8002 /* Initialise maps of ARM/Thumb/data for input BFDs. */
8003
8004 void
8005 bfd_elf32_arm_init_maps (bfd *abfd)
8006 {
8007 Elf_Internal_Sym *isymbuf;
8008 Elf_Internal_Shdr *hdr;
8009 unsigned int i, localsyms;
8010
8011 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
8012 if (! is_arm_elf (abfd))
8013 return;
8014
8015 if ((abfd->flags & DYNAMIC) != 0)
8016 return;
8017
8018 hdr = & elf_symtab_hdr (abfd);
8019 localsyms = hdr->sh_info;
8020
8021 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
8022 should contain the number of local symbols, which should come before any
8023 global symbols. Mapping symbols are always local. */
8024 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
8025 NULL);
8026
8027 /* No internal symbols read? Skip this BFD. */
8028 if (isymbuf == NULL)
8029 return;
8030
8031 for (i = 0; i < localsyms; i++)
8032 {
8033 Elf_Internal_Sym *isym = &isymbuf[i];
8034 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8035 const char *name;
8036
8037 if (sec != NULL
8038 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
8039 {
8040 name = bfd_elf_string_from_elf_section (abfd,
8041 hdr->sh_link, isym->st_name);
8042
8043 if (bfd_is_arm_special_symbol_name (name,
8044 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
8045 elf32_arm_section_map_add (sec, name[1], isym->st_value);
8046 }
8047 }
8048 }
8049
8050
8051 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
8052 say what they wanted. */
8053
8054 void
8055 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
8056 {
8057 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8058 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8059
8060 if (globals == NULL)
8061 return;
8062
8063 if (globals->fix_cortex_a8 == -1)
8064 {
8065 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
8066 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
8067 && (out_attr[Tag_CPU_arch_profile].i == 'A'
8068 || out_attr[Tag_CPU_arch_profile].i == 0))
8069 globals->fix_cortex_a8 = 1;
8070 else
8071 globals->fix_cortex_a8 = 0;
8072 }
8073 }
8074
8075
8076 void
8077 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
8078 {
8079 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8080 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8081
8082 if (globals == NULL)
8083 return;
8084 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
8085 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
8086 {
8087 switch (globals->vfp11_fix)
8088 {
8089 case BFD_ARM_VFP11_FIX_DEFAULT:
8090 case BFD_ARM_VFP11_FIX_NONE:
8091 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8092 break;
8093
8094 default:
8095 /* Give a warning, but do as the user requests anyway. */
8096 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
8097 "workaround is not necessary for target architecture"), obfd);
8098 }
8099 }
8100 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
8101 /* For earlier architectures, we might need the workaround, but do not
8102 enable it by default. If users is running with broken hardware, they
8103 must enable the erratum fix explicitly. */
8104 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8105 }
8106
8107 void
8108 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
8109 {
8110 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8111 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8112
8113 if (globals == NULL)
8114 return;
8115
8116 /* We assume only Cortex-M4 may require the fix. */
8117 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
8118 || out_attr[Tag_CPU_arch_profile].i != 'M')
8119 {
8120 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
8121 /* Give a warning, but do as the user requests anyway. */
8122 _bfd_error_handler
8123 (_("%pB: warning: selected STM32L4XX erratum "
8124 "workaround is not necessary for target architecture"), obfd);
8125 }
8126 }
8127
8128 enum bfd_arm_vfp11_pipe
8129 {
8130 VFP11_FMAC,
8131 VFP11_LS,
8132 VFP11_DS,
8133 VFP11_BAD
8134 };
8135
8136 /* Return a VFP register number. This is encoded as RX:X for single-precision
8137 registers, or X:RX for double-precision registers, where RX is the group of
8138 four bits in the instruction encoding and X is the single extension bit.
8139 RX and X fields are specified using their lowest (starting) bit. The return
8140 value is:
8141
8142 0...31: single-precision registers s0...s31
8143 32...63: double-precision registers d0...d31.
8144
8145 Although X should be zero for VFP11 (encoding d0...d15 only), we might
8146 encounter VFP3 instructions, so we allow the full range for DP registers. */
8147
8148 static unsigned int
8149 bfd_arm_vfp11_regno (unsigned int insn, bool is_double, unsigned int rx,
8150 unsigned int x)
8151 {
8152 if (is_double)
8153 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
8154 else
8155 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
8156 }
8157
8158 /* Set bits in *WMASK according to a register number REG as encoded by
8159 bfd_arm_vfp11_regno(). Ignore d16-d31. */
8160
8161 static void
8162 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
8163 {
8164 if (reg < 32)
8165 *wmask |= 1 << reg;
8166 else if (reg < 48)
8167 *wmask |= 3 << ((reg - 32) * 2);
8168 }
8169
8170 /* Return TRUE if WMASK overwrites anything in REGS. */
8171
8172 static bool
8173 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
8174 {
8175 int i;
8176
8177 for (i = 0; i < numregs; i++)
8178 {
8179 unsigned int reg = regs[i];
8180
8181 if (reg < 32 && (wmask & (1 << reg)) != 0)
8182 return true;
8183
8184 reg -= 32;
8185
8186 if (reg >= 16)
8187 continue;
8188
8189 if ((wmask & (3 << (reg * 2))) != 0)
8190 return true;
8191 }
8192
8193 return false;
8194 }
8195
8196 /* In this function, we're interested in two things: finding input registers
8197 for VFP data-processing instructions, and finding the set of registers which
8198 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
8199 hold the written set, so FLDM etc. are easy to deal with (we're only
8200 interested in 32 SP registers or 16 dp registers, due to the VFP version
8201 implemented by the chip in question). DP registers are marked by setting
8202 both SP registers in the write mask). */
8203
8204 static enum bfd_arm_vfp11_pipe
8205 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
8206 int *numregs)
8207 {
8208 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
8209 bool is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
8210
8211 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
8212 {
8213 unsigned int pqrs;
8214 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8215 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8216
8217 pqrs = ((insn & 0x00800000) >> 20)
8218 | ((insn & 0x00300000) >> 19)
8219 | ((insn & 0x00000040) >> 6);
8220
8221 switch (pqrs)
8222 {
8223 case 0: /* fmac[sd]. */
8224 case 1: /* fnmac[sd]. */
8225 case 2: /* fmsc[sd]. */
8226 case 3: /* fnmsc[sd]. */
8227 vpipe = VFP11_FMAC;
8228 bfd_arm_vfp11_write_mask (destmask, fd);
8229 regs[0] = fd;
8230 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8231 regs[2] = fm;
8232 *numregs = 3;
8233 break;
8234
8235 case 4: /* fmul[sd]. */
8236 case 5: /* fnmul[sd]. */
8237 case 6: /* fadd[sd]. */
8238 case 7: /* fsub[sd]. */
8239 vpipe = VFP11_FMAC;
8240 goto vfp_binop;
8241
8242 case 8: /* fdiv[sd]. */
8243 vpipe = VFP11_DS;
8244 vfp_binop:
8245 bfd_arm_vfp11_write_mask (destmask, fd);
8246 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8247 regs[1] = fm;
8248 *numregs = 2;
8249 break;
8250
8251 case 15: /* extended opcode. */
8252 {
8253 unsigned int extn = ((insn >> 15) & 0x1e)
8254 | ((insn >> 7) & 1);
8255
8256 switch (extn)
8257 {
8258 case 0: /* fcpy[sd]. */
8259 case 1: /* fabs[sd]. */
8260 case 2: /* fneg[sd]. */
8261 case 8: /* fcmp[sd]. */
8262 case 9: /* fcmpe[sd]. */
8263 case 10: /* fcmpz[sd]. */
8264 case 11: /* fcmpez[sd]. */
8265 case 16: /* fuito[sd]. */
8266 case 17: /* fsito[sd]. */
8267 case 24: /* ftoui[sd]. */
8268 case 25: /* ftouiz[sd]. */
8269 case 26: /* ftosi[sd]. */
8270 case 27: /* ftosiz[sd]. */
8271 /* These instructions will not bounce due to underflow. */
8272 *numregs = 0;
8273 vpipe = VFP11_FMAC;
8274 break;
8275
8276 case 3: /* fsqrt[sd]. */
8277 /* fsqrt cannot underflow, but it can (perhaps) overwrite
8278 registers to cause the erratum in previous instructions. */
8279 bfd_arm_vfp11_write_mask (destmask, fd);
8280 vpipe = VFP11_DS;
8281 break;
8282
8283 case 15: /* fcvt{ds,sd}. */
8284 {
8285 int rnum = 0;
8286
8287 bfd_arm_vfp11_write_mask (destmask, fd);
8288
8289 /* Only FCVTSD can underflow. */
8290 if ((insn & 0x100) != 0)
8291 regs[rnum++] = fm;
8292
8293 *numregs = rnum;
8294
8295 vpipe = VFP11_FMAC;
8296 }
8297 break;
8298
8299 default:
8300 return VFP11_BAD;
8301 }
8302 }
8303 break;
8304
8305 default:
8306 return VFP11_BAD;
8307 }
8308 }
8309 /* Two-register transfer. */
8310 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
8311 {
8312 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8313
8314 if ((insn & 0x100000) == 0)
8315 {
8316 if (is_double)
8317 bfd_arm_vfp11_write_mask (destmask, fm);
8318 else
8319 {
8320 bfd_arm_vfp11_write_mask (destmask, fm);
8321 bfd_arm_vfp11_write_mask (destmask, fm + 1);
8322 }
8323 }
8324
8325 vpipe = VFP11_LS;
8326 }
8327 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
8328 {
8329 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8330 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
8331
8332 switch (puw)
8333 {
8334 case 0: /* Two-reg transfer. We should catch these above. */
8335 abort ();
8336
8337 case 2: /* fldm[sdx]. */
8338 case 3:
8339 case 5:
8340 {
8341 unsigned int i, offset = insn & 0xff;
8342
8343 if (is_double)
8344 offset >>= 1;
8345
8346 for (i = fd; i < fd + offset; i++)
8347 bfd_arm_vfp11_write_mask (destmask, i);
8348 }
8349 break;
8350
8351 case 4: /* fld[sd]. */
8352 case 6:
8353 bfd_arm_vfp11_write_mask (destmask, fd);
8354 break;
8355
8356 default:
8357 return VFP11_BAD;
8358 }
8359
8360 vpipe = VFP11_LS;
8361 }
8362 /* Single-register transfer. Note L==0. */
8363 else if ((insn & 0x0f100e10) == 0x0e000a10)
8364 {
8365 unsigned int opcode = (insn >> 21) & 7;
8366 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8367
8368 switch (opcode)
8369 {
8370 case 0: /* fmsr/fmdlr. */
8371 case 1: /* fmdhr. */
8372 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8373 destination register. I don't know if this is exactly right,
8374 but it is the conservative choice. */
8375 bfd_arm_vfp11_write_mask (destmask, fn);
8376 break;
8377
8378 case 7: /* fmxr. */
8379 break;
8380 }
8381
8382 vpipe = VFP11_LS;
8383 }
8384
8385 return vpipe;
8386 }
8387
8388
8389 static int elf32_arm_compare_mapping (const void * a, const void * b);
8390
8391
8392 /* Look for potentially-troublesome code sequences which might trigger the
8393 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8394 (available from ARM) for details of the erratum. A short version is
8395 described in ld.texinfo. */
8396
8397 bool
8398 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8399 {
8400 asection *sec;
8401 bfd_byte *contents = NULL;
8402 int state = 0;
8403 int regs[3], numregs = 0;
8404 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8405 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8406
8407 if (globals == NULL)
8408 return false;
8409
8410 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8411 The states transition as follows:
8412
8413 0 -> 1 (vector) or 0 -> 2 (scalar)
8414 A VFP FMAC-pipeline instruction has been seen. Fill
8415 regs[0]..regs[numregs-1] with its input operands. Remember this
8416 instruction in 'first_fmac'.
8417
8418 1 -> 2
8419 Any instruction, except for a VFP instruction which overwrites
8420 regs[*].
8421
8422 1 -> 3 [ -> 0 ] or
8423 2 -> 3 [ -> 0 ]
8424 A VFP instruction has been seen which overwrites any of regs[*].
8425 We must make a veneer! Reset state to 0 before examining next
8426 instruction.
8427
8428 2 -> 0
8429 If we fail to match anything in state 2, reset to state 0 and reset
8430 the instruction pointer to the instruction after 'first_fmac'.
8431
8432 If the VFP11 vector mode is in use, there must be at least two unrelated
8433 instructions between anti-dependent VFP11 instructions to properly avoid
8434 triggering the erratum, hence the use of the extra state 1. */
8435
8436 /* If we are only performing a partial link do not bother
8437 to construct any glue. */
8438 if (bfd_link_relocatable (link_info))
8439 return true;
8440
8441 /* Skip if this bfd does not correspond to an ELF image. */
8442 if (! is_arm_elf (abfd))
8443 return true;
8444
8445 /* We should have chosen a fix type by the time we get here. */
8446 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8447
8448 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8449 return true;
8450
8451 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8452 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8453 return true;
8454
8455 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8456 {
8457 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8458 struct _arm_elf_section_data *sec_data;
8459
8460 /* If we don't have executable progbits, we're not interested in this
8461 section. Also skip if section is to be excluded. */
8462 if (elf_section_type (sec) != SHT_PROGBITS
8463 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8464 || (sec->flags & SEC_EXCLUDE) != 0
8465 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8466 || sec->output_section == bfd_abs_section_ptr
8467 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8468 continue;
8469
8470 sec_data = elf32_arm_section_data (sec);
8471
8472 if (sec_data->mapcount == 0)
8473 continue;
8474
8475 if (elf_section_data (sec)->this_hdr.contents != NULL)
8476 contents = elf_section_data (sec)->this_hdr.contents;
8477 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8478 goto error_return;
8479
8480 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8481 elf32_arm_compare_mapping);
8482
8483 for (span = 0; span < sec_data->mapcount; span++)
8484 {
8485 unsigned int span_start = sec_data->map[span].vma;
8486 unsigned int span_end = (span == sec_data->mapcount - 1)
8487 ? sec->size : sec_data->map[span + 1].vma;
8488 char span_type = sec_data->map[span].type;
8489
8490 /* FIXME: Only ARM mode is supported at present. We may need to
8491 support Thumb-2 mode also at some point. */
8492 if (span_type != 'a')
8493 continue;
8494
8495 for (i = span_start; i < span_end;)
8496 {
8497 unsigned int next_i = i + 4;
8498 unsigned int insn = bfd_big_endian (abfd)
8499 ? (((unsigned) contents[i] << 24)
8500 | (contents[i + 1] << 16)
8501 | (contents[i + 2] << 8)
8502 | contents[i + 3])
8503 : (((unsigned) contents[i + 3] << 24)
8504 | (contents[i + 2] << 16)
8505 | (contents[i + 1] << 8)
8506 | contents[i]);
8507 unsigned int writemask = 0;
8508 enum bfd_arm_vfp11_pipe vpipe;
8509
8510 switch (state)
8511 {
8512 case 0:
8513 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8514 &numregs);
8515 /* I'm assuming the VFP11 erratum can trigger with denorm
8516 operands on either the FMAC or the DS pipeline. This might
8517 lead to slightly overenthusiastic veneer insertion. */
8518 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8519 {
8520 state = use_vector ? 1 : 2;
8521 first_fmac = i;
8522 veneer_of_insn = insn;
8523 }
8524 break;
8525
8526 case 1:
8527 {
8528 int other_regs[3], other_numregs;
8529 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8530 other_regs,
8531 &other_numregs);
8532 if (vpipe != VFP11_BAD
8533 && bfd_arm_vfp11_antidependency (writemask, regs,
8534 numregs))
8535 state = 3;
8536 else
8537 state = 2;
8538 }
8539 break;
8540
8541 case 2:
8542 {
8543 int other_regs[3], other_numregs;
8544 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8545 other_regs,
8546 &other_numregs);
8547 if (vpipe != VFP11_BAD
8548 && bfd_arm_vfp11_antidependency (writemask, regs,
8549 numregs))
8550 state = 3;
8551 else
8552 {
8553 state = 0;
8554 next_i = first_fmac + 4;
8555 }
8556 }
8557 break;
8558
8559 case 3:
8560 abort (); /* Should be unreachable. */
8561 }
8562
8563 if (state == 3)
8564 {
8565 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8566 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8567
8568 elf32_arm_section_data (sec)->erratumcount += 1;
8569
8570 newerr->u.b.vfp_insn = veneer_of_insn;
8571
8572 switch (span_type)
8573 {
8574 case 'a':
8575 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8576 break;
8577
8578 default:
8579 abort ();
8580 }
8581
8582 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8583 first_fmac);
8584
8585 newerr->vma = -1;
8586
8587 newerr->next = sec_data->erratumlist;
8588 sec_data->erratumlist = newerr;
8589
8590 state = 0;
8591 }
8592
8593 i = next_i;
8594 }
8595 }
8596
8597 if (elf_section_data (sec)->this_hdr.contents != contents)
8598 free (contents);
8599 contents = NULL;
8600 }
8601
8602 return true;
8603
8604 error_return:
8605 if (elf_section_data (sec)->this_hdr.contents != contents)
8606 free (contents);
8607
8608 return false;
8609 }
8610
8611 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8612 after sections have been laid out, using specially-named symbols. */
8613
8614 void
8615 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8616 struct bfd_link_info *link_info)
8617 {
8618 asection *sec;
8619 struct elf32_arm_link_hash_table *globals;
8620 char *tmp_name;
8621
8622 if (bfd_link_relocatable (link_info))
8623 return;
8624
8625 /* Skip if this bfd does not correspond to an ELF image. */
8626 if (! is_arm_elf (abfd))
8627 return;
8628
8629 globals = elf32_arm_hash_table (link_info);
8630 if (globals == NULL)
8631 return;
8632
8633 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8634 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8635 BFD_ASSERT (tmp_name);
8636
8637 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8638 {
8639 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8640 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8641
8642 for (; errnode != NULL; errnode = errnode->next)
8643 {
8644 struct elf_link_hash_entry *myh;
8645 bfd_vma vma;
8646
8647 switch (errnode->type)
8648 {
8649 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8650 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8651 /* Find veneer symbol. */
8652 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8653 errnode->u.b.veneer->u.v.id);
8654
8655 myh = elf_link_hash_lookup
8656 (&(globals)->root, tmp_name, false, false, true);
8657
8658 if (myh == NULL)
8659 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8660 abfd, "VFP11", tmp_name);
8661
8662 vma = myh->root.u.def.section->output_section->vma
8663 + myh->root.u.def.section->output_offset
8664 + myh->root.u.def.value;
8665
8666 errnode->u.b.veneer->vma = vma;
8667 break;
8668
8669 case VFP11_ERRATUM_ARM_VENEER:
8670 case VFP11_ERRATUM_THUMB_VENEER:
8671 /* Find return location. */
8672 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8673 errnode->u.v.id);
8674
8675 myh = elf_link_hash_lookup
8676 (&(globals)->root, tmp_name, false, false, true);
8677
8678 if (myh == NULL)
8679 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8680 abfd, "VFP11", tmp_name);
8681
8682 vma = myh->root.u.def.section->output_section->vma
8683 + myh->root.u.def.section->output_offset
8684 + myh->root.u.def.value;
8685
8686 errnode->u.v.branch->vma = vma;
8687 break;
8688
8689 default:
8690 abort ();
8691 }
8692 }
8693 }
8694
8695 free (tmp_name);
8696 }
8697
8698 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8699 return locations after sections have been laid out, using
8700 specially-named symbols. */
8701
8702 void
8703 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8704 struct bfd_link_info *link_info)
8705 {
8706 asection *sec;
8707 struct elf32_arm_link_hash_table *globals;
8708 char *tmp_name;
8709
8710 if (bfd_link_relocatable (link_info))
8711 return;
8712
8713 /* Skip if this bfd does not correspond to an ELF image. */
8714 if (! is_arm_elf (abfd))
8715 return;
8716
8717 globals = elf32_arm_hash_table (link_info);
8718 if (globals == NULL)
8719 return;
8720
8721 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8722 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8723 BFD_ASSERT (tmp_name);
8724
8725 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8726 {
8727 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8728 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8729
8730 for (; errnode != NULL; errnode = errnode->next)
8731 {
8732 struct elf_link_hash_entry *myh;
8733 bfd_vma vma;
8734
8735 switch (errnode->type)
8736 {
8737 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8738 /* Find veneer symbol. */
8739 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8740 errnode->u.b.veneer->u.v.id);
8741
8742 myh = elf_link_hash_lookup
8743 (&(globals)->root, tmp_name, false, false, true);
8744
8745 if (myh == NULL)
8746 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8747 abfd, "STM32L4XX", tmp_name);
8748
8749 vma = myh->root.u.def.section->output_section->vma
8750 + myh->root.u.def.section->output_offset
8751 + myh->root.u.def.value;
8752
8753 errnode->u.b.veneer->vma = vma;
8754 break;
8755
8756 case STM32L4XX_ERRATUM_VENEER:
8757 /* Find return location. */
8758 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8759 errnode->u.v.id);
8760
8761 myh = elf_link_hash_lookup
8762 (&(globals)->root, tmp_name, false, false, true);
8763
8764 if (myh == NULL)
8765 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8766 abfd, "STM32L4XX", tmp_name);
8767
8768 vma = myh->root.u.def.section->output_section->vma
8769 + myh->root.u.def.section->output_offset
8770 + myh->root.u.def.value;
8771
8772 errnode->u.v.branch->vma = vma;
8773 break;
8774
8775 default:
8776 abort ();
8777 }
8778 }
8779 }
8780
8781 free (tmp_name);
8782 }
8783
8784 static inline bool
8785 is_thumb2_ldmia (const insn32 insn)
8786 {
8787 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8788 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8789 return (insn & 0xffd02000) == 0xe8900000;
8790 }
8791
8792 static inline bool
8793 is_thumb2_ldmdb (const insn32 insn)
8794 {
8795 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8796 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8797 return (insn & 0xffd02000) == 0xe9100000;
8798 }
8799
8800 static inline bool
8801 is_thumb2_vldm (const insn32 insn)
8802 {
8803 /* A6.5 Extension register load or store instruction
8804 A7.7.229
8805 We look for SP 32-bit and DP 64-bit registers.
8806 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8807 <list> is consecutive 64-bit registers
8808 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8809 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8810 <list> is consecutive 32-bit registers
8811 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8812 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8813 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8814 return
8815 (((insn & 0xfe100f00) == 0xec100b00) ||
8816 ((insn & 0xfe100f00) == 0xec100a00))
8817 && /* (IA without !). */
8818 (((((insn << 7) >> 28) & 0xd) == 0x4)
8819 /* (IA with !), includes VPOP (when reg number is SP). */
8820 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8821 /* (DB with !). */
8822 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8823 }
8824
8825 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8826 VLDM opcode and:
8827 - computes the number and the mode of memory accesses
8828 - decides if the replacement should be done:
8829 . replaces only if > 8-word accesses
8830 . or (testing purposes only) replaces all accesses. */
8831
8832 static bool
8833 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8834 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8835 {
8836 int nb_words = 0;
8837
8838 /* The field encoding the register list is the same for both LDMIA
8839 and LDMDB encodings. */
8840 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8841 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8842 else if (is_thumb2_vldm (insn))
8843 nb_words = (insn & 0xff);
8844
8845 /* DEFAULT mode accounts for the real bug condition situation,
8846 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8847 return (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT
8848 ? nb_words > 8
8849 : stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL);
8850 }
8851
8852 /* Look for potentially-troublesome code sequences which might trigger
8853 the STM STM32L4XX erratum. */
8854
8855 bool
8856 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8857 struct bfd_link_info *link_info)
8858 {
8859 asection *sec;
8860 bfd_byte *contents = NULL;
8861 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8862
8863 if (globals == NULL)
8864 return false;
8865
8866 /* If we are only performing a partial link do not bother
8867 to construct any glue. */
8868 if (bfd_link_relocatable (link_info))
8869 return true;
8870
8871 /* Skip if this bfd does not correspond to an ELF image. */
8872 if (! is_arm_elf (abfd))
8873 return true;
8874
8875 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8876 return true;
8877
8878 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8879 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8880 return true;
8881
8882 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8883 {
8884 unsigned int i, span;
8885 struct _arm_elf_section_data *sec_data;
8886
8887 /* If we don't have executable progbits, we're not interested in this
8888 section. Also skip if section is to be excluded. */
8889 if (elf_section_type (sec) != SHT_PROGBITS
8890 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8891 || (sec->flags & SEC_EXCLUDE) != 0
8892 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8893 || sec->output_section == bfd_abs_section_ptr
8894 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8895 continue;
8896
8897 sec_data = elf32_arm_section_data (sec);
8898
8899 if (sec_data->mapcount == 0)
8900 continue;
8901
8902 if (elf_section_data (sec)->this_hdr.contents != NULL)
8903 contents = elf_section_data (sec)->this_hdr.contents;
8904 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8905 goto error_return;
8906
8907 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8908 elf32_arm_compare_mapping);
8909
8910 for (span = 0; span < sec_data->mapcount; span++)
8911 {
8912 unsigned int span_start = sec_data->map[span].vma;
8913 unsigned int span_end = (span == sec_data->mapcount - 1)
8914 ? sec->size : sec_data->map[span + 1].vma;
8915 char span_type = sec_data->map[span].type;
8916 int itblock_current_pos = 0;
8917
8918 /* Only Thumb2 mode need be supported with this CM4 specific
8919 code, we should not encounter any arm mode eg span_type
8920 != 'a'. */
8921 if (span_type != 't')
8922 continue;
8923
8924 for (i = span_start; i < span_end;)
8925 {
8926 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8927 bool insn_32bit = false;
8928 bool is_ldm = false;
8929 bool is_vldm = false;
8930 bool is_not_last_in_it_block = false;
8931
8932 /* The first 16-bits of all 32-bit thumb2 instructions start
8933 with opcode[15..13]=0b111 and the encoded op1 can be anything
8934 except opcode[12..11]!=0b00.
8935 See 32-bit Thumb instruction encoding. */
8936 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8937 insn_32bit = true;
8938
8939 /* Compute the predicate that tells if the instruction
8940 is concerned by the IT block
8941 - Creates an error if there is a ldm that is not
8942 last in the IT block thus cannot be replaced
8943 - Otherwise we can create a branch at the end of the
8944 IT block, it will be controlled naturally by IT
8945 with the proper pseudo-predicate
8946 - So the only interesting predicate is the one that
8947 tells that we are not on the last item of an IT
8948 block. */
8949 if (itblock_current_pos != 0)
8950 is_not_last_in_it_block = !!--itblock_current_pos;
8951
8952 if (insn_32bit)
8953 {
8954 /* Load the rest of the insn (in manual-friendly order). */
8955 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8956 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8957 is_vldm = is_thumb2_vldm (insn);
8958
8959 /* Veneers are created for (v)ldm depending on
8960 option flags and memory accesses conditions; but
8961 if the instruction is not the last instruction of
8962 an IT block, we cannot create a jump there, so we
8963 bail out. */
8964 if ((is_ldm || is_vldm)
8965 && stm32l4xx_need_create_replacing_stub
8966 (insn, globals->stm32l4xx_fix))
8967 {
8968 if (is_not_last_in_it_block)
8969 {
8970 _bfd_error_handler
8971 /* xgettext:c-format */
8972 (_("%pB(%pA+%#x): error: multiple load detected"
8973 " in non-last IT block instruction:"
8974 " STM32L4XX veneer cannot be generated; "
8975 "use gcc option -mrestrict-it to generate"
8976 " only one instruction per IT block"),
8977 abfd, sec, i);
8978 }
8979 else
8980 {
8981 elf32_stm32l4xx_erratum_list *newerr =
8982 (elf32_stm32l4xx_erratum_list *)
8983 bfd_zmalloc
8984 (sizeof (elf32_stm32l4xx_erratum_list));
8985
8986 elf32_arm_section_data (sec)
8987 ->stm32l4xx_erratumcount += 1;
8988 newerr->u.b.insn = insn;
8989 /* We create only thumb branches. */
8990 newerr->type =
8991 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8992 record_stm32l4xx_erratum_veneer
8993 (link_info, newerr, abfd, sec,
8994 i,
8995 is_ldm ?
8996 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8997 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8998 newerr->vma = -1;
8999 newerr->next = sec_data->stm32l4xx_erratumlist;
9000 sec_data->stm32l4xx_erratumlist = newerr;
9001 }
9002 }
9003 }
9004 else
9005 {
9006 /* A7.7.37 IT p208
9007 IT blocks are only encoded in T1
9008 Encoding T1: IT{x{y{z}}} <firstcond>
9009 1 0 1 1 - 1 1 1 1 - firstcond - mask
9010 if mask = '0000' then see 'related encodings'
9011 We don't deal with UNPREDICTABLE, just ignore these.
9012 There can be no nested IT blocks so an IT block
9013 is naturally a new one for which it is worth
9014 computing its size. */
9015 bool is_newitblock = ((insn & 0xff00) == 0xbf00)
9016 && ((insn & 0x000f) != 0x0000);
9017 /* If we have a new IT block we compute its size. */
9018 if (is_newitblock)
9019 {
9020 /* Compute the number of instructions controlled
9021 by the IT block, it will be used to decide
9022 whether we are inside an IT block or not. */
9023 unsigned int mask = insn & 0x000f;
9024 itblock_current_pos = 4 - ctz (mask);
9025 }
9026 }
9027
9028 i += insn_32bit ? 4 : 2;
9029 }
9030 }
9031
9032 if (elf_section_data (sec)->this_hdr.contents != contents)
9033 free (contents);
9034 contents = NULL;
9035 }
9036
9037 return true;
9038
9039 error_return:
9040 if (elf_section_data (sec)->this_hdr.contents != contents)
9041 free (contents);
9042
9043 return false;
9044 }
9045
9046 /* Set target relocation values needed during linking. */
9047
9048 void
9049 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
9050 struct bfd_link_info *link_info,
9051 struct elf32_arm_params *params)
9052 {
9053 struct elf32_arm_link_hash_table *globals;
9054
9055 globals = elf32_arm_hash_table (link_info);
9056 if (globals == NULL)
9057 return;
9058
9059 globals->target1_is_rel = params->target1_is_rel;
9060 if (globals->fdpic_p)
9061 globals->target2_reloc = R_ARM_GOT32;
9062 else if (strcmp (params->target2_type, "rel") == 0)
9063 globals->target2_reloc = R_ARM_REL32;
9064 else if (strcmp (params->target2_type, "abs") == 0)
9065 globals->target2_reloc = R_ARM_ABS32;
9066 else if (strcmp (params->target2_type, "got-rel") == 0)
9067 globals->target2_reloc = R_ARM_GOT_PREL;
9068 else
9069 {
9070 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
9071 params->target2_type);
9072 }
9073 globals->fix_v4bx = params->fix_v4bx;
9074 globals->use_blx |= params->use_blx;
9075 globals->vfp11_fix = params->vfp11_denorm_fix;
9076 globals->stm32l4xx_fix = params->stm32l4xx_fix;
9077 if (globals->fdpic_p)
9078 globals->pic_veneer = 1;
9079 else
9080 globals->pic_veneer = params->pic_veneer;
9081 globals->fix_cortex_a8 = params->fix_cortex_a8;
9082 globals->fix_arm1176 = params->fix_arm1176;
9083 globals->cmse_implib = params->cmse_implib;
9084 globals->in_implib_bfd = params->in_implib_bfd;
9085
9086 BFD_ASSERT (is_arm_elf (output_bfd));
9087 elf_arm_tdata (output_bfd)->no_enum_size_warning
9088 = params->no_enum_size_warning;
9089 elf_arm_tdata (output_bfd)->no_wchar_size_warning
9090 = params->no_wchar_size_warning;
9091 }
9092
9093 /* Replace the target offset of a Thumb bl or b.w instruction. */
9094
9095 static void
9096 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
9097 {
9098 bfd_vma upper;
9099 bfd_vma lower;
9100 int reloc_sign;
9101
9102 BFD_ASSERT ((offset & 1) == 0);
9103
9104 upper = bfd_get_16 (abfd, insn);
9105 lower = bfd_get_16 (abfd, insn + 2);
9106 reloc_sign = (offset < 0) ? 1 : 0;
9107 upper = (upper & ~(bfd_vma) 0x7ff)
9108 | ((offset >> 12) & 0x3ff)
9109 | (reloc_sign << 10);
9110 lower = (lower & ~(bfd_vma) 0x2fff)
9111 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
9112 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
9113 | ((offset >> 1) & 0x7ff);
9114 bfd_put_16 (abfd, upper, insn);
9115 bfd_put_16 (abfd, lower, insn + 2);
9116 }
9117
9118 /* Thumb code calling an ARM function. */
9119
9120 static int
9121 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
9122 const char * name,
9123 bfd * input_bfd,
9124 bfd * output_bfd,
9125 asection * input_section,
9126 bfd_byte * hit_data,
9127 asection * sym_sec,
9128 bfd_vma offset,
9129 bfd_signed_vma addend,
9130 bfd_vma val,
9131 char **error_message)
9132 {
9133 asection * s = 0;
9134 bfd_vma my_offset;
9135 long int ret_offset;
9136 struct elf_link_hash_entry * myh;
9137 struct elf32_arm_link_hash_table * globals;
9138
9139 myh = find_thumb_glue (info, name, error_message);
9140 if (myh == NULL)
9141 return false;
9142
9143 globals = elf32_arm_hash_table (info);
9144 BFD_ASSERT (globals != NULL);
9145 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9146
9147 my_offset = myh->root.u.def.value;
9148
9149 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9150 THUMB2ARM_GLUE_SECTION_NAME);
9151
9152 BFD_ASSERT (s != NULL);
9153 BFD_ASSERT (s->contents != NULL);
9154 BFD_ASSERT (s->output_section != NULL);
9155
9156 if ((my_offset & 0x01) == 0x01)
9157 {
9158 if (sym_sec != NULL
9159 && sym_sec->owner != NULL
9160 && !INTERWORK_FLAG (sym_sec->owner))
9161 {
9162 _bfd_error_handler
9163 (_("%pB(%s): warning: interworking not enabled;"
9164 " first occurrence: %pB: %s call to %s"),
9165 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
9166
9167 return false;
9168 }
9169
9170 --my_offset;
9171 myh->root.u.def.value = my_offset;
9172
9173 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
9174 s->contents + my_offset);
9175
9176 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
9177 s->contents + my_offset + 2);
9178
9179 ret_offset =
9180 /* Address of destination of the stub. */
9181 ((bfd_signed_vma) val)
9182 - ((bfd_signed_vma)
9183 /* Offset from the start of the current section
9184 to the start of the stubs. */
9185 (s->output_offset
9186 /* Offset of the start of this stub from the start of the stubs. */
9187 + my_offset
9188 /* Address of the start of the current section. */
9189 + s->output_section->vma)
9190 /* The branch instruction is 4 bytes into the stub. */
9191 + 4
9192 /* ARM branches work from the pc of the instruction + 8. */
9193 + 8);
9194
9195 put_arm_insn (globals, output_bfd,
9196 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
9197 s->contents + my_offset + 4);
9198 }
9199
9200 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
9201
9202 /* Now go back and fix up the original BL insn to point to here. */
9203 ret_offset =
9204 /* Address of where the stub is located. */
9205 (s->output_section->vma + s->output_offset + my_offset)
9206 /* Address of where the BL is located. */
9207 - (input_section->output_section->vma + input_section->output_offset
9208 + offset)
9209 /* Addend in the relocation. */
9210 - addend
9211 /* Biassing for PC-relative addressing. */
9212 - 8;
9213
9214 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
9215
9216 return true;
9217 }
9218
9219 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
9220
9221 static struct elf_link_hash_entry *
9222 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
9223 const char * name,
9224 bfd * input_bfd,
9225 bfd * output_bfd,
9226 asection * sym_sec,
9227 bfd_vma val,
9228 asection * s,
9229 char ** error_message)
9230 {
9231 bfd_vma my_offset;
9232 long int ret_offset;
9233 struct elf_link_hash_entry * myh;
9234 struct elf32_arm_link_hash_table * globals;
9235
9236 myh = find_arm_glue (info, name, error_message);
9237 if (myh == NULL)
9238 return NULL;
9239
9240 globals = elf32_arm_hash_table (info);
9241 BFD_ASSERT (globals != NULL);
9242 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9243
9244 my_offset = myh->root.u.def.value;
9245
9246 if ((my_offset & 0x01) == 0x01)
9247 {
9248 if (sym_sec != NULL
9249 && sym_sec->owner != NULL
9250 && !INTERWORK_FLAG (sym_sec->owner))
9251 {
9252 _bfd_error_handler
9253 (_("%pB(%s): warning: interworking not enabled;"
9254 " first occurrence: %pB: %s call to %s"),
9255 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
9256 }
9257
9258 --my_offset;
9259 myh->root.u.def.value = my_offset;
9260
9261 if (bfd_link_pic (info)
9262 || globals->root.is_relocatable_executable
9263 || globals->pic_veneer)
9264 {
9265 /* For relocatable objects we can't use absolute addresses,
9266 so construct the address from a relative offset. */
9267 /* TODO: If the offset is small it's probably worth
9268 constructing the address with adds. */
9269 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
9270 s->contents + my_offset);
9271 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
9272 s->contents + my_offset + 4);
9273 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
9274 s->contents + my_offset + 8);
9275 /* Adjust the offset by 4 for the position of the add,
9276 and 8 for the pipeline offset. */
9277 ret_offset = (val - (s->output_offset
9278 + s->output_section->vma
9279 + my_offset + 12))
9280 | 1;
9281 bfd_put_32 (output_bfd, ret_offset,
9282 s->contents + my_offset + 12);
9283 }
9284 else if (globals->use_blx)
9285 {
9286 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
9287 s->contents + my_offset);
9288
9289 /* It's a thumb address. Add the low order bit. */
9290 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
9291 s->contents + my_offset + 4);
9292 }
9293 else
9294 {
9295 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
9296 s->contents + my_offset);
9297
9298 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
9299 s->contents + my_offset + 4);
9300
9301 /* It's a thumb address. Add the low order bit. */
9302 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
9303 s->contents + my_offset + 8);
9304
9305 my_offset += 12;
9306 }
9307 }
9308
9309 BFD_ASSERT (my_offset <= globals->arm_glue_size);
9310
9311 return myh;
9312 }
9313
9314 /* Arm code calling a Thumb function. */
9315
9316 static int
9317 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
9318 const char * name,
9319 bfd * input_bfd,
9320 bfd * output_bfd,
9321 asection * input_section,
9322 bfd_byte * hit_data,
9323 asection * sym_sec,
9324 bfd_vma offset,
9325 bfd_signed_vma addend,
9326 bfd_vma val,
9327 char **error_message)
9328 {
9329 unsigned long int tmp;
9330 bfd_vma my_offset;
9331 asection * s;
9332 long int ret_offset;
9333 struct elf_link_hash_entry * myh;
9334 struct elf32_arm_link_hash_table * globals;
9335
9336 globals = elf32_arm_hash_table (info);
9337 BFD_ASSERT (globals != NULL);
9338 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9339
9340 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9341 ARM2THUMB_GLUE_SECTION_NAME);
9342 BFD_ASSERT (s != NULL);
9343 BFD_ASSERT (s->contents != NULL);
9344 BFD_ASSERT (s->output_section != NULL);
9345
9346 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9347 sym_sec, val, s, error_message);
9348 if (!myh)
9349 return false;
9350
9351 my_offset = myh->root.u.def.value;
9352 tmp = bfd_get_32 (input_bfd, hit_data);
9353 tmp = tmp & 0xFF000000;
9354
9355 /* Somehow these are both 4 too far, so subtract 8. */
9356 ret_offset = (s->output_offset
9357 + my_offset
9358 + s->output_section->vma
9359 - (input_section->output_offset
9360 + input_section->output_section->vma
9361 + offset + addend)
9362 - 8);
9363
9364 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9365
9366 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9367
9368 return true;
9369 }
9370
9371 /* Populate Arm stub for an exported Thumb function. */
9372
9373 static bool
9374 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9375 {
9376 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9377 asection * s;
9378 struct elf_link_hash_entry * myh;
9379 struct elf32_arm_link_hash_entry *eh;
9380 struct elf32_arm_link_hash_table * globals;
9381 asection *sec;
9382 bfd_vma val;
9383 char *error_message;
9384
9385 eh = elf32_arm_hash_entry (h);
9386 /* Allocate stubs for exported Thumb functions on v4t. */
9387 if (eh->export_glue == NULL)
9388 return true;
9389
9390 globals = elf32_arm_hash_table (info);
9391 BFD_ASSERT (globals != NULL);
9392 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9393
9394 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9395 ARM2THUMB_GLUE_SECTION_NAME);
9396 BFD_ASSERT (s != NULL);
9397 BFD_ASSERT (s->contents != NULL);
9398 BFD_ASSERT (s->output_section != NULL);
9399
9400 sec = eh->export_glue->root.u.def.section;
9401
9402 BFD_ASSERT (sec->output_section != NULL);
9403
9404 val = eh->export_glue->root.u.def.value + sec->output_offset
9405 + sec->output_section->vma;
9406
9407 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9408 h->root.u.def.section->owner,
9409 globals->obfd, sec, val, s,
9410 &error_message);
9411 BFD_ASSERT (myh);
9412 return true;
9413 }
9414
9415 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9416
9417 static bfd_vma
9418 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9419 {
9420 bfd_byte *p;
9421 bfd_vma glue_addr;
9422 asection *s;
9423 struct elf32_arm_link_hash_table *globals;
9424
9425 globals = elf32_arm_hash_table (info);
9426 BFD_ASSERT (globals != NULL);
9427 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9428
9429 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9430 ARM_BX_GLUE_SECTION_NAME);
9431 BFD_ASSERT (s != NULL);
9432 BFD_ASSERT (s->contents != NULL);
9433 BFD_ASSERT (s->output_section != NULL);
9434
9435 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9436
9437 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9438
9439 if ((globals->bx_glue_offset[reg] & 1) == 0)
9440 {
9441 p = s->contents + glue_addr;
9442 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9443 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9444 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9445 globals->bx_glue_offset[reg] |= 1;
9446 }
9447
9448 return glue_addr + s->output_section->vma + s->output_offset;
9449 }
9450
9451 /* Generate Arm stubs for exported Thumb symbols. */
9452 static void
9453 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9454 struct bfd_link_info *link_info)
9455 {
9456 struct elf32_arm_link_hash_table * globals;
9457
9458 if (link_info == NULL)
9459 /* Ignore this if we are not called by the ELF backend linker. */
9460 return;
9461
9462 globals = elf32_arm_hash_table (link_info);
9463 if (globals == NULL)
9464 return;
9465
9466 /* If blx is available then exported Thumb symbols are OK and there is
9467 nothing to do. */
9468 if (globals->use_blx)
9469 return;
9470
9471 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9472 link_info);
9473 }
9474
9475 /* Reserve space for COUNT dynamic relocations in relocation selection
9476 SRELOC. */
9477
9478 static void
9479 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9480 bfd_size_type count)
9481 {
9482 struct elf32_arm_link_hash_table *htab;
9483
9484 htab = elf32_arm_hash_table (info);
9485 BFD_ASSERT (htab->root.dynamic_sections_created);
9486 if (sreloc == NULL)
9487 abort ();
9488 sreloc->size += RELOC_SIZE (htab) * count;
9489 }
9490
9491 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9492 dynamic, the relocations should go in SRELOC, otherwise they should
9493 go in the special .rel.iplt section. */
9494
9495 static void
9496 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9497 bfd_size_type count)
9498 {
9499 struct elf32_arm_link_hash_table *htab;
9500
9501 htab = elf32_arm_hash_table (info);
9502 if (!htab->root.dynamic_sections_created)
9503 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9504 else
9505 {
9506 BFD_ASSERT (sreloc != NULL);
9507 sreloc->size += RELOC_SIZE (htab) * count;
9508 }
9509 }
9510
9511 /* Add relocation REL to the end of relocation section SRELOC. */
9512
9513 static void
9514 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9515 asection *sreloc, Elf_Internal_Rela *rel)
9516 {
9517 bfd_byte *loc;
9518 struct elf32_arm_link_hash_table *htab;
9519
9520 htab = elf32_arm_hash_table (info);
9521 if (!htab->root.dynamic_sections_created
9522 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9523 sreloc = htab->root.irelplt;
9524 if (sreloc == NULL)
9525 abort ();
9526 loc = sreloc->contents;
9527 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9528 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9529 abort ();
9530 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9531 }
9532
9533 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9534 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9535 to .plt. */
9536
9537 static void
9538 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9539 bool is_iplt_entry,
9540 union gotplt_union *root_plt,
9541 struct arm_plt_info *arm_plt)
9542 {
9543 struct elf32_arm_link_hash_table *htab;
9544 asection *splt;
9545 asection *sgotplt;
9546
9547 htab = elf32_arm_hash_table (info);
9548
9549 if (is_iplt_entry)
9550 {
9551 splt = htab->root.iplt;
9552 sgotplt = htab->root.igotplt;
9553
9554 /* NaCl uses a special first entry in .iplt too. */
9555 if (htab->root.target_os == is_nacl && splt->size == 0)
9556 splt->size += htab->plt_header_size;
9557
9558 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9559 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9560 }
9561 else
9562 {
9563 splt = htab->root.splt;
9564 sgotplt = htab->root.sgotplt;
9565
9566 if (htab->fdpic_p)
9567 {
9568 /* Allocate room for R_ARM_FUNCDESC_VALUE. */
9569 /* For lazy binding, relocations will be put into .rel.plt, in
9570 .rel.got otherwise. */
9571 /* FIXME: today we don't support lazy binding so put it in .rel.got */
9572 if (info->flags & DF_BIND_NOW)
9573 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
9574 else
9575 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9576 }
9577 else
9578 {
9579 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9580 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9581 }
9582
9583 /* If this is the first .plt entry, make room for the special
9584 first entry. */
9585 if (splt->size == 0)
9586 splt->size += htab->plt_header_size;
9587
9588 htab->next_tls_desc_index++;
9589 }
9590
9591 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9592 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9593 splt->size += PLT_THUMB_STUB_SIZE;
9594 root_plt->offset = splt->size;
9595 splt->size += htab->plt_entry_size;
9596
9597 /* We also need to make an entry in the .got.plt section, which
9598 will be placed in the .got section by the linker script. */
9599 if (is_iplt_entry)
9600 arm_plt->got_offset = sgotplt->size;
9601 else
9602 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9603 if (htab->fdpic_p)
9604 /* Function descriptor takes 64 bits in GOT. */
9605 sgotplt->size += 8;
9606 else
9607 sgotplt->size += 4;
9608 }
9609
9610 static bfd_vma
9611 arm_movw_immediate (bfd_vma value)
9612 {
9613 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9614 }
9615
9616 static bfd_vma
9617 arm_movt_immediate (bfd_vma value)
9618 {
9619 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9620 }
9621
9622 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9623 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9624 Otherwise, DYNINDX is the index of the symbol in the dynamic
9625 symbol table and SYM_VALUE is undefined.
9626
9627 ROOT_PLT points to the offset of the PLT entry from the start of its
9628 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9629 bookkeeping information.
9630
9631 Returns FALSE if there was a problem. */
9632
9633 static bool
9634 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9635 union gotplt_union *root_plt,
9636 struct arm_plt_info *arm_plt,
9637 int dynindx, bfd_vma sym_value)
9638 {
9639 struct elf32_arm_link_hash_table *htab;
9640 asection *sgot;
9641 asection *splt;
9642 asection *srel;
9643 bfd_byte *loc;
9644 bfd_vma plt_index;
9645 Elf_Internal_Rela rel;
9646 bfd_vma got_header_size;
9647
9648 htab = elf32_arm_hash_table (info);
9649
9650 /* Pick the appropriate sections and sizes. */
9651 if (dynindx == -1)
9652 {
9653 splt = htab->root.iplt;
9654 sgot = htab->root.igotplt;
9655 srel = htab->root.irelplt;
9656
9657 /* There are no reserved entries in .igot.plt, and no special
9658 first entry in .iplt. */
9659 got_header_size = 0;
9660 }
9661 else
9662 {
9663 splt = htab->root.splt;
9664 sgot = htab->root.sgotplt;
9665 srel = htab->root.srelplt;
9666
9667 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9668 }
9669 BFD_ASSERT (splt != NULL && srel != NULL);
9670
9671 bfd_vma got_offset, got_address, plt_address;
9672 bfd_vma got_displacement, initial_got_entry;
9673 bfd_byte * ptr;
9674
9675 BFD_ASSERT (sgot != NULL);
9676
9677 /* Get the offset into the .(i)got.plt table of the entry that
9678 corresponds to this function. */
9679 got_offset = (arm_plt->got_offset & -2);
9680
9681 /* Get the index in the procedure linkage table which
9682 corresponds to this symbol. This is the index of this symbol
9683 in all the symbols for which we are making plt entries.
9684 After the reserved .got.plt entries, all symbols appear in
9685 the same order as in .plt. */
9686 if (htab->fdpic_p)
9687 /* Function descriptor takes 8 bytes. */
9688 plt_index = (got_offset - got_header_size) / 8;
9689 else
9690 plt_index = (got_offset - got_header_size) / 4;
9691
9692 /* Calculate the address of the GOT entry. */
9693 got_address = (sgot->output_section->vma
9694 + sgot->output_offset
9695 + got_offset);
9696
9697 /* ...and the address of the PLT entry. */
9698 plt_address = (splt->output_section->vma
9699 + splt->output_offset
9700 + root_plt->offset);
9701
9702 ptr = splt->contents + root_plt->offset;
9703 if (htab->root.target_os == is_vxworks && bfd_link_pic (info))
9704 {
9705 unsigned int i;
9706 bfd_vma val;
9707
9708 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9709 {
9710 val = elf32_arm_vxworks_shared_plt_entry[i];
9711 if (i == 2)
9712 val |= got_address - sgot->output_section->vma;
9713 if (i == 5)
9714 val |= plt_index * RELOC_SIZE (htab);
9715 if (i == 2 || i == 5)
9716 bfd_put_32 (output_bfd, val, ptr);
9717 else
9718 put_arm_insn (htab, output_bfd, val, ptr);
9719 }
9720 }
9721 else if (htab->root.target_os == is_vxworks)
9722 {
9723 unsigned int i;
9724 bfd_vma val;
9725
9726 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9727 {
9728 val = elf32_arm_vxworks_exec_plt_entry[i];
9729 if (i == 2)
9730 val |= got_address;
9731 if (i == 4)
9732 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9733 if (i == 5)
9734 val |= plt_index * RELOC_SIZE (htab);
9735 if (i == 2 || i == 5)
9736 bfd_put_32 (output_bfd, val, ptr);
9737 else
9738 put_arm_insn (htab, output_bfd, val, ptr);
9739 }
9740
9741 loc = (htab->srelplt2->contents
9742 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9743
9744 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9745 referencing the GOT for this PLT entry. */
9746 rel.r_offset = plt_address + 8;
9747 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9748 rel.r_addend = got_offset;
9749 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9750 loc += RELOC_SIZE (htab);
9751
9752 /* Create the R_ARM_ABS32 relocation referencing the
9753 beginning of the PLT for this GOT entry. */
9754 rel.r_offset = got_address;
9755 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9756 rel.r_addend = 0;
9757 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9758 }
9759 else if (htab->root.target_os == is_nacl)
9760 {
9761 /* Calculate the displacement between the PLT slot and the
9762 common tail that's part of the special initial PLT slot. */
9763 int32_t tail_displacement
9764 = ((splt->output_section->vma + splt->output_offset
9765 + ARM_NACL_PLT_TAIL_OFFSET)
9766 - (plt_address + htab->plt_entry_size + 4));
9767 BFD_ASSERT ((tail_displacement & 3) == 0);
9768 tail_displacement >>= 2;
9769
9770 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9771 || (-tail_displacement & 0xff000000) == 0);
9772
9773 /* Calculate the displacement between the PLT slot and the entry
9774 in the GOT. The offset accounts for the value produced by
9775 adding to pc in the penultimate instruction of the PLT stub. */
9776 got_displacement = (got_address
9777 - (plt_address + htab->plt_entry_size));
9778
9779 /* NaCl does not support interworking at all. */
9780 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9781
9782 put_arm_insn (htab, output_bfd,
9783 elf32_arm_nacl_plt_entry[0]
9784 | arm_movw_immediate (got_displacement),
9785 ptr + 0);
9786 put_arm_insn (htab, output_bfd,
9787 elf32_arm_nacl_plt_entry[1]
9788 | arm_movt_immediate (got_displacement),
9789 ptr + 4);
9790 put_arm_insn (htab, output_bfd,
9791 elf32_arm_nacl_plt_entry[2],
9792 ptr + 8);
9793 put_arm_insn (htab, output_bfd,
9794 elf32_arm_nacl_plt_entry[3]
9795 | (tail_displacement & 0x00ffffff),
9796 ptr + 12);
9797 }
9798 else if (htab->fdpic_p)
9799 {
9800 const bfd_vma *plt_entry = using_thumb_only (htab)
9801 ? elf32_arm_fdpic_thumb_plt_entry
9802 : elf32_arm_fdpic_plt_entry;
9803
9804 /* Fill-up Thumb stub if needed. */
9805 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9806 {
9807 put_thumb_insn (htab, output_bfd,
9808 elf32_arm_plt_thumb_stub[0], ptr - 4);
9809 put_thumb_insn (htab, output_bfd,
9810 elf32_arm_plt_thumb_stub[1], ptr - 2);
9811 }
9812 /* As we are using 32 bit instructions even for the Thumb
9813 version, we have to use 'put_arm_insn' instead of
9814 'put_thumb_insn'. */
9815 put_arm_insn (htab, output_bfd, plt_entry[0], ptr + 0);
9816 put_arm_insn (htab, output_bfd, plt_entry[1], ptr + 4);
9817 put_arm_insn (htab, output_bfd, plt_entry[2], ptr + 8);
9818 put_arm_insn (htab, output_bfd, plt_entry[3], ptr + 12);
9819 bfd_put_32 (output_bfd, got_offset, ptr + 16);
9820
9821 if (!(info->flags & DF_BIND_NOW))
9822 {
9823 /* funcdesc_value_reloc_offset. */
9824 bfd_put_32 (output_bfd,
9825 htab->root.srelplt->reloc_count * RELOC_SIZE (htab),
9826 ptr + 20);
9827 put_arm_insn (htab, output_bfd, plt_entry[6], ptr + 24);
9828 put_arm_insn (htab, output_bfd, plt_entry[7], ptr + 28);
9829 put_arm_insn (htab, output_bfd, plt_entry[8], ptr + 32);
9830 put_arm_insn (htab, output_bfd, plt_entry[9], ptr + 36);
9831 }
9832 }
9833 else if (using_thumb_only (htab))
9834 {
9835 /* PR ld/16017: Generate thumb only PLT entries. */
9836 if (!using_thumb2 (htab))
9837 {
9838 /* FIXME: We ought to be able to generate thumb-1 PLT
9839 instructions... */
9840 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9841 output_bfd);
9842 return false;
9843 }
9844
9845 /* Calculate the displacement between the PLT slot and the entry in
9846 the GOT. The 12-byte offset accounts for the value produced by
9847 adding to pc in the 3rd instruction of the PLT stub. */
9848 got_displacement = got_address - (plt_address + 12);
9849
9850 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9851 instead of 'put_thumb_insn'. */
9852 put_arm_insn (htab, output_bfd,
9853 elf32_thumb2_plt_entry[0]
9854 | ((got_displacement & 0x000000ff) << 16)
9855 | ((got_displacement & 0x00000700) << 20)
9856 | ((got_displacement & 0x00000800) >> 1)
9857 | ((got_displacement & 0x0000f000) >> 12),
9858 ptr + 0);
9859 put_arm_insn (htab, output_bfd,
9860 elf32_thumb2_plt_entry[1]
9861 | ((got_displacement & 0x00ff0000) )
9862 | ((got_displacement & 0x07000000) << 4)
9863 | ((got_displacement & 0x08000000) >> 17)
9864 | ((got_displacement & 0xf0000000) >> 28),
9865 ptr + 4);
9866 put_arm_insn (htab, output_bfd,
9867 elf32_thumb2_plt_entry[2],
9868 ptr + 8);
9869 put_arm_insn (htab, output_bfd,
9870 elf32_thumb2_plt_entry[3],
9871 ptr + 12);
9872 }
9873 else
9874 {
9875 /* Calculate the displacement between the PLT slot and the
9876 entry in the GOT. The eight-byte offset accounts for the
9877 value produced by adding to pc in the first instruction
9878 of the PLT stub. */
9879 got_displacement = got_address - (plt_address + 8);
9880
9881 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9882 {
9883 put_thumb_insn (htab, output_bfd,
9884 elf32_arm_plt_thumb_stub[0], ptr - 4);
9885 put_thumb_insn (htab, output_bfd,
9886 elf32_arm_plt_thumb_stub[1], ptr - 2);
9887 }
9888
9889 if (!elf32_arm_use_long_plt_entry)
9890 {
9891 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9892
9893 put_arm_insn (htab, output_bfd,
9894 elf32_arm_plt_entry_short[0]
9895 | ((got_displacement & 0x0ff00000) >> 20),
9896 ptr + 0);
9897 put_arm_insn (htab, output_bfd,
9898 elf32_arm_plt_entry_short[1]
9899 | ((got_displacement & 0x000ff000) >> 12),
9900 ptr+ 4);
9901 put_arm_insn (htab, output_bfd,
9902 elf32_arm_plt_entry_short[2]
9903 | (got_displacement & 0x00000fff),
9904 ptr + 8);
9905 #ifdef FOUR_WORD_PLT
9906 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9907 #endif
9908 }
9909 else
9910 {
9911 put_arm_insn (htab, output_bfd,
9912 elf32_arm_plt_entry_long[0]
9913 | ((got_displacement & 0xf0000000) >> 28),
9914 ptr + 0);
9915 put_arm_insn (htab, output_bfd,
9916 elf32_arm_plt_entry_long[1]
9917 | ((got_displacement & 0x0ff00000) >> 20),
9918 ptr + 4);
9919 put_arm_insn (htab, output_bfd,
9920 elf32_arm_plt_entry_long[2]
9921 | ((got_displacement & 0x000ff000) >> 12),
9922 ptr+ 8);
9923 put_arm_insn (htab, output_bfd,
9924 elf32_arm_plt_entry_long[3]
9925 | (got_displacement & 0x00000fff),
9926 ptr + 12);
9927 }
9928 }
9929
9930 /* Fill in the entry in the .rel(a).(i)plt section. */
9931 rel.r_offset = got_address;
9932 rel.r_addend = 0;
9933 if (dynindx == -1)
9934 {
9935 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9936 The dynamic linker or static executable then calls SYM_VALUE
9937 to determine the correct run-time value of the .igot.plt entry. */
9938 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9939 initial_got_entry = sym_value;
9940 }
9941 else
9942 {
9943 /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
9944 used by PLT entry. */
9945 if (htab->fdpic_p)
9946 {
9947 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
9948 initial_got_entry = 0;
9949 }
9950 else
9951 {
9952 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9953 initial_got_entry = (splt->output_section->vma
9954 + splt->output_offset);
9955
9956 /* PR ld/16017
9957 When thumb only we need to set the LSB for any address that
9958 will be used with an interworking branch instruction. */
9959 if (using_thumb_only (htab))
9960 initial_got_entry |= 1;
9961 }
9962 }
9963
9964 /* Fill in the entry in the global offset table. */
9965 bfd_put_32 (output_bfd, initial_got_entry,
9966 sgot->contents + got_offset);
9967
9968 if (htab->fdpic_p && !(info->flags & DF_BIND_NOW))
9969 {
9970 /* Setup initial funcdesc value. */
9971 /* FIXME: we don't support lazy binding because there is a
9972 race condition between both words getting written and
9973 some other thread attempting to read them. The ARM
9974 architecture does not have an atomic 64 bit load/store
9975 instruction that could be used to prevent it; it is
9976 recommended that threaded FDPIC applications run with the
9977 LD_BIND_NOW environment variable set. */
9978 bfd_put_32 (output_bfd, plt_address + 0x18,
9979 sgot->contents + got_offset);
9980 bfd_put_32 (output_bfd, -1 /*TODO*/,
9981 sgot->contents + got_offset + 4);
9982 }
9983
9984 if (dynindx == -1)
9985 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9986 else
9987 {
9988 if (htab->fdpic_p)
9989 {
9990 /* For FDPIC we put PLT relocationss into .rel.got when not
9991 lazy binding otherwise we put them in .rel.plt. For now,
9992 we don't support lazy binding so put it in .rel.got. */
9993 if (info->flags & DF_BIND_NOW)
9994 elf32_arm_add_dynreloc (output_bfd, info, htab->root.srelgot, &rel);
9995 else
9996 elf32_arm_add_dynreloc (output_bfd, info, htab->root.srelplt, &rel);
9997 }
9998 else
9999 {
10000 loc = srel->contents + plt_index * RELOC_SIZE (htab);
10001 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
10002 }
10003 }
10004
10005 return true;
10006 }
10007
10008 /* Some relocations map to different relocations depending on the
10009 target. Return the real relocation. */
10010
10011 static int
10012 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
10013 int r_type)
10014 {
10015 switch (r_type)
10016 {
10017 case R_ARM_TARGET1:
10018 if (globals->target1_is_rel)
10019 return R_ARM_REL32;
10020 else
10021 return R_ARM_ABS32;
10022
10023 case R_ARM_TARGET2:
10024 return globals->target2_reloc;
10025
10026 default:
10027 return r_type;
10028 }
10029 }
10030
10031 /* Return the base VMA address which should be subtracted from real addresses
10032 when resolving @dtpoff relocation.
10033 This is PT_TLS segment p_vaddr. */
10034
10035 static bfd_vma
10036 dtpoff_base (struct bfd_link_info *info)
10037 {
10038 /* If tls_sec is NULL, we should have signalled an error already. */
10039 if (elf_hash_table (info)->tls_sec == NULL)
10040 return 0;
10041 return elf_hash_table (info)->tls_sec->vma;
10042 }
10043
10044 /* Return the relocation value for @tpoff relocation
10045 if STT_TLS virtual address is ADDRESS. */
10046
10047 static bfd_vma
10048 tpoff (struct bfd_link_info *info, bfd_vma address)
10049 {
10050 struct elf_link_hash_table *htab = elf_hash_table (info);
10051 bfd_vma base;
10052
10053 /* If tls_sec is NULL, we should have signalled an error already. */
10054 if (htab->tls_sec == NULL)
10055 return 0;
10056 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
10057 return address - htab->tls_sec->vma + base;
10058 }
10059
10060 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
10061 VALUE is the relocation value. */
10062
10063 static bfd_reloc_status_type
10064 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
10065 {
10066 if (value > 0xfff)
10067 return bfd_reloc_overflow;
10068
10069 value |= bfd_get_32 (abfd, data) & 0xfffff000;
10070 bfd_put_32 (abfd, value, data);
10071 return bfd_reloc_ok;
10072 }
10073
10074 /* Handle TLS relaxations. Relaxing is possible for symbols that use
10075 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
10076 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
10077
10078 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
10079 is to then call final_link_relocate. Return other values in the
10080 case of error.
10081
10082 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
10083 the pre-relaxed code. It would be nice if the relocs were updated
10084 to match the optimization. */
10085
10086 static bfd_reloc_status_type
10087 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
10088 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
10089 Elf_Internal_Rela *rel, unsigned long is_local)
10090 {
10091 unsigned long insn;
10092
10093 switch (ELF32_R_TYPE (rel->r_info))
10094 {
10095 default:
10096 return bfd_reloc_notsupported;
10097
10098 case R_ARM_TLS_GOTDESC:
10099 if (is_local)
10100 insn = 0;
10101 else
10102 {
10103 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10104 if (insn & 1)
10105 insn -= 5; /* THUMB */
10106 else
10107 insn -= 8; /* ARM */
10108 }
10109 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10110 return bfd_reloc_continue;
10111
10112 case R_ARM_THM_TLS_DESCSEQ:
10113 /* Thumb insn. */
10114 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
10115 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
10116 {
10117 if (is_local)
10118 /* nop */
10119 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10120 }
10121 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
10122 {
10123 if (is_local)
10124 /* nop */
10125 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10126 else
10127 /* ldr rx,[ry] */
10128 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
10129 }
10130 else if ((insn & 0xff87) == 0x4780) /* blx rx */
10131 {
10132 if (is_local)
10133 /* nop */
10134 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10135 else
10136 /* mov r0, rx */
10137 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
10138 contents + rel->r_offset);
10139 }
10140 else
10141 {
10142 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
10143 /* It's a 32 bit instruction, fetch the rest of it for
10144 error generation. */
10145 insn = (insn << 16)
10146 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
10147 _bfd_error_handler
10148 /* xgettext:c-format */
10149 (_("%pB(%pA+%#" PRIx64 "): "
10150 "unexpected %s instruction '%#lx' in TLS trampoline"),
10151 input_bfd, input_sec, (uint64_t) rel->r_offset,
10152 "Thumb", insn);
10153 return bfd_reloc_notsupported;
10154 }
10155 break;
10156
10157 case R_ARM_TLS_DESCSEQ:
10158 /* arm insn. */
10159 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10160 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
10161 {
10162 if (is_local)
10163 /* mov rx, ry */
10164 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
10165 contents + rel->r_offset);
10166 }
10167 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
10168 {
10169 if (is_local)
10170 /* nop */
10171 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10172 else
10173 /* ldr rx,[ry] */
10174 bfd_put_32 (input_bfd, insn & 0xfffff000,
10175 contents + rel->r_offset);
10176 }
10177 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
10178 {
10179 if (is_local)
10180 /* nop */
10181 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10182 else
10183 /* mov r0, rx */
10184 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
10185 contents + rel->r_offset);
10186 }
10187 else
10188 {
10189 _bfd_error_handler
10190 /* xgettext:c-format */
10191 (_("%pB(%pA+%#" PRIx64 "): "
10192 "unexpected %s instruction '%#lx' in TLS trampoline"),
10193 input_bfd, input_sec, (uint64_t) rel->r_offset,
10194 "ARM", insn);
10195 return bfd_reloc_notsupported;
10196 }
10197 break;
10198
10199 case R_ARM_TLS_CALL:
10200 /* GD->IE relaxation, turn the instruction into 'nop' or
10201 'ldr r0, [pc,r0]' */
10202 insn = is_local ? 0xe1a00000 : 0xe79f0000;
10203 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10204 break;
10205
10206 case R_ARM_THM_TLS_CALL:
10207 /* GD->IE relaxation. */
10208 if (!is_local)
10209 /* add r0,pc; ldr r0, [r0] */
10210 insn = 0x44786800;
10211 else if (using_thumb2 (globals))
10212 /* nop.w */
10213 insn = 0xf3af8000;
10214 else
10215 /* nop; nop */
10216 insn = 0xbf00bf00;
10217
10218 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
10219 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
10220 break;
10221 }
10222 return bfd_reloc_ok;
10223 }
10224
10225 /* For a given value of n, calculate the value of G_n as required to
10226 deal with group relocations. We return it in the form of an
10227 encoded constant-and-rotation, together with the final residual. If n is
10228 specified as less than zero, then final_residual is filled with the
10229 input value and no further action is performed. */
10230
10231 static bfd_vma
10232 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
10233 {
10234 int current_n;
10235 bfd_vma g_n;
10236 bfd_vma encoded_g_n = 0;
10237 bfd_vma residual = value; /* Also known as Y_n. */
10238
10239 for (current_n = 0; current_n <= n; current_n++)
10240 {
10241 int shift;
10242
10243 /* Calculate which part of the value to mask. */
10244 if (residual == 0)
10245 shift = 0;
10246 else
10247 {
10248 int msb;
10249
10250 /* Determine the most significant bit in the residual and
10251 align the resulting value to a 2-bit boundary. */
10252 for (msb = 30; msb >= 0; msb -= 2)
10253 if (residual & (3u << msb))
10254 break;
10255
10256 /* The desired shift is now (msb - 6), or zero, whichever
10257 is the greater. */
10258 shift = msb - 6;
10259 if (shift < 0)
10260 shift = 0;
10261 }
10262
10263 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
10264 g_n = residual & (0xff << shift);
10265 encoded_g_n = (g_n >> shift)
10266 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
10267
10268 /* Calculate the residual for the next time around. */
10269 residual &= ~g_n;
10270 }
10271
10272 *final_residual = residual;
10273
10274 return encoded_g_n;
10275 }
10276
10277 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
10278 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
10279
10280 static int
10281 identify_add_or_sub (bfd_vma insn)
10282 {
10283 int opcode = insn & 0x1e00000;
10284
10285 if (opcode == 1 << 23) /* ADD */
10286 return 1;
10287
10288 if (opcode == 1 << 22) /* SUB */
10289 return -1;
10290
10291 return 0;
10292 }
10293
10294 /* Perform a relocation as part of a final link. */
10295
10296 static bfd_reloc_status_type
10297 elf32_arm_final_link_relocate (reloc_howto_type * howto,
10298 bfd * input_bfd,
10299 bfd * output_bfd,
10300 asection * input_section,
10301 bfd_byte * contents,
10302 Elf_Internal_Rela * rel,
10303 bfd_vma value,
10304 struct bfd_link_info * info,
10305 asection * sym_sec,
10306 const char * sym_name,
10307 unsigned char st_type,
10308 enum arm_st_branch_type branch_type,
10309 struct elf_link_hash_entry * h,
10310 bool * unresolved_reloc_p,
10311 char ** error_message)
10312 {
10313 unsigned long r_type = howto->type;
10314 unsigned long r_symndx;
10315 bfd_byte * hit_data = contents + rel->r_offset;
10316 bfd_vma * local_got_offsets;
10317 bfd_vma * local_tlsdesc_gotents;
10318 asection * sgot;
10319 asection * splt;
10320 asection * sreloc = NULL;
10321 asection * srelgot;
10322 bfd_vma addend;
10323 bfd_signed_vma signed_addend;
10324 unsigned char dynreloc_st_type;
10325 bfd_vma dynreloc_value;
10326 struct elf32_arm_link_hash_table * globals;
10327 struct elf32_arm_link_hash_entry *eh;
10328 union gotplt_union *root_plt;
10329 struct arm_plt_info *arm_plt;
10330 bfd_vma plt_offset;
10331 bfd_vma gotplt_offset;
10332 bool has_iplt_entry;
10333 bool resolved_to_zero;
10334
10335 globals = elf32_arm_hash_table (info);
10336 if (globals == NULL)
10337 return bfd_reloc_notsupported;
10338
10339 BFD_ASSERT (is_arm_elf (input_bfd));
10340 BFD_ASSERT (howto != NULL);
10341
10342 /* Some relocation types map to different relocations depending on the
10343 target. We pick the right one here. */
10344 r_type = arm_real_reloc_type (globals, r_type);
10345
10346 /* It is possible to have linker relaxations on some TLS access
10347 models. Update our information here. */
10348 r_type = elf32_arm_tls_transition (info, r_type, h);
10349
10350 if (r_type != howto->type)
10351 howto = elf32_arm_howto_from_type (r_type);
10352
10353 eh = (struct elf32_arm_link_hash_entry *) h;
10354 sgot = globals->root.sgot;
10355 local_got_offsets = elf_local_got_offsets (input_bfd);
10356 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
10357
10358 if (globals->root.dynamic_sections_created)
10359 srelgot = globals->root.srelgot;
10360 else
10361 srelgot = NULL;
10362
10363 r_symndx = ELF32_R_SYM (rel->r_info);
10364
10365 if (globals->use_rel)
10366 {
10367 bfd_vma sign;
10368
10369 switch (bfd_get_reloc_size (howto))
10370 {
10371 case 1: addend = bfd_get_8 (input_bfd, hit_data); break;
10372 case 2: addend = bfd_get_16 (input_bfd, hit_data); break;
10373 case 4: addend = bfd_get_32 (input_bfd, hit_data); break;
10374 default: addend = 0; break;
10375 }
10376 /* Note: the addend and signed_addend calculated here are
10377 incorrect for any split field. */
10378 addend &= howto->src_mask;
10379 sign = howto->src_mask & ~(howto->src_mask >> 1);
10380 signed_addend = (addend ^ sign) - sign;
10381 signed_addend = (bfd_vma) signed_addend << howto->rightshift;
10382 addend <<= howto->rightshift;
10383 }
10384 else
10385 addend = signed_addend = rel->r_addend;
10386
10387 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10388 are resolving a function call relocation. */
10389 if (using_thumb_only (globals)
10390 && (r_type == R_ARM_THM_CALL
10391 || r_type == R_ARM_THM_JUMP24)
10392 && branch_type == ST_BRANCH_TO_ARM)
10393 branch_type = ST_BRANCH_TO_THUMB;
10394
10395 /* Record the symbol information that should be used in dynamic
10396 relocations. */
10397 dynreloc_st_type = st_type;
10398 dynreloc_value = value;
10399 if (branch_type == ST_BRANCH_TO_THUMB)
10400 dynreloc_value |= 1;
10401
10402 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10403 VALUE appropriately for relocations that we resolve at link time. */
10404 has_iplt_entry = false;
10405 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
10406 &arm_plt)
10407 && root_plt->offset != (bfd_vma) -1)
10408 {
10409 plt_offset = root_plt->offset;
10410 gotplt_offset = arm_plt->got_offset;
10411
10412 if (h == NULL || eh->is_iplt)
10413 {
10414 has_iplt_entry = true;
10415 splt = globals->root.iplt;
10416
10417 /* Populate .iplt entries here, because not all of them will
10418 be seen by finish_dynamic_symbol. The lower bit is set if
10419 we have already populated the entry. */
10420 if (plt_offset & 1)
10421 plt_offset--;
10422 else
10423 {
10424 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
10425 -1, dynreloc_value))
10426 root_plt->offset |= 1;
10427 else
10428 return bfd_reloc_notsupported;
10429 }
10430
10431 /* Static relocations always resolve to the .iplt entry. */
10432 st_type = STT_FUNC;
10433 value = (splt->output_section->vma
10434 + splt->output_offset
10435 + plt_offset);
10436 branch_type = ST_BRANCH_TO_ARM;
10437
10438 /* If there are non-call relocations that resolve to the .iplt
10439 entry, then all dynamic ones must too. */
10440 if (arm_plt->noncall_refcount != 0)
10441 {
10442 dynreloc_st_type = st_type;
10443 dynreloc_value = value;
10444 }
10445 }
10446 else
10447 /* We populate the .plt entry in finish_dynamic_symbol. */
10448 splt = globals->root.splt;
10449 }
10450 else
10451 {
10452 splt = NULL;
10453 plt_offset = (bfd_vma) -1;
10454 gotplt_offset = (bfd_vma) -1;
10455 }
10456
10457 resolved_to_zero = (h != NULL
10458 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
10459
10460 switch (r_type)
10461 {
10462 case R_ARM_NONE:
10463 /* We don't need to find a value for this symbol. It's just a
10464 marker. */
10465 *unresolved_reloc_p = false;
10466 return bfd_reloc_ok;
10467
10468 case R_ARM_ABS12:
10469 if (globals->root.target_os != is_vxworks)
10470 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10471 /* Fall through. */
10472
10473 case R_ARM_PC24:
10474 case R_ARM_ABS32:
10475 case R_ARM_ABS32_NOI:
10476 case R_ARM_REL32:
10477 case R_ARM_REL32_NOI:
10478 case R_ARM_CALL:
10479 case R_ARM_JUMP24:
10480 case R_ARM_XPC25:
10481 case R_ARM_PREL31:
10482 case R_ARM_PLT32:
10483 /* Handle relocations which should use the PLT entry. ABS32/REL32
10484 will use the symbol's value, which may point to a PLT entry, but we
10485 don't need to handle that here. If we created a PLT entry, all
10486 branches in this object should go to it, except if the PLT is too
10487 far away, in which case a long branch stub should be inserted. */
10488 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10489 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10490 && r_type != R_ARM_CALL
10491 && r_type != R_ARM_JUMP24
10492 && r_type != R_ARM_PLT32)
10493 && plt_offset != (bfd_vma) -1)
10494 {
10495 /* If we've created a .plt section, and assigned a PLT entry
10496 to this function, it must either be a STT_GNU_IFUNC reference
10497 or not be known to bind locally. In other cases, we should
10498 have cleared the PLT entry by now. */
10499 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10500
10501 value = (splt->output_section->vma
10502 + splt->output_offset
10503 + plt_offset);
10504 *unresolved_reloc_p = false;
10505 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10506 contents, rel->r_offset, value,
10507 rel->r_addend);
10508 }
10509
10510 /* When generating a shared object or relocatable executable, these
10511 relocations are copied into the output file to be resolved at
10512 run time. */
10513 if ((bfd_link_pic (info)
10514 || globals->root.is_relocatable_executable
10515 || globals->fdpic_p)
10516 && (input_section->flags & SEC_ALLOC)
10517 && !(globals->root.target_os == is_vxworks
10518 && strcmp (input_section->output_section->name,
10519 ".tls_vars") == 0)
10520 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10521 || !SYMBOL_CALLS_LOCAL (info, h))
10522 && !(input_bfd == globals->stub_bfd
10523 && strstr (input_section->name, STUB_SUFFIX))
10524 && (h == NULL
10525 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10526 && !resolved_to_zero)
10527 || h->root.type != bfd_link_hash_undefweak)
10528 && r_type != R_ARM_PC24
10529 && r_type != R_ARM_CALL
10530 && r_type != R_ARM_JUMP24
10531 && r_type != R_ARM_PREL31
10532 && r_type != R_ARM_PLT32)
10533 {
10534 Elf_Internal_Rela outrel;
10535 bool skip, relocate;
10536 int isrofixup = 0;
10537
10538 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10539 && !h->def_regular)
10540 {
10541 char *v = _("shared object");
10542
10543 if (bfd_link_executable (info))
10544 v = _("PIE executable");
10545
10546 _bfd_error_handler
10547 (_("%pB: relocation %s against external or undefined symbol `%s'"
10548 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10549 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10550 return bfd_reloc_notsupported;
10551 }
10552
10553 *unresolved_reloc_p = false;
10554
10555 if (sreloc == NULL && globals->root.dynamic_sections_created)
10556 {
10557 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10558 ! globals->use_rel);
10559
10560 if (sreloc == NULL)
10561 return bfd_reloc_notsupported;
10562 }
10563
10564 skip = false;
10565 relocate = false;
10566
10567 outrel.r_addend = addend;
10568 outrel.r_offset =
10569 _bfd_elf_section_offset (output_bfd, info, input_section,
10570 rel->r_offset);
10571 if (outrel.r_offset == (bfd_vma) -1)
10572 skip = true;
10573 else if (outrel.r_offset == (bfd_vma) -2)
10574 skip = true, relocate = true;
10575 outrel.r_offset += (input_section->output_section->vma
10576 + input_section->output_offset);
10577
10578 if (skip)
10579 memset (&outrel, 0, sizeof outrel);
10580 else if (h != NULL
10581 && h->dynindx != -1
10582 && (!bfd_link_pic (info)
10583 || !(bfd_link_pie (info)
10584 || SYMBOLIC_BIND (info, h))
10585 || !h->def_regular))
10586 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10587 else
10588 {
10589 int symbol;
10590
10591 /* This symbol is local, or marked to become local. */
10592 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI
10593 || (globals->fdpic_p && !bfd_link_pic (info)));
10594 /* On SVR4-ish systems, the dynamic loader cannot
10595 relocate the text and data segments independently,
10596 so the symbol does not matter. */
10597 symbol = 0;
10598 if (dynreloc_st_type == STT_GNU_IFUNC)
10599 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10600 to the .iplt entry. Instead, every non-call reference
10601 must use an R_ARM_IRELATIVE relocation to obtain the
10602 correct run-time address. */
10603 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10604 else if (globals->fdpic_p && !bfd_link_pic (info))
10605 isrofixup = 1;
10606 else
10607 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10608 if (globals->use_rel)
10609 relocate = true;
10610 else
10611 outrel.r_addend += dynreloc_value;
10612 }
10613
10614 if (isrofixup)
10615 arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset);
10616 else
10617 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10618
10619 /* If this reloc is against an external symbol, we do not want to
10620 fiddle with the addend. Otherwise, we need to include the symbol
10621 value so that it becomes an addend for the dynamic reloc. */
10622 if (! relocate)
10623 return bfd_reloc_ok;
10624
10625 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10626 contents, rel->r_offset,
10627 dynreloc_value, (bfd_vma) 0);
10628 }
10629 else switch (r_type)
10630 {
10631 case R_ARM_ABS12:
10632 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10633
10634 case R_ARM_XPC25: /* Arm BLX instruction. */
10635 case R_ARM_CALL:
10636 case R_ARM_JUMP24:
10637 case R_ARM_PC24: /* Arm B/BL instruction. */
10638 case R_ARM_PLT32:
10639 {
10640 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10641
10642 if (r_type == R_ARM_XPC25)
10643 {
10644 /* Check for Arm calling Arm function. */
10645 /* FIXME: Should we translate the instruction into a BL
10646 instruction instead ? */
10647 if (branch_type != ST_BRANCH_TO_THUMB)
10648 _bfd_error_handler
10649 (_("\%pB: warning: %s BLX instruction targets"
10650 " %s function '%s'"),
10651 input_bfd, "ARM",
10652 "ARM", h ? h->root.root.string : "(local)");
10653 }
10654 else if (r_type == R_ARM_PC24)
10655 {
10656 /* Check for Arm calling Thumb function. */
10657 if (branch_type == ST_BRANCH_TO_THUMB)
10658 {
10659 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10660 output_bfd, input_section,
10661 hit_data, sym_sec, rel->r_offset,
10662 signed_addend, value,
10663 error_message))
10664 return bfd_reloc_ok;
10665 else
10666 return bfd_reloc_dangerous;
10667 }
10668 }
10669
10670 /* Check if a stub has to be inserted because the
10671 destination is too far or we are changing mode. */
10672 if ( r_type == R_ARM_CALL
10673 || r_type == R_ARM_JUMP24
10674 || r_type == R_ARM_PLT32)
10675 {
10676 enum elf32_arm_stub_type stub_type = arm_stub_none;
10677 struct elf32_arm_link_hash_entry *hash;
10678
10679 hash = (struct elf32_arm_link_hash_entry *) h;
10680 stub_type = arm_type_of_stub (info, input_section, rel,
10681 st_type, &branch_type,
10682 hash, value, sym_sec,
10683 input_bfd, sym_name);
10684
10685 if (stub_type != arm_stub_none)
10686 {
10687 /* The target is out of reach, so redirect the
10688 branch to the local stub for this function. */
10689 stub_entry = elf32_arm_get_stub_entry (input_section,
10690 sym_sec, h,
10691 rel, globals,
10692 stub_type);
10693 {
10694 if (stub_entry != NULL)
10695 value = (stub_entry->stub_offset
10696 + stub_entry->stub_sec->output_offset
10697 + stub_entry->stub_sec->output_section->vma);
10698
10699 if (plt_offset != (bfd_vma) -1)
10700 *unresolved_reloc_p = false;
10701 }
10702 }
10703 else
10704 {
10705 /* If the call goes through a PLT entry, make sure to
10706 check distance to the right destination address. */
10707 if (plt_offset != (bfd_vma) -1)
10708 {
10709 value = (splt->output_section->vma
10710 + splt->output_offset
10711 + plt_offset);
10712 *unresolved_reloc_p = false;
10713 /* The PLT entry is in ARM mode, regardless of the
10714 target function. */
10715 branch_type = ST_BRANCH_TO_ARM;
10716 }
10717 }
10718 }
10719
10720 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10721 where:
10722 S is the address of the symbol in the relocation.
10723 P is address of the instruction being relocated.
10724 A is the addend (extracted from the instruction) in bytes.
10725
10726 S is held in 'value'.
10727 P is the base address of the section containing the
10728 instruction plus the offset of the reloc into that
10729 section, ie:
10730 (input_section->output_section->vma +
10731 input_section->output_offset +
10732 rel->r_offset).
10733 A is the addend, converted into bytes, ie:
10734 (signed_addend * 4)
10735
10736 Note: None of these operations have knowledge of the pipeline
10737 size of the processor, thus it is up to the assembler to
10738 encode this information into the addend. */
10739 value -= (input_section->output_section->vma
10740 + input_section->output_offset);
10741 value -= rel->r_offset;
10742 value += signed_addend;
10743
10744 signed_addend = value;
10745 signed_addend >>= howto->rightshift;
10746
10747 /* A branch to an undefined weak symbol is turned into a jump to
10748 the next instruction unless a PLT entry will be created.
10749 Do the same for local undefined symbols (but not for STN_UNDEF).
10750 The jump to the next instruction is optimized as a NOP depending
10751 on the architecture. */
10752 if (h ? (h->root.type == bfd_link_hash_undefweak
10753 && plt_offset == (bfd_vma) -1)
10754 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10755 {
10756 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10757
10758 if (arch_has_arm_nop (globals))
10759 value |= 0x0320f000;
10760 else
10761 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10762 }
10763 else
10764 {
10765 /* Perform a signed range check. */
10766 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10767 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10768 return bfd_reloc_overflow;
10769
10770 addend = (value & 2);
10771
10772 value = (signed_addend & howto->dst_mask)
10773 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10774
10775 if (r_type == R_ARM_CALL)
10776 {
10777 /* Set the H bit in the BLX instruction. */
10778 if (branch_type == ST_BRANCH_TO_THUMB)
10779 {
10780 if (addend)
10781 value |= (1 << 24);
10782 else
10783 value &= ~(bfd_vma)(1 << 24);
10784 }
10785
10786 /* Select the correct instruction (BL or BLX). */
10787 /* Only if we are not handling a BL to a stub. In this
10788 case, mode switching is performed by the stub. */
10789 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10790 value |= (1 << 28);
10791 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10792 {
10793 value &= ~(bfd_vma)(1 << 28);
10794 value |= (1 << 24);
10795 }
10796 }
10797 }
10798 }
10799 break;
10800
10801 case R_ARM_ABS32:
10802 value += addend;
10803 if (branch_type == ST_BRANCH_TO_THUMB)
10804 value |= 1;
10805 break;
10806
10807 case R_ARM_ABS32_NOI:
10808 value += addend;
10809 break;
10810
10811 case R_ARM_REL32:
10812 value += addend;
10813 if (branch_type == ST_BRANCH_TO_THUMB)
10814 value |= 1;
10815 value -= (input_section->output_section->vma
10816 + input_section->output_offset + rel->r_offset);
10817 break;
10818
10819 case R_ARM_REL32_NOI:
10820 value += addend;
10821 value -= (input_section->output_section->vma
10822 + input_section->output_offset + rel->r_offset);
10823 break;
10824
10825 case R_ARM_PREL31:
10826 value -= (input_section->output_section->vma
10827 + input_section->output_offset + rel->r_offset);
10828 value += signed_addend;
10829 if (! h || h->root.type != bfd_link_hash_undefweak)
10830 {
10831 /* Check for overflow. */
10832 if ((value ^ (value >> 1)) & (1 << 30))
10833 return bfd_reloc_overflow;
10834 }
10835 value &= 0x7fffffff;
10836 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10837 if (branch_type == ST_BRANCH_TO_THUMB)
10838 value |= 1;
10839 break;
10840 }
10841
10842 bfd_put_32 (input_bfd, value, hit_data);
10843 return bfd_reloc_ok;
10844
10845 case R_ARM_ABS8:
10846 value += addend;
10847
10848 /* There is no way to tell whether the user intended to use a signed or
10849 unsigned addend. When checking for overflow we accept either,
10850 as specified by the AAELF. */
10851 if ((long) value > 0xff || (long) value < -0x80)
10852 return bfd_reloc_overflow;
10853
10854 bfd_put_8 (input_bfd, value, hit_data);
10855 return bfd_reloc_ok;
10856
10857 case R_ARM_ABS16:
10858 value += addend;
10859
10860 /* See comment for R_ARM_ABS8. */
10861 if ((long) value > 0xffff || (long) value < -0x8000)
10862 return bfd_reloc_overflow;
10863
10864 bfd_put_16 (input_bfd, value, hit_data);
10865 return bfd_reloc_ok;
10866
10867 case R_ARM_THM_ABS5:
10868 /* Support ldr and str instructions for the thumb. */
10869 if (globals->use_rel)
10870 {
10871 /* Need to refetch addend. */
10872 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10873 /* ??? Need to determine shift amount from operand size. */
10874 addend >>= howto->rightshift;
10875 }
10876 value += addend;
10877
10878 /* ??? Isn't value unsigned? */
10879 if ((long) value > 0x1f || (long) value < -0x10)
10880 return bfd_reloc_overflow;
10881
10882 /* ??? Value needs to be properly shifted into place first. */
10883 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10884 bfd_put_16 (input_bfd, value, hit_data);
10885 return bfd_reloc_ok;
10886
10887 case R_ARM_THM_ALU_PREL_11_0:
10888 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10889 {
10890 bfd_vma insn;
10891 bfd_signed_vma relocation;
10892
10893 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10894 | bfd_get_16 (input_bfd, hit_data + 2);
10895
10896 if (globals->use_rel)
10897 {
10898 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10899 | ((insn & (1 << 26)) >> 15);
10900 if (insn & 0xf00000)
10901 signed_addend = -signed_addend;
10902 }
10903
10904 relocation = value + signed_addend;
10905 relocation -= Pa (input_section->output_section->vma
10906 + input_section->output_offset
10907 + rel->r_offset);
10908
10909 /* PR 21523: Use an absolute value. The user of this reloc will
10910 have already selected an ADD or SUB insn appropriately. */
10911 value = llabs (relocation);
10912
10913 if (value >= 0x1000)
10914 return bfd_reloc_overflow;
10915
10916 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10917 if (branch_type == ST_BRANCH_TO_THUMB)
10918 value |= 1;
10919
10920 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10921 | ((value & 0x700) << 4)
10922 | ((value & 0x800) << 15);
10923 if (relocation < 0)
10924 insn |= 0xa00000;
10925
10926 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10927 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10928
10929 return bfd_reloc_ok;
10930 }
10931
10932 case R_ARM_THM_PC8:
10933 /* PR 10073: This reloc is not generated by the GNU toolchain,
10934 but it is supported for compatibility with third party libraries
10935 generated by other compilers, specifically the ARM/IAR. */
10936 {
10937 bfd_vma insn;
10938 bfd_signed_vma relocation;
10939
10940 insn = bfd_get_16 (input_bfd, hit_data);
10941
10942 if (globals->use_rel)
10943 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10944
10945 relocation = value + addend;
10946 relocation -= Pa (input_section->output_section->vma
10947 + input_section->output_offset
10948 + rel->r_offset);
10949
10950 value = relocation;
10951
10952 /* We do not check for overflow of this reloc. Although strictly
10953 speaking this is incorrect, it appears to be necessary in order
10954 to work with IAR generated relocs. Since GCC and GAS do not
10955 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10956 a problem for them. */
10957 value &= 0x3fc;
10958
10959 insn = (insn & 0xff00) | (value >> 2);
10960
10961 bfd_put_16 (input_bfd, insn, hit_data);
10962
10963 return bfd_reloc_ok;
10964 }
10965
10966 case R_ARM_THM_PC12:
10967 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10968 {
10969 bfd_vma insn;
10970 bfd_signed_vma relocation;
10971
10972 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10973 | bfd_get_16 (input_bfd, hit_data + 2);
10974
10975 if (globals->use_rel)
10976 {
10977 signed_addend = insn & 0xfff;
10978 if (!(insn & (1 << 23)))
10979 signed_addend = -signed_addend;
10980 }
10981
10982 relocation = value + signed_addend;
10983 relocation -= Pa (input_section->output_section->vma
10984 + input_section->output_offset
10985 + rel->r_offset);
10986
10987 value = relocation;
10988
10989 if (value >= 0x1000)
10990 return bfd_reloc_overflow;
10991
10992 insn = (insn & 0xff7ff000) | value;
10993 if (relocation >= 0)
10994 insn |= (1 << 23);
10995
10996 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10997 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10998
10999 return bfd_reloc_ok;
11000 }
11001
11002 case R_ARM_THM_XPC22:
11003 case R_ARM_THM_CALL:
11004 case R_ARM_THM_JUMP24:
11005 /* Thumb BL (branch long instruction). */
11006 {
11007 bfd_vma relocation;
11008 bfd_vma reloc_sign;
11009 bool overflow = false;
11010 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11011 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11012 bfd_signed_vma reloc_signed_max;
11013 bfd_signed_vma reloc_signed_min;
11014 bfd_vma check;
11015 bfd_signed_vma signed_check;
11016 int bitsize;
11017 const int thumb2 = using_thumb2 (globals);
11018 const int thumb2_bl = using_thumb2_bl (globals);
11019
11020 /* A branch to an undefined weak symbol is turned into a jump to
11021 the next instruction unless a PLT entry will be created.
11022 The jump to the next instruction is optimized as a NOP.W for
11023 Thumb-2 enabled architectures. */
11024 if (h && h->root.type == bfd_link_hash_undefweak
11025 && plt_offset == (bfd_vma) -1)
11026 {
11027 if (thumb2)
11028 {
11029 bfd_put_16 (input_bfd, 0xf3af, hit_data);
11030 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
11031 }
11032 else
11033 {
11034 bfd_put_16 (input_bfd, 0xe000, hit_data);
11035 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
11036 }
11037 return bfd_reloc_ok;
11038 }
11039
11040 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
11041 with Thumb-1) involving the J1 and J2 bits. */
11042 if (globals->use_rel)
11043 {
11044 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
11045 bfd_vma upper = upper_insn & 0x3ff;
11046 bfd_vma lower = lower_insn & 0x7ff;
11047 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
11048 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
11049 bfd_vma i1 = j1 ^ s ? 0 : 1;
11050 bfd_vma i2 = j2 ^ s ? 0 : 1;
11051
11052 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
11053 /* Sign extend. */
11054 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
11055
11056 signed_addend = addend;
11057 }
11058
11059 if (r_type == R_ARM_THM_XPC22)
11060 {
11061 /* Check for Thumb to Thumb call. */
11062 /* FIXME: Should we translate the instruction into a BL
11063 instruction instead ? */
11064 if (branch_type == ST_BRANCH_TO_THUMB)
11065 _bfd_error_handler
11066 (_("%pB: warning: %s BLX instruction targets"
11067 " %s function '%s'"),
11068 input_bfd, "Thumb",
11069 "Thumb", h ? h->root.root.string : "(local)");
11070 }
11071 else
11072 {
11073 /* If it is not a call to Thumb, assume call to Arm.
11074 If it is a call relative to a section name, then it is not a
11075 function call at all, but rather a long jump. Calls through
11076 the PLT do not require stubs. */
11077 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
11078 {
11079 if (globals->use_blx && r_type == R_ARM_THM_CALL)
11080 {
11081 /* Convert BL to BLX. */
11082 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11083 }
11084 else if (( r_type != R_ARM_THM_CALL)
11085 && (r_type != R_ARM_THM_JUMP24))
11086 {
11087 if (elf32_thumb_to_arm_stub
11088 (info, sym_name, input_bfd, output_bfd, input_section,
11089 hit_data, sym_sec, rel->r_offset, signed_addend, value,
11090 error_message))
11091 return bfd_reloc_ok;
11092 else
11093 return bfd_reloc_dangerous;
11094 }
11095 }
11096 else if (branch_type == ST_BRANCH_TO_THUMB
11097 && globals->use_blx
11098 && r_type == R_ARM_THM_CALL)
11099 {
11100 /* Make sure this is a BL. */
11101 lower_insn |= 0x1800;
11102 }
11103 }
11104
11105 enum elf32_arm_stub_type stub_type = arm_stub_none;
11106 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
11107 {
11108 /* Check if a stub has to be inserted because the destination
11109 is too far. */
11110 struct elf32_arm_stub_hash_entry *stub_entry;
11111 struct elf32_arm_link_hash_entry *hash;
11112
11113 hash = (struct elf32_arm_link_hash_entry *) h;
11114
11115 stub_type = arm_type_of_stub (info, input_section, rel,
11116 st_type, &branch_type,
11117 hash, value, sym_sec,
11118 input_bfd, sym_name);
11119
11120 if (stub_type != arm_stub_none)
11121 {
11122 /* The target is out of reach or we are changing modes, so
11123 redirect the branch to the local stub for this
11124 function. */
11125 stub_entry = elf32_arm_get_stub_entry (input_section,
11126 sym_sec, h,
11127 rel, globals,
11128 stub_type);
11129 if (stub_entry != NULL)
11130 {
11131 value = (stub_entry->stub_offset
11132 + stub_entry->stub_sec->output_offset
11133 + stub_entry->stub_sec->output_section->vma);
11134
11135 if (plt_offset != (bfd_vma) -1)
11136 *unresolved_reloc_p = false;
11137 }
11138
11139 /* If this call becomes a call to Arm, force BLX. */
11140 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
11141 {
11142 if ((stub_entry
11143 && !arm_stub_is_thumb (stub_entry->stub_type))
11144 || branch_type != ST_BRANCH_TO_THUMB)
11145 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11146 }
11147 }
11148 }
11149
11150 /* Handle calls via the PLT. */
11151 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
11152 {
11153 value = (splt->output_section->vma
11154 + splt->output_offset
11155 + plt_offset);
11156
11157 if (globals->use_blx
11158 && r_type == R_ARM_THM_CALL
11159 && ! using_thumb_only (globals))
11160 {
11161 /* If the Thumb BLX instruction is available, convert
11162 the BL to a BLX instruction to call the ARM-mode
11163 PLT entry. */
11164 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11165 branch_type = ST_BRANCH_TO_ARM;
11166 }
11167 else
11168 {
11169 if (! using_thumb_only (globals))
11170 /* Target the Thumb stub before the ARM PLT entry. */
11171 value -= PLT_THUMB_STUB_SIZE;
11172 branch_type = ST_BRANCH_TO_THUMB;
11173 }
11174 *unresolved_reloc_p = false;
11175 }
11176
11177 relocation = value + signed_addend;
11178
11179 relocation -= (input_section->output_section->vma
11180 + input_section->output_offset
11181 + rel->r_offset);
11182
11183 check = relocation >> howto->rightshift;
11184
11185 /* If this is a signed value, the rightshift just dropped
11186 leading 1 bits (assuming twos complement). */
11187 if ((bfd_signed_vma) relocation >= 0)
11188 signed_check = check;
11189 else
11190 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
11191
11192 /* Calculate the permissable maximum and minimum values for
11193 this relocation according to whether we're relocating for
11194 Thumb-2 or not. */
11195 bitsize = howto->bitsize;
11196 if (!thumb2_bl)
11197 bitsize -= 2;
11198 reloc_signed_max = (1 << (bitsize - 1)) - 1;
11199 reloc_signed_min = ~reloc_signed_max;
11200
11201 /* Assumes two's complement. */
11202 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11203 overflow = true;
11204
11205 if ((lower_insn & 0x5000) == 0x4000)
11206 /* For a BLX instruction, make sure that the relocation is rounded up
11207 to a word boundary. This follows the semantics of the instruction
11208 which specifies that bit 1 of the target address will come from bit
11209 1 of the base address. */
11210 relocation = (relocation + 2) & ~ 3;
11211
11212 /* Put RELOCATION back into the insn. Assumes two's complement.
11213 We use the Thumb-2 encoding, which is safe even if dealing with
11214 a Thumb-1 instruction by virtue of our overflow check above. */
11215 reloc_sign = (signed_check < 0) ? 1 : 0;
11216 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
11217 | ((relocation >> 12) & 0x3ff)
11218 | (reloc_sign << 10);
11219 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
11220 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
11221 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
11222 | ((relocation >> 1) & 0x7ff);
11223
11224 /* Put the relocated value back in the object file: */
11225 bfd_put_16 (input_bfd, upper_insn, hit_data);
11226 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11227
11228 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11229 }
11230 break;
11231
11232 case R_ARM_THM_JUMP19:
11233 /* Thumb32 conditional branch instruction. */
11234 {
11235 bfd_vma relocation;
11236 bool overflow = false;
11237 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11238 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11239 bfd_signed_vma reloc_signed_max = 0xffffe;
11240 bfd_signed_vma reloc_signed_min = -0x100000;
11241 bfd_signed_vma signed_check;
11242 enum elf32_arm_stub_type stub_type = arm_stub_none;
11243 struct elf32_arm_stub_hash_entry *stub_entry;
11244 struct elf32_arm_link_hash_entry *hash;
11245
11246 /* Need to refetch the addend, reconstruct the top three bits,
11247 and squish the two 11 bit pieces together. */
11248 if (globals->use_rel)
11249 {
11250 bfd_vma S = (upper_insn & 0x0400) >> 10;
11251 bfd_vma upper = (upper_insn & 0x003f);
11252 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
11253 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
11254 bfd_vma lower = (lower_insn & 0x07ff);
11255
11256 upper |= J1 << 6;
11257 upper |= J2 << 7;
11258 upper |= (!S) << 8;
11259 upper -= 0x0100; /* Sign extend. */
11260
11261 addend = (upper << 12) | (lower << 1);
11262 signed_addend = addend;
11263 }
11264
11265 /* Handle calls via the PLT. */
11266 if (plt_offset != (bfd_vma) -1)
11267 {
11268 value = (splt->output_section->vma
11269 + splt->output_offset
11270 + plt_offset);
11271 /* Target the Thumb stub before the ARM PLT entry. */
11272 value -= PLT_THUMB_STUB_SIZE;
11273 *unresolved_reloc_p = false;
11274 }
11275
11276 hash = (struct elf32_arm_link_hash_entry *)h;
11277
11278 stub_type = arm_type_of_stub (info, input_section, rel,
11279 st_type, &branch_type,
11280 hash, value, sym_sec,
11281 input_bfd, sym_name);
11282 if (stub_type != arm_stub_none)
11283 {
11284 stub_entry = elf32_arm_get_stub_entry (input_section,
11285 sym_sec, h,
11286 rel, globals,
11287 stub_type);
11288 if (stub_entry != NULL)
11289 {
11290 value = (stub_entry->stub_offset
11291 + stub_entry->stub_sec->output_offset
11292 + stub_entry->stub_sec->output_section->vma);
11293 }
11294 }
11295
11296 relocation = value + signed_addend;
11297 relocation -= (input_section->output_section->vma
11298 + input_section->output_offset
11299 + rel->r_offset);
11300 signed_check = (bfd_signed_vma) relocation;
11301
11302 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11303 overflow = true;
11304
11305 /* Put RELOCATION back into the insn. */
11306 {
11307 bfd_vma S = (relocation & 0x00100000) >> 20;
11308 bfd_vma J2 = (relocation & 0x00080000) >> 19;
11309 bfd_vma J1 = (relocation & 0x00040000) >> 18;
11310 bfd_vma hi = (relocation & 0x0003f000) >> 12;
11311 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
11312
11313 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
11314 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
11315 }
11316
11317 /* Put the relocated value back in the object file: */
11318 bfd_put_16 (input_bfd, upper_insn, hit_data);
11319 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11320
11321 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11322 }
11323
11324 case R_ARM_THM_JUMP11:
11325 case R_ARM_THM_JUMP8:
11326 case R_ARM_THM_JUMP6:
11327 /* Thumb B (branch) instruction). */
11328 {
11329 bfd_signed_vma relocation;
11330 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
11331 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
11332 bfd_signed_vma signed_check;
11333
11334 /* CZB cannot jump backward. */
11335 if (r_type == R_ARM_THM_JUMP6)
11336 {
11337 reloc_signed_min = 0;
11338 if (globals->use_rel)
11339 signed_addend = ((addend & 0x200) >> 3) | ((addend & 0xf8) >> 2);
11340 }
11341
11342 relocation = value + signed_addend;
11343
11344 relocation -= (input_section->output_section->vma
11345 + input_section->output_offset
11346 + rel->r_offset);
11347
11348 relocation >>= howto->rightshift;
11349 signed_check = relocation;
11350
11351 if (r_type == R_ARM_THM_JUMP6)
11352 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
11353 else
11354 relocation &= howto->dst_mask;
11355 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
11356
11357 bfd_put_16 (input_bfd, relocation, hit_data);
11358
11359 /* Assumes two's complement. */
11360 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11361 return bfd_reloc_overflow;
11362
11363 return bfd_reloc_ok;
11364 }
11365
11366 case R_ARM_ALU_PCREL7_0:
11367 case R_ARM_ALU_PCREL15_8:
11368 case R_ARM_ALU_PCREL23_15:
11369 {
11370 bfd_vma insn;
11371 bfd_vma relocation;
11372
11373 insn = bfd_get_32 (input_bfd, hit_data);
11374 if (globals->use_rel)
11375 {
11376 /* Extract the addend. */
11377 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
11378 signed_addend = addend;
11379 }
11380 relocation = value + signed_addend;
11381
11382 relocation -= (input_section->output_section->vma
11383 + input_section->output_offset
11384 + rel->r_offset);
11385 insn = (insn & ~0xfff)
11386 | ((howto->bitpos << 7) & 0xf00)
11387 | ((relocation >> howto->bitpos) & 0xff);
11388 bfd_put_32 (input_bfd, value, hit_data);
11389 }
11390 return bfd_reloc_ok;
11391
11392 case R_ARM_GNU_VTINHERIT:
11393 case R_ARM_GNU_VTENTRY:
11394 return bfd_reloc_ok;
11395
11396 case R_ARM_GOTOFF32:
11397 /* Relocation is relative to the start of the
11398 global offset table. */
11399
11400 BFD_ASSERT (sgot != NULL);
11401 if (sgot == NULL)
11402 return bfd_reloc_notsupported;
11403
11404 /* If we are addressing a Thumb function, we need to adjust the
11405 address by one, so that attempts to call the function pointer will
11406 correctly interpret it as Thumb code. */
11407 if (branch_type == ST_BRANCH_TO_THUMB)
11408 value += 1;
11409
11410 /* Note that sgot->output_offset is not involved in this
11411 calculation. We always want the start of .got. If we
11412 define _GLOBAL_OFFSET_TABLE in a different way, as is
11413 permitted by the ABI, we might have to change this
11414 calculation. */
11415 value -= sgot->output_section->vma;
11416 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11417 contents, rel->r_offset, value,
11418 rel->r_addend);
11419
11420 case R_ARM_GOTPC:
11421 /* Use global offset table as symbol value. */
11422 BFD_ASSERT (sgot != NULL);
11423
11424 if (sgot == NULL)
11425 return bfd_reloc_notsupported;
11426
11427 *unresolved_reloc_p = false;
11428 value = sgot->output_section->vma;
11429 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11430 contents, rel->r_offset, value,
11431 rel->r_addend);
11432
11433 case R_ARM_GOT32:
11434 case R_ARM_GOT_PREL:
11435 /* Relocation is to the entry for this symbol in the
11436 global offset table. */
11437 if (sgot == NULL)
11438 return bfd_reloc_notsupported;
11439
11440 if (dynreloc_st_type == STT_GNU_IFUNC
11441 && plt_offset != (bfd_vma) -1
11442 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11443 {
11444 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11445 symbol, and the relocation resolves directly to the runtime
11446 target rather than to the .iplt entry. This means that any
11447 .got entry would be the same value as the .igot.plt entry,
11448 so there's no point creating both. */
11449 sgot = globals->root.igotplt;
11450 value = sgot->output_offset + gotplt_offset;
11451 }
11452 else if (h != NULL)
11453 {
11454 bfd_vma off;
11455
11456 off = h->got.offset;
11457 BFD_ASSERT (off != (bfd_vma) -1);
11458 if ((off & 1) != 0)
11459 {
11460 /* We have already processsed one GOT relocation against
11461 this symbol. */
11462 off &= ~1;
11463 if (globals->root.dynamic_sections_created
11464 && !SYMBOL_REFERENCES_LOCAL (info, h))
11465 *unresolved_reloc_p = false;
11466 }
11467 else
11468 {
11469 Elf_Internal_Rela outrel;
11470 int isrofixup = 0;
11471
11472 if (((h->dynindx != -1) || globals->fdpic_p)
11473 && !SYMBOL_REFERENCES_LOCAL (info, h))
11474 {
11475 /* If the symbol doesn't resolve locally in a static
11476 object, we have an undefined reference. If the
11477 symbol doesn't resolve locally in a dynamic object,
11478 it should be resolved by the dynamic linker. */
11479 if (globals->root.dynamic_sections_created)
11480 {
11481 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11482 *unresolved_reloc_p = false;
11483 }
11484 else
11485 outrel.r_info = 0;
11486 outrel.r_addend = 0;
11487 }
11488 else
11489 {
11490 if (dynreloc_st_type == STT_GNU_IFUNC)
11491 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11492 else if (bfd_link_pic (info)
11493 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
11494 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11495 else
11496 {
11497 outrel.r_info = 0;
11498 if (globals->fdpic_p)
11499 isrofixup = 1;
11500 }
11501 outrel.r_addend = dynreloc_value;
11502 }
11503
11504 /* The GOT entry is initialized to zero by default.
11505 See if we should install a different value. */
11506 if (outrel.r_addend != 0
11507 && (globals->use_rel || outrel.r_info == 0))
11508 {
11509 bfd_put_32 (output_bfd, outrel.r_addend,
11510 sgot->contents + off);
11511 outrel.r_addend = 0;
11512 }
11513
11514 if (isrofixup)
11515 arm_elf_add_rofixup (output_bfd,
11516 elf32_arm_hash_table (info)->srofixup,
11517 sgot->output_section->vma
11518 + sgot->output_offset + off);
11519
11520 else if (outrel.r_info != 0)
11521 {
11522 outrel.r_offset = (sgot->output_section->vma
11523 + sgot->output_offset
11524 + off);
11525 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11526 }
11527
11528 h->got.offset |= 1;
11529 }
11530 value = sgot->output_offset + off;
11531 }
11532 else
11533 {
11534 bfd_vma off;
11535
11536 BFD_ASSERT (local_got_offsets != NULL
11537 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11538
11539 off = local_got_offsets[r_symndx];
11540
11541 /* The offset must always be a multiple of 4. We use the
11542 least significant bit to record whether we have already
11543 generated the necessary reloc. */
11544 if ((off & 1) != 0)
11545 off &= ~1;
11546 else
11547 {
11548 Elf_Internal_Rela outrel;
11549 int isrofixup = 0;
11550
11551 if (dynreloc_st_type == STT_GNU_IFUNC)
11552 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11553 else if (bfd_link_pic (info))
11554 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11555 else
11556 {
11557 outrel.r_info = 0;
11558 if (globals->fdpic_p)
11559 isrofixup = 1;
11560 }
11561
11562 /* The GOT entry is initialized to zero by default.
11563 See if we should install a different value. */
11564 if (globals->use_rel || outrel.r_info == 0)
11565 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11566
11567 if (isrofixup)
11568 arm_elf_add_rofixup (output_bfd,
11569 globals->srofixup,
11570 sgot->output_section->vma
11571 + sgot->output_offset + off);
11572
11573 else if (outrel.r_info != 0)
11574 {
11575 outrel.r_addend = addend + dynreloc_value;
11576 outrel.r_offset = (sgot->output_section->vma
11577 + sgot->output_offset
11578 + off);
11579 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11580 }
11581
11582 local_got_offsets[r_symndx] |= 1;
11583 }
11584
11585 value = sgot->output_offset + off;
11586 }
11587 if (r_type != R_ARM_GOT32)
11588 value += sgot->output_section->vma;
11589
11590 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11591 contents, rel->r_offset, value,
11592 rel->r_addend);
11593
11594 case R_ARM_TLS_LDO32:
11595 value = value - dtpoff_base (info);
11596
11597 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11598 contents, rel->r_offset, value,
11599 rel->r_addend);
11600
11601 case R_ARM_TLS_LDM32:
11602 case R_ARM_TLS_LDM32_FDPIC:
11603 {
11604 bfd_vma off;
11605
11606 if (sgot == NULL)
11607 abort ();
11608
11609 off = globals->tls_ldm_got.offset;
11610
11611 if ((off & 1) != 0)
11612 off &= ~1;
11613 else
11614 {
11615 /* If we don't know the module number, create a relocation
11616 for it. */
11617 if (bfd_link_dll (info))
11618 {
11619 Elf_Internal_Rela outrel;
11620
11621 if (srelgot == NULL)
11622 abort ();
11623
11624 outrel.r_addend = 0;
11625 outrel.r_offset = (sgot->output_section->vma
11626 + sgot->output_offset + off);
11627 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11628
11629 if (globals->use_rel)
11630 bfd_put_32 (output_bfd, outrel.r_addend,
11631 sgot->contents + off);
11632
11633 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11634 }
11635 else
11636 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11637
11638 globals->tls_ldm_got.offset |= 1;
11639 }
11640
11641 if (r_type == R_ARM_TLS_LDM32_FDPIC)
11642 {
11643 bfd_put_32 (output_bfd,
11644 globals->root.sgot->output_offset + off,
11645 contents + rel->r_offset);
11646
11647 return bfd_reloc_ok;
11648 }
11649 else
11650 {
11651 value = sgot->output_section->vma + sgot->output_offset + off
11652 - (input_section->output_section->vma
11653 + input_section->output_offset + rel->r_offset);
11654
11655 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11656 contents, rel->r_offset, value,
11657 rel->r_addend);
11658 }
11659 }
11660
11661 case R_ARM_TLS_CALL:
11662 case R_ARM_THM_TLS_CALL:
11663 case R_ARM_TLS_GD32:
11664 case R_ARM_TLS_GD32_FDPIC:
11665 case R_ARM_TLS_IE32:
11666 case R_ARM_TLS_IE32_FDPIC:
11667 case R_ARM_TLS_GOTDESC:
11668 case R_ARM_TLS_DESCSEQ:
11669 case R_ARM_THM_TLS_DESCSEQ:
11670 {
11671 bfd_vma off, offplt;
11672 int indx = 0;
11673 char tls_type;
11674
11675 BFD_ASSERT (sgot != NULL);
11676
11677 if (h != NULL)
11678 {
11679 bool dyn;
11680 dyn = globals->root.dynamic_sections_created;
11681 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11682 bfd_link_pic (info),
11683 h)
11684 && (!bfd_link_pic (info)
11685 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11686 {
11687 *unresolved_reloc_p = false;
11688 indx = h->dynindx;
11689 }
11690 off = h->got.offset;
11691 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11692 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11693 }
11694 else
11695 {
11696 BFD_ASSERT (local_got_offsets != NULL);
11697
11698 if (r_symndx >= elf32_arm_num_entries (input_bfd))
11699 {
11700 _bfd_error_handler (_("\
11701 %pB: expected symbol index in range 0..%lu but found local symbol with index %lu"),
11702 input_bfd,
11703 (unsigned long) elf32_arm_num_entries (input_bfd),
11704 r_symndx);
11705 return false;
11706 }
11707 off = local_got_offsets[r_symndx];
11708 offplt = local_tlsdesc_gotents[r_symndx];
11709 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11710 }
11711
11712 /* Linker relaxations happens from one of the
11713 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11714 if (ELF32_R_TYPE (rel->r_info) != r_type)
11715 tls_type = GOT_TLS_IE;
11716
11717 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11718
11719 if ((off & 1) != 0)
11720 off &= ~1;
11721 else
11722 {
11723 bool need_relocs = false;
11724 Elf_Internal_Rela outrel;
11725 int cur_off = off;
11726
11727 /* The GOT entries have not been initialized yet. Do it
11728 now, and emit any relocations. If both an IE GOT and a
11729 GD GOT are necessary, we emit the GD first. */
11730
11731 if ((bfd_link_dll (info) || indx != 0)
11732 && (h == NULL
11733 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11734 && !resolved_to_zero)
11735 || h->root.type != bfd_link_hash_undefweak))
11736 {
11737 need_relocs = true;
11738 BFD_ASSERT (srelgot != NULL);
11739 }
11740
11741 if (tls_type & GOT_TLS_GDESC)
11742 {
11743 bfd_byte *loc;
11744
11745 /* We should have relaxed, unless this is an undefined
11746 weak symbol. */
11747 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11748 || bfd_link_dll (info));
11749 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11750 <= globals->root.sgotplt->size);
11751
11752 outrel.r_addend = 0;
11753 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11754 + globals->root.sgotplt->output_offset
11755 + offplt
11756 + globals->sgotplt_jump_table_size);
11757
11758 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11759 sreloc = globals->root.srelplt;
11760 loc = sreloc->contents;
11761 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11762 BFD_ASSERT (loc + RELOC_SIZE (globals)
11763 <= sreloc->contents + sreloc->size);
11764
11765 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11766
11767 /* For globals, the first word in the relocation gets
11768 the relocation index and the top bit set, or zero,
11769 if we're binding now. For locals, it gets the
11770 symbol's offset in the tls section. */
11771 bfd_put_32 (output_bfd,
11772 !h ? value - elf_hash_table (info)->tls_sec->vma
11773 : info->flags & DF_BIND_NOW ? 0
11774 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11775 globals->root.sgotplt->contents + offplt
11776 + globals->sgotplt_jump_table_size);
11777
11778 /* Second word in the relocation is always zero. */
11779 bfd_put_32 (output_bfd, 0,
11780 globals->root.sgotplt->contents + offplt
11781 + globals->sgotplt_jump_table_size + 4);
11782 }
11783 if (tls_type & GOT_TLS_GD)
11784 {
11785 if (need_relocs)
11786 {
11787 outrel.r_addend = 0;
11788 outrel.r_offset = (sgot->output_section->vma
11789 + sgot->output_offset
11790 + cur_off);
11791 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11792
11793 if (globals->use_rel)
11794 bfd_put_32 (output_bfd, outrel.r_addend,
11795 sgot->contents + cur_off);
11796
11797 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11798
11799 if (indx == 0)
11800 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11801 sgot->contents + cur_off + 4);
11802 else
11803 {
11804 outrel.r_addend = 0;
11805 outrel.r_info = ELF32_R_INFO (indx,
11806 R_ARM_TLS_DTPOFF32);
11807 outrel.r_offset += 4;
11808
11809 if (globals->use_rel)
11810 bfd_put_32 (output_bfd, outrel.r_addend,
11811 sgot->contents + cur_off + 4);
11812
11813 elf32_arm_add_dynreloc (output_bfd, info,
11814 srelgot, &outrel);
11815 }
11816 }
11817 else
11818 {
11819 /* If we are not emitting relocations for a
11820 general dynamic reference, then we must be in a
11821 static link or an executable link with the
11822 symbol binding locally. Mark it as belonging
11823 to module 1, the executable. */
11824 bfd_put_32 (output_bfd, 1,
11825 sgot->contents + cur_off);
11826 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11827 sgot->contents + cur_off + 4);
11828 }
11829
11830 cur_off += 8;
11831 }
11832
11833 if (tls_type & GOT_TLS_IE)
11834 {
11835 if (need_relocs)
11836 {
11837 if (indx == 0)
11838 outrel.r_addend = value - dtpoff_base (info);
11839 else
11840 outrel.r_addend = 0;
11841 outrel.r_offset = (sgot->output_section->vma
11842 + sgot->output_offset
11843 + cur_off);
11844 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11845
11846 if (globals->use_rel)
11847 bfd_put_32 (output_bfd, outrel.r_addend,
11848 sgot->contents + cur_off);
11849
11850 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11851 }
11852 else
11853 bfd_put_32 (output_bfd, tpoff (info, value),
11854 sgot->contents + cur_off);
11855 cur_off += 4;
11856 }
11857
11858 if (h != NULL)
11859 h->got.offset |= 1;
11860 else
11861 local_got_offsets[r_symndx] |= 1;
11862 }
11863
11864 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32 && r_type != R_ARM_TLS_GD32_FDPIC)
11865 off += 8;
11866 else if (tls_type & GOT_TLS_GDESC)
11867 off = offplt;
11868
11869 if (ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
11870 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL)
11871 {
11872 bfd_signed_vma offset;
11873 /* TLS stubs are arm mode. The original symbol is a
11874 data object, so branch_type is bogus. */
11875 branch_type = ST_BRANCH_TO_ARM;
11876 enum elf32_arm_stub_type stub_type
11877 = arm_type_of_stub (info, input_section, rel,
11878 st_type, &branch_type,
11879 (struct elf32_arm_link_hash_entry *)h,
11880 globals->tls_trampoline, globals->root.splt,
11881 input_bfd, sym_name);
11882
11883 if (stub_type != arm_stub_none)
11884 {
11885 struct elf32_arm_stub_hash_entry *stub_entry
11886 = elf32_arm_get_stub_entry
11887 (input_section, globals->root.splt, 0, rel,
11888 globals, stub_type);
11889 offset = (stub_entry->stub_offset
11890 + stub_entry->stub_sec->output_offset
11891 + stub_entry->stub_sec->output_section->vma);
11892 }
11893 else
11894 offset = (globals->root.splt->output_section->vma
11895 + globals->root.splt->output_offset
11896 + globals->tls_trampoline);
11897
11898 if (ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL)
11899 {
11900 unsigned long inst;
11901
11902 offset -= (input_section->output_section->vma
11903 + input_section->output_offset
11904 + rel->r_offset + 8);
11905
11906 inst = offset >> 2;
11907 inst &= 0x00ffffff;
11908 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11909 }
11910 else
11911 {
11912 /* Thumb blx encodes the offset in a complicated
11913 fashion. */
11914 unsigned upper_insn, lower_insn;
11915 unsigned neg;
11916
11917 offset -= (input_section->output_section->vma
11918 + input_section->output_offset
11919 + rel->r_offset + 4);
11920
11921 if (stub_type != arm_stub_none
11922 && arm_stub_is_thumb (stub_type))
11923 {
11924 lower_insn = 0xd000;
11925 }
11926 else
11927 {
11928 lower_insn = 0xc000;
11929 /* Round up the offset to a word boundary. */
11930 offset = (offset + 2) & ~2;
11931 }
11932
11933 neg = offset < 0;
11934 upper_insn = (0xf000
11935 | ((offset >> 12) & 0x3ff)
11936 | (neg << 10));
11937 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11938 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11939 | ((offset >> 1) & 0x7ff);
11940 bfd_put_16 (input_bfd, upper_insn, hit_data);
11941 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11942 return bfd_reloc_ok;
11943 }
11944 }
11945 /* These relocations needs special care, as besides the fact
11946 they point somewhere in .gotplt, the addend must be
11947 adjusted accordingly depending on the type of instruction
11948 we refer to. */
11949 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11950 {
11951 unsigned long data, insn;
11952 unsigned thumb;
11953
11954 data = bfd_get_signed_32 (input_bfd, hit_data);
11955 thumb = data & 1;
11956 data &= ~1ul;
11957
11958 if (thumb)
11959 {
11960 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11961 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11962 insn = (insn << 16)
11963 | bfd_get_16 (input_bfd,
11964 contents + rel->r_offset - data + 2);
11965 if ((insn & 0xf800c000) == 0xf000c000)
11966 /* bl/blx */
11967 value = -6;
11968 else if ((insn & 0xffffff00) == 0x4400)
11969 /* add */
11970 value = -5;
11971 else
11972 {
11973 _bfd_error_handler
11974 /* xgettext:c-format */
11975 (_("%pB(%pA+%#" PRIx64 "): "
11976 "unexpected %s instruction '%#lx' "
11977 "referenced by TLS_GOTDESC"),
11978 input_bfd, input_section, (uint64_t) rel->r_offset,
11979 "Thumb", insn);
11980 return bfd_reloc_notsupported;
11981 }
11982 }
11983 else
11984 {
11985 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11986
11987 switch (insn >> 24)
11988 {
11989 case 0xeb: /* bl */
11990 case 0xfa: /* blx */
11991 value = -4;
11992 break;
11993
11994 case 0xe0: /* add */
11995 value = -8;
11996 break;
11997
11998 default:
11999 _bfd_error_handler
12000 /* xgettext:c-format */
12001 (_("%pB(%pA+%#" PRIx64 "): "
12002 "unexpected %s instruction '%#lx' "
12003 "referenced by TLS_GOTDESC"),
12004 input_bfd, input_section, (uint64_t) rel->r_offset,
12005 "ARM", insn);
12006 return bfd_reloc_notsupported;
12007 }
12008 }
12009
12010 value += ((globals->root.sgotplt->output_section->vma
12011 + globals->root.sgotplt->output_offset + off)
12012 - (input_section->output_section->vma
12013 + input_section->output_offset
12014 + rel->r_offset)
12015 + globals->sgotplt_jump_table_size);
12016 }
12017 else
12018 value = ((globals->root.sgot->output_section->vma
12019 + globals->root.sgot->output_offset + off)
12020 - (input_section->output_section->vma
12021 + input_section->output_offset + rel->r_offset));
12022
12023 if (globals->fdpic_p && (r_type == R_ARM_TLS_GD32_FDPIC ||
12024 r_type == R_ARM_TLS_IE32_FDPIC))
12025 {
12026 /* For FDPIC relocations, resolve to the offset of the GOT
12027 entry from the start of GOT. */
12028 bfd_put_32 (output_bfd,
12029 globals->root.sgot->output_offset + off,
12030 contents + rel->r_offset);
12031
12032 return bfd_reloc_ok;
12033 }
12034 else
12035 {
12036 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12037 contents, rel->r_offset, value,
12038 rel->r_addend);
12039 }
12040 }
12041
12042 case R_ARM_TLS_LE32:
12043 if (bfd_link_dll (info))
12044 {
12045 _bfd_error_handler
12046 /* xgettext:c-format */
12047 (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted "
12048 "in shared object"),
12049 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name);
12050 return bfd_reloc_notsupported;
12051 }
12052 else
12053 value = tpoff (info, value);
12054
12055 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12056 contents, rel->r_offset, value,
12057 rel->r_addend);
12058
12059 case R_ARM_V4BX:
12060 if (globals->fix_v4bx)
12061 {
12062 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12063
12064 /* Ensure that we have a BX instruction. */
12065 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
12066
12067 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
12068 {
12069 /* Branch to veneer. */
12070 bfd_vma glue_addr;
12071 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
12072 glue_addr -= input_section->output_section->vma
12073 + input_section->output_offset
12074 + rel->r_offset + 8;
12075 insn = (insn & 0xf0000000) | 0x0a000000
12076 | ((glue_addr >> 2) & 0x00ffffff);
12077 }
12078 else
12079 {
12080 /* Preserve Rm (lowest four bits) and the condition code
12081 (highest four bits). Other bits encode MOV PC,Rm. */
12082 insn = (insn & 0xf000000f) | 0x01a0f000;
12083 }
12084
12085 bfd_put_32 (input_bfd, insn, hit_data);
12086 }
12087 return bfd_reloc_ok;
12088
12089 case R_ARM_MOVW_ABS_NC:
12090 case R_ARM_MOVT_ABS:
12091 case R_ARM_MOVW_PREL_NC:
12092 case R_ARM_MOVT_PREL:
12093 /* Until we properly support segment-base-relative addressing then
12094 we assume the segment base to be zero, as for the group relocations.
12095 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
12096 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
12097 case R_ARM_MOVW_BREL_NC:
12098 case R_ARM_MOVW_BREL:
12099 case R_ARM_MOVT_BREL:
12100 {
12101 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12102
12103 if (globals->use_rel)
12104 {
12105 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
12106 signed_addend = (addend ^ 0x8000) - 0x8000;
12107 }
12108
12109 value += signed_addend;
12110
12111 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
12112 value -= (input_section->output_section->vma
12113 + input_section->output_offset + rel->r_offset);
12114
12115 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
12116 return bfd_reloc_overflow;
12117
12118 if (branch_type == ST_BRANCH_TO_THUMB)
12119 value |= 1;
12120
12121 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
12122 || r_type == R_ARM_MOVT_BREL)
12123 value >>= 16;
12124
12125 insn &= 0xfff0f000;
12126 insn |= value & 0xfff;
12127 insn |= (value & 0xf000) << 4;
12128 bfd_put_32 (input_bfd, insn, hit_data);
12129 }
12130 return bfd_reloc_ok;
12131
12132 case R_ARM_THM_MOVW_ABS_NC:
12133 case R_ARM_THM_MOVT_ABS:
12134 case R_ARM_THM_MOVW_PREL_NC:
12135 case R_ARM_THM_MOVT_PREL:
12136 /* Until we properly support segment-base-relative addressing then
12137 we assume the segment base to be zero, as for the above relocations.
12138 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
12139 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
12140 as R_ARM_THM_MOVT_ABS. */
12141 case R_ARM_THM_MOVW_BREL_NC:
12142 case R_ARM_THM_MOVW_BREL:
12143 case R_ARM_THM_MOVT_BREL:
12144 {
12145 bfd_vma insn;
12146
12147 insn = bfd_get_16 (input_bfd, hit_data) << 16;
12148 insn |= bfd_get_16 (input_bfd, hit_data + 2);
12149
12150 if (globals->use_rel)
12151 {
12152 addend = ((insn >> 4) & 0xf000)
12153 | ((insn >> 15) & 0x0800)
12154 | ((insn >> 4) & 0x0700)
12155 | (insn & 0x00ff);
12156 signed_addend = (addend ^ 0x8000) - 0x8000;
12157 }
12158
12159 value += signed_addend;
12160
12161 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
12162 value -= (input_section->output_section->vma
12163 + input_section->output_offset + rel->r_offset);
12164
12165 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
12166 return bfd_reloc_overflow;
12167
12168 if (branch_type == ST_BRANCH_TO_THUMB)
12169 value |= 1;
12170
12171 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
12172 || r_type == R_ARM_THM_MOVT_BREL)
12173 value >>= 16;
12174
12175 insn &= 0xfbf08f00;
12176 insn |= (value & 0xf000) << 4;
12177 insn |= (value & 0x0800) << 15;
12178 insn |= (value & 0x0700) << 4;
12179 insn |= (value & 0x00ff);
12180
12181 bfd_put_16 (input_bfd, insn >> 16, hit_data);
12182 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
12183 }
12184 return bfd_reloc_ok;
12185
12186 case R_ARM_ALU_PC_G0_NC:
12187 case R_ARM_ALU_PC_G1_NC:
12188 case R_ARM_ALU_PC_G0:
12189 case R_ARM_ALU_PC_G1:
12190 case R_ARM_ALU_PC_G2:
12191 case R_ARM_ALU_SB_G0_NC:
12192 case R_ARM_ALU_SB_G1_NC:
12193 case R_ARM_ALU_SB_G0:
12194 case R_ARM_ALU_SB_G1:
12195 case R_ARM_ALU_SB_G2:
12196 {
12197 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12198 bfd_vma pc = input_section->output_section->vma
12199 + input_section->output_offset + rel->r_offset;
12200 /* sb is the origin of the *segment* containing the symbol. */
12201 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12202 bfd_vma residual;
12203 bfd_vma g_n;
12204 bfd_signed_vma signed_value;
12205 int group = 0;
12206
12207 /* Determine which group of bits to select. */
12208 switch (r_type)
12209 {
12210 case R_ARM_ALU_PC_G0_NC:
12211 case R_ARM_ALU_PC_G0:
12212 case R_ARM_ALU_SB_G0_NC:
12213 case R_ARM_ALU_SB_G0:
12214 group = 0;
12215 break;
12216
12217 case R_ARM_ALU_PC_G1_NC:
12218 case R_ARM_ALU_PC_G1:
12219 case R_ARM_ALU_SB_G1_NC:
12220 case R_ARM_ALU_SB_G1:
12221 group = 1;
12222 break;
12223
12224 case R_ARM_ALU_PC_G2:
12225 case R_ARM_ALU_SB_G2:
12226 group = 2;
12227 break;
12228
12229 default:
12230 abort ();
12231 }
12232
12233 /* If REL, extract the addend from the insn. If RELA, it will
12234 have already been fetched for us. */
12235 if (globals->use_rel)
12236 {
12237 int negative;
12238 bfd_vma constant = insn & 0xff;
12239 bfd_vma rotation = (insn & 0xf00) >> 8;
12240
12241 if (rotation == 0)
12242 signed_addend = constant;
12243 else
12244 {
12245 /* Compensate for the fact that in the instruction, the
12246 rotation is stored in multiples of 2 bits. */
12247 rotation *= 2;
12248
12249 /* Rotate "constant" right by "rotation" bits. */
12250 signed_addend = (constant >> rotation) |
12251 (constant << (8 * sizeof (bfd_vma) - rotation));
12252 }
12253
12254 /* Determine if the instruction is an ADD or a SUB.
12255 (For REL, this determines the sign of the addend.) */
12256 negative = identify_add_or_sub (insn);
12257 if (negative == 0)
12258 {
12259 _bfd_error_handler
12260 /* xgettext:c-format */
12261 (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions "
12262 "are allowed for ALU group relocations"),
12263 input_bfd, input_section, (uint64_t) rel->r_offset);
12264 return bfd_reloc_overflow;
12265 }
12266
12267 signed_addend *= negative;
12268 }
12269
12270 /* Compute the value (X) to go in the place. */
12271 if (r_type == R_ARM_ALU_PC_G0_NC
12272 || r_type == R_ARM_ALU_PC_G1_NC
12273 || r_type == R_ARM_ALU_PC_G0
12274 || r_type == R_ARM_ALU_PC_G1
12275 || r_type == R_ARM_ALU_PC_G2)
12276 /* PC relative. */
12277 signed_value = value - pc + signed_addend;
12278 else
12279 /* Section base relative. */
12280 signed_value = value - sb + signed_addend;
12281
12282 /* If the target symbol is a Thumb function, then set the
12283 Thumb bit in the address. */
12284 if (branch_type == ST_BRANCH_TO_THUMB)
12285 signed_value |= 1;
12286
12287 /* Calculate the value of the relevant G_n, in encoded
12288 constant-with-rotation format. */
12289 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12290 group, &residual);
12291
12292 /* Check for overflow if required. */
12293 if ((r_type == R_ARM_ALU_PC_G0
12294 || r_type == R_ARM_ALU_PC_G1
12295 || r_type == R_ARM_ALU_PC_G2
12296 || r_type == R_ARM_ALU_SB_G0
12297 || r_type == R_ARM_ALU_SB_G1
12298 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
12299 {
12300 _bfd_error_handler
12301 /* xgettext:c-format */
12302 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12303 "splitting %#" PRIx64 " for group relocation %s"),
12304 input_bfd, input_section, (uint64_t) rel->r_offset,
12305 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12306 howto->name);
12307 return bfd_reloc_overflow;
12308 }
12309
12310 /* Mask out the value and the ADD/SUB part of the opcode; take care
12311 not to destroy the S bit. */
12312 insn &= 0xff1ff000;
12313
12314 /* Set the opcode according to whether the value to go in the
12315 place is negative. */
12316 if (signed_value < 0)
12317 insn |= 1 << 22;
12318 else
12319 insn |= 1 << 23;
12320
12321 /* Encode the offset. */
12322 insn |= g_n;
12323
12324 bfd_put_32 (input_bfd, insn, hit_data);
12325 }
12326 return bfd_reloc_ok;
12327
12328 case R_ARM_LDR_PC_G0:
12329 case R_ARM_LDR_PC_G1:
12330 case R_ARM_LDR_PC_G2:
12331 case R_ARM_LDR_SB_G0:
12332 case R_ARM_LDR_SB_G1:
12333 case R_ARM_LDR_SB_G2:
12334 {
12335 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12336 bfd_vma pc = input_section->output_section->vma
12337 + input_section->output_offset + rel->r_offset;
12338 /* sb is the origin of the *segment* containing the symbol. */
12339 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12340 bfd_vma residual;
12341 bfd_signed_vma signed_value;
12342 int group = 0;
12343
12344 /* Determine which groups of bits to calculate. */
12345 switch (r_type)
12346 {
12347 case R_ARM_LDR_PC_G0:
12348 case R_ARM_LDR_SB_G0:
12349 group = 0;
12350 break;
12351
12352 case R_ARM_LDR_PC_G1:
12353 case R_ARM_LDR_SB_G1:
12354 group = 1;
12355 break;
12356
12357 case R_ARM_LDR_PC_G2:
12358 case R_ARM_LDR_SB_G2:
12359 group = 2;
12360 break;
12361
12362 default:
12363 abort ();
12364 }
12365
12366 /* If REL, extract the addend from the insn. If RELA, it will
12367 have already been fetched for us. */
12368 if (globals->use_rel)
12369 {
12370 int negative = (insn & (1 << 23)) ? 1 : -1;
12371 signed_addend = negative * (insn & 0xfff);
12372 }
12373
12374 /* Compute the value (X) to go in the place. */
12375 if (r_type == R_ARM_LDR_PC_G0
12376 || r_type == R_ARM_LDR_PC_G1
12377 || r_type == R_ARM_LDR_PC_G2)
12378 /* PC relative. */
12379 signed_value = value - pc + signed_addend;
12380 else
12381 /* Section base relative. */
12382 signed_value = value - sb + signed_addend;
12383
12384 /* Calculate the value of the relevant G_{n-1} to obtain
12385 the residual at that stage. */
12386 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12387 group - 1, &residual);
12388
12389 /* Check for overflow. */
12390 if (residual >= 0x1000)
12391 {
12392 _bfd_error_handler
12393 /* xgettext:c-format */
12394 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12395 "splitting %#" PRIx64 " for group relocation %s"),
12396 input_bfd, input_section, (uint64_t) rel->r_offset,
12397 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12398 howto->name);
12399 return bfd_reloc_overflow;
12400 }
12401
12402 /* Mask out the value and U bit. */
12403 insn &= 0xff7ff000;
12404
12405 /* Set the U bit if the value to go in the place is non-negative. */
12406 if (signed_value >= 0)
12407 insn |= 1 << 23;
12408
12409 /* Encode the offset. */
12410 insn |= residual;
12411
12412 bfd_put_32 (input_bfd, insn, hit_data);
12413 }
12414 return bfd_reloc_ok;
12415
12416 case R_ARM_LDRS_PC_G0:
12417 case R_ARM_LDRS_PC_G1:
12418 case R_ARM_LDRS_PC_G2:
12419 case R_ARM_LDRS_SB_G0:
12420 case R_ARM_LDRS_SB_G1:
12421 case R_ARM_LDRS_SB_G2:
12422 {
12423 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12424 bfd_vma pc = input_section->output_section->vma
12425 + input_section->output_offset + rel->r_offset;
12426 /* sb is the origin of the *segment* containing the symbol. */
12427 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12428 bfd_vma residual;
12429 bfd_signed_vma signed_value;
12430 int group = 0;
12431
12432 /* Determine which groups of bits to calculate. */
12433 switch (r_type)
12434 {
12435 case R_ARM_LDRS_PC_G0:
12436 case R_ARM_LDRS_SB_G0:
12437 group = 0;
12438 break;
12439
12440 case R_ARM_LDRS_PC_G1:
12441 case R_ARM_LDRS_SB_G1:
12442 group = 1;
12443 break;
12444
12445 case R_ARM_LDRS_PC_G2:
12446 case R_ARM_LDRS_SB_G2:
12447 group = 2;
12448 break;
12449
12450 default:
12451 abort ();
12452 }
12453
12454 /* If REL, extract the addend from the insn. If RELA, it will
12455 have already been fetched for us. */
12456 if (globals->use_rel)
12457 {
12458 int negative = (insn & (1 << 23)) ? 1 : -1;
12459 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
12460 }
12461
12462 /* Compute the value (X) to go in the place. */
12463 if (r_type == R_ARM_LDRS_PC_G0
12464 || r_type == R_ARM_LDRS_PC_G1
12465 || r_type == R_ARM_LDRS_PC_G2)
12466 /* PC relative. */
12467 signed_value = value - pc + signed_addend;
12468 else
12469 /* Section base relative. */
12470 signed_value = value - sb + signed_addend;
12471
12472 /* Calculate the value of the relevant G_{n-1} to obtain
12473 the residual at that stage. */
12474 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12475 group - 1, &residual);
12476
12477 /* Check for overflow. */
12478 if (residual >= 0x100)
12479 {
12480 _bfd_error_handler
12481 /* xgettext:c-format */
12482 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12483 "splitting %#" PRIx64 " for group relocation %s"),
12484 input_bfd, input_section, (uint64_t) rel->r_offset,
12485 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12486 howto->name);
12487 return bfd_reloc_overflow;
12488 }
12489
12490 /* Mask out the value and U bit. */
12491 insn &= 0xff7ff0f0;
12492
12493 /* Set the U bit if the value to go in the place is non-negative. */
12494 if (signed_value >= 0)
12495 insn |= 1 << 23;
12496
12497 /* Encode the offset. */
12498 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12499
12500 bfd_put_32 (input_bfd, insn, hit_data);
12501 }
12502 return bfd_reloc_ok;
12503
12504 case R_ARM_LDC_PC_G0:
12505 case R_ARM_LDC_PC_G1:
12506 case R_ARM_LDC_PC_G2:
12507 case R_ARM_LDC_SB_G0:
12508 case R_ARM_LDC_SB_G1:
12509 case R_ARM_LDC_SB_G2:
12510 {
12511 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12512 bfd_vma pc = input_section->output_section->vma
12513 + input_section->output_offset + rel->r_offset;
12514 /* sb is the origin of the *segment* containing the symbol. */
12515 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12516 bfd_vma residual;
12517 bfd_signed_vma signed_value;
12518 int group = 0;
12519
12520 /* Determine which groups of bits to calculate. */
12521 switch (r_type)
12522 {
12523 case R_ARM_LDC_PC_G0:
12524 case R_ARM_LDC_SB_G0:
12525 group = 0;
12526 break;
12527
12528 case R_ARM_LDC_PC_G1:
12529 case R_ARM_LDC_SB_G1:
12530 group = 1;
12531 break;
12532
12533 case R_ARM_LDC_PC_G2:
12534 case R_ARM_LDC_SB_G2:
12535 group = 2;
12536 break;
12537
12538 default:
12539 abort ();
12540 }
12541
12542 /* If REL, extract the addend from the insn. If RELA, it will
12543 have already been fetched for us. */
12544 if (globals->use_rel)
12545 {
12546 int negative = (insn & (1 << 23)) ? 1 : -1;
12547 signed_addend = negative * ((insn & 0xff) << 2);
12548 }
12549
12550 /* Compute the value (X) to go in the place. */
12551 if (r_type == R_ARM_LDC_PC_G0
12552 || r_type == R_ARM_LDC_PC_G1
12553 || r_type == R_ARM_LDC_PC_G2)
12554 /* PC relative. */
12555 signed_value = value - pc + signed_addend;
12556 else
12557 /* Section base relative. */
12558 signed_value = value - sb + signed_addend;
12559
12560 /* Calculate the value of the relevant G_{n-1} to obtain
12561 the residual at that stage. */
12562 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12563 group - 1, &residual);
12564
12565 /* Check for overflow. (The absolute value to go in the place must be
12566 divisible by four and, after having been divided by four, must
12567 fit in eight bits.) */
12568 if ((residual & 0x3) != 0 || residual >= 0x400)
12569 {
12570 _bfd_error_handler
12571 /* xgettext:c-format */
12572 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12573 "splitting %#" PRIx64 " for group relocation %s"),
12574 input_bfd, input_section, (uint64_t) rel->r_offset,
12575 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12576 howto->name);
12577 return bfd_reloc_overflow;
12578 }
12579
12580 /* Mask out the value and U bit. */
12581 insn &= 0xff7fff00;
12582
12583 /* Set the U bit if the value to go in the place is non-negative. */
12584 if (signed_value >= 0)
12585 insn |= 1 << 23;
12586
12587 /* Encode the offset. */
12588 insn |= residual >> 2;
12589
12590 bfd_put_32 (input_bfd, insn, hit_data);
12591 }
12592 return bfd_reloc_ok;
12593
12594 case R_ARM_THM_ALU_ABS_G0_NC:
12595 case R_ARM_THM_ALU_ABS_G1_NC:
12596 case R_ARM_THM_ALU_ABS_G2_NC:
12597 case R_ARM_THM_ALU_ABS_G3_NC:
12598 {
12599 const int shift_array[4] = {0, 8, 16, 24};
12600 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12601 bfd_vma addr = value;
12602 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12603
12604 /* Compute address. */
12605 if (globals->use_rel)
12606 signed_addend = insn & 0xff;
12607 addr += signed_addend;
12608 if (branch_type == ST_BRANCH_TO_THUMB)
12609 addr |= 1;
12610 /* Clean imm8 insn. */
12611 insn &= 0xff00;
12612 /* And update with correct part of address. */
12613 insn |= (addr >> shift) & 0xff;
12614 /* Update insn. */
12615 bfd_put_16 (input_bfd, insn, hit_data);
12616 }
12617
12618 *unresolved_reloc_p = false;
12619 return bfd_reloc_ok;
12620
12621 case R_ARM_GOTOFFFUNCDESC:
12622 {
12623 if (h == NULL)
12624 {
12625 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts (input_bfd);
12626 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12627
12628 if (r_symndx >= elf32_arm_num_entries (input_bfd))
12629 {
12630 * error_message = _("local symbol index too big");
12631 return bfd_reloc_dangerous;
12632 }
12633
12634 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12635 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12636 bfd_vma seg = -1;
12637
12638 if (bfd_link_pic (info) && dynindx == 0)
12639 {
12640 * error_message = _("no dynamic index information available");
12641 return bfd_reloc_dangerous;
12642 }
12643
12644 /* Resolve relocation. */
12645 bfd_put_32 (output_bfd, (offset + sgot->output_offset)
12646 , contents + rel->r_offset);
12647 /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12648 not done yet. */
12649 arm_elf_fill_funcdesc (output_bfd, info,
12650 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12651 dynindx, offset, addr, dynreloc_value, seg);
12652 }
12653 else
12654 {
12655 int dynindx;
12656 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12657 bfd_vma addr;
12658 bfd_vma seg = -1;
12659
12660 /* For static binaries, sym_sec can be null. */
12661 if (sym_sec)
12662 {
12663 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12664 addr = dynreloc_value - sym_sec->output_section->vma;
12665 }
12666 else
12667 {
12668 dynindx = 0;
12669 addr = 0;
12670 }
12671
12672 if (bfd_link_pic (info) && dynindx == 0)
12673 {
12674 * error_message = _("no dynamic index information available");
12675 return bfd_reloc_dangerous;
12676 }
12677
12678 /* This case cannot occur since funcdesc is allocated by
12679 the dynamic loader so we cannot resolve the relocation. */
12680 if (h->dynindx != -1)
12681 {
12682 * error_message = _("invalid dynamic index");
12683 return bfd_reloc_dangerous;
12684 }
12685
12686 /* Resolve relocation. */
12687 bfd_put_32 (output_bfd, (offset + sgot->output_offset),
12688 contents + rel->r_offset);
12689 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12690 arm_elf_fill_funcdesc (output_bfd, info,
12691 &eh->fdpic_cnts.funcdesc_offset,
12692 dynindx, offset, addr, dynreloc_value, seg);
12693 }
12694 }
12695 *unresolved_reloc_p = false;
12696 return bfd_reloc_ok;
12697
12698 case R_ARM_GOTFUNCDESC:
12699 {
12700 if (h != NULL)
12701 {
12702 Elf_Internal_Rela outrel;
12703
12704 /* Resolve relocation. */
12705 bfd_put_32 (output_bfd, ((eh->fdpic_cnts.gotfuncdesc_offset & ~1)
12706 + sgot->output_offset),
12707 contents + rel->r_offset);
12708 /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */
12709 if (h->dynindx == -1)
12710 {
12711 int dynindx;
12712 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12713 bfd_vma addr;
12714 bfd_vma seg = -1;
12715
12716 /* For static binaries sym_sec can be null. */
12717 if (sym_sec)
12718 {
12719 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12720 addr = dynreloc_value - sym_sec->output_section->vma;
12721 }
12722 else
12723 {
12724 dynindx = 0;
12725 addr = 0;
12726 }
12727
12728 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12729 arm_elf_fill_funcdesc (output_bfd, info,
12730 &eh->fdpic_cnts.funcdesc_offset,
12731 dynindx, offset, addr, dynreloc_value, seg);
12732 }
12733
12734 /* Add a dynamic relocation on GOT entry if not already done. */
12735 if ((eh->fdpic_cnts.gotfuncdesc_offset & 1) == 0)
12736 {
12737 if (h->dynindx == -1)
12738 {
12739 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12740 if (h->root.type == bfd_link_hash_undefweak)
12741 bfd_put_32 (output_bfd, 0, sgot->contents
12742 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12743 else
12744 bfd_put_32 (output_bfd, sgot->output_section->vma
12745 + sgot->output_offset
12746 + (eh->fdpic_cnts.funcdesc_offset & ~1),
12747 sgot->contents
12748 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12749 }
12750 else
12751 {
12752 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12753 }
12754 outrel.r_offset = sgot->output_section->vma
12755 + sgot->output_offset
12756 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1);
12757 outrel.r_addend = 0;
12758 if (h->dynindx == -1 && !bfd_link_pic (info))
12759 if (h->root.type == bfd_link_hash_undefweak)
12760 arm_elf_add_rofixup (output_bfd, globals->srofixup, -1);
12761 else
12762 arm_elf_add_rofixup (output_bfd, globals->srofixup,
12763 outrel.r_offset);
12764 else
12765 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12766 eh->fdpic_cnts.gotfuncdesc_offset |= 1;
12767 }
12768 }
12769 else
12770 {
12771 /* Such relocation on static function should not have been
12772 emitted by the compiler. */
12773 return bfd_reloc_notsupported;
12774 }
12775 }
12776 *unresolved_reloc_p = false;
12777 return bfd_reloc_ok;
12778
12779 case R_ARM_FUNCDESC:
12780 {
12781 if (h == NULL)
12782 {
12783 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts (input_bfd);
12784 Elf_Internal_Rela outrel;
12785 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12786
12787 if (r_symndx >= elf32_arm_num_entries (input_bfd))
12788 {
12789 * error_message = _("local symbol index too big");
12790 return bfd_reloc_dangerous;
12791 }
12792
12793 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12794 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12795 bfd_vma seg = -1;
12796
12797 if (bfd_link_pic (info) && dynindx == 0)
12798 {
12799 * error_message = _("dynamic index information not available");
12800 return bfd_reloc_dangerous;
12801 }
12802
12803 /* Replace static FUNCDESC relocation with a
12804 R_ARM_RELATIVE dynamic relocation or with a rofixup for
12805 executable. */
12806 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12807 outrel.r_offset = input_section->output_section->vma
12808 + input_section->output_offset + rel->r_offset;
12809 outrel.r_addend = 0;
12810 if (bfd_link_pic (info))
12811 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12812 else
12813 arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset);
12814
12815 bfd_put_32 (input_bfd, sgot->output_section->vma
12816 + sgot->output_offset + offset, hit_data);
12817
12818 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12819 arm_elf_fill_funcdesc (output_bfd, info,
12820 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12821 dynindx, offset, addr, dynreloc_value, seg);
12822 }
12823 else
12824 {
12825 if (h->dynindx == -1)
12826 {
12827 int dynindx;
12828 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12829 bfd_vma addr;
12830 bfd_vma seg = -1;
12831 Elf_Internal_Rela outrel;
12832
12833 /* For static binaries sym_sec can be null. */
12834 if (sym_sec)
12835 {
12836 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12837 addr = dynreloc_value - sym_sec->output_section->vma;
12838 }
12839 else
12840 {
12841 dynindx = 0;
12842 addr = 0;
12843 }
12844
12845 if (bfd_link_pic (info) && dynindx == 0)
12846 abort ();
12847
12848 /* Replace static FUNCDESC relocation with a
12849 R_ARM_RELATIVE dynamic relocation. */
12850 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12851 outrel.r_offset = input_section->output_section->vma
12852 + input_section->output_offset + rel->r_offset;
12853 outrel.r_addend = 0;
12854 if (bfd_link_pic (info))
12855 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12856 else
12857 arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset);
12858
12859 bfd_put_32 (input_bfd, sgot->output_section->vma
12860 + sgot->output_offset + offset, hit_data);
12861
12862 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12863 arm_elf_fill_funcdesc (output_bfd, info,
12864 &eh->fdpic_cnts.funcdesc_offset,
12865 dynindx, offset, addr, dynreloc_value, seg);
12866 }
12867 else
12868 {
12869 Elf_Internal_Rela outrel;
12870
12871 /* Add a dynamic relocation. */
12872 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12873 outrel.r_offset = input_section->output_section->vma
12874 + input_section->output_offset + rel->r_offset;
12875 outrel.r_addend = 0;
12876 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12877 }
12878 }
12879 }
12880 *unresolved_reloc_p = false;
12881 return bfd_reloc_ok;
12882
12883 case R_ARM_THM_BF16:
12884 {
12885 bfd_vma relocation;
12886 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12887 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12888
12889 if (globals->use_rel)
12890 {
12891 bfd_vma immA = (upper_insn & 0x001f);
12892 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12893 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12894 addend = (immA << 12);
12895 addend |= (immB << 2);
12896 addend |= (immC << 1);
12897 addend |= 1;
12898 /* Sign extend. */
12899 signed_addend = (addend & 0x10000) ? addend - (1 << 17) : addend;
12900 }
12901
12902 relocation = value + signed_addend;
12903 relocation -= (input_section->output_section->vma
12904 + input_section->output_offset
12905 + rel->r_offset);
12906
12907 /* Put RELOCATION back into the insn. */
12908 {
12909 bfd_vma immA = (relocation & 0x0001f000) >> 12;
12910 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12911 bfd_vma immC = (relocation & 0x00000002) >> 1;
12912
12913 upper_insn = (upper_insn & 0xffe0) | immA;
12914 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12915 }
12916
12917 /* Put the relocated value back in the object file: */
12918 bfd_put_16 (input_bfd, upper_insn, hit_data);
12919 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12920
12921 return bfd_reloc_ok;
12922 }
12923
12924 case R_ARM_THM_BF12:
12925 {
12926 bfd_vma relocation;
12927 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12928 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12929
12930 if (globals->use_rel)
12931 {
12932 bfd_vma immA = (upper_insn & 0x0001);
12933 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12934 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12935 addend = (immA << 12);
12936 addend |= (immB << 2);
12937 addend |= (immC << 1);
12938 addend |= 1;
12939 /* Sign extend. */
12940 addend = (addend & 0x1000) ? addend - (1 << 13) : addend;
12941 signed_addend = addend;
12942 }
12943
12944 relocation = value + signed_addend;
12945 relocation -= (input_section->output_section->vma
12946 + input_section->output_offset
12947 + rel->r_offset);
12948
12949 /* Put RELOCATION back into the insn. */
12950 {
12951 bfd_vma immA = (relocation & 0x00001000) >> 12;
12952 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12953 bfd_vma immC = (relocation & 0x00000002) >> 1;
12954
12955 upper_insn = (upper_insn & 0xfffe) | immA;
12956 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12957 }
12958
12959 /* Put the relocated value back in the object file: */
12960 bfd_put_16 (input_bfd, upper_insn, hit_data);
12961 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12962
12963 return bfd_reloc_ok;
12964 }
12965
12966 case R_ARM_THM_BF18:
12967 {
12968 bfd_vma relocation;
12969 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12970 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12971
12972 if (globals->use_rel)
12973 {
12974 bfd_vma immA = (upper_insn & 0x007f);
12975 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12976 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12977 addend = (immA << 12);
12978 addend |= (immB << 2);
12979 addend |= (immC << 1);
12980 addend |= 1;
12981 /* Sign extend. */
12982 addend = (addend & 0x40000) ? addend - (1 << 19) : addend;
12983 signed_addend = addend;
12984 }
12985
12986 relocation = value + signed_addend;
12987 relocation -= (input_section->output_section->vma
12988 + input_section->output_offset
12989 + rel->r_offset);
12990
12991 /* Put RELOCATION back into the insn. */
12992 {
12993 bfd_vma immA = (relocation & 0x0007f000) >> 12;
12994 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12995 bfd_vma immC = (relocation & 0x00000002) >> 1;
12996
12997 upper_insn = (upper_insn & 0xff80) | immA;
12998 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12999 }
13000
13001 /* Put the relocated value back in the object file: */
13002 bfd_put_16 (input_bfd, upper_insn, hit_data);
13003 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
13004
13005 return bfd_reloc_ok;
13006 }
13007
13008 default:
13009 return bfd_reloc_notsupported;
13010 }
13011 }
13012
13013 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
13014 static void
13015 arm_add_to_rel (bfd * abfd,
13016 bfd_byte * address,
13017 reloc_howto_type * howto,
13018 bfd_signed_vma increment)
13019 {
13020 bfd_signed_vma addend;
13021
13022 if (howto->type == R_ARM_THM_CALL
13023 || howto->type == R_ARM_THM_JUMP24)
13024 {
13025 int upper_insn, lower_insn;
13026 int upper, lower;
13027
13028 upper_insn = bfd_get_16 (abfd, address);
13029 lower_insn = bfd_get_16 (abfd, address + 2);
13030 upper = upper_insn & 0x7ff;
13031 lower = lower_insn & 0x7ff;
13032
13033 addend = (upper << 12) | (lower << 1);
13034 addend += increment;
13035 addend >>= 1;
13036
13037 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
13038 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
13039
13040 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
13041 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
13042 }
13043 else
13044 {
13045 bfd_vma contents;
13046
13047 contents = bfd_get_32 (abfd, address);
13048
13049 /* Get the (signed) value from the instruction. */
13050 addend = contents & howto->src_mask;
13051 if (addend & ((howto->src_mask + 1) >> 1))
13052 {
13053 bfd_signed_vma mask;
13054
13055 mask = -1;
13056 mask &= ~ howto->src_mask;
13057 addend |= mask;
13058 }
13059
13060 /* Add in the increment, (which is a byte value). */
13061 switch (howto->type)
13062 {
13063 default:
13064 addend += increment;
13065 break;
13066
13067 case R_ARM_PC24:
13068 case R_ARM_PLT32:
13069 case R_ARM_CALL:
13070 case R_ARM_JUMP24:
13071 addend *= bfd_get_reloc_size (howto);
13072 addend += increment;
13073
13074 /* Should we check for overflow here ? */
13075
13076 /* Drop any undesired bits. */
13077 addend >>= howto->rightshift;
13078 break;
13079 }
13080
13081 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
13082
13083 bfd_put_32 (abfd, contents, address);
13084 }
13085 }
13086
13087 #define IS_ARM_TLS_RELOC(R_TYPE) \
13088 ((R_TYPE) == R_ARM_TLS_GD32 \
13089 || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \
13090 || (R_TYPE) == R_ARM_TLS_LDO32 \
13091 || (R_TYPE) == R_ARM_TLS_LDM32 \
13092 || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \
13093 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
13094 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
13095 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
13096 || (R_TYPE) == R_ARM_TLS_LE32 \
13097 || (R_TYPE) == R_ARM_TLS_IE32 \
13098 || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \
13099 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
13100
13101 /* Specific set of relocations for the gnu tls dialect. */
13102 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
13103 ((R_TYPE) == R_ARM_TLS_GOTDESC \
13104 || (R_TYPE) == R_ARM_TLS_CALL \
13105 || (R_TYPE) == R_ARM_THM_TLS_CALL \
13106 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
13107 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
13108
13109 /* Relocate an ARM ELF section. */
13110
13111 static int
13112 elf32_arm_relocate_section (bfd * output_bfd,
13113 struct bfd_link_info * info,
13114 bfd * input_bfd,
13115 asection * input_section,
13116 bfd_byte * contents,
13117 Elf_Internal_Rela * relocs,
13118 Elf_Internal_Sym * local_syms,
13119 asection ** local_sections)
13120 {
13121 Elf_Internal_Shdr *symtab_hdr;
13122 struct elf_link_hash_entry **sym_hashes;
13123 Elf_Internal_Rela *rel;
13124 Elf_Internal_Rela *relend;
13125 const char *name;
13126 struct elf32_arm_link_hash_table * globals;
13127
13128 globals = elf32_arm_hash_table (info);
13129 if (globals == NULL)
13130 return false;
13131
13132 symtab_hdr = & elf_symtab_hdr (input_bfd);
13133 sym_hashes = elf_sym_hashes (input_bfd);
13134
13135 rel = relocs;
13136 relend = relocs + input_section->reloc_count;
13137 for (; rel < relend; rel++)
13138 {
13139 int r_type;
13140 reloc_howto_type * howto;
13141 unsigned long r_symndx;
13142 Elf_Internal_Sym * sym;
13143 asection * sec;
13144 struct elf_link_hash_entry * h;
13145 bfd_vma relocation;
13146 bfd_reloc_status_type r;
13147 arelent bfd_reloc;
13148 char sym_type;
13149 bool unresolved_reloc = false;
13150 char *error_message = NULL;
13151
13152 r_symndx = ELF32_R_SYM (rel->r_info);
13153 r_type = ELF32_R_TYPE (rel->r_info);
13154 r_type = arm_real_reloc_type (globals, r_type);
13155
13156 if ( r_type == R_ARM_GNU_VTENTRY
13157 || r_type == R_ARM_GNU_VTINHERIT)
13158 continue;
13159
13160 howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
13161
13162 if (howto == NULL)
13163 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
13164
13165 h = NULL;
13166 sym = NULL;
13167 sec = NULL;
13168
13169 if (r_symndx < symtab_hdr->sh_info)
13170 {
13171 sym = local_syms + r_symndx;
13172 sym_type = ELF32_ST_TYPE (sym->st_info);
13173 sec = local_sections[r_symndx];
13174
13175 /* An object file might have a reference to a local
13176 undefined symbol. This is a daft object file, but we
13177 should at least do something about it. V4BX & NONE
13178 relocations do not use the symbol and are explicitly
13179 allowed to use the undefined symbol, so allow those.
13180 Likewise for relocations against STN_UNDEF. */
13181 if (r_type != R_ARM_V4BX
13182 && r_type != R_ARM_NONE
13183 && r_symndx != STN_UNDEF
13184 && bfd_is_und_section (sec)
13185 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
13186 (*info->callbacks->undefined_symbol)
13187 (info, bfd_elf_string_from_elf_section
13188 (input_bfd, symtab_hdr->sh_link, sym->st_name),
13189 input_bfd, input_section,
13190 rel->r_offset, true);
13191
13192 if (globals->use_rel)
13193 {
13194 relocation = (sec->output_section->vma
13195 + sec->output_offset
13196 + sym->st_value);
13197 if (!bfd_link_relocatable (info)
13198 && (sec->flags & SEC_MERGE)
13199 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13200 {
13201 asection *msec;
13202 bfd_vma addend, value;
13203
13204 switch (r_type)
13205 {
13206 case R_ARM_MOVW_ABS_NC:
13207 case R_ARM_MOVT_ABS:
13208 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13209 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
13210 addend = (addend ^ 0x8000) - 0x8000;
13211 break;
13212
13213 case R_ARM_THM_MOVW_ABS_NC:
13214 case R_ARM_THM_MOVT_ABS:
13215 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
13216 << 16;
13217 value |= bfd_get_16 (input_bfd,
13218 contents + rel->r_offset + 2);
13219 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
13220 | ((value & 0x04000000) >> 15);
13221 addend = (addend ^ 0x8000) - 0x8000;
13222 break;
13223
13224 default:
13225 if (howto->rightshift
13226 || (howto->src_mask & (howto->src_mask + 1)))
13227 {
13228 _bfd_error_handler
13229 /* xgettext:c-format */
13230 (_("%pB(%pA+%#" PRIx64 "): "
13231 "%s relocation against SEC_MERGE section"),
13232 input_bfd, input_section,
13233 (uint64_t) rel->r_offset, howto->name);
13234 return false;
13235 }
13236
13237 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13238
13239 /* Get the (signed) value from the instruction. */
13240 addend = value & howto->src_mask;
13241 if (addend & ((howto->src_mask + 1) >> 1))
13242 {
13243 bfd_signed_vma mask;
13244
13245 mask = -1;
13246 mask &= ~ howto->src_mask;
13247 addend |= mask;
13248 }
13249 break;
13250 }
13251
13252 msec = sec;
13253 addend =
13254 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
13255 - relocation;
13256 addend += msec->output_section->vma + msec->output_offset;
13257
13258 /* Cases here must match those in the preceding
13259 switch statement. */
13260 switch (r_type)
13261 {
13262 case R_ARM_MOVW_ABS_NC:
13263 case R_ARM_MOVT_ABS:
13264 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
13265 | (addend & 0xfff);
13266 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13267 break;
13268
13269 case R_ARM_THM_MOVW_ABS_NC:
13270 case R_ARM_THM_MOVT_ABS:
13271 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
13272 | (addend & 0xff) | ((addend & 0x0800) << 15);
13273 bfd_put_16 (input_bfd, value >> 16,
13274 contents + rel->r_offset);
13275 bfd_put_16 (input_bfd, value,
13276 contents + rel->r_offset + 2);
13277 break;
13278
13279 default:
13280 value = (value & ~ howto->dst_mask)
13281 | (addend & howto->dst_mask);
13282 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13283 break;
13284 }
13285 }
13286 }
13287 else
13288 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
13289 }
13290 else
13291 {
13292 bool warned, ignored;
13293
13294 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
13295 r_symndx, symtab_hdr, sym_hashes,
13296 h, sec, relocation,
13297 unresolved_reloc, warned, ignored);
13298
13299 sym_type = h->type;
13300 }
13301
13302 if (sec != NULL && discarded_section (sec))
13303 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
13304 rel, 1, relend, howto, 0, contents);
13305
13306 if (bfd_link_relocatable (info))
13307 {
13308 /* This is a relocatable link. We don't have to change
13309 anything, unless the reloc is against a section symbol,
13310 in which case we have to adjust according to where the
13311 section symbol winds up in the output section. */
13312 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13313 {
13314 if (globals->use_rel)
13315 arm_add_to_rel (input_bfd, contents + rel->r_offset,
13316 howto, (bfd_signed_vma) sec->output_offset);
13317 else
13318 rel->r_addend += sec->output_offset;
13319 }
13320 continue;
13321 }
13322
13323 if (h != NULL)
13324 name = h->root.root.string;
13325 else
13326 {
13327 name = (bfd_elf_string_from_elf_section
13328 (input_bfd, symtab_hdr->sh_link, sym->st_name));
13329 if (name == NULL || *name == '\0')
13330 name = bfd_section_name (sec);
13331 }
13332
13333 if (r_symndx != STN_UNDEF
13334 && r_type != R_ARM_NONE
13335 && (h == NULL
13336 || h->root.type == bfd_link_hash_defined
13337 || h->root.type == bfd_link_hash_defweak)
13338 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
13339 {
13340 _bfd_error_handler
13341 ((sym_type == STT_TLS
13342 /* xgettext:c-format */
13343 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
13344 /* xgettext:c-format */
13345 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
13346 input_bfd,
13347 input_section,
13348 (uint64_t) rel->r_offset,
13349 howto->name,
13350 name);
13351 }
13352
13353 /* We call elf32_arm_final_link_relocate unless we're completely
13354 done, i.e., the relaxation produced the final output we want,
13355 and we won't let anybody mess with it. Also, we have to do
13356 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
13357 both in relaxed and non-relaxed cases. */
13358 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
13359 || (IS_ARM_TLS_GNU_RELOC (r_type)
13360 && !((h ? elf32_arm_hash_entry (h)->tls_type :
13361 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
13362 & GOT_TLS_GDESC)))
13363 {
13364 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
13365 contents, rel, h == NULL);
13366 /* This may have been marked unresolved because it came from
13367 a shared library. But we've just dealt with that. */
13368 unresolved_reloc = 0;
13369 }
13370 else
13371 r = bfd_reloc_continue;
13372
13373 if (r == bfd_reloc_continue)
13374 {
13375 unsigned char branch_type =
13376 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
13377 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
13378
13379 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
13380 input_section, contents, rel,
13381 relocation, info, sec, name,
13382 sym_type, branch_type, h,
13383 &unresolved_reloc,
13384 &error_message);
13385 }
13386
13387 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13388 because such sections are not SEC_ALLOC and thus ld.so will
13389 not process them. */
13390 if (unresolved_reloc
13391 && !((input_section->flags & SEC_DEBUGGING) != 0
13392 && h->def_dynamic)
13393 && _bfd_elf_section_offset (output_bfd, info, input_section,
13394 rel->r_offset) != (bfd_vma) -1)
13395 {
13396 _bfd_error_handler
13397 /* xgettext:c-format */
13398 (_("%pB(%pA+%#" PRIx64 "): "
13399 "unresolvable %s relocation against symbol `%s'"),
13400 input_bfd,
13401 input_section,
13402 (uint64_t) rel->r_offset,
13403 howto->name,
13404 h->root.root.string);
13405 return false;
13406 }
13407
13408 if (r != bfd_reloc_ok)
13409 {
13410 switch (r)
13411 {
13412 case bfd_reloc_overflow:
13413 /* If the overflowing reloc was to an undefined symbol,
13414 we have already printed one error message and there
13415 is no point complaining again. */
13416 if (!h || h->root.type != bfd_link_hash_undefined)
13417 (*info->callbacks->reloc_overflow)
13418 (info, (h ? &h->root : NULL), name, howto->name,
13419 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
13420 break;
13421
13422 case bfd_reloc_undefined:
13423 (*info->callbacks->undefined_symbol)
13424 (info, name, input_bfd, input_section, rel->r_offset, true);
13425 break;
13426
13427 case bfd_reloc_outofrange:
13428 error_message = _("out of range");
13429 goto common_error;
13430
13431 case bfd_reloc_notsupported:
13432 error_message = _("unsupported relocation");
13433 goto common_error;
13434
13435 case bfd_reloc_dangerous:
13436 /* error_message should already be set. */
13437 goto common_error;
13438
13439 default:
13440 error_message = _("unknown error");
13441 /* Fall through. */
13442
13443 common_error:
13444 BFD_ASSERT (error_message != NULL);
13445 (*info->callbacks->reloc_dangerous)
13446 (info, error_message, input_bfd, input_section, rel->r_offset);
13447 break;
13448 }
13449 }
13450 }
13451
13452 return true;
13453 }
13454
13455 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
13456 adds the edit to the start of the list. (The list must be built in order of
13457 ascending TINDEX: the function's callers are primarily responsible for
13458 maintaining that condition). */
13459
13460 static void
13461 add_unwind_table_edit (arm_unwind_table_edit **head,
13462 arm_unwind_table_edit **tail,
13463 arm_unwind_edit_type type,
13464 asection *linked_section,
13465 unsigned int tindex)
13466 {
13467 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
13468 xmalloc (sizeof (arm_unwind_table_edit));
13469
13470 new_edit->type = type;
13471 new_edit->linked_section = linked_section;
13472 new_edit->index = tindex;
13473
13474 if (tindex > 0)
13475 {
13476 new_edit->next = NULL;
13477
13478 if (*tail)
13479 (*tail)->next = new_edit;
13480
13481 (*tail) = new_edit;
13482
13483 if (!*head)
13484 (*head) = new_edit;
13485 }
13486 else
13487 {
13488 new_edit->next = *head;
13489
13490 if (!*tail)
13491 *tail = new_edit;
13492
13493 *head = new_edit;
13494 }
13495 }
13496
13497 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
13498
13499 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
13500
13501 static void
13502 adjust_exidx_size (asection *exidx_sec, int adjust)
13503 {
13504 asection *out_sec;
13505
13506 if (!exidx_sec->rawsize)
13507 exidx_sec->rawsize = exidx_sec->size;
13508
13509 bfd_set_section_size (exidx_sec, exidx_sec->size + adjust);
13510 out_sec = exidx_sec->output_section;
13511 /* Adjust size of output section. */
13512 bfd_set_section_size (out_sec, out_sec->size + adjust);
13513 }
13514
13515 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
13516
13517 static void
13518 insert_cantunwind_after (asection *text_sec, asection *exidx_sec)
13519 {
13520 struct _arm_elf_section_data *exidx_arm_data;
13521
13522 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13523 add_unwind_table_edit
13524 (&exidx_arm_data->u.exidx.unwind_edit_list,
13525 &exidx_arm_data->u.exidx.unwind_edit_tail,
13526 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
13527
13528 exidx_arm_data->additional_reloc_count++;
13529
13530 adjust_exidx_size (exidx_sec, 8);
13531 }
13532
13533 /* Scan .ARM.exidx tables, and create a list describing edits which should be
13534 made to those tables, such that:
13535
13536 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13537 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13538 codes which have been inlined into the index).
13539
13540 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13541
13542 The edits are applied when the tables are written
13543 (in elf32_arm_write_section). */
13544
13545 bool
13546 elf32_arm_fix_exidx_coverage (asection **text_section_order,
13547 unsigned int num_text_sections,
13548 struct bfd_link_info *info,
13549 bool merge_exidx_entries)
13550 {
13551 bfd *inp;
13552 unsigned int last_second_word = 0, i;
13553 asection *last_exidx_sec = NULL;
13554 asection *last_text_sec = NULL;
13555 int last_unwind_type = -1;
13556
13557 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13558 text sections. */
13559 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
13560 {
13561 asection *sec;
13562
13563 for (sec = inp->sections; sec != NULL; sec = sec->next)
13564 {
13565 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
13566 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
13567
13568 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
13569 continue;
13570
13571 if (elf_sec->linked_to)
13572 {
13573 Elf_Internal_Shdr *linked_hdr
13574 = &elf_section_data (elf_sec->linked_to)->this_hdr;
13575 struct _arm_elf_section_data *linked_sec_arm_data
13576 = get_arm_elf_section_data (linked_hdr->bfd_section);
13577
13578 if (linked_sec_arm_data == NULL)
13579 continue;
13580
13581 /* Link this .ARM.exidx section back from the text section it
13582 describes. */
13583 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
13584 }
13585 }
13586 }
13587
13588 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
13589 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13590 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
13591
13592 for (i = 0; i < num_text_sections; i++)
13593 {
13594 asection *sec = text_section_order[i];
13595 asection *exidx_sec;
13596 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
13597 struct _arm_elf_section_data *exidx_arm_data;
13598 bfd_byte *contents = NULL;
13599 int deleted_exidx_bytes = 0;
13600 bfd_vma j;
13601 arm_unwind_table_edit *unwind_edit_head = NULL;
13602 arm_unwind_table_edit *unwind_edit_tail = NULL;
13603 Elf_Internal_Shdr *hdr;
13604 bfd *ibfd;
13605
13606 if (arm_data == NULL)
13607 continue;
13608
13609 exidx_sec = arm_data->u.text.arm_exidx_sec;
13610 if (exidx_sec == NULL)
13611 {
13612 /* Section has no unwind data. */
13613 if (last_unwind_type == 0 || !last_exidx_sec)
13614 continue;
13615
13616 /* Ignore zero sized sections. */
13617 if (sec->size == 0)
13618 continue;
13619
13620 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13621 last_unwind_type = 0;
13622 continue;
13623 }
13624
13625 /* Skip /DISCARD/ sections. */
13626 if (bfd_is_abs_section (exidx_sec->output_section))
13627 continue;
13628
13629 hdr = &elf_section_data (exidx_sec)->this_hdr;
13630 if (hdr->sh_type != SHT_ARM_EXIDX)
13631 continue;
13632
13633 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13634 if (exidx_arm_data == NULL)
13635 continue;
13636
13637 ibfd = exidx_sec->owner;
13638
13639 if (hdr->contents != NULL)
13640 contents = hdr->contents;
13641 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
13642 /* An error? */
13643 continue;
13644
13645 if (last_unwind_type > 0)
13646 {
13647 unsigned int first_word = bfd_get_32 (ibfd, contents);
13648 /* Add cantunwind if first unwind item does not match section
13649 start. */
13650 if (first_word != sec->vma)
13651 {
13652 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13653 last_unwind_type = 0;
13654 }
13655 }
13656
13657 for (j = 0; j < hdr->sh_size; j += 8)
13658 {
13659 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
13660 int unwind_type;
13661 int elide = 0;
13662
13663 /* An EXIDX_CANTUNWIND entry. */
13664 if (second_word == 1)
13665 {
13666 if (last_unwind_type == 0)
13667 elide = 1;
13668 unwind_type = 0;
13669 }
13670 /* Inlined unwinding data. Merge if equal to previous. */
13671 else if ((second_word & 0x80000000) != 0)
13672 {
13673 if (merge_exidx_entries
13674 && last_second_word == second_word && last_unwind_type == 1)
13675 elide = 1;
13676 unwind_type = 1;
13677 last_second_word = second_word;
13678 }
13679 /* Normal table entry. In theory we could merge these too,
13680 but duplicate entries are likely to be much less common. */
13681 else
13682 unwind_type = 2;
13683
13684 if (elide && !bfd_link_relocatable (info))
13685 {
13686 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
13687 DELETE_EXIDX_ENTRY, NULL, j / 8);
13688
13689 deleted_exidx_bytes += 8;
13690 }
13691
13692 last_unwind_type = unwind_type;
13693 }
13694
13695 /* Free contents if we allocated it ourselves. */
13696 if (contents != hdr->contents)
13697 free (contents);
13698
13699 /* Record edits to be applied later (in elf32_arm_write_section). */
13700 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
13701 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
13702
13703 if (deleted_exidx_bytes > 0)
13704 adjust_exidx_size (exidx_sec, - deleted_exidx_bytes);
13705
13706 last_exidx_sec = exidx_sec;
13707 last_text_sec = sec;
13708 }
13709
13710 /* Add terminating CANTUNWIND entry. */
13711 if (!bfd_link_relocatable (info) && last_exidx_sec
13712 && last_unwind_type != 0)
13713 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13714
13715 return true;
13716 }
13717
13718 static bool
13719 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
13720 bfd *ibfd, const char *name)
13721 {
13722 asection *sec, *osec;
13723
13724 sec = bfd_get_linker_section (ibfd, name);
13725 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
13726 return true;
13727
13728 osec = sec->output_section;
13729 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
13730 return true;
13731
13732 if (! bfd_set_section_contents (obfd, osec, sec->contents,
13733 sec->output_offset, sec->size))
13734 return false;
13735
13736 return true;
13737 }
13738
13739 static bool
13740 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
13741 {
13742 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
13743 asection *sec, *osec;
13744
13745 if (globals == NULL)
13746 return false;
13747
13748 /* Invoke the regular ELF backend linker to do all the work. */
13749 if (!bfd_elf_final_link (abfd, info))
13750 return false;
13751
13752 /* Process stub sections (eg BE8 encoding, ...). */
13753 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
13754 unsigned int i;
13755 for (i=0; i<htab->top_id; i++)
13756 {
13757 sec = htab->stub_group[i].stub_sec;
13758 /* Only process it once, in its link_sec slot. */
13759 if (sec && i == htab->stub_group[i].link_sec->id)
13760 {
13761 osec = sec->output_section;
13762 elf32_arm_write_section (abfd, info, sec, sec->contents);
13763 if (! bfd_set_section_contents (abfd, osec, sec->contents,
13764 sec->output_offset, sec->size))
13765 return false;
13766 }
13767 }
13768
13769 /* Write out any glue sections now that we have created all the
13770 stubs. */
13771 if (globals->bfd_of_glue_owner != NULL)
13772 {
13773 if (! elf32_arm_output_glue_section (info, abfd,
13774 globals->bfd_of_glue_owner,
13775 ARM2THUMB_GLUE_SECTION_NAME))
13776 return false;
13777
13778 if (! elf32_arm_output_glue_section (info, abfd,
13779 globals->bfd_of_glue_owner,
13780 THUMB2ARM_GLUE_SECTION_NAME))
13781 return false;
13782
13783 if (! elf32_arm_output_glue_section (info, abfd,
13784 globals->bfd_of_glue_owner,
13785 VFP11_ERRATUM_VENEER_SECTION_NAME))
13786 return false;
13787
13788 if (! elf32_arm_output_glue_section (info, abfd,
13789 globals->bfd_of_glue_owner,
13790 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
13791 return false;
13792
13793 if (! elf32_arm_output_glue_section (info, abfd,
13794 globals->bfd_of_glue_owner,
13795 ARM_BX_GLUE_SECTION_NAME))
13796 return false;
13797 }
13798
13799 return true;
13800 }
13801
13802 /* Return a best guess for the machine number based on the attributes. */
13803
13804 static unsigned int
13805 bfd_arm_get_mach_from_attributes (bfd * abfd)
13806 {
13807 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
13808
13809 switch (arch)
13810 {
13811 case TAG_CPU_ARCH_PRE_V4: return bfd_mach_arm_3M;
13812 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
13813 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
13814 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
13815
13816 case TAG_CPU_ARCH_V5TE:
13817 {
13818 char * name;
13819
13820 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
13821 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
13822
13823 if (name)
13824 {
13825 if (strcmp (name, "IWMMXT2") == 0)
13826 return bfd_mach_arm_iWMMXt2;
13827
13828 if (strcmp (name, "IWMMXT") == 0)
13829 return bfd_mach_arm_iWMMXt;
13830
13831 if (strcmp (name, "XSCALE") == 0)
13832 {
13833 int wmmx;
13834
13835 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
13836 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
13837 switch (wmmx)
13838 {
13839 case 1: return bfd_mach_arm_iWMMXt;
13840 case 2: return bfd_mach_arm_iWMMXt2;
13841 default: return bfd_mach_arm_XScale;
13842 }
13843 }
13844 }
13845
13846 return bfd_mach_arm_5TE;
13847 }
13848
13849 case TAG_CPU_ARCH_V5TEJ:
13850 return bfd_mach_arm_5TEJ;
13851 case TAG_CPU_ARCH_V6:
13852 return bfd_mach_arm_6;
13853 case TAG_CPU_ARCH_V6KZ:
13854 return bfd_mach_arm_6KZ;
13855 case TAG_CPU_ARCH_V6T2:
13856 return bfd_mach_arm_6T2;
13857 case TAG_CPU_ARCH_V6K:
13858 return bfd_mach_arm_6K;
13859 case TAG_CPU_ARCH_V7:
13860 return bfd_mach_arm_7;
13861 case TAG_CPU_ARCH_V6_M:
13862 return bfd_mach_arm_6M;
13863 case TAG_CPU_ARCH_V6S_M:
13864 return bfd_mach_arm_6SM;
13865 case TAG_CPU_ARCH_V7E_M:
13866 return bfd_mach_arm_7EM;
13867 case TAG_CPU_ARCH_V8:
13868 return bfd_mach_arm_8;
13869 case TAG_CPU_ARCH_V8R:
13870 return bfd_mach_arm_8R;
13871 case TAG_CPU_ARCH_V8M_BASE:
13872 return bfd_mach_arm_8M_BASE;
13873 case TAG_CPU_ARCH_V8M_MAIN:
13874 return bfd_mach_arm_8M_MAIN;
13875 case TAG_CPU_ARCH_V8_1M_MAIN:
13876 return bfd_mach_arm_8_1M_MAIN;
13877 case TAG_CPU_ARCH_V9:
13878 return bfd_mach_arm_9;
13879
13880 default:
13881 /* Force entry to be added for any new known Tag_CPU_arch value. */
13882 BFD_ASSERT (arch > MAX_TAG_CPU_ARCH);
13883
13884 /* Unknown Tag_CPU_arch value. */
13885 return bfd_mach_arm_unknown;
13886 }
13887 }
13888
13889 /* Set the right machine number. */
13890
13891 static bool
13892 elf32_arm_object_p (bfd *abfd)
13893 {
13894 unsigned int mach;
13895
13896 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
13897
13898 if (mach == bfd_mach_arm_unknown)
13899 {
13900 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13901 mach = bfd_mach_arm_ep9312;
13902 else
13903 mach = bfd_arm_get_mach_from_attributes (abfd);
13904 }
13905
13906 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13907 return true;
13908 }
13909
13910 /* Function to keep ARM specific flags in the ELF header. */
13911
13912 static bool
13913 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13914 {
13915 if (elf_flags_init (abfd)
13916 && elf_elfheader (abfd)->e_flags != flags)
13917 {
13918 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13919 {
13920 if (flags & EF_ARM_INTERWORK)
13921 _bfd_error_handler
13922 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13923 abfd);
13924 else
13925 _bfd_error_handler
13926 (_("warning: clearing the interworking flag of %pB due to outside request"),
13927 abfd);
13928 }
13929 }
13930 else
13931 {
13932 elf_elfheader (abfd)->e_flags = flags;
13933 elf_flags_init (abfd) = true;
13934 }
13935
13936 return true;
13937 }
13938
13939 /* Copy backend specific data from one object module to another. */
13940
13941 static bool
13942 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13943 {
13944 flagword in_flags;
13945 flagword out_flags;
13946
13947 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13948 return true;
13949
13950 in_flags = elf_elfheader (ibfd)->e_flags;
13951 out_flags = elf_elfheader (obfd)->e_flags;
13952
13953 if (elf_flags_init (obfd)
13954 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13955 && in_flags != out_flags)
13956 {
13957 /* Cannot mix APCS26 and APCS32 code. */
13958 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13959 return false;
13960
13961 /* Cannot mix float APCS and non-float APCS code. */
13962 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13963 return false;
13964
13965 /* If the src and dest have different interworking flags
13966 then turn off the interworking bit. */
13967 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13968 {
13969 if (out_flags & EF_ARM_INTERWORK)
13970 _bfd_error_handler
13971 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13972 obfd, ibfd);
13973
13974 in_flags &= ~EF_ARM_INTERWORK;
13975 }
13976
13977 /* Likewise for PIC, though don't warn for this case. */
13978 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13979 in_flags &= ~EF_ARM_PIC;
13980 }
13981
13982 elf_elfheader (obfd)->e_flags = in_flags;
13983 elf_flags_init (obfd) = true;
13984
13985 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13986 }
13987
13988 /* Values for Tag_ABI_PCS_R9_use. */
13989 enum
13990 {
13991 AEABI_R9_V6,
13992 AEABI_R9_SB,
13993 AEABI_R9_TLS,
13994 AEABI_R9_unused
13995 };
13996
13997 /* Values for Tag_ABI_PCS_RW_data. */
13998 enum
13999 {
14000 AEABI_PCS_RW_data_absolute,
14001 AEABI_PCS_RW_data_PCrel,
14002 AEABI_PCS_RW_data_SBrel,
14003 AEABI_PCS_RW_data_unused
14004 };
14005
14006 /* Values for Tag_ABI_enum_size. */
14007 enum
14008 {
14009 AEABI_enum_unused,
14010 AEABI_enum_short,
14011 AEABI_enum_wide,
14012 AEABI_enum_forced_wide
14013 };
14014
14015 /* Determine whether an object attribute tag takes an integer, a
14016 string or both. */
14017
14018 static int
14019 elf32_arm_obj_attrs_arg_type (int tag)
14020 {
14021 if (tag == Tag_compatibility)
14022 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
14023 else if (tag == Tag_nodefaults)
14024 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
14025 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
14026 return ATTR_TYPE_FLAG_STR_VAL;
14027 else if (tag < 32)
14028 return ATTR_TYPE_FLAG_INT_VAL;
14029 else
14030 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
14031 }
14032
14033 /* The ABI defines that Tag_conformance should be emitted first, and that
14034 Tag_nodefaults should be second (if either is defined). This sets those
14035 two positions, and bumps up the position of all the remaining tags to
14036 compensate. */
14037 static int
14038 elf32_arm_obj_attrs_order (int num)
14039 {
14040 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
14041 return Tag_conformance;
14042 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
14043 return Tag_nodefaults;
14044 if ((num - 2) < Tag_nodefaults)
14045 return num - 2;
14046 if ((num - 1) < Tag_conformance)
14047 return num - 1;
14048 return num;
14049 }
14050
14051 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
14052 static bool
14053 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
14054 {
14055 if ((tag & 127) < 64)
14056 {
14057 _bfd_error_handler
14058 (_("%pB: unknown mandatory EABI object attribute %d"),
14059 abfd, tag);
14060 bfd_set_error (bfd_error_bad_value);
14061 return false;
14062 }
14063 else
14064 {
14065 _bfd_error_handler
14066 (_("warning: %pB: unknown EABI object attribute %d"),
14067 abfd, tag);
14068 return true;
14069 }
14070 }
14071
14072 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
14073 Returns -1 if no architecture could be read. */
14074
14075 static int
14076 get_secondary_compatible_arch (bfd *abfd)
14077 {
14078 obj_attribute *attr =
14079 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
14080
14081 /* Note: the tag and its argument below are uleb128 values, though
14082 currently-defined values fit in one byte for each. */
14083 if (attr->s
14084 && attr->s[0] == Tag_CPU_arch
14085 && (attr->s[1] & 128) != 128
14086 && attr->s[2] == 0)
14087 return attr->s[1];
14088
14089 /* This tag is "safely ignorable", so don't complain if it looks funny. */
14090 return -1;
14091 }
14092
14093 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
14094 The tag is removed if ARCH is -1. */
14095
14096 static void
14097 set_secondary_compatible_arch (bfd *abfd, int arch)
14098 {
14099 obj_attribute *attr =
14100 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
14101
14102 if (arch == -1)
14103 {
14104 attr->s = NULL;
14105 return;
14106 }
14107
14108 /* Note: the tag and its argument below are uleb128 values, though
14109 currently-defined values fit in one byte for each. */
14110 if (!attr->s)
14111 attr->s = (char *) bfd_alloc (abfd, 3);
14112 attr->s[0] = Tag_CPU_arch;
14113 attr->s[1] = arch;
14114 attr->s[2] = '\0';
14115 }
14116
14117 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
14118 into account. */
14119
14120 static int
14121 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
14122 int newtag, int secondary_compat)
14123 {
14124 #define T(X) TAG_CPU_ARCH_##X
14125 int tagl, tagh, result;
14126 const int v6t2[] =
14127 {
14128 T(V6T2), /* PRE_V4. */
14129 T(V6T2), /* V4. */
14130 T(V6T2), /* V4T. */
14131 T(V6T2), /* V5T. */
14132 T(V6T2), /* V5TE. */
14133 T(V6T2), /* V5TEJ. */
14134 T(V6T2), /* V6. */
14135 T(V7), /* V6KZ. */
14136 T(V6T2) /* V6T2. */
14137 };
14138 const int v6k[] =
14139 {
14140 T(V6K), /* PRE_V4. */
14141 T(V6K), /* V4. */
14142 T(V6K), /* V4T. */
14143 T(V6K), /* V5T. */
14144 T(V6K), /* V5TE. */
14145 T(V6K), /* V5TEJ. */
14146 T(V6K), /* V6. */
14147 T(V6KZ), /* V6KZ. */
14148 T(V7), /* V6T2. */
14149 T(V6K) /* V6K. */
14150 };
14151 const int v7[] =
14152 {
14153 T(V7), /* PRE_V4. */
14154 T(V7), /* V4. */
14155 T(V7), /* V4T. */
14156 T(V7), /* V5T. */
14157 T(V7), /* V5TE. */
14158 T(V7), /* V5TEJ. */
14159 T(V7), /* V6. */
14160 T(V7), /* V6KZ. */
14161 T(V7), /* V6T2. */
14162 T(V7), /* V6K. */
14163 T(V7) /* V7. */
14164 };
14165 const int v6_m[] =
14166 {
14167 -1, /* PRE_V4. */
14168 -1, /* V4. */
14169 T(V6K), /* V4T. */
14170 T(V6K), /* V5T. */
14171 T(V6K), /* V5TE. */
14172 T(V6K), /* V5TEJ. */
14173 T(V6K), /* V6. */
14174 T(V6KZ), /* V6KZ. */
14175 T(V7), /* V6T2. */
14176 T(V6K), /* V6K. */
14177 T(V7), /* V7. */
14178 T(V6_M) /* V6_M. */
14179 };
14180 const int v6s_m[] =
14181 {
14182 -1, /* PRE_V4. */
14183 -1, /* V4. */
14184 T(V6K), /* V4T. */
14185 T(V6K), /* V5T. */
14186 T(V6K), /* V5TE. */
14187 T(V6K), /* V5TEJ. */
14188 T(V6K), /* V6. */
14189 T(V6KZ), /* V6KZ. */
14190 T(V7), /* V6T2. */
14191 T(V6K), /* V6K. */
14192 T(V7), /* V7. */
14193 T(V6S_M), /* V6_M. */
14194 T(V6S_M) /* V6S_M. */
14195 };
14196 const int v7e_m[] =
14197 {
14198 -1, /* PRE_V4. */
14199 -1, /* V4. */
14200 T(V7E_M), /* V4T. */
14201 T(V7E_M), /* V5T. */
14202 T(V7E_M), /* V5TE. */
14203 T(V7E_M), /* V5TEJ. */
14204 T(V7E_M), /* V6. */
14205 T(V7E_M), /* V6KZ. */
14206 T(V7E_M), /* V6T2. */
14207 T(V7E_M), /* V6K. */
14208 T(V7E_M), /* V7. */
14209 T(V7E_M), /* V6_M. */
14210 T(V7E_M), /* V6S_M. */
14211 T(V7E_M) /* V7E_M. */
14212 };
14213 const int v8[] =
14214 {
14215 T(V8), /* PRE_V4. */
14216 T(V8), /* V4. */
14217 T(V8), /* V4T. */
14218 T(V8), /* V5T. */
14219 T(V8), /* V5TE. */
14220 T(V8), /* V5TEJ. */
14221 T(V8), /* V6. */
14222 T(V8), /* V6KZ. */
14223 T(V8), /* V6T2. */
14224 T(V8), /* V6K. */
14225 T(V8), /* V7. */
14226 T(V8), /* V6_M. */
14227 T(V8), /* V6S_M. */
14228 T(V8), /* V7E_M. */
14229 T(V8), /* V8. */
14230 T(V8), /* V8-R. */
14231 T(V8), /* V8-M.BASE. */
14232 T(V8), /* V8-M.MAIN. */
14233 T(V8), /* V8.1. */
14234 T(V8), /* V8.2. */
14235 T(V8), /* V8.3. */
14236 T(V8), /* V8.1-M.MAIN. */
14237 };
14238 const int v8r[] =
14239 {
14240 T(V8R), /* PRE_V4. */
14241 T(V8R), /* V4. */
14242 T(V8R), /* V4T. */
14243 T(V8R), /* V5T. */
14244 T(V8R), /* V5TE. */
14245 T(V8R), /* V5TEJ. */
14246 T(V8R), /* V6. */
14247 T(V8R), /* V6KZ. */
14248 T(V8R), /* V6T2. */
14249 T(V8R), /* V6K. */
14250 T(V8R), /* V7. */
14251 T(V8R), /* V6_M. */
14252 T(V8R), /* V6S_M. */
14253 T(V8R), /* V7E_M. */
14254 T(V8), /* V8. */
14255 T(V8R), /* V8R. */
14256 };
14257 const int v8m_baseline[] =
14258 {
14259 -1, /* PRE_V4. */
14260 -1, /* V4. */
14261 -1, /* V4T. */
14262 -1, /* V5T. */
14263 -1, /* V5TE. */
14264 -1, /* V5TEJ. */
14265 -1, /* V6. */
14266 -1, /* V6KZ. */
14267 -1, /* V6T2. */
14268 -1, /* V6K. */
14269 -1, /* V7. */
14270 T(V8M_BASE), /* V6_M. */
14271 T(V8M_BASE), /* V6S_M. */
14272 -1, /* V7E_M. */
14273 -1, /* V8. */
14274 -1, /* V8R. */
14275 T(V8M_BASE) /* V8-M BASELINE. */
14276 };
14277 const int v8m_mainline[] =
14278 {
14279 -1, /* PRE_V4. */
14280 -1, /* V4. */
14281 -1, /* V4T. */
14282 -1, /* V5T. */
14283 -1, /* V5TE. */
14284 -1, /* V5TEJ. */
14285 -1, /* V6. */
14286 -1, /* V6KZ. */
14287 -1, /* V6T2. */
14288 -1, /* V6K. */
14289 T(V8M_MAIN), /* V7. */
14290 T(V8M_MAIN), /* V6_M. */
14291 T(V8M_MAIN), /* V6S_M. */
14292 T(V8M_MAIN), /* V7E_M. */
14293 -1, /* V8. */
14294 -1, /* V8R. */
14295 T(V8M_MAIN), /* V8-M BASELINE. */
14296 T(V8M_MAIN) /* V8-M MAINLINE. */
14297 };
14298 const int v8_1m_mainline[] =
14299 {
14300 -1, /* PRE_V4. */
14301 -1, /* V4. */
14302 -1, /* V4T. */
14303 -1, /* V5T. */
14304 -1, /* V5TE. */
14305 -1, /* V5TEJ. */
14306 -1, /* V6. */
14307 -1, /* V6KZ. */
14308 -1, /* V6T2. */
14309 -1, /* V6K. */
14310 T(V8_1M_MAIN), /* V7. */
14311 T(V8_1M_MAIN), /* V6_M. */
14312 T(V8_1M_MAIN), /* V6S_M. */
14313 T(V8_1M_MAIN), /* V7E_M. */
14314 -1, /* V8. */
14315 -1, /* V8R. */
14316 T(V8_1M_MAIN), /* V8-M BASELINE. */
14317 T(V8_1M_MAIN), /* V8-M MAINLINE. */
14318 -1, /* Unused (18). */
14319 -1, /* Unused (19). */
14320 -1, /* Unused (20). */
14321 T(V8_1M_MAIN) /* V8.1-M MAINLINE. */
14322 };
14323 const int v9[] =
14324 {
14325 T(V9), /* PRE_V4. */
14326 T(V9), /* V4. */
14327 T(V9), /* V4T. */
14328 T(V9), /* V5T. */
14329 T(V9), /* V5TE. */
14330 T(V9), /* V5TEJ. */
14331 T(V9), /* V6. */
14332 T(V9), /* V6KZ. */
14333 T(V9), /* V6T2. */
14334 T(V9), /* V6K. */
14335 T(V9), /* V7. */
14336 T(V9), /* V6_M. */
14337 T(V9), /* V6S_M. */
14338 T(V9), /* V7E_M. */
14339 T(V9), /* V8. */
14340 T(V9), /* V8-R. */
14341 T(V9), /* V8-M.BASE. */
14342 T(V9), /* V8-M.MAIN. */
14343 T(V9), /* V8.1. */
14344 T(V9), /* V8.2. */
14345 T(V9), /* V8.3. */
14346 T(V9), /* V8.1-M.MAIN. */
14347 T(V9), /* V9. */
14348 };
14349 const int v4t_plus_v6_m[] =
14350 {
14351 -1, /* PRE_V4. */
14352 -1, /* V4. */
14353 T(V4T), /* V4T. */
14354 T(V5T), /* V5T. */
14355 T(V5TE), /* V5TE. */
14356 T(V5TEJ), /* V5TEJ. */
14357 T(V6), /* V6. */
14358 T(V6KZ), /* V6KZ. */
14359 T(V6T2), /* V6T2. */
14360 T(V6K), /* V6K. */
14361 T(V7), /* V7. */
14362 T(V6_M), /* V6_M. */
14363 T(V6S_M), /* V6S_M. */
14364 T(V7E_M), /* V7E_M. */
14365 T(V8), /* V8. */
14366 -1, /* V8R. */
14367 T(V8M_BASE), /* V8-M BASELINE. */
14368 T(V8M_MAIN), /* V8-M MAINLINE. */
14369 -1, /* Unused (18). */
14370 -1, /* Unused (19). */
14371 -1, /* Unused (20). */
14372 T(V8_1M_MAIN), /* V8.1-M MAINLINE. */
14373 T(V9), /* V9. */
14374 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
14375 };
14376 const int *comb[] =
14377 {
14378 v6t2,
14379 v6k,
14380 v7,
14381 v6_m,
14382 v6s_m,
14383 v7e_m,
14384 v8,
14385 v8r,
14386 v8m_baseline,
14387 v8m_mainline,
14388 NULL,
14389 NULL,
14390 NULL,
14391 v8_1m_mainline,
14392 v9,
14393 /* Pseudo-architecture. */
14394 v4t_plus_v6_m
14395 };
14396
14397 /* Check we've not got a higher architecture than we know about. */
14398
14399 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
14400 {
14401 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd);
14402 return -1;
14403 }
14404
14405 /* Override old tag if we have a Tag_also_compatible_with on the output. */
14406
14407 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
14408 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
14409 oldtag = T(V4T_PLUS_V6_M);
14410
14411 /* And override the new tag if we have a Tag_also_compatible_with on the
14412 input. */
14413
14414 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
14415 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
14416 newtag = T(V4T_PLUS_V6_M);
14417
14418 tagl = (oldtag < newtag) ? oldtag : newtag;
14419 result = tagh = (oldtag > newtag) ? oldtag : newtag;
14420
14421 /* Architectures before V6KZ add features monotonically. */
14422 if (tagh <= TAG_CPU_ARCH_V6KZ)
14423 return result;
14424
14425 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
14426
14427 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
14428 as the canonical version. */
14429 if (result == T(V4T_PLUS_V6_M))
14430 {
14431 result = T(V4T);
14432 *secondary_compat_out = T(V6_M);
14433 }
14434 else
14435 *secondary_compat_out = -1;
14436
14437 if (result == -1)
14438 {
14439 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
14440 ibfd, oldtag, newtag);
14441 return -1;
14442 }
14443
14444 return result;
14445 #undef T
14446 }
14447
14448 /* Query attributes object to see if integer divide instructions may be
14449 present in an object. */
14450 static bool
14451 elf32_arm_attributes_accept_div (const obj_attribute *attr)
14452 {
14453 int arch = attr[Tag_CPU_arch].i;
14454 int profile = attr[Tag_CPU_arch_profile].i;
14455
14456 switch (attr[Tag_DIV_use].i)
14457 {
14458 case 0:
14459 /* Integer divide allowed if instruction contained in archetecture. */
14460 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
14461 return true;
14462 else if (arch >= TAG_CPU_ARCH_V7E_M)
14463 return true;
14464 else
14465 return false;
14466
14467 case 1:
14468 /* Integer divide explicitly prohibited. */
14469 return false;
14470
14471 default:
14472 /* Unrecognised case - treat as allowing divide everywhere. */
14473 case 2:
14474 /* Integer divide allowed in ARM state. */
14475 return true;
14476 }
14477 }
14478
14479 /* Query attributes object to see if integer divide instructions are
14480 forbidden to be in the object. This is not the inverse of
14481 elf32_arm_attributes_accept_div. */
14482 static bool
14483 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
14484 {
14485 return attr[Tag_DIV_use].i == 1;
14486 }
14487
14488 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
14489 are conflicting attributes. */
14490
14491 static bool
14492 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
14493 {
14494 bfd *obfd = info->output_bfd;
14495 obj_attribute *in_attr;
14496 obj_attribute *out_attr;
14497 /* Some tags have 0 = don't care, 1 = strong requirement,
14498 2 = weak requirement. */
14499 static const int order_021[3] = {0, 2, 1};
14500 int i;
14501 bool result = true;
14502 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
14503
14504 /* Skip the linker stubs file. This preserves previous behavior
14505 of accepting unknown attributes in the first input file - but
14506 is that a bug? */
14507 if (ibfd->flags & BFD_LINKER_CREATED)
14508 return true;
14509
14510 /* Skip any input that hasn't attribute section.
14511 This enables to link object files without attribute section with
14512 any others. */
14513 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
14514 return true;
14515
14516 if (!elf_known_obj_attributes_proc (obfd)[0].i)
14517 {
14518 /* This is the first object. Copy the attributes. */
14519 _bfd_elf_copy_obj_attributes (ibfd, obfd);
14520
14521 out_attr = elf_known_obj_attributes_proc (obfd);
14522
14523 /* Use the Tag_null value to indicate the attributes have been
14524 initialized. */
14525 out_attr[0].i = 1;
14526
14527 /* We do not output objects with Tag_MPextension_use_legacy - we move
14528 the attribute's value to Tag_MPextension_use. */
14529 if (out_attr[Tag_MPextension_use_legacy].i != 0)
14530 {
14531 if (out_attr[Tag_MPextension_use].i != 0
14532 && out_attr[Tag_MPextension_use_legacy].i
14533 != out_attr[Tag_MPextension_use].i)
14534 {
14535 _bfd_error_handler
14536 (_("Error: %pB has both the current and legacy "
14537 "Tag_MPextension_use attributes"), ibfd);
14538 result = false;
14539 }
14540
14541 out_attr[Tag_MPextension_use] =
14542 out_attr[Tag_MPextension_use_legacy];
14543 out_attr[Tag_MPextension_use_legacy].type = 0;
14544 out_attr[Tag_MPextension_use_legacy].i = 0;
14545 }
14546
14547 /* PR 28859 and 28848: Handle the case where the first input file,
14548 eg crti.o, has a Tag_ABI_HardFP_use of 3 but no Tag_FP_arch set.
14549 Using Tag_ABI_HardFP_use in this way is deprecated, so reset the
14550 attribute to zero.
14551 FIXME: Should we handle other non-zero values of Tag_ABI_HardFO_use ? */
14552 if (out_attr[Tag_ABI_HardFP_use].i == 3 && out_attr[Tag_FP_arch].i == 0)
14553 out_attr[Tag_ABI_HardFP_use].i = 0;
14554
14555 return result;
14556 }
14557
14558 in_attr = elf_known_obj_attributes_proc (ibfd);
14559 out_attr = elf_known_obj_attributes_proc (obfd);
14560 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
14561 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
14562 {
14563 /* Ignore mismatches if the object doesn't use floating point or is
14564 floating point ABI independent. */
14565 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
14566 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14567 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
14568 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
14569 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14570 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
14571 {
14572 _bfd_error_handler
14573 (_("error: %pB uses VFP register arguments, %pB does not"),
14574 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
14575 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
14576 result = false;
14577 }
14578 }
14579
14580 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
14581 {
14582 /* Merge this attribute with existing attributes. */
14583 switch (i)
14584 {
14585 case Tag_CPU_raw_name:
14586 case Tag_CPU_name:
14587 /* These are merged after Tag_CPU_arch. */
14588 break;
14589
14590 case Tag_ABI_optimization_goals:
14591 case Tag_ABI_FP_optimization_goals:
14592 /* Use the first value seen. */
14593 break;
14594
14595 case Tag_CPU_arch:
14596 {
14597 int secondary_compat = -1, secondary_compat_out = -1;
14598 unsigned int saved_out_attr = out_attr[i].i;
14599 int arch_attr;
14600 static const char *name_table[] =
14601 {
14602 /* These aren't real CPU names, but we can't guess
14603 that from the architecture version alone. */
14604 "Pre v4",
14605 "ARM v4",
14606 "ARM v4T",
14607 "ARM v5T",
14608 "ARM v5TE",
14609 "ARM v5TEJ",
14610 "ARM v6",
14611 "ARM v6KZ",
14612 "ARM v6T2",
14613 "ARM v6K",
14614 "ARM v7",
14615 "ARM v6-M",
14616 "ARM v6S-M",
14617 "ARM v7E-M",
14618 "ARM v8",
14619 "ARM v8-R",
14620 "ARM v8-M.baseline",
14621 "ARM v8-M.mainline",
14622 "ARM v8.1-A",
14623 "ARM v8.2-A",
14624 "ARM v8.3-A",
14625 "ARM v8.1-M.mainline",
14626 "ARM v9",
14627 };
14628
14629 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
14630 secondary_compat = get_secondary_compatible_arch (ibfd);
14631 secondary_compat_out = get_secondary_compatible_arch (obfd);
14632 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
14633 &secondary_compat_out,
14634 in_attr[i].i,
14635 secondary_compat);
14636
14637 /* Return with error if failed to merge. */
14638 if (arch_attr == -1)
14639 return false;
14640
14641 out_attr[i].i = arch_attr;
14642
14643 set_secondary_compatible_arch (obfd, secondary_compat_out);
14644
14645 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
14646 if (out_attr[i].i == saved_out_attr)
14647 ; /* Leave the names alone. */
14648 else if (out_attr[i].i == in_attr[i].i)
14649 {
14650 /* The output architecture has been changed to match the
14651 input architecture. Use the input names. */
14652 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
14653 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
14654 : NULL;
14655 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
14656 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
14657 : NULL;
14658 }
14659 else
14660 {
14661 out_attr[Tag_CPU_name].s = NULL;
14662 out_attr[Tag_CPU_raw_name].s = NULL;
14663 }
14664
14665 /* If we still don't have a value for Tag_CPU_name,
14666 make one up now. Tag_CPU_raw_name remains blank. */
14667 if (out_attr[Tag_CPU_name].s == NULL
14668 && out_attr[i].i < ARRAY_SIZE (name_table))
14669 out_attr[Tag_CPU_name].s =
14670 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
14671 }
14672 break;
14673
14674 case Tag_ARM_ISA_use:
14675 case Tag_THUMB_ISA_use:
14676 case Tag_WMMX_arch:
14677 case Tag_Advanced_SIMD_arch:
14678 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
14679 case Tag_ABI_FP_rounding:
14680 case Tag_ABI_FP_exceptions:
14681 case Tag_ABI_FP_user_exceptions:
14682 case Tag_ABI_FP_number_model:
14683 case Tag_FP_HP_extension:
14684 case Tag_CPU_unaligned_access:
14685 case Tag_T2EE_use:
14686 case Tag_MPextension_use:
14687 case Tag_MVE_arch:
14688 case Tag_PAC_extension:
14689 case Tag_BTI_extension:
14690 case Tag_BTI_use:
14691 case Tag_PACRET_use:
14692 /* Use the largest value specified. */
14693 if (in_attr[i].i > out_attr[i].i)
14694 out_attr[i].i = in_attr[i].i;
14695 break;
14696
14697 case Tag_ABI_align_preserved:
14698 case Tag_ABI_PCS_RO_data:
14699 /* Use the smallest value specified. */
14700 if (in_attr[i].i < out_attr[i].i)
14701 out_attr[i].i = in_attr[i].i;
14702 break;
14703
14704 case Tag_ABI_align_needed:
14705 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
14706 && (in_attr[Tag_ABI_align_preserved].i == 0
14707 || out_attr[Tag_ABI_align_preserved].i == 0))
14708 {
14709 /* This error message should be enabled once all non-conformant
14710 binaries in the toolchain have had the attributes set
14711 properly.
14712 _bfd_error_handler
14713 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14714 obfd, ibfd);
14715 result = false; */
14716 }
14717 /* Fall through. */
14718 case Tag_ABI_FP_denormal:
14719 case Tag_ABI_PCS_GOT_use:
14720 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14721 value if greater than 2 (for future-proofing). */
14722 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
14723 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
14724 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
14725 out_attr[i].i = in_attr[i].i;
14726 break;
14727
14728 case Tag_Virtualization_use:
14729 /* The virtualization tag effectively stores two bits of
14730 information: the intended use of TrustZone (in bit 0), and the
14731 intended use of Virtualization (in bit 1). */
14732 if (out_attr[i].i == 0)
14733 out_attr[i].i = in_attr[i].i;
14734 else if (in_attr[i].i != 0
14735 && in_attr[i].i != out_attr[i].i)
14736 {
14737 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
14738 out_attr[i].i = 3;
14739 else
14740 {
14741 _bfd_error_handler
14742 (_("error: %pB: unable to merge virtualization attributes "
14743 "with %pB"),
14744 obfd, ibfd);
14745 result = false;
14746 }
14747 }
14748 break;
14749
14750 case Tag_CPU_arch_profile:
14751 if (out_attr[i].i != in_attr[i].i)
14752 {
14753 /* 0 will merge with anything.
14754 'A' and 'S' merge to 'A'.
14755 'R' and 'S' merge to 'R'.
14756 'M' and 'A|R|S' is an error. */
14757 if (out_attr[i].i == 0
14758 || (out_attr[i].i == 'S'
14759 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
14760 out_attr[i].i = in_attr[i].i;
14761 else if (in_attr[i].i == 0
14762 || (in_attr[i].i == 'S'
14763 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
14764 ; /* Do nothing. */
14765 else
14766 {
14767 _bfd_error_handler
14768 (_("error: %pB: conflicting architecture profiles %c/%c"),
14769 ibfd,
14770 in_attr[i].i ? in_attr[i].i : '0',
14771 out_attr[i].i ? out_attr[i].i : '0');
14772 result = false;
14773 }
14774 }
14775 break;
14776
14777 case Tag_DSP_extension:
14778 /* No need to change output value if any of:
14779 - pre (<=) ARMv5T input architecture (do not have DSP)
14780 - M input profile not ARMv7E-M and do not have DSP. */
14781 if (in_attr[Tag_CPU_arch].i <= 3
14782 || (in_attr[Tag_CPU_arch_profile].i == 'M'
14783 && in_attr[Tag_CPU_arch].i != 13
14784 && in_attr[i].i == 0))
14785 ; /* Do nothing. */
14786 /* Output value should be 0 if DSP part of architecture, ie.
14787 - post (>=) ARMv5te architecture output
14788 - A, R or S profile output or ARMv7E-M output architecture. */
14789 else if (out_attr[Tag_CPU_arch].i >= 4
14790 && (out_attr[Tag_CPU_arch_profile].i == 'A'
14791 || out_attr[Tag_CPU_arch_profile].i == 'R'
14792 || out_attr[Tag_CPU_arch_profile].i == 'S'
14793 || out_attr[Tag_CPU_arch].i == 13))
14794 out_attr[i].i = 0;
14795 /* Otherwise, DSP instructions are added and not part of output
14796 architecture. */
14797 else
14798 out_attr[i].i = 1;
14799 break;
14800
14801 case Tag_FP_arch:
14802 {
14803 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14804 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14805 when it's 0. It might mean absence of FP hardware if
14806 Tag_FP_arch is zero. */
14807
14808 #define VFP_VERSION_COUNT 9
14809 static const struct
14810 {
14811 int ver;
14812 int regs;
14813 } vfp_versions[VFP_VERSION_COUNT] =
14814 {
14815 {0, 0},
14816 {1, 16},
14817 {2, 16},
14818 {3, 32},
14819 {3, 16},
14820 {4, 32},
14821 {4, 16},
14822 {8, 32},
14823 {8, 16}
14824 };
14825 int ver;
14826 int regs;
14827 int newval;
14828
14829 /* If the output has no requirement about FP hardware,
14830 follow the requirement of the input. */
14831 if (out_attr[i].i == 0)
14832 {
14833 /* This assert is still reasonable, we shouldn't
14834 produce the suspicious build attribute
14835 combination (See below for in_attr). */
14836 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
14837 out_attr[i].i = in_attr[i].i;
14838 out_attr[Tag_ABI_HardFP_use].i
14839 = in_attr[Tag_ABI_HardFP_use].i;
14840 break;
14841 }
14842 /* If the input has no requirement about FP hardware, do
14843 nothing. */
14844 else if (in_attr[i].i == 0)
14845 {
14846 /* We used to assert that Tag_ABI_HardFP_use was
14847 zero here, but we should never assert when
14848 consuming an object file that has suspicious
14849 build attributes. The single precision variant
14850 of 'no FP architecture' is still 'no FP
14851 architecture', so we just ignore the tag in this
14852 case. */
14853 break;
14854 }
14855
14856 /* Both the input and the output have nonzero Tag_FP_arch.
14857 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
14858
14859 /* If both the input and the output have zero Tag_ABI_HardFP_use,
14860 do nothing. */
14861 if (in_attr[Tag_ABI_HardFP_use].i == 0
14862 && out_attr[Tag_ABI_HardFP_use].i == 0)
14863 ;
14864 /* If the input and the output have different Tag_ABI_HardFP_use,
14865 the combination of them is 0 (implied by Tag_FP_arch). */
14866 else if (in_attr[Tag_ABI_HardFP_use].i
14867 != out_attr[Tag_ABI_HardFP_use].i)
14868 out_attr[Tag_ABI_HardFP_use].i = 0;
14869
14870 /* Now we can handle Tag_FP_arch. */
14871
14872 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14873 pick the biggest. */
14874 if (in_attr[i].i >= VFP_VERSION_COUNT
14875 && in_attr[i].i > out_attr[i].i)
14876 {
14877 out_attr[i] = in_attr[i];
14878 break;
14879 }
14880 /* The output uses the superset of input features
14881 (ISA version) and registers. */
14882 ver = vfp_versions[in_attr[i].i].ver;
14883 if (ver < vfp_versions[out_attr[i].i].ver)
14884 ver = vfp_versions[out_attr[i].i].ver;
14885 regs = vfp_versions[in_attr[i].i].regs;
14886 if (regs < vfp_versions[out_attr[i].i].regs)
14887 regs = vfp_versions[out_attr[i].i].regs;
14888 /* This assumes all possible supersets are also a valid
14889 options. */
14890 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
14891 {
14892 if (regs == vfp_versions[newval].regs
14893 && ver == vfp_versions[newval].ver)
14894 break;
14895 }
14896 out_attr[i].i = newval;
14897 }
14898 break;
14899 case Tag_PCS_config:
14900 if (out_attr[i].i == 0)
14901 out_attr[i].i = in_attr[i].i;
14902 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
14903 {
14904 /* It's sometimes ok to mix different configs, so this is only
14905 a warning. */
14906 _bfd_error_handler
14907 (_("warning: %pB: conflicting platform configuration"), ibfd);
14908 }
14909 break;
14910 case Tag_ABI_PCS_R9_use:
14911 if (in_attr[i].i != out_attr[i].i
14912 && out_attr[i].i != AEABI_R9_unused
14913 && in_attr[i].i != AEABI_R9_unused)
14914 {
14915 _bfd_error_handler
14916 (_("error: %pB: conflicting use of R9"), ibfd);
14917 result = false;
14918 }
14919 if (out_attr[i].i == AEABI_R9_unused)
14920 out_attr[i].i = in_attr[i].i;
14921 break;
14922 case Tag_ABI_PCS_RW_data:
14923 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
14924 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
14925 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
14926 {
14927 _bfd_error_handler
14928 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14929 ibfd);
14930 result = false;
14931 }
14932 /* Use the smallest value specified. */
14933 if (in_attr[i].i < out_attr[i].i)
14934 out_attr[i].i = in_attr[i].i;
14935 break;
14936 case Tag_ABI_PCS_wchar_t:
14937 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
14938 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
14939 {
14940 _bfd_error_handler
14941 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14942 ibfd, in_attr[i].i, out_attr[i].i);
14943 }
14944 else if (in_attr[i].i && !out_attr[i].i)
14945 out_attr[i].i = in_attr[i].i;
14946 break;
14947 case Tag_ABI_enum_size:
14948 if (in_attr[i].i != AEABI_enum_unused)
14949 {
14950 if (out_attr[i].i == AEABI_enum_unused
14951 || out_attr[i].i == AEABI_enum_forced_wide)
14952 {
14953 /* The existing object is compatible with anything.
14954 Use whatever requirements the new object has. */
14955 out_attr[i].i = in_attr[i].i;
14956 }
14957 else if (in_attr[i].i != AEABI_enum_forced_wide
14958 && out_attr[i].i != in_attr[i].i
14959 && !elf_arm_tdata (obfd)->no_enum_size_warning)
14960 {
14961 static const char *aeabi_enum_names[] =
14962 { "", "variable-size", "32-bit", "" };
14963 const char *in_name =
14964 in_attr[i].i < ARRAY_SIZE (aeabi_enum_names)
14965 ? aeabi_enum_names[in_attr[i].i]
14966 : "<unknown>";
14967 const char *out_name =
14968 out_attr[i].i < ARRAY_SIZE (aeabi_enum_names)
14969 ? aeabi_enum_names[out_attr[i].i]
14970 : "<unknown>";
14971 _bfd_error_handler
14972 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14973 ibfd, in_name, out_name);
14974 }
14975 }
14976 break;
14977 case Tag_ABI_VFP_args:
14978 /* Aready done. */
14979 break;
14980 case Tag_ABI_WMMX_args:
14981 if (in_attr[i].i != out_attr[i].i)
14982 {
14983 _bfd_error_handler
14984 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14985 ibfd, obfd);
14986 result = false;
14987 }
14988 break;
14989 case Tag_compatibility:
14990 /* Merged in target-independent code. */
14991 break;
14992 case Tag_ABI_HardFP_use:
14993 /* This is handled along with Tag_FP_arch. */
14994 break;
14995 case Tag_ABI_FP_16bit_format:
14996 if (in_attr[i].i != 0 && out_attr[i].i != 0)
14997 {
14998 if (in_attr[i].i != out_attr[i].i)
14999 {
15000 _bfd_error_handler
15001 (_("error: fp16 format mismatch between %pB and %pB"),
15002 ibfd, obfd);
15003 result = false;
15004 }
15005 }
15006 if (in_attr[i].i != 0)
15007 out_attr[i].i = in_attr[i].i;
15008 break;
15009
15010 case Tag_DIV_use:
15011 /* A value of zero on input means that the divide instruction may
15012 be used if available in the base architecture as specified via
15013 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
15014 the user did not want divide instructions. A value of 2
15015 explicitly means that divide instructions were allowed in ARM
15016 and Thumb state. */
15017 if (in_attr[i].i == out_attr[i].i)
15018 /* Do nothing. */ ;
15019 else if (elf32_arm_attributes_forbid_div (in_attr)
15020 && !elf32_arm_attributes_accept_div (out_attr))
15021 out_attr[i].i = 1;
15022 else if (elf32_arm_attributes_forbid_div (out_attr)
15023 && elf32_arm_attributes_accept_div (in_attr))
15024 out_attr[i].i = in_attr[i].i;
15025 else if (in_attr[i].i == 2)
15026 out_attr[i].i = in_attr[i].i;
15027 break;
15028
15029 case Tag_MPextension_use_legacy:
15030 /* We don't output objects with Tag_MPextension_use_legacy - we
15031 move the value to Tag_MPextension_use. */
15032 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
15033 {
15034 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
15035 {
15036 _bfd_error_handler
15037 (_("%pB has both the current and legacy "
15038 "Tag_MPextension_use attributes"),
15039 ibfd);
15040 result = false;
15041 }
15042 }
15043
15044 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
15045 out_attr[Tag_MPextension_use] = in_attr[i];
15046
15047 break;
15048
15049 case Tag_nodefaults:
15050 /* This tag is set if it exists, but the value is unused (and is
15051 typically zero). We don't actually need to do anything here -
15052 the merge happens automatically when the type flags are merged
15053 below. */
15054 break;
15055 case Tag_also_compatible_with:
15056 /* Already done in Tag_CPU_arch. */
15057 break;
15058 case Tag_conformance:
15059 /* Keep the attribute if it matches. Throw it away otherwise.
15060 No attribute means no claim to conform. */
15061 if (!in_attr[i].s || !out_attr[i].s
15062 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
15063 out_attr[i].s = NULL;
15064 break;
15065
15066 default:
15067 result
15068 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
15069 }
15070
15071 /* If out_attr was copied from in_attr then it won't have a type yet. */
15072 if (in_attr[i].type && !out_attr[i].type)
15073 out_attr[i].type = in_attr[i].type;
15074 }
15075
15076 /* Merge Tag_compatibility attributes and any common GNU ones. */
15077 if (!_bfd_elf_merge_object_attributes (ibfd, info))
15078 return false;
15079
15080 /* Check for any attributes not known on ARM. */
15081 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
15082
15083 return result;
15084 }
15085
15086
15087 /* Return TRUE if the two EABI versions are incompatible. */
15088
15089 static bool
15090 elf32_arm_versions_compatible (unsigned iver, unsigned over)
15091 {
15092 /* v4 and v5 are the same spec before and after it was released,
15093 so allow mixing them. */
15094 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
15095 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
15096 return true;
15097
15098 return (iver == over);
15099 }
15100
15101 /* Merge backend specific data from an object file to the output
15102 object file when linking. */
15103
15104 static bool
15105 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
15106
15107 /* Display the flags field. */
15108
15109 static bool
15110 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
15111 {
15112 FILE * file = (FILE *) ptr;
15113 unsigned long flags;
15114
15115 BFD_ASSERT (abfd != NULL && ptr != NULL);
15116
15117 /* Print normal ELF private data. */
15118 _bfd_elf_print_private_bfd_data (abfd, ptr);
15119
15120 flags = elf_elfheader (abfd)->e_flags;
15121 /* Ignore init flag - it may not be set, despite the flags field
15122 containing valid data. */
15123
15124 fprintf (file, _("private flags = 0x%lx:"), elf_elfheader (abfd)->e_flags);
15125
15126 switch (EF_ARM_EABI_VERSION (flags))
15127 {
15128 case EF_ARM_EABI_UNKNOWN:
15129 /* The following flag bits are GNU extensions and not part of the
15130 official ARM ELF extended ABI. Hence they are only decoded if
15131 the EABI version is not set. */
15132 if (flags & EF_ARM_INTERWORK)
15133 fprintf (file, _(" [interworking enabled]"));
15134
15135 if (flags & EF_ARM_APCS_26)
15136 fprintf (file, " [APCS-26]");
15137 else
15138 fprintf (file, " [APCS-32]");
15139
15140 if (flags & EF_ARM_VFP_FLOAT)
15141 fprintf (file, _(" [VFP float format]"));
15142 else if (flags & EF_ARM_MAVERICK_FLOAT)
15143 fprintf (file, _(" [Maverick float format]"));
15144 else
15145 fprintf (file, _(" [FPA float format]"));
15146
15147 if (flags & EF_ARM_APCS_FLOAT)
15148 fprintf (file, _(" [floats passed in float registers]"));
15149
15150 if (flags & EF_ARM_PIC)
15151 fprintf (file, _(" [position independent]"));
15152
15153 if (flags & EF_ARM_NEW_ABI)
15154 fprintf (file, _(" [new ABI]"));
15155
15156 if (flags & EF_ARM_OLD_ABI)
15157 fprintf (file, _(" [old ABI]"));
15158
15159 if (flags & EF_ARM_SOFT_FLOAT)
15160 fprintf (file, _(" [software FP]"));
15161
15162 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
15163 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
15164 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
15165 | EF_ARM_MAVERICK_FLOAT);
15166 break;
15167
15168 case EF_ARM_EABI_VER1:
15169 fprintf (file, _(" [Version1 EABI]"));
15170
15171 if (flags & EF_ARM_SYMSARESORTED)
15172 fprintf (file, _(" [sorted symbol table]"));
15173 else
15174 fprintf (file, _(" [unsorted symbol table]"));
15175
15176 flags &= ~ EF_ARM_SYMSARESORTED;
15177 break;
15178
15179 case EF_ARM_EABI_VER2:
15180 fprintf (file, _(" [Version2 EABI]"));
15181
15182 if (flags & EF_ARM_SYMSARESORTED)
15183 fprintf (file, _(" [sorted symbol table]"));
15184 else
15185 fprintf (file, _(" [unsorted symbol table]"));
15186
15187 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
15188 fprintf (file, _(" [dynamic symbols use segment index]"));
15189
15190 if (flags & EF_ARM_MAPSYMSFIRST)
15191 fprintf (file, _(" [mapping symbols precede others]"));
15192
15193 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
15194 | EF_ARM_MAPSYMSFIRST);
15195 break;
15196
15197 case EF_ARM_EABI_VER3:
15198 fprintf (file, _(" [Version3 EABI]"));
15199 break;
15200
15201 case EF_ARM_EABI_VER4:
15202 fprintf (file, _(" [Version4 EABI]"));
15203 goto eabi;
15204
15205 case EF_ARM_EABI_VER5:
15206 fprintf (file, _(" [Version5 EABI]"));
15207
15208 if (flags & EF_ARM_ABI_FLOAT_SOFT)
15209 fprintf (file, _(" [soft-float ABI]"));
15210
15211 if (flags & EF_ARM_ABI_FLOAT_HARD)
15212 fprintf (file, _(" [hard-float ABI]"));
15213
15214 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
15215
15216 eabi:
15217 if (flags & EF_ARM_BE8)
15218 fprintf (file, _(" [BE8]"));
15219
15220 if (flags & EF_ARM_LE8)
15221 fprintf (file, _(" [LE8]"));
15222
15223 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
15224 break;
15225
15226 default:
15227 fprintf (file, _(" <EABI version unrecognised>"));
15228 break;
15229 }
15230
15231 flags &= ~ EF_ARM_EABIMASK;
15232
15233 if (flags & EF_ARM_RELEXEC)
15234 fprintf (file, _(" [relocatable executable]"));
15235
15236 if (flags & EF_ARM_PIC)
15237 fprintf (file, _(" [position independent]"));
15238
15239 if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC)
15240 fprintf (file, _(" [FDPIC ABI supplement]"));
15241
15242 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC);
15243
15244 if (flags)
15245 fprintf (file, _(" <Unrecognised flag bits set>"));
15246
15247 fputc ('\n', file);
15248
15249 return true;
15250 }
15251
15252 static int
15253 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
15254 {
15255 switch (ELF_ST_TYPE (elf_sym->st_info))
15256 {
15257 case STT_ARM_TFUNC:
15258 return ELF_ST_TYPE (elf_sym->st_info);
15259
15260 case STT_ARM_16BIT:
15261 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
15262 This allows us to distinguish between data used by Thumb instructions
15263 and non-data (which is probably code) inside Thumb regions of an
15264 executable. */
15265 if (type != STT_OBJECT && type != STT_TLS)
15266 return ELF_ST_TYPE (elf_sym->st_info);
15267 break;
15268
15269 default:
15270 break;
15271 }
15272
15273 return type;
15274 }
15275
15276 static asection *
15277 elf32_arm_gc_mark_hook (asection *sec,
15278 struct bfd_link_info *info,
15279 Elf_Internal_Rela *rel,
15280 struct elf_link_hash_entry *h,
15281 Elf_Internal_Sym *sym)
15282 {
15283 if (h != NULL)
15284 switch (ELF32_R_TYPE (rel->r_info))
15285 {
15286 case R_ARM_GNU_VTINHERIT:
15287 case R_ARM_GNU_VTENTRY:
15288 return NULL;
15289 }
15290
15291 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
15292 }
15293
15294 /* Look through the relocs for a section during the first phase. */
15295
15296 static bool
15297 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
15298 asection *sec, const Elf_Internal_Rela *relocs)
15299 {
15300 Elf_Internal_Shdr *symtab_hdr;
15301 struct elf_link_hash_entry **sym_hashes;
15302 const Elf_Internal_Rela *rel;
15303 const Elf_Internal_Rela *rel_end;
15304 bfd *dynobj;
15305 asection *sreloc;
15306 struct elf32_arm_link_hash_table *htab;
15307 bool call_reloc_p;
15308 bool may_become_dynamic_p;
15309 bool may_need_local_target_p;
15310 unsigned long nsyms;
15311
15312 if (bfd_link_relocatable (info))
15313 return true;
15314
15315 BFD_ASSERT (is_arm_elf (abfd));
15316
15317 htab = elf32_arm_hash_table (info);
15318 if (htab == NULL)
15319 return false;
15320
15321 sreloc = NULL;
15322
15323 /* Create dynamic sections for relocatable executables so that we can
15324 copy relocations. */
15325 if (htab->root.is_relocatable_executable
15326 && ! htab->root.dynamic_sections_created)
15327 {
15328 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
15329 return false;
15330 }
15331
15332 if (htab->root.dynobj == NULL)
15333 htab->root.dynobj = abfd;
15334 if (!create_ifunc_sections (info))
15335 return false;
15336
15337 dynobj = htab->root.dynobj;
15338
15339 symtab_hdr = & elf_symtab_hdr (abfd);
15340 sym_hashes = elf_sym_hashes (abfd);
15341 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
15342
15343 rel_end = relocs + sec->reloc_count;
15344 for (rel = relocs; rel < rel_end; rel++)
15345 {
15346 Elf_Internal_Sym *isym;
15347 struct elf_link_hash_entry *h;
15348 struct elf32_arm_link_hash_entry *eh;
15349 unsigned int r_symndx;
15350 int r_type;
15351
15352 r_symndx = ELF32_R_SYM (rel->r_info);
15353 r_type = ELF32_R_TYPE (rel->r_info);
15354 r_type = arm_real_reloc_type (htab, r_type);
15355
15356 if (r_symndx >= nsyms
15357 /* PR 9934: It is possible to have relocations that do not
15358 refer to symbols, thus it is also possible to have an
15359 object file containing relocations but no symbol table. */
15360 && (r_symndx > STN_UNDEF || nsyms > 0))
15361 {
15362 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
15363 r_symndx);
15364 return false;
15365 }
15366
15367 h = NULL;
15368 isym = NULL;
15369 if (nsyms > 0)
15370 {
15371 if (r_symndx < symtab_hdr->sh_info)
15372 {
15373 /* A local symbol. */
15374 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache,
15375 abfd, r_symndx);
15376 if (isym == NULL)
15377 return false;
15378 }
15379 else
15380 {
15381 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
15382 while (h->root.type == bfd_link_hash_indirect
15383 || h->root.type == bfd_link_hash_warning)
15384 h = (struct elf_link_hash_entry *) h->root.u.i.link;
15385 }
15386 }
15387
15388 eh = (struct elf32_arm_link_hash_entry *) h;
15389
15390 call_reloc_p = false;
15391 may_become_dynamic_p = false;
15392 may_need_local_target_p = false;
15393
15394 /* Could be done earlier, if h were already available. */
15395 r_type = elf32_arm_tls_transition (info, r_type, h);
15396 switch (r_type)
15397 {
15398 case R_ARM_GOTOFFFUNCDESC:
15399 {
15400 if (h == NULL)
15401 {
15402 if (!elf32_arm_allocate_local_sym_info (abfd))
15403 return false;
15404 if (r_symndx >= elf32_arm_num_entries (abfd))
15405 return false;
15406 elf32_arm_local_fdpic_cnts (abfd) [r_symndx].gotofffuncdesc_cnt += 1;
15407 elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_offset = -1;
15408 }
15409 else
15410 {
15411 eh->fdpic_cnts.gotofffuncdesc_cnt++;
15412 }
15413 }
15414 break;
15415
15416 case R_ARM_GOTFUNCDESC:
15417 {
15418 if (h == NULL)
15419 {
15420 /* Such a relocation is not supposed to be generated
15421 by gcc on a static function. */
15422 /* Anyway if needed it could be handled. */
15423 return false;
15424 }
15425 else
15426 {
15427 eh->fdpic_cnts.gotfuncdesc_cnt++;
15428 }
15429 }
15430 break;
15431
15432 case R_ARM_FUNCDESC:
15433 {
15434 if (h == NULL)
15435 {
15436 if (!elf32_arm_allocate_local_sym_info (abfd))
15437 return false;
15438 if (r_symndx >= elf32_arm_num_entries (abfd))
15439 return false;
15440 elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_cnt += 1;
15441 elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_offset = -1;
15442 }
15443 else
15444 {
15445 eh->fdpic_cnts.funcdesc_cnt++;
15446 }
15447 }
15448 break;
15449
15450 case R_ARM_GOT32:
15451 case R_ARM_GOT_PREL:
15452 case R_ARM_TLS_GD32:
15453 case R_ARM_TLS_GD32_FDPIC:
15454 case R_ARM_TLS_IE32:
15455 case R_ARM_TLS_IE32_FDPIC:
15456 case R_ARM_TLS_GOTDESC:
15457 case R_ARM_TLS_DESCSEQ:
15458 case R_ARM_THM_TLS_DESCSEQ:
15459 case R_ARM_TLS_CALL:
15460 case R_ARM_THM_TLS_CALL:
15461 /* This symbol requires a global offset table entry. */
15462 {
15463 int tls_type, old_tls_type;
15464
15465 switch (r_type)
15466 {
15467 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
15468 case R_ARM_TLS_GD32_FDPIC: tls_type = GOT_TLS_GD; break;
15469
15470 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
15471 case R_ARM_TLS_IE32_FDPIC: tls_type = GOT_TLS_IE; break;
15472
15473 case R_ARM_TLS_GOTDESC:
15474 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
15475 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
15476 tls_type = GOT_TLS_GDESC; break;
15477
15478 default: tls_type = GOT_NORMAL; break;
15479 }
15480
15481 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
15482 info->flags |= DF_STATIC_TLS;
15483
15484 if (h != NULL)
15485 {
15486 h->got.refcount++;
15487 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
15488 }
15489 else
15490 {
15491 /* This is a global offset table entry for a local symbol. */
15492 if (!elf32_arm_allocate_local_sym_info (abfd))
15493 return false;
15494 if (r_symndx >= elf32_arm_num_entries (abfd))
15495 {
15496 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
15497 r_symndx);
15498 return false;
15499 }
15500
15501 elf_local_got_refcounts (abfd)[r_symndx] += 1;
15502 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
15503 }
15504
15505 /* If a variable is accessed with both tls methods, two
15506 slots may be created. */
15507 if (GOT_TLS_GD_ANY_P (old_tls_type)
15508 && GOT_TLS_GD_ANY_P (tls_type))
15509 tls_type |= old_tls_type;
15510
15511 /* We will already have issued an error message if there
15512 is a TLS/non-TLS mismatch, based on the symbol
15513 type. So just combine any TLS types needed. */
15514 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
15515 && tls_type != GOT_NORMAL)
15516 tls_type |= old_tls_type;
15517
15518 /* If the symbol is accessed in both IE and GDESC
15519 method, we're able to relax. Turn off the GDESC flag,
15520 without messing up with any other kind of tls types
15521 that may be involved. */
15522 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
15523 tls_type &= ~GOT_TLS_GDESC;
15524
15525 if (old_tls_type != tls_type)
15526 {
15527 if (h != NULL)
15528 elf32_arm_hash_entry (h)->tls_type = tls_type;
15529 else
15530 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
15531 }
15532 }
15533 /* Fall through. */
15534
15535 case R_ARM_TLS_LDM32:
15536 case R_ARM_TLS_LDM32_FDPIC:
15537 if (r_type == R_ARM_TLS_LDM32 || r_type == R_ARM_TLS_LDM32_FDPIC)
15538 htab->tls_ldm_got.refcount++;
15539 /* Fall through. */
15540
15541 case R_ARM_GOTOFF32:
15542 case R_ARM_GOTPC:
15543 if (htab->root.sgot == NULL
15544 && !create_got_section (htab->root.dynobj, info))
15545 return false;
15546 break;
15547
15548 case R_ARM_PC24:
15549 case R_ARM_PLT32:
15550 case R_ARM_CALL:
15551 case R_ARM_JUMP24:
15552 case R_ARM_PREL31:
15553 case R_ARM_THM_CALL:
15554 case R_ARM_THM_JUMP24:
15555 case R_ARM_THM_JUMP19:
15556 call_reloc_p = true;
15557 may_need_local_target_p = true;
15558 break;
15559
15560 case R_ARM_ABS12:
15561 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15562 ldr __GOTT_INDEX__ offsets. */
15563 if (htab->root.target_os != is_vxworks)
15564 {
15565 may_need_local_target_p = true;
15566 break;
15567 }
15568 else goto jump_over;
15569
15570 /* Fall through. */
15571
15572 case R_ARM_MOVW_ABS_NC:
15573 case R_ARM_MOVT_ABS:
15574 case R_ARM_THM_MOVW_ABS_NC:
15575 case R_ARM_THM_MOVT_ABS:
15576 if (bfd_link_pic (info))
15577 {
15578 _bfd_error_handler
15579 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15580 abfd, elf32_arm_howto_table_1[r_type].name,
15581 (h) ? h->root.root.string : "a local symbol");
15582 bfd_set_error (bfd_error_bad_value);
15583 return false;
15584 }
15585
15586 /* Fall through. */
15587 case R_ARM_ABS32:
15588 case R_ARM_ABS32_NOI:
15589 jump_over:
15590 if (h != NULL && bfd_link_executable (info))
15591 {
15592 h->pointer_equality_needed = 1;
15593 }
15594 /* Fall through. */
15595 case R_ARM_REL32:
15596 case R_ARM_REL32_NOI:
15597 case R_ARM_MOVW_PREL_NC:
15598 case R_ARM_MOVT_PREL:
15599 case R_ARM_THM_MOVW_PREL_NC:
15600 case R_ARM_THM_MOVT_PREL:
15601
15602 /* Should the interworking branches be listed here? */
15603 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable
15604 || htab->fdpic_p)
15605 && (sec->flags & SEC_ALLOC) != 0)
15606 {
15607 if (h == NULL
15608 && elf32_arm_howto_from_type (r_type)->pc_relative)
15609 {
15610 /* In shared libraries and relocatable executables,
15611 we treat local relative references as calls;
15612 see the related SYMBOL_CALLS_LOCAL code in
15613 allocate_dynrelocs. */
15614 call_reloc_p = true;
15615 may_need_local_target_p = true;
15616 }
15617 else
15618 /* We are creating a shared library or relocatable
15619 executable, and this is a reloc against a global symbol,
15620 or a non-PC-relative reloc against a local symbol.
15621 We may need to copy the reloc into the output. */
15622 may_become_dynamic_p = true;
15623 }
15624 else
15625 may_need_local_target_p = true;
15626 break;
15627
15628 /* This relocation describes the C++ object vtable hierarchy.
15629 Reconstruct it for later use during GC. */
15630 case R_ARM_GNU_VTINHERIT:
15631 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
15632 return false;
15633 break;
15634
15635 /* This relocation describes which C++ vtable entries are actually
15636 used. Record for later use during GC. */
15637 case R_ARM_GNU_VTENTRY:
15638 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
15639 return false;
15640 break;
15641 }
15642
15643 if (h != NULL)
15644 {
15645 if (call_reloc_p)
15646 /* We may need a .plt entry if the function this reloc
15647 refers to is in a different object, regardless of the
15648 symbol's type. We can't tell for sure yet, because
15649 something later might force the symbol local. */
15650 h->needs_plt = 1;
15651 else if (may_need_local_target_p)
15652 /* If this reloc is in a read-only section, we might
15653 need a copy reloc. We can't check reliably at this
15654 stage whether the section is read-only, as input
15655 sections have not yet been mapped to output sections.
15656 Tentatively set the flag for now, and correct in
15657 adjust_dynamic_symbol. */
15658 h->non_got_ref = 1;
15659 }
15660
15661 if (may_need_local_target_p
15662 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
15663 {
15664 union gotplt_union *root_plt;
15665 struct arm_plt_info *arm_plt;
15666 struct arm_local_iplt_info *local_iplt;
15667
15668 if (h != NULL)
15669 {
15670 root_plt = &h->plt;
15671 arm_plt = &eh->plt;
15672 }
15673 else
15674 {
15675 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
15676 if (local_iplt == NULL)
15677 return false;
15678 root_plt = &local_iplt->root;
15679 arm_plt = &local_iplt->arm;
15680 }
15681
15682 /* If the symbol is a function that doesn't bind locally,
15683 this relocation will need a PLT entry. */
15684 if (root_plt->refcount != -1)
15685 root_plt->refcount += 1;
15686
15687 if (!call_reloc_p)
15688 arm_plt->noncall_refcount++;
15689
15690 /* It's too early to use htab->use_blx here, so we have to
15691 record possible blx references separately from
15692 relocs that definitely need a thumb stub. */
15693
15694 if (r_type == R_ARM_THM_CALL)
15695 arm_plt->maybe_thumb_refcount += 1;
15696
15697 if (r_type == R_ARM_THM_JUMP24
15698 || r_type == R_ARM_THM_JUMP19)
15699 arm_plt->thumb_refcount += 1;
15700 }
15701
15702 if (may_become_dynamic_p)
15703 {
15704 struct elf_dyn_relocs *p, **head;
15705
15706 /* Create a reloc section in dynobj. */
15707 if (sreloc == NULL)
15708 {
15709 sreloc = _bfd_elf_make_dynamic_reloc_section
15710 (sec, dynobj, 2, abfd, ! htab->use_rel);
15711
15712 if (sreloc == NULL)
15713 return false;
15714 }
15715
15716 /* If this is a global symbol, count the number of
15717 relocations we need for this symbol. */
15718 if (h != NULL)
15719 head = &h->dyn_relocs;
15720 else
15721 {
15722 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
15723 if (head == NULL)
15724 return false;
15725 }
15726
15727 p = *head;
15728 if (p == NULL || p->sec != sec)
15729 {
15730 size_t amt = sizeof *p;
15731
15732 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
15733 if (p == NULL)
15734 return false;
15735 p->next = *head;
15736 *head = p;
15737 p->sec = sec;
15738 p->count = 0;
15739 p->pc_count = 0;
15740 }
15741
15742 if (elf32_arm_howto_from_type (r_type)->pc_relative)
15743 p->pc_count += 1;
15744 p->count += 1;
15745 if (h == NULL && htab->fdpic_p && !bfd_link_pic (info)
15746 && r_type != R_ARM_ABS32 && r_type != R_ARM_ABS32_NOI)
15747 {
15748 /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15749 that will become rofixup. */
15750 /* This is due to the fact that we suppose all will become rofixup. */
15751 _bfd_error_handler
15752 (_("FDPIC does not yet support %s relocation"
15753 " to become dynamic for executable"),
15754 elf32_arm_howto_table_1[r_type].name);
15755 abort ();
15756 }
15757 }
15758 }
15759
15760 return true;
15761 }
15762
15763 static void
15764 elf32_arm_update_relocs (asection *o,
15765 struct bfd_elf_section_reloc_data *reldata)
15766 {
15767 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
15768 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
15769 const struct elf_backend_data *bed;
15770 _arm_elf_section_data *eado;
15771 struct bfd_link_order *p;
15772 bfd_byte *erela_head, *erela;
15773 Elf_Internal_Rela *irela_head, *irela;
15774 Elf_Internal_Shdr *rel_hdr;
15775 bfd *abfd;
15776 unsigned int count;
15777
15778 eado = get_arm_elf_section_data (o);
15779
15780 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
15781 return;
15782
15783 abfd = o->owner;
15784 bed = get_elf_backend_data (abfd);
15785 rel_hdr = reldata->hdr;
15786
15787 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
15788 {
15789 swap_in = bed->s->swap_reloc_in;
15790 swap_out = bed->s->swap_reloc_out;
15791 }
15792 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
15793 {
15794 swap_in = bed->s->swap_reloca_in;
15795 swap_out = bed->s->swap_reloca_out;
15796 }
15797 else
15798 abort ();
15799
15800 erela_head = rel_hdr->contents;
15801 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
15802 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
15803
15804 erela = erela_head;
15805 irela = irela_head;
15806 count = 0;
15807
15808 for (p = o->map_head.link_order; p; p = p->next)
15809 {
15810 if (p->type == bfd_section_reloc_link_order
15811 || p->type == bfd_symbol_reloc_link_order)
15812 {
15813 (*swap_in) (abfd, erela, irela);
15814 erela += rel_hdr->sh_entsize;
15815 irela++;
15816 count++;
15817 }
15818 else if (p->type == bfd_indirect_link_order)
15819 {
15820 struct bfd_elf_section_reloc_data *input_reldata;
15821 arm_unwind_table_edit *edit_list, *edit_tail;
15822 _arm_elf_section_data *eadi;
15823 bfd_size_type j;
15824 bfd_vma offset;
15825 asection *i;
15826
15827 i = p->u.indirect.section;
15828
15829 eadi = get_arm_elf_section_data (i);
15830 edit_list = eadi->u.exidx.unwind_edit_list;
15831 edit_tail = eadi->u.exidx.unwind_edit_tail;
15832 offset = i->output_offset;
15833
15834 if (eadi->elf.rel.hdr &&
15835 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
15836 input_reldata = &eadi->elf.rel;
15837 else if (eadi->elf.rela.hdr &&
15838 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
15839 input_reldata = &eadi->elf.rela;
15840 else
15841 abort ();
15842
15843 if (edit_list)
15844 {
15845 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15846 {
15847 arm_unwind_table_edit *edit_node, *edit_next;
15848 bfd_vma bias;
15849 bfd_vma reloc_index;
15850
15851 (*swap_in) (abfd, erela, irela);
15852 reloc_index = (irela->r_offset - offset) / 8;
15853
15854 bias = 0;
15855 edit_node = edit_list;
15856 for (edit_next = edit_list;
15857 edit_next && edit_next->index <= reloc_index;
15858 edit_next = edit_node->next)
15859 {
15860 bias++;
15861 edit_node = edit_next;
15862 }
15863
15864 if (edit_node->type != DELETE_EXIDX_ENTRY
15865 || edit_node->index != reloc_index)
15866 {
15867 irela->r_offset -= bias * 8;
15868 irela++;
15869 count++;
15870 }
15871
15872 erela += rel_hdr->sh_entsize;
15873 }
15874
15875 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
15876 {
15877 /* New relocation entity. */
15878 asection *text_sec = edit_tail->linked_section;
15879 asection *text_out = text_sec->output_section;
15880 bfd_vma exidx_offset = offset + i->size - 8;
15881
15882 irela->r_addend = 0;
15883 irela->r_offset = exidx_offset;
15884 irela->r_info = ELF32_R_INFO
15885 (text_out->target_index, R_ARM_PREL31);
15886 irela++;
15887 count++;
15888 }
15889 }
15890 else
15891 {
15892 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15893 {
15894 (*swap_in) (abfd, erela, irela);
15895 erela += rel_hdr->sh_entsize;
15896 irela++;
15897 }
15898
15899 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15900 }
15901 }
15902 }
15903
15904 reldata->count = count;
15905 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15906
15907 erela = erela_head;
15908 irela = irela_head;
15909 while (count > 0)
15910 {
15911 (*swap_out) (abfd, irela, erela);
15912 erela += rel_hdr->sh_entsize;
15913 irela++;
15914 count--;
15915 }
15916
15917 free (irela_head);
15918
15919 /* Hashes are no longer valid. */
15920 free (reldata->hashes);
15921 reldata->hashes = NULL;
15922 }
15923
15924 /* Unwinding tables are not referenced directly. This pass marks them as
15925 required if the corresponding code section is marked. Similarly, ARMv8-M
15926 secure entry functions can only be referenced by SG veneers which are
15927 created after the GC process. They need to be marked in case they reside in
15928 their own section (as would be the case if code was compiled with
15929 -ffunction-sections). */
15930
15931 static bool
15932 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15933 elf_gc_mark_hook_fn gc_mark_hook)
15934 {
15935 bfd *sub;
15936 Elf_Internal_Shdr **elf_shdrp;
15937 asection *cmse_sec;
15938 obj_attribute *out_attr;
15939 Elf_Internal_Shdr *symtab_hdr;
15940 unsigned i, sym_count, ext_start;
15941 const struct elf_backend_data *bed;
15942 struct elf_link_hash_entry **sym_hashes;
15943 struct elf32_arm_link_hash_entry *cmse_hash;
15944 bool again, is_v8m, first_bfd_browse = true;
15945 bool extra_marks_added = false;
15946 asection *isec;
15947
15948 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15949
15950 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15951 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15952 && out_attr[Tag_CPU_arch_profile].i == 'M';
15953
15954 /* Marking EH data may cause additional code sections to be marked,
15955 requiring multiple passes. */
15956 again = true;
15957 while (again)
15958 {
15959 again = false;
15960 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15961 {
15962 asection *o;
15963
15964 if (! is_arm_elf (sub))
15965 continue;
15966
15967 elf_shdrp = elf_elfsections (sub);
15968 for (o = sub->sections; o != NULL; o = o->next)
15969 {
15970 Elf_Internal_Shdr *hdr;
15971
15972 hdr = &elf_section_data (o)->this_hdr;
15973 if (hdr->sh_type == SHT_ARM_EXIDX
15974 && hdr->sh_link
15975 && hdr->sh_link < elf_numsections (sub)
15976 && !o->gc_mark
15977 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15978 {
15979 again = true;
15980 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15981 return false;
15982 }
15983 }
15984
15985 /* Mark section holding ARMv8-M secure entry functions. We mark all
15986 of them so no need for a second browsing. */
15987 if (is_v8m && first_bfd_browse)
15988 {
15989 bool debug_sec_need_to_be_marked = false;
15990
15991 sym_hashes = elf_sym_hashes (sub);
15992 bed = get_elf_backend_data (sub);
15993 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15994 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15995 ext_start = symtab_hdr->sh_info;
15996
15997 /* Scan symbols. */
15998 for (i = ext_start; i < sym_count; i++)
15999 {
16000 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
16001 if (cmse_hash == NULL)
16002 continue;
16003
16004 /* Assume it is a special symbol. If not, cmse_scan will
16005 warn about it and user can do something about it. */
16006 if (startswith (cmse_hash->root.root.root.string,
16007 CMSE_PREFIX))
16008 {
16009 cmse_sec = cmse_hash->root.root.u.def.section;
16010 if (!cmse_sec->gc_mark
16011 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
16012 return false;
16013 /* The debug sections related to these secure entry
16014 functions are marked on enabling below flag. */
16015 debug_sec_need_to_be_marked = true;
16016 }
16017 }
16018
16019 if (debug_sec_need_to_be_marked)
16020 {
16021 /* Looping over all the sections of the object file containing
16022 Armv8-M secure entry functions and marking all the debug
16023 sections. */
16024 for (isec = sub->sections; isec != NULL; isec = isec->next)
16025 {
16026 /* If not a debug sections, skip it. */
16027 if (!isec->gc_mark && (isec->flags & SEC_DEBUGGING))
16028 {
16029 isec->gc_mark = 1;
16030 extra_marks_added = true;
16031 }
16032 }
16033 debug_sec_need_to_be_marked = false;
16034 }
16035 }
16036 }
16037
16038 first_bfd_browse = false;
16039 }
16040
16041 /* PR 30354: If we have added extra marks then make sure that any
16042 dependencies of the newly marked sections are also marked. */
16043 if (extra_marks_added)
16044 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
16045
16046 return true;
16047 }
16048
16049 /* Treat mapping symbols as special target symbols. */
16050
16051 static bool
16052 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
16053 {
16054 return bfd_is_arm_special_symbol_name (sym->name,
16055 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
16056 }
16057
16058 /* If the ELF symbol SYM might be a function in SEC, return the
16059 function size and set *CODE_OFF to the function's entry point,
16060 otherwise return zero. */
16061
16062 static bfd_size_type
16063 elf32_arm_maybe_function_sym (const asymbol *sym, asection *sec,
16064 bfd_vma *code_off)
16065 {
16066 bfd_size_type size;
16067 elf_symbol_type * elf_sym = (elf_symbol_type *) sym;
16068
16069 if ((sym->flags & (BSF_SECTION_SYM | BSF_FILE | BSF_OBJECT
16070 | BSF_THREAD_LOCAL | BSF_RELC | BSF_SRELC)) != 0
16071 || sym->section != sec)
16072 return 0;
16073
16074 size = (sym->flags & BSF_SYNTHETIC) ? 0 : elf_sym->internal_elf_sym.st_size;
16075
16076 if (!(sym->flags & BSF_SYNTHETIC))
16077 switch (ELF_ST_TYPE (elf_sym->internal_elf_sym.st_info))
16078 {
16079 case STT_NOTYPE:
16080 /* Ignore symbols created by the annobin plugin for gcc and clang.
16081 These symbols are hidden, local, notype and have a size of 0. */
16082 if (size == 0
16083 && sym->flags & BSF_LOCAL
16084 && ELF_ST_VISIBILITY (elf_sym->internal_elf_sym.st_other) == STV_HIDDEN)
16085 return 0;
16086 /* Fall through. */
16087 case STT_FUNC:
16088 case STT_ARM_TFUNC:
16089 /* FIXME: Allow STT_GNU_IFUNC as well ? */
16090 break;
16091 default:
16092 return 0;
16093 }
16094
16095 if ((sym->flags & BSF_LOCAL)
16096 && bfd_is_arm_special_symbol_name (sym->name,
16097 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
16098 return 0;
16099
16100 *code_off = sym->value;
16101
16102 /* Do not return 0 for the function's size. */
16103 return size ? size : 1;
16104
16105 }
16106
16107 static bool
16108 elf32_arm_find_inliner_info (bfd * abfd,
16109 const char ** filename_ptr,
16110 const char ** functionname_ptr,
16111 unsigned int * line_ptr)
16112 {
16113 bool found;
16114 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
16115 functionname_ptr, line_ptr,
16116 & elf_tdata (abfd)->dwarf2_find_line_info);
16117 return found;
16118 }
16119
16120 /* Adjust a symbol defined by a dynamic object and referenced by a
16121 regular object. The current definition is in some section of the
16122 dynamic object, but we're not including those sections. We have to
16123 change the definition to something the rest of the link can
16124 understand. */
16125
16126 static bool
16127 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
16128 struct elf_link_hash_entry * h)
16129 {
16130 bfd * dynobj;
16131 asection *s, *srel;
16132 struct elf32_arm_link_hash_entry * eh;
16133 struct elf32_arm_link_hash_table *globals;
16134
16135 globals = elf32_arm_hash_table (info);
16136 if (globals == NULL)
16137 return false;
16138
16139 dynobj = elf_hash_table (info)->dynobj;
16140
16141 /* Make sure we know what is going on here. */
16142 BFD_ASSERT (dynobj != NULL
16143 && (h->needs_plt
16144 || h->type == STT_GNU_IFUNC
16145 || h->is_weakalias
16146 || (h->def_dynamic
16147 && h->ref_regular
16148 && !h->def_regular)));
16149
16150 eh = (struct elf32_arm_link_hash_entry *) h;
16151
16152 /* If this is a function, put it in the procedure linkage table. We
16153 will fill in the contents of the procedure linkage table later,
16154 when we know the address of the .got section. */
16155 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
16156 {
16157 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
16158 symbol binds locally. */
16159 if (h->plt.refcount <= 0
16160 || (h->type != STT_GNU_IFUNC
16161 && (SYMBOL_CALLS_LOCAL (info, h)
16162 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16163 && h->root.type == bfd_link_hash_undefweak))))
16164 {
16165 /* This case can occur if we saw a PLT32 reloc in an input
16166 file, but the symbol was never referred to by a dynamic
16167 object, or if all references were garbage collected. In
16168 such a case, we don't actually need to build a procedure
16169 linkage table, and we can just do a PC24 reloc instead. */
16170 h->plt.offset = (bfd_vma) -1;
16171 eh->plt.thumb_refcount = 0;
16172 eh->plt.maybe_thumb_refcount = 0;
16173 eh->plt.noncall_refcount = 0;
16174 h->needs_plt = 0;
16175 }
16176
16177 return true;
16178 }
16179 else
16180 {
16181 /* It's possible that we incorrectly decided a .plt reloc was
16182 needed for an R_ARM_PC24 or similar reloc to a non-function sym
16183 in check_relocs. We can't decide accurately between function
16184 and non-function syms in check-relocs; Objects loaded later in
16185 the link may change h->type. So fix it now. */
16186 h->plt.offset = (bfd_vma) -1;
16187 eh->plt.thumb_refcount = 0;
16188 eh->plt.maybe_thumb_refcount = 0;
16189 eh->plt.noncall_refcount = 0;
16190 }
16191
16192 /* If this is a weak symbol, and there is a real definition, the
16193 processor independent code will have arranged for us to see the
16194 real definition first, and we can just use the same value. */
16195 if (h->is_weakalias)
16196 {
16197 struct elf_link_hash_entry *def = weakdef (h);
16198 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
16199 h->root.u.def.section = def->root.u.def.section;
16200 h->root.u.def.value = def->root.u.def.value;
16201 return true;
16202 }
16203
16204 /* If there are no non-GOT references, we do not need a copy
16205 relocation. */
16206 if (!h->non_got_ref)
16207 return true;
16208
16209 /* This is a reference to a symbol defined by a dynamic object which
16210 is not a function. */
16211
16212 /* If we are creating a shared library, we must presume that the
16213 only references to the symbol are via the global offset table.
16214 For such cases we need not do anything here; the relocations will
16215 be handled correctly by relocate_section. Relocatable executables
16216 can reference data in shared objects directly, so we don't need to
16217 do anything here. */
16218 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
16219 return true;
16220
16221 /* We must allocate the symbol in our .dynbss section, which will
16222 become part of the .bss section of the executable. There will be
16223 an entry for this symbol in the .dynsym section. The dynamic
16224 object will contain position independent code, so all references
16225 from the dynamic object to this symbol will go through the global
16226 offset table. The dynamic linker will use the .dynsym entry to
16227 determine the address it must put in the global offset table, so
16228 both the dynamic object and the regular object will refer to the
16229 same memory location for the variable. */
16230 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
16231 linker to copy the initial value out of the dynamic object and into
16232 the runtime process image. We need to remember the offset into the
16233 .rel(a).bss section we are going to use. */
16234 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
16235 {
16236 s = globals->root.sdynrelro;
16237 srel = globals->root.sreldynrelro;
16238 }
16239 else
16240 {
16241 s = globals->root.sdynbss;
16242 srel = globals->root.srelbss;
16243 }
16244 if (info->nocopyreloc == 0
16245 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
16246 && h->size != 0)
16247 {
16248 elf32_arm_allocate_dynrelocs (info, srel, 1);
16249 h->needs_copy = 1;
16250 }
16251
16252 return _bfd_elf_adjust_dynamic_copy (info, h, s);
16253 }
16254
16255 /* Allocate space in .plt, .got and associated reloc sections for
16256 dynamic relocs. */
16257
16258 static bool
16259 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
16260 {
16261 struct bfd_link_info *info;
16262 struct elf32_arm_link_hash_table *htab;
16263 struct elf32_arm_link_hash_entry *eh;
16264 struct elf_dyn_relocs *p;
16265
16266 if (h->root.type == bfd_link_hash_indirect)
16267 return true;
16268
16269 eh = (struct elf32_arm_link_hash_entry *) h;
16270
16271 info = (struct bfd_link_info *) inf;
16272 htab = elf32_arm_hash_table (info);
16273 if (htab == NULL)
16274 return false;
16275
16276 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
16277 && h->plt.refcount > 0)
16278 {
16279 /* Make sure this symbol is output as a dynamic symbol.
16280 Undefined weak syms won't yet be marked as dynamic. */
16281 if (h->dynindx == -1 && !h->forced_local
16282 && h->root.type == bfd_link_hash_undefweak)
16283 {
16284 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16285 return false;
16286 }
16287
16288 /* If the call in the PLT entry binds locally, the associated
16289 GOT entry should use an R_ARM_IRELATIVE relocation instead of
16290 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
16291 than the .plt section. */
16292 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
16293 {
16294 eh->is_iplt = 1;
16295 if (eh->plt.noncall_refcount == 0
16296 && SYMBOL_REFERENCES_LOCAL (info, h))
16297 /* All non-call references can be resolved directly.
16298 This means that they can (and in some cases, must)
16299 resolve directly to the run-time target, rather than
16300 to the PLT. That in turns means that any .got entry
16301 would be equal to the .igot.plt entry, so there's
16302 no point having both. */
16303 h->got.refcount = 0;
16304 }
16305
16306 if (bfd_link_pic (info)
16307 || eh->is_iplt
16308 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
16309 {
16310 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
16311
16312 /* If this symbol is not defined in a regular file, and we are
16313 not generating a shared library, then set the symbol to this
16314 location in the .plt. This is required to make function
16315 pointers compare as equal between the normal executable and
16316 the shared library. */
16317 if (! bfd_link_pic (info)
16318 && !h->def_regular)
16319 {
16320 h->root.u.def.section = htab->root.splt;
16321 h->root.u.def.value = h->plt.offset;
16322
16323 /* Make sure the function is not marked as Thumb, in case
16324 it is the target of an ABS32 relocation, which will
16325 point to the PLT entry. */
16326 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16327 }
16328
16329 /* VxWorks executables have a second set of relocations for
16330 each PLT entry. They go in a separate relocation section,
16331 which is processed by the kernel loader. */
16332 if (htab->root.target_os == is_vxworks && !bfd_link_pic (info))
16333 {
16334 /* There is a relocation for the initial PLT entry:
16335 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
16336 if (h->plt.offset == htab->plt_header_size)
16337 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
16338
16339 /* There are two extra relocations for each subsequent
16340 PLT entry: an R_ARM_32 relocation for the GOT entry,
16341 and an R_ARM_32 relocation for the PLT entry. */
16342 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
16343 }
16344 }
16345 else
16346 {
16347 h->plt.offset = (bfd_vma) -1;
16348 h->needs_plt = 0;
16349 }
16350 }
16351 else
16352 {
16353 h->plt.offset = (bfd_vma) -1;
16354 h->needs_plt = 0;
16355 }
16356
16357 eh = (struct elf32_arm_link_hash_entry *) h;
16358 eh->tlsdesc_got = (bfd_vma) -1;
16359
16360 if (h->got.refcount > 0)
16361 {
16362 asection *s;
16363 bool dyn;
16364 int tls_type = elf32_arm_hash_entry (h)->tls_type;
16365 int indx;
16366
16367 /* Make sure this symbol is output as a dynamic symbol.
16368 Undefined weak syms won't yet be marked as dynamic. */
16369 if (htab->root.dynamic_sections_created
16370 && h->dynindx == -1
16371 && !h->forced_local
16372 && h->root.type == bfd_link_hash_undefweak)
16373 {
16374 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16375 return false;
16376 }
16377
16378 s = htab->root.sgot;
16379 h->got.offset = s->size;
16380
16381 if (tls_type == GOT_UNKNOWN)
16382 abort ();
16383
16384 if (tls_type == GOT_NORMAL)
16385 /* Non-TLS symbols need one GOT slot. */
16386 s->size += 4;
16387 else
16388 {
16389 if (tls_type & GOT_TLS_GDESC)
16390 {
16391 /* R_ARM_TLS_DESC needs 2 GOT slots. */
16392 eh->tlsdesc_got
16393 = (htab->root.sgotplt->size
16394 - elf32_arm_compute_jump_table_size (htab));
16395 htab->root.sgotplt->size += 8;
16396 h->got.offset = (bfd_vma) -2;
16397 /* plt.got_offset needs to know there's a TLS_DESC
16398 reloc in the middle of .got.plt. */
16399 htab->num_tls_desc++;
16400 }
16401
16402 if (tls_type & GOT_TLS_GD)
16403 {
16404 /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
16405 consecutive GOT slots. If the symbol is both GD
16406 and GDESC, got.offset may have been
16407 overwritten. */
16408 h->got.offset = s->size;
16409 s->size += 8;
16410 }
16411
16412 if (tls_type & GOT_TLS_IE)
16413 /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
16414 slot. */
16415 s->size += 4;
16416 }
16417
16418 dyn = htab->root.dynamic_sections_created;
16419
16420 indx = 0;
16421 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
16422 && (!bfd_link_pic (info)
16423 || !SYMBOL_REFERENCES_LOCAL (info, h)))
16424 indx = h->dynindx;
16425
16426 if (tls_type != GOT_NORMAL
16427 && (bfd_link_dll (info) || indx != 0)
16428 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16429 || h->root.type != bfd_link_hash_undefweak))
16430 {
16431 if (tls_type & GOT_TLS_IE)
16432 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16433
16434 if (tls_type & GOT_TLS_GD)
16435 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16436
16437 if (tls_type & GOT_TLS_GDESC)
16438 {
16439 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
16440 /* GDESC needs a trampoline to jump to. */
16441 htab->tls_trampoline = -1;
16442 }
16443
16444 /* Only GD needs it. GDESC just emits one relocation per
16445 2 entries. */
16446 if ((tls_type & GOT_TLS_GD) && indx != 0)
16447 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16448 }
16449 else if (((indx != -1) || htab->fdpic_p)
16450 && !SYMBOL_REFERENCES_LOCAL (info, h))
16451 {
16452 if (htab->root.dynamic_sections_created)
16453 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
16454 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16455 }
16456 else if (h->type == STT_GNU_IFUNC
16457 && eh->plt.noncall_refcount == 0)
16458 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16459 they all resolve dynamically instead. Reserve room for the
16460 GOT entry's R_ARM_IRELATIVE relocation. */
16461 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
16462 else if (bfd_link_pic (info)
16463 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16464 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
16465 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16466 else if (htab->fdpic_p && tls_type == GOT_NORMAL)
16467 /* Reserve room for rofixup for FDPIC executable. */
16468 /* TLS relocs do not need space since they are completely
16469 resolved. */
16470 htab->srofixup->size += 4;
16471 }
16472 else
16473 h->got.offset = (bfd_vma) -1;
16474
16475 /* FDPIC support. */
16476 if (eh->fdpic_cnts.gotofffuncdesc_cnt > 0)
16477 {
16478 /* Symbol musn't be exported. */
16479 if (h->dynindx != -1)
16480 abort ();
16481
16482 /* We only allocate one function descriptor with its associated
16483 relocation. */
16484 if (eh->fdpic_cnts.funcdesc_offset == -1)
16485 {
16486 asection *s = htab->root.sgot;
16487
16488 eh->fdpic_cnts.funcdesc_offset = s->size;
16489 s->size += 8;
16490 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16491 if (bfd_link_pic (info))
16492 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16493 else
16494 htab->srofixup->size += 8;
16495 }
16496 }
16497
16498 if (eh->fdpic_cnts.gotfuncdesc_cnt > 0)
16499 {
16500 asection *s = htab->root.sgot;
16501
16502 if (htab->root.dynamic_sections_created && h->dynindx == -1
16503 && !h->forced_local)
16504 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16505 return false;
16506
16507 if (h->dynindx == -1)
16508 {
16509 /* We only allocate one function descriptor with its
16510 associated relocation. */
16511 if (eh->fdpic_cnts.funcdesc_offset == -1)
16512 {
16513
16514 eh->fdpic_cnts.funcdesc_offset = s->size;
16515 s->size += 8;
16516 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two
16517 rofixups. */
16518 if (bfd_link_pic (info))
16519 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16520 else
16521 htab->srofixup->size += 8;
16522 }
16523 }
16524
16525 /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16526 R_ARM_RELATIVE/rofixup relocation on it. */
16527 eh->fdpic_cnts.gotfuncdesc_offset = s->size;
16528 s->size += 4;
16529 if (h->dynindx == -1 && !bfd_link_pic (info))
16530 htab->srofixup->size += 4;
16531 else
16532 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16533 }
16534
16535 if (eh->fdpic_cnts.funcdesc_cnt > 0)
16536 {
16537 if (htab->root.dynamic_sections_created && h->dynindx == -1
16538 && !h->forced_local)
16539 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16540 return false;
16541
16542 if (h->dynindx == -1)
16543 {
16544 /* We only allocate one function descriptor with its
16545 associated relocation. */
16546 if (eh->fdpic_cnts.funcdesc_offset == -1)
16547 {
16548 asection *s = htab->root.sgot;
16549
16550 eh->fdpic_cnts.funcdesc_offset = s->size;
16551 s->size += 8;
16552 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two
16553 rofixups. */
16554 if (bfd_link_pic (info))
16555 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16556 else
16557 htab->srofixup->size += 8;
16558 }
16559 }
16560 if (h->dynindx == -1 && !bfd_link_pic (info))
16561 {
16562 /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */
16563 htab->srofixup->size += 4 * eh->fdpic_cnts.funcdesc_cnt;
16564 }
16565 else
16566 {
16567 /* Will need one dynamic reloc per reference. will be either
16568 R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */
16569 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot,
16570 eh->fdpic_cnts.funcdesc_cnt);
16571 }
16572 }
16573
16574 /* Allocate stubs for exported Thumb functions on v4t. */
16575 if (!htab->use_blx && h->dynindx != -1
16576 && h->def_regular
16577 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
16578 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
16579 {
16580 struct elf_link_hash_entry * th;
16581 struct bfd_link_hash_entry * bh;
16582 struct elf_link_hash_entry * myh;
16583 char name[1024];
16584 asection *s;
16585 bh = NULL;
16586 /* Create a new symbol to regist the real location of the function. */
16587 s = h->root.u.def.section;
16588 sprintf (name, "__real_%s", h->root.root.string);
16589 _bfd_generic_link_add_one_symbol (info, s->owner,
16590 name, BSF_GLOBAL, s,
16591 h->root.u.def.value,
16592 NULL, true, false, &bh);
16593
16594 myh = (struct elf_link_hash_entry *) bh;
16595 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
16596 myh->forced_local = 1;
16597 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
16598 eh->export_glue = myh;
16599 th = record_arm_to_thumb_glue (info, h);
16600 /* Point the symbol at the stub. */
16601 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
16602 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16603 h->root.u.def.section = th->root.u.def.section;
16604 h->root.u.def.value = th->root.u.def.value & ~1;
16605 }
16606
16607 if (h->dyn_relocs == NULL)
16608 return true;
16609
16610 /* In the shared -Bsymbolic case, discard space allocated for
16611 dynamic pc-relative relocs against symbols which turn out to be
16612 defined in regular objects. For the normal shared case, discard
16613 space for pc-relative relocs that have become local due to symbol
16614 visibility changes. */
16615
16616 if (bfd_link_pic (info)
16617 || htab->root.is_relocatable_executable
16618 || htab->fdpic_p)
16619 {
16620 /* Relocs that use pc_count are PC-relative forms, which will appear
16621 on something like ".long foo - ." or "movw REG, foo - .". We want
16622 calls to protected symbols to resolve directly to the function
16623 rather than going via the plt. If people want function pointer
16624 comparisons to work as expected then they should avoid writing
16625 assembly like ".long foo - .". */
16626 if (SYMBOL_CALLS_LOCAL (info, h))
16627 {
16628 struct elf_dyn_relocs **pp;
16629
16630 for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
16631 {
16632 p->count -= p->pc_count;
16633 p->pc_count = 0;
16634 if (p->count == 0)
16635 *pp = p->next;
16636 else
16637 pp = &p->next;
16638 }
16639 }
16640
16641 if (htab->root.target_os == is_vxworks)
16642 {
16643 struct elf_dyn_relocs **pp;
16644
16645 for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
16646 {
16647 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
16648 *pp = p->next;
16649 else
16650 pp = &p->next;
16651 }
16652 }
16653
16654 /* Also discard relocs on undefined weak syms with non-default
16655 visibility. */
16656 if (h->dyn_relocs != NULL
16657 && h->root.type == bfd_link_hash_undefweak)
16658 {
16659 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16660 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16661 h->dyn_relocs = NULL;
16662
16663 /* Make sure undefined weak symbols are output as a dynamic
16664 symbol in PIEs. */
16665 else if (htab->root.dynamic_sections_created && h->dynindx == -1
16666 && !h->forced_local)
16667 {
16668 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16669 return false;
16670 }
16671 }
16672
16673 else if (htab->root.is_relocatable_executable && h->dynindx == -1
16674 && h->root.type == bfd_link_hash_new)
16675 {
16676 /* Output absolute symbols so that we can create relocations
16677 against them. For normal symbols we output a relocation
16678 against the section that contains them. */
16679 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16680 return false;
16681 }
16682
16683 }
16684 else
16685 {
16686 /* For the non-shared case, discard space for relocs against
16687 symbols which turn out to need copy relocs or are not
16688 dynamic. */
16689
16690 if (!h->non_got_ref
16691 && ((h->def_dynamic
16692 && !h->def_regular)
16693 || (htab->root.dynamic_sections_created
16694 && (h->root.type == bfd_link_hash_undefweak
16695 || h->root.type == bfd_link_hash_undefined))))
16696 {
16697 /* Make sure this symbol is output as a dynamic symbol.
16698 Undefined weak syms won't yet be marked as dynamic. */
16699 if (h->dynindx == -1 && !h->forced_local
16700 && h->root.type == bfd_link_hash_undefweak)
16701 {
16702 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16703 return false;
16704 }
16705
16706 /* If that succeeded, we know we'll be keeping all the
16707 relocs. */
16708 if (h->dynindx != -1)
16709 goto keep;
16710 }
16711
16712 h->dyn_relocs = NULL;
16713
16714 keep: ;
16715 }
16716
16717 /* Finally, allocate space. */
16718 for (p = h->dyn_relocs; p != NULL; p = p->next)
16719 {
16720 asection *sreloc = elf_section_data (p->sec)->sreloc;
16721
16722 if (h->type == STT_GNU_IFUNC
16723 && eh->plt.noncall_refcount == 0
16724 && SYMBOL_REFERENCES_LOCAL (info, h))
16725 elf32_arm_allocate_irelocs (info, sreloc, p->count);
16726 else if (h->dynindx != -1
16727 && (!bfd_link_pic (info) || !info->symbolic || !h->def_regular))
16728 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16729 else if (htab->fdpic_p && !bfd_link_pic (info))
16730 htab->srofixup->size += 4 * p->count;
16731 else
16732 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16733 }
16734
16735 return true;
16736 }
16737
16738 void
16739 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
16740 int byteswap_code)
16741 {
16742 struct elf32_arm_link_hash_table *globals;
16743
16744 globals = elf32_arm_hash_table (info);
16745 if (globals == NULL)
16746 return;
16747
16748 globals->byteswap_code = byteswap_code;
16749 }
16750
16751 /* Set the sizes of the dynamic sections. */
16752
16753 static bool
16754 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
16755 struct bfd_link_info * info)
16756 {
16757 bfd * dynobj;
16758 asection * s;
16759 bool relocs;
16760 bfd *ibfd;
16761 struct elf32_arm_link_hash_table *htab;
16762
16763 htab = elf32_arm_hash_table (info);
16764 if (htab == NULL)
16765 return false;
16766
16767 dynobj = elf_hash_table (info)->dynobj;
16768 BFD_ASSERT (dynobj != NULL);
16769 check_use_blx (htab);
16770
16771 if (elf_hash_table (info)->dynamic_sections_created)
16772 {
16773 /* Set the contents of the .interp section to the interpreter. */
16774 if (bfd_link_executable (info) && !info->nointerp)
16775 {
16776 s = bfd_get_linker_section (dynobj, ".interp");
16777 BFD_ASSERT (s != NULL);
16778 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
16779 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
16780 }
16781 }
16782
16783 /* Set up .got offsets for local syms, and space for local dynamic
16784 relocs. */
16785 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16786 {
16787 bfd_signed_vma *local_got;
16788 bfd_signed_vma *end_local_got;
16789 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
16790 char *local_tls_type;
16791 bfd_vma *local_tlsdesc_gotent;
16792 bfd_size_type locsymcount;
16793 Elf_Internal_Shdr *symtab_hdr;
16794 asection *srel;
16795 unsigned int symndx;
16796 struct fdpic_local *local_fdpic_cnts;
16797
16798 if (! is_arm_elf (ibfd))
16799 continue;
16800
16801 for (s = ibfd->sections; s != NULL; s = s->next)
16802 {
16803 struct elf_dyn_relocs *p;
16804
16805 for (p = (struct elf_dyn_relocs *)
16806 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
16807 {
16808 if (!bfd_is_abs_section (p->sec)
16809 && bfd_is_abs_section (p->sec->output_section))
16810 {
16811 /* Input section has been discarded, either because
16812 it is a copy of a linkonce section or due to
16813 linker script /DISCARD/, so we'll be discarding
16814 the relocs too. */
16815 }
16816 else if (htab->root.target_os == is_vxworks
16817 && strcmp (p->sec->output_section->name,
16818 ".tls_vars") == 0)
16819 {
16820 /* Relocations in vxworks .tls_vars sections are
16821 handled specially by the loader. */
16822 }
16823 else if (p->count != 0)
16824 {
16825 srel = elf_section_data (p->sec)->sreloc;
16826 if (htab->fdpic_p && !bfd_link_pic (info))
16827 htab->srofixup->size += 4 * p->count;
16828 else
16829 elf32_arm_allocate_dynrelocs (info, srel, p->count);
16830 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
16831 info->flags |= DF_TEXTREL;
16832 }
16833 }
16834 }
16835
16836 local_got = elf_local_got_refcounts (ibfd);
16837 if (local_got == NULL)
16838 continue;
16839
16840 symtab_hdr = & elf_symtab_hdr (ibfd);
16841 locsymcount = symtab_hdr->sh_info;
16842 end_local_got = local_got + locsymcount;
16843 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
16844 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
16845 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
16846 local_fdpic_cnts = elf32_arm_local_fdpic_cnts (ibfd);
16847 symndx = 0;
16848 s = htab->root.sgot;
16849 srel = htab->root.srelgot;
16850 for (; local_got < end_local_got;
16851 ++local_got, ++local_iplt_ptr, ++local_tls_type,
16852 ++local_tlsdesc_gotent, ++symndx, ++local_fdpic_cnts)
16853 {
16854 if (symndx >= elf32_arm_num_entries (ibfd))
16855 return false;
16856
16857 *local_tlsdesc_gotent = (bfd_vma) -1;
16858 local_iplt = *local_iplt_ptr;
16859
16860 /* FDPIC support. */
16861 if (local_fdpic_cnts->gotofffuncdesc_cnt > 0)
16862 {
16863 if (local_fdpic_cnts->funcdesc_offset == -1)
16864 {
16865 local_fdpic_cnts->funcdesc_offset = s->size;
16866 s->size += 8;
16867
16868 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16869 if (bfd_link_pic (info))
16870 elf32_arm_allocate_dynrelocs (info, srel, 1);
16871 else
16872 htab->srofixup->size += 8;
16873 }
16874 }
16875
16876 if (local_fdpic_cnts->funcdesc_cnt > 0)
16877 {
16878 if (local_fdpic_cnts->funcdesc_offset == -1)
16879 {
16880 local_fdpic_cnts->funcdesc_offset = s->size;
16881 s->size += 8;
16882
16883 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16884 if (bfd_link_pic (info))
16885 elf32_arm_allocate_dynrelocs (info, srel, 1);
16886 else
16887 htab->srofixup->size += 8;
16888 }
16889
16890 /* We will add n R_ARM_RELATIVE relocations or n rofixups. */
16891 if (bfd_link_pic (info))
16892 elf32_arm_allocate_dynrelocs (info, srel, local_fdpic_cnts->funcdesc_cnt);
16893 else
16894 htab->srofixup->size += 4 * local_fdpic_cnts->funcdesc_cnt;
16895 }
16896
16897 if (local_iplt != NULL)
16898 {
16899 struct elf_dyn_relocs *p;
16900
16901 if (local_iplt->root.refcount > 0)
16902 {
16903 elf32_arm_allocate_plt_entry (info, true,
16904 &local_iplt->root,
16905 &local_iplt->arm);
16906 if (local_iplt->arm.noncall_refcount == 0)
16907 /* All references to the PLT are calls, so all
16908 non-call references can resolve directly to the
16909 run-time target. This means that the .got entry
16910 would be the same as the .igot.plt entry, so there's
16911 no point creating both. */
16912 *local_got = 0;
16913 }
16914 else
16915 {
16916 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
16917 local_iplt->root.offset = (bfd_vma) -1;
16918 }
16919
16920 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
16921 {
16922 asection *psrel;
16923
16924 psrel = elf_section_data (p->sec)->sreloc;
16925 if (local_iplt->arm.noncall_refcount == 0)
16926 elf32_arm_allocate_irelocs (info, psrel, p->count);
16927 else
16928 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
16929 }
16930 }
16931 if (*local_got > 0)
16932 {
16933 Elf_Internal_Sym *isym;
16934
16935 *local_got = s->size;
16936 if (*local_tls_type & GOT_TLS_GD)
16937 /* TLS_GD relocs need an 8-byte structure in the GOT. */
16938 s->size += 8;
16939 if (*local_tls_type & GOT_TLS_GDESC)
16940 {
16941 *local_tlsdesc_gotent = htab->root.sgotplt->size
16942 - elf32_arm_compute_jump_table_size (htab);
16943 htab->root.sgotplt->size += 8;
16944 *local_got = (bfd_vma) -2;
16945 /* plt.got_offset needs to know there's a TLS_DESC
16946 reloc in the middle of .got.plt. */
16947 htab->num_tls_desc++;
16948 }
16949 if (*local_tls_type & GOT_TLS_IE)
16950 s->size += 4;
16951
16952 if (*local_tls_type & GOT_NORMAL)
16953 {
16954 /* If the symbol is both GD and GDESC, *local_got
16955 may have been overwritten. */
16956 *local_got = s->size;
16957 s->size += 4;
16958 }
16959
16960 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, ibfd,
16961 symndx);
16962 if (isym == NULL)
16963 return false;
16964
16965 /* If all references to an STT_GNU_IFUNC PLT are calls,
16966 then all non-call references, including this GOT entry,
16967 resolve directly to the run-time target. */
16968 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
16969 && (local_iplt == NULL
16970 || local_iplt->arm.noncall_refcount == 0))
16971 elf32_arm_allocate_irelocs (info, srel, 1);
16972 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC || htab->fdpic_p)
16973 {
16974 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC)))
16975 elf32_arm_allocate_dynrelocs (info, srel, 1);
16976 else if (htab->fdpic_p && *local_tls_type & GOT_NORMAL)
16977 htab->srofixup->size += 4;
16978
16979 if ((bfd_link_pic (info) || htab->fdpic_p)
16980 && *local_tls_type & GOT_TLS_GDESC)
16981 {
16982 elf32_arm_allocate_dynrelocs (info,
16983 htab->root.srelplt, 1);
16984 htab->tls_trampoline = -1;
16985 }
16986 }
16987 }
16988 else
16989 *local_got = (bfd_vma) -1;
16990 }
16991 }
16992
16993 if (htab->tls_ldm_got.refcount > 0)
16994 {
16995 /* Allocate two GOT entries and one dynamic relocation (if necessary)
16996 for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
16997 htab->tls_ldm_got.offset = htab->root.sgot->size;
16998 htab->root.sgot->size += 8;
16999 if (bfd_link_pic (info))
17000 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
17001 }
17002 else
17003 htab->tls_ldm_got.offset = -1;
17004
17005 /* At the very end of the .rofixup section is a pointer to the GOT,
17006 reserve space for it. */
17007 if (htab->fdpic_p && htab->srofixup != NULL)
17008 htab->srofixup->size += 4;
17009
17010 /* Allocate global sym .plt and .got entries, and space for global
17011 sym dynamic relocs. */
17012 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
17013
17014 /* Here we rummage through the found bfds to collect glue information. */
17015 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
17016 {
17017 if (! is_arm_elf (ibfd))
17018 continue;
17019
17020 /* Initialise mapping tables for code/data. */
17021 bfd_elf32_arm_init_maps (ibfd);
17022
17023 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
17024 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
17025 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
17026 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd);
17027 }
17028
17029 /* Allocate space for the glue sections now that we've sized them. */
17030 bfd_elf32_arm_allocate_interworking_sections (info);
17031
17032 /* For every jump slot reserved in the sgotplt, reloc_count is
17033 incremented. However, when we reserve space for TLS descriptors,
17034 it's not incremented, so in order to compute the space reserved
17035 for them, it suffices to multiply the reloc count by the jump
17036 slot size. */
17037 if (htab->root.srelplt)
17038 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size (htab);
17039
17040 if (htab->tls_trampoline)
17041 {
17042 if (htab->root.splt->size == 0)
17043 htab->root.splt->size += htab->plt_header_size;
17044
17045 htab->tls_trampoline = htab->root.splt->size;
17046 htab->root.splt->size += htab->plt_entry_size;
17047
17048 /* If we're not using lazy TLS relocations, don't generate the
17049 PLT and GOT entries they require. */
17050 if ((info->flags & DF_BIND_NOW))
17051 htab->root.tlsdesc_plt = 0;
17052 else
17053 {
17054 htab->root.tlsdesc_got = htab->root.sgot->size;
17055 htab->root.sgot->size += 4;
17056
17057 htab->root.tlsdesc_plt = htab->root.splt->size;
17058 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
17059 }
17060 }
17061
17062 /* The check_relocs and adjust_dynamic_symbol entry points have
17063 determined the sizes of the various dynamic sections. Allocate
17064 memory for them. */
17065 relocs = false;
17066 for (s = dynobj->sections; s != NULL; s = s->next)
17067 {
17068 const char * name;
17069
17070 if ((s->flags & SEC_LINKER_CREATED) == 0)
17071 continue;
17072
17073 /* It's OK to base decisions on the section name, because none
17074 of the dynobj section names depend upon the input files. */
17075 name = bfd_section_name (s);
17076
17077 if (s == htab->root.splt)
17078 {
17079 /* Remember whether there is a PLT. */
17080 ;
17081 }
17082 else if (startswith (name, ".rel"))
17083 {
17084 if (s->size != 0)
17085 {
17086 /* Remember whether there are any reloc sections other
17087 than .rel(a).plt and .rela.plt.unloaded. */
17088 if (s != htab->root.srelplt && s != htab->srelplt2)
17089 relocs = true;
17090
17091 /* We use the reloc_count field as a counter if we need
17092 to copy relocs into the output file. */
17093 s->reloc_count = 0;
17094 }
17095 }
17096 else if (s != htab->root.sgot
17097 && s != htab->root.sgotplt
17098 && s != htab->root.iplt
17099 && s != htab->root.igotplt
17100 && s != htab->root.sdynbss
17101 && s != htab->root.sdynrelro
17102 && s != htab->srofixup)
17103 {
17104 /* It's not one of our sections, so don't allocate space. */
17105 continue;
17106 }
17107
17108 if (s->size == 0)
17109 {
17110 /* If we don't need this section, strip it from the
17111 output file. This is mostly to handle .rel(a).bss and
17112 .rel(a).plt. We must create both sections in
17113 create_dynamic_sections, because they must be created
17114 before the linker maps input sections to output
17115 sections. The linker does that before
17116 adjust_dynamic_symbol is called, and it is that
17117 function which decides whether anything needs to go
17118 into these sections. */
17119 s->flags |= SEC_EXCLUDE;
17120 continue;
17121 }
17122
17123 if ((s->flags & SEC_HAS_CONTENTS) == 0)
17124 continue;
17125
17126 /* Allocate memory for the section contents. */
17127 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
17128 if (s->contents == NULL)
17129 return false;
17130 }
17131
17132 return _bfd_elf_maybe_vxworks_add_dynamic_tags (output_bfd, info,
17133 relocs);
17134 }
17135
17136 /* Size sections even though they're not dynamic. We use it to setup
17137 _TLS_MODULE_BASE_, if needed. */
17138
17139 static bool
17140 elf32_arm_always_size_sections (bfd *output_bfd,
17141 struct bfd_link_info *info)
17142 {
17143 asection *tls_sec;
17144 struct elf32_arm_link_hash_table *htab;
17145
17146 htab = elf32_arm_hash_table (info);
17147
17148 if (bfd_link_relocatable (info))
17149 return true;
17150
17151 tls_sec = elf_hash_table (info)->tls_sec;
17152
17153 if (tls_sec)
17154 {
17155 struct elf_link_hash_entry *tlsbase;
17156
17157 tlsbase = elf_link_hash_lookup
17158 (elf_hash_table (info), "_TLS_MODULE_BASE_", true, true, false);
17159
17160 if (tlsbase)
17161 {
17162 struct bfd_link_hash_entry *bh = NULL;
17163 const struct elf_backend_data *bed
17164 = get_elf_backend_data (output_bfd);
17165
17166 if (!(_bfd_generic_link_add_one_symbol
17167 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
17168 tls_sec, 0, NULL, false,
17169 bed->collect, &bh)))
17170 return false;
17171
17172 tlsbase->type = STT_TLS;
17173 tlsbase = (struct elf_link_hash_entry *)bh;
17174 tlsbase->def_regular = 1;
17175 tlsbase->other = STV_HIDDEN;
17176 (*bed->elf_backend_hide_symbol) (info, tlsbase, true);
17177 }
17178 }
17179
17180 if (htab->fdpic_p && !bfd_link_relocatable (info)
17181 && !bfd_elf_stack_segment_size (output_bfd, info,
17182 "__stacksize", DEFAULT_STACK_SIZE))
17183 return false;
17184
17185 return true;
17186 }
17187
17188 /* Finish up dynamic symbol handling. We set the contents of various
17189 dynamic sections here. */
17190
17191 static bool
17192 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
17193 struct bfd_link_info * info,
17194 struct elf_link_hash_entry * h,
17195 Elf_Internal_Sym * sym)
17196 {
17197 struct elf32_arm_link_hash_table *htab;
17198 struct elf32_arm_link_hash_entry *eh;
17199
17200 htab = elf32_arm_hash_table (info);
17201 if (htab == NULL)
17202 return false;
17203
17204 eh = (struct elf32_arm_link_hash_entry *) h;
17205
17206 if (h->plt.offset != (bfd_vma) -1)
17207 {
17208 if (!eh->is_iplt)
17209 {
17210 BFD_ASSERT (h->dynindx != -1);
17211 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
17212 h->dynindx, 0))
17213 return false;
17214 }
17215
17216 if (!h->def_regular)
17217 {
17218 /* Mark the symbol as undefined, rather than as defined in
17219 the .plt section. */
17220 sym->st_shndx = SHN_UNDEF;
17221 /* If the symbol is weak we need to clear the value.
17222 Otherwise, the PLT entry would provide a definition for
17223 the symbol even if the symbol wasn't defined anywhere,
17224 and so the symbol would never be NULL. Leave the value if
17225 there were any relocations where pointer equality matters
17226 (this is a clue for the dynamic linker, to make function
17227 pointer comparisons work between an application and shared
17228 library). */
17229 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
17230 sym->st_value = 0;
17231 }
17232 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
17233 {
17234 /* At least one non-call relocation references this .iplt entry,
17235 so the .iplt entry is the function's canonical address. */
17236 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
17237 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
17238 sym->st_shndx = (_bfd_elf_section_from_bfd_section
17239 (output_bfd, htab->root.iplt->output_section));
17240 sym->st_value = (h->plt.offset
17241 + htab->root.iplt->output_section->vma
17242 + htab->root.iplt->output_offset);
17243 }
17244 }
17245
17246 if (h->needs_copy)
17247 {
17248 asection * s;
17249 Elf_Internal_Rela rel;
17250
17251 /* This symbol needs a copy reloc. Set it up. */
17252 BFD_ASSERT (h->dynindx != -1
17253 && (h->root.type == bfd_link_hash_defined
17254 || h->root.type == bfd_link_hash_defweak));
17255
17256 rel.r_addend = 0;
17257 rel.r_offset = (h->root.u.def.value
17258 + h->root.u.def.section->output_section->vma
17259 + h->root.u.def.section->output_offset);
17260 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
17261 if (h->root.u.def.section == htab->root.sdynrelro)
17262 s = htab->root.sreldynrelro;
17263 else
17264 s = htab->root.srelbss;
17265 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
17266 }
17267
17268 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
17269 and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute:
17270 it is relative to the ".got" section. */
17271 if (h == htab->root.hdynamic
17272 || (!htab->fdpic_p
17273 && htab->root.target_os != is_vxworks
17274 && h == htab->root.hgot))
17275 sym->st_shndx = SHN_ABS;
17276
17277 return true;
17278 }
17279
17280 static void
17281 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17282 void *contents,
17283 const unsigned long *template, unsigned count)
17284 {
17285 unsigned ix;
17286
17287 for (ix = 0; ix != count; ix++)
17288 {
17289 unsigned long insn = template[ix];
17290
17291 /* Emit mov pc,rx if bx is not permitted. */
17292 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
17293 insn = (insn & 0xf000000f) | 0x01a0f000;
17294 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
17295 }
17296 }
17297
17298 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
17299 other variants, NaCl needs this entry in a static executable's
17300 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
17301 zero. For .iplt really only the last bundle is useful, and .iplt
17302 could have a shorter first entry, with each individual PLT entry's
17303 relative branch calculated differently so it targets the last
17304 bundle instead of the instruction before it (labelled .Lplt_tail
17305 above). But it's simpler to keep the size and layout of PLT0
17306 consistent with the dynamic case, at the cost of some dead code at
17307 the start of .iplt and the one dead store to the stack at the start
17308 of .Lplt_tail. */
17309 static void
17310 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17311 asection *plt, bfd_vma got_displacement)
17312 {
17313 unsigned int i;
17314
17315 put_arm_insn (htab, output_bfd,
17316 elf32_arm_nacl_plt0_entry[0]
17317 | arm_movw_immediate (got_displacement),
17318 plt->contents + 0);
17319 put_arm_insn (htab, output_bfd,
17320 elf32_arm_nacl_plt0_entry[1]
17321 | arm_movt_immediate (got_displacement),
17322 plt->contents + 4);
17323
17324 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
17325 put_arm_insn (htab, output_bfd,
17326 elf32_arm_nacl_plt0_entry[i],
17327 plt->contents + (i * 4));
17328 }
17329
17330 /* Finish up the dynamic sections. */
17331
17332 static bool
17333 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
17334 {
17335 bfd * dynobj;
17336 asection * sgot;
17337 asection * sdyn;
17338 struct elf32_arm_link_hash_table *htab;
17339
17340 htab = elf32_arm_hash_table (info);
17341 if (htab == NULL)
17342 return false;
17343
17344 dynobj = elf_hash_table (info)->dynobj;
17345
17346 sgot = htab->root.sgotplt;
17347 /* A broken linker script might have discarded the dynamic sections.
17348 Catch this here so that we do not seg-fault later on. */
17349 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
17350 return false;
17351 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
17352
17353 if (elf_hash_table (info)->dynamic_sections_created)
17354 {
17355 asection *splt;
17356 Elf32_External_Dyn *dyncon, *dynconend;
17357
17358 splt = htab->root.splt;
17359 BFD_ASSERT (splt != NULL && sdyn != NULL);
17360 BFD_ASSERT (sgot != NULL);
17361
17362 dyncon = (Elf32_External_Dyn *) sdyn->contents;
17363 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
17364
17365 for (; dyncon < dynconend; dyncon++)
17366 {
17367 Elf_Internal_Dyn dyn;
17368 const char * name;
17369 asection * s;
17370
17371 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
17372
17373 switch (dyn.d_tag)
17374 {
17375 default:
17376 if (htab->root.target_os == is_vxworks
17377 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
17378 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17379 break;
17380
17381 case DT_HASH:
17382 case DT_STRTAB:
17383 case DT_SYMTAB:
17384 case DT_VERSYM:
17385 case DT_VERDEF:
17386 case DT_VERNEED:
17387 break;
17388
17389 case DT_PLTGOT:
17390 name = ".got.plt";
17391 goto get_vma;
17392 case DT_JMPREL:
17393 name = RELOC_SECTION (htab, ".plt");
17394 get_vma:
17395 s = bfd_get_linker_section (dynobj, name);
17396 if (s == NULL)
17397 {
17398 _bfd_error_handler
17399 (_("could not find section %s"), name);
17400 bfd_set_error (bfd_error_invalid_operation);
17401 return false;
17402 }
17403 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
17404 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17405 break;
17406
17407 case DT_PLTRELSZ:
17408 s = htab->root.srelplt;
17409 BFD_ASSERT (s != NULL);
17410 dyn.d_un.d_val = s->size;
17411 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17412 break;
17413
17414 case DT_RELSZ:
17415 case DT_RELASZ:
17416 case DT_REL:
17417 case DT_RELA:
17418 break;
17419
17420 case DT_TLSDESC_PLT:
17421 s = htab->root.splt;
17422 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17423 + htab->root.tlsdesc_plt);
17424 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17425 break;
17426
17427 case DT_TLSDESC_GOT:
17428 s = htab->root.sgot;
17429 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17430 + htab->root.tlsdesc_got);
17431 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17432 break;
17433
17434 /* Set the bottom bit of DT_INIT/FINI if the
17435 corresponding function is Thumb. */
17436 case DT_INIT:
17437 name = info->init_function;
17438 goto get_sym;
17439 case DT_FINI:
17440 name = info->fini_function;
17441 get_sym:
17442 /* If it wasn't set by elf_bfd_final_link
17443 then there is nothing to adjust. */
17444 if (dyn.d_un.d_val != 0)
17445 {
17446 struct elf_link_hash_entry * eh;
17447
17448 eh = elf_link_hash_lookup (elf_hash_table (info), name,
17449 false, false, true);
17450 if (eh != NULL
17451 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
17452 == ST_BRANCH_TO_THUMB)
17453 {
17454 dyn.d_un.d_val |= 1;
17455 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17456 }
17457 }
17458 break;
17459 }
17460 }
17461
17462 /* Fill in the first entry in the procedure linkage table. */
17463 if (splt->size > 0 && htab->plt_header_size)
17464 {
17465 const bfd_vma *plt0_entry;
17466 bfd_vma got_address, plt_address, got_displacement;
17467
17468 /* Calculate the addresses of the GOT and PLT. */
17469 got_address = sgot->output_section->vma + sgot->output_offset;
17470 plt_address = splt->output_section->vma + splt->output_offset;
17471
17472 if (htab->root.target_os == is_vxworks)
17473 {
17474 /* The VxWorks GOT is relocated by the dynamic linker.
17475 Therefore, we must emit relocations rather than simply
17476 computing the values now. */
17477 Elf_Internal_Rela rel;
17478
17479 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
17480 put_arm_insn (htab, output_bfd, plt0_entry[0],
17481 splt->contents + 0);
17482 put_arm_insn (htab, output_bfd, plt0_entry[1],
17483 splt->contents + 4);
17484 put_arm_insn (htab, output_bfd, plt0_entry[2],
17485 splt->contents + 8);
17486 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
17487
17488 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
17489 rel.r_offset = plt_address + 12;
17490 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17491 rel.r_addend = 0;
17492 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
17493 htab->srelplt2->contents);
17494 }
17495 else if (htab->root.target_os == is_nacl)
17496 arm_nacl_put_plt0 (htab, output_bfd, splt,
17497 got_address + 8 - (plt_address + 16));
17498 else if (using_thumb_only (htab))
17499 {
17500 got_displacement = got_address - (plt_address + 12);
17501
17502 plt0_entry = elf32_thumb2_plt0_entry;
17503 put_arm_insn (htab, output_bfd, plt0_entry[0],
17504 splt->contents + 0);
17505 put_arm_insn (htab, output_bfd, plt0_entry[1],
17506 splt->contents + 4);
17507 put_arm_insn (htab, output_bfd, plt0_entry[2],
17508 splt->contents + 8);
17509
17510 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
17511 }
17512 else
17513 {
17514 got_displacement = got_address - (plt_address + 16);
17515
17516 plt0_entry = elf32_arm_plt0_entry;
17517 put_arm_insn (htab, output_bfd, plt0_entry[0],
17518 splt->contents + 0);
17519 put_arm_insn (htab, output_bfd, plt0_entry[1],
17520 splt->contents + 4);
17521 put_arm_insn (htab, output_bfd, plt0_entry[2],
17522 splt->contents + 8);
17523 put_arm_insn (htab, output_bfd, plt0_entry[3],
17524 splt->contents + 12);
17525
17526 #ifdef FOUR_WORD_PLT
17527 /* The displacement value goes in the otherwise-unused
17528 last word of the second entry. */
17529 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
17530 #else
17531 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
17532 #endif
17533 }
17534 }
17535
17536 /* UnixWare sets the entsize of .plt to 4, although that doesn't
17537 really seem like the right value. */
17538 if (splt->output_section->owner == output_bfd)
17539 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
17540
17541 if (htab->root.tlsdesc_plt)
17542 {
17543 bfd_vma got_address
17544 = sgot->output_section->vma + sgot->output_offset;
17545 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
17546 + htab->root.sgot->output_offset);
17547 bfd_vma plt_address
17548 = splt->output_section->vma + splt->output_offset;
17549
17550 arm_put_trampoline (htab, output_bfd,
17551 splt->contents + htab->root.tlsdesc_plt,
17552 dl_tlsdesc_lazy_trampoline, 6);
17553
17554 bfd_put_32 (output_bfd,
17555 gotplt_address + htab->root.tlsdesc_got
17556 - (plt_address + htab->root.tlsdesc_plt)
17557 - dl_tlsdesc_lazy_trampoline[6],
17558 splt->contents + htab->root.tlsdesc_plt + 24);
17559 bfd_put_32 (output_bfd,
17560 got_address - (plt_address + htab->root.tlsdesc_plt)
17561 - dl_tlsdesc_lazy_trampoline[7],
17562 splt->contents + htab->root.tlsdesc_plt + 24 + 4);
17563 }
17564
17565 if (htab->tls_trampoline)
17566 {
17567 arm_put_trampoline (htab, output_bfd,
17568 splt->contents + htab->tls_trampoline,
17569 tls_trampoline, 3);
17570 #ifdef FOUR_WORD_PLT
17571 bfd_put_32 (output_bfd, 0x00000000,
17572 splt->contents + htab->tls_trampoline + 12);
17573 #endif
17574 }
17575
17576 if (htab->root.target_os == is_vxworks
17577 && !bfd_link_pic (info)
17578 && htab->root.splt->size > 0)
17579 {
17580 /* Correct the .rel(a).plt.unloaded relocations. They will have
17581 incorrect symbol indexes. */
17582 int num_plts;
17583 unsigned char *p;
17584
17585 num_plts = ((htab->root.splt->size - htab->plt_header_size)
17586 / htab->plt_entry_size);
17587 p = htab->srelplt2->contents + RELOC_SIZE (htab);
17588
17589 for (; num_plts; num_plts--)
17590 {
17591 Elf_Internal_Rela rel;
17592
17593 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17594 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17595 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17596 p += RELOC_SIZE (htab);
17597
17598 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17599 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
17600 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17601 p += RELOC_SIZE (htab);
17602 }
17603 }
17604 }
17605
17606 if (htab->root.target_os == is_nacl
17607 && htab->root.iplt != NULL
17608 && htab->root.iplt->size > 0)
17609 /* NaCl uses a special first entry in .iplt too. */
17610 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
17611
17612 /* Fill in the first three entries in the global offset table. */
17613 if (sgot)
17614 {
17615 if (sgot->size > 0)
17616 {
17617 if (sdyn == NULL)
17618 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
17619 else
17620 bfd_put_32 (output_bfd,
17621 sdyn->output_section->vma + sdyn->output_offset,
17622 sgot->contents);
17623 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
17624 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
17625 }
17626
17627 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
17628 }
17629
17630 /* At the very end of the .rofixup section is a pointer to the GOT. */
17631 if (htab->fdpic_p && htab->srofixup != NULL)
17632 {
17633 struct elf_link_hash_entry *hgot = htab->root.hgot;
17634
17635 bfd_vma got_value = hgot->root.u.def.value
17636 + hgot->root.u.def.section->output_section->vma
17637 + hgot->root.u.def.section->output_offset;
17638
17639 arm_elf_add_rofixup (output_bfd, htab->srofixup, got_value);
17640
17641 /* Make sure we allocated and generated the same number of fixups. */
17642 BFD_ASSERT (htab->srofixup->reloc_count * 4 == htab->srofixup->size);
17643 }
17644
17645 return true;
17646 }
17647
17648 static bool
17649 elf32_arm_init_file_header (bfd *abfd, struct bfd_link_info *link_info)
17650 {
17651 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
17652 struct elf32_arm_link_hash_table *globals;
17653 struct elf_segment_map *m;
17654
17655 if (!_bfd_elf_init_file_header (abfd, link_info))
17656 return false;
17657
17658 i_ehdrp = elf_elfheader (abfd);
17659
17660 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
17661 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
17662 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
17663
17664 if (link_info)
17665 {
17666 globals = elf32_arm_hash_table (link_info);
17667 if (globals != NULL && globals->byteswap_code)
17668 i_ehdrp->e_flags |= EF_ARM_BE8;
17669
17670 if (globals->fdpic_p)
17671 i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC;
17672 }
17673
17674 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
17675 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
17676 {
17677 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
17678 if (abi == AEABI_VFP_args_vfp)
17679 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
17680 else
17681 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
17682 }
17683
17684 /* Scan segment to set p_flags attribute if it contains only sections with
17685 SHF_ARM_PURECODE flag. */
17686 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
17687 {
17688 unsigned int j;
17689
17690 if (m->count == 0)
17691 continue;
17692 for (j = 0; j < m->count; j++)
17693 {
17694 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
17695 break;
17696 }
17697 if (j == m->count)
17698 {
17699 m->p_flags = PF_X;
17700 m->p_flags_valid = 1;
17701 }
17702 }
17703 return true;
17704 }
17705
17706 static enum elf_reloc_type_class
17707 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
17708 const asection *rel_sec ATTRIBUTE_UNUSED,
17709 const Elf_Internal_Rela *rela)
17710 {
17711 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
17712
17713 if (htab->root.dynsym != NULL
17714 && htab->root.dynsym->contents != NULL)
17715 {
17716 /* Check relocation against STT_GNU_IFUNC symbol if there are
17717 dynamic symbols. */
17718 bfd *abfd = info->output_bfd;
17719 const struct elf_backend_data *bed = get_elf_backend_data (abfd);
17720 unsigned long r_symndx = ELF32_R_SYM (rela->r_info);
17721 if (r_symndx != STN_UNDEF)
17722 {
17723 Elf_Internal_Sym sym;
17724 if (!bed->s->swap_symbol_in (abfd,
17725 (htab->root.dynsym->contents
17726 + r_symndx * bed->s->sizeof_sym),
17727 0, &sym))
17728 {
17729 /* xgettext:c-format */
17730 _bfd_error_handler (_("%pB symbol number %lu references"
17731 " nonexistent SHT_SYMTAB_SHNDX section"),
17732 abfd, r_symndx);
17733 /* Ideally an error class should be returned here. */
17734 }
17735 else if (ELF_ST_TYPE (sym.st_info) == STT_GNU_IFUNC)
17736 return reloc_class_ifunc;
17737 }
17738 }
17739
17740 switch ((int) ELF32_R_TYPE (rela->r_info))
17741 {
17742 case R_ARM_RELATIVE:
17743 return reloc_class_relative;
17744 case R_ARM_JUMP_SLOT:
17745 return reloc_class_plt;
17746 case R_ARM_COPY:
17747 return reloc_class_copy;
17748 case R_ARM_IRELATIVE:
17749 return reloc_class_ifunc;
17750 default:
17751 return reloc_class_normal;
17752 }
17753 }
17754
17755 static void
17756 arm_final_write_processing (bfd *abfd)
17757 {
17758 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
17759 }
17760
17761 static bool
17762 elf32_arm_final_write_processing (bfd *abfd)
17763 {
17764 arm_final_write_processing (abfd);
17765 return _bfd_elf_final_write_processing (abfd);
17766 }
17767
17768 /* Return TRUE if this is an unwinding table entry. */
17769
17770 static bool
17771 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
17772 {
17773 return (startswith (name, ELF_STRING_ARM_unwind)
17774 || startswith (name, ELF_STRING_ARM_unwind_once));
17775 }
17776
17777
17778 /* Set the type and flags for an ARM section. We do this by
17779 the section name, which is a hack, but ought to work. */
17780
17781 static bool
17782 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
17783 {
17784 const char * name;
17785
17786 name = bfd_section_name (sec);
17787
17788 if (is_arm_elf_unwind_section_name (abfd, name))
17789 {
17790 hdr->sh_type = SHT_ARM_EXIDX;
17791 hdr->sh_flags |= SHF_LINK_ORDER;
17792 }
17793
17794 if (sec->flags & SEC_ELF_PURECODE)
17795 hdr->sh_flags |= SHF_ARM_PURECODE;
17796
17797 return true;
17798 }
17799
17800 /* Handle an ARM specific section when reading an object file. This is
17801 called when bfd_section_from_shdr finds a section with an unknown
17802 type. */
17803
17804 static bool
17805 elf32_arm_section_from_shdr (bfd *abfd,
17806 Elf_Internal_Shdr * hdr,
17807 const char *name,
17808 int shindex)
17809 {
17810 /* There ought to be a place to keep ELF backend specific flags, but
17811 at the moment there isn't one. We just keep track of the
17812 sections by their name, instead. Fortunately, the ABI gives
17813 names for all the ARM specific sections, so we will probably get
17814 away with this. */
17815 switch (hdr->sh_type)
17816 {
17817 case SHT_ARM_EXIDX:
17818 case SHT_ARM_PREEMPTMAP:
17819 case SHT_ARM_ATTRIBUTES:
17820 break;
17821
17822 default:
17823 return false;
17824 }
17825
17826 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
17827 return false;
17828
17829 return true;
17830 }
17831
17832 static _arm_elf_section_data *
17833 get_arm_elf_section_data (asection * sec)
17834 {
17835 if (sec && sec->owner && is_arm_elf (sec->owner))
17836 return elf32_arm_section_data (sec);
17837 else
17838 return NULL;
17839 }
17840
17841 typedef struct
17842 {
17843 void *flaginfo;
17844 struct bfd_link_info *info;
17845 asection *sec;
17846 int sec_shndx;
17847 int (*func) (void *, const char *, Elf_Internal_Sym *,
17848 asection *, struct elf_link_hash_entry *);
17849 } output_arch_syminfo;
17850
17851 enum map_symbol_type
17852 {
17853 ARM_MAP_ARM,
17854 ARM_MAP_THUMB,
17855 ARM_MAP_DATA
17856 };
17857
17858
17859 /* Output a single mapping symbol. */
17860
17861 static bool
17862 elf32_arm_output_map_sym (output_arch_syminfo *osi,
17863 enum map_symbol_type type,
17864 bfd_vma offset)
17865 {
17866 static const char *names[3] = {"$a", "$t", "$d"};
17867 Elf_Internal_Sym sym;
17868
17869 sym.st_value = osi->sec->output_section->vma
17870 + osi->sec->output_offset
17871 + offset;
17872 sym.st_size = 0;
17873 sym.st_other = 0;
17874 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
17875 sym.st_shndx = osi->sec_shndx;
17876 sym.st_target_internal = 0;
17877 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
17878 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
17879 }
17880
17881 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
17882 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
17883
17884 static bool
17885 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
17886 bool is_iplt_entry_p,
17887 union gotplt_union *root_plt,
17888 struct arm_plt_info *arm_plt)
17889 {
17890 struct elf32_arm_link_hash_table *htab;
17891 bfd_vma addr, plt_header_size;
17892
17893 if (root_plt->offset == (bfd_vma) -1)
17894 return true;
17895
17896 htab = elf32_arm_hash_table (osi->info);
17897 if (htab == NULL)
17898 return false;
17899
17900 if (is_iplt_entry_p)
17901 {
17902 osi->sec = htab->root.iplt;
17903 plt_header_size = 0;
17904 }
17905 else
17906 {
17907 osi->sec = htab->root.splt;
17908 plt_header_size = htab->plt_header_size;
17909 }
17910 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
17911 (osi->info->output_bfd, osi->sec->output_section));
17912
17913 addr = root_plt->offset & -2;
17914 if (htab->root.target_os == is_vxworks)
17915 {
17916 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17917 return false;
17918 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
17919 return false;
17920 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
17921 return false;
17922 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
17923 return false;
17924 }
17925 else if (htab->root.target_os == is_nacl)
17926 {
17927 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17928 return false;
17929 }
17930 else if (htab->fdpic_p)
17931 {
17932 enum map_symbol_type type = using_thumb_only (htab)
17933 ? ARM_MAP_THUMB
17934 : ARM_MAP_ARM;
17935
17936 if (elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt))
17937 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17938 return false;
17939 if (!elf32_arm_output_map_sym (osi, type, addr))
17940 return false;
17941 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 16))
17942 return false;
17943 if (htab->plt_entry_size == 4 * ARRAY_SIZE (elf32_arm_fdpic_plt_entry))
17944 if (!elf32_arm_output_map_sym (osi, type, addr + 24))
17945 return false;
17946 }
17947 else if (using_thumb_only (htab))
17948 {
17949 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
17950 return false;
17951 }
17952 else
17953 {
17954 bool thumb_stub_p;
17955
17956 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
17957 if (thumb_stub_p)
17958 {
17959 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17960 return false;
17961 }
17962 #ifdef FOUR_WORD_PLT
17963 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17964 return false;
17965 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17966 return false;
17967 #else
17968 /* A three-word PLT with no Thumb thunk contains only Arm code,
17969 so only need to output a mapping symbol for the first PLT entry and
17970 entries with thumb thunks. */
17971 if (thumb_stub_p || addr == plt_header_size)
17972 {
17973 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17974 return false;
17975 }
17976 #endif
17977 }
17978
17979 return true;
17980 }
17981
17982 /* Output mapping symbols for PLT entries associated with H. */
17983
17984 static bool
17985 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
17986 {
17987 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
17988 struct elf32_arm_link_hash_entry *eh;
17989
17990 if (h->root.type == bfd_link_hash_indirect)
17991 return true;
17992
17993 if (h->root.type == bfd_link_hash_warning)
17994 /* When warning symbols are created, they **replace** the "real"
17995 entry in the hash table, thus we never get to see the real
17996 symbol in a hash traversal. So look at it now. */
17997 h = (struct elf_link_hash_entry *) h->root.u.i.link;
17998
17999 eh = (struct elf32_arm_link_hash_entry *) h;
18000 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
18001 &h->plt, &eh->plt);
18002 }
18003
18004 /* Bind a veneered symbol to its veneer identified by its hash entry
18005 STUB_ENTRY. The veneered location thus loose its symbol. */
18006
18007 static void
18008 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
18009 {
18010 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
18011
18012 BFD_ASSERT (hash);
18013 hash->root.root.u.def.section = stub_entry->stub_sec;
18014 hash->root.root.u.def.value = stub_entry->stub_offset;
18015 hash->root.size = stub_entry->stub_size;
18016 }
18017
18018 /* Output a single local symbol for a generated stub. */
18019
18020 static bool
18021 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
18022 bfd_vma offset, bfd_vma size)
18023 {
18024 Elf_Internal_Sym sym;
18025
18026 sym.st_value = osi->sec->output_section->vma
18027 + osi->sec->output_offset
18028 + offset;
18029 sym.st_size = size;
18030 sym.st_other = 0;
18031 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
18032 sym.st_shndx = osi->sec_shndx;
18033 sym.st_target_internal = 0;
18034 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
18035 }
18036
18037 static bool
18038 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
18039 void * in_arg)
18040 {
18041 struct elf32_arm_stub_hash_entry *stub_entry;
18042 asection *stub_sec;
18043 bfd_vma addr;
18044 char *stub_name;
18045 output_arch_syminfo *osi;
18046 const insn_sequence *template_sequence;
18047 enum stub_insn_type prev_type;
18048 int size;
18049 int i;
18050 enum map_symbol_type sym_type;
18051
18052 /* Massage our args to the form they really have. */
18053 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18054 osi = (output_arch_syminfo *) in_arg;
18055
18056 stub_sec = stub_entry->stub_sec;
18057
18058 /* Ensure this stub is attached to the current section being
18059 processed. */
18060 if (stub_sec != osi->sec)
18061 return true;
18062
18063 addr = (bfd_vma) stub_entry->stub_offset;
18064 template_sequence = stub_entry->stub_template;
18065
18066 if (arm_stub_sym_claimed (stub_entry->stub_type))
18067 arm_stub_claim_sym (stub_entry);
18068 else
18069 {
18070 stub_name = stub_entry->output_name;
18071 switch (template_sequence[0].type)
18072 {
18073 case ARM_TYPE:
18074 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
18075 stub_entry->stub_size))
18076 return false;
18077 break;
18078 case THUMB16_TYPE:
18079 case THUMB32_TYPE:
18080 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
18081 stub_entry->stub_size))
18082 return false;
18083 break;
18084 default:
18085 BFD_FAIL ();
18086 return 0;
18087 }
18088 }
18089
18090 prev_type = DATA_TYPE;
18091 size = 0;
18092 for (i = 0; i < stub_entry->stub_template_size; i++)
18093 {
18094 switch (template_sequence[i].type)
18095 {
18096 case ARM_TYPE:
18097 sym_type = ARM_MAP_ARM;
18098 break;
18099
18100 case THUMB16_TYPE:
18101 case THUMB32_TYPE:
18102 sym_type = ARM_MAP_THUMB;
18103 break;
18104
18105 case DATA_TYPE:
18106 sym_type = ARM_MAP_DATA;
18107 break;
18108
18109 default:
18110 BFD_FAIL ();
18111 return false;
18112 }
18113
18114 if (template_sequence[i].type != prev_type)
18115 {
18116 prev_type = template_sequence[i].type;
18117 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
18118 return false;
18119 }
18120
18121 switch (template_sequence[i].type)
18122 {
18123 case ARM_TYPE:
18124 case THUMB32_TYPE:
18125 size += 4;
18126 break;
18127
18128 case THUMB16_TYPE:
18129 size += 2;
18130 break;
18131
18132 case DATA_TYPE:
18133 size += 4;
18134 break;
18135
18136 default:
18137 BFD_FAIL ();
18138 return false;
18139 }
18140 }
18141
18142 return true;
18143 }
18144
18145 /* Output mapping symbols for linker generated sections,
18146 and for those data-only sections that do not have a
18147 $d. */
18148
18149 static bool
18150 elf32_arm_output_arch_local_syms (bfd *output_bfd,
18151 struct bfd_link_info *info,
18152 void *flaginfo,
18153 int (*func) (void *, const char *,
18154 Elf_Internal_Sym *,
18155 asection *,
18156 struct elf_link_hash_entry *))
18157 {
18158 output_arch_syminfo osi;
18159 struct elf32_arm_link_hash_table *htab;
18160 bfd_vma offset;
18161 bfd_size_type size;
18162 bfd *input_bfd;
18163
18164 if (info->strip == strip_all
18165 && !info->emitrelocations
18166 && !bfd_link_relocatable (info))
18167 return true;
18168
18169 htab = elf32_arm_hash_table (info);
18170 if (htab == NULL)
18171 return false;
18172
18173 check_use_blx (htab);
18174
18175 osi.flaginfo = flaginfo;
18176 osi.info = info;
18177 osi.func = func;
18178
18179 /* Add a $d mapping symbol to data-only sections that
18180 don't have any mapping symbol. This may result in (harmless) redundant
18181 mapping symbols. */
18182 for (input_bfd = info->input_bfds;
18183 input_bfd != NULL;
18184 input_bfd = input_bfd->link.next)
18185 {
18186 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
18187 for (osi.sec = input_bfd->sections;
18188 osi.sec != NULL;
18189 osi.sec = osi.sec->next)
18190 {
18191 if (osi.sec->output_section != NULL
18192 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
18193 != 0)
18194 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
18195 == SEC_HAS_CONTENTS
18196 && get_arm_elf_section_data (osi.sec) != NULL
18197 && get_arm_elf_section_data (osi.sec)->mapcount == 0
18198 && osi.sec->size > 0
18199 && (osi.sec->flags & SEC_EXCLUDE) == 0)
18200 {
18201 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18202 (output_bfd, osi.sec->output_section);
18203 if (osi.sec_shndx != (int)SHN_BAD)
18204 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
18205 }
18206 }
18207 }
18208
18209 /* ARM->Thumb glue. */
18210 if (htab->arm_glue_size > 0)
18211 {
18212 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18213 ARM2THUMB_GLUE_SECTION_NAME);
18214
18215 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18216 (output_bfd, osi.sec->output_section);
18217 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
18218 || htab->pic_veneer)
18219 size = ARM2THUMB_PIC_GLUE_SIZE;
18220 else if (htab->use_blx)
18221 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
18222 else
18223 size = ARM2THUMB_STATIC_GLUE_SIZE;
18224
18225 for (offset = 0; offset < htab->arm_glue_size; offset += size)
18226 {
18227 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
18228 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
18229 }
18230 }
18231
18232 /* Thumb->ARM glue. */
18233 if (htab->thumb_glue_size > 0)
18234 {
18235 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18236 THUMB2ARM_GLUE_SECTION_NAME);
18237
18238 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18239 (output_bfd, osi.sec->output_section);
18240 size = THUMB2ARM_GLUE_SIZE;
18241
18242 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
18243 {
18244 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
18245 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
18246 }
18247 }
18248
18249 /* ARMv4 BX veneers. */
18250 if (htab->bx_glue_size > 0)
18251 {
18252 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18253 ARM_BX_GLUE_SECTION_NAME);
18254
18255 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18256 (output_bfd, osi.sec->output_section);
18257
18258 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
18259 }
18260
18261 /* Long calls stubs. */
18262 if (htab->stub_bfd && htab->stub_bfd->sections)
18263 {
18264 asection* stub_sec;
18265
18266 for (stub_sec = htab->stub_bfd->sections;
18267 stub_sec != NULL;
18268 stub_sec = stub_sec->next)
18269 {
18270 /* Ignore non-stub sections. */
18271 if (!strstr (stub_sec->name, STUB_SUFFIX))
18272 continue;
18273
18274 osi.sec = stub_sec;
18275
18276 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18277 (output_bfd, osi.sec->output_section);
18278
18279 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
18280 }
18281 }
18282
18283 /* Finally, output mapping symbols for the PLT. */
18284 if (htab->root.splt && htab->root.splt->size > 0)
18285 {
18286 osi.sec = htab->root.splt;
18287 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18288 (output_bfd, osi.sec->output_section));
18289
18290 /* Output mapping symbols for the plt header. */
18291 if (htab->root.target_os == is_vxworks)
18292 {
18293 /* VxWorks shared libraries have no PLT header. */
18294 if (!bfd_link_pic (info))
18295 {
18296 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18297 return false;
18298 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18299 return false;
18300 }
18301 }
18302 else if (htab->root.target_os == is_nacl)
18303 {
18304 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18305 return false;
18306 }
18307 else if (using_thumb_only (htab) && !htab->fdpic_p)
18308 {
18309 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
18310 return false;
18311 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18312 return false;
18313 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
18314 return false;
18315 }
18316 else if (!htab->fdpic_p)
18317 {
18318 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18319 return false;
18320 #ifndef FOUR_WORD_PLT
18321 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
18322 return false;
18323 #endif
18324 }
18325 }
18326 if (htab->root.target_os == is_nacl
18327 && htab->root.iplt
18328 && htab->root.iplt->size > 0)
18329 {
18330 /* NaCl uses a special first entry in .iplt too. */
18331 osi.sec = htab->root.iplt;
18332 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18333 (output_bfd, osi.sec->output_section));
18334 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18335 return false;
18336 }
18337 if ((htab->root.splt && htab->root.splt->size > 0)
18338 || (htab->root.iplt && htab->root.iplt->size > 0))
18339 {
18340 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
18341 for (input_bfd = info->input_bfds;
18342 input_bfd != NULL;
18343 input_bfd = input_bfd->link.next)
18344 {
18345 struct arm_local_iplt_info **local_iplt;
18346 unsigned int i, num_syms;
18347
18348 local_iplt = elf32_arm_local_iplt (input_bfd);
18349 if (local_iplt != NULL)
18350 {
18351 num_syms = elf_symtab_hdr (input_bfd).sh_info;
18352 if (num_syms > elf32_arm_num_entries (input_bfd))
18353 {
18354 _bfd_error_handler (_("\
18355 %pB: Number of symbols in input file has increased from %lu to %u\n"),
18356 input_bfd,
18357 (unsigned long) elf32_arm_num_entries (input_bfd),
18358 num_syms);
18359 return false;
18360 }
18361 for (i = 0; i < num_syms; i++)
18362 if (local_iplt[i] != NULL
18363 && !elf32_arm_output_plt_map_1 (&osi, true,
18364 &local_iplt[i]->root,
18365 &local_iplt[i]->arm))
18366 return false;
18367 }
18368 }
18369 }
18370 if (htab->root.tlsdesc_plt != 0)
18371 {
18372 /* Mapping symbols for the lazy tls trampoline. */
18373 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM,
18374 htab->root.tlsdesc_plt))
18375 return false;
18376
18377 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18378 htab->root.tlsdesc_plt + 24))
18379 return false;
18380 }
18381 if (htab->tls_trampoline != 0)
18382 {
18383 /* Mapping symbols for the tls trampoline. */
18384 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
18385 return false;
18386 #ifdef FOUR_WORD_PLT
18387 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18388 htab->tls_trampoline + 12))
18389 return false;
18390 #endif
18391 }
18392
18393 return true;
18394 }
18395
18396 /* Filter normal symbols of CMSE entry functions of ABFD to include in
18397 the import library. All SYMCOUNT symbols of ABFD can be examined
18398 from their pointers in SYMS. Pointers of symbols to keep should be
18399 stored continuously at the beginning of that array.
18400
18401 Returns the number of symbols to keep. */
18402
18403 static unsigned int
18404 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18405 struct bfd_link_info *info,
18406 asymbol **syms, long symcount)
18407 {
18408 size_t maxnamelen;
18409 char *cmse_name;
18410 long src_count, dst_count = 0;
18411 struct elf32_arm_link_hash_table *htab;
18412
18413 htab = elf32_arm_hash_table (info);
18414 if (!htab->stub_bfd || !htab->stub_bfd->sections)
18415 symcount = 0;
18416
18417 maxnamelen = 128;
18418 cmse_name = (char *) bfd_malloc (maxnamelen);
18419 BFD_ASSERT (cmse_name);
18420
18421 for (src_count = 0; src_count < symcount; src_count++)
18422 {
18423 struct elf32_arm_link_hash_entry *cmse_hash;
18424 asymbol *sym;
18425 flagword flags;
18426 char *name;
18427 size_t namelen;
18428
18429 sym = syms[src_count];
18430 flags = sym->flags;
18431 name = (char *) bfd_asymbol_name (sym);
18432
18433 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
18434 continue;
18435 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
18436 continue;
18437
18438 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
18439 if (namelen > maxnamelen)
18440 {
18441 cmse_name = (char *)
18442 bfd_realloc (cmse_name, namelen);
18443 maxnamelen = namelen;
18444 }
18445 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
18446 cmse_hash = (struct elf32_arm_link_hash_entry *)
18447 elf_link_hash_lookup (&(htab)->root, cmse_name, false, false, true);
18448
18449 if (!cmse_hash
18450 || (cmse_hash->root.root.type != bfd_link_hash_defined
18451 && cmse_hash->root.root.type != bfd_link_hash_defweak)
18452 || cmse_hash->root.type != STT_FUNC)
18453 continue;
18454
18455 syms[dst_count++] = sym;
18456 }
18457 free (cmse_name);
18458
18459 syms[dst_count] = NULL;
18460
18461 return dst_count;
18462 }
18463
18464 /* Filter symbols of ABFD to include in the import library. All
18465 SYMCOUNT symbols of ABFD can be examined from their pointers in
18466 SYMS. Pointers of symbols to keep should be stored continuously at
18467 the beginning of that array.
18468
18469 Returns the number of symbols to keep. */
18470
18471 static unsigned int
18472 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18473 struct bfd_link_info *info,
18474 asymbol **syms, long symcount)
18475 {
18476 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
18477
18478 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18479 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18480 library to be a relocatable object file. */
18481 BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
18482 if (globals->cmse_implib)
18483 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
18484 else
18485 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
18486 }
18487
18488 /* Allocate target specific section data. */
18489
18490 static bool
18491 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
18492 {
18493 if (!sec->used_by_bfd)
18494 {
18495 _arm_elf_section_data *sdata;
18496 size_t amt = sizeof (*sdata);
18497
18498 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
18499 if (sdata == NULL)
18500 return false;
18501 sec->used_by_bfd = sdata;
18502 }
18503
18504 return _bfd_elf_new_section_hook (abfd, sec);
18505 }
18506
18507
18508 /* Used to order a list of mapping symbols by address. */
18509
18510 static int
18511 elf32_arm_compare_mapping (const void * a, const void * b)
18512 {
18513 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
18514 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
18515
18516 if (amap->vma > bmap->vma)
18517 return 1;
18518 else if (amap->vma < bmap->vma)
18519 return -1;
18520 else if (amap->type > bmap->type)
18521 /* Ensure results do not depend on the host qsort for objects with
18522 multiple mapping symbols at the same address by sorting on type
18523 after vma. */
18524 return 1;
18525 else if (amap->type < bmap->type)
18526 return -1;
18527 else
18528 return 0;
18529 }
18530
18531 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
18532
18533 static unsigned long
18534 offset_prel31 (unsigned long addr, bfd_vma offset)
18535 {
18536 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
18537 }
18538
18539 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18540 relocations. */
18541
18542 static void
18543 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
18544 {
18545 unsigned long first_word = bfd_get_32 (output_bfd, from);
18546 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
18547
18548 /* High bit of first word is supposed to be zero. */
18549 if ((first_word & 0x80000000ul) == 0)
18550 first_word = offset_prel31 (first_word, offset);
18551
18552 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18553 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
18554 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
18555 second_word = offset_prel31 (second_word, offset);
18556
18557 bfd_put_32 (output_bfd, first_word, to);
18558 bfd_put_32 (output_bfd, second_word, to + 4);
18559 }
18560
18561 /* Data for make_branch_to_a8_stub(). */
18562
18563 struct a8_branch_to_stub_data
18564 {
18565 asection *writing_section;
18566 bfd_byte *contents;
18567 };
18568
18569
18570 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
18571 places for a particular section. */
18572
18573 static bool
18574 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
18575 void *in_arg)
18576 {
18577 struct elf32_arm_stub_hash_entry *stub_entry;
18578 struct a8_branch_to_stub_data *data;
18579 bfd_byte *contents;
18580 unsigned long branch_insn;
18581 bfd_vma veneered_insn_loc, veneer_entry_loc;
18582 bfd_signed_vma branch_offset;
18583 bfd *abfd;
18584 unsigned int loc;
18585
18586 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18587 data = (struct a8_branch_to_stub_data *) in_arg;
18588
18589 if (stub_entry->target_section != data->writing_section
18590 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
18591 return true;
18592
18593 contents = data->contents;
18594
18595 /* We use target_section as Cortex-A8 erratum workaround stubs are only
18596 generated when both source and target are in the same section. */
18597 veneered_insn_loc = stub_entry->target_section->output_section->vma
18598 + stub_entry->target_section->output_offset
18599 + stub_entry->source_value;
18600
18601 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
18602 + stub_entry->stub_sec->output_offset
18603 + stub_entry->stub_offset;
18604
18605 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
18606 veneered_insn_loc &= ~3u;
18607
18608 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
18609
18610 abfd = stub_entry->target_section->owner;
18611 loc = stub_entry->source_value;
18612
18613 /* We attempt to avoid this condition by setting stubs_always_after_branch
18614 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18615 This check is just to be on the safe side... */
18616 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
18617 {
18618 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18619 "allocated in unsafe location"), abfd);
18620 return false;
18621 }
18622
18623 switch (stub_entry->stub_type)
18624 {
18625 case arm_stub_a8_veneer_b:
18626 case arm_stub_a8_veneer_b_cond:
18627 branch_insn = 0xf0009000;
18628 goto jump24;
18629
18630 case arm_stub_a8_veneer_blx:
18631 branch_insn = 0xf000e800;
18632 goto jump24;
18633
18634 case arm_stub_a8_veneer_bl:
18635 {
18636 unsigned int i1, j1, i2, j2, s;
18637
18638 branch_insn = 0xf000d000;
18639
18640 jump24:
18641 if (branch_offset < -16777216 || branch_offset > 16777214)
18642 {
18643 /* There's not much we can do apart from complain if this
18644 happens. */
18645 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18646 "of range (input file too large)"), abfd);
18647 return false;
18648 }
18649
18650 /* i1 = not(j1 eor s), so:
18651 not i1 = j1 eor s
18652 j1 = (not i1) eor s. */
18653
18654 branch_insn |= (branch_offset >> 1) & 0x7ff;
18655 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
18656 i2 = (branch_offset >> 22) & 1;
18657 i1 = (branch_offset >> 23) & 1;
18658 s = (branch_offset >> 24) & 1;
18659 j1 = (!i1) ^ s;
18660 j2 = (!i2) ^ s;
18661 branch_insn |= j2 << 11;
18662 branch_insn |= j1 << 13;
18663 branch_insn |= s << 26;
18664 }
18665 break;
18666
18667 default:
18668 BFD_FAIL ();
18669 return false;
18670 }
18671
18672 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
18673 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
18674
18675 return true;
18676 }
18677
18678 /* Beginning of stm32l4xx work-around. */
18679
18680 /* Functions encoding instructions necessary for the emission of the
18681 fix-stm32l4xx-629360.
18682 Encoding is extracted from the
18683 ARM (C) Architecture Reference Manual
18684 ARMv7-A and ARMv7-R edition
18685 ARM DDI 0406C.b (ID072512). */
18686
18687 static inline bfd_vma
18688 create_instruction_branch_absolute (int branch_offset)
18689 {
18690 /* A8.8.18 B (A8-334)
18691 B target_address (Encoding T4). */
18692 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
18693 /* jump offset is: S:I1:I2:imm10:imm11:0. */
18694 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
18695
18696 int s = ((branch_offset & 0x1000000) >> 24);
18697 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
18698 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
18699
18700 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
18701 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
18702
18703 bfd_vma patched_inst = 0xf0009000
18704 | s << 26 /* S. */
18705 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
18706 | j1 << 13 /* J1. */
18707 | j2 << 11 /* J2. */
18708 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
18709
18710 return patched_inst;
18711 }
18712
18713 static inline bfd_vma
18714 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
18715 {
18716 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18717 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
18718 bfd_vma patched_inst = 0xe8900000
18719 | (/*W=*/wback << 21)
18720 | (base_reg << 16)
18721 | (reg_mask & 0x0000ffff);
18722
18723 return patched_inst;
18724 }
18725
18726 static inline bfd_vma
18727 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
18728 {
18729 /* A8.8.60 LDMDB/LDMEA (A8-402)
18730 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
18731 bfd_vma patched_inst = 0xe9100000
18732 | (/*W=*/wback << 21)
18733 | (base_reg << 16)
18734 | (reg_mask & 0x0000ffff);
18735
18736 return patched_inst;
18737 }
18738
18739 static inline bfd_vma
18740 create_instruction_mov (int target_reg, int source_reg)
18741 {
18742 /* A8.8.103 MOV (register) (A8-486)
18743 MOV Rd, Rm (Encoding T1). */
18744 bfd_vma patched_inst = 0x4600
18745 | (target_reg & 0x7)
18746 | ((target_reg & 0x8) >> 3) << 7
18747 | (source_reg << 3);
18748
18749 return patched_inst;
18750 }
18751
18752 static inline bfd_vma
18753 create_instruction_sub (int target_reg, int source_reg, int value)
18754 {
18755 /* A8.8.221 SUB (immediate) (A8-708)
18756 SUB Rd, Rn, #value (Encoding T3). */
18757 bfd_vma patched_inst = 0xf1a00000
18758 | (target_reg << 8)
18759 | (source_reg << 16)
18760 | (/*S=*/0 << 20)
18761 | ((value & 0x800) >> 11) << 26
18762 | ((value & 0x700) >> 8) << 12
18763 | (value & 0x0ff);
18764
18765 return patched_inst;
18766 }
18767
18768 static inline bfd_vma
18769 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
18770 int first_reg)
18771 {
18772 /* A8.8.332 VLDM (A8-922)
18773 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
18774 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
18775 | (/*W=*/wback << 21)
18776 | (base_reg << 16)
18777 | (num_words & 0x000000ff)
18778 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
18779 | (first_reg & 0x00000001) << 22;
18780
18781 return patched_inst;
18782 }
18783
18784 static inline bfd_vma
18785 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
18786 int first_reg)
18787 {
18788 /* A8.8.332 VLDM (A8-922)
18789 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
18790 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
18791 | (base_reg << 16)
18792 | (num_words & 0x000000ff)
18793 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
18794 | (first_reg & 0x00000001) << 22;
18795
18796 return patched_inst;
18797 }
18798
18799 static inline bfd_vma
18800 create_instruction_udf_w (int value)
18801 {
18802 /* A8.8.247 UDF (A8-758)
18803 Undefined (Encoding T2). */
18804 bfd_vma patched_inst = 0xf7f0a000
18805 | (value & 0x00000fff)
18806 | (value & 0x000f0000) << 16;
18807
18808 return patched_inst;
18809 }
18810
18811 static inline bfd_vma
18812 create_instruction_udf (int value)
18813 {
18814 /* A8.8.247 UDF (A8-758)
18815 Undefined (Encoding T1). */
18816 bfd_vma patched_inst = 0xde00
18817 | (value & 0xff);
18818
18819 return patched_inst;
18820 }
18821
18822 /* Functions writing an instruction in memory, returning the next
18823 memory position to write to. */
18824
18825 static inline bfd_byte *
18826 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
18827 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18828 {
18829 put_thumb2_insn (htab, output_bfd, insn, pt);
18830 return pt + 4;
18831 }
18832
18833 static inline bfd_byte *
18834 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
18835 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18836 {
18837 put_thumb_insn (htab, output_bfd, insn, pt);
18838 return pt + 2;
18839 }
18840
18841 /* Function filling up a region in memory with T1 and T2 UDFs taking
18842 care of alignment. */
18843
18844 static bfd_byte *
18845 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
18846 bfd * output_bfd,
18847 const bfd_byte * const base_stub_contents,
18848 bfd_byte * const from_stub_contents,
18849 const bfd_byte * const end_stub_contents)
18850 {
18851 bfd_byte *current_stub_contents = from_stub_contents;
18852
18853 /* Fill the remaining of the stub with deterministic contents : UDF
18854 instructions.
18855 Check if realignment is needed on modulo 4 frontier using T1, to
18856 further use T2. */
18857 if ((current_stub_contents < end_stub_contents)
18858 && !((current_stub_contents - base_stub_contents) % 2)
18859 && ((current_stub_contents - base_stub_contents) % 4))
18860 current_stub_contents =
18861 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18862 create_instruction_udf (0));
18863
18864 for (; current_stub_contents < end_stub_contents;)
18865 current_stub_contents =
18866 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18867 create_instruction_udf_w (0));
18868
18869 return current_stub_contents;
18870 }
18871
18872 /* Functions writing the stream of instructions equivalent to the
18873 derived sequence for ldmia, ldmdb, vldm respectively. */
18874
18875 static void
18876 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
18877 bfd * output_bfd,
18878 const insn32 initial_insn,
18879 const bfd_byte *const initial_insn_addr,
18880 bfd_byte *const base_stub_contents)
18881 {
18882 int wback = (initial_insn & 0x00200000) >> 21;
18883 int ri, rn = (initial_insn & 0x000F0000) >> 16;
18884 int insn_all_registers = initial_insn & 0x0000ffff;
18885 int insn_low_registers, insn_high_registers;
18886 int usable_register_mask;
18887 int nb_registers = elf32_arm_popcount (insn_all_registers);
18888 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18889 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18890 bfd_byte *current_stub_contents = base_stub_contents;
18891
18892 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
18893
18894 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18895 smaller than 8 registers load sequences that do not cause the
18896 hardware issue. */
18897 if (nb_registers <= 8)
18898 {
18899 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18900 current_stub_contents =
18901 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18902 initial_insn);
18903
18904 /* B initial_insn_addr+4. */
18905 if (!restore_pc)
18906 current_stub_contents =
18907 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18908 create_instruction_branch_absolute
18909 (initial_insn_addr - current_stub_contents));
18910
18911 /* Fill the remaining of the stub with deterministic contents. */
18912 current_stub_contents =
18913 stm32l4xx_fill_stub_udf (htab, output_bfd,
18914 base_stub_contents, current_stub_contents,
18915 base_stub_contents +
18916 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18917
18918 return;
18919 }
18920
18921 /* - reg_list[13] == 0. */
18922 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
18923
18924 /* - reg_list[14] & reg_list[15] != 1. */
18925 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18926
18927 /* - if (wback==1) reg_list[rn] == 0. */
18928 BFD_ASSERT (!wback || !restore_rn);
18929
18930 /* - nb_registers > 8. */
18931 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18932
18933 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18934
18935 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
18936 - One with the 7 lowest registers (register mask 0x007F)
18937 This LDM will finally contain between 2 and 7 registers
18938 - One with the 7 highest registers (register mask 0xDF80)
18939 This ldm will finally contain between 2 and 7 registers. */
18940 insn_low_registers = insn_all_registers & 0x007F;
18941 insn_high_registers = insn_all_registers & 0xDF80;
18942
18943 /* A spare register may be needed during this veneer to temporarily
18944 handle the base register. This register will be restored with the
18945 last LDM operation.
18946 The usable register may be any general purpose register (that
18947 excludes PC, SP, LR : register mask is 0x1FFF). */
18948 usable_register_mask = 0x1FFF;
18949
18950 /* Generate the stub function. */
18951 if (wback)
18952 {
18953 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
18954 current_stub_contents =
18955 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18956 create_instruction_ldmia
18957 (rn, /*wback=*/1, insn_low_registers));
18958
18959 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
18960 current_stub_contents =
18961 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18962 create_instruction_ldmia
18963 (rn, /*wback=*/1, insn_high_registers));
18964 if (!restore_pc)
18965 {
18966 /* B initial_insn_addr+4. */
18967 current_stub_contents =
18968 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18969 create_instruction_branch_absolute
18970 (initial_insn_addr - current_stub_contents));
18971 }
18972 }
18973 else /* if (!wback). */
18974 {
18975 ri = rn;
18976
18977 /* If Rn is not part of the high-register-list, move it there. */
18978 if (!(insn_high_registers & (1 << rn)))
18979 {
18980 /* Choose a Ri in the high-register-list that will be restored. */
18981 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18982
18983 /* MOV Ri, Rn. */
18984 current_stub_contents =
18985 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18986 create_instruction_mov (ri, rn));
18987 }
18988
18989 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18990 current_stub_contents =
18991 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18992 create_instruction_ldmia
18993 (ri, /*wback=*/1, insn_low_registers));
18994
18995 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
18996 current_stub_contents =
18997 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18998 create_instruction_ldmia
18999 (ri, /*wback=*/0, insn_high_registers));
19000
19001 if (!restore_pc)
19002 {
19003 /* B initial_insn_addr+4. */
19004 current_stub_contents =
19005 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19006 create_instruction_branch_absolute
19007 (initial_insn_addr - current_stub_contents));
19008 }
19009 }
19010
19011 /* Fill the remaining of the stub with deterministic contents. */
19012 current_stub_contents =
19013 stm32l4xx_fill_stub_udf (htab, output_bfd,
19014 base_stub_contents, current_stub_contents,
19015 base_stub_contents +
19016 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19017 }
19018
19019 static void
19020 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
19021 bfd * output_bfd,
19022 const insn32 initial_insn,
19023 const bfd_byte *const initial_insn_addr,
19024 bfd_byte *const base_stub_contents)
19025 {
19026 int wback = (initial_insn & 0x00200000) >> 21;
19027 int ri, rn = (initial_insn & 0x000f0000) >> 16;
19028 int insn_all_registers = initial_insn & 0x0000ffff;
19029 int insn_low_registers, insn_high_registers;
19030 int usable_register_mask;
19031 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
19032 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
19033 int nb_registers = elf32_arm_popcount (insn_all_registers);
19034 bfd_byte *current_stub_contents = base_stub_contents;
19035
19036 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
19037
19038 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19039 smaller than 8 registers load sequences that do not cause the
19040 hardware issue. */
19041 if (nb_registers <= 8)
19042 {
19043 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
19044 current_stub_contents =
19045 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19046 initial_insn);
19047
19048 /* B initial_insn_addr+4. */
19049 current_stub_contents =
19050 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19051 create_instruction_branch_absolute
19052 (initial_insn_addr - current_stub_contents));
19053
19054 /* Fill the remaining of the stub with deterministic contents. */
19055 current_stub_contents =
19056 stm32l4xx_fill_stub_udf (htab, output_bfd,
19057 base_stub_contents, current_stub_contents,
19058 base_stub_contents +
19059 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19060
19061 return;
19062 }
19063
19064 /* - reg_list[13] == 0. */
19065 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
19066
19067 /* - reg_list[14] & reg_list[15] != 1. */
19068 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
19069
19070 /* - if (wback==1) reg_list[rn] == 0. */
19071 BFD_ASSERT (!wback || !restore_rn);
19072
19073 /* - nb_registers > 8. */
19074 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
19075
19076 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
19077
19078 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
19079 - One with the 7 lowest registers (register mask 0x007F)
19080 This LDM will finally contain between 2 and 7 registers
19081 - One with the 7 highest registers (register mask 0xDF80)
19082 This ldm will finally contain between 2 and 7 registers. */
19083 insn_low_registers = insn_all_registers & 0x007F;
19084 insn_high_registers = insn_all_registers & 0xDF80;
19085
19086 /* A spare register may be needed during this veneer to temporarily
19087 handle the base register. This register will be restored with
19088 the last LDM operation.
19089 The usable register may be any general purpose register (that excludes
19090 PC, SP, LR : register mask is 0x1FFF). */
19091 usable_register_mask = 0x1FFF;
19092
19093 /* Generate the stub function. */
19094 if (!wback && !restore_pc && !restore_rn)
19095 {
19096 /* Choose a Ri in the low-register-list that will be restored. */
19097 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19098
19099 /* MOV Ri, Rn. */
19100 current_stub_contents =
19101 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19102 create_instruction_mov (ri, rn));
19103
19104 /* LDMDB Ri!, {R-high-register-list}. */
19105 current_stub_contents =
19106 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19107 create_instruction_ldmdb
19108 (ri, /*wback=*/1, insn_high_registers));
19109
19110 /* LDMDB Ri, {R-low-register-list}. */
19111 current_stub_contents =
19112 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19113 create_instruction_ldmdb
19114 (ri, /*wback=*/0, insn_low_registers));
19115
19116 /* B initial_insn_addr+4. */
19117 current_stub_contents =
19118 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19119 create_instruction_branch_absolute
19120 (initial_insn_addr - current_stub_contents));
19121 }
19122 else if (wback && !restore_pc && !restore_rn)
19123 {
19124 /* LDMDB Rn!, {R-high-register-list}. */
19125 current_stub_contents =
19126 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19127 create_instruction_ldmdb
19128 (rn, /*wback=*/1, insn_high_registers));
19129
19130 /* LDMDB Rn!, {R-low-register-list}. */
19131 current_stub_contents =
19132 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19133 create_instruction_ldmdb
19134 (rn, /*wback=*/1, insn_low_registers));
19135
19136 /* B initial_insn_addr+4. */
19137 current_stub_contents =
19138 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19139 create_instruction_branch_absolute
19140 (initial_insn_addr - current_stub_contents));
19141 }
19142 else if (!wback && restore_pc && !restore_rn)
19143 {
19144 /* Choose a Ri in the high-register-list that will be restored. */
19145 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19146
19147 /* SUB Ri, Rn, #(4*nb_registers). */
19148 current_stub_contents =
19149 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19150 create_instruction_sub (ri, rn, (4 * nb_registers)));
19151
19152 /* LDMIA Ri!, {R-low-register-list}. */
19153 current_stub_contents =
19154 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19155 create_instruction_ldmia
19156 (ri, /*wback=*/1, insn_low_registers));
19157
19158 /* LDMIA Ri, {R-high-register-list}. */
19159 current_stub_contents =
19160 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19161 create_instruction_ldmia
19162 (ri, /*wback=*/0, insn_high_registers));
19163 }
19164 else if (wback && restore_pc && !restore_rn)
19165 {
19166 /* Choose a Ri in the high-register-list that will be restored. */
19167 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19168
19169 /* SUB Rn, Rn, #(4*nb_registers) */
19170 current_stub_contents =
19171 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19172 create_instruction_sub (rn, rn, (4 * nb_registers)));
19173
19174 /* MOV Ri, Rn. */
19175 current_stub_contents =
19176 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19177 create_instruction_mov (ri, rn));
19178
19179 /* LDMIA Ri!, {R-low-register-list}. */
19180 current_stub_contents =
19181 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19182 create_instruction_ldmia
19183 (ri, /*wback=*/1, insn_low_registers));
19184
19185 /* LDMIA Ri, {R-high-register-list}. */
19186 current_stub_contents =
19187 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19188 create_instruction_ldmia
19189 (ri, /*wback=*/0, insn_high_registers));
19190 }
19191 else if (!wback && !restore_pc && restore_rn)
19192 {
19193 ri = rn;
19194 if (!(insn_low_registers & (1 << rn)))
19195 {
19196 /* Choose a Ri in the low-register-list that will be restored. */
19197 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19198
19199 /* MOV Ri, Rn. */
19200 current_stub_contents =
19201 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19202 create_instruction_mov (ri, rn));
19203 }
19204
19205 /* LDMDB Ri!, {R-high-register-list}. */
19206 current_stub_contents =
19207 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19208 create_instruction_ldmdb
19209 (ri, /*wback=*/1, insn_high_registers));
19210
19211 /* LDMDB Ri, {R-low-register-list}. */
19212 current_stub_contents =
19213 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19214 create_instruction_ldmdb
19215 (ri, /*wback=*/0, insn_low_registers));
19216
19217 /* B initial_insn_addr+4. */
19218 current_stub_contents =
19219 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19220 create_instruction_branch_absolute
19221 (initial_insn_addr - current_stub_contents));
19222 }
19223 else if (!wback && restore_pc && restore_rn)
19224 {
19225 ri = rn;
19226 if (!(insn_high_registers & (1 << rn)))
19227 {
19228 /* Choose a Ri in the high-register-list that will be restored. */
19229 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19230 }
19231
19232 /* SUB Ri, Rn, #(4*nb_registers). */
19233 current_stub_contents =
19234 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19235 create_instruction_sub (ri, rn, (4 * nb_registers)));
19236
19237 /* LDMIA Ri!, {R-low-register-list}. */
19238 current_stub_contents =
19239 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19240 create_instruction_ldmia
19241 (ri, /*wback=*/1, insn_low_registers));
19242
19243 /* LDMIA Ri, {R-high-register-list}. */
19244 current_stub_contents =
19245 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19246 create_instruction_ldmia
19247 (ri, /*wback=*/0, insn_high_registers));
19248 }
19249 else if (wback && restore_rn)
19250 {
19251 /* The assembler should not have accepted to encode this. */
19252 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
19253 "undefined behavior.\n");
19254 }
19255
19256 /* Fill the remaining of the stub with deterministic contents. */
19257 current_stub_contents =
19258 stm32l4xx_fill_stub_udf (htab, output_bfd,
19259 base_stub_contents, current_stub_contents,
19260 base_stub_contents +
19261 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19262
19263 }
19264
19265 static void
19266 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
19267 bfd * output_bfd,
19268 const insn32 initial_insn,
19269 const bfd_byte *const initial_insn_addr,
19270 bfd_byte *const base_stub_contents)
19271 {
19272 int num_words = initial_insn & 0xff;
19273 bfd_byte *current_stub_contents = base_stub_contents;
19274
19275 BFD_ASSERT (is_thumb2_vldm (initial_insn));
19276
19277 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19278 smaller than 8 words load sequences that do not cause the
19279 hardware issue. */
19280 if (num_words <= 8)
19281 {
19282 /* Untouched instruction. */
19283 current_stub_contents =
19284 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19285 initial_insn);
19286
19287 /* B initial_insn_addr+4. */
19288 current_stub_contents =
19289 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19290 create_instruction_branch_absolute
19291 (initial_insn_addr - current_stub_contents));
19292 }
19293 else
19294 {
19295 bool is_dp = /* DP encoding. */
19296 (initial_insn & 0xfe100f00) == 0xec100b00;
19297 bool is_ia_nobang = /* (IA without !). */
19298 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
19299 bool is_ia_bang = /* (IA with !) - includes VPOP. */
19300 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
19301 bool is_db_bang = /* (DB with !). */
19302 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
19303 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
19304 /* d = UInt (Vd:D);. */
19305 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
19306 | (((unsigned int)initial_insn << 9) >> 31);
19307
19308 /* Compute the number of 8-words chunks needed to split. */
19309 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
19310 int chunk;
19311
19312 /* The test coverage has been done assuming the following
19313 hypothesis that exactly one of the previous is_ predicates is
19314 true. */
19315 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
19316 && !(is_ia_nobang & is_ia_bang & is_db_bang));
19317
19318 /* We treat the cutting of the words in one pass for all
19319 cases, then we emit the adjustments:
19320
19321 vldm rx, {...}
19322 -> vldm rx!, {8_words_or_less} for each needed 8_word
19323 -> sub rx, rx, #size (list)
19324
19325 vldm rx!, {...}
19326 -> vldm rx!, {8_words_or_less} for each needed 8_word
19327 This also handles vpop instruction (when rx is sp)
19328
19329 vldmd rx!, {...}
19330 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
19331 for (chunk = 0; chunk < chunks; ++chunk)
19332 {
19333 bfd_vma new_insn = 0;
19334
19335 if (is_ia_nobang || is_ia_bang)
19336 {
19337 new_insn = create_instruction_vldmia
19338 (base_reg,
19339 is_dp,
19340 /*wback= . */1,
19341 chunks - (chunk + 1) ?
19342 8 : num_words - chunk * 8,
19343 first_reg + chunk * 8);
19344 }
19345 else if (is_db_bang)
19346 {
19347 new_insn = create_instruction_vldmdb
19348 (base_reg,
19349 is_dp,
19350 chunks - (chunk + 1) ?
19351 8 : num_words - chunk * 8,
19352 first_reg + chunk * 8);
19353 }
19354
19355 if (new_insn)
19356 current_stub_contents =
19357 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19358 new_insn);
19359 }
19360
19361 /* Only this case requires the base register compensation
19362 subtract. */
19363 if (is_ia_nobang)
19364 {
19365 current_stub_contents =
19366 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19367 create_instruction_sub
19368 (base_reg, base_reg, 4*num_words));
19369 }
19370
19371 /* B initial_insn_addr+4. */
19372 current_stub_contents =
19373 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19374 create_instruction_branch_absolute
19375 (initial_insn_addr - current_stub_contents));
19376 }
19377
19378 /* Fill the remaining of the stub with deterministic contents. */
19379 current_stub_contents =
19380 stm32l4xx_fill_stub_udf (htab, output_bfd,
19381 base_stub_contents, current_stub_contents,
19382 base_stub_contents +
19383 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
19384 }
19385
19386 static void
19387 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
19388 bfd * output_bfd,
19389 const insn32 wrong_insn,
19390 const bfd_byte *const wrong_insn_addr,
19391 bfd_byte *const stub_contents)
19392 {
19393 if (is_thumb2_ldmia (wrong_insn))
19394 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
19395 wrong_insn, wrong_insn_addr,
19396 stub_contents);
19397 else if (is_thumb2_ldmdb (wrong_insn))
19398 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
19399 wrong_insn, wrong_insn_addr,
19400 stub_contents);
19401 else if (is_thumb2_vldm (wrong_insn))
19402 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
19403 wrong_insn, wrong_insn_addr,
19404 stub_contents);
19405 }
19406
19407 /* End of stm32l4xx work-around. */
19408
19409
19410 /* Do code byteswapping. Return FALSE afterwards so that the section is
19411 written out as normal. */
19412
19413 static bool
19414 elf32_arm_write_section (bfd *output_bfd,
19415 struct bfd_link_info *link_info,
19416 asection *sec,
19417 bfd_byte *contents)
19418 {
19419 unsigned int mapcount, errcount;
19420 _arm_elf_section_data *arm_data;
19421 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
19422 elf32_arm_section_map *map;
19423 elf32_vfp11_erratum_list *errnode;
19424 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
19425 bfd_vma ptr;
19426 bfd_vma end;
19427 bfd_vma offset = sec->output_section->vma + sec->output_offset;
19428 bfd_byte tmp;
19429 unsigned int i;
19430
19431 if (globals == NULL)
19432 return false;
19433
19434 /* If this section has not been allocated an _arm_elf_section_data
19435 structure then we cannot record anything. */
19436 arm_data = get_arm_elf_section_data (sec);
19437 if (arm_data == NULL)
19438 return false;
19439
19440 mapcount = arm_data->mapcount;
19441 map = arm_data->map;
19442 errcount = arm_data->erratumcount;
19443
19444 if (errcount != 0)
19445 {
19446 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
19447
19448 for (errnode = arm_data->erratumlist; errnode != 0;
19449 errnode = errnode->next)
19450 {
19451 bfd_vma target = errnode->vma - offset;
19452
19453 switch (errnode->type)
19454 {
19455 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
19456 {
19457 bfd_vma branch_to_veneer;
19458 /* Original condition code of instruction, plus bit mask for
19459 ARM B instruction. */
19460 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
19461 | 0x0a000000;
19462
19463 /* The instruction is before the label. */
19464 target -= 4;
19465
19466 /* Above offset included in -4 below. */
19467 branch_to_veneer = errnode->u.b.veneer->vma
19468 - errnode->vma - 4;
19469
19470 if ((signed) branch_to_veneer < -(1 << 25)
19471 || (signed) branch_to_veneer >= (1 << 25))
19472 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19473 "range"), output_bfd);
19474
19475 insn |= (branch_to_veneer >> 2) & 0xffffff;
19476 contents[endianflip ^ target] = insn & 0xff;
19477 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19478 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19479 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19480 }
19481 break;
19482
19483 case VFP11_ERRATUM_ARM_VENEER:
19484 {
19485 bfd_vma branch_from_veneer;
19486 unsigned int insn;
19487
19488 /* Take size of veneer into account. */
19489 branch_from_veneer = errnode->u.v.branch->vma
19490 - errnode->vma - 12;
19491
19492 if ((signed) branch_from_veneer < -(1 << 25)
19493 || (signed) branch_from_veneer >= (1 << 25))
19494 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19495 "range"), output_bfd);
19496
19497 /* Original instruction. */
19498 insn = errnode->u.v.branch->u.b.vfp_insn;
19499 contents[endianflip ^ target] = insn & 0xff;
19500 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19501 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19502 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19503
19504 /* Branch back to insn after original insn. */
19505 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
19506 contents[endianflip ^ (target + 4)] = insn & 0xff;
19507 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
19508 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
19509 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
19510 }
19511 break;
19512
19513 default:
19514 abort ();
19515 }
19516 }
19517 }
19518
19519 if (arm_data->stm32l4xx_erratumcount != 0)
19520 {
19521 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
19522 stm32l4xx_errnode != 0;
19523 stm32l4xx_errnode = stm32l4xx_errnode->next)
19524 {
19525 bfd_vma target = stm32l4xx_errnode->vma - offset;
19526
19527 switch (stm32l4xx_errnode->type)
19528 {
19529 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
19530 {
19531 unsigned int insn;
19532 bfd_vma branch_to_veneer =
19533 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
19534
19535 if ((signed) branch_to_veneer < -(1 << 24)
19536 || (signed) branch_to_veneer >= (1 << 24))
19537 {
19538 bfd_vma out_of_range =
19539 ((signed) branch_to_veneer < -(1 << 24)) ?
19540 - branch_to_veneer - (1 << 24) :
19541 ((signed) branch_to_veneer >= (1 << 24)) ?
19542 branch_to_veneer - (1 << 24) : 0;
19543
19544 _bfd_error_handler
19545 (_("%pB(%#" PRIx64 "): error: "
19546 "cannot create STM32L4XX veneer; "
19547 "jump out of range by %" PRId64 " bytes; "
19548 "cannot encode branch instruction"),
19549 output_bfd,
19550 (uint64_t) (stm32l4xx_errnode->vma - 4),
19551 (int64_t) out_of_range);
19552 continue;
19553 }
19554
19555 insn = create_instruction_branch_absolute
19556 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
19557
19558 /* The instruction is before the label. */
19559 target -= 4;
19560
19561 put_thumb2_insn (globals, output_bfd,
19562 (bfd_vma) insn, contents + target);
19563 }
19564 break;
19565
19566 case STM32L4XX_ERRATUM_VENEER:
19567 {
19568 bfd_byte * veneer;
19569 bfd_byte * veneer_r;
19570 unsigned int insn;
19571
19572 veneer = contents + target;
19573 veneer_r = veneer
19574 + stm32l4xx_errnode->u.b.veneer->vma
19575 - stm32l4xx_errnode->vma - 4;
19576
19577 if ((signed) (veneer_r - veneer -
19578 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
19579 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
19580 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
19581 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
19582 || (signed) (veneer_r - veneer) >= (1 << 24))
19583 {
19584 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19585 "veneer"), output_bfd);
19586 continue;
19587 }
19588
19589 /* Original instruction. */
19590 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
19591
19592 stm32l4xx_create_replacing_stub
19593 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
19594 }
19595 break;
19596
19597 default:
19598 abort ();
19599 }
19600 }
19601 }
19602
19603 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
19604 {
19605 arm_unwind_table_edit *edit_node
19606 = arm_data->u.exidx.unwind_edit_list;
19607 /* Now, sec->size is the size of the section we will write. The original
19608 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19609 markers) was sec->rawsize. (This isn't the case if we perform no
19610 edits, then rawsize will be zero and we should use size). */
19611 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
19612 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
19613 unsigned int in_index, out_index;
19614 bfd_vma add_to_offsets = 0;
19615
19616 if (edited_contents == NULL)
19617 return false;
19618 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
19619 {
19620 if (edit_node)
19621 {
19622 unsigned int edit_index = edit_node->index;
19623
19624 if (in_index < edit_index && in_index * 8 < input_size)
19625 {
19626 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19627 contents + in_index * 8, add_to_offsets);
19628 out_index++;
19629 in_index++;
19630 }
19631 else if (in_index == edit_index
19632 || (in_index * 8 >= input_size
19633 && edit_index == UINT_MAX))
19634 {
19635 switch (edit_node->type)
19636 {
19637 case DELETE_EXIDX_ENTRY:
19638 in_index++;
19639 add_to_offsets += 8;
19640 break;
19641
19642 case INSERT_EXIDX_CANTUNWIND_AT_END:
19643 {
19644 asection *text_sec = edit_node->linked_section;
19645 bfd_vma text_offset = text_sec->output_section->vma
19646 + text_sec->output_offset
19647 + text_sec->size;
19648 bfd_vma exidx_offset = offset + out_index * 8;
19649 unsigned long prel31_offset;
19650
19651 /* Note: this is meant to be equivalent to an
19652 R_ARM_PREL31 relocation. These synthetic
19653 EXIDX_CANTUNWIND markers are not relocated by the
19654 usual BFD method. */
19655 prel31_offset = (text_offset - exidx_offset)
19656 & 0x7ffffffful;
19657 if (bfd_link_relocatable (link_info))
19658 {
19659 /* Here relocation for new EXIDX_CANTUNWIND is
19660 created, so there is no need to
19661 adjust offset by hand. */
19662 prel31_offset = text_sec->output_offset
19663 + text_sec->size;
19664 }
19665
19666 /* First address we can't unwind. */
19667 bfd_put_32 (output_bfd, prel31_offset,
19668 &edited_contents[out_index * 8]);
19669
19670 /* Code for EXIDX_CANTUNWIND. */
19671 bfd_put_32 (output_bfd, 0x1,
19672 &edited_contents[out_index * 8 + 4]);
19673
19674 out_index++;
19675 add_to_offsets -= 8;
19676 }
19677 break;
19678 }
19679
19680 edit_node = edit_node->next;
19681 }
19682 }
19683 else
19684 {
19685 /* No more edits, copy remaining entries verbatim. */
19686 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19687 contents + in_index * 8, add_to_offsets);
19688 out_index++;
19689 in_index++;
19690 }
19691 }
19692
19693 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
19694 bfd_set_section_contents (output_bfd, sec->output_section,
19695 edited_contents,
19696 (file_ptr) sec->output_offset, sec->size);
19697
19698 return true;
19699 }
19700
19701 /* Fix code to point to Cortex-A8 erratum stubs. */
19702 if (globals->fix_cortex_a8)
19703 {
19704 struct a8_branch_to_stub_data data;
19705
19706 data.writing_section = sec;
19707 data.contents = contents;
19708
19709 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
19710 & data);
19711 }
19712
19713 if (mapcount == 0)
19714 return false;
19715
19716 if (globals->byteswap_code)
19717 {
19718 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
19719
19720 ptr = map[0].vma;
19721 for (i = 0; i < mapcount; i++)
19722 {
19723 if (i == mapcount - 1)
19724 end = sec->size;
19725 else
19726 end = map[i + 1].vma;
19727
19728 switch (map[i].type)
19729 {
19730 case 'a':
19731 /* Byte swap code words. */
19732 while (ptr + 3 < end)
19733 {
19734 tmp = contents[ptr];
19735 contents[ptr] = contents[ptr + 3];
19736 contents[ptr + 3] = tmp;
19737 tmp = contents[ptr + 1];
19738 contents[ptr + 1] = contents[ptr + 2];
19739 contents[ptr + 2] = tmp;
19740 ptr += 4;
19741 }
19742 break;
19743
19744 case 't':
19745 /* Byte swap code halfwords. */
19746 while (ptr + 1 < end)
19747 {
19748 tmp = contents[ptr];
19749 contents[ptr] = contents[ptr + 1];
19750 contents[ptr + 1] = tmp;
19751 ptr += 2;
19752 }
19753 break;
19754
19755 case 'd':
19756 /* Leave data alone. */
19757 break;
19758 }
19759 ptr = end;
19760 }
19761 }
19762
19763 free (map);
19764 arm_data->mapcount = -1;
19765 arm_data->mapsize = 0;
19766 arm_data->map = NULL;
19767
19768 return false;
19769 }
19770
19771 /* Mangle thumb function symbols as we read them in. */
19772
19773 static bool
19774 elf32_arm_swap_symbol_in (bfd * abfd,
19775 const void *psrc,
19776 const void *pshn,
19777 Elf_Internal_Sym *dst)
19778 {
19779 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
19780 return false;
19781 dst->st_target_internal = 0;
19782
19783 /* New EABI objects mark thumb function symbols by setting the low bit of
19784 the address. */
19785 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
19786 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
19787 {
19788 if (dst->st_value & 1)
19789 {
19790 dst->st_value &= ~(bfd_vma) 1;
19791 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
19792 ST_BRANCH_TO_THUMB);
19793 }
19794 else
19795 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
19796 }
19797 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
19798 {
19799 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
19800 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
19801 }
19802 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
19803 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
19804 else
19805 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
19806
19807 return true;
19808 }
19809
19810
19811 /* Mangle thumb function symbols as we write them out. */
19812
19813 static void
19814 elf32_arm_swap_symbol_out (bfd *abfd,
19815 const Elf_Internal_Sym *src,
19816 void *cdst,
19817 void *shndx)
19818 {
19819 Elf_Internal_Sym newsym;
19820
19821 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19822 of the address set, as per the new EABI. We do this unconditionally
19823 because objcopy does not set the elf header flags until after
19824 it writes out the symbol table. */
19825 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
19826 {
19827 newsym = *src;
19828 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
19829 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
19830 if (newsym.st_shndx != SHN_UNDEF)
19831 {
19832 /* Do this only for defined symbols. At link type, the static
19833 linker will simulate the work of dynamic linker of resolving
19834 symbols and will carry over the thumbness of found symbols to
19835 the output symbol table. It's not clear how it happens, but
19836 the thumbness of undefined symbols can well be different at
19837 runtime, and writing '1' for them will be confusing for users
19838 and possibly for dynamic linker itself.
19839 */
19840 newsym.st_value |= 1;
19841 }
19842
19843 src = &newsym;
19844 }
19845 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
19846 }
19847
19848 /* Add the PT_ARM_EXIDX program header. */
19849
19850 static bool
19851 elf32_arm_modify_segment_map (bfd *abfd,
19852 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19853 {
19854 struct elf_segment_map *m;
19855 asection *sec;
19856
19857 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19858 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19859 {
19860 /* If there is already a PT_ARM_EXIDX header, then we do not
19861 want to add another one. This situation arises when running
19862 "strip"; the input binary already has the header. */
19863 m = elf_seg_map (abfd);
19864 while (m && m->p_type != PT_ARM_EXIDX)
19865 m = m->next;
19866 if (!m)
19867 {
19868 m = (struct elf_segment_map *)
19869 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
19870 if (m == NULL)
19871 return false;
19872 m->p_type = PT_ARM_EXIDX;
19873 m->count = 1;
19874 m->sections[0] = sec;
19875
19876 m->next = elf_seg_map (abfd);
19877 elf_seg_map (abfd) = m;
19878 }
19879 }
19880
19881 return true;
19882 }
19883
19884 /* We may add a PT_ARM_EXIDX program header. */
19885
19886 static int
19887 elf32_arm_additional_program_headers (bfd *abfd,
19888 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19889 {
19890 asection *sec;
19891
19892 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19893 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19894 return 1;
19895 else
19896 return 0;
19897 }
19898
19899 /* Hook called by the linker routine which adds symbols from an object
19900 file. */
19901
19902 static bool
19903 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
19904 Elf_Internal_Sym *sym, const char **namep,
19905 flagword *flagsp, asection **secp, bfd_vma *valp)
19906 {
19907 if (elf32_arm_hash_table (info) == NULL)
19908 return false;
19909
19910 if (elf32_arm_hash_table (info)->root.target_os == is_vxworks
19911 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
19912 flagsp, secp, valp))
19913 return false;
19914
19915 return true;
19916 }
19917
19918 /* We use this to override swap_symbol_in and swap_symbol_out. */
19919 const struct elf_size_info elf32_arm_size_info =
19920 {
19921 sizeof (Elf32_External_Ehdr),
19922 sizeof (Elf32_External_Phdr),
19923 sizeof (Elf32_External_Shdr),
19924 sizeof (Elf32_External_Rel),
19925 sizeof (Elf32_External_Rela),
19926 sizeof (Elf32_External_Sym),
19927 sizeof (Elf32_External_Dyn),
19928 sizeof (Elf_External_Note),
19929 4,
19930 1,
19931 32, 2,
19932 ELFCLASS32, EV_CURRENT,
19933 bfd_elf32_write_out_phdrs,
19934 bfd_elf32_write_shdrs_and_ehdr,
19935 bfd_elf32_checksum_contents,
19936 bfd_elf32_write_relocs,
19937 elf32_arm_swap_symbol_in,
19938 elf32_arm_swap_symbol_out,
19939 bfd_elf32_slurp_reloc_table,
19940 bfd_elf32_slurp_symbol_table,
19941 bfd_elf32_swap_dyn_in,
19942 bfd_elf32_swap_dyn_out,
19943 bfd_elf32_swap_reloc_in,
19944 bfd_elf32_swap_reloc_out,
19945 bfd_elf32_swap_reloca_in,
19946 bfd_elf32_swap_reloca_out
19947 };
19948
19949 static bfd_vma
19950 read_code32 (const bfd *abfd, const bfd_byte *addr)
19951 {
19952 /* V7 BE8 code is always little endian. */
19953 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19954 return bfd_getl32 (addr);
19955
19956 return bfd_get_32 (abfd, addr);
19957 }
19958
19959 static bfd_vma
19960 read_code16 (const bfd *abfd, const bfd_byte *addr)
19961 {
19962 /* V7 BE8 code is always little endian. */
19963 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19964 return bfd_getl16 (addr);
19965
19966 return bfd_get_16 (abfd, addr);
19967 }
19968
19969 /* Return size of plt0 entry starting at ADDR
19970 or (bfd_vma) -1 if size can not be determined. */
19971
19972 static bfd_vma
19973 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
19974 {
19975 bfd_vma first_word;
19976 bfd_vma plt0_size;
19977
19978 first_word = read_code32 (abfd, addr);
19979
19980 if (first_word == elf32_arm_plt0_entry[0])
19981 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19982 else if (first_word == elf32_thumb2_plt0_entry[0])
19983 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19984 else
19985 /* We don't yet handle this PLT format. */
19986 return (bfd_vma) -1;
19987
19988 return plt0_size;
19989 }
19990
19991 /* Return size of plt entry starting at offset OFFSET
19992 of plt section located at address START
19993 or (bfd_vma) -1 if size can not be determined. */
19994
19995 static bfd_vma
19996 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
19997 {
19998 bfd_vma first_insn;
19999 bfd_vma plt_size = 0;
20000 const bfd_byte *addr = start + offset;
20001
20002 /* PLT entry size if fixed on Thumb-only platforms. */
20003 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
20004 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
20005
20006 /* Respect Thumb stub if necessary. */
20007 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
20008 {
20009 plt_size += 2 * ARRAY_SIZE (elf32_arm_plt_thumb_stub);
20010 }
20011
20012 /* Strip immediate from first add. */
20013 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
20014
20015 #ifdef FOUR_WORD_PLT
20016 if (first_insn == elf32_arm_plt_entry[0])
20017 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
20018 #else
20019 if (first_insn == elf32_arm_plt_entry_long[0])
20020 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
20021 else if (first_insn == elf32_arm_plt_entry_short[0])
20022 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
20023 #endif
20024 else
20025 /* We don't yet handle this PLT format. */
20026 return (bfd_vma) -1;
20027
20028 return plt_size;
20029 }
20030
20031 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
20032
20033 static long
20034 elf32_arm_get_synthetic_symtab (bfd *abfd,
20035 long symcount ATTRIBUTE_UNUSED,
20036 asymbol **syms ATTRIBUTE_UNUSED,
20037 long dynsymcount,
20038 asymbol **dynsyms,
20039 asymbol **ret)
20040 {
20041 asection *relplt;
20042 asymbol *s;
20043 arelent *p;
20044 long count, i, n;
20045 size_t size;
20046 Elf_Internal_Shdr *hdr;
20047 char *names;
20048 asection *plt;
20049 bfd_vma offset;
20050 bfd_byte *data;
20051
20052 *ret = NULL;
20053
20054 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
20055 return 0;
20056
20057 if (dynsymcount <= 0)
20058 return 0;
20059
20060 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
20061 if (relplt == NULL)
20062 return 0;
20063
20064 hdr = &elf_section_data (relplt)->this_hdr;
20065 if (hdr->sh_link != elf_dynsymtab (abfd)
20066 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
20067 return 0;
20068
20069 plt = bfd_get_section_by_name (abfd, ".plt");
20070 if (plt == NULL)
20071 return 0;
20072
20073 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, true))
20074 return -1;
20075
20076 data = plt->contents;
20077 if (data == NULL)
20078 {
20079 if (!bfd_get_full_section_contents (abfd, plt, &data)
20080 || data == NULL)
20081 return -1;
20082 plt->contents = data;
20083 plt->flags |= SEC_IN_MEMORY;
20084 }
20085
20086 count = NUM_SHDR_ENTRIES (hdr);
20087 size = count * sizeof (asymbol);
20088 p = relplt->relocation;
20089 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
20090 {
20091 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
20092 if (p->addend != 0)
20093 size += sizeof ("+0x") - 1 + 8;
20094 }
20095
20096 s = *ret = (asymbol *) bfd_malloc (size);
20097 if (s == NULL)
20098 return -1;
20099
20100 offset = elf32_arm_plt0_size (abfd, data);
20101 if (offset == (bfd_vma) -1)
20102 return -1;
20103
20104 names = (char *) (s + count);
20105 p = relplt->relocation;
20106 n = 0;
20107 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
20108 {
20109 size_t len;
20110
20111 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
20112 if (plt_size == (bfd_vma) -1)
20113 break;
20114
20115 *s = **p->sym_ptr_ptr;
20116 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
20117 we are defining a symbol, ensure one of them is set. */
20118 if ((s->flags & BSF_LOCAL) == 0)
20119 s->flags |= BSF_GLOBAL;
20120 s->flags |= BSF_SYNTHETIC;
20121 s->section = plt;
20122 s->value = offset;
20123 s->name = names;
20124 s->udata.p = NULL;
20125 len = strlen ((*p->sym_ptr_ptr)->name);
20126 memcpy (names, (*p->sym_ptr_ptr)->name, len);
20127 names += len;
20128 if (p->addend != 0)
20129 {
20130 char buf[30], *a;
20131
20132 memcpy (names, "+0x", sizeof ("+0x") - 1);
20133 names += sizeof ("+0x") - 1;
20134 bfd_sprintf_vma (abfd, buf, p->addend);
20135 for (a = buf; *a == '0'; ++a)
20136 ;
20137 len = strlen (a);
20138 memcpy (names, a, len);
20139 names += len;
20140 }
20141 memcpy (names, "@plt", sizeof ("@plt"));
20142 names += sizeof ("@plt");
20143 ++s, ++n;
20144 offset += plt_size;
20145 }
20146
20147 return n;
20148 }
20149
20150 static bool
20151 elf32_arm_section_flags (const Elf_Internal_Shdr *hdr)
20152 {
20153 if (hdr->sh_flags & SHF_ARM_PURECODE)
20154 hdr->bfd_section->flags |= SEC_ELF_PURECODE;
20155 return true;
20156 }
20157
20158 static flagword
20159 elf32_arm_lookup_section_flags (char *flag_name)
20160 {
20161 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
20162 return SHF_ARM_PURECODE;
20163
20164 return SEC_NO_FLAGS;
20165 }
20166
20167 static unsigned int
20168 elf32_arm_count_additional_relocs (asection *sec)
20169 {
20170 struct _arm_elf_section_data *arm_data;
20171 arm_data = get_arm_elf_section_data (sec);
20172
20173 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
20174 }
20175
20176 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
20177 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
20178 FALSE otherwise. ISECTION is the best guess matching section from the
20179 input bfd IBFD, but it might be NULL. */
20180
20181 static bool
20182 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
20183 bfd *obfd ATTRIBUTE_UNUSED,
20184 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
20185 Elf_Internal_Shdr *osection)
20186 {
20187 switch (osection->sh_type)
20188 {
20189 case SHT_ARM_EXIDX:
20190 {
20191 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
20192 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
20193 unsigned i = 0;
20194
20195 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
20196 osection->sh_info = 0;
20197
20198 /* The sh_link field must be set to the text section associated with
20199 this index section. Unfortunately the ARM EHABI does not specify
20200 exactly how to determine this association. Our caller does try
20201 to match up OSECTION with its corresponding input section however
20202 so that is a good first guess. */
20203 if (isection != NULL
20204 && osection->bfd_section != NULL
20205 && isection->bfd_section != NULL
20206 && isection->bfd_section->output_section != NULL
20207 && isection->bfd_section->output_section == osection->bfd_section
20208 && iheaders != NULL
20209 && isection->sh_link > 0
20210 && isection->sh_link < elf_numsections (ibfd)
20211 && iheaders[isection->sh_link]->bfd_section != NULL
20212 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
20213 )
20214 {
20215 for (i = elf_numsections (obfd); i-- > 0;)
20216 if (oheaders[i]->bfd_section
20217 == iheaders[isection->sh_link]->bfd_section->output_section)
20218 break;
20219 }
20220
20221 if (i == 0)
20222 {
20223 /* Failing that we have to find a matching section ourselves. If
20224 we had the output section name available we could compare that
20225 with input section names. Unfortunately we don't. So instead
20226 we use a simple heuristic and look for the nearest executable
20227 section before this one. */
20228 for (i = elf_numsections (obfd); i-- > 0;)
20229 if (oheaders[i] == osection)
20230 break;
20231 if (i == 0)
20232 break;
20233
20234 while (i-- > 0)
20235 if (oheaders[i]->sh_type == SHT_PROGBITS
20236 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
20237 == (SHF_ALLOC | SHF_EXECINSTR))
20238 break;
20239 }
20240
20241 if (i)
20242 {
20243 osection->sh_link = i;
20244 /* If the text section was part of a group
20245 then the index section should be too. */
20246 if (oheaders[i]->sh_flags & SHF_GROUP)
20247 osection->sh_flags |= SHF_GROUP;
20248 return true;
20249 }
20250 }
20251 break;
20252
20253 case SHT_ARM_PREEMPTMAP:
20254 osection->sh_flags = SHF_ALLOC;
20255 break;
20256
20257 case SHT_ARM_ATTRIBUTES:
20258 case SHT_ARM_DEBUGOVERLAY:
20259 case SHT_ARM_OVERLAYSECTION:
20260 default:
20261 break;
20262 }
20263
20264 return false;
20265 }
20266
20267 /* Returns TRUE if NAME is an ARM mapping symbol.
20268 Traditionally the symbols $a, $d and $t have been used.
20269 The ARM ELF standard also defines $x (for A64 code). It also allows a
20270 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
20271 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
20272 not support them here. $t.x indicates the start of ThumbEE instructions. */
20273
20274 static bool
20275 is_arm_mapping_symbol (const char * name)
20276 {
20277 return name != NULL /* Paranoia. */
20278 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
20279 the mapping symbols could have acquired a prefix.
20280 We do not support this here, since such symbols no
20281 longer conform to the ARM ELF ABI. */
20282 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
20283 && (name[2] == 0 || name[2] == '.');
20284 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
20285 any characters that follow the period are legal characters for the body
20286 of a symbol's name. For now we just assume that this is the case. */
20287 }
20288
20289 /* Make sure that mapping symbols in object files are not removed via the
20290 "strip --strip-unneeded" tool. These symbols are needed in order to
20291 correctly generate interworking veneers, and for byte swapping code
20292 regions. Once an object file has been linked, it is safe to remove the
20293 symbols as they will no longer be needed. */
20294
20295 static void
20296 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
20297 {
20298 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
20299 && sym->section != bfd_abs_section_ptr
20300 && is_arm_mapping_symbol (sym->name))
20301 sym->flags |= BSF_KEEP;
20302 }
20303
20304 #undef elf_backend_copy_special_section_fields
20305 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
20306
20307 #define ELF_ARCH bfd_arch_arm
20308 #define ELF_TARGET_ID ARM_ELF_DATA
20309 #define ELF_MACHINE_CODE EM_ARM
20310 #define ELF_MAXPAGESIZE 0x1000
20311 #define ELF_COMMONPAGESIZE 0x1000
20312
20313 #define bfd_elf32_mkobject elf32_arm_mkobject
20314
20315 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
20316 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
20317 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
20318 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
20319 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
20320 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
20321 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
20322 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
20323 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
20324 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
20325 #define bfd_elf32_bfd_final_link elf32_arm_final_link
20326 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
20327
20328 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
20329 #define elf_backend_maybe_function_sym elf32_arm_maybe_function_sym
20330 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
20331 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
20332 #define elf_backend_check_relocs elf32_arm_check_relocs
20333 #define elf_backend_update_relocs elf32_arm_update_relocs
20334 #define elf_backend_relocate_section elf32_arm_relocate_section
20335 #define elf_backend_write_section elf32_arm_write_section
20336 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
20337 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
20338 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
20339 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
20340 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
20341 #define elf_backend_always_size_sections elf32_arm_always_size_sections
20342 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
20343 #define elf_backend_init_file_header elf32_arm_init_file_header
20344 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
20345 #define elf_backend_object_p elf32_arm_object_p
20346 #define elf_backend_fake_sections elf32_arm_fake_sections
20347 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
20348 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20349 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
20350 #define elf_backend_size_info elf32_arm_size_info
20351 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20352 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
20353 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
20354 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
20355 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
20356 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
20357 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
20358 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
20359
20360 #define elf_backend_can_refcount 1
20361 #define elf_backend_can_gc_sections 1
20362 #define elf_backend_plt_readonly 1
20363 #define elf_backend_want_got_plt 1
20364 #define elf_backend_want_plt_sym 0
20365 #define elf_backend_want_dynrelro 1
20366 #define elf_backend_may_use_rel_p 1
20367 #define elf_backend_may_use_rela_p 0
20368 #define elf_backend_default_use_rela_p 0
20369 #define elf_backend_dtrel_excludes_plt 1
20370
20371 #define elf_backend_got_header_size 12
20372 #define elf_backend_extern_protected_data 0
20373
20374 #undef elf_backend_obj_attrs_vendor
20375 #define elf_backend_obj_attrs_vendor "aeabi"
20376 #undef elf_backend_obj_attrs_section
20377 #define elf_backend_obj_attrs_section ".ARM.attributes"
20378 #undef elf_backend_obj_attrs_arg_type
20379 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
20380 #undef elf_backend_obj_attrs_section_type
20381 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
20382 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
20383 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
20384
20385 #undef elf_backend_section_flags
20386 #define elf_backend_section_flags elf32_arm_section_flags
20387 #undef elf_backend_lookup_section_flags_hook
20388 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20389
20390 #define elf_backend_linux_prpsinfo32_ugid16 true
20391
20392 #include "elf32-target.h"
20393
20394 /* Native Client targets. */
20395
20396 #undef TARGET_LITTLE_SYM
20397 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
20398 #undef TARGET_LITTLE_NAME
20399 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
20400 #undef TARGET_BIG_SYM
20401 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
20402 #undef TARGET_BIG_NAME
20403 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
20404
20405 /* Like elf32_arm_link_hash_table_create -- but overrides
20406 appropriately for NaCl. */
20407
20408 static struct bfd_link_hash_table *
20409 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
20410 {
20411 struct bfd_link_hash_table *ret;
20412
20413 ret = elf32_arm_link_hash_table_create (abfd);
20414 if (ret)
20415 {
20416 struct elf32_arm_link_hash_table *htab
20417 = (struct elf32_arm_link_hash_table *) ret;
20418
20419 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
20420 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
20421 }
20422 return ret;
20423 }
20424
20425 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
20426 really need to use elf32_arm_modify_segment_map. But we do it
20427 anyway just to reduce gratuitous differences with the stock ARM backend. */
20428
20429 static bool
20430 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
20431 {
20432 return (elf32_arm_modify_segment_map (abfd, info)
20433 && nacl_modify_segment_map (abfd, info));
20434 }
20435
20436 static bool
20437 elf32_arm_nacl_final_write_processing (bfd *abfd)
20438 {
20439 arm_final_write_processing (abfd);
20440 return nacl_final_write_processing (abfd);
20441 }
20442
20443 static bfd_vma
20444 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
20445 const arelent *rel ATTRIBUTE_UNUSED)
20446 {
20447 return plt->vma
20448 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
20449 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
20450 }
20451
20452 #undef elf32_bed
20453 #define elf32_bed elf32_arm_nacl_bed
20454 #undef bfd_elf32_bfd_link_hash_table_create
20455 #define bfd_elf32_bfd_link_hash_table_create \
20456 elf32_arm_nacl_link_hash_table_create
20457 #undef elf_backend_plt_alignment
20458 #define elf_backend_plt_alignment 4
20459 #undef elf_backend_modify_segment_map
20460 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
20461 #undef elf_backend_modify_headers
20462 #define elf_backend_modify_headers nacl_modify_headers
20463 #undef elf_backend_final_write_processing
20464 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
20465 #undef bfd_elf32_get_synthetic_symtab
20466 #undef elf_backend_plt_sym_val
20467 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
20468 #undef elf_backend_copy_special_section_fields
20469
20470 #undef ELF_MINPAGESIZE
20471 #undef ELF_COMMONPAGESIZE
20472
20473 #undef ELF_TARGET_OS
20474 #define ELF_TARGET_OS is_nacl
20475
20476 #include "elf32-target.h"
20477
20478 /* Reset to defaults. */
20479 #undef elf_backend_plt_alignment
20480 #undef elf_backend_modify_segment_map
20481 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20482 #undef elf_backend_modify_headers
20483 #undef elf_backend_final_write_processing
20484 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20485 #undef ELF_MINPAGESIZE
20486 #undef ELF_COMMONPAGESIZE
20487 #define ELF_COMMONPAGESIZE 0x1000
20488
20489
20490 /* FDPIC Targets. */
20491
20492 #undef TARGET_LITTLE_SYM
20493 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
20494 #undef TARGET_LITTLE_NAME
20495 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
20496 #undef TARGET_BIG_SYM
20497 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
20498 #undef TARGET_BIG_NAME
20499 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
20500 #undef elf_match_priority
20501 #define elf_match_priority 128
20502 #undef ELF_OSABI
20503 #define ELF_OSABI ELFOSABI_ARM_FDPIC
20504
20505 /* Like elf32_arm_link_hash_table_create -- but overrides
20506 appropriately for FDPIC. */
20507
20508 static struct bfd_link_hash_table *
20509 elf32_arm_fdpic_link_hash_table_create (bfd *abfd)
20510 {
20511 struct bfd_link_hash_table *ret;
20512
20513 ret = elf32_arm_link_hash_table_create (abfd);
20514 if (ret)
20515 {
20516 struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret;
20517
20518 htab->fdpic_p = 1;
20519 }
20520 return ret;
20521 }
20522
20523 /* We need dynamic symbols for every section, since segments can
20524 relocate independently. */
20525 static bool
20526 elf32_arm_fdpic_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED,
20527 struct bfd_link_info *info
20528 ATTRIBUTE_UNUSED,
20529 asection *p ATTRIBUTE_UNUSED)
20530 {
20531 switch (elf_section_data (p)->this_hdr.sh_type)
20532 {
20533 case SHT_PROGBITS:
20534 case SHT_NOBITS:
20535 /* If sh_type is yet undecided, assume it could be
20536 SHT_PROGBITS/SHT_NOBITS. */
20537 case SHT_NULL:
20538 return false;
20539
20540 /* There shouldn't be section relative relocations
20541 against any other section. */
20542 default:
20543 return true;
20544 }
20545 }
20546
20547 #undef elf32_bed
20548 #define elf32_bed elf32_arm_fdpic_bed
20549
20550 #undef bfd_elf32_bfd_link_hash_table_create
20551 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
20552
20553 #undef elf_backend_omit_section_dynsym
20554 #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym
20555
20556 #undef ELF_TARGET_OS
20557
20558 #include "elf32-target.h"
20559
20560 #undef elf_match_priority
20561 #undef ELF_OSABI
20562 #undef elf_backend_omit_section_dynsym
20563
20564 /* VxWorks Targets. */
20565
20566 #undef TARGET_LITTLE_SYM
20567 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
20568 #undef TARGET_LITTLE_NAME
20569 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
20570 #undef TARGET_BIG_SYM
20571 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
20572 #undef TARGET_BIG_NAME
20573 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
20574
20575 /* Like elf32_arm_link_hash_table_create -- but overrides
20576 appropriately for VxWorks. */
20577
20578 static struct bfd_link_hash_table *
20579 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
20580 {
20581 struct bfd_link_hash_table *ret;
20582
20583 ret = elf32_arm_link_hash_table_create (abfd);
20584 if (ret)
20585 {
20586 struct elf32_arm_link_hash_table *htab
20587 = (struct elf32_arm_link_hash_table *) ret;
20588 htab->use_rel = 0;
20589 }
20590 return ret;
20591 }
20592
20593 static bool
20594 elf32_arm_vxworks_final_write_processing (bfd *abfd)
20595 {
20596 arm_final_write_processing (abfd);
20597 return elf_vxworks_final_write_processing (abfd);
20598 }
20599
20600 #undef elf32_bed
20601 #define elf32_bed elf32_arm_vxworks_bed
20602
20603 #undef bfd_elf32_bfd_link_hash_table_create
20604 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
20605 #undef elf_backend_final_write_processing
20606 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
20607 #undef elf_backend_emit_relocs
20608 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
20609
20610 #undef elf_backend_may_use_rel_p
20611 #define elf_backend_may_use_rel_p 0
20612 #undef elf_backend_may_use_rela_p
20613 #define elf_backend_may_use_rela_p 1
20614 #undef elf_backend_default_use_rela_p
20615 #define elf_backend_default_use_rela_p 1
20616 #undef elf_backend_want_plt_sym
20617 #define elf_backend_want_plt_sym 1
20618 #undef ELF_MAXPAGESIZE
20619 #define ELF_MAXPAGESIZE 0x1000
20620 #undef ELF_TARGET_OS
20621 #define ELF_TARGET_OS is_vxworks
20622
20623 #include "elf32-target.h"
20624
20625
20626 /* Merge backend specific data from an object file to the output
20627 object file when linking. */
20628
20629 static bool
20630 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
20631 {
20632 bfd *obfd = info->output_bfd;
20633 flagword out_flags;
20634 flagword in_flags;
20635 bool flags_compatible = true;
20636 asection *sec;
20637
20638 /* Check if we have the same endianness. */
20639 if (! _bfd_generic_verify_endian_match (ibfd, info))
20640 return false;
20641
20642 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
20643 return true;
20644
20645 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
20646 return false;
20647
20648 /* The input BFD must have had its flags initialised. */
20649 /* The following seems bogus to me -- The flags are initialized in
20650 the assembler but I don't think an elf_flags_init field is
20651 written into the object. */
20652 /* BFD_ASSERT (elf_flags_init (ibfd)); */
20653
20654 in_flags = elf_elfheader (ibfd)->e_flags;
20655 out_flags = elf_elfheader (obfd)->e_flags;
20656
20657 /* In theory there is no reason why we couldn't handle this. However
20658 in practice it isn't even close to working and there is no real
20659 reason to want it. */
20660 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
20661 && !(ibfd->flags & DYNAMIC)
20662 && (in_flags & EF_ARM_BE8))
20663 {
20664 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20665 ibfd);
20666 return false;
20667 }
20668
20669 if (!elf_flags_init (obfd))
20670 {
20671 /* If the input is the default architecture and had the default
20672 flags then do not bother setting the flags for the output
20673 architecture, instead allow future merges to do this. If no
20674 future merges ever set these flags then they will retain their
20675 uninitialised values, which surprise surprise, correspond
20676 to the default values. */
20677 if (bfd_get_arch_info (ibfd)->the_default
20678 && elf_elfheader (ibfd)->e_flags == 0)
20679 return true;
20680
20681 elf_flags_init (obfd) = true;
20682 elf_elfheader (obfd)->e_flags = in_flags;
20683
20684 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
20685 && bfd_get_arch_info (obfd)->the_default)
20686 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
20687
20688 return true;
20689 }
20690
20691 /* Determine what should happen if the input ARM architecture
20692 does not match the output ARM architecture. */
20693 if (! bfd_arm_merge_machines (ibfd, obfd))
20694 return false;
20695
20696 /* Identical flags must be compatible. */
20697 if (in_flags == out_flags)
20698 return true;
20699
20700 /* Check to see if the input BFD actually contains any sections. If
20701 not, its flags may not have been initialised either, but it
20702 cannot actually cause any incompatiblity. Do not short-circuit
20703 dynamic objects; their section list may be emptied by
20704 elf_link_add_object_symbols.
20705
20706 Also check to see if there are no code sections in the input.
20707 In this case there is no need to check for code specific flags.
20708 XXX - do we need to worry about floating-point format compatability
20709 in data sections ? */
20710 if (!(ibfd->flags & DYNAMIC))
20711 {
20712 bool null_input_bfd = true;
20713 bool only_data_sections = true;
20714
20715 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
20716 {
20717 /* Ignore synthetic glue sections. */
20718 if (strcmp (sec->name, ".glue_7")
20719 && strcmp (sec->name, ".glue_7t"))
20720 {
20721 if ((bfd_section_flags (sec)
20722 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20723 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20724 only_data_sections = false;
20725
20726 null_input_bfd = false;
20727 break;
20728 }
20729 }
20730
20731 if (null_input_bfd || only_data_sections)
20732 return true;
20733 }
20734
20735 /* Complain about various flag mismatches. */
20736 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
20737 EF_ARM_EABI_VERSION (out_flags)))
20738 {
20739 _bfd_error_handler
20740 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20741 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
20742 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
20743 return false;
20744 }
20745
20746 /* Not sure what needs to be checked for EABI versions >= 1. */
20747 /* VxWorks libraries do not use these flags. */
20748 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
20749 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
20750 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
20751 {
20752 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
20753 {
20754 _bfd_error_handler
20755 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20756 ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
20757 obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
20758 flags_compatible = false;
20759 }
20760
20761 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
20762 {
20763 if (in_flags & EF_ARM_APCS_FLOAT)
20764 _bfd_error_handler
20765 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20766 ibfd, obfd);
20767 else
20768 _bfd_error_handler
20769 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20770 ibfd, obfd);
20771
20772 flags_compatible = false;
20773 }
20774
20775 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
20776 {
20777 if (in_flags & EF_ARM_VFP_FLOAT)
20778 _bfd_error_handler
20779 (_("error: %pB uses %s instructions, whereas %pB does not"),
20780 ibfd, "VFP", obfd);
20781 else
20782 _bfd_error_handler
20783 (_("error: %pB uses %s instructions, whereas %pB does not"),
20784 ibfd, "FPA", obfd);
20785
20786 flags_compatible = false;
20787 }
20788
20789 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
20790 {
20791 if (in_flags & EF_ARM_MAVERICK_FLOAT)
20792 _bfd_error_handler
20793 (_("error: %pB uses %s instructions, whereas %pB does not"),
20794 ibfd, "Maverick", obfd);
20795 else
20796 _bfd_error_handler
20797 (_("error: %pB does not use %s instructions, whereas %pB does"),
20798 ibfd, "Maverick", obfd);
20799
20800 flags_compatible = false;
20801 }
20802
20803 #ifdef EF_ARM_SOFT_FLOAT
20804 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
20805 {
20806 /* We can allow interworking between code that is VFP format
20807 layout, and uses either soft float or integer regs for
20808 passing floating point arguments and results. We already
20809 know that the APCS_FLOAT flags match; similarly for VFP
20810 flags. */
20811 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
20812 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
20813 {
20814 if (in_flags & EF_ARM_SOFT_FLOAT)
20815 _bfd_error_handler
20816 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20817 ibfd, obfd);
20818 else
20819 _bfd_error_handler
20820 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20821 ibfd, obfd);
20822
20823 flags_compatible = false;
20824 }
20825 }
20826 #endif
20827
20828 /* Interworking mismatch is only a warning. */
20829 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
20830 {
20831 if (in_flags & EF_ARM_INTERWORK)
20832 {
20833 _bfd_error_handler
20834 (_("warning: %pB supports interworking, whereas %pB does not"),
20835 ibfd, obfd);
20836 }
20837 else
20838 {
20839 _bfd_error_handler
20840 (_("warning: %pB does not support interworking, whereas %pB does"),
20841 ibfd, obfd);
20842 }
20843 }
20844 }
20845
20846 return flags_compatible;
20847 }
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