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arm: correctly decode Tag_THUMB_ISA_use=3 for thumb2 features
[thirdparty/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2021 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "libiberty.h"
26 #include "libbfd.h"
27 #include "elf-bfd.h"
28 #include "elf-nacl.h"
29 #include "elf-vxworks.h"
30 #include "elf/arm.h"
31 #include "elf32-arm.h"
32 #include "cpu-arm.h"
33
34 /* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36 #define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38
39 /* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41 #define RELOC_SIZE(HTAB) \
42 ((HTAB)->use_rel \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
45
46 /* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48 #define SWAP_RELOC_IN(HTAB) \
49 ((HTAB)->use_rel \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
52
53 /* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55 #define SWAP_RELOC_OUT(HTAB) \
56 ((HTAB)->use_rel \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
59
60 #define elf_info_to_howto NULL
61 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62
63 #define ARM_ELF_ABI_VERSION 0
64 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65
66 /* The Adjusted Place, as defined by AAELF. */
67 #define Pa(X) ((X) & 0xfffffffc)
68
69 static bool elf32_arm_write_section (bfd *output_bfd,
70 struct bfd_link_info *link_info,
71 asection *sec,
72 bfd_byte *contents);
73
74 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
75 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
76 in that slot. */
77
78 static reloc_howto_type elf32_arm_howto_table_1[] =
79 {
80 /* No relocation. */
81 HOWTO (R_ARM_NONE, /* type */
82 0, /* rightshift */
83 3, /* size (0 = byte, 1 = short, 2 = long) */
84 0, /* bitsize */
85 false, /* pc_relative */
86 0, /* bitpos */
87 complain_overflow_dont,/* complain_on_overflow */
88 bfd_elf_generic_reloc, /* special_function */
89 "R_ARM_NONE", /* name */
90 false, /* partial_inplace */
91 0, /* src_mask */
92 0, /* dst_mask */
93 false), /* pcrel_offset */
94
95 HOWTO (R_ARM_PC24, /* type */
96 2, /* rightshift */
97 2, /* size (0 = byte, 1 = short, 2 = long) */
98 24, /* bitsize */
99 true, /* pc_relative */
100 0, /* bitpos */
101 complain_overflow_signed,/* complain_on_overflow */
102 bfd_elf_generic_reloc, /* special_function */
103 "R_ARM_PC24", /* name */
104 false, /* partial_inplace */
105 0x00ffffff, /* src_mask */
106 0x00ffffff, /* dst_mask */
107 true), /* pcrel_offset */
108
109 /* 32 bit absolute */
110 HOWTO (R_ARM_ABS32, /* type */
111 0, /* rightshift */
112 2, /* size (0 = byte, 1 = short, 2 = long) */
113 32, /* bitsize */
114 false, /* pc_relative */
115 0, /* bitpos */
116 complain_overflow_bitfield,/* complain_on_overflow */
117 bfd_elf_generic_reloc, /* special_function */
118 "R_ARM_ABS32", /* name */
119 false, /* partial_inplace */
120 0xffffffff, /* src_mask */
121 0xffffffff, /* dst_mask */
122 false), /* pcrel_offset */
123
124 /* standard 32bit pc-relative reloc */
125 HOWTO (R_ARM_REL32, /* type */
126 0, /* rightshift */
127 2, /* size (0 = byte, 1 = short, 2 = long) */
128 32, /* bitsize */
129 true, /* pc_relative */
130 0, /* bitpos */
131 complain_overflow_bitfield,/* complain_on_overflow */
132 bfd_elf_generic_reloc, /* special_function */
133 "R_ARM_REL32", /* name */
134 false, /* partial_inplace */
135 0xffffffff, /* src_mask */
136 0xffffffff, /* dst_mask */
137 true), /* pcrel_offset */
138
139 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
140 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* rightshift */
142 0, /* size (0 = byte, 1 = short, 2 = long) */
143 32, /* bitsize */
144 true, /* pc_relative */
145 0, /* bitpos */
146 complain_overflow_dont,/* complain_on_overflow */
147 bfd_elf_generic_reloc, /* special_function */
148 "R_ARM_LDR_PC_G0", /* name */
149 false, /* partial_inplace */
150 0xffffffff, /* src_mask */
151 0xffffffff, /* dst_mask */
152 true), /* pcrel_offset */
153
154 /* 16 bit absolute */
155 HOWTO (R_ARM_ABS16, /* type */
156 0, /* rightshift */
157 1, /* size (0 = byte, 1 = short, 2 = long) */
158 16, /* bitsize */
159 false, /* pc_relative */
160 0, /* bitpos */
161 complain_overflow_bitfield,/* complain_on_overflow */
162 bfd_elf_generic_reloc, /* special_function */
163 "R_ARM_ABS16", /* name */
164 false, /* partial_inplace */
165 0x0000ffff, /* src_mask */
166 0x0000ffff, /* dst_mask */
167 false), /* pcrel_offset */
168
169 /* 12 bit absolute */
170 HOWTO (R_ARM_ABS12, /* type */
171 0, /* rightshift */
172 2, /* size (0 = byte, 1 = short, 2 = long) */
173 12, /* bitsize */
174 false, /* pc_relative */
175 0, /* bitpos */
176 complain_overflow_bitfield,/* complain_on_overflow */
177 bfd_elf_generic_reloc, /* special_function */
178 "R_ARM_ABS12", /* name */
179 false, /* partial_inplace */
180 0x00000fff, /* src_mask */
181 0x00000fff, /* dst_mask */
182 false), /* pcrel_offset */
183
184 HOWTO (R_ARM_THM_ABS5, /* type */
185 6, /* rightshift */
186 1, /* size (0 = byte, 1 = short, 2 = long) */
187 5, /* bitsize */
188 false, /* pc_relative */
189 0, /* bitpos */
190 complain_overflow_bitfield,/* complain_on_overflow */
191 bfd_elf_generic_reloc, /* special_function */
192 "R_ARM_THM_ABS5", /* name */
193 false, /* partial_inplace */
194 0x000007e0, /* src_mask */
195 0x000007e0, /* dst_mask */
196 false), /* pcrel_offset */
197
198 /* 8 bit absolute */
199 HOWTO (R_ARM_ABS8, /* type */
200 0, /* rightshift */
201 0, /* size (0 = byte, 1 = short, 2 = long) */
202 8, /* bitsize */
203 false, /* pc_relative */
204 0, /* bitpos */
205 complain_overflow_bitfield,/* complain_on_overflow */
206 bfd_elf_generic_reloc, /* special_function */
207 "R_ARM_ABS8", /* name */
208 false, /* partial_inplace */
209 0x000000ff, /* src_mask */
210 0x000000ff, /* dst_mask */
211 false), /* pcrel_offset */
212
213 HOWTO (R_ARM_SBREL32, /* type */
214 0, /* rightshift */
215 2, /* size (0 = byte, 1 = short, 2 = long) */
216 32, /* bitsize */
217 false, /* pc_relative */
218 0, /* bitpos */
219 complain_overflow_dont,/* complain_on_overflow */
220 bfd_elf_generic_reloc, /* special_function */
221 "R_ARM_SBREL32", /* name */
222 false, /* partial_inplace */
223 0xffffffff, /* src_mask */
224 0xffffffff, /* dst_mask */
225 false), /* pcrel_offset */
226
227 HOWTO (R_ARM_THM_CALL, /* type */
228 1, /* rightshift */
229 2, /* size (0 = byte, 1 = short, 2 = long) */
230 24, /* bitsize */
231 true, /* pc_relative */
232 0, /* bitpos */
233 complain_overflow_signed,/* complain_on_overflow */
234 bfd_elf_generic_reloc, /* special_function */
235 "R_ARM_THM_CALL", /* name */
236 false, /* partial_inplace */
237 0x07ff2fff, /* src_mask */
238 0x07ff2fff, /* dst_mask */
239 true), /* pcrel_offset */
240
241 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* rightshift */
243 1, /* size (0 = byte, 1 = short, 2 = long) */
244 8, /* bitsize */
245 true, /* pc_relative */
246 0, /* bitpos */
247 complain_overflow_signed,/* complain_on_overflow */
248 bfd_elf_generic_reloc, /* special_function */
249 "R_ARM_THM_PC8", /* name */
250 false, /* partial_inplace */
251 0x000000ff, /* src_mask */
252 0x000000ff, /* dst_mask */
253 true), /* pcrel_offset */
254
255 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* rightshift */
257 1, /* size (0 = byte, 1 = short, 2 = long) */
258 32, /* bitsize */
259 false, /* pc_relative */
260 0, /* bitpos */
261 complain_overflow_signed,/* complain_on_overflow */
262 bfd_elf_generic_reloc, /* special_function */
263 "R_ARM_BREL_ADJ", /* name */
264 false, /* partial_inplace */
265 0xffffffff, /* src_mask */
266 0xffffffff, /* dst_mask */
267 false), /* pcrel_offset */
268
269 HOWTO (R_ARM_TLS_DESC, /* type */
270 0, /* rightshift */
271 2, /* size (0 = byte, 1 = short, 2 = long) */
272 32, /* bitsize */
273 false, /* pc_relative */
274 0, /* bitpos */
275 complain_overflow_bitfield,/* complain_on_overflow */
276 bfd_elf_generic_reloc, /* special_function */
277 "R_ARM_TLS_DESC", /* name */
278 false, /* partial_inplace */
279 0xffffffff, /* src_mask */
280 0xffffffff, /* dst_mask */
281 false), /* pcrel_offset */
282
283 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* rightshift */
285 0, /* size (0 = byte, 1 = short, 2 = long) */
286 0, /* bitsize */
287 false, /* pc_relative */
288 0, /* bitpos */
289 complain_overflow_signed,/* complain_on_overflow */
290 bfd_elf_generic_reloc, /* special_function */
291 "R_ARM_SWI8", /* name */
292 false, /* partial_inplace */
293 0x00000000, /* src_mask */
294 0x00000000, /* dst_mask */
295 false), /* pcrel_offset */
296
297 /* BLX instruction for the ARM. */
298 HOWTO (R_ARM_XPC25, /* type */
299 2, /* rightshift */
300 2, /* size (0 = byte, 1 = short, 2 = long) */
301 24, /* bitsize */
302 true, /* pc_relative */
303 0, /* bitpos */
304 complain_overflow_signed,/* complain_on_overflow */
305 bfd_elf_generic_reloc, /* special_function */
306 "R_ARM_XPC25", /* name */
307 false, /* partial_inplace */
308 0x00ffffff, /* src_mask */
309 0x00ffffff, /* dst_mask */
310 true), /* pcrel_offset */
311
312 /* BLX instruction for the Thumb. */
313 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* rightshift */
315 2, /* size (0 = byte, 1 = short, 2 = long) */
316 24, /* bitsize */
317 true, /* pc_relative */
318 0, /* bitpos */
319 complain_overflow_signed,/* complain_on_overflow */
320 bfd_elf_generic_reloc, /* special_function */
321 "R_ARM_THM_XPC22", /* name */
322 false, /* partial_inplace */
323 0x07ff2fff, /* src_mask */
324 0x07ff2fff, /* dst_mask */
325 true), /* pcrel_offset */
326
327 /* Dynamic TLS relocations. */
328
329 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 0, /* rightshift */
331 2, /* size (0 = byte, 1 = short, 2 = long) */
332 32, /* bitsize */
333 false, /* pc_relative */
334 0, /* bitpos */
335 complain_overflow_bitfield,/* complain_on_overflow */
336 bfd_elf_generic_reloc, /* special_function */
337 "R_ARM_TLS_DTPMOD32", /* name */
338 true, /* partial_inplace */
339 0xffffffff, /* src_mask */
340 0xffffffff, /* dst_mask */
341 false), /* pcrel_offset */
342
343 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 0, /* rightshift */
345 2, /* size (0 = byte, 1 = short, 2 = long) */
346 32, /* bitsize */
347 false, /* pc_relative */
348 0, /* bitpos */
349 complain_overflow_bitfield,/* complain_on_overflow */
350 bfd_elf_generic_reloc, /* special_function */
351 "R_ARM_TLS_DTPOFF32", /* name */
352 true, /* partial_inplace */
353 0xffffffff, /* src_mask */
354 0xffffffff, /* dst_mask */
355 false), /* pcrel_offset */
356
357 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 0, /* rightshift */
359 2, /* size (0 = byte, 1 = short, 2 = long) */
360 32, /* bitsize */
361 false, /* pc_relative */
362 0, /* bitpos */
363 complain_overflow_bitfield,/* complain_on_overflow */
364 bfd_elf_generic_reloc, /* special_function */
365 "R_ARM_TLS_TPOFF32", /* name */
366 true, /* partial_inplace */
367 0xffffffff, /* src_mask */
368 0xffffffff, /* dst_mask */
369 false), /* pcrel_offset */
370
371 /* Relocs used in ARM Linux */
372
373 HOWTO (R_ARM_COPY, /* type */
374 0, /* rightshift */
375 2, /* size (0 = byte, 1 = short, 2 = long) */
376 32, /* bitsize */
377 false, /* pc_relative */
378 0, /* bitpos */
379 complain_overflow_bitfield,/* complain_on_overflow */
380 bfd_elf_generic_reloc, /* special_function */
381 "R_ARM_COPY", /* name */
382 true, /* partial_inplace */
383 0xffffffff, /* src_mask */
384 0xffffffff, /* dst_mask */
385 false), /* pcrel_offset */
386
387 HOWTO (R_ARM_GLOB_DAT, /* type */
388 0, /* rightshift */
389 2, /* size (0 = byte, 1 = short, 2 = long) */
390 32, /* bitsize */
391 false, /* pc_relative */
392 0, /* bitpos */
393 complain_overflow_bitfield,/* complain_on_overflow */
394 bfd_elf_generic_reloc, /* special_function */
395 "R_ARM_GLOB_DAT", /* name */
396 true, /* partial_inplace */
397 0xffffffff, /* src_mask */
398 0xffffffff, /* dst_mask */
399 false), /* pcrel_offset */
400
401 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 0, /* rightshift */
403 2, /* size (0 = byte, 1 = short, 2 = long) */
404 32, /* bitsize */
405 false, /* pc_relative */
406 0, /* bitpos */
407 complain_overflow_bitfield,/* complain_on_overflow */
408 bfd_elf_generic_reloc, /* special_function */
409 "R_ARM_JUMP_SLOT", /* name */
410 true, /* partial_inplace */
411 0xffffffff, /* src_mask */
412 0xffffffff, /* dst_mask */
413 false), /* pcrel_offset */
414
415 HOWTO (R_ARM_RELATIVE, /* type */
416 0, /* rightshift */
417 2, /* size (0 = byte, 1 = short, 2 = long) */
418 32, /* bitsize */
419 false, /* pc_relative */
420 0, /* bitpos */
421 complain_overflow_bitfield,/* complain_on_overflow */
422 bfd_elf_generic_reloc, /* special_function */
423 "R_ARM_RELATIVE", /* name */
424 true, /* partial_inplace */
425 0xffffffff, /* src_mask */
426 0xffffffff, /* dst_mask */
427 false), /* pcrel_offset */
428
429 HOWTO (R_ARM_GOTOFF32, /* type */
430 0, /* rightshift */
431 2, /* size (0 = byte, 1 = short, 2 = long) */
432 32, /* bitsize */
433 false, /* pc_relative */
434 0, /* bitpos */
435 complain_overflow_bitfield,/* complain_on_overflow */
436 bfd_elf_generic_reloc, /* special_function */
437 "R_ARM_GOTOFF32", /* name */
438 true, /* partial_inplace */
439 0xffffffff, /* src_mask */
440 0xffffffff, /* dst_mask */
441 false), /* pcrel_offset */
442
443 HOWTO (R_ARM_GOTPC, /* type */
444 0, /* rightshift */
445 2, /* size (0 = byte, 1 = short, 2 = long) */
446 32, /* bitsize */
447 true, /* pc_relative */
448 0, /* bitpos */
449 complain_overflow_bitfield,/* complain_on_overflow */
450 bfd_elf_generic_reloc, /* special_function */
451 "R_ARM_GOTPC", /* name */
452 true, /* partial_inplace */
453 0xffffffff, /* src_mask */
454 0xffffffff, /* dst_mask */
455 true), /* pcrel_offset */
456
457 HOWTO (R_ARM_GOT32, /* type */
458 0, /* rightshift */
459 2, /* size (0 = byte, 1 = short, 2 = long) */
460 32, /* bitsize */
461 false, /* pc_relative */
462 0, /* bitpos */
463 complain_overflow_bitfield,/* complain_on_overflow */
464 bfd_elf_generic_reloc, /* special_function */
465 "R_ARM_GOT32", /* name */
466 true, /* partial_inplace */
467 0xffffffff, /* src_mask */
468 0xffffffff, /* dst_mask */
469 false), /* pcrel_offset */
470
471 HOWTO (R_ARM_PLT32, /* type */
472 2, /* rightshift */
473 2, /* size (0 = byte, 1 = short, 2 = long) */
474 24, /* bitsize */
475 true, /* pc_relative */
476 0, /* bitpos */
477 complain_overflow_bitfield,/* complain_on_overflow */
478 bfd_elf_generic_reloc, /* special_function */
479 "R_ARM_PLT32", /* name */
480 false, /* partial_inplace */
481 0x00ffffff, /* src_mask */
482 0x00ffffff, /* dst_mask */
483 true), /* pcrel_offset */
484
485 HOWTO (R_ARM_CALL, /* type */
486 2, /* rightshift */
487 2, /* size (0 = byte, 1 = short, 2 = long) */
488 24, /* bitsize */
489 true, /* pc_relative */
490 0, /* bitpos */
491 complain_overflow_signed,/* complain_on_overflow */
492 bfd_elf_generic_reloc, /* special_function */
493 "R_ARM_CALL", /* name */
494 false, /* partial_inplace */
495 0x00ffffff, /* src_mask */
496 0x00ffffff, /* dst_mask */
497 true), /* pcrel_offset */
498
499 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* rightshift */
501 2, /* size (0 = byte, 1 = short, 2 = long) */
502 24, /* bitsize */
503 true, /* pc_relative */
504 0, /* bitpos */
505 complain_overflow_signed,/* complain_on_overflow */
506 bfd_elf_generic_reloc, /* special_function */
507 "R_ARM_JUMP24", /* name */
508 false, /* partial_inplace */
509 0x00ffffff, /* src_mask */
510 0x00ffffff, /* dst_mask */
511 true), /* pcrel_offset */
512
513 HOWTO (R_ARM_THM_JUMP24, /* type */
514 1, /* rightshift */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
516 24, /* bitsize */
517 true, /* pc_relative */
518 0, /* bitpos */
519 complain_overflow_signed,/* complain_on_overflow */
520 bfd_elf_generic_reloc, /* special_function */
521 "R_ARM_THM_JUMP24", /* name */
522 false, /* partial_inplace */
523 0x07ff2fff, /* src_mask */
524 0x07ff2fff, /* dst_mask */
525 true), /* pcrel_offset */
526
527 HOWTO (R_ARM_BASE_ABS, /* type */
528 0, /* rightshift */
529 2, /* size (0 = byte, 1 = short, 2 = long) */
530 32, /* bitsize */
531 false, /* pc_relative */
532 0, /* bitpos */
533 complain_overflow_dont,/* complain_on_overflow */
534 bfd_elf_generic_reloc, /* special_function */
535 "R_ARM_BASE_ABS", /* name */
536 false, /* partial_inplace */
537 0xffffffff, /* src_mask */
538 0xffffffff, /* dst_mask */
539 false), /* pcrel_offset */
540
541 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 0, /* rightshift */
543 2, /* size (0 = byte, 1 = short, 2 = long) */
544 12, /* bitsize */
545 true, /* pc_relative */
546 0, /* bitpos */
547 complain_overflow_dont,/* complain_on_overflow */
548 bfd_elf_generic_reloc, /* special_function */
549 "R_ARM_ALU_PCREL_7_0", /* name */
550 false, /* partial_inplace */
551 0x00000fff, /* src_mask */
552 0x00000fff, /* dst_mask */
553 true), /* pcrel_offset */
554
555 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 0, /* rightshift */
557 2, /* size (0 = byte, 1 = short, 2 = long) */
558 12, /* bitsize */
559 true, /* pc_relative */
560 8, /* bitpos */
561 complain_overflow_dont,/* complain_on_overflow */
562 bfd_elf_generic_reloc, /* special_function */
563 "R_ARM_ALU_PCREL_15_8",/* name */
564 false, /* partial_inplace */
565 0x00000fff, /* src_mask */
566 0x00000fff, /* dst_mask */
567 true), /* pcrel_offset */
568
569 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 0, /* rightshift */
571 2, /* size (0 = byte, 1 = short, 2 = long) */
572 12, /* bitsize */
573 true, /* pc_relative */
574 16, /* bitpos */
575 complain_overflow_dont,/* complain_on_overflow */
576 bfd_elf_generic_reloc, /* special_function */
577 "R_ARM_ALU_PCREL_23_15",/* name */
578 false, /* partial_inplace */
579 0x00000fff, /* src_mask */
580 0x00000fff, /* dst_mask */
581 true), /* pcrel_offset */
582
583 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 0, /* rightshift */
585 2, /* size (0 = byte, 1 = short, 2 = long) */
586 12, /* bitsize */
587 false, /* pc_relative */
588 0, /* bitpos */
589 complain_overflow_dont,/* complain_on_overflow */
590 bfd_elf_generic_reloc, /* special_function */
591 "R_ARM_LDR_SBREL_11_0",/* name */
592 false, /* partial_inplace */
593 0x00000fff, /* src_mask */
594 0x00000fff, /* dst_mask */
595 false), /* pcrel_offset */
596
597 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 0, /* rightshift */
599 2, /* size (0 = byte, 1 = short, 2 = long) */
600 8, /* bitsize */
601 false, /* pc_relative */
602 12, /* bitpos */
603 complain_overflow_dont,/* complain_on_overflow */
604 bfd_elf_generic_reloc, /* special_function */
605 "R_ARM_ALU_SBREL_19_12",/* name */
606 false, /* partial_inplace */
607 0x000ff000, /* src_mask */
608 0x000ff000, /* dst_mask */
609 false), /* pcrel_offset */
610
611 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 0, /* rightshift */
613 2, /* size (0 = byte, 1 = short, 2 = long) */
614 8, /* bitsize */
615 false, /* pc_relative */
616 20, /* bitpos */
617 complain_overflow_dont,/* complain_on_overflow */
618 bfd_elf_generic_reloc, /* special_function */
619 "R_ARM_ALU_SBREL_27_20",/* name */
620 false, /* partial_inplace */
621 0x0ff00000, /* src_mask */
622 0x0ff00000, /* dst_mask */
623 false), /* pcrel_offset */
624
625 HOWTO (R_ARM_TARGET1, /* type */
626 0, /* rightshift */
627 2, /* size (0 = byte, 1 = short, 2 = long) */
628 32, /* bitsize */
629 false, /* pc_relative */
630 0, /* bitpos */
631 complain_overflow_dont,/* complain_on_overflow */
632 bfd_elf_generic_reloc, /* special_function */
633 "R_ARM_TARGET1", /* name */
634 false, /* partial_inplace */
635 0xffffffff, /* src_mask */
636 0xffffffff, /* dst_mask */
637 false), /* pcrel_offset */
638
639 HOWTO (R_ARM_ROSEGREL32, /* type */
640 0, /* rightshift */
641 2, /* size (0 = byte, 1 = short, 2 = long) */
642 32, /* bitsize */
643 false, /* pc_relative */
644 0, /* bitpos */
645 complain_overflow_dont,/* complain_on_overflow */
646 bfd_elf_generic_reloc, /* special_function */
647 "R_ARM_ROSEGREL32", /* name */
648 false, /* partial_inplace */
649 0xffffffff, /* src_mask */
650 0xffffffff, /* dst_mask */
651 false), /* pcrel_offset */
652
653 HOWTO (R_ARM_V4BX, /* type */
654 0, /* rightshift */
655 2, /* size (0 = byte, 1 = short, 2 = long) */
656 32, /* bitsize */
657 false, /* pc_relative */
658 0, /* bitpos */
659 complain_overflow_dont,/* complain_on_overflow */
660 bfd_elf_generic_reloc, /* special_function */
661 "R_ARM_V4BX", /* name */
662 false, /* partial_inplace */
663 0xffffffff, /* src_mask */
664 0xffffffff, /* dst_mask */
665 false), /* pcrel_offset */
666
667 HOWTO (R_ARM_TARGET2, /* type */
668 0, /* rightshift */
669 2, /* size (0 = byte, 1 = short, 2 = long) */
670 32, /* bitsize */
671 false, /* pc_relative */
672 0, /* bitpos */
673 complain_overflow_signed,/* complain_on_overflow */
674 bfd_elf_generic_reloc, /* special_function */
675 "R_ARM_TARGET2", /* name */
676 false, /* partial_inplace */
677 0xffffffff, /* src_mask */
678 0xffffffff, /* dst_mask */
679 true), /* pcrel_offset */
680
681 HOWTO (R_ARM_PREL31, /* type */
682 0, /* rightshift */
683 2, /* size (0 = byte, 1 = short, 2 = long) */
684 31, /* bitsize */
685 true, /* pc_relative */
686 0, /* bitpos */
687 complain_overflow_signed,/* complain_on_overflow */
688 bfd_elf_generic_reloc, /* special_function */
689 "R_ARM_PREL31", /* name */
690 false, /* partial_inplace */
691 0x7fffffff, /* src_mask */
692 0x7fffffff, /* dst_mask */
693 true), /* pcrel_offset */
694
695 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 0, /* rightshift */
697 2, /* size (0 = byte, 1 = short, 2 = long) */
698 16, /* bitsize */
699 false, /* pc_relative */
700 0, /* bitpos */
701 complain_overflow_dont,/* complain_on_overflow */
702 bfd_elf_generic_reloc, /* special_function */
703 "R_ARM_MOVW_ABS_NC", /* name */
704 false, /* partial_inplace */
705 0x000f0fff, /* src_mask */
706 0x000f0fff, /* dst_mask */
707 false), /* pcrel_offset */
708
709 HOWTO (R_ARM_MOVT_ABS, /* type */
710 0, /* rightshift */
711 2, /* size (0 = byte, 1 = short, 2 = long) */
712 16, /* bitsize */
713 false, /* pc_relative */
714 0, /* bitpos */
715 complain_overflow_bitfield,/* complain_on_overflow */
716 bfd_elf_generic_reloc, /* special_function */
717 "R_ARM_MOVT_ABS", /* name */
718 false, /* partial_inplace */
719 0x000f0fff, /* src_mask */
720 0x000f0fff, /* dst_mask */
721 false), /* pcrel_offset */
722
723 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 0, /* rightshift */
725 2, /* size (0 = byte, 1 = short, 2 = long) */
726 16, /* bitsize */
727 true, /* pc_relative */
728 0, /* bitpos */
729 complain_overflow_dont,/* complain_on_overflow */
730 bfd_elf_generic_reloc, /* special_function */
731 "R_ARM_MOVW_PREL_NC", /* name */
732 false, /* partial_inplace */
733 0x000f0fff, /* src_mask */
734 0x000f0fff, /* dst_mask */
735 true), /* pcrel_offset */
736
737 HOWTO (R_ARM_MOVT_PREL, /* type */
738 0, /* rightshift */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
740 16, /* bitsize */
741 true, /* pc_relative */
742 0, /* bitpos */
743 complain_overflow_bitfield,/* complain_on_overflow */
744 bfd_elf_generic_reloc, /* special_function */
745 "R_ARM_MOVT_PREL", /* name */
746 false, /* partial_inplace */
747 0x000f0fff, /* src_mask */
748 0x000f0fff, /* dst_mask */
749 true), /* pcrel_offset */
750
751 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 0, /* rightshift */
753 2, /* size (0 = byte, 1 = short, 2 = long) */
754 16, /* bitsize */
755 false, /* pc_relative */
756 0, /* bitpos */
757 complain_overflow_dont,/* complain_on_overflow */
758 bfd_elf_generic_reloc, /* special_function */
759 "R_ARM_THM_MOVW_ABS_NC",/* name */
760 false, /* partial_inplace */
761 0x040f70ff, /* src_mask */
762 0x040f70ff, /* dst_mask */
763 false), /* pcrel_offset */
764
765 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 0, /* rightshift */
767 2, /* size (0 = byte, 1 = short, 2 = long) */
768 16, /* bitsize */
769 false, /* pc_relative */
770 0, /* bitpos */
771 complain_overflow_bitfield,/* complain_on_overflow */
772 bfd_elf_generic_reloc, /* special_function */
773 "R_ARM_THM_MOVT_ABS", /* name */
774 false, /* partial_inplace */
775 0x040f70ff, /* src_mask */
776 0x040f70ff, /* dst_mask */
777 false), /* pcrel_offset */
778
779 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 0, /* rightshift */
781 2, /* size (0 = byte, 1 = short, 2 = long) */
782 16, /* bitsize */
783 true, /* pc_relative */
784 0, /* bitpos */
785 complain_overflow_dont,/* complain_on_overflow */
786 bfd_elf_generic_reloc, /* special_function */
787 "R_ARM_THM_MOVW_PREL_NC",/* name */
788 false, /* partial_inplace */
789 0x040f70ff, /* src_mask */
790 0x040f70ff, /* dst_mask */
791 true), /* pcrel_offset */
792
793 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 0, /* rightshift */
795 2, /* size (0 = byte, 1 = short, 2 = long) */
796 16, /* bitsize */
797 true, /* pc_relative */
798 0, /* bitpos */
799 complain_overflow_bitfield,/* complain_on_overflow */
800 bfd_elf_generic_reloc, /* special_function */
801 "R_ARM_THM_MOVT_PREL", /* name */
802 false, /* partial_inplace */
803 0x040f70ff, /* src_mask */
804 0x040f70ff, /* dst_mask */
805 true), /* pcrel_offset */
806
807 HOWTO (R_ARM_THM_JUMP19, /* type */
808 1, /* rightshift */
809 2, /* size (0 = byte, 1 = short, 2 = long) */
810 19, /* bitsize */
811 true, /* pc_relative */
812 0, /* bitpos */
813 complain_overflow_signed,/* complain_on_overflow */
814 bfd_elf_generic_reloc, /* special_function */
815 "R_ARM_THM_JUMP19", /* name */
816 false, /* partial_inplace */
817 0x043f2fff, /* src_mask */
818 0x043f2fff, /* dst_mask */
819 true), /* pcrel_offset */
820
821 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* rightshift */
823 1, /* size (0 = byte, 1 = short, 2 = long) */
824 6, /* bitsize */
825 true, /* pc_relative */
826 0, /* bitpos */
827 complain_overflow_unsigned,/* complain_on_overflow */
828 bfd_elf_generic_reloc, /* special_function */
829 "R_ARM_THM_JUMP6", /* name */
830 false, /* partial_inplace */
831 0x02f8, /* src_mask */
832 0x02f8, /* dst_mask */
833 true), /* pcrel_offset */
834
835 /* These are declared as 13-bit signed relocations because we can
836 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 versa. */
838 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 0, /* rightshift */
840 2, /* size (0 = byte, 1 = short, 2 = long) */
841 13, /* bitsize */
842 true, /* pc_relative */
843 0, /* bitpos */
844 complain_overflow_dont,/* complain_on_overflow */
845 bfd_elf_generic_reloc, /* special_function */
846 "R_ARM_THM_ALU_PREL_11_0",/* name */
847 false, /* partial_inplace */
848 0xffffffff, /* src_mask */
849 0xffffffff, /* dst_mask */
850 true), /* pcrel_offset */
851
852 HOWTO (R_ARM_THM_PC12, /* type */
853 0, /* rightshift */
854 2, /* size (0 = byte, 1 = short, 2 = long) */
855 13, /* bitsize */
856 true, /* pc_relative */
857 0, /* bitpos */
858 complain_overflow_dont,/* complain_on_overflow */
859 bfd_elf_generic_reloc, /* special_function */
860 "R_ARM_THM_PC12", /* name */
861 false, /* partial_inplace */
862 0xffffffff, /* src_mask */
863 0xffffffff, /* dst_mask */
864 true), /* pcrel_offset */
865
866 HOWTO (R_ARM_ABS32_NOI, /* type */
867 0, /* rightshift */
868 2, /* size (0 = byte, 1 = short, 2 = long) */
869 32, /* bitsize */
870 false, /* pc_relative */
871 0, /* bitpos */
872 complain_overflow_dont,/* complain_on_overflow */
873 bfd_elf_generic_reloc, /* special_function */
874 "R_ARM_ABS32_NOI", /* name */
875 false, /* partial_inplace */
876 0xffffffff, /* src_mask */
877 0xffffffff, /* dst_mask */
878 false), /* pcrel_offset */
879
880 HOWTO (R_ARM_REL32_NOI, /* type */
881 0, /* rightshift */
882 2, /* size (0 = byte, 1 = short, 2 = long) */
883 32, /* bitsize */
884 true, /* pc_relative */
885 0, /* bitpos */
886 complain_overflow_dont,/* complain_on_overflow */
887 bfd_elf_generic_reloc, /* special_function */
888 "R_ARM_REL32_NOI", /* name */
889 false, /* partial_inplace */
890 0xffffffff, /* src_mask */
891 0xffffffff, /* dst_mask */
892 false), /* pcrel_offset */
893
894 /* Group relocations. */
895
896 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 0, /* rightshift */
898 2, /* size (0 = byte, 1 = short, 2 = long) */
899 32, /* bitsize */
900 true, /* pc_relative */
901 0, /* bitpos */
902 complain_overflow_dont,/* complain_on_overflow */
903 bfd_elf_generic_reloc, /* special_function */
904 "R_ARM_ALU_PC_G0_NC", /* name */
905 false, /* partial_inplace */
906 0xffffffff, /* src_mask */
907 0xffffffff, /* dst_mask */
908 true), /* pcrel_offset */
909
910 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 0, /* rightshift */
912 2, /* size (0 = byte, 1 = short, 2 = long) */
913 32, /* bitsize */
914 true, /* pc_relative */
915 0, /* bitpos */
916 complain_overflow_dont,/* complain_on_overflow */
917 bfd_elf_generic_reloc, /* special_function */
918 "R_ARM_ALU_PC_G0", /* name */
919 false, /* partial_inplace */
920 0xffffffff, /* src_mask */
921 0xffffffff, /* dst_mask */
922 true), /* pcrel_offset */
923
924 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 0, /* rightshift */
926 2, /* size (0 = byte, 1 = short, 2 = long) */
927 32, /* bitsize */
928 true, /* pc_relative */
929 0, /* bitpos */
930 complain_overflow_dont,/* complain_on_overflow */
931 bfd_elf_generic_reloc, /* special_function */
932 "R_ARM_ALU_PC_G1_NC", /* name */
933 false, /* partial_inplace */
934 0xffffffff, /* src_mask */
935 0xffffffff, /* dst_mask */
936 true), /* pcrel_offset */
937
938 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 0, /* rightshift */
940 2, /* size (0 = byte, 1 = short, 2 = long) */
941 32, /* bitsize */
942 true, /* pc_relative */
943 0, /* bitpos */
944 complain_overflow_dont,/* complain_on_overflow */
945 bfd_elf_generic_reloc, /* special_function */
946 "R_ARM_ALU_PC_G1", /* name */
947 false, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 true), /* pcrel_offset */
951
952 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 0, /* rightshift */
954 2, /* size (0 = byte, 1 = short, 2 = long) */
955 32, /* bitsize */
956 true, /* pc_relative */
957 0, /* bitpos */
958 complain_overflow_dont,/* complain_on_overflow */
959 bfd_elf_generic_reloc, /* special_function */
960 "R_ARM_ALU_PC_G2", /* name */
961 false, /* partial_inplace */
962 0xffffffff, /* src_mask */
963 0xffffffff, /* dst_mask */
964 true), /* pcrel_offset */
965
966 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 0, /* rightshift */
968 2, /* size (0 = byte, 1 = short, 2 = long) */
969 32, /* bitsize */
970 true, /* pc_relative */
971 0, /* bitpos */
972 complain_overflow_dont,/* complain_on_overflow */
973 bfd_elf_generic_reloc, /* special_function */
974 "R_ARM_LDR_PC_G1", /* name */
975 false, /* partial_inplace */
976 0xffffffff, /* src_mask */
977 0xffffffff, /* dst_mask */
978 true), /* pcrel_offset */
979
980 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 0, /* rightshift */
982 2, /* size (0 = byte, 1 = short, 2 = long) */
983 32, /* bitsize */
984 true, /* pc_relative */
985 0, /* bitpos */
986 complain_overflow_dont,/* complain_on_overflow */
987 bfd_elf_generic_reloc, /* special_function */
988 "R_ARM_LDR_PC_G2", /* name */
989 false, /* partial_inplace */
990 0xffffffff, /* src_mask */
991 0xffffffff, /* dst_mask */
992 true), /* pcrel_offset */
993
994 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 0, /* rightshift */
996 2, /* size (0 = byte, 1 = short, 2 = long) */
997 32, /* bitsize */
998 true, /* pc_relative */
999 0, /* bitpos */
1000 complain_overflow_dont,/* complain_on_overflow */
1001 bfd_elf_generic_reloc, /* special_function */
1002 "R_ARM_LDRS_PC_G0", /* name */
1003 false, /* partial_inplace */
1004 0xffffffff, /* src_mask */
1005 0xffffffff, /* dst_mask */
1006 true), /* pcrel_offset */
1007
1008 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 0, /* rightshift */
1010 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 32, /* bitsize */
1012 true, /* pc_relative */
1013 0, /* bitpos */
1014 complain_overflow_dont,/* complain_on_overflow */
1015 bfd_elf_generic_reloc, /* special_function */
1016 "R_ARM_LDRS_PC_G1", /* name */
1017 false, /* partial_inplace */
1018 0xffffffff, /* src_mask */
1019 0xffffffff, /* dst_mask */
1020 true), /* pcrel_offset */
1021
1022 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 0, /* rightshift */
1024 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 32, /* bitsize */
1026 true, /* pc_relative */
1027 0, /* bitpos */
1028 complain_overflow_dont,/* complain_on_overflow */
1029 bfd_elf_generic_reloc, /* special_function */
1030 "R_ARM_LDRS_PC_G2", /* name */
1031 false, /* partial_inplace */
1032 0xffffffff, /* src_mask */
1033 0xffffffff, /* dst_mask */
1034 true), /* pcrel_offset */
1035
1036 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 0, /* rightshift */
1038 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 32, /* bitsize */
1040 true, /* pc_relative */
1041 0, /* bitpos */
1042 complain_overflow_dont,/* complain_on_overflow */
1043 bfd_elf_generic_reloc, /* special_function */
1044 "R_ARM_LDC_PC_G0", /* name */
1045 false, /* partial_inplace */
1046 0xffffffff, /* src_mask */
1047 0xffffffff, /* dst_mask */
1048 true), /* pcrel_offset */
1049
1050 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 0, /* rightshift */
1052 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 32, /* bitsize */
1054 true, /* pc_relative */
1055 0, /* bitpos */
1056 complain_overflow_dont,/* complain_on_overflow */
1057 bfd_elf_generic_reloc, /* special_function */
1058 "R_ARM_LDC_PC_G1", /* name */
1059 false, /* partial_inplace */
1060 0xffffffff, /* src_mask */
1061 0xffffffff, /* dst_mask */
1062 true), /* pcrel_offset */
1063
1064 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 0, /* rightshift */
1066 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 32, /* bitsize */
1068 true, /* pc_relative */
1069 0, /* bitpos */
1070 complain_overflow_dont,/* complain_on_overflow */
1071 bfd_elf_generic_reloc, /* special_function */
1072 "R_ARM_LDC_PC_G2", /* name */
1073 false, /* partial_inplace */
1074 0xffffffff, /* src_mask */
1075 0xffffffff, /* dst_mask */
1076 true), /* pcrel_offset */
1077
1078 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 0, /* rightshift */
1080 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 32, /* bitsize */
1082 true, /* pc_relative */
1083 0, /* bitpos */
1084 complain_overflow_dont,/* complain_on_overflow */
1085 bfd_elf_generic_reloc, /* special_function */
1086 "R_ARM_ALU_SB_G0_NC", /* name */
1087 false, /* partial_inplace */
1088 0xffffffff, /* src_mask */
1089 0xffffffff, /* dst_mask */
1090 true), /* pcrel_offset */
1091
1092 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 0, /* rightshift */
1094 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 32, /* bitsize */
1096 true, /* pc_relative */
1097 0, /* bitpos */
1098 complain_overflow_dont,/* complain_on_overflow */
1099 bfd_elf_generic_reloc, /* special_function */
1100 "R_ARM_ALU_SB_G0", /* name */
1101 false, /* partial_inplace */
1102 0xffffffff, /* src_mask */
1103 0xffffffff, /* dst_mask */
1104 true), /* pcrel_offset */
1105
1106 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 0, /* rightshift */
1108 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 32, /* bitsize */
1110 true, /* pc_relative */
1111 0, /* bitpos */
1112 complain_overflow_dont,/* complain_on_overflow */
1113 bfd_elf_generic_reloc, /* special_function */
1114 "R_ARM_ALU_SB_G1_NC", /* name */
1115 false, /* partial_inplace */
1116 0xffffffff, /* src_mask */
1117 0xffffffff, /* dst_mask */
1118 true), /* pcrel_offset */
1119
1120 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 0, /* rightshift */
1122 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 32, /* bitsize */
1124 true, /* pc_relative */
1125 0, /* bitpos */
1126 complain_overflow_dont,/* complain_on_overflow */
1127 bfd_elf_generic_reloc, /* special_function */
1128 "R_ARM_ALU_SB_G1", /* name */
1129 false, /* partial_inplace */
1130 0xffffffff, /* src_mask */
1131 0xffffffff, /* dst_mask */
1132 true), /* pcrel_offset */
1133
1134 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 0, /* rightshift */
1136 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 32, /* bitsize */
1138 true, /* pc_relative */
1139 0, /* bitpos */
1140 complain_overflow_dont,/* complain_on_overflow */
1141 bfd_elf_generic_reloc, /* special_function */
1142 "R_ARM_ALU_SB_G2", /* name */
1143 false, /* partial_inplace */
1144 0xffffffff, /* src_mask */
1145 0xffffffff, /* dst_mask */
1146 true), /* pcrel_offset */
1147
1148 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 0, /* rightshift */
1150 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 32, /* bitsize */
1152 true, /* pc_relative */
1153 0, /* bitpos */
1154 complain_overflow_dont,/* complain_on_overflow */
1155 bfd_elf_generic_reloc, /* special_function */
1156 "R_ARM_LDR_SB_G0", /* name */
1157 false, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 true), /* pcrel_offset */
1161
1162 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 0, /* rightshift */
1164 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 32, /* bitsize */
1166 true, /* pc_relative */
1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 bfd_elf_generic_reloc, /* special_function */
1170 "R_ARM_LDR_SB_G1", /* name */
1171 false, /* partial_inplace */
1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
1174 true), /* pcrel_offset */
1175
1176 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 0, /* rightshift */
1178 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 32, /* bitsize */
1180 true, /* pc_relative */
1181 0, /* bitpos */
1182 complain_overflow_dont,/* complain_on_overflow */
1183 bfd_elf_generic_reloc, /* special_function */
1184 "R_ARM_LDR_SB_G2", /* name */
1185 false, /* partial_inplace */
1186 0xffffffff, /* src_mask */
1187 0xffffffff, /* dst_mask */
1188 true), /* pcrel_offset */
1189
1190 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 0, /* rightshift */
1192 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 32, /* bitsize */
1194 true, /* pc_relative */
1195 0, /* bitpos */
1196 complain_overflow_dont,/* complain_on_overflow */
1197 bfd_elf_generic_reloc, /* special_function */
1198 "R_ARM_LDRS_SB_G0", /* name */
1199 false, /* partial_inplace */
1200 0xffffffff, /* src_mask */
1201 0xffffffff, /* dst_mask */
1202 true), /* pcrel_offset */
1203
1204 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 0, /* rightshift */
1206 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 32, /* bitsize */
1208 true, /* pc_relative */
1209 0, /* bitpos */
1210 complain_overflow_dont,/* complain_on_overflow */
1211 bfd_elf_generic_reloc, /* special_function */
1212 "R_ARM_LDRS_SB_G1", /* name */
1213 false, /* partial_inplace */
1214 0xffffffff, /* src_mask */
1215 0xffffffff, /* dst_mask */
1216 true), /* pcrel_offset */
1217
1218 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 0, /* rightshift */
1220 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 32, /* bitsize */
1222 true, /* pc_relative */
1223 0, /* bitpos */
1224 complain_overflow_dont,/* complain_on_overflow */
1225 bfd_elf_generic_reloc, /* special_function */
1226 "R_ARM_LDRS_SB_G2", /* name */
1227 false, /* partial_inplace */
1228 0xffffffff, /* src_mask */
1229 0xffffffff, /* dst_mask */
1230 true), /* pcrel_offset */
1231
1232 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 0, /* rightshift */
1234 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 32, /* bitsize */
1236 true, /* pc_relative */
1237 0, /* bitpos */
1238 complain_overflow_dont,/* complain_on_overflow */
1239 bfd_elf_generic_reloc, /* special_function */
1240 "R_ARM_LDC_SB_G0", /* name */
1241 false, /* partial_inplace */
1242 0xffffffff, /* src_mask */
1243 0xffffffff, /* dst_mask */
1244 true), /* pcrel_offset */
1245
1246 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 0, /* rightshift */
1248 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 32, /* bitsize */
1250 true, /* pc_relative */
1251 0, /* bitpos */
1252 complain_overflow_dont,/* complain_on_overflow */
1253 bfd_elf_generic_reloc, /* special_function */
1254 "R_ARM_LDC_SB_G1", /* name */
1255 false, /* partial_inplace */
1256 0xffffffff, /* src_mask */
1257 0xffffffff, /* dst_mask */
1258 true), /* pcrel_offset */
1259
1260 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 0, /* rightshift */
1262 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 32, /* bitsize */
1264 true, /* pc_relative */
1265 0, /* bitpos */
1266 complain_overflow_dont,/* complain_on_overflow */
1267 bfd_elf_generic_reloc, /* special_function */
1268 "R_ARM_LDC_SB_G2", /* name */
1269 false, /* partial_inplace */
1270 0xffffffff, /* src_mask */
1271 0xffffffff, /* dst_mask */
1272 true), /* pcrel_offset */
1273
1274 /* End of group relocations. */
1275
1276 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 0, /* rightshift */
1278 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 16, /* bitsize */
1280 false, /* pc_relative */
1281 0, /* bitpos */
1282 complain_overflow_dont,/* complain_on_overflow */
1283 bfd_elf_generic_reloc, /* special_function */
1284 "R_ARM_MOVW_BREL_NC", /* name */
1285 false, /* partial_inplace */
1286 0x0000ffff, /* src_mask */
1287 0x0000ffff, /* dst_mask */
1288 false), /* pcrel_offset */
1289
1290 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 0, /* rightshift */
1292 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 16, /* bitsize */
1294 false, /* pc_relative */
1295 0, /* bitpos */
1296 complain_overflow_bitfield,/* complain_on_overflow */
1297 bfd_elf_generic_reloc, /* special_function */
1298 "R_ARM_MOVT_BREL", /* name */
1299 false, /* partial_inplace */
1300 0x0000ffff, /* src_mask */
1301 0x0000ffff, /* dst_mask */
1302 false), /* pcrel_offset */
1303
1304 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 0, /* rightshift */
1306 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 16, /* bitsize */
1308 false, /* pc_relative */
1309 0, /* bitpos */
1310 complain_overflow_dont,/* complain_on_overflow */
1311 bfd_elf_generic_reloc, /* special_function */
1312 "R_ARM_MOVW_BREL", /* name */
1313 false, /* partial_inplace */
1314 0x0000ffff, /* src_mask */
1315 0x0000ffff, /* dst_mask */
1316 false), /* pcrel_offset */
1317
1318 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 0, /* rightshift */
1320 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 16, /* bitsize */
1322 false, /* pc_relative */
1323 0, /* bitpos */
1324 complain_overflow_dont,/* complain_on_overflow */
1325 bfd_elf_generic_reloc, /* special_function */
1326 "R_ARM_THM_MOVW_BREL_NC",/* name */
1327 false, /* partial_inplace */
1328 0x040f70ff, /* src_mask */
1329 0x040f70ff, /* dst_mask */
1330 false), /* pcrel_offset */
1331
1332 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 0, /* rightshift */
1334 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 16, /* bitsize */
1336 false, /* pc_relative */
1337 0, /* bitpos */
1338 complain_overflow_bitfield,/* complain_on_overflow */
1339 bfd_elf_generic_reloc, /* special_function */
1340 "R_ARM_THM_MOVT_BREL", /* name */
1341 false, /* partial_inplace */
1342 0x040f70ff, /* src_mask */
1343 0x040f70ff, /* dst_mask */
1344 false), /* pcrel_offset */
1345
1346 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 0, /* rightshift */
1348 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 16, /* bitsize */
1350 false, /* pc_relative */
1351 0, /* bitpos */
1352 complain_overflow_dont,/* complain_on_overflow */
1353 bfd_elf_generic_reloc, /* special_function */
1354 "R_ARM_THM_MOVW_BREL", /* name */
1355 false, /* partial_inplace */
1356 0x040f70ff, /* src_mask */
1357 0x040f70ff, /* dst_mask */
1358 false), /* pcrel_offset */
1359
1360 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 0, /* rightshift */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 32, /* bitsize */
1364 false, /* pc_relative */
1365 0, /* bitpos */
1366 complain_overflow_bitfield,/* complain_on_overflow */
1367 NULL, /* special_function */
1368 "R_ARM_TLS_GOTDESC", /* name */
1369 true, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 false), /* pcrel_offset */
1373
1374 HOWTO (R_ARM_TLS_CALL, /* type */
1375 0, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 24, /* bitsize */
1378 false, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_TLS_CALL", /* name */
1383 false, /* partial_inplace */
1384 0x00ffffff, /* src_mask */
1385 0x00ffffff, /* dst_mask */
1386 false), /* pcrel_offset */
1387
1388 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 0, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 0, /* bitsize */
1392 false, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont,/* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_TLS_DESCSEQ", /* name */
1397 false, /* partial_inplace */
1398 0x00000000, /* src_mask */
1399 0x00000000, /* dst_mask */
1400 false), /* pcrel_offset */
1401
1402 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 0, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 24, /* bitsize */
1406 false, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_dont,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_THM_TLS_CALL", /* name */
1411 false, /* partial_inplace */
1412 0x07ff07ff, /* src_mask */
1413 0x07ff07ff, /* dst_mask */
1414 false), /* pcrel_offset */
1415
1416 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 32, /* bitsize */
1420 false, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_dont,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_PLT32_ABS", /* name */
1425 false, /* partial_inplace */
1426 0xffffffff, /* src_mask */
1427 0xffffffff, /* dst_mask */
1428 false), /* pcrel_offset */
1429
1430 HOWTO (R_ARM_GOT_ABS, /* type */
1431 0, /* rightshift */
1432 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 32, /* bitsize */
1434 false, /* pc_relative */
1435 0, /* bitpos */
1436 complain_overflow_dont,/* complain_on_overflow */
1437 bfd_elf_generic_reloc, /* special_function */
1438 "R_ARM_GOT_ABS", /* name */
1439 false, /* partial_inplace */
1440 0xffffffff, /* src_mask */
1441 0xffffffff, /* dst_mask */
1442 false), /* pcrel_offset */
1443
1444 HOWTO (R_ARM_GOT_PREL, /* type */
1445 0, /* rightshift */
1446 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 32, /* bitsize */
1448 true, /* pc_relative */
1449 0, /* bitpos */
1450 complain_overflow_dont, /* complain_on_overflow */
1451 bfd_elf_generic_reloc, /* special_function */
1452 "R_ARM_GOT_PREL", /* name */
1453 false, /* partial_inplace */
1454 0xffffffff, /* src_mask */
1455 0xffffffff, /* dst_mask */
1456 true), /* pcrel_offset */
1457
1458 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 0, /* rightshift */
1460 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 12, /* bitsize */
1462 false, /* pc_relative */
1463 0, /* bitpos */
1464 complain_overflow_bitfield,/* complain_on_overflow */
1465 bfd_elf_generic_reloc, /* special_function */
1466 "R_ARM_GOT_BREL12", /* name */
1467 false, /* partial_inplace */
1468 0x00000fff, /* src_mask */
1469 0x00000fff, /* dst_mask */
1470 false), /* pcrel_offset */
1471
1472 HOWTO (R_ARM_GOTOFF12, /* type */
1473 0, /* rightshift */
1474 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 12, /* bitsize */
1476 false, /* pc_relative */
1477 0, /* bitpos */
1478 complain_overflow_bitfield,/* complain_on_overflow */
1479 bfd_elf_generic_reloc, /* special_function */
1480 "R_ARM_GOTOFF12", /* name */
1481 false, /* partial_inplace */
1482 0x00000fff, /* src_mask */
1483 0x00000fff, /* dst_mask */
1484 false), /* pcrel_offset */
1485
1486 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487
1488 /* GNU extension to record C++ vtable member usage */
1489 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 0, /* rightshift */
1491 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 0, /* bitsize */
1493 false, /* pc_relative */
1494 0, /* bitpos */
1495 complain_overflow_dont, /* complain_on_overflow */
1496 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1497 "R_ARM_GNU_VTENTRY", /* name */
1498 false, /* partial_inplace */
1499 0, /* src_mask */
1500 0, /* dst_mask */
1501 false), /* pcrel_offset */
1502
1503 /* GNU extension to record C++ vtable hierarchy */
1504 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 0, /* rightshift */
1506 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 0, /* bitsize */
1508 false, /* pc_relative */
1509 0, /* bitpos */
1510 complain_overflow_dont, /* complain_on_overflow */
1511 NULL, /* special_function */
1512 "R_ARM_GNU_VTINHERIT", /* name */
1513 false, /* partial_inplace */
1514 0, /* src_mask */
1515 0, /* dst_mask */
1516 false), /* pcrel_offset */
1517
1518 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* rightshift */
1520 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 11, /* bitsize */
1522 true, /* pc_relative */
1523 0, /* bitpos */
1524 complain_overflow_signed, /* complain_on_overflow */
1525 bfd_elf_generic_reloc, /* special_function */
1526 "R_ARM_THM_JUMP11", /* name */
1527 false, /* partial_inplace */
1528 0x000007ff, /* src_mask */
1529 0x000007ff, /* dst_mask */
1530 true), /* pcrel_offset */
1531
1532 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* rightshift */
1534 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 8, /* bitsize */
1536 true, /* pc_relative */
1537 0, /* bitpos */
1538 complain_overflow_signed, /* complain_on_overflow */
1539 bfd_elf_generic_reloc, /* special_function */
1540 "R_ARM_THM_JUMP8", /* name */
1541 false, /* partial_inplace */
1542 0x000000ff, /* src_mask */
1543 0x000000ff, /* dst_mask */
1544 true), /* pcrel_offset */
1545
1546 /* TLS relocations */
1547 HOWTO (R_ARM_TLS_GD32, /* type */
1548 0, /* rightshift */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 32, /* bitsize */
1551 false, /* pc_relative */
1552 0, /* bitpos */
1553 complain_overflow_bitfield,/* complain_on_overflow */
1554 NULL, /* special_function */
1555 "R_ARM_TLS_GD32", /* name */
1556 true, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 false), /* pcrel_offset */
1560
1561 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 0, /* rightshift */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 32, /* bitsize */
1565 false, /* pc_relative */
1566 0, /* bitpos */
1567 complain_overflow_bitfield,/* complain_on_overflow */
1568 bfd_elf_generic_reloc, /* special_function */
1569 "R_ARM_TLS_LDM32", /* name */
1570 true, /* partial_inplace */
1571 0xffffffff, /* src_mask */
1572 0xffffffff, /* dst_mask */
1573 false), /* pcrel_offset */
1574
1575 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 0, /* rightshift */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 32, /* bitsize */
1579 false, /* pc_relative */
1580 0, /* bitpos */
1581 complain_overflow_bitfield,/* complain_on_overflow */
1582 bfd_elf_generic_reloc, /* special_function */
1583 "R_ARM_TLS_LDO32", /* name */
1584 true, /* partial_inplace */
1585 0xffffffff, /* src_mask */
1586 0xffffffff, /* dst_mask */
1587 false), /* pcrel_offset */
1588
1589 HOWTO (R_ARM_TLS_IE32, /* type */
1590 0, /* rightshift */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 32, /* bitsize */
1593 false, /* pc_relative */
1594 0, /* bitpos */
1595 complain_overflow_bitfield,/* complain_on_overflow */
1596 NULL, /* special_function */
1597 "R_ARM_TLS_IE32", /* name */
1598 true, /* partial_inplace */
1599 0xffffffff, /* src_mask */
1600 0xffffffff, /* dst_mask */
1601 false), /* pcrel_offset */
1602
1603 HOWTO (R_ARM_TLS_LE32, /* type */
1604 0, /* rightshift */
1605 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 32, /* bitsize */
1607 false, /* pc_relative */
1608 0, /* bitpos */
1609 complain_overflow_bitfield,/* complain_on_overflow */
1610 NULL, /* special_function */
1611 "R_ARM_TLS_LE32", /* name */
1612 true, /* partial_inplace */
1613 0xffffffff, /* src_mask */
1614 0xffffffff, /* dst_mask */
1615 false), /* pcrel_offset */
1616
1617 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 0, /* rightshift */
1619 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 12, /* bitsize */
1621 false, /* pc_relative */
1622 0, /* bitpos */
1623 complain_overflow_bitfield,/* complain_on_overflow */
1624 bfd_elf_generic_reloc, /* special_function */
1625 "R_ARM_TLS_LDO12", /* name */
1626 false, /* partial_inplace */
1627 0x00000fff, /* src_mask */
1628 0x00000fff, /* dst_mask */
1629 false), /* pcrel_offset */
1630
1631 HOWTO (R_ARM_TLS_LE12, /* type */
1632 0, /* rightshift */
1633 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 12, /* bitsize */
1635 false, /* pc_relative */
1636 0, /* bitpos */
1637 complain_overflow_bitfield,/* complain_on_overflow */
1638 bfd_elf_generic_reloc, /* special_function */
1639 "R_ARM_TLS_LE12", /* name */
1640 false, /* partial_inplace */
1641 0x00000fff, /* src_mask */
1642 0x00000fff, /* dst_mask */
1643 false), /* pcrel_offset */
1644
1645 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 0, /* rightshift */
1647 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 12, /* bitsize */
1649 false, /* pc_relative */
1650 0, /* bitpos */
1651 complain_overflow_bitfield,/* complain_on_overflow */
1652 bfd_elf_generic_reloc, /* special_function */
1653 "R_ARM_TLS_IE12GP", /* name */
1654 false, /* partial_inplace */
1655 0x00000fff, /* src_mask */
1656 0x00000fff, /* dst_mask */
1657 false), /* pcrel_offset */
1658
1659 /* 112-127 private relocations. */
1660 EMPTY_HOWTO (112),
1661 EMPTY_HOWTO (113),
1662 EMPTY_HOWTO (114),
1663 EMPTY_HOWTO (115),
1664 EMPTY_HOWTO (116),
1665 EMPTY_HOWTO (117),
1666 EMPTY_HOWTO (118),
1667 EMPTY_HOWTO (119),
1668 EMPTY_HOWTO (120),
1669 EMPTY_HOWTO (121),
1670 EMPTY_HOWTO (122),
1671 EMPTY_HOWTO (123),
1672 EMPTY_HOWTO (124),
1673 EMPTY_HOWTO (125),
1674 EMPTY_HOWTO (126),
1675 EMPTY_HOWTO (127),
1676
1677 /* R_ARM_ME_TOO, obsolete. */
1678 EMPTY_HOWTO (128),
1679
1680 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 0, /* rightshift */
1682 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 0, /* bitsize */
1684 false, /* pc_relative */
1685 0, /* bitpos */
1686 complain_overflow_dont,/* complain_on_overflow */
1687 bfd_elf_generic_reloc, /* special_function */
1688 "R_ARM_THM_TLS_DESCSEQ",/* name */
1689 false, /* partial_inplace */
1690 0x00000000, /* src_mask */
1691 0x00000000, /* dst_mask */
1692 false), /* pcrel_offset */
1693 EMPTY_HOWTO (130),
1694 EMPTY_HOWTO (131),
1695 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1696 0, /* rightshift. */
1697 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 16, /* bitsize. */
1699 false, /* pc_relative. */
1700 0, /* bitpos. */
1701 complain_overflow_bitfield,/* complain_on_overflow. */
1702 bfd_elf_generic_reloc, /* special_function. */
1703 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1704 false, /* partial_inplace. */
1705 0x00000000, /* src_mask. */
1706 0x00000000, /* dst_mask. */
1707 false), /* pcrel_offset. */
1708 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1709 0, /* rightshift. */
1710 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 16, /* bitsize. */
1712 false, /* pc_relative. */
1713 0, /* bitpos. */
1714 complain_overflow_bitfield,/* complain_on_overflow. */
1715 bfd_elf_generic_reloc, /* special_function. */
1716 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1717 false, /* partial_inplace. */
1718 0x00000000, /* src_mask. */
1719 0x00000000, /* dst_mask. */
1720 false), /* pcrel_offset. */
1721 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1722 0, /* rightshift. */
1723 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 16, /* bitsize. */
1725 false, /* pc_relative. */
1726 0, /* bitpos. */
1727 complain_overflow_bitfield,/* complain_on_overflow. */
1728 bfd_elf_generic_reloc, /* special_function. */
1729 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1730 false, /* partial_inplace. */
1731 0x00000000, /* src_mask. */
1732 0x00000000, /* dst_mask. */
1733 false), /* pcrel_offset. */
1734 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1735 0, /* rightshift. */
1736 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 16, /* bitsize. */
1738 false, /* pc_relative. */
1739 0, /* bitpos. */
1740 complain_overflow_bitfield,/* complain_on_overflow. */
1741 bfd_elf_generic_reloc, /* special_function. */
1742 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1743 false, /* partial_inplace. */
1744 0x00000000, /* src_mask. */
1745 0x00000000, /* dst_mask. */
1746 false), /* pcrel_offset. */
1747 /* Relocations for Armv8.1-M Mainline. */
1748 HOWTO (R_ARM_THM_BF16, /* type. */
1749 0, /* rightshift. */
1750 1, /* size (0 = byte, 1 = short, 2 = long). */
1751 16, /* bitsize. */
1752 true, /* pc_relative. */
1753 0, /* bitpos. */
1754 complain_overflow_dont,/* do not complain_on_overflow. */
1755 bfd_elf_generic_reloc, /* special_function. */
1756 "R_ARM_THM_BF16", /* name. */
1757 false, /* partial_inplace. */
1758 0x001f0ffe, /* src_mask. */
1759 0x001f0ffe, /* dst_mask. */
1760 true), /* pcrel_offset. */
1761 HOWTO (R_ARM_THM_BF12, /* type. */
1762 0, /* rightshift. */
1763 1, /* size (0 = byte, 1 = short, 2 = long). */
1764 12, /* bitsize. */
1765 true, /* pc_relative. */
1766 0, /* bitpos. */
1767 complain_overflow_dont,/* do not complain_on_overflow. */
1768 bfd_elf_generic_reloc, /* special_function. */
1769 "R_ARM_THM_BF12", /* name. */
1770 false, /* partial_inplace. */
1771 0x00010ffe, /* src_mask. */
1772 0x00010ffe, /* dst_mask. */
1773 true), /* pcrel_offset. */
1774 HOWTO (R_ARM_THM_BF18, /* type. */
1775 0, /* rightshift. */
1776 1, /* size (0 = byte, 1 = short, 2 = long). */
1777 18, /* bitsize. */
1778 true, /* pc_relative. */
1779 0, /* bitpos. */
1780 complain_overflow_dont,/* do not complain_on_overflow. */
1781 bfd_elf_generic_reloc, /* special_function. */
1782 "R_ARM_THM_BF18", /* name. */
1783 false, /* partial_inplace. */
1784 0x007f0ffe, /* src_mask. */
1785 0x007f0ffe, /* dst_mask. */
1786 true), /* pcrel_offset. */
1787 };
1788
1789 /* 160 onwards: */
1790 static reloc_howto_type elf32_arm_howto_table_2[8] =
1791 {
1792 HOWTO (R_ARM_IRELATIVE, /* type */
1793 0, /* rightshift */
1794 2, /* size (0 = byte, 1 = short, 2 = long) */
1795 32, /* bitsize */
1796 false, /* pc_relative */
1797 0, /* bitpos */
1798 complain_overflow_bitfield,/* complain_on_overflow */
1799 bfd_elf_generic_reloc, /* special_function */
1800 "R_ARM_IRELATIVE", /* name */
1801 true, /* partial_inplace */
1802 0xffffffff, /* src_mask */
1803 0xffffffff, /* dst_mask */
1804 false), /* pcrel_offset */
1805 HOWTO (R_ARM_GOTFUNCDESC, /* type */
1806 0, /* rightshift */
1807 2, /* size (0 = byte, 1 = short, 2 = long) */
1808 32, /* bitsize */
1809 false, /* pc_relative */
1810 0, /* bitpos */
1811 complain_overflow_bitfield,/* complain_on_overflow */
1812 bfd_elf_generic_reloc, /* special_function */
1813 "R_ARM_GOTFUNCDESC", /* name */
1814 false, /* partial_inplace */
1815 0, /* src_mask */
1816 0xffffffff, /* dst_mask */
1817 false), /* pcrel_offset */
1818 HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */
1819 0, /* rightshift */
1820 2, /* size (0 = byte, 1 = short, 2 = long) */
1821 32, /* bitsize */
1822 false, /* pc_relative */
1823 0, /* bitpos */
1824 complain_overflow_bitfield,/* complain_on_overflow */
1825 bfd_elf_generic_reloc, /* special_function */
1826 "R_ARM_GOTOFFFUNCDESC",/* name */
1827 false, /* partial_inplace */
1828 0, /* src_mask */
1829 0xffffffff, /* dst_mask */
1830 false), /* pcrel_offset */
1831 HOWTO (R_ARM_FUNCDESC, /* type */
1832 0, /* rightshift */
1833 2, /* size (0 = byte, 1 = short, 2 = long) */
1834 32, /* bitsize */
1835 false, /* pc_relative */
1836 0, /* bitpos */
1837 complain_overflow_bitfield,/* complain_on_overflow */
1838 bfd_elf_generic_reloc, /* special_function */
1839 "R_ARM_FUNCDESC", /* name */
1840 false, /* partial_inplace */
1841 0, /* src_mask */
1842 0xffffffff, /* dst_mask */
1843 false), /* pcrel_offset */
1844 HOWTO (R_ARM_FUNCDESC_VALUE, /* type */
1845 0, /* rightshift */
1846 2, /* size (0 = byte, 1 = short, 2 = long) */
1847 64, /* bitsize */
1848 false, /* pc_relative */
1849 0, /* bitpos */
1850 complain_overflow_bitfield,/* complain_on_overflow */
1851 bfd_elf_generic_reloc, /* special_function */
1852 "R_ARM_FUNCDESC_VALUE",/* name */
1853 false, /* partial_inplace */
1854 0, /* src_mask */
1855 0xffffffff, /* dst_mask */
1856 false), /* pcrel_offset */
1857 HOWTO (R_ARM_TLS_GD32_FDPIC, /* type */
1858 0, /* rightshift */
1859 2, /* size (0 = byte, 1 = short, 2 = long) */
1860 32, /* bitsize */
1861 false, /* pc_relative */
1862 0, /* bitpos */
1863 complain_overflow_bitfield,/* complain_on_overflow */
1864 bfd_elf_generic_reloc, /* special_function */
1865 "R_ARM_TLS_GD32_FDPIC",/* name */
1866 false, /* partial_inplace */
1867 0, /* src_mask */
1868 0xffffffff, /* dst_mask */
1869 false), /* pcrel_offset */
1870 HOWTO (R_ARM_TLS_LDM32_FDPIC, /* type */
1871 0, /* rightshift */
1872 2, /* size (0 = byte, 1 = short, 2 = long) */
1873 32, /* bitsize */
1874 false, /* pc_relative */
1875 0, /* bitpos */
1876 complain_overflow_bitfield,/* complain_on_overflow */
1877 bfd_elf_generic_reloc, /* special_function */
1878 "R_ARM_TLS_LDM32_FDPIC",/* name */
1879 false, /* partial_inplace */
1880 0, /* src_mask */
1881 0xffffffff, /* dst_mask */
1882 false), /* pcrel_offset */
1883 HOWTO (R_ARM_TLS_IE32_FDPIC, /* type */
1884 0, /* rightshift */
1885 2, /* size (0 = byte, 1 = short, 2 = long) */
1886 32, /* bitsize */
1887 false, /* pc_relative */
1888 0, /* bitpos */
1889 complain_overflow_bitfield,/* complain_on_overflow */
1890 bfd_elf_generic_reloc, /* special_function */
1891 "R_ARM_TLS_IE32_FDPIC",/* name */
1892 false, /* partial_inplace */
1893 0, /* src_mask */
1894 0xffffffff, /* dst_mask */
1895 false), /* pcrel_offset */
1896 };
1897
1898 /* 249-255 extended, currently unused, relocations: */
1899 static reloc_howto_type elf32_arm_howto_table_3[4] =
1900 {
1901 HOWTO (R_ARM_RREL32, /* type */
1902 0, /* rightshift */
1903 0, /* size (0 = byte, 1 = short, 2 = long) */
1904 0, /* bitsize */
1905 false, /* pc_relative */
1906 0, /* bitpos */
1907 complain_overflow_dont,/* complain_on_overflow */
1908 bfd_elf_generic_reloc, /* special_function */
1909 "R_ARM_RREL32", /* name */
1910 false, /* partial_inplace */
1911 0, /* src_mask */
1912 0, /* dst_mask */
1913 false), /* pcrel_offset */
1914
1915 HOWTO (R_ARM_RABS32, /* type */
1916 0, /* rightshift */
1917 0, /* size (0 = byte, 1 = short, 2 = long) */
1918 0, /* bitsize */
1919 false, /* pc_relative */
1920 0, /* bitpos */
1921 complain_overflow_dont,/* complain_on_overflow */
1922 bfd_elf_generic_reloc, /* special_function */
1923 "R_ARM_RABS32", /* name */
1924 false, /* partial_inplace */
1925 0, /* src_mask */
1926 0, /* dst_mask */
1927 false), /* pcrel_offset */
1928
1929 HOWTO (R_ARM_RPC24, /* type */
1930 0, /* rightshift */
1931 0, /* size (0 = byte, 1 = short, 2 = long) */
1932 0, /* bitsize */
1933 false, /* pc_relative */
1934 0, /* bitpos */
1935 complain_overflow_dont,/* complain_on_overflow */
1936 bfd_elf_generic_reloc, /* special_function */
1937 "R_ARM_RPC24", /* name */
1938 false, /* partial_inplace */
1939 0, /* src_mask */
1940 0, /* dst_mask */
1941 false), /* pcrel_offset */
1942
1943 HOWTO (R_ARM_RBASE, /* type */
1944 0, /* rightshift */
1945 0, /* size (0 = byte, 1 = short, 2 = long) */
1946 0, /* bitsize */
1947 false, /* pc_relative */
1948 0, /* bitpos */
1949 complain_overflow_dont,/* complain_on_overflow */
1950 bfd_elf_generic_reloc, /* special_function */
1951 "R_ARM_RBASE", /* name */
1952 false, /* partial_inplace */
1953 0, /* src_mask */
1954 0, /* dst_mask */
1955 false) /* pcrel_offset */
1956 };
1957
1958 static reloc_howto_type *
1959 elf32_arm_howto_from_type (unsigned int r_type)
1960 {
1961 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1962 return &elf32_arm_howto_table_1[r_type];
1963
1964 if (r_type >= R_ARM_IRELATIVE
1965 && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2))
1966 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1967
1968 if (r_type >= R_ARM_RREL32
1969 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1970 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1971
1972 return NULL;
1973 }
1974
1975 static bool
1976 elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc,
1977 Elf_Internal_Rela * elf_reloc)
1978 {
1979 unsigned int r_type;
1980
1981 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1982 if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL)
1983 {
1984 /* xgettext:c-format */
1985 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1986 abfd, r_type);
1987 bfd_set_error (bfd_error_bad_value);
1988 return false;
1989 }
1990 return true;
1991 }
1992
1993 struct elf32_arm_reloc_map
1994 {
1995 bfd_reloc_code_real_type bfd_reloc_val;
1996 unsigned char elf_reloc_val;
1997 };
1998
1999 /* All entries in this list must also be present in elf32_arm_howto_table. */
2000 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
2001 {
2002 {BFD_RELOC_NONE, R_ARM_NONE},
2003 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
2004 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
2005 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
2006 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
2007 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
2008 {BFD_RELOC_32, R_ARM_ABS32},
2009 {BFD_RELOC_32_PCREL, R_ARM_REL32},
2010 {BFD_RELOC_8, R_ARM_ABS8},
2011 {BFD_RELOC_16, R_ARM_ABS16},
2012 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
2013 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
2014 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
2015 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
2016 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
2017 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
2018 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
2019 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
2020 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
2021 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
2022 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
2023 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
2024 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
2025 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
2026 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
2027 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
2028 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
2029 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
2030 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
2031 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
2032 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
2033 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
2034 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
2035 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
2036 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
2037 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
2038 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
2039 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
2040 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
2041 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
2042 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
2043 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
2044 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
2045 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
2046 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
2047 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
2048 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
2049 {BFD_RELOC_ARM_GOTFUNCDESC, R_ARM_GOTFUNCDESC},
2050 {BFD_RELOC_ARM_GOTOFFFUNCDESC, R_ARM_GOTOFFFUNCDESC},
2051 {BFD_RELOC_ARM_FUNCDESC, R_ARM_FUNCDESC},
2052 {BFD_RELOC_ARM_FUNCDESC_VALUE, R_ARM_FUNCDESC_VALUE},
2053 {BFD_RELOC_ARM_TLS_GD32_FDPIC, R_ARM_TLS_GD32_FDPIC},
2054 {BFD_RELOC_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_LDM32_FDPIC},
2055 {BFD_RELOC_ARM_TLS_IE32_FDPIC, R_ARM_TLS_IE32_FDPIC},
2056 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
2057 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
2058 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
2059 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
2060 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
2061 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
2062 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
2063 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
2064 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
2065 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
2066 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
2067 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
2068 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
2069 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
2070 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
2071 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
2072 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
2073 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
2074 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
2075 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
2076 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
2077 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
2078 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
2079 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
2080 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
2081 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
2082 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
2083 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
2084 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
2085 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
2086 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
2087 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
2088 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
2089 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
2090 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
2091 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
2092 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
2093 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
2094 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
2095 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
2096 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
2097 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
2098 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC},
2099 {BFD_RELOC_ARM_THUMB_BF17, R_ARM_THM_BF16},
2100 {BFD_RELOC_ARM_THUMB_BF13, R_ARM_THM_BF12},
2101 {BFD_RELOC_ARM_THUMB_BF19, R_ARM_THM_BF18}
2102 };
2103
2104 static reloc_howto_type *
2105 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2106 bfd_reloc_code_real_type code)
2107 {
2108 unsigned int i;
2109
2110 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
2111 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
2112 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
2113
2114 return NULL;
2115 }
2116
2117 static reloc_howto_type *
2118 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2119 const char *r_name)
2120 {
2121 unsigned int i;
2122
2123 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
2124 if (elf32_arm_howto_table_1[i].name != NULL
2125 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
2126 return &elf32_arm_howto_table_1[i];
2127
2128 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
2129 if (elf32_arm_howto_table_2[i].name != NULL
2130 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
2131 return &elf32_arm_howto_table_2[i];
2132
2133 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
2134 if (elf32_arm_howto_table_3[i].name != NULL
2135 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
2136 return &elf32_arm_howto_table_3[i];
2137
2138 return NULL;
2139 }
2140
2141 /* Support for core dump NOTE sections. */
2142
2143 static bool
2144 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2145 {
2146 int offset;
2147 size_t size;
2148
2149 switch (note->descsz)
2150 {
2151 default:
2152 return false;
2153
2154 case 148: /* Linux/ARM 32-bit. */
2155 /* pr_cursig */
2156 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2157
2158 /* pr_pid */
2159 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2160
2161 /* pr_reg */
2162 offset = 72;
2163 size = 72;
2164
2165 break;
2166 }
2167
2168 /* Make a ".reg/999" section. */
2169 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2170 size, note->descpos + offset);
2171 }
2172
2173 static bool
2174 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2175 {
2176 switch (note->descsz)
2177 {
2178 default:
2179 return false;
2180
2181 case 124: /* Linux/ARM elf_prpsinfo. */
2182 elf_tdata (abfd)->core->pid
2183 = bfd_get_32 (abfd, note->descdata + 12);
2184 elf_tdata (abfd)->core->program
2185 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2186 elf_tdata (abfd)->core->command
2187 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2188 }
2189
2190 /* Note that for some reason, a spurious space is tacked
2191 onto the end of the args in some (at least one anyway)
2192 implementations, so strip it off if it exists. */
2193 {
2194 char *command = elf_tdata (abfd)->core->command;
2195 int n = strlen (command);
2196
2197 if (0 < n && command[n - 1] == ' ')
2198 command[n - 1] = '\0';
2199 }
2200
2201 return true;
2202 }
2203
2204 static char *
2205 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2206 int note_type, ...)
2207 {
2208 switch (note_type)
2209 {
2210 default:
2211 return NULL;
2212
2213 case NT_PRPSINFO:
2214 {
2215 char data[124] ATTRIBUTE_NONSTRING;
2216 va_list ap;
2217
2218 va_start (ap, note_type);
2219 memset (data, 0, sizeof (data));
2220 strncpy (data + 28, va_arg (ap, const char *), 16);
2221 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2222 DIAGNOSTIC_PUSH;
2223 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
2224 -Wstringop-truncation:
2225 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
2226 */
2227 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
2228 #endif
2229 strncpy (data + 44, va_arg (ap, const char *), 80);
2230 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2231 DIAGNOSTIC_POP;
2232 #endif
2233 va_end (ap);
2234
2235 return elfcore_write_note (abfd, buf, bufsiz,
2236 "CORE", note_type, data, sizeof (data));
2237 }
2238
2239 case NT_PRSTATUS:
2240 {
2241 char data[148];
2242 va_list ap;
2243 long pid;
2244 int cursig;
2245 const void *greg;
2246
2247 va_start (ap, note_type);
2248 memset (data, 0, sizeof (data));
2249 pid = va_arg (ap, long);
2250 bfd_put_32 (abfd, pid, data + 24);
2251 cursig = va_arg (ap, int);
2252 bfd_put_16 (abfd, cursig, data + 12);
2253 greg = va_arg (ap, const void *);
2254 memcpy (data + 72, greg, 72);
2255 va_end (ap);
2256
2257 return elfcore_write_note (abfd, buf, bufsiz,
2258 "CORE", note_type, data, sizeof (data));
2259 }
2260 }
2261 }
2262
2263 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2264 #define TARGET_LITTLE_NAME "elf32-littlearm"
2265 #define TARGET_BIG_SYM arm_elf32_be_vec
2266 #define TARGET_BIG_NAME "elf32-bigarm"
2267
2268 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2269 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2270 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2271
2272 typedef unsigned long int insn32;
2273 typedef unsigned short int insn16;
2274
2275 /* In lieu of proper flags, assume all EABIv4 or later objects are
2276 interworkable. */
2277 #define INTERWORK_FLAG(abfd) \
2278 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2279 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2280 || ((abfd)->flags & BFD_LINKER_CREATED))
2281
2282 /* The linker script knows the section names for placement.
2283 The entry_names are used to do simple name mangling on the stubs.
2284 Given a function name, and its type, the stub can be found. The
2285 name can be changed. The only requirement is the %s be present. */
2286 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2287 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2288
2289 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2290 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2291
2292 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2293 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2294
2295 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2296 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2297
2298 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2299 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2300
2301 #define STUB_ENTRY_NAME "__%s_veneer"
2302
2303 #define CMSE_PREFIX "__acle_se_"
2304
2305 #define CMSE_STUB_NAME ".gnu.sgstubs"
2306
2307 /* The name of the dynamic interpreter. This is put in the .interp
2308 section. */
2309 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2310
2311 /* FDPIC default stack size. */
2312 #define DEFAULT_STACK_SIZE 0x8000
2313
2314 static const unsigned long tls_trampoline [] =
2315 {
2316 0xe08e0000, /* add r0, lr, r0 */
2317 0xe5901004, /* ldr r1, [r0,#4] */
2318 0xe12fff11, /* bx r1 */
2319 };
2320
2321 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2322 {
2323 0xe52d2004, /* push {r2} */
2324 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2325 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2326 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2327 0xe081100f, /* 2: add r1, pc */
2328 0xe12fff12, /* bx r2 */
2329 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2330 + dl_tlsdesc_lazy_resolver(GOT) */
2331 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2332 };
2333
2334 /* NOTE: [Thumb nop sequence]
2335 When adding code that transitions from Thumb to Arm the instruction that
2336 should be used for the alignment padding should be 0xe7fd (b .-2) instead of
2337 a nop for performance reasons. */
2338
2339 /* ARM FDPIC PLT entry. */
2340 /* The last 5 words contain PLT lazy fragment code and data. */
2341 static const bfd_vma elf32_arm_fdpic_plt_entry [] =
2342 {
2343 0xe59fc008, /* ldr r12, .L1 */
2344 0xe08cc009, /* add r12, r12, r9 */
2345 0xe59c9004, /* ldr r9, [r12, #4] */
2346 0xe59cf000, /* ldr pc, [r12] */
2347 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */
2348 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */
2349 0xe51fc00c, /* ldr r12, [pc, #-12] */
2350 0xe92d1000, /* push {r12} */
2351 0xe599c004, /* ldr r12, [r9, #4] */
2352 0xe599f000, /* ldr pc, [r9] */
2353 };
2354
2355 /* Thumb FDPIC PLT entry. */
2356 /* The last 5 words contain PLT lazy fragment code and data. */
2357 static const bfd_vma elf32_arm_fdpic_thumb_plt_entry [] =
2358 {
2359 0xc00cf8df, /* ldr.w r12, .L1 */
2360 0x0c09eb0c, /* add.w r12, r12, r9 */
2361 0x9004f8dc, /* ldr.w r9, [r12, #4] */
2362 0xf000f8dc, /* ldr.w pc, [r12] */
2363 0x00000000, /* .L1 .word foo(GOTOFFFUNCDESC) */
2364 0x00000000, /* .L2 .word foo(funcdesc_value_reloc_offset) */
2365 0xc008f85f, /* ldr.w r12, .L2 */
2366 0xcd04f84d, /* push {r12} */
2367 0xc004f8d9, /* ldr.w r12, [r9, #4] */
2368 0xf000f8d9, /* ldr.w pc, [r9] */
2369 };
2370
2371 #ifdef FOUR_WORD_PLT
2372
2373 /* The first entry in a procedure linkage table looks like
2374 this. It is set up so that any shared library function that is
2375 called before the relocation has been set up calls the dynamic
2376 linker first. */
2377 static const bfd_vma elf32_arm_plt0_entry [] =
2378 {
2379 0xe52de004, /* str lr, [sp, #-4]! */
2380 0xe59fe010, /* ldr lr, [pc, #16] */
2381 0xe08fe00e, /* add lr, pc, lr */
2382 0xe5bef008, /* ldr pc, [lr, #8]! */
2383 };
2384
2385 /* Subsequent entries in a procedure linkage table look like
2386 this. */
2387 static const bfd_vma elf32_arm_plt_entry [] =
2388 {
2389 0xe28fc600, /* add ip, pc, #NN */
2390 0xe28cca00, /* add ip, ip, #NN */
2391 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2392 0x00000000, /* unused */
2393 };
2394
2395 #else /* not FOUR_WORD_PLT */
2396
2397 /* The first entry in a procedure linkage table looks like
2398 this. It is set up so that any shared library function that is
2399 called before the relocation has been set up calls the dynamic
2400 linker first. */
2401 static const bfd_vma elf32_arm_plt0_entry [] =
2402 {
2403 0xe52de004, /* str lr, [sp, #-4]! */
2404 0xe59fe004, /* ldr lr, [pc, #4] */
2405 0xe08fe00e, /* add lr, pc, lr */
2406 0xe5bef008, /* ldr pc, [lr, #8]! */
2407 0x00000000, /* &GOT[0] - . */
2408 };
2409
2410 /* By default subsequent entries in a procedure linkage table look like
2411 this. Offsets that don't fit into 28 bits will cause link error. */
2412 static const bfd_vma elf32_arm_plt_entry_short [] =
2413 {
2414 0xe28fc600, /* add ip, pc, #0xNN00000 */
2415 0xe28cca00, /* add ip, ip, #0xNN000 */
2416 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2417 };
2418
2419 /* When explicitly asked, we'll use this "long" entry format
2420 which can cope with arbitrary displacements. */
2421 static const bfd_vma elf32_arm_plt_entry_long [] =
2422 {
2423 0xe28fc200, /* add ip, pc, #0xN0000000 */
2424 0xe28cc600, /* add ip, ip, #0xNN00000 */
2425 0xe28cca00, /* add ip, ip, #0xNN000 */
2426 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2427 };
2428
2429 static bool elf32_arm_use_long_plt_entry = false;
2430
2431 #endif /* not FOUR_WORD_PLT */
2432
2433 /* The first entry in a procedure linkage table looks like this.
2434 It is set up so that any shared library function that is called before the
2435 relocation has been set up calls the dynamic linker first. */
2436 static const bfd_vma elf32_thumb2_plt0_entry [] =
2437 {
2438 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2439 an instruction maybe encoded to one or two array elements. */
2440 0xf8dfb500, /* push {lr} */
2441 0x44fee008, /* ldr.w lr, [pc, #8] */
2442 /* add lr, pc */
2443 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2444 0x00000000, /* &GOT[0] - . */
2445 };
2446
2447 /* Subsequent entries in a procedure linkage table for thumb only target
2448 look like this. */
2449 static const bfd_vma elf32_thumb2_plt_entry [] =
2450 {
2451 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2452 an instruction maybe encoded to one or two array elements. */
2453 0x0c00f240, /* movw ip, #0xNNNN */
2454 0x0c00f2c0, /* movt ip, #0xNNNN */
2455 0xf8dc44fc, /* add ip, pc */
2456 0xe7fcf000 /* ldr.w pc, [ip] */
2457 /* b .-4 */
2458 };
2459
2460 /* The format of the first entry in the procedure linkage table
2461 for a VxWorks executable. */
2462 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2463 {
2464 0xe52dc008, /* str ip,[sp,#-8]! */
2465 0xe59fc000, /* ldr ip,[pc] */
2466 0xe59cf008, /* ldr pc,[ip,#8] */
2467 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2468 };
2469
2470 /* The format of subsequent entries in a VxWorks executable. */
2471 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2472 {
2473 0xe59fc000, /* ldr ip,[pc] */
2474 0xe59cf000, /* ldr pc,[ip] */
2475 0x00000000, /* .long @got */
2476 0xe59fc000, /* ldr ip,[pc] */
2477 0xea000000, /* b _PLT */
2478 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2479 };
2480
2481 /* The format of entries in a VxWorks shared library. */
2482 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2483 {
2484 0xe59fc000, /* ldr ip,[pc] */
2485 0xe79cf009, /* ldr pc,[ip,r9] */
2486 0x00000000, /* .long @got */
2487 0xe59fc000, /* ldr ip,[pc] */
2488 0xe599f008, /* ldr pc,[r9,#8] */
2489 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2490 };
2491
2492 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2493 #define PLT_THUMB_STUB_SIZE 4
2494 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2495 {
2496 0x4778, /* bx pc */
2497 0xe7fd /* b .-2 */
2498 };
2499
2500 /* The first entry in a procedure linkage table looks like
2501 this. It is set up so that any shared library function that is
2502 called before the relocation has been set up calls the dynamic
2503 linker first. */
2504 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2505 {
2506 /* First bundle: */
2507 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2508 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2509 0xe08cc00f, /* add ip, ip, pc */
2510 0xe52dc008, /* str ip, [sp, #-8]! */
2511 /* Second bundle: */
2512 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2513 0xe59cc000, /* ldr ip, [ip] */
2514 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2515 0xe12fff1c, /* bx ip */
2516 /* Third bundle: */
2517 0xe320f000, /* nop */
2518 0xe320f000, /* nop */
2519 0xe320f000, /* nop */
2520 /* .Lplt_tail: */
2521 0xe50dc004, /* str ip, [sp, #-4] */
2522 /* Fourth bundle: */
2523 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2524 0xe59cc000, /* ldr ip, [ip] */
2525 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2526 0xe12fff1c, /* bx ip */
2527 };
2528 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2529
2530 /* Subsequent entries in a procedure linkage table look like this. */
2531 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2532 {
2533 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2534 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2535 0xe08cc00f, /* add ip, ip, pc */
2536 0xea000000, /* b .Lplt_tail */
2537 };
2538
2539 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2540 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2541 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2542 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2543 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2544 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2545 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2546 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2547
2548 enum stub_insn_type
2549 {
2550 THUMB16_TYPE = 1,
2551 THUMB32_TYPE,
2552 ARM_TYPE,
2553 DATA_TYPE
2554 };
2555
2556 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2557 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2558 is inserted in arm_build_one_stub(). */
2559 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2560 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2561 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2562 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2563 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2564 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2565 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2566 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2567
2568 typedef struct
2569 {
2570 bfd_vma data;
2571 enum stub_insn_type type;
2572 unsigned int r_type;
2573 int reloc_addend;
2574 } insn_sequence;
2575
2576 /* See note [Thumb nop sequence] when adding a veneer. */
2577
2578 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2579 to reach the stub if necessary. */
2580 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2581 {
2582 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2583 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2584 };
2585
2586 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2587 available. */
2588 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2589 {
2590 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2591 ARM_INSN (0xe12fff1c), /* bx ip */
2592 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2593 };
2594
2595 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2596 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2597 {
2598 THUMB16_INSN (0xb401), /* push {r0} */
2599 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2600 THUMB16_INSN (0x4684), /* mov ip, r0 */
2601 THUMB16_INSN (0xbc01), /* pop {r0} */
2602 THUMB16_INSN (0x4760), /* bx ip */
2603 THUMB16_INSN (0xbf00), /* nop */
2604 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2605 };
2606
2607 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2608 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2609 {
2610 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2611 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2612 };
2613
2614 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2615 M-profile architectures. */
2616 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2617 {
2618 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2619 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2620 THUMB16_INSN (0x4760), /* bx ip */
2621 };
2622
2623 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2624 allowed. */
2625 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2626 {
2627 THUMB16_INSN (0x4778), /* bx pc */
2628 THUMB16_INSN (0xe7fd), /* b .-2 */
2629 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2630 ARM_INSN (0xe12fff1c), /* bx ip */
2631 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2632 };
2633
2634 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2635 available. */
2636 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2637 {
2638 THUMB16_INSN (0x4778), /* bx pc */
2639 THUMB16_INSN (0xe7fd), /* b .-2 */
2640 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2641 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2642 };
2643
2644 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2645 one, when the destination is close enough. */
2646 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2647 {
2648 THUMB16_INSN (0x4778), /* bx pc */
2649 THUMB16_INSN (0xe7fd), /* b .-2 */
2650 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2651 };
2652
2653 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2654 blx to reach the stub if necessary. */
2655 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2656 {
2657 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2658 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2659 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2660 };
2661
2662 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2663 blx to reach the stub if necessary. We can not add into pc;
2664 it is not guaranteed to mode switch (different in ARMv6 and
2665 ARMv7). */
2666 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2667 {
2668 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2669 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2670 ARM_INSN (0xe12fff1c), /* bx ip */
2671 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2672 };
2673
2674 /* V4T ARM -> ARM long branch stub, PIC. */
2675 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2676 {
2677 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2678 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2679 ARM_INSN (0xe12fff1c), /* bx ip */
2680 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2681 };
2682
2683 /* V4T Thumb -> ARM long branch stub, PIC. */
2684 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2685 {
2686 THUMB16_INSN (0x4778), /* bx pc */
2687 THUMB16_INSN (0xe7fd), /* b .-2 */
2688 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2689 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2690 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2691 };
2692
2693 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2694 architectures. */
2695 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2696 {
2697 THUMB16_INSN (0xb401), /* push {r0} */
2698 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2699 THUMB16_INSN (0x46fc), /* mov ip, pc */
2700 THUMB16_INSN (0x4484), /* add ip, r0 */
2701 THUMB16_INSN (0xbc01), /* pop {r0} */
2702 THUMB16_INSN (0x4760), /* bx ip */
2703 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2704 };
2705
2706 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2707 allowed. */
2708 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2709 {
2710 THUMB16_INSN (0x4778), /* bx pc */
2711 THUMB16_INSN (0xe7fd), /* b .-2 */
2712 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2713 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2714 ARM_INSN (0xe12fff1c), /* bx ip */
2715 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2716 };
2717
2718 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2719 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2720 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2721 {
2722 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2723 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2724 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2725 };
2726
2727 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2728 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2729 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2730 {
2731 THUMB16_INSN (0x4778), /* bx pc */
2732 THUMB16_INSN (0xe7fd), /* b .-2 */
2733 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2734 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2735 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2736 };
2737
2738 /* NaCl ARM -> ARM long branch stub. */
2739 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2740 {
2741 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2742 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2743 ARM_INSN (0xe12fff1c), /* bx ip */
2744 ARM_INSN (0xe320f000), /* nop */
2745 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2746 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2747 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2748 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2749 };
2750
2751 /* NaCl ARM -> ARM long branch stub, PIC. */
2752 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2753 {
2754 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2755 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2756 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2757 ARM_INSN (0xe12fff1c), /* bx ip */
2758 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2759 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2760 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2761 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2762 };
2763
2764 /* Stub used for transition to secure state (aka SG veneer). */
2765 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2766 {
2767 THUMB32_INSN (0xe97fe97f), /* sg. */
2768 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2769 };
2770
2771
2772 /* Cortex-A8 erratum-workaround stubs. */
2773
2774 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2775 can't use a conditional branch to reach this stub). */
2776
2777 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2778 {
2779 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2780 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2781 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2782 };
2783
2784 /* Stub used for b.w and bl.w instructions. */
2785
2786 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2787 {
2788 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2789 };
2790
2791 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2792 {
2793 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2794 };
2795
2796 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2797 instruction (which switches to ARM mode) to point to this stub. Jump to the
2798 real destination using an ARM-mode branch. */
2799
2800 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2801 {
2802 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2803 };
2804
2805 /* For each section group there can be a specially created linker section
2806 to hold the stubs for that group. The name of the stub section is based
2807 upon the name of another section within that group with the suffix below
2808 applied.
2809
2810 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2811 create what appeared to be a linker stub section when it actually
2812 contained user code/data. For example, consider this fragment:
2813
2814 const char * stubborn_problems[] = { "np" };
2815
2816 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2817 section called:
2818
2819 .data.rel.local.stubborn_problems
2820
2821 This then causes problems in arm32_arm_build_stubs() as it triggers:
2822
2823 // Ignore non-stub sections.
2824 if (!strstr (stub_sec->name, STUB_SUFFIX))
2825 continue;
2826
2827 And so the section would be ignored instead of being processed. Hence
2828 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2829 C identifier. */
2830 #define STUB_SUFFIX ".__stub"
2831
2832 /* One entry per long/short branch stub defined above. */
2833 #define DEF_STUBS \
2834 DEF_STUB(long_branch_any_any) \
2835 DEF_STUB(long_branch_v4t_arm_thumb) \
2836 DEF_STUB(long_branch_thumb_only) \
2837 DEF_STUB(long_branch_v4t_thumb_thumb) \
2838 DEF_STUB(long_branch_v4t_thumb_arm) \
2839 DEF_STUB(short_branch_v4t_thumb_arm) \
2840 DEF_STUB(long_branch_any_arm_pic) \
2841 DEF_STUB(long_branch_any_thumb_pic) \
2842 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2843 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2844 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2845 DEF_STUB(long_branch_thumb_only_pic) \
2846 DEF_STUB(long_branch_any_tls_pic) \
2847 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2848 DEF_STUB(long_branch_arm_nacl) \
2849 DEF_STUB(long_branch_arm_nacl_pic) \
2850 DEF_STUB(cmse_branch_thumb_only) \
2851 DEF_STUB(a8_veneer_b_cond) \
2852 DEF_STUB(a8_veneer_b) \
2853 DEF_STUB(a8_veneer_bl) \
2854 DEF_STUB(a8_veneer_blx) \
2855 DEF_STUB(long_branch_thumb2_only) \
2856 DEF_STUB(long_branch_thumb2_only_pure)
2857
2858 #define DEF_STUB(x) arm_stub_##x,
2859 enum elf32_arm_stub_type
2860 {
2861 arm_stub_none,
2862 DEF_STUBS
2863 max_stub_type
2864 };
2865 #undef DEF_STUB
2866
2867 /* Note the first a8_veneer type. */
2868 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2869
2870 typedef struct
2871 {
2872 const insn_sequence* template_sequence;
2873 int template_size;
2874 } stub_def;
2875
2876 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2877 static const stub_def stub_definitions[] =
2878 {
2879 {NULL, 0},
2880 DEF_STUBS
2881 };
2882
2883 struct elf32_arm_stub_hash_entry
2884 {
2885 /* Base hash table entry structure. */
2886 struct bfd_hash_entry root;
2887
2888 /* The stub section. */
2889 asection *stub_sec;
2890
2891 /* Offset within stub_sec of the beginning of this stub. */
2892 bfd_vma stub_offset;
2893
2894 /* Given the symbol's value and its section we can determine its final
2895 value when building the stubs (so the stub knows where to jump). */
2896 bfd_vma target_value;
2897 asection *target_section;
2898
2899 /* Same as above but for the source of the branch to the stub. Used for
2900 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2901 such, source section does not need to be recorded since Cortex-A8 erratum
2902 workaround stubs are only generated when both source and target are in the
2903 same section. */
2904 bfd_vma source_value;
2905
2906 /* The instruction which caused this stub to be generated (only valid for
2907 Cortex-A8 erratum workaround stubs at present). */
2908 unsigned long orig_insn;
2909
2910 /* The stub type. */
2911 enum elf32_arm_stub_type stub_type;
2912 /* Its encoding size in bytes. */
2913 int stub_size;
2914 /* Its template. */
2915 const insn_sequence *stub_template;
2916 /* The size of the template (number of entries). */
2917 int stub_template_size;
2918
2919 /* The symbol table entry, if any, that this was derived from. */
2920 struct elf32_arm_link_hash_entry *h;
2921
2922 /* Type of branch. */
2923 enum arm_st_branch_type branch_type;
2924
2925 /* Where this stub is being called from, or, in the case of combined
2926 stub sections, the first input section in the group. */
2927 asection *id_sec;
2928
2929 /* The name for the local symbol at the start of this stub. The
2930 stub name in the hash table has to be unique; this does not, so
2931 it can be friendlier. */
2932 char *output_name;
2933 };
2934
2935 /* Used to build a map of a section. This is required for mixed-endian
2936 code/data. */
2937
2938 typedef struct elf32_elf_section_map
2939 {
2940 bfd_vma vma;
2941 char type;
2942 }
2943 elf32_arm_section_map;
2944
2945 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2946
2947 typedef enum
2948 {
2949 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2950 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2951 VFP11_ERRATUM_ARM_VENEER,
2952 VFP11_ERRATUM_THUMB_VENEER
2953 }
2954 elf32_vfp11_erratum_type;
2955
2956 typedef struct elf32_vfp11_erratum_list
2957 {
2958 struct elf32_vfp11_erratum_list *next;
2959 bfd_vma vma;
2960 union
2961 {
2962 struct
2963 {
2964 struct elf32_vfp11_erratum_list *veneer;
2965 unsigned int vfp_insn;
2966 } b;
2967 struct
2968 {
2969 struct elf32_vfp11_erratum_list *branch;
2970 unsigned int id;
2971 } v;
2972 } u;
2973 elf32_vfp11_erratum_type type;
2974 }
2975 elf32_vfp11_erratum_list;
2976
2977 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2978 veneer. */
2979 typedef enum
2980 {
2981 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2982 STM32L4XX_ERRATUM_VENEER
2983 }
2984 elf32_stm32l4xx_erratum_type;
2985
2986 typedef struct elf32_stm32l4xx_erratum_list
2987 {
2988 struct elf32_stm32l4xx_erratum_list *next;
2989 bfd_vma vma;
2990 union
2991 {
2992 struct
2993 {
2994 struct elf32_stm32l4xx_erratum_list *veneer;
2995 unsigned int insn;
2996 } b;
2997 struct
2998 {
2999 struct elf32_stm32l4xx_erratum_list *branch;
3000 unsigned int id;
3001 } v;
3002 } u;
3003 elf32_stm32l4xx_erratum_type type;
3004 }
3005 elf32_stm32l4xx_erratum_list;
3006
3007 typedef enum
3008 {
3009 DELETE_EXIDX_ENTRY,
3010 INSERT_EXIDX_CANTUNWIND_AT_END
3011 }
3012 arm_unwind_edit_type;
3013
3014 /* A (sorted) list of edits to apply to an unwind table. */
3015 typedef struct arm_unwind_table_edit
3016 {
3017 arm_unwind_edit_type type;
3018 /* Note: we sometimes want to insert an unwind entry corresponding to a
3019 section different from the one we're currently writing out, so record the
3020 (text) section this edit relates to here. */
3021 asection *linked_section;
3022 unsigned int index;
3023 struct arm_unwind_table_edit *next;
3024 }
3025 arm_unwind_table_edit;
3026
3027 typedef struct _arm_elf_section_data
3028 {
3029 /* Information about mapping symbols. */
3030 struct bfd_elf_section_data elf;
3031 unsigned int mapcount;
3032 unsigned int mapsize;
3033 elf32_arm_section_map *map;
3034 /* Information about CPU errata. */
3035 unsigned int erratumcount;
3036 elf32_vfp11_erratum_list *erratumlist;
3037 unsigned int stm32l4xx_erratumcount;
3038 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
3039 unsigned int additional_reloc_count;
3040 /* Information about unwind tables. */
3041 union
3042 {
3043 /* Unwind info attached to a text section. */
3044 struct
3045 {
3046 asection *arm_exidx_sec;
3047 } text;
3048
3049 /* Unwind info attached to an .ARM.exidx section. */
3050 struct
3051 {
3052 arm_unwind_table_edit *unwind_edit_list;
3053 arm_unwind_table_edit *unwind_edit_tail;
3054 } exidx;
3055 } u;
3056 }
3057 _arm_elf_section_data;
3058
3059 #define elf32_arm_section_data(sec) \
3060 ((_arm_elf_section_data *) elf_section_data (sec))
3061
3062 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
3063 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
3064 so may be created multiple times: we use an array of these entries whilst
3065 relaxing which we can refresh easily, then create stubs for each potentially
3066 erratum-triggering instruction once we've settled on a solution. */
3067
3068 struct a8_erratum_fix
3069 {
3070 bfd *input_bfd;
3071 asection *section;
3072 bfd_vma offset;
3073 bfd_vma target_offset;
3074 unsigned long orig_insn;
3075 char *stub_name;
3076 enum elf32_arm_stub_type stub_type;
3077 enum arm_st_branch_type branch_type;
3078 };
3079
3080 /* A table of relocs applied to branches which might trigger Cortex-A8
3081 erratum. */
3082
3083 struct a8_erratum_reloc
3084 {
3085 bfd_vma from;
3086 bfd_vma destination;
3087 struct elf32_arm_link_hash_entry *hash;
3088 const char *sym_name;
3089 unsigned int r_type;
3090 enum arm_st_branch_type branch_type;
3091 bool non_a8_stub;
3092 };
3093
3094 /* The size of the thread control block. */
3095 #define TCB_SIZE 8
3096
3097 /* ARM-specific information about a PLT entry, over and above the usual
3098 gotplt_union. */
3099 struct arm_plt_info
3100 {
3101 /* We reference count Thumb references to a PLT entry separately,
3102 so that we can emit the Thumb trampoline only if needed. */
3103 bfd_signed_vma thumb_refcount;
3104
3105 /* Some references from Thumb code may be eliminated by BL->BLX
3106 conversion, so record them separately. */
3107 bfd_signed_vma maybe_thumb_refcount;
3108
3109 /* How many of the recorded PLT accesses were from non-call relocations.
3110 This information is useful when deciding whether anything takes the
3111 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
3112 non-call references to the function should resolve directly to the
3113 real runtime target. */
3114 unsigned int noncall_refcount;
3115
3116 /* Since PLT entries have variable size if the Thumb prologue is
3117 used, we need to record the index into .got.plt instead of
3118 recomputing it from the PLT offset. */
3119 bfd_signed_vma got_offset;
3120 };
3121
3122 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
3123 struct arm_local_iplt_info
3124 {
3125 /* The information that is usually found in the generic ELF part of
3126 the hash table entry. */
3127 union gotplt_union root;
3128
3129 /* The information that is usually found in the ARM-specific part of
3130 the hash table entry. */
3131 struct arm_plt_info arm;
3132
3133 /* A list of all potential dynamic relocations against this symbol. */
3134 struct elf_dyn_relocs *dyn_relocs;
3135 };
3136
3137 /* Structure to handle FDPIC support for local functions. */
3138 struct fdpic_local {
3139 unsigned int funcdesc_cnt;
3140 unsigned int gotofffuncdesc_cnt;
3141 int funcdesc_offset;
3142 };
3143
3144 struct elf_arm_obj_tdata
3145 {
3146 struct elf_obj_tdata root;
3147
3148 /* tls_type for each local got entry. */
3149 char *local_got_tls_type;
3150
3151 /* GOTPLT entries for TLS descriptors. */
3152 bfd_vma *local_tlsdesc_gotent;
3153
3154 /* Information for local symbols that need entries in .iplt. */
3155 struct arm_local_iplt_info **local_iplt;
3156
3157 /* Zero to warn when linking objects with incompatible enum sizes. */
3158 int no_enum_size_warning;
3159
3160 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3161 int no_wchar_size_warning;
3162
3163 /* Maintains FDPIC counters and funcdesc info. */
3164 struct fdpic_local *local_fdpic_cnts;
3165 };
3166
3167 #define elf_arm_tdata(bfd) \
3168 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3169
3170 #define elf32_arm_local_got_tls_type(bfd) \
3171 (elf_arm_tdata (bfd)->local_got_tls_type)
3172
3173 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3174 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3175
3176 #define elf32_arm_local_iplt(bfd) \
3177 (elf_arm_tdata (bfd)->local_iplt)
3178
3179 #define elf32_arm_local_fdpic_cnts(bfd) \
3180 (elf_arm_tdata (bfd)->local_fdpic_cnts)
3181
3182 #define is_arm_elf(bfd) \
3183 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3184 && elf_tdata (bfd) != NULL \
3185 && elf_object_id (bfd) == ARM_ELF_DATA)
3186
3187 static bool
3188 elf32_arm_mkobject (bfd *abfd)
3189 {
3190 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
3191 ARM_ELF_DATA);
3192 }
3193
3194 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3195
3196 /* Structure to handle FDPIC support for extern functions. */
3197 struct fdpic_global {
3198 unsigned int gotofffuncdesc_cnt;
3199 unsigned int gotfuncdesc_cnt;
3200 unsigned int funcdesc_cnt;
3201 int funcdesc_offset;
3202 int gotfuncdesc_offset;
3203 };
3204
3205 /* Arm ELF linker hash entry. */
3206 struct elf32_arm_link_hash_entry
3207 {
3208 struct elf_link_hash_entry root;
3209
3210 /* ARM-specific PLT information. */
3211 struct arm_plt_info plt;
3212
3213 #define GOT_UNKNOWN 0
3214 #define GOT_NORMAL 1
3215 #define GOT_TLS_GD 2
3216 #define GOT_TLS_IE 4
3217 #define GOT_TLS_GDESC 8
3218 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3219 unsigned int tls_type : 8;
3220
3221 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3222 unsigned int is_iplt : 1;
3223
3224 unsigned int unused : 23;
3225
3226 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3227 starting at the end of the jump table. */
3228 bfd_vma tlsdesc_got;
3229
3230 /* The symbol marking the real symbol location for exported thumb
3231 symbols with Arm stubs. */
3232 struct elf_link_hash_entry *export_glue;
3233
3234 /* A pointer to the most recently used stub hash entry against this
3235 symbol. */
3236 struct elf32_arm_stub_hash_entry *stub_cache;
3237
3238 /* Counter for FDPIC relocations against this symbol. */
3239 struct fdpic_global fdpic_cnts;
3240 };
3241
3242 /* Traverse an arm ELF linker hash table. */
3243 #define elf32_arm_link_hash_traverse(table, func, info) \
3244 (elf_link_hash_traverse \
3245 (&(table)->root, \
3246 (bool (*) (struct elf_link_hash_entry *, void *)) (func), \
3247 (info)))
3248
3249 /* Get the ARM elf linker hash table from a link_info structure. */
3250 #define elf32_arm_hash_table(p) \
3251 ((is_elf_hash_table ((p)->hash) \
3252 && elf_hash_table_id (elf_hash_table (p)) == ARM_ELF_DATA) \
3253 ? (struct elf32_arm_link_hash_table *) (p)->hash : NULL)
3254
3255 #define arm_stub_hash_lookup(table, string, create, copy) \
3256 ((struct elf32_arm_stub_hash_entry *) \
3257 bfd_hash_lookup ((table), (string), (create), (copy)))
3258
3259 /* Array to keep track of which stub sections have been created, and
3260 information on stub grouping. */
3261 struct map_stub
3262 {
3263 /* This is the section to which stubs in the group will be
3264 attached. */
3265 asection *link_sec;
3266 /* The stub section. */
3267 asection *stub_sec;
3268 };
3269
3270 #define elf32_arm_compute_jump_table_size(htab) \
3271 ((htab)->next_tls_desc_index * 4)
3272
3273 /* ARM ELF linker hash table. */
3274 struct elf32_arm_link_hash_table
3275 {
3276 /* The main hash table. */
3277 struct elf_link_hash_table root;
3278
3279 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3280 bfd_size_type thumb_glue_size;
3281
3282 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3283 bfd_size_type arm_glue_size;
3284
3285 /* The size in bytes of section containing the ARMv4 BX veneers. */
3286 bfd_size_type bx_glue_size;
3287
3288 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3289 veneer has been populated. */
3290 bfd_vma bx_glue_offset[15];
3291
3292 /* The size in bytes of the section containing glue for VFP11 erratum
3293 veneers. */
3294 bfd_size_type vfp11_erratum_glue_size;
3295
3296 /* The size in bytes of the section containing glue for STM32L4XX erratum
3297 veneers. */
3298 bfd_size_type stm32l4xx_erratum_glue_size;
3299
3300 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3301 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3302 elf32_arm_write_section(). */
3303 struct a8_erratum_fix *a8_erratum_fixes;
3304 unsigned int num_a8_erratum_fixes;
3305
3306 /* An arbitrary input BFD chosen to hold the glue sections. */
3307 bfd * bfd_of_glue_owner;
3308
3309 /* Nonzero to output a BE8 image. */
3310 int byteswap_code;
3311
3312 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3313 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3314 int target1_is_rel;
3315
3316 /* The relocation to use for R_ARM_TARGET2 relocations. */
3317 int target2_reloc;
3318
3319 /* 0 = Ignore R_ARM_V4BX.
3320 1 = Convert BX to MOV PC.
3321 2 = Generate v4 interworing stubs. */
3322 int fix_v4bx;
3323
3324 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3325 int fix_cortex_a8;
3326
3327 /* Whether we should fix the ARM1176 BLX immediate issue. */
3328 int fix_arm1176;
3329
3330 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3331 int use_blx;
3332
3333 /* What sort of code sequences we should look for which may trigger the
3334 VFP11 denorm erratum. */
3335 bfd_arm_vfp11_fix vfp11_fix;
3336
3337 /* Global counter for the number of fixes we have emitted. */
3338 int num_vfp11_fixes;
3339
3340 /* What sort of code sequences we should look for which may trigger the
3341 STM32L4XX erratum. */
3342 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3343
3344 /* Global counter for the number of fixes we have emitted. */
3345 int num_stm32l4xx_fixes;
3346
3347 /* Nonzero to force PIC branch veneers. */
3348 int pic_veneer;
3349
3350 /* The number of bytes in the initial entry in the PLT. */
3351 bfd_size_type plt_header_size;
3352
3353 /* The number of bytes in the subsequent PLT etries. */
3354 bfd_size_type plt_entry_size;
3355
3356 /* True if the target uses REL relocations. */
3357 bool use_rel;
3358
3359 /* Nonzero if import library must be a secure gateway import library
3360 as per ARMv8-M Security Extensions. */
3361 int cmse_implib;
3362
3363 /* The import library whose symbols' address must remain stable in
3364 the import library generated. */
3365 bfd *in_implib_bfd;
3366
3367 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3368 bfd_vma next_tls_desc_index;
3369
3370 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3371 bfd_vma num_tls_desc;
3372
3373 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3374 asection *srelplt2;
3375
3376 /* Offset in .plt section of tls_arm_trampoline. */
3377 bfd_vma tls_trampoline;
3378
3379 /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
3380 union
3381 {
3382 bfd_signed_vma refcount;
3383 bfd_vma offset;
3384 } tls_ldm_got;
3385
3386 /* For convenience in allocate_dynrelocs. */
3387 bfd * obfd;
3388
3389 /* The amount of space used by the reserved portion of the sgotplt
3390 section, plus whatever space is used by the jump slots. */
3391 bfd_vma sgotplt_jump_table_size;
3392
3393 /* The stub hash table. */
3394 struct bfd_hash_table stub_hash_table;
3395
3396 /* Linker stub bfd. */
3397 bfd *stub_bfd;
3398
3399 /* Linker call-backs. */
3400 asection * (*add_stub_section) (const char *, asection *, asection *,
3401 unsigned int);
3402 void (*layout_sections_again) (void);
3403
3404 /* Array to keep track of which stub sections have been created, and
3405 information on stub grouping. */
3406 struct map_stub *stub_group;
3407
3408 /* Input stub section holding secure gateway veneers. */
3409 asection *cmse_stub_sec;
3410
3411 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3412 start to be allocated. */
3413 bfd_vma new_cmse_stub_offset;
3414
3415 /* Number of elements in stub_group. */
3416 unsigned int top_id;
3417
3418 /* Assorted information used by elf32_arm_size_stubs. */
3419 unsigned int bfd_count;
3420 unsigned int top_index;
3421 asection **input_list;
3422
3423 /* True if the target system uses FDPIC. */
3424 int fdpic_p;
3425
3426 /* Fixup section. Used for FDPIC. */
3427 asection *srofixup;
3428 };
3429
3430 /* Add an FDPIC read-only fixup. */
3431 static void
3432 arm_elf_add_rofixup (bfd *output_bfd, asection *srofixup, bfd_vma offset)
3433 {
3434 bfd_vma fixup_offset;
3435
3436 fixup_offset = srofixup->reloc_count++ * 4;
3437 BFD_ASSERT (fixup_offset < srofixup->size);
3438 bfd_put_32 (output_bfd, offset, srofixup->contents + fixup_offset);
3439 }
3440
3441 static inline int
3442 ctz (unsigned int mask)
3443 {
3444 #if GCC_VERSION >= 3004
3445 return __builtin_ctz (mask);
3446 #else
3447 unsigned int i;
3448
3449 for (i = 0; i < 8 * sizeof (mask); i++)
3450 {
3451 if (mask & 0x1)
3452 break;
3453 mask = (mask >> 1);
3454 }
3455 return i;
3456 #endif
3457 }
3458
3459 static inline int
3460 elf32_arm_popcount (unsigned int mask)
3461 {
3462 #if GCC_VERSION >= 3004
3463 return __builtin_popcount (mask);
3464 #else
3465 unsigned int i;
3466 int sum = 0;
3467
3468 for (i = 0; i < 8 * sizeof (mask); i++)
3469 {
3470 if (mask & 0x1)
3471 sum++;
3472 mask = (mask >> 1);
3473 }
3474 return sum;
3475 #endif
3476 }
3477
3478 static void elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
3479 asection *sreloc, Elf_Internal_Rela *rel);
3480
3481 static void
3482 arm_elf_fill_funcdesc(bfd *output_bfd,
3483 struct bfd_link_info *info,
3484 int *funcdesc_offset,
3485 int dynindx,
3486 int offset,
3487 bfd_vma addr,
3488 bfd_vma dynreloc_value,
3489 bfd_vma seg)
3490 {
3491 if ((*funcdesc_offset & 1) == 0)
3492 {
3493 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
3494 asection *sgot = globals->root.sgot;
3495
3496 if (bfd_link_pic(info))
3497 {
3498 asection *srelgot = globals->root.srelgot;
3499 Elf_Internal_Rela outrel;
3500
3501 outrel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
3502 outrel.r_offset = sgot->output_section->vma + sgot->output_offset + offset;
3503 outrel.r_addend = 0;
3504
3505 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
3506 bfd_put_32 (output_bfd, addr, sgot->contents + offset);
3507 bfd_put_32 (output_bfd, seg, sgot->contents + offset + 4);
3508 }
3509 else
3510 {
3511 struct elf_link_hash_entry *hgot = globals->root.hgot;
3512 bfd_vma got_value = hgot->root.u.def.value
3513 + hgot->root.u.def.section->output_section->vma
3514 + hgot->root.u.def.section->output_offset;
3515
3516 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3517 sgot->output_section->vma + sgot->output_offset
3518 + offset);
3519 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3520 sgot->output_section->vma + sgot->output_offset
3521 + offset + 4);
3522 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + offset);
3523 bfd_put_32 (output_bfd, got_value, sgot->contents + offset + 4);
3524 }
3525 *funcdesc_offset |= 1;
3526 }
3527 }
3528
3529 /* Create an entry in an ARM ELF linker hash table. */
3530
3531 static struct bfd_hash_entry *
3532 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3533 struct bfd_hash_table * table,
3534 const char * string)
3535 {
3536 struct elf32_arm_link_hash_entry * ret =
3537 (struct elf32_arm_link_hash_entry *) entry;
3538
3539 /* Allocate the structure if it has not already been allocated by a
3540 subclass. */
3541 if (ret == NULL)
3542 ret = (struct elf32_arm_link_hash_entry *)
3543 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3544 if (ret == NULL)
3545 return (struct bfd_hash_entry *) ret;
3546
3547 /* Call the allocation method of the superclass. */
3548 ret = ((struct elf32_arm_link_hash_entry *)
3549 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3550 table, string));
3551 if (ret != NULL)
3552 {
3553 ret->tls_type = GOT_UNKNOWN;
3554 ret->tlsdesc_got = (bfd_vma) -1;
3555 ret->plt.thumb_refcount = 0;
3556 ret->plt.maybe_thumb_refcount = 0;
3557 ret->plt.noncall_refcount = 0;
3558 ret->plt.got_offset = -1;
3559 ret->is_iplt = false;
3560 ret->export_glue = NULL;
3561
3562 ret->stub_cache = NULL;
3563
3564 ret->fdpic_cnts.gotofffuncdesc_cnt = 0;
3565 ret->fdpic_cnts.gotfuncdesc_cnt = 0;
3566 ret->fdpic_cnts.funcdesc_cnt = 0;
3567 ret->fdpic_cnts.funcdesc_offset = -1;
3568 ret->fdpic_cnts.gotfuncdesc_offset = -1;
3569 }
3570
3571 return (struct bfd_hash_entry *) ret;
3572 }
3573
3574 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3575 symbols. */
3576
3577 static bool
3578 elf32_arm_allocate_local_sym_info (bfd *abfd)
3579 {
3580 if (elf_local_got_refcounts (abfd) == NULL)
3581 {
3582 bfd_size_type num_syms;
3583 bfd_size_type size;
3584 char *data;
3585
3586 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3587 size = num_syms * (sizeof (bfd_signed_vma)
3588 + sizeof (bfd_vma)
3589 + sizeof (struct arm_local_iplt_info *)
3590 + sizeof (struct fdpic_local)
3591 + sizeof (char));
3592 data = bfd_zalloc (abfd, size);
3593 if (data == NULL)
3594 return false;
3595
3596 /* It is important that these all be allocated in descending
3597 order of required alignment, so that arrays allocated later
3598 will be sufficiently aligned. */
3599 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3600 data += num_syms * sizeof (bfd_signed_vma);
3601
3602 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3603 data += num_syms * sizeof (bfd_vma);
3604
3605 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3606 data += num_syms * sizeof (struct arm_local_iplt_info *);
3607
3608 elf32_arm_local_fdpic_cnts (abfd) = (struct fdpic_local *) data;
3609 data += num_syms * sizeof (struct fdpic_local);
3610
3611 elf32_arm_local_got_tls_type (abfd) = data;
3612 #if GCC_VERSION >= 3000
3613 BFD_ASSERT (__alignof__ (*elf32_arm_local_tlsdesc_gotent (abfd))
3614 <= __alignof__ (*elf_local_got_refcounts (abfd)));
3615 BFD_ASSERT (__alignof__ (*elf32_arm_local_iplt (abfd))
3616 <= __alignof__ (*elf32_arm_local_tlsdesc_gotent (abfd)));
3617 BFD_ASSERT (__alignof__ (*elf32_arm_local_fdpic_cnts (abfd))
3618 <= __alignof__ (*elf32_arm_local_iplt (abfd)));
3619 BFD_ASSERT (__alignof__ (*elf32_arm_local_got_tls_type (abfd))
3620 <= __alignof__ (*elf32_arm_local_fdpic_cnts (abfd)));
3621 #endif
3622 }
3623 return true;
3624 }
3625
3626 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3627 to input bfd ABFD. Create the information if it doesn't already exist.
3628 Return null if an allocation fails. */
3629
3630 static struct arm_local_iplt_info *
3631 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3632 {
3633 struct arm_local_iplt_info **ptr;
3634
3635 if (!elf32_arm_allocate_local_sym_info (abfd))
3636 return NULL;
3637
3638 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3639 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3640 if (*ptr == NULL)
3641 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3642 return *ptr;
3643 }
3644
3645 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3646 in ABFD's symbol table. If the symbol is global, H points to its
3647 hash table entry, otherwise H is null.
3648
3649 Return true if the symbol does have PLT information. When returning
3650 true, point *ROOT_PLT at the target-independent reference count/offset
3651 union and *ARM_PLT at the ARM-specific information. */
3652
3653 static bool
3654 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3655 struct elf32_arm_link_hash_entry *h,
3656 unsigned long r_symndx, union gotplt_union **root_plt,
3657 struct arm_plt_info **arm_plt)
3658 {
3659 struct arm_local_iplt_info *local_iplt;
3660
3661 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3662 return false;
3663
3664 if (h != NULL)
3665 {
3666 *root_plt = &h->root.plt;
3667 *arm_plt = &h->plt;
3668 return true;
3669 }
3670
3671 if (elf32_arm_local_iplt (abfd) == NULL)
3672 return false;
3673
3674 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3675 if (local_iplt == NULL)
3676 return false;
3677
3678 *root_plt = &local_iplt->root;
3679 *arm_plt = &local_iplt->arm;
3680 return true;
3681 }
3682
3683 static bool using_thumb_only (struct elf32_arm_link_hash_table *globals);
3684
3685 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3686 before it. */
3687
3688 static bool
3689 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3690 struct arm_plt_info *arm_plt)
3691 {
3692 struct elf32_arm_link_hash_table *htab;
3693
3694 htab = elf32_arm_hash_table (info);
3695
3696 return (!using_thumb_only(htab) && (arm_plt->thumb_refcount != 0
3697 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0)));
3698 }
3699
3700 /* Return a pointer to the head of the dynamic reloc list that should
3701 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3702 ABFD's symbol table. Return null if an error occurs. */
3703
3704 static struct elf_dyn_relocs **
3705 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3706 Elf_Internal_Sym *isym)
3707 {
3708 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3709 {
3710 struct arm_local_iplt_info *local_iplt;
3711
3712 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3713 if (local_iplt == NULL)
3714 return NULL;
3715 return &local_iplt->dyn_relocs;
3716 }
3717 else
3718 {
3719 /* Track dynamic relocs needed for local syms too.
3720 We really need local syms available to do this
3721 easily. Oh well. */
3722 asection *s;
3723 void *vpp;
3724
3725 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3726 if (s == NULL)
3727 abort ();
3728
3729 vpp = &elf_section_data (s)->local_dynrel;
3730 return (struct elf_dyn_relocs **) vpp;
3731 }
3732 }
3733
3734 /* Initialize an entry in the stub hash table. */
3735
3736 static struct bfd_hash_entry *
3737 stub_hash_newfunc (struct bfd_hash_entry *entry,
3738 struct bfd_hash_table *table,
3739 const char *string)
3740 {
3741 /* Allocate the structure if it has not already been allocated by a
3742 subclass. */
3743 if (entry == NULL)
3744 {
3745 entry = (struct bfd_hash_entry *)
3746 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3747 if (entry == NULL)
3748 return entry;
3749 }
3750
3751 /* Call the allocation method of the superclass. */
3752 entry = bfd_hash_newfunc (entry, table, string);
3753 if (entry != NULL)
3754 {
3755 struct elf32_arm_stub_hash_entry *eh;
3756
3757 /* Initialize the local fields. */
3758 eh = (struct elf32_arm_stub_hash_entry *) entry;
3759 eh->stub_sec = NULL;
3760 eh->stub_offset = (bfd_vma) -1;
3761 eh->source_value = 0;
3762 eh->target_value = 0;
3763 eh->target_section = NULL;
3764 eh->orig_insn = 0;
3765 eh->stub_type = arm_stub_none;
3766 eh->stub_size = 0;
3767 eh->stub_template = NULL;
3768 eh->stub_template_size = -1;
3769 eh->h = NULL;
3770 eh->id_sec = NULL;
3771 eh->output_name = NULL;
3772 }
3773
3774 return entry;
3775 }
3776
3777 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3778 shortcuts to them in our hash table. */
3779
3780 static bool
3781 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3782 {
3783 struct elf32_arm_link_hash_table *htab;
3784
3785 htab = elf32_arm_hash_table (info);
3786 if (htab == NULL)
3787 return false;
3788
3789 if (! _bfd_elf_create_got_section (dynobj, info))
3790 return false;
3791
3792 /* Also create .rofixup. */
3793 if (htab->fdpic_p)
3794 {
3795 htab->srofixup = bfd_make_section_with_flags (dynobj, ".rofixup",
3796 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3797 | SEC_IN_MEMORY | SEC_LINKER_CREATED | SEC_READONLY));
3798 if (htab->srofixup == NULL
3799 || !bfd_set_section_alignment (htab->srofixup, 2))
3800 return false;
3801 }
3802
3803 return true;
3804 }
3805
3806 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3807
3808 static bool
3809 create_ifunc_sections (struct bfd_link_info *info)
3810 {
3811 struct elf32_arm_link_hash_table *htab;
3812 const struct elf_backend_data *bed;
3813 bfd *dynobj;
3814 asection *s;
3815 flagword flags;
3816
3817 htab = elf32_arm_hash_table (info);
3818 dynobj = htab->root.dynobj;
3819 bed = get_elf_backend_data (dynobj);
3820 flags = bed->dynamic_sec_flags;
3821
3822 if (htab->root.iplt == NULL)
3823 {
3824 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3825 flags | SEC_READONLY | SEC_CODE);
3826 if (s == NULL
3827 || !bfd_set_section_alignment (s, bed->plt_alignment))
3828 return false;
3829 htab->root.iplt = s;
3830 }
3831
3832 if (htab->root.irelplt == NULL)
3833 {
3834 s = bfd_make_section_anyway_with_flags (dynobj,
3835 RELOC_SECTION (htab, ".iplt"),
3836 flags | SEC_READONLY);
3837 if (s == NULL
3838 || !bfd_set_section_alignment (s, bed->s->log_file_align))
3839 return false;
3840 htab->root.irelplt = s;
3841 }
3842
3843 if (htab->root.igotplt == NULL)
3844 {
3845 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3846 if (s == NULL
3847 || !bfd_set_section_alignment (s, bed->s->log_file_align))
3848 return false;
3849 htab->root.igotplt = s;
3850 }
3851 return true;
3852 }
3853
3854 /* Determine if we're dealing with a Thumb only architecture. */
3855
3856 static bool
3857 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3858 {
3859 int arch;
3860 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3861 Tag_CPU_arch_profile);
3862
3863 if (profile)
3864 return profile == 'M';
3865
3866 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3867
3868 /* Force return logic to be reviewed for each new architecture. */
3869 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3870
3871 if (arch == TAG_CPU_ARCH_V6_M
3872 || arch == TAG_CPU_ARCH_V6S_M
3873 || arch == TAG_CPU_ARCH_V7E_M
3874 || arch == TAG_CPU_ARCH_V8M_BASE
3875 || arch == TAG_CPU_ARCH_V8M_MAIN
3876 || arch == TAG_CPU_ARCH_V8_1M_MAIN)
3877 return true;
3878
3879 return false;
3880 }
3881
3882 /* Determine if we're dealing with a Thumb-2 object. */
3883
3884 static bool
3885 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3886 {
3887 int arch;
3888 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3889 Tag_THUMB_ISA_use);
3890
3891 /* No use of thumb permitted, or a legacy thumb-1/2 definition. */
3892 if (thumb_isa < 3)
3893 return thumb_isa == 2;
3894
3895 /* Variant of thumb is described by the architecture tag. */
3896 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3897
3898 /* Force return logic to be reviewed for each new architecture. */
3899 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3900
3901 return (arch == TAG_CPU_ARCH_V6T2
3902 || arch == TAG_CPU_ARCH_V7
3903 || arch == TAG_CPU_ARCH_V7E_M
3904 || arch == TAG_CPU_ARCH_V8
3905 || arch == TAG_CPU_ARCH_V8R
3906 || arch == TAG_CPU_ARCH_V8M_MAIN
3907 || arch == TAG_CPU_ARCH_V8_1M_MAIN);
3908 }
3909
3910 /* Determine whether Thumb-2 BL instruction is available. */
3911
3912 static bool
3913 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3914 {
3915 int arch =
3916 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3917
3918 /* Force return logic to be reviewed for each new architecture. */
3919 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3920
3921 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3922 return (arch == TAG_CPU_ARCH_V6T2
3923 || arch >= TAG_CPU_ARCH_V7);
3924 }
3925
3926 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3927 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3928 hash table. */
3929
3930 static bool
3931 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3932 {
3933 struct elf32_arm_link_hash_table *htab;
3934
3935 htab = elf32_arm_hash_table (info);
3936 if (htab == NULL)
3937 return false;
3938
3939 if (!htab->root.sgot && !create_got_section (dynobj, info))
3940 return false;
3941
3942 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3943 return false;
3944
3945 if (htab->root.target_os == is_vxworks)
3946 {
3947 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3948 return false;
3949
3950 if (bfd_link_pic (info))
3951 {
3952 htab->plt_header_size = 0;
3953 htab->plt_entry_size
3954 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3955 }
3956 else
3957 {
3958 htab->plt_header_size
3959 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3960 htab->plt_entry_size
3961 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3962 }
3963
3964 if (elf_elfheader (dynobj))
3965 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3966 }
3967 else
3968 {
3969 /* PR ld/16017
3970 Test for thumb only architectures. Note - we cannot just call
3971 using_thumb_only() as the attributes in the output bfd have not been
3972 initialised at this point, so instead we use the input bfd. */
3973 bfd * saved_obfd = htab->obfd;
3974
3975 htab->obfd = dynobj;
3976 if (using_thumb_only (htab))
3977 {
3978 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3979 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3980 }
3981 htab->obfd = saved_obfd;
3982 }
3983
3984 if (htab->fdpic_p) {
3985 htab->plt_header_size = 0;
3986 if (info->flags & DF_BIND_NOW)
3987 htab->plt_entry_size = 4 * (ARRAY_SIZE(elf32_arm_fdpic_plt_entry) - 5);
3988 else
3989 htab->plt_entry_size = 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry);
3990 }
3991
3992 if (!htab->root.splt
3993 || !htab->root.srelplt
3994 || !htab->root.sdynbss
3995 || (!bfd_link_pic (info) && !htab->root.srelbss))
3996 abort ();
3997
3998 return true;
3999 }
4000
4001 /* Copy the extra info we tack onto an elf_link_hash_entry. */
4002
4003 static void
4004 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
4005 struct elf_link_hash_entry *dir,
4006 struct elf_link_hash_entry *ind)
4007 {
4008 struct elf32_arm_link_hash_entry *edir, *eind;
4009
4010 edir = (struct elf32_arm_link_hash_entry *) dir;
4011 eind = (struct elf32_arm_link_hash_entry *) ind;
4012
4013 if (ind->root.type == bfd_link_hash_indirect)
4014 {
4015 /* Copy over PLT info. */
4016 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
4017 eind->plt.thumb_refcount = 0;
4018 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
4019 eind->plt.maybe_thumb_refcount = 0;
4020 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
4021 eind->plt.noncall_refcount = 0;
4022
4023 /* Copy FDPIC counters. */
4024 edir->fdpic_cnts.gotofffuncdesc_cnt += eind->fdpic_cnts.gotofffuncdesc_cnt;
4025 edir->fdpic_cnts.gotfuncdesc_cnt += eind->fdpic_cnts.gotfuncdesc_cnt;
4026 edir->fdpic_cnts.funcdesc_cnt += eind->fdpic_cnts.funcdesc_cnt;
4027
4028 /* We should only allocate a function to .iplt once the final
4029 symbol information is known. */
4030 BFD_ASSERT (!eind->is_iplt);
4031
4032 if (dir->got.refcount <= 0)
4033 {
4034 edir->tls_type = eind->tls_type;
4035 eind->tls_type = GOT_UNKNOWN;
4036 }
4037 }
4038
4039 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
4040 }
4041
4042 /* Destroy an ARM elf linker hash table. */
4043
4044 static void
4045 elf32_arm_link_hash_table_free (bfd *obfd)
4046 {
4047 struct elf32_arm_link_hash_table *ret
4048 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
4049
4050 bfd_hash_table_free (&ret->stub_hash_table);
4051 _bfd_elf_link_hash_table_free (obfd);
4052 }
4053
4054 /* Create an ARM elf linker hash table. */
4055
4056 static struct bfd_link_hash_table *
4057 elf32_arm_link_hash_table_create (bfd *abfd)
4058 {
4059 struct elf32_arm_link_hash_table *ret;
4060 size_t amt = sizeof (struct elf32_arm_link_hash_table);
4061
4062 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
4063 if (ret == NULL)
4064 return NULL;
4065
4066 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
4067 elf32_arm_link_hash_newfunc,
4068 sizeof (struct elf32_arm_link_hash_entry),
4069 ARM_ELF_DATA))
4070 {
4071 free (ret);
4072 return NULL;
4073 }
4074
4075 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
4076 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
4077 #ifdef FOUR_WORD_PLT
4078 ret->plt_header_size = 16;
4079 ret->plt_entry_size = 16;
4080 #else
4081 ret->plt_header_size = 20;
4082 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
4083 #endif
4084 ret->use_rel = true;
4085 ret->obfd = abfd;
4086 ret->fdpic_p = 0;
4087
4088 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
4089 sizeof (struct elf32_arm_stub_hash_entry)))
4090 {
4091 _bfd_elf_link_hash_table_free (abfd);
4092 return NULL;
4093 }
4094 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
4095
4096 return &ret->root.root;
4097 }
4098
4099 /* Determine what kind of NOPs are available. */
4100
4101 static bool
4102 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
4103 {
4104 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4105 Tag_CPU_arch);
4106
4107 /* Force return logic to be reviewed for each new architecture. */
4108 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
4109
4110 return (arch == TAG_CPU_ARCH_V6T2
4111 || arch == TAG_CPU_ARCH_V6K
4112 || arch == TAG_CPU_ARCH_V7
4113 || arch == TAG_CPU_ARCH_V8
4114 || arch == TAG_CPU_ARCH_V8R);
4115 }
4116
4117 static bool
4118 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
4119 {
4120 switch (stub_type)
4121 {
4122 case arm_stub_long_branch_thumb_only:
4123 case arm_stub_long_branch_thumb2_only:
4124 case arm_stub_long_branch_thumb2_only_pure:
4125 case arm_stub_long_branch_v4t_thumb_arm:
4126 case arm_stub_short_branch_v4t_thumb_arm:
4127 case arm_stub_long_branch_v4t_thumb_arm_pic:
4128 case arm_stub_long_branch_v4t_thumb_tls_pic:
4129 case arm_stub_long_branch_thumb_only_pic:
4130 case arm_stub_cmse_branch_thumb_only:
4131 return true;
4132 case arm_stub_none:
4133 BFD_FAIL ();
4134 return false;
4135 break;
4136 default:
4137 return false;
4138 }
4139 }
4140
4141 /* Determine the type of stub needed, if any, for a call. */
4142
4143 static enum elf32_arm_stub_type
4144 arm_type_of_stub (struct bfd_link_info *info,
4145 asection *input_sec,
4146 const Elf_Internal_Rela *rel,
4147 unsigned char st_type,
4148 enum arm_st_branch_type *actual_branch_type,
4149 struct elf32_arm_link_hash_entry *hash,
4150 bfd_vma destination,
4151 asection *sym_sec,
4152 bfd *input_bfd,
4153 const char *name)
4154 {
4155 bfd_vma location;
4156 bfd_signed_vma branch_offset;
4157 unsigned int r_type;
4158 struct elf32_arm_link_hash_table * globals;
4159 bool thumb2, thumb2_bl, thumb_only;
4160 enum elf32_arm_stub_type stub_type = arm_stub_none;
4161 int use_plt = 0;
4162 enum arm_st_branch_type branch_type = *actual_branch_type;
4163 union gotplt_union *root_plt;
4164 struct arm_plt_info *arm_plt;
4165 int arch;
4166 int thumb2_movw;
4167
4168 if (branch_type == ST_BRANCH_LONG)
4169 return stub_type;
4170
4171 globals = elf32_arm_hash_table (info);
4172 if (globals == NULL)
4173 return stub_type;
4174
4175 thumb_only = using_thumb_only (globals);
4176 thumb2 = using_thumb2 (globals);
4177 thumb2_bl = using_thumb2_bl (globals);
4178
4179 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
4180
4181 /* True for architectures that implement the thumb2 movw instruction. */
4182 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
4183
4184 /* Determine where the call point is. */
4185 location = (input_sec->output_offset
4186 + input_sec->output_section->vma
4187 + rel->r_offset);
4188
4189 r_type = ELF32_R_TYPE (rel->r_info);
4190
4191 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4192 are considering a function call relocation. */
4193 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4194 || r_type == R_ARM_THM_JUMP19)
4195 && branch_type == ST_BRANCH_TO_ARM)
4196 branch_type = ST_BRANCH_TO_THUMB;
4197
4198 /* For TLS call relocs, it is the caller's responsibility to provide
4199 the address of the appropriate trampoline. */
4200 if (r_type != R_ARM_TLS_CALL
4201 && r_type != R_ARM_THM_TLS_CALL
4202 && elf32_arm_get_plt_info (input_bfd, globals, hash,
4203 ELF32_R_SYM (rel->r_info), &root_plt,
4204 &arm_plt)
4205 && root_plt->offset != (bfd_vma) -1)
4206 {
4207 asection *splt;
4208
4209 if (hash == NULL || hash->is_iplt)
4210 splt = globals->root.iplt;
4211 else
4212 splt = globals->root.splt;
4213 if (splt != NULL)
4214 {
4215 use_plt = 1;
4216
4217 /* Note when dealing with PLT entries: the main PLT stub is in
4218 ARM mode, so if the branch is in Thumb mode, another
4219 Thumb->ARM stub will be inserted later just before the ARM
4220 PLT stub. If a long branch stub is needed, we'll add a
4221 Thumb->Arm one and branch directly to the ARM PLT entry.
4222 Here, we have to check if a pre-PLT Thumb->ARM stub
4223 is needed and if it will be close enough. */
4224
4225 destination = (splt->output_section->vma
4226 + splt->output_offset
4227 + root_plt->offset);
4228 st_type = STT_FUNC;
4229
4230 /* Thumb branch/call to PLT: it can become a branch to ARM
4231 or to Thumb. We must perform the same checks and
4232 corrections as in elf32_arm_final_link_relocate. */
4233 if ((r_type == R_ARM_THM_CALL)
4234 || (r_type == R_ARM_THM_JUMP24))
4235 {
4236 if (globals->use_blx
4237 && r_type == R_ARM_THM_CALL
4238 && !thumb_only)
4239 {
4240 /* If the Thumb BLX instruction is available, convert
4241 the BL to a BLX instruction to call the ARM-mode
4242 PLT entry. */
4243 branch_type = ST_BRANCH_TO_ARM;
4244 }
4245 else
4246 {
4247 if (!thumb_only)
4248 /* Target the Thumb stub before the ARM PLT entry. */
4249 destination -= PLT_THUMB_STUB_SIZE;
4250 branch_type = ST_BRANCH_TO_THUMB;
4251 }
4252 }
4253 else
4254 {
4255 branch_type = ST_BRANCH_TO_ARM;
4256 }
4257 }
4258 }
4259 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4260 BFD_ASSERT (st_type != STT_GNU_IFUNC);
4261
4262 branch_offset = (bfd_signed_vma)(destination - location);
4263
4264 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4265 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
4266 {
4267 /* Handle cases where:
4268 - this call goes too far (different Thumb/Thumb2 max
4269 distance)
4270 - it's a Thumb->Arm call and blx is not available, or it's a
4271 Thumb->Arm branch (not bl). A stub is needed in this case,
4272 but only if this call is not through a PLT entry. Indeed,
4273 PLT stubs handle mode switching already. */
4274 if ((!thumb2_bl
4275 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4276 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4277 || (thumb2_bl
4278 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4279 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4280 || (thumb2
4281 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4282 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4283 && (r_type == R_ARM_THM_JUMP19))
4284 || (branch_type == ST_BRANCH_TO_ARM
4285 && (((r_type == R_ARM_THM_CALL
4286 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4287 || (r_type == R_ARM_THM_JUMP24)
4288 || (r_type == R_ARM_THM_JUMP19))
4289 && !use_plt))
4290 {
4291 /* If we need to insert a Thumb-Thumb long branch stub to a
4292 PLT, use one that branches directly to the ARM PLT
4293 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4294 stub, undo this now. */
4295 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4296 {
4297 branch_type = ST_BRANCH_TO_ARM;
4298 branch_offset += PLT_THUMB_STUB_SIZE;
4299 }
4300
4301 if (branch_type == ST_BRANCH_TO_THUMB)
4302 {
4303 /* Thumb to thumb. */
4304 if (!thumb_only)
4305 {
4306 if (input_sec->flags & SEC_ELF_PURECODE)
4307 _bfd_error_handler
4308 (_("%pB(%pA): warning: long branch veneers used in"
4309 " section with SHF_ARM_PURECODE section"
4310 " attribute is only supported for M-profile"
4311 " targets that implement the movw instruction"),
4312 input_bfd, input_sec);
4313
4314 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4315 /* PIC stubs. */
4316 ? ((globals->use_blx
4317 && (r_type == R_ARM_THM_CALL))
4318 /* V5T and above. Stub starts with ARM code, so
4319 we must be able to switch mode before
4320 reaching it, which is only possible for 'bl'
4321 (ie R_ARM_THM_CALL relocation). */
4322 ? arm_stub_long_branch_any_thumb_pic
4323 /* On V4T, use Thumb code only. */
4324 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4325
4326 /* non-PIC stubs. */
4327 : ((globals->use_blx
4328 && (r_type == R_ARM_THM_CALL))
4329 /* V5T and above. */
4330 ? arm_stub_long_branch_any_any
4331 /* V4T. */
4332 : arm_stub_long_branch_v4t_thumb_thumb);
4333 }
4334 else
4335 {
4336 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4337 stub_type = arm_stub_long_branch_thumb2_only_pure;
4338 else
4339 {
4340 if (input_sec->flags & SEC_ELF_PURECODE)
4341 _bfd_error_handler
4342 (_("%pB(%pA): warning: long branch veneers used in"
4343 " section with SHF_ARM_PURECODE section"
4344 " attribute is only supported for M-profile"
4345 " targets that implement the movw instruction"),
4346 input_bfd, input_sec);
4347
4348 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4349 /* PIC stub. */
4350 ? arm_stub_long_branch_thumb_only_pic
4351 /* non-PIC stub. */
4352 : (thumb2 ? arm_stub_long_branch_thumb2_only
4353 : arm_stub_long_branch_thumb_only);
4354 }
4355 }
4356 }
4357 else
4358 {
4359 if (input_sec->flags & SEC_ELF_PURECODE)
4360 _bfd_error_handler
4361 (_("%pB(%pA): warning: long branch veneers used in"
4362 " section with SHF_ARM_PURECODE section"
4363 " attribute is only supported" " for M-profile"
4364 " targets that implement the movw instruction"),
4365 input_bfd, input_sec);
4366
4367 /* Thumb to arm. */
4368 if (sym_sec != NULL
4369 && sym_sec->owner != NULL
4370 && !INTERWORK_FLAG (sym_sec->owner))
4371 {
4372 _bfd_error_handler
4373 (_("%pB(%s): warning: interworking not enabled;"
4374 " first occurrence: %pB: %s call to %s"),
4375 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
4376 }
4377
4378 stub_type =
4379 (bfd_link_pic (info) | globals->pic_veneer)
4380 /* PIC stubs. */
4381 ? (r_type == R_ARM_THM_TLS_CALL
4382 /* TLS PIC stubs. */
4383 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4384 : arm_stub_long_branch_v4t_thumb_tls_pic)
4385 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4386 /* V5T PIC and above. */
4387 ? arm_stub_long_branch_any_arm_pic
4388 /* V4T PIC stub. */
4389 : arm_stub_long_branch_v4t_thumb_arm_pic))
4390
4391 /* non-PIC stubs. */
4392 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4393 /* V5T and above. */
4394 ? arm_stub_long_branch_any_any
4395 /* V4T. */
4396 : arm_stub_long_branch_v4t_thumb_arm);
4397
4398 /* Handle v4t short branches. */
4399 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4400 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4401 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4402 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4403 }
4404 }
4405 }
4406 else if (r_type == R_ARM_CALL
4407 || r_type == R_ARM_JUMP24
4408 || r_type == R_ARM_PLT32
4409 || r_type == R_ARM_TLS_CALL)
4410 {
4411 if (input_sec->flags & SEC_ELF_PURECODE)
4412 _bfd_error_handler
4413 (_("%pB(%pA): warning: long branch veneers used in"
4414 " section with SHF_ARM_PURECODE section"
4415 " attribute is only supported for M-profile"
4416 " targets that implement the movw instruction"),
4417 input_bfd, input_sec);
4418 if (branch_type == ST_BRANCH_TO_THUMB)
4419 {
4420 /* Arm to thumb. */
4421
4422 if (sym_sec != NULL
4423 && sym_sec->owner != NULL
4424 && !INTERWORK_FLAG (sym_sec->owner))
4425 {
4426 _bfd_error_handler
4427 (_("%pB(%s): warning: interworking not enabled;"
4428 " first occurrence: %pB: %s call to %s"),
4429 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
4430 }
4431
4432 /* We have an extra 2-bytes reach because of
4433 the mode change (bit 24 (H) of BLX encoding). */
4434 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4435 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4436 || (r_type == R_ARM_CALL && !globals->use_blx)
4437 || (r_type == R_ARM_JUMP24)
4438 || (r_type == R_ARM_PLT32))
4439 {
4440 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4441 /* PIC stubs. */
4442 ? ((globals->use_blx)
4443 /* V5T and above. */
4444 ? arm_stub_long_branch_any_thumb_pic
4445 /* V4T stub. */
4446 : arm_stub_long_branch_v4t_arm_thumb_pic)
4447
4448 /* non-PIC stubs. */
4449 : ((globals->use_blx)
4450 /* V5T and above. */
4451 ? arm_stub_long_branch_any_any
4452 /* V4T. */
4453 : arm_stub_long_branch_v4t_arm_thumb);
4454 }
4455 }
4456 else
4457 {
4458 /* Arm to arm. */
4459 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4460 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4461 {
4462 stub_type =
4463 (bfd_link_pic (info) | globals->pic_veneer)
4464 /* PIC stubs. */
4465 ? (r_type == R_ARM_TLS_CALL
4466 /* TLS PIC Stub. */
4467 ? arm_stub_long_branch_any_tls_pic
4468 : (globals->root.target_os == is_nacl
4469 ? arm_stub_long_branch_arm_nacl_pic
4470 : arm_stub_long_branch_any_arm_pic))
4471 /* non-PIC stubs. */
4472 : (globals->root.target_os == is_nacl
4473 ? arm_stub_long_branch_arm_nacl
4474 : arm_stub_long_branch_any_any);
4475 }
4476 }
4477 }
4478
4479 /* If a stub is needed, record the actual destination type. */
4480 if (stub_type != arm_stub_none)
4481 *actual_branch_type = branch_type;
4482
4483 return stub_type;
4484 }
4485
4486 /* Build a name for an entry in the stub hash table. */
4487
4488 static char *
4489 elf32_arm_stub_name (const asection *input_section,
4490 const asection *sym_sec,
4491 const struct elf32_arm_link_hash_entry *hash,
4492 const Elf_Internal_Rela *rel,
4493 enum elf32_arm_stub_type stub_type)
4494 {
4495 char *stub_name;
4496 bfd_size_type len;
4497
4498 if (hash)
4499 {
4500 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4501 stub_name = (char *) bfd_malloc (len);
4502 if (stub_name != NULL)
4503 sprintf (stub_name, "%08x_%s+%x_%d",
4504 input_section->id & 0xffffffff,
4505 hash->root.root.root.string,
4506 (int) rel->r_addend & 0xffffffff,
4507 (int) stub_type);
4508 }
4509 else
4510 {
4511 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4512 stub_name = (char *) bfd_malloc (len);
4513 if (stub_name != NULL)
4514 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4515 input_section->id & 0xffffffff,
4516 sym_sec->id & 0xffffffff,
4517 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4518 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4519 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4520 (int) rel->r_addend & 0xffffffff,
4521 (int) stub_type);
4522 }
4523
4524 return stub_name;
4525 }
4526
4527 /* Look up an entry in the stub hash. Stub entries are cached because
4528 creating the stub name takes a bit of time. */
4529
4530 static struct elf32_arm_stub_hash_entry *
4531 elf32_arm_get_stub_entry (const asection *input_section,
4532 const asection *sym_sec,
4533 struct elf_link_hash_entry *hash,
4534 const Elf_Internal_Rela *rel,
4535 struct elf32_arm_link_hash_table *htab,
4536 enum elf32_arm_stub_type stub_type)
4537 {
4538 struct elf32_arm_stub_hash_entry *stub_entry;
4539 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4540 const asection *id_sec;
4541
4542 if ((input_section->flags & SEC_CODE) == 0)
4543 return NULL;
4544
4545 /* If the input section is the CMSE stubs one and it needs a long
4546 branch stub to reach it's final destination, give up with an
4547 error message: this is not supported. See PR ld/24709. */
4548 if (!strncmp (input_section->name, CMSE_STUB_NAME, strlen(CMSE_STUB_NAME)))
4549 {
4550 bfd *output_bfd = htab->obfd;
4551 asection *out_sec = bfd_get_section_by_name (output_bfd, CMSE_STUB_NAME);
4552
4553 _bfd_error_handler (_("ERROR: CMSE stub (%s section) too far "
4554 "(%#" PRIx64 ") from destination (%#" PRIx64 ")"),
4555 CMSE_STUB_NAME,
4556 (uint64_t)out_sec->output_section->vma
4557 + out_sec->output_offset,
4558 (uint64_t)sym_sec->output_section->vma
4559 + sym_sec->output_offset
4560 + h->root.root.u.def.value);
4561 /* Exit, rather than leave incompletely processed
4562 relocations. */
4563 xexit(1);
4564 }
4565
4566 /* If this input section is part of a group of sections sharing one
4567 stub section, then use the id of the first section in the group.
4568 Stub names need to include a section id, as there may well be
4569 more than one stub used to reach say, printf, and we need to
4570 distinguish between them. */
4571 BFD_ASSERT (input_section->id <= htab->top_id);
4572 id_sec = htab->stub_group[input_section->id].link_sec;
4573
4574 if (h != NULL && h->stub_cache != NULL
4575 && h->stub_cache->h == h
4576 && h->stub_cache->id_sec == id_sec
4577 && h->stub_cache->stub_type == stub_type)
4578 {
4579 stub_entry = h->stub_cache;
4580 }
4581 else
4582 {
4583 char *stub_name;
4584
4585 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4586 if (stub_name == NULL)
4587 return NULL;
4588
4589 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4590 stub_name, false, false);
4591 if (h != NULL)
4592 h->stub_cache = stub_entry;
4593
4594 free (stub_name);
4595 }
4596
4597 return stub_entry;
4598 }
4599
4600 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4601 section. */
4602
4603 static bool
4604 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4605 {
4606 if (stub_type >= max_stub_type)
4607 abort (); /* Should be unreachable. */
4608
4609 switch (stub_type)
4610 {
4611 case arm_stub_cmse_branch_thumb_only:
4612 return true;
4613
4614 default:
4615 return false;
4616 }
4617
4618 abort (); /* Should be unreachable. */
4619 }
4620
4621 /* Required alignment (as a power of 2) for the dedicated section holding
4622 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4623 with input sections. */
4624
4625 static int
4626 arm_dedicated_stub_output_section_required_alignment
4627 (enum elf32_arm_stub_type stub_type)
4628 {
4629 if (stub_type >= max_stub_type)
4630 abort (); /* Should be unreachable. */
4631
4632 switch (stub_type)
4633 {
4634 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4635 boundary. */
4636 case arm_stub_cmse_branch_thumb_only:
4637 return 5;
4638
4639 default:
4640 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4641 return 0;
4642 }
4643
4644 abort (); /* Should be unreachable. */
4645 }
4646
4647 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4648 NULL if veneers of this type are interspersed with input sections. */
4649
4650 static const char *
4651 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4652 {
4653 if (stub_type >= max_stub_type)
4654 abort (); /* Should be unreachable. */
4655
4656 switch (stub_type)
4657 {
4658 case arm_stub_cmse_branch_thumb_only:
4659 return CMSE_STUB_NAME;
4660
4661 default:
4662 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4663 return NULL;
4664 }
4665
4666 abort (); /* Should be unreachable. */
4667 }
4668
4669 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4670 returns the address of the hash table field in HTAB holding a pointer to the
4671 corresponding input section. Otherwise, returns NULL. */
4672
4673 static asection **
4674 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4675 enum elf32_arm_stub_type stub_type)
4676 {
4677 if (stub_type >= max_stub_type)
4678 abort (); /* Should be unreachable. */
4679
4680 switch (stub_type)
4681 {
4682 case arm_stub_cmse_branch_thumb_only:
4683 return &htab->cmse_stub_sec;
4684
4685 default:
4686 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4687 return NULL;
4688 }
4689
4690 abort (); /* Should be unreachable. */
4691 }
4692
4693 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4694 is the section that branch into veneer and can be NULL if stub should go in
4695 a dedicated output section. Returns a pointer to the stub section, and the
4696 section to which the stub section will be attached (in *LINK_SEC_P).
4697 LINK_SEC_P may be NULL. */
4698
4699 static asection *
4700 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4701 struct elf32_arm_link_hash_table *htab,
4702 enum elf32_arm_stub_type stub_type)
4703 {
4704 asection *link_sec, *out_sec, **stub_sec_p;
4705 const char *stub_sec_prefix;
4706 bool dedicated_output_section =
4707 arm_dedicated_stub_output_section_required (stub_type);
4708 int align;
4709
4710 if (dedicated_output_section)
4711 {
4712 bfd *output_bfd = htab->obfd;
4713 const char *out_sec_name =
4714 arm_dedicated_stub_output_section_name (stub_type);
4715 link_sec = NULL;
4716 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4717 stub_sec_prefix = out_sec_name;
4718 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4719 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4720 if (out_sec == NULL)
4721 {
4722 _bfd_error_handler (_("no address assigned to the veneers output "
4723 "section %s"), out_sec_name);
4724 return NULL;
4725 }
4726 }
4727 else
4728 {
4729 BFD_ASSERT (section->id <= htab->top_id);
4730 link_sec = htab->stub_group[section->id].link_sec;
4731 BFD_ASSERT (link_sec != NULL);
4732 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4733 if (*stub_sec_p == NULL)
4734 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4735 stub_sec_prefix = link_sec->name;
4736 out_sec = link_sec->output_section;
4737 align = htab->root.target_os == is_nacl ? 4 : 3;
4738 }
4739
4740 if (*stub_sec_p == NULL)
4741 {
4742 size_t namelen;
4743 bfd_size_type len;
4744 char *s_name;
4745
4746 namelen = strlen (stub_sec_prefix);
4747 len = namelen + sizeof (STUB_SUFFIX);
4748 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4749 if (s_name == NULL)
4750 return NULL;
4751
4752 memcpy (s_name, stub_sec_prefix, namelen);
4753 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4754 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4755 align);
4756 if (*stub_sec_p == NULL)
4757 return NULL;
4758
4759 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4760 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4761 | SEC_KEEP;
4762 }
4763
4764 if (!dedicated_output_section)
4765 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4766
4767 if (link_sec_p)
4768 *link_sec_p = link_sec;
4769
4770 return *stub_sec_p;
4771 }
4772
4773 /* Add a new stub entry to the stub hash. Not all fields of the new
4774 stub entry are initialised. */
4775
4776 static struct elf32_arm_stub_hash_entry *
4777 elf32_arm_add_stub (const char *stub_name, asection *section,
4778 struct elf32_arm_link_hash_table *htab,
4779 enum elf32_arm_stub_type stub_type)
4780 {
4781 asection *link_sec;
4782 asection *stub_sec;
4783 struct elf32_arm_stub_hash_entry *stub_entry;
4784
4785 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4786 stub_type);
4787 if (stub_sec == NULL)
4788 return NULL;
4789
4790 /* Enter this entry into the linker stub hash table. */
4791 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4792 true, false);
4793 if (stub_entry == NULL)
4794 {
4795 if (section == NULL)
4796 section = stub_sec;
4797 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4798 section->owner, stub_name);
4799 return NULL;
4800 }
4801
4802 stub_entry->stub_sec = stub_sec;
4803 stub_entry->stub_offset = (bfd_vma) -1;
4804 stub_entry->id_sec = link_sec;
4805
4806 return stub_entry;
4807 }
4808
4809 /* Store an Arm insn into an output section not processed by
4810 elf32_arm_write_section. */
4811
4812 static void
4813 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4814 bfd * output_bfd, bfd_vma val, void * ptr)
4815 {
4816 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4817 bfd_putl32 (val, ptr);
4818 else
4819 bfd_putb32 (val, ptr);
4820 }
4821
4822 /* Store a 16-bit Thumb insn into an output section not processed by
4823 elf32_arm_write_section. */
4824
4825 static void
4826 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4827 bfd * output_bfd, bfd_vma val, void * ptr)
4828 {
4829 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4830 bfd_putl16 (val, ptr);
4831 else
4832 bfd_putb16 (val, ptr);
4833 }
4834
4835 /* Store a Thumb2 insn into an output section not processed by
4836 elf32_arm_write_section. */
4837
4838 static void
4839 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4840 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4841 {
4842 /* T2 instructions are 16-bit streamed. */
4843 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4844 {
4845 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4846 bfd_putl16 ((val & 0xffff), ptr + 2);
4847 }
4848 else
4849 {
4850 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4851 bfd_putb16 ((val & 0xffff), ptr + 2);
4852 }
4853 }
4854
4855 /* If it's possible to change R_TYPE to a more efficient access
4856 model, return the new reloc type. */
4857
4858 static unsigned
4859 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4860 struct elf_link_hash_entry *h)
4861 {
4862 int is_local = (h == NULL);
4863
4864 if (bfd_link_dll (info)
4865 || (h && h->root.type == bfd_link_hash_undefweak))
4866 return r_type;
4867
4868 /* We do not support relaxations for Old TLS models. */
4869 switch (r_type)
4870 {
4871 case R_ARM_TLS_GOTDESC:
4872 case R_ARM_TLS_CALL:
4873 case R_ARM_THM_TLS_CALL:
4874 case R_ARM_TLS_DESCSEQ:
4875 case R_ARM_THM_TLS_DESCSEQ:
4876 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4877 }
4878
4879 return r_type;
4880 }
4881
4882 static bfd_reloc_status_type elf32_arm_final_link_relocate
4883 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4884 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4885 const char *, unsigned char, enum arm_st_branch_type,
4886 struct elf_link_hash_entry *, bool *, char **);
4887
4888 static unsigned int
4889 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4890 {
4891 switch (stub_type)
4892 {
4893 case arm_stub_a8_veneer_b_cond:
4894 case arm_stub_a8_veneer_b:
4895 case arm_stub_a8_veneer_bl:
4896 return 2;
4897
4898 case arm_stub_long_branch_any_any:
4899 case arm_stub_long_branch_v4t_arm_thumb:
4900 case arm_stub_long_branch_thumb_only:
4901 case arm_stub_long_branch_thumb2_only:
4902 case arm_stub_long_branch_thumb2_only_pure:
4903 case arm_stub_long_branch_v4t_thumb_thumb:
4904 case arm_stub_long_branch_v4t_thumb_arm:
4905 case arm_stub_short_branch_v4t_thumb_arm:
4906 case arm_stub_long_branch_any_arm_pic:
4907 case arm_stub_long_branch_any_thumb_pic:
4908 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4909 case arm_stub_long_branch_v4t_arm_thumb_pic:
4910 case arm_stub_long_branch_v4t_thumb_arm_pic:
4911 case arm_stub_long_branch_thumb_only_pic:
4912 case arm_stub_long_branch_any_tls_pic:
4913 case arm_stub_long_branch_v4t_thumb_tls_pic:
4914 case arm_stub_cmse_branch_thumb_only:
4915 case arm_stub_a8_veneer_blx:
4916 return 4;
4917
4918 case arm_stub_long_branch_arm_nacl:
4919 case arm_stub_long_branch_arm_nacl_pic:
4920 return 16;
4921
4922 default:
4923 abort (); /* Should be unreachable. */
4924 }
4925 }
4926
4927 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4928 veneering (TRUE) or have their own symbol (FALSE). */
4929
4930 static bool
4931 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4932 {
4933 if (stub_type >= max_stub_type)
4934 abort (); /* Should be unreachable. */
4935
4936 switch (stub_type)
4937 {
4938 case arm_stub_cmse_branch_thumb_only:
4939 return true;
4940
4941 default:
4942 return false;
4943 }
4944
4945 abort (); /* Should be unreachable. */
4946 }
4947
4948 /* Returns the padding needed for the dedicated section used stubs of type
4949 STUB_TYPE. */
4950
4951 static int
4952 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4953 {
4954 if (stub_type >= max_stub_type)
4955 abort (); /* Should be unreachable. */
4956
4957 switch (stub_type)
4958 {
4959 case arm_stub_cmse_branch_thumb_only:
4960 return 32;
4961
4962 default:
4963 return 0;
4964 }
4965
4966 abort (); /* Should be unreachable. */
4967 }
4968
4969 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4970 returns the address of the hash table field in HTAB holding the offset at
4971 which new veneers should be layed out in the stub section. */
4972
4973 static bfd_vma*
4974 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4975 enum elf32_arm_stub_type stub_type)
4976 {
4977 switch (stub_type)
4978 {
4979 case arm_stub_cmse_branch_thumb_only:
4980 return &htab->new_cmse_stub_offset;
4981
4982 default:
4983 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4984 return NULL;
4985 }
4986 }
4987
4988 static bool
4989 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4990 void * in_arg)
4991 {
4992 #define MAXRELOCS 3
4993 bool removed_sg_veneer;
4994 struct elf32_arm_stub_hash_entry *stub_entry;
4995 struct elf32_arm_link_hash_table *globals;
4996 struct bfd_link_info *info;
4997 asection *stub_sec;
4998 bfd *stub_bfd;
4999 bfd_byte *loc;
5000 bfd_vma sym_value;
5001 int template_size;
5002 int size;
5003 const insn_sequence *template_sequence;
5004 int i;
5005 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
5006 int stub_reloc_offset[MAXRELOCS] = {0, 0};
5007 int nrelocs = 0;
5008 int just_allocated = 0;
5009
5010 /* Massage our args to the form they really have. */
5011 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5012 info = (struct bfd_link_info *) in_arg;
5013
5014 /* Fail if the target section could not be assigned to an output
5015 section. The user should fix his linker script. */
5016 if (stub_entry->target_section->output_section == NULL
5017 && info->non_contiguous_regions)
5018 info->callbacks->einfo (_("%F%P: Could not assign '%pA' to an output section. "
5019 "Retry without --enable-non-contiguous-regions.\n"),
5020 stub_entry->target_section);
5021
5022 globals = elf32_arm_hash_table (info);
5023 if (globals == NULL)
5024 return false;
5025
5026 stub_sec = stub_entry->stub_sec;
5027
5028 if ((globals->fix_cortex_a8 < 0)
5029 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
5030 /* We have to do less-strictly-aligned fixes last. */
5031 return true;
5032
5033 /* Assign a slot at the end of section if none assigned yet. */
5034 if (stub_entry->stub_offset == (bfd_vma) -1)
5035 {
5036 stub_entry->stub_offset = stub_sec->size;
5037 just_allocated = 1;
5038 }
5039 loc = stub_sec->contents + stub_entry->stub_offset;
5040
5041 stub_bfd = stub_sec->owner;
5042
5043 /* This is the address of the stub destination. */
5044 sym_value = (stub_entry->target_value
5045 + stub_entry->target_section->output_offset
5046 + stub_entry->target_section->output_section->vma);
5047
5048 template_sequence = stub_entry->stub_template;
5049 template_size = stub_entry->stub_template_size;
5050
5051 size = 0;
5052 for (i = 0; i < template_size; i++)
5053 {
5054 switch (template_sequence[i].type)
5055 {
5056 case THUMB16_TYPE:
5057 {
5058 bfd_vma data = (bfd_vma) template_sequence[i].data;
5059 if (template_sequence[i].reloc_addend != 0)
5060 {
5061 /* We've borrowed the reloc_addend field to mean we should
5062 insert a condition code into this (Thumb-1 branch)
5063 instruction. See THUMB16_BCOND_INSN. */
5064 BFD_ASSERT ((data & 0xff00) == 0xd000);
5065 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
5066 }
5067 bfd_put_16 (stub_bfd, data, loc + size);
5068 size += 2;
5069 }
5070 break;
5071
5072 case THUMB32_TYPE:
5073 bfd_put_16 (stub_bfd,
5074 (template_sequence[i].data >> 16) & 0xffff,
5075 loc + size);
5076 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
5077 loc + size + 2);
5078 if (template_sequence[i].r_type != R_ARM_NONE)
5079 {
5080 stub_reloc_idx[nrelocs] = i;
5081 stub_reloc_offset[nrelocs++] = size;
5082 }
5083 size += 4;
5084 break;
5085
5086 case ARM_TYPE:
5087 bfd_put_32 (stub_bfd, template_sequence[i].data,
5088 loc + size);
5089 /* Handle cases where the target is encoded within the
5090 instruction. */
5091 if (template_sequence[i].r_type == R_ARM_JUMP24)
5092 {
5093 stub_reloc_idx[nrelocs] = i;
5094 stub_reloc_offset[nrelocs++] = size;
5095 }
5096 size += 4;
5097 break;
5098
5099 case DATA_TYPE:
5100 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
5101 stub_reloc_idx[nrelocs] = i;
5102 stub_reloc_offset[nrelocs++] = size;
5103 size += 4;
5104 break;
5105
5106 default:
5107 BFD_FAIL ();
5108 return false;
5109 }
5110 }
5111
5112 if (just_allocated)
5113 stub_sec->size += size;
5114
5115 /* Stub size has already been computed in arm_size_one_stub. Check
5116 consistency. */
5117 BFD_ASSERT (size == stub_entry->stub_size);
5118
5119 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
5120 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
5121 sym_value |= 1;
5122
5123 /* Assume non empty slots have at least one and at most MAXRELOCS entries
5124 to relocate in each stub. */
5125 removed_sg_veneer =
5126 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5127 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
5128
5129 for (i = 0; i < nrelocs; i++)
5130 {
5131 Elf_Internal_Rela rel;
5132 bool unresolved_reloc;
5133 char *error_message;
5134 bfd_vma points_to =
5135 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
5136
5137 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
5138 rel.r_info = ELF32_R_INFO (0,
5139 template_sequence[stub_reloc_idx[i]].r_type);
5140 rel.r_addend = 0;
5141
5142 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
5143 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5144 template should refer back to the instruction after the original
5145 branch. We use target_section as Cortex-A8 erratum workaround stubs
5146 are only generated when both source and target are in the same
5147 section. */
5148 points_to = stub_entry->target_section->output_section->vma
5149 + stub_entry->target_section->output_offset
5150 + stub_entry->source_value;
5151
5152 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5153 (template_sequence[stub_reloc_idx[i]].r_type),
5154 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
5155 points_to, info, stub_entry->target_section, "", STT_FUNC,
5156 stub_entry->branch_type,
5157 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
5158 &error_message);
5159 }
5160
5161 return true;
5162 #undef MAXRELOCS
5163 }
5164
5165 /* Calculate the template, template size and instruction size for a stub.
5166 Return value is the instruction size. */
5167
5168 static unsigned int
5169 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
5170 const insn_sequence **stub_template,
5171 int *stub_template_size)
5172 {
5173 const insn_sequence *template_sequence = NULL;
5174 int template_size = 0, i;
5175 unsigned int size;
5176
5177 template_sequence = stub_definitions[stub_type].template_sequence;
5178 if (stub_template)
5179 *stub_template = template_sequence;
5180
5181 template_size = stub_definitions[stub_type].template_size;
5182 if (stub_template_size)
5183 *stub_template_size = template_size;
5184
5185 size = 0;
5186 for (i = 0; i < template_size; i++)
5187 {
5188 switch (template_sequence[i].type)
5189 {
5190 case THUMB16_TYPE:
5191 size += 2;
5192 break;
5193
5194 case ARM_TYPE:
5195 case THUMB32_TYPE:
5196 case DATA_TYPE:
5197 size += 4;
5198 break;
5199
5200 default:
5201 BFD_FAIL ();
5202 return 0;
5203 }
5204 }
5205
5206 return size;
5207 }
5208
5209 /* As above, but don't actually build the stub. Just bump offset so
5210 we know stub section sizes. */
5211
5212 static bool
5213 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
5214 void *in_arg ATTRIBUTE_UNUSED)
5215 {
5216 struct elf32_arm_stub_hash_entry *stub_entry;
5217 const insn_sequence *template_sequence;
5218 int template_size, size;
5219
5220 /* Massage our args to the form they really have. */
5221 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5222
5223 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
5224 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
5225
5226 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
5227 &template_size);
5228
5229 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
5230 if (stub_entry->stub_template_size)
5231 {
5232 stub_entry->stub_size = size;
5233 stub_entry->stub_template = template_sequence;
5234 stub_entry->stub_template_size = template_size;
5235 }
5236
5237 /* Already accounted for. */
5238 if (stub_entry->stub_offset != (bfd_vma) -1)
5239 return true;
5240
5241 size = (size + 7) & ~7;
5242 stub_entry->stub_sec->size += size;
5243
5244 return true;
5245 }
5246
5247 /* External entry points for sizing and building linker stubs. */
5248
5249 /* Set up various things so that we can make a list of input sections
5250 for each output section included in the link. Returns -1 on error,
5251 0 when no stubs will be needed, and 1 on success. */
5252
5253 int
5254 elf32_arm_setup_section_lists (bfd *output_bfd,
5255 struct bfd_link_info *info)
5256 {
5257 bfd *input_bfd;
5258 unsigned int bfd_count;
5259 unsigned int top_id, top_index;
5260 asection *section;
5261 asection **input_list, **list;
5262 size_t amt;
5263 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5264
5265 if (htab == NULL)
5266 return 0;
5267
5268 /* Count the number of input BFDs and find the top input section id. */
5269 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
5270 input_bfd != NULL;
5271 input_bfd = input_bfd->link.next)
5272 {
5273 bfd_count += 1;
5274 for (section = input_bfd->sections;
5275 section != NULL;
5276 section = section->next)
5277 {
5278 if (top_id < section->id)
5279 top_id = section->id;
5280 }
5281 }
5282 htab->bfd_count = bfd_count;
5283
5284 amt = sizeof (struct map_stub) * (top_id + 1);
5285 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
5286 if (htab->stub_group == NULL)
5287 return -1;
5288 htab->top_id = top_id;
5289
5290 /* We can't use output_bfd->section_count here to find the top output
5291 section index as some sections may have been removed, and
5292 _bfd_strip_section_from_output doesn't renumber the indices. */
5293 for (section = output_bfd->sections, top_index = 0;
5294 section != NULL;
5295 section = section->next)
5296 {
5297 if (top_index < section->index)
5298 top_index = section->index;
5299 }
5300
5301 htab->top_index = top_index;
5302 amt = sizeof (asection *) * (top_index + 1);
5303 input_list = (asection **) bfd_malloc (amt);
5304 htab->input_list = input_list;
5305 if (input_list == NULL)
5306 return -1;
5307
5308 /* For sections we aren't interested in, mark their entries with a
5309 value we can check later. */
5310 list = input_list + top_index;
5311 do
5312 *list = bfd_abs_section_ptr;
5313 while (list-- != input_list);
5314
5315 for (section = output_bfd->sections;
5316 section != NULL;
5317 section = section->next)
5318 {
5319 if ((section->flags & SEC_CODE) != 0)
5320 input_list[section->index] = NULL;
5321 }
5322
5323 return 1;
5324 }
5325
5326 /* The linker repeatedly calls this function for each input section,
5327 in the order that input sections are linked into output sections.
5328 Build lists of input sections to determine groupings between which
5329 we may insert linker stubs. */
5330
5331 void
5332 elf32_arm_next_input_section (struct bfd_link_info *info,
5333 asection *isec)
5334 {
5335 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5336
5337 if (htab == NULL)
5338 return;
5339
5340 if (isec->output_section->index <= htab->top_index)
5341 {
5342 asection **list = htab->input_list + isec->output_section->index;
5343
5344 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5345 {
5346 /* Steal the link_sec pointer for our list. */
5347 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5348 /* This happens to make the list in reverse order,
5349 which we reverse later. */
5350 PREV_SEC (isec) = *list;
5351 *list = isec;
5352 }
5353 }
5354 }
5355
5356 /* See whether we can group stub sections together. Grouping stub
5357 sections may result in fewer stubs. More importantly, we need to
5358 put all .init* and .fini* stubs at the end of the .init or
5359 .fini output sections respectively, because glibc splits the
5360 _init and _fini functions into multiple parts. Putting a stub in
5361 the middle of a function is not a good idea. */
5362
5363 static void
5364 group_sections (struct elf32_arm_link_hash_table *htab,
5365 bfd_size_type stub_group_size,
5366 bool stubs_always_after_branch)
5367 {
5368 asection **list = htab->input_list;
5369
5370 do
5371 {
5372 asection *tail = *list;
5373 asection *head;
5374
5375 if (tail == bfd_abs_section_ptr)
5376 continue;
5377
5378 /* Reverse the list: we must avoid placing stubs at the
5379 beginning of the section because the beginning of the text
5380 section may be required for an interrupt vector in bare metal
5381 code. */
5382 #define NEXT_SEC PREV_SEC
5383 head = NULL;
5384 while (tail != NULL)
5385 {
5386 /* Pop from tail. */
5387 asection *item = tail;
5388 tail = PREV_SEC (item);
5389
5390 /* Push on head. */
5391 NEXT_SEC (item) = head;
5392 head = item;
5393 }
5394
5395 while (head != NULL)
5396 {
5397 asection *curr;
5398 asection *next;
5399 bfd_vma stub_group_start = head->output_offset;
5400 bfd_vma end_of_next;
5401
5402 curr = head;
5403 while (NEXT_SEC (curr) != NULL)
5404 {
5405 next = NEXT_SEC (curr);
5406 end_of_next = next->output_offset + next->size;
5407 if (end_of_next - stub_group_start >= stub_group_size)
5408 /* End of NEXT is too far from start, so stop. */
5409 break;
5410 /* Add NEXT to the group. */
5411 curr = next;
5412 }
5413
5414 /* OK, the size from the start to the start of CURR is less
5415 than stub_group_size and thus can be handled by one stub
5416 section. (Or the head section is itself larger than
5417 stub_group_size, in which case we may be toast.)
5418 We should really be keeping track of the total size of
5419 stubs added here, as stubs contribute to the final output
5420 section size. */
5421 do
5422 {
5423 next = NEXT_SEC (head);
5424 /* Set up this stub group. */
5425 htab->stub_group[head->id].link_sec = curr;
5426 }
5427 while (head != curr && (head = next) != NULL);
5428
5429 /* But wait, there's more! Input sections up to stub_group_size
5430 bytes after the stub section can be handled by it too. */
5431 if (!stubs_always_after_branch)
5432 {
5433 stub_group_start = curr->output_offset + curr->size;
5434
5435 while (next != NULL)
5436 {
5437 end_of_next = next->output_offset + next->size;
5438 if (end_of_next - stub_group_start >= stub_group_size)
5439 /* End of NEXT is too far from stubs, so stop. */
5440 break;
5441 /* Add NEXT to the stub group. */
5442 head = next;
5443 next = NEXT_SEC (head);
5444 htab->stub_group[head->id].link_sec = curr;
5445 }
5446 }
5447 head = next;
5448 }
5449 }
5450 while (list++ != htab->input_list + htab->top_index);
5451
5452 free (htab->input_list);
5453 #undef PREV_SEC
5454 #undef NEXT_SEC
5455 }
5456
5457 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5458 erratum fix. */
5459
5460 static int
5461 a8_reloc_compare (const void *a, const void *b)
5462 {
5463 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5464 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5465
5466 if (ra->from < rb->from)
5467 return -1;
5468 else if (ra->from > rb->from)
5469 return 1;
5470 else
5471 return 0;
5472 }
5473
5474 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5475 const char *, char **);
5476
5477 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5478 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5479 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5480 otherwise. */
5481
5482 static bool
5483 cortex_a8_erratum_scan (bfd *input_bfd,
5484 struct bfd_link_info *info,
5485 struct a8_erratum_fix **a8_fixes_p,
5486 unsigned int *num_a8_fixes_p,
5487 unsigned int *a8_fix_table_size_p,
5488 struct a8_erratum_reloc *a8_relocs,
5489 unsigned int num_a8_relocs,
5490 unsigned prev_num_a8_fixes,
5491 bool *stub_changed_p)
5492 {
5493 asection *section;
5494 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5495 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5496 unsigned int num_a8_fixes = *num_a8_fixes_p;
5497 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5498
5499 if (htab == NULL)
5500 return false;
5501
5502 for (section = input_bfd->sections;
5503 section != NULL;
5504 section = section->next)
5505 {
5506 bfd_byte *contents = NULL;
5507 struct _arm_elf_section_data *sec_data;
5508 unsigned int span;
5509 bfd_vma base_vma;
5510
5511 if (elf_section_type (section) != SHT_PROGBITS
5512 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5513 || (section->flags & SEC_EXCLUDE) != 0
5514 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5515 || (section->output_section == bfd_abs_section_ptr))
5516 continue;
5517
5518 base_vma = section->output_section->vma + section->output_offset;
5519
5520 if (elf_section_data (section)->this_hdr.contents != NULL)
5521 contents = elf_section_data (section)->this_hdr.contents;
5522 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5523 return true;
5524
5525 sec_data = elf32_arm_section_data (section);
5526
5527 for (span = 0; span < sec_data->mapcount; span++)
5528 {
5529 unsigned int span_start = sec_data->map[span].vma;
5530 unsigned int span_end = (span == sec_data->mapcount - 1)
5531 ? section->size : sec_data->map[span + 1].vma;
5532 unsigned int i;
5533 char span_type = sec_data->map[span].type;
5534 bool last_was_32bit = false, last_was_branch = false;
5535
5536 if (span_type != 't')
5537 continue;
5538
5539 /* Span is entirely within a single 4KB region: skip scanning. */
5540 if (((base_vma + span_start) & ~0xfff)
5541 == ((base_vma + span_end) & ~0xfff))
5542 continue;
5543
5544 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5545
5546 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5547 * The branch target is in the same 4KB region as the
5548 first half of the branch.
5549 * The instruction before the branch is a 32-bit
5550 length non-branch instruction. */
5551 for (i = span_start; i < span_end;)
5552 {
5553 unsigned int insn = bfd_getl16 (&contents[i]);
5554 bool insn_32bit = false, is_blx = false, is_b = false;
5555 bool is_bl = false, is_bcc = false, is_32bit_branch;
5556
5557 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5558 insn_32bit = true;
5559
5560 if (insn_32bit)
5561 {
5562 /* Load the rest of the insn (in manual-friendly order). */
5563 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5564
5565 /* Encoding T4: B<c>.W. */
5566 is_b = (insn & 0xf800d000) == 0xf0009000;
5567 /* Encoding T1: BL<c>.W. */
5568 is_bl = (insn & 0xf800d000) == 0xf000d000;
5569 /* Encoding T2: BLX<c>.W. */
5570 is_blx = (insn & 0xf800d000) == 0xf000c000;
5571 /* Encoding T3: B<c>.W (not permitted in IT block). */
5572 is_bcc = (insn & 0xf800d000) == 0xf0008000
5573 && (insn & 0x07f00000) != 0x03800000;
5574 }
5575
5576 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5577
5578 if (((base_vma + i) & 0xfff) == 0xffe
5579 && insn_32bit
5580 && is_32bit_branch
5581 && last_was_32bit
5582 && ! last_was_branch)
5583 {
5584 bfd_signed_vma offset = 0;
5585 bool force_target_arm = false;
5586 bool force_target_thumb = false;
5587 bfd_vma target;
5588 enum elf32_arm_stub_type stub_type = arm_stub_none;
5589 struct a8_erratum_reloc key, *found;
5590 bool use_plt = false;
5591
5592 key.from = base_vma + i;
5593 found = (struct a8_erratum_reloc *)
5594 bsearch (&key, a8_relocs, num_a8_relocs,
5595 sizeof (struct a8_erratum_reloc),
5596 &a8_reloc_compare);
5597
5598 if (found)
5599 {
5600 char *error_message = NULL;
5601 struct elf_link_hash_entry *entry;
5602
5603 /* We don't care about the error returned from this
5604 function, only if there is glue or not. */
5605 entry = find_thumb_glue (info, found->sym_name,
5606 &error_message);
5607
5608 if (entry)
5609 found->non_a8_stub = true;
5610
5611 /* Keep a simpler condition, for the sake of clarity. */
5612 if (htab->root.splt != NULL && found->hash != NULL
5613 && found->hash->root.plt.offset != (bfd_vma) -1)
5614 use_plt = true;
5615
5616 if (found->r_type == R_ARM_THM_CALL)
5617 {
5618 if (found->branch_type == ST_BRANCH_TO_ARM
5619 || use_plt)
5620 force_target_arm = true;
5621 else
5622 force_target_thumb = true;
5623 }
5624 }
5625
5626 /* Check if we have an offending branch instruction. */
5627
5628 if (found && found->non_a8_stub)
5629 /* We've already made a stub for this instruction, e.g.
5630 it's a long branch or a Thumb->ARM stub. Assume that
5631 stub will suffice to work around the A8 erratum (see
5632 setting of always_after_branch above). */
5633 ;
5634 else if (is_bcc)
5635 {
5636 offset = (insn & 0x7ff) << 1;
5637 offset |= (insn & 0x3f0000) >> 4;
5638 offset |= (insn & 0x2000) ? 0x40000 : 0;
5639 offset |= (insn & 0x800) ? 0x80000 : 0;
5640 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5641 if (offset & 0x100000)
5642 offset |= ~ ((bfd_signed_vma) 0xfffff);
5643 stub_type = arm_stub_a8_veneer_b_cond;
5644 }
5645 else if (is_b || is_bl || is_blx)
5646 {
5647 int s = (insn & 0x4000000) != 0;
5648 int j1 = (insn & 0x2000) != 0;
5649 int j2 = (insn & 0x800) != 0;
5650 int i1 = !(j1 ^ s);
5651 int i2 = !(j2 ^ s);
5652
5653 offset = (insn & 0x7ff) << 1;
5654 offset |= (insn & 0x3ff0000) >> 4;
5655 offset |= i2 << 22;
5656 offset |= i1 << 23;
5657 offset |= s << 24;
5658 if (offset & 0x1000000)
5659 offset |= ~ ((bfd_signed_vma) 0xffffff);
5660
5661 if (is_blx)
5662 offset &= ~ ((bfd_signed_vma) 3);
5663
5664 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5665 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5666 }
5667
5668 if (stub_type != arm_stub_none)
5669 {
5670 bfd_vma pc_for_insn = base_vma + i + 4;
5671
5672 /* The original instruction is a BL, but the target is
5673 an ARM instruction. If we were not making a stub,
5674 the BL would have been converted to a BLX. Use the
5675 BLX stub instead in that case. */
5676 if (htab->use_blx && force_target_arm
5677 && stub_type == arm_stub_a8_veneer_bl)
5678 {
5679 stub_type = arm_stub_a8_veneer_blx;
5680 is_blx = true;
5681 is_bl = false;
5682 }
5683 /* Conversely, if the original instruction was
5684 BLX but the target is Thumb mode, use the BL
5685 stub. */
5686 else if (force_target_thumb
5687 && stub_type == arm_stub_a8_veneer_blx)
5688 {
5689 stub_type = arm_stub_a8_veneer_bl;
5690 is_blx = false;
5691 is_bl = true;
5692 }
5693
5694 if (is_blx)
5695 pc_for_insn &= ~ ((bfd_vma) 3);
5696
5697 /* If we found a relocation, use the proper destination,
5698 not the offset in the (unrelocated) instruction.
5699 Note this is always done if we switched the stub type
5700 above. */
5701 if (found)
5702 offset =
5703 (bfd_signed_vma) (found->destination - pc_for_insn);
5704
5705 /* If the stub will use a Thumb-mode branch to a
5706 PLT target, redirect it to the preceding Thumb
5707 entry point. */
5708 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5709 offset -= PLT_THUMB_STUB_SIZE;
5710
5711 target = pc_for_insn + offset;
5712
5713 /* The BLX stub is ARM-mode code. Adjust the offset to
5714 take the different PC value (+8 instead of +4) into
5715 account. */
5716 if (stub_type == arm_stub_a8_veneer_blx)
5717 offset += 4;
5718
5719 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5720 {
5721 char *stub_name = NULL;
5722
5723 if (num_a8_fixes == a8_fix_table_size)
5724 {
5725 a8_fix_table_size *= 2;
5726 a8_fixes = (struct a8_erratum_fix *)
5727 bfd_realloc (a8_fixes,
5728 sizeof (struct a8_erratum_fix)
5729 * a8_fix_table_size);
5730 }
5731
5732 if (num_a8_fixes < prev_num_a8_fixes)
5733 {
5734 /* If we're doing a subsequent scan,
5735 check if we've found the same fix as
5736 before, and try and reuse the stub
5737 name. */
5738 stub_name = a8_fixes[num_a8_fixes].stub_name;
5739 if ((a8_fixes[num_a8_fixes].section != section)
5740 || (a8_fixes[num_a8_fixes].offset != i))
5741 {
5742 free (stub_name);
5743 stub_name = NULL;
5744 *stub_changed_p = true;
5745 }
5746 }
5747
5748 if (!stub_name)
5749 {
5750 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5751 if (stub_name != NULL)
5752 sprintf (stub_name, "%x:%x", section->id, i);
5753 }
5754
5755 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5756 a8_fixes[num_a8_fixes].section = section;
5757 a8_fixes[num_a8_fixes].offset = i;
5758 a8_fixes[num_a8_fixes].target_offset =
5759 target - base_vma;
5760 a8_fixes[num_a8_fixes].orig_insn = insn;
5761 a8_fixes[num_a8_fixes].stub_name = stub_name;
5762 a8_fixes[num_a8_fixes].stub_type = stub_type;
5763 a8_fixes[num_a8_fixes].branch_type =
5764 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5765
5766 num_a8_fixes++;
5767 }
5768 }
5769 }
5770
5771 i += insn_32bit ? 4 : 2;
5772 last_was_32bit = insn_32bit;
5773 last_was_branch = is_32bit_branch;
5774 }
5775 }
5776
5777 if (elf_section_data (section)->this_hdr.contents == NULL)
5778 free (contents);
5779 }
5780
5781 *a8_fixes_p = a8_fixes;
5782 *num_a8_fixes_p = num_a8_fixes;
5783 *a8_fix_table_size_p = a8_fix_table_size;
5784
5785 return false;
5786 }
5787
5788 /* Create or update a stub entry depending on whether the stub can already be
5789 found in HTAB. The stub is identified by:
5790 - its type STUB_TYPE
5791 - its source branch (note that several can share the same stub) whose
5792 section and relocation (if any) are given by SECTION and IRELA
5793 respectively
5794 - its target symbol whose input section, hash, name, value and branch type
5795 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5796 respectively
5797
5798 If found, the value of the stub's target symbol is updated from SYM_VALUE
5799 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5800 TRUE and the stub entry is initialized.
5801
5802 Returns the stub that was created or updated, or NULL if an error
5803 occurred. */
5804
5805 static struct elf32_arm_stub_hash_entry *
5806 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5807 enum elf32_arm_stub_type stub_type, asection *section,
5808 Elf_Internal_Rela *irela, asection *sym_sec,
5809 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5810 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5811 bool *new_stub)
5812 {
5813 const asection *id_sec;
5814 char *stub_name;
5815 struct elf32_arm_stub_hash_entry *stub_entry;
5816 unsigned int r_type;
5817 bool sym_claimed = arm_stub_sym_claimed (stub_type);
5818
5819 BFD_ASSERT (stub_type != arm_stub_none);
5820 *new_stub = false;
5821
5822 if (sym_claimed)
5823 stub_name = sym_name;
5824 else
5825 {
5826 BFD_ASSERT (irela);
5827 BFD_ASSERT (section);
5828 BFD_ASSERT (section->id <= htab->top_id);
5829
5830 /* Support for grouping stub sections. */
5831 id_sec = htab->stub_group[section->id].link_sec;
5832
5833 /* Get the name of this stub. */
5834 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5835 stub_type);
5836 if (!stub_name)
5837 return NULL;
5838 }
5839
5840 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, false,
5841 false);
5842 /* The proper stub has already been created, just update its value. */
5843 if (stub_entry != NULL)
5844 {
5845 if (!sym_claimed)
5846 free (stub_name);
5847 stub_entry->target_value = sym_value;
5848 return stub_entry;
5849 }
5850
5851 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5852 if (stub_entry == NULL)
5853 {
5854 if (!sym_claimed)
5855 free (stub_name);
5856 return NULL;
5857 }
5858
5859 stub_entry->target_value = sym_value;
5860 stub_entry->target_section = sym_sec;
5861 stub_entry->stub_type = stub_type;
5862 stub_entry->h = hash;
5863 stub_entry->branch_type = branch_type;
5864
5865 if (sym_claimed)
5866 stub_entry->output_name = sym_name;
5867 else
5868 {
5869 if (sym_name == NULL)
5870 sym_name = "unnamed";
5871 stub_entry->output_name = (char *)
5872 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5873 + strlen (sym_name));
5874 if (stub_entry->output_name == NULL)
5875 {
5876 free (stub_name);
5877 return NULL;
5878 }
5879
5880 /* For historical reasons, use the existing names for ARM-to-Thumb and
5881 Thumb-to-ARM stubs. */
5882 r_type = ELF32_R_TYPE (irela->r_info);
5883 if ((r_type == (unsigned int) R_ARM_THM_CALL
5884 || r_type == (unsigned int) R_ARM_THM_JUMP24
5885 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5886 && branch_type == ST_BRANCH_TO_ARM)
5887 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5888 else if ((r_type == (unsigned int) R_ARM_CALL
5889 || r_type == (unsigned int) R_ARM_JUMP24)
5890 && branch_type == ST_BRANCH_TO_THUMB)
5891 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5892 else
5893 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5894 }
5895
5896 *new_stub = true;
5897 return stub_entry;
5898 }
5899
5900 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5901 gateway veneer to transition from non secure to secure state and create them
5902 accordingly.
5903
5904 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5905 defines the conditions that govern Secure Gateway veneer creation for a
5906 given symbol <SYM> as follows:
5907 - it has function type
5908 - it has non local binding
5909 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5910 same type, binding and value as <SYM> (called normal symbol).
5911 An entry function can handle secure state transition itself in which case
5912 its special symbol would have a different value from the normal symbol.
5913
5914 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5915 entry mapping while HTAB gives the name to hash entry mapping.
5916 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5917 created.
5918
5919 The return value gives whether a stub failed to be allocated. */
5920
5921 static bool
5922 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5923 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5924 int *cmse_stub_created)
5925 {
5926 const struct elf_backend_data *bed;
5927 Elf_Internal_Shdr *symtab_hdr;
5928 unsigned i, j, sym_count, ext_start;
5929 Elf_Internal_Sym *cmse_sym, *local_syms;
5930 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5931 enum arm_st_branch_type branch_type;
5932 char *sym_name, *lsym_name;
5933 bfd_vma sym_value;
5934 asection *section;
5935 struct elf32_arm_stub_hash_entry *stub_entry;
5936 bool is_v8m, new_stub, cmse_invalid, ret = true;
5937
5938 bed = get_elf_backend_data (input_bfd);
5939 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5940 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5941 ext_start = symtab_hdr->sh_info;
5942 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5943 && out_attr[Tag_CPU_arch_profile].i == 'M');
5944
5945 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5946 if (local_syms == NULL)
5947 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5948 symtab_hdr->sh_info, 0, NULL, NULL,
5949 NULL);
5950 if (symtab_hdr->sh_info && local_syms == NULL)
5951 return false;
5952
5953 /* Scan symbols. */
5954 for (i = 0; i < sym_count; i++)
5955 {
5956 cmse_invalid = false;
5957
5958 if (i < ext_start)
5959 {
5960 cmse_sym = &local_syms[i];
5961 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5962 symtab_hdr->sh_link,
5963 cmse_sym->st_name);
5964 if (!sym_name || !startswith (sym_name, CMSE_PREFIX))
5965 continue;
5966
5967 /* Special symbol with local binding. */
5968 cmse_invalid = true;
5969 }
5970 else
5971 {
5972 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5973 sym_name = (char *) cmse_hash->root.root.root.string;
5974 if (!startswith (sym_name, CMSE_PREFIX))
5975 continue;
5976
5977 /* Special symbol has incorrect binding or type. */
5978 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5979 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5980 || cmse_hash->root.type != STT_FUNC)
5981 cmse_invalid = true;
5982 }
5983
5984 if (!is_v8m)
5985 {
5986 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
5987 "ARMv8-M architecture or later"),
5988 input_bfd, sym_name);
5989 is_v8m = true; /* Avoid multiple warning. */
5990 ret = false;
5991 }
5992
5993 if (cmse_invalid)
5994 {
5995 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
5996 " a global or weak function symbol"),
5997 input_bfd, sym_name);
5998 ret = false;
5999 if (i < ext_start)
6000 continue;
6001 }
6002
6003 sym_name += strlen (CMSE_PREFIX);
6004 hash = (struct elf32_arm_link_hash_entry *)
6005 elf_link_hash_lookup (&(htab)->root, sym_name, false, false, true);
6006
6007 /* No associated normal symbol or it is neither global nor weak. */
6008 if (!hash
6009 || (hash->root.root.type != bfd_link_hash_defined
6010 && hash->root.root.type != bfd_link_hash_defweak)
6011 || hash->root.type != STT_FUNC)
6012 {
6013 /* Initialize here to avoid warning about use of possibly
6014 uninitialized variable. */
6015 j = 0;
6016
6017 if (!hash)
6018 {
6019 /* Searching for a normal symbol with local binding. */
6020 for (; j < ext_start; j++)
6021 {
6022 lsym_name =
6023 bfd_elf_string_from_elf_section (input_bfd,
6024 symtab_hdr->sh_link,
6025 local_syms[j].st_name);
6026 if (!strcmp (sym_name, lsym_name))
6027 break;
6028 }
6029 }
6030
6031 if (hash || j < ext_start)
6032 {
6033 _bfd_error_handler
6034 (_("%pB: invalid standard symbol `%s'; it must be "
6035 "a global or weak function symbol"),
6036 input_bfd, sym_name);
6037 }
6038 else
6039 _bfd_error_handler
6040 (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name);
6041 ret = false;
6042 if (!hash)
6043 continue;
6044 }
6045
6046 sym_value = hash->root.root.u.def.value;
6047 section = hash->root.root.u.def.section;
6048
6049 if (cmse_hash->root.root.u.def.section != section)
6050 {
6051 _bfd_error_handler
6052 (_("%pB: `%s' and its special symbol are in different sections"),
6053 input_bfd, sym_name);
6054 ret = false;
6055 }
6056 if (cmse_hash->root.root.u.def.value != sym_value)
6057 continue; /* Ignore: could be an entry function starting with SG. */
6058
6059 /* If this section is a link-once section that will be discarded, then
6060 don't create any stubs. */
6061 if (section->output_section == NULL)
6062 {
6063 _bfd_error_handler
6064 (_("%pB: entry function `%s' not output"), input_bfd, sym_name);
6065 continue;
6066 }
6067
6068 if (hash->root.size == 0)
6069 {
6070 _bfd_error_handler
6071 (_("%pB: entry function `%s' is empty"), input_bfd, sym_name);
6072 ret = false;
6073 }
6074
6075 if (!ret)
6076 continue;
6077 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6078 stub_entry
6079 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6080 NULL, NULL, section, hash, sym_name,
6081 sym_value, branch_type, &new_stub);
6082
6083 if (stub_entry == NULL)
6084 ret = false;
6085 else
6086 {
6087 BFD_ASSERT (new_stub);
6088 (*cmse_stub_created)++;
6089 }
6090 }
6091
6092 if (!symtab_hdr->contents)
6093 free (local_syms);
6094 return ret;
6095 }
6096
6097 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
6098 code entry function, ie can be called from non secure code without using a
6099 veneer. */
6100
6101 static bool
6102 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
6103 {
6104 bfd_byte contents[4];
6105 uint32_t first_insn;
6106 asection *section;
6107 file_ptr offset;
6108 bfd *abfd;
6109
6110 /* Defined symbol of function type. */
6111 if (hash->root.root.type != bfd_link_hash_defined
6112 && hash->root.root.type != bfd_link_hash_defweak)
6113 return false;
6114 if (hash->root.type != STT_FUNC)
6115 return false;
6116
6117 /* Read first instruction. */
6118 section = hash->root.root.u.def.section;
6119 abfd = section->owner;
6120 offset = hash->root.root.u.def.value - section->vma;
6121 if (!bfd_get_section_contents (abfd, section, contents, offset,
6122 sizeof (contents)))
6123 return false;
6124
6125 first_insn = bfd_get_32 (abfd, contents);
6126
6127 /* Starts by SG instruction. */
6128 return first_insn == 0xe97fe97f;
6129 }
6130
6131 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6132 secure gateway veneers (ie. the veneers was not in the input import library)
6133 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
6134
6135 static bool
6136 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
6137 {
6138 struct elf32_arm_stub_hash_entry *stub_entry;
6139 struct bfd_link_info *info;
6140
6141 /* Massage our args to the form they really have. */
6142 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
6143 info = (struct bfd_link_info *) gen_info;
6144
6145 if (info->out_implib_bfd)
6146 return true;
6147
6148 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
6149 return true;
6150
6151 if (stub_entry->stub_offset == (bfd_vma) -1)
6152 _bfd_error_handler (" %s", stub_entry->output_name);
6153
6154 return true;
6155 }
6156
6157 /* Set offset of each secure gateway veneers so that its address remain
6158 identical to the one in the input import library referred by
6159 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
6160 (present in input import library but absent from the executable being
6161 linked) or if new veneers appeared and there is no output import library
6162 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6163 number of secure gateway veneers found in the input import library.
6164
6165 The function returns whether an error occurred. If no error occurred,
6166 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6167 and this function and HTAB->new_cmse_stub_offset is set to the biggest
6168 veneer observed set for new veneers to be layed out after. */
6169
6170 static bool
6171 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
6172 struct elf32_arm_link_hash_table *htab,
6173 int *cmse_stub_created)
6174 {
6175 long symsize;
6176 char *sym_name;
6177 flagword flags;
6178 long i, symcount;
6179 bfd *in_implib_bfd;
6180 asection *stub_out_sec;
6181 bool ret = true;
6182 Elf_Internal_Sym *intsym;
6183 const char *out_sec_name;
6184 bfd_size_type cmse_stub_size;
6185 asymbol **sympp = NULL, *sym;
6186 struct elf32_arm_link_hash_entry *hash;
6187 const insn_sequence *cmse_stub_template;
6188 struct elf32_arm_stub_hash_entry *stub_entry;
6189 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
6190 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
6191 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
6192
6193 /* No input secure gateway import library. */
6194 if (!htab->in_implib_bfd)
6195 return true;
6196
6197 in_implib_bfd = htab->in_implib_bfd;
6198 if (!htab->cmse_implib)
6199 {
6200 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6201 "Gateway import libraries"), in_implib_bfd);
6202 return false;
6203 }
6204
6205 /* Get symbol table size. */
6206 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
6207 if (symsize < 0)
6208 return false;
6209
6210 /* Read in the input secure gateway import library's symbol table. */
6211 sympp = (asymbol **) bfd_malloc (symsize);
6212 if (sympp == NULL)
6213 return false;
6214
6215 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
6216 if (symcount < 0)
6217 {
6218 ret = false;
6219 goto free_sym_buf;
6220 }
6221
6222 htab->new_cmse_stub_offset = 0;
6223 cmse_stub_size =
6224 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
6225 &cmse_stub_template,
6226 &cmse_stub_template_size);
6227 out_sec_name =
6228 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
6229 stub_out_sec =
6230 bfd_get_section_by_name (htab->obfd, out_sec_name);
6231 if (stub_out_sec != NULL)
6232 cmse_stub_sec_vma = stub_out_sec->vma;
6233
6234 /* Set addresses of veneers mentionned in input secure gateway import
6235 library's symbol table. */
6236 for (i = 0; i < symcount; i++)
6237 {
6238 sym = sympp[i];
6239 flags = sym->flags;
6240 sym_name = (char *) bfd_asymbol_name (sym);
6241 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
6242
6243 if (sym->section != bfd_abs_section_ptr
6244 || !(flags & (BSF_GLOBAL | BSF_WEAK))
6245 || (flags & BSF_FUNCTION) != BSF_FUNCTION
6246 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
6247 != ST_BRANCH_TO_THUMB))
6248 {
6249 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6250 "symbol should be absolute, global and "
6251 "refer to Thumb functions"),
6252 in_implib_bfd, sym_name);
6253 ret = false;
6254 continue;
6255 }
6256
6257 veneer_value = bfd_asymbol_value (sym);
6258 stub_offset = veneer_value - cmse_stub_sec_vma;
6259 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
6260 false, false);
6261 hash = (struct elf32_arm_link_hash_entry *)
6262 elf_link_hash_lookup (&(htab)->root, sym_name, false, false, true);
6263
6264 /* Stub entry should have been created by cmse_scan or the symbol be of
6265 a secure function callable from non secure code. */
6266 if (!stub_entry && !hash)
6267 {
6268 bool new_stub;
6269
6270 _bfd_error_handler
6271 (_("entry function `%s' disappeared from secure code"), sym_name);
6272 hash = (struct elf32_arm_link_hash_entry *)
6273 elf_link_hash_lookup (&(htab)->root, sym_name, true, true, true);
6274 stub_entry
6275 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6276 NULL, NULL, bfd_abs_section_ptr, hash,
6277 sym_name, veneer_value,
6278 ST_BRANCH_TO_THUMB, &new_stub);
6279 if (stub_entry == NULL)
6280 ret = false;
6281 else
6282 {
6283 BFD_ASSERT (new_stub);
6284 new_cmse_stubs_created++;
6285 (*cmse_stub_created)++;
6286 }
6287 stub_entry->stub_template_size = stub_entry->stub_size = 0;
6288 stub_entry->stub_offset = stub_offset;
6289 }
6290 /* Symbol found is not callable from non secure code. */
6291 else if (!stub_entry)
6292 {
6293 if (!cmse_entry_fct_p (hash))
6294 {
6295 _bfd_error_handler (_("`%s' refers to a non entry function"),
6296 sym_name);
6297 ret = false;
6298 }
6299 continue;
6300 }
6301 else
6302 {
6303 /* Only stubs for SG veneers should have been created. */
6304 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6305
6306 /* Check visibility hasn't changed. */
6307 if (!!(flags & BSF_GLOBAL)
6308 != (hash->root.root.type == bfd_link_hash_defined))
6309 _bfd_error_handler
6310 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd,
6311 sym_name);
6312
6313 stub_entry->stub_offset = stub_offset;
6314 }
6315
6316 /* Size should match that of a SG veneer. */
6317 if (intsym->st_size != cmse_stub_size)
6318 {
6319 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6320 in_implib_bfd, sym_name);
6321 ret = false;
6322 }
6323
6324 /* Previous veneer address is before current SG veneer section. */
6325 if (veneer_value < cmse_stub_sec_vma)
6326 {
6327 /* Avoid offset underflow. */
6328 if (stub_entry)
6329 stub_entry->stub_offset = 0;
6330 stub_offset = 0;
6331 ret = false;
6332 }
6333
6334 /* Complain if stub offset not a multiple of stub size. */
6335 if (stub_offset % cmse_stub_size)
6336 {
6337 _bfd_error_handler
6338 (_("offset of veneer for entry function `%s' not a multiple of "
6339 "its size"), sym_name);
6340 ret = false;
6341 }
6342
6343 if (!ret)
6344 continue;
6345
6346 new_cmse_stubs_created--;
6347 if (veneer_value < cmse_stub_array_start)
6348 cmse_stub_array_start = veneer_value;
6349 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6350 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6351 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6352 }
6353
6354 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6355 {
6356 BFD_ASSERT (new_cmse_stubs_created > 0);
6357 _bfd_error_handler
6358 (_("new entry function(s) introduced but no output import library "
6359 "specified:"));
6360 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6361 }
6362
6363 if (cmse_stub_array_start != cmse_stub_sec_vma)
6364 {
6365 _bfd_error_handler
6366 (_("start address of `%s' is different from previous link"),
6367 out_sec_name);
6368 ret = false;
6369 }
6370
6371 free_sym_buf:
6372 free (sympp);
6373 return ret;
6374 }
6375
6376 /* Determine and set the size of the stub section for a final link.
6377
6378 The basic idea here is to examine all the relocations looking for
6379 PC-relative calls to a target that is unreachable with a "bl"
6380 instruction. */
6381
6382 bool
6383 elf32_arm_size_stubs (bfd *output_bfd,
6384 bfd *stub_bfd,
6385 struct bfd_link_info *info,
6386 bfd_signed_vma group_size,
6387 asection * (*add_stub_section) (const char *, asection *,
6388 asection *,
6389 unsigned int),
6390 void (*layout_sections_again) (void))
6391 {
6392 bool ret = true;
6393 obj_attribute *out_attr;
6394 int cmse_stub_created = 0;
6395 bfd_size_type stub_group_size;
6396 bool m_profile, stubs_always_after_branch, first_veneer_scan = true;
6397 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6398 struct a8_erratum_fix *a8_fixes = NULL;
6399 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6400 struct a8_erratum_reloc *a8_relocs = NULL;
6401 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6402
6403 if (htab == NULL)
6404 return false;
6405
6406 if (htab->fix_cortex_a8)
6407 {
6408 a8_fixes = (struct a8_erratum_fix *)
6409 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6410 a8_relocs = (struct a8_erratum_reloc *)
6411 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6412 }
6413
6414 /* Propagate mach to stub bfd, because it may not have been
6415 finalized when we created stub_bfd. */
6416 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6417 bfd_get_mach (output_bfd));
6418
6419 /* Stash our params away. */
6420 htab->stub_bfd = stub_bfd;
6421 htab->add_stub_section = add_stub_section;
6422 htab->layout_sections_again = layout_sections_again;
6423 stubs_always_after_branch = group_size < 0;
6424
6425 out_attr = elf_known_obj_attributes_proc (output_bfd);
6426 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6427
6428 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6429 as the first half of a 32-bit branch straddling two 4K pages. This is a
6430 crude way of enforcing that. */
6431 if (htab->fix_cortex_a8)
6432 stubs_always_after_branch = 1;
6433
6434 if (group_size < 0)
6435 stub_group_size = -group_size;
6436 else
6437 stub_group_size = group_size;
6438
6439 if (stub_group_size == 1)
6440 {
6441 /* Default values. */
6442 /* Thumb branch range is +-4MB has to be used as the default
6443 maximum size (a given section can contain both ARM and Thumb
6444 code, so the worst case has to be taken into account).
6445
6446 This value is 24K less than that, which allows for 2025
6447 12-byte stubs. If we exceed that, then we will fail to link.
6448 The user will have to relink with an explicit group size
6449 option. */
6450 stub_group_size = 4170000;
6451 }
6452
6453 group_sections (htab, stub_group_size, stubs_always_after_branch);
6454
6455 /* If we're applying the cortex A8 fix, we need to determine the
6456 program header size now, because we cannot change it later --
6457 that could alter section placements. Notice the A8 erratum fix
6458 ends up requiring the section addresses to remain unchanged
6459 modulo the page size. That's something we cannot represent
6460 inside BFD, and we don't want to force the section alignment to
6461 be the page size. */
6462 if (htab->fix_cortex_a8)
6463 (*htab->layout_sections_again) ();
6464
6465 while (1)
6466 {
6467 bfd *input_bfd;
6468 unsigned int bfd_indx;
6469 asection *stub_sec;
6470 enum elf32_arm_stub_type stub_type;
6471 bool stub_changed = false;
6472 unsigned prev_num_a8_fixes = num_a8_fixes;
6473
6474 num_a8_fixes = 0;
6475 for (input_bfd = info->input_bfds, bfd_indx = 0;
6476 input_bfd != NULL;
6477 input_bfd = input_bfd->link.next, bfd_indx++)
6478 {
6479 Elf_Internal_Shdr *symtab_hdr;
6480 asection *section;
6481 Elf_Internal_Sym *local_syms = NULL;
6482
6483 if (!is_arm_elf (input_bfd))
6484 continue;
6485 if ((input_bfd->flags & DYNAMIC) != 0
6486 && (elf_sym_hashes (input_bfd) == NULL
6487 || (elf_dyn_lib_class (input_bfd) & DYN_AS_NEEDED) != 0))
6488 continue;
6489
6490 num_a8_relocs = 0;
6491
6492 /* We'll need the symbol table in a second. */
6493 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6494 if (symtab_hdr->sh_info == 0)
6495 continue;
6496
6497 /* Limit scan of symbols to object file whose profile is
6498 Microcontroller to not hinder performance in the general case. */
6499 if (m_profile && first_veneer_scan)
6500 {
6501 struct elf_link_hash_entry **sym_hashes;
6502
6503 sym_hashes = elf_sym_hashes (input_bfd);
6504 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6505 &cmse_stub_created))
6506 goto error_ret_free_local;
6507
6508 if (cmse_stub_created != 0)
6509 stub_changed = true;
6510 }
6511
6512 /* Walk over each section attached to the input bfd. */
6513 for (section = input_bfd->sections;
6514 section != NULL;
6515 section = section->next)
6516 {
6517 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6518
6519 /* If there aren't any relocs, then there's nothing more
6520 to do. */
6521 if ((section->flags & SEC_RELOC) == 0
6522 || section->reloc_count == 0
6523 || (section->flags & SEC_CODE) == 0)
6524 continue;
6525
6526 /* If this section is a link-once section that will be
6527 discarded, then don't create any stubs. */
6528 if (section->output_section == NULL
6529 || section->output_section->owner != output_bfd)
6530 continue;
6531
6532 /* Get the relocs. */
6533 internal_relocs
6534 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6535 NULL, info->keep_memory);
6536 if (internal_relocs == NULL)
6537 goto error_ret_free_local;
6538
6539 /* Now examine each relocation. */
6540 irela = internal_relocs;
6541 irelaend = irela + section->reloc_count;
6542 for (; irela < irelaend; irela++)
6543 {
6544 unsigned int r_type, r_indx;
6545 asection *sym_sec;
6546 bfd_vma sym_value;
6547 bfd_vma destination;
6548 struct elf32_arm_link_hash_entry *hash;
6549 const char *sym_name;
6550 unsigned char st_type;
6551 enum arm_st_branch_type branch_type;
6552 bool created_stub = false;
6553
6554 r_type = ELF32_R_TYPE (irela->r_info);
6555 r_indx = ELF32_R_SYM (irela->r_info);
6556
6557 if (r_type >= (unsigned int) R_ARM_max)
6558 {
6559 bfd_set_error (bfd_error_bad_value);
6560 error_ret_free_internal:
6561 if (elf_section_data (section)->relocs == NULL)
6562 free (internal_relocs);
6563 /* Fall through. */
6564 error_ret_free_local:
6565 if (symtab_hdr->contents != (unsigned char *) local_syms)
6566 free (local_syms);
6567 return false;
6568 }
6569
6570 hash = NULL;
6571 if (r_indx >= symtab_hdr->sh_info)
6572 hash = elf32_arm_hash_entry
6573 (elf_sym_hashes (input_bfd)
6574 [r_indx - symtab_hdr->sh_info]);
6575
6576 /* Only look for stubs on branch instructions, or
6577 non-relaxed TLSCALL */
6578 if ((r_type != (unsigned int) R_ARM_CALL)
6579 && (r_type != (unsigned int) R_ARM_THM_CALL)
6580 && (r_type != (unsigned int) R_ARM_JUMP24)
6581 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6582 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6583 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6584 && (r_type != (unsigned int) R_ARM_PLT32)
6585 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6586 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6587 && r_type == (elf32_arm_tls_transition
6588 (info, r_type,
6589 (struct elf_link_hash_entry *) hash))
6590 && ((hash ? hash->tls_type
6591 : (elf32_arm_local_got_tls_type
6592 (input_bfd)[r_indx]))
6593 & GOT_TLS_GDESC) != 0))
6594 continue;
6595
6596 /* Now determine the call target, its name, value,
6597 section. */
6598 sym_sec = NULL;
6599 sym_value = 0;
6600 destination = 0;
6601 sym_name = NULL;
6602
6603 if (r_type == (unsigned int) R_ARM_TLS_CALL
6604 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6605 {
6606 /* A non-relaxed TLS call. The target is the
6607 plt-resident trampoline and nothing to do
6608 with the symbol. */
6609 BFD_ASSERT (htab->tls_trampoline > 0);
6610 sym_sec = htab->root.splt;
6611 sym_value = htab->tls_trampoline;
6612 hash = 0;
6613 st_type = STT_FUNC;
6614 branch_type = ST_BRANCH_TO_ARM;
6615 }
6616 else if (!hash)
6617 {
6618 /* It's a local symbol. */
6619 Elf_Internal_Sym *sym;
6620
6621 if (local_syms == NULL)
6622 {
6623 local_syms
6624 = (Elf_Internal_Sym *) symtab_hdr->contents;
6625 if (local_syms == NULL)
6626 local_syms
6627 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6628 symtab_hdr->sh_info, 0,
6629 NULL, NULL, NULL);
6630 if (local_syms == NULL)
6631 goto error_ret_free_internal;
6632 }
6633
6634 sym = local_syms + r_indx;
6635 if (sym->st_shndx == SHN_UNDEF)
6636 sym_sec = bfd_und_section_ptr;
6637 else if (sym->st_shndx == SHN_ABS)
6638 sym_sec = bfd_abs_section_ptr;
6639 else if (sym->st_shndx == SHN_COMMON)
6640 sym_sec = bfd_com_section_ptr;
6641 else
6642 sym_sec =
6643 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6644
6645 if (!sym_sec)
6646 /* This is an undefined symbol. It can never
6647 be resolved. */
6648 continue;
6649
6650 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6651 sym_value = sym->st_value;
6652 destination = (sym_value + irela->r_addend
6653 + sym_sec->output_offset
6654 + sym_sec->output_section->vma);
6655 st_type = ELF_ST_TYPE (sym->st_info);
6656 branch_type =
6657 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6658 sym_name
6659 = bfd_elf_string_from_elf_section (input_bfd,
6660 symtab_hdr->sh_link,
6661 sym->st_name);
6662 }
6663 else
6664 {
6665 /* It's an external symbol. */
6666 while (hash->root.root.type == bfd_link_hash_indirect
6667 || hash->root.root.type == bfd_link_hash_warning)
6668 hash = ((struct elf32_arm_link_hash_entry *)
6669 hash->root.root.u.i.link);
6670
6671 if (hash->root.root.type == bfd_link_hash_defined
6672 || hash->root.root.type == bfd_link_hash_defweak)
6673 {
6674 sym_sec = hash->root.root.u.def.section;
6675 sym_value = hash->root.root.u.def.value;
6676
6677 struct elf32_arm_link_hash_table *globals =
6678 elf32_arm_hash_table (info);
6679
6680 /* For a destination in a shared library,
6681 use the PLT stub as target address to
6682 decide whether a branch stub is
6683 needed. */
6684 if (globals != NULL
6685 && globals->root.splt != NULL
6686 && hash != NULL
6687 && hash->root.plt.offset != (bfd_vma) -1)
6688 {
6689 sym_sec = globals->root.splt;
6690 sym_value = hash->root.plt.offset;
6691 if (sym_sec->output_section != NULL)
6692 destination = (sym_value
6693 + sym_sec->output_offset
6694 + sym_sec->output_section->vma);
6695 }
6696 else if (sym_sec->output_section != NULL)
6697 destination = (sym_value + irela->r_addend
6698 + sym_sec->output_offset
6699 + sym_sec->output_section->vma);
6700 }
6701 else if ((hash->root.root.type == bfd_link_hash_undefined)
6702 || (hash->root.root.type == bfd_link_hash_undefweak))
6703 {
6704 /* For a shared library, use the PLT stub as
6705 target address to decide whether a long
6706 branch stub is needed.
6707 For absolute code, they cannot be handled. */
6708 struct elf32_arm_link_hash_table *globals =
6709 elf32_arm_hash_table (info);
6710
6711 if (globals != NULL
6712 && globals->root.splt != NULL
6713 && hash != NULL
6714 && hash->root.plt.offset != (bfd_vma) -1)
6715 {
6716 sym_sec = globals->root.splt;
6717 sym_value = hash->root.plt.offset;
6718 if (sym_sec->output_section != NULL)
6719 destination = (sym_value
6720 + sym_sec->output_offset
6721 + sym_sec->output_section->vma);
6722 }
6723 else
6724 continue;
6725 }
6726 else
6727 {
6728 bfd_set_error (bfd_error_bad_value);
6729 goto error_ret_free_internal;
6730 }
6731 st_type = hash->root.type;
6732 branch_type =
6733 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6734 sym_name = hash->root.root.root.string;
6735 }
6736
6737 do
6738 {
6739 bool new_stub;
6740 struct elf32_arm_stub_hash_entry *stub_entry;
6741
6742 /* Determine what (if any) linker stub is needed. */
6743 stub_type = arm_type_of_stub (info, section, irela,
6744 st_type, &branch_type,
6745 hash, destination, sym_sec,
6746 input_bfd, sym_name);
6747 if (stub_type == arm_stub_none)
6748 break;
6749
6750 /* We've either created a stub for this reloc already,
6751 or we are about to. */
6752 stub_entry =
6753 elf32_arm_create_stub (htab, stub_type, section, irela,
6754 sym_sec, hash,
6755 (char *) sym_name, sym_value,
6756 branch_type, &new_stub);
6757
6758 created_stub = stub_entry != NULL;
6759 if (!created_stub)
6760 goto error_ret_free_internal;
6761 else if (!new_stub)
6762 break;
6763 else
6764 stub_changed = true;
6765 }
6766 while (0);
6767
6768 /* Look for relocations which might trigger Cortex-A8
6769 erratum. */
6770 if (htab->fix_cortex_a8
6771 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6772 || r_type == (unsigned int) R_ARM_THM_JUMP19
6773 || r_type == (unsigned int) R_ARM_THM_CALL
6774 || r_type == (unsigned int) R_ARM_THM_XPC22))
6775 {
6776 bfd_vma from = section->output_section->vma
6777 + section->output_offset
6778 + irela->r_offset;
6779
6780 if ((from & 0xfff) == 0xffe)
6781 {
6782 /* Found a candidate. Note we haven't checked the
6783 destination is within 4K here: if we do so (and
6784 don't create an entry in a8_relocs) we can't tell
6785 that a branch should have been relocated when
6786 scanning later. */
6787 if (num_a8_relocs == a8_reloc_table_size)
6788 {
6789 a8_reloc_table_size *= 2;
6790 a8_relocs = (struct a8_erratum_reloc *)
6791 bfd_realloc (a8_relocs,
6792 sizeof (struct a8_erratum_reloc)
6793 * a8_reloc_table_size);
6794 }
6795
6796 a8_relocs[num_a8_relocs].from = from;
6797 a8_relocs[num_a8_relocs].destination = destination;
6798 a8_relocs[num_a8_relocs].r_type = r_type;
6799 a8_relocs[num_a8_relocs].branch_type = branch_type;
6800 a8_relocs[num_a8_relocs].sym_name = sym_name;
6801 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6802 a8_relocs[num_a8_relocs].hash = hash;
6803
6804 num_a8_relocs++;
6805 }
6806 }
6807 }
6808
6809 /* We're done with the internal relocs, free them. */
6810 if (elf_section_data (section)->relocs == NULL)
6811 free (internal_relocs);
6812 }
6813
6814 if (htab->fix_cortex_a8)
6815 {
6816 /* Sort relocs which might apply to Cortex-A8 erratum. */
6817 qsort (a8_relocs, num_a8_relocs,
6818 sizeof (struct a8_erratum_reloc),
6819 &a8_reloc_compare);
6820
6821 /* Scan for branches which might trigger Cortex-A8 erratum. */
6822 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6823 &num_a8_fixes, &a8_fix_table_size,
6824 a8_relocs, num_a8_relocs,
6825 prev_num_a8_fixes, &stub_changed)
6826 != 0)
6827 goto error_ret_free_local;
6828 }
6829
6830 if (local_syms != NULL
6831 && symtab_hdr->contents != (unsigned char *) local_syms)
6832 {
6833 if (!info->keep_memory)
6834 free (local_syms);
6835 else
6836 symtab_hdr->contents = (unsigned char *) local_syms;
6837 }
6838 }
6839
6840 if (first_veneer_scan
6841 && !set_cmse_veneer_addr_from_implib (info, htab,
6842 &cmse_stub_created))
6843 ret = false;
6844
6845 if (prev_num_a8_fixes != num_a8_fixes)
6846 stub_changed = true;
6847
6848 if (!stub_changed)
6849 break;
6850
6851 /* OK, we've added some stubs. Find out the new size of the
6852 stub sections. */
6853 for (stub_sec = htab->stub_bfd->sections;
6854 stub_sec != NULL;
6855 stub_sec = stub_sec->next)
6856 {
6857 /* Ignore non-stub sections. */
6858 if (!strstr (stub_sec->name, STUB_SUFFIX))
6859 continue;
6860
6861 stub_sec->size = 0;
6862 }
6863
6864 /* Add new SG veneers after those already in the input import
6865 library. */
6866 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6867 stub_type++)
6868 {
6869 bfd_vma *start_offset_p;
6870 asection **stub_sec_p;
6871
6872 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6873 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6874 if (start_offset_p == NULL)
6875 continue;
6876
6877 BFD_ASSERT (stub_sec_p != NULL);
6878 if (*stub_sec_p != NULL)
6879 (*stub_sec_p)->size = *start_offset_p;
6880 }
6881
6882 /* Compute stub section size, considering padding. */
6883 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6884 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6885 stub_type++)
6886 {
6887 int size, padding;
6888 asection **stub_sec_p;
6889
6890 padding = arm_dedicated_stub_section_padding (stub_type);
6891 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6892 /* Skip if no stub input section or no stub section padding
6893 required. */
6894 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6895 continue;
6896 /* Stub section padding required but no dedicated section. */
6897 BFD_ASSERT (stub_sec_p);
6898
6899 size = (*stub_sec_p)->size;
6900 size = (size + padding - 1) & ~(padding - 1);
6901 (*stub_sec_p)->size = size;
6902 }
6903
6904 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6905 if (htab->fix_cortex_a8)
6906 for (i = 0; i < num_a8_fixes; i++)
6907 {
6908 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6909 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6910
6911 if (stub_sec == NULL)
6912 return false;
6913
6914 stub_sec->size
6915 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6916 NULL);
6917 }
6918
6919
6920 /* Ask the linker to do its stuff. */
6921 (*htab->layout_sections_again) ();
6922 first_veneer_scan = false;
6923 }
6924
6925 /* Add stubs for Cortex-A8 erratum fixes now. */
6926 if (htab->fix_cortex_a8)
6927 {
6928 for (i = 0; i < num_a8_fixes; i++)
6929 {
6930 struct elf32_arm_stub_hash_entry *stub_entry;
6931 char *stub_name = a8_fixes[i].stub_name;
6932 asection *section = a8_fixes[i].section;
6933 unsigned int section_id = a8_fixes[i].section->id;
6934 asection *link_sec = htab->stub_group[section_id].link_sec;
6935 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6936 const insn_sequence *template_sequence;
6937 int template_size, size = 0;
6938
6939 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6940 true, false);
6941 if (stub_entry == NULL)
6942 {
6943 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6944 section->owner, stub_name);
6945 return false;
6946 }
6947
6948 stub_entry->stub_sec = stub_sec;
6949 stub_entry->stub_offset = (bfd_vma) -1;
6950 stub_entry->id_sec = link_sec;
6951 stub_entry->stub_type = a8_fixes[i].stub_type;
6952 stub_entry->source_value = a8_fixes[i].offset;
6953 stub_entry->target_section = a8_fixes[i].section;
6954 stub_entry->target_value = a8_fixes[i].target_offset;
6955 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6956 stub_entry->branch_type = a8_fixes[i].branch_type;
6957
6958 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6959 &template_sequence,
6960 &template_size);
6961
6962 stub_entry->stub_size = size;
6963 stub_entry->stub_template = template_sequence;
6964 stub_entry->stub_template_size = template_size;
6965 }
6966
6967 /* Stash the Cortex-A8 erratum fix array for use later in
6968 elf32_arm_write_section(). */
6969 htab->a8_erratum_fixes = a8_fixes;
6970 htab->num_a8_erratum_fixes = num_a8_fixes;
6971 }
6972 else
6973 {
6974 htab->a8_erratum_fixes = NULL;
6975 htab->num_a8_erratum_fixes = 0;
6976 }
6977 return ret;
6978 }
6979
6980 /* Build all the stubs associated with the current output file. The
6981 stubs are kept in a hash table attached to the main linker hash
6982 table. We also set up the .plt entries for statically linked PIC
6983 functions here. This function is called via arm_elf_finish in the
6984 linker. */
6985
6986 bool
6987 elf32_arm_build_stubs (struct bfd_link_info *info)
6988 {
6989 asection *stub_sec;
6990 struct bfd_hash_table *table;
6991 enum elf32_arm_stub_type stub_type;
6992 struct elf32_arm_link_hash_table *htab;
6993
6994 htab = elf32_arm_hash_table (info);
6995 if (htab == NULL)
6996 return false;
6997
6998 for (stub_sec = htab->stub_bfd->sections;
6999 stub_sec != NULL;
7000 stub_sec = stub_sec->next)
7001 {
7002 bfd_size_type size;
7003
7004 /* Ignore non-stub sections. */
7005 if (!strstr (stub_sec->name, STUB_SUFFIX))
7006 continue;
7007
7008 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
7009 must at least be done for stub section requiring padding and for SG
7010 veneers to ensure that a non secure code branching to a removed SG
7011 veneer causes an error. */
7012 size = stub_sec->size;
7013 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
7014 if (stub_sec->contents == NULL && size != 0)
7015 return false;
7016
7017 stub_sec->size = 0;
7018 }
7019
7020 /* Add new SG veneers after those already in the input import library. */
7021 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7022 {
7023 bfd_vma *start_offset_p;
7024 asection **stub_sec_p;
7025
7026 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
7027 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
7028 if (start_offset_p == NULL)
7029 continue;
7030
7031 BFD_ASSERT (stub_sec_p != NULL);
7032 if (*stub_sec_p != NULL)
7033 (*stub_sec_p)->size = *start_offset_p;
7034 }
7035
7036 /* Build the stubs as directed by the stub hash table. */
7037 table = &htab->stub_hash_table;
7038 bfd_hash_traverse (table, arm_build_one_stub, info);
7039 if (htab->fix_cortex_a8)
7040 {
7041 /* Place the cortex a8 stubs last. */
7042 htab->fix_cortex_a8 = -1;
7043 bfd_hash_traverse (table, arm_build_one_stub, info);
7044 }
7045
7046 return true;
7047 }
7048
7049 /* Locate the Thumb encoded calling stub for NAME. */
7050
7051 static struct elf_link_hash_entry *
7052 find_thumb_glue (struct bfd_link_info *link_info,
7053 const char *name,
7054 char **error_message)
7055 {
7056 char *tmp_name;
7057 struct elf_link_hash_entry *hash;
7058 struct elf32_arm_link_hash_table *hash_table;
7059
7060 /* We need a pointer to the armelf specific hash table. */
7061 hash_table = elf32_arm_hash_table (link_info);
7062 if (hash_table == NULL)
7063 return NULL;
7064
7065 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7066 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
7067
7068 BFD_ASSERT (tmp_name);
7069
7070 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
7071
7072 hash = elf_link_hash_lookup
7073 (&(hash_table)->root, tmp_name, false, false, true);
7074
7075 if (hash == NULL
7076 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7077 "Thumb", tmp_name, name) == -1)
7078 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7079
7080 free (tmp_name);
7081
7082 return hash;
7083 }
7084
7085 /* Locate the ARM encoded calling stub for NAME. */
7086
7087 static struct elf_link_hash_entry *
7088 find_arm_glue (struct bfd_link_info *link_info,
7089 const char *name,
7090 char **error_message)
7091 {
7092 char *tmp_name;
7093 struct elf_link_hash_entry *myh;
7094 struct elf32_arm_link_hash_table *hash_table;
7095
7096 /* We need a pointer to the elfarm specific hash table. */
7097 hash_table = elf32_arm_hash_table (link_info);
7098 if (hash_table == NULL)
7099 return NULL;
7100
7101 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7102 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7103 BFD_ASSERT (tmp_name);
7104
7105 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7106
7107 myh = elf_link_hash_lookup
7108 (&(hash_table)->root, tmp_name, false, false, true);
7109
7110 if (myh == NULL
7111 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7112 "ARM", tmp_name, name) == -1)
7113 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7114
7115 free (tmp_name);
7116
7117 return myh;
7118 }
7119
7120 /* ARM->Thumb glue (static images):
7121
7122 .arm
7123 __func_from_arm:
7124 ldr r12, __func_addr
7125 bx r12
7126 __func_addr:
7127 .word func @ behave as if you saw a ARM_32 reloc.
7128
7129 (v5t static images)
7130 .arm
7131 __func_from_arm:
7132 ldr pc, __func_addr
7133 __func_addr:
7134 .word func @ behave as if you saw a ARM_32 reloc.
7135
7136 (relocatable images)
7137 .arm
7138 __func_from_arm:
7139 ldr r12, __func_offset
7140 add r12, r12, pc
7141 bx r12
7142 __func_offset:
7143 .word func - . */
7144
7145 #define ARM2THUMB_STATIC_GLUE_SIZE 12
7146 static const insn32 a2t1_ldr_insn = 0xe59fc000;
7147 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
7148 static const insn32 a2t3_func_addr_insn = 0x00000001;
7149
7150 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7151 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
7152 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
7153
7154 #define ARM2THUMB_PIC_GLUE_SIZE 16
7155 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
7156 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
7157 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
7158
7159 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
7160
7161 .thumb .thumb
7162 .align 2 .align 2
7163 __func_from_thumb: __func_from_thumb:
7164 bx pc push {r6, lr}
7165 nop ldr r6, __func_addr
7166 .arm mov lr, pc
7167 b func bx r6
7168 .arm
7169 ;; back_to_thumb
7170 ldmia r13! {r6, lr}
7171 bx lr
7172 __func_addr:
7173 .word func */
7174
7175 #define THUMB2ARM_GLUE_SIZE 8
7176 static const insn16 t2a1_bx_pc_insn = 0x4778;
7177 static const insn16 t2a2_noop_insn = 0x46c0;
7178 static const insn32 t2a3_b_insn = 0xea000000;
7179
7180 #define VFP11_ERRATUM_VENEER_SIZE 8
7181 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7182 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7183
7184 #define ARM_BX_VENEER_SIZE 12
7185 static const insn32 armbx1_tst_insn = 0xe3100001;
7186 static const insn32 armbx2_moveq_insn = 0x01a0f000;
7187 static const insn32 armbx3_bx_insn = 0xe12fff10;
7188
7189 #ifndef ELFARM_NABI_C_INCLUDED
7190 static void
7191 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
7192 {
7193 asection * s;
7194 bfd_byte * contents;
7195
7196 if (size == 0)
7197 {
7198 /* Do not include empty glue sections in the output. */
7199 if (abfd != NULL)
7200 {
7201 s = bfd_get_linker_section (abfd, name);
7202 if (s != NULL)
7203 s->flags |= SEC_EXCLUDE;
7204 }
7205 return;
7206 }
7207
7208 BFD_ASSERT (abfd != NULL);
7209
7210 s = bfd_get_linker_section (abfd, name);
7211 BFD_ASSERT (s != NULL);
7212
7213 contents = (bfd_byte *) bfd_zalloc (abfd, size);
7214
7215 BFD_ASSERT (s->size == size);
7216 s->contents = contents;
7217 }
7218
7219 bool
7220 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
7221 {
7222 struct elf32_arm_link_hash_table * globals;
7223
7224 globals = elf32_arm_hash_table (info);
7225 BFD_ASSERT (globals != NULL);
7226
7227 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7228 globals->arm_glue_size,
7229 ARM2THUMB_GLUE_SECTION_NAME);
7230
7231 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7232 globals->thumb_glue_size,
7233 THUMB2ARM_GLUE_SECTION_NAME);
7234
7235 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7236 globals->vfp11_erratum_glue_size,
7237 VFP11_ERRATUM_VENEER_SECTION_NAME);
7238
7239 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7240 globals->stm32l4xx_erratum_glue_size,
7241 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7242
7243 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7244 globals->bx_glue_size,
7245 ARM_BX_GLUE_SECTION_NAME);
7246
7247 return true;
7248 }
7249
7250 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7251 returns the symbol identifying the stub. */
7252
7253 static struct elf_link_hash_entry *
7254 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
7255 struct elf_link_hash_entry * h)
7256 {
7257 const char * name = h->root.root.string;
7258 asection * s;
7259 char * tmp_name;
7260 struct elf_link_hash_entry * myh;
7261 struct bfd_link_hash_entry * bh;
7262 struct elf32_arm_link_hash_table * globals;
7263 bfd_vma val;
7264 bfd_size_type size;
7265
7266 globals = elf32_arm_hash_table (link_info);
7267 BFD_ASSERT (globals != NULL);
7268 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7269
7270 s = bfd_get_linker_section
7271 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
7272
7273 BFD_ASSERT (s != NULL);
7274
7275 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7276 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7277 BFD_ASSERT (tmp_name);
7278
7279 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7280
7281 myh = elf_link_hash_lookup
7282 (&(globals)->root, tmp_name, false, false, true);
7283
7284 if (myh != NULL)
7285 {
7286 /* We've already seen this guy. */
7287 free (tmp_name);
7288 return myh;
7289 }
7290
7291 /* The only trick here is using hash_table->arm_glue_size as the value.
7292 Even though the section isn't allocated yet, this is where we will be
7293 putting it. The +1 on the value marks that the stub has not been
7294 output yet - not that it is a Thumb function. */
7295 bh = NULL;
7296 val = globals->arm_glue_size + 1;
7297 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7298 tmp_name, BSF_GLOBAL, s, val,
7299 NULL, true, false, &bh);
7300
7301 myh = (struct elf_link_hash_entry *) bh;
7302 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7303 myh->forced_local = 1;
7304
7305 free (tmp_name);
7306
7307 if (bfd_link_pic (link_info)
7308 || globals->root.is_relocatable_executable
7309 || globals->pic_veneer)
7310 size = ARM2THUMB_PIC_GLUE_SIZE;
7311 else if (globals->use_blx)
7312 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7313 else
7314 size = ARM2THUMB_STATIC_GLUE_SIZE;
7315
7316 s->size += size;
7317 globals->arm_glue_size += size;
7318
7319 return myh;
7320 }
7321
7322 /* Allocate space for ARMv4 BX veneers. */
7323
7324 static void
7325 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7326 {
7327 asection * s;
7328 struct elf32_arm_link_hash_table *globals;
7329 char *tmp_name;
7330 struct elf_link_hash_entry *myh;
7331 struct bfd_link_hash_entry *bh;
7332 bfd_vma val;
7333
7334 /* BX PC does not need a veneer. */
7335 if (reg == 15)
7336 return;
7337
7338 globals = elf32_arm_hash_table (link_info);
7339 BFD_ASSERT (globals != NULL);
7340 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7341
7342 /* Check if this veneer has already been allocated. */
7343 if (globals->bx_glue_offset[reg])
7344 return;
7345
7346 s = bfd_get_linker_section
7347 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7348
7349 BFD_ASSERT (s != NULL);
7350
7351 /* Add symbol for veneer. */
7352 tmp_name = (char *)
7353 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7354 BFD_ASSERT (tmp_name);
7355
7356 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7357
7358 myh = elf_link_hash_lookup
7359 (&(globals)->root, tmp_name, false, false, false);
7360
7361 BFD_ASSERT (myh == NULL);
7362
7363 bh = NULL;
7364 val = globals->bx_glue_size;
7365 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7366 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7367 NULL, true, false, &bh);
7368
7369 myh = (struct elf_link_hash_entry *) bh;
7370 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7371 myh->forced_local = 1;
7372
7373 s->size += ARM_BX_VENEER_SIZE;
7374 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7375 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7376 }
7377
7378
7379 /* Add an entry to the code/data map for section SEC. */
7380
7381 static void
7382 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7383 {
7384 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7385 unsigned int newidx;
7386
7387 if (sec_data->map == NULL)
7388 {
7389 sec_data->map = (elf32_arm_section_map *)
7390 bfd_malloc (sizeof (elf32_arm_section_map));
7391 sec_data->mapcount = 0;
7392 sec_data->mapsize = 1;
7393 }
7394
7395 newidx = sec_data->mapcount++;
7396
7397 if (sec_data->mapcount > sec_data->mapsize)
7398 {
7399 sec_data->mapsize *= 2;
7400 sec_data->map = (elf32_arm_section_map *)
7401 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7402 * sizeof (elf32_arm_section_map));
7403 }
7404
7405 if (sec_data->map)
7406 {
7407 sec_data->map[newidx].vma = vma;
7408 sec_data->map[newidx].type = type;
7409 }
7410 }
7411
7412
7413 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7414 veneers are handled for now. */
7415
7416 static bfd_vma
7417 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7418 elf32_vfp11_erratum_list *branch,
7419 bfd *branch_bfd,
7420 asection *branch_sec,
7421 unsigned int offset)
7422 {
7423 asection *s;
7424 struct elf32_arm_link_hash_table *hash_table;
7425 char *tmp_name;
7426 struct elf_link_hash_entry *myh;
7427 struct bfd_link_hash_entry *bh;
7428 bfd_vma val;
7429 struct _arm_elf_section_data *sec_data;
7430 elf32_vfp11_erratum_list *newerr;
7431
7432 hash_table = elf32_arm_hash_table (link_info);
7433 BFD_ASSERT (hash_table != NULL);
7434 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7435
7436 s = bfd_get_linker_section
7437 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7438
7439 sec_data = elf32_arm_section_data (s);
7440
7441 BFD_ASSERT (s != NULL);
7442
7443 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7444 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7445 BFD_ASSERT (tmp_name);
7446
7447 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7448 hash_table->num_vfp11_fixes);
7449
7450 myh = elf_link_hash_lookup
7451 (&(hash_table)->root, tmp_name, false, false, false);
7452
7453 BFD_ASSERT (myh == NULL);
7454
7455 bh = NULL;
7456 val = hash_table->vfp11_erratum_glue_size;
7457 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7458 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7459 NULL, true, false, &bh);
7460
7461 myh = (struct elf_link_hash_entry *) bh;
7462 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7463 myh->forced_local = 1;
7464
7465 /* Link veneer back to calling location. */
7466 sec_data->erratumcount += 1;
7467 newerr = (elf32_vfp11_erratum_list *)
7468 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7469
7470 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7471 newerr->vma = -1;
7472 newerr->u.v.branch = branch;
7473 newerr->u.v.id = hash_table->num_vfp11_fixes;
7474 branch->u.b.veneer = newerr;
7475
7476 newerr->next = sec_data->erratumlist;
7477 sec_data->erratumlist = newerr;
7478
7479 /* A symbol for the return from the veneer. */
7480 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7481 hash_table->num_vfp11_fixes);
7482
7483 myh = elf_link_hash_lookup
7484 (&(hash_table)->root, tmp_name, false, false, false);
7485
7486 if (myh != NULL)
7487 abort ();
7488
7489 bh = NULL;
7490 val = offset + 4;
7491 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7492 branch_sec, val, NULL, true, false, &bh);
7493
7494 myh = (struct elf_link_hash_entry *) bh;
7495 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7496 myh->forced_local = 1;
7497
7498 free (tmp_name);
7499
7500 /* Generate a mapping symbol for the veneer section, and explicitly add an
7501 entry for that symbol to the code/data map for the section. */
7502 if (hash_table->vfp11_erratum_glue_size == 0)
7503 {
7504 bh = NULL;
7505 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7506 ever requires this erratum fix. */
7507 _bfd_generic_link_add_one_symbol (link_info,
7508 hash_table->bfd_of_glue_owner, "$a",
7509 BSF_LOCAL, s, 0, NULL,
7510 true, false, &bh);
7511
7512 myh = (struct elf_link_hash_entry *) bh;
7513 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7514 myh->forced_local = 1;
7515
7516 /* The elf32_arm_init_maps function only cares about symbols from input
7517 BFDs. We must make a note of this generated mapping symbol
7518 ourselves so that code byteswapping works properly in
7519 elf32_arm_write_section. */
7520 elf32_arm_section_map_add (s, 'a', 0);
7521 }
7522
7523 s->size += VFP11_ERRATUM_VENEER_SIZE;
7524 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7525 hash_table->num_vfp11_fixes++;
7526
7527 /* The offset of the veneer. */
7528 return val;
7529 }
7530
7531 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7532 veneers need to be handled because used only in Cortex-M. */
7533
7534 static bfd_vma
7535 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7536 elf32_stm32l4xx_erratum_list *branch,
7537 bfd *branch_bfd,
7538 asection *branch_sec,
7539 unsigned int offset,
7540 bfd_size_type veneer_size)
7541 {
7542 asection *s;
7543 struct elf32_arm_link_hash_table *hash_table;
7544 char *tmp_name;
7545 struct elf_link_hash_entry *myh;
7546 struct bfd_link_hash_entry *bh;
7547 bfd_vma val;
7548 struct _arm_elf_section_data *sec_data;
7549 elf32_stm32l4xx_erratum_list *newerr;
7550
7551 hash_table = elf32_arm_hash_table (link_info);
7552 BFD_ASSERT (hash_table != NULL);
7553 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7554
7555 s = bfd_get_linker_section
7556 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7557
7558 BFD_ASSERT (s != NULL);
7559
7560 sec_data = elf32_arm_section_data (s);
7561
7562 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7563 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7564 BFD_ASSERT (tmp_name);
7565
7566 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7567 hash_table->num_stm32l4xx_fixes);
7568
7569 myh = elf_link_hash_lookup
7570 (&(hash_table)->root, tmp_name, false, false, false);
7571
7572 BFD_ASSERT (myh == NULL);
7573
7574 bh = NULL;
7575 val = hash_table->stm32l4xx_erratum_glue_size;
7576 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7577 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7578 NULL, true, false, &bh);
7579
7580 myh = (struct elf_link_hash_entry *) bh;
7581 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7582 myh->forced_local = 1;
7583
7584 /* Link veneer back to calling location. */
7585 sec_data->stm32l4xx_erratumcount += 1;
7586 newerr = (elf32_stm32l4xx_erratum_list *)
7587 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7588
7589 newerr->type = STM32L4XX_ERRATUM_VENEER;
7590 newerr->vma = -1;
7591 newerr->u.v.branch = branch;
7592 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7593 branch->u.b.veneer = newerr;
7594
7595 newerr->next = sec_data->stm32l4xx_erratumlist;
7596 sec_data->stm32l4xx_erratumlist = newerr;
7597
7598 /* A symbol for the return from the veneer. */
7599 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7600 hash_table->num_stm32l4xx_fixes);
7601
7602 myh = elf_link_hash_lookup
7603 (&(hash_table)->root, tmp_name, false, false, false);
7604
7605 if (myh != NULL)
7606 abort ();
7607
7608 bh = NULL;
7609 val = offset + 4;
7610 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7611 branch_sec, val, NULL, true, false, &bh);
7612
7613 myh = (struct elf_link_hash_entry *) bh;
7614 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7615 myh->forced_local = 1;
7616
7617 free (tmp_name);
7618
7619 /* Generate a mapping symbol for the veneer section, and explicitly add an
7620 entry for that symbol to the code/data map for the section. */
7621 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7622 {
7623 bh = NULL;
7624 /* Creates a THUMB symbol since there is no other choice. */
7625 _bfd_generic_link_add_one_symbol (link_info,
7626 hash_table->bfd_of_glue_owner, "$t",
7627 BSF_LOCAL, s, 0, NULL,
7628 true, false, &bh);
7629
7630 myh = (struct elf_link_hash_entry *) bh;
7631 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7632 myh->forced_local = 1;
7633
7634 /* The elf32_arm_init_maps function only cares about symbols from input
7635 BFDs. We must make a note of this generated mapping symbol
7636 ourselves so that code byteswapping works properly in
7637 elf32_arm_write_section. */
7638 elf32_arm_section_map_add (s, 't', 0);
7639 }
7640
7641 s->size += veneer_size;
7642 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7643 hash_table->num_stm32l4xx_fixes++;
7644
7645 /* The offset of the veneer. */
7646 return val;
7647 }
7648
7649 #define ARM_GLUE_SECTION_FLAGS \
7650 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7651 | SEC_READONLY | SEC_LINKER_CREATED)
7652
7653 /* Create a fake section for use by the ARM backend of the linker. */
7654
7655 static bool
7656 arm_make_glue_section (bfd * abfd, const char * name)
7657 {
7658 asection * sec;
7659
7660 sec = bfd_get_linker_section (abfd, name);
7661 if (sec != NULL)
7662 /* Already made. */
7663 return true;
7664
7665 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7666
7667 if (sec == NULL
7668 || !bfd_set_section_alignment (sec, 2))
7669 return false;
7670
7671 /* Set the gc mark to prevent the section from being removed by garbage
7672 collection, despite the fact that no relocs refer to this section. */
7673 sec->gc_mark = 1;
7674
7675 return true;
7676 }
7677
7678 /* Set size of .plt entries. This function is called from the
7679 linker scripts in ld/emultempl/{armelf}.em. */
7680
7681 void
7682 bfd_elf32_arm_use_long_plt (void)
7683 {
7684 elf32_arm_use_long_plt_entry = true;
7685 }
7686
7687 /* Add the glue sections to ABFD. This function is called from the
7688 linker scripts in ld/emultempl/{armelf}.em. */
7689
7690 bool
7691 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7692 struct bfd_link_info *info)
7693 {
7694 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7695 bool dostm32l4xx = globals
7696 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7697 bool addglue;
7698
7699 /* If we are only performing a partial
7700 link do not bother adding the glue. */
7701 if (bfd_link_relocatable (info))
7702 return true;
7703
7704 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7705 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7706 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7707 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7708
7709 if (!dostm32l4xx)
7710 return addglue;
7711
7712 return addglue
7713 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7714 }
7715
7716 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7717 ensures they are not marked for deletion by
7718 strip_excluded_output_sections () when veneers are going to be created
7719 later. Not doing so would trigger assert on empty section size in
7720 lang_size_sections_1 (). */
7721
7722 void
7723 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7724 {
7725 enum elf32_arm_stub_type stub_type;
7726
7727 /* If we are only performing a partial
7728 link do not bother adding the glue. */
7729 if (bfd_link_relocatable (info))
7730 return;
7731
7732 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7733 {
7734 asection *out_sec;
7735 const char *out_sec_name;
7736
7737 if (!arm_dedicated_stub_output_section_required (stub_type))
7738 continue;
7739
7740 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7741 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7742 if (out_sec != NULL)
7743 out_sec->flags |= SEC_KEEP;
7744 }
7745 }
7746
7747 /* Select a BFD to be used to hold the sections used by the glue code.
7748 This function is called from the linker scripts in ld/emultempl/
7749 {armelf/pe}.em. */
7750
7751 bool
7752 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7753 {
7754 struct elf32_arm_link_hash_table *globals;
7755
7756 /* If we are only performing a partial link
7757 do not bother getting a bfd to hold the glue. */
7758 if (bfd_link_relocatable (info))
7759 return true;
7760
7761 /* Make sure we don't attach the glue sections to a dynamic object. */
7762 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7763
7764 globals = elf32_arm_hash_table (info);
7765 BFD_ASSERT (globals != NULL);
7766
7767 if (globals->bfd_of_glue_owner != NULL)
7768 return true;
7769
7770 /* Save the bfd for later use. */
7771 globals->bfd_of_glue_owner = abfd;
7772
7773 return true;
7774 }
7775
7776 static void
7777 check_use_blx (struct elf32_arm_link_hash_table *globals)
7778 {
7779 int cpu_arch;
7780
7781 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7782 Tag_CPU_arch);
7783
7784 if (globals->fix_arm1176)
7785 {
7786 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7787 globals->use_blx = 1;
7788 }
7789 else
7790 {
7791 if (cpu_arch > TAG_CPU_ARCH_V4T)
7792 globals->use_blx = 1;
7793 }
7794 }
7795
7796 bool
7797 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7798 struct bfd_link_info *link_info)
7799 {
7800 Elf_Internal_Shdr *symtab_hdr;
7801 Elf_Internal_Rela *internal_relocs = NULL;
7802 Elf_Internal_Rela *irel, *irelend;
7803 bfd_byte *contents = NULL;
7804
7805 asection *sec;
7806 struct elf32_arm_link_hash_table *globals;
7807
7808 /* If we are only performing a partial link do not bother
7809 to construct any glue. */
7810 if (bfd_link_relocatable (link_info))
7811 return true;
7812
7813 /* Here we have a bfd that is to be included on the link. We have a
7814 hook to do reloc rummaging, before section sizes are nailed down. */
7815 globals = elf32_arm_hash_table (link_info);
7816 BFD_ASSERT (globals != NULL);
7817
7818 check_use_blx (globals);
7819
7820 if (globals->byteswap_code && !bfd_big_endian (abfd))
7821 {
7822 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7823 abfd);
7824 return false;
7825 }
7826
7827 /* PR 5398: If we have not decided to include any loadable sections in
7828 the output then we will not have a glue owner bfd. This is OK, it
7829 just means that there is nothing else for us to do here. */
7830 if (globals->bfd_of_glue_owner == NULL)
7831 return true;
7832
7833 /* Rummage around all the relocs and map the glue vectors. */
7834 sec = abfd->sections;
7835
7836 if (sec == NULL)
7837 return true;
7838
7839 for (; sec != NULL; sec = sec->next)
7840 {
7841 if (sec->reloc_count == 0)
7842 continue;
7843
7844 if ((sec->flags & SEC_EXCLUDE) != 0)
7845 continue;
7846
7847 symtab_hdr = & elf_symtab_hdr (abfd);
7848
7849 /* Load the relocs. */
7850 internal_relocs
7851 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, false);
7852
7853 if (internal_relocs == NULL)
7854 goto error_return;
7855
7856 irelend = internal_relocs + sec->reloc_count;
7857 for (irel = internal_relocs; irel < irelend; irel++)
7858 {
7859 long r_type;
7860 unsigned long r_index;
7861
7862 struct elf_link_hash_entry *h;
7863
7864 r_type = ELF32_R_TYPE (irel->r_info);
7865 r_index = ELF32_R_SYM (irel->r_info);
7866
7867 /* These are the only relocation types we care about. */
7868 if ( r_type != R_ARM_PC24
7869 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7870 continue;
7871
7872 /* Get the section contents if we haven't done so already. */
7873 if (contents == NULL)
7874 {
7875 /* Get cached copy if it exists. */
7876 if (elf_section_data (sec)->this_hdr.contents != NULL)
7877 contents = elf_section_data (sec)->this_hdr.contents;
7878 else
7879 {
7880 /* Go get them off disk. */
7881 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7882 goto error_return;
7883 }
7884 }
7885
7886 if (r_type == R_ARM_V4BX)
7887 {
7888 int reg;
7889
7890 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7891 record_arm_bx_glue (link_info, reg);
7892 continue;
7893 }
7894
7895 /* If the relocation is not against a symbol it cannot concern us. */
7896 h = NULL;
7897
7898 /* We don't care about local symbols. */
7899 if (r_index < symtab_hdr->sh_info)
7900 continue;
7901
7902 /* This is an external symbol. */
7903 r_index -= symtab_hdr->sh_info;
7904 h = (struct elf_link_hash_entry *)
7905 elf_sym_hashes (abfd)[r_index];
7906
7907 /* If the relocation is against a static symbol it must be within
7908 the current section and so cannot be a cross ARM/Thumb relocation. */
7909 if (h == NULL)
7910 continue;
7911
7912 /* If the call will go through a PLT entry then we do not need
7913 glue. */
7914 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7915 continue;
7916
7917 switch (r_type)
7918 {
7919 case R_ARM_PC24:
7920 /* This one is a call from arm code. We need to look up
7921 the target of the call. If it is a thumb target, we
7922 insert glue. */
7923 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7924 == ST_BRANCH_TO_THUMB)
7925 record_arm_to_thumb_glue (link_info, h);
7926 break;
7927
7928 default:
7929 abort ();
7930 }
7931 }
7932
7933 if (elf_section_data (sec)->this_hdr.contents != contents)
7934 free (contents);
7935 contents = NULL;
7936
7937 if (elf_section_data (sec)->relocs != internal_relocs)
7938 free (internal_relocs);
7939 internal_relocs = NULL;
7940 }
7941
7942 return true;
7943
7944 error_return:
7945 if (elf_section_data (sec)->this_hdr.contents != contents)
7946 free (contents);
7947 if (elf_section_data (sec)->relocs != internal_relocs)
7948 free (internal_relocs);
7949
7950 return false;
7951 }
7952 #endif
7953
7954
7955 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7956
7957 void
7958 bfd_elf32_arm_init_maps (bfd *abfd)
7959 {
7960 Elf_Internal_Sym *isymbuf;
7961 Elf_Internal_Shdr *hdr;
7962 unsigned int i, localsyms;
7963
7964 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7965 if (! is_arm_elf (abfd))
7966 return;
7967
7968 if ((abfd->flags & DYNAMIC) != 0)
7969 return;
7970
7971 hdr = & elf_symtab_hdr (abfd);
7972 localsyms = hdr->sh_info;
7973
7974 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7975 should contain the number of local symbols, which should come before any
7976 global symbols. Mapping symbols are always local. */
7977 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7978 NULL);
7979
7980 /* No internal symbols read? Skip this BFD. */
7981 if (isymbuf == NULL)
7982 return;
7983
7984 for (i = 0; i < localsyms; i++)
7985 {
7986 Elf_Internal_Sym *isym = &isymbuf[i];
7987 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7988 const char *name;
7989
7990 if (sec != NULL
7991 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
7992 {
7993 name = bfd_elf_string_from_elf_section (abfd,
7994 hdr->sh_link, isym->st_name);
7995
7996 if (bfd_is_arm_special_symbol_name (name,
7997 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
7998 elf32_arm_section_map_add (sec, name[1], isym->st_value);
7999 }
8000 }
8001 }
8002
8003
8004 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
8005 say what they wanted. */
8006
8007 void
8008 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
8009 {
8010 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8011 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8012
8013 if (globals == NULL)
8014 return;
8015
8016 if (globals->fix_cortex_a8 == -1)
8017 {
8018 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
8019 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
8020 && (out_attr[Tag_CPU_arch_profile].i == 'A'
8021 || out_attr[Tag_CPU_arch_profile].i == 0))
8022 globals->fix_cortex_a8 = 1;
8023 else
8024 globals->fix_cortex_a8 = 0;
8025 }
8026 }
8027
8028
8029 void
8030 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
8031 {
8032 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8033 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8034
8035 if (globals == NULL)
8036 return;
8037 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
8038 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
8039 {
8040 switch (globals->vfp11_fix)
8041 {
8042 case BFD_ARM_VFP11_FIX_DEFAULT:
8043 case BFD_ARM_VFP11_FIX_NONE:
8044 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8045 break;
8046
8047 default:
8048 /* Give a warning, but do as the user requests anyway. */
8049 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
8050 "workaround is not necessary for target architecture"), obfd);
8051 }
8052 }
8053 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
8054 /* For earlier architectures, we might need the workaround, but do not
8055 enable it by default. If users is running with broken hardware, they
8056 must enable the erratum fix explicitly. */
8057 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8058 }
8059
8060 void
8061 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
8062 {
8063 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8064 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8065
8066 if (globals == NULL)
8067 return;
8068
8069 /* We assume only Cortex-M4 may require the fix. */
8070 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
8071 || out_attr[Tag_CPU_arch_profile].i != 'M')
8072 {
8073 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
8074 /* Give a warning, but do as the user requests anyway. */
8075 _bfd_error_handler
8076 (_("%pB: warning: selected STM32L4XX erratum "
8077 "workaround is not necessary for target architecture"), obfd);
8078 }
8079 }
8080
8081 enum bfd_arm_vfp11_pipe
8082 {
8083 VFP11_FMAC,
8084 VFP11_LS,
8085 VFP11_DS,
8086 VFP11_BAD
8087 };
8088
8089 /* Return a VFP register number. This is encoded as RX:X for single-precision
8090 registers, or X:RX for double-precision registers, where RX is the group of
8091 four bits in the instruction encoding and X is the single extension bit.
8092 RX and X fields are specified using their lowest (starting) bit. The return
8093 value is:
8094
8095 0...31: single-precision registers s0...s31
8096 32...63: double-precision registers d0...d31.
8097
8098 Although X should be zero for VFP11 (encoding d0...d15 only), we might
8099 encounter VFP3 instructions, so we allow the full range for DP registers. */
8100
8101 static unsigned int
8102 bfd_arm_vfp11_regno (unsigned int insn, bool is_double, unsigned int rx,
8103 unsigned int x)
8104 {
8105 if (is_double)
8106 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
8107 else
8108 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
8109 }
8110
8111 /* Set bits in *WMASK according to a register number REG as encoded by
8112 bfd_arm_vfp11_regno(). Ignore d16-d31. */
8113
8114 static void
8115 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
8116 {
8117 if (reg < 32)
8118 *wmask |= 1 << reg;
8119 else if (reg < 48)
8120 *wmask |= 3 << ((reg - 32) * 2);
8121 }
8122
8123 /* Return TRUE if WMASK overwrites anything in REGS. */
8124
8125 static bool
8126 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
8127 {
8128 int i;
8129
8130 for (i = 0; i < numregs; i++)
8131 {
8132 unsigned int reg = regs[i];
8133
8134 if (reg < 32 && (wmask & (1 << reg)) != 0)
8135 return true;
8136
8137 reg -= 32;
8138
8139 if (reg >= 16)
8140 continue;
8141
8142 if ((wmask & (3 << (reg * 2))) != 0)
8143 return true;
8144 }
8145
8146 return false;
8147 }
8148
8149 /* In this function, we're interested in two things: finding input registers
8150 for VFP data-processing instructions, and finding the set of registers which
8151 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
8152 hold the written set, so FLDM etc. are easy to deal with (we're only
8153 interested in 32 SP registers or 16 dp registers, due to the VFP version
8154 implemented by the chip in question). DP registers are marked by setting
8155 both SP registers in the write mask). */
8156
8157 static enum bfd_arm_vfp11_pipe
8158 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
8159 int *numregs)
8160 {
8161 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
8162 bool is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
8163
8164 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
8165 {
8166 unsigned int pqrs;
8167 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8168 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8169
8170 pqrs = ((insn & 0x00800000) >> 20)
8171 | ((insn & 0x00300000) >> 19)
8172 | ((insn & 0x00000040) >> 6);
8173
8174 switch (pqrs)
8175 {
8176 case 0: /* fmac[sd]. */
8177 case 1: /* fnmac[sd]. */
8178 case 2: /* fmsc[sd]. */
8179 case 3: /* fnmsc[sd]. */
8180 vpipe = VFP11_FMAC;
8181 bfd_arm_vfp11_write_mask (destmask, fd);
8182 regs[0] = fd;
8183 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8184 regs[2] = fm;
8185 *numregs = 3;
8186 break;
8187
8188 case 4: /* fmul[sd]. */
8189 case 5: /* fnmul[sd]. */
8190 case 6: /* fadd[sd]. */
8191 case 7: /* fsub[sd]. */
8192 vpipe = VFP11_FMAC;
8193 goto vfp_binop;
8194
8195 case 8: /* fdiv[sd]. */
8196 vpipe = VFP11_DS;
8197 vfp_binop:
8198 bfd_arm_vfp11_write_mask (destmask, fd);
8199 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8200 regs[1] = fm;
8201 *numregs = 2;
8202 break;
8203
8204 case 15: /* extended opcode. */
8205 {
8206 unsigned int extn = ((insn >> 15) & 0x1e)
8207 | ((insn >> 7) & 1);
8208
8209 switch (extn)
8210 {
8211 case 0: /* fcpy[sd]. */
8212 case 1: /* fabs[sd]. */
8213 case 2: /* fneg[sd]. */
8214 case 8: /* fcmp[sd]. */
8215 case 9: /* fcmpe[sd]. */
8216 case 10: /* fcmpz[sd]. */
8217 case 11: /* fcmpez[sd]. */
8218 case 16: /* fuito[sd]. */
8219 case 17: /* fsito[sd]. */
8220 case 24: /* ftoui[sd]. */
8221 case 25: /* ftouiz[sd]. */
8222 case 26: /* ftosi[sd]. */
8223 case 27: /* ftosiz[sd]. */
8224 /* These instructions will not bounce due to underflow. */
8225 *numregs = 0;
8226 vpipe = VFP11_FMAC;
8227 break;
8228
8229 case 3: /* fsqrt[sd]. */
8230 /* fsqrt cannot underflow, but it can (perhaps) overwrite
8231 registers to cause the erratum in previous instructions. */
8232 bfd_arm_vfp11_write_mask (destmask, fd);
8233 vpipe = VFP11_DS;
8234 break;
8235
8236 case 15: /* fcvt{ds,sd}. */
8237 {
8238 int rnum = 0;
8239
8240 bfd_arm_vfp11_write_mask (destmask, fd);
8241
8242 /* Only FCVTSD can underflow. */
8243 if ((insn & 0x100) != 0)
8244 regs[rnum++] = fm;
8245
8246 *numregs = rnum;
8247
8248 vpipe = VFP11_FMAC;
8249 }
8250 break;
8251
8252 default:
8253 return VFP11_BAD;
8254 }
8255 }
8256 break;
8257
8258 default:
8259 return VFP11_BAD;
8260 }
8261 }
8262 /* Two-register transfer. */
8263 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
8264 {
8265 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8266
8267 if ((insn & 0x100000) == 0)
8268 {
8269 if (is_double)
8270 bfd_arm_vfp11_write_mask (destmask, fm);
8271 else
8272 {
8273 bfd_arm_vfp11_write_mask (destmask, fm);
8274 bfd_arm_vfp11_write_mask (destmask, fm + 1);
8275 }
8276 }
8277
8278 vpipe = VFP11_LS;
8279 }
8280 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
8281 {
8282 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8283 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
8284
8285 switch (puw)
8286 {
8287 case 0: /* Two-reg transfer. We should catch these above. */
8288 abort ();
8289
8290 case 2: /* fldm[sdx]. */
8291 case 3:
8292 case 5:
8293 {
8294 unsigned int i, offset = insn & 0xff;
8295
8296 if (is_double)
8297 offset >>= 1;
8298
8299 for (i = fd; i < fd + offset; i++)
8300 bfd_arm_vfp11_write_mask (destmask, i);
8301 }
8302 break;
8303
8304 case 4: /* fld[sd]. */
8305 case 6:
8306 bfd_arm_vfp11_write_mask (destmask, fd);
8307 break;
8308
8309 default:
8310 return VFP11_BAD;
8311 }
8312
8313 vpipe = VFP11_LS;
8314 }
8315 /* Single-register transfer. Note L==0. */
8316 else if ((insn & 0x0f100e10) == 0x0e000a10)
8317 {
8318 unsigned int opcode = (insn >> 21) & 7;
8319 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8320
8321 switch (opcode)
8322 {
8323 case 0: /* fmsr/fmdlr. */
8324 case 1: /* fmdhr. */
8325 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8326 destination register. I don't know if this is exactly right,
8327 but it is the conservative choice. */
8328 bfd_arm_vfp11_write_mask (destmask, fn);
8329 break;
8330
8331 case 7: /* fmxr. */
8332 break;
8333 }
8334
8335 vpipe = VFP11_LS;
8336 }
8337
8338 return vpipe;
8339 }
8340
8341
8342 static int elf32_arm_compare_mapping (const void * a, const void * b);
8343
8344
8345 /* Look for potentially-troublesome code sequences which might trigger the
8346 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8347 (available from ARM) for details of the erratum. A short version is
8348 described in ld.texinfo. */
8349
8350 bool
8351 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8352 {
8353 asection *sec;
8354 bfd_byte *contents = NULL;
8355 int state = 0;
8356 int regs[3], numregs = 0;
8357 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8358 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8359
8360 if (globals == NULL)
8361 return false;
8362
8363 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8364 The states transition as follows:
8365
8366 0 -> 1 (vector) or 0 -> 2 (scalar)
8367 A VFP FMAC-pipeline instruction has been seen. Fill
8368 regs[0]..regs[numregs-1] with its input operands. Remember this
8369 instruction in 'first_fmac'.
8370
8371 1 -> 2
8372 Any instruction, except for a VFP instruction which overwrites
8373 regs[*].
8374
8375 1 -> 3 [ -> 0 ] or
8376 2 -> 3 [ -> 0 ]
8377 A VFP instruction has been seen which overwrites any of regs[*].
8378 We must make a veneer! Reset state to 0 before examining next
8379 instruction.
8380
8381 2 -> 0
8382 If we fail to match anything in state 2, reset to state 0 and reset
8383 the instruction pointer to the instruction after 'first_fmac'.
8384
8385 If the VFP11 vector mode is in use, there must be at least two unrelated
8386 instructions between anti-dependent VFP11 instructions to properly avoid
8387 triggering the erratum, hence the use of the extra state 1. */
8388
8389 /* If we are only performing a partial link do not bother
8390 to construct any glue. */
8391 if (bfd_link_relocatable (link_info))
8392 return true;
8393
8394 /* Skip if this bfd does not correspond to an ELF image. */
8395 if (! is_arm_elf (abfd))
8396 return true;
8397
8398 /* We should have chosen a fix type by the time we get here. */
8399 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8400
8401 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8402 return true;
8403
8404 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8405 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8406 return true;
8407
8408 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8409 {
8410 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8411 struct _arm_elf_section_data *sec_data;
8412
8413 /* If we don't have executable progbits, we're not interested in this
8414 section. Also skip if section is to be excluded. */
8415 if (elf_section_type (sec) != SHT_PROGBITS
8416 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8417 || (sec->flags & SEC_EXCLUDE) != 0
8418 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8419 || sec->output_section == bfd_abs_section_ptr
8420 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8421 continue;
8422
8423 sec_data = elf32_arm_section_data (sec);
8424
8425 if (sec_data->mapcount == 0)
8426 continue;
8427
8428 if (elf_section_data (sec)->this_hdr.contents != NULL)
8429 contents = elf_section_data (sec)->this_hdr.contents;
8430 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8431 goto error_return;
8432
8433 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8434 elf32_arm_compare_mapping);
8435
8436 for (span = 0; span < sec_data->mapcount; span++)
8437 {
8438 unsigned int span_start = sec_data->map[span].vma;
8439 unsigned int span_end = (span == sec_data->mapcount - 1)
8440 ? sec->size : sec_data->map[span + 1].vma;
8441 char span_type = sec_data->map[span].type;
8442
8443 /* FIXME: Only ARM mode is supported at present. We may need to
8444 support Thumb-2 mode also at some point. */
8445 if (span_type != 'a')
8446 continue;
8447
8448 for (i = span_start; i < span_end;)
8449 {
8450 unsigned int next_i = i + 4;
8451 unsigned int insn = bfd_big_endian (abfd)
8452 ? (((unsigned) contents[i] << 24)
8453 | (contents[i + 1] << 16)
8454 | (contents[i + 2] << 8)
8455 | contents[i + 3])
8456 : (((unsigned) contents[i + 3] << 24)
8457 | (contents[i + 2] << 16)
8458 | (contents[i + 1] << 8)
8459 | contents[i]);
8460 unsigned int writemask = 0;
8461 enum bfd_arm_vfp11_pipe vpipe;
8462
8463 switch (state)
8464 {
8465 case 0:
8466 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8467 &numregs);
8468 /* I'm assuming the VFP11 erratum can trigger with denorm
8469 operands on either the FMAC or the DS pipeline. This might
8470 lead to slightly overenthusiastic veneer insertion. */
8471 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8472 {
8473 state = use_vector ? 1 : 2;
8474 first_fmac = i;
8475 veneer_of_insn = insn;
8476 }
8477 break;
8478
8479 case 1:
8480 {
8481 int other_regs[3], other_numregs;
8482 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8483 other_regs,
8484 &other_numregs);
8485 if (vpipe != VFP11_BAD
8486 && bfd_arm_vfp11_antidependency (writemask, regs,
8487 numregs))
8488 state = 3;
8489 else
8490 state = 2;
8491 }
8492 break;
8493
8494 case 2:
8495 {
8496 int other_regs[3], other_numregs;
8497 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8498 other_regs,
8499 &other_numregs);
8500 if (vpipe != VFP11_BAD
8501 && bfd_arm_vfp11_antidependency (writemask, regs,
8502 numregs))
8503 state = 3;
8504 else
8505 {
8506 state = 0;
8507 next_i = first_fmac + 4;
8508 }
8509 }
8510 break;
8511
8512 case 3:
8513 abort (); /* Should be unreachable. */
8514 }
8515
8516 if (state == 3)
8517 {
8518 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8519 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8520
8521 elf32_arm_section_data (sec)->erratumcount += 1;
8522
8523 newerr->u.b.vfp_insn = veneer_of_insn;
8524
8525 switch (span_type)
8526 {
8527 case 'a':
8528 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8529 break;
8530
8531 default:
8532 abort ();
8533 }
8534
8535 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8536 first_fmac);
8537
8538 newerr->vma = -1;
8539
8540 newerr->next = sec_data->erratumlist;
8541 sec_data->erratumlist = newerr;
8542
8543 state = 0;
8544 }
8545
8546 i = next_i;
8547 }
8548 }
8549
8550 if (elf_section_data (sec)->this_hdr.contents != contents)
8551 free (contents);
8552 contents = NULL;
8553 }
8554
8555 return true;
8556
8557 error_return:
8558 if (elf_section_data (sec)->this_hdr.contents != contents)
8559 free (contents);
8560
8561 return false;
8562 }
8563
8564 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8565 after sections have been laid out, using specially-named symbols. */
8566
8567 void
8568 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8569 struct bfd_link_info *link_info)
8570 {
8571 asection *sec;
8572 struct elf32_arm_link_hash_table *globals;
8573 char *tmp_name;
8574
8575 if (bfd_link_relocatable (link_info))
8576 return;
8577
8578 /* Skip if this bfd does not correspond to an ELF image. */
8579 if (! is_arm_elf (abfd))
8580 return;
8581
8582 globals = elf32_arm_hash_table (link_info);
8583 if (globals == NULL)
8584 return;
8585
8586 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8587 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8588 BFD_ASSERT (tmp_name);
8589
8590 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8591 {
8592 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8593 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8594
8595 for (; errnode != NULL; errnode = errnode->next)
8596 {
8597 struct elf_link_hash_entry *myh;
8598 bfd_vma vma;
8599
8600 switch (errnode->type)
8601 {
8602 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8603 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8604 /* Find veneer symbol. */
8605 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8606 errnode->u.b.veneer->u.v.id);
8607
8608 myh = elf_link_hash_lookup
8609 (&(globals)->root, tmp_name, false, false, true);
8610
8611 if (myh == NULL)
8612 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8613 abfd, "VFP11", tmp_name);
8614
8615 vma = myh->root.u.def.section->output_section->vma
8616 + myh->root.u.def.section->output_offset
8617 + myh->root.u.def.value;
8618
8619 errnode->u.b.veneer->vma = vma;
8620 break;
8621
8622 case VFP11_ERRATUM_ARM_VENEER:
8623 case VFP11_ERRATUM_THUMB_VENEER:
8624 /* Find return location. */
8625 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8626 errnode->u.v.id);
8627
8628 myh = elf_link_hash_lookup
8629 (&(globals)->root, tmp_name, false, false, true);
8630
8631 if (myh == NULL)
8632 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8633 abfd, "VFP11", tmp_name);
8634
8635 vma = myh->root.u.def.section->output_section->vma
8636 + myh->root.u.def.section->output_offset
8637 + myh->root.u.def.value;
8638
8639 errnode->u.v.branch->vma = vma;
8640 break;
8641
8642 default:
8643 abort ();
8644 }
8645 }
8646 }
8647
8648 free (tmp_name);
8649 }
8650
8651 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8652 return locations after sections have been laid out, using
8653 specially-named symbols. */
8654
8655 void
8656 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8657 struct bfd_link_info *link_info)
8658 {
8659 asection *sec;
8660 struct elf32_arm_link_hash_table *globals;
8661 char *tmp_name;
8662
8663 if (bfd_link_relocatable (link_info))
8664 return;
8665
8666 /* Skip if this bfd does not correspond to an ELF image. */
8667 if (! is_arm_elf (abfd))
8668 return;
8669
8670 globals = elf32_arm_hash_table (link_info);
8671 if (globals == NULL)
8672 return;
8673
8674 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8675 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8676 BFD_ASSERT (tmp_name);
8677
8678 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8679 {
8680 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8681 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8682
8683 for (; errnode != NULL; errnode = errnode->next)
8684 {
8685 struct elf_link_hash_entry *myh;
8686 bfd_vma vma;
8687
8688 switch (errnode->type)
8689 {
8690 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8691 /* Find veneer symbol. */
8692 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8693 errnode->u.b.veneer->u.v.id);
8694
8695 myh = elf_link_hash_lookup
8696 (&(globals)->root, tmp_name, false, false, true);
8697
8698 if (myh == NULL)
8699 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8700 abfd, "STM32L4XX", tmp_name);
8701
8702 vma = myh->root.u.def.section->output_section->vma
8703 + myh->root.u.def.section->output_offset
8704 + myh->root.u.def.value;
8705
8706 errnode->u.b.veneer->vma = vma;
8707 break;
8708
8709 case STM32L4XX_ERRATUM_VENEER:
8710 /* Find return location. */
8711 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8712 errnode->u.v.id);
8713
8714 myh = elf_link_hash_lookup
8715 (&(globals)->root, tmp_name, false, false, true);
8716
8717 if (myh == NULL)
8718 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8719 abfd, "STM32L4XX", tmp_name);
8720
8721 vma = myh->root.u.def.section->output_section->vma
8722 + myh->root.u.def.section->output_offset
8723 + myh->root.u.def.value;
8724
8725 errnode->u.v.branch->vma = vma;
8726 break;
8727
8728 default:
8729 abort ();
8730 }
8731 }
8732 }
8733
8734 free (tmp_name);
8735 }
8736
8737 static inline bool
8738 is_thumb2_ldmia (const insn32 insn)
8739 {
8740 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8741 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8742 return (insn & 0xffd02000) == 0xe8900000;
8743 }
8744
8745 static inline bool
8746 is_thumb2_ldmdb (const insn32 insn)
8747 {
8748 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8749 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8750 return (insn & 0xffd02000) == 0xe9100000;
8751 }
8752
8753 static inline bool
8754 is_thumb2_vldm (const insn32 insn)
8755 {
8756 /* A6.5 Extension register load or store instruction
8757 A7.7.229
8758 We look for SP 32-bit and DP 64-bit registers.
8759 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8760 <list> is consecutive 64-bit registers
8761 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8762 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8763 <list> is consecutive 32-bit registers
8764 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8765 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8766 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8767 return
8768 (((insn & 0xfe100f00) == 0xec100b00) ||
8769 ((insn & 0xfe100f00) == 0xec100a00))
8770 && /* (IA without !). */
8771 (((((insn << 7) >> 28) & 0xd) == 0x4)
8772 /* (IA with !), includes VPOP (when reg number is SP). */
8773 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8774 /* (DB with !). */
8775 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8776 }
8777
8778 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8779 VLDM opcode and:
8780 - computes the number and the mode of memory accesses
8781 - decides if the replacement should be done:
8782 . replaces only if > 8-word accesses
8783 . or (testing purposes only) replaces all accesses. */
8784
8785 static bool
8786 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8787 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8788 {
8789 int nb_words = 0;
8790
8791 /* The field encoding the register list is the same for both LDMIA
8792 and LDMDB encodings. */
8793 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8794 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8795 else if (is_thumb2_vldm (insn))
8796 nb_words = (insn & 0xff);
8797
8798 /* DEFAULT mode accounts for the real bug condition situation,
8799 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8800 return (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT
8801 ? nb_words > 8
8802 : stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL);
8803 }
8804
8805 /* Look for potentially-troublesome code sequences which might trigger
8806 the STM STM32L4XX erratum. */
8807
8808 bool
8809 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8810 struct bfd_link_info *link_info)
8811 {
8812 asection *sec;
8813 bfd_byte *contents = NULL;
8814 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8815
8816 if (globals == NULL)
8817 return false;
8818
8819 /* If we are only performing a partial link do not bother
8820 to construct any glue. */
8821 if (bfd_link_relocatable (link_info))
8822 return true;
8823
8824 /* Skip if this bfd does not correspond to an ELF image. */
8825 if (! is_arm_elf (abfd))
8826 return true;
8827
8828 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8829 return true;
8830
8831 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8832 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8833 return true;
8834
8835 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8836 {
8837 unsigned int i, span;
8838 struct _arm_elf_section_data *sec_data;
8839
8840 /* If we don't have executable progbits, we're not interested in this
8841 section. Also skip if section is to be excluded. */
8842 if (elf_section_type (sec) != SHT_PROGBITS
8843 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8844 || (sec->flags & SEC_EXCLUDE) != 0
8845 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8846 || sec->output_section == bfd_abs_section_ptr
8847 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8848 continue;
8849
8850 sec_data = elf32_arm_section_data (sec);
8851
8852 if (sec_data->mapcount == 0)
8853 continue;
8854
8855 if (elf_section_data (sec)->this_hdr.contents != NULL)
8856 contents = elf_section_data (sec)->this_hdr.contents;
8857 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8858 goto error_return;
8859
8860 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8861 elf32_arm_compare_mapping);
8862
8863 for (span = 0; span < sec_data->mapcount; span++)
8864 {
8865 unsigned int span_start = sec_data->map[span].vma;
8866 unsigned int span_end = (span == sec_data->mapcount - 1)
8867 ? sec->size : sec_data->map[span + 1].vma;
8868 char span_type = sec_data->map[span].type;
8869 int itblock_current_pos = 0;
8870
8871 /* Only Thumb2 mode need be supported with this CM4 specific
8872 code, we should not encounter any arm mode eg span_type
8873 != 'a'. */
8874 if (span_type != 't')
8875 continue;
8876
8877 for (i = span_start; i < span_end;)
8878 {
8879 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8880 bool insn_32bit = false;
8881 bool is_ldm = false;
8882 bool is_vldm = false;
8883 bool is_not_last_in_it_block = false;
8884
8885 /* The first 16-bits of all 32-bit thumb2 instructions start
8886 with opcode[15..13]=0b111 and the encoded op1 can be anything
8887 except opcode[12..11]!=0b00.
8888 See 32-bit Thumb instruction encoding. */
8889 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8890 insn_32bit = true;
8891
8892 /* Compute the predicate that tells if the instruction
8893 is concerned by the IT block
8894 - Creates an error if there is a ldm that is not
8895 last in the IT block thus cannot be replaced
8896 - Otherwise we can create a branch at the end of the
8897 IT block, it will be controlled naturally by IT
8898 with the proper pseudo-predicate
8899 - So the only interesting predicate is the one that
8900 tells that we are not on the last item of an IT
8901 block. */
8902 if (itblock_current_pos != 0)
8903 is_not_last_in_it_block = !!--itblock_current_pos;
8904
8905 if (insn_32bit)
8906 {
8907 /* Load the rest of the insn (in manual-friendly order). */
8908 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8909 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8910 is_vldm = is_thumb2_vldm (insn);
8911
8912 /* Veneers are created for (v)ldm depending on
8913 option flags and memory accesses conditions; but
8914 if the instruction is not the last instruction of
8915 an IT block, we cannot create a jump there, so we
8916 bail out. */
8917 if ((is_ldm || is_vldm)
8918 && stm32l4xx_need_create_replacing_stub
8919 (insn, globals->stm32l4xx_fix))
8920 {
8921 if (is_not_last_in_it_block)
8922 {
8923 _bfd_error_handler
8924 /* xgettext:c-format */
8925 (_("%pB(%pA+%#x): error: multiple load detected"
8926 " in non-last IT block instruction:"
8927 " STM32L4XX veneer cannot be generated; "
8928 "use gcc option -mrestrict-it to generate"
8929 " only one instruction per IT block"),
8930 abfd, sec, i);
8931 }
8932 else
8933 {
8934 elf32_stm32l4xx_erratum_list *newerr =
8935 (elf32_stm32l4xx_erratum_list *)
8936 bfd_zmalloc
8937 (sizeof (elf32_stm32l4xx_erratum_list));
8938
8939 elf32_arm_section_data (sec)
8940 ->stm32l4xx_erratumcount += 1;
8941 newerr->u.b.insn = insn;
8942 /* We create only thumb branches. */
8943 newerr->type =
8944 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8945 record_stm32l4xx_erratum_veneer
8946 (link_info, newerr, abfd, sec,
8947 i,
8948 is_ldm ?
8949 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8950 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8951 newerr->vma = -1;
8952 newerr->next = sec_data->stm32l4xx_erratumlist;
8953 sec_data->stm32l4xx_erratumlist = newerr;
8954 }
8955 }
8956 }
8957 else
8958 {
8959 /* A7.7.37 IT p208
8960 IT blocks are only encoded in T1
8961 Encoding T1: IT{x{y{z}}} <firstcond>
8962 1 0 1 1 - 1 1 1 1 - firstcond - mask
8963 if mask = '0000' then see 'related encodings'
8964 We don't deal with UNPREDICTABLE, just ignore these.
8965 There can be no nested IT blocks so an IT block
8966 is naturally a new one for which it is worth
8967 computing its size. */
8968 bool is_newitblock = ((insn & 0xff00) == 0xbf00)
8969 && ((insn & 0x000f) != 0x0000);
8970 /* If we have a new IT block we compute its size. */
8971 if (is_newitblock)
8972 {
8973 /* Compute the number of instructions controlled
8974 by the IT block, it will be used to decide
8975 whether we are inside an IT block or not. */
8976 unsigned int mask = insn & 0x000f;
8977 itblock_current_pos = 4 - ctz (mask);
8978 }
8979 }
8980
8981 i += insn_32bit ? 4 : 2;
8982 }
8983 }
8984
8985 if (elf_section_data (sec)->this_hdr.contents != contents)
8986 free (contents);
8987 contents = NULL;
8988 }
8989
8990 return true;
8991
8992 error_return:
8993 if (elf_section_data (sec)->this_hdr.contents != contents)
8994 free (contents);
8995
8996 return false;
8997 }
8998
8999 /* Set target relocation values needed during linking. */
9000
9001 void
9002 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
9003 struct bfd_link_info *link_info,
9004 struct elf32_arm_params *params)
9005 {
9006 struct elf32_arm_link_hash_table *globals;
9007
9008 globals = elf32_arm_hash_table (link_info);
9009 if (globals == NULL)
9010 return;
9011
9012 globals->target1_is_rel = params->target1_is_rel;
9013 if (globals->fdpic_p)
9014 globals->target2_reloc = R_ARM_GOT32;
9015 else if (strcmp (params->target2_type, "rel") == 0)
9016 globals->target2_reloc = R_ARM_REL32;
9017 else if (strcmp (params->target2_type, "abs") == 0)
9018 globals->target2_reloc = R_ARM_ABS32;
9019 else if (strcmp (params->target2_type, "got-rel") == 0)
9020 globals->target2_reloc = R_ARM_GOT_PREL;
9021 else
9022 {
9023 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
9024 params->target2_type);
9025 }
9026 globals->fix_v4bx = params->fix_v4bx;
9027 globals->use_blx |= params->use_blx;
9028 globals->vfp11_fix = params->vfp11_denorm_fix;
9029 globals->stm32l4xx_fix = params->stm32l4xx_fix;
9030 if (globals->fdpic_p)
9031 globals->pic_veneer = 1;
9032 else
9033 globals->pic_veneer = params->pic_veneer;
9034 globals->fix_cortex_a8 = params->fix_cortex_a8;
9035 globals->fix_arm1176 = params->fix_arm1176;
9036 globals->cmse_implib = params->cmse_implib;
9037 globals->in_implib_bfd = params->in_implib_bfd;
9038
9039 BFD_ASSERT (is_arm_elf (output_bfd));
9040 elf_arm_tdata (output_bfd)->no_enum_size_warning
9041 = params->no_enum_size_warning;
9042 elf_arm_tdata (output_bfd)->no_wchar_size_warning
9043 = params->no_wchar_size_warning;
9044 }
9045
9046 /* Replace the target offset of a Thumb bl or b.w instruction. */
9047
9048 static void
9049 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
9050 {
9051 bfd_vma upper;
9052 bfd_vma lower;
9053 int reloc_sign;
9054
9055 BFD_ASSERT ((offset & 1) == 0);
9056
9057 upper = bfd_get_16 (abfd, insn);
9058 lower = bfd_get_16 (abfd, insn + 2);
9059 reloc_sign = (offset < 0) ? 1 : 0;
9060 upper = (upper & ~(bfd_vma) 0x7ff)
9061 | ((offset >> 12) & 0x3ff)
9062 | (reloc_sign << 10);
9063 lower = (lower & ~(bfd_vma) 0x2fff)
9064 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
9065 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
9066 | ((offset >> 1) & 0x7ff);
9067 bfd_put_16 (abfd, upper, insn);
9068 bfd_put_16 (abfd, lower, insn + 2);
9069 }
9070
9071 /* Thumb code calling an ARM function. */
9072
9073 static int
9074 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
9075 const char * name,
9076 bfd * input_bfd,
9077 bfd * output_bfd,
9078 asection * input_section,
9079 bfd_byte * hit_data,
9080 asection * sym_sec,
9081 bfd_vma offset,
9082 bfd_signed_vma addend,
9083 bfd_vma val,
9084 char **error_message)
9085 {
9086 asection * s = 0;
9087 bfd_vma my_offset;
9088 long int ret_offset;
9089 struct elf_link_hash_entry * myh;
9090 struct elf32_arm_link_hash_table * globals;
9091
9092 myh = find_thumb_glue (info, name, error_message);
9093 if (myh == NULL)
9094 return false;
9095
9096 globals = elf32_arm_hash_table (info);
9097 BFD_ASSERT (globals != NULL);
9098 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9099
9100 my_offset = myh->root.u.def.value;
9101
9102 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9103 THUMB2ARM_GLUE_SECTION_NAME);
9104
9105 BFD_ASSERT (s != NULL);
9106 BFD_ASSERT (s->contents != NULL);
9107 BFD_ASSERT (s->output_section != NULL);
9108
9109 if ((my_offset & 0x01) == 0x01)
9110 {
9111 if (sym_sec != NULL
9112 && sym_sec->owner != NULL
9113 && !INTERWORK_FLAG (sym_sec->owner))
9114 {
9115 _bfd_error_handler
9116 (_("%pB(%s): warning: interworking not enabled;"
9117 " first occurrence: %pB: %s call to %s"),
9118 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
9119
9120 return false;
9121 }
9122
9123 --my_offset;
9124 myh->root.u.def.value = my_offset;
9125
9126 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
9127 s->contents + my_offset);
9128
9129 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
9130 s->contents + my_offset + 2);
9131
9132 ret_offset =
9133 /* Address of destination of the stub. */
9134 ((bfd_signed_vma) val)
9135 - ((bfd_signed_vma)
9136 /* Offset from the start of the current section
9137 to the start of the stubs. */
9138 (s->output_offset
9139 /* Offset of the start of this stub from the start of the stubs. */
9140 + my_offset
9141 /* Address of the start of the current section. */
9142 + s->output_section->vma)
9143 /* The branch instruction is 4 bytes into the stub. */
9144 + 4
9145 /* ARM branches work from the pc of the instruction + 8. */
9146 + 8);
9147
9148 put_arm_insn (globals, output_bfd,
9149 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
9150 s->contents + my_offset + 4);
9151 }
9152
9153 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
9154
9155 /* Now go back and fix up the original BL insn to point to here. */
9156 ret_offset =
9157 /* Address of where the stub is located. */
9158 (s->output_section->vma + s->output_offset + my_offset)
9159 /* Address of where the BL is located. */
9160 - (input_section->output_section->vma + input_section->output_offset
9161 + offset)
9162 /* Addend in the relocation. */
9163 - addend
9164 /* Biassing for PC-relative addressing. */
9165 - 8;
9166
9167 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
9168
9169 return true;
9170 }
9171
9172 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
9173
9174 static struct elf_link_hash_entry *
9175 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
9176 const char * name,
9177 bfd * input_bfd,
9178 bfd * output_bfd,
9179 asection * sym_sec,
9180 bfd_vma val,
9181 asection * s,
9182 char ** error_message)
9183 {
9184 bfd_vma my_offset;
9185 long int ret_offset;
9186 struct elf_link_hash_entry * myh;
9187 struct elf32_arm_link_hash_table * globals;
9188
9189 myh = find_arm_glue (info, name, error_message);
9190 if (myh == NULL)
9191 return NULL;
9192
9193 globals = elf32_arm_hash_table (info);
9194 BFD_ASSERT (globals != NULL);
9195 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9196
9197 my_offset = myh->root.u.def.value;
9198
9199 if ((my_offset & 0x01) == 0x01)
9200 {
9201 if (sym_sec != NULL
9202 && sym_sec->owner != NULL
9203 && !INTERWORK_FLAG (sym_sec->owner))
9204 {
9205 _bfd_error_handler
9206 (_("%pB(%s): warning: interworking not enabled;"
9207 " first occurrence: %pB: %s call to %s"),
9208 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
9209 }
9210
9211 --my_offset;
9212 myh->root.u.def.value = my_offset;
9213
9214 if (bfd_link_pic (info)
9215 || globals->root.is_relocatable_executable
9216 || globals->pic_veneer)
9217 {
9218 /* For relocatable objects we can't use absolute addresses,
9219 so construct the address from a relative offset. */
9220 /* TODO: If the offset is small it's probably worth
9221 constructing the address with adds. */
9222 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
9223 s->contents + my_offset);
9224 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
9225 s->contents + my_offset + 4);
9226 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
9227 s->contents + my_offset + 8);
9228 /* Adjust the offset by 4 for the position of the add,
9229 and 8 for the pipeline offset. */
9230 ret_offset = (val - (s->output_offset
9231 + s->output_section->vma
9232 + my_offset + 12))
9233 | 1;
9234 bfd_put_32 (output_bfd, ret_offset,
9235 s->contents + my_offset + 12);
9236 }
9237 else if (globals->use_blx)
9238 {
9239 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
9240 s->contents + my_offset);
9241
9242 /* It's a thumb address. Add the low order bit. */
9243 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
9244 s->contents + my_offset + 4);
9245 }
9246 else
9247 {
9248 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
9249 s->contents + my_offset);
9250
9251 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
9252 s->contents + my_offset + 4);
9253
9254 /* It's a thumb address. Add the low order bit. */
9255 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
9256 s->contents + my_offset + 8);
9257
9258 my_offset += 12;
9259 }
9260 }
9261
9262 BFD_ASSERT (my_offset <= globals->arm_glue_size);
9263
9264 return myh;
9265 }
9266
9267 /* Arm code calling a Thumb function. */
9268
9269 static int
9270 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
9271 const char * name,
9272 bfd * input_bfd,
9273 bfd * output_bfd,
9274 asection * input_section,
9275 bfd_byte * hit_data,
9276 asection * sym_sec,
9277 bfd_vma offset,
9278 bfd_signed_vma addend,
9279 bfd_vma val,
9280 char **error_message)
9281 {
9282 unsigned long int tmp;
9283 bfd_vma my_offset;
9284 asection * s;
9285 long int ret_offset;
9286 struct elf_link_hash_entry * myh;
9287 struct elf32_arm_link_hash_table * globals;
9288
9289 globals = elf32_arm_hash_table (info);
9290 BFD_ASSERT (globals != NULL);
9291 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9292
9293 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9294 ARM2THUMB_GLUE_SECTION_NAME);
9295 BFD_ASSERT (s != NULL);
9296 BFD_ASSERT (s->contents != NULL);
9297 BFD_ASSERT (s->output_section != NULL);
9298
9299 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9300 sym_sec, val, s, error_message);
9301 if (!myh)
9302 return false;
9303
9304 my_offset = myh->root.u.def.value;
9305 tmp = bfd_get_32 (input_bfd, hit_data);
9306 tmp = tmp & 0xFF000000;
9307
9308 /* Somehow these are both 4 too far, so subtract 8. */
9309 ret_offset = (s->output_offset
9310 + my_offset
9311 + s->output_section->vma
9312 - (input_section->output_offset
9313 + input_section->output_section->vma
9314 + offset + addend)
9315 - 8);
9316
9317 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9318
9319 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9320
9321 return true;
9322 }
9323
9324 /* Populate Arm stub for an exported Thumb function. */
9325
9326 static bool
9327 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9328 {
9329 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9330 asection * s;
9331 struct elf_link_hash_entry * myh;
9332 struct elf32_arm_link_hash_entry *eh;
9333 struct elf32_arm_link_hash_table * globals;
9334 asection *sec;
9335 bfd_vma val;
9336 char *error_message;
9337
9338 eh = elf32_arm_hash_entry (h);
9339 /* Allocate stubs for exported Thumb functions on v4t. */
9340 if (eh->export_glue == NULL)
9341 return true;
9342
9343 globals = elf32_arm_hash_table (info);
9344 BFD_ASSERT (globals != NULL);
9345 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9346
9347 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9348 ARM2THUMB_GLUE_SECTION_NAME);
9349 BFD_ASSERT (s != NULL);
9350 BFD_ASSERT (s->contents != NULL);
9351 BFD_ASSERT (s->output_section != NULL);
9352
9353 sec = eh->export_glue->root.u.def.section;
9354
9355 BFD_ASSERT (sec->output_section != NULL);
9356
9357 val = eh->export_glue->root.u.def.value + sec->output_offset
9358 + sec->output_section->vma;
9359
9360 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9361 h->root.u.def.section->owner,
9362 globals->obfd, sec, val, s,
9363 &error_message);
9364 BFD_ASSERT (myh);
9365 return true;
9366 }
9367
9368 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9369
9370 static bfd_vma
9371 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9372 {
9373 bfd_byte *p;
9374 bfd_vma glue_addr;
9375 asection *s;
9376 struct elf32_arm_link_hash_table *globals;
9377
9378 globals = elf32_arm_hash_table (info);
9379 BFD_ASSERT (globals != NULL);
9380 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9381
9382 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9383 ARM_BX_GLUE_SECTION_NAME);
9384 BFD_ASSERT (s != NULL);
9385 BFD_ASSERT (s->contents != NULL);
9386 BFD_ASSERT (s->output_section != NULL);
9387
9388 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9389
9390 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9391
9392 if ((globals->bx_glue_offset[reg] & 1) == 0)
9393 {
9394 p = s->contents + glue_addr;
9395 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9396 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9397 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9398 globals->bx_glue_offset[reg] |= 1;
9399 }
9400
9401 return glue_addr + s->output_section->vma + s->output_offset;
9402 }
9403
9404 /* Generate Arm stubs for exported Thumb symbols. */
9405 static void
9406 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9407 struct bfd_link_info *link_info)
9408 {
9409 struct elf32_arm_link_hash_table * globals;
9410
9411 if (link_info == NULL)
9412 /* Ignore this if we are not called by the ELF backend linker. */
9413 return;
9414
9415 globals = elf32_arm_hash_table (link_info);
9416 if (globals == NULL)
9417 return;
9418
9419 /* If blx is available then exported Thumb symbols are OK and there is
9420 nothing to do. */
9421 if (globals->use_blx)
9422 return;
9423
9424 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9425 link_info);
9426 }
9427
9428 /* Reserve space for COUNT dynamic relocations in relocation selection
9429 SRELOC. */
9430
9431 static void
9432 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9433 bfd_size_type count)
9434 {
9435 struct elf32_arm_link_hash_table *htab;
9436
9437 htab = elf32_arm_hash_table (info);
9438 BFD_ASSERT (htab->root.dynamic_sections_created);
9439 if (sreloc == NULL)
9440 abort ();
9441 sreloc->size += RELOC_SIZE (htab) * count;
9442 }
9443
9444 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9445 dynamic, the relocations should go in SRELOC, otherwise they should
9446 go in the special .rel.iplt section. */
9447
9448 static void
9449 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9450 bfd_size_type count)
9451 {
9452 struct elf32_arm_link_hash_table *htab;
9453
9454 htab = elf32_arm_hash_table (info);
9455 if (!htab->root.dynamic_sections_created)
9456 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9457 else
9458 {
9459 BFD_ASSERT (sreloc != NULL);
9460 sreloc->size += RELOC_SIZE (htab) * count;
9461 }
9462 }
9463
9464 /* Add relocation REL to the end of relocation section SRELOC. */
9465
9466 static void
9467 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9468 asection *sreloc, Elf_Internal_Rela *rel)
9469 {
9470 bfd_byte *loc;
9471 struct elf32_arm_link_hash_table *htab;
9472
9473 htab = elf32_arm_hash_table (info);
9474 if (!htab->root.dynamic_sections_created
9475 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9476 sreloc = htab->root.irelplt;
9477 if (sreloc == NULL)
9478 abort ();
9479 loc = sreloc->contents;
9480 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9481 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9482 abort ();
9483 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9484 }
9485
9486 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9487 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9488 to .plt. */
9489
9490 static void
9491 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9492 bool is_iplt_entry,
9493 union gotplt_union *root_plt,
9494 struct arm_plt_info *arm_plt)
9495 {
9496 struct elf32_arm_link_hash_table *htab;
9497 asection *splt;
9498 asection *sgotplt;
9499
9500 htab = elf32_arm_hash_table (info);
9501
9502 if (is_iplt_entry)
9503 {
9504 splt = htab->root.iplt;
9505 sgotplt = htab->root.igotplt;
9506
9507 /* NaCl uses a special first entry in .iplt too. */
9508 if (htab->root.target_os == is_nacl && splt->size == 0)
9509 splt->size += htab->plt_header_size;
9510
9511 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9512 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9513 }
9514 else
9515 {
9516 splt = htab->root.splt;
9517 sgotplt = htab->root.sgotplt;
9518
9519 if (htab->fdpic_p)
9520 {
9521 /* Allocate room for R_ARM_FUNCDESC_VALUE. */
9522 /* For lazy binding, relocations will be put into .rel.plt, in
9523 .rel.got otherwise. */
9524 /* FIXME: today we don't support lazy binding so put it in .rel.got */
9525 if (info->flags & DF_BIND_NOW)
9526 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
9527 else
9528 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9529 }
9530 else
9531 {
9532 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9533 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9534 }
9535
9536 /* If this is the first .plt entry, make room for the special
9537 first entry. */
9538 if (splt->size == 0)
9539 splt->size += htab->plt_header_size;
9540
9541 htab->next_tls_desc_index++;
9542 }
9543
9544 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9545 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9546 splt->size += PLT_THUMB_STUB_SIZE;
9547 root_plt->offset = splt->size;
9548 splt->size += htab->plt_entry_size;
9549
9550 /* We also need to make an entry in the .got.plt section, which
9551 will be placed in the .got section by the linker script. */
9552 if (is_iplt_entry)
9553 arm_plt->got_offset = sgotplt->size;
9554 else
9555 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9556 if (htab->fdpic_p)
9557 /* Function descriptor takes 64 bits in GOT. */
9558 sgotplt->size += 8;
9559 else
9560 sgotplt->size += 4;
9561 }
9562
9563 static bfd_vma
9564 arm_movw_immediate (bfd_vma value)
9565 {
9566 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9567 }
9568
9569 static bfd_vma
9570 arm_movt_immediate (bfd_vma value)
9571 {
9572 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9573 }
9574
9575 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9576 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9577 Otherwise, DYNINDX is the index of the symbol in the dynamic
9578 symbol table and SYM_VALUE is undefined.
9579
9580 ROOT_PLT points to the offset of the PLT entry from the start of its
9581 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9582 bookkeeping information.
9583
9584 Returns FALSE if there was a problem. */
9585
9586 static bool
9587 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9588 union gotplt_union *root_plt,
9589 struct arm_plt_info *arm_plt,
9590 int dynindx, bfd_vma sym_value)
9591 {
9592 struct elf32_arm_link_hash_table *htab;
9593 asection *sgot;
9594 asection *splt;
9595 asection *srel;
9596 bfd_byte *loc;
9597 bfd_vma plt_index;
9598 Elf_Internal_Rela rel;
9599 bfd_vma got_header_size;
9600
9601 htab = elf32_arm_hash_table (info);
9602
9603 /* Pick the appropriate sections and sizes. */
9604 if (dynindx == -1)
9605 {
9606 splt = htab->root.iplt;
9607 sgot = htab->root.igotplt;
9608 srel = htab->root.irelplt;
9609
9610 /* There are no reserved entries in .igot.plt, and no special
9611 first entry in .iplt. */
9612 got_header_size = 0;
9613 }
9614 else
9615 {
9616 splt = htab->root.splt;
9617 sgot = htab->root.sgotplt;
9618 srel = htab->root.srelplt;
9619
9620 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9621 }
9622 BFD_ASSERT (splt != NULL && srel != NULL);
9623
9624 bfd_vma got_offset, got_address, plt_address;
9625 bfd_vma got_displacement, initial_got_entry;
9626 bfd_byte * ptr;
9627
9628 BFD_ASSERT (sgot != NULL);
9629
9630 /* Get the offset into the .(i)got.plt table of the entry that
9631 corresponds to this function. */
9632 got_offset = (arm_plt->got_offset & -2);
9633
9634 /* Get the index in the procedure linkage table which
9635 corresponds to this symbol. This is the index of this symbol
9636 in all the symbols for which we are making plt entries.
9637 After the reserved .got.plt entries, all symbols appear in
9638 the same order as in .plt. */
9639 if (htab->fdpic_p)
9640 /* Function descriptor takes 8 bytes. */
9641 plt_index = (got_offset - got_header_size) / 8;
9642 else
9643 plt_index = (got_offset - got_header_size) / 4;
9644
9645 /* Calculate the address of the GOT entry. */
9646 got_address = (sgot->output_section->vma
9647 + sgot->output_offset
9648 + got_offset);
9649
9650 /* ...and the address of the PLT entry. */
9651 plt_address = (splt->output_section->vma
9652 + splt->output_offset
9653 + root_plt->offset);
9654
9655 ptr = splt->contents + root_plt->offset;
9656 if (htab->root.target_os == is_vxworks && bfd_link_pic (info))
9657 {
9658 unsigned int i;
9659 bfd_vma val;
9660
9661 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9662 {
9663 val = elf32_arm_vxworks_shared_plt_entry[i];
9664 if (i == 2)
9665 val |= got_address - sgot->output_section->vma;
9666 if (i == 5)
9667 val |= plt_index * RELOC_SIZE (htab);
9668 if (i == 2 || i == 5)
9669 bfd_put_32 (output_bfd, val, ptr);
9670 else
9671 put_arm_insn (htab, output_bfd, val, ptr);
9672 }
9673 }
9674 else if (htab->root.target_os == is_vxworks)
9675 {
9676 unsigned int i;
9677 bfd_vma val;
9678
9679 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9680 {
9681 val = elf32_arm_vxworks_exec_plt_entry[i];
9682 if (i == 2)
9683 val |= got_address;
9684 if (i == 4)
9685 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9686 if (i == 5)
9687 val |= plt_index * RELOC_SIZE (htab);
9688 if (i == 2 || i == 5)
9689 bfd_put_32 (output_bfd, val, ptr);
9690 else
9691 put_arm_insn (htab, output_bfd, val, ptr);
9692 }
9693
9694 loc = (htab->srelplt2->contents
9695 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9696
9697 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9698 referencing the GOT for this PLT entry. */
9699 rel.r_offset = plt_address + 8;
9700 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9701 rel.r_addend = got_offset;
9702 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9703 loc += RELOC_SIZE (htab);
9704
9705 /* Create the R_ARM_ABS32 relocation referencing the
9706 beginning of the PLT for this GOT entry. */
9707 rel.r_offset = got_address;
9708 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9709 rel.r_addend = 0;
9710 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9711 }
9712 else if (htab->root.target_os == is_nacl)
9713 {
9714 /* Calculate the displacement between the PLT slot and the
9715 common tail that's part of the special initial PLT slot. */
9716 int32_t tail_displacement
9717 = ((splt->output_section->vma + splt->output_offset
9718 + ARM_NACL_PLT_TAIL_OFFSET)
9719 - (plt_address + htab->plt_entry_size + 4));
9720 BFD_ASSERT ((tail_displacement & 3) == 0);
9721 tail_displacement >>= 2;
9722
9723 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9724 || (-tail_displacement & 0xff000000) == 0);
9725
9726 /* Calculate the displacement between the PLT slot and the entry
9727 in the GOT. The offset accounts for the value produced by
9728 adding to pc in the penultimate instruction of the PLT stub. */
9729 got_displacement = (got_address
9730 - (plt_address + htab->plt_entry_size));
9731
9732 /* NaCl does not support interworking at all. */
9733 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9734
9735 put_arm_insn (htab, output_bfd,
9736 elf32_arm_nacl_plt_entry[0]
9737 | arm_movw_immediate (got_displacement),
9738 ptr + 0);
9739 put_arm_insn (htab, output_bfd,
9740 elf32_arm_nacl_plt_entry[1]
9741 | arm_movt_immediate (got_displacement),
9742 ptr + 4);
9743 put_arm_insn (htab, output_bfd,
9744 elf32_arm_nacl_plt_entry[2],
9745 ptr + 8);
9746 put_arm_insn (htab, output_bfd,
9747 elf32_arm_nacl_plt_entry[3]
9748 | (tail_displacement & 0x00ffffff),
9749 ptr + 12);
9750 }
9751 else if (htab->fdpic_p)
9752 {
9753 const bfd_vma *plt_entry = using_thumb_only(htab)
9754 ? elf32_arm_fdpic_thumb_plt_entry
9755 : elf32_arm_fdpic_plt_entry;
9756
9757 /* Fill-up Thumb stub if needed. */
9758 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9759 {
9760 put_thumb_insn (htab, output_bfd,
9761 elf32_arm_plt_thumb_stub[0], ptr - 4);
9762 put_thumb_insn (htab, output_bfd,
9763 elf32_arm_plt_thumb_stub[1], ptr - 2);
9764 }
9765 /* As we are using 32 bit instructions even for the Thumb
9766 version, we have to use 'put_arm_insn' instead of
9767 'put_thumb_insn'. */
9768 put_arm_insn(htab, output_bfd, plt_entry[0], ptr + 0);
9769 put_arm_insn(htab, output_bfd, plt_entry[1], ptr + 4);
9770 put_arm_insn(htab, output_bfd, plt_entry[2], ptr + 8);
9771 put_arm_insn(htab, output_bfd, plt_entry[3], ptr + 12);
9772 bfd_put_32 (output_bfd, got_offset, ptr + 16);
9773
9774 if (!(info->flags & DF_BIND_NOW))
9775 {
9776 /* funcdesc_value_reloc_offset. */
9777 bfd_put_32 (output_bfd,
9778 htab->root.srelplt->reloc_count * RELOC_SIZE (htab),
9779 ptr + 20);
9780 put_arm_insn(htab, output_bfd, plt_entry[6], ptr + 24);
9781 put_arm_insn(htab, output_bfd, plt_entry[7], ptr + 28);
9782 put_arm_insn(htab, output_bfd, plt_entry[8], ptr + 32);
9783 put_arm_insn(htab, output_bfd, plt_entry[9], ptr + 36);
9784 }
9785 }
9786 else if (using_thumb_only (htab))
9787 {
9788 /* PR ld/16017: Generate thumb only PLT entries. */
9789 if (!using_thumb2 (htab))
9790 {
9791 /* FIXME: We ought to be able to generate thumb-1 PLT
9792 instructions... */
9793 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9794 output_bfd);
9795 return false;
9796 }
9797
9798 /* Calculate the displacement between the PLT slot and the entry in
9799 the GOT. The 12-byte offset accounts for the value produced by
9800 adding to pc in the 3rd instruction of the PLT stub. */
9801 got_displacement = got_address - (plt_address + 12);
9802
9803 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9804 instead of 'put_thumb_insn'. */
9805 put_arm_insn (htab, output_bfd,
9806 elf32_thumb2_plt_entry[0]
9807 | ((got_displacement & 0x000000ff) << 16)
9808 | ((got_displacement & 0x00000700) << 20)
9809 | ((got_displacement & 0x00000800) >> 1)
9810 | ((got_displacement & 0x0000f000) >> 12),
9811 ptr + 0);
9812 put_arm_insn (htab, output_bfd,
9813 elf32_thumb2_plt_entry[1]
9814 | ((got_displacement & 0x00ff0000) )
9815 | ((got_displacement & 0x07000000) << 4)
9816 | ((got_displacement & 0x08000000) >> 17)
9817 | ((got_displacement & 0xf0000000) >> 28),
9818 ptr + 4);
9819 put_arm_insn (htab, output_bfd,
9820 elf32_thumb2_plt_entry[2],
9821 ptr + 8);
9822 put_arm_insn (htab, output_bfd,
9823 elf32_thumb2_plt_entry[3],
9824 ptr + 12);
9825 }
9826 else
9827 {
9828 /* Calculate the displacement between the PLT slot and the
9829 entry in the GOT. The eight-byte offset accounts for the
9830 value produced by adding to pc in the first instruction
9831 of the PLT stub. */
9832 got_displacement = got_address - (plt_address + 8);
9833
9834 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9835 {
9836 put_thumb_insn (htab, output_bfd,
9837 elf32_arm_plt_thumb_stub[0], ptr - 4);
9838 put_thumb_insn (htab, output_bfd,
9839 elf32_arm_plt_thumb_stub[1], ptr - 2);
9840 }
9841
9842 if (!elf32_arm_use_long_plt_entry)
9843 {
9844 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9845
9846 put_arm_insn (htab, output_bfd,
9847 elf32_arm_plt_entry_short[0]
9848 | ((got_displacement & 0x0ff00000) >> 20),
9849 ptr + 0);
9850 put_arm_insn (htab, output_bfd,
9851 elf32_arm_plt_entry_short[1]
9852 | ((got_displacement & 0x000ff000) >> 12),
9853 ptr+ 4);
9854 put_arm_insn (htab, output_bfd,
9855 elf32_arm_plt_entry_short[2]
9856 | (got_displacement & 0x00000fff),
9857 ptr + 8);
9858 #ifdef FOUR_WORD_PLT
9859 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9860 #endif
9861 }
9862 else
9863 {
9864 put_arm_insn (htab, output_bfd,
9865 elf32_arm_plt_entry_long[0]
9866 | ((got_displacement & 0xf0000000) >> 28),
9867 ptr + 0);
9868 put_arm_insn (htab, output_bfd,
9869 elf32_arm_plt_entry_long[1]
9870 | ((got_displacement & 0x0ff00000) >> 20),
9871 ptr + 4);
9872 put_arm_insn (htab, output_bfd,
9873 elf32_arm_plt_entry_long[2]
9874 | ((got_displacement & 0x000ff000) >> 12),
9875 ptr+ 8);
9876 put_arm_insn (htab, output_bfd,
9877 elf32_arm_plt_entry_long[3]
9878 | (got_displacement & 0x00000fff),
9879 ptr + 12);
9880 }
9881 }
9882
9883 /* Fill in the entry in the .rel(a).(i)plt section. */
9884 rel.r_offset = got_address;
9885 rel.r_addend = 0;
9886 if (dynindx == -1)
9887 {
9888 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9889 The dynamic linker or static executable then calls SYM_VALUE
9890 to determine the correct run-time value of the .igot.plt entry. */
9891 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9892 initial_got_entry = sym_value;
9893 }
9894 else
9895 {
9896 /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
9897 used by PLT entry. */
9898 if (htab->fdpic_p)
9899 {
9900 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
9901 initial_got_entry = 0;
9902 }
9903 else
9904 {
9905 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9906 initial_got_entry = (splt->output_section->vma
9907 + splt->output_offset);
9908
9909 /* PR ld/16017
9910 When thumb only we need to set the LSB for any address that
9911 will be used with an interworking branch instruction. */
9912 if (using_thumb_only (htab))
9913 initial_got_entry |= 1;
9914 }
9915 }
9916
9917 /* Fill in the entry in the global offset table. */
9918 bfd_put_32 (output_bfd, initial_got_entry,
9919 sgot->contents + got_offset);
9920
9921 if (htab->fdpic_p && !(info->flags & DF_BIND_NOW))
9922 {
9923 /* Setup initial funcdesc value. */
9924 /* FIXME: we don't support lazy binding because there is a
9925 race condition between both words getting written and
9926 some other thread attempting to read them. The ARM
9927 architecture does not have an atomic 64 bit load/store
9928 instruction that could be used to prevent it; it is
9929 recommended that threaded FDPIC applications run with the
9930 LD_BIND_NOW environment variable set. */
9931 bfd_put_32(output_bfd, plt_address + 0x18,
9932 sgot->contents + got_offset);
9933 bfd_put_32(output_bfd, -1 /*TODO*/,
9934 sgot->contents + got_offset + 4);
9935 }
9936
9937 if (dynindx == -1)
9938 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9939 else
9940 {
9941 if (htab->fdpic_p)
9942 {
9943 /* For FDPIC we put PLT relocationss into .rel.got when not
9944 lazy binding otherwise we put them in .rel.plt. For now,
9945 we don't support lazy binding so put it in .rel.got. */
9946 if (info->flags & DF_BIND_NOW)
9947 elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelgot, &rel);
9948 else
9949 elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelplt, &rel);
9950 }
9951 else
9952 {
9953 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9954 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9955 }
9956 }
9957
9958 return true;
9959 }
9960
9961 /* Some relocations map to different relocations depending on the
9962 target. Return the real relocation. */
9963
9964 static int
9965 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
9966 int r_type)
9967 {
9968 switch (r_type)
9969 {
9970 case R_ARM_TARGET1:
9971 if (globals->target1_is_rel)
9972 return R_ARM_REL32;
9973 else
9974 return R_ARM_ABS32;
9975
9976 case R_ARM_TARGET2:
9977 return globals->target2_reloc;
9978
9979 default:
9980 return r_type;
9981 }
9982 }
9983
9984 /* Return the base VMA address which should be subtracted from real addresses
9985 when resolving @dtpoff relocation.
9986 This is PT_TLS segment p_vaddr. */
9987
9988 static bfd_vma
9989 dtpoff_base (struct bfd_link_info *info)
9990 {
9991 /* If tls_sec is NULL, we should have signalled an error already. */
9992 if (elf_hash_table (info)->tls_sec == NULL)
9993 return 0;
9994 return elf_hash_table (info)->tls_sec->vma;
9995 }
9996
9997 /* Return the relocation value for @tpoff relocation
9998 if STT_TLS virtual address is ADDRESS. */
9999
10000 static bfd_vma
10001 tpoff (struct bfd_link_info *info, bfd_vma address)
10002 {
10003 struct elf_link_hash_table *htab = elf_hash_table (info);
10004 bfd_vma base;
10005
10006 /* If tls_sec is NULL, we should have signalled an error already. */
10007 if (htab->tls_sec == NULL)
10008 return 0;
10009 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
10010 return address - htab->tls_sec->vma + base;
10011 }
10012
10013 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
10014 VALUE is the relocation value. */
10015
10016 static bfd_reloc_status_type
10017 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
10018 {
10019 if (value > 0xfff)
10020 return bfd_reloc_overflow;
10021
10022 value |= bfd_get_32 (abfd, data) & 0xfffff000;
10023 bfd_put_32 (abfd, value, data);
10024 return bfd_reloc_ok;
10025 }
10026
10027 /* Handle TLS relaxations. Relaxing is possible for symbols that use
10028 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
10029 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
10030
10031 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
10032 is to then call final_link_relocate. Return other values in the
10033 case of error.
10034
10035 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
10036 the pre-relaxed code. It would be nice if the relocs were updated
10037 to match the optimization. */
10038
10039 static bfd_reloc_status_type
10040 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
10041 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
10042 Elf_Internal_Rela *rel, unsigned long is_local)
10043 {
10044 unsigned long insn;
10045
10046 switch (ELF32_R_TYPE (rel->r_info))
10047 {
10048 default:
10049 return bfd_reloc_notsupported;
10050
10051 case R_ARM_TLS_GOTDESC:
10052 if (is_local)
10053 insn = 0;
10054 else
10055 {
10056 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10057 if (insn & 1)
10058 insn -= 5; /* THUMB */
10059 else
10060 insn -= 8; /* ARM */
10061 }
10062 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10063 return bfd_reloc_continue;
10064
10065 case R_ARM_THM_TLS_DESCSEQ:
10066 /* Thumb insn. */
10067 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
10068 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
10069 {
10070 if (is_local)
10071 /* nop */
10072 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10073 }
10074 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
10075 {
10076 if (is_local)
10077 /* nop */
10078 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10079 else
10080 /* ldr rx,[ry] */
10081 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
10082 }
10083 else if ((insn & 0xff87) == 0x4780) /* blx rx */
10084 {
10085 if (is_local)
10086 /* nop */
10087 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10088 else
10089 /* mov r0, rx */
10090 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
10091 contents + rel->r_offset);
10092 }
10093 else
10094 {
10095 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
10096 /* It's a 32 bit instruction, fetch the rest of it for
10097 error generation. */
10098 insn = (insn << 16)
10099 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
10100 _bfd_error_handler
10101 /* xgettext:c-format */
10102 (_("%pB(%pA+%#" PRIx64 "): "
10103 "unexpected %s instruction '%#lx' in TLS trampoline"),
10104 input_bfd, input_sec, (uint64_t) rel->r_offset,
10105 "Thumb", insn);
10106 return bfd_reloc_notsupported;
10107 }
10108 break;
10109
10110 case R_ARM_TLS_DESCSEQ:
10111 /* arm insn. */
10112 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10113 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
10114 {
10115 if (is_local)
10116 /* mov rx, ry */
10117 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
10118 contents + rel->r_offset);
10119 }
10120 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
10121 {
10122 if (is_local)
10123 /* nop */
10124 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10125 else
10126 /* ldr rx,[ry] */
10127 bfd_put_32 (input_bfd, insn & 0xfffff000,
10128 contents + rel->r_offset);
10129 }
10130 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
10131 {
10132 if (is_local)
10133 /* nop */
10134 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10135 else
10136 /* mov r0, rx */
10137 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
10138 contents + rel->r_offset);
10139 }
10140 else
10141 {
10142 _bfd_error_handler
10143 /* xgettext:c-format */
10144 (_("%pB(%pA+%#" PRIx64 "): "
10145 "unexpected %s instruction '%#lx' in TLS trampoline"),
10146 input_bfd, input_sec, (uint64_t) rel->r_offset,
10147 "ARM", insn);
10148 return bfd_reloc_notsupported;
10149 }
10150 break;
10151
10152 case R_ARM_TLS_CALL:
10153 /* GD->IE relaxation, turn the instruction into 'nop' or
10154 'ldr r0, [pc,r0]' */
10155 insn = is_local ? 0xe1a00000 : 0xe79f0000;
10156 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10157 break;
10158
10159 case R_ARM_THM_TLS_CALL:
10160 /* GD->IE relaxation. */
10161 if (!is_local)
10162 /* add r0,pc; ldr r0, [r0] */
10163 insn = 0x44786800;
10164 else if (using_thumb2 (globals))
10165 /* nop.w */
10166 insn = 0xf3af8000;
10167 else
10168 /* nop; nop */
10169 insn = 0xbf00bf00;
10170
10171 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
10172 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
10173 break;
10174 }
10175 return bfd_reloc_ok;
10176 }
10177
10178 /* For a given value of n, calculate the value of G_n as required to
10179 deal with group relocations. We return it in the form of an
10180 encoded constant-and-rotation, together with the final residual. If n is
10181 specified as less than zero, then final_residual is filled with the
10182 input value and no further action is performed. */
10183
10184 static bfd_vma
10185 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
10186 {
10187 int current_n;
10188 bfd_vma g_n;
10189 bfd_vma encoded_g_n = 0;
10190 bfd_vma residual = value; /* Also known as Y_n. */
10191
10192 for (current_n = 0; current_n <= n; current_n++)
10193 {
10194 int shift;
10195
10196 /* Calculate which part of the value to mask. */
10197 if (residual == 0)
10198 shift = 0;
10199 else
10200 {
10201 int msb;
10202
10203 /* Determine the most significant bit in the residual and
10204 align the resulting value to a 2-bit boundary. */
10205 for (msb = 30; msb >= 0; msb -= 2)
10206 if (residual & (3u << msb))
10207 break;
10208
10209 /* The desired shift is now (msb - 6), or zero, whichever
10210 is the greater. */
10211 shift = msb - 6;
10212 if (shift < 0)
10213 shift = 0;
10214 }
10215
10216 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
10217 g_n = residual & (0xff << shift);
10218 encoded_g_n = (g_n >> shift)
10219 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
10220
10221 /* Calculate the residual for the next time around. */
10222 residual &= ~g_n;
10223 }
10224
10225 *final_residual = residual;
10226
10227 return encoded_g_n;
10228 }
10229
10230 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
10231 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
10232
10233 static int
10234 identify_add_or_sub (bfd_vma insn)
10235 {
10236 int opcode = insn & 0x1e00000;
10237
10238 if (opcode == 1 << 23) /* ADD */
10239 return 1;
10240
10241 if (opcode == 1 << 22) /* SUB */
10242 return -1;
10243
10244 return 0;
10245 }
10246
10247 /* Perform a relocation as part of a final link. */
10248
10249 static bfd_reloc_status_type
10250 elf32_arm_final_link_relocate (reloc_howto_type * howto,
10251 bfd * input_bfd,
10252 bfd * output_bfd,
10253 asection * input_section,
10254 bfd_byte * contents,
10255 Elf_Internal_Rela * rel,
10256 bfd_vma value,
10257 struct bfd_link_info * info,
10258 asection * sym_sec,
10259 const char * sym_name,
10260 unsigned char st_type,
10261 enum arm_st_branch_type branch_type,
10262 struct elf_link_hash_entry * h,
10263 bool * unresolved_reloc_p,
10264 char ** error_message)
10265 {
10266 unsigned long r_type = howto->type;
10267 unsigned long r_symndx;
10268 bfd_byte * hit_data = contents + rel->r_offset;
10269 bfd_vma * local_got_offsets;
10270 bfd_vma * local_tlsdesc_gotents;
10271 asection * sgot;
10272 asection * splt;
10273 asection * sreloc = NULL;
10274 asection * srelgot;
10275 bfd_vma addend;
10276 bfd_signed_vma signed_addend;
10277 unsigned char dynreloc_st_type;
10278 bfd_vma dynreloc_value;
10279 struct elf32_arm_link_hash_table * globals;
10280 struct elf32_arm_link_hash_entry *eh;
10281 union gotplt_union *root_plt;
10282 struct arm_plt_info *arm_plt;
10283 bfd_vma plt_offset;
10284 bfd_vma gotplt_offset;
10285 bool has_iplt_entry;
10286 bool resolved_to_zero;
10287
10288 globals = elf32_arm_hash_table (info);
10289 if (globals == NULL)
10290 return bfd_reloc_notsupported;
10291
10292 BFD_ASSERT (is_arm_elf (input_bfd));
10293 BFD_ASSERT (howto != NULL);
10294
10295 /* Some relocation types map to different relocations depending on the
10296 target. We pick the right one here. */
10297 r_type = arm_real_reloc_type (globals, r_type);
10298
10299 /* It is possible to have linker relaxations on some TLS access
10300 models. Update our information here. */
10301 r_type = elf32_arm_tls_transition (info, r_type, h);
10302
10303 if (r_type != howto->type)
10304 howto = elf32_arm_howto_from_type (r_type);
10305
10306 eh = (struct elf32_arm_link_hash_entry *) h;
10307 sgot = globals->root.sgot;
10308 local_got_offsets = elf_local_got_offsets (input_bfd);
10309 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
10310
10311 if (globals->root.dynamic_sections_created)
10312 srelgot = globals->root.srelgot;
10313 else
10314 srelgot = NULL;
10315
10316 r_symndx = ELF32_R_SYM (rel->r_info);
10317
10318 if (globals->use_rel)
10319 {
10320 bfd_vma sign;
10321
10322 switch (howto->size)
10323 {
10324 case 0: addend = bfd_get_8 (input_bfd, hit_data); break;
10325 case 1: addend = bfd_get_16 (input_bfd, hit_data); break;
10326 case 2: addend = bfd_get_32 (input_bfd, hit_data); break;
10327 default: addend = 0; break;
10328 }
10329 /* Note: the addend and signed_addend calculated here are
10330 incorrect for any split field. */
10331 addend &= howto->src_mask;
10332 sign = howto->src_mask & ~(howto->src_mask >> 1);
10333 signed_addend = (addend ^ sign) - sign;
10334 signed_addend = (bfd_vma) signed_addend << howto->rightshift;
10335 addend <<= howto->rightshift;
10336 }
10337 else
10338 addend = signed_addend = rel->r_addend;
10339
10340 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10341 are resolving a function call relocation. */
10342 if (using_thumb_only (globals)
10343 && (r_type == R_ARM_THM_CALL
10344 || r_type == R_ARM_THM_JUMP24)
10345 && branch_type == ST_BRANCH_TO_ARM)
10346 branch_type = ST_BRANCH_TO_THUMB;
10347
10348 /* Record the symbol information that should be used in dynamic
10349 relocations. */
10350 dynreloc_st_type = st_type;
10351 dynreloc_value = value;
10352 if (branch_type == ST_BRANCH_TO_THUMB)
10353 dynreloc_value |= 1;
10354
10355 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10356 VALUE appropriately for relocations that we resolve at link time. */
10357 has_iplt_entry = false;
10358 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
10359 &arm_plt)
10360 && root_plt->offset != (bfd_vma) -1)
10361 {
10362 plt_offset = root_plt->offset;
10363 gotplt_offset = arm_plt->got_offset;
10364
10365 if (h == NULL || eh->is_iplt)
10366 {
10367 has_iplt_entry = true;
10368 splt = globals->root.iplt;
10369
10370 /* Populate .iplt entries here, because not all of them will
10371 be seen by finish_dynamic_symbol. The lower bit is set if
10372 we have already populated the entry. */
10373 if (plt_offset & 1)
10374 plt_offset--;
10375 else
10376 {
10377 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
10378 -1, dynreloc_value))
10379 root_plt->offset |= 1;
10380 else
10381 return bfd_reloc_notsupported;
10382 }
10383
10384 /* Static relocations always resolve to the .iplt entry. */
10385 st_type = STT_FUNC;
10386 value = (splt->output_section->vma
10387 + splt->output_offset
10388 + plt_offset);
10389 branch_type = ST_BRANCH_TO_ARM;
10390
10391 /* If there are non-call relocations that resolve to the .iplt
10392 entry, then all dynamic ones must too. */
10393 if (arm_plt->noncall_refcount != 0)
10394 {
10395 dynreloc_st_type = st_type;
10396 dynreloc_value = value;
10397 }
10398 }
10399 else
10400 /* We populate the .plt entry in finish_dynamic_symbol. */
10401 splt = globals->root.splt;
10402 }
10403 else
10404 {
10405 splt = NULL;
10406 plt_offset = (bfd_vma) -1;
10407 gotplt_offset = (bfd_vma) -1;
10408 }
10409
10410 resolved_to_zero = (h != NULL
10411 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
10412
10413 switch (r_type)
10414 {
10415 case R_ARM_NONE:
10416 /* We don't need to find a value for this symbol. It's just a
10417 marker. */
10418 *unresolved_reloc_p = false;
10419 return bfd_reloc_ok;
10420
10421 case R_ARM_ABS12:
10422 if (globals->root.target_os != is_vxworks)
10423 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10424 /* Fall through. */
10425
10426 case R_ARM_PC24:
10427 case R_ARM_ABS32:
10428 case R_ARM_ABS32_NOI:
10429 case R_ARM_REL32:
10430 case R_ARM_REL32_NOI:
10431 case R_ARM_CALL:
10432 case R_ARM_JUMP24:
10433 case R_ARM_XPC25:
10434 case R_ARM_PREL31:
10435 case R_ARM_PLT32:
10436 /* Handle relocations which should use the PLT entry. ABS32/REL32
10437 will use the symbol's value, which may point to a PLT entry, but we
10438 don't need to handle that here. If we created a PLT entry, all
10439 branches in this object should go to it, except if the PLT is too
10440 far away, in which case a long branch stub should be inserted. */
10441 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10442 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10443 && r_type != R_ARM_CALL
10444 && r_type != R_ARM_JUMP24
10445 && r_type != R_ARM_PLT32)
10446 && plt_offset != (bfd_vma) -1)
10447 {
10448 /* If we've created a .plt section, and assigned a PLT entry
10449 to this function, it must either be a STT_GNU_IFUNC reference
10450 or not be known to bind locally. In other cases, we should
10451 have cleared the PLT entry by now. */
10452 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10453
10454 value = (splt->output_section->vma
10455 + splt->output_offset
10456 + plt_offset);
10457 *unresolved_reloc_p = false;
10458 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10459 contents, rel->r_offset, value,
10460 rel->r_addend);
10461 }
10462
10463 /* When generating a shared object or relocatable executable, these
10464 relocations are copied into the output file to be resolved at
10465 run time. */
10466 if ((bfd_link_pic (info)
10467 || globals->root.is_relocatable_executable
10468 || globals->fdpic_p)
10469 && (input_section->flags & SEC_ALLOC)
10470 && !(globals->root.target_os == is_vxworks
10471 && strcmp (input_section->output_section->name,
10472 ".tls_vars") == 0)
10473 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10474 || !SYMBOL_CALLS_LOCAL (info, h))
10475 && !(input_bfd == globals->stub_bfd
10476 && strstr (input_section->name, STUB_SUFFIX))
10477 && (h == NULL
10478 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10479 && !resolved_to_zero)
10480 || h->root.type != bfd_link_hash_undefweak)
10481 && r_type != R_ARM_PC24
10482 && r_type != R_ARM_CALL
10483 && r_type != R_ARM_JUMP24
10484 && r_type != R_ARM_PREL31
10485 && r_type != R_ARM_PLT32)
10486 {
10487 Elf_Internal_Rela outrel;
10488 bool skip, relocate;
10489 int isrofixup = 0;
10490
10491 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10492 && !h->def_regular)
10493 {
10494 char *v = _("shared object");
10495
10496 if (bfd_link_executable (info))
10497 v = _("PIE executable");
10498
10499 _bfd_error_handler
10500 (_("%pB: relocation %s against external or undefined symbol `%s'"
10501 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10502 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10503 return bfd_reloc_notsupported;
10504 }
10505
10506 *unresolved_reloc_p = false;
10507
10508 if (sreloc == NULL && globals->root.dynamic_sections_created)
10509 {
10510 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10511 ! globals->use_rel);
10512
10513 if (sreloc == NULL)
10514 return bfd_reloc_notsupported;
10515 }
10516
10517 skip = false;
10518 relocate = false;
10519
10520 outrel.r_addend = addend;
10521 outrel.r_offset =
10522 _bfd_elf_section_offset (output_bfd, info, input_section,
10523 rel->r_offset);
10524 if (outrel.r_offset == (bfd_vma) -1)
10525 skip = true;
10526 else if (outrel.r_offset == (bfd_vma) -2)
10527 skip = true, relocate = true;
10528 outrel.r_offset += (input_section->output_section->vma
10529 + input_section->output_offset);
10530
10531 if (skip)
10532 memset (&outrel, 0, sizeof outrel);
10533 else if (h != NULL
10534 && h->dynindx != -1
10535 && (!bfd_link_pic (info)
10536 || !(bfd_link_pie (info)
10537 || SYMBOLIC_BIND (info, h))
10538 || !h->def_regular))
10539 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10540 else
10541 {
10542 int symbol;
10543
10544 /* This symbol is local, or marked to become local. */
10545 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI
10546 || (globals->fdpic_p && !bfd_link_pic(info)));
10547 /* On SVR4-ish systems, the dynamic loader cannot
10548 relocate the text and data segments independently,
10549 so the symbol does not matter. */
10550 symbol = 0;
10551 if (dynreloc_st_type == STT_GNU_IFUNC)
10552 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10553 to the .iplt entry. Instead, every non-call reference
10554 must use an R_ARM_IRELATIVE relocation to obtain the
10555 correct run-time address. */
10556 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10557 else if (globals->fdpic_p && !bfd_link_pic(info))
10558 isrofixup = 1;
10559 else
10560 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10561 if (globals->use_rel)
10562 relocate = true;
10563 else
10564 outrel.r_addend += dynreloc_value;
10565 }
10566
10567 if (isrofixup)
10568 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
10569 else
10570 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10571
10572 /* If this reloc is against an external symbol, we do not want to
10573 fiddle with the addend. Otherwise, we need to include the symbol
10574 value so that it becomes an addend for the dynamic reloc. */
10575 if (! relocate)
10576 return bfd_reloc_ok;
10577
10578 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10579 contents, rel->r_offset,
10580 dynreloc_value, (bfd_vma) 0);
10581 }
10582 else switch (r_type)
10583 {
10584 case R_ARM_ABS12:
10585 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10586
10587 case R_ARM_XPC25: /* Arm BLX instruction. */
10588 case R_ARM_CALL:
10589 case R_ARM_JUMP24:
10590 case R_ARM_PC24: /* Arm B/BL instruction. */
10591 case R_ARM_PLT32:
10592 {
10593 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10594
10595 if (r_type == R_ARM_XPC25)
10596 {
10597 /* Check for Arm calling Arm function. */
10598 /* FIXME: Should we translate the instruction into a BL
10599 instruction instead ? */
10600 if (branch_type != ST_BRANCH_TO_THUMB)
10601 _bfd_error_handler
10602 (_("\%pB: warning: %s BLX instruction targets"
10603 " %s function '%s'"),
10604 input_bfd, "ARM",
10605 "ARM", h ? h->root.root.string : "(local)");
10606 }
10607 else if (r_type == R_ARM_PC24)
10608 {
10609 /* Check for Arm calling Thumb function. */
10610 if (branch_type == ST_BRANCH_TO_THUMB)
10611 {
10612 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10613 output_bfd, input_section,
10614 hit_data, sym_sec, rel->r_offset,
10615 signed_addend, value,
10616 error_message))
10617 return bfd_reloc_ok;
10618 else
10619 return bfd_reloc_dangerous;
10620 }
10621 }
10622
10623 /* Check if a stub has to be inserted because the
10624 destination is too far or we are changing mode. */
10625 if ( r_type == R_ARM_CALL
10626 || r_type == R_ARM_JUMP24
10627 || r_type == R_ARM_PLT32)
10628 {
10629 enum elf32_arm_stub_type stub_type = arm_stub_none;
10630 struct elf32_arm_link_hash_entry *hash;
10631
10632 hash = (struct elf32_arm_link_hash_entry *) h;
10633 stub_type = arm_type_of_stub (info, input_section, rel,
10634 st_type, &branch_type,
10635 hash, value, sym_sec,
10636 input_bfd, sym_name);
10637
10638 if (stub_type != arm_stub_none)
10639 {
10640 /* The target is out of reach, so redirect the
10641 branch to the local stub for this function. */
10642 stub_entry = elf32_arm_get_stub_entry (input_section,
10643 sym_sec, h,
10644 rel, globals,
10645 stub_type);
10646 {
10647 if (stub_entry != NULL)
10648 value = (stub_entry->stub_offset
10649 + stub_entry->stub_sec->output_offset
10650 + stub_entry->stub_sec->output_section->vma);
10651
10652 if (plt_offset != (bfd_vma) -1)
10653 *unresolved_reloc_p = false;
10654 }
10655 }
10656 else
10657 {
10658 /* If the call goes through a PLT entry, make sure to
10659 check distance to the right destination address. */
10660 if (plt_offset != (bfd_vma) -1)
10661 {
10662 value = (splt->output_section->vma
10663 + splt->output_offset
10664 + plt_offset);
10665 *unresolved_reloc_p = false;
10666 /* The PLT entry is in ARM mode, regardless of the
10667 target function. */
10668 branch_type = ST_BRANCH_TO_ARM;
10669 }
10670 }
10671 }
10672
10673 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10674 where:
10675 S is the address of the symbol in the relocation.
10676 P is address of the instruction being relocated.
10677 A is the addend (extracted from the instruction) in bytes.
10678
10679 S is held in 'value'.
10680 P is the base address of the section containing the
10681 instruction plus the offset of the reloc into that
10682 section, ie:
10683 (input_section->output_section->vma +
10684 input_section->output_offset +
10685 rel->r_offset).
10686 A is the addend, converted into bytes, ie:
10687 (signed_addend * 4)
10688
10689 Note: None of these operations have knowledge of the pipeline
10690 size of the processor, thus it is up to the assembler to
10691 encode this information into the addend. */
10692 value -= (input_section->output_section->vma
10693 + input_section->output_offset);
10694 value -= rel->r_offset;
10695 value += signed_addend;
10696
10697 signed_addend = value;
10698 signed_addend >>= howto->rightshift;
10699
10700 /* A branch to an undefined weak symbol is turned into a jump to
10701 the next instruction unless a PLT entry will be created.
10702 Do the same for local undefined symbols (but not for STN_UNDEF).
10703 The jump to the next instruction is optimized as a NOP depending
10704 on the architecture. */
10705 if (h ? (h->root.type == bfd_link_hash_undefweak
10706 && plt_offset == (bfd_vma) -1)
10707 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10708 {
10709 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10710
10711 if (arch_has_arm_nop (globals))
10712 value |= 0x0320f000;
10713 else
10714 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10715 }
10716 else
10717 {
10718 /* Perform a signed range check. */
10719 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10720 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10721 return bfd_reloc_overflow;
10722
10723 addend = (value & 2);
10724
10725 value = (signed_addend & howto->dst_mask)
10726 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10727
10728 if (r_type == R_ARM_CALL)
10729 {
10730 /* Set the H bit in the BLX instruction. */
10731 if (branch_type == ST_BRANCH_TO_THUMB)
10732 {
10733 if (addend)
10734 value |= (1 << 24);
10735 else
10736 value &= ~(bfd_vma)(1 << 24);
10737 }
10738
10739 /* Select the correct instruction (BL or BLX). */
10740 /* Only if we are not handling a BL to a stub. In this
10741 case, mode switching is performed by the stub. */
10742 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10743 value |= (1 << 28);
10744 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10745 {
10746 value &= ~(bfd_vma)(1 << 28);
10747 value |= (1 << 24);
10748 }
10749 }
10750 }
10751 }
10752 break;
10753
10754 case R_ARM_ABS32:
10755 value += addend;
10756 if (branch_type == ST_BRANCH_TO_THUMB)
10757 value |= 1;
10758 break;
10759
10760 case R_ARM_ABS32_NOI:
10761 value += addend;
10762 break;
10763
10764 case R_ARM_REL32:
10765 value += addend;
10766 if (branch_type == ST_BRANCH_TO_THUMB)
10767 value |= 1;
10768 value -= (input_section->output_section->vma
10769 + input_section->output_offset + rel->r_offset);
10770 break;
10771
10772 case R_ARM_REL32_NOI:
10773 value += addend;
10774 value -= (input_section->output_section->vma
10775 + input_section->output_offset + rel->r_offset);
10776 break;
10777
10778 case R_ARM_PREL31:
10779 value -= (input_section->output_section->vma
10780 + input_section->output_offset + rel->r_offset);
10781 value += signed_addend;
10782 if (! h || h->root.type != bfd_link_hash_undefweak)
10783 {
10784 /* Check for overflow. */
10785 if ((value ^ (value >> 1)) & (1 << 30))
10786 return bfd_reloc_overflow;
10787 }
10788 value &= 0x7fffffff;
10789 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10790 if (branch_type == ST_BRANCH_TO_THUMB)
10791 value |= 1;
10792 break;
10793 }
10794
10795 bfd_put_32 (input_bfd, value, hit_data);
10796 return bfd_reloc_ok;
10797
10798 case R_ARM_ABS8:
10799 value += addend;
10800
10801 /* There is no way to tell whether the user intended to use a signed or
10802 unsigned addend. When checking for overflow we accept either,
10803 as specified by the AAELF. */
10804 if ((long) value > 0xff || (long) value < -0x80)
10805 return bfd_reloc_overflow;
10806
10807 bfd_put_8 (input_bfd, value, hit_data);
10808 return bfd_reloc_ok;
10809
10810 case R_ARM_ABS16:
10811 value += addend;
10812
10813 /* See comment for R_ARM_ABS8. */
10814 if ((long) value > 0xffff || (long) value < -0x8000)
10815 return bfd_reloc_overflow;
10816
10817 bfd_put_16 (input_bfd, value, hit_data);
10818 return bfd_reloc_ok;
10819
10820 case R_ARM_THM_ABS5:
10821 /* Support ldr and str instructions for the thumb. */
10822 if (globals->use_rel)
10823 {
10824 /* Need to refetch addend. */
10825 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10826 /* ??? Need to determine shift amount from operand size. */
10827 addend >>= howto->rightshift;
10828 }
10829 value += addend;
10830
10831 /* ??? Isn't value unsigned? */
10832 if ((long) value > 0x1f || (long) value < -0x10)
10833 return bfd_reloc_overflow;
10834
10835 /* ??? Value needs to be properly shifted into place first. */
10836 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10837 bfd_put_16 (input_bfd, value, hit_data);
10838 return bfd_reloc_ok;
10839
10840 case R_ARM_THM_ALU_PREL_11_0:
10841 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10842 {
10843 bfd_vma insn;
10844 bfd_signed_vma relocation;
10845
10846 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10847 | bfd_get_16 (input_bfd, hit_data + 2);
10848
10849 if (globals->use_rel)
10850 {
10851 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10852 | ((insn & (1 << 26)) >> 15);
10853 if (insn & 0xf00000)
10854 signed_addend = -signed_addend;
10855 }
10856
10857 relocation = value + signed_addend;
10858 relocation -= Pa (input_section->output_section->vma
10859 + input_section->output_offset
10860 + rel->r_offset);
10861
10862 /* PR 21523: Use an absolute value. The user of this reloc will
10863 have already selected an ADD or SUB insn appropriately. */
10864 value = llabs (relocation);
10865
10866 if (value >= 0x1000)
10867 return bfd_reloc_overflow;
10868
10869 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10870 if (branch_type == ST_BRANCH_TO_THUMB)
10871 value |= 1;
10872
10873 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10874 | ((value & 0x700) << 4)
10875 | ((value & 0x800) << 15);
10876 if (relocation < 0)
10877 insn |= 0xa00000;
10878
10879 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10880 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10881
10882 return bfd_reloc_ok;
10883 }
10884
10885 case R_ARM_THM_PC8:
10886 /* PR 10073: This reloc is not generated by the GNU toolchain,
10887 but it is supported for compatibility with third party libraries
10888 generated by other compilers, specifically the ARM/IAR. */
10889 {
10890 bfd_vma insn;
10891 bfd_signed_vma relocation;
10892
10893 insn = bfd_get_16 (input_bfd, hit_data);
10894
10895 if (globals->use_rel)
10896 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10897
10898 relocation = value + addend;
10899 relocation -= Pa (input_section->output_section->vma
10900 + input_section->output_offset
10901 + rel->r_offset);
10902
10903 value = relocation;
10904
10905 /* We do not check for overflow of this reloc. Although strictly
10906 speaking this is incorrect, it appears to be necessary in order
10907 to work with IAR generated relocs. Since GCC and GAS do not
10908 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10909 a problem for them. */
10910 value &= 0x3fc;
10911
10912 insn = (insn & 0xff00) | (value >> 2);
10913
10914 bfd_put_16 (input_bfd, insn, hit_data);
10915
10916 return bfd_reloc_ok;
10917 }
10918
10919 case R_ARM_THM_PC12:
10920 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10921 {
10922 bfd_vma insn;
10923 bfd_signed_vma relocation;
10924
10925 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10926 | bfd_get_16 (input_bfd, hit_data + 2);
10927
10928 if (globals->use_rel)
10929 {
10930 signed_addend = insn & 0xfff;
10931 if (!(insn & (1 << 23)))
10932 signed_addend = -signed_addend;
10933 }
10934
10935 relocation = value + signed_addend;
10936 relocation -= Pa (input_section->output_section->vma
10937 + input_section->output_offset
10938 + rel->r_offset);
10939
10940 value = relocation;
10941
10942 if (value >= 0x1000)
10943 return bfd_reloc_overflow;
10944
10945 insn = (insn & 0xff7ff000) | value;
10946 if (relocation >= 0)
10947 insn |= (1 << 23);
10948
10949 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10950 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10951
10952 return bfd_reloc_ok;
10953 }
10954
10955 case R_ARM_THM_XPC22:
10956 case R_ARM_THM_CALL:
10957 case R_ARM_THM_JUMP24:
10958 /* Thumb BL (branch long instruction). */
10959 {
10960 bfd_vma relocation;
10961 bfd_vma reloc_sign;
10962 bool overflow = false;
10963 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10964 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10965 bfd_signed_vma reloc_signed_max;
10966 bfd_signed_vma reloc_signed_min;
10967 bfd_vma check;
10968 bfd_signed_vma signed_check;
10969 int bitsize;
10970 const int thumb2 = using_thumb2 (globals);
10971 const int thumb2_bl = using_thumb2_bl (globals);
10972
10973 /* A branch to an undefined weak symbol is turned into a jump to
10974 the next instruction unless a PLT entry will be created.
10975 The jump to the next instruction is optimized as a NOP.W for
10976 Thumb-2 enabled architectures. */
10977 if (h && h->root.type == bfd_link_hash_undefweak
10978 && plt_offset == (bfd_vma) -1)
10979 {
10980 if (thumb2)
10981 {
10982 bfd_put_16 (input_bfd, 0xf3af, hit_data);
10983 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
10984 }
10985 else
10986 {
10987 bfd_put_16 (input_bfd, 0xe000, hit_data);
10988 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
10989 }
10990 return bfd_reloc_ok;
10991 }
10992
10993 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
10994 with Thumb-1) involving the J1 and J2 bits. */
10995 if (globals->use_rel)
10996 {
10997 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
10998 bfd_vma upper = upper_insn & 0x3ff;
10999 bfd_vma lower = lower_insn & 0x7ff;
11000 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
11001 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
11002 bfd_vma i1 = j1 ^ s ? 0 : 1;
11003 bfd_vma i2 = j2 ^ s ? 0 : 1;
11004
11005 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
11006 /* Sign extend. */
11007 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
11008
11009 signed_addend = addend;
11010 }
11011
11012 if (r_type == R_ARM_THM_XPC22)
11013 {
11014 /* Check for Thumb to Thumb call. */
11015 /* FIXME: Should we translate the instruction into a BL
11016 instruction instead ? */
11017 if (branch_type == ST_BRANCH_TO_THUMB)
11018 _bfd_error_handler
11019 (_("%pB: warning: %s BLX instruction targets"
11020 " %s function '%s'"),
11021 input_bfd, "Thumb",
11022 "Thumb", h ? h->root.root.string : "(local)");
11023 }
11024 else
11025 {
11026 /* If it is not a call to Thumb, assume call to Arm.
11027 If it is a call relative to a section name, then it is not a
11028 function call at all, but rather a long jump. Calls through
11029 the PLT do not require stubs. */
11030 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
11031 {
11032 if (globals->use_blx && r_type == R_ARM_THM_CALL)
11033 {
11034 /* Convert BL to BLX. */
11035 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11036 }
11037 else if (( r_type != R_ARM_THM_CALL)
11038 && (r_type != R_ARM_THM_JUMP24))
11039 {
11040 if (elf32_thumb_to_arm_stub
11041 (info, sym_name, input_bfd, output_bfd, input_section,
11042 hit_data, sym_sec, rel->r_offset, signed_addend, value,
11043 error_message))
11044 return bfd_reloc_ok;
11045 else
11046 return bfd_reloc_dangerous;
11047 }
11048 }
11049 else if (branch_type == ST_BRANCH_TO_THUMB
11050 && globals->use_blx
11051 && r_type == R_ARM_THM_CALL)
11052 {
11053 /* Make sure this is a BL. */
11054 lower_insn |= 0x1800;
11055 }
11056 }
11057
11058 enum elf32_arm_stub_type stub_type = arm_stub_none;
11059 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
11060 {
11061 /* Check if a stub has to be inserted because the destination
11062 is too far. */
11063 struct elf32_arm_stub_hash_entry *stub_entry;
11064 struct elf32_arm_link_hash_entry *hash;
11065
11066 hash = (struct elf32_arm_link_hash_entry *) h;
11067
11068 stub_type = arm_type_of_stub (info, input_section, rel,
11069 st_type, &branch_type,
11070 hash, value, sym_sec,
11071 input_bfd, sym_name);
11072
11073 if (stub_type != arm_stub_none)
11074 {
11075 /* The target is out of reach or we are changing modes, so
11076 redirect the branch to the local stub for this
11077 function. */
11078 stub_entry = elf32_arm_get_stub_entry (input_section,
11079 sym_sec, h,
11080 rel, globals,
11081 stub_type);
11082 if (stub_entry != NULL)
11083 {
11084 value = (stub_entry->stub_offset
11085 + stub_entry->stub_sec->output_offset
11086 + stub_entry->stub_sec->output_section->vma);
11087
11088 if (plt_offset != (bfd_vma) -1)
11089 *unresolved_reloc_p = false;
11090 }
11091
11092 /* If this call becomes a call to Arm, force BLX. */
11093 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
11094 {
11095 if ((stub_entry
11096 && !arm_stub_is_thumb (stub_entry->stub_type))
11097 || branch_type != ST_BRANCH_TO_THUMB)
11098 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11099 }
11100 }
11101 }
11102
11103 /* Handle calls via the PLT. */
11104 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
11105 {
11106 value = (splt->output_section->vma
11107 + splt->output_offset
11108 + plt_offset);
11109
11110 if (globals->use_blx
11111 && r_type == R_ARM_THM_CALL
11112 && ! using_thumb_only (globals))
11113 {
11114 /* If the Thumb BLX instruction is available, convert
11115 the BL to a BLX instruction to call the ARM-mode
11116 PLT entry. */
11117 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11118 branch_type = ST_BRANCH_TO_ARM;
11119 }
11120 else
11121 {
11122 if (! using_thumb_only (globals))
11123 /* Target the Thumb stub before the ARM PLT entry. */
11124 value -= PLT_THUMB_STUB_SIZE;
11125 branch_type = ST_BRANCH_TO_THUMB;
11126 }
11127 *unresolved_reloc_p = false;
11128 }
11129
11130 relocation = value + signed_addend;
11131
11132 relocation -= (input_section->output_section->vma
11133 + input_section->output_offset
11134 + rel->r_offset);
11135
11136 check = relocation >> howto->rightshift;
11137
11138 /* If this is a signed value, the rightshift just dropped
11139 leading 1 bits (assuming twos complement). */
11140 if ((bfd_signed_vma) relocation >= 0)
11141 signed_check = check;
11142 else
11143 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
11144
11145 /* Calculate the permissable maximum and minimum values for
11146 this relocation according to whether we're relocating for
11147 Thumb-2 or not. */
11148 bitsize = howto->bitsize;
11149 if (!thumb2_bl)
11150 bitsize -= 2;
11151 reloc_signed_max = (1 << (bitsize - 1)) - 1;
11152 reloc_signed_min = ~reloc_signed_max;
11153
11154 /* Assumes two's complement. */
11155 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11156 overflow = true;
11157
11158 if ((lower_insn & 0x5000) == 0x4000)
11159 /* For a BLX instruction, make sure that the relocation is rounded up
11160 to a word boundary. This follows the semantics of the instruction
11161 which specifies that bit 1 of the target address will come from bit
11162 1 of the base address. */
11163 relocation = (relocation + 2) & ~ 3;
11164
11165 /* Put RELOCATION back into the insn. Assumes two's complement.
11166 We use the Thumb-2 encoding, which is safe even if dealing with
11167 a Thumb-1 instruction by virtue of our overflow check above. */
11168 reloc_sign = (signed_check < 0) ? 1 : 0;
11169 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
11170 | ((relocation >> 12) & 0x3ff)
11171 | (reloc_sign << 10);
11172 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
11173 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
11174 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
11175 | ((relocation >> 1) & 0x7ff);
11176
11177 /* Put the relocated value back in the object file: */
11178 bfd_put_16 (input_bfd, upper_insn, hit_data);
11179 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11180
11181 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11182 }
11183 break;
11184
11185 case R_ARM_THM_JUMP19:
11186 /* Thumb32 conditional branch instruction. */
11187 {
11188 bfd_vma relocation;
11189 bool overflow = false;
11190 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11191 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11192 bfd_signed_vma reloc_signed_max = 0xffffe;
11193 bfd_signed_vma reloc_signed_min = -0x100000;
11194 bfd_signed_vma signed_check;
11195 enum elf32_arm_stub_type stub_type = arm_stub_none;
11196 struct elf32_arm_stub_hash_entry *stub_entry;
11197 struct elf32_arm_link_hash_entry *hash;
11198
11199 /* Need to refetch the addend, reconstruct the top three bits,
11200 and squish the two 11 bit pieces together. */
11201 if (globals->use_rel)
11202 {
11203 bfd_vma S = (upper_insn & 0x0400) >> 10;
11204 bfd_vma upper = (upper_insn & 0x003f);
11205 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
11206 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
11207 bfd_vma lower = (lower_insn & 0x07ff);
11208
11209 upper |= J1 << 6;
11210 upper |= J2 << 7;
11211 upper |= (!S) << 8;
11212 upper -= 0x0100; /* Sign extend. */
11213
11214 addend = (upper << 12) | (lower << 1);
11215 signed_addend = addend;
11216 }
11217
11218 /* Handle calls via the PLT. */
11219 if (plt_offset != (bfd_vma) -1)
11220 {
11221 value = (splt->output_section->vma
11222 + splt->output_offset
11223 + plt_offset);
11224 /* Target the Thumb stub before the ARM PLT entry. */
11225 value -= PLT_THUMB_STUB_SIZE;
11226 *unresolved_reloc_p = false;
11227 }
11228
11229 hash = (struct elf32_arm_link_hash_entry *)h;
11230
11231 stub_type = arm_type_of_stub (info, input_section, rel,
11232 st_type, &branch_type,
11233 hash, value, sym_sec,
11234 input_bfd, sym_name);
11235 if (stub_type != arm_stub_none)
11236 {
11237 stub_entry = elf32_arm_get_stub_entry (input_section,
11238 sym_sec, h,
11239 rel, globals,
11240 stub_type);
11241 if (stub_entry != NULL)
11242 {
11243 value = (stub_entry->stub_offset
11244 + stub_entry->stub_sec->output_offset
11245 + stub_entry->stub_sec->output_section->vma);
11246 }
11247 }
11248
11249 relocation = value + signed_addend;
11250 relocation -= (input_section->output_section->vma
11251 + input_section->output_offset
11252 + rel->r_offset);
11253 signed_check = (bfd_signed_vma) relocation;
11254
11255 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11256 overflow = true;
11257
11258 /* Put RELOCATION back into the insn. */
11259 {
11260 bfd_vma S = (relocation & 0x00100000) >> 20;
11261 bfd_vma J2 = (relocation & 0x00080000) >> 19;
11262 bfd_vma J1 = (relocation & 0x00040000) >> 18;
11263 bfd_vma hi = (relocation & 0x0003f000) >> 12;
11264 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
11265
11266 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
11267 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
11268 }
11269
11270 /* Put the relocated value back in the object file: */
11271 bfd_put_16 (input_bfd, upper_insn, hit_data);
11272 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11273
11274 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11275 }
11276
11277 case R_ARM_THM_JUMP11:
11278 case R_ARM_THM_JUMP8:
11279 case R_ARM_THM_JUMP6:
11280 /* Thumb B (branch) instruction). */
11281 {
11282 bfd_signed_vma relocation;
11283 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
11284 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
11285 bfd_signed_vma signed_check;
11286
11287 /* CZB cannot jump backward. */
11288 if (r_type == R_ARM_THM_JUMP6)
11289 {
11290 reloc_signed_min = 0;
11291 if (globals->use_rel)
11292 signed_addend = ((addend & 0x200) >> 3) | ((addend & 0xf8) >> 2);
11293 }
11294
11295 relocation = value + signed_addend;
11296
11297 relocation -= (input_section->output_section->vma
11298 + input_section->output_offset
11299 + rel->r_offset);
11300
11301 relocation >>= howto->rightshift;
11302 signed_check = relocation;
11303
11304 if (r_type == R_ARM_THM_JUMP6)
11305 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
11306 else
11307 relocation &= howto->dst_mask;
11308 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
11309
11310 bfd_put_16 (input_bfd, relocation, hit_data);
11311
11312 /* Assumes two's complement. */
11313 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11314 return bfd_reloc_overflow;
11315
11316 return bfd_reloc_ok;
11317 }
11318
11319 case R_ARM_ALU_PCREL7_0:
11320 case R_ARM_ALU_PCREL15_8:
11321 case R_ARM_ALU_PCREL23_15:
11322 {
11323 bfd_vma insn;
11324 bfd_vma relocation;
11325
11326 insn = bfd_get_32 (input_bfd, hit_data);
11327 if (globals->use_rel)
11328 {
11329 /* Extract the addend. */
11330 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
11331 signed_addend = addend;
11332 }
11333 relocation = value + signed_addend;
11334
11335 relocation -= (input_section->output_section->vma
11336 + input_section->output_offset
11337 + rel->r_offset);
11338 insn = (insn & ~0xfff)
11339 | ((howto->bitpos << 7) & 0xf00)
11340 | ((relocation >> howto->bitpos) & 0xff);
11341 bfd_put_32 (input_bfd, value, hit_data);
11342 }
11343 return bfd_reloc_ok;
11344
11345 case R_ARM_GNU_VTINHERIT:
11346 case R_ARM_GNU_VTENTRY:
11347 return bfd_reloc_ok;
11348
11349 case R_ARM_GOTOFF32:
11350 /* Relocation is relative to the start of the
11351 global offset table. */
11352
11353 BFD_ASSERT (sgot != NULL);
11354 if (sgot == NULL)
11355 return bfd_reloc_notsupported;
11356
11357 /* If we are addressing a Thumb function, we need to adjust the
11358 address by one, so that attempts to call the function pointer will
11359 correctly interpret it as Thumb code. */
11360 if (branch_type == ST_BRANCH_TO_THUMB)
11361 value += 1;
11362
11363 /* Note that sgot->output_offset is not involved in this
11364 calculation. We always want the start of .got. If we
11365 define _GLOBAL_OFFSET_TABLE in a different way, as is
11366 permitted by the ABI, we might have to change this
11367 calculation. */
11368 value -= sgot->output_section->vma;
11369 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11370 contents, rel->r_offset, value,
11371 rel->r_addend);
11372
11373 case R_ARM_GOTPC:
11374 /* Use global offset table as symbol value. */
11375 BFD_ASSERT (sgot != NULL);
11376
11377 if (sgot == NULL)
11378 return bfd_reloc_notsupported;
11379
11380 *unresolved_reloc_p = false;
11381 value = sgot->output_section->vma;
11382 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11383 contents, rel->r_offset, value,
11384 rel->r_addend);
11385
11386 case R_ARM_GOT32:
11387 case R_ARM_GOT_PREL:
11388 /* Relocation is to the entry for this symbol in the
11389 global offset table. */
11390 if (sgot == NULL)
11391 return bfd_reloc_notsupported;
11392
11393 if (dynreloc_st_type == STT_GNU_IFUNC
11394 && plt_offset != (bfd_vma) -1
11395 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11396 {
11397 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11398 symbol, and the relocation resolves directly to the runtime
11399 target rather than to the .iplt entry. This means that any
11400 .got entry would be the same value as the .igot.plt entry,
11401 so there's no point creating both. */
11402 sgot = globals->root.igotplt;
11403 value = sgot->output_offset + gotplt_offset;
11404 }
11405 else if (h != NULL)
11406 {
11407 bfd_vma off;
11408
11409 off = h->got.offset;
11410 BFD_ASSERT (off != (bfd_vma) -1);
11411 if ((off & 1) != 0)
11412 {
11413 /* We have already processsed one GOT relocation against
11414 this symbol. */
11415 off &= ~1;
11416 if (globals->root.dynamic_sections_created
11417 && !SYMBOL_REFERENCES_LOCAL (info, h))
11418 *unresolved_reloc_p = false;
11419 }
11420 else
11421 {
11422 Elf_Internal_Rela outrel;
11423 int isrofixup = 0;
11424
11425 if (((h->dynindx != -1) || globals->fdpic_p)
11426 && !SYMBOL_REFERENCES_LOCAL (info, h))
11427 {
11428 /* If the symbol doesn't resolve locally in a static
11429 object, we have an undefined reference. If the
11430 symbol doesn't resolve locally in a dynamic object,
11431 it should be resolved by the dynamic linker. */
11432 if (globals->root.dynamic_sections_created)
11433 {
11434 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11435 *unresolved_reloc_p = false;
11436 }
11437 else
11438 outrel.r_info = 0;
11439 outrel.r_addend = 0;
11440 }
11441 else
11442 {
11443 if (dynreloc_st_type == STT_GNU_IFUNC)
11444 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11445 else if (bfd_link_pic (info)
11446 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
11447 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11448 else
11449 {
11450 outrel.r_info = 0;
11451 if (globals->fdpic_p)
11452 isrofixup = 1;
11453 }
11454 outrel.r_addend = dynreloc_value;
11455 }
11456
11457 /* The GOT entry is initialized to zero by default.
11458 See if we should install a different value. */
11459 if (outrel.r_addend != 0
11460 && (globals->use_rel || outrel.r_info == 0))
11461 {
11462 bfd_put_32 (output_bfd, outrel.r_addend,
11463 sgot->contents + off);
11464 outrel.r_addend = 0;
11465 }
11466
11467 if (isrofixup)
11468 arm_elf_add_rofixup (output_bfd,
11469 elf32_arm_hash_table(info)->srofixup,
11470 sgot->output_section->vma
11471 + sgot->output_offset + off);
11472
11473 else if (outrel.r_info != 0)
11474 {
11475 outrel.r_offset = (sgot->output_section->vma
11476 + sgot->output_offset
11477 + off);
11478 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11479 }
11480
11481 h->got.offset |= 1;
11482 }
11483 value = sgot->output_offset + off;
11484 }
11485 else
11486 {
11487 bfd_vma off;
11488
11489 BFD_ASSERT (local_got_offsets != NULL
11490 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11491
11492 off = local_got_offsets[r_symndx];
11493
11494 /* The offset must always be a multiple of 4. We use the
11495 least significant bit to record whether we have already
11496 generated the necessary reloc. */
11497 if ((off & 1) != 0)
11498 off &= ~1;
11499 else
11500 {
11501 Elf_Internal_Rela outrel;
11502 int isrofixup = 0;
11503
11504 if (dynreloc_st_type == STT_GNU_IFUNC)
11505 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11506 else if (bfd_link_pic (info))
11507 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11508 else
11509 {
11510 outrel.r_info = 0;
11511 if (globals->fdpic_p)
11512 isrofixup = 1;
11513 }
11514
11515 /* The GOT entry is initialized to zero by default.
11516 See if we should install a different value. */
11517 if (globals->use_rel || outrel.r_info == 0)
11518 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11519
11520 if (isrofixup)
11521 arm_elf_add_rofixup (output_bfd,
11522 globals->srofixup,
11523 sgot->output_section->vma
11524 + sgot->output_offset + off);
11525
11526 else if (outrel.r_info != 0)
11527 {
11528 outrel.r_addend = addend + dynreloc_value;
11529 outrel.r_offset = (sgot->output_section->vma
11530 + sgot->output_offset
11531 + off);
11532 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11533 }
11534
11535 local_got_offsets[r_symndx] |= 1;
11536 }
11537
11538 value = sgot->output_offset + off;
11539 }
11540 if (r_type != R_ARM_GOT32)
11541 value += sgot->output_section->vma;
11542
11543 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11544 contents, rel->r_offset, value,
11545 rel->r_addend);
11546
11547 case R_ARM_TLS_LDO32:
11548 value = value - dtpoff_base (info);
11549
11550 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11551 contents, rel->r_offset, value,
11552 rel->r_addend);
11553
11554 case R_ARM_TLS_LDM32:
11555 case R_ARM_TLS_LDM32_FDPIC:
11556 {
11557 bfd_vma off;
11558
11559 if (sgot == NULL)
11560 abort ();
11561
11562 off = globals->tls_ldm_got.offset;
11563
11564 if ((off & 1) != 0)
11565 off &= ~1;
11566 else
11567 {
11568 /* If we don't know the module number, create a relocation
11569 for it. */
11570 if (bfd_link_dll (info))
11571 {
11572 Elf_Internal_Rela outrel;
11573
11574 if (srelgot == NULL)
11575 abort ();
11576
11577 outrel.r_addend = 0;
11578 outrel.r_offset = (sgot->output_section->vma
11579 + sgot->output_offset + off);
11580 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11581
11582 if (globals->use_rel)
11583 bfd_put_32 (output_bfd, outrel.r_addend,
11584 sgot->contents + off);
11585
11586 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11587 }
11588 else
11589 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11590
11591 globals->tls_ldm_got.offset |= 1;
11592 }
11593
11594 if (r_type == R_ARM_TLS_LDM32_FDPIC)
11595 {
11596 bfd_put_32(output_bfd,
11597 globals->root.sgot->output_offset + off,
11598 contents + rel->r_offset);
11599
11600 return bfd_reloc_ok;
11601 }
11602 else
11603 {
11604 value = sgot->output_section->vma + sgot->output_offset + off
11605 - (input_section->output_section->vma
11606 + input_section->output_offset + rel->r_offset);
11607
11608 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11609 contents, rel->r_offset, value,
11610 rel->r_addend);
11611 }
11612 }
11613
11614 case R_ARM_TLS_CALL:
11615 case R_ARM_THM_TLS_CALL:
11616 case R_ARM_TLS_GD32:
11617 case R_ARM_TLS_GD32_FDPIC:
11618 case R_ARM_TLS_IE32:
11619 case R_ARM_TLS_IE32_FDPIC:
11620 case R_ARM_TLS_GOTDESC:
11621 case R_ARM_TLS_DESCSEQ:
11622 case R_ARM_THM_TLS_DESCSEQ:
11623 {
11624 bfd_vma off, offplt;
11625 int indx = 0;
11626 char tls_type;
11627
11628 BFD_ASSERT (sgot != NULL);
11629
11630 if (h != NULL)
11631 {
11632 bool dyn;
11633 dyn = globals->root.dynamic_sections_created;
11634 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11635 bfd_link_pic (info),
11636 h)
11637 && (!bfd_link_pic (info)
11638 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11639 {
11640 *unresolved_reloc_p = false;
11641 indx = h->dynindx;
11642 }
11643 off = h->got.offset;
11644 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11645 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11646 }
11647 else
11648 {
11649 BFD_ASSERT (local_got_offsets != NULL);
11650 off = local_got_offsets[r_symndx];
11651 offplt = local_tlsdesc_gotents[r_symndx];
11652 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11653 }
11654
11655 /* Linker relaxations happens from one of the
11656 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11657 if (ELF32_R_TYPE(rel->r_info) != r_type)
11658 tls_type = GOT_TLS_IE;
11659
11660 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11661
11662 if ((off & 1) != 0)
11663 off &= ~1;
11664 else
11665 {
11666 bool need_relocs = false;
11667 Elf_Internal_Rela outrel;
11668 int cur_off = off;
11669
11670 /* The GOT entries have not been initialized yet. Do it
11671 now, and emit any relocations. If both an IE GOT and a
11672 GD GOT are necessary, we emit the GD first. */
11673
11674 if ((bfd_link_dll (info) || indx != 0)
11675 && (h == NULL
11676 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11677 && !resolved_to_zero)
11678 || h->root.type != bfd_link_hash_undefweak))
11679 {
11680 need_relocs = true;
11681 BFD_ASSERT (srelgot != NULL);
11682 }
11683
11684 if (tls_type & GOT_TLS_GDESC)
11685 {
11686 bfd_byte *loc;
11687
11688 /* We should have relaxed, unless this is an undefined
11689 weak symbol. */
11690 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11691 || bfd_link_dll (info));
11692 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11693 <= globals->root.sgotplt->size);
11694
11695 outrel.r_addend = 0;
11696 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11697 + globals->root.sgotplt->output_offset
11698 + offplt
11699 + globals->sgotplt_jump_table_size);
11700
11701 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11702 sreloc = globals->root.srelplt;
11703 loc = sreloc->contents;
11704 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11705 BFD_ASSERT (loc + RELOC_SIZE (globals)
11706 <= sreloc->contents + sreloc->size);
11707
11708 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11709
11710 /* For globals, the first word in the relocation gets
11711 the relocation index and the top bit set, or zero,
11712 if we're binding now. For locals, it gets the
11713 symbol's offset in the tls section. */
11714 bfd_put_32 (output_bfd,
11715 !h ? value - elf_hash_table (info)->tls_sec->vma
11716 : info->flags & DF_BIND_NOW ? 0
11717 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11718 globals->root.sgotplt->contents + offplt
11719 + globals->sgotplt_jump_table_size);
11720
11721 /* Second word in the relocation is always zero. */
11722 bfd_put_32 (output_bfd, 0,
11723 globals->root.sgotplt->contents + offplt
11724 + globals->sgotplt_jump_table_size + 4);
11725 }
11726 if (tls_type & GOT_TLS_GD)
11727 {
11728 if (need_relocs)
11729 {
11730 outrel.r_addend = 0;
11731 outrel.r_offset = (sgot->output_section->vma
11732 + sgot->output_offset
11733 + cur_off);
11734 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11735
11736 if (globals->use_rel)
11737 bfd_put_32 (output_bfd, outrel.r_addend,
11738 sgot->contents + cur_off);
11739
11740 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11741
11742 if (indx == 0)
11743 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11744 sgot->contents + cur_off + 4);
11745 else
11746 {
11747 outrel.r_addend = 0;
11748 outrel.r_info = ELF32_R_INFO (indx,
11749 R_ARM_TLS_DTPOFF32);
11750 outrel.r_offset += 4;
11751
11752 if (globals->use_rel)
11753 bfd_put_32 (output_bfd, outrel.r_addend,
11754 sgot->contents + cur_off + 4);
11755
11756 elf32_arm_add_dynreloc (output_bfd, info,
11757 srelgot, &outrel);
11758 }
11759 }
11760 else
11761 {
11762 /* If we are not emitting relocations for a
11763 general dynamic reference, then we must be in a
11764 static link or an executable link with the
11765 symbol binding locally. Mark it as belonging
11766 to module 1, the executable. */
11767 bfd_put_32 (output_bfd, 1,
11768 sgot->contents + cur_off);
11769 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11770 sgot->contents + cur_off + 4);
11771 }
11772
11773 cur_off += 8;
11774 }
11775
11776 if (tls_type & GOT_TLS_IE)
11777 {
11778 if (need_relocs)
11779 {
11780 if (indx == 0)
11781 outrel.r_addend = value - dtpoff_base (info);
11782 else
11783 outrel.r_addend = 0;
11784 outrel.r_offset = (sgot->output_section->vma
11785 + sgot->output_offset
11786 + cur_off);
11787 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11788
11789 if (globals->use_rel)
11790 bfd_put_32 (output_bfd, outrel.r_addend,
11791 sgot->contents + cur_off);
11792
11793 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11794 }
11795 else
11796 bfd_put_32 (output_bfd, tpoff (info, value),
11797 sgot->contents + cur_off);
11798 cur_off += 4;
11799 }
11800
11801 if (h != NULL)
11802 h->got.offset |= 1;
11803 else
11804 local_got_offsets[r_symndx] |= 1;
11805 }
11806
11807 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32 && r_type != R_ARM_TLS_GD32_FDPIC)
11808 off += 8;
11809 else if (tls_type & GOT_TLS_GDESC)
11810 off = offplt;
11811
11812 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11813 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11814 {
11815 bfd_signed_vma offset;
11816 /* TLS stubs are arm mode. The original symbol is a
11817 data object, so branch_type is bogus. */
11818 branch_type = ST_BRANCH_TO_ARM;
11819 enum elf32_arm_stub_type stub_type
11820 = arm_type_of_stub (info, input_section, rel,
11821 st_type, &branch_type,
11822 (struct elf32_arm_link_hash_entry *)h,
11823 globals->tls_trampoline, globals->root.splt,
11824 input_bfd, sym_name);
11825
11826 if (stub_type != arm_stub_none)
11827 {
11828 struct elf32_arm_stub_hash_entry *stub_entry
11829 = elf32_arm_get_stub_entry
11830 (input_section, globals->root.splt, 0, rel,
11831 globals, stub_type);
11832 offset = (stub_entry->stub_offset
11833 + stub_entry->stub_sec->output_offset
11834 + stub_entry->stub_sec->output_section->vma);
11835 }
11836 else
11837 offset = (globals->root.splt->output_section->vma
11838 + globals->root.splt->output_offset
11839 + globals->tls_trampoline);
11840
11841 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11842 {
11843 unsigned long inst;
11844
11845 offset -= (input_section->output_section->vma
11846 + input_section->output_offset
11847 + rel->r_offset + 8);
11848
11849 inst = offset >> 2;
11850 inst &= 0x00ffffff;
11851 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11852 }
11853 else
11854 {
11855 /* Thumb blx encodes the offset in a complicated
11856 fashion. */
11857 unsigned upper_insn, lower_insn;
11858 unsigned neg;
11859
11860 offset -= (input_section->output_section->vma
11861 + input_section->output_offset
11862 + rel->r_offset + 4);
11863
11864 if (stub_type != arm_stub_none
11865 && arm_stub_is_thumb (stub_type))
11866 {
11867 lower_insn = 0xd000;
11868 }
11869 else
11870 {
11871 lower_insn = 0xc000;
11872 /* Round up the offset to a word boundary. */
11873 offset = (offset + 2) & ~2;
11874 }
11875
11876 neg = offset < 0;
11877 upper_insn = (0xf000
11878 | ((offset >> 12) & 0x3ff)
11879 | (neg << 10));
11880 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11881 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11882 | ((offset >> 1) & 0x7ff);
11883 bfd_put_16 (input_bfd, upper_insn, hit_data);
11884 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11885 return bfd_reloc_ok;
11886 }
11887 }
11888 /* These relocations needs special care, as besides the fact
11889 they point somewhere in .gotplt, the addend must be
11890 adjusted accordingly depending on the type of instruction
11891 we refer to. */
11892 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11893 {
11894 unsigned long data, insn;
11895 unsigned thumb;
11896
11897 data = bfd_get_signed_32 (input_bfd, hit_data);
11898 thumb = data & 1;
11899 data &= ~1ul;
11900
11901 if (thumb)
11902 {
11903 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11904 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11905 insn = (insn << 16)
11906 | bfd_get_16 (input_bfd,
11907 contents + rel->r_offset - data + 2);
11908 if ((insn & 0xf800c000) == 0xf000c000)
11909 /* bl/blx */
11910 value = -6;
11911 else if ((insn & 0xffffff00) == 0x4400)
11912 /* add */
11913 value = -5;
11914 else
11915 {
11916 _bfd_error_handler
11917 /* xgettext:c-format */
11918 (_("%pB(%pA+%#" PRIx64 "): "
11919 "unexpected %s instruction '%#lx' "
11920 "referenced by TLS_GOTDESC"),
11921 input_bfd, input_section, (uint64_t) rel->r_offset,
11922 "Thumb", insn);
11923 return bfd_reloc_notsupported;
11924 }
11925 }
11926 else
11927 {
11928 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11929
11930 switch (insn >> 24)
11931 {
11932 case 0xeb: /* bl */
11933 case 0xfa: /* blx */
11934 value = -4;
11935 break;
11936
11937 case 0xe0: /* add */
11938 value = -8;
11939 break;
11940
11941 default:
11942 _bfd_error_handler
11943 /* xgettext:c-format */
11944 (_("%pB(%pA+%#" PRIx64 "): "
11945 "unexpected %s instruction '%#lx' "
11946 "referenced by TLS_GOTDESC"),
11947 input_bfd, input_section, (uint64_t) rel->r_offset,
11948 "ARM", insn);
11949 return bfd_reloc_notsupported;
11950 }
11951 }
11952
11953 value += ((globals->root.sgotplt->output_section->vma
11954 + globals->root.sgotplt->output_offset + off)
11955 - (input_section->output_section->vma
11956 + input_section->output_offset
11957 + rel->r_offset)
11958 + globals->sgotplt_jump_table_size);
11959 }
11960 else
11961 value = ((globals->root.sgot->output_section->vma
11962 + globals->root.sgot->output_offset + off)
11963 - (input_section->output_section->vma
11964 + input_section->output_offset + rel->r_offset));
11965
11966 if (globals->fdpic_p && (r_type == R_ARM_TLS_GD32_FDPIC ||
11967 r_type == R_ARM_TLS_IE32_FDPIC))
11968 {
11969 /* For FDPIC relocations, resolve to the offset of the GOT
11970 entry from the start of GOT. */
11971 bfd_put_32(output_bfd,
11972 globals->root.sgot->output_offset + off,
11973 contents + rel->r_offset);
11974
11975 return bfd_reloc_ok;
11976 }
11977 else
11978 {
11979 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11980 contents, rel->r_offset, value,
11981 rel->r_addend);
11982 }
11983 }
11984
11985 case R_ARM_TLS_LE32:
11986 if (bfd_link_dll (info))
11987 {
11988 _bfd_error_handler
11989 /* xgettext:c-format */
11990 (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted "
11991 "in shared object"),
11992 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name);
11993 return bfd_reloc_notsupported;
11994 }
11995 else
11996 value = tpoff (info, value);
11997
11998 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11999 contents, rel->r_offset, value,
12000 rel->r_addend);
12001
12002 case R_ARM_V4BX:
12003 if (globals->fix_v4bx)
12004 {
12005 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12006
12007 /* Ensure that we have a BX instruction. */
12008 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
12009
12010 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
12011 {
12012 /* Branch to veneer. */
12013 bfd_vma glue_addr;
12014 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
12015 glue_addr -= input_section->output_section->vma
12016 + input_section->output_offset
12017 + rel->r_offset + 8;
12018 insn = (insn & 0xf0000000) | 0x0a000000
12019 | ((glue_addr >> 2) & 0x00ffffff);
12020 }
12021 else
12022 {
12023 /* Preserve Rm (lowest four bits) and the condition code
12024 (highest four bits). Other bits encode MOV PC,Rm. */
12025 insn = (insn & 0xf000000f) | 0x01a0f000;
12026 }
12027
12028 bfd_put_32 (input_bfd, insn, hit_data);
12029 }
12030 return bfd_reloc_ok;
12031
12032 case R_ARM_MOVW_ABS_NC:
12033 case R_ARM_MOVT_ABS:
12034 case R_ARM_MOVW_PREL_NC:
12035 case R_ARM_MOVT_PREL:
12036 /* Until we properly support segment-base-relative addressing then
12037 we assume the segment base to be zero, as for the group relocations.
12038 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
12039 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
12040 case R_ARM_MOVW_BREL_NC:
12041 case R_ARM_MOVW_BREL:
12042 case R_ARM_MOVT_BREL:
12043 {
12044 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12045
12046 if (globals->use_rel)
12047 {
12048 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
12049 signed_addend = (addend ^ 0x8000) - 0x8000;
12050 }
12051
12052 value += signed_addend;
12053
12054 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
12055 value -= (input_section->output_section->vma
12056 + input_section->output_offset + rel->r_offset);
12057
12058 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
12059 return bfd_reloc_overflow;
12060
12061 if (branch_type == ST_BRANCH_TO_THUMB)
12062 value |= 1;
12063
12064 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
12065 || r_type == R_ARM_MOVT_BREL)
12066 value >>= 16;
12067
12068 insn &= 0xfff0f000;
12069 insn |= value & 0xfff;
12070 insn |= (value & 0xf000) << 4;
12071 bfd_put_32 (input_bfd, insn, hit_data);
12072 }
12073 return bfd_reloc_ok;
12074
12075 case R_ARM_THM_MOVW_ABS_NC:
12076 case R_ARM_THM_MOVT_ABS:
12077 case R_ARM_THM_MOVW_PREL_NC:
12078 case R_ARM_THM_MOVT_PREL:
12079 /* Until we properly support segment-base-relative addressing then
12080 we assume the segment base to be zero, as for the above relocations.
12081 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
12082 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
12083 as R_ARM_THM_MOVT_ABS. */
12084 case R_ARM_THM_MOVW_BREL_NC:
12085 case R_ARM_THM_MOVW_BREL:
12086 case R_ARM_THM_MOVT_BREL:
12087 {
12088 bfd_vma insn;
12089
12090 insn = bfd_get_16 (input_bfd, hit_data) << 16;
12091 insn |= bfd_get_16 (input_bfd, hit_data + 2);
12092
12093 if (globals->use_rel)
12094 {
12095 addend = ((insn >> 4) & 0xf000)
12096 | ((insn >> 15) & 0x0800)
12097 | ((insn >> 4) & 0x0700)
12098 | (insn & 0x00ff);
12099 signed_addend = (addend ^ 0x8000) - 0x8000;
12100 }
12101
12102 value += signed_addend;
12103
12104 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
12105 value -= (input_section->output_section->vma
12106 + input_section->output_offset + rel->r_offset);
12107
12108 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
12109 return bfd_reloc_overflow;
12110
12111 if (branch_type == ST_BRANCH_TO_THUMB)
12112 value |= 1;
12113
12114 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
12115 || r_type == R_ARM_THM_MOVT_BREL)
12116 value >>= 16;
12117
12118 insn &= 0xfbf08f00;
12119 insn |= (value & 0xf000) << 4;
12120 insn |= (value & 0x0800) << 15;
12121 insn |= (value & 0x0700) << 4;
12122 insn |= (value & 0x00ff);
12123
12124 bfd_put_16 (input_bfd, insn >> 16, hit_data);
12125 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
12126 }
12127 return bfd_reloc_ok;
12128
12129 case R_ARM_ALU_PC_G0_NC:
12130 case R_ARM_ALU_PC_G1_NC:
12131 case R_ARM_ALU_PC_G0:
12132 case R_ARM_ALU_PC_G1:
12133 case R_ARM_ALU_PC_G2:
12134 case R_ARM_ALU_SB_G0_NC:
12135 case R_ARM_ALU_SB_G1_NC:
12136 case R_ARM_ALU_SB_G0:
12137 case R_ARM_ALU_SB_G1:
12138 case R_ARM_ALU_SB_G2:
12139 {
12140 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12141 bfd_vma pc = input_section->output_section->vma
12142 + input_section->output_offset + rel->r_offset;
12143 /* sb is the origin of the *segment* containing the symbol. */
12144 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12145 bfd_vma residual;
12146 bfd_vma g_n;
12147 bfd_signed_vma signed_value;
12148 int group = 0;
12149
12150 /* Determine which group of bits to select. */
12151 switch (r_type)
12152 {
12153 case R_ARM_ALU_PC_G0_NC:
12154 case R_ARM_ALU_PC_G0:
12155 case R_ARM_ALU_SB_G0_NC:
12156 case R_ARM_ALU_SB_G0:
12157 group = 0;
12158 break;
12159
12160 case R_ARM_ALU_PC_G1_NC:
12161 case R_ARM_ALU_PC_G1:
12162 case R_ARM_ALU_SB_G1_NC:
12163 case R_ARM_ALU_SB_G1:
12164 group = 1;
12165 break;
12166
12167 case R_ARM_ALU_PC_G2:
12168 case R_ARM_ALU_SB_G2:
12169 group = 2;
12170 break;
12171
12172 default:
12173 abort ();
12174 }
12175
12176 /* If REL, extract the addend from the insn. If RELA, it will
12177 have already been fetched for us. */
12178 if (globals->use_rel)
12179 {
12180 int negative;
12181 bfd_vma constant = insn & 0xff;
12182 bfd_vma rotation = (insn & 0xf00) >> 8;
12183
12184 if (rotation == 0)
12185 signed_addend = constant;
12186 else
12187 {
12188 /* Compensate for the fact that in the instruction, the
12189 rotation is stored in multiples of 2 bits. */
12190 rotation *= 2;
12191
12192 /* Rotate "constant" right by "rotation" bits. */
12193 signed_addend = (constant >> rotation) |
12194 (constant << (8 * sizeof (bfd_vma) - rotation));
12195 }
12196
12197 /* Determine if the instruction is an ADD or a SUB.
12198 (For REL, this determines the sign of the addend.) */
12199 negative = identify_add_or_sub (insn);
12200 if (negative == 0)
12201 {
12202 _bfd_error_handler
12203 /* xgettext:c-format */
12204 (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions "
12205 "are allowed for ALU group relocations"),
12206 input_bfd, input_section, (uint64_t) rel->r_offset);
12207 return bfd_reloc_overflow;
12208 }
12209
12210 signed_addend *= negative;
12211 }
12212
12213 /* Compute the value (X) to go in the place. */
12214 if (r_type == R_ARM_ALU_PC_G0_NC
12215 || r_type == R_ARM_ALU_PC_G1_NC
12216 || r_type == R_ARM_ALU_PC_G0
12217 || r_type == R_ARM_ALU_PC_G1
12218 || r_type == R_ARM_ALU_PC_G2)
12219 /* PC relative. */
12220 signed_value = value - pc + signed_addend;
12221 else
12222 /* Section base relative. */
12223 signed_value = value - sb + signed_addend;
12224
12225 /* If the target symbol is a Thumb function, then set the
12226 Thumb bit in the address. */
12227 if (branch_type == ST_BRANCH_TO_THUMB)
12228 signed_value |= 1;
12229
12230 /* Calculate the value of the relevant G_n, in encoded
12231 constant-with-rotation format. */
12232 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12233 group, &residual);
12234
12235 /* Check for overflow if required. */
12236 if ((r_type == R_ARM_ALU_PC_G0
12237 || r_type == R_ARM_ALU_PC_G1
12238 || r_type == R_ARM_ALU_PC_G2
12239 || r_type == R_ARM_ALU_SB_G0
12240 || r_type == R_ARM_ALU_SB_G1
12241 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
12242 {
12243 _bfd_error_handler
12244 /* xgettext:c-format */
12245 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12246 "splitting %#" PRIx64 " for group relocation %s"),
12247 input_bfd, input_section, (uint64_t) rel->r_offset,
12248 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12249 howto->name);
12250 return bfd_reloc_overflow;
12251 }
12252
12253 /* Mask out the value and the ADD/SUB part of the opcode; take care
12254 not to destroy the S bit. */
12255 insn &= 0xff1ff000;
12256
12257 /* Set the opcode according to whether the value to go in the
12258 place is negative. */
12259 if (signed_value < 0)
12260 insn |= 1 << 22;
12261 else
12262 insn |= 1 << 23;
12263
12264 /* Encode the offset. */
12265 insn |= g_n;
12266
12267 bfd_put_32 (input_bfd, insn, hit_data);
12268 }
12269 return bfd_reloc_ok;
12270
12271 case R_ARM_LDR_PC_G0:
12272 case R_ARM_LDR_PC_G1:
12273 case R_ARM_LDR_PC_G2:
12274 case R_ARM_LDR_SB_G0:
12275 case R_ARM_LDR_SB_G1:
12276 case R_ARM_LDR_SB_G2:
12277 {
12278 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12279 bfd_vma pc = input_section->output_section->vma
12280 + input_section->output_offset + rel->r_offset;
12281 /* sb is the origin of the *segment* containing the symbol. */
12282 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12283 bfd_vma residual;
12284 bfd_signed_vma signed_value;
12285 int group = 0;
12286
12287 /* Determine which groups of bits to calculate. */
12288 switch (r_type)
12289 {
12290 case R_ARM_LDR_PC_G0:
12291 case R_ARM_LDR_SB_G0:
12292 group = 0;
12293 break;
12294
12295 case R_ARM_LDR_PC_G1:
12296 case R_ARM_LDR_SB_G1:
12297 group = 1;
12298 break;
12299
12300 case R_ARM_LDR_PC_G2:
12301 case R_ARM_LDR_SB_G2:
12302 group = 2;
12303 break;
12304
12305 default:
12306 abort ();
12307 }
12308
12309 /* If REL, extract the addend from the insn. If RELA, it will
12310 have already been fetched for us. */
12311 if (globals->use_rel)
12312 {
12313 int negative = (insn & (1 << 23)) ? 1 : -1;
12314 signed_addend = negative * (insn & 0xfff);
12315 }
12316
12317 /* Compute the value (X) to go in the place. */
12318 if (r_type == R_ARM_LDR_PC_G0
12319 || r_type == R_ARM_LDR_PC_G1
12320 || r_type == R_ARM_LDR_PC_G2)
12321 /* PC relative. */
12322 signed_value = value - pc + signed_addend;
12323 else
12324 /* Section base relative. */
12325 signed_value = value - sb + signed_addend;
12326
12327 /* Calculate the value of the relevant G_{n-1} to obtain
12328 the residual at that stage. */
12329 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12330 group - 1, &residual);
12331
12332 /* Check for overflow. */
12333 if (residual >= 0x1000)
12334 {
12335 _bfd_error_handler
12336 /* xgettext:c-format */
12337 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12338 "splitting %#" PRIx64 " for group relocation %s"),
12339 input_bfd, input_section, (uint64_t) rel->r_offset,
12340 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12341 howto->name);
12342 return bfd_reloc_overflow;
12343 }
12344
12345 /* Mask out the value and U bit. */
12346 insn &= 0xff7ff000;
12347
12348 /* Set the U bit if the value to go in the place is non-negative. */
12349 if (signed_value >= 0)
12350 insn |= 1 << 23;
12351
12352 /* Encode the offset. */
12353 insn |= residual;
12354
12355 bfd_put_32 (input_bfd, insn, hit_data);
12356 }
12357 return bfd_reloc_ok;
12358
12359 case R_ARM_LDRS_PC_G0:
12360 case R_ARM_LDRS_PC_G1:
12361 case R_ARM_LDRS_PC_G2:
12362 case R_ARM_LDRS_SB_G0:
12363 case R_ARM_LDRS_SB_G1:
12364 case R_ARM_LDRS_SB_G2:
12365 {
12366 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12367 bfd_vma pc = input_section->output_section->vma
12368 + input_section->output_offset + rel->r_offset;
12369 /* sb is the origin of the *segment* containing the symbol. */
12370 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12371 bfd_vma residual;
12372 bfd_signed_vma signed_value;
12373 int group = 0;
12374
12375 /* Determine which groups of bits to calculate. */
12376 switch (r_type)
12377 {
12378 case R_ARM_LDRS_PC_G0:
12379 case R_ARM_LDRS_SB_G0:
12380 group = 0;
12381 break;
12382
12383 case R_ARM_LDRS_PC_G1:
12384 case R_ARM_LDRS_SB_G1:
12385 group = 1;
12386 break;
12387
12388 case R_ARM_LDRS_PC_G2:
12389 case R_ARM_LDRS_SB_G2:
12390 group = 2;
12391 break;
12392
12393 default:
12394 abort ();
12395 }
12396
12397 /* If REL, extract the addend from the insn. If RELA, it will
12398 have already been fetched for us. */
12399 if (globals->use_rel)
12400 {
12401 int negative = (insn & (1 << 23)) ? 1 : -1;
12402 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
12403 }
12404
12405 /* Compute the value (X) to go in the place. */
12406 if (r_type == R_ARM_LDRS_PC_G0
12407 || r_type == R_ARM_LDRS_PC_G1
12408 || r_type == R_ARM_LDRS_PC_G2)
12409 /* PC relative. */
12410 signed_value = value - pc + signed_addend;
12411 else
12412 /* Section base relative. */
12413 signed_value = value - sb + signed_addend;
12414
12415 /* Calculate the value of the relevant G_{n-1} to obtain
12416 the residual at that stage. */
12417 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12418 group - 1, &residual);
12419
12420 /* Check for overflow. */
12421 if (residual >= 0x100)
12422 {
12423 _bfd_error_handler
12424 /* xgettext:c-format */
12425 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12426 "splitting %#" PRIx64 " for group relocation %s"),
12427 input_bfd, input_section, (uint64_t) rel->r_offset,
12428 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12429 howto->name);
12430 return bfd_reloc_overflow;
12431 }
12432
12433 /* Mask out the value and U bit. */
12434 insn &= 0xff7ff0f0;
12435
12436 /* Set the U bit if the value to go in the place is non-negative. */
12437 if (signed_value >= 0)
12438 insn |= 1 << 23;
12439
12440 /* Encode the offset. */
12441 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12442
12443 bfd_put_32 (input_bfd, insn, hit_data);
12444 }
12445 return bfd_reloc_ok;
12446
12447 case R_ARM_LDC_PC_G0:
12448 case R_ARM_LDC_PC_G1:
12449 case R_ARM_LDC_PC_G2:
12450 case R_ARM_LDC_SB_G0:
12451 case R_ARM_LDC_SB_G1:
12452 case R_ARM_LDC_SB_G2:
12453 {
12454 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12455 bfd_vma pc = input_section->output_section->vma
12456 + input_section->output_offset + rel->r_offset;
12457 /* sb is the origin of the *segment* containing the symbol. */
12458 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12459 bfd_vma residual;
12460 bfd_signed_vma signed_value;
12461 int group = 0;
12462
12463 /* Determine which groups of bits to calculate. */
12464 switch (r_type)
12465 {
12466 case R_ARM_LDC_PC_G0:
12467 case R_ARM_LDC_SB_G0:
12468 group = 0;
12469 break;
12470
12471 case R_ARM_LDC_PC_G1:
12472 case R_ARM_LDC_SB_G1:
12473 group = 1;
12474 break;
12475
12476 case R_ARM_LDC_PC_G2:
12477 case R_ARM_LDC_SB_G2:
12478 group = 2;
12479 break;
12480
12481 default:
12482 abort ();
12483 }
12484
12485 /* If REL, extract the addend from the insn. If RELA, it will
12486 have already been fetched for us. */
12487 if (globals->use_rel)
12488 {
12489 int negative = (insn & (1 << 23)) ? 1 : -1;
12490 signed_addend = negative * ((insn & 0xff) << 2);
12491 }
12492
12493 /* Compute the value (X) to go in the place. */
12494 if (r_type == R_ARM_LDC_PC_G0
12495 || r_type == R_ARM_LDC_PC_G1
12496 || r_type == R_ARM_LDC_PC_G2)
12497 /* PC relative. */
12498 signed_value = value - pc + signed_addend;
12499 else
12500 /* Section base relative. */
12501 signed_value = value - sb + signed_addend;
12502
12503 /* Calculate the value of the relevant G_{n-1} to obtain
12504 the residual at that stage. */
12505 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12506 group - 1, &residual);
12507
12508 /* Check for overflow. (The absolute value to go in the place must be
12509 divisible by four and, after having been divided by four, must
12510 fit in eight bits.) */
12511 if ((residual & 0x3) != 0 || residual >= 0x400)
12512 {
12513 _bfd_error_handler
12514 /* xgettext:c-format */
12515 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12516 "splitting %#" PRIx64 " for group relocation %s"),
12517 input_bfd, input_section, (uint64_t) rel->r_offset,
12518 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12519 howto->name);
12520 return bfd_reloc_overflow;
12521 }
12522
12523 /* Mask out the value and U bit. */
12524 insn &= 0xff7fff00;
12525
12526 /* Set the U bit if the value to go in the place is non-negative. */
12527 if (signed_value >= 0)
12528 insn |= 1 << 23;
12529
12530 /* Encode the offset. */
12531 insn |= residual >> 2;
12532
12533 bfd_put_32 (input_bfd, insn, hit_data);
12534 }
12535 return bfd_reloc_ok;
12536
12537 case R_ARM_THM_ALU_ABS_G0_NC:
12538 case R_ARM_THM_ALU_ABS_G1_NC:
12539 case R_ARM_THM_ALU_ABS_G2_NC:
12540 case R_ARM_THM_ALU_ABS_G3_NC:
12541 {
12542 const int shift_array[4] = {0, 8, 16, 24};
12543 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12544 bfd_vma addr = value;
12545 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12546
12547 /* Compute address. */
12548 if (globals->use_rel)
12549 signed_addend = insn & 0xff;
12550 addr += signed_addend;
12551 if (branch_type == ST_BRANCH_TO_THUMB)
12552 addr |= 1;
12553 /* Clean imm8 insn. */
12554 insn &= 0xff00;
12555 /* And update with correct part of address. */
12556 insn |= (addr >> shift) & 0xff;
12557 /* Update insn. */
12558 bfd_put_16 (input_bfd, insn, hit_data);
12559 }
12560
12561 *unresolved_reloc_p = false;
12562 return bfd_reloc_ok;
12563
12564 case R_ARM_GOTOFFFUNCDESC:
12565 {
12566 if (h == NULL)
12567 {
12568 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12569 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12570 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12571 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12572 bfd_vma seg = -1;
12573
12574 if (bfd_link_pic(info) && dynindx == 0)
12575 abort();
12576
12577 /* Resolve relocation. */
12578 bfd_put_32(output_bfd, (offset + sgot->output_offset)
12579 , contents + rel->r_offset);
12580 /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12581 not done yet. */
12582 arm_elf_fill_funcdesc(output_bfd, info,
12583 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12584 dynindx, offset, addr, dynreloc_value, seg);
12585 }
12586 else
12587 {
12588 int dynindx;
12589 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12590 bfd_vma addr;
12591 bfd_vma seg = -1;
12592
12593 /* For static binaries, sym_sec can be null. */
12594 if (sym_sec)
12595 {
12596 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12597 addr = dynreloc_value - sym_sec->output_section->vma;
12598 }
12599 else
12600 {
12601 dynindx = 0;
12602 addr = 0;
12603 }
12604
12605 if (bfd_link_pic(info) && dynindx == 0)
12606 abort();
12607
12608 /* This case cannot occur since funcdesc is allocated by
12609 the dynamic loader so we cannot resolve the relocation. */
12610 if (h->dynindx != -1)
12611 abort();
12612
12613 /* Resolve relocation. */
12614 bfd_put_32(output_bfd, (offset + sgot->output_offset),
12615 contents + rel->r_offset);
12616 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12617 arm_elf_fill_funcdesc(output_bfd, info,
12618 &eh->fdpic_cnts.funcdesc_offset,
12619 dynindx, offset, addr, dynreloc_value, seg);
12620 }
12621 }
12622 *unresolved_reloc_p = false;
12623 return bfd_reloc_ok;
12624
12625 case R_ARM_GOTFUNCDESC:
12626 {
12627 if (h != NULL)
12628 {
12629 Elf_Internal_Rela outrel;
12630
12631 /* Resolve relocation. */
12632 bfd_put_32(output_bfd, ((eh->fdpic_cnts.gotfuncdesc_offset & ~1)
12633 + sgot->output_offset),
12634 contents + rel->r_offset);
12635 /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */
12636 if(h->dynindx == -1)
12637 {
12638 int dynindx;
12639 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12640 bfd_vma addr;
12641 bfd_vma seg = -1;
12642
12643 /* For static binaries sym_sec can be null. */
12644 if (sym_sec)
12645 {
12646 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12647 addr = dynreloc_value - sym_sec->output_section->vma;
12648 }
12649 else
12650 {
12651 dynindx = 0;
12652 addr = 0;
12653 }
12654
12655 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12656 arm_elf_fill_funcdesc(output_bfd, info,
12657 &eh->fdpic_cnts.funcdesc_offset,
12658 dynindx, offset, addr, dynreloc_value, seg);
12659 }
12660
12661 /* Add a dynamic relocation on GOT entry if not already done. */
12662 if ((eh->fdpic_cnts.gotfuncdesc_offset & 1) == 0)
12663 {
12664 if (h->dynindx == -1)
12665 {
12666 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12667 if (h->root.type == bfd_link_hash_undefweak)
12668 bfd_put_32(output_bfd, 0, sgot->contents
12669 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12670 else
12671 bfd_put_32(output_bfd, sgot->output_section->vma
12672 + sgot->output_offset
12673 + (eh->fdpic_cnts.funcdesc_offset & ~1),
12674 sgot->contents
12675 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12676 }
12677 else
12678 {
12679 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12680 }
12681 outrel.r_offset = sgot->output_section->vma
12682 + sgot->output_offset
12683 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1);
12684 outrel.r_addend = 0;
12685 if (h->dynindx == -1 && !bfd_link_pic(info))
12686 if (h->root.type == bfd_link_hash_undefweak)
12687 arm_elf_add_rofixup(output_bfd, globals->srofixup, -1);
12688 else
12689 arm_elf_add_rofixup(output_bfd, globals->srofixup,
12690 outrel.r_offset);
12691 else
12692 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12693 eh->fdpic_cnts.gotfuncdesc_offset |= 1;
12694 }
12695 }
12696 else
12697 {
12698 /* Such relocation on static function should not have been
12699 emitted by the compiler. */
12700 abort();
12701 }
12702 }
12703 *unresolved_reloc_p = false;
12704 return bfd_reloc_ok;
12705
12706 case R_ARM_FUNCDESC:
12707 {
12708 if (h == NULL)
12709 {
12710 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12711 Elf_Internal_Rela outrel;
12712 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12713 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12714 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12715 bfd_vma seg = -1;
12716
12717 if (bfd_link_pic(info) && dynindx == 0)
12718 abort();
12719
12720 /* Replace static FUNCDESC relocation with a
12721 R_ARM_RELATIVE dynamic relocation or with a rofixup for
12722 executable. */
12723 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12724 outrel.r_offset = input_section->output_section->vma
12725 + input_section->output_offset + rel->r_offset;
12726 outrel.r_addend = 0;
12727 if (bfd_link_pic(info))
12728 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12729 else
12730 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12731
12732 bfd_put_32 (input_bfd, sgot->output_section->vma
12733 + sgot->output_offset + offset, hit_data);
12734
12735 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12736 arm_elf_fill_funcdesc(output_bfd, info,
12737 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12738 dynindx, offset, addr, dynreloc_value, seg);
12739 }
12740 else
12741 {
12742 if (h->dynindx == -1)
12743 {
12744 int dynindx;
12745 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12746 bfd_vma addr;
12747 bfd_vma seg = -1;
12748 Elf_Internal_Rela outrel;
12749
12750 /* For static binaries sym_sec can be null. */
12751 if (sym_sec)
12752 {
12753 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12754 addr = dynreloc_value - sym_sec->output_section->vma;
12755 }
12756 else
12757 {
12758 dynindx = 0;
12759 addr = 0;
12760 }
12761
12762 if (bfd_link_pic(info) && dynindx == 0)
12763 abort();
12764
12765 /* Replace static FUNCDESC relocation with a
12766 R_ARM_RELATIVE dynamic relocation. */
12767 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12768 outrel.r_offset = input_section->output_section->vma
12769 + input_section->output_offset + rel->r_offset;
12770 outrel.r_addend = 0;
12771 if (bfd_link_pic(info))
12772 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12773 else
12774 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12775
12776 bfd_put_32 (input_bfd, sgot->output_section->vma
12777 + sgot->output_offset + offset, hit_data);
12778
12779 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12780 arm_elf_fill_funcdesc(output_bfd, info,
12781 &eh->fdpic_cnts.funcdesc_offset,
12782 dynindx, offset, addr, dynreloc_value, seg);
12783 }
12784 else
12785 {
12786 Elf_Internal_Rela outrel;
12787
12788 /* Add a dynamic relocation. */
12789 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12790 outrel.r_offset = input_section->output_section->vma
12791 + input_section->output_offset + rel->r_offset;
12792 outrel.r_addend = 0;
12793 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12794 }
12795 }
12796 }
12797 *unresolved_reloc_p = false;
12798 return bfd_reloc_ok;
12799
12800 case R_ARM_THM_BF16:
12801 {
12802 bfd_vma relocation;
12803 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12804 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12805
12806 if (globals->use_rel)
12807 {
12808 bfd_vma immA = (upper_insn & 0x001f);
12809 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12810 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12811 addend = (immA << 12);
12812 addend |= (immB << 2);
12813 addend |= (immC << 1);
12814 addend |= 1;
12815 /* Sign extend. */
12816 signed_addend = (addend & 0x10000) ? addend - (1 << 17) : addend;
12817 }
12818
12819 relocation = value + signed_addend;
12820 relocation -= (input_section->output_section->vma
12821 + input_section->output_offset
12822 + rel->r_offset);
12823
12824 /* Put RELOCATION back into the insn. */
12825 {
12826 bfd_vma immA = (relocation & 0x0001f000) >> 12;
12827 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12828 bfd_vma immC = (relocation & 0x00000002) >> 1;
12829
12830 upper_insn = (upper_insn & 0xffe0) | immA;
12831 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12832 }
12833
12834 /* Put the relocated value back in the object file: */
12835 bfd_put_16 (input_bfd, upper_insn, hit_data);
12836 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12837
12838 return bfd_reloc_ok;
12839 }
12840
12841 case R_ARM_THM_BF12:
12842 {
12843 bfd_vma relocation;
12844 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12845 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12846
12847 if (globals->use_rel)
12848 {
12849 bfd_vma immA = (upper_insn & 0x0001);
12850 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12851 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12852 addend = (immA << 12);
12853 addend |= (immB << 2);
12854 addend |= (immC << 1);
12855 addend |= 1;
12856 /* Sign extend. */
12857 addend = (addend & 0x1000) ? addend - (1 << 13) : addend;
12858 signed_addend = addend;
12859 }
12860
12861 relocation = value + signed_addend;
12862 relocation -= (input_section->output_section->vma
12863 + input_section->output_offset
12864 + rel->r_offset);
12865
12866 /* Put RELOCATION back into the insn. */
12867 {
12868 bfd_vma immA = (relocation & 0x00001000) >> 12;
12869 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12870 bfd_vma immC = (relocation & 0x00000002) >> 1;
12871
12872 upper_insn = (upper_insn & 0xfffe) | immA;
12873 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12874 }
12875
12876 /* Put the relocated value back in the object file: */
12877 bfd_put_16 (input_bfd, upper_insn, hit_data);
12878 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12879
12880 return bfd_reloc_ok;
12881 }
12882
12883 case R_ARM_THM_BF18:
12884 {
12885 bfd_vma relocation;
12886 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12887 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12888
12889 if (globals->use_rel)
12890 {
12891 bfd_vma immA = (upper_insn & 0x007f);
12892 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12893 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12894 addend = (immA << 12);
12895 addend |= (immB << 2);
12896 addend |= (immC << 1);
12897 addend |= 1;
12898 /* Sign extend. */
12899 addend = (addend & 0x40000) ? addend - (1 << 19) : addend;
12900 signed_addend = addend;
12901 }
12902
12903 relocation = value + signed_addend;
12904 relocation -= (input_section->output_section->vma
12905 + input_section->output_offset
12906 + rel->r_offset);
12907
12908 /* Put RELOCATION back into the insn. */
12909 {
12910 bfd_vma immA = (relocation & 0x0007f000) >> 12;
12911 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12912 bfd_vma immC = (relocation & 0x00000002) >> 1;
12913
12914 upper_insn = (upper_insn & 0xff80) | immA;
12915 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12916 }
12917
12918 /* Put the relocated value back in the object file: */
12919 bfd_put_16 (input_bfd, upper_insn, hit_data);
12920 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12921
12922 return bfd_reloc_ok;
12923 }
12924
12925 default:
12926 return bfd_reloc_notsupported;
12927 }
12928 }
12929
12930 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12931 static void
12932 arm_add_to_rel (bfd * abfd,
12933 bfd_byte * address,
12934 reloc_howto_type * howto,
12935 bfd_signed_vma increment)
12936 {
12937 bfd_signed_vma addend;
12938
12939 if (howto->type == R_ARM_THM_CALL
12940 || howto->type == R_ARM_THM_JUMP24)
12941 {
12942 int upper_insn, lower_insn;
12943 int upper, lower;
12944
12945 upper_insn = bfd_get_16 (abfd, address);
12946 lower_insn = bfd_get_16 (abfd, address + 2);
12947 upper = upper_insn & 0x7ff;
12948 lower = lower_insn & 0x7ff;
12949
12950 addend = (upper << 12) | (lower << 1);
12951 addend += increment;
12952 addend >>= 1;
12953
12954 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
12955 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
12956
12957 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
12958 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
12959 }
12960 else
12961 {
12962 bfd_vma contents;
12963
12964 contents = bfd_get_32 (abfd, address);
12965
12966 /* Get the (signed) value from the instruction. */
12967 addend = contents & howto->src_mask;
12968 if (addend & ((howto->src_mask + 1) >> 1))
12969 {
12970 bfd_signed_vma mask;
12971
12972 mask = -1;
12973 mask &= ~ howto->src_mask;
12974 addend |= mask;
12975 }
12976
12977 /* Add in the increment, (which is a byte value). */
12978 switch (howto->type)
12979 {
12980 default:
12981 addend += increment;
12982 break;
12983
12984 case R_ARM_PC24:
12985 case R_ARM_PLT32:
12986 case R_ARM_CALL:
12987 case R_ARM_JUMP24:
12988 addend <<= howto->size;
12989 addend += increment;
12990
12991 /* Should we check for overflow here ? */
12992
12993 /* Drop any undesired bits. */
12994 addend >>= howto->rightshift;
12995 break;
12996 }
12997
12998 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
12999
13000 bfd_put_32 (abfd, contents, address);
13001 }
13002 }
13003
13004 #define IS_ARM_TLS_RELOC(R_TYPE) \
13005 ((R_TYPE) == R_ARM_TLS_GD32 \
13006 || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \
13007 || (R_TYPE) == R_ARM_TLS_LDO32 \
13008 || (R_TYPE) == R_ARM_TLS_LDM32 \
13009 || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \
13010 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
13011 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
13012 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
13013 || (R_TYPE) == R_ARM_TLS_LE32 \
13014 || (R_TYPE) == R_ARM_TLS_IE32 \
13015 || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \
13016 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
13017
13018 /* Specific set of relocations for the gnu tls dialect. */
13019 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
13020 ((R_TYPE) == R_ARM_TLS_GOTDESC \
13021 || (R_TYPE) == R_ARM_TLS_CALL \
13022 || (R_TYPE) == R_ARM_THM_TLS_CALL \
13023 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
13024 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
13025
13026 /* Relocate an ARM ELF section. */
13027
13028 static int
13029 elf32_arm_relocate_section (bfd * output_bfd,
13030 struct bfd_link_info * info,
13031 bfd * input_bfd,
13032 asection * input_section,
13033 bfd_byte * contents,
13034 Elf_Internal_Rela * relocs,
13035 Elf_Internal_Sym * local_syms,
13036 asection ** local_sections)
13037 {
13038 Elf_Internal_Shdr *symtab_hdr;
13039 struct elf_link_hash_entry **sym_hashes;
13040 Elf_Internal_Rela *rel;
13041 Elf_Internal_Rela *relend;
13042 const char *name;
13043 struct elf32_arm_link_hash_table * globals;
13044
13045 globals = elf32_arm_hash_table (info);
13046 if (globals == NULL)
13047 return false;
13048
13049 symtab_hdr = & elf_symtab_hdr (input_bfd);
13050 sym_hashes = elf_sym_hashes (input_bfd);
13051
13052 rel = relocs;
13053 relend = relocs + input_section->reloc_count;
13054 for (; rel < relend; rel++)
13055 {
13056 int r_type;
13057 reloc_howto_type * howto;
13058 unsigned long r_symndx;
13059 Elf_Internal_Sym * sym;
13060 asection * sec;
13061 struct elf_link_hash_entry * h;
13062 bfd_vma relocation;
13063 bfd_reloc_status_type r;
13064 arelent bfd_reloc;
13065 char sym_type;
13066 bool unresolved_reloc = false;
13067 char *error_message = NULL;
13068
13069 r_symndx = ELF32_R_SYM (rel->r_info);
13070 r_type = ELF32_R_TYPE (rel->r_info);
13071 r_type = arm_real_reloc_type (globals, r_type);
13072
13073 if ( r_type == R_ARM_GNU_VTENTRY
13074 || r_type == R_ARM_GNU_VTINHERIT)
13075 continue;
13076
13077 howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
13078
13079 if (howto == NULL)
13080 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
13081
13082 h = NULL;
13083 sym = NULL;
13084 sec = NULL;
13085
13086 if (r_symndx < symtab_hdr->sh_info)
13087 {
13088 sym = local_syms + r_symndx;
13089 sym_type = ELF32_ST_TYPE (sym->st_info);
13090 sec = local_sections[r_symndx];
13091
13092 /* An object file might have a reference to a local
13093 undefined symbol. This is a daft object file, but we
13094 should at least do something about it. V4BX & NONE
13095 relocations do not use the symbol and are explicitly
13096 allowed to use the undefined symbol, so allow those.
13097 Likewise for relocations against STN_UNDEF. */
13098 if (r_type != R_ARM_V4BX
13099 && r_type != R_ARM_NONE
13100 && r_symndx != STN_UNDEF
13101 && bfd_is_und_section (sec)
13102 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
13103 (*info->callbacks->undefined_symbol)
13104 (info, bfd_elf_string_from_elf_section
13105 (input_bfd, symtab_hdr->sh_link, sym->st_name),
13106 input_bfd, input_section,
13107 rel->r_offset, true);
13108
13109 if (globals->use_rel)
13110 {
13111 relocation = (sec->output_section->vma
13112 + sec->output_offset
13113 + sym->st_value);
13114 if (!bfd_link_relocatable (info)
13115 && (sec->flags & SEC_MERGE)
13116 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13117 {
13118 asection *msec;
13119 bfd_vma addend, value;
13120
13121 switch (r_type)
13122 {
13123 case R_ARM_MOVW_ABS_NC:
13124 case R_ARM_MOVT_ABS:
13125 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13126 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
13127 addend = (addend ^ 0x8000) - 0x8000;
13128 break;
13129
13130 case R_ARM_THM_MOVW_ABS_NC:
13131 case R_ARM_THM_MOVT_ABS:
13132 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
13133 << 16;
13134 value |= bfd_get_16 (input_bfd,
13135 contents + rel->r_offset + 2);
13136 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
13137 | ((value & 0x04000000) >> 15);
13138 addend = (addend ^ 0x8000) - 0x8000;
13139 break;
13140
13141 default:
13142 if (howto->rightshift
13143 || (howto->src_mask & (howto->src_mask + 1)))
13144 {
13145 _bfd_error_handler
13146 /* xgettext:c-format */
13147 (_("%pB(%pA+%#" PRIx64 "): "
13148 "%s relocation against SEC_MERGE section"),
13149 input_bfd, input_section,
13150 (uint64_t) rel->r_offset, howto->name);
13151 return false;
13152 }
13153
13154 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13155
13156 /* Get the (signed) value from the instruction. */
13157 addend = value & howto->src_mask;
13158 if (addend & ((howto->src_mask + 1) >> 1))
13159 {
13160 bfd_signed_vma mask;
13161
13162 mask = -1;
13163 mask &= ~ howto->src_mask;
13164 addend |= mask;
13165 }
13166 break;
13167 }
13168
13169 msec = sec;
13170 addend =
13171 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
13172 - relocation;
13173 addend += msec->output_section->vma + msec->output_offset;
13174
13175 /* Cases here must match those in the preceding
13176 switch statement. */
13177 switch (r_type)
13178 {
13179 case R_ARM_MOVW_ABS_NC:
13180 case R_ARM_MOVT_ABS:
13181 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
13182 | (addend & 0xfff);
13183 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13184 break;
13185
13186 case R_ARM_THM_MOVW_ABS_NC:
13187 case R_ARM_THM_MOVT_ABS:
13188 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
13189 | (addend & 0xff) | ((addend & 0x0800) << 15);
13190 bfd_put_16 (input_bfd, value >> 16,
13191 contents + rel->r_offset);
13192 bfd_put_16 (input_bfd, value,
13193 contents + rel->r_offset + 2);
13194 break;
13195
13196 default:
13197 value = (value & ~ howto->dst_mask)
13198 | (addend & howto->dst_mask);
13199 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13200 break;
13201 }
13202 }
13203 }
13204 else
13205 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
13206 }
13207 else
13208 {
13209 bool warned, ignored;
13210
13211 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
13212 r_symndx, symtab_hdr, sym_hashes,
13213 h, sec, relocation,
13214 unresolved_reloc, warned, ignored);
13215
13216 sym_type = h->type;
13217 }
13218
13219 if (sec != NULL && discarded_section (sec))
13220 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
13221 rel, 1, relend, howto, 0, contents);
13222
13223 if (bfd_link_relocatable (info))
13224 {
13225 /* This is a relocatable link. We don't have to change
13226 anything, unless the reloc is against a section symbol,
13227 in which case we have to adjust according to where the
13228 section symbol winds up in the output section. */
13229 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13230 {
13231 if (globals->use_rel)
13232 arm_add_to_rel (input_bfd, contents + rel->r_offset,
13233 howto, (bfd_signed_vma) sec->output_offset);
13234 else
13235 rel->r_addend += sec->output_offset;
13236 }
13237 continue;
13238 }
13239
13240 if (h != NULL)
13241 name = h->root.root.string;
13242 else
13243 {
13244 name = (bfd_elf_string_from_elf_section
13245 (input_bfd, symtab_hdr->sh_link, sym->st_name));
13246 if (name == NULL || *name == '\0')
13247 name = bfd_section_name (sec);
13248 }
13249
13250 if (r_symndx != STN_UNDEF
13251 && r_type != R_ARM_NONE
13252 && (h == NULL
13253 || h->root.type == bfd_link_hash_defined
13254 || h->root.type == bfd_link_hash_defweak)
13255 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
13256 {
13257 _bfd_error_handler
13258 ((sym_type == STT_TLS
13259 /* xgettext:c-format */
13260 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
13261 /* xgettext:c-format */
13262 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
13263 input_bfd,
13264 input_section,
13265 (uint64_t) rel->r_offset,
13266 howto->name,
13267 name);
13268 }
13269
13270 /* We call elf32_arm_final_link_relocate unless we're completely
13271 done, i.e., the relaxation produced the final output we want,
13272 and we won't let anybody mess with it. Also, we have to do
13273 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
13274 both in relaxed and non-relaxed cases. */
13275 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
13276 || (IS_ARM_TLS_GNU_RELOC (r_type)
13277 && !((h ? elf32_arm_hash_entry (h)->tls_type :
13278 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
13279 & GOT_TLS_GDESC)))
13280 {
13281 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
13282 contents, rel, h == NULL);
13283 /* This may have been marked unresolved because it came from
13284 a shared library. But we've just dealt with that. */
13285 unresolved_reloc = 0;
13286 }
13287 else
13288 r = bfd_reloc_continue;
13289
13290 if (r == bfd_reloc_continue)
13291 {
13292 unsigned char branch_type =
13293 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
13294 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
13295
13296 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
13297 input_section, contents, rel,
13298 relocation, info, sec, name,
13299 sym_type, branch_type, h,
13300 &unresolved_reloc,
13301 &error_message);
13302 }
13303
13304 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13305 because such sections are not SEC_ALLOC and thus ld.so will
13306 not process them. */
13307 if (unresolved_reloc
13308 && !((input_section->flags & SEC_DEBUGGING) != 0
13309 && h->def_dynamic)
13310 && _bfd_elf_section_offset (output_bfd, info, input_section,
13311 rel->r_offset) != (bfd_vma) -1)
13312 {
13313 _bfd_error_handler
13314 /* xgettext:c-format */
13315 (_("%pB(%pA+%#" PRIx64 "): "
13316 "unresolvable %s relocation against symbol `%s'"),
13317 input_bfd,
13318 input_section,
13319 (uint64_t) rel->r_offset,
13320 howto->name,
13321 h->root.root.string);
13322 return false;
13323 }
13324
13325 if (r != bfd_reloc_ok)
13326 {
13327 switch (r)
13328 {
13329 case bfd_reloc_overflow:
13330 /* If the overflowing reloc was to an undefined symbol,
13331 we have already printed one error message and there
13332 is no point complaining again. */
13333 if (!h || h->root.type != bfd_link_hash_undefined)
13334 (*info->callbacks->reloc_overflow)
13335 (info, (h ? &h->root : NULL), name, howto->name,
13336 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
13337 break;
13338
13339 case bfd_reloc_undefined:
13340 (*info->callbacks->undefined_symbol)
13341 (info, name, input_bfd, input_section, rel->r_offset, true);
13342 break;
13343
13344 case bfd_reloc_outofrange:
13345 error_message = _("out of range");
13346 goto common_error;
13347
13348 case bfd_reloc_notsupported:
13349 error_message = _("unsupported relocation");
13350 goto common_error;
13351
13352 case bfd_reloc_dangerous:
13353 /* error_message should already be set. */
13354 goto common_error;
13355
13356 default:
13357 error_message = _("unknown error");
13358 /* Fall through. */
13359
13360 common_error:
13361 BFD_ASSERT (error_message != NULL);
13362 (*info->callbacks->reloc_dangerous)
13363 (info, error_message, input_bfd, input_section, rel->r_offset);
13364 break;
13365 }
13366 }
13367 }
13368
13369 return true;
13370 }
13371
13372 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
13373 adds the edit to the start of the list. (The list must be built in order of
13374 ascending TINDEX: the function's callers are primarily responsible for
13375 maintaining that condition). */
13376
13377 static void
13378 add_unwind_table_edit (arm_unwind_table_edit **head,
13379 arm_unwind_table_edit **tail,
13380 arm_unwind_edit_type type,
13381 asection *linked_section,
13382 unsigned int tindex)
13383 {
13384 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
13385 xmalloc (sizeof (arm_unwind_table_edit));
13386
13387 new_edit->type = type;
13388 new_edit->linked_section = linked_section;
13389 new_edit->index = tindex;
13390
13391 if (tindex > 0)
13392 {
13393 new_edit->next = NULL;
13394
13395 if (*tail)
13396 (*tail)->next = new_edit;
13397
13398 (*tail) = new_edit;
13399
13400 if (!*head)
13401 (*head) = new_edit;
13402 }
13403 else
13404 {
13405 new_edit->next = *head;
13406
13407 if (!*tail)
13408 *tail = new_edit;
13409
13410 *head = new_edit;
13411 }
13412 }
13413
13414 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
13415
13416 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
13417 static void
13418 adjust_exidx_size(asection *exidx_sec, int adjust)
13419 {
13420 asection *out_sec;
13421
13422 if (!exidx_sec->rawsize)
13423 exidx_sec->rawsize = exidx_sec->size;
13424
13425 bfd_set_section_size (exidx_sec, exidx_sec->size + adjust);
13426 out_sec = exidx_sec->output_section;
13427 /* Adjust size of output section. */
13428 bfd_set_section_size (out_sec, out_sec->size +adjust);
13429 }
13430
13431 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
13432 static void
13433 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
13434 {
13435 struct _arm_elf_section_data *exidx_arm_data;
13436
13437 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13438 add_unwind_table_edit (
13439 &exidx_arm_data->u.exidx.unwind_edit_list,
13440 &exidx_arm_data->u.exidx.unwind_edit_tail,
13441 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
13442
13443 exidx_arm_data->additional_reloc_count++;
13444
13445 adjust_exidx_size(exidx_sec, 8);
13446 }
13447
13448 /* Scan .ARM.exidx tables, and create a list describing edits which should be
13449 made to those tables, such that:
13450
13451 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13452 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13453 codes which have been inlined into the index).
13454
13455 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13456
13457 The edits are applied when the tables are written
13458 (in elf32_arm_write_section). */
13459
13460 bool
13461 elf32_arm_fix_exidx_coverage (asection **text_section_order,
13462 unsigned int num_text_sections,
13463 struct bfd_link_info *info,
13464 bool merge_exidx_entries)
13465 {
13466 bfd *inp;
13467 unsigned int last_second_word = 0, i;
13468 asection *last_exidx_sec = NULL;
13469 asection *last_text_sec = NULL;
13470 int last_unwind_type = -1;
13471
13472 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13473 text sections. */
13474 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
13475 {
13476 asection *sec;
13477
13478 for (sec = inp->sections; sec != NULL; sec = sec->next)
13479 {
13480 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
13481 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
13482
13483 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
13484 continue;
13485
13486 if (elf_sec->linked_to)
13487 {
13488 Elf_Internal_Shdr *linked_hdr
13489 = &elf_section_data (elf_sec->linked_to)->this_hdr;
13490 struct _arm_elf_section_data *linked_sec_arm_data
13491 = get_arm_elf_section_data (linked_hdr->bfd_section);
13492
13493 if (linked_sec_arm_data == NULL)
13494 continue;
13495
13496 /* Link this .ARM.exidx section back from the text section it
13497 describes. */
13498 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
13499 }
13500 }
13501 }
13502
13503 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
13504 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13505 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
13506
13507 for (i = 0; i < num_text_sections; i++)
13508 {
13509 asection *sec = text_section_order[i];
13510 asection *exidx_sec;
13511 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
13512 struct _arm_elf_section_data *exidx_arm_data;
13513 bfd_byte *contents = NULL;
13514 int deleted_exidx_bytes = 0;
13515 bfd_vma j;
13516 arm_unwind_table_edit *unwind_edit_head = NULL;
13517 arm_unwind_table_edit *unwind_edit_tail = NULL;
13518 Elf_Internal_Shdr *hdr;
13519 bfd *ibfd;
13520
13521 if (arm_data == NULL)
13522 continue;
13523
13524 exidx_sec = arm_data->u.text.arm_exidx_sec;
13525 if (exidx_sec == NULL)
13526 {
13527 /* Section has no unwind data. */
13528 if (last_unwind_type == 0 || !last_exidx_sec)
13529 continue;
13530
13531 /* Ignore zero sized sections. */
13532 if (sec->size == 0)
13533 continue;
13534
13535 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13536 last_unwind_type = 0;
13537 continue;
13538 }
13539
13540 /* Skip /DISCARD/ sections. */
13541 if (bfd_is_abs_section (exidx_sec->output_section))
13542 continue;
13543
13544 hdr = &elf_section_data (exidx_sec)->this_hdr;
13545 if (hdr->sh_type != SHT_ARM_EXIDX)
13546 continue;
13547
13548 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13549 if (exidx_arm_data == NULL)
13550 continue;
13551
13552 ibfd = exidx_sec->owner;
13553
13554 if (hdr->contents != NULL)
13555 contents = hdr->contents;
13556 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
13557 /* An error? */
13558 continue;
13559
13560 if (last_unwind_type > 0)
13561 {
13562 unsigned int first_word = bfd_get_32 (ibfd, contents);
13563 /* Add cantunwind if first unwind item does not match section
13564 start. */
13565 if (first_word != sec->vma)
13566 {
13567 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13568 last_unwind_type = 0;
13569 }
13570 }
13571
13572 for (j = 0; j < hdr->sh_size; j += 8)
13573 {
13574 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
13575 int unwind_type;
13576 int elide = 0;
13577
13578 /* An EXIDX_CANTUNWIND entry. */
13579 if (second_word == 1)
13580 {
13581 if (last_unwind_type == 0)
13582 elide = 1;
13583 unwind_type = 0;
13584 }
13585 /* Inlined unwinding data. Merge if equal to previous. */
13586 else if ((second_word & 0x80000000) != 0)
13587 {
13588 if (merge_exidx_entries
13589 && last_second_word == second_word && last_unwind_type == 1)
13590 elide = 1;
13591 unwind_type = 1;
13592 last_second_word = second_word;
13593 }
13594 /* Normal table entry. In theory we could merge these too,
13595 but duplicate entries are likely to be much less common. */
13596 else
13597 unwind_type = 2;
13598
13599 if (elide && !bfd_link_relocatable (info))
13600 {
13601 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
13602 DELETE_EXIDX_ENTRY, NULL, j / 8);
13603
13604 deleted_exidx_bytes += 8;
13605 }
13606
13607 last_unwind_type = unwind_type;
13608 }
13609
13610 /* Free contents if we allocated it ourselves. */
13611 if (contents != hdr->contents)
13612 free (contents);
13613
13614 /* Record edits to be applied later (in elf32_arm_write_section). */
13615 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
13616 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
13617
13618 if (deleted_exidx_bytes > 0)
13619 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
13620
13621 last_exidx_sec = exidx_sec;
13622 last_text_sec = sec;
13623 }
13624
13625 /* Add terminating CANTUNWIND entry. */
13626 if (!bfd_link_relocatable (info) && last_exidx_sec
13627 && last_unwind_type != 0)
13628 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13629
13630 return true;
13631 }
13632
13633 static bool
13634 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
13635 bfd *ibfd, const char *name)
13636 {
13637 asection *sec, *osec;
13638
13639 sec = bfd_get_linker_section (ibfd, name);
13640 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
13641 return true;
13642
13643 osec = sec->output_section;
13644 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
13645 return true;
13646
13647 if (! bfd_set_section_contents (obfd, osec, sec->contents,
13648 sec->output_offset, sec->size))
13649 return false;
13650
13651 return true;
13652 }
13653
13654 static bool
13655 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
13656 {
13657 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
13658 asection *sec, *osec;
13659
13660 if (globals == NULL)
13661 return false;
13662
13663 /* Invoke the regular ELF backend linker to do all the work. */
13664 if (!bfd_elf_final_link (abfd, info))
13665 return false;
13666
13667 /* Process stub sections (eg BE8 encoding, ...). */
13668 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
13669 unsigned int i;
13670 for (i=0; i<htab->top_id; i++)
13671 {
13672 sec = htab->stub_group[i].stub_sec;
13673 /* Only process it once, in its link_sec slot. */
13674 if (sec && i == htab->stub_group[i].link_sec->id)
13675 {
13676 osec = sec->output_section;
13677 elf32_arm_write_section (abfd, info, sec, sec->contents);
13678 if (! bfd_set_section_contents (abfd, osec, sec->contents,
13679 sec->output_offset, sec->size))
13680 return false;
13681 }
13682 }
13683
13684 /* Write out any glue sections now that we have created all the
13685 stubs. */
13686 if (globals->bfd_of_glue_owner != NULL)
13687 {
13688 if (! elf32_arm_output_glue_section (info, abfd,
13689 globals->bfd_of_glue_owner,
13690 ARM2THUMB_GLUE_SECTION_NAME))
13691 return false;
13692
13693 if (! elf32_arm_output_glue_section (info, abfd,
13694 globals->bfd_of_glue_owner,
13695 THUMB2ARM_GLUE_SECTION_NAME))
13696 return false;
13697
13698 if (! elf32_arm_output_glue_section (info, abfd,
13699 globals->bfd_of_glue_owner,
13700 VFP11_ERRATUM_VENEER_SECTION_NAME))
13701 return false;
13702
13703 if (! elf32_arm_output_glue_section (info, abfd,
13704 globals->bfd_of_glue_owner,
13705 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
13706 return false;
13707
13708 if (! elf32_arm_output_glue_section (info, abfd,
13709 globals->bfd_of_glue_owner,
13710 ARM_BX_GLUE_SECTION_NAME))
13711 return false;
13712 }
13713
13714 return true;
13715 }
13716
13717 /* Return a best guess for the machine number based on the attributes. */
13718
13719 static unsigned int
13720 bfd_arm_get_mach_from_attributes (bfd * abfd)
13721 {
13722 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
13723
13724 switch (arch)
13725 {
13726 case TAG_CPU_ARCH_PRE_V4: return bfd_mach_arm_3M;
13727 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
13728 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
13729 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
13730
13731 case TAG_CPU_ARCH_V5TE:
13732 {
13733 char * name;
13734
13735 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
13736 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
13737
13738 if (name)
13739 {
13740 if (strcmp (name, "IWMMXT2") == 0)
13741 return bfd_mach_arm_iWMMXt2;
13742
13743 if (strcmp (name, "IWMMXT") == 0)
13744 return bfd_mach_arm_iWMMXt;
13745
13746 if (strcmp (name, "XSCALE") == 0)
13747 {
13748 int wmmx;
13749
13750 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
13751 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
13752 switch (wmmx)
13753 {
13754 case 1: return bfd_mach_arm_iWMMXt;
13755 case 2: return bfd_mach_arm_iWMMXt2;
13756 default: return bfd_mach_arm_XScale;
13757 }
13758 }
13759 }
13760
13761 return bfd_mach_arm_5TE;
13762 }
13763
13764 case TAG_CPU_ARCH_V5TEJ:
13765 return bfd_mach_arm_5TEJ;
13766 case TAG_CPU_ARCH_V6:
13767 return bfd_mach_arm_6;
13768 case TAG_CPU_ARCH_V6KZ:
13769 return bfd_mach_arm_6KZ;
13770 case TAG_CPU_ARCH_V6T2:
13771 return bfd_mach_arm_6T2;
13772 case TAG_CPU_ARCH_V6K:
13773 return bfd_mach_arm_6K;
13774 case TAG_CPU_ARCH_V7:
13775 return bfd_mach_arm_7;
13776 case TAG_CPU_ARCH_V6_M:
13777 return bfd_mach_arm_6M;
13778 case TAG_CPU_ARCH_V6S_M:
13779 return bfd_mach_arm_6SM;
13780 case TAG_CPU_ARCH_V7E_M:
13781 return bfd_mach_arm_7EM;
13782 case TAG_CPU_ARCH_V8:
13783 return bfd_mach_arm_8;
13784 case TAG_CPU_ARCH_V8R:
13785 return bfd_mach_arm_8R;
13786 case TAG_CPU_ARCH_V8M_BASE:
13787 return bfd_mach_arm_8M_BASE;
13788 case TAG_CPU_ARCH_V8M_MAIN:
13789 return bfd_mach_arm_8M_MAIN;
13790 case TAG_CPU_ARCH_V8_1M_MAIN:
13791 return bfd_mach_arm_8_1M_MAIN;
13792
13793 default:
13794 /* Force entry to be added for any new known Tag_CPU_arch value. */
13795 BFD_ASSERT (arch > MAX_TAG_CPU_ARCH);
13796
13797 /* Unknown Tag_CPU_arch value. */
13798 return bfd_mach_arm_unknown;
13799 }
13800 }
13801
13802 /* Set the right machine number. */
13803
13804 static bool
13805 elf32_arm_object_p (bfd *abfd)
13806 {
13807 unsigned int mach;
13808
13809 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
13810
13811 if (mach == bfd_mach_arm_unknown)
13812 {
13813 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13814 mach = bfd_mach_arm_ep9312;
13815 else
13816 mach = bfd_arm_get_mach_from_attributes (abfd);
13817 }
13818
13819 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13820 return true;
13821 }
13822
13823 /* Function to keep ARM specific flags in the ELF header. */
13824
13825 static bool
13826 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13827 {
13828 if (elf_flags_init (abfd)
13829 && elf_elfheader (abfd)->e_flags != flags)
13830 {
13831 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13832 {
13833 if (flags & EF_ARM_INTERWORK)
13834 _bfd_error_handler
13835 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13836 abfd);
13837 else
13838 _bfd_error_handler
13839 (_("warning: clearing the interworking flag of %pB due to outside request"),
13840 abfd);
13841 }
13842 }
13843 else
13844 {
13845 elf_elfheader (abfd)->e_flags = flags;
13846 elf_flags_init (abfd) = true;
13847 }
13848
13849 return true;
13850 }
13851
13852 /* Copy backend specific data from one object module to another. */
13853
13854 static bool
13855 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13856 {
13857 flagword in_flags;
13858 flagword out_flags;
13859
13860 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13861 return true;
13862
13863 in_flags = elf_elfheader (ibfd)->e_flags;
13864 out_flags = elf_elfheader (obfd)->e_flags;
13865
13866 if (elf_flags_init (obfd)
13867 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13868 && in_flags != out_flags)
13869 {
13870 /* Cannot mix APCS26 and APCS32 code. */
13871 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13872 return false;
13873
13874 /* Cannot mix float APCS and non-float APCS code. */
13875 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13876 return false;
13877
13878 /* If the src and dest have different interworking flags
13879 then turn off the interworking bit. */
13880 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13881 {
13882 if (out_flags & EF_ARM_INTERWORK)
13883 _bfd_error_handler
13884 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13885 obfd, ibfd);
13886
13887 in_flags &= ~EF_ARM_INTERWORK;
13888 }
13889
13890 /* Likewise for PIC, though don't warn for this case. */
13891 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13892 in_flags &= ~EF_ARM_PIC;
13893 }
13894
13895 elf_elfheader (obfd)->e_flags = in_flags;
13896 elf_flags_init (obfd) = true;
13897
13898 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13899 }
13900
13901 /* Values for Tag_ABI_PCS_R9_use. */
13902 enum
13903 {
13904 AEABI_R9_V6,
13905 AEABI_R9_SB,
13906 AEABI_R9_TLS,
13907 AEABI_R9_unused
13908 };
13909
13910 /* Values for Tag_ABI_PCS_RW_data. */
13911 enum
13912 {
13913 AEABI_PCS_RW_data_absolute,
13914 AEABI_PCS_RW_data_PCrel,
13915 AEABI_PCS_RW_data_SBrel,
13916 AEABI_PCS_RW_data_unused
13917 };
13918
13919 /* Values for Tag_ABI_enum_size. */
13920 enum
13921 {
13922 AEABI_enum_unused,
13923 AEABI_enum_short,
13924 AEABI_enum_wide,
13925 AEABI_enum_forced_wide
13926 };
13927
13928 /* Determine whether an object attribute tag takes an integer, a
13929 string or both. */
13930
13931 static int
13932 elf32_arm_obj_attrs_arg_type (int tag)
13933 {
13934 if (tag == Tag_compatibility)
13935 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
13936 else if (tag == Tag_nodefaults)
13937 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
13938 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
13939 return ATTR_TYPE_FLAG_STR_VAL;
13940 else if (tag < 32)
13941 return ATTR_TYPE_FLAG_INT_VAL;
13942 else
13943 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
13944 }
13945
13946 /* The ABI defines that Tag_conformance should be emitted first, and that
13947 Tag_nodefaults should be second (if either is defined). This sets those
13948 two positions, and bumps up the position of all the remaining tags to
13949 compensate. */
13950 static int
13951 elf32_arm_obj_attrs_order (int num)
13952 {
13953 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
13954 return Tag_conformance;
13955 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
13956 return Tag_nodefaults;
13957 if ((num - 2) < Tag_nodefaults)
13958 return num - 2;
13959 if ((num - 1) < Tag_conformance)
13960 return num - 1;
13961 return num;
13962 }
13963
13964 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13965 static bool
13966 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
13967 {
13968 if ((tag & 127) < 64)
13969 {
13970 _bfd_error_handler
13971 (_("%pB: unknown mandatory EABI object attribute %d"),
13972 abfd, tag);
13973 bfd_set_error (bfd_error_bad_value);
13974 return false;
13975 }
13976 else
13977 {
13978 _bfd_error_handler
13979 (_("warning: %pB: unknown EABI object attribute %d"),
13980 abfd, tag);
13981 return true;
13982 }
13983 }
13984
13985 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13986 Returns -1 if no architecture could be read. */
13987
13988 static int
13989 get_secondary_compatible_arch (bfd *abfd)
13990 {
13991 obj_attribute *attr =
13992 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13993
13994 /* Note: the tag and its argument below are uleb128 values, though
13995 currently-defined values fit in one byte for each. */
13996 if (attr->s
13997 && attr->s[0] == Tag_CPU_arch
13998 && (attr->s[1] & 128) != 128
13999 && attr->s[2] == 0)
14000 return attr->s[1];
14001
14002 /* This tag is "safely ignorable", so don't complain if it looks funny. */
14003 return -1;
14004 }
14005
14006 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
14007 The tag is removed if ARCH is -1. */
14008
14009 static void
14010 set_secondary_compatible_arch (bfd *abfd, int arch)
14011 {
14012 obj_attribute *attr =
14013 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
14014
14015 if (arch == -1)
14016 {
14017 attr->s = NULL;
14018 return;
14019 }
14020
14021 /* Note: the tag and its argument below are uleb128 values, though
14022 currently-defined values fit in one byte for each. */
14023 if (!attr->s)
14024 attr->s = (char *) bfd_alloc (abfd, 3);
14025 attr->s[0] = Tag_CPU_arch;
14026 attr->s[1] = arch;
14027 attr->s[2] = '\0';
14028 }
14029
14030 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
14031 into account. */
14032
14033 static int
14034 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
14035 int newtag, int secondary_compat)
14036 {
14037 #define T(X) TAG_CPU_ARCH_##X
14038 int tagl, tagh, result;
14039 const int v6t2[] =
14040 {
14041 T(V6T2), /* PRE_V4. */
14042 T(V6T2), /* V4. */
14043 T(V6T2), /* V4T. */
14044 T(V6T2), /* V5T. */
14045 T(V6T2), /* V5TE. */
14046 T(V6T2), /* V5TEJ. */
14047 T(V6T2), /* V6. */
14048 T(V7), /* V6KZ. */
14049 T(V6T2) /* V6T2. */
14050 };
14051 const int v6k[] =
14052 {
14053 T(V6K), /* PRE_V4. */
14054 T(V6K), /* V4. */
14055 T(V6K), /* V4T. */
14056 T(V6K), /* V5T. */
14057 T(V6K), /* V5TE. */
14058 T(V6K), /* V5TEJ. */
14059 T(V6K), /* V6. */
14060 T(V6KZ), /* V6KZ. */
14061 T(V7), /* V6T2. */
14062 T(V6K) /* V6K. */
14063 };
14064 const int v7[] =
14065 {
14066 T(V7), /* PRE_V4. */
14067 T(V7), /* V4. */
14068 T(V7), /* V4T. */
14069 T(V7), /* V5T. */
14070 T(V7), /* V5TE. */
14071 T(V7), /* V5TEJ. */
14072 T(V7), /* V6. */
14073 T(V7), /* V6KZ. */
14074 T(V7), /* V6T2. */
14075 T(V7), /* V6K. */
14076 T(V7) /* V7. */
14077 };
14078 const int v6_m[] =
14079 {
14080 -1, /* PRE_V4. */
14081 -1, /* V4. */
14082 T(V6K), /* V4T. */
14083 T(V6K), /* V5T. */
14084 T(V6K), /* V5TE. */
14085 T(V6K), /* V5TEJ. */
14086 T(V6K), /* V6. */
14087 T(V6KZ), /* V6KZ. */
14088 T(V7), /* V6T2. */
14089 T(V6K), /* V6K. */
14090 T(V7), /* V7. */
14091 T(V6_M) /* V6_M. */
14092 };
14093 const int v6s_m[] =
14094 {
14095 -1, /* PRE_V4. */
14096 -1, /* V4. */
14097 T(V6K), /* V4T. */
14098 T(V6K), /* V5T. */
14099 T(V6K), /* V5TE. */
14100 T(V6K), /* V5TEJ. */
14101 T(V6K), /* V6. */
14102 T(V6KZ), /* V6KZ. */
14103 T(V7), /* V6T2. */
14104 T(V6K), /* V6K. */
14105 T(V7), /* V7. */
14106 T(V6S_M), /* V6_M. */
14107 T(V6S_M) /* V6S_M. */
14108 };
14109 const int v7e_m[] =
14110 {
14111 -1, /* PRE_V4. */
14112 -1, /* V4. */
14113 T(V7E_M), /* V4T. */
14114 T(V7E_M), /* V5T. */
14115 T(V7E_M), /* V5TE. */
14116 T(V7E_M), /* V5TEJ. */
14117 T(V7E_M), /* V6. */
14118 T(V7E_M), /* V6KZ. */
14119 T(V7E_M), /* V6T2. */
14120 T(V7E_M), /* V6K. */
14121 T(V7E_M), /* V7. */
14122 T(V7E_M), /* V6_M. */
14123 T(V7E_M), /* V6S_M. */
14124 T(V7E_M) /* V7E_M. */
14125 };
14126 const int v8[] =
14127 {
14128 T(V8), /* PRE_V4. */
14129 T(V8), /* V4. */
14130 T(V8), /* V4T. */
14131 T(V8), /* V5T. */
14132 T(V8), /* V5TE. */
14133 T(V8), /* V5TEJ. */
14134 T(V8), /* V6. */
14135 T(V8), /* V6KZ. */
14136 T(V8), /* V6T2. */
14137 T(V8), /* V6K. */
14138 T(V8), /* V7. */
14139 T(V8), /* V6_M. */
14140 T(V8), /* V6S_M. */
14141 T(V8), /* V7E_M. */
14142 T(V8) /* V8. */
14143 };
14144 const int v8r[] =
14145 {
14146 T(V8R), /* PRE_V4. */
14147 T(V8R), /* V4. */
14148 T(V8R), /* V4T. */
14149 T(V8R), /* V5T. */
14150 T(V8R), /* V5TE. */
14151 T(V8R), /* V5TEJ. */
14152 T(V8R), /* V6. */
14153 T(V8R), /* V6KZ. */
14154 T(V8R), /* V6T2. */
14155 T(V8R), /* V6K. */
14156 T(V8R), /* V7. */
14157 T(V8R), /* V6_M. */
14158 T(V8R), /* V6S_M. */
14159 T(V8R), /* V7E_M. */
14160 T(V8), /* V8. */
14161 T(V8R), /* V8R. */
14162 };
14163 const int v8m_baseline[] =
14164 {
14165 -1, /* PRE_V4. */
14166 -1, /* V4. */
14167 -1, /* V4T. */
14168 -1, /* V5T. */
14169 -1, /* V5TE. */
14170 -1, /* V5TEJ. */
14171 -1, /* V6. */
14172 -1, /* V6KZ. */
14173 -1, /* V6T2. */
14174 -1, /* V6K. */
14175 -1, /* V7. */
14176 T(V8M_BASE), /* V6_M. */
14177 T(V8M_BASE), /* V6S_M. */
14178 -1, /* V7E_M. */
14179 -1, /* V8. */
14180 -1, /* V8R. */
14181 T(V8M_BASE) /* V8-M BASELINE. */
14182 };
14183 const int v8m_mainline[] =
14184 {
14185 -1, /* PRE_V4. */
14186 -1, /* V4. */
14187 -1, /* V4T. */
14188 -1, /* V5T. */
14189 -1, /* V5TE. */
14190 -1, /* V5TEJ. */
14191 -1, /* V6. */
14192 -1, /* V6KZ. */
14193 -1, /* V6T2. */
14194 -1, /* V6K. */
14195 T(V8M_MAIN), /* V7. */
14196 T(V8M_MAIN), /* V6_M. */
14197 T(V8M_MAIN), /* V6S_M. */
14198 T(V8M_MAIN), /* V7E_M. */
14199 -1, /* V8. */
14200 -1, /* V8R. */
14201 T(V8M_MAIN), /* V8-M BASELINE. */
14202 T(V8M_MAIN) /* V8-M MAINLINE. */
14203 };
14204 const int v8_1m_mainline[] =
14205 {
14206 -1, /* PRE_V4. */
14207 -1, /* V4. */
14208 -1, /* V4T. */
14209 -1, /* V5T. */
14210 -1, /* V5TE. */
14211 -1, /* V5TEJ. */
14212 -1, /* V6. */
14213 -1, /* V6KZ. */
14214 -1, /* V6T2. */
14215 -1, /* V6K. */
14216 T(V8_1M_MAIN), /* V7. */
14217 T(V8_1M_MAIN), /* V6_M. */
14218 T(V8_1M_MAIN), /* V6S_M. */
14219 T(V8_1M_MAIN), /* V7E_M. */
14220 -1, /* V8. */
14221 -1, /* V8R. */
14222 T(V8_1M_MAIN), /* V8-M BASELINE. */
14223 T(V8_1M_MAIN), /* V8-M MAINLINE. */
14224 -1, /* Unused (18). */
14225 -1, /* Unused (19). */
14226 -1, /* Unused (20). */
14227 T(V8_1M_MAIN) /* V8.1-M MAINLINE. */
14228 };
14229 const int v4t_plus_v6_m[] =
14230 {
14231 -1, /* PRE_V4. */
14232 -1, /* V4. */
14233 T(V4T), /* V4T. */
14234 T(V5T), /* V5T. */
14235 T(V5TE), /* V5TE. */
14236 T(V5TEJ), /* V5TEJ. */
14237 T(V6), /* V6. */
14238 T(V6KZ), /* V6KZ. */
14239 T(V6T2), /* V6T2. */
14240 T(V6K), /* V6K. */
14241 T(V7), /* V7. */
14242 T(V6_M), /* V6_M. */
14243 T(V6S_M), /* V6S_M. */
14244 T(V7E_M), /* V7E_M. */
14245 T(V8), /* V8. */
14246 -1, /* V8R. */
14247 T(V8M_BASE), /* V8-M BASELINE. */
14248 T(V8M_MAIN), /* V8-M MAINLINE. */
14249 -1, /* Unused (18). */
14250 -1, /* Unused (19). */
14251 -1, /* Unused (20). */
14252 T(V8_1M_MAIN), /* V8.1-M MAINLINE. */
14253 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
14254 };
14255 const int *comb[] =
14256 {
14257 v6t2,
14258 v6k,
14259 v7,
14260 v6_m,
14261 v6s_m,
14262 v7e_m,
14263 v8,
14264 v8r,
14265 v8m_baseline,
14266 v8m_mainline,
14267 NULL,
14268 NULL,
14269 NULL,
14270 v8_1m_mainline,
14271 /* Pseudo-architecture. */
14272 v4t_plus_v6_m
14273 };
14274
14275 /* Check we've not got a higher architecture than we know about. */
14276
14277 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
14278 {
14279 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd);
14280 return -1;
14281 }
14282
14283 /* Override old tag if we have a Tag_also_compatible_with on the output. */
14284
14285 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
14286 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
14287 oldtag = T(V4T_PLUS_V6_M);
14288
14289 /* And override the new tag if we have a Tag_also_compatible_with on the
14290 input. */
14291
14292 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
14293 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
14294 newtag = T(V4T_PLUS_V6_M);
14295
14296 tagl = (oldtag < newtag) ? oldtag : newtag;
14297 result = tagh = (oldtag > newtag) ? oldtag : newtag;
14298
14299 /* Architectures before V6KZ add features monotonically. */
14300 if (tagh <= TAG_CPU_ARCH_V6KZ)
14301 return result;
14302
14303 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
14304
14305 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
14306 as the canonical version. */
14307 if (result == T(V4T_PLUS_V6_M))
14308 {
14309 result = T(V4T);
14310 *secondary_compat_out = T(V6_M);
14311 }
14312 else
14313 *secondary_compat_out = -1;
14314
14315 if (result == -1)
14316 {
14317 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
14318 ibfd, oldtag, newtag);
14319 return -1;
14320 }
14321
14322 return result;
14323 #undef T
14324 }
14325
14326 /* Query attributes object to see if integer divide instructions may be
14327 present in an object. */
14328 static bool
14329 elf32_arm_attributes_accept_div (const obj_attribute *attr)
14330 {
14331 int arch = attr[Tag_CPU_arch].i;
14332 int profile = attr[Tag_CPU_arch_profile].i;
14333
14334 switch (attr[Tag_DIV_use].i)
14335 {
14336 case 0:
14337 /* Integer divide allowed if instruction contained in archetecture. */
14338 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
14339 return true;
14340 else if (arch >= TAG_CPU_ARCH_V7E_M)
14341 return true;
14342 else
14343 return false;
14344
14345 case 1:
14346 /* Integer divide explicitly prohibited. */
14347 return false;
14348
14349 default:
14350 /* Unrecognised case - treat as allowing divide everywhere. */
14351 case 2:
14352 /* Integer divide allowed in ARM state. */
14353 return true;
14354 }
14355 }
14356
14357 /* Query attributes object to see if integer divide instructions are
14358 forbidden to be in the object. This is not the inverse of
14359 elf32_arm_attributes_accept_div. */
14360 static bool
14361 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
14362 {
14363 return attr[Tag_DIV_use].i == 1;
14364 }
14365
14366 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
14367 are conflicting attributes. */
14368
14369 static bool
14370 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
14371 {
14372 bfd *obfd = info->output_bfd;
14373 obj_attribute *in_attr;
14374 obj_attribute *out_attr;
14375 /* Some tags have 0 = don't care, 1 = strong requirement,
14376 2 = weak requirement. */
14377 static const int order_021[3] = {0, 2, 1};
14378 int i;
14379 bool result = true;
14380 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
14381
14382 /* Skip the linker stubs file. This preserves previous behavior
14383 of accepting unknown attributes in the first input file - but
14384 is that a bug? */
14385 if (ibfd->flags & BFD_LINKER_CREATED)
14386 return true;
14387
14388 /* Skip any input that hasn't attribute section.
14389 This enables to link object files without attribute section with
14390 any others. */
14391 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
14392 return true;
14393
14394 if (!elf_known_obj_attributes_proc (obfd)[0].i)
14395 {
14396 /* This is the first object. Copy the attributes. */
14397 _bfd_elf_copy_obj_attributes (ibfd, obfd);
14398
14399 out_attr = elf_known_obj_attributes_proc (obfd);
14400
14401 /* Use the Tag_null value to indicate the attributes have been
14402 initialized. */
14403 out_attr[0].i = 1;
14404
14405 /* We do not output objects with Tag_MPextension_use_legacy - we move
14406 the attribute's value to Tag_MPextension_use. */
14407 if (out_attr[Tag_MPextension_use_legacy].i != 0)
14408 {
14409 if (out_attr[Tag_MPextension_use].i != 0
14410 && out_attr[Tag_MPextension_use_legacy].i
14411 != out_attr[Tag_MPextension_use].i)
14412 {
14413 _bfd_error_handler
14414 (_("Error: %pB has both the current and legacy "
14415 "Tag_MPextension_use attributes"), ibfd);
14416 result = false;
14417 }
14418
14419 out_attr[Tag_MPextension_use] =
14420 out_attr[Tag_MPextension_use_legacy];
14421 out_attr[Tag_MPextension_use_legacy].type = 0;
14422 out_attr[Tag_MPextension_use_legacy].i = 0;
14423 }
14424
14425 return result;
14426 }
14427
14428 in_attr = elf_known_obj_attributes_proc (ibfd);
14429 out_attr = elf_known_obj_attributes_proc (obfd);
14430 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
14431 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
14432 {
14433 /* Ignore mismatches if the object doesn't use floating point or is
14434 floating point ABI independent. */
14435 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
14436 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14437 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
14438 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
14439 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14440 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
14441 {
14442 _bfd_error_handler
14443 (_("error: %pB uses VFP register arguments, %pB does not"),
14444 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
14445 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
14446 result = false;
14447 }
14448 }
14449
14450 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
14451 {
14452 /* Merge this attribute with existing attributes. */
14453 switch (i)
14454 {
14455 case Tag_CPU_raw_name:
14456 case Tag_CPU_name:
14457 /* These are merged after Tag_CPU_arch. */
14458 break;
14459
14460 case Tag_ABI_optimization_goals:
14461 case Tag_ABI_FP_optimization_goals:
14462 /* Use the first value seen. */
14463 break;
14464
14465 case Tag_CPU_arch:
14466 {
14467 int secondary_compat = -1, secondary_compat_out = -1;
14468 unsigned int saved_out_attr = out_attr[i].i;
14469 int arch_attr;
14470 static const char *name_table[] =
14471 {
14472 /* These aren't real CPU names, but we can't guess
14473 that from the architecture version alone. */
14474 "Pre v4",
14475 "ARM v4",
14476 "ARM v4T",
14477 "ARM v5T",
14478 "ARM v5TE",
14479 "ARM v5TEJ",
14480 "ARM v6",
14481 "ARM v6KZ",
14482 "ARM v6T2",
14483 "ARM v6K",
14484 "ARM v7",
14485 "ARM v6-M",
14486 "ARM v6S-M",
14487 "ARM v8",
14488 "",
14489 "ARM v8-M.baseline",
14490 "ARM v8-M.mainline",
14491 };
14492
14493 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
14494 secondary_compat = get_secondary_compatible_arch (ibfd);
14495 secondary_compat_out = get_secondary_compatible_arch (obfd);
14496 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
14497 &secondary_compat_out,
14498 in_attr[i].i,
14499 secondary_compat);
14500
14501 /* Return with error if failed to merge. */
14502 if (arch_attr == -1)
14503 return false;
14504
14505 out_attr[i].i = arch_attr;
14506
14507 set_secondary_compatible_arch (obfd, secondary_compat_out);
14508
14509 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
14510 if (out_attr[i].i == saved_out_attr)
14511 ; /* Leave the names alone. */
14512 else if (out_attr[i].i == in_attr[i].i)
14513 {
14514 /* The output architecture has been changed to match the
14515 input architecture. Use the input names. */
14516 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
14517 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
14518 : NULL;
14519 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
14520 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
14521 : NULL;
14522 }
14523 else
14524 {
14525 out_attr[Tag_CPU_name].s = NULL;
14526 out_attr[Tag_CPU_raw_name].s = NULL;
14527 }
14528
14529 /* If we still don't have a value for Tag_CPU_name,
14530 make one up now. Tag_CPU_raw_name remains blank. */
14531 if (out_attr[Tag_CPU_name].s == NULL
14532 && out_attr[i].i < ARRAY_SIZE (name_table))
14533 out_attr[Tag_CPU_name].s =
14534 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
14535 }
14536 break;
14537
14538 case Tag_ARM_ISA_use:
14539 case Tag_THUMB_ISA_use:
14540 case Tag_WMMX_arch:
14541 case Tag_Advanced_SIMD_arch:
14542 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
14543 case Tag_ABI_FP_rounding:
14544 case Tag_ABI_FP_exceptions:
14545 case Tag_ABI_FP_user_exceptions:
14546 case Tag_ABI_FP_number_model:
14547 case Tag_FP_HP_extension:
14548 case Tag_CPU_unaligned_access:
14549 case Tag_T2EE_use:
14550 case Tag_MPextension_use:
14551 case Tag_MVE_arch:
14552 /* Use the largest value specified. */
14553 if (in_attr[i].i > out_attr[i].i)
14554 out_attr[i].i = in_attr[i].i;
14555 break;
14556
14557 case Tag_ABI_align_preserved:
14558 case Tag_ABI_PCS_RO_data:
14559 /* Use the smallest value specified. */
14560 if (in_attr[i].i < out_attr[i].i)
14561 out_attr[i].i = in_attr[i].i;
14562 break;
14563
14564 case Tag_ABI_align_needed:
14565 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
14566 && (in_attr[Tag_ABI_align_preserved].i == 0
14567 || out_attr[Tag_ABI_align_preserved].i == 0))
14568 {
14569 /* This error message should be enabled once all non-conformant
14570 binaries in the toolchain have had the attributes set
14571 properly.
14572 _bfd_error_handler
14573 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14574 obfd, ibfd);
14575 result = false; */
14576 }
14577 /* Fall through. */
14578 case Tag_ABI_FP_denormal:
14579 case Tag_ABI_PCS_GOT_use:
14580 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14581 value if greater than 2 (for future-proofing). */
14582 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
14583 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
14584 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
14585 out_attr[i].i = in_attr[i].i;
14586 break;
14587
14588 case Tag_Virtualization_use:
14589 /* The virtualization tag effectively stores two bits of
14590 information: the intended use of TrustZone (in bit 0), and the
14591 intended use of Virtualization (in bit 1). */
14592 if (out_attr[i].i == 0)
14593 out_attr[i].i = in_attr[i].i;
14594 else if (in_attr[i].i != 0
14595 && in_attr[i].i != out_attr[i].i)
14596 {
14597 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
14598 out_attr[i].i = 3;
14599 else
14600 {
14601 _bfd_error_handler
14602 (_("error: %pB: unable to merge virtualization attributes "
14603 "with %pB"),
14604 obfd, ibfd);
14605 result = false;
14606 }
14607 }
14608 break;
14609
14610 case Tag_CPU_arch_profile:
14611 if (out_attr[i].i != in_attr[i].i)
14612 {
14613 /* 0 will merge with anything.
14614 'A' and 'S' merge to 'A'.
14615 'R' and 'S' merge to 'R'.
14616 'M' and 'A|R|S' is an error. */
14617 if (out_attr[i].i == 0
14618 || (out_attr[i].i == 'S'
14619 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
14620 out_attr[i].i = in_attr[i].i;
14621 else if (in_attr[i].i == 0
14622 || (in_attr[i].i == 'S'
14623 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
14624 ; /* Do nothing. */
14625 else
14626 {
14627 _bfd_error_handler
14628 (_("error: %pB: conflicting architecture profiles %c/%c"),
14629 ibfd,
14630 in_attr[i].i ? in_attr[i].i : '0',
14631 out_attr[i].i ? out_attr[i].i : '0');
14632 result = false;
14633 }
14634 }
14635 break;
14636
14637 case Tag_DSP_extension:
14638 /* No need to change output value if any of:
14639 - pre (<=) ARMv5T input architecture (do not have DSP)
14640 - M input profile not ARMv7E-M and do not have DSP. */
14641 if (in_attr[Tag_CPU_arch].i <= 3
14642 || (in_attr[Tag_CPU_arch_profile].i == 'M'
14643 && in_attr[Tag_CPU_arch].i != 13
14644 && in_attr[i].i == 0))
14645 ; /* Do nothing. */
14646 /* Output value should be 0 if DSP part of architecture, ie.
14647 - post (>=) ARMv5te architecture output
14648 - A, R or S profile output or ARMv7E-M output architecture. */
14649 else if (out_attr[Tag_CPU_arch].i >= 4
14650 && (out_attr[Tag_CPU_arch_profile].i == 'A'
14651 || out_attr[Tag_CPU_arch_profile].i == 'R'
14652 || out_attr[Tag_CPU_arch_profile].i == 'S'
14653 || out_attr[Tag_CPU_arch].i == 13))
14654 out_attr[i].i = 0;
14655 /* Otherwise, DSP instructions are added and not part of output
14656 architecture. */
14657 else
14658 out_attr[i].i = 1;
14659 break;
14660
14661 case Tag_FP_arch:
14662 {
14663 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14664 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14665 when it's 0. It might mean absence of FP hardware if
14666 Tag_FP_arch is zero. */
14667
14668 #define VFP_VERSION_COUNT 9
14669 static const struct
14670 {
14671 int ver;
14672 int regs;
14673 } vfp_versions[VFP_VERSION_COUNT] =
14674 {
14675 {0, 0},
14676 {1, 16},
14677 {2, 16},
14678 {3, 32},
14679 {3, 16},
14680 {4, 32},
14681 {4, 16},
14682 {8, 32},
14683 {8, 16}
14684 };
14685 int ver;
14686 int regs;
14687 int newval;
14688
14689 /* If the output has no requirement about FP hardware,
14690 follow the requirement of the input. */
14691 if (out_attr[i].i == 0)
14692 {
14693 /* This assert is still reasonable, we shouldn't
14694 produce the suspicious build attribute
14695 combination (See below for in_attr). */
14696 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
14697 out_attr[i].i = in_attr[i].i;
14698 out_attr[Tag_ABI_HardFP_use].i
14699 = in_attr[Tag_ABI_HardFP_use].i;
14700 break;
14701 }
14702 /* If the input has no requirement about FP hardware, do
14703 nothing. */
14704 else if (in_attr[i].i == 0)
14705 {
14706 /* We used to assert that Tag_ABI_HardFP_use was
14707 zero here, but we should never assert when
14708 consuming an object file that has suspicious
14709 build attributes. The single precision variant
14710 of 'no FP architecture' is still 'no FP
14711 architecture', so we just ignore the tag in this
14712 case. */
14713 break;
14714 }
14715
14716 /* Both the input and the output have nonzero Tag_FP_arch.
14717 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
14718
14719 /* If both the input and the output have zero Tag_ABI_HardFP_use,
14720 do nothing. */
14721 if (in_attr[Tag_ABI_HardFP_use].i == 0
14722 && out_attr[Tag_ABI_HardFP_use].i == 0)
14723 ;
14724 /* If the input and the output have different Tag_ABI_HardFP_use,
14725 the combination of them is 0 (implied by Tag_FP_arch). */
14726 else if (in_attr[Tag_ABI_HardFP_use].i
14727 != out_attr[Tag_ABI_HardFP_use].i)
14728 out_attr[Tag_ABI_HardFP_use].i = 0;
14729
14730 /* Now we can handle Tag_FP_arch. */
14731
14732 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14733 pick the biggest. */
14734 if (in_attr[i].i >= VFP_VERSION_COUNT
14735 && in_attr[i].i > out_attr[i].i)
14736 {
14737 out_attr[i] = in_attr[i];
14738 break;
14739 }
14740 /* The output uses the superset of input features
14741 (ISA version) and registers. */
14742 ver = vfp_versions[in_attr[i].i].ver;
14743 if (ver < vfp_versions[out_attr[i].i].ver)
14744 ver = vfp_versions[out_attr[i].i].ver;
14745 regs = vfp_versions[in_attr[i].i].regs;
14746 if (regs < vfp_versions[out_attr[i].i].regs)
14747 regs = vfp_versions[out_attr[i].i].regs;
14748 /* This assumes all possible supersets are also a valid
14749 options. */
14750 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
14751 {
14752 if (regs == vfp_versions[newval].regs
14753 && ver == vfp_versions[newval].ver)
14754 break;
14755 }
14756 out_attr[i].i = newval;
14757 }
14758 break;
14759 case Tag_PCS_config:
14760 if (out_attr[i].i == 0)
14761 out_attr[i].i = in_attr[i].i;
14762 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
14763 {
14764 /* It's sometimes ok to mix different configs, so this is only
14765 a warning. */
14766 _bfd_error_handler
14767 (_("warning: %pB: conflicting platform configuration"), ibfd);
14768 }
14769 break;
14770 case Tag_ABI_PCS_R9_use:
14771 if (in_attr[i].i != out_attr[i].i
14772 && out_attr[i].i != AEABI_R9_unused
14773 && in_attr[i].i != AEABI_R9_unused)
14774 {
14775 _bfd_error_handler
14776 (_("error: %pB: conflicting use of R9"), ibfd);
14777 result = false;
14778 }
14779 if (out_attr[i].i == AEABI_R9_unused)
14780 out_attr[i].i = in_attr[i].i;
14781 break;
14782 case Tag_ABI_PCS_RW_data:
14783 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
14784 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
14785 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
14786 {
14787 _bfd_error_handler
14788 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14789 ibfd);
14790 result = false;
14791 }
14792 /* Use the smallest value specified. */
14793 if (in_attr[i].i < out_attr[i].i)
14794 out_attr[i].i = in_attr[i].i;
14795 break;
14796 case Tag_ABI_PCS_wchar_t:
14797 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
14798 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
14799 {
14800 _bfd_error_handler
14801 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14802 ibfd, in_attr[i].i, out_attr[i].i);
14803 }
14804 else if (in_attr[i].i && !out_attr[i].i)
14805 out_attr[i].i = in_attr[i].i;
14806 break;
14807 case Tag_ABI_enum_size:
14808 if (in_attr[i].i != AEABI_enum_unused)
14809 {
14810 if (out_attr[i].i == AEABI_enum_unused
14811 || out_attr[i].i == AEABI_enum_forced_wide)
14812 {
14813 /* The existing object is compatible with anything.
14814 Use whatever requirements the new object has. */
14815 out_attr[i].i = in_attr[i].i;
14816 }
14817 else if (in_attr[i].i != AEABI_enum_forced_wide
14818 && out_attr[i].i != in_attr[i].i
14819 && !elf_arm_tdata (obfd)->no_enum_size_warning)
14820 {
14821 static const char *aeabi_enum_names[] =
14822 { "", "variable-size", "32-bit", "" };
14823 const char *in_name =
14824 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14825 ? aeabi_enum_names[in_attr[i].i]
14826 : "<unknown>";
14827 const char *out_name =
14828 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14829 ? aeabi_enum_names[out_attr[i].i]
14830 : "<unknown>";
14831 _bfd_error_handler
14832 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14833 ibfd, in_name, out_name);
14834 }
14835 }
14836 break;
14837 case Tag_ABI_VFP_args:
14838 /* Aready done. */
14839 break;
14840 case Tag_ABI_WMMX_args:
14841 if (in_attr[i].i != out_attr[i].i)
14842 {
14843 _bfd_error_handler
14844 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14845 ibfd, obfd);
14846 result = false;
14847 }
14848 break;
14849 case Tag_compatibility:
14850 /* Merged in target-independent code. */
14851 break;
14852 case Tag_ABI_HardFP_use:
14853 /* This is handled along with Tag_FP_arch. */
14854 break;
14855 case Tag_ABI_FP_16bit_format:
14856 if (in_attr[i].i != 0 && out_attr[i].i != 0)
14857 {
14858 if (in_attr[i].i != out_attr[i].i)
14859 {
14860 _bfd_error_handler
14861 (_("error: fp16 format mismatch between %pB and %pB"),
14862 ibfd, obfd);
14863 result = false;
14864 }
14865 }
14866 if (in_attr[i].i != 0)
14867 out_attr[i].i = in_attr[i].i;
14868 break;
14869
14870 case Tag_DIV_use:
14871 /* A value of zero on input means that the divide instruction may
14872 be used if available in the base architecture as specified via
14873 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14874 the user did not want divide instructions. A value of 2
14875 explicitly means that divide instructions were allowed in ARM
14876 and Thumb state. */
14877 if (in_attr[i].i == out_attr[i].i)
14878 /* Do nothing. */ ;
14879 else if (elf32_arm_attributes_forbid_div (in_attr)
14880 && !elf32_arm_attributes_accept_div (out_attr))
14881 out_attr[i].i = 1;
14882 else if (elf32_arm_attributes_forbid_div (out_attr)
14883 && elf32_arm_attributes_accept_div (in_attr))
14884 out_attr[i].i = in_attr[i].i;
14885 else if (in_attr[i].i == 2)
14886 out_attr[i].i = in_attr[i].i;
14887 break;
14888
14889 case Tag_MPextension_use_legacy:
14890 /* We don't output objects with Tag_MPextension_use_legacy - we
14891 move the value to Tag_MPextension_use. */
14892 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
14893 {
14894 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
14895 {
14896 _bfd_error_handler
14897 (_("%pB has both the current and legacy "
14898 "Tag_MPextension_use attributes"),
14899 ibfd);
14900 result = false;
14901 }
14902 }
14903
14904 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
14905 out_attr[Tag_MPextension_use] = in_attr[i];
14906
14907 break;
14908
14909 case Tag_nodefaults:
14910 /* This tag is set if it exists, but the value is unused (and is
14911 typically zero). We don't actually need to do anything here -
14912 the merge happens automatically when the type flags are merged
14913 below. */
14914 break;
14915 case Tag_also_compatible_with:
14916 /* Already done in Tag_CPU_arch. */
14917 break;
14918 case Tag_conformance:
14919 /* Keep the attribute if it matches. Throw it away otherwise.
14920 No attribute means no claim to conform. */
14921 if (!in_attr[i].s || !out_attr[i].s
14922 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
14923 out_attr[i].s = NULL;
14924 break;
14925
14926 default:
14927 result
14928 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
14929 }
14930
14931 /* If out_attr was copied from in_attr then it won't have a type yet. */
14932 if (in_attr[i].type && !out_attr[i].type)
14933 out_attr[i].type = in_attr[i].type;
14934 }
14935
14936 /* Merge Tag_compatibility attributes and any common GNU ones. */
14937 if (!_bfd_elf_merge_object_attributes (ibfd, info))
14938 return false;
14939
14940 /* Check for any attributes not known on ARM. */
14941 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
14942
14943 return result;
14944 }
14945
14946
14947 /* Return TRUE if the two EABI versions are incompatible. */
14948
14949 static bool
14950 elf32_arm_versions_compatible (unsigned iver, unsigned over)
14951 {
14952 /* v4 and v5 are the same spec before and after it was released,
14953 so allow mixing them. */
14954 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
14955 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
14956 return true;
14957
14958 return (iver == over);
14959 }
14960
14961 /* Merge backend specific data from an object file to the output
14962 object file when linking. */
14963
14964 static bool
14965 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
14966
14967 /* Display the flags field. */
14968
14969 static bool
14970 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
14971 {
14972 FILE * file = (FILE *) ptr;
14973 unsigned long flags;
14974
14975 BFD_ASSERT (abfd != NULL && ptr != NULL);
14976
14977 /* Print normal ELF private data. */
14978 _bfd_elf_print_private_bfd_data (abfd, ptr);
14979
14980 flags = elf_elfheader (abfd)->e_flags;
14981 /* Ignore init flag - it may not be set, despite the flags field
14982 containing valid data. */
14983
14984 fprintf (file, _("private flags = 0x%lx:"), elf_elfheader (abfd)->e_flags);
14985
14986 switch (EF_ARM_EABI_VERSION (flags))
14987 {
14988 case EF_ARM_EABI_UNKNOWN:
14989 /* The following flag bits are GNU extensions and not part of the
14990 official ARM ELF extended ABI. Hence they are only decoded if
14991 the EABI version is not set. */
14992 if (flags & EF_ARM_INTERWORK)
14993 fprintf (file, _(" [interworking enabled]"));
14994
14995 if (flags & EF_ARM_APCS_26)
14996 fprintf (file, " [APCS-26]");
14997 else
14998 fprintf (file, " [APCS-32]");
14999
15000 if (flags & EF_ARM_VFP_FLOAT)
15001 fprintf (file, _(" [VFP float format]"));
15002 else if (flags & EF_ARM_MAVERICK_FLOAT)
15003 fprintf (file, _(" [Maverick float format]"));
15004 else
15005 fprintf (file, _(" [FPA float format]"));
15006
15007 if (flags & EF_ARM_APCS_FLOAT)
15008 fprintf (file, _(" [floats passed in float registers]"));
15009
15010 if (flags & EF_ARM_PIC)
15011 fprintf (file, _(" [position independent]"));
15012
15013 if (flags & EF_ARM_NEW_ABI)
15014 fprintf (file, _(" [new ABI]"));
15015
15016 if (flags & EF_ARM_OLD_ABI)
15017 fprintf (file, _(" [old ABI]"));
15018
15019 if (flags & EF_ARM_SOFT_FLOAT)
15020 fprintf (file, _(" [software FP]"));
15021
15022 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
15023 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
15024 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
15025 | EF_ARM_MAVERICK_FLOAT);
15026 break;
15027
15028 case EF_ARM_EABI_VER1:
15029 fprintf (file, _(" [Version1 EABI]"));
15030
15031 if (flags & EF_ARM_SYMSARESORTED)
15032 fprintf (file, _(" [sorted symbol table]"));
15033 else
15034 fprintf (file, _(" [unsorted symbol table]"));
15035
15036 flags &= ~ EF_ARM_SYMSARESORTED;
15037 break;
15038
15039 case EF_ARM_EABI_VER2:
15040 fprintf (file, _(" [Version2 EABI]"));
15041
15042 if (flags & EF_ARM_SYMSARESORTED)
15043 fprintf (file, _(" [sorted symbol table]"));
15044 else
15045 fprintf (file, _(" [unsorted symbol table]"));
15046
15047 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
15048 fprintf (file, _(" [dynamic symbols use segment index]"));
15049
15050 if (flags & EF_ARM_MAPSYMSFIRST)
15051 fprintf (file, _(" [mapping symbols precede others]"));
15052
15053 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
15054 | EF_ARM_MAPSYMSFIRST);
15055 break;
15056
15057 case EF_ARM_EABI_VER3:
15058 fprintf (file, _(" [Version3 EABI]"));
15059 break;
15060
15061 case EF_ARM_EABI_VER4:
15062 fprintf (file, _(" [Version4 EABI]"));
15063 goto eabi;
15064
15065 case EF_ARM_EABI_VER5:
15066 fprintf (file, _(" [Version5 EABI]"));
15067
15068 if (flags & EF_ARM_ABI_FLOAT_SOFT)
15069 fprintf (file, _(" [soft-float ABI]"));
15070
15071 if (flags & EF_ARM_ABI_FLOAT_HARD)
15072 fprintf (file, _(" [hard-float ABI]"));
15073
15074 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
15075
15076 eabi:
15077 if (flags & EF_ARM_BE8)
15078 fprintf (file, _(" [BE8]"));
15079
15080 if (flags & EF_ARM_LE8)
15081 fprintf (file, _(" [LE8]"));
15082
15083 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
15084 break;
15085
15086 default:
15087 fprintf (file, _(" <EABI version unrecognised>"));
15088 break;
15089 }
15090
15091 flags &= ~ EF_ARM_EABIMASK;
15092
15093 if (flags & EF_ARM_RELEXEC)
15094 fprintf (file, _(" [relocatable executable]"));
15095
15096 if (flags & EF_ARM_PIC)
15097 fprintf (file, _(" [position independent]"));
15098
15099 if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC)
15100 fprintf (file, _(" [FDPIC ABI supplement]"));
15101
15102 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC);
15103
15104 if (flags)
15105 fprintf (file, _(" <Unrecognised flag bits set>"));
15106
15107 fputc ('\n', file);
15108
15109 return true;
15110 }
15111
15112 static int
15113 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
15114 {
15115 switch (ELF_ST_TYPE (elf_sym->st_info))
15116 {
15117 case STT_ARM_TFUNC:
15118 return ELF_ST_TYPE (elf_sym->st_info);
15119
15120 case STT_ARM_16BIT:
15121 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
15122 This allows us to distinguish between data used by Thumb instructions
15123 and non-data (which is probably code) inside Thumb regions of an
15124 executable. */
15125 if (type != STT_OBJECT && type != STT_TLS)
15126 return ELF_ST_TYPE (elf_sym->st_info);
15127 break;
15128
15129 default:
15130 break;
15131 }
15132
15133 return type;
15134 }
15135
15136 static asection *
15137 elf32_arm_gc_mark_hook (asection *sec,
15138 struct bfd_link_info *info,
15139 Elf_Internal_Rela *rel,
15140 struct elf_link_hash_entry *h,
15141 Elf_Internal_Sym *sym)
15142 {
15143 if (h != NULL)
15144 switch (ELF32_R_TYPE (rel->r_info))
15145 {
15146 case R_ARM_GNU_VTINHERIT:
15147 case R_ARM_GNU_VTENTRY:
15148 return NULL;
15149 }
15150
15151 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
15152 }
15153
15154 /* Look through the relocs for a section during the first phase. */
15155
15156 static bool
15157 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
15158 asection *sec, const Elf_Internal_Rela *relocs)
15159 {
15160 Elf_Internal_Shdr *symtab_hdr;
15161 struct elf_link_hash_entry **sym_hashes;
15162 const Elf_Internal_Rela *rel;
15163 const Elf_Internal_Rela *rel_end;
15164 bfd *dynobj;
15165 asection *sreloc;
15166 struct elf32_arm_link_hash_table *htab;
15167 bool call_reloc_p;
15168 bool may_become_dynamic_p;
15169 bool may_need_local_target_p;
15170 unsigned long nsyms;
15171
15172 if (bfd_link_relocatable (info))
15173 return true;
15174
15175 BFD_ASSERT (is_arm_elf (abfd));
15176
15177 htab = elf32_arm_hash_table (info);
15178 if (htab == NULL)
15179 return false;
15180
15181 sreloc = NULL;
15182
15183 /* Create dynamic sections for relocatable executables so that we can
15184 copy relocations. */
15185 if (htab->root.is_relocatable_executable
15186 && ! htab->root.dynamic_sections_created)
15187 {
15188 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
15189 return false;
15190 }
15191
15192 if (htab->root.dynobj == NULL)
15193 htab->root.dynobj = abfd;
15194 if (!create_ifunc_sections (info))
15195 return false;
15196
15197 dynobj = htab->root.dynobj;
15198
15199 symtab_hdr = & elf_symtab_hdr (abfd);
15200 sym_hashes = elf_sym_hashes (abfd);
15201 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
15202
15203 rel_end = relocs + sec->reloc_count;
15204 for (rel = relocs; rel < rel_end; rel++)
15205 {
15206 Elf_Internal_Sym *isym;
15207 struct elf_link_hash_entry *h;
15208 struct elf32_arm_link_hash_entry *eh;
15209 unsigned int r_symndx;
15210 int r_type;
15211
15212 r_symndx = ELF32_R_SYM (rel->r_info);
15213 r_type = ELF32_R_TYPE (rel->r_info);
15214 r_type = arm_real_reloc_type (htab, r_type);
15215
15216 if (r_symndx >= nsyms
15217 /* PR 9934: It is possible to have relocations that do not
15218 refer to symbols, thus it is also possible to have an
15219 object file containing relocations but no symbol table. */
15220 && (r_symndx > STN_UNDEF || nsyms > 0))
15221 {
15222 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
15223 r_symndx);
15224 return false;
15225 }
15226
15227 h = NULL;
15228 isym = NULL;
15229 if (nsyms > 0)
15230 {
15231 if (r_symndx < symtab_hdr->sh_info)
15232 {
15233 /* A local symbol. */
15234 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache,
15235 abfd, r_symndx);
15236 if (isym == NULL)
15237 return false;
15238 }
15239 else
15240 {
15241 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
15242 while (h->root.type == bfd_link_hash_indirect
15243 || h->root.type == bfd_link_hash_warning)
15244 h = (struct elf_link_hash_entry *) h->root.u.i.link;
15245 }
15246 }
15247
15248 eh = (struct elf32_arm_link_hash_entry *) h;
15249
15250 call_reloc_p = false;
15251 may_become_dynamic_p = false;
15252 may_need_local_target_p = false;
15253
15254 /* Could be done earlier, if h were already available. */
15255 r_type = elf32_arm_tls_transition (info, r_type, h);
15256 switch (r_type)
15257 {
15258 case R_ARM_GOTOFFFUNCDESC:
15259 {
15260 if (h == NULL)
15261 {
15262 if (!elf32_arm_allocate_local_sym_info (abfd))
15263 return false;
15264 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].gotofffuncdesc_cnt += 1;
15265 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
15266 }
15267 else
15268 {
15269 eh->fdpic_cnts.gotofffuncdesc_cnt++;
15270 }
15271 }
15272 break;
15273
15274 case R_ARM_GOTFUNCDESC:
15275 {
15276 if (h == NULL)
15277 {
15278 /* Such a relocation is not supposed to be generated
15279 by gcc on a static function. */
15280 /* Anyway if needed it could be handled. */
15281 abort();
15282 }
15283 else
15284 {
15285 eh->fdpic_cnts.gotfuncdesc_cnt++;
15286 }
15287 }
15288 break;
15289
15290 case R_ARM_FUNCDESC:
15291 {
15292 if (h == NULL)
15293 {
15294 if (!elf32_arm_allocate_local_sym_info (abfd))
15295 return false;
15296 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_cnt += 1;
15297 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
15298 }
15299 else
15300 {
15301 eh->fdpic_cnts.funcdesc_cnt++;
15302 }
15303 }
15304 break;
15305
15306 case R_ARM_GOT32:
15307 case R_ARM_GOT_PREL:
15308 case R_ARM_TLS_GD32:
15309 case R_ARM_TLS_GD32_FDPIC:
15310 case R_ARM_TLS_IE32:
15311 case R_ARM_TLS_IE32_FDPIC:
15312 case R_ARM_TLS_GOTDESC:
15313 case R_ARM_TLS_DESCSEQ:
15314 case R_ARM_THM_TLS_DESCSEQ:
15315 case R_ARM_TLS_CALL:
15316 case R_ARM_THM_TLS_CALL:
15317 /* This symbol requires a global offset table entry. */
15318 {
15319 int tls_type, old_tls_type;
15320
15321 switch (r_type)
15322 {
15323 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
15324 case R_ARM_TLS_GD32_FDPIC: tls_type = GOT_TLS_GD; break;
15325
15326 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
15327 case R_ARM_TLS_IE32_FDPIC: tls_type = GOT_TLS_IE; break;
15328
15329 case R_ARM_TLS_GOTDESC:
15330 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
15331 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
15332 tls_type = GOT_TLS_GDESC; break;
15333
15334 default: tls_type = GOT_NORMAL; break;
15335 }
15336
15337 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
15338 info->flags |= DF_STATIC_TLS;
15339
15340 if (h != NULL)
15341 {
15342 h->got.refcount++;
15343 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
15344 }
15345 else
15346 {
15347 /* This is a global offset table entry for a local symbol. */
15348 if (!elf32_arm_allocate_local_sym_info (abfd))
15349 return false;
15350 elf_local_got_refcounts (abfd)[r_symndx] += 1;
15351 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
15352 }
15353
15354 /* If a variable is accessed with both tls methods, two
15355 slots may be created. */
15356 if (GOT_TLS_GD_ANY_P (old_tls_type)
15357 && GOT_TLS_GD_ANY_P (tls_type))
15358 tls_type |= old_tls_type;
15359
15360 /* We will already have issued an error message if there
15361 is a TLS/non-TLS mismatch, based on the symbol
15362 type. So just combine any TLS types needed. */
15363 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
15364 && tls_type != GOT_NORMAL)
15365 tls_type |= old_tls_type;
15366
15367 /* If the symbol is accessed in both IE and GDESC
15368 method, we're able to relax. Turn off the GDESC flag,
15369 without messing up with any other kind of tls types
15370 that may be involved. */
15371 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
15372 tls_type &= ~GOT_TLS_GDESC;
15373
15374 if (old_tls_type != tls_type)
15375 {
15376 if (h != NULL)
15377 elf32_arm_hash_entry (h)->tls_type = tls_type;
15378 else
15379 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
15380 }
15381 }
15382 /* Fall through. */
15383
15384 case R_ARM_TLS_LDM32:
15385 case R_ARM_TLS_LDM32_FDPIC:
15386 if (r_type == R_ARM_TLS_LDM32 || r_type == R_ARM_TLS_LDM32_FDPIC)
15387 htab->tls_ldm_got.refcount++;
15388 /* Fall through. */
15389
15390 case R_ARM_GOTOFF32:
15391 case R_ARM_GOTPC:
15392 if (htab->root.sgot == NULL
15393 && !create_got_section (htab->root.dynobj, info))
15394 return false;
15395 break;
15396
15397 case R_ARM_PC24:
15398 case R_ARM_PLT32:
15399 case R_ARM_CALL:
15400 case R_ARM_JUMP24:
15401 case R_ARM_PREL31:
15402 case R_ARM_THM_CALL:
15403 case R_ARM_THM_JUMP24:
15404 case R_ARM_THM_JUMP19:
15405 call_reloc_p = true;
15406 may_need_local_target_p = true;
15407 break;
15408
15409 case R_ARM_ABS12:
15410 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15411 ldr __GOTT_INDEX__ offsets. */
15412 if (htab->root.target_os != is_vxworks)
15413 {
15414 may_need_local_target_p = true;
15415 break;
15416 }
15417 else goto jump_over;
15418
15419 /* Fall through. */
15420
15421 case R_ARM_MOVW_ABS_NC:
15422 case R_ARM_MOVT_ABS:
15423 case R_ARM_THM_MOVW_ABS_NC:
15424 case R_ARM_THM_MOVT_ABS:
15425 if (bfd_link_pic (info))
15426 {
15427 _bfd_error_handler
15428 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15429 abfd, elf32_arm_howto_table_1[r_type].name,
15430 (h) ? h->root.root.string : "a local symbol");
15431 bfd_set_error (bfd_error_bad_value);
15432 return false;
15433 }
15434
15435 /* Fall through. */
15436 case R_ARM_ABS32:
15437 case R_ARM_ABS32_NOI:
15438 jump_over:
15439 if (h != NULL && bfd_link_executable (info))
15440 {
15441 h->pointer_equality_needed = 1;
15442 }
15443 /* Fall through. */
15444 case R_ARM_REL32:
15445 case R_ARM_REL32_NOI:
15446 case R_ARM_MOVW_PREL_NC:
15447 case R_ARM_MOVT_PREL:
15448 case R_ARM_THM_MOVW_PREL_NC:
15449 case R_ARM_THM_MOVT_PREL:
15450
15451 /* Should the interworking branches be listed here? */
15452 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable
15453 || htab->fdpic_p)
15454 && (sec->flags & SEC_ALLOC) != 0)
15455 {
15456 if (h == NULL
15457 && elf32_arm_howto_from_type (r_type)->pc_relative)
15458 {
15459 /* In shared libraries and relocatable executables,
15460 we treat local relative references as calls;
15461 see the related SYMBOL_CALLS_LOCAL code in
15462 allocate_dynrelocs. */
15463 call_reloc_p = true;
15464 may_need_local_target_p = true;
15465 }
15466 else
15467 /* We are creating a shared library or relocatable
15468 executable, and this is a reloc against a global symbol,
15469 or a non-PC-relative reloc against a local symbol.
15470 We may need to copy the reloc into the output. */
15471 may_become_dynamic_p = true;
15472 }
15473 else
15474 may_need_local_target_p = true;
15475 break;
15476
15477 /* This relocation describes the C++ object vtable hierarchy.
15478 Reconstruct it for later use during GC. */
15479 case R_ARM_GNU_VTINHERIT:
15480 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
15481 return false;
15482 break;
15483
15484 /* This relocation describes which C++ vtable entries are actually
15485 used. Record for later use during GC. */
15486 case R_ARM_GNU_VTENTRY:
15487 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
15488 return false;
15489 break;
15490 }
15491
15492 if (h != NULL)
15493 {
15494 if (call_reloc_p)
15495 /* We may need a .plt entry if the function this reloc
15496 refers to is in a different object, regardless of the
15497 symbol's type. We can't tell for sure yet, because
15498 something later might force the symbol local. */
15499 h->needs_plt = 1;
15500 else if (may_need_local_target_p)
15501 /* If this reloc is in a read-only section, we might
15502 need a copy reloc. We can't check reliably at this
15503 stage whether the section is read-only, as input
15504 sections have not yet been mapped to output sections.
15505 Tentatively set the flag for now, and correct in
15506 adjust_dynamic_symbol. */
15507 h->non_got_ref = 1;
15508 }
15509
15510 if (may_need_local_target_p
15511 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
15512 {
15513 union gotplt_union *root_plt;
15514 struct arm_plt_info *arm_plt;
15515 struct arm_local_iplt_info *local_iplt;
15516
15517 if (h != NULL)
15518 {
15519 root_plt = &h->plt;
15520 arm_plt = &eh->plt;
15521 }
15522 else
15523 {
15524 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
15525 if (local_iplt == NULL)
15526 return false;
15527 root_plt = &local_iplt->root;
15528 arm_plt = &local_iplt->arm;
15529 }
15530
15531 /* If the symbol is a function that doesn't bind locally,
15532 this relocation will need a PLT entry. */
15533 if (root_plt->refcount != -1)
15534 root_plt->refcount += 1;
15535
15536 if (!call_reloc_p)
15537 arm_plt->noncall_refcount++;
15538
15539 /* It's too early to use htab->use_blx here, so we have to
15540 record possible blx references separately from
15541 relocs that definitely need a thumb stub. */
15542
15543 if (r_type == R_ARM_THM_CALL)
15544 arm_plt->maybe_thumb_refcount += 1;
15545
15546 if (r_type == R_ARM_THM_JUMP24
15547 || r_type == R_ARM_THM_JUMP19)
15548 arm_plt->thumb_refcount += 1;
15549 }
15550
15551 if (may_become_dynamic_p)
15552 {
15553 struct elf_dyn_relocs *p, **head;
15554
15555 /* Create a reloc section in dynobj. */
15556 if (sreloc == NULL)
15557 {
15558 sreloc = _bfd_elf_make_dynamic_reloc_section
15559 (sec, dynobj, 2, abfd, ! htab->use_rel);
15560
15561 if (sreloc == NULL)
15562 return false;
15563 }
15564
15565 /* If this is a global symbol, count the number of
15566 relocations we need for this symbol. */
15567 if (h != NULL)
15568 head = &h->dyn_relocs;
15569 else
15570 {
15571 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
15572 if (head == NULL)
15573 return false;
15574 }
15575
15576 p = *head;
15577 if (p == NULL || p->sec != sec)
15578 {
15579 size_t amt = sizeof *p;
15580
15581 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
15582 if (p == NULL)
15583 return false;
15584 p->next = *head;
15585 *head = p;
15586 p->sec = sec;
15587 p->count = 0;
15588 p->pc_count = 0;
15589 }
15590
15591 if (elf32_arm_howto_from_type (r_type)->pc_relative)
15592 p->pc_count += 1;
15593 p->count += 1;
15594 if (h == NULL && htab->fdpic_p && !bfd_link_pic(info)
15595 && r_type != R_ARM_ABS32 && r_type != R_ARM_ABS32_NOI) {
15596 /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15597 that will become rofixup. */
15598 /* This is due to the fact that we suppose all will become rofixup. */
15599 fprintf(stderr, "FDPIC does not yet support %d relocation to become dynamic for executable\n", r_type);
15600 _bfd_error_handler
15601 (_("FDPIC does not yet support %s relocation"
15602 " to become dynamic for executable"),
15603 elf32_arm_howto_table_1[r_type].name);
15604 abort();
15605 }
15606 }
15607 }
15608
15609 return true;
15610 }
15611
15612 static void
15613 elf32_arm_update_relocs (asection *o,
15614 struct bfd_elf_section_reloc_data *reldata)
15615 {
15616 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
15617 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
15618 const struct elf_backend_data *bed;
15619 _arm_elf_section_data *eado;
15620 struct bfd_link_order *p;
15621 bfd_byte *erela_head, *erela;
15622 Elf_Internal_Rela *irela_head, *irela;
15623 Elf_Internal_Shdr *rel_hdr;
15624 bfd *abfd;
15625 unsigned int count;
15626
15627 eado = get_arm_elf_section_data (o);
15628
15629 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
15630 return;
15631
15632 abfd = o->owner;
15633 bed = get_elf_backend_data (abfd);
15634 rel_hdr = reldata->hdr;
15635
15636 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
15637 {
15638 swap_in = bed->s->swap_reloc_in;
15639 swap_out = bed->s->swap_reloc_out;
15640 }
15641 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
15642 {
15643 swap_in = bed->s->swap_reloca_in;
15644 swap_out = bed->s->swap_reloca_out;
15645 }
15646 else
15647 abort ();
15648
15649 erela_head = rel_hdr->contents;
15650 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
15651 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
15652
15653 erela = erela_head;
15654 irela = irela_head;
15655 count = 0;
15656
15657 for (p = o->map_head.link_order; p; p = p->next)
15658 {
15659 if (p->type == bfd_section_reloc_link_order
15660 || p->type == bfd_symbol_reloc_link_order)
15661 {
15662 (*swap_in) (abfd, erela, irela);
15663 erela += rel_hdr->sh_entsize;
15664 irela++;
15665 count++;
15666 }
15667 else if (p->type == bfd_indirect_link_order)
15668 {
15669 struct bfd_elf_section_reloc_data *input_reldata;
15670 arm_unwind_table_edit *edit_list, *edit_tail;
15671 _arm_elf_section_data *eadi;
15672 bfd_size_type j;
15673 bfd_vma offset;
15674 asection *i;
15675
15676 i = p->u.indirect.section;
15677
15678 eadi = get_arm_elf_section_data (i);
15679 edit_list = eadi->u.exidx.unwind_edit_list;
15680 edit_tail = eadi->u.exidx.unwind_edit_tail;
15681 offset = i->output_offset;
15682
15683 if (eadi->elf.rel.hdr &&
15684 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
15685 input_reldata = &eadi->elf.rel;
15686 else if (eadi->elf.rela.hdr &&
15687 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
15688 input_reldata = &eadi->elf.rela;
15689 else
15690 abort ();
15691
15692 if (edit_list)
15693 {
15694 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15695 {
15696 arm_unwind_table_edit *edit_node, *edit_next;
15697 bfd_vma bias;
15698 bfd_vma reloc_index;
15699
15700 (*swap_in) (abfd, erela, irela);
15701 reloc_index = (irela->r_offset - offset) / 8;
15702
15703 bias = 0;
15704 edit_node = edit_list;
15705 for (edit_next = edit_list;
15706 edit_next && edit_next->index <= reloc_index;
15707 edit_next = edit_node->next)
15708 {
15709 bias++;
15710 edit_node = edit_next;
15711 }
15712
15713 if (edit_node->type != DELETE_EXIDX_ENTRY
15714 || edit_node->index != reloc_index)
15715 {
15716 irela->r_offset -= bias * 8;
15717 irela++;
15718 count++;
15719 }
15720
15721 erela += rel_hdr->sh_entsize;
15722 }
15723
15724 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
15725 {
15726 /* New relocation entity. */
15727 asection *text_sec = edit_tail->linked_section;
15728 asection *text_out = text_sec->output_section;
15729 bfd_vma exidx_offset = offset + i->size - 8;
15730
15731 irela->r_addend = 0;
15732 irela->r_offset = exidx_offset;
15733 irela->r_info = ELF32_R_INFO
15734 (text_out->target_index, R_ARM_PREL31);
15735 irela++;
15736 count++;
15737 }
15738 }
15739 else
15740 {
15741 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15742 {
15743 (*swap_in) (abfd, erela, irela);
15744 erela += rel_hdr->sh_entsize;
15745 irela++;
15746 }
15747
15748 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15749 }
15750 }
15751 }
15752
15753 reldata->count = count;
15754 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15755
15756 erela = erela_head;
15757 irela = irela_head;
15758 while (count > 0)
15759 {
15760 (*swap_out) (abfd, irela, erela);
15761 erela += rel_hdr->sh_entsize;
15762 irela++;
15763 count--;
15764 }
15765
15766 free (irela_head);
15767
15768 /* Hashes are no longer valid. */
15769 free (reldata->hashes);
15770 reldata->hashes = NULL;
15771 }
15772
15773 /* Unwinding tables are not referenced directly. This pass marks them as
15774 required if the corresponding code section is marked. Similarly, ARMv8-M
15775 secure entry functions can only be referenced by SG veneers which are
15776 created after the GC process. They need to be marked in case they reside in
15777 their own section (as would be the case if code was compiled with
15778 -ffunction-sections). */
15779
15780 static bool
15781 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15782 elf_gc_mark_hook_fn gc_mark_hook)
15783 {
15784 bfd *sub;
15785 Elf_Internal_Shdr **elf_shdrp;
15786 asection *cmse_sec;
15787 obj_attribute *out_attr;
15788 Elf_Internal_Shdr *symtab_hdr;
15789 unsigned i, sym_count, ext_start;
15790 const struct elf_backend_data *bed;
15791 struct elf_link_hash_entry **sym_hashes;
15792 struct elf32_arm_link_hash_entry *cmse_hash;
15793 bool again, is_v8m, first_bfd_browse = true;
15794 bool debug_sec_need_to_be_marked = false;
15795 asection *isec;
15796
15797 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15798
15799 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15800 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15801 && out_attr[Tag_CPU_arch_profile].i == 'M';
15802
15803 /* Marking EH data may cause additional code sections to be marked,
15804 requiring multiple passes. */
15805 again = true;
15806 while (again)
15807 {
15808 again = false;
15809 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15810 {
15811 asection *o;
15812
15813 if (! is_arm_elf (sub))
15814 continue;
15815
15816 elf_shdrp = elf_elfsections (sub);
15817 for (o = sub->sections; o != NULL; o = o->next)
15818 {
15819 Elf_Internal_Shdr *hdr;
15820
15821 hdr = &elf_section_data (o)->this_hdr;
15822 if (hdr->sh_type == SHT_ARM_EXIDX
15823 && hdr->sh_link
15824 && hdr->sh_link < elf_numsections (sub)
15825 && !o->gc_mark
15826 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15827 {
15828 again = true;
15829 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15830 return false;
15831 }
15832 }
15833
15834 /* Mark section holding ARMv8-M secure entry functions. We mark all
15835 of them so no need for a second browsing. */
15836 if (is_v8m && first_bfd_browse)
15837 {
15838 sym_hashes = elf_sym_hashes (sub);
15839 bed = get_elf_backend_data (sub);
15840 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15841 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15842 ext_start = symtab_hdr->sh_info;
15843
15844 /* Scan symbols. */
15845 for (i = ext_start; i < sym_count; i++)
15846 {
15847 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15848
15849 /* Assume it is a special symbol. If not, cmse_scan will
15850 warn about it and user can do something about it. */
15851 if (startswith (cmse_hash->root.root.root.string,
15852 CMSE_PREFIX))
15853 {
15854 cmse_sec = cmse_hash->root.root.u.def.section;
15855 if (!cmse_sec->gc_mark
15856 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15857 return false;
15858 /* The debug sections related to these secure entry
15859 functions are marked on enabling below flag. */
15860 debug_sec_need_to_be_marked = true;
15861 }
15862 }
15863
15864 if (debug_sec_need_to_be_marked)
15865 {
15866 /* Looping over all the sections of the object file containing
15867 Armv8-M secure entry functions and marking all the debug
15868 sections. */
15869 for (isec = sub->sections; isec != NULL; isec = isec->next)
15870 {
15871 /* If not a debug sections, skip it. */
15872 if (!isec->gc_mark && (isec->flags & SEC_DEBUGGING))
15873 isec->gc_mark = 1 ;
15874 }
15875 debug_sec_need_to_be_marked = false;
15876 }
15877 }
15878 }
15879 first_bfd_browse = false;
15880 }
15881
15882 return true;
15883 }
15884
15885 /* Treat mapping symbols as special target symbols. */
15886
15887 static bool
15888 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
15889 {
15890 return bfd_is_arm_special_symbol_name (sym->name,
15891 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
15892 }
15893
15894 /* If the ELF symbol SYM might be a function in SEC, return the
15895 function size and set *CODE_OFF to the function's entry point,
15896 otherwise return zero. */
15897
15898 static bfd_size_type
15899 elf32_arm_maybe_function_sym (const asymbol *sym, asection *sec,
15900 bfd_vma *code_off)
15901 {
15902 bfd_size_type size;
15903 elf_symbol_type * elf_sym = (elf_symbol_type *) sym;
15904
15905 if ((sym->flags & (BSF_SECTION_SYM | BSF_FILE | BSF_OBJECT
15906 | BSF_THREAD_LOCAL | BSF_RELC | BSF_SRELC)) != 0
15907 || sym->section != sec)
15908 return 0;
15909
15910 size = (sym->flags & BSF_SYNTHETIC) ? 0 : elf_sym->internal_elf_sym.st_size;
15911
15912 if (!(sym->flags & BSF_SYNTHETIC))
15913 switch (ELF_ST_TYPE (elf_sym->internal_elf_sym.st_info))
15914 {
15915 case STT_NOTYPE:
15916 /* Ignore symbols created by the annobin plugin for gcc and clang.
15917 These symbols are hidden, local, notype and have a size of 0. */
15918 if (size == 0
15919 && sym->flags & BSF_LOCAL
15920 && ELF_ST_VISIBILITY (elf_sym->internal_elf_sym.st_other) == STV_HIDDEN)
15921 return 0;
15922 /* Fall through. */
15923 case STT_FUNC:
15924 case STT_ARM_TFUNC:
15925 /* FIXME: Allow STT_GNU_IFUNC as well ? */
15926 break;
15927 default:
15928 return 0;
15929 }
15930
15931 if ((sym->flags & BSF_LOCAL)
15932 && bfd_is_arm_special_symbol_name (sym->name,
15933 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
15934 return 0;
15935
15936 *code_off = sym->value;
15937
15938 /* Do not return 0 for the function's size. */
15939 return size ? size : 1;
15940
15941 }
15942
15943 static bool
15944 elf32_arm_find_inliner_info (bfd * abfd,
15945 const char ** filename_ptr,
15946 const char ** functionname_ptr,
15947 unsigned int * line_ptr)
15948 {
15949 bool found;
15950 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
15951 functionname_ptr, line_ptr,
15952 & elf_tdata (abfd)->dwarf2_find_line_info);
15953 return found;
15954 }
15955
15956 /* Adjust a symbol defined by a dynamic object and referenced by a
15957 regular object. The current definition is in some section of the
15958 dynamic object, but we're not including those sections. We have to
15959 change the definition to something the rest of the link can
15960 understand. */
15961
15962 static bool
15963 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
15964 struct elf_link_hash_entry * h)
15965 {
15966 bfd * dynobj;
15967 asection *s, *srel;
15968 struct elf32_arm_link_hash_entry * eh;
15969 struct elf32_arm_link_hash_table *globals;
15970
15971 globals = elf32_arm_hash_table (info);
15972 if (globals == NULL)
15973 return false;
15974
15975 dynobj = elf_hash_table (info)->dynobj;
15976
15977 /* Make sure we know what is going on here. */
15978 BFD_ASSERT (dynobj != NULL
15979 && (h->needs_plt
15980 || h->type == STT_GNU_IFUNC
15981 || h->is_weakalias
15982 || (h->def_dynamic
15983 && h->ref_regular
15984 && !h->def_regular)));
15985
15986 eh = (struct elf32_arm_link_hash_entry *) h;
15987
15988 /* If this is a function, put it in the procedure linkage table. We
15989 will fill in the contents of the procedure linkage table later,
15990 when we know the address of the .got section. */
15991 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
15992 {
15993 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15994 symbol binds locally. */
15995 if (h->plt.refcount <= 0
15996 || (h->type != STT_GNU_IFUNC
15997 && (SYMBOL_CALLS_LOCAL (info, h)
15998 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15999 && h->root.type == bfd_link_hash_undefweak))))
16000 {
16001 /* This case can occur if we saw a PLT32 reloc in an input
16002 file, but the symbol was never referred to by a dynamic
16003 object, or if all references were garbage collected. In
16004 such a case, we don't actually need to build a procedure
16005 linkage table, and we can just do a PC24 reloc instead. */
16006 h->plt.offset = (bfd_vma) -1;
16007 eh->plt.thumb_refcount = 0;
16008 eh->plt.maybe_thumb_refcount = 0;
16009 eh->plt.noncall_refcount = 0;
16010 h->needs_plt = 0;
16011 }
16012
16013 return true;
16014 }
16015 else
16016 {
16017 /* It's possible that we incorrectly decided a .plt reloc was
16018 needed for an R_ARM_PC24 or similar reloc to a non-function sym
16019 in check_relocs. We can't decide accurately between function
16020 and non-function syms in check-relocs; Objects loaded later in
16021 the link may change h->type. So fix it now. */
16022 h->plt.offset = (bfd_vma) -1;
16023 eh->plt.thumb_refcount = 0;
16024 eh->plt.maybe_thumb_refcount = 0;
16025 eh->plt.noncall_refcount = 0;
16026 }
16027
16028 /* If this is a weak symbol, and there is a real definition, the
16029 processor independent code will have arranged for us to see the
16030 real definition first, and we can just use the same value. */
16031 if (h->is_weakalias)
16032 {
16033 struct elf_link_hash_entry *def = weakdef (h);
16034 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
16035 h->root.u.def.section = def->root.u.def.section;
16036 h->root.u.def.value = def->root.u.def.value;
16037 return true;
16038 }
16039
16040 /* If there are no non-GOT references, we do not need a copy
16041 relocation. */
16042 if (!h->non_got_ref)
16043 return true;
16044
16045 /* This is a reference to a symbol defined by a dynamic object which
16046 is not a function. */
16047
16048 /* If we are creating a shared library, we must presume that the
16049 only references to the symbol are via the global offset table.
16050 For such cases we need not do anything here; the relocations will
16051 be handled correctly by relocate_section. Relocatable executables
16052 can reference data in shared objects directly, so we don't need to
16053 do anything here. */
16054 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
16055 return true;
16056
16057 /* We must allocate the symbol in our .dynbss section, which will
16058 become part of the .bss section of the executable. There will be
16059 an entry for this symbol in the .dynsym section. The dynamic
16060 object will contain position independent code, so all references
16061 from the dynamic object to this symbol will go through the global
16062 offset table. The dynamic linker will use the .dynsym entry to
16063 determine the address it must put in the global offset table, so
16064 both the dynamic object and the regular object will refer to the
16065 same memory location for the variable. */
16066 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
16067 linker to copy the initial value out of the dynamic object and into
16068 the runtime process image. We need to remember the offset into the
16069 .rel(a).bss section we are going to use. */
16070 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
16071 {
16072 s = globals->root.sdynrelro;
16073 srel = globals->root.sreldynrelro;
16074 }
16075 else
16076 {
16077 s = globals->root.sdynbss;
16078 srel = globals->root.srelbss;
16079 }
16080 if (info->nocopyreloc == 0
16081 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
16082 && h->size != 0)
16083 {
16084 elf32_arm_allocate_dynrelocs (info, srel, 1);
16085 h->needs_copy = 1;
16086 }
16087
16088 return _bfd_elf_adjust_dynamic_copy (info, h, s);
16089 }
16090
16091 /* Allocate space in .plt, .got and associated reloc sections for
16092 dynamic relocs. */
16093
16094 static bool
16095 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
16096 {
16097 struct bfd_link_info *info;
16098 struct elf32_arm_link_hash_table *htab;
16099 struct elf32_arm_link_hash_entry *eh;
16100 struct elf_dyn_relocs *p;
16101
16102 if (h->root.type == bfd_link_hash_indirect)
16103 return true;
16104
16105 eh = (struct elf32_arm_link_hash_entry *) h;
16106
16107 info = (struct bfd_link_info *) inf;
16108 htab = elf32_arm_hash_table (info);
16109 if (htab == NULL)
16110 return false;
16111
16112 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
16113 && h->plt.refcount > 0)
16114 {
16115 /* Make sure this symbol is output as a dynamic symbol.
16116 Undefined weak syms won't yet be marked as dynamic. */
16117 if (h->dynindx == -1 && !h->forced_local
16118 && h->root.type == bfd_link_hash_undefweak)
16119 {
16120 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16121 return false;
16122 }
16123
16124 /* If the call in the PLT entry binds locally, the associated
16125 GOT entry should use an R_ARM_IRELATIVE relocation instead of
16126 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
16127 than the .plt section. */
16128 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
16129 {
16130 eh->is_iplt = 1;
16131 if (eh->plt.noncall_refcount == 0
16132 && SYMBOL_REFERENCES_LOCAL (info, h))
16133 /* All non-call references can be resolved directly.
16134 This means that they can (and in some cases, must)
16135 resolve directly to the run-time target, rather than
16136 to the PLT. That in turns means that any .got entry
16137 would be equal to the .igot.plt entry, so there's
16138 no point having both. */
16139 h->got.refcount = 0;
16140 }
16141
16142 if (bfd_link_pic (info)
16143 || eh->is_iplt
16144 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
16145 {
16146 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
16147
16148 /* If this symbol is not defined in a regular file, and we are
16149 not generating a shared library, then set the symbol to this
16150 location in the .plt. This is required to make function
16151 pointers compare as equal between the normal executable and
16152 the shared library. */
16153 if (! bfd_link_pic (info)
16154 && !h->def_regular)
16155 {
16156 h->root.u.def.section = htab->root.splt;
16157 h->root.u.def.value = h->plt.offset;
16158
16159 /* Make sure the function is not marked as Thumb, in case
16160 it is the target of an ABS32 relocation, which will
16161 point to the PLT entry. */
16162 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16163 }
16164
16165 /* VxWorks executables have a second set of relocations for
16166 each PLT entry. They go in a separate relocation section,
16167 which is processed by the kernel loader. */
16168 if (htab->root.target_os == is_vxworks && !bfd_link_pic (info))
16169 {
16170 /* There is a relocation for the initial PLT entry:
16171 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
16172 if (h->plt.offset == htab->plt_header_size)
16173 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
16174
16175 /* There are two extra relocations for each subsequent
16176 PLT entry: an R_ARM_32 relocation for the GOT entry,
16177 and an R_ARM_32 relocation for the PLT entry. */
16178 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
16179 }
16180 }
16181 else
16182 {
16183 h->plt.offset = (bfd_vma) -1;
16184 h->needs_plt = 0;
16185 }
16186 }
16187 else
16188 {
16189 h->plt.offset = (bfd_vma) -1;
16190 h->needs_plt = 0;
16191 }
16192
16193 eh = (struct elf32_arm_link_hash_entry *) h;
16194 eh->tlsdesc_got = (bfd_vma) -1;
16195
16196 if (h->got.refcount > 0)
16197 {
16198 asection *s;
16199 bool dyn;
16200 int tls_type = elf32_arm_hash_entry (h)->tls_type;
16201 int indx;
16202
16203 /* Make sure this symbol is output as a dynamic symbol.
16204 Undefined weak syms won't yet be marked as dynamic. */
16205 if (htab->root.dynamic_sections_created
16206 && h->dynindx == -1
16207 && !h->forced_local
16208 && h->root.type == bfd_link_hash_undefweak)
16209 {
16210 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16211 return false;
16212 }
16213
16214 s = htab->root.sgot;
16215 h->got.offset = s->size;
16216
16217 if (tls_type == GOT_UNKNOWN)
16218 abort ();
16219
16220 if (tls_type == GOT_NORMAL)
16221 /* Non-TLS symbols need one GOT slot. */
16222 s->size += 4;
16223 else
16224 {
16225 if (tls_type & GOT_TLS_GDESC)
16226 {
16227 /* R_ARM_TLS_DESC needs 2 GOT slots. */
16228 eh->tlsdesc_got
16229 = (htab->root.sgotplt->size
16230 - elf32_arm_compute_jump_table_size (htab));
16231 htab->root.sgotplt->size += 8;
16232 h->got.offset = (bfd_vma) -2;
16233 /* plt.got_offset needs to know there's a TLS_DESC
16234 reloc in the middle of .got.plt. */
16235 htab->num_tls_desc++;
16236 }
16237
16238 if (tls_type & GOT_TLS_GD)
16239 {
16240 /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
16241 consecutive GOT slots. If the symbol is both GD
16242 and GDESC, got.offset may have been
16243 overwritten. */
16244 h->got.offset = s->size;
16245 s->size += 8;
16246 }
16247
16248 if (tls_type & GOT_TLS_IE)
16249 /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
16250 slot. */
16251 s->size += 4;
16252 }
16253
16254 dyn = htab->root.dynamic_sections_created;
16255
16256 indx = 0;
16257 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
16258 && (!bfd_link_pic (info)
16259 || !SYMBOL_REFERENCES_LOCAL (info, h)))
16260 indx = h->dynindx;
16261
16262 if (tls_type != GOT_NORMAL
16263 && (bfd_link_dll (info) || indx != 0)
16264 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16265 || h->root.type != bfd_link_hash_undefweak))
16266 {
16267 if (tls_type & GOT_TLS_IE)
16268 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16269
16270 if (tls_type & GOT_TLS_GD)
16271 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16272
16273 if (tls_type & GOT_TLS_GDESC)
16274 {
16275 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
16276 /* GDESC needs a trampoline to jump to. */
16277 htab->tls_trampoline = -1;
16278 }
16279
16280 /* Only GD needs it. GDESC just emits one relocation per
16281 2 entries. */
16282 if ((tls_type & GOT_TLS_GD) && indx != 0)
16283 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16284 }
16285 else if (((indx != -1) || htab->fdpic_p)
16286 && !SYMBOL_REFERENCES_LOCAL (info, h))
16287 {
16288 if (htab->root.dynamic_sections_created)
16289 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
16290 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16291 }
16292 else if (h->type == STT_GNU_IFUNC
16293 && eh->plt.noncall_refcount == 0)
16294 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16295 they all resolve dynamically instead. Reserve room for the
16296 GOT entry's R_ARM_IRELATIVE relocation. */
16297 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
16298 else if (bfd_link_pic (info)
16299 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16300 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
16301 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16302 else if (htab->fdpic_p && tls_type == GOT_NORMAL)
16303 /* Reserve room for rofixup for FDPIC executable. */
16304 /* TLS relocs do not need space since they are completely
16305 resolved. */
16306 htab->srofixup->size += 4;
16307 }
16308 else
16309 h->got.offset = (bfd_vma) -1;
16310
16311 /* FDPIC support. */
16312 if (eh->fdpic_cnts.gotofffuncdesc_cnt > 0)
16313 {
16314 /* Symbol musn't be exported. */
16315 if (h->dynindx != -1)
16316 abort();
16317
16318 /* We only allocate one function descriptor with its associated
16319 relocation. */
16320 if (eh->fdpic_cnts.funcdesc_offset == -1)
16321 {
16322 asection *s = htab->root.sgot;
16323
16324 eh->fdpic_cnts.funcdesc_offset = s->size;
16325 s->size += 8;
16326 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16327 if (bfd_link_pic(info))
16328 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16329 else
16330 htab->srofixup->size += 8;
16331 }
16332 }
16333
16334 if (eh->fdpic_cnts.gotfuncdesc_cnt > 0)
16335 {
16336 asection *s = htab->root.sgot;
16337
16338 if (htab->root.dynamic_sections_created && h->dynindx == -1
16339 && !h->forced_local)
16340 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16341 return false;
16342
16343 if (h->dynindx == -1)
16344 {
16345 /* We only allocate one function descriptor with its
16346 associated relocation. */
16347 if (eh->fdpic_cnts.funcdesc_offset == -1)
16348 {
16349
16350 eh->fdpic_cnts.funcdesc_offset = s->size;
16351 s->size += 8;
16352 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two
16353 rofixups. */
16354 if (bfd_link_pic(info))
16355 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16356 else
16357 htab->srofixup->size += 8;
16358 }
16359 }
16360
16361 /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16362 R_ARM_RELATIVE/rofixup relocation on it. */
16363 eh->fdpic_cnts.gotfuncdesc_offset = s->size;
16364 s->size += 4;
16365 if (h->dynindx == -1 && !bfd_link_pic(info))
16366 htab->srofixup->size += 4;
16367 else
16368 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16369 }
16370
16371 if (eh->fdpic_cnts.funcdesc_cnt > 0)
16372 {
16373 if (htab->root.dynamic_sections_created && h->dynindx == -1
16374 && !h->forced_local)
16375 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16376 return false;
16377
16378 if (h->dynindx == -1)
16379 {
16380 /* We only allocate one function descriptor with its
16381 associated relocation. */
16382 if (eh->fdpic_cnts.funcdesc_offset == -1)
16383 {
16384 asection *s = htab->root.sgot;
16385
16386 eh->fdpic_cnts.funcdesc_offset = s->size;
16387 s->size += 8;
16388 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two
16389 rofixups. */
16390 if (bfd_link_pic(info))
16391 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16392 else
16393 htab->srofixup->size += 8;
16394 }
16395 }
16396 if (h->dynindx == -1 && !bfd_link_pic(info))
16397 {
16398 /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */
16399 htab->srofixup->size += 4 * eh->fdpic_cnts.funcdesc_cnt;
16400 }
16401 else
16402 {
16403 /* Will need one dynamic reloc per reference. will be either
16404 R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */
16405 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot,
16406 eh->fdpic_cnts.funcdesc_cnt);
16407 }
16408 }
16409
16410 /* Allocate stubs for exported Thumb functions on v4t. */
16411 if (!htab->use_blx && h->dynindx != -1
16412 && h->def_regular
16413 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
16414 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
16415 {
16416 struct elf_link_hash_entry * th;
16417 struct bfd_link_hash_entry * bh;
16418 struct elf_link_hash_entry * myh;
16419 char name[1024];
16420 asection *s;
16421 bh = NULL;
16422 /* Create a new symbol to regist the real location of the function. */
16423 s = h->root.u.def.section;
16424 sprintf (name, "__real_%s", h->root.root.string);
16425 _bfd_generic_link_add_one_symbol (info, s->owner,
16426 name, BSF_GLOBAL, s,
16427 h->root.u.def.value,
16428 NULL, true, false, &bh);
16429
16430 myh = (struct elf_link_hash_entry *) bh;
16431 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
16432 myh->forced_local = 1;
16433 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
16434 eh->export_glue = myh;
16435 th = record_arm_to_thumb_glue (info, h);
16436 /* Point the symbol at the stub. */
16437 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
16438 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16439 h->root.u.def.section = th->root.u.def.section;
16440 h->root.u.def.value = th->root.u.def.value & ~1;
16441 }
16442
16443 if (h->dyn_relocs == NULL)
16444 return true;
16445
16446 /* In the shared -Bsymbolic case, discard space allocated for
16447 dynamic pc-relative relocs against symbols which turn out to be
16448 defined in regular objects. For the normal shared case, discard
16449 space for pc-relative relocs that have become local due to symbol
16450 visibility changes. */
16451
16452 if (bfd_link_pic (info)
16453 || htab->root.is_relocatable_executable
16454 || htab->fdpic_p)
16455 {
16456 /* Relocs that use pc_count are PC-relative forms, which will appear
16457 on something like ".long foo - ." or "movw REG, foo - .". We want
16458 calls to protected symbols to resolve directly to the function
16459 rather than going via the plt. If people want function pointer
16460 comparisons to work as expected then they should avoid writing
16461 assembly like ".long foo - .". */
16462 if (SYMBOL_CALLS_LOCAL (info, h))
16463 {
16464 struct elf_dyn_relocs **pp;
16465
16466 for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
16467 {
16468 p->count -= p->pc_count;
16469 p->pc_count = 0;
16470 if (p->count == 0)
16471 *pp = p->next;
16472 else
16473 pp = &p->next;
16474 }
16475 }
16476
16477 if (htab->root.target_os == is_vxworks)
16478 {
16479 struct elf_dyn_relocs **pp;
16480
16481 for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
16482 {
16483 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
16484 *pp = p->next;
16485 else
16486 pp = &p->next;
16487 }
16488 }
16489
16490 /* Also discard relocs on undefined weak syms with non-default
16491 visibility. */
16492 if (h->dyn_relocs != NULL
16493 && h->root.type == bfd_link_hash_undefweak)
16494 {
16495 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16496 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16497 h->dyn_relocs = NULL;
16498
16499 /* Make sure undefined weak symbols are output as a dynamic
16500 symbol in PIEs. */
16501 else if (htab->root.dynamic_sections_created && h->dynindx == -1
16502 && !h->forced_local)
16503 {
16504 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16505 return false;
16506 }
16507 }
16508
16509 else if (htab->root.is_relocatable_executable && h->dynindx == -1
16510 && h->root.type == bfd_link_hash_new)
16511 {
16512 /* Output absolute symbols so that we can create relocations
16513 against them. For normal symbols we output a relocation
16514 against the section that contains them. */
16515 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16516 return false;
16517 }
16518
16519 }
16520 else
16521 {
16522 /* For the non-shared case, discard space for relocs against
16523 symbols which turn out to need copy relocs or are not
16524 dynamic. */
16525
16526 if (!h->non_got_ref
16527 && ((h->def_dynamic
16528 && !h->def_regular)
16529 || (htab->root.dynamic_sections_created
16530 && (h->root.type == bfd_link_hash_undefweak
16531 || h->root.type == bfd_link_hash_undefined))))
16532 {
16533 /* Make sure this symbol is output as a dynamic symbol.
16534 Undefined weak syms won't yet be marked as dynamic. */
16535 if (h->dynindx == -1 && !h->forced_local
16536 && h->root.type == bfd_link_hash_undefweak)
16537 {
16538 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16539 return false;
16540 }
16541
16542 /* If that succeeded, we know we'll be keeping all the
16543 relocs. */
16544 if (h->dynindx != -1)
16545 goto keep;
16546 }
16547
16548 h->dyn_relocs = NULL;
16549
16550 keep: ;
16551 }
16552
16553 /* Finally, allocate space. */
16554 for (p = h->dyn_relocs; p != NULL; p = p->next)
16555 {
16556 asection *sreloc = elf_section_data (p->sec)->sreloc;
16557
16558 if (h->type == STT_GNU_IFUNC
16559 && eh->plt.noncall_refcount == 0
16560 && SYMBOL_REFERENCES_LOCAL (info, h))
16561 elf32_arm_allocate_irelocs (info, sreloc, p->count);
16562 else if (h->dynindx != -1
16563 && (!bfd_link_pic(info) || !info->symbolic || !h->def_regular))
16564 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16565 else if (htab->fdpic_p && !bfd_link_pic(info))
16566 htab->srofixup->size += 4 * p->count;
16567 else
16568 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16569 }
16570
16571 return true;
16572 }
16573
16574 void
16575 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
16576 int byteswap_code)
16577 {
16578 struct elf32_arm_link_hash_table *globals;
16579
16580 globals = elf32_arm_hash_table (info);
16581 if (globals == NULL)
16582 return;
16583
16584 globals->byteswap_code = byteswap_code;
16585 }
16586
16587 /* Set the sizes of the dynamic sections. */
16588
16589 static bool
16590 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
16591 struct bfd_link_info * info)
16592 {
16593 bfd * dynobj;
16594 asection * s;
16595 bool relocs;
16596 bfd *ibfd;
16597 struct elf32_arm_link_hash_table *htab;
16598
16599 htab = elf32_arm_hash_table (info);
16600 if (htab == NULL)
16601 return false;
16602
16603 dynobj = elf_hash_table (info)->dynobj;
16604 BFD_ASSERT (dynobj != NULL);
16605 check_use_blx (htab);
16606
16607 if (elf_hash_table (info)->dynamic_sections_created)
16608 {
16609 /* Set the contents of the .interp section to the interpreter. */
16610 if (bfd_link_executable (info) && !info->nointerp)
16611 {
16612 s = bfd_get_linker_section (dynobj, ".interp");
16613 BFD_ASSERT (s != NULL);
16614 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
16615 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
16616 }
16617 }
16618
16619 /* Set up .got offsets for local syms, and space for local dynamic
16620 relocs. */
16621 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16622 {
16623 bfd_signed_vma *local_got;
16624 bfd_signed_vma *end_local_got;
16625 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
16626 char *local_tls_type;
16627 bfd_vma *local_tlsdesc_gotent;
16628 bfd_size_type locsymcount;
16629 Elf_Internal_Shdr *symtab_hdr;
16630 asection *srel;
16631 unsigned int symndx;
16632 struct fdpic_local *local_fdpic_cnts;
16633
16634 if (! is_arm_elf (ibfd))
16635 continue;
16636
16637 for (s = ibfd->sections; s != NULL; s = s->next)
16638 {
16639 struct elf_dyn_relocs *p;
16640
16641 for (p = (struct elf_dyn_relocs *)
16642 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
16643 {
16644 if (!bfd_is_abs_section (p->sec)
16645 && bfd_is_abs_section (p->sec->output_section))
16646 {
16647 /* Input section has been discarded, either because
16648 it is a copy of a linkonce section or due to
16649 linker script /DISCARD/, so we'll be discarding
16650 the relocs too. */
16651 }
16652 else if (htab->root.target_os == is_vxworks
16653 && strcmp (p->sec->output_section->name,
16654 ".tls_vars") == 0)
16655 {
16656 /* Relocations in vxworks .tls_vars sections are
16657 handled specially by the loader. */
16658 }
16659 else if (p->count != 0)
16660 {
16661 srel = elf_section_data (p->sec)->sreloc;
16662 if (htab->fdpic_p && !bfd_link_pic(info))
16663 htab->srofixup->size += 4 * p->count;
16664 else
16665 elf32_arm_allocate_dynrelocs (info, srel, p->count);
16666 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
16667 info->flags |= DF_TEXTREL;
16668 }
16669 }
16670 }
16671
16672 local_got = elf_local_got_refcounts (ibfd);
16673 if (!local_got)
16674 continue;
16675
16676 symtab_hdr = & elf_symtab_hdr (ibfd);
16677 locsymcount = symtab_hdr->sh_info;
16678 end_local_got = local_got + locsymcount;
16679 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
16680 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
16681 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
16682 local_fdpic_cnts = elf32_arm_local_fdpic_cnts (ibfd);
16683 symndx = 0;
16684 s = htab->root.sgot;
16685 srel = htab->root.srelgot;
16686 for (; local_got < end_local_got;
16687 ++local_got, ++local_iplt_ptr, ++local_tls_type,
16688 ++local_tlsdesc_gotent, ++symndx, ++local_fdpic_cnts)
16689 {
16690 *local_tlsdesc_gotent = (bfd_vma) -1;
16691 local_iplt = *local_iplt_ptr;
16692
16693 /* FDPIC support. */
16694 if (local_fdpic_cnts->gotofffuncdesc_cnt > 0)
16695 {
16696 if (local_fdpic_cnts->funcdesc_offset == -1)
16697 {
16698 local_fdpic_cnts->funcdesc_offset = s->size;
16699 s->size += 8;
16700
16701 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16702 if (bfd_link_pic(info))
16703 elf32_arm_allocate_dynrelocs (info, srel, 1);
16704 else
16705 htab->srofixup->size += 8;
16706 }
16707 }
16708
16709 if (local_fdpic_cnts->funcdesc_cnt > 0)
16710 {
16711 if (local_fdpic_cnts->funcdesc_offset == -1)
16712 {
16713 local_fdpic_cnts->funcdesc_offset = s->size;
16714 s->size += 8;
16715
16716 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16717 if (bfd_link_pic(info))
16718 elf32_arm_allocate_dynrelocs (info, srel, 1);
16719 else
16720 htab->srofixup->size += 8;
16721 }
16722
16723 /* We will add n R_ARM_RELATIVE relocations or n rofixups. */
16724 if (bfd_link_pic(info))
16725 elf32_arm_allocate_dynrelocs (info, srel, local_fdpic_cnts->funcdesc_cnt);
16726 else
16727 htab->srofixup->size += 4 * local_fdpic_cnts->funcdesc_cnt;
16728 }
16729
16730 if (local_iplt != NULL)
16731 {
16732 struct elf_dyn_relocs *p;
16733
16734 if (local_iplt->root.refcount > 0)
16735 {
16736 elf32_arm_allocate_plt_entry (info, true,
16737 &local_iplt->root,
16738 &local_iplt->arm);
16739 if (local_iplt->arm.noncall_refcount == 0)
16740 /* All references to the PLT are calls, so all
16741 non-call references can resolve directly to the
16742 run-time target. This means that the .got entry
16743 would be the same as the .igot.plt entry, so there's
16744 no point creating both. */
16745 *local_got = 0;
16746 }
16747 else
16748 {
16749 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
16750 local_iplt->root.offset = (bfd_vma) -1;
16751 }
16752
16753 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
16754 {
16755 asection *psrel;
16756
16757 psrel = elf_section_data (p->sec)->sreloc;
16758 if (local_iplt->arm.noncall_refcount == 0)
16759 elf32_arm_allocate_irelocs (info, psrel, p->count);
16760 else
16761 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
16762 }
16763 }
16764 if (*local_got > 0)
16765 {
16766 Elf_Internal_Sym *isym;
16767
16768 *local_got = s->size;
16769 if (*local_tls_type & GOT_TLS_GD)
16770 /* TLS_GD relocs need an 8-byte structure in the GOT. */
16771 s->size += 8;
16772 if (*local_tls_type & GOT_TLS_GDESC)
16773 {
16774 *local_tlsdesc_gotent = htab->root.sgotplt->size
16775 - elf32_arm_compute_jump_table_size (htab);
16776 htab->root.sgotplt->size += 8;
16777 *local_got = (bfd_vma) -2;
16778 /* plt.got_offset needs to know there's a TLS_DESC
16779 reloc in the middle of .got.plt. */
16780 htab->num_tls_desc++;
16781 }
16782 if (*local_tls_type & GOT_TLS_IE)
16783 s->size += 4;
16784
16785 if (*local_tls_type & GOT_NORMAL)
16786 {
16787 /* If the symbol is both GD and GDESC, *local_got
16788 may have been overwritten. */
16789 *local_got = s->size;
16790 s->size += 4;
16791 }
16792
16793 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, ibfd,
16794 symndx);
16795 if (isym == NULL)
16796 return false;
16797
16798 /* If all references to an STT_GNU_IFUNC PLT are calls,
16799 then all non-call references, including this GOT entry,
16800 resolve directly to the run-time target. */
16801 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
16802 && (local_iplt == NULL
16803 || local_iplt->arm.noncall_refcount == 0))
16804 elf32_arm_allocate_irelocs (info, srel, 1);
16805 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC || htab->fdpic_p)
16806 {
16807 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC)))
16808 elf32_arm_allocate_dynrelocs (info, srel, 1);
16809 else if (htab->fdpic_p && *local_tls_type & GOT_NORMAL)
16810 htab->srofixup->size += 4;
16811
16812 if ((bfd_link_pic (info) || htab->fdpic_p)
16813 && *local_tls_type & GOT_TLS_GDESC)
16814 {
16815 elf32_arm_allocate_dynrelocs (info,
16816 htab->root.srelplt, 1);
16817 htab->tls_trampoline = -1;
16818 }
16819 }
16820 }
16821 else
16822 *local_got = (bfd_vma) -1;
16823 }
16824 }
16825
16826 if (htab->tls_ldm_got.refcount > 0)
16827 {
16828 /* Allocate two GOT entries and one dynamic relocation (if necessary)
16829 for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
16830 htab->tls_ldm_got.offset = htab->root.sgot->size;
16831 htab->root.sgot->size += 8;
16832 if (bfd_link_pic (info))
16833 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16834 }
16835 else
16836 htab->tls_ldm_got.offset = -1;
16837
16838 /* At the very end of the .rofixup section is a pointer to the GOT,
16839 reserve space for it. */
16840 if (htab->fdpic_p && htab->srofixup != NULL)
16841 htab->srofixup->size += 4;
16842
16843 /* Allocate global sym .plt and .got entries, and space for global
16844 sym dynamic relocs. */
16845 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
16846
16847 /* Here we rummage through the found bfds to collect glue information. */
16848 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16849 {
16850 if (! is_arm_elf (ibfd))
16851 continue;
16852
16853 /* Initialise mapping tables for code/data. */
16854 bfd_elf32_arm_init_maps (ibfd);
16855
16856 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
16857 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
16858 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
16859 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd);
16860 }
16861
16862 /* Allocate space for the glue sections now that we've sized them. */
16863 bfd_elf32_arm_allocate_interworking_sections (info);
16864
16865 /* For every jump slot reserved in the sgotplt, reloc_count is
16866 incremented. However, when we reserve space for TLS descriptors,
16867 it's not incremented, so in order to compute the space reserved
16868 for them, it suffices to multiply the reloc count by the jump
16869 slot size. */
16870 if (htab->root.srelplt)
16871 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
16872
16873 if (htab->tls_trampoline)
16874 {
16875 if (htab->root.splt->size == 0)
16876 htab->root.splt->size += htab->plt_header_size;
16877
16878 htab->tls_trampoline = htab->root.splt->size;
16879 htab->root.splt->size += htab->plt_entry_size;
16880
16881 /* If we're not using lazy TLS relocations, don't generate the
16882 PLT and GOT entries they require. */
16883 if ((info->flags & DF_BIND_NOW))
16884 htab->root.tlsdesc_plt = 0;
16885 else
16886 {
16887 htab->root.tlsdesc_got = htab->root.sgot->size;
16888 htab->root.sgot->size += 4;
16889
16890 htab->root.tlsdesc_plt = htab->root.splt->size;
16891 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
16892 }
16893 }
16894
16895 /* The check_relocs and adjust_dynamic_symbol entry points have
16896 determined the sizes of the various dynamic sections. Allocate
16897 memory for them. */
16898 relocs = false;
16899 for (s = dynobj->sections; s != NULL; s = s->next)
16900 {
16901 const char * name;
16902
16903 if ((s->flags & SEC_LINKER_CREATED) == 0)
16904 continue;
16905
16906 /* It's OK to base decisions on the section name, because none
16907 of the dynobj section names depend upon the input files. */
16908 name = bfd_section_name (s);
16909
16910 if (s == htab->root.splt)
16911 {
16912 /* Remember whether there is a PLT. */
16913 ;
16914 }
16915 else if (startswith (name, ".rel"))
16916 {
16917 if (s->size != 0)
16918 {
16919 /* Remember whether there are any reloc sections other
16920 than .rel(a).plt and .rela.plt.unloaded. */
16921 if (s != htab->root.srelplt && s != htab->srelplt2)
16922 relocs = true;
16923
16924 /* We use the reloc_count field as a counter if we need
16925 to copy relocs into the output file. */
16926 s->reloc_count = 0;
16927 }
16928 }
16929 else if (s != htab->root.sgot
16930 && s != htab->root.sgotplt
16931 && s != htab->root.iplt
16932 && s != htab->root.igotplt
16933 && s != htab->root.sdynbss
16934 && s != htab->root.sdynrelro
16935 && s != htab->srofixup)
16936 {
16937 /* It's not one of our sections, so don't allocate space. */
16938 continue;
16939 }
16940
16941 if (s->size == 0)
16942 {
16943 /* If we don't need this section, strip it from the
16944 output file. This is mostly to handle .rel(a).bss and
16945 .rel(a).plt. We must create both sections in
16946 create_dynamic_sections, because they must be created
16947 before the linker maps input sections to output
16948 sections. The linker does that before
16949 adjust_dynamic_symbol is called, and it is that
16950 function which decides whether anything needs to go
16951 into these sections. */
16952 s->flags |= SEC_EXCLUDE;
16953 continue;
16954 }
16955
16956 if ((s->flags & SEC_HAS_CONTENTS) == 0)
16957 continue;
16958
16959 /* Allocate memory for the section contents. */
16960 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
16961 if (s->contents == NULL)
16962 return false;
16963 }
16964
16965 return _bfd_elf_maybe_vxworks_add_dynamic_tags (output_bfd, info,
16966 relocs);
16967 }
16968
16969 /* Size sections even though they're not dynamic. We use it to setup
16970 _TLS_MODULE_BASE_, if needed. */
16971
16972 static bool
16973 elf32_arm_always_size_sections (bfd *output_bfd,
16974 struct bfd_link_info *info)
16975 {
16976 asection *tls_sec;
16977 struct elf32_arm_link_hash_table *htab;
16978
16979 htab = elf32_arm_hash_table (info);
16980
16981 if (bfd_link_relocatable (info))
16982 return true;
16983
16984 tls_sec = elf_hash_table (info)->tls_sec;
16985
16986 if (tls_sec)
16987 {
16988 struct elf_link_hash_entry *tlsbase;
16989
16990 tlsbase = elf_link_hash_lookup
16991 (elf_hash_table (info), "_TLS_MODULE_BASE_", true, true, false);
16992
16993 if (tlsbase)
16994 {
16995 struct bfd_link_hash_entry *bh = NULL;
16996 const struct elf_backend_data *bed
16997 = get_elf_backend_data (output_bfd);
16998
16999 if (!(_bfd_generic_link_add_one_symbol
17000 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
17001 tls_sec, 0, NULL, false,
17002 bed->collect, &bh)))
17003 return false;
17004
17005 tlsbase->type = STT_TLS;
17006 tlsbase = (struct elf_link_hash_entry *)bh;
17007 tlsbase->def_regular = 1;
17008 tlsbase->other = STV_HIDDEN;
17009 (*bed->elf_backend_hide_symbol) (info, tlsbase, true);
17010 }
17011 }
17012
17013 if (htab->fdpic_p && !bfd_link_relocatable (info)
17014 && !bfd_elf_stack_segment_size (output_bfd, info,
17015 "__stacksize", DEFAULT_STACK_SIZE))
17016 return false;
17017
17018 return true;
17019 }
17020
17021 /* Finish up dynamic symbol handling. We set the contents of various
17022 dynamic sections here. */
17023
17024 static bool
17025 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
17026 struct bfd_link_info * info,
17027 struct elf_link_hash_entry * h,
17028 Elf_Internal_Sym * sym)
17029 {
17030 struct elf32_arm_link_hash_table *htab;
17031 struct elf32_arm_link_hash_entry *eh;
17032
17033 htab = elf32_arm_hash_table (info);
17034 if (htab == NULL)
17035 return false;
17036
17037 eh = (struct elf32_arm_link_hash_entry *) h;
17038
17039 if (h->plt.offset != (bfd_vma) -1)
17040 {
17041 if (!eh->is_iplt)
17042 {
17043 BFD_ASSERT (h->dynindx != -1);
17044 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
17045 h->dynindx, 0))
17046 return false;
17047 }
17048
17049 if (!h->def_regular)
17050 {
17051 /* Mark the symbol as undefined, rather than as defined in
17052 the .plt section. */
17053 sym->st_shndx = SHN_UNDEF;
17054 /* If the symbol is weak we need to clear the value.
17055 Otherwise, the PLT entry would provide a definition for
17056 the symbol even if the symbol wasn't defined anywhere,
17057 and so the symbol would never be NULL. Leave the value if
17058 there were any relocations where pointer equality matters
17059 (this is a clue for the dynamic linker, to make function
17060 pointer comparisons work between an application and shared
17061 library). */
17062 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
17063 sym->st_value = 0;
17064 }
17065 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
17066 {
17067 /* At least one non-call relocation references this .iplt entry,
17068 so the .iplt entry is the function's canonical address. */
17069 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
17070 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
17071 sym->st_shndx = (_bfd_elf_section_from_bfd_section
17072 (output_bfd, htab->root.iplt->output_section));
17073 sym->st_value = (h->plt.offset
17074 + htab->root.iplt->output_section->vma
17075 + htab->root.iplt->output_offset);
17076 }
17077 }
17078
17079 if (h->needs_copy)
17080 {
17081 asection * s;
17082 Elf_Internal_Rela rel;
17083
17084 /* This symbol needs a copy reloc. Set it up. */
17085 BFD_ASSERT (h->dynindx != -1
17086 && (h->root.type == bfd_link_hash_defined
17087 || h->root.type == bfd_link_hash_defweak));
17088
17089 rel.r_addend = 0;
17090 rel.r_offset = (h->root.u.def.value
17091 + h->root.u.def.section->output_section->vma
17092 + h->root.u.def.section->output_offset);
17093 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
17094 if (h->root.u.def.section == htab->root.sdynrelro)
17095 s = htab->root.sreldynrelro;
17096 else
17097 s = htab->root.srelbss;
17098 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
17099 }
17100
17101 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
17102 and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute:
17103 it is relative to the ".got" section. */
17104 if (h == htab->root.hdynamic
17105 || (!htab->fdpic_p
17106 && htab->root.target_os != is_vxworks
17107 && h == htab->root.hgot))
17108 sym->st_shndx = SHN_ABS;
17109
17110 return true;
17111 }
17112
17113 static void
17114 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17115 void *contents,
17116 const unsigned long *template, unsigned count)
17117 {
17118 unsigned ix;
17119
17120 for (ix = 0; ix != count; ix++)
17121 {
17122 unsigned long insn = template[ix];
17123
17124 /* Emit mov pc,rx if bx is not permitted. */
17125 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
17126 insn = (insn & 0xf000000f) | 0x01a0f000;
17127 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
17128 }
17129 }
17130
17131 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
17132 other variants, NaCl needs this entry in a static executable's
17133 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
17134 zero. For .iplt really only the last bundle is useful, and .iplt
17135 could have a shorter first entry, with each individual PLT entry's
17136 relative branch calculated differently so it targets the last
17137 bundle instead of the instruction before it (labelled .Lplt_tail
17138 above). But it's simpler to keep the size and layout of PLT0
17139 consistent with the dynamic case, at the cost of some dead code at
17140 the start of .iplt and the one dead store to the stack at the start
17141 of .Lplt_tail. */
17142 static void
17143 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17144 asection *plt, bfd_vma got_displacement)
17145 {
17146 unsigned int i;
17147
17148 put_arm_insn (htab, output_bfd,
17149 elf32_arm_nacl_plt0_entry[0]
17150 | arm_movw_immediate (got_displacement),
17151 plt->contents + 0);
17152 put_arm_insn (htab, output_bfd,
17153 elf32_arm_nacl_plt0_entry[1]
17154 | arm_movt_immediate (got_displacement),
17155 plt->contents + 4);
17156
17157 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
17158 put_arm_insn (htab, output_bfd,
17159 elf32_arm_nacl_plt0_entry[i],
17160 plt->contents + (i * 4));
17161 }
17162
17163 /* Finish up the dynamic sections. */
17164
17165 static bool
17166 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
17167 {
17168 bfd * dynobj;
17169 asection * sgot;
17170 asection * sdyn;
17171 struct elf32_arm_link_hash_table *htab;
17172
17173 htab = elf32_arm_hash_table (info);
17174 if (htab == NULL)
17175 return false;
17176
17177 dynobj = elf_hash_table (info)->dynobj;
17178
17179 sgot = htab->root.sgotplt;
17180 /* A broken linker script might have discarded the dynamic sections.
17181 Catch this here so that we do not seg-fault later on. */
17182 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
17183 return false;
17184 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
17185
17186 if (elf_hash_table (info)->dynamic_sections_created)
17187 {
17188 asection *splt;
17189 Elf32_External_Dyn *dyncon, *dynconend;
17190
17191 splt = htab->root.splt;
17192 BFD_ASSERT (splt != NULL && sdyn != NULL);
17193 BFD_ASSERT (sgot != NULL);
17194
17195 dyncon = (Elf32_External_Dyn *) sdyn->contents;
17196 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
17197
17198 for (; dyncon < dynconend; dyncon++)
17199 {
17200 Elf_Internal_Dyn dyn;
17201 const char * name;
17202 asection * s;
17203
17204 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
17205
17206 switch (dyn.d_tag)
17207 {
17208 default:
17209 if (htab->root.target_os == is_vxworks
17210 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
17211 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17212 break;
17213
17214 case DT_HASH:
17215 case DT_STRTAB:
17216 case DT_SYMTAB:
17217 case DT_VERSYM:
17218 case DT_VERDEF:
17219 case DT_VERNEED:
17220 break;
17221
17222 case DT_PLTGOT:
17223 name = ".got.plt";
17224 goto get_vma;
17225 case DT_JMPREL:
17226 name = RELOC_SECTION (htab, ".plt");
17227 get_vma:
17228 s = bfd_get_linker_section (dynobj, name);
17229 if (s == NULL)
17230 {
17231 _bfd_error_handler
17232 (_("could not find section %s"), name);
17233 bfd_set_error (bfd_error_invalid_operation);
17234 return false;
17235 }
17236 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
17237 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17238 break;
17239
17240 case DT_PLTRELSZ:
17241 s = htab->root.srelplt;
17242 BFD_ASSERT (s != NULL);
17243 dyn.d_un.d_val = s->size;
17244 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17245 break;
17246
17247 case DT_RELSZ:
17248 case DT_RELASZ:
17249 case DT_REL:
17250 case DT_RELA:
17251 break;
17252
17253 case DT_TLSDESC_PLT:
17254 s = htab->root.splt;
17255 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17256 + htab->root.tlsdesc_plt);
17257 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17258 break;
17259
17260 case DT_TLSDESC_GOT:
17261 s = htab->root.sgot;
17262 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17263 + htab->root.tlsdesc_got);
17264 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17265 break;
17266
17267 /* Set the bottom bit of DT_INIT/FINI if the
17268 corresponding function is Thumb. */
17269 case DT_INIT:
17270 name = info->init_function;
17271 goto get_sym;
17272 case DT_FINI:
17273 name = info->fini_function;
17274 get_sym:
17275 /* If it wasn't set by elf_bfd_final_link
17276 then there is nothing to adjust. */
17277 if (dyn.d_un.d_val != 0)
17278 {
17279 struct elf_link_hash_entry * eh;
17280
17281 eh = elf_link_hash_lookup (elf_hash_table (info), name,
17282 false, false, true);
17283 if (eh != NULL
17284 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
17285 == ST_BRANCH_TO_THUMB)
17286 {
17287 dyn.d_un.d_val |= 1;
17288 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17289 }
17290 }
17291 break;
17292 }
17293 }
17294
17295 /* Fill in the first entry in the procedure linkage table. */
17296 if (splt->size > 0 && htab->plt_header_size)
17297 {
17298 const bfd_vma *plt0_entry;
17299 bfd_vma got_address, plt_address, got_displacement;
17300
17301 /* Calculate the addresses of the GOT and PLT. */
17302 got_address = sgot->output_section->vma + sgot->output_offset;
17303 plt_address = splt->output_section->vma + splt->output_offset;
17304
17305 if (htab->root.target_os == is_vxworks)
17306 {
17307 /* The VxWorks GOT is relocated by the dynamic linker.
17308 Therefore, we must emit relocations rather than simply
17309 computing the values now. */
17310 Elf_Internal_Rela rel;
17311
17312 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
17313 put_arm_insn (htab, output_bfd, plt0_entry[0],
17314 splt->contents + 0);
17315 put_arm_insn (htab, output_bfd, plt0_entry[1],
17316 splt->contents + 4);
17317 put_arm_insn (htab, output_bfd, plt0_entry[2],
17318 splt->contents + 8);
17319 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
17320
17321 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
17322 rel.r_offset = plt_address + 12;
17323 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17324 rel.r_addend = 0;
17325 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
17326 htab->srelplt2->contents);
17327 }
17328 else if (htab->root.target_os == is_nacl)
17329 arm_nacl_put_plt0 (htab, output_bfd, splt,
17330 got_address + 8 - (plt_address + 16));
17331 else if (using_thumb_only (htab))
17332 {
17333 got_displacement = got_address - (plt_address + 12);
17334
17335 plt0_entry = elf32_thumb2_plt0_entry;
17336 put_arm_insn (htab, output_bfd, plt0_entry[0],
17337 splt->contents + 0);
17338 put_arm_insn (htab, output_bfd, plt0_entry[1],
17339 splt->contents + 4);
17340 put_arm_insn (htab, output_bfd, plt0_entry[2],
17341 splt->contents + 8);
17342
17343 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
17344 }
17345 else
17346 {
17347 got_displacement = got_address - (plt_address + 16);
17348
17349 plt0_entry = elf32_arm_plt0_entry;
17350 put_arm_insn (htab, output_bfd, plt0_entry[0],
17351 splt->contents + 0);
17352 put_arm_insn (htab, output_bfd, plt0_entry[1],
17353 splt->contents + 4);
17354 put_arm_insn (htab, output_bfd, plt0_entry[2],
17355 splt->contents + 8);
17356 put_arm_insn (htab, output_bfd, plt0_entry[3],
17357 splt->contents + 12);
17358
17359 #ifdef FOUR_WORD_PLT
17360 /* The displacement value goes in the otherwise-unused
17361 last word of the second entry. */
17362 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
17363 #else
17364 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
17365 #endif
17366 }
17367 }
17368
17369 /* UnixWare sets the entsize of .plt to 4, although that doesn't
17370 really seem like the right value. */
17371 if (splt->output_section->owner == output_bfd)
17372 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
17373
17374 if (htab->root.tlsdesc_plt)
17375 {
17376 bfd_vma got_address
17377 = sgot->output_section->vma + sgot->output_offset;
17378 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
17379 + htab->root.sgot->output_offset);
17380 bfd_vma plt_address
17381 = splt->output_section->vma + splt->output_offset;
17382
17383 arm_put_trampoline (htab, output_bfd,
17384 splt->contents + htab->root.tlsdesc_plt,
17385 dl_tlsdesc_lazy_trampoline, 6);
17386
17387 bfd_put_32 (output_bfd,
17388 gotplt_address + htab->root.tlsdesc_got
17389 - (plt_address + htab->root.tlsdesc_plt)
17390 - dl_tlsdesc_lazy_trampoline[6],
17391 splt->contents + htab->root.tlsdesc_plt + 24);
17392 bfd_put_32 (output_bfd,
17393 got_address - (plt_address + htab->root.tlsdesc_plt)
17394 - dl_tlsdesc_lazy_trampoline[7],
17395 splt->contents + htab->root.tlsdesc_plt + 24 + 4);
17396 }
17397
17398 if (htab->tls_trampoline)
17399 {
17400 arm_put_trampoline (htab, output_bfd,
17401 splt->contents + htab->tls_trampoline,
17402 tls_trampoline, 3);
17403 #ifdef FOUR_WORD_PLT
17404 bfd_put_32 (output_bfd, 0x00000000,
17405 splt->contents + htab->tls_trampoline + 12);
17406 #endif
17407 }
17408
17409 if (htab->root.target_os == is_vxworks
17410 && !bfd_link_pic (info)
17411 && htab->root.splt->size > 0)
17412 {
17413 /* Correct the .rel(a).plt.unloaded relocations. They will have
17414 incorrect symbol indexes. */
17415 int num_plts;
17416 unsigned char *p;
17417
17418 num_plts = ((htab->root.splt->size - htab->plt_header_size)
17419 / htab->plt_entry_size);
17420 p = htab->srelplt2->contents + RELOC_SIZE (htab);
17421
17422 for (; num_plts; num_plts--)
17423 {
17424 Elf_Internal_Rela rel;
17425
17426 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17427 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17428 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17429 p += RELOC_SIZE (htab);
17430
17431 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17432 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
17433 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17434 p += RELOC_SIZE (htab);
17435 }
17436 }
17437 }
17438
17439 if (htab->root.target_os == is_nacl
17440 && htab->root.iplt != NULL
17441 && htab->root.iplt->size > 0)
17442 /* NaCl uses a special first entry in .iplt too. */
17443 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
17444
17445 /* Fill in the first three entries in the global offset table. */
17446 if (sgot)
17447 {
17448 if (sgot->size > 0)
17449 {
17450 if (sdyn == NULL)
17451 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
17452 else
17453 bfd_put_32 (output_bfd,
17454 sdyn->output_section->vma + sdyn->output_offset,
17455 sgot->contents);
17456 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
17457 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
17458 }
17459
17460 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
17461 }
17462
17463 /* At the very end of the .rofixup section is a pointer to the GOT. */
17464 if (htab->fdpic_p && htab->srofixup != NULL)
17465 {
17466 struct elf_link_hash_entry *hgot = htab->root.hgot;
17467
17468 bfd_vma got_value = hgot->root.u.def.value
17469 + hgot->root.u.def.section->output_section->vma
17470 + hgot->root.u.def.section->output_offset;
17471
17472 arm_elf_add_rofixup(output_bfd, htab->srofixup, got_value);
17473
17474 /* Make sure we allocated and generated the same number of fixups. */
17475 BFD_ASSERT (htab->srofixup->reloc_count * 4 == htab->srofixup->size);
17476 }
17477
17478 return true;
17479 }
17480
17481 static bool
17482 elf32_arm_init_file_header (bfd *abfd, struct bfd_link_info *link_info)
17483 {
17484 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
17485 struct elf32_arm_link_hash_table *globals;
17486 struct elf_segment_map *m;
17487
17488 if (!_bfd_elf_init_file_header (abfd, link_info))
17489 return false;
17490
17491 i_ehdrp = elf_elfheader (abfd);
17492
17493 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
17494 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
17495 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
17496
17497 if (link_info)
17498 {
17499 globals = elf32_arm_hash_table (link_info);
17500 if (globals != NULL && globals->byteswap_code)
17501 i_ehdrp->e_flags |= EF_ARM_BE8;
17502
17503 if (globals->fdpic_p)
17504 i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC;
17505 }
17506
17507 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
17508 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
17509 {
17510 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
17511 if (abi == AEABI_VFP_args_vfp)
17512 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
17513 else
17514 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
17515 }
17516
17517 /* Scan segment to set p_flags attribute if it contains only sections with
17518 SHF_ARM_PURECODE flag. */
17519 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
17520 {
17521 unsigned int j;
17522
17523 if (m->count == 0)
17524 continue;
17525 for (j = 0; j < m->count; j++)
17526 {
17527 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
17528 break;
17529 }
17530 if (j == m->count)
17531 {
17532 m->p_flags = PF_X;
17533 m->p_flags_valid = 1;
17534 }
17535 }
17536 return true;
17537 }
17538
17539 static enum elf_reloc_type_class
17540 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
17541 const asection *rel_sec ATTRIBUTE_UNUSED,
17542 const Elf_Internal_Rela *rela)
17543 {
17544 switch ((int) ELF32_R_TYPE (rela->r_info))
17545 {
17546 case R_ARM_RELATIVE:
17547 return reloc_class_relative;
17548 case R_ARM_JUMP_SLOT:
17549 return reloc_class_plt;
17550 case R_ARM_COPY:
17551 return reloc_class_copy;
17552 case R_ARM_IRELATIVE:
17553 return reloc_class_ifunc;
17554 default:
17555 return reloc_class_normal;
17556 }
17557 }
17558
17559 static void
17560 arm_final_write_processing (bfd *abfd)
17561 {
17562 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
17563 }
17564
17565 static bool
17566 elf32_arm_final_write_processing (bfd *abfd)
17567 {
17568 arm_final_write_processing (abfd);
17569 return _bfd_elf_final_write_processing (abfd);
17570 }
17571
17572 /* Return TRUE if this is an unwinding table entry. */
17573
17574 static bool
17575 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
17576 {
17577 return (startswith (name, ELF_STRING_ARM_unwind)
17578 || startswith (name, ELF_STRING_ARM_unwind_once));
17579 }
17580
17581
17582 /* Set the type and flags for an ARM section. We do this by
17583 the section name, which is a hack, but ought to work. */
17584
17585 static bool
17586 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
17587 {
17588 const char * name;
17589
17590 name = bfd_section_name (sec);
17591
17592 if (is_arm_elf_unwind_section_name (abfd, name))
17593 {
17594 hdr->sh_type = SHT_ARM_EXIDX;
17595 hdr->sh_flags |= SHF_LINK_ORDER;
17596 }
17597
17598 if (sec->flags & SEC_ELF_PURECODE)
17599 hdr->sh_flags |= SHF_ARM_PURECODE;
17600
17601 return true;
17602 }
17603
17604 /* Handle an ARM specific section when reading an object file. This is
17605 called when bfd_section_from_shdr finds a section with an unknown
17606 type. */
17607
17608 static bool
17609 elf32_arm_section_from_shdr (bfd *abfd,
17610 Elf_Internal_Shdr * hdr,
17611 const char *name,
17612 int shindex)
17613 {
17614 /* There ought to be a place to keep ELF backend specific flags, but
17615 at the moment there isn't one. We just keep track of the
17616 sections by their name, instead. Fortunately, the ABI gives
17617 names for all the ARM specific sections, so we will probably get
17618 away with this. */
17619 switch (hdr->sh_type)
17620 {
17621 case SHT_ARM_EXIDX:
17622 case SHT_ARM_PREEMPTMAP:
17623 case SHT_ARM_ATTRIBUTES:
17624 break;
17625
17626 default:
17627 return false;
17628 }
17629
17630 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
17631 return false;
17632
17633 return true;
17634 }
17635
17636 static _arm_elf_section_data *
17637 get_arm_elf_section_data (asection * sec)
17638 {
17639 if (sec && sec->owner && is_arm_elf (sec->owner))
17640 return elf32_arm_section_data (sec);
17641 else
17642 return NULL;
17643 }
17644
17645 typedef struct
17646 {
17647 void *flaginfo;
17648 struct bfd_link_info *info;
17649 asection *sec;
17650 int sec_shndx;
17651 int (*func) (void *, const char *, Elf_Internal_Sym *,
17652 asection *, struct elf_link_hash_entry *);
17653 } output_arch_syminfo;
17654
17655 enum map_symbol_type
17656 {
17657 ARM_MAP_ARM,
17658 ARM_MAP_THUMB,
17659 ARM_MAP_DATA
17660 };
17661
17662
17663 /* Output a single mapping symbol. */
17664
17665 static bool
17666 elf32_arm_output_map_sym (output_arch_syminfo *osi,
17667 enum map_symbol_type type,
17668 bfd_vma offset)
17669 {
17670 static const char *names[3] = {"$a", "$t", "$d"};
17671 Elf_Internal_Sym sym;
17672
17673 sym.st_value = osi->sec->output_section->vma
17674 + osi->sec->output_offset
17675 + offset;
17676 sym.st_size = 0;
17677 sym.st_other = 0;
17678 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
17679 sym.st_shndx = osi->sec_shndx;
17680 sym.st_target_internal = 0;
17681 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
17682 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
17683 }
17684
17685 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
17686 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
17687
17688 static bool
17689 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
17690 bool is_iplt_entry_p,
17691 union gotplt_union *root_plt,
17692 struct arm_plt_info *arm_plt)
17693 {
17694 struct elf32_arm_link_hash_table *htab;
17695 bfd_vma addr, plt_header_size;
17696
17697 if (root_plt->offset == (bfd_vma) -1)
17698 return true;
17699
17700 htab = elf32_arm_hash_table (osi->info);
17701 if (htab == NULL)
17702 return false;
17703
17704 if (is_iplt_entry_p)
17705 {
17706 osi->sec = htab->root.iplt;
17707 plt_header_size = 0;
17708 }
17709 else
17710 {
17711 osi->sec = htab->root.splt;
17712 plt_header_size = htab->plt_header_size;
17713 }
17714 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
17715 (osi->info->output_bfd, osi->sec->output_section));
17716
17717 addr = root_plt->offset & -2;
17718 if (htab->root.target_os == is_vxworks)
17719 {
17720 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17721 return false;
17722 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
17723 return false;
17724 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
17725 return false;
17726 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
17727 return false;
17728 }
17729 else if (htab->root.target_os == is_nacl)
17730 {
17731 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17732 return false;
17733 }
17734 else if (htab->fdpic_p)
17735 {
17736 enum map_symbol_type type = using_thumb_only(htab)
17737 ? ARM_MAP_THUMB
17738 : ARM_MAP_ARM;
17739
17740 if (elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt))
17741 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17742 return false;
17743 if (!elf32_arm_output_map_sym (osi, type, addr))
17744 return false;
17745 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 16))
17746 return false;
17747 if (htab->plt_entry_size == 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry))
17748 if (!elf32_arm_output_map_sym (osi, type, addr + 24))
17749 return false;
17750 }
17751 else if (using_thumb_only (htab))
17752 {
17753 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
17754 return false;
17755 }
17756 else
17757 {
17758 bool thumb_stub_p;
17759
17760 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
17761 if (thumb_stub_p)
17762 {
17763 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17764 return false;
17765 }
17766 #ifdef FOUR_WORD_PLT
17767 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17768 return false;
17769 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17770 return false;
17771 #else
17772 /* A three-word PLT with no Thumb thunk contains only Arm code,
17773 so only need to output a mapping symbol for the first PLT entry and
17774 entries with thumb thunks. */
17775 if (thumb_stub_p || addr == plt_header_size)
17776 {
17777 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17778 return false;
17779 }
17780 #endif
17781 }
17782
17783 return true;
17784 }
17785
17786 /* Output mapping symbols for PLT entries associated with H. */
17787
17788 static bool
17789 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
17790 {
17791 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
17792 struct elf32_arm_link_hash_entry *eh;
17793
17794 if (h->root.type == bfd_link_hash_indirect)
17795 return true;
17796
17797 if (h->root.type == bfd_link_hash_warning)
17798 /* When warning symbols are created, they **replace** the "real"
17799 entry in the hash table, thus we never get to see the real
17800 symbol in a hash traversal. So look at it now. */
17801 h = (struct elf_link_hash_entry *) h->root.u.i.link;
17802
17803 eh = (struct elf32_arm_link_hash_entry *) h;
17804 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
17805 &h->plt, &eh->plt);
17806 }
17807
17808 /* Bind a veneered symbol to its veneer identified by its hash entry
17809 STUB_ENTRY. The veneered location thus loose its symbol. */
17810
17811 static void
17812 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
17813 {
17814 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
17815
17816 BFD_ASSERT (hash);
17817 hash->root.root.u.def.section = stub_entry->stub_sec;
17818 hash->root.root.u.def.value = stub_entry->stub_offset;
17819 hash->root.size = stub_entry->stub_size;
17820 }
17821
17822 /* Output a single local symbol for a generated stub. */
17823
17824 static bool
17825 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
17826 bfd_vma offset, bfd_vma size)
17827 {
17828 Elf_Internal_Sym sym;
17829
17830 sym.st_value = osi->sec->output_section->vma
17831 + osi->sec->output_offset
17832 + offset;
17833 sym.st_size = size;
17834 sym.st_other = 0;
17835 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
17836 sym.st_shndx = osi->sec_shndx;
17837 sym.st_target_internal = 0;
17838 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
17839 }
17840
17841 static bool
17842 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
17843 void * in_arg)
17844 {
17845 struct elf32_arm_stub_hash_entry *stub_entry;
17846 asection *stub_sec;
17847 bfd_vma addr;
17848 char *stub_name;
17849 output_arch_syminfo *osi;
17850 const insn_sequence *template_sequence;
17851 enum stub_insn_type prev_type;
17852 int size;
17853 int i;
17854 enum map_symbol_type sym_type;
17855
17856 /* Massage our args to the form they really have. */
17857 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17858 osi = (output_arch_syminfo *) in_arg;
17859
17860 stub_sec = stub_entry->stub_sec;
17861
17862 /* Ensure this stub is attached to the current section being
17863 processed. */
17864 if (stub_sec != osi->sec)
17865 return true;
17866
17867 addr = (bfd_vma) stub_entry->stub_offset;
17868 template_sequence = stub_entry->stub_template;
17869
17870 if (arm_stub_sym_claimed (stub_entry->stub_type))
17871 arm_stub_claim_sym (stub_entry);
17872 else
17873 {
17874 stub_name = stub_entry->output_name;
17875 switch (template_sequence[0].type)
17876 {
17877 case ARM_TYPE:
17878 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
17879 stub_entry->stub_size))
17880 return false;
17881 break;
17882 case THUMB16_TYPE:
17883 case THUMB32_TYPE:
17884 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
17885 stub_entry->stub_size))
17886 return false;
17887 break;
17888 default:
17889 BFD_FAIL ();
17890 return 0;
17891 }
17892 }
17893
17894 prev_type = DATA_TYPE;
17895 size = 0;
17896 for (i = 0; i < stub_entry->stub_template_size; i++)
17897 {
17898 switch (template_sequence[i].type)
17899 {
17900 case ARM_TYPE:
17901 sym_type = ARM_MAP_ARM;
17902 break;
17903
17904 case THUMB16_TYPE:
17905 case THUMB32_TYPE:
17906 sym_type = ARM_MAP_THUMB;
17907 break;
17908
17909 case DATA_TYPE:
17910 sym_type = ARM_MAP_DATA;
17911 break;
17912
17913 default:
17914 BFD_FAIL ();
17915 return false;
17916 }
17917
17918 if (template_sequence[i].type != prev_type)
17919 {
17920 prev_type = template_sequence[i].type;
17921 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
17922 return false;
17923 }
17924
17925 switch (template_sequence[i].type)
17926 {
17927 case ARM_TYPE:
17928 case THUMB32_TYPE:
17929 size += 4;
17930 break;
17931
17932 case THUMB16_TYPE:
17933 size += 2;
17934 break;
17935
17936 case DATA_TYPE:
17937 size += 4;
17938 break;
17939
17940 default:
17941 BFD_FAIL ();
17942 return false;
17943 }
17944 }
17945
17946 return true;
17947 }
17948
17949 /* Output mapping symbols for linker generated sections,
17950 and for those data-only sections that do not have a
17951 $d. */
17952
17953 static bool
17954 elf32_arm_output_arch_local_syms (bfd *output_bfd,
17955 struct bfd_link_info *info,
17956 void *flaginfo,
17957 int (*func) (void *, const char *,
17958 Elf_Internal_Sym *,
17959 asection *,
17960 struct elf_link_hash_entry *))
17961 {
17962 output_arch_syminfo osi;
17963 struct elf32_arm_link_hash_table *htab;
17964 bfd_vma offset;
17965 bfd_size_type size;
17966 bfd *input_bfd;
17967
17968 htab = elf32_arm_hash_table (info);
17969 if (htab == NULL)
17970 return false;
17971
17972 check_use_blx (htab);
17973
17974 osi.flaginfo = flaginfo;
17975 osi.info = info;
17976 osi.func = func;
17977
17978 /* Add a $d mapping symbol to data-only sections that
17979 don't have any mapping symbol. This may result in (harmless) redundant
17980 mapping symbols. */
17981 for (input_bfd = info->input_bfds;
17982 input_bfd != NULL;
17983 input_bfd = input_bfd->link.next)
17984 {
17985 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
17986 for (osi.sec = input_bfd->sections;
17987 osi.sec != NULL;
17988 osi.sec = osi.sec->next)
17989 {
17990 if (osi.sec->output_section != NULL
17991 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
17992 != 0)
17993 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
17994 == SEC_HAS_CONTENTS
17995 && get_arm_elf_section_data (osi.sec) != NULL
17996 && get_arm_elf_section_data (osi.sec)->mapcount == 0
17997 && osi.sec->size > 0
17998 && (osi.sec->flags & SEC_EXCLUDE) == 0)
17999 {
18000 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18001 (output_bfd, osi.sec->output_section);
18002 if (osi.sec_shndx != (int)SHN_BAD)
18003 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
18004 }
18005 }
18006 }
18007
18008 /* ARM->Thumb glue. */
18009 if (htab->arm_glue_size > 0)
18010 {
18011 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18012 ARM2THUMB_GLUE_SECTION_NAME);
18013
18014 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18015 (output_bfd, osi.sec->output_section);
18016 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
18017 || htab->pic_veneer)
18018 size = ARM2THUMB_PIC_GLUE_SIZE;
18019 else if (htab->use_blx)
18020 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
18021 else
18022 size = ARM2THUMB_STATIC_GLUE_SIZE;
18023
18024 for (offset = 0; offset < htab->arm_glue_size; offset += size)
18025 {
18026 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
18027 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
18028 }
18029 }
18030
18031 /* Thumb->ARM glue. */
18032 if (htab->thumb_glue_size > 0)
18033 {
18034 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18035 THUMB2ARM_GLUE_SECTION_NAME);
18036
18037 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18038 (output_bfd, osi.sec->output_section);
18039 size = THUMB2ARM_GLUE_SIZE;
18040
18041 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
18042 {
18043 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
18044 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
18045 }
18046 }
18047
18048 /* ARMv4 BX veneers. */
18049 if (htab->bx_glue_size > 0)
18050 {
18051 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18052 ARM_BX_GLUE_SECTION_NAME);
18053
18054 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18055 (output_bfd, osi.sec->output_section);
18056
18057 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
18058 }
18059
18060 /* Long calls stubs. */
18061 if (htab->stub_bfd && htab->stub_bfd->sections)
18062 {
18063 asection* stub_sec;
18064
18065 for (stub_sec = htab->stub_bfd->sections;
18066 stub_sec != NULL;
18067 stub_sec = stub_sec->next)
18068 {
18069 /* Ignore non-stub sections. */
18070 if (!strstr (stub_sec->name, STUB_SUFFIX))
18071 continue;
18072
18073 osi.sec = stub_sec;
18074
18075 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18076 (output_bfd, osi.sec->output_section);
18077
18078 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
18079 }
18080 }
18081
18082 /* Finally, output mapping symbols for the PLT. */
18083 if (htab->root.splt && htab->root.splt->size > 0)
18084 {
18085 osi.sec = htab->root.splt;
18086 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18087 (output_bfd, osi.sec->output_section));
18088
18089 /* Output mapping symbols for the plt header. */
18090 if (htab->root.target_os == is_vxworks)
18091 {
18092 /* VxWorks shared libraries have no PLT header. */
18093 if (!bfd_link_pic (info))
18094 {
18095 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18096 return false;
18097 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18098 return false;
18099 }
18100 }
18101 else if (htab->root.target_os == is_nacl)
18102 {
18103 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18104 return false;
18105 }
18106 else if (using_thumb_only (htab) && !htab->fdpic_p)
18107 {
18108 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
18109 return false;
18110 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18111 return false;
18112 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
18113 return false;
18114 }
18115 else if (!htab->fdpic_p)
18116 {
18117 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18118 return false;
18119 #ifndef FOUR_WORD_PLT
18120 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
18121 return false;
18122 #endif
18123 }
18124 }
18125 if (htab->root.target_os == is_nacl
18126 && htab->root.iplt
18127 && htab->root.iplt->size > 0)
18128 {
18129 /* NaCl uses a special first entry in .iplt too. */
18130 osi.sec = htab->root.iplt;
18131 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18132 (output_bfd, osi.sec->output_section));
18133 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18134 return false;
18135 }
18136 if ((htab->root.splt && htab->root.splt->size > 0)
18137 || (htab->root.iplt && htab->root.iplt->size > 0))
18138 {
18139 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
18140 for (input_bfd = info->input_bfds;
18141 input_bfd != NULL;
18142 input_bfd = input_bfd->link.next)
18143 {
18144 struct arm_local_iplt_info **local_iplt;
18145 unsigned int i, num_syms;
18146
18147 local_iplt = elf32_arm_local_iplt (input_bfd);
18148 if (local_iplt != NULL)
18149 {
18150 num_syms = elf_symtab_hdr (input_bfd).sh_info;
18151 for (i = 0; i < num_syms; i++)
18152 if (local_iplt[i] != NULL
18153 && !elf32_arm_output_plt_map_1 (&osi, true,
18154 &local_iplt[i]->root,
18155 &local_iplt[i]->arm))
18156 return false;
18157 }
18158 }
18159 }
18160 if (htab->root.tlsdesc_plt != 0)
18161 {
18162 /* Mapping symbols for the lazy tls trampoline. */
18163 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM,
18164 htab->root.tlsdesc_plt))
18165 return false;
18166
18167 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18168 htab->root.tlsdesc_plt + 24))
18169 return false;
18170 }
18171 if (htab->tls_trampoline != 0)
18172 {
18173 /* Mapping symbols for the tls trampoline. */
18174 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
18175 return false;
18176 #ifdef FOUR_WORD_PLT
18177 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18178 htab->tls_trampoline + 12))
18179 return false;
18180 #endif
18181 }
18182
18183 return true;
18184 }
18185
18186 /* Filter normal symbols of CMSE entry functions of ABFD to include in
18187 the import library. All SYMCOUNT symbols of ABFD can be examined
18188 from their pointers in SYMS. Pointers of symbols to keep should be
18189 stored continuously at the beginning of that array.
18190
18191 Returns the number of symbols to keep. */
18192
18193 static unsigned int
18194 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18195 struct bfd_link_info *info,
18196 asymbol **syms, long symcount)
18197 {
18198 size_t maxnamelen;
18199 char *cmse_name;
18200 long src_count, dst_count = 0;
18201 struct elf32_arm_link_hash_table *htab;
18202
18203 htab = elf32_arm_hash_table (info);
18204 if (!htab->stub_bfd || !htab->stub_bfd->sections)
18205 symcount = 0;
18206
18207 maxnamelen = 128;
18208 cmse_name = (char *) bfd_malloc (maxnamelen);
18209 BFD_ASSERT (cmse_name);
18210
18211 for (src_count = 0; src_count < symcount; src_count++)
18212 {
18213 struct elf32_arm_link_hash_entry *cmse_hash;
18214 asymbol *sym;
18215 flagword flags;
18216 char *name;
18217 size_t namelen;
18218
18219 sym = syms[src_count];
18220 flags = sym->flags;
18221 name = (char *) bfd_asymbol_name (sym);
18222
18223 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
18224 continue;
18225 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
18226 continue;
18227
18228 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
18229 if (namelen > maxnamelen)
18230 {
18231 cmse_name = (char *)
18232 bfd_realloc (cmse_name, namelen);
18233 maxnamelen = namelen;
18234 }
18235 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
18236 cmse_hash = (struct elf32_arm_link_hash_entry *)
18237 elf_link_hash_lookup (&(htab)->root, cmse_name, false, false, true);
18238
18239 if (!cmse_hash
18240 || (cmse_hash->root.root.type != bfd_link_hash_defined
18241 && cmse_hash->root.root.type != bfd_link_hash_defweak)
18242 || cmse_hash->root.type != STT_FUNC)
18243 continue;
18244
18245 syms[dst_count++] = sym;
18246 }
18247 free (cmse_name);
18248
18249 syms[dst_count] = NULL;
18250
18251 return dst_count;
18252 }
18253
18254 /* Filter symbols of ABFD to include in the import library. All
18255 SYMCOUNT symbols of ABFD can be examined from their pointers in
18256 SYMS. Pointers of symbols to keep should be stored continuously at
18257 the beginning of that array.
18258
18259 Returns the number of symbols to keep. */
18260
18261 static unsigned int
18262 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18263 struct bfd_link_info *info,
18264 asymbol **syms, long symcount)
18265 {
18266 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
18267
18268 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18269 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18270 library to be a relocatable object file. */
18271 BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
18272 if (globals->cmse_implib)
18273 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
18274 else
18275 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
18276 }
18277
18278 /* Allocate target specific section data. */
18279
18280 static bool
18281 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
18282 {
18283 if (!sec->used_by_bfd)
18284 {
18285 _arm_elf_section_data *sdata;
18286 size_t amt = sizeof (*sdata);
18287
18288 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
18289 if (sdata == NULL)
18290 return false;
18291 sec->used_by_bfd = sdata;
18292 }
18293
18294 return _bfd_elf_new_section_hook (abfd, sec);
18295 }
18296
18297
18298 /* Used to order a list of mapping symbols by address. */
18299
18300 static int
18301 elf32_arm_compare_mapping (const void * a, const void * b)
18302 {
18303 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
18304 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
18305
18306 if (amap->vma > bmap->vma)
18307 return 1;
18308 else if (amap->vma < bmap->vma)
18309 return -1;
18310 else if (amap->type > bmap->type)
18311 /* Ensure results do not depend on the host qsort for objects with
18312 multiple mapping symbols at the same address by sorting on type
18313 after vma. */
18314 return 1;
18315 else if (amap->type < bmap->type)
18316 return -1;
18317 else
18318 return 0;
18319 }
18320
18321 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
18322
18323 static unsigned long
18324 offset_prel31 (unsigned long addr, bfd_vma offset)
18325 {
18326 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
18327 }
18328
18329 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18330 relocations. */
18331
18332 static void
18333 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
18334 {
18335 unsigned long first_word = bfd_get_32 (output_bfd, from);
18336 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
18337
18338 /* High bit of first word is supposed to be zero. */
18339 if ((first_word & 0x80000000ul) == 0)
18340 first_word = offset_prel31 (first_word, offset);
18341
18342 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18343 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
18344 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
18345 second_word = offset_prel31 (second_word, offset);
18346
18347 bfd_put_32 (output_bfd, first_word, to);
18348 bfd_put_32 (output_bfd, second_word, to + 4);
18349 }
18350
18351 /* Data for make_branch_to_a8_stub(). */
18352
18353 struct a8_branch_to_stub_data
18354 {
18355 asection *writing_section;
18356 bfd_byte *contents;
18357 };
18358
18359
18360 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
18361 places for a particular section. */
18362
18363 static bool
18364 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
18365 void *in_arg)
18366 {
18367 struct elf32_arm_stub_hash_entry *stub_entry;
18368 struct a8_branch_to_stub_data *data;
18369 bfd_byte *contents;
18370 unsigned long branch_insn;
18371 bfd_vma veneered_insn_loc, veneer_entry_loc;
18372 bfd_signed_vma branch_offset;
18373 bfd *abfd;
18374 unsigned int loc;
18375
18376 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18377 data = (struct a8_branch_to_stub_data *) in_arg;
18378
18379 if (stub_entry->target_section != data->writing_section
18380 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
18381 return true;
18382
18383 contents = data->contents;
18384
18385 /* We use target_section as Cortex-A8 erratum workaround stubs are only
18386 generated when both source and target are in the same section. */
18387 veneered_insn_loc = stub_entry->target_section->output_section->vma
18388 + stub_entry->target_section->output_offset
18389 + stub_entry->source_value;
18390
18391 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
18392 + stub_entry->stub_sec->output_offset
18393 + stub_entry->stub_offset;
18394
18395 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
18396 veneered_insn_loc &= ~3u;
18397
18398 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
18399
18400 abfd = stub_entry->target_section->owner;
18401 loc = stub_entry->source_value;
18402
18403 /* We attempt to avoid this condition by setting stubs_always_after_branch
18404 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18405 This check is just to be on the safe side... */
18406 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
18407 {
18408 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18409 "allocated in unsafe location"), abfd);
18410 return false;
18411 }
18412
18413 switch (stub_entry->stub_type)
18414 {
18415 case arm_stub_a8_veneer_b:
18416 case arm_stub_a8_veneer_b_cond:
18417 branch_insn = 0xf0009000;
18418 goto jump24;
18419
18420 case arm_stub_a8_veneer_blx:
18421 branch_insn = 0xf000e800;
18422 goto jump24;
18423
18424 case arm_stub_a8_veneer_bl:
18425 {
18426 unsigned int i1, j1, i2, j2, s;
18427
18428 branch_insn = 0xf000d000;
18429
18430 jump24:
18431 if (branch_offset < -16777216 || branch_offset > 16777214)
18432 {
18433 /* There's not much we can do apart from complain if this
18434 happens. */
18435 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18436 "of range (input file too large)"), abfd);
18437 return false;
18438 }
18439
18440 /* i1 = not(j1 eor s), so:
18441 not i1 = j1 eor s
18442 j1 = (not i1) eor s. */
18443
18444 branch_insn |= (branch_offset >> 1) & 0x7ff;
18445 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
18446 i2 = (branch_offset >> 22) & 1;
18447 i1 = (branch_offset >> 23) & 1;
18448 s = (branch_offset >> 24) & 1;
18449 j1 = (!i1) ^ s;
18450 j2 = (!i2) ^ s;
18451 branch_insn |= j2 << 11;
18452 branch_insn |= j1 << 13;
18453 branch_insn |= s << 26;
18454 }
18455 break;
18456
18457 default:
18458 BFD_FAIL ();
18459 return false;
18460 }
18461
18462 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
18463 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
18464
18465 return true;
18466 }
18467
18468 /* Beginning of stm32l4xx work-around. */
18469
18470 /* Functions encoding instructions necessary for the emission of the
18471 fix-stm32l4xx-629360.
18472 Encoding is extracted from the
18473 ARM (C) Architecture Reference Manual
18474 ARMv7-A and ARMv7-R edition
18475 ARM DDI 0406C.b (ID072512). */
18476
18477 static inline bfd_vma
18478 create_instruction_branch_absolute (int branch_offset)
18479 {
18480 /* A8.8.18 B (A8-334)
18481 B target_address (Encoding T4). */
18482 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
18483 /* jump offset is: S:I1:I2:imm10:imm11:0. */
18484 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
18485
18486 int s = ((branch_offset & 0x1000000) >> 24);
18487 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
18488 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
18489
18490 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
18491 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
18492
18493 bfd_vma patched_inst = 0xf0009000
18494 | s << 26 /* S. */
18495 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
18496 | j1 << 13 /* J1. */
18497 | j2 << 11 /* J2. */
18498 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
18499
18500 return patched_inst;
18501 }
18502
18503 static inline bfd_vma
18504 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
18505 {
18506 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18507 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
18508 bfd_vma patched_inst = 0xe8900000
18509 | (/*W=*/wback << 21)
18510 | (base_reg << 16)
18511 | (reg_mask & 0x0000ffff);
18512
18513 return patched_inst;
18514 }
18515
18516 static inline bfd_vma
18517 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
18518 {
18519 /* A8.8.60 LDMDB/LDMEA (A8-402)
18520 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
18521 bfd_vma patched_inst = 0xe9100000
18522 | (/*W=*/wback << 21)
18523 | (base_reg << 16)
18524 | (reg_mask & 0x0000ffff);
18525
18526 return patched_inst;
18527 }
18528
18529 static inline bfd_vma
18530 create_instruction_mov (int target_reg, int source_reg)
18531 {
18532 /* A8.8.103 MOV (register) (A8-486)
18533 MOV Rd, Rm (Encoding T1). */
18534 bfd_vma patched_inst = 0x4600
18535 | (target_reg & 0x7)
18536 | ((target_reg & 0x8) >> 3) << 7
18537 | (source_reg << 3);
18538
18539 return patched_inst;
18540 }
18541
18542 static inline bfd_vma
18543 create_instruction_sub (int target_reg, int source_reg, int value)
18544 {
18545 /* A8.8.221 SUB (immediate) (A8-708)
18546 SUB Rd, Rn, #value (Encoding T3). */
18547 bfd_vma patched_inst = 0xf1a00000
18548 | (target_reg << 8)
18549 | (source_reg << 16)
18550 | (/*S=*/0 << 20)
18551 | ((value & 0x800) >> 11) << 26
18552 | ((value & 0x700) >> 8) << 12
18553 | (value & 0x0ff);
18554
18555 return patched_inst;
18556 }
18557
18558 static inline bfd_vma
18559 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
18560 int first_reg)
18561 {
18562 /* A8.8.332 VLDM (A8-922)
18563 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
18564 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
18565 | (/*W=*/wback << 21)
18566 | (base_reg << 16)
18567 | (num_words & 0x000000ff)
18568 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
18569 | (first_reg & 0x00000001) << 22;
18570
18571 return patched_inst;
18572 }
18573
18574 static inline bfd_vma
18575 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
18576 int first_reg)
18577 {
18578 /* A8.8.332 VLDM (A8-922)
18579 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
18580 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
18581 | (base_reg << 16)
18582 | (num_words & 0x000000ff)
18583 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
18584 | (first_reg & 0x00000001) << 22;
18585
18586 return patched_inst;
18587 }
18588
18589 static inline bfd_vma
18590 create_instruction_udf_w (int value)
18591 {
18592 /* A8.8.247 UDF (A8-758)
18593 Undefined (Encoding T2). */
18594 bfd_vma patched_inst = 0xf7f0a000
18595 | (value & 0x00000fff)
18596 | (value & 0x000f0000) << 16;
18597
18598 return patched_inst;
18599 }
18600
18601 static inline bfd_vma
18602 create_instruction_udf (int value)
18603 {
18604 /* A8.8.247 UDF (A8-758)
18605 Undefined (Encoding T1). */
18606 bfd_vma patched_inst = 0xde00
18607 | (value & 0xff);
18608
18609 return patched_inst;
18610 }
18611
18612 /* Functions writing an instruction in memory, returning the next
18613 memory position to write to. */
18614
18615 static inline bfd_byte *
18616 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
18617 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18618 {
18619 put_thumb2_insn (htab, output_bfd, insn, pt);
18620 return pt + 4;
18621 }
18622
18623 static inline bfd_byte *
18624 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
18625 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18626 {
18627 put_thumb_insn (htab, output_bfd, insn, pt);
18628 return pt + 2;
18629 }
18630
18631 /* Function filling up a region in memory with T1 and T2 UDFs taking
18632 care of alignment. */
18633
18634 static bfd_byte *
18635 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
18636 bfd * output_bfd,
18637 const bfd_byte * const base_stub_contents,
18638 bfd_byte * const from_stub_contents,
18639 const bfd_byte * const end_stub_contents)
18640 {
18641 bfd_byte *current_stub_contents = from_stub_contents;
18642
18643 /* Fill the remaining of the stub with deterministic contents : UDF
18644 instructions.
18645 Check if realignment is needed on modulo 4 frontier using T1, to
18646 further use T2. */
18647 if ((current_stub_contents < end_stub_contents)
18648 && !((current_stub_contents - base_stub_contents) % 2)
18649 && ((current_stub_contents - base_stub_contents) % 4))
18650 current_stub_contents =
18651 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18652 create_instruction_udf (0));
18653
18654 for (; current_stub_contents < end_stub_contents;)
18655 current_stub_contents =
18656 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18657 create_instruction_udf_w (0));
18658
18659 return current_stub_contents;
18660 }
18661
18662 /* Functions writing the stream of instructions equivalent to the
18663 derived sequence for ldmia, ldmdb, vldm respectively. */
18664
18665 static void
18666 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
18667 bfd * output_bfd,
18668 const insn32 initial_insn,
18669 const bfd_byte *const initial_insn_addr,
18670 bfd_byte *const base_stub_contents)
18671 {
18672 int wback = (initial_insn & 0x00200000) >> 21;
18673 int ri, rn = (initial_insn & 0x000F0000) >> 16;
18674 int insn_all_registers = initial_insn & 0x0000ffff;
18675 int insn_low_registers, insn_high_registers;
18676 int usable_register_mask;
18677 int nb_registers = elf32_arm_popcount (insn_all_registers);
18678 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18679 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18680 bfd_byte *current_stub_contents = base_stub_contents;
18681
18682 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
18683
18684 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18685 smaller than 8 registers load sequences that do not cause the
18686 hardware issue. */
18687 if (nb_registers <= 8)
18688 {
18689 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18690 current_stub_contents =
18691 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18692 initial_insn);
18693
18694 /* B initial_insn_addr+4. */
18695 if (!restore_pc)
18696 current_stub_contents =
18697 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18698 create_instruction_branch_absolute
18699 (initial_insn_addr - current_stub_contents));
18700
18701 /* Fill the remaining of the stub with deterministic contents. */
18702 current_stub_contents =
18703 stm32l4xx_fill_stub_udf (htab, output_bfd,
18704 base_stub_contents, current_stub_contents,
18705 base_stub_contents +
18706 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18707
18708 return;
18709 }
18710
18711 /* - reg_list[13] == 0. */
18712 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
18713
18714 /* - reg_list[14] & reg_list[15] != 1. */
18715 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18716
18717 /* - if (wback==1) reg_list[rn] == 0. */
18718 BFD_ASSERT (!wback || !restore_rn);
18719
18720 /* - nb_registers > 8. */
18721 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18722
18723 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18724
18725 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
18726 - One with the 7 lowest registers (register mask 0x007F)
18727 This LDM will finally contain between 2 and 7 registers
18728 - One with the 7 highest registers (register mask 0xDF80)
18729 This ldm will finally contain between 2 and 7 registers. */
18730 insn_low_registers = insn_all_registers & 0x007F;
18731 insn_high_registers = insn_all_registers & 0xDF80;
18732
18733 /* A spare register may be needed during this veneer to temporarily
18734 handle the base register. This register will be restored with the
18735 last LDM operation.
18736 The usable register may be any general purpose register (that
18737 excludes PC, SP, LR : register mask is 0x1FFF). */
18738 usable_register_mask = 0x1FFF;
18739
18740 /* Generate the stub function. */
18741 if (wback)
18742 {
18743 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
18744 current_stub_contents =
18745 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18746 create_instruction_ldmia
18747 (rn, /*wback=*/1, insn_low_registers));
18748
18749 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
18750 current_stub_contents =
18751 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18752 create_instruction_ldmia
18753 (rn, /*wback=*/1, insn_high_registers));
18754 if (!restore_pc)
18755 {
18756 /* B initial_insn_addr+4. */
18757 current_stub_contents =
18758 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18759 create_instruction_branch_absolute
18760 (initial_insn_addr - current_stub_contents));
18761 }
18762 }
18763 else /* if (!wback). */
18764 {
18765 ri = rn;
18766
18767 /* If Rn is not part of the high-register-list, move it there. */
18768 if (!(insn_high_registers & (1 << rn)))
18769 {
18770 /* Choose a Ri in the high-register-list that will be restored. */
18771 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18772
18773 /* MOV Ri, Rn. */
18774 current_stub_contents =
18775 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18776 create_instruction_mov (ri, rn));
18777 }
18778
18779 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18780 current_stub_contents =
18781 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18782 create_instruction_ldmia
18783 (ri, /*wback=*/1, insn_low_registers));
18784
18785 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
18786 current_stub_contents =
18787 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18788 create_instruction_ldmia
18789 (ri, /*wback=*/0, insn_high_registers));
18790
18791 if (!restore_pc)
18792 {
18793 /* B initial_insn_addr+4. */
18794 current_stub_contents =
18795 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18796 create_instruction_branch_absolute
18797 (initial_insn_addr - current_stub_contents));
18798 }
18799 }
18800
18801 /* Fill the remaining of the stub with deterministic contents. */
18802 current_stub_contents =
18803 stm32l4xx_fill_stub_udf (htab, output_bfd,
18804 base_stub_contents, current_stub_contents,
18805 base_stub_contents +
18806 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18807 }
18808
18809 static void
18810 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
18811 bfd * output_bfd,
18812 const insn32 initial_insn,
18813 const bfd_byte *const initial_insn_addr,
18814 bfd_byte *const base_stub_contents)
18815 {
18816 int wback = (initial_insn & 0x00200000) >> 21;
18817 int ri, rn = (initial_insn & 0x000f0000) >> 16;
18818 int insn_all_registers = initial_insn & 0x0000ffff;
18819 int insn_low_registers, insn_high_registers;
18820 int usable_register_mask;
18821 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18822 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18823 int nb_registers = elf32_arm_popcount (insn_all_registers);
18824 bfd_byte *current_stub_contents = base_stub_contents;
18825
18826 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
18827
18828 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18829 smaller than 8 registers load sequences that do not cause the
18830 hardware issue. */
18831 if (nb_registers <= 8)
18832 {
18833 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18834 current_stub_contents =
18835 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18836 initial_insn);
18837
18838 /* B initial_insn_addr+4. */
18839 current_stub_contents =
18840 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18841 create_instruction_branch_absolute
18842 (initial_insn_addr - current_stub_contents));
18843
18844 /* Fill the remaining of the stub with deterministic contents. */
18845 current_stub_contents =
18846 stm32l4xx_fill_stub_udf (htab, output_bfd,
18847 base_stub_contents, current_stub_contents,
18848 base_stub_contents +
18849 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18850
18851 return;
18852 }
18853
18854 /* - reg_list[13] == 0. */
18855 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
18856
18857 /* - reg_list[14] & reg_list[15] != 1. */
18858 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18859
18860 /* - if (wback==1) reg_list[rn] == 0. */
18861 BFD_ASSERT (!wback || !restore_rn);
18862
18863 /* - nb_registers > 8. */
18864 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18865
18866 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18867
18868 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
18869 - One with the 7 lowest registers (register mask 0x007F)
18870 This LDM will finally contain between 2 and 7 registers
18871 - One with the 7 highest registers (register mask 0xDF80)
18872 This ldm will finally contain between 2 and 7 registers. */
18873 insn_low_registers = insn_all_registers & 0x007F;
18874 insn_high_registers = insn_all_registers & 0xDF80;
18875
18876 /* A spare register may be needed during this veneer to temporarily
18877 handle the base register. This register will be restored with
18878 the last LDM operation.
18879 The usable register may be any general purpose register (that excludes
18880 PC, SP, LR : register mask is 0x1FFF). */
18881 usable_register_mask = 0x1FFF;
18882
18883 /* Generate the stub function. */
18884 if (!wback && !restore_pc && !restore_rn)
18885 {
18886 /* Choose a Ri in the low-register-list that will be restored. */
18887 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18888
18889 /* MOV Ri, Rn. */
18890 current_stub_contents =
18891 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18892 create_instruction_mov (ri, rn));
18893
18894 /* LDMDB Ri!, {R-high-register-list}. */
18895 current_stub_contents =
18896 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18897 create_instruction_ldmdb
18898 (ri, /*wback=*/1, insn_high_registers));
18899
18900 /* LDMDB Ri, {R-low-register-list}. */
18901 current_stub_contents =
18902 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18903 create_instruction_ldmdb
18904 (ri, /*wback=*/0, insn_low_registers));
18905
18906 /* B initial_insn_addr+4. */
18907 current_stub_contents =
18908 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18909 create_instruction_branch_absolute
18910 (initial_insn_addr - current_stub_contents));
18911 }
18912 else if (wback && !restore_pc && !restore_rn)
18913 {
18914 /* LDMDB Rn!, {R-high-register-list}. */
18915 current_stub_contents =
18916 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18917 create_instruction_ldmdb
18918 (rn, /*wback=*/1, insn_high_registers));
18919
18920 /* LDMDB Rn!, {R-low-register-list}. */
18921 current_stub_contents =
18922 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18923 create_instruction_ldmdb
18924 (rn, /*wback=*/1, insn_low_registers));
18925
18926 /* B initial_insn_addr+4. */
18927 current_stub_contents =
18928 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18929 create_instruction_branch_absolute
18930 (initial_insn_addr - current_stub_contents));
18931 }
18932 else if (!wback && restore_pc && !restore_rn)
18933 {
18934 /* Choose a Ri in the high-register-list that will be restored. */
18935 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18936
18937 /* SUB Ri, Rn, #(4*nb_registers). */
18938 current_stub_contents =
18939 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18940 create_instruction_sub (ri, rn, (4 * nb_registers)));
18941
18942 /* LDMIA Ri!, {R-low-register-list}. */
18943 current_stub_contents =
18944 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18945 create_instruction_ldmia
18946 (ri, /*wback=*/1, insn_low_registers));
18947
18948 /* LDMIA Ri, {R-high-register-list}. */
18949 current_stub_contents =
18950 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18951 create_instruction_ldmia
18952 (ri, /*wback=*/0, insn_high_registers));
18953 }
18954 else if (wback && restore_pc && !restore_rn)
18955 {
18956 /* Choose a Ri in the high-register-list that will be restored. */
18957 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18958
18959 /* SUB Rn, Rn, #(4*nb_registers) */
18960 current_stub_contents =
18961 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18962 create_instruction_sub (rn, rn, (4 * nb_registers)));
18963
18964 /* MOV Ri, Rn. */
18965 current_stub_contents =
18966 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18967 create_instruction_mov (ri, rn));
18968
18969 /* LDMIA Ri!, {R-low-register-list}. */
18970 current_stub_contents =
18971 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18972 create_instruction_ldmia
18973 (ri, /*wback=*/1, insn_low_registers));
18974
18975 /* LDMIA Ri, {R-high-register-list}. */
18976 current_stub_contents =
18977 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18978 create_instruction_ldmia
18979 (ri, /*wback=*/0, insn_high_registers));
18980 }
18981 else if (!wback && !restore_pc && restore_rn)
18982 {
18983 ri = rn;
18984 if (!(insn_low_registers & (1 << rn)))
18985 {
18986 /* Choose a Ri in the low-register-list that will be restored. */
18987 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18988
18989 /* MOV Ri, Rn. */
18990 current_stub_contents =
18991 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18992 create_instruction_mov (ri, rn));
18993 }
18994
18995 /* LDMDB Ri!, {R-high-register-list}. */
18996 current_stub_contents =
18997 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18998 create_instruction_ldmdb
18999 (ri, /*wback=*/1, insn_high_registers));
19000
19001 /* LDMDB Ri, {R-low-register-list}. */
19002 current_stub_contents =
19003 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19004 create_instruction_ldmdb
19005 (ri, /*wback=*/0, insn_low_registers));
19006
19007 /* B initial_insn_addr+4. */
19008 current_stub_contents =
19009 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19010 create_instruction_branch_absolute
19011 (initial_insn_addr - current_stub_contents));
19012 }
19013 else if (!wback && restore_pc && restore_rn)
19014 {
19015 ri = rn;
19016 if (!(insn_high_registers & (1 << rn)))
19017 {
19018 /* Choose a Ri in the high-register-list that will be restored. */
19019 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19020 }
19021
19022 /* SUB Ri, Rn, #(4*nb_registers). */
19023 current_stub_contents =
19024 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19025 create_instruction_sub (ri, rn, (4 * nb_registers)));
19026
19027 /* LDMIA Ri!, {R-low-register-list}. */
19028 current_stub_contents =
19029 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19030 create_instruction_ldmia
19031 (ri, /*wback=*/1, insn_low_registers));
19032
19033 /* LDMIA Ri, {R-high-register-list}. */
19034 current_stub_contents =
19035 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19036 create_instruction_ldmia
19037 (ri, /*wback=*/0, insn_high_registers));
19038 }
19039 else if (wback && restore_rn)
19040 {
19041 /* The assembler should not have accepted to encode this. */
19042 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
19043 "undefined behavior.\n");
19044 }
19045
19046 /* Fill the remaining of the stub with deterministic contents. */
19047 current_stub_contents =
19048 stm32l4xx_fill_stub_udf (htab, output_bfd,
19049 base_stub_contents, current_stub_contents,
19050 base_stub_contents +
19051 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19052
19053 }
19054
19055 static void
19056 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
19057 bfd * output_bfd,
19058 const insn32 initial_insn,
19059 const bfd_byte *const initial_insn_addr,
19060 bfd_byte *const base_stub_contents)
19061 {
19062 int num_words = initial_insn & 0xff;
19063 bfd_byte *current_stub_contents = base_stub_contents;
19064
19065 BFD_ASSERT (is_thumb2_vldm (initial_insn));
19066
19067 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19068 smaller than 8 words load sequences that do not cause the
19069 hardware issue. */
19070 if (num_words <= 8)
19071 {
19072 /* Untouched instruction. */
19073 current_stub_contents =
19074 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19075 initial_insn);
19076
19077 /* B initial_insn_addr+4. */
19078 current_stub_contents =
19079 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19080 create_instruction_branch_absolute
19081 (initial_insn_addr - current_stub_contents));
19082 }
19083 else
19084 {
19085 bool is_dp = /* DP encoding. */
19086 (initial_insn & 0xfe100f00) == 0xec100b00;
19087 bool is_ia_nobang = /* (IA without !). */
19088 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
19089 bool is_ia_bang = /* (IA with !) - includes VPOP. */
19090 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
19091 bool is_db_bang = /* (DB with !). */
19092 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
19093 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
19094 /* d = UInt (Vd:D);. */
19095 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
19096 | (((unsigned int)initial_insn << 9) >> 31);
19097
19098 /* Compute the number of 8-words chunks needed to split. */
19099 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
19100 int chunk;
19101
19102 /* The test coverage has been done assuming the following
19103 hypothesis that exactly one of the previous is_ predicates is
19104 true. */
19105 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
19106 && !(is_ia_nobang & is_ia_bang & is_db_bang));
19107
19108 /* We treat the cutting of the words in one pass for all
19109 cases, then we emit the adjustments:
19110
19111 vldm rx, {...}
19112 -> vldm rx!, {8_words_or_less} for each needed 8_word
19113 -> sub rx, rx, #size (list)
19114
19115 vldm rx!, {...}
19116 -> vldm rx!, {8_words_or_less} for each needed 8_word
19117 This also handles vpop instruction (when rx is sp)
19118
19119 vldmd rx!, {...}
19120 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
19121 for (chunk = 0; chunk < chunks; ++chunk)
19122 {
19123 bfd_vma new_insn = 0;
19124
19125 if (is_ia_nobang || is_ia_bang)
19126 {
19127 new_insn = create_instruction_vldmia
19128 (base_reg,
19129 is_dp,
19130 /*wback= . */1,
19131 chunks - (chunk + 1) ?
19132 8 : num_words - chunk * 8,
19133 first_reg + chunk * 8);
19134 }
19135 else if (is_db_bang)
19136 {
19137 new_insn = create_instruction_vldmdb
19138 (base_reg,
19139 is_dp,
19140 chunks - (chunk + 1) ?
19141 8 : num_words - chunk * 8,
19142 first_reg + chunk * 8);
19143 }
19144
19145 if (new_insn)
19146 current_stub_contents =
19147 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19148 new_insn);
19149 }
19150
19151 /* Only this case requires the base register compensation
19152 subtract. */
19153 if (is_ia_nobang)
19154 {
19155 current_stub_contents =
19156 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19157 create_instruction_sub
19158 (base_reg, base_reg, 4*num_words));
19159 }
19160
19161 /* B initial_insn_addr+4. */
19162 current_stub_contents =
19163 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19164 create_instruction_branch_absolute
19165 (initial_insn_addr - current_stub_contents));
19166 }
19167
19168 /* Fill the remaining of the stub with deterministic contents. */
19169 current_stub_contents =
19170 stm32l4xx_fill_stub_udf (htab, output_bfd,
19171 base_stub_contents, current_stub_contents,
19172 base_stub_contents +
19173 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
19174 }
19175
19176 static void
19177 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
19178 bfd * output_bfd,
19179 const insn32 wrong_insn,
19180 const bfd_byte *const wrong_insn_addr,
19181 bfd_byte *const stub_contents)
19182 {
19183 if (is_thumb2_ldmia (wrong_insn))
19184 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
19185 wrong_insn, wrong_insn_addr,
19186 stub_contents);
19187 else if (is_thumb2_ldmdb (wrong_insn))
19188 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
19189 wrong_insn, wrong_insn_addr,
19190 stub_contents);
19191 else if (is_thumb2_vldm (wrong_insn))
19192 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
19193 wrong_insn, wrong_insn_addr,
19194 stub_contents);
19195 }
19196
19197 /* End of stm32l4xx work-around. */
19198
19199
19200 /* Do code byteswapping. Return FALSE afterwards so that the section is
19201 written out as normal. */
19202
19203 static bool
19204 elf32_arm_write_section (bfd *output_bfd,
19205 struct bfd_link_info *link_info,
19206 asection *sec,
19207 bfd_byte *contents)
19208 {
19209 unsigned int mapcount, errcount;
19210 _arm_elf_section_data *arm_data;
19211 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
19212 elf32_arm_section_map *map;
19213 elf32_vfp11_erratum_list *errnode;
19214 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
19215 bfd_vma ptr;
19216 bfd_vma end;
19217 bfd_vma offset = sec->output_section->vma + sec->output_offset;
19218 bfd_byte tmp;
19219 unsigned int i;
19220
19221 if (globals == NULL)
19222 return false;
19223
19224 /* If this section has not been allocated an _arm_elf_section_data
19225 structure then we cannot record anything. */
19226 arm_data = get_arm_elf_section_data (sec);
19227 if (arm_data == NULL)
19228 return false;
19229
19230 mapcount = arm_data->mapcount;
19231 map = arm_data->map;
19232 errcount = arm_data->erratumcount;
19233
19234 if (errcount != 0)
19235 {
19236 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
19237
19238 for (errnode = arm_data->erratumlist; errnode != 0;
19239 errnode = errnode->next)
19240 {
19241 bfd_vma target = errnode->vma - offset;
19242
19243 switch (errnode->type)
19244 {
19245 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
19246 {
19247 bfd_vma branch_to_veneer;
19248 /* Original condition code of instruction, plus bit mask for
19249 ARM B instruction. */
19250 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
19251 | 0x0a000000;
19252
19253 /* The instruction is before the label. */
19254 target -= 4;
19255
19256 /* Above offset included in -4 below. */
19257 branch_to_veneer = errnode->u.b.veneer->vma
19258 - errnode->vma - 4;
19259
19260 if ((signed) branch_to_veneer < -(1 << 25)
19261 || (signed) branch_to_veneer >= (1 << 25))
19262 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19263 "range"), output_bfd);
19264
19265 insn |= (branch_to_veneer >> 2) & 0xffffff;
19266 contents[endianflip ^ target] = insn & 0xff;
19267 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19268 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19269 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19270 }
19271 break;
19272
19273 case VFP11_ERRATUM_ARM_VENEER:
19274 {
19275 bfd_vma branch_from_veneer;
19276 unsigned int insn;
19277
19278 /* Take size of veneer into account. */
19279 branch_from_veneer = errnode->u.v.branch->vma
19280 - errnode->vma - 12;
19281
19282 if ((signed) branch_from_veneer < -(1 << 25)
19283 || (signed) branch_from_veneer >= (1 << 25))
19284 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19285 "range"), output_bfd);
19286
19287 /* Original instruction. */
19288 insn = errnode->u.v.branch->u.b.vfp_insn;
19289 contents[endianflip ^ target] = insn & 0xff;
19290 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19291 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19292 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19293
19294 /* Branch back to insn after original insn. */
19295 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
19296 contents[endianflip ^ (target + 4)] = insn & 0xff;
19297 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
19298 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
19299 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
19300 }
19301 break;
19302
19303 default:
19304 abort ();
19305 }
19306 }
19307 }
19308
19309 if (arm_data->stm32l4xx_erratumcount != 0)
19310 {
19311 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
19312 stm32l4xx_errnode != 0;
19313 stm32l4xx_errnode = stm32l4xx_errnode->next)
19314 {
19315 bfd_vma target = stm32l4xx_errnode->vma - offset;
19316
19317 switch (stm32l4xx_errnode->type)
19318 {
19319 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
19320 {
19321 unsigned int insn;
19322 bfd_vma branch_to_veneer =
19323 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
19324
19325 if ((signed) branch_to_veneer < -(1 << 24)
19326 || (signed) branch_to_veneer >= (1 << 24))
19327 {
19328 bfd_vma out_of_range =
19329 ((signed) branch_to_veneer < -(1 << 24)) ?
19330 - branch_to_veneer - (1 << 24) :
19331 ((signed) branch_to_veneer >= (1 << 24)) ?
19332 branch_to_veneer - (1 << 24) : 0;
19333
19334 _bfd_error_handler
19335 (_("%pB(%#" PRIx64 "): error: "
19336 "cannot create STM32L4XX veneer; "
19337 "jump out of range by %" PRId64 " bytes; "
19338 "cannot encode branch instruction"),
19339 output_bfd,
19340 (uint64_t) (stm32l4xx_errnode->vma - 4),
19341 (int64_t) out_of_range);
19342 continue;
19343 }
19344
19345 insn = create_instruction_branch_absolute
19346 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
19347
19348 /* The instruction is before the label. */
19349 target -= 4;
19350
19351 put_thumb2_insn (globals, output_bfd,
19352 (bfd_vma) insn, contents + target);
19353 }
19354 break;
19355
19356 case STM32L4XX_ERRATUM_VENEER:
19357 {
19358 bfd_byte * veneer;
19359 bfd_byte * veneer_r;
19360 unsigned int insn;
19361
19362 veneer = contents + target;
19363 veneer_r = veneer
19364 + stm32l4xx_errnode->u.b.veneer->vma
19365 - stm32l4xx_errnode->vma - 4;
19366
19367 if ((signed) (veneer_r - veneer -
19368 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
19369 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
19370 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
19371 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
19372 || (signed) (veneer_r - veneer) >= (1 << 24))
19373 {
19374 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19375 "veneer"), output_bfd);
19376 continue;
19377 }
19378
19379 /* Original instruction. */
19380 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
19381
19382 stm32l4xx_create_replacing_stub
19383 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
19384 }
19385 break;
19386
19387 default:
19388 abort ();
19389 }
19390 }
19391 }
19392
19393 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
19394 {
19395 arm_unwind_table_edit *edit_node
19396 = arm_data->u.exidx.unwind_edit_list;
19397 /* Now, sec->size is the size of the section we will write. The original
19398 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19399 markers) was sec->rawsize. (This isn't the case if we perform no
19400 edits, then rawsize will be zero and we should use size). */
19401 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
19402 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
19403 unsigned int in_index, out_index;
19404 bfd_vma add_to_offsets = 0;
19405
19406 if (edited_contents == NULL)
19407 return false;
19408 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
19409 {
19410 if (edit_node)
19411 {
19412 unsigned int edit_index = edit_node->index;
19413
19414 if (in_index < edit_index && in_index * 8 < input_size)
19415 {
19416 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19417 contents + in_index * 8, add_to_offsets);
19418 out_index++;
19419 in_index++;
19420 }
19421 else if (in_index == edit_index
19422 || (in_index * 8 >= input_size
19423 && edit_index == UINT_MAX))
19424 {
19425 switch (edit_node->type)
19426 {
19427 case DELETE_EXIDX_ENTRY:
19428 in_index++;
19429 add_to_offsets += 8;
19430 break;
19431
19432 case INSERT_EXIDX_CANTUNWIND_AT_END:
19433 {
19434 asection *text_sec = edit_node->linked_section;
19435 bfd_vma text_offset = text_sec->output_section->vma
19436 + text_sec->output_offset
19437 + text_sec->size;
19438 bfd_vma exidx_offset = offset + out_index * 8;
19439 unsigned long prel31_offset;
19440
19441 /* Note: this is meant to be equivalent to an
19442 R_ARM_PREL31 relocation. These synthetic
19443 EXIDX_CANTUNWIND markers are not relocated by the
19444 usual BFD method. */
19445 prel31_offset = (text_offset - exidx_offset)
19446 & 0x7ffffffful;
19447 if (bfd_link_relocatable (link_info))
19448 {
19449 /* Here relocation for new EXIDX_CANTUNWIND is
19450 created, so there is no need to
19451 adjust offset by hand. */
19452 prel31_offset = text_sec->output_offset
19453 + text_sec->size;
19454 }
19455
19456 /* First address we can't unwind. */
19457 bfd_put_32 (output_bfd, prel31_offset,
19458 &edited_contents[out_index * 8]);
19459
19460 /* Code for EXIDX_CANTUNWIND. */
19461 bfd_put_32 (output_bfd, 0x1,
19462 &edited_contents[out_index * 8 + 4]);
19463
19464 out_index++;
19465 add_to_offsets -= 8;
19466 }
19467 break;
19468 }
19469
19470 edit_node = edit_node->next;
19471 }
19472 }
19473 else
19474 {
19475 /* No more edits, copy remaining entries verbatim. */
19476 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19477 contents + in_index * 8, add_to_offsets);
19478 out_index++;
19479 in_index++;
19480 }
19481 }
19482
19483 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
19484 bfd_set_section_contents (output_bfd, sec->output_section,
19485 edited_contents,
19486 (file_ptr) sec->output_offset, sec->size);
19487
19488 return true;
19489 }
19490
19491 /* Fix code to point to Cortex-A8 erratum stubs. */
19492 if (globals->fix_cortex_a8)
19493 {
19494 struct a8_branch_to_stub_data data;
19495
19496 data.writing_section = sec;
19497 data.contents = contents;
19498
19499 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
19500 & data);
19501 }
19502
19503 if (mapcount == 0)
19504 return false;
19505
19506 if (globals->byteswap_code)
19507 {
19508 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
19509
19510 ptr = map[0].vma;
19511 for (i = 0; i < mapcount; i++)
19512 {
19513 if (i == mapcount - 1)
19514 end = sec->size;
19515 else
19516 end = map[i + 1].vma;
19517
19518 switch (map[i].type)
19519 {
19520 case 'a':
19521 /* Byte swap code words. */
19522 while (ptr + 3 < end)
19523 {
19524 tmp = contents[ptr];
19525 contents[ptr] = contents[ptr + 3];
19526 contents[ptr + 3] = tmp;
19527 tmp = contents[ptr + 1];
19528 contents[ptr + 1] = contents[ptr + 2];
19529 contents[ptr + 2] = tmp;
19530 ptr += 4;
19531 }
19532 break;
19533
19534 case 't':
19535 /* Byte swap code halfwords. */
19536 while (ptr + 1 < end)
19537 {
19538 tmp = contents[ptr];
19539 contents[ptr] = contents[ptr + 1];
19540 contents[ptr + 1] = tmp;
19541 ptr += 2;
19542 }
19543 break;
19544
19545 case 'd':
19546 /* Leave data alone. */
19547 break;
19548 }
19549 ptr = end;
19550 }
19551 }
19552
19553 free (map);
19554 arm_data->mapcount = -1;
19555 arm_data->mapsize = 0;
19556 arm_data->map = NULL;
19557
19558 return false;
19559 }
19560
19561 /* Mangle thumb function symbols as we read them in. */
19562
19563 static bool
19564 elf32_arm_swap_symbol_in (bfd * abfd,
19565 const void *psrc,
19566 const void *pshn,
19567 Elf_Internal_Sym *dst)
19568 {
19569 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
19570 return false;
19571 dst->st_target_internal = 0;
19572
19573 /* New EABI objects mark thumb function symbols by setting the low bit of
19574 the address. */
19575 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
19576 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
19577 {
19578 if (dst->st_value & 1)
19579 {
19580 dst->st_value &= ~(bfd_vma) 1;
19581 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
19582 ST_BRANCH_TO_THUMB);
19583 }
19584 else
19585 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
19586 }
19587 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
19588 {
19589 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
19590 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
19591 }
19592 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
19593 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
19594 else
19595 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
19596
19597 return true;
19598 }
19599
19600
19601 /* Mangle thumb function symbols as we write them out. */
19602
19603 static void
19604 elf32_arm_swap_symbol_out (bfd *abfd,
19605 const Elf_Internal_Sym *src,
19606 void *cdst,
19607 void *shndx)
19608 {
19609 Elf_Internal_Sym newsym;
19610
19611 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19612 of the address set, as per the new EABI. We do this unconditionally
19613 because objcopy does not set the elf header flags until after
19614 it writes out the symbol table. */
19615 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
19616 {
19617 newsym = *src;
19618 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
19619 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
19620 if (newsym.st_shndx != SHN_UNDEF)
19621 {
19622 /* Do this only for defined symbols. At link type, the static
19623 linker will simulate the work of dynamic linker of resolving
19624 symbols and will carry over the thumbness of found symbols to
19625 the output symbol table. It's not clear how it happens, but
19626 the thumbness of undefined symbols can well be different at
19627 runtime, and writing '1' for them will be confusing for users
19628 and possibly for dynamic linker itself.
19629 */
19630 newsym.st_value |= 1;
19631 }
19632
19633 src = &newsym;
19634 }
19635 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
19636 }
19637
19638 /* Add the PT_ARM_EXIDX program header. */
19639
19640 static bool
19641 elf32_arm_modify_segment_map (bfd *abfd,
19642 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19643 {
19644 struct elf_segment_map *m;
19645 asection *sec;
19646
19647 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19648 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19649 {
19650 /* If there is already a PT_ARM_EXIDX header, then we do not
19651 want to add another one. This situation arises when running
19652 "strip"; the input binary already has the header. */
19653 m = elf_seg_map (abfd);
19654 while (m && m->p_type != PT_ARM_EXIDX)
19655 m = m->next;
19656 if (!m)
19657 {
19658 m = (struct elf_segment_map *)
19659 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
19660 if (m == NULL)
19661 return false;
19662 m->p_type = PT_ARM_EXIDX;
19663 m->count = 1;
19664 m->sections[0] = sec;
19665
19666 m->next = elf_seg_map (abfd);
19667 elf_seg_map (abfd) = m;
19668 }
19669 }
19670
19671 return true;
19672 }
19673
19674 /* We may add a PT_ARM_EXIDX program header. */
19675
19676 static int
19677 elf32_arm_additional_program_headers (bfd *abfd,
19678 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19679 {
19680 asection *sec;
19681
19682 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19683 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19684 return 1;
19685 else
19686 return 0;
19687 }
19688
19689 /* Hook called by the linker routine which adds symbols from an object
19690 file. */
19691
19692 static bool
19693 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
19694 Elf_Internal_Sym *sym, const char **namep,
19695 flagword *flagsp, asection **secp, bfd_vma *valp)
19696 {
19697 if (elf32_arm_hash_table (info) == NULL)
19698 return false;
19699
19700 if (elf32_arm_hash_table (info)->root.target_os == is_vxworks
19701 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
19702 flagsp, secp, valp))
19703 return false;
19704
19705 return true;
19706 }
19707
19708 /* We use this to override swap_symbol_in and swap_symbol_out. */
19709 const struct elf_size_info elf32_arm_size_info =
19710 {
19711 sizeof (Elf32_External_Ehdr),
19712 sizeof (Elf32_External_Phdr),
19713 sizeof (Elf32_External_Shdr),
19714 sizeof (Elf32_External_Rel),
19715 sizeof (Elf32_External_Rela),
19716 sizeof (Elf32_External_Sym),
19717 sizeof (Elf32_External_Dyn),
19718 sizeof (Elf_External_Note),
19719 4,
19720 1,
19721 32, 2,
19722 ELFCLASS32, EV_CURRENT,
19723 bfd_elf32_write_out_phdrs,
19724 bfd_elf32_write_shdrs_and_ehdr,
19725 bfd_elf32_checksum_contents,
19726 bfd_elf32_write_relocs,
19727 elf32_arm_swap_symbol_in,
19728 elf32_arm_swap_symbol_out,
19729 bfd_elf32_slurp_reloc_table,
19730 bfd_elf32_slurp_symbol_table,
19731 bfd_elf32_swap_dyn_in,
19732 bfd_elf32_swap_dyn_out,
19733 bfd_elf32_swap_reloc_in,
19734 bfd_elf32_swap_reloc_out,
19735 bfd_elf32_swap_reloca_in,
19736 bfd_elf32_swap_reloca_out
19737 };
19738
19739 static bfd_vma
19740 read_code32 (const bfd *abfd, const bfd_byte *addr)
19741 {
19742 /* V7 BE8 code is always little endian. */
19743 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19744 return bfd_getl32 (addr);
19745
19746 return bfd_get_32 (abfd, addr);
19747 }
19748
19749 static bfd_vma
19750 read_code16 (const bfd *abfd, const bfd_byte *addr)
19751 {
19752 /* V7 BE8 code is always little endian. */
19753 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19754 return bfd_getl16 (addr);
19755
19756 return bfd_get_16 (abfd, addr);
19757 }
19758
19759 /* Return size of plt0 entry starting at ADDR
19760 or (bfd_vma) -1 if size can not be determined. */
19761
19762 static bfd_vma
19763 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
19764 {
19765 bfd_vma first_word;
19766 bfd_vma plt0_size;
19767
19768 first_word = read_code32 (abfd, addr);
19769
19770 if (first_word == elf32_arm_plt0_entry[0])
19771 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19772 else if (first_word == elf32_thumb2_plt0_entry[0])
19773 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19774 else
19775 /* We don't yet handle this PLT format. */
19776 return (bfd_vma) -1;
19777
19778 return plt0_size;
19779 }
19780
19781 /* Return size of plt entry starting at offset OFFSET
19782 of plt section located at address START
19783 or (bfd_vma) -1 if size can not be determined. */
19784
19785 static bfd_vma
19786 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
19787 {
19788 bfd_vma first_insn;
19789 bfd_vma plt_size = 0;
19790 const bfd_byte *addr = start + offset;
19791
19792 /* PLT entry size if fixed on Thumb-only platforms. */
19793 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
19794 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
19795
19796 /* Respect Thumb stub if necessary. */
19797 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
19798 {
19799 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
19800 }
19801
19802 /* Strip immediate from first add. */
19803 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
19804
19805 #ifdef FOUR_WORD_PLT
19806 if (first_insn == elf32_arm_plt_entry[0])
19807 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
19808 #else
19809 if (first_insn == elf32_arm_plt_entry_long[0])
19810 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
19811 else if (first_insn == elf32_arm_plt_entry_short[0])
19812 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
19813 #endif
19814 else
19815 /* We don't yet handle this PLT format. */
19816 return (bfd_vma) -1;
19817
19818 return plt_size;
19819 }
19820
19821 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
19822
19823 static long
19824 elf32_arm_get_synthetic_symtab (bfd *abfd,
19825 long symcount ATTRIBUTE_UNUSED,
19826 asymbol **syms ATTRIBUTE_UNUSED,
19827 long dynsymcount,
19828 asymbol **dynsyms,
19829 asymbol **ret)
19830 {
19831 asection *relplt;
19832 asymbol *s;
19833 arelent *p;
19834 long count, i, n;
19835 size_t size;
19836 Elf_Internal_Shdr *hdr;
19837 char *names;
19838 asection *plt;
19839 bfd_vma offset;
19840 bfd_byte *data;
19841
19842 *ret = NULL;
19843
19844 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
19845 return 0;
19846
19847 if (dynsymcount <= 0)
19848 return 0;
19849
19850 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
19851 if (relplt == NULL)
19852 return 0;
19853
19854 hdr = &elf_section_data (relplt)->this_hdr;
19855 if (hdr->sh_link != elf_dynsymtab (abfd)
19856 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
19857 return 0;
19858
19859 plt = bfd_get_section_by_name (abfd, ".plt");
19860 if (plt == NULL)
19861 return 0;
19862
19863 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, true))
19864 return -1;
19865
19866 data = plt->contents;
19867 if (data == NULL)
19868 {
19869 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
19870 return -1;
19871 bfd_cache_section_contents((asection *) plt, data);
19872 }
19873
19874 count = relplt->size / hdr->sh_entsize;
19875 size = count * sizeof (asymbol);
19876 p = relplt->relocation;
19877 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19878 {
19879 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
19880 if (p->addend != 0)
19881 size += sizeof ("+0x") - 1 + 8;
19882 }
19883
19884 s = *ret = (asymbol *) bfd_malloc (size);
19885 if (s == NULL)
19886 return -1;
19887
19888 offset = elf32_arm_plt0_size (abfd, data);
19889 if (offset == (bfd_vma) -1)
19890 return -1;
19891
19892 names = (char *) (s + count);
19893 p = relplt->relocation;
19894 n = 0;
19895 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19896 {
19897 size_t len;
19898
19899 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
19900 if (plt_size == (bfd_vma) -1)
19901 break;
19902
19903 *s = **p->sym_ptr_ptr;
19904 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
19905 we are defining a symbol, ensure one of them is set. */
19906 if ((s->flags & BSF_LOCAL) == 0)
19907 s->flags |= BSF_GLOBAL;
19908 s->flags |= BSF_SYNTHETIC;
19909 s->section = plt;
19910 s->value = offset;
19911 s->name = names;
19912 s->udata.p = NULL;
19913 len = strlen ((*p->sym_ptr_ptr)->name);
19914 memcpy (names, (*p->sym_ptr_ptr)->name, len);
19915 names += len;
19916 if (p->addend != 0)
19917 {
19918 char buf[30], *a;
19919
19920 memcpy (names, "+0x", sizeof ("+0x") - 1);
19921 names += sizeof ("+0x") - 1;
19922 bfd_sprintf_vma (abfd, buf, p->addend);
19923 for (a = buf; *a == '0'; ++a)
19924 ;
19925 len = strlen (a);
19926 memcpy (names, a, len);
19927 names += len;
19928 }
19929 memcpy (names, "@plt", sizeof ("@plt"));
19930 names += sizeof ("@plt");
19931 ++s, ++n;
19932 offset += plt_size;
19933 }
19934
19935 return n;
19936 }
19937
19938 static bool
19939 elf32_arm_section_flags (const Elf_Internal_Shdr *hdr)
19940 {
19941 if (hdr->sh_flags & SHF_ARM_PURECODE)
19942 hdr->bfd_section->flags |= SEC_ELF_PURECODE;
19943 return true;
19944 }
19945
19946 static flagword
19947 elf32_arm_lookup_section_flags (char *flag_name)
19948 {
19949 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
19950 return SHF_ARM_PURECODE;
19951
19952 return SEC_NO_FLAGS;
19953 }
19954
19955 static unsigned int
19956 elf32_arm_count_additional_relocs (asection *sec)
19957 {
19958 struct _arm_elf_section_data *arm_data;
19959 arm_data = get_arm_elf_section_data (sec);
19960
19961 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
19962 }
19963
19964 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
19965 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
19966 FALSE otherwise. ISECTION is the best guess matching section from the
19967 input bfd IBFD, but it might be NULL. */
19968
19969 static bool
19970 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
19971 bfd *obfd ATTRIBUTE_UNUSED,
19972 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
19973 Elf_Internal_Shdr *osection)
19974 {
19975 switch (osection->sh_type)
19976 {
19977 case SHT_ARM_EXIDX:
19978 {
19979 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
19980 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
19981 unsigned i = 0;
19982
19983 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
19984 osection->sh_info = 0;
19985
19986 /* The sh_link field must be set to the text section associated with
19987 this index section. Unfortunately the ARM EHABI does not specify
19988 exactly how to determine this association. Our caller does try
19989 to match up OSECTION with its corresponding input section however
19990 so that is a good first guess. */
19991 if (isection != NULL
19992 && osection->bfd_section != NULL
19993 && isection->bfd_section != NULL
19994 && isection->bfd_section->output_section != NULL
19995 && isection->bfd_section->output_section == osection->bfd_section
19996 && iheaders != NULL
19997 && isection->sh_link > 0
19998 && isection->sh_link < elf_numsections (ibfd)
19999 && iheaders[isection->sh_link]->bfd_section != NULL
20000 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
20001 )
20002 {
20003 for (i = elf_numsections (obfd); i-- > 0;)
20004 if (oheaders[i]->bfd_section
20005 == iheaders[isection->sh_link]->bfd_section->output_section)
20006 break;
20007 }
20008
20009 if (i == 0)
20010 {
20011 /* Failing that we have to find a matching section ourselves. If
20012 we had the output section name available we could compare that
20013 with input section names. Unfortunately we don't. So instead
20014 we use a simple heuristic and look for the nearest executable
20015 section before this one. */
20016 for (i = elf_numsections (obfd); i-- > 0;)
20017 if (oheaders[i] == osection)
20018 break;
20019 if (i == 0)
20020 break;
20021
20022 while (i-- > 0)
20023 if (oheaders[i]->sh_type == SHT_PROGBITS
20024 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
20025 == (SHF_ALLOC | SHF_EXECINSTR))
20026 break;
20027 }
20028
20029 if (i)
20030 {
20031 osection->sh_link = i;
20032 /* If the text section was part of a group
20033 then the index section should be too. */
20034 if (oheaders[i]->sh_flags & SHF_GROUP)
20035 osection->sh_flags |= SHF_GROUP;
20036 return true;
20037 }
20038 }
20039 break;
20040
20041 case SHT_ARM_PREEMPTMAP:
20042 osection->sh_flags = SHF_ALLOC;
20043 break;
20044
20045 case SHT_ARM_ATTRIBUTES:
20046 case SHT_ARM_DEBUGOVERLAY:
20047 case SHT_ARM_OVERLAYSECTION:
20048 default:
20049 break;
20050 }
20051
20052 return false;
20053 }
20054
20055 /* Returns TRUE if NAME is an ARM mapping symbol.
20056 Traditionally the symbols $a, $d and $t have been used.
20057 The ARM ELF standard also defines $x (for A64 code). It also allows a
20058 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
20059 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
20060 not support them here. $t.x indicates the start of ThumbEE instructions. */
20061
20062 static bool
20063 is_arm_mapping_symbol (const char * name)
20064 {
20065 return name != NULL /* Paranoia. */
20066 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
20067 the mapping symbols could have acquired a prefix.
20068 We do not support this here, since such symbols no
20069 longer conform to the ARM ELF ABI. */
20070 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
20071 && (name[2] == 0 || name[2] == '.');
20072 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
20073 any characters that follow the period are legal characters for the body
20074 of a symbol's name. For now we just assume that this is the case. */
20075 }
20076
20077 /* Make sure that mapping symbols in object files are not removed via the
20078 "strip --strip-unneeded" tool. These symbols are needed in order to
20079 correctly generate interworking veneers, and for byte swapping code
20080 regions. Once an object file has been linked, it is safe to remove the
20081 symbols as they will no longer be needed. */
20082
20083 static void
20084 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
20085 {
20086 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
20087 && sym->section != bfd_abs_section_ptr
20088 && is_arm_mapping_symbol (sym->name))
20089 sym->flags |= BSF_KEEP;
20090 }
20091
20092 #undef elf_backend_copy_special_section_fields
20093 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
20094
20095 #define ELF_ARCH bfd_arch_arm
20096 #define ELF_TARGET_ID ARM_ELF_DATA
20097 #define ELF_MACHINE_CODE EM_ARM
20098 #ifdef __QNXTARGET__
20099 #define ELF_MAXPAGESIZE 0x1000
20100 #else
20101 #define ELF_MAXPAGESIZE 0x10000
20102 #endif
20103 #define ELF_MINPAGESIZE 0x1000
20104 #define ELF_COMMONPAGESIZE 0x1000
20105
20106 #define bfd_elf32_mkobject elf32_arm_mkobject
20107
20108 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
20109 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
20110 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
20111 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
20112 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
20113 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
20114 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
20115 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
20116 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
20117 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
20118 #define bfd_elf32_bfd_final_link elf32_arm_final_link
20119 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
20120
20121 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
20122 #define elf_backend_maybe_function_sym elf32_arm_maybe_function_sym
20123 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
20124 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
20125 #define elf_backend_check_relocs elf32_arm_check_relocs
20126 #define elf_backend_update_relocs elf32_arm_update_relocs
20127 #define elf_backend_relocate_section elf32_arm_relocate_section
20128 #define elf_backend_write_section elf32_arm_write_section
20129 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
20130 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
20131 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
20132 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
20133 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
20134 #define elf_backend_always_size_sections elf32_arm_always_size_sections
20135 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
20136 #define elf_backend_init_file_header elf32_arm_init_file_header
20137 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
20138 #define elf_backend_object_p elf32_arm_object_p
20139 #define elf_backend_fake_sections elf32_arm_fake_sections
20140 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
20141 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20142 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
20143 #define elf_backend_size_info elf32_arm_size_info
20144 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20145 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
20146 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
20147 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
20148 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
20149 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
20150 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
20151 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
20152
20153 #define elf_backend_can_refcount 1
20154 #define elf_backend_can_gc_sections 1
20155 #define elf_backend_plt_readonly 1
20156 #define elf_backend_want_got_plt 1
20157 #define elf_backend_want_plt_sym 0
20158 #define elf_backend_want_dynrelro 1
20159 #define elf_backend_may_use_rel_p 1
20160 #define elf_backend_may_use_rela_p 0
20161 #define elf_backend_default_use_rela_p 0
20162 #define elf_backend_dtrel_excludes_plt 1
20163
20164 #define elf_backend_got_header_size 12
20165 #define elf_backend_extern_protected_data 1
20166
20167 #undef elf_backend_obj_attrs_vendor
20168 #define elf_backend_obj_attrs_vendor "aeabi"
20169 #undef elf_backend_obj_attrs_section
20170 #define elf_backend_obj_attrs_section ".ARM.attributes"
20171 #undef elf_backend_obj_attrs_arg_type
20172 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
20173 #undef elf_backend_obj_attrs_section_type
20174 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
20175 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
20176 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
20177
20178 #undef elf_backend_section_flags
20179 #define elf_backend_section_flags elf32_arm_section_flags
20180 #undef elf_backend_lookup_section_flags_hook
20181 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20182
20183 #define elf_backend_linux_prpsinfo32_ugid16 true
20184
20185 #include "elf32-target.h"
20186
20187 /* Native Client targets. */
20188
20189 #undef TARGET_LITTLE_SYM
20190 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
20191 #undef TARGET_LITTLE_NAME
20192 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
20193 #undef TARGET_BIG_SYM
20194 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
20195 #undef TARGET_BIG_NAME
20196 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
20197
20198 /* Like elf32_arm_link_hash_table_create -- but overrides
20199 appropriately for NaCl. */
20200
20201 static struct bfd_link_hash_table *
20202 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
20203 {
20204 struct bfd_link_hash_table *ret;
20205
20206 ret = elf32_arm_link_hash_table_create (abfd);
20207 if (ret)
20208 {
20209 struct elf32_arm_link_hash_table *htab
20210 = (struct elf32_arm_link_hash_table *) ret;
20211
20212 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
20213 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
20214 }
20215 return ret;
20216 }
20217
20218 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
20219 really need to use elf32_arm_modify_segment_map. But we do it
20220 anyway just to reduce gratuitous differences with the stock ARM backend. */
20221
20222 static bool
20223 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
20224 {
20225 return (elf32_arm_modify_segment_map (abfd, info)
20226 && nacl_modify_segment_map (abfd, info));
20227 }
20228
20229 static bool
20230 elf32_arm_nacl_final_write_processing (bfd *abfd)
20231 {
20232 arm_final_write_processing (abfd);
20233 return nacl_final_write_processing (abfd);
20234 }
20235
20236 static bfd_vma
20237 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
20238 const arelent *rel ATTRIBUTE_UNUSED)
20239 {
20240 return plt->vma
20241 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
20242 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
20243 }
20244
20245 #undef elf32_bed
20246 #define elf32_bed elf32_arm_nacl_bed
20247 #undef bfd_elf32_bfd_link_hash_table_create
20248 #define bfd_elf32_bfd_link_hash_table_create \
20249 elf32_arm_nacl_link_hash_table_create
20250 #undef elf_backend_plt_alignment
20251 #define elf_backend_plt_alignment 4
20252 #undef elf_backend_modify_segment_map
20253 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
20254 #undef elf_backend_modify_headers
20255 #define elf_backend_modify_headers nacl_modify_headers
20256 #undef elf_backend_final_write_processing
20257 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
20258 #undef bfd_elf32_get_synthetic_symtab
20259 #undef elf_backend_plt_sym_val
20260 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
20261 #undef elf_backend_copy_special_section_fields
20262
20263 #undef ELF_MINPAGESIZE
20264 #undef ELF_COMMONPAGESIZE
20265
20266 #undef ELF_TARGET_OS
20267 #define ELF_TARGET_OS is_nacl
20268
20269 #include "elf32-target.h"
20270
20271 /* Reset to defaults. */
20272 #undef elf_backend_plt_alignment
20273 #undef elf_backend_modify_segment_map
20274 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20275 #undef elf_backend_modify_headers
20276 #undef elf_backend_final_write_processing
20277 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20278 #undef ELF_MINPAGESIZE
20279 #define ELF_MINPAGESIZE 0x1000
20280 #undef ELF_COMMONPAGESIZE
20281 #define ELF_COMMONPAGESIZE 0x1000
20282
20283
20284 /* FDPIC Targets. */
20285
20286 #undef TARGET_LITTLE_SYM
20287 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
20288 #undef TARGET_LITTLE_NAME
20289 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
20290 #undef TARGET_BIG_SYM
20291 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
20292 #undef TARGET_BIG_NAME
20293 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
20294 #undef elf_match_priority
20295 #define elf_match_priority 128
20296 #undef ELF_OSABI
20297 #define ELF_OSABI ELFOSABI_ARM_FDPIC
20298
20299 /* Like elf32_arm_link_hash_table_create -- but overrides
20300 appropriately for FDPIC. */
20301
20302 static struct bfd_link_hash_table *
20303 elf32_arm_fdpic_link_hash_table_create (bfd *abfd)
20304 {
20305 struct bfd_link_hash_table *ret;
20306
20307 ret = elf32_arm_link_hash_table_create (abfd);
20308 if (ret)
20309 {
20310 struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret;
20311
20312 htab->fdpic_p = 1;
20313 }
20314 return ret;
20315 }
20316
20317 /* We need dynamic symbols for every section, since segments can
20318 relocate independently. */
20319 static bool
20320 elf32_arm_fdpic_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED,
20321 struct bfd_link_info *info
20322 ATTRIBUTE_UNUSED,
20323 asection *p ATTRIBUTE_UNUSED)
20324 {
20325 switch (elf_section_data (p)->this_hdr.sh_type)
20326 {
20327 case SHT_PROGBITS:
20328 case SHT_NOBITS:
20329 /* If sh_type is yet undecided, assume it could be
20330 SHT_PROGBITS/SHT_NOBITS. */
20331 case SHT_NULL:
20332 return false;
20333
20334 /* There shouldn't be section relative relocations
20335 against any other section. */
20336 default:
20337 return true;
20338 }
20339 }
20340
20341 #undef elf32_bed
20342 #define elf32_bed elf32_arm_fdpic_bed
20343
20344 #undef bfd_elf32_bfd_link_hash_table_create
20345 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
20346
20347 #undef elf_backend_omit_section_dynsym
20348 #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym
20349
20350 #undef ELF_TARGET_OS
20351
20352 #include "elf32-target.h"
20353
20354 #undef elf_match_priority
20355 #undef ELF_OSABI
20356 #undef elf_backend_omit_section_dynsym
20357
20358 /* VxWorks Targets. */
20359
20360 #undef TARGET_LITTLE_SYM
20361 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
20362 #undef TARGET_LITTLE_NAME
20363 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
20364 #undef TARGET_BIG_SYM
20365 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
20366 #undef TARGET_BIG_NAME
20367 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
20368
20369 /* Like elf32_arm_link_hash_table_create -- but overrides
20370 appropriately for VxWorks. */
20371
20372 static struct bfd_link_hash_table *
20373 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
20374 {
20375 struct bfd_link_hash_table *ret;
20376
20377 ret = elf32_arm_link_hash_table_create (abfd);
20378 if (ret)
20379 {
20380 struct elf32_arm_link_hash_table *htab
20381 = (struct elf32_arm_link_hash_table *) ret;
20382 htab->use_rel = 0;
20383 }
20384 return ret;
20385 }
20386
20387 static bool
20388 elf32_arm_vxworks_final_write_processing (bfd *abfd)
20389 {
20390 arm_final_write_processing (abfd);
20391 return elf_vxworks_final_write_processing (abfd);
20392 }
20393
20394 #undef elf32_bed
20395 #define elf32_bed elf32_arm_vxworks_bed
20396
20397 #undef bfd_elf32_bfd_link_hash_table_create
20398 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
20399 #undef elf_backend_final_write_processing
20400 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
20401 #undef elf_backend_emit_relocs
20402 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
20403
20404 #undef elf_backend_may_use_rel_p
20405 #define elf_backend_may_use_rel_p 0
20406 #undef elf_backend_may_use_rela_p
20407 #define elf_backend_may_use_rela_p 1
20408 #undef elf_backend_default_use_rela_p
20409 #define elf_backend_default_use_rela_p 1
20410 #undef elf_backend_want_plt_sym
20411 #define elf_backend_want_plt_sym 1
20412 #undef ELF_MAXPAGESIZE
20413 #define ELF_MAXPAGESIZE 0x1000
20414 #undef ELF_TARGET_OS
20415 #define ELF_TARGET_OS is_vxworks
20416
20417 #include "elf32-target.h"
20418
20419
20420 /* Merge backend specific data from an object file to the output
20421 object file when linking. */
20422
20423 static bool
20424 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
20425 {
20426 bfd *obfd = info->output_bfd;
20427 flagword out_flags;
20428 flagword in_flags;
20429 bool flags_compatible = true;
20430 asection *sec;
20431
20432 /* Check if we have the same endianness. */
20433 if (! _bfd_generic_verify_endian_match (ibfd, info))
20434 return false;
20435
20436 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
20437 return true;
20438
20439 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
20440 return false;
20441
20442 /* The input BFD must have had its flags initialised. */
20443 /* The following seems bogus to me -- The flags are initialized in
20444 the assembler but I don't think an elf_flags_init field is
20445 written into the object. */
20446 /* BFD_ASSERT (elf_flags_init (ibfd)); */
20447
20448 in_flags = elf_elfheader (ibfd)->e_flags;
20449 out_flags = elf_elfheader (obfd)->e_flags;
20450
20451 /* In theory there is no reason why we couldn't handle this. However
20452 in practice it isn't even close to working and there is no real
20453 reason to want it. */
20454 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
20455 && !(ibfd->flags & DYNAMIC)
20456 && (in_flags & EF_ARM_BE8))
20457 {
20458 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20459 ibfd);
20460 return false;
20461 }
20462
20463 if (!elf_flags_init (obfd))
20464 {
20465 /* If the input is the default architecture and had the default
20466 flags then do not bother setting the flags for the output
20467 architecture, instead allow future merges to do this. If no
20468 future merges ever set these flags then they will retain their
20469 uninitialised values, which surprise surprise, correspond
20470 to the default values. */
20471 if (bfd_get_arch_info (ibfd)->the_default
20472 && elf_elfheader (ibfd)->e_flags == 0)
20473 return true;
20474
20475 elf_flags_init (obfd) = true;
20476 elf_elfheader (obfd)->e_flags = in_flags;
20477
20478 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
20479 && bfd_get_arch_info (obfd)->the_default)
20480 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
20481
20482 return true;
20483 }
20484
20485 /* Determine what should happen if the input ARM architecture
20486 does not match the output ARM architecture. */
20487 if (! bfd_arm_merge_machines (ibfd, obfd))
20488 return false;
20489
20490 /* Identical flags must be compatible. */
20491 if (in_flags == out_flags)
20492 return true;
20493
20494 /* Check to see if the input BFD actually contains any sections. If
20495 not, its flags may not have been initialised either, but it
20496 cannot actually cause any incompatiblity. Do not short-circuit
20497 dynamic objects; their section list may be emptied by
20498 elf_link_add_object_symbols.
20499
20500 Also check to see if there are no code sections in the input.
20501 In this case there is no need to check for code specific flags.
20502 XXX - do we need to worry about floating-point format compatability
20503 in data sections ? */
20504 if (!(ibfd->flags & DYNAMIC))
20505 {
20506 bool null_input_bfd = true;
20507 bool only_data_sections = true;
20508
20509 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
20510 {
20511 /* Ignore synthetic glue sections. */
20512 if (strcmp (sec->name, ".glue_7")
20513 && strcmp (sec->name, ".glue_7t"))
20514 {
20515 if ((bfd_section_flags (sec)
20516 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20517 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20518 only_data_sections = false;
20519
20520 null_input_bfd = false;
20521 break;
20522 }
20523 }
20524
20525 if (null_input_bfd || only_data_sections)
20526 return true;
20527 }
20528
20529 /* Complain about various flag mismatches. */
20530 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
20531 EF_ARM_EABI_VERSION (out_flags)))
20532 {
20533 _bfd_error_handler
20534 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20535 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
20536 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
20537 return false;
20538 }
20539
20540 /* Not sure what needs to be checked for EABI versions >= 1. */
20541 /* VxWorks libraries do not use these flags. */
20542 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
20543 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
20544 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
20545 {
20546 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
20547 {
20548 _bfd_error_handler
20549 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20550 ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
20551 obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
20552 flags_compatible = false;
20553 }
20554
20555 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
20556 {
20557 if (in_flags & EF_ARM_APCS_FLOAT)
20558 _bfd_error_handler
20559 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20560 ibfd, obfd);
20561 else
20562 _bfd_error_handler
20563 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20564 ibfd, obfd);
20565
20566 flags_compatible = false;
20567 }
20568
20569 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
20570 {
20571 if (in_flags & EF_ARM_VFP_FLOAT)
20572 _bfd_error_handler
20573 (_("error: %pB uses %s instructions, whereas %pB does not"),
20574 ibfd, "VFP", obfd);
20575 else
20576 _bfd_error_handler
20577 (_("error: %pB uses %s instructions, whereas %pB does not"),
20578 ibfd, "FPA", obfd);
20579
20580 flags_compatible = false;
20581 }
20582
20583 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
20584 {
20585 if (in_flags & EF_ARM_MAVERICK_FLOAT)
20586 _bfd_error_handler
20587 (_("error: %pB uses %s instructions, whereas %pB does not"),
20588 ibfd, "Maverick", obfd);
20589 else
20590 _bfd_error_handler
20591 (_("error: %pB does not use %s instructions, whereas %pB does"),
20592 ibfd, "Maverick", obfd);
20593
20594 flags_compatible = false;
20595 }
20596
20597 #ifdef EF_ARM_SOFT_FLOAT
20598 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
20599 {
20600 /* We can allow interworking between code that is VFP format
20601 layout, and uses either soft float or integer regs for
20602 passing floating point arguments and results. We already
20603 know that the APCS_FLOAT flags match; similarly for VFP
20604 flags. */
20605 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
20606 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
20607 {
20608 if (in_flags & EF_ARM_SOFT_FLOAT)
20609 _bfd_error_handler
20610 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20611 ibfd, obfd);
20612 else
20613 _bfd_error_handler
20614 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20615 ibfd, obfd);
20616
20617 flags_compatible = false;
20618 }
20619 }
20620 #endif
20621
20622 /* Interworking mismatch is only a warning. */
20623 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
20624 {
20625 if (in_flags & EF_ARM_INTERWORK)
20626 {
20627 _bfd_error_handler
20628 (_("warning: %pB supports interworking, whereas %pB does not"),
20629 ibfd, obfd);
20630 }
20631 else
20632 {
20633 _bfd_error_handler
20634 (_("warning: %pB does not support interworking, whereas %pB does"),
20635 ibfd, obfd);
20636 }
20637 }
20638 }
20639
20640 return flags_compatible;
20641 }
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