]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - bfd/elf32-rl78.c
projects / thirdparty / binutils-gdb.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Return void from linker callbacks
[thirdparty/binutils-gdb.git] / bfd / elf32-rl78.c
1 /* Renesas RL78 specific support for 32-bit ELF.
2 Copyright (C) 2011-2016 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20 #include "sysdep.h"
21 #include "bfd.h"
22 #include "bfd_stdint.h"
23 #include "libbfd.h"
24 #include "elf-bfd.h"
25 #include "elf/rl78.h"
26 #include "libiberty.h"
27
28 #define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000)
29
30 #define RL78REL(n,sz,bit,shift,complain,pcrel) \
31 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
32 bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
33
34 static bfd_reloc_status_type rl78_special_reloc (bfd *, arelent *, asymbol *, void *,
35 asection *, bfd *, char **);
36
37 /* FIXME: We could omit the SHIFT parameter, it is always zero. */
38 #define RL78_OP_REL(n,sz,bit,shift,complain,pcrel) \
39 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
40 rl78_special_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
41
42 /* Note that the relocations around 0x7f are internal to this file;
43 feel free to move them as needed to avoid conflicts with published
44 relocation numbers. */
45
46 static reloc_howto_type rl78_elf_howto_table [] =
47 {
48 RL78REL (NONE, 3, 0, 0, dont, FALSE),
49 RL78REL (DIR32, 2, 32, 0, signed, FALSE),
50 RL78REL (DIR24S, 2, 24, 0, signed, FALSE),
51 RL78REL (DIR16, 1, 16, 0, dont, FALSE),
52 RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE),
53 RL78REL (DIR16S, 1, 16, 0, signed, FALSE),
54 RL78REL (DIR8, 0, 8, 0, dont, FALSE),
55 RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE),
56 RL78REL (DIR8S, 0, 8, 0, signed, FALSE),
57 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
58 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
59 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
60 RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE),
61 RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE),
62 RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE),
63 RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE),
64 RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE),
65 RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE),
66 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
67
68 EMPTY_HOWTO (0x13),
69 EMPTY_HOWTO (0x14),
70 EMPTY_HOWTO (0x15),
71 EMPTY_HOWTO (0x16),
72 EMPTY_HOWTO (0x17),
73 EMPTY_HOWTO (0x18),
74 EMPTY_HOWTO (0x19),
75 EMPTY_HOWTO (0x1a),
76 EMPTY_HOWTO (0x1b),
77 EMPTY_HOWTO (0x1c),
78 EMPTY_HOWTO (0x1d),
79 EMPTY_HOWTO (0x1e),
80 EMPTY_HOWTO (0x1f),
81
82 EMPTY_HOWTO (0x20),
83 EMPTY_HOWTO (0x21),
84 EMPTY_HOWTO (0x22),
85 EMPTY_HOWTO (0x23),
86 EMPTY_HOWTO (0x24),
87 EMPTY_HOWTO (0x25),
88 EMPTY_HOWTO (0x26),
89 EMPTY_HOWTO (0x27),
90 EMPTY_HOWTO (0x28),
91 EMPTY_HOWTO (0x29),
92 EMPTY_HOWTO (0x2a),
93 EMPTY_HOWTO (0x2b),
94 EMPTY_HOWTO (0x2c),
95 RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE),
96
97 EMPTY_HOWTO (0x2e),
98 RL78REL (RH_SADDR, 0, 0, 0, dont, FALSE),
99 EMPTY_HOWTO (0x30),
100 EMPTY_HOWTO (0x31),
101 EMPTY_HOWTO (0x32),
102 EMPTY_HOWTO (0x33),
103 EMPTY_HOWTO (0x34),
104 EMPTY_HOWTO (0x35),
105 EMPTY_HOWTO (0x36),
106 EMPTY_HOWTO (0x37),
107 EMPTY_HOWTO (0x38),
108 EMPTY_HOWTO (0x39),
109 EMPTY_HOWTO (0x3a),
110 EMPTY_HOWTO (0x3b),
111 EMPTY_HOWTO (0x3c),
112 EMPTY_HOWTO (0x3d),
113 EMPTY_HOWTO (0x3e),
114 EMPTY_HOWTO (0x3f),
115 EMPTY_HOWTO (0x40),
116
117 RL78_OP_REL (ABS32, 2, 32, 0, dont, FALSE),
118 RL78_OP_REL (ABS24S, 2, 24, 0, signed, FALSE),
119 RL78_OP_REL (ABS16, 1, 16, 0, dont, FALSE),
120 RL78_OP_REL (ABS16U, 1, 16, 0, unsigned, FALSE),
121 RL78_OP_REL (ABS16S, 1, 16, 0, signed, FALSE),
122 RL78_OP_REL (ABS8, 0, 8, 0, dont, FALSE),
123 RL78_OP_REL (ABS8U, 0, 8, 0, unsigned, FALSE),
124 RL78_OP_REL (ABS8S, 0, 8, 0, signed, FALSE),
125 RL78_OP_REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
126 RL78_OP_REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
127 RL78_OP_REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
128 RL78_OP_REL (ABS16UL, 1, 16, 0, unsigned, FALSE),
129 RL78_OP_REL (ABS16UW, 1, 16, 0, unsigned, FALSE),
130 RL78_OP_REL (ABS8UL, 0, 8, 0, unsigned, FALSE),
131 RL78_OP_REL (ABS8UW, 0, 8, 0, unsigned, FALSE),
132 RL78_OP_REL (ABS32_REV, 2, 32, 0, dont, FALSE),
133 RL78_OP_REL (ABS16_REV, 1, 16, 0, dont, FALSE),
134
135 #define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32)
136
137 EMPTY_HOWTO (0x52),
138 EMPTY_HOWTO (0x53),
139 EMPTY_HOWTO (0x54),
140 EMPTY_HOWTO (0x55),
141 EMPTY_HOWTO (0x56),
142 EMPTY_HOWTO (0x57),
143 EMPTY_HOWTO (0x58),
144 EMPTY_HOWTO (0x59),
145 EMPTY_HOWTO (0x5a),
146 EMPTY_HOWTO (0x5b),
147 EMPTY_HOWTO (0x5c),
148 EMPTY_HOWTO (0x5d),
149 EMPTY_HOWTO (0x5e),
150 EMPTY_HOWTO (0x5f),
151 EMPTY_HOWTO (0x60),
152 EMPTY_HOWTO (0x61),
153 EMPTY_HOWTO (0x62),
154 EMPTY_HOWTO (0x63),
155 EMPTY_HOWTO (0x64),
156 EMPTY_HOWTO (0x65),
157 EMPTY_HOWTO (0x66),
158 EMPTY_HOWTO (0x67),
159 EMPTY_HOWTO (0x68),
160 EMPTY_HOWTO (0x69),
161 EMPTY_HOWTO (0x6a),
162 EMPTY_HOWTO (0x6b),
163 EMPTY_HOWTO (0x6c),
164 EMPTY_HOWTO (0x6d),
165 EMPTY_HOWTO (0x6e),
166 EMPTY_HOWTO (0x6f),
167 EMPTY_HOWTO (0x70),
168 EMPTY_HOWTO (0x71),
169 EMPTY_HOWTO (0x72),
170 EMPTY_HOWTO (0x73),
171 EMPTY_HOWTO (0x74),
172 EMPTY_HOWTO (0x75),
173 EMPTY_HOWTO (0x76),
174 EMPTY_HOWTO (0x77),
175
176 EMPTY_HOWTO (0x78),
177 EMPTY_HOWTO (0x79),
178 EMPTY_HOWTO (0x7a),
179 EMPTY_HOWTO (0x7b),
180 EMPTY_HOWTO (0x7c),
181 EMPTY_HOWTO (0x7d),
182 EMPTY_HOWTO (0x7e),
183 EMPTY_HOWTO (0x7f),
184
185 RL78_OP_REL (SYM, 2, 32, 0, dont, FALSE),
186 RL78_OP_REL (OPneg, 2, 32, 0, dont, FALSE),
187 RL78_OP_REL (OPadd, 2, 32, 0, dont, FALSE),
188 RL78_OP_REL (OPsub, 2, 32, 0, dont, FALSE),
189 RL78_OP_REL (OPmul, 2, 32, 0, dont, FALSE),
190 RL78_OP_REL (OPdiv, 2, 32, 0, dont, FALSE),
191 RL78_OP_REL (OPshla, 2, 32, 0, dont, FALSE),
192 RL78_OP_REL (OPshra, 2, 32, 0, dont, FALSE),
193 RL78_OP_REL (OPsctsize, 2, 32, 0, dont, FALSE),
194 EMPTY_HOWTO (0x89),
195 EMPTY_HOWTO (0x8a),
196 EMPTY_HOWTO (0x8b),
197 EMPTY_HOWTO (0x8c),
198 RL78_OP_REL (OPscttop, 2, 32, 0, dont, FALSE),
199 EMPTY_HOWTO (0x8e),
200 EMPTY_HOWTO (0x8f),
201 RL78_OP_REL (OPand, 2, 32, 0, dont, FALSE),
202 RL78_OP_REL (OPor, 2, 32, 0, dont, FALSE),
203 RL78_OP_REL (OPxor, 2, 32, 0, dont, FALSE),
204 RL78_OP_REL (OPnot, 2, 32, 0, dont, FALSE),
205 RL78_OP_REL (OPmod, 2, 32, 0, dont, FALSE),
206 RL78_OP_REL (OPromtop, 2, 32, 0, dont, FALSE),
207 RL78_OP_REL (OPramtop, 2, 32, 0, dont, FALSE)
208 };
209 \f
210 /* Map BFD reloc types to RL78 ELF reloc types. */
211
212 struct rl78_reloc_map
213 {
214 bfd_reloc_code_real_type bfd_reloc_val;
215 unsigned int rl78_reloc_val;
216 };
217
218 static const struct rl78_reloc_map rl78_reloc_map [] =
219 {
220 { BFD_RELOC_NONE, R_RL78_NONE },
221 { BFD_RELOC_8, R_RL78_DIR8S },
222 { BFD_RELOC_16, R_RL78_DIR16S },
223 { BFD_RELOC_24, R_RL78_DIR24S },
224 { BFD_RELOC_32, R_RL78_DIR32 },
225 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 },
226 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL },
227 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL },
228 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL },
229 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL },
230 { BFD_RELOC_RL78_8U, R_RL78_DIR8U },
231 { BFD_RELOC_RL78_16U, R_RL78_DIR16U },
232 { BFD_RELOC_RL78_SYM, R_RL78_SYM },
233 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub },
234 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg },
235 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand },
236 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra },
237 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 },
238 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 },
239 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV },
240 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 },
241 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV },
242 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL },
243 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW },
244 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U },
245 { BFD_RELOC_RL78_SADDR, R_RL78_RH_SADDR },
246 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX }
247 };
248
249 static reloc_howto_type *
250 rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
251 bfd_reloc_code_real_type code)
252 {
253 unsigned int i;
254
255 if (code == BFD_RELOC_RL78_32_OP)
256 return rl78_elf_howto_table + R_RL78_DIR32;
257
258 for (i = ARRAY_SIZE (rl78_reloc_map); i--;)
259 if (rl78_reloc_map [i].bfd_reloc_val == code)
260 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val;
261
262 return NULL;
263 }
264
265 static reloc_howto_type *
266 rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
267 {
268 unsigned int i;
269
270 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++)
271 if (rl78_elf_howto_table[i].name != NULL
272 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0)
273 return rl78_elf_howto_table + i;
274
275 return NULL;
276 }
277
278 /* Set the howto pointer for an RL78 ELF reloc. */
279
280 static void
281 rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
282 arelent * cache_ptr,
283 Elf_Internal_Rela * dst)
284 {
285 unsigned int r_type;
286
287 r_type = ELF32_R_TYPE (dst->r_info);
288 if (r_type >= (unsigned int) R_RL78_max)
289 {
290 _bfd_error_handler (_("%B: invalid RL78 reloc number: %d"), abfd, r_type);
291 r_type = 0;
292 }
293 cache_ptr->howto = rl78_elf_howto_table + r_type;
294 }
295 \f
296 static bfd_vma
297 get_symbol_value (const char * name,
298 struct bfd_link_info * info,
299 bfd * input_bfd,
300 asection * input_section,
301 int offset)
302 {
303 struct bfd_link_hash_entry * h;
304
305 if (info == NULL)
306 return 0;
307
308 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
309
310 if (h == NULL
311 || (h->type != bfd_link_hash_defined
312 && h->type != bfd_link_hash_defweak))
313 {
314 (*info->callbacks->undefined_symbol)
315 (info, name, input_bfd, input_section, offset, TRUE);
316 return 0;
317 }
318
319 return (h->u.def.value
320 + h->u.def.section->output_section->vma
321 + h->u.def.section->output_offset);
322 }
323
324 static bfd_vma
325 get_romstart (struct bfd_link_info * info,
326 bfd * abfd,
327 asection * sec,
328 int offset)
329 {
330 static bfd_boolean cached = FALSE;
331 static bfd_vma cached_value = 0;
332
333 if (!cached)
334 {
335 cached_value = get_symbol_value ("_start", info, abfd, sec, offset);
336 cached = TRUE;
337 }
338 return cached_value;
339 }
340
341 static bfd_vma
342 get_ramstart (struct bfd_link_info * info,
343 bfd * abfd,
344 asection * sec,
345 int offset)
346 {
347 static bfd_boolean cached = FALSE;
348 static bfd_vma cached_value = 0;
349
350 if (!cached)
351 {
352 cached_value = get_symbol_value ("__datastart", info, abfd, sec, offset);
353 cached = TRUE;
354 }
355 return cached_value;
356 }
357
358 #define NUM_STACK_ENTRIES 16
359 static int32_t rl78_stack [ NUM_STACK_ENTRIES ];
360 static unsigned int rl78_stack_top;
361
362 #define RL78_STACK_PUSH(val) \
363 do \
364 { \
365 if (rl78_stack_top < NUM_STACK_ENTRIES) \
366 rl78_stack [rl78_stack_top ++] = (val); \
367 else \
368 _bfd_error_handler (_("Internal Error: RL78 reloc stack overflow")); \
369 } \
370 while (0)
371
372 #define RL78_STACK_POP(dest) \
373 do \
374 { \
375 if (rl78_stack_top > 0) \
376 (dest) = rl78_stack [-- rl78_stack_top];\
377 else \
378 { \
379 _bfd_error_handler (_("Internal Error: RL78 reloc stack underflow")); \
380 (dest) = 0; \
381 } \
382 } \
383 while (0)
384
385 /* Special handling for RL78 complex relocs. Returns the
386 value of the reloc, or 0 for relocs which do not generate
387 a result. SYMVAL is the value of the symbol for relocs
388 which use a symbolic argument. */
389
390 static bfd_vma
391 rl78_compute_complex_reloc (unsigned long r_type,
392 bfd_vma symval,
393 asection * input_section)
394 {
395 int32_t tmp1, tmp2;
396 bfd_vma relocation;
397
398 switch (r_type)
399 {
400 default:
401 return 0;
402
403 case R_RL78_ABS24S_PCREL:
404 case R_RL78_ABS16S_PCREL:
405 case R_RL78_ABS8S_PCREL:
406 RL78_STACK_POP (relocation);
407 relocation -= input_section->output_section->vma + input_section->output_offset;
408 return relocation;
409
410 case R_RL78_ABS32:
411 case R_RL78_ABS32_REV:
412 case R_RL78_ABS16:
413 case R_RL78_ABS16_REV:
414 case R_RL78_ABS16S:
415 case R_RL78_ABS16U:
416 case R_RL78_ABS8:
417 case R_RL78_ABS8U:
418 case R_RL78_ABS8S:
419 RL78_STACK_POP (relocation);
420 return relocation;
421
422 case R_RL78_ABS16UL:
423 case R_RL78_ABS8UL:
424 RL78_STACK_POP (relocation);
425 return relocation >> 2;
426
427 case R_RL78_ABS16UW:
428 case R_RL78_ABS8UW:
429 RL78_STACK_POP (relocation);
430 return relocation >> 1;
431
432 /* The rest of the relocs compute values and then push them onto the stack. */
433 case R_RL78_OPramtop:
434 case R_RL78_OPromtop:
435 case R_RL78_SYM:
436 RL78_STACK_PUSH (symval);
437 return 0;
438
439 case R_RL78_OPneg:
440 RL78_STACK_POP (tmp1);
441 tmp1 = - tmp1;
442 RL78_STACK_PUSH (tmp1);
443 return 0;
444
445 case R_RL78_OPadd:
446 RL78_STACK_POP (tmp2);
447 RL78_STACK_POP (tmp1);
448 tmp1 += tmp2;
449 RL78_STACK_PUSH (tmp1);
450 return 0;
451
452 case R_RL78_OPsub:
453 /* For the expression "A - B", the assembler pushes A,
454 then B, then OPSUB. So the first op we pop is B, not A. */
455 RL78_STACK_POP (tmp2); /* B */
456 RL78_STACK_POP (tmp1); /* A */
457 tmp1 -= tmp2; /* A - B */
458 RL78_STACK_PUSH (tmp1);
459 return 0;
460
461 case R_RL78_OPmul:
462 RL78_STACK_POP (tmp2);
463 RL78_STACK_POP (tmp1);
464 tmp1 *= tmp2;
465 RL78_STACK_PUSH (tmp1);
466 return 0;
467
468 case R_RL78_OPdiv:
469 RL78_STACK_POP (tmp2);
470 RL78_STACK_POP (tmp1);
471 tmp1 /= tmp2;
472 RL78_STACK_PUSH (tmp1);
473 return 0;
474
475 case R_RL78_OPshla:
476 RL78_STACK_POP (tmp2);
477 RL78_STACK_POP (tmp1);
478 tmp1 <<= tmp2;
479 RL78_STACK_PUSH (tmp1);
480 return 0;
481
482 case R_RL78_OPshra:
483 RL78_STACK_POP (tmp2);
484 RL78_STACK_POP (tmp1);
485 tmp1 >>= tmp2;
486 RL78_STACK_PUSH (tmp1);
487 return 0;
488
489 case R_RL78_OPsctsize:
490 RL78_STACK_PUSH (input_section->size);
491 return 0;
492
493 case R_RL78_OPscttop:
494 RL78_STACK_PUSH (input_section->output_section->vma);
495 return 0;
496
497 case R_RL78_OPand:
498 RL78_STACK_POP (tmp2);
499 RL78_STACK_POP (tmp1);
500 tmp1 &= tmp2;
501 RL78_STACK_PUSH (tmp1);
502 return 0;
503
504 case R_RL78_OPor:
505 RL78_STACK_POP (tmp2);
506 RL78_STACK_POP (tmp1);
507 tmp1 |= tmp2;
508 RL78_STACK_PUSH (tmp1);
509 return 0;
510
511 case R_RL78_OPxor:
512 RL78_STACK_POP (tmp2);
513 RL78_STACK_POP (tmp1);
514 tmp1 ^= tmp2;
515 RL78_STACK_PUSH (tmp1);
516 return 0;
517
518 case R_RL78_OPnot:
519 RL78_STACK_POP (tmp1);
520 tmp1 = ~ tmp1;
521 RL78_STACK_PUSH (tmp1);
522 return 0;
523
524 case R_RL78_OPmod:
525 RL78_STACK_POP (tmp2);
526 RL78_STACK_POP (tmp1);
527 tmp1 %= tmp2;
528 RL78_STACK_PUSH (tmp1);
529 return 0;
530 }
531 }
532
533 #undef RL78_STACK_PUSH
534 #undef RL78_STACK_POP
535
536 #define OP(i) (contents[reloc->address + (i)])
537
538 static bfd_reloc_status_type
539 rl78_special_reloc (bfd * input_bfd,
540 arelent * reloc,
541 asymbol * symbol,
542 void * data,
543 asection * input_section,
544 bfd * output_bfd ATTRIBUTE_UNUSED,
545 char ** error_message ATTRIBUTE_UNUSED)
546 {
547 bfd_reloc_status_type r = bfd_reloc_ok;
548 bfd_vma relocation = 0;
549 unsigned long r_type = reloc->howto->type;
550 bfd_byte * contents = data;
551
552 /* If necessary, compute the symbolic value of the relocation. */
553 switch (r_type)
554 {
555 case R_RL78_SYM:
556 relocation = (symbol->value
557 + symbol->section->output_section->vma
558 + symbol->section->output_offset
559 + reloc->addend);
560 break;
561
562 case R_RL78_OPromtop:
563 relocation = get_romstart (NULL, input_bfd, input_section,
564 reloc->address);
565 break;
566
567 case R_RL78_OPramtop:
568 relocation = get_ramstart (NULL, input_bfd, input_section,
569 reloc->address);
570 break;
571 }
572
573 /* Get the value of the relocation. */
574 relocation = rl78_compute_complex_reloc (r_type, relocation, input_section);
575
576 /* If the relocation alters the contents of the section then apply it now.
577 Note - since this function is called from
578 bfd_generic_get_relocated_section_contents via bfd_perform_relocation,
579 and not from the linker, we do not perform any range checking. The
580 clients who are calling us are only interested in some relocated section
581 contents, and not any linkage problems that might occur later. */
582 switch (r_type)
583 {
584 case R_RL78_ABS32:
585 OP (0) = relocation;
586 OP (1) = relocation >> 8;
587 OP (2) = relocation >> 16;
588 OP (3) = relocation >> 24;
589 break;
590
591 case R_RL78_ABS32_REV:
592 OP (3) = relocation;
593 OP (2) = relocation >> 8;
594 OP (1) = relocation >> 16;
595 OP (0) = relocation >> 24;
596 break;
597
598 case R_RL78_ABS24S_PCREL:
599 case R_RL78_ABS24S:
600 OP (0) = relocation;
601 OP (1) = relocation >> 8;
602 OP (2) = relocation >> 16;
603 break;
604
605 case R_RL78_ABS16_REV:
606 OP (1) = relocation;
607 OP (0) = relocation >> 8;
608 break;
609
610 case R_RL78_ABS16S_PCREL:
611 case R_RL78_ABS16:
612 case R_RL78_ABS16S:
613 case R_RL78_ABS16U:
614 case R_RL78_ABS16UL:
615 case R_RL78_ABS16UW:
616 OP (0) = relocation;
617 OP (1) = relocation >> 8;
618 break;
619
620 case R_RL78_ABS8S_PCREL:
621 case R_RL78_ABS8:
622 case R_RL78_ABS8U:
623 case R_RL78_ABS8UL:
624 case R_RL78_ABS8UW:
625 case R_RL78_ABS8S:
626 OP (0) = relocation;
627 break;
628
629 default:
630 break;
631 }
632
633 return r;
634 }
635
636 #undef OP
637 #define OP(i) (contents[rel->r_offset + (i)])
638
639 /* Relocate an RL78 ELF section.
640 There is some attempt to make this function usable for many architectures,
641 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
642 if only to serve as a learning tool.
643
644 The RELOCATE_SECTION function is called by the new ELF backend linker
645 to handle the relocations for a section.
646
647 The relocs are always passed as Rela structures; if the section
648 actually uses Rel structures, the r_addend field will always be
649 zero.
650
651 This function is responsible for adjusting the section contents as
652 necessary, and (if using Rela relocs and generating a relocatable
653 output file) adjusting the reloc addend as necessary.
654
655 This function does not have to worry about setting the reloc
656 address or the reloc symbol index.
657
658 LOCAL_SYMS is a pointer to the swapped in local symbols.
659
660 LOCAL_SECTIONS is an array giving the section in the input file
661 corresponding to the st_shndx field of each local symbol.
662
663 The global hash table entry for the global symbols can be found
664 via elf_sym_hashes (input_bfd).
665
666 When generating relocatable output, this function must handle
667 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
668 going to be the section symbol corresponding to the output
669 section, which means that the addend must be adjusted
670 accordingly. */
671
672 static bfd_boolean
673 rl78_elf_relocate_section
674 (bfd * output_bfd,
675 struct bfd_link_info * info,
676 bfd * input_bfd,
677 asection * input_section,
678 bfd_byte * contents,
679 Elf_Internal_Rela * relocs,
680 Elf_Internal_Sym * local_syms,
681 asection ** local_sections)
682 {
683 Elf_Internal_Shdr * symtab_hdr;
684 struct elf_link_hash_entry ** sym_hashes;
685 Elf_Internal_Rela * rel;
686 Elf_Internal_Rela * relend;
687 bfd *dynobj;
688 asection *splt;
689
690 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
691 sym_hashes = elf_sym_hashes (input_bfd);
692 relend = relocs + input_section->reloc_count;
693
694 dynobj = elf_hash_table (info)->dynobj;
695 splt = NULL;
696 if (dynobj != NULL)
697 splt = bfd_get_linker_section (dynobj, ".plt");
698
699 for (rel = relocs; rel < relend; rel ++)
700 {
701 reloc_howto_type * howto;
702 unsigned long r_symndx;
703 Elf_Internal_Sym * sym;
704 asection * sec;
705 struct elf_link_hash_entry * h;
706 bfd_vma relocation;
707 bfd_reloc_status_type r;
708 const char * name = NULL;
709 bfd_boolean unresolved_reloc = TRUE;
710 int r_type;
711
712 r_type = ELF32_R_TYPE (rel->r_info);
713 r_symndx = ELF32_R_SYM (rel->r_info);
714
715 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info);
716 h = NULL;
717 sym = NULL;
718 sec = NULL;
719 relocation = 0;
720
721 if (r_symndx < symtab_hdr->sh_info)
722 {
723 sym = local_syms + r_symndx;
724 sec = local_sections [r_symndx];
725 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
726
727 name = bfd_elf_string_from_elf_section
728 (input_bfd, symtab_hdr->sh_link, sym->st_name);
729 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
730 }
731 else
732 {
733 bfd_boolean warned ATTRIBUTE_UNUSED;
734 bfd_boolean ignored ATTRIBUTE_UNUSED;
735
736 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
737 r_symndx, symtab_hdr, sym_hashes, h,
738 sec, relocation, unresolved_reloc,
739 warned, ignored);
740
741 name = h->root.root.string;
742 }
743
744 if (sec != NULL && discarded_section (sec))
745 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
746 rel, 1, relend, howto, 0, contents);
747
748 if (bfd_link_relocatable (info))
749 {
750 /* This is a relocatable link. We don't have to change
751 anything, unless the reloc is against a section symbol,
752 in which case we have to adjust according to where the
753 section symbol winds up in the output section. */
754 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
755 rel->r_addend += sec->output_offset;
756 continue;
757 }
758
759 switch (ELF32_R_TYPE (rel->r_info))
760 {
761 case R_RL78_DIR16S:
762 {
763 bfd_vma *plt_offset;
764
765 if (h != NULL)
766 plt_offset = &h->plt.offset;
767 else
768 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx;
769
770 if (! valid_16bit_address (relocation))
771 {
772 /* If this is the first time we've processed this symbol,
773 fill in the plt entry with the correct symbol address. */
774 if ((*plt_offset & 1) == 0)
775 {
776 unsigned int x;
777
778 x = 0x000000ec; /* br !!abs24 */
779 x |= (relocation << 8) & 0xffffff00;
780 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset);
781 *plt_offset |= 1;
782 }
783
784 relocation = (splt->output_section->vma
785 + splt->output_offset
786 + (*plt_offset & -2));
787 if (name)
788 {
789 char *newname = bfd_malloc (strlen(name)+5);
790 strcpy (newname, name);
791 strcat(newname, ".plt");
792 _bfd_generic_link_add_one_symbol (info,
793 input_bfd,
794 newname,
795 BSF_FUNCTION | BSF_WEAK,
796 splt,
797 (*plt_offset & -2),
798 0,
799 1,
800 0,
801 0);
802 }
803 }
804 }
805 break;
806 }
807
808 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
809 /* If the symbol is undefined and weak
810 then the relocation resolves to zero. */
811 relocation = 0;
812 else
813 {
814 if (howto->pc_relative)
815 {
816 relocation -= (input_section->output_section->vma
817 + input_section->output_offset
818 + rel->r_offset);
819 relocation -= bfd_get_reloc_size (howto);
820 }
821
822 relocation += rel->r_addend;
823 }
824
825 r = bfd_reloc_ok;
826
827 #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
828
829 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
830 switch (r_type)
831 {
832 case R_RL78_NONE:
833 break;
834
835 case R_RL78_RH_RELAX:
836 break;
837
838 case R_RL78_DIR8S_PCREL:
839 RANGE (-128, 127);
840 OP (0) = relocation;
841 break;
842
843 case R_RL78_DIR8S:
844 RANGE (-128, 255);
845 OP (0) = relocation;
846 break;
847
848 case R_RL78_DIR8U:
849 RANGE (0, 255);
850 OP (0) = relocation;
851 break;
852
853 case R_RL78_DIR16S_PCREL:
854 RANGE (-32768, 32767);
855 OP (0) = relocation;
856 OP (1) = relocation >> 8;
857 break;
858
859 case R_RL78_DIR16S:
860 if ((relocation & 0xf0000) == 0xf0000)
861 relocation &= 0xffff;
862 RANGE (-32768, 65535);
863 OP (0) = relocation;
864 OP (1) = relocation >> 8;
865 break;
866
867 case R_RL78_DIR16U:
868 RANGE (0, 65536);
869 OP (0) = relocation;
870 OP (1) = relocation >> 8;
871 break;
872
873 case R_RL78_DIR16:
874 RANGE (-32768, 65536);
875 OP (0) = relocation;
876 OP (1) = relocation >> 8;
877 break;
878
879 case R_RL78_DIR16_REV:
880 RANGE (-32768, 65536);
881 OP (1) = relocation;
882 OP (0) = relocation >> 8;
883 break;
884
885 case R_RL78_DIR3U_PCREL:
886 RANGE (3, 10);
887 OP (0) &= 0xf8;
888 OP (0) |= relocation & 0x07;
889 break;
890
891 case R_RL78_DIR24S_PCREL:
892 RANGE (-0x800000, 0x7fffff);
893 OP (0) = relocation;
894 OP (1) = relocation >> 8;
895 OP (2) = relocation >> 16;
896 break;
897
898 case R_RL78_DIR24S:
899 RANGE (-0x800000, 0x7fffff);
900 OP (0) = relocation;
901 OP (1) = relocation >> 8;
902 OP (2) = relocation >> 16;
903 break;
904
905 case R_RL78_DIR32:
906 OP (0) = relocation;
907 OP (1) = relocation >> 8;
908 OP (2) = relocation >> 16;
909 OP (3) = relocation >> 24;
910 break;
911
912 case R_RL78_DIR32_REV:
913 OP (3) = relocation;
914 OP (2) = relocation >> 8;
915 OP (1) = relocation >> 16;
916 OP (0) = relocation >> 24;
917 break;
918
919 case R_RL78_RH_SFR:
920 RANGE (0xfff00, 0xfffff);
921 OP (0) = relocation & 0xff;
922 break;
923
924 case R_RL78_RH_SADDR:
925 RANGE (0xffe20, 0xfff1f);
926 OP (0) = relocation & 0xff;
927 break;
928
929 /* Complex reloc handling: */
930 case R_RL78_ABS32:
931 case R_RL78_ABS32_REV:
932 case R_RL78_ABS24S_PCREL:
933 case R_RL78_ABS24S:
934 case R_RL78_ABS16:
935 case R_RL78_ABS16_REV:
936 case R_RL78_ABS16S_PCREL:
937 case R_RL78_ABS16S:
938 case R_RL78_ABS16U:
939 case R_RL78_ABS16UL:
940 case R_RL78_ABS16UW:
941 case R_RL78_ABS8:
942 case R_RL78_ABS8U:
943 case R_RL78_ABS8UL:
944 case R_RL78_ABS8UW:
945 case R_RL78_ABS8S_PCREL:
946 case R_RL78_ABS8S:
947 case R_RL78_OPneg:
948 case R_RL78_OPadd:
949 case R_RL78_OPsub:
950 case R_RL78_OPmul:
951 case R_RL78_OPdiv:
952 case R_RL78_OPshla:
953 case R_RL78_OPshra:
954 case R_RL78_OPsctsize:
955 case R_RL78_OPscttop:
956 case R_RL78_OPand:
957 case R_RL78_OPor:
958 case R_RL78_OPxor:
959 case R_RL78_OPnot:
960 case R_RL78_OPmod:
961 relocation = rl78_compute_complex_reloc (r_type, 0, input_section);
962
963 switch (r_type)
964 {
965 case R_RL78_ABS32:
966 OP (0) = relocation;
967 OP (1) = relocation >> 8;
968 OP (2) = relocation >> 16;
969 OP (3) = relocation >> 24;
970 break;
971
972 case R_RL78_ABS32_REV:
973 OP (3) = relocation;
974 OP (2) = relocation >> 8;
975 OP (1) = relocation >> 16;
976 OP (0) = relocation >> 24;
977 break;
978
979 case R_RL78_ABS24S_PCREL:
980 case R_RL78_ABS24S:
981 RANGE (-0x800000, 0x7fffff);
982 OP (0) = relocation;
983 OP (1) = relocation >> 8;
984 OP (2) = relocation >> 16;
985 break;
986
987 case R_RL78_ABS16:
988 RANGE (-32768, 65535);
989 OP (0) = relocation;
990 OP (1) = relocation >> 8;
991 break;
992
993 case R_RL78_ABS16_REV:
994 RANGE (-32768, 65535);
995 OP (1) = relocation;
996 OP (0) = relocation >> 8;
997 break;
998
999 case R_RL78_ABS16S_PCREL:
1000 case R_RL78_ABS16S:
1001 RANGE (-32768, 32767);
1002 OP (0) = relocation;
1003 OP (1) = relocation >> 8;
1004 break;
1005
1006 case R_RL78_ABS16U:
1007 case R_RL78_ABS16UL:
1008 case R_RL78_ABS16UW:
1009 RANGE (0, 65536);
1010 OP (0) = relocation;
1011 OP (1) = relocation >> 8;
1012 break;
1013
1014 case R_RL78_ABS8:
1015 RANGE (-128, 255);
1016 OP (0) = relocation;
1017 break;
1018
1019 case R_RL78_ABS8U:
1020 case R_RL78_ABS8UL:
1021 case R_RL78_ABS8UW:
1022 RANGE (0, 255);
1023 OP (0) = relocation;
1024 break;
1025
1026 case R_RL78_ABS8S_PCREL:
1027 case R_RL78_ABS8S:
1028 RANGE (-128, 127);
1029 OP (0) = relocation;
1030 break;
1031
1032 default:
1033 break;
1034 }
1035 break;
1036
1037 case R_RL78_SYM:
1038 if (r_symndx < symtab_hdr->sh_info)
1039 relocation = sec->output_section->vma + sec->output_offset
1040 + sym->st_value + rel->r_addend;
1041 else if (h != NULL
1042 && (h->root.type == bfd_link_hash_defined
1043 || h->root.type == bfd_link_hash_defweak))
1044 relocation = h->root.u.def.value
1045 + sec->output_section->vma
1046 + sec->output_offset
1047 + rel->r_addend;
1048 else
1049 {
1050 relocation = 0;
1051 if (h->root.type != bfd_link_hash_undefweak)
1052 _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol"));
1053 }
1054 (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
1055 break;
1056
1057 case R_RL78_OPromtop:
1058 relocation = get_romstart (info, input_bfd, input_section, rel->r_offset);
1059 (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
1060 break;
1061
1062 case R_RL78_OPramtop:
1063 relocation = get_ramstart (info, input_bfd, input_section, rel->r_offset);
1064 (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
1065 break;
1066
1067 default:
1068 r = bfd_reloc_notsupported;
1069 break;
1070 }
1071
1072 if (r != bfd_reloc_ok)
1073 {
1074 const char * msg = NULL;
1075
1076 switch (r)
1077 {
1078 case bfd_reloc_overflow:
1079 /* Catch the case of a missing function declaration
1080 and emit a more helpful error message. */
1081 if (r_type == R_RL78_DIR24S_PCREL)
1082 msg = _("%B(%A): error: call to undefined function '%s'");
1083 else
1084 (*info->callbacks->reloc_overflow)
1085 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
1086 input_bfd, input_section, rel->r_offset);
1087 break;
1088
1089 case bfd_reloc_undefined:
1090 (*info->callbacks->undefined_symbol)
1091 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
1092 break;
1093
1094 case bfd_reloc_other:
1095 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
1096 break;
1097
1098 case bfd_reloc_outofrange:
1099 msg = _("%B(%A): internal error: out of range error");
1100 break;
1101
1102 case bfd_reloc_notsupported:
1103 msg = _("%B(%A): internal error: unsupported relocation error");
1104 break;
1105
1106 case bfd_reloc_dangerous:
1107 msg = _("%B(%A): internal error: dangerous relocation");
1108 break;
1109
1110 default:
1111 msg = _("%B(%A): internal error: unknown error");
1112 break;
1113 }
1114
1115 if (msg)
1116 _bfd_error_handler (msg, input_bfd, input_section, name);
1117 }
1118 }
1119
1120 return TRUE;
1121 }
1122 \f
1123 /* Function to set the ELF flag bits. */
1124
1125 static bfd_boolean
1126 rl78_elf_set_private_flags (bfd * abfd, flagword flags)
1127 {
1128 elf_elfheader (abfd)->e_flags = flags;
1129 elf_flags_init (abfd) = TRUE;
1130 return TRUE;
1131 }
1132
1133 static bfd_boolean no_warn_mismatch = FALSE;
1134
1135 void bfd_elf32_rl78_set_target_flags (bfd_boolean);
1136
1137 void
1138 bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch)
1139 {
1140 no_warn_mismatch = user_no_warn_mismatch;
1141 }
1142
1143 static const char *
1144 rl78_cpu_name (flagword flags)
1145 {
1146 switch (flags & E_FLAG_RL78_CPU_MASK)
1147 {
1148 default: return "";
1149 case E_FLAG_RL78_G10: return "G10";
1150 case E_FLAG_RL78_G13: return "G13";
1151 case E_FLAG_RL78_G14: return "G14";
1152 }
1153 }
1154
1155 /* Merge backend specific data from an object file to the output
1156 object file when linking. */
1157
1158 static bfd_boolean
1159 rl78_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
1160 {
1161 flagword new_flags;
1162 flagword old_flags;
1163 bfd_boolean error = FALSE;
1164
1165 new_flags = elf_elfheader (ibfd)->e_flags;
1166 old_flags = elf_elfheader (obfd)->e_flags;
1167
1168 if (!elf_flags_init (obfd))
1169 {
1170 /* First call, no flags set. */
1171 elf_flags_init (obfd) = TRUE;
1172 elf_elfheader (obfd)->e_flags = new_flags;
1173 }
1174 else if (old_flags != new_flags)
1175 {
1176 flagword changed_flags = old_flags ^ new_flags;
1177
1178 if (changed_flags & E_FLAG_RL78_CPU_MASK)
1179 {
1180 flagword out_cpu = old_flags & E_FLAG_RL78_CPU_MASK;
1181 flagword in_cpu = new_flags & E_FLAG_RL78_CPU_MASK;
1182
1183 if (in_cpu == E_FLAG_RL78_ANY_CPU || in_cpu == out_cpu)
1184 /* It does not matter what new_cpu may have. */;
1185 else if (out_cpu == E_FLAG_RL78_ANY_CPU)
1186 {
1187 if (in_cpu == E_FLAG_RL78_G10)
1188 {
1189 /* G10 files can only be linked with other G10 files.
1190 If the output is set to "any" this means that it is
1191 a G14 file that does not use hardware multiply/divide,
1192 but that is still incompatible with the G10 ABI. */
1193 error = TRUE;
1194
1195 (*_bfd_error_handler)
1196 (_("RL78 ABI conflict: G10 file %s cannot be linked with %s file %s"),
1197 bfd_get_filename (ibfd),
1198 rl78_cpu_name (out_cpu), bfd_get_filename (obfd));
1199 }
1200 else
1201 {
1202 old_flags &= ~ E_FLAG_RL78_CPU_MASK;
1203 old_flags |= in_cpu;
1204 elf_elfheader (obfd)->e_flags = old_flags;
1205 }
1206 }
1207 else
1208 {
1209 error = TRUE;
1210
1211 (*_bfd_error_handler)
1212 (_("RL78 ABI conflict: cannot link %s file %s with %s file %s"),
1213 rl78_cpu_name (in_cpu), bfd_get_filename (ibfd),
1214 rl78_cpu_name (out_cpu), bfd_get_filename (obfd));
1215 }
1216 }
1217
1218 if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES)
1219 {
1220 (*_bfd_error_handler)
1221 (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together"));
1222
1223 if (old_flags & E_FLAG_RL78_64BIT_DOUBLES)
1224 (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"),
1225 bfd_get_filename (obfd), bfd_get_filename (ibfd));
1226 else
1227 (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"),
1228 bfd_get_filename (ibfd), bfd_get_filename (obfd));
1229 error = TRUE;
1230 }
1231 }
1232
1233 return !error;
1234 }
1235 \f
1236 static bfd_boolean
1237 rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr)
1238 {
1239 FILE * file = (FILE *) ptr;
1240 flagword flags;
1241
1242 BFD_ASSERT (abfd != NULL && ptr != NULL);
1243
1244 /* Print normal ELF private data. */
1245 _bfd_elf_print_private_bfd_data (abfd, ptr);
1246
1247 flags = elf_elfheader (abfd)->e_flags;
1248 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
1249
1250 if (flags & E_FLAG_RL78_CPU_MASK)
1251 fprintf (file, " [%s]", rl78_cpu_name (flags));
1252
1253 if (flags & E_FLAG_RL78_64BIT_DOUBLES)
1254 fprintf (file, _(" [64-bit doubles]"));
1255
1256 fputc ('\n', file);
1257 return TRUE;
1258 }
1259
1260 /* Return the MACH for an e_flags value. */
1261
1262 static int
1263 elf32_rl78_machine (bfd * abfd ATTRIBUTE_UNUSED)
1264 {
1265 return bfd_mach_rl78;
1266 }
1267
1268 static bfd_boolean
1269 rl78_elf_object_p (bfd * abfd)
1270 {
1271 bfd_default_set_arch_mach (abfd, bfd_arch_rl78,
1272 elf32_rl78_machine (abfd));
1273 return TRUE;
1274 }
1275 \f
1276 /* support PLT for 16-bit references to 24-bit functions. */
1277
1278 /* We support 16-bit pointers to code above 64k by generating a thunk
1279 below 64k containing a JMP instruction to the final address. */
1280
1281 static bfd_boolean
1282 rl78_elf_check_relocs
1283 (bfd * abfd,
1284 struct bfd_link_info * info,
1285 asection * sec,
1286 const Elf_Internal_Rela * relocs)
1287 {
1288 Elf_Internal_Shdr * symtab_hdr;
1289 struct elf_link_hash_entry ** sym_hashes;
1290 const Elf_Internal_Rela * rel;
1291 const Elf_Internal_Rela * rel_end;
1292 bfd_vma *local_plt_offsets;
1293 asection *splt;
1294 bfd *dynobj;
1295
1296 if (bfd_link_relocatable (info))
1297 return TRUE;
1298
1299 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1300 sym_hashes = elf_sym_hashes (abfd);
1301 local_plt_offsets = elf_local_got_offsets (abfd);
1302 splt = NULL;
1303 dynobj = elf_hash_table(info)->dynobj;
1304
1305 rel_end = relocs + sec->reloc_count;
1306 for (rel = relocs; rel < rel_end; rel++)
1307 {
1308 struct elf_link_hash_entry *h;
1309 unsigned long r_symndx;
1310 bfd_vma *offset;
1311
1312 r_symndx = ELF32_R_SYM (rel->r_info);
1313 if (r_symndx < symtab_hdr->sh_info)
1314 h = NULL;
1315 else
1316 {
1317 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1318 while (h->root.type == bfd_link_hash_indirect
1319 || h->root.type == bfd_link_hash_warning)
1320 h = (struct elf_link_hash_entry *) h->root.u.i.link;
1321
1322 /* PR15323, ref flags aren't set for references in the same
1323 object. */
1324 h->root.non_ir_ref = 1;
1325 }
1326
1327 switch (ELF32_R_TYPE (rel->r_info))
1328 {
1329 /* This relocation describes a 16-bit pointer to a function.
1330 We may need to allocate a thunk in low memory; reserve memory
1331 for it now. */
1332 case R_RL78_DIR16S:
1333 if (dynobj == NULL)
1334 elf_hash_table (info)->dynobj = dynobj = abfd;
1335 if (splt == NULL)
1336 {
1337 splt = bfd_get_linker_section (dynobj, ".plt");
1338 if (splt == NULL)
1339 {
1340 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
1341 | SEC_IN_MEMORY | SEC_LINKER_CREATED
1342 | SEC_READONLY | SEC_CODE);
1343 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt",
1344 flags);
1345 if (splt == NULL
1346 || ! bfd_set_section_alignment (dynobj, splt, 1))
1347 return FALSE;
1348 }
1349 }
1350
1351 if (h != NULL)
1352 offset = &h->plt.offset;
1353 else
1354 {
1355 if (local_plt_offsets == NULL)
1356 {
1357 size_t size;
1358 unsigned int i;
1359
1360 size = symtab_hdr->sh_info * sizeof (bfd_vma);
1361 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size);
1362 if (local_plt_offsets == NULL)
1363 return FALSE;
1364 elf_local_got_offsets (abfd) = local_plt_offsets;
1365
1366 for (i = 0; i < symtab_hdr->sh_info; i++)
1367 local_plt_offsets[i] = (bfd_vma) -1;
1368 }
1369 offset = &local_plt_offsets[r_symndx];
1370 }
1371
1372 if (*offset == (bfd_vma) -1)
1373 {
1374 *offset = splt->size;
1375 splt->size += 4;
1376 }
1377 break;
1378 }
1379 }
1380
1381 return TRUE;
1382 }
1383
1384 /* This must exist if dynobj is ever set. */
1385
1386 static bfd_boolean
1387 rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED,
1388 struct bfd_link_info *info)
1389 {
1390 bfd *dynobj;
1391 asection *splt;
1392
1393 if (!elf_hash_table (info)->dynamic_sections_created)
1394 return TRUE;
1395
1396 /* As an extra sanity check, verify that all plt entries have been
1397 filled in. However, relaxing might have changed the relocs so
1398 that some plt entries don't get filled in, so we have to skip
1399 this check if we're relaxing. Unfortunately, check_relocs is
1400 called before relaxation. */
1401
1402 if (info->relax_trip > 0)
1403 return TRUE;
1404
1405 if ((dynobj = elf_hash_table (info)->dynobj) != NULL
1406 && (splt = bfd_get_linker_section (dynobj, ".plt")) != NULL)
1407 {
1408 bfd_byte *contents = splt->contents;
1409 unsigned int i, size = splt->size;
1410
1411 for (i = 0; i < size; i += 4)
1412 {
1413 unsigned int x = bfd_get_32 (dynobj, contents + i);
1414 BFD_ASSERT (x != 0);
1415 }
1416 }
1417
1418 return TRUE;
1419 }
1420
1421 static bfd_boolean
1422 rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
1423 struct bfd_link_info *info)
1424 {
1425 bfd *dynobj;
1426 asection *splt;
1427
1428 if (bfd_link_relocatable (info))
1429 return TRUE;
1430
1431 dynobj = elf_hash_table (info)->dynobj;
1432 if (dynobj == NULL)
1433 return TRUE;
1434
1435 splt = bfd_get_linker_section (dynobj, ".plt");
1436 BFD_ASSERT (splt != NULL);
1437
1438 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size);
1439 if (splt->contents == NULL)
1440 return FALSE;
1441
1442 return TRUE;
1443 }
1444
1445 \f
1446
1447 /* Handle relaxing. */
1448
1449 /* A subroutine of rl78_elf_relax_section. If the global symbol H
1450 is within the low 64k, remove any entry for it in the plt. */
1451
1452 struct relax_plt_data
1453 {
1454 asection *splt;
1455 bfd_boolean *again;
1456 };
1457
1458 static bfd_boolean
1459 rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata)
1460 {
1461 struct relax_plt_data *data = (struct relax_plt_data *) xdata;
1462
1463 if (h->plt.offset != (bfd_vma) -1)
1464 {
1465 bfd_vma address;
1466
1467 if (h->root.type == bfd_link_hash_undefined
1468 || h->root.type == bfd_link_hash_undefweak)
1469 address = 0;
1470 else
1471 address = (h->root.u.def.section->output_section->vma
1472 + h->root.u.def.section->output_offset
1473 + h->root.u.def.value);
1474
1475 if (valid_16bit_address (address))
1476 {
1477 h->plt.offset = -1;
1478 data->splt->size -= 4;
1479 *data->again = TRUE;
1480 }
1481 }
1482
1483 return TRUE;
1484 }
1485
1486 /* A subroutine of rl78_elf_relax_section. If the global symbol H
1487 previously had a plt entry, give it a new entry offset. */
1488
1489 static bfd_boolean
1490 rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata)
1491 {
1492 bfd_vma *entry = (bfd_vma *) xdata;
1493
1494 if (h->plt.offset != (bfd_vma) -1)
1495 {
1496 h->plt.offset = *entry;
1497 *entry += 4;
1498 }
1499
1500 return TRUE;
1501 }
1502
1503 static bfd_boolean
1504 rl78_elf_relax_plt_section (bfd *dynobj,
1505 asection *splt,
1506 struct bfd_link_info *info,
1507 bfd_boolean *again)
1508 {
1509 struct relax_plt_data relax_plt_data;
1510 bfd *ibfd;
1511
1512 /* Assume nothing changes. */
1513 *again = FALSE;
1514
1515 if (bfd_link_relocatable (info))
1516 return TRUE;
1517
1518 /* We only relax the .plt section at the moment. */
1519 if (dynobj != elf_hash_table (info)->dynobj
1520 || strcmp (splt->name, ".plt") != 0)
1521 return TRUE;
1522
1523 /* Quick check for an empty plt. */
1524 if (splt->size == 0)
1525 return TRUE;
1526
1527 /* Map across all global symbols; see which ones happen to
1528 fall in the low 64k. */
1529 relax_plt_data.splt = splt;
1530 relax_plt_data.again = again;
1531 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check,
1532 &relax_plt_data);
1533
1534 /* Likewise for local symbols, though that's somewhat less convenient
1535 as we have to walk the list of input bfds and swap in symbol data. */
1536 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
1537 {
1538 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1539 Elf_Internal_Shdr *symtab_hdr;
1540 Elf_Internal_Sym *isymbuf = NULL;
1541 unsigned int idx;
1542
1543 if (! local_plt_offsets)
1544 continue;
1545
1546 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
1547 if (symtab_hdr->sh_info != 0)
1548 {
1549 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1550 if (isymbuf == NULL)
1551 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr,
1552 symtab_hdr->sh_info, 0,
1553 NULL, NULL, NULL);
1554 if (isymbuf == NULL)
1555 return FALSE;
1556 }
1557
1558 for (idx = 0; idx < symtab_hdr->sh_info; ++idx)
1559 {
1560 Elf_Internal_Sym *isym;
1561 asection *tsec;
1562 bfd_vma address;
1563
1564 if (local_plt_offsets[idx] == (bfd_vma) -1)
1565 continue;
1566
1567 isym = &isymbuf[idx];
1568 if (isym->st_shndx == SHN_UNDEF)
1569 continue;
1570 else if (isym->st_shndx == SHN_ABS)
1571 tsec = bfd_abs_section_ptr;
1572 else if (isym->st_shndx == SHN_COMMON)
1573 tsec = bfd_com_section_ptr;
1574 else
1575 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx);
1576
1577 address = (tsec->output_section->vma
1578 + tsec->output_offset
1579 + isym->st_value);
1580 if (valid_16bit_address (address))
1581 {
1582 local_plt_offsets[idx] = -1;
1583 splt->size -= 4;
1584 *again = TRUE;
1585 }
1586 }
1587
1588 if (isymbuf != NULL
1589 && symtab_hdr->contents != (unsigned char *) isymbuf)
1590 {
1591 if (! info->keep_memory)
1592 free (isymbuf);
1593 else
1594 {
1595 /* Cache the symbols for elf_link_input_bfd. */
1596 symtab_hdr->contents = (unsigned char *) isymbuf;
1597 }
1598 }
1599 }
1600
1601 /* If we changed anything, walk the symbols again to reallocate
1602 .plt entry addresses. */
1603 if (*again && splt->size > 0)
1604 {
1605 bfd_vma entry = 0;
1606
1607 elf_link_hash_traverse (elf_hash_table (info),
1608 rl78_relax_plt_realloc, &entry);
1609
1610 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
1611 {
1612 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1613 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info;
1614 unsigned int idx;
1615
1616 if (! local_plt_offsets)
1617 continue;
1618
1619 for (idx = 0; idx < nlocals; ++idx)
1620 if (local_plt_offsets[idx] != (bfd_vma) -1)
1621 {
1622 local_plt_offsets[idx] = entry;
1623 entry += 4;
1624 }
1625 }
1626 }
1627
1628 return TRUE;
1629 }
1630
1631 /* Delete some bytes from a section while relaxing. */
1632
1633 static bfd_boolean
1634 elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1635 Elf_Internal_Rela *alignment_rel, int force_snip)
1636 {
1637 Elf_Internal_Shdr * symtab_hdr;
1638 unsigned int sec_shndx;
1639 bfd_byte * contents;
1640 Elf_Internal_Rela * irel;
1641 Elf_Internal_Rela * irelend;
1642 Elf_Internal_Sym * isym;
1643 Elf_Internal_Sym * isymend;
1644 bfd_vma toaddr;
1645 unsigned int symcount;
1646 struct elf_link_hash_entry ** sym_hashes;
1647 struct elf_link_hash_entry ** end_hashes;
1648
1649 if (!alignment_rel)
1650 force_snip = 1;
1651
1652 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1653
1654 contents = elf_section_data (sec)->this_hdr.contents;
1655
1656 /* The deletion must stop at the next alignment boundary, if
1657 ALIGNMENT_REL is non-NULL. */
1658 toaddr = sec->size;
1659 if (alignment_rel)
1660 toaddr = alignment_rel->r_offset;
1661
1662 irel = elf_section_data (sec)->relocs;
1663 if (irel == NULL)
1664 {
1665 _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, TRUE);
1666 irel = elf_section_data (sec)->relocs;
1667 }
1668
1669 irelend = irel + sec->reloc_count;
1670
1671 /* Actually delete the bytes. */
1672 memmove (contents + addr, contents + addr + count,
1673 (size_t) (toaddr - addr - count));
1674
1675 /* If we don't have an alignment marker to worry about, we can just
1676 shrink the section. Otherwise, we have to fill in the newly
1677 created gap with NOP insns (0x03). */
1678 if (force_snip)
1679 sec->size -= count;
1680 else
1681 memset (contents + toaddr - count, 0x03, count);
1682
1683 /* Adjust all the relocs. */
1684 for (; irel && irel < irelend; irel++)
1685 {
1686 /* Get the new reloc address. */
1687 if (irel->r_offset > addr
1688 && (irel->r_offset < toaddr
1689 || (force_snip && irel->r_offset == toaddr)))
1690 irel->r_offset -= count;
1691
1692 /* If we see an ALIGN marker at the end of the gap, we move it
1693 to the beginning of the gap, since marking these gaps is what
1694 they're for. */
1695 if (irel->r_offset == toaddr
1696 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
1697 && irel->r_addend & RL78_RELAXA_ALIGN)
1698 irel->r_offset -= count;
1699 }
1700
1701 /* Adjust the local symbols defined in this section. */
1702 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1703 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1704 isymend = isym + symtab_hdr->sh_info;
1705
1706 for (; isym < isymend; isym++)
1707 {
1708 /* If the symbol is in the range of memory we just moved, we
1709 have to adjust its value. */
1710 if (isym->st_shndx == sec_shndx
1711 && isym->st_value > addr
1712 && isym->st_value < toaddr)
1713 isym->st_value -= count;
1714
1715 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1716 *end* is in the moved bytes but it's *start* isn't), then we
1717 must adjust its size. */
1718 if (isym->st_shndx == sec_shndx
1719 && isym->st_value < addr
1720 && isym->st_value + isym->st_size > addr
1721 && isym->st_value + isym->st_size < toaddr)
1722 isym->st_size -= count;
1723 }
1724
1725 /* Now adjust the global symbols defined in this section. */
1726 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1727 - symtab_hdr->sh_info);
1728 sym_hashes = elf_sym_hashes (abfd);
1729 end_hashes = sym_hashes + symcount;
1730
1731 for (; sym_hashes < end_hashes; sym_hashes++)
1732 {
1733 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1734
1735 if ((sym_hash->root.type == bfd_link_hash_defined
1736 || sym_hash->root.type == bfd_link_hash_defweak)
1737 && sym_hash->root.u.def.section == sec)
1738 {
1739 /* As above, adjust the value if needed. */
1740 if (sym_hash->root.u.def.value > addr
1741 && sym_hash->root.u.def.value < toaddr)
1742 sym_hash->root.u.def.value -= count;
1743
1744 /* As above, adjust the size if needed. */
1745 if (sym_hash->root.u.def.value < addr
1746 && sym_hash->root.u.def.value + sym_hash->size > addr
1747 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1748 sym_hash->size -= count;
1749 }
1750 }
1751
1752 return TRUE;
1753 }
1754
1755 /* Used to sort relocs by address. If relocs have the same address,
1756 we maintain their relative order, except that R_RL78_RH_RELAX
1757 alignment relocs must be the first reloc for any given address. */
1758
1759 static void
1760 reloc_bubblesort (Elf_Internal_Rela * r, int count)
1761 {
1762 int i;
1763 bfd_boolean again;
1764 bfd_boolean swappit;
1765
1766 /* This is almost a classic bubblesort. It's the slowest sort, but
1767 we're taking advantage of the fact that the relocations are
1768 mostly in order already (the assembler emits them that way) and
1769 we need relocs with the same address to remain in the same
1770 relative order. */
1771 again = TRUE;
1772 while (again)
1773 {
1774 again = FALSE;
1775 for (i = 0; i < count - 1; i ++)
1776 {
1777 if (r[i].r_offset > r[i + 1].r_offset)
1778 swappit = TRUE;
1779 else if (r[i].r_offset < r[i + 1].r_offset)
1780 swappit = FALSE;
1781 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1782 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN))
1783 swappit = TRUE;
1784 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1785 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN)
1786 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX
1787 && (r[i].r_addend & RL78_RELAXA_ALIGN)))
1788 swappit = TRUE;
1789 else
1790 swappit = FALSE;
1791
1792 if (swappit)
1793 {
1794 Elf_Internal_Rela tmp;
1795
1796 tmp = r[i];
1797 r[i] = r[i + 1];
1798 r[i + 1] = tmp;
1799 /* If we do move a reloc back, re-scan to see if it
1800 needs to be moved even further back. This avoids
1801 most of the O(n^2) behavior for our cases. */
1802 if (i > 0)
1803 i -= 2;
1804 again = TRUE;
1805 }
1806 }
1807 }
1808 }
1809
1810
1811 #define OFFSET_FOR_RELOC(rel, lrel, scale) \
1812 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1813 lrel, abfd, sec, link_info, scale)
1814
1815 static bfd_vma
1816 rl78_offset_for_reloc (bfd * abfd,
1817 Elf_Internal_Rela * rel,
1818 Elf_Internal_Shdr * symtab_hdr,
1819 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
1820 Elf_Internal_Sym * intsyms,
1821 Elf_Internal_Rela ** lrel,
1822 bfd * input_bfd,
1823 asection * input_section,
1824 struct bfd_link_info * info,
1825 int * scale)
1826 {
1827 bfd_vma symval;
1828
1829 *scale = 1;
1830
1831 /* REL is the first of 1..N relocations. We compute the symbol
1832 value for each relocation, then combine them if needed. LREL
1833 gets a pointer to the last relocation used. */
1834 while (1)
1835 {
1836 unsigned long r_type;
1837
1838 /* Get the value of the symbol referred to by the reloc. */
1839 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1840 {
1841 /* A local symbol. */
1842 Elf_Internal_Sym *isym;
1843 asection *ssec;
1844
1845 isym = intsyms + ELF32_R_SYM (rel->r_info);
1846
1847 if (isym->st_shndx == SHN_UNDEF)
1848 ssec = bfd_und_section_ptr;
1849 else if (isym->st_shndx == SHN_ABS)
1850 ssec = bfd_abs_section_ptr;
1851 else if (isym->st_shndx == SHN_COMMON)
1852 ssec = bfd_com_section_ptr;
1853 else
1854 ssec = bfd_section_from_elf_index (abfd,
1855 isym->st_shndx);
1856
1857 /* Initial symbol value. */
1858 symval = isym->st_value;
1859
1860 /* GAS may have made this symbol relative to a section, in
1861 which case, we have to add the addend to find the
1862 symbol. */
1863 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1864 symval += rel->r_addend;
1865
1866 if (ssec)
1867 {
1868 if ((ssec->flags & SEC_MERGE)
1869 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
1870 symval = _bfd_merged_section_offset (abfd, & ssec,
1871 elf_section_data (ssec)->sec_info,
1872 symval);
1873 }
1874
1875 /* Now make the offset relative to where the linker is putting it. */
1876 if (ssec)
1877 symval +=
1878 ssec->output_section->vma + ssec->output_offset;
1879
1880 symval += rel->r_addend;
1881 }
1882 else
1883 {
1884 unsigned long indx;
1885 struct elf_link_hash_entry * h;
1886
1887 /* An external symbol. */
1888 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1889 h = elf_sym_hashes (abfd)[indx];
1890 BFD_ASSERT (h != NULL);
1891
1892 if (h->root.type != bfd_link_hash_defined
1893 && h->root.type != bfd_link_hash_defweak)
1894 {
1895 /* This appears to be a reference to an undefined
1896 symbol. Just ignore it--it will be caught by the
1897 regular reloc processing. */
1898 if (lrel)
1899 *lrel = rel;
1900 return 0;
1901 }
1902
1903 symval = (h->root.u.def.value
1904 + h->root.u.def.section->output_section->vma
1905 + h->root.u.def.section->output_offset);
1906
1907 symval += rel->r_addend;
1908 }
1909
1910 r_type = ELF32_R_TYPE (rel->r_info);
1911 switch (r_type)
1912 {
1913 case R_RL78_SYM:
1914 (void) rl78_compute_complex_reloc (r_type, symval, input_section);
1915 break;
1916
1917 case R_RL78_OPromtop:
1918 symval = get_romstart (info, input_bfd, input_section, rel->r_offset);
1919 (void) rl78_compute_complex_reloc (r_type, symval, input_section);
1920 break;
1921
1922 case R_RL78_OPramtop:
1923 symval = get_ramstart (info, input_bfd, input_section, rel->r_offset);
1924 (void) rl78_compute_complex_reloc (r_type, symval, input_section);
1925 break;
1926
1927 case R_RL78_OPneg:
1928 case R_RL78_OPadd:
1929 case R_RL78_OPsub:
1930 case R_RL78_OPmul:
1931 case R_RL78_OPdiv:
1932 case R_RL78_OPshla:
1933 case R_RL78_OPshra:
1934 case R_RL78_OPsctsize:
1935 case R_RL78_OPscttop:
1936 case R_RL78_OPand:
1937 case R_RL78_OPor:
1938 case R_RL78_OPxor:
1939 case R_RL78_OPnot:
1940 case R_RL78_OPmod:
1941 (void) rl78_compute_complex_reloc (r_type, 0, input_section);
1942 break;
1943
1944 case R_RL78_DIR16UL:
1945 case R_RL78_DIR8UL:
1946 case R_RL78_ABS16UL:
1947 case R_RL78_ABS8UL:
1948 *scale = 4;
1949 goto reloc_computes_value;
1950
1951 case R_RL78_DIR16UW:
1952 case R_RL78_DIR8UW:
1953 case R_RL78_ABS16UW:
1954 case R_RL78_ABS8UW:
1955 *scale = 2;
1956 goto reloc_computes_value;
1957
1958 default:
1959 reloc_computes_value:
1960 symval = rl78_compute_complex_reloc (r_type, symval, input_section);
1961 case R_RL78_DIR32:
1962 case R_RL78_DIR24S:
1963 case R_RL78_DIR16:
1964 case R_RL78_DIR16U:
1965 case R_RL78_DIR16S:
1966 case R_RL78_DIR24S_PCREL:
1967 case R_RL78_DIR16S_PCREL:
1968 case R_RL78_DIR8S_PCREL:
1969 if (lrel)
1970 *lrel = rel;
1971 return symval;
1972 }
1973
1974 rel ++;
1975 }
1976 }
1977
1978 struct {
1979 int prefix; /* or -1 for "no prefix" */
1980 int insn; /* or -1 for "end of list" */
1981 int insn_for_saddr; /* or -1 for "no alternative" */
1982 int insn_for_sfr; /* or -1 for "no alternative" */
1983 } relax_addr16[] = {
1984 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */
1985 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */
1986 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */
1987 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */
1988
1989 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */
1990 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */
1991 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */
1992 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */
1993 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */
1994 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */
1995 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */
1996 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */
1997
1998 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */
1999 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */
2000 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */
2001 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */
2002 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */
2003
2004 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */
2005 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */
2006 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */
2007 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */
2008
2009 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */
2010 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */
2011 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */
2012
2013 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */
2014 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */
2015 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */
2016 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */
2017 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */
2018 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */
2019
2020 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */
2021
2022 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */
2023 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */
2024 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */
2025 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */
2026 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */
2027 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */
2028 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */
2029 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */
2030
2031 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */
2032 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */
2033 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */
2034 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */
2035 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */
2036 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */
2037 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */
2038 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */
2039
2040 { -1, -1, -1, -1 }
2041 };
2042
2043 /* Relax one section. */
2044
2045 static bfd_boolean
2046 rl78_elf_relax_section
2047 (bfd * abfd,
2048 asection * sec,
2049 struct bfd_link_info * link_info,
2050 bfd_boolean * again)
2051 {
2052 Elf_Internal_Shdr * symtab_hdr;
2053 Elf_Internal_Shdr * shndx_hdr;
2054 Elf_Internal_Rela * internal_relocs;
2055 Elf_Internal_Rela * free_relocs = NULL;
2056 Elf_Internal_Rela * irel;
2057 Elf_Internal_Rela * srel;
2058 Elf_Internal_Rela * irelend;
2059 Elf_Internal_Rela * next_alignment;
2060 bfd_byte * contents = NULL;
2061 bfd_byte * free_contents = NULL;
2062 Elf_Internal_Sym * intsyms = NULL;
2063 Elf_Internal_Sym * free_intsyms = NULL;
2064 Elf_External_Sym_Shndx * shndx_buf = NULL;
2065 bfd_vma pc;
2066 bfd_vma symval ATTRIBUTE_UNUSED = 0;
2067 int pcrel ATTRIBUTE_UNUSED = 0;
2068 int code ATTRIBUTE_UNUSED = 0;
2069 int section_alignment_glue;
2070 int scale;
2071
2072 if (abfd == elf_hash_table (link_info)->dynobj
2073 && strcmp (sec->name, ".plt") == 0)
2074 return rl78_elf_relax_plt_section (abfd, sec, link_info, again);
2075
2076 /* Assume nothing changes. */
2077 *again = FALSE;
2078
2079 /* We don't have to do anything for a relocatable link, if
2080 this section does not have relocs, or if this is not a
2081 code section. */
2082 if (bfd_link_relocatable (link_info)
2083 || (sec->flags & SEC_RELOC) == 0
2084 || sec->reloc_count == 0
2085 || (sec->flags & SEC_CODE) == 0)
2086 return TRUE;
2087
2088 symtab_hdr = & elf_symtab_hdr (abfd);
2089 if (elf_symtab_shndx_list (abfd))
2090 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr;
2091 else
2092 shndx_hdr = NULL;
2093
2094 /* Get the section contents. */
2095 if (elf_section_data (sec)->this_hdr.contents != NULL)
2096 contents = elf_section_data (sec)->this_hdr.contents;
2097 /* Go get them off disk. */
2098 else
2099 {
2100 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2101 goto error_return;
2102 elf_section_data (sec)->this_hdr.contents = contents;
2103 }
2104
2105 /* Read this BFD's symbols. */
2106 /* Get cached copy if it exists. */
2107 if (symtab_hdr->contents != NULL)
2108 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2109 else
2110 {
2111 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2112 symtab_hdr->contents = (bfd_byte *) intsyms;
2113 }
2114
2115 if (shndx_hdr && shndx_hdr->sh_size != 0)
2116 {
2117 bfd_size_type amt;
2118
2119 amt = symtab_hdr->sh_info;
2120 amt *= sizeof (Elf_External_Sym_Shndx);
2121 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2122 if (shndx_buf == NULL)
2123 goto error_return;
2124 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2125 || bfd_bread (shndx_buf, amt, abfd) != amt)
2126 goto error_return;
2127 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2128 }
2129
2130 /* Get a copy of the native relocations. */
2131 internal_relocs = (_bfd_elf_link_read_relocs
2132 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
2133 link_info->keep_memory));
2134 if (internal_relocs == NULL)
2135 goto error_return;
2136 if (! link_info->keep_memory)
2137 free_relocs = internal_relocs;
2138
2139 /* The RL_ relocs must be just before the operand relocs they go
2140 with, so we must sort them to guarantee this. We use bubblesort
2141 instead of qsort so we can guarantee that relocs with the same
2142 address remain in the same relative order. */
2143 reloc_bubblesort (internal_relocs, sec->reloc_count);
2144
2145 /* Walk through them looking for relaxing opportunities. */
2146 irelend = internal_relocs + sec->reloc_count;
2147
2148
2149 /* This will either be NULL or a pointer to the next alignment
2150 relocation. */
2151 next_alignment = internal_relocs;
2152
2153 /* We calculate worst case shrinkage caused by alignment directives.
2154 No fool-proof, but better than either ignoring the problem or
2155 doing heavy duty analysis of all the alignment markers in all
2156 input sections. */
2157 section_alignment_glue = 0;
2158 for (irel = internal_relocs; irel < irelend; irel++)
2159 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
2160 && irel->r_addend & RL78_RELAXA_ALIGN)
2161 {
2162 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2163
2164 if (section_alignment_glue < this_glue)
2165 section_alignment_glue = this_glue;
2166 }
2167 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2168 shrinkage. */
2169 section_alignment_glue *= 2;
2170
2171 for (irel = internal_relocs; irel < irelend; irel++)
2172 {
2173 unsigned char *insn;
2174 int nrelocs;
2175
2176 /* The insns we care about are all marked with one of these. */
2177 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX)
2178 continue;
2179
2180 if (irel->r_addend & RL78_RELAXA_ALIGN
2181 || next_alignment == internal_relocs)
2182 {
2183 /* When we delete bytes, we need to maintain all the alignments
2184 indicated. In addition, we need to be careful about relaxing
2185 jumps across alignment boundaries - these displacements
2186 *grow* when we delete bytes. For now, don't shrink
2187 displacements across an alignment boundary, just in case.
2188 Note that this only affects relocations to the same
2189 section. */
2190 next_alignment += 2;
2191 while (next_alignment < irelend
2192 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX
2193 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN)))
2194 next_alignment ++;
2195 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2196 next_alignment = NULL;
2197 }
2198
2199 /* When we hit alignment markers, see if we've shrunk enough
2200 before them to reduce the gap without violating the alignment
2201 requirements. */
2202 if (irel->r_addend & RL78_RELAXA_ALIGN)
2203 {
2204 /* At this point, the next relocation *should* be the ELIGN
2205 end marker. */
2206 Elf_Internal_Rela *erel = irel + 1;
2207 unsigned int alignment, nbytes;
2208
2209 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX)
2210 continue;
2211 if (!(erel->r_addend & RL78_RELAXA_ELIGN))
2212 continue;
2213
2214 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2215
2216 if (erel->r_offset - irel->r_offset < alignment)
2217 continue;
2218
2219 nbytes = erel->r_offset - irel->r_offset;
2220 nbytes /= alignment;
2221 nbytes *= alignment;
2222
2223 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset - nbytes, nbytes,
2224 next_alignment, erel->r_offset == sec->size);
2225 *again = TRUE;
2226
2227 continue;
2228 }
2229
2230 if (irel->r_addend & RL78_RELAXA_ELIGN)
2231 continue;
2232
2233 insn = contents + irel->r_offset;
2234
2235 nrelocs = irel->r_addend & RL78_RELAXA_RNUM;
2236
2237 /* At this point, we have an insn that is a candidate for linker
2238 relaxation. There are NRELOCS relocs following that may be
2239 relaxed, although each reloc may be made of more than one
2240 reloc entry (such as gp-rel symbols). */
2241
2242 /* Get the value of the symbol referred to by the reloc. Just
2243 in case this is the last reloc in the list, use the RL's
2244 addend to choose between this reloc (no addend) or the next
2245 (yes addend, which means at least one following reloc). */
2246
2247 /* srel points to the "current" reloction for this insn -
2248 actually the last reloc for a given operand, which is the one
2249 we need to update. We check the relaxations in the same
2250 order that the relocations happen, so we'll just push it
2251 along as we go. */
2252 srel = irel;
2253
2254 pc = sec->output_section->vma + sec->output_offset
2255 + srel->r_offset;
2256
2257 #define GET_RELOC \
2258 BFD_ASSERT (nrelocs > 0); \
2259 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2260 pcrel = symval - pc + srel->r_addend; \
2261 nrelocs --;
2262
2263 #define SNIPNR(offset, nbytes) \
2264 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
2265
2266 #define SNIP(offset, nbytes, newtype) \
2267 SNIPNR (offset, nbytes); \
2268 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2269
2270 /* The order of these bit tests must match the order that the
2271 relocs appear in. Since we sorted those by offset, we can
2272 predict them. */
2273
2274 /*----------------------------------------------------------------------*/
2275 /* EF ad BR $rel8 pcrel
2276 ED al ah BR !abs16 abs
2277 EE al ah BR $!rel16 pcrel
2278 EC al ah as BR !!abs20 abs
2279
2280 FD al ah CALL !abs16 abs
2281 FE al ah CALL $!rel16 pcrel
2282 FC al ah as CALL !!abs20 abs
2283
2284 DC ad BC $rel8
2285 DE ad BNC $rel8
2286 DD ad BZ $rel8
2287 DF ad BNZ $rel8
2288 61 C3 ad BH $rel8
2289 61 D3 ad BNH $rel8
2290 61 C8 EF ad SKC ; BR $rel8
2291 61 D8 EF ad SKNC ; BR $rel8
2292 61 E8 EF ad SKZ ; BR $rel8
2293 61 F8 EF ad SKNZ ; BR $rel8
2294 61 E3 EF ad SKH ; BR $rel8
2295 61 F3 EF ad SKNH ; BR $rel8
2296 */
2297
2298 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA)
2299 {
2300 /* SKIP opcodes that skip non-branches will have a relax tag
2301 but no corresponding symbol to relax against; we just
2302 skip those. */
2303 if (irel->r_addend & RL78_RELAXA_RNUM)
2304 {
2305 GET_RELOC;
2306 }
2307
2308 switch (insn[0])
2309 {
2310 case 0xdc: /* BC */
2311 case 0xdd: /* BZ */
2312 case 0xde: /* BNC */
2313 case 0xdf: /* BNZ */
2314 if (insn[1] == 0x03 && insn[2] == 0xee /* BR */
2315 && (srel->r_offset - irel->r_offset) > 1) /* a B<c> without its own reloc */
2316 {
2317 /* This is a "long" conditional as generated by gas:
2318 DC 03 EE ad.dr */
2319 if (pcrel < 127
2320 && pcrel > -127)
2321 {
2322 insn[0] ^= 0x02; /* invert conditional */
2323 SNIPNR (4, 1);
2324 SNIP (1, 2, R_RL78_DIR8S_PCREL);
2325 insn[1] = pcrel;
2326 *again = TRUE;
2327 }
2328 }
2329 break;
2330
2331 case 0xec: /* BR !!abs20 */
2332
2333 if (pcrel < 127
2334 && pcrel > -127)
2335 {
2336 insn[0] = 0xef;
2337 insn[1] = pcrel;
2338 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2339 *again = TRUE;
2340 }
2341 else if (symval < 65536)
2342 {
2343 insn[0] = 0xed;
2344 insn[1] = symval & 0xff;
2345 insn[2] = symval >> 8;
2346 SNIP (2, 1, R_RL78_DIR16U);
2347 *again = TRUE;
2348 }
2349 else if (pcrel < 32767
2350 && pcrel > -32767)
2351 {
2352 insn[0] = 0xee;
2353 insn[1] = pcrel & 0xff;
2354 insn[2] = pcrel >> 8;
2355 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2356 *again = TRUE;
2357 }
2358 break;
2359
2360 case 0xee: /* BR $!pcrel16 */
2361 case 0xed: /* BR $!abs16 */
2362 if (pcrel < 127
2363 && pcrel > -127)
2364 {
2365 insn[0] = 0xef;
2366 insn[1] = pcrel;
2367 SNIP (2, 1, R_RL78_DIR8S_PCREL);
2368 *again = TRUE;
2369 }
2370 break;
2371
2372 case 0xfc: /* CALL !!abs20 */
2373 if (symval < 65536)
2374 {
2375 insn[0] = 0xfd;
2376 insn[1] = symval & 0xff;
2377 insn[2] = symval >> 8;
2378 SNIP (2, 1, R_RL78_DIR16U);
2379 *again = TRUE;
2380 }
2381 else if (pcrel < 32767
2382 && pcrel > -32767)
2383 {
2384 insn[0] = 0xfe;
2385 insn[1] = pcrel & 0xff;
2386 insn[2] = pcrel >> 8;
2387 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2388 *again = TRUE;
2389 }
2390 break;
2391
2392 case 0x61: /* PREFIX */
2393 /* For SKIP/BR, we change the BR opcode and delete the
2394 SKIP. That way, we don't have to find and change the
2395 relocation for the BR. */
2396 /* Note that, for the case where we're skipping some
2397 other insn, we have no "other" reloc but that's safe
2398 here anyway. */
2399 switch (insn[1])
2400 {
2401 case 0xd3: /* BNH */
2402 case 0xc3: /* BH */
2403 if (insn[2] == 0x03 && insn[3] == 0xee
2404 && (srel->r_offset - irel->r_offset) > 2) /* a B<c> without its own reloc */
2405 {
2406 /* Another long branch by gas:
2407 61 D3 03 EE ad.dr */
2408 if (pcrel < 127
2409 && pcrel > -127)
2410 {
2411 insn[1] ^= 0x10; /* invert conditional */
2412 SNIPNR (5, 1);
2413 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2414 insn[2] = pcrel;
2415 *again = TRUE;
2416 }
2417 }
2418 break;
2419
2420 case 0xc8: /* SKC */
2421 if (insn[2] == 0xef)
2422 {
2423 insn[2] = 0xde; /* BNC */
2424 SNIPNR (0, 2);
2425 }
2426 break;
2427
2428 case 0xd8: /* SKNC */
2429 if (insn[2] == 0xef)
2430 {
2431 insn[2] = 0xdc; /* BC */
2432 SNIPNR (0, 2);
2433 }
2434 break;
2435
2436 case 0xe8: /* SKZ */
2437 if (insn[2] == 0xef)
2438 {
2439 insn[2] = 0xdf; /* BNZ */
2440 SNIPNR (0, 2);
2441 }
2442 break;
2443
2444 case 0xf8: /* SKNZ */
2445 if (insn[2] == 0xef)
2446 {
2447 insn[2] = 0xdd; /* BZ */
2448 SNIPNR (0, 2);
2449 }
2450 break;
2451
2452 case 0xe3: /* SKH */
2453 if (insn[2] == 0xef)
2454 {
2455 insn[2] = 0xd3; /* BNH */
2456 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2457 }
2458 break;
2459
2460 case 0xf3: /* SKNH */
2461 if (insn[2] == 0xef)
2462 {
2463 insn[2] = 0xc3; /* BH */
2464 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2465 }
2466 break;
2467 }
2468 break;
2469 }
2470 }
2471
2472 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16
2473 && nrelocs > 0)
2474 {
2475 /*----------------------------------------------------------------------*/
2476 /* Some insns have both a 16-bit address operand and an 8-bit
2477 variant if the address is within a special range:
2478
2479 Address 16-bit operand SADDR range SFR range
2480 FFF00-FFFFF 0xff00-0xffff 0x00-0xff
2481 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff
2482
2483 The RELAX_ADDR16[] array has the insn encodings for the
2484 16-bit operand version, as well as the SFR and SADDR
2485 variants. We only need to replace the encodings and
2486 adjust the operand.
2487
2488 Note: we intentionally do not attempt to decode and skip
2489 any ES: prefix, as adding ES: means the addr16 (likely)
2490 no longer points to saddr/sfr space.
2491 */
2492
2493 int is_sfr;
2494 int is_saddr;
2495 int idx;
2496 int poff;
2497
2498 GET_RELOC;
2499
2500 if (0xffe20 <= symval && symval <= 0xfffff)
2501 {
2502
2503 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f);
2504 is_sfr = (0xfff00 <= symval && symval <= 0xfffff);
2505
2506 for (idx = 0; relax_addr16[idx].insn != -1; idx ++)
2507 {
2508 if (relax_addr16[idx].prefix != -1
2509 && insn[0] == relax_addr16[idx].prefix
2510 && insn[1] == relax_addr16[idx].insn)
2511 {
2512 poff = 1;
2513 }
2514 else if (relax_addr16[idx].prefix == -1
2515 && insn[0] == relax_addr16[idx].insn)
2516 {
2517 poff = 0;
2518 }
2519 else
2520 continue;
2521
2522 /* We have a matched insn, and poff is 0 or 1 depending
2523 on the base pattern size. */
2524
2525 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1)
2526 {
2527 insn[poff] = relax_addr16[idx].insn_for_sfr;
2528 SNIP (poff+2, 1, R_RL78_RH_SFR);
2529 }
2530
2531 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1)
2532 {
2533 insn[poff] = relax_addr16[idx].insn_for_saddr;
2534 SNIP (poff+2, 1, R_RL78_RH_SADDR);
2535 }
2536 }
2537 }
2538 }
2539 /*----------------------------------------------------------------------*/
2540 }
2541
2542 return TRUE;
2543
2544 error_return:
2545 if (free_relocs != NULL)
2546 free (free_relocs);
2547
2548 if (free_contents != NULL)
2549 free (free_contents);
2550
2551 if (shndx_buf != NULL)
2552 {
2553 shndx_hdr->contents = NULL;
2554 free (shndx_buf);
2555 }
2556
2557 if (free_intsyms != NULL)
2558 free (free_intsyms);
2559
2560 return TRUE;
2561 }
2562
2563 \f
2564
2565 #define ELF_ARCH bfd_arch_rl78
2566 #define ELF_MACHINE_CODE EM_RL78
2567 #define ELF_MAXPAGESIZE 0x1000
2568
2569 #define TARGET_LITTLE_SYM rl78_elf32_vec
2570 #define TARGET_LITTLE_NAME "elf32-rl78"
2571
2572 #define elf_info_to_howto_rel NULL
2573 #define elf_info_to_howto rl78_info_to_howto_rela
2574 #define elf_backend_object_p rl78_elf_object_p
2575 #define elf_backend_relocate_section rl78_elf_relocate_section
2576 #define elf_symbol_leading_char ('_')
2577 #define elf_backend_can_gc_sections 1
2578
2579 #define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup
2580 #define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup
2581 #define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags
2582 #define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data
2583 #define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data
2584
2585 #define bfd_elf32_bfd_relax_section rl78_elf_relax_section
2586 #define elf_backend_check_relocs rl78_elf_check_relocs
2587 #define elf_backend_always_size_sections \
2588 rl78_elf_always_size_sections
2589 #define elf_backend_finish_dynamic_sections \
2590 rl78_elf_finish_dynamic_sections
2591
2592 #include "elf32-target.h"
A mirror of the official binutils-gdb repository