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PR28176, rl78 complex reloc divide by zero
[thirdparty/binutils-gdb.git] / bfd / elf32-rl78.c
1 /* Renesas RL78 specific support for 32-bit ELF.
2 Copyright (C) 2011-2021 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include "bfd.h"
23 #include "libbfd.h"
24 #include "elf-bfd.h"
25 #include "elf/rl78.h"
26 #include "libiberty.h"
27
28 #define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000)
29
30 #define RL78REL(n,sz,bit,shift,complain,pcrel) \
31 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
32 bfd_elf_generic_reloc, "R_RL78_" #n, false, 0, ~0, false)
33
34 static bfd_reloc_status_type rl78_special_reloc (bfd *, arelent *, asymbol *, void *,
35 asection *, bfd *, char **);
36
37 /* FIXME: We could omit the SHIFT parameter, it is always zero. */
38 #define RL78_OP_REL(n,sz,bit,shift,complain,pcrel) \
39 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
40 rl78_special_reloc, "R_RL78_" #n, false, 0, ~0, false)
41
42 /* Note that the relocations around 0x7f are internal to this file;
43 feel free to move them as needed to avoid conflicts with published
44 relocation numbers. */
45
46 static reloc_howto_type rl78_elf_howto_table [] =
47 {
48 RL78REL (NONE, 3, 0, 0, dont, false),
49 RL78REL (DIR32, 2, 32, 0, signed, false),
50 RL78REL (DIR24S, 2, 24, 0, signed, false),
51 RL78REL (DIR16, 1, 16, 0, dont, false),
52 RL78REL (DIR16U, 1, 16, 0, unsigned, false),
53 RL78REL (DIR16S, 1, 16, 0, signed, false),
54 RL78REL (DIR8, 0, 8, 0, dont, false),
55 RL78REL (DIR8U, 0, 8, 0, unsigned, false),
56 RL78REL (DIR8S, 0, 8, 0, signed, false),
57 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, true),
58 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, true),
59 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, true),
60 RL78REL (DIR16UL, 1, 16, 2, unsigned, false),
61 RL78REL (DIR16UW, 1, 16, 1, unsigned, false),
62 RL78REL (DIR8UL, 0, 8, 2, unsigned, false),
63 RL78REL (DIR8UW, 0, 8, 1, unsigned, false),
64 RL78REL (DIR32_REV, 1, 16, 0, dont, false),
65 RL78REL (DIR16_REV, 1, 16, 0, dont, false),
66 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, true),
67
68 EMPTY_HOWTO (0x13),
69 EMPTY_HOWTO (0x14),
70 EMPTY_HOWTO (0x15),
71 EMPTY_HOWTO (0x16),
72 EMPTY_HOWTO (0x17),
73 EMPTY_HOWTO (0x18),
74 EMPTY_HOWTO (0x19),
75 EMPTY_HOWTO (0x1a),
76 EMPTY_HOWTO (0x1b),
77 EMPTY_HOWTO (0x1c),
78 EMPTY_HOWTO (0x1d),
79 EMPTY_HOWTO (0x1e),
80 EMPTY_HOWTO (0x1f),
81
82 EMPTY_HOWTO (0x20),
83 EMPTY_HOWTO (0x21),
84 EMPTY_HOWTO (0x22),
85 EMPTY_HOWTO (0x23),
86 EMPTY_HOWTO (0x24),
87 EMPTY_HOWTO (0x25),
88 EMPTY_HOWTO (0x26),
89 EMPTY_HOWTO (0x27),
90 EMPTY_HOWTO (0x28),
91 EMPTY_HOWTO (0x29),
92 EMPTY_HOWTO (0x2a),
93 EMPTY_HOWTO (0x2b),
94 EMPTY_HOWTO (0x2c),
95 RL78REL (RH_RELAX, 0, 0, 0, dont, false),
96
97 EMPTY_HOWTO (0x2e),
98 RL78REL (RH_SADDR, 0, 0, 0, dont, false),
99 EMPTY_HOWTO (0x30),
100 EMPTY_HOWTO (0x31),
101 EMPTY_HOWTO (0x32),
102 EMPTY_HOWTO (0x33),
103 EMPTY_HOWTO (0x34),
104 EMPTY_HOWTO (0x35),
105 EMPTY_HOWTO (0x36),
106 EMPTY_HOWTO (0x37),
107 EMPTY_HOWTO (0x38),
108 EMPTY_HOWTO (0x39),
109 EMPTY_HOWTO (0x3a),
110 EMPTY_HOWTO (0x3b),
111 EMPTY_HOWTO (0x3c),
112 EMPTY_HOWTO (0x3d),
113 EMPTY_HOWTO (0x3e),
114 EMPTY_HOWTO (0x3f),
115 EMPTY_HOWTO (0x40),
116
117 RL78_OP_REL (ABS32, 2, 32, 0, dont, false),
118 RL78_OP_REL (ABS24S, 2, 24, 0, signed, false),
119 RL78_OP_REL (ABS16, 1, 16, 0, dont, false),
120 RL78_OP_REL (ABS16U, 1, 16, 0, unsigned, false),
121 RL78_OP_REL (ABS16S, 1, 16, 0, signed, false),
122 RL78_OP_REL (ABS8, 0, 8, 0, dont, false),
123 RL78_OP_REL (ABS8U, 0, 8, 0, unsigned, false),
124 RL78_OP_REL (ABS8S, 0, 8, 0, signed, false),
125 RL78_OP_REL (ABS24S_PCREL, 2, 24, 0, signed, true),
126 RL78_OP_REL (ABS16S_PCREL, 1, 16, 0, signed, true),
127 RL78_OP_REL (ABS8S_PCREL, 0, 8, 0, signed, true),
128 RL78_OP_REL (ABS16UL, 1, 16, 0, unsigned, false),
129 RL78_OP_REL (ABS16UW, 1, 16, 0, unsigned, false),
130 RL78_OP_REL (ABS8UL, 0, 8, 0, unsigned, false),
131 RL78_OP_REL (ABS8UW, 0, 8, 0, unsigned, false),
132 RL78_OP_REL (ABS32_REV, 2, 32, 0, dont, false),
133 RL78_OP_REL (ABS16_REV, 1, 16, 0, dont, false),
134
135 #define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32)
136
137 EMPTY_HOWTO (0x52),
138 EMPTY_HOWTO (0x53),
139 EMPTY_HOWTO (0x54),
140 EMPTY_HOWTO (0x55),
141 EMPTY_HOWTO (0x56),
142 EMPTY_HOWTO (0x57),
143 EMPTY_HOWTO (0x58),
144 EMPTY_HOWTO (0x59),
145 EMPTY_HOWTO (0x5a),
146 EMPTY_HOWTO (0x5b),
147 EMPTY_HOWTO (0x5c),
148 EMPTY_HOWTO (0x5d),
149 EMPTY_HOWTO (0x5e),
150 EMPTY_HOWTO (0x5f),
151 EMPTY_HOWTO (0x60),
152 EMPTY_HOWTO (0x61),
153 EMPTY_HOWTO (0x62),
154 EMPTY_HOWTO (0x63),
155 EMPTY_HOWTO (0x64),
156 EMPTY_HOWTO (0x65),
157 EMPTY_HOWTO (0x66),
158 EMPTY_HOWTO (0x67),
159 EMPTY_HOWTO (0x68),
160 EMPTY_HOWTO (0x69),
161 EMPTY_HOWTO (0x6a),
162 EMPTY_HOWTO (0x6b),
163 EMPTY_HOWTO (0x6c),
164 EMPTY_HOWTO (0x6d),
165 EMPTY_HOWTO (0x6e),
166 EMPTY_HOWTO (0x6f),
167 EMPTY_HOWTO (0x70),
168 EMPTY_HOWTO (0x71),
169 EMPTY_HOWTO (0x72),
170 EMPTY_HOWTO (0x73),
171 EMPTY_HOWTO (0x74),
172 EMPTY_HOWTO (0x75),
173 EMPTY_HOWTO (0x76),
174 EMPTY_HOWTO (0x77),
175
176 EMPTY_HOWTO (0x78),
177 EMPTY_HOWTO (0x79),
178 EMPTY_HOWTO (0x7a),
179 EMPTY_HOWTO (0x7b),
180 EMPTY_HOWTO (0x7c),
181 EMPTY_HOWTO (0x7d),
182 EMPTY_HOWTO (0x7e),
183 EMPTY_HOWTO (0x7f),
184
185 RL78_OP_REL (SYM, 2, 32, 0, dont, false),
186 RL78_OP_REL (OPneg, 2, 32, 0, dont, false),
187 RL78_OP_REL (OPadd, 2, 32, 0, dont, false),
188 RL78_OP_REL (OPsub, 2, 32, 0, dont, false),
189 RL78_OP_REL (OPmul, 2, 32, 0, dont, false),
190 RL78_OP_REL (OPdiv, 2, 32, 0, dont, false),
191 RL78_OP_REL (OPshla, 2, 32, 0, dont, false),
192 RL78_OP_REL (OPshra, 2, 32, 0, dont, false),
193 RL78_OP_REL (OPsctsize, 2, 32, 0, dont, false),
194 EMPTY_HOWTO (0x89),
195 EMPTY_HOWTO (0x8a),
196 EMPTY_HOWTO (0x8b),
197 EMPTY_HOWTO (0x8c),
198 RL78_OP_REL (OPscttop, 2, 32, 0, dont, false),
199 EMPTY_HOWTO (0x8e),
200 EMPTY_HOWTO (0x8f),
201 RL78_OP_REL (OPand, 2, 32, 0, dont, false),
202 RL78_OP_REL (OPor, 2, 32, 0, dont, false),
203 RL78_OP_REL (OPxor, 2, 32, 0, dont, false),
204 RL78_OP_REL (OPnot, 2, 32, 0, dont, false),
205 RL78_OP_REL (OPmod, 2, 32, 0, dont, false),
206 RL78_OP_REL (OPromtop, 2, 32, 0, dont, false),
207 RL78_OP_REL (OPramtop, 2, 32, 0, dont, false)
208 };
209 \f
210 /* Map BFD reloc types to RL78 ELF reloc types. */
211
212 struct rl78_reloc_map
213 {
214 bfd_reloc_code_real_type bfd_reloc_val;
215 unsigned int rl78_reloc_val;
216 };
217
218 static const struct rl78_reloc_map rl78_reloc_map [] =
219 {
220 { BFD_RELOC_NONE, R_RL78_NONE },
221 { BFD_RELOC_8, R_RL78_DIR8S },
222 { BFD_RELOC_16, R_RL78_DIR16S },
223 { BFD_RELOC_24, R_RL78_DIR24S },
224 { BFD_RELOC_32, R_RL78_DIR32 },
225 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 },
226 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL },
227 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL },
228 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL },
229 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL },
230 { BFD_RELOC_RL78_8U, R_RL78_DIR8U },
231 { BFD_RELOC_RL78_16U, R_RL78_DIR16U },
232 { BFD_RELOC_RL78_SYM, R_RL78_SYM },
233 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub },
234 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg },
235 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand },
236 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra },
237 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 },
238 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 },
239 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV },
240 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 },
241 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV },
242 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL },
243 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW },
244 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U },
245 { BFD_RELOC_RL78_SADDR, R_RL78_RH_SADDR },
246 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX }
247 };
248
249 static reloc_howto_type *
250 rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
251 bfd_reloc_code_real_type code)
252 {
253 unsigned int i;
254
255 if (code == BFD_RELOC_RL78_32_OP)
256 return rl78_elf_howto_table + R_RL78_DIR32;
257
258 for (i = ARRAY_SIZE (rl78_reloc_map); i--;)
259 if (rl78_reloc_map [i].bfd_reloc_val == code)
260 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val;
261
262 return NULL;
263 }
264
265 static reloc_howto_type *
266 rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
267 {
268 unsigned int i;
269
270 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++)
271 if (rl78_elf_howto_table[i].name != NULL
272 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0)
273 return rl78_elf_howto_table + i;
274
275 return NULL;
276 }
277
278 /* Set the howto pointer for an RL78 ELF reloc. */
279
280 static bool
281 rl78_info_to_howto_rela (bfd * abfd,
282 arelent * cache_ptr,
283 Elf_Internal_Rela * dst)
284 {
285 unsigned int r_type;
286
287 r_type = ELF32_R_TYPE (dst->r_info);
288 if (r_type >= (unsigned int) R_RL78_max)
289 {
290 /* xgettext:c-format */
291 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
292 abfd, r_type);
293 bfd_set_error (bfd_error_bad_value);
294 return false;
295 }
296 cache_ptr->howto = rl78_elf_howto_table + r_type;
297 return true;
298 }
299 \f
300 static bfd_vma
301 get_symbol_value (const char * name,
302 struct bfd_link_info * info,
303 bfd * input_bfd,
304 asection * input_section,
305 int offset)
306 {
307 struct bfd_link_hash_entry * h;
308
309 if (info == NULL)
310 return 0;
311
312 h = bfd_link_hash_lookup (info->hash, name, false, false, true);
313
314 if (h == NULL
315 || (h->type != bfd_link_hash_defined
316 && h->type != bfd_link_hash_defweak))
317 {
318 (*info->callbacks->undefined_symbol)
319 (info, name, input_bfd, input_section, offset, true);
320 return 0;
321 }
322
323 return (h->u.def.value
324 + h->u.def.section->output_section->vma
325 + h->u.def.section->output_offset);
326 }
327
328 static bfd_vma
329 get_romstart (struct bfd_link_info * info,
330 bfd * abfd,
331 asection * sec,
332 int offset)
333 {
334 static bool cached = false;
335 static bfd_vma cached_value = 0;
336
337 if (!cached)
338 {
339 cached_value = get_symbol_value ("_start", info, abfd, sec, offset);
340 cached = true;
341 }
342 return cached_value;
343 }
344
345 static bfd_vma
346 get_ramstart (struct bfd_link_info * info,
347 bfd * abfd,
348 asection * sec,
349 int offset)
350 {
351 static bool cached = false;
352 static bfd_vma cached_value = 0;
353
354 if (!cached)
355 {
356 cached_value = get_symbol_value ("__datastart", info, abfd, sec, offset);
357 cached = true;
358 }
359 return cached_value;
360 }
361
362 #define NUM_STACK_ENTRIES 16
363 static int32_t rl78_stack [ NUM_STACK_ENTRIES ];
364 static unsigned int rl78_stack_top;
365
366 static inline void
367 rl78_stack_push (bfd_vma val, bfd_reloc_status_type *r)
368 {
369 if (rl78_stack_top < NUM_STACK_ENTRIES)
370 rl78_stack[rl78_stack_top++] = val;
371 else
372 *r = bfd_reloc_dangerous;
373 }
374
375 static inline bfd_vma
376 rl78_stack_pop (bfd_reloc_status_type *r)
377 {
378 if (rl78_stack_top > 0)
379 return rl78_stack[-- rl78_stack_top];
380 else
381 *r = bfd_reloc_dangerous;
382 return 0;
383 }
384
385 /* Special handling for RL78 complex relocs. Returns the
386 value of the reloc, or 0 for relocs which do not generate
387 a result. SYMVAL is the value of the symbol for relocs
388 which use a symbolic argument. */
389
390 static bfd_vma
391 rl78_compute_complex_reloc (unsigned long r_type,
392 bfd_vma symval,
393 asection *input_section,
394 bfd_reloc_status_type *r,
395 char **error_message)
396 {
397 int32_t tmp1, tmp2;
398 bfd_vma relocation = 0;
399 bfd_reloc_status_type stat = bfd_reloc_ok;
400
401 switch (r_type)
402 {
403 default:
404 stat = bfd_reloc_notsupported;
405 break;
406
407 case R_RL78_ABS24S_PCREL:
408 case R_RL78_ABS16S_PCREL:
409 case R_RL78_ABS8S_PCREL:
410 relocation = rl78_stack_pop (&stat);
411 relocation -= input_section->output_section->vma + input_section->output_offset;
412 break;
413
414 case R_RL78_ABS32:
415 case R_RL78_ABS32_REV:
416 case R_RL78_ABS16:
417 case R_RL78_ABS16_REV:
418 case R_RL78_ABS16S:
419 case R_RL78_ABS16U:
420 case R_RL78_ABS8:
421 case R_RL78_ABS8U:
422 case R_RL78_ABS8S:
423 relocation = rl78_stack_pop (&stat);
424 break;
425
426 case R_RL78_ABS16UL:
427 case R_RL78_ABS8UL:
428 relocation = rl78_stack_pop (&stat) >> 2;
429 break;;
430
431 case R_RL78_ABS16UW:
432 case R_RL78_ABS8UW:
433 relocation = rl78_stack_pop (&stat) >> 1;
434 break;
435
436 /* The rest of the relocs compute values and then push them onto the stack. */
437 case R_RL78_OPramtop:
438 case R_RL78_OPromtop:
439 case R_RL78_SYM:
440 rl78_stack_push (symval, &stat);
441 break;
442
443 case R_RL78_OPneg:
444 tmp1 = rl78_stack_pop (&stat);
445 tmp1 = - tmp1;
446 rl78_stack_push (tmp1, &stat);
447 break;
448
449 case R_RL78_OPadd:
450 tmp2 = rl78_stack_pop (&stat);
451 tmp1 = rl78_stack_pop (&stat);
452 tmp1 += tmp2;
453 rl78_stack_push (tmp1, &stat);
454 break;
455
456 case R_RL78_OPsub:
457 /* For the expression "A - B", the assembler pushes A,
458 then B, then OPSUB. So the first op we pop is B, not A. */
459 tmp2 = rl78_stack_pop (&stat); /* B */
460 tmp1 = rl78_stack_pop (&stat); /* A */
461 tmp1 -= tmp2; /* A - B */
462 rl78_stack_push (tmp1, &stat);
463 break;
464
465 case R_RL78_OPmul:
466 tmp2 = rl78_stack_pop (&stat);
467 tmp1 = rl78_stack_pop (&stat);
468 tmp1 *= tmp2;
469 rl78_stack_push (tmp1, &stat);
470 break;
471
472 case R_RL78_OPdiv:
473 tmp2 = rl78_stack_pop (&stat);
474 tmp1 = rl78_stack_pop (&stat);
475 if (tmp2 != 0)
476 tmp1 /= tmp2;
477 else
478 {
479 tmp1 = 0;
480 stat = bfd_reloc_overflow;
481 }
482 rl78_stack_push (tmp1, &stat);
483 break;
484
485 case R_RL78_OPshla:
486 tmp2 = rl78_stack_pop (&stat);
487 tmp1 = rl78_stack_pop (&stat);
488 tmp1 <<= tmp2;
489 rl78_stack_push (tmp1, &stat);
490 break;
491
492 case R_RL78_OPshra:
493 tmp2 = rl78_stack_pop (&stat);
494 tmp1 = rl78_stack_pop (&stat);
495 tmp1 >>= tmp2;
496 rl78_stack_push (tmp1, &stat);
497 break;
498
499 case R_RL78_OPsctsize:
500 rl78_stack_push (input_section->size, &stat);
501 break;
502
503 case R_RL78_OPscttop:
504 rl78_stack_push (input_section->output_section->vma, &stat);
505 break;
506
507 case R_RL78_OPand:
508 tmp2 = rl78_stack_pop (&stat);
509 tmp1 = rl78_stack_pop (&stat);
510 tmp1 &= tmp2;
511 rl78_stack_push (tmp1, &stat);
512 break;
513
514 case R_RL78_OPor:
515 tmp2 = rl78_stack_pop (&stat);
516 tmp1 = rl78_stack_pop (&stat);
517 tmp1 |= tmp2;
518 rl78_stack_push (tmp1, &stat);
519 break;
520
521 case R_RL78_OPxor:
522 tmp2 = rl78_stack_pop (&stat);
523 tmp1 = rl78_stack_pop (&stat);
524 tmp1 ^= tmp2;
525 rl78_stack_push (tmp1, &stat);
526 break;
527
528 case R_RL78_OPnot:
529 tmp1 = rl78_stack_pop (&stat);
530 tmp1 = ~ tmp1;
531 rl78_stack_push (tmp1, &stat);
532 break;
533
534 case R_RL78_OPmod:
535 tmp2 = rl78_stack_pop (&stat);
536 tmp1 = rl78_stack_pop (&stat);
537 if (tmp2 != 0)
538 tmp1 %= tmp2;
539 else
540 {
541 tmp1 = 0;
542 stat = bfd_reloc_overflow;
543 }
544 rl78_stack_push (tmp1, &stat);
545 break;
546 }
547
548 if (r)
549 {
550 if (stat == bfd_reloc_dangerous)
551 *error_message = (_("RL78 reloc stack overflow/underflow"));
552 else if (stat == bfd_reloc_overflow)
553 {
554 stat = bfd_reloc_dangerous;
555 *error_message = (_("RL78 reloc divide by zero"));
556 }
557 *r = stat;
558 }
559 return relocation;
560 }
561
562 #define OP(i) (contents[reloc->address + (i)])
563
564 static bfd_reloc_status_type
565 rl78_special_reloc (bfd * input_bfd,
566 arelent * reloc,
567 asymbol * symbol,
568 void * data,
569 asection * input_section,
570 bfd * output_bfd ATTRIBUTE_UNUSED,
571 char ** error_message)
572 {
573 bfd_reloc_status_type r = bfd_reloc_ok;
574 bfd_vma relocation = 0;
575 unsigned long r_type = reloc->howto->type;
576 bfd_byte * contents = data;
577
578 /* If necessary, compute the symbolic value of the relocation. */
579 switch (r_type)
580 {
581 case R_RL78_SYM:
582 relocation = (symbol->value
583 + symbol->section->output_section->vma
584 + symbol->section->output_offset
585 + reloc->addend);
586 break;
587
588 case R_RL78_OPromtop:
589 relocation = get_romstart (NULL, input_bfd, input_section,
590 reloc->address);
591 break;
592
593 case R_RL78_OPramtop:
594 relocation = get_ramstart (NULL, input_bfd, input_section,
595 reloc->address);
596 break;
597 }
598
599 /* Get the value of the relocation. */
600 relocation = rl78_compute_complex_reloc (r_type, relocation, input_section,
601 &r, error_message);
602
603 /* If the relocation alters the contents of the section then apply it now.
604 Note - since this function is called from
605 bfd_generic_get_relocated_section_contents via bfd_perform_relocation,
606 and not from the linker, we do not perform any range checking. The
607 clients who are calling us are only interested in some relocated section
608 contents, and not any linkage problems that might occur later. */
609 switch (r_type)
610 {
611 case R_RL78_ABS32:
612 OP (0) = relocation;
613 OP (1) = relocation >> 8;
614 OP (2) = relocation >> 16;
615 OP (3) = relocation >> 24;
616 break;
617
618 case R_RL78_ABS32_REV:
619 OP (3) = relocation;
620 OP (2) = relocation >> 8;
621 OP (1) = relocation >> 16;
622 OP (0) = relocation >> 24;
623 break;
624
625 case R_RL78_ABS24S_PCREL:
626 case R_RL78_ABS24S:
627 OP (0) = relocation;
628 OP (1) = relocation >> 8;
629 OP (2) = relocation >> 16;
630 break;
631
632 case R_RL78_ABS16_REV:
633 OP (1) = relocation;
634 OP (0) = relocation >> 8;
635 break;
636
637 case R_RL78_ABS16S_PCREL:
638 case R_RL78_ABS16:
639 case R_RL78_ABS16S:
640 case R_RL78_ABS16U:
641 case R_RL78_ABS16UL:
642 case R_RL78_ABS16UW:
643 OP (0) = relocation;
644 OP (1) = relocation >> 8;
645 break;
646
647 case R_RL78_ABS8S_PCREL:
648 case R_RL78_ABS8:
649 case R_RL78_ABS8U:
650 case R_RL78_ABS8UL:
651 case R_RL78_ABS8UW:
652 case R_RL78_ABS8S:
653 OP (0) = relocation;
654 break;
655
656 default:
657 break;
658 }
659
660 return r;
661 }
662
663 #undef OP
664 #define OP(i) (contents[rel->r_offset + (i)])
665
666 /* Relocate an RL78 ELF section.
667 There is some attempt to make this function usable for many architectures,
668 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
669 if only to serve as a learning tool.
670
671 The RELOCATE_SECTION function is called by the new ELF backend linker
672 to handle the relocations for a section.
673
674 The relocs are always passed as Rela structures; if the section
675 actually uses Rel structures, the r_addend field will always be
676 zero.
677
678 This function is responsible for adjusting the section contents as
679 necessary, and (if using Rela relocs and generating a relocatable
680 output file) adjusting the reloc addend as necessary.
681
682 This function does not have to worry about setting the reloc
683 address or the reloc symbol index.
684
685 LOCAL_SYMS is a pointer to the swapped in local symbols.
686
687 LOCAL_SECTIONS is an array giving the section in the input file
688 corresponding to the st_shndx field of each local symbol.
689
690 The global hash table entry for the global symbols can be found
691 via elf_sym_hashes (input_bfd).
692
693 When generating relocatable output, this function must handle
694 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
695 going to be the section symbol corresponding to the output
696 section, which means that the addend must be adjusted
697 accordingly. */
698
699 static int
700 rl78_elf_relocate_section
701 (bfd * output_bfd,
702 struct bfd_link_info * info,
703 bfd * input_bfd,
704 asection * input_section,
705 bfd_byte * contents,
706 Elf_Internal_Rela * relocs,
707 Elf_Internal_Sym * local_syms,
708 asection ** local_sections)
709 {
710 Elf_Internal_Shdr * symtab_hdr;
711 struct elf_link_hash_entry ** sym_hashes;
712 Elf_Internal_Rela * rel;
713 Elf_Internal_Rela * relend;
714 asection *splt;
715 bool ret;
716
717 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
718 sym_hashes = elf_sym_hashes (input_bfd);
719 relend = relocs + input_section->reloc_count;
720
721 splt = elf_hash_table (info)->splt;
722 ret = true;
723 for (rel = relocs; rel < relend; rel ++)
724 {
725 reloc_howto_type *howto;
726 unsigned long r_symndx;
727 Elf_Internal_Sym *sym;
728 asection *sec;
729 struct elf_link_hash_entry *h;
730 bfd_vma relocation;
731 bfd_reloc_status_type r;
732 const char *name = NULL;
733 bool unresolved_reloc = true;
734 int r_type;
735 char *error_message;
736
737 r_type = ELF32_R_TYPE (rel->r_info);
738 r_symndx = ELF32_R_SYM (rel->r_info);
739
740 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info);
741 h = NULL;
742 sym = NULL;
743 sec = NULL;
744 relocation = 0;
745
746 if (r_symndx < symtab_hdr->sh_info)
747 {
748 sym = local_syms + r_symndx;
749 sec = local_sections [r_symndx];
750 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
751
752 name = bfd_elf_string_from_elf_section
753 (input_bfd, symtab_hdr->sh_link, sym->st_name);
754 name = sym->st_name == 0 ? bfd_section_name (sec) : name;
755 }
756 else
757 {
758 bool warned ATTRIBUTE_UNUSED;
759 bool ignored ATTRIBUTE_UNUSED;
760
761 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
762 r_symndx, symtab_hdr, sym_hashes, h,
763 sec, relocation, unresolved_reloc,
764 warned, ignored);
765
766 name = h->root.root.string;
767 }
768
769 if (sec != NULL && discarded_section (sec))
770 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
771 rel, 1, relend, howto, 0, contents);
772
773 if (bfd_link_relocatable (info))
774 {
775 /* This is a relocatable link. We don't have to change
776 anything, unless the reloc is against a section symbol,
777 in which case we have to adjust according to where the
778 section symbol winds up in the output section. */
779 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
780 rel->r_addend += sec->output_offset;
781 continue;
782 }
783
784 switch (ELF32_R_TYPE (rel->r_info))
785 {
786 case R_RL78_DIR16S:
787 {
788 bfd_vma *plt_offset;
789
790 if (h != NULL)
791 plt_offset = &h->plt.offset;
792 else
793 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx;
794
795 if (! valid_16bit_address (relocation))
796 {
797 /* If this is the first time we've processed this symbol,
798 fill in the plt entry with the correct symbol address. */
799 if ((*plt_offset & 1) == 0)
800 {
801 unsigned int x;
802
803 x = 0x000000ec; /* br !!abs24 */
804 x |= (relocation << 8) & 0xffffff00;
805 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset);
806 *plt_offset |= 1;
807 }
808
809 relocation = (splt->output_section->vma
810 + splt->output_offset
811 + (*plt_offset & -2));
812 if (name)
813 {
814 char *newname = bfd_malloc (strlen(name)+5);
815 strcpy (newname, name);
816 strcat(newname, ".plt");
817 _bfd_generic_link_add_one_symbol (info,
818 input_bfd,
819 newname,
820 BSF_FUNCTION | BSF_WEAK,
821 splt,
822 (*plt_offset & -2),
823 0,
824 1,
825 0,
826 0);
827 }
828 }
829 }
830 break;
831 }
832
833 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
834 /* If the symbol is undefined and weak
835 then the relocation resolves to zero. */
836 relocation = 0;
837 else
838 {
839 if (howto->pc_relative)
840 {
841 relocation -= (input_section->output_section->vma
842 + input_section->output_offset
843 + rel->r_offset);
844 relocation -= bfd_get_reloc_size (howto);
845 }
846
847 relocation += rel->r_addend;
848 }
849
850 r = bfd_reloc_ok;
851
852 #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
853
854 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
855 switch (r_type)
856 {
857 case R_RL78_NONE:
858 break;
859
860 case R_RL78_RH_RELAX:
861 break;
862
863 case R_RL78_DIR8S_PCREL:
864 RANGE (-128, 127);
865 OP (0) = relocation;
866 break;
867
868 case R_RL78_DIR8S:
869 RANGE (-128, 255);
870 OP (0) = relocation;
871 break;
872
873 case R_RL78_DIR8U:
874 RANGE (0, 255);
875 OP (0) = relocation;
876 break;
877
878 case R_RL78_DIR16S_PCREL:
879 RANGE (-32768, 32767);
880 OP (0) = relocation;
881 OP (1) = relocation >> 8;
882 break;
883
884 case R_RL78_DIR16S:
885 if ((relocation & 0xf0000) == 0xf0000)
886 relocation &= 0xffff;
887 RANGE (-32768, 65535);
888 OP (0) = relocation;
889 OP (1) = relocation >> 8;
890 break;
891
892 case R_RL78_DIR16U:
893 RANGE (0, 65536);
894 OP (0) = relocation;
895 OP (1) = relocation >> 8;
896 break;
897
898 case R_RL78_DIR16:
899 RANGE (-32768, 65536);
900 OP (0) = relocation;
901 OP (1) = relocation >> 8;
902 break;
903
904 case R_RL78_DIR16_REV:
905 RANGE (-32768, 65536);
906 OP (1) = relocation;
907 OP (0) = relocation >> 8;
908 break;
909
910 case R_RL78_DIR3U_PCREL:
911 RANGE (3, 10);
912 OP (0) &= 0xf8;
913 OP (0) |= relocation & 0x07;
914 break;
915
916 case R_RL78_DIR24S_PCREL:
917 RANGE (-0x800000, 0x7fffff);
918 OP (0) = relocation;
919 OP (1) = relocation >> 8;
920 OP (2) = relocation >> 16;
921 break;
922
923 case R_RL78_DIR24S:
924 RANGE (-0x800000, 0x7fffff);
925 OP (0) = relocation;
926 OP (1) = relocation >> 8;
927 OP (2) = relocation >> 16;
928 break;
929
930 case R_RL78_DIR32:
931 OP (0) = relocation;
932 OP (1) = relocation >> 8;
933 OP (2) = relocation >> 16;
934 OP (3) = relocation >> 24;
935 break;
936
937 case R_RL78_DIR32_REV:
938 OP (3) = relocation;
939 OP (2) = relocation >> 8;
940 OP (1) = relocation >> 16;
941 OP (0) = relocation >> 24;
942 break;
943
944 case R_RL78_RH_SFR:
945 RANGE (0xfff00, 0xfffff);
946 OP (0) = relocation & 0xff;
947 break;
948
949 case R_RL78_RH_SADDR:
950 RANGE (0xffe20, 0xfff1f);
951 OP (0) = (relocation - 0x20) & 0xff;
952 break;
953
954 /* Complex reloc handling: */
955 case R_RL78_ABS32:
956 case R_RL78_ABS32_REV:
957 case R_RL78_ABS24S_PCREL:
958 case R_RL78_ABS24S:
959 case R_RL78_ABS16:
960 case R_RL78_ABS16_REV:
961 case R_RL78_ABS16S_PCREL:
962 case R_RL78_ABS16S:
963 case R_RL78_ABS16U:
964 case R_RL78_ABS16UL:
965 case R_RL78_ABS16UW:
966 case R_RL78_ABS8:
967 case R_RL78_ABS8U:
968 case R_RL78_ABS8UL:
969 case R_RL78_ABS8UW:
970 case R_RL78_ABS8S_PCREL:
971 case R_RL78_ABS8S:
972 case R_RL78_OPneg:
973 case R_RL78_OPadd:
974 case R_RL78_OPsub:
975 case R_RL78_OPmul:
976 case R_RL78_OPdiv:
977 case R_RL78_OPshla:
978 case R_RL78_OPshra:
979 case R_RL78_OPsctsize:
980 case R_RL78_OPscttop:
981 case R_RL78_OPand:
982 case R_RL78_OPor:
983 case R_RL78_OPxor:
984 case R_RL78_OPnot:
985 case R_RL78_OPmod:
986 relocation = rl78_compute_complex_reloc (r_type, 0, input_section,
987 &r, &error_message);
988
989 switch (r_type)
990 {
991 case R_RL78_ABS32:
992 OP (0) = relocation;
993 OP (1) = relocation >> 8;
994 OP (2) = relocation >> 16;
995 OP (3) = relocation >> 24;
996 break;
997
998 case R_RL78_ABS32_REV:
999 OP (3) = relocation;
1000 OP (2) = relocation >> 8;
1001 OP (1) = relocation >> 16;
1002 OP (0) = relocation >> 24;
1003 break;
1004
1005 case R_RL78_ABS24S_PCREL:
1006 case R_RL78_ABS24S:
1007 RANGE (-0x800000, 0x7fffff);
1008 OP (0) = relocation;
1009 OP (1) = relocation >> 8;
1010 OP (2) = relocation >> 16;
1011 break;
1012
1013 case R_RL78_ABS16:
1014 RANGE (-32768, 65535);
1015 OP (0) = relocation;
1016 OP (1) = relocation >> 8;
1017 break;
1018
1019 case R_RL78_ABS16_REV:
1020 RANGE (-32768, 65535);
1021 OP (1) = relocation;
1022 OP (0) = relocation >> 8;
1023 break;
1024
1025 case R_RL78_ABS16S_PCREL:
1026 case R_RL78_ABS16S:
1027 RANGE (-32768, 32767);
1028 OP (0) = relocation;
1029 OP (1) = relocation >> 8;
1030 break;
1031
1032 case R_RL78_ABS16U:
1033 case R_RL78_ABS16UL:
1034 case R_RL78_ABS16UW:
1035 RANGE (0, 65536);
1036 OP (0) = relocation;
1037 OP (1) = relocation >> 8;
1038 break;
1039
1040 case R_RL78_ABS8:
1041 RANGE (-128, 255);
1042 OP (0) = relocation;
1043 break;
1044
1045 case R_RL78_ABS8U:
1046 case R_RL78_ABS8UL:
1047 case R_RL78_ABS8UW:
1048 RANGE (0, 255);
1049 OP (0) = relocation;
1050 break;
1051
1052 case R_RL78_ABS8S_PCREL:
1053 case R_RL78_ABS8S:
1054 RANGE (-128, 127);
1055 OP (0) = relocation;
1056 break;
1057
1058 default:
1059 break;
1060 }
1061 break;
1062
1063 case R_RL78_SYM:
1064 if (r_symndx < symtab_hdr->sh_info)
1065 relocation = sec->output_section->vma + sec->output_offset
1066 + sym->st_value + rel->r_addend;
1067 else if (h != NULL
1068 && (h->root.type == bfd_link_hash_defined
1069 || h->root.type == bfd_link_hash_defweak))
1070 relocation = h->root.u.def.value
1071 + sec->output_section->vma
1072 + sec->output_offset
1073 + rel->r_addend;
1074 else
1075 {
1076 relocation = 0;
1077 if (h->root.type != bfd_link_hash_undefweak)
1078 _bfd_error_handler
1079 (_("warning: RL78_SYM reloc with an unknown symbol"));
1080 }
1081 (void) rl78_compute_complex_reloc (r_type, relocation, input_section,
1082 &r, &error_message);
1083 break;
1084
1085 case R_RL78_OPromtop:
1086 relocation = get_romstart (info, input_bfd, input_section, rel->r_offset);
1087 (void) rl78_compute_complex_reloc (r_type, relocation, input_section,
1088 &r, &error_message);
1089 break;
1090
1091 case R_RL78_OPramtop:
1092 relocation = get_ramstart (info, input_bfd, input_section, rel->r_offset);
1093 (void) rl78_compute_complex_reloc (r_type, relocation, input_section,
1094 &r, &error_message);
1095 break;
1096
1097 default:
1098 r = bfd_reloc_notsupported;
1099 break;
1100 }
1101
1102 if (r != bfd_reloc_ok)
1103 {
1104 switch (r)
1105 {
1106 case bfd_reloc_overflow:
1107 (*info->callbacks->reloc_overflow)
1108 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
1109 input_bfd, input_section, rel->r_offset);
1110 break;
1111
1112 case bfd_reloc_undefined:
1113 (*info->callbacks->undefined_symbol)
1114 (info, name, input_bfd, input_section, rel->r_offset, true);
1115 break;
1116
1117 case bfd_reloc_outofrange:
1118 /* xgettext:c-format */
1119 (*info->callbacks->einfo)
1120 (_("%H: %s out of range\n"),
1121 input_bfd, input_section, rel->r_offset, howto->name);
1122 break;
1123
1124 case bfd_reloc_notsupported:
1125 /* xgettext:c-format */
1126 (*info->callbacks->einfo)
1127 (_("%H: relocation type %u is not supported\n"),
1128 input_bfd, input_section, rel->r_offset, r_type);
1129 break;
1130
1131 case bfd_reloc_dangerous:
1132 (*info->callbacks->reloc_dangerous)
1133 (info, error_message, input_bfd, input_section, rel->r_offset);
1134 break;
1135
1136 default:
1137 /* xgettext:c-format */
1138 (*info->callbacks->einfo)
1139 (_("%H: relocation %s returns an unrecognized value %x\n"),
1140 input_bfd, input_section, rel->r_offset, howto->name, r);
1141 break;
1142 }
1143 ret = false;
1144 }
1145 }
1146
1147 return ret;
1148 }
1149 \f
1150 /* Function to set the ELF flag bits. */
1151
1152 static bool
1153 rl78_elf_set_private_flags (bfd * abfd, flagword flags)
1154 {
1155 elf_elfheader (abfd)->e_flags = flags;
1156 elf_flags_init (abfd) = true;
1157 return true;
1158 }
1159
1160 static bool no_warn_mismatch = false;
1161
1162 void bfd_elf32_rl78_set_target_flags (bool);
1163
1164 void
1165 bfd_elf32_rl78_set_target_flags (bool user_no_warn_mismatch)
1166 {
1167 no_warn_mismatch = user_no_warn_mismatch;
1168 }
1169
1170 static const char *
1171 rl78_cpu_name (flagword flags)
1172 {
1173 switch (flags & E_FLAG_RL78_CPU_MASK)
1174 {
1175 default: return "";
1176 case E_FLAG_RL78_G10: return "G10";
1177 case E_FLAG_RL78_G13: return "G13";
1178 case E_FLAG_RL78_G14: return "G14";
1179 }
1180 }
1181
1182 /* Merge backend specific data from an object file to the output
1183 object file when linking. */
1184
1185 static bool
1186 rl78_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
1187 {
1188 bfd *obfd = info->output_bfd;
1189 flagword new_flags;
1190 flagword old_flags;
1191 bool error = false;
1192
1193 new_flags = elf_elfheader (ibfd)->e_flags;
1194 old_flags = elf_elfheader (obfd)->e_flags;
1195
1196 if (!elf_flags_init (obfd))
1197 {
1198 /* First call, no flags set. */
1199 elf_flags_init (obfd) = true;
1200 elf_elfheader (obfd)->e_flags = new_flags;
1201 }
1202 else if (old_flags != new_flags)
1203 {
1204 flagword changed_flags = old_flags ^ new_flags;
1205
1206 if (changed_flags & E_FLAG_RL78_CPU_MASK)
1207 {
1208 flagword out_cpu = old_flags & E_FLAG_RL78_CPU_MASK;
1209 flagword in_cpu = new_flags & E_FLAG_RL78_CPU_MASK;
1210
1211 if (in_cpu == E_FLAG_RL78_ANY_CPU || in_cpu == out_cpu)
1212 /* It does not matter what new_cpu may have. */;
1213 else if (out_cpu == E_FLAG_RL78_ANY_CPU)
1214 {
1215 if (in_cpu == E_FLAG_RL78_G10)
1216 {
1217 /* G10 files can only be linked with other G10 files.
1218 If the output is set to "any" this means that it is
1219 a G14 file that does not use hardware multiply/divide,
1220 but that is still incompatible with the G10 ABI. */
1221 error = true;
1222
1223 _bfd_error_handler
1224 /* xgettext:c-format */
1225 (_("RL78 ABI conflict: G10 file %pB cannot be linked"
1226 " with %s file %pB"),
1227 ibfd, rl78_cpu_name (out_cpu), obfd);
1228 }
1229 else
1230 {
1231 old_flags &= ~ E_FLAG_RL78_CPU_MASK;
1232 old_flags |= in_cpu;
1233 elf_elfheader (obfd)->e_flags = old_flags;
1234 }
1235 }
1236 else
1237 {
1238 error = true;
1239
1240 _bfd_error_handler
1241 /* xgettext:c-format */
1242 (_("RL78 ABI conflict: cannot link %s file %pB with %s file %pB"),
1243 rl78_cpu_name (in_cpu), ibfd,
1244 rl78_cpu_name (out_cpu), obfd);
1245 }
1246 }
1247
1248 if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES)
1249 {
1250 _bfd_error_handler
1251 (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together"));
1252
1253 if (old_flags & E_FLAG_RL78_64BIT_DOUBLES)
1254 /* xgettext:c-format */
1255 _bfd_error_handler (_("- %pB is 64-bit, %pB is not"),
1256 obfd, ibfd);
1257 else
1258 /* xgettext:c-format */
1259 _bfd_error_handler (_("- %pB is 64-bit, %pB is not"),
1260 ibfd, obfd);
1261 error = true;
1262 }
1263 }
1264
1265 return !error;
1266 }
1267 \f
1268 static bool
1269 rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr)
1270 {
1271 FILE * file = (FILE *) ptr;
1272 flagword flags;
1273
1274 BFD_ASSERT (abfd != NULL && ptr != NULL);
1275
1276 /* Print normal ELF private data. */
1277 _bfd_elf_print_private_bfd_data (abfd, ptr);
1278
1279 flags = elf_elfheader (abfd)->e_flags;
1280 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
1281
1282 if (flags & E_FLAG_RL78_CPU_MASK)
1283 fprintf (file, " [%s]", rl78_cpu_name (flags));
1284
1285 if (flags & E_FLAG_RL78_64BIT_DOUBLES)
1286 fprintf (file, _(" [64-bit doubles]"));
1287
1288 fputc ('\n', file);
1289 return true;
1290 }
1291
1292 /* Return the MACH for an e_flags value. */
1293
1294 static int
1295 elf32_rl78_machine (bfd * abfd ATTRIBUTE_UNUSED)
1296 {
1297 return bfd_mach_rl78;
1298 }
1299
1300 static bool
1301 rl78_elf_object_p (bfd * abfd)
1302 {
1303 bfd_default_set_arch_mach (abfd, bfd_arch_rl78,
1304 elf32_rl78_machine (abfd));
1305 return true;
1306 }
1307 \f
1308 /* support PLT for 16-bit references to 24-bit functions. */
1309
1310 /* We support 16-bit pointers to code above 64k by generating a thunk
1311 below 64k containing a JMP instruction to the final address. */
1312
1313 static bool
1314 rl78_elf_check_relocs
1315 (bfd * abfd,
1316 struct bfd_link_info * info,
1317 asection * sec,
1318 const Elf_Internal_Rela * relocs)
1319 {
1320 Elf_Internal_Shdr * symtab_hdr;
1321 struct elf_link_hash_entry ** sym_hashes;
1322 const Elf_Internal_Rela * rel;
1323 const Elf_Internal_Rela * rel_end;
1324 bfd_vma *local_plt_offsets;
1325 asection *splt;
1326 bfd *dynobj;
1327
1328 if (bfd_link_relocatable (info))
1329 return true;
1330
1331 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1332 sym_hashes = elf_sym_hashes (abfd);
1333 local_plt_offsets = elf_local_got_offsets (abfd);
1334 dynobj = elf_hash_table(info)->dynobj;
1335
1336 rel_end = relocs + sec->reloc_count;
1337 for (rel = relocs; rel < rel_end; rel++)
1338 {
1339 struct elf_link_hash_entry *h;
1340 unsigned long r_symndx;
1341 bfd_vma *offset;
1342
1343 r_symndx = ELF32_R_SYM (rel->r_info);
1344 if (r_symndx < symtab_hdr->sh_info)
1345 h = NULL;
1346 else
1347 {
1348 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1349 while (h->root.type == bfd_link_hash_indirect
1350 || h->root.type == bfd_link_hash_warning)
1351 h = (struct elf_link_hash_entry *) h->root.u.i.link;
1352 }
1353
1354 switch (ELF32_R_TYPE (rel->r_info))
1355 {
1356 /* This relocation describes a 16-bit pointer to a function.
1357 We may need to allocate a thunk in low memory; reserve memory
1358 for it now. */
1359 case R_RL78_DIR16S:
1360 if (dynobj == NULL)
1361 elf_hash_table (info)->dynobj = dynobj = abfd;
1362 splt = elf_hash_table (info)->splt;
1363 if (splt == NULL)
1364 {
1365 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
1366 | SEC_IN_MEMORY | SEC_LINKER_CREATED
1367 | SEC_READONLY | SEC_CODE);
1368 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt",
1369 flags);
1370 elf_hash_table (info)->splt = splt;
1371 if (splt == NULL
1372 || !bfd_set_section_alignment (splt, 1))
1373 return false;
1374 }
1375
1376 if (h != NULL)
1377 offset = &h->plt.offset;
1378 else
1379 {
1380 if (local_plt_offsets == NULL)
1381 {
1382 size_t size;
1383 unsigned int i;
1384
1385 size = symtab_hdr->sh_info * sizeof (bfd_vma);
1386 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size);
1387 if (local_plt_offsets == NULL)
1388 return false;
1389 elf_local_got_offsets (abfd) = local_plt_offsets;
1390
1391 for (i = 0; i < symtab_hdr->sh_info; i++)
1392 local_plt_offsets[i] = (bfd_vma) -1;
1393 }
1394 offset = &local_plt_offsets[r_symndx];
1395 }
1396
1397 if (*offset == (bfd_vma) -1)
1398 {
1399 *offset = splt->size;
1400 splt->size += 4;
1401 }
1402 break;
1403 }
1404 }
1405
1406 return true;
1407 }
1408
1409 /* This must exist if dynobj is ever set. */
1410
1411 static bool
1412 rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED,
1413 struct bfd_link_info *info)
1414 {
1415 bfd *dynobj;
1416 asection *splt;
1417
1418 if (!elf_hash_table (info)->dynamic_sections_created)
1419 return true;
1420
1421 /* As an extra sanity check, verify that all plt entries have been
1422 filled in. However, relaxing might have changed the relocs so
1423 that some plt entries don't get filled in, so we have to skip
1424 this check if we're relaxing. Unfortunately, check_relocs is
1425 called before relaxation. */
1426
1427 if (info->relax_trip > 0)
1428 return true;
1429
1430 dynobj = elf_hash_table (info)->dynobj;
1431 splt = elf_hash_table (info)->splt;
1432 if (dynobj != NULL && splt != NULL)
1433 {
1434 bfd_byte *contents = splt->contents;
1435 unsigned int i, size = splt->size;
1436
1437 for (i = 0; i < size; i += 4)
1438 {
1439 unsigned int x = bfd_get_32 (dynobj, contents + i);
1440 BFD_ASSERT (x != 0);
1441 }
1442 }
1443
1444 return true;
1445 }
1446
1447 static bool
1448 rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
1449 struct bfd_link_info *info)
1450 {
1451 bfd *dynobj;
1452 asection *splt;
1453
1454 if (bfd_link_relocatable (info))
1455 return true;
1456
1457 dynobj = elf_hash_table (info)->dynobj;
1458 if (dynobj == NULL)
1459 return true;
1460
1461 splt = elf_hash_table (info)->splt;
1462 BFD_ASSERT (splt != NULL);
1463
1464 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size);
1465 if (splt->contents == NULL)
1466 return false;
1467
1468 return true;
1469 }
1470
1471 \f
1472
1473 /* Handle relaxing. */
1474
1475 /* A subroutine of rl78_elf_relax_section. If the global symbol H
1476 is within the low 64k, remove any entry for it in the plt. */
1477
1478 struct relax_plt_data
1479 {
1480 asection *splt;
1481 bool *again;
1482 };
1483
1484 static bool
1485 rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata)
1486 {
1487 struct relax_plt_data *data = (struct relax_plt_data *) xdata;
1488
1489 if (h->plt.offset != (bfd_vma) -1)
1490 {
1491 bfd_vma address;
1492
1493 if (h->root.type == bfd_link_hash_undefined
1494 || h->root.type == bfd_link_hash_undefweak)
1495 address = 0;
1496 else
1497 address = (h->root.u.def.section->output_section->vma
1498 + h->root.u.def.section->output_offset
1499 + h->root.u.def.value);
1500
1501 if (valid_16bit_address (address))
1502 {
1503 h->plt.offset = -1;
1504 data->splt->size -= 4;
1505 *data->again = true;
1506 }
1507 }
1508
1509 return true;
1510 }
1511
1512 /* A subroutine of rl78_elf_relax_section. If the global symbol H
1513 previously had a plt entry, give it a new entry offset. */
1514
1515 static bool
1516 rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata)
1517 {
1518 bfd_vma *entry = (bfd_vma *) xdata;
1519
1520 if (h->plt.offset != (bfd_vma) -1)
1521 {
1522 h->plt.offset = *entry;
1523 *entry += 4;
1524 }
1525
1526 return true;
1527 }
1528
1529 static bool
1530 rl78_elf_relax_plt_section (bfd *dynobj,
1531 asection *splt,
1532 struct bfd_link_info *info,
1533 bool *again)
1534 {
1535 struct relax_plt_data relax_plt_data;
1536 bfd *ibfd;
1537
1538 /* Assume nothing changes. */
1539 *again = false;
1540
1541 if (bfd_link_relocatable (info))
1542 return true;
1543
1544 /* We only relax the .plt section at the moment. */
1545 if (dynobj != elf_hash_table (info)->dynobj
1546 || strcmp (splt->name, ".plt") != 0)
1547 return true;
1548
1549 /* Quick check for an empty plt. */
1550 if (splt->size == 0)
1551 return true;
1552
1553 /* Map across all global symbols; see which ones happen to
1554 fall in the low 64k. */
1555 relax_plt_data.splt = splt;
1556 relax_plt_data.again = again;
1557 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check,
1558 &relax_plt_data);
1559
1560 /* Likewise for local symbols, though that's somewhat less convenient
1561 as we have to walk the list of input bfds and swap in symbol data. */
1562 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
1563 {
1564 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1565 Elf_Internal_Shdr *symtab_hdr;
1566 Elf_Internal_Sym *isymbuf = NULL;
1567 unsigned int idx;
1568
1569 if (! local_plt_offsets)
1570 continue;
1571
1572 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
1573 if (symtab_hdr->sh_info != 0)
1574 {
1575 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1576 if (isymbuf == NULL)
1577 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr,
1578 symtab_hdr->sh_info, 0,
1579 NULL, NULL, NULL);
1580 if (isymbuf == NULL)
1581 return false;
1582 }
1583
1584 for (idx = 0; idx < symtab_hdr->sh_info; ++idx)
1585 {
1586 Elf_Internal_Sym *isym;
1587 asection *tsec;
1588 bfd_vma address;
1589
1590 if (local_plt_offsets[idx] == (bfd_vma) -1)
1591 continue;
1592
1593 isym = &isymbuf[idx];
1594 if (isym->st_shndx == SHN_UNDEF)
1595 continue;
1596 else if (isym->st_shndx == SHN_ABS)
1597 tsec = bfd_abs_section_ptr;
1598 else if (isym->st_shndx == SHN_COMMON)
1599 tsec = bfd_com_section_ptr;
1600 else
1601 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx);
1602
1603 address = (tsec->output_section->vma
1604 + tsec->output_offset
1605 + isym->st_value);
1606 if (valid_16bit_address (address))
1607 {
1608 local_plt_offsets[idx] = -1;
1609 splt->size -= 4;
1610 *again = true;
1611 }
1612 }
1613
1614 if (isymbuf != NULL
1615 && symtab_hdr->contents != (unsigned char *) isymbuf)
1616 {
1617 if (! info->keep_memory)
1618 free (isymbuf);
1619 else
1620 {
1621 /* Cache the symbols for elf_link_input_bfd. */
1622 symtab_hdr->contents = (unsigned char *) isymbuf;
1623 }
1624 }
1625 }
1626
1627 /* If we changed anything, walk the symbols again to reallocate
1628 .plt entry addresses. */
1629 if (*again && splt->size > 0)
1630 {
1631 bfd_vma entry = 0;
1632
1633 elf_link_hash_traverse (elf_hash_table (info),
1634 rl78_relax_plt_realloc, &entry);
1635
1636 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
1637 {
1638 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1639 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info;
1640 unsigned int idx;
1641
1642 if (! local_plt_offsets)
1643 continue;
1644
1645 for (idx = 0; idx < nlocals; ++idx)
1646 if (local_plt_offsets[idx] != (bfd_vma) -1)
1647 {
1648 local_plt_offsets[idx] = entry;
1649 entry += 4;
1650 }
1651 }
1652 }
1653
1654 return true;
1655 }
1656
1657 /* Delete some bytes from a section while relaxing. */
1658
1659 static bool
1660 elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1661 Elf_Internal_Rela *alignment_rel, int force_snip)
1662 {
1663 Elf_Internal_Shdr * symtab_hdr;
1664 unsigned int sec_shndx;
1665 bfd_byte * contents;
1666 Elf_Internal_Rela * irel;
1667 Elf_Internal_Rela * irelend;
1668 Elf_Internal_Sym * isym;
1669 Elf_Internal_Sym * isymend;
1670 bfd_vma toaddr;
1671 unsigned int symcount;
1672 struct elf_link_hash_entry ** sym_hashes;
1673 struct elf_link_hash_entry ** end_hashes;
1674
1675 if (!alignment_rel)
1676 force_snip = 1;
1677
1678 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1679
1680 contents = elf_section_data (sec)->this_hdr.contents;
1681
1682 /* The deletion must stop at the next alignment boundary, if
1683 ALIGNMENT_REL is non-NULL. */
1684 toaddr = sec->size;
1685 if (alignment_rel)
1686 toaddr = alignment_rel->r_offset;
1687
1688 irel = elf_section_data (sec)->relocs;
1689 if (irel == NULL)
1690 {
1691 _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, true);
1692 irel = elf_section_data (sec)->relocs;
1693 }
1694
1695 irelend = irel + sec->reloc_count;
1696
1697 /* Actually delete the bytes. */
1698 memmove (contents + addr, contents + addr + count,
1699 (size_t) (toaddr - addr - count));
1700
1701 /* If we don't have an alignment marker to worry about, we can just
1702 shrink the section. Otherwise, we have to fill in the newly
1703 created gap with NOP insns (0x03). */
1704 if (force_snip)
1705 sec->size -= count;
1706 else
1707 memset (contents + toaddr - count, 0x03, count);
1708
1709 /* Adjust all the relocs. */
1710 for (; irel && irel < irelend; irel++)
1711 {
1712 /* Get the new reloc address. */
1713 if (irel->r_offset > addr
1714 && (irel->r_offset < toaddr
1715 || (force_snip && irel->r_offset == toaddr)))
1716 irel->r_offset -= count;
1717
1718 /* If we see an ALIGN marker at the end of the gap, we move it
1719 to the beginning of the gap, since marking these gaps is what
1720 they're for. */
1721 if (irel->r_offset == toaddr
1722 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
1723 && irel->r_addend & RL78_RELAXA_ALIGN)
1724 irel->r_offset -= count;
1725 }
1726
1727 /* Adjust the local symbols defined in this section. */
1728 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1729 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1730 isymend = isym + symtab_hdr->sh_info;
1731
1732 for (; isym < isymend; isym++)
1733 {
1734 /* If the symbol is in the range of memory we just moved, we
1735 have to adjust its value. */
1736 if (isym->st_shndx == sec_shndx
1737 && isym->st_value > addr
1738 && isym->st_value < toaddr)
1739 isym->st_value -= count;
1740
1741 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1742 *end* is in the moved bytes but it's *start* isn't), then we
1743 must adjust its size. */
1744 if (isym->st_shndx == sec_shndx
1745 && isym->st_value < addr
1746 && isym->st_value + isym->st_size > addr
1747 && isym->st_value + isym->st_size < toaddr)
1748 isym->st_size -= count;
1749 }
1750
1751 /* Now adjust the global symbols defined in this section. */
1752 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1753 - symtab_hdr->sh_info);
1754 sym_hashes = elf_sym_hashes (abfd);
1755 end_hashes = sym_hashes + symcount;
1756
1757 for (; sym_hashes < end_hashes; sym_hashes++)
1758 {
1759 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1760
1761 if ((sym_hash->root.type == bfd_link_hash_defined
1762 || sym_hash->root.type == bfd_link_hash_defweak)
1763 && sym_hash->root.u.def.section == sec)
1764 {
1765 /* As above, adjust the value if needed. */
1766 if (sym_hash->root.u.def.value > addr
1767 && sym_hash->root.u.def.value < toaddr)
1768 sym_hash->root.u.def.value -= count;
1769
1770 /* As above, adjust the size if needed. */
1771 if (sym_hash->root.u.def.value < addr
1772 && sym_hash->root.u.def.value + sym_hash->size > addr
1773 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1774 sym_hash->size -= count;
1775 }
1776 }
1777
1778 return true;
1779 }
1780
1781 /* Used to sort relocs by address. If relocs have the same address,
1782 we maintain their relative order, except that R_RL78_RH_RELAX
1783 alignment relocs must be the first reloc for any given address. */
1784
1785 static void
1786 reloc_bubblesort (Elf_Internal_Rela * r, int count)
1787 {
1788 int i;
1789 bool again;
1790 bool swappit;
1791
1792 /* This is almost a classic bubblesort. It's the slowest sort, but
1793 we're taking advantage of the fact that the relocations are
1794 mostly in order already (the assembler emits them that way) and
1795 we need relocs with the same address to remain in the same
1796 relative order. */
1797 again = true;
1798 while (again)
1799 {
1800 again = false;
1801 for (i = 0; i < count - 1; i ++)
1802 {
1803 if (r[i].r_offset > r[i + 1].r_offset)
1804 swappit = true;
1805 else if (r[i].r_offset < r[i + 1].r_offset)
1806 swappit = false;
1807 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1808 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN))
1809 swappit = true;
1810 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1811 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN)
1812 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX
1813 && (r[i].r_addend & RL78_RELAXA_ALIGN)))
1814 swappit = true;
1815 else
1816 swappit = false;
1817
1818 if (swappit)
1819 {
1820 Elf_Internal_Rela tmp;
1821
1822 tmp = r[i];
1823 r[i] = r[i + 1];
1824 r[i + 1] = tmp;
1825 /* If we do move a reloc back, re-scan to see if it
1826 needs to be moved even further back. This avoids
1827 most of the O(n^2) behavior for our cases. */
1828 if (i > 0)
1829 i -= 2;
1830 again = true;
1831 }
1832 }
1833 }
1834 }
1835
1836
1837 #define OFFSET_FOR_RELOC(rel, lrel, scale) \
1838 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1839 lrel, abfd, sec, link_info, scale)
1840
1841 static bfd_vma
1842 rl78_offset_for_reloc (bfd * abfd,
1843 Elf_Internal_Rela * rel,
1844 Elf_Internal_Shdr * symtab_hdr,
1845 bfd_byte * shndx_buf ATTRIBUTE_UNUSED,
1846 Elf_Internal_Sym * intsyms,
1847 Elf_Internal_Rela ** lrel,
1848 bfd * input_bfd,
1849 asection * input_section,
1850 struct bfd_link_info * info,
1851 int * scale)
1852 {
1853 bfd_vma symval;
1854
1855 *scale = 1;
1856
1857 /* REL is the first of 1..N relocations. We compute the symbol
1858 value for each relocation, then combine them if needed. LREL
1859 gets a pointer to the last relocation used. */
1860 while (1)
1861 {
1862 unsigned long r_type;
1863
1864 /* Get the value of the symbol referred to by the reloc. */
1865 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1866 {
1867 /* A local symbol. */
1868 Elf_Internal_Sym *isym;
1869 asection *ssec;
1870
1871 isym = intsyms + ELF32_R_SYM (rel->r_info);
1872
1873 if (isym->st_shndx == SHN_UNDEF)
1874 ssec = bfd_und_section_ptr;
1875 else if (isym->st_shndx == SHN_ABS)
1876 ssec = bfd_abs_section_ptr;
1877 else if (isym->st_shndx == SHN_COMMON)
1878 ssec = bfd_com_section_ptr;
1879 else
1880 ssec = bfd_section_from_elf_index (abfd,
1881 isym->st_shndx);
1882
1883 /* Initial symbol value. */
1884 symval = isym->st_value;
1885
1886 /* GAS may have made this symbol relative to a section, in
1887 which case, we have to add the addend to find the
1888 symbol. */
1889 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1890 symval += rel->r_addend;
1891
1892 if (ssec)
1893 {
1894 if ((ssec->flags & SEC_MERGE)
1895 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
1896 symval = _bfd_merged_section_offset (abfd, & ssec,
1897 elf_section_data (ssec)->sec_info,
1898 symval);
1899 }
1900
1901 /* Now make the offset relative to where the linker is putting it. */
1902 if (ssec)
1903 symval +=
1904 ssec->output_section->vma + ssec->output_offset;
1905
1906 symval += rel->r_addend;
1907 }
1908 else
1909 {
1910 unsigned long indx;
1911 struct elf_link_hash_entry * h;
1912
1913 /* An external symbol. */
1914 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1915 h = elf_sym_hashes (abfd)[indx];
1916 BFD_ASSERT (h != NULL);
1917
1918 if (h->root.type != bfd_link_hash_defined
1919 && h->root.type != bfd_link_hash_defweak)
1920 {
1921 /* This appears to be a reference to an undefined
1922 symbol. Just ignore it--it will be caught by the
1923 regular reloc processing. */
1924 if (lrel)
1925 *lrel = rel;
1926 return 0;
1927 }
1928
1929 symval = (h->root.u.def.value
1930 + h->root.u.def.section->output_section->vma
1931 + h->root.u.def.section->output_offset);
1932
1933 symval += rel->r_addend;
1934 }
1935
1936 r_type = ELF32_R_TYPE (rel->r_info);
1937 switch (r_type)
1938 {
1939 case R_RL78_SYM:
1940 (void) rl78_compute_complex_reloc (r_type, symval, input_section,
1941 NULL, NULL);
1942 break;
1943
1944 case R_RL78_OPromtop:
1945 symval = get_romstart (info, input_bfd, input_section, rel->r_offset);
1946 (void) rl78_compute_complex_reloc (r_type, symval, input_section,
1947 NULL, NULL);
1948 break;
1949
1950 case R_RL78_OPramtop:
1951 symval = get_ramstart (info, input_bfd, input_section, rel->r_offset);
1952 (void) rl78_compute_complex_reloc (r_type, symval, input_section,
1953 NULL, NULL);
1954 break;
1955
1956 case R_RL78_OPneg:
1957 case R_RL78_OPadd:
1958 case R_RL78_OPsub:
1959 case R_RL78_OPmul:
1960 case R_RL78_OPdiv:
1961 case R_RL78_OPshla:
1962 case R_RL78_OPshra:
1963 case R_RL78_OPsctsize:
1964 case R_RL78_OPscttop:
1965 case R_RL78_OPand:
1966 case R_RL78_OPor:
1967 case R_RL78_OPxor:
1968 case R_RL78_OPnot:
1969 case R_RL78_OPmod:
1970 (void) rl78_compute_complex_reloc (r_type, 0, input_section,
1971 NULL, NULL);
1972 break;
1973
1974 case R_RL78_DIR16UL:
1975 case R_RL78_DIR8UL:
1976 case R_RL78_ABS16UL:
1977 case R_RL78_ABS8UL:
1978 *scale = 4;
1979 goto reloc_computes_value;
1980
1981 case R_RL78_DIR16UW:
1982 case R_RL78_DIR8UW:
1983 case R_RL78_ABS16UW:
1984 case R_RL78_ABS8UW:
1985 *scale = 2;
1986 goto reloc_computes_value;
1987
1988 default:
1989 reloc_computes_value:
1990 symval = rl78_compute_complex_reloc (r_type, symval, input_section,
1991 NULL, NULL);
1992 /* Fall through. */
1993 case R_RL78_DIR32:
1994 case R_RL78_DIR24S:
1995 case R_RL78_DIR16:
1996 case R_RL78_DIR16U:
1997 case R_RL78_DIR16S:
1998 case R_RL78_DIR24S_PCREL:
1999 case R_RL78_DIR16S_PCREL:
2000 case R_RL78_DIR8S_PCREL:
2001 if (lrel)
2002 *lrel = rel;
2003 return symval;
2004 }
2005
2006 rel ++;
2007 }
2008 }
2009
2010 const struct {
2011 int prefix; /* or -1 for "no prefix" */
2012 int insn; /* or -1 for "end of list" */
2013 int insn_for_saddr; /* or -1 for "no alternative" */
2014 int insn_for_sfr; /* or -1 for "no alternative" */
2015 } relax_addr16[] = {
2016 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */
2017 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */
2018 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */
2019 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */
2020
2021 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */
2022 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */
2023 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */
2024 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */
2025 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */
2026 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */
2027 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */
2028 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */
2029
2030 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */
2031 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */
2032 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */
2033 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */
2034 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */
2035
2036 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */
2037 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */
2038 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */
2039 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */
2040
2041 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */
2042 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */
2043 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */
2044
2045 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */
2046 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */
2047 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */
2048 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */
2049 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */
2050 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */
2051
2052 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */
2053
2054 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */
2055 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */
2056 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */
2057 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */
2058 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */
2059 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */
2060 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */
2061 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */
2062
2063 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */
2064 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */
2065 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */
2066 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */
2067 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */
2068 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */
2069 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */
2070 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */
2071
2072 { -1, -1, -1, -1 }
2073 };
2074
2075 /* Relax one section. */
2076
2077 static bool
2078 rl78_elf_relax_section (bfd *abfd,
2079 asection *sec,
2080 struct bfd_link_info *link_info,
2081 bool *again)
2082 {
2083 Elf_Internal_Shdr * symtab_hdr;
2084 Elf_Internal_Shdr * shndx_hdr;
2085 Elf_Internal_Rela * internal_relocs;
2086 Elf_Internal_Rela * free_relocs = NULL;
2087 Elf_Internal_Rela * irel;
2088 Elf_Internal_Rela * srel;
2089 Elf_Internal_Rela * irelend;
2090 Elf_Internal_Rela * next_alignment;
2091 bfd_byte * contents = NULL;
2092 bfd_byte * free_contents = NULL;
2093 Elf_Internal_Sym * intsyms = NULL;
2094 Elf_Internal_Sym * free_intsyms = NULL;
2095 bfd_byte * shndx_buf = NULL;
2096 bfd_vma pc;
2097 bfd_vma symval ATTRIBUTE_UNUSED = 0;
2098 int pcrel ATTRIBUTE_UNUSED = 0;
2099 int code ATTRIBUTE_UNUSED = 0;
2100 int section_alignment_glue;
2101 int scale;
2102
2103 if (abfd == elf_hash_table (link_info)->dynobj
2104 && strcmp (sec->name, ".plt") == 0)
2105 return rl78_elf_relax_plt_section (abfd, sec, link_info, again);
2106
2107 /* Assume nothing changes. */
2108 *again = false;
2109
2110 /* We don't have to do anything for a relocatable link, if
2111 this section does not have relocs, or if this is not a
2112 code section. */
2113 if (bfd_link_relocatable (link_info)
2114 || (sec->flags & SEC_RELOC) == 0
2115 || sec->reloc_count == 0
2116 || (sec->flags & SEC_CODE) == 0)
2117 return true;
2118
2119 symtab_hdr = & elf_symtab_hdr (abfd);
2120 if (elf_symtab_shndx_list (abfd))
2121 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr;
2122 else
2123 shndx_hdr = NULL;
2124
2125 /* Get the section contents. */
2126 if (elf_section_data (sec)->this_hdr.contents != NULL)
2127 contents = elf_section_data (sec)->this_hdr.contents;
2128 /* Go get them off disk. */
2129 else
2130 {
2131 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2132 goto error_return;
2133 elf_section_data (sec)->this_hdr.contents = contents;
2134 }
2135
2136 /* Read this BFD's symbols. */
2137 /* Get cached copy if it exists. */
2138 if (symtab_hdr->contents != NULL)
2139 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2140 else
2141 {
2142 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2143 symtab_hdr->contents = (bfd_byte *) intsyms;
2144 }
2145
2146 if (shndx_hdr && shndx_hdr->sh_size != 0)
2147 {
2148 size_t amt;
2149
2150 if (_bfd_mul_overflow (symtab_hdr->sh_info,
2151 sizeof (Elf_External_Sym_Shndx), &amt))
2152 {
2153 bfd_set_error (bfd_error_no_memory);
2154 goto error_return;
2155 }
2156 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0)
2157 goto error_return;
2158 shndx_buf = _bfd_malloc_and_read (abfd, amt, amt);
2159 if (shndx_buf == NULL)
2160 goto error_return;
2161 shndx_hdr->contents = shndx_buf;
2162 }
2163
2164 /* Get a copy of the native relocations. */
2165 internal_relocs = (_bfd_elf_link_read_relocs
2166 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
2167 link_info->keep_memory));
2168 if (internal_relocs == NULL)
2169 goto error_return;
2170 if (! link_info->keep_memory)
2171 free_relocs = internal_relocs;
2172
2173 /* The RL_ relocs must be just before the operand relocs they go
2174 with, so we must sort them to guarantee this. We use bubblesort
2175 instead of qsort so we can guarantee that relocs with the same
2176 address remain in the same relative order. */
2177 reloc_bubblesort (internal_relocs, sec->reloc_count);
2178
2179 /* Walk through them looking for relaxing opportunities. */
2180 irelend = internal_relocs + sec->reloc_count;
2181
2182
2183 /* This will either be NULL or a pointer to the next alignment
2184 relocation. */
2185 next_alignment = internal_relocs;
2186
2187 /* We calculate worst case shrinkage caused by alignment directives.
2188 No fool-proof, but better than either ignoring the problem or
2189 doing heavy duty analysis of all the alignment markers in all
2190 input sections. */
2191 section_alignment_glue = 0;
2192 for (irel = internal_relocs; irel < irelend; irel++)
2193 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
2194 && irel->r_addend & RL78_RELAXA_ALIGN)
2195 {
2196 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2197
2198 if (section_alignment_glue < this_glue)
2199 section_alignment_glue = this_glue;
2200 }
2201 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2202 shrinkage. */
2203 section_alignment_glue *= 2;
2204
2205 for (irel = internal_relocs; irel < irelend; irel++)
2206 {
2207 unsigned char *insn;
2208 int nrelocs;
2209
2210 /* The insns we care about are all marked with one of these. */
2211 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX)
2212 continue;
2213
2214 if (irel->r_addend & RL78_RELAXA_ALIGN
2215 || next_alignment == internal_relocs)
2216 {
2217 /* When we delete bytes, we need to maintain all the alignments
2218 indicated. In addition, we need to be careful about relaxing
2219 jumps across alignment boundaries - these displacements
2220 *grow* when we delete bytes. For now, don't shrink
2221 displacements across an alignment boundary, just in case.
2222 Note that this only affects relocations to the same
2223 section. */
2224 next_alignment += 2;
2225 while (next_alignment < irelend
2226 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX
2227 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN)))
2228 next_alignment ++;
2229 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2230 next_alignment = NULL;
2231 }
2232
2233 /* When we hit alignment markers, see if we've shrunk enough
2234 before them to reduce the gap without violating the alignment
2235 requirements. */
2236 if (irel->r_addend & RL78_RELAXA_ALIGN)
2237 {
2238 /* At this point, the next relocation *should* be the ELIGN
2239 end marker. */
2240 Elf_Internal_Rela *erel = irel + 1;
2241 unsigned int alignment, nbytes;
2242
2243 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX)
2244 continue;
2245 if (!(erel->r_addend & RL78_RELAXA_ELIGN))
2246 continue;
2247
2248 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2249
2250 if (erel->r_offset - irel->r_offset < alignment)
2251 continue;
2252
2253 nbytes = erel->r_offset - irel->r_offset;
2254 nbytes /= alignment;
2255 nbytes *= alignment;
2256
2257 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset - nbytes, nbytes,
2258 next_alignment, erel->r_offset == sec->size);
2259 *again = true;
2260
2261 continue;
2262 }
2263
2264 if (irel->r_addend & RL78_RELAXA_ELIGN)
2265 continue;
2266
2267 insn = contents + irel->r_offset;
2268
2269 nrelocs = irel->r_addend & RL78_RELAXA_RNUM;
2270
2271 /* At this point, we have an insn that is a candidate for linker
2272 relaxation. There are NRELOCS relocs following that may be
2273 relaxed, although each reloc may be made of more than one
2274 reloc entry (such as gp-rel symbols). */
2275
2276 /* Get the value of the symbol referred to by the reloc. Just
2277 in case this is the last reloc in the list, use the RL's
2278 addend to choose between this reloc (no addend) or the next
2279 (yes addend, which means at least one following reloc). */
2280
2281 /* srel points to the "current" reloction for this insn -
2282 actually the last reloc for a given operand, which is the one
2283 we need to update. We check the relaxations in the same
2284 order that the relocations happen, so we'll just push it
2285 along as we go. */
2286 srel = irel;
2287
2288 pc = sec->output_section->vma + sec->output_offset
2289 + srel->r_offset;
2290
2291 #define GET_RELOC \
2292 BFD_ASSERT (nrelocs > 0); \
2293 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2294 pcrel = symval - pc + srel->r_addend; \
2295 nrelocs --;
2296
2297 #define SNIPNR(offset, nbytes) \
2298 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
2299
2300 #define SNIP(offset, nbytes, newtype) \
2301 SNIPNR (offset, nbytes); \
2302 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2303
2304 /* The order of these bit tests must match the order that the
2305 relocs appear in. Since we sorted those by offset, we can
2306 predict them. */
2307
2308 /*----------------------------------------------------------------------*/
2309 /* EF ad BR $rel8 pcrel
2310 ED al ah BR !abs16 abs
2311 EE al ah BR $!rel16 pcrel
2312 EC al ah as BR !!abs20 abs
2313
2314 FD al ah CALL !abs16 abs
2315 FE al ah CALL $!rel16 pcrel
2316 FC al ah as CALL !!abs20 abs
2317
2318 DC ad BC $rel8
2319 DE ad BNC $rel8
2320 DD ad BZ $rel8
2321 DF ad BNZ $rel8
2322 61 C3 ad BH $rel8
2323 61 D3 ad BNH $rel8
2324 61 C8 EF ad SKC ; BR $rel8
2325 61 D8 EF ad SKNC ; BR $rel8
2326 61 E8 EF ad SKZ ; BR $rel8
2327 61 F8 EF ad SKNZ ; BR $rel8
2328 61 E3 EF ad SKH ; BR $rel8
2329 61 F3 EF ad SKNH ; BR $rel8
2330 */
2331
2332 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA)
2333 {
2334 /* SKIP opcodes that skip non-branches will have a relax tag
2335 but no corresponding symbol to relax against; we just
2336 skip those. */
2337 if (irel->r_addend & RL78_RELAXA_RNUM)
2338 {
2339 GET_RELOC;
2340 }
2341
2342 switch (insn[0])
2343 {
2344 case 0xdc: /* BC */
2345 case 0xdd: /* BZ */
2346 case 0xde: /* BNC */
2347 case 0xdf: /* BNZ */
2348 if (insn[1] == 0x03 && insn[2] == 0xee /* BR */
2349 && (srel->r_offset - irel->r_offset) > 1) /* a B<c> without its own reloc */
2350 {
2351 /* This is a "long" conditional as generated by gas:
2352 DC 03 EE ad.dr */
2353 if (pcrel < 127
2354 && pcrel > -127)
2355 {
2356 insn[0] ^= 0x02; /* invert conditional */
2357 SNIPNR (4, 1);
2358 SNIP (1, 2, R_RL78_DIR8S_PCREL);
2359 insn[1] = pcrel;
2360 *again = true;
2361 }
2362 }
2363 break;
2364
2365 case 0xec: /* BR !!abs20 */
2366
2367 if (pcrel < 127
2368 && pcrel > -127)
2369 {
2370 insn[0] = 0xef;
2371 insn[1] = pcrel;
2372 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2373 *again = true;
2374 }
2375 else if (symval < 65536)
2376 {
2377 insn[0] = 0xed;
2378 insn[1] = symval & 0xff;
2379 insn[2] = symval >> 8;
2380 SNIP (2, 1, R_RL78_DIR16U);
2381 *again = true;
2382 }
2383 else if (pcrel < 32767
2384 && pcrel > -32767)
2385 {
2386 insn[0] = 0xee;
2387 insn[1] = pcrel & 0xff;
2388 insn[2] = pcrel >> 8;
2389 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2390 *again = true;
2391 }
2392 break;
2393
2394 case 0xee: /* BR $!pcrel16 */
2395 case 0xed: /* BR $!abs16 */
2396 if (pcrel < 127
2397 && pcrel > -127)
2398 {
2399 insn[0] = 0xef;
2400 insn[1] = pcrel;
2401 SNIP (2, 1, R_RL78_DIR8S_PCREL);
2402 *again = true;
2403 }
2404 break;
2405
2406 case 0xfc: /* CALL !!abs20 */
2407 if (symval < 65536)
2408 {
2409 insn[0] = 0xfd;
2410 insn[1] = symval & 0xff;
2411 insn[2] = symval >> 8;
2412 SNIP (2, 1, R_RL78_DIR16U);
2413 *again = true;
2414 }
2415 else if (pcrel < 32767
2416 && pcrel > -32767)
2417 {
2418 insn[0] = 0xfe;
2419 insn[1] = pcrel & 0xff;
2420 insn[2] = pcrel >> 8;
2421 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2422 *again = true;
2423 }
2424 break;
2425
2426 case 0x61: /* PREFIX */
2427 /* For SKIP/BR, we change the BR opcode and delete the
2428 SKIP. That way, we don't have to find and change the
2429 relocation for the BR. */
2430 /* Note that, for the case where we're skipping some
2431 other insn, we have no "other" reloc but that's safe
2432 here anyway. */
2433 switch (insn[1])
2434 {
2435 case 0xd3: /* BNH */
2436 case 0xc3: /* BH */
2437 if (insn[2] == 0x03 && insn[3] == 0xee
2438 && (srel->r_offset - irel->r_offset) > 2) /* a B<c> without its own reloc */
2439 {
2440 /* Another long branch by gas:
2441 61 D3 03 EE ad.dr */
2442 if (pcrel < 127
2443 && pcrel > -127)
2444 {
2445 insn[1] ^= 0x10; /* invert conditional */
2446 SNIPNR (5, 1);
2447 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2448 insn[2] = pcrel;
2449 *again = true;
2450 }
2451 }
2452 break;
2453
2454 case 0xc8: /* SKC */
2455 if (insn[2] == 0xef)
2456 {
2457 insn[2] = 0xde; /* BNC */
2458 SNIPNR (0, 2);
2459 }
2460 break;
2461
2462 case 0xd8: /* SKNC */
2463 if (insn[2] == 0xef)
2464 {
2465 insn[2] = 0xdc; /* BC */
2466 SNIPNR (0, 2);
2467 }
2468 break;
2469
2470 case 0xe8: /* SKZ */
2471 if (insn[2] == 0xef)
2472 {
2473 insn[2] = 0xdf; /* BNZ */
2474 SNIPNR (0, 2);
2475 }
2476 break;
2477
2478 case 0xf8: /* SKNZ */
2479 if (insn[2] == 0xef)
2480 {
2481 insn[2] = 0xdd; /* BZ */
2482 SNIPNR (0, 2);
2483 }
2484 break;
2485
2486 case 0xe3: /* SKH */
2487 if (insn[2] == 0xef)
2488 {
2489 insn[2] = 0xd3; /* BNH */
2490 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2491 }
2492 break;
2493
2494 case 0xf3: /* SKNH */
2495 if (insn[2] == 0xef)
2496 {
2497 insn[2] = 0xc3; /* BH */
2498 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2499 }
2500 break;
2501 }
2502 break;
2503 }
2504 }
2505
2506 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16
2507 && nrelocs > 0)
2508 {
2509 /*----------------------------------------------------------------------*/
2510 /* Some insns have both a 16-bit address operand and an 8-bit
2511 variant if the address is within a special range:
2512
2513 Address 16-bit operand SADDR range SFR range
2514 FFF00-FFFFF 0xff00-0xffff 0x00-0xff
2515 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff
2516
2517 The RELAX_ADDR16[] array has the insn encodings for the
2518 16-bit operand version, as well as the SFR and SADDR
2519 variants. We only need to replace the encodings and
2520 adjust the operand.
2521
2522 Note: we intentionally do not attempt to decode and skip
2523 any ES: prefix, as adding ES: means the addr16 (likely)
2524 no longer points to saddr/sfr space.
2525 */
2526
2527 int is_sfr;
2528 int is_saddr;
2529 int idx;
2530 int poff;
2531
2532 GET_RELOC;
2533
2534 if (0xffe20 <= symval && symval <= 0xfffff)
2535 {
2536
2537 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f);
2538 is_sfr = (0xfff00 <= symval && symval <= 0xfffff);
2539
2540 for (idx = 0; relax_addr16[idx].insn != -1; idx ++)
2541 {
2542 if (relax_addr16[idx].prefix != -1
2543 && insn[0] == relax_addr16[idx].prefix
2544 && insn[1] == relax_addr16[idx].insn)
2545 {
2546 poff = 1;
2547 }
2548 else if (relax_addr16[idx].prefix == -1
2549 && insn[0] == relax_addr16[idx].insn)
2550 {
2551 poff = 0;
2552 }
2553 else
2554 continue;
2555
2556 /* We have a matched insn, and poff is 0 or 1 depending
2557 on the base pattern size. */
2558
2559 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1)
2560 {
2561 insn[poff] = relax_addr16[idx].insn_for_sfr;
2562 SNIP (poff+2, 1, R_RL78_RH_SFR);
2563 }
2564
2565 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1)
2566 {
2567 insn[poff] = relax_addr16[idx].insn_for_saddr;
2568 SNIP (poff+2, 1, R_RL78_RH_SADDR);
2569 }
2570 }
2571 }
2572 }
2573 /*----------------------------------------------------------------------*/
2574 }
2575
2576 return true;
2577
2578 error_return:
2579 free (free_relocs);
2580 free (free_contents);
2581
2582 if (shndx_buf != NULL)
2583 {
2584 shndx_hdr->contents = NULL;
2585 free (shndx_buf);
2586 }
2587
2588 free (free_intsyms);
2589
2590 return true;
2591 }
2592
2593 \f
2594
2595 #define ELF_ARCH bfd_arch_rl78
2596 #define ELF_MACHINE_CODE EM_RL78
2597 #define ELF_MAXPAGESIZE 0x1000
2598
2599 #define TARGET_LITTLE_SYM rl78_elf32_vec
2600 #define TARGET_LITTLE_NAME "elf32-rl78"
2601
2602 #define elf_info_to_howto_rel NULL
2603 #define elf_info_to_howto rl78_info_to_howto_rela
2604 #define elf_backend_object_p rl78_elf_object_p
2605 #define elf_backend_relocate_section rl78_elf_relocate_section
2606 #define elf_symbol_leading_char ('_')
2607 #define elf_backend_can_gc_sections 1
2608
2609 #define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup
2610 #define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup
2611 #define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags
2612 #define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data
2613 #define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data
2614
2615 #define bfd_elf32_bfd_relax_section rl78_elf_relax_section
2616 #define elf_backend_check_relocs rl78_elf_check_relocs
2617 #define elf_backend_always_size_sections \
2618 rl78_elf_always_size_sections
2619 #define elf_backend_finish_dynamic_sections \
2620 rl78_elf_finish_dynamic_sections
2621
2622 #include "elf32-target.h"
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