cpu/ChangeLog

   1 2021-05-06  Stafford Horne  <shorne@gmail.com>
   2
   3         PR 21464
   4         * or1k.opc (or1k_imm16_relocs, parse_reloc): Define parse logic
   5         for gotha() relocation.
   6
   7 2021-03-31  Alan Modra  <amodra@gmail.com>
   8
   9         * frv.opc: Replace bfd_boolean with bool, FALSE with false, and
  10         TRUE with true throughout.
  11
  12 2021-03-29  Alan Modra  <amodra@gmail.com>
  13
  14         * frv.opc (frv_is_branch_major, frv_is_float_major),
  15         (frv_is_media_major, frv_is_branch_insn, frv_is_float_insn),
  16         (frv_is_media_insn, spr_valid): Correct prototypes.
  17
  18 2021-01-09  Nick Clifton  <nickc@redhat.com>
  19
  20         * 2.36 release branch crated.
  21
  22 2020-10-05  Samanta Navarro  <ferivoz@riseup.net>
  23
  24         * m32r.cpu: Fix spelling mistakes.
  25
  26 2020-09-18  David Faust  <david.faust@oracle.com>
  27
  28         * bpf.cpu (insn-op-code-alu): Add SDIV and SMOD.
  29         (define-alu-insn-bin, daib): Take ISAs as an argument.
  30         (define-alu-instructions): Update calls to daib pmacro with
  31         ISAs; add sdiv and smod.
  32
  33 2020-09-08  David Faust  <david.faust@oracle.com>
  34
  35         * bpf.cpu (define-alu-instructions): Correct semantic operators
  36         for div, mod to unsigned versions.
  37
  38 2020-09-01  Alan Modra  <amodra@gmail.com>
  39
  40         * mep-core.cpu (f-8s8a2, f-12s4a2, f-17s16a2): Multiply signed
  41         value by two rather than shifting left.
  42         (f-24s5a2n): Similarly multiply signed f-24s5a2n-hi to extract.
  43
  44 2020-08-26  David Faust  <david.faust@oracle.com>
  45
  46         * bpf.cpu (arch bpf): Add xbpf mach and isas.
  47         (define-xbpf-isa) New pmacro.
  48         (all-isas) Add xbpfle,xbpfbe.
  49         (endian-isas): New pmacro.
  50         (mach xbpf): New.
  51         (model xbpf-def): Likewise.
  52         (h-gpr): Add xbpf mach.
  53         (f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
  54         (f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
  55         (define-alu-insn-un): Use new endian-isas pmacro.
  56         (define-alu-insn-bin, define-alu-insn-mov): Likewise.
  57         (define-endian-insn, define-lddw): Likewise.
  58         (dlind, dxli, dxsi, dsti): Likewise.
  59         (define-cond-jump-insn, define-call-insn): Likewise.
  60         (define-atomic-insns): Likewise.
  61
  62 2020-07-04  Nick Clifton  <nickc@redhat.com>
  63
  64         Binutils 2.35 branch created.
  65
  66 2020-06-25 David Faust  <david.faust@oracle.com>
  67
  68         * bpf.cpu (f-offset16): Change type from INT to HI.
  69         (dxli): Simplify memory access.
  70         (dxsi): Likewise.
  71         (define-endian-insn): Update c-call in semantics.
  72         (dlabs) Likewise.
  73         (dlind) Likewise.
  74
  75 2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
  76
  77         * bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64.
  78         * bpf.opc (bpf_print_insn): Do not set endian_code here.
  79
  80 2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
  81
  82         * mep.opc (print_slot_insn): Pass the insn endianness to
  83         cgen_get_insn_value.
  84
  85 2020-05-28  Jose E. Marchesi  <jose.marchesi@oracle.com>
  86             David Faust <david.faust@oracle.com>
  87
  88         * bpf.cpu (define-alu-insn-un): Add definitions of semantics.
  89         (define-alu-insn-mov): Likewise.
  90         (daib): Likewise.
  91         (define-alu-instructions): Likewise.
  92         (define-endian-insn): Likewise.
  93         (define-lddw): Likewise.
  94         (dlabs): Likewise.
  95         (dlind): Likewise.
  96         (dxli): Likewise.
  97         (dxsi): Likewise.
  98         (dsti): Likewise.
  99         (define-ldstx-insns): Likewise.
 100         (define-st-insns): Likewise.
 101         (define-cond-jump-insn): Likewise.
 102         (dcji): Likewise.
 103         (define-condjump-insns): Likewise.
 104         (define-call-insn): Likewise.
 105         (ja): Likewise.
 106         ("exit"): Likewise.
 107         (define-atomic-insns): Likewise.
 108         (sem-exchange-and-add): New macro.
 109         * bpf.cpu ("brkpt"): New instruction.
 110         (bpfbf): Set word-bitsize to 32 and insn-endian big.
 111         (h-gpr): Prefer r0 to `a' and r6 to `ctx'.
 112         (h-pc): Expand definition.
 113         * bpf.opc (bpf_print_insn): Set endian_code to BIG.
 114
 115 2020-05-21  Alan Modra  <amodra@gmail.com>
 116
 117         * mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace
 118         "if (x) free (x)" with "free (x)".
 119
 120 2020-05-19  Stafford Horne  <shorne@gmail.com>
 121
 122         PR 25184
 123         * or1k.cpu (arch or1k): Remove or64 and or64nd machs.
 124         (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros.
 125         (cpu or1k64bf, mach or64, mach or64nd): Remove definitions.
 126         * or1kcommon.cpu (h-fdr): Remove hardware.
 127         * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions.
 128         (float-regreg-insn): Remove lf- mnemonic -d instruction pattern.
 129         (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern.
 130         (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern.
 131         (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove.
 132
 133 2020-02-16  David Faust  <david.faust@oracle.com>
 134
 135         * bpf.cpu (define-cond-jump-insn): Renamed from djci.
 136         (dcji) New version with support for JMP32
 137
 138 2020-02-03  Alan Modra  <amodra@gmail.com>
 139
 140         * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
 141
 142 2020-02-01  Alan Modra  <amodra@gmail.com>
 143
 144         * frv.cpu (f-u12): Multiply rather than left shift signed values.
 145         (f-label16, f-label24): Likewise.
 146
 147 2020-01-30  Alan Modra  <amodra@gmail.com>
 148
 149         * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
 150         (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
 151         (f-dst32-rn-prefixed-QI): Likewise.
 152         (f-dsp-32-s32): Mask before shifting left.
 153         (f-dsp-48-u32, f-dsp-48-s32): Likewise.
 154         (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
 155         shifting left.
 156         (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
 157         (h-gr-SI): Mask before shifting.
 158
 159 2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
 160
 161         * bpf.cpu (define-alu-insn-un): The unary BPF instructions
 162         (neg and neg32) use OP_SRC_K even if they operate only in
 163         registers.
 164
 165 2020-01-18  Nick Clifton  <nickc@redhat.com>
 166
 167         Binutils 2.34 branch created.
 168
 169 2020-01-13  Alan Modra  <amodra@gmail.com>
 170
 171         * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
 172         left shift signed values.
 173
 174 2020-01-06  Alan Modra  <amodra@gmail.com>
 175
 176         * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
 177         bits before shifting rather than masking after shifting.
 178         (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
 179         (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
 180         (f-dsp-64-u16, f-dsp-8-s24): Likewise.
 181         (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
 182
 183 2020-01-04  Alan Modra  <amodra@gmail.com>
 184
 185         * m32r.cpu (f-disp8): Avoid left shift of negative values.
 186         (f-disp16, f-disp24): Likewise.
 187
 188 2019-12-23  Alan Modra  <amodra@gmail.com>
 189
 190         * iq2000.cpu (f-offset): Avoid left shift of negative values.
 191
 192 2019-12-20  Alan Modra  <amodra@gmail.com>
 193
 194         * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
 195
 196 2019-12-17  Alan Modra  <amodra@gmail.com>
 197
 198         * bpf.cpu (f-imm64): Avoid signed overflow.
 199
 200 2019-12-16  Alan Modra  <amodra@gmail.com>
 201
 202         * xstormy16.cpu (f-rel12a): Avoid signed overflow.
 203
 204 2019-12-11  Alan Modra  <amodra@gmail.com>
 205
 206         * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
 207         * lm32.cpu (f-branch, f-vall): Likewise.
 208         * m32.cpu (f-lab-8-16): Likewise.
 209
 210 2019-12-11  Alan Modra  <amodra@gmail.com>
 211
 212         * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
 213         shift left to avoid UB on left shift of negative values.
 214
 215 2019-11-20  Jose E. Marchesi  <jose.marchesi@oracle.com>
 216
 217         * bpf.cpu: Fix comment describing the 128-bit instruction format.
 218
 219 2019-09-09  Phil Blundell  <pb@pbcl.net>
 220
 221         binutils 2.33 branch created.
 222
 223 2019-07-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
 224
 225         * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
 226         %a and %ctx.
 227
 228 2019-07-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
 229
 230         * bpf.cpu (dlabs): New pmacro.
 231         (dlind): Likewise.
 232
 233 2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
 234
 235         * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
 236         explicit 'dst' argument.
 237
 238 2019-06-13  Stafford Horne  <shorne@gmail.com>
 239
 240         * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
 241
 242 2019-06-13  Stafford Horne  <shorne@gmail.com>
 243
 244         * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
 245         (l-adrp): Improve comment.
 246
 247 2019-06-13  Stafford Horne  <shorne@gmail.com>
 248
 249         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
 250         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
 251         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
 252         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
 253         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
 254         float-setflag-unordered-symantics): New pmacro for instruction
 255         symantics.
 256         (float-setflag-insn): Update to use float-setflag-insn-base.
 257         (float-setflag-unordered-insn): New pmacro for generating instructions.
 258
 259 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
 260             Stafford Horne  <shorne@gmail.com>
 261
 262         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
 263         (ORFPX-MACHS): Removed pmacro.
 264         * or1k.opc (or1k_cgen_insn_supported): New function.
 265         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
 266         (parse_regpair, print_regpair): New functions.
 267         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
 268         and add comments.
 269         (h-fdr): Update comment to indicate or64.
 270         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
 271         (h-fd32r): New hardware for 64-bit fpu registers.
 272         (h-i64r): New hardware for 64-bit int registers.
 273         * or1korbis.cpu (f-resv-8-1): New field.
 274         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
 275         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
 276         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
 277         (h-roff1): New hardware.
 278         (double-field-and-ops mnemonic): New pmacro to generate operations
 279         rDD32F, rAD32F, rBD32F, rDDI and rADI.
 280         (float-regreg-insn): Update single precision generator to MACH
 281         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 282         (float-setflag-insn): Update single precision generator to MACH
 283         ORFPX32-MACHS.  Fix double instructions from single to double
 284         precision.  Add generator for or32 64-bit instructions.
 285         (float-cust-insn cust-num): Update single precision generator to MACH
 286         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 287         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
 288         ORFPX32-MACHS.
 289         (lf-rem-d): Fix operation from mod to rem.
 290         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
 291         (lf-itof-d): Fix operands from single to double.
 292         (lf-ftoi-d): Update operand mode from DI to WI.
 293
 294 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
 295
 296         * bpf.cpu: New file.
 297         * bpf.opc: Likewise.
 298
 299 2018-06-24  Nick Clifton  <nickc@redhat.com>
 300
 301         2.32 branch created.
 302
 303 2018-10-05  Richard Henderson  <rth@twiddle.net>
 304             Stafford Horne  <shorne@gmail.com>
 305
 306         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
 307         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
 308         (l-mul): Fix overflow support and indentation.
 309         (l-mulu): Fix overflow support and indentation.
 310         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
 311         (l-div); Remove incorrect carry behavior.
 312         (l-divu): Fix carry and overflow behavior.
 313         (l-mac): Add overflow support.
 314         (l-msb, l-msbu): Add carry and overflow support.
 315
 316 2018-10-05  Richard Henderson  <rth@twiddle.net>
 317
 318         * or1k.opc (parse_disp26): Add support for plta() relocations.
 319         (parse_disp21): New function.
 320         (or1k_rclass): New enum.
 321         (or1k_rtype): New enum.
 322         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
 323         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
 324         (parse_imm16): Add support for the new 21bit and 13bit relocations.
 325         * or1korbis.cpu (f-disp26): Don't assume SI.
 326         (f-disp21): New pc-relative 21-bit 13 shifted to right.
 327         (insn-opcode): Add ADRP.
 328         (l-adrp): New instruction.
 329
 330 2018-10-05  Richard Henderson  <rth@twiddle.net>
 331
 332         * or1k.opc: Add RTYPE_ enum.
 333         (INVALID_STORE_RELOC): New string.
 334         (or1k_imm16_relocs): New array array.
 335         (parse_reloc): New static function that just does the parsing.
 336         (parse_imm16): New static function for generic parsing.
 337         (parse_simm16): Change to just call parse_imm16.
 338         (parse_simm16_split): New function.
 339         (parse_uimm16): Change to call parse_imm16.
 340         (parse_uimm16_split): New function.
 341         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
 342         (uimm16-split): Change to use new uimm16_split.
 343
 344 2018-07-24  Alan Modra  <amodra@gmail.com>
 345
 346         PR 23430
 347         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 348
 349 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 350
 351         * or1kcommon.cpu (spr-reg-info): Typo fix.
 352
 353 2018-03-03  Alan Modra  <amodra@gmail.com>
 354
 355         * frv.opc: Include opintl.h.
 356         (add_next_to_vliw): Use opcodes_error_handler to print error.
 357         Standardize error message.
 358         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 359
 360 2018-01-13  Nick Clifton  <nickc@redhat.com>
 361
 362         2.30 branch created.
 363
 364 2017-03-15  Stafford Horne  <shorne@gmail.com>
 365
 366         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 367
 368 2016-10-06  Alan Modra  <amodra@gmail.com>
 369
 370         * mep.opc (expand_string): Add fall through comment.
 371
 372 2016-03-03  Alan Modra  <amodra@gmail.com>
 373
 374         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 375         at what is really going on.
 376
 377 2016-03-02  Alan Modra  <amodra@gmail.com>
 378
 379         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 380
 381 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 382
 383         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 384         a constant to better align disassembler output.
 385
 386 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 387
 388         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 389
 390 2014-06-12  Alan Modra  <amodra@gmail.com>
 391
 392         * or1k.opc: Whitespace fixes.
 393
 394 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 395
 396         * or1korbis.cpu (h-atomic-reserve): New hardware.
 397         (h-atomic-address): Likewise.
 398         (insn-opcode): Add opcodes for LWA and SWA.
 399         (atomic-reserve): New operand.
 400         (atomic-address): Likewise.
 401         (l-lwa, l-swa): New instructions.
 402         (l-lbs): Fix typo in comment.
 403         (store-insn): Clear atomic reserve on store to atomic-address.
 404         Fix register names in fmt field.
 405
 406 2014-04-22  Christian Svensson  <blue@cmd.nu>
 407
 408         * openrisc.cpu: Delete.
 409         * openrisc.opc: Delete.
 410         * or1k.cpu: New file.
 411         * or1k.opc: New file.
 412         * or1kcommon.cpu: New file.
 413         * or1korbis.cpu: New file.
 414         * or1korfpx.cpu: New file.
 415
 416 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 417
 418         * epiphany.opc: Remove +x file mode.
 419
 420 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 421
 422         PR binutils/15241
 423         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 424         TLBVADDR, TLBPADDR and TLBBADVADDR.
 425
 426 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 427             Joern Rennecke  <joern.rennecke@embecosm.com>
 428
 429         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 430         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 431         (testset-insn): Add NO_DIS attribute to t.l.
 432         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 433         (move-insns): Add NO-DIS attribute to cmov.l.
 434         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 435         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 436         (op-rrr): Add NO-DIS attribute to .l.
 437         (shift-rrr): Add NO-DIS attribute to .l.
 438         (op-shift-rri): Add NO-DIS attribute to i32.l.
 439         (bitrl, movtl): Add NO-DIS attribute.
 440         (op-iextrrr): Add NO-DIS attribute to .l
 441         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 442         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 443
 444 2012-02-27  Alan Modra  <amodra@gmail.com>
 445
 446         * mt.opc (print_dollarhex): Trim values to 32 bits.
 447
 448 2011-12-15  Nick Clifton  <nickc@redhat.com>
 449
 450         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 451         hosts.
 452
 453 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 454
 455         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 456         Cast value before printing it as a long.
 457         (parse_postindex): Fix type of valuep.
 458
 459 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 460
 461         * cpu/epiphany.cpu: New file.
 462         * cpu/epiphany.opc: New file.
 463
 464 2011-08-22  Nick Clifton  <nickc@redhat.com>
 465
 466         * fr30.cpu: Newly contributed file.
 467         * fr30.opc: Likewise.
 468         * ip2k.cpu: Likewise.
 469         * ip2k.opc: Likewise.
 470         * mep-avc.cpu: Likewise.
 471         * mep-avc2.cpu: Likewise.
 472         * mep-c5.cpu: Likewise.
 473         * mep-core.cpu: Likewise.
 474         * mep-default.cpu: Likewise.
 475         * mep-ext-cop.cpu: Likewise.
 476         * mep-fmax.cpu: Likewise.
 477         * mep-h1.cpu: Likewise.
 478         * mep-ivc2.cpu: Likewise.
 479         * mep-rhcop.cpu: Likewise.
 480         * mep-sample-ucidsp.cpu: Likewise.
 481         * mep.cpu: Likewise.
 482         * mep.opc: Likewise.
 483         * openrisc.cpu: Likewise.
 484         * openrisc.opc: Likewise.
 485         * xstormy16.cpu: Likewise.
 486         * xstormy16.opc: Likewise.
 487
 488 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 489
 490         * frv.opc: #undef DEBUG.
 491
 492 2010-07-03  DJ Delorie  <dj@delorie.com>
 493
 494         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 495
 496 2010-02-11  Doug Evans  <dje@sebabeach.org>
 497
 498         * m32r.cpu (HASH-PREFIX): Delete.
 499         (duhpo, dshpo): New pmacros.
 500         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 501         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 502         attribute, define with dshpo.
 503         (uimm24): Delete HASH-PREFIX attribute.
 504         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 505         (print_signed_with_hash_prefix): New function.
 506         (print_unsigned_with_hash_prefix): New function.
 507         * xc16x.cpu (dowh): New pmacro.
 508         (upof16): Define with dowh, specify print handler.
 509         (qbit, qlobit, qhibit): Ditto.
 510         (upag16): Ditto.
 511         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 512         (print_with_dot_prefix): New functions.
 513         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 514
 515 2010-01-24  Doug Evans  <dje@sebabeach.org>
 516
 517         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 518         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 519         conditional-floating-point-conversion, ne-floating-point-conversion,
 520         float-parallel-mul-add-double-semantics): Ditto.
 521
 522 2010-01-05  Doug Evans  <dje@sebabeach.org>
 523
 524         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 525         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 526
 527 2010-01-02  Doug Evans  <dje@sebabeach.org>
 528
 529         * m32c.opc (parse_signed16): Fix typo.
 530
 531 2009-12-11  Nick Clifton  <nickc@redhat.com>
 532
 533         * frv.opc: Fix shadowed variable warnings.
 534         * m32c.opc: Fix shadowed variable warnings.
 535
 536 2009-11-14  Doug Evans  <dje@sebabeach.org>
 537
 538         Must use VOID expression in VOID context.
 539         * xc16x.cpu (mov4): Fix mode of `sequence'.
 540         (mov9, mov10): Ditto.
 541         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 542         (callr, callseg, calls, trap, rets, reti): Ditto.
 543         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 544         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 545         (exts, exts1, extsr, extsr1, prior): Ditto.
 546
 547 2009-10-23  Doug Evans  <dje@sebabeach.org>
 548
 549         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 550         cgen-ops.h -> cgen/basic-ops.h.
 551
 552 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 553
 554         * m32r.cpu (stb-plus): Typo fix.
 555
 556 2009-09-23  Doug Evans  <dje@sebabeach.org>
 557
 558         * m32r.cpu (sth-plus): Fix address mode and calculation.
 559         (stb-plus): Ditto.
 560         (clrpsw): Fix mask calculation.
 561         (bset, bclr, btst): Make mode in bit calculation match expression.
 562
 563         * xc16x.cpu (rtl-version): Set to 0.8.
 564         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 565         make uppercase.  Remove unnecessary name-prefix spec.
 566         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 567         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 568         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 569         (h-cr): New hardware.
 570         (muls): Comment out parts that won't compile, add fixme.
 571         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 572         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 573         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 574
 575 2009-07-16  Doug Evans  <dje@sebabeach.org>
 576
 577         * cpu/simplify.inc (*): One line doc strings don't need \n.
 578         (df): Invoke define-full-ifield instead of claiming it's an alias.
 579         (dno): Define.
 580         (dnop): Mark as deprecated.
 581
 582 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 583
 584         * m32c.opc (parse_lab_5_3): Use correct enum.
 585
 586 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 587
 588         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 589         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 590         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 591         arguments of "operation" to DI using "mode" and the new pmacros.
 592
 593 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 594
 595         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 596         of number 2, PID.
 597
 598 2008-12-23  Jon Beniston <jon@beniston.com>
 599
 600         * lm32.cpu: New file.
 601         * lm32.opc: New file.
 602
 603 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 604
 605         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 606         to source.
 607
 608 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 609
 610         * cris.cpu (movs, movu): Use result of extension operation when
 611         updating flags.
 612
 613 2007-07-04  Nick Clifton  <nickc@redhat.com>
 614
 615         * cris.cpu: Update copyright notice to refer to GPLv3.
 616         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 617         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 618         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 619         xc16x.opc: Likewise.
 620         * iq2000.cpu: Fix copyright notice to refer to FSF.
 621
 622 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 623
 624         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 625
 626 2007-04-20  Nick Clifton  <nickc@redhat.com>
 627
 628         * xc16x.cpu: Restore after accidentally overwriting this file with
 629         xc16x.opc.
 630
 631 2007-03-29  DJ Delorie  <dj@redhat.com>
 632
 633         * m32c.cpu (Imm-8-s4n): Fix print hook.
 634         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 635         (arith-jnz-imm4-dst-defn): Make relaxable.
 636         (arith-jnz16-imm4-dst-defn): Fix encodings.
 637
 638 2007-03-20  DJ Delorie  <dj@redhat.com>
 639
 640         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 641         mem20): New.
 642         (src16-16-20-An-relative-*): New.
 643         (dst16-*-20-An-relative-*): New.
 644         (dst16-16-16sa-*): New
 645         (dst16-16-16ar-*): New
 646         (dst32-16-16sa-Unprefixed-*): New
 647         (jsri): Fix operands.
 648         (setzx): Fix encoding.
 649
 650 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 651
 652         * m32r.opc: Formatting.
 653
 654 2006-05-22  Nick Clifton  <nickc@redhat.com>
 655
 656         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 657
 658 2006-04-10  DJ Delorie  <dj@redhat.com>
 659
 660         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 661         decides if this function accepts symbolic constants or not.
 662         (parse_signed_bitbase): Likewise.
 663         (parse_unsigned_bitbase8): Pass the new parameter.
 664         (parse_unsigned_bitbase11): Likewise.
 665         (parse_unsigned_bitbase16): Likewise.
 666         (parse_unsigned_bitbase19): Likewise.
 667         (parse_unsigned_bitbase27): Likewise.
 668         (parse_signed_bitbase8): Likewise.
 669         (parse_signed_bitbase11): Likewise.
 670         (parse_signed_bitbase19): Likewise.
 671
 672 2006-03-13  DJ Delorie  <dj@redhat.com>
 673
 674         * m32c.cpu (Bit3-S): New.
 675         (btst:s): New.
 676         * m32c.opc (parse_bit3_S): New.
 677
 678         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 679         (btst): Add optional :G suffix for MACH32.
 680         (or.b:S): New.
 681         (pop.w:G): Add optional :G suffix for MACH16.
 682         (push.b.imm): Fix syntax.
 683
 684 2006-03-10  DJ Delorie  <dj@redhat.com>
 685
 686         * m32c.cpu (mul.l): New.
 687         (mulu.l): New.
 688
 689 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 690
 691         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 692         an error message otherwise.
 693         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 694         Fix up comments to correctly describe the functions.
 695
 696 2006-02-24  DJ Delorie  <dj@redhat.com>
 697
 698         * m32c.cpu (RL_TYPE): New attribute, with macros.
 699         (Lab-8-24): Add RELAX.
 700         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 701         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 702         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 703         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 704         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 705         attribute.
 706         (jsri16, jsri32): Add 1ADDR attribute.
 707         (jsr32.w, jsr32.a): Add JUMP attribute.
 708
 709 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 710             Anil Paranjape   <anilp1@kpitcummins.com>
 711             Shilin Shakti    <shilins@kpitcummins.com>
 712
 713         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 714         description.
 715         * xc16x.opc: New file containing supporting XC16C routines.
 716
 717 2006-02-10  Nick Clifton  <nickc@redhat.com>
 718
 719         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 720
 721 2006-01-06  DJ Delorie  <dj@redhat.com>
 722
 723         * m32c.cpu (mov.w:q): Fix mode.
 724         (push32.b.imm): Likewise, for the comment.
 725
 726 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 727
 728         Second part of ms1 to mt renaming.
 729         * mt.cpu (define-arch, define-isa): Set name to mt.
 730         (define-mach): Adjust.
 731         * mt.opc (CGEN_ASM_HASH): Update.
 732         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 733         (parse_loopsize, parse_imm16): Adjust.
 734
 735 2005-12-13  DJ Delorie  <dj@redhat.com>
 736
 737         * m32c.cpu (jsri): Fix order so register names aren't treated as
 738         symbols.
 739         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 740         indexwd, indexws): Fix encodings.
 741
 742 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 743
 744         * mt.cpu: Rename from ms1.cpu.
 745         * mt.opc: Rename from ms1.opc.
 746
 747 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 748
 749         * cris.cpu (simplecris-common-writable-specregs)
 750         (simplecris-common-readable-specregs): Split from
 751         simplecris-common-specregs.  All users changed.
 752         (cris-implemented-writable-specregs-v0)
 753         (cris-implemented-readable-specregs-v0): Similar from
 754         cris-implemented-specregs-v0.
 755         (cris-implemented-writable-specregs-v3)
 756         (cris-implemented-readable-specregs-v3)
 757         (cris-implemented-writable-specregs-v8)
 758         (cris-implemented-readable-specregs-v8)
 759         (cris-implemented-writable-specregs-v10)
 760         (cris-implemented-readable-specregs-v10)
 761         (cris-implemented-writable-specregs-v32)
 762         (cris-implemented-readable-specregs-v32): Similar.
 763         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 764         insns and specializations.
 765
 766 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 767
 768         Add ms2
 769         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 770         model.
 771         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 772         f-cb2incr, f-rc3): New fields.
 773         (LOOP): New instruction.
 774         (JAL-HAZARD): New hazard.
 775         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 776         New operands.
 777         (mul, muli, dbnz, iflush): Enable for ms2
 778         (jal, reti): Has JAL-HAZARD.
 779         (ldctxt, ldfb, stfb): Only ms1.
 780         (fbcb): Only ms1,ms1-003.
 781         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 782         fbcbincrs, mfbcbincrs): Enable for ms2.
 783         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 784         * ms1.opc (parse_loopsize): New.
 785         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 786         (print_pcrel): New.
 787
 788 2005-10-28  Dave Brolley  <brolley@redhat.com>
 789
 790         Contribute the following change:
 791         2003-09-24  Dave Brolley  <brolley@redhat.com>
 792
 793         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 794         CGEN_ATTR_VALUE_TYPE.
 795         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 796         Use cgen_bitset_intersect_p.
 797
 798 2005-10-27  DJ Delorie  <dj@redhat.com>
 799
 800         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 801         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 802         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 803         imm operand is needed.
 804         (adjnz, sbjnz): Pass the right operands.
 805         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 806         unary-insn): Add -g variants for opcodes that need to support :G.
 807         (not.BW:G, push.BW:G): Call it.
 808         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 809         stzx16-imm8-imm8-abs16): Fix operand typos.
 810         * m32c.opc (m32c_asm_hash): Support bnCND.
 811         (parse_signed4n, print_signed4n): New.
 812
 813 2005-10-26  DJ Delorie  <dj@redhat.com>
 814
 815         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 816         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 817         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 818         dsp8[sp] is signed.
 819         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 820         (mov.BW:S r0,r1): Fix typo r1l->r1.
 821         (tst): Allow :G suffix.
 822         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 823
 824 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 825
 826         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 827
 828 2005-10-25  DJ Delorie  <dj@redhat.com>
 829
 830         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 831         making one a macro of the other.
 832
 833 2005-10-21  DJ Delorie  <dj@redhat.com>
 834
 835         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 836         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 837         indexld, indexls): .w variants have `1' bit.
 838         (rot32.b): QI, not SI.
 839         (rot32.w): HI, not SI.
 840         (xchg16): HI for .w variant.
 841
 842 2005-10-19  Nick Clifton  <nickc@redhat.com>
 843
 844         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 845
 846 2005-10-18  Andreas Schwab  <schwab@suse.de>
 847
 848         * m32r.opc (parse_slo16): Better version of previous patch.
 849
 850 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 851
 852         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 853         size.
 854
 855 2005-07-25  DJ Delorie  <dj@redhat.com>
 856
 857         * m32c.opc (parse_unsigned8): Add %dsp8().
 858         (parse_signed8): Add %hi8().
 859         (parse_unsigned16): Add %dsp16().
 860         (parse_signed16): Add %lo16() and %hi16().
 861         (parse_lab_5_3): Make valuep a bfd_vma *.
 862
 863 2005-07-18  Nick Clifton  <nickc@redhat.com>
 864
 865         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 866         components.
 867         (f-lab32-jmp-s): Fix insertion sequence.
 868         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 869         (Dsp-40-s8): Make parameter be signed.
 870         (Dsp-40-s16): Likewise.
 871         (Dsp-48-s8): Likewise.
 872         (Dsp-48-s16): Likewise.
 873         (Imm-13-u3): Likewise. (Despite its name!)
 874         (BitBase16-16-s8): Make the parameter be unsigned.
 875         (BitBase16-8-u11-S): Likewise.
 876         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 877         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 878         relaxation.
 879
 880         * m32c.opc: Fix formatting.
 881         Use safe-ctype.h instead of ctype.h
 882         Move duplicated code sequences into a macro.
 883         Fix compile time warnings about signedness mismatches.
 884         Remove dead code.
 885         (parse_lab_5_3): New parser function.
 886
 887 2005-07-16  Jim Blandy  <jimb@redhat.com>
 888
 889         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 890         to represent isa sets.
 891
 892 2005-07-15  Jim Blandy  <jimb@redhat.com>
 893
 894         * m32c.cpu, m32c.opc: Fix copyright.
 895
 896 2005-07-14  Jim Blandy  <jimb@redhat.com>
 897
 898         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 899
 900 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 901
 902         * ms1.opc (print_dollarhex): Correct format string.
 903
 904 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 905
 906         * iq2000.cpu: Include from binutils cpu dir.
 907
 908 2005-07-05  Nick Clifton  <nickc@redhat.com>
 909
 910         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 911         unsigned in order to avoid compile time warnings about sign
 912         conflicts.
 913
 914         * ms1.opc (parse_*): Likewise.
 915         (parse_imm16): Use a "void *" as it is passed both signed and
 916         unsigned arguments.
 917
 918 2005-07-01  Nick Clifton  <nickc@redhat.com>
 919
 920         * frv.opc: Update to ISO C90 function declaration style.
 921         * iq2000.opc: Likewise.
 922         * m32r.opc: Likewise.
 923         * sh.opc: Likewise.
 924
 925 2005-06-15  Dave Brolley  <brolley@redhat.com>
 926
 927         Contributed by Red Hat.
 928         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 929         * ms1.opc: New file.  Written by Stan Cox.
 930
 931 2005-05-10  Nick Clifton  <nickc@redhat.com>
 932
 933         * Update the address and phone number of the FSF organization in
 934         the GPL notices in the following files:
 935         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 936         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 937         sh64-media.cpu, simplify.inc
 938
 939 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 940
 941         * frv.opc (parse_A): Warning fix.
 942
 943 2005-02-23  Nick Clifton  <nickc@redhat.com>
 944
 945         * frv.opc: Fixed compile time warnings about differing signed'ness
 946         of pointers passed to functions.
 947         * m32r.opc: Likewise.
 948
 949 2005-02-11  Nick Clifton  <nickc@redhat.com>
 950
 951         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 952         'bfd_vma *' in order avoid compile time warning message.
 953
 954 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 955
 956         * cris.cpu (mstep): Add missing insn.
 957
 958 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 959
 960         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 961         * frv.cpu: Add support for TLS annotations in loads and calll.
 962         * frv.opc (parse_symbolic_address): New.
 963         (parse_ldd_annotation): New.
 964         (parse_call_annotation): New.
 965         (parse_ld_annotation): New.
 966         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 967         Introduce TLS relocations.
 968         (parse_d12, parse_s12, parse_u12): Likewise.
 969         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 970         (parse_call_label, print_at): New.
 971
 972 2004-12-21  Mikael Starvik  <starvik@axis.com>
 973
 974         * cris.cpu (cris-set-mem): Correct integral write semantics.
 975
 976 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 977
 978         * cris.cpu: New file.
 979
 980 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 981
 982         * iq2000.cpu: Added quotes around macro arguments so that they
 983         will work with newer versions of guile.
 984
 985 2004-10-27  Nick Clifton  <nickc@redhat.com>
 986
 987         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 988         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 989         operand.
 990         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 991         with guile.
 992
 993 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 994
 995         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 996
 997 2004-05-15  Nick Clifton  <nickc@redhat.com>
 998
 999         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
1000
1001 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1002
1003         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
1004
1005 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1006
1007         * frv.cpu (define-arch frv): Add fr450 mach.
1008         (define-mach fr450): New.
1009         (define-model fr450): New.  Add profile units to every fr450 insn.
1010         (define-attr UNIT): Add MDCUTSSI.
1011         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
1012         (define-attr AUDIO): New boolean.
1013         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
1014         (f-LRA-null, f-TLBPR-null): New fields.
1015         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
1016         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
1017         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
1018         (LRA-null, TLBPR-null): New macros.
1019         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
1020         (load-real-address): New macro.
1021         (lrai, lrad, tlbpr): New instructions.
1022         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
1023         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
1024         (mdcutssi): Change UNIT attribute to MDCUTSSI.
1025         (media-low-clear-semantics, media-scope-limit-semantics)
1026         (media-quad-limit, media-quad-shift): New macros.
1027         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
1028         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
1029         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
1030         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
1031         (fr450_unit_mapping): New array.
1032         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
1033         for new MDCUTSSI unit.
1034         (fr450_check_insn_major_constraints): New function.
1035         (check_insn_major_constraints): Use it.
1036
1037 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1038
1039         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
1040         (scutss): Change unit to I0.
1041         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
1042         (mqsaths): Fix FR400-MAJOR categorization.
1043         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
1044         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
1045         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
1046         combinations.
1047
1048 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1049
1050         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
1051         (rstb, rsth, rst, rstd, rstq): Delete.
1052         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
1053
1054 2004-02-23  Nick Clifton  <nickc@redhat.com>
1055
1056         * Apply these patches from Renesas:
1057
1058         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1059
1060         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
1061         disassembling codes for 0x*2 addresses.
1062
1063         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1064
1065         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
1066
1067         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1068
1069         * cpu/m32r.cpu : Add new model m32r2.
1070         Add new instructions.
1071         Replace occurrances of 'Mitsubishi' with 'Renesas'.
1072         Changed PIPE attr of push from O to OS.
1073         Care for Little-endian of M32R.
1074         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
1075         Care for Little-endian of M32R.
1076         (parse_slo16): signed extension for value.
1077
1078 2004-02-20  Andrew Cagney  <cagney@redhat.com>
1079
1080         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
1081         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
1082
1083         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
1084         written by Ben Elliston.
1085
1086 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1087
1088         * frv.cpu (UNIT): Add IACC.
1089         (iacc-multiply-r-r): Use it.
1090         * frv.opc (fr400_unit_mapping): Add entry for IACC.
1091         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
1092
1093 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1094
1095         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1096         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
1097         cut&paste errors in shifting/truncating numerical operands.
1098         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
1099         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1100         (parse_uslo16): Likewise.
1101         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1102         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1103         (parse_s12): Likewise.
1104         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1105         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
1106         (parse_uslo16): Likewise.
1107         (parse_uhi16): Parse gothi and gotfuncdeschi.
1108         (parse_d12): Parse got12 and gotfuncdesc12.
1109         (parse_s12): Likewise.
1110
1111 2003-10-10  Dave Brolley  <brolley@redhat.com>
1112
1113         * frv.cpu (dnpmop): New p-macro.
1114         (GRdoublek): Use dnpmop.
1115         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
1116         (store-double-r-r): Use (.sym regtype doublek).
1117         (r-store-double): Ditto.
1118         (store-double-r-r-u): Ditto.
1119         (conditional-store-double): Ditto.
1120         (conditional-store-double-u): Ditto.
1121         (store-double-r-simm): Ditto.
1122         (fmovs): Assign to UNIT FMALL.
1123
1124 2003-10-06  Dave Brolley  <brolley@redhat.com>
1125
1126         * frv.cpu, frv.opc: Add support for fr550.
1127
1128 2003-09-24  Dave Brolley  <brolley@redhat.com>
1129
1130         * frv.cpu (u-commit): New modelling unit for fr500.
1131         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
1132         (commit-r): Use u-commit model for fr500.
1133         (commit): Ditto.
1134         (conditional-float-binary-op): Take profiling data as an argument.
1135         Update callers.
1136         (ne-float-binary-op): Ditto.
1137
1138 2003-09-19  Michael Snyder  <msnyder@redhat.com>
1139
1140         * frv.cpu (nldqi): Delete unimplemented instruction.
1141
1142 2003-09-12  Dave Brolley  <brolley@redhat.com>
1143
1144         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1145         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1146         frv_ref_SI to get input register referenced for profiling.
1147         (clear-ne-flag-all): Pass insn profiling in as an argument.
1148         (clrgr,clrfr,clrga,clrfa): Add profiling information.
1149
1150 2003-09-11  Michael Snyder  <msnyder@redhat.com>
1151
1152         * frv.cpu: Typographical corrections.
1153
1154 2003-09-09  Dave Brolley  <brolley@redhat.com>
1155
1156         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1157         (conditional-media-dual-complex, media-quad-complex): Likewise.
1158
1159 2003-09-04  Dave Brolley  <brolley@redhat.com>
1160
1161         * frv.cpu (register-transfer): Pass in all attributes in on argument.
1162         Update all callers.
1163         (conditional-register-transfer): Ditto.
1164         (cache-preload): Ditto.
1165         (floating-point-conversion): Ditto.
1166         (floating-point-neg): Ditto.
1167         (float-abs): Ditto.
1168         (float-binary-op-s): Ditto.
1169         (conditional-float-binary-op): Ditto.
1170         (ne-float-binary-op): Ditto.
1171         (float-dual-arith): Ditto.
1172         (ne-float-dual-arith): Ditto.
1173
1174 2003-09-03  Dave Brolley  <brolley@redhat.com>
1175
1176         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1177         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1178         MCLRACC-1.
1179         (A): Removed operand.
1180         (A0,A1): New operands replace operand A.
1181         (mnop): Now a real insn
1182         (mclracc): Removed insn.
1183         (mclracc-0, mclracc-1): New insns replace mclracc.
1184         (all insns): Use new UNIT attributes.
1185
1186 2003-08-21  Nick Clifton  <nickc@redhat.com>
1187
1188         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1189         and u-media-dual-btoh with output parameter.
1190         (cmbtoh): Add profiling hack.
1191
1192 2003-08-19  Michael Snyder  <msnyder@redhat.com>
1193
1194         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1195
1196 2003-06-10  Doug Evans  <dje@sebabeach.org>
1197
1198         * frv.cpu: Add IDOC attribute.
1199
1200 2003-06-06  Andrew Cagney  <cagney@redhat.com>
1201
1202         Contributed by Red Hat.
1203         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
1204         Stan Cox, and Frank Ch. Eigler.
1205         * iq2000.opc: New file.  Written by Ben Elliston, Frank
1206         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1207         * iq2000m.cpu: New file.  Written by Jeff Johnston.
1208         * iq10.cpu: New file.  Written by Jeff Johnston.
1209
1210 2003-06-05  Nick Clifton  <nickc@redhat.com>
1211
1212         * frv.cpu (FRintieven): New operand.  An even-numbered only
1213         version of the FRinti operand.
1214         (FRintjeven): Likewise for FRintj.
1215         (FRintkeven): Likewise for FRintk.
1216         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1217         media-quad-arith-sat-semantics, media-quad-arith-sat,
1218         conditional-media-quad-arith-sat, mdunpackh,
1219         media-quad-multiply-semantics, media-quad-multiply,
1220         conditional-media-quad-multiply, media-quad-complex-i,
1221         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1222         conditional-media-quad-multiply-acc, munpackh,
1223         media-quad-multiply-cross-acc-semantics, mdpackh,
1224         media-quad-multiply-cross-acc, mbtoh-semantics,
1225         media-quad-cross-multiply-cross-acc-semantics,
1226         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1227         media-quad-cross-multiply-acc-semantics, cmbtoh,
1228         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1229         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1230         cmhtob): Use new operands.
1231         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1232         (parse_even_register): New function.
1233
1234 2003-06-03  Nick Clifton  <nickc@redhat.com>
1235
1236         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1237         immediate value not unsigned.
1238
1239 2003-06-03  Andrew Cagney  <cagney@redhat.com>
1240
1241         Contributed by Red Hat.
1242         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
1243         and Eric Christopher.
1244         * frv.opc: New file.  Written by Catherine Moore, and Dave
1245         Brolley.
1246         * simplify.inc: New file.  Written by Doug Evans.
1247
1248 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1249
1250         * New file.
1251
1252 \f
1253 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1254
1255 Copying and distribution of this file, with or without modification,
1256 are permitted in any medium without royalty provided the copyright
1257 notice and this notice are preserved.
1258
1259 Local Variables:
1260 mode: change-log
1261 left-margin: 8
1262 fill-column: 74
1263 version-control: never
1264 End: