cpu/ChangeLog

   1 2019-07-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
   2
   3         * bpf.cpu (dlabs): New pmacro.
   4         (dlind): Likewise.
   5
   6 2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
   7
   8         * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
   9         explicit 'dst' argument.
  10
  11 2019-06-13  Stafford Horne  <shorne@gmail.com>
  12
  13         * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
  14
  15 2019-06-13  Stafford Horne  <shorne@gmail.com>
  16
  17         * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
  18         (l-adrp): Improve comment.
  19
  20 2019-06-13  Stafford Horne  <shorne@gmail.com>
  21
  22         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
  23         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
  24         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
  25         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
  26         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
  27         float-setflag-unordered-symantics): New pmacro for instruction
  28         symantics.
  29         (float-setflag-insn): Update to use float-setflag-insn-base.
  30         (float-setflag-unordered-insn): New pmacro for generating instructions.
  31
  32 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
  33             Stafford Horne  <shorne@gmail.com>
  34
  35         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
  36         (ORFPX-MACHS): Removed pmacro.
  37         * or1k.opc (or1k_cgen_insn_supported): New function.
  38         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
  39         (parse_regpair, print_regpair): New functions.
  40         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
  41         and add comments.
  42         (h-fdr): Update comment to indicate or64.
  43         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
  44         (h-fd32r): New hardware for 64-bit fpu registers.
  45         (h-i64r): New hardware for 64-bit int registers.
  46         * or1korbis.cpu (f-resv-8-1): New field.
  47         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
  48         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
  49         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
  50         (h-roff1): New hardware.
  51         (double-field-and-ops mnemonic): New pmacro to generate operations
  52         rDD32F, rAD32F, rBD32F, rDDI and rADI.
  53         (float-regreg-insn): Update single precision generator to MACH
  54         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
  55         (float-setflag-insn): Update single precision generator to MACH
  56         ORFPX32-MACHS.  Fix double instructions from single to double
  57         precision.  Add generator for or32 64-bit instructions.
  58         (float-cust-insn cust-num): Update single precision generator to MACH
  59         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
  60         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
  61         ORFPX32-MACHS.
  62         (lf-rem-d): Fix operation from mod to rem.
  63         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
  64         (lf-itof-d): Fix operands from single to double.
  65         (lf-ftoi-d): Update operand mode from DI to WI.
  66
  67 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
  68
  69         * bpf.cpu: New file.
  70         * bpf.opc: Likewise.
  71
  72 2018-06-24  Nick Clifton  <nickc@redhat.com>
  73
  74         2.32 branch created.
  75
  76 2018-10-05  Richard Henderson  <rth@twiddle.net>
  77             Stafford Horne  <shorne@gmail.com>
  78
  79         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
  80         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
  81         (l-mul): Fix overflow support and indentation.
  82         (l-mulu): Fix overflow support and indentation.
  83         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
  84         (l-div); Remove incorrect carry behavior.
  85         (l-divu): Fix carry and overflow behavior.
  86         (l-mac): Add overflow support.
  87         (l-msb, l-msbu): Add carry and overflow support.
  88
  89 2018-10-05  Richard Henderson  <rth@twiddle.net>
  90
  91         * or1k.opc (parse_disp26): Add support for plta() relocations.
  92         (parse_disp21): New function.
  93         (or1k_rclass): New enum.
  94         (or1k_rtype): New enum.
  95         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
  96         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
  97         (parse_imm16): Add support for the new 21bit and 13bit relocations.
  98         * or1korbis.cpu (f-disp26): Don't assume SI.
  99         (f-disp21): New pc-relative 21-bit 13 shifted to right.
 100         (insn-opcode): Add ADRP.
 101         (l-adrp): New instruction.
 102
 103 2018-10-05  Richard Henderson  <rth@twiddle.net>
 104
 105         * or1k.opc: Add RTYPE_ enum.
 106         (INVALID_STORE_RELOC): New string.
 107         (or1k_imm16_relocs): New array array.
 108         (parse_reloc): New static function that just does the parsing.
 109         (parse_imm16): New static function for generic parsing.
 110         (parse_simm16): Change to just call parse_imm16.
 111         (parse_simm16_split): New function.
 112         (parse_uimm16): Change to call parse_imm16.
 113         (parse_uimm16_split): New function.
 114         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
 115         (uimm16-split): Change to use new uimm16_split.
 116
 117 2018-07-24  Alan Modra  <amodra@gmail.com>
 118
 119         PR 23430
 120         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 121
 122 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 123
 124         * or1kcommon.cpu (spr-reg-info): Typo fix.
 125
 126 2018-03-03  Alan Modra  <amodra@gmail.com>
 127
 128         * frv.opc: Include opintl.h.
 129         (add_next_to_vliw): Use opcodes_error_handler to print error.
 130         Standardize error message.
 131         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 132
 133 2018-01-13  Nick Clifton  <nickc@redhat.com>
 134
 135         2.30 branch created.
 136
 137 2017-03-15  Stafford Horne  <shorne@gmail.com>
 138
 139         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 140
 141 2016-10-06  Alan Modra  <amodra@gmail.com>
 142
 143         * mep.opc (expand_string): Add fall through comment.
 144
 145 2016-03-03  Alan Modra  <amodra@gmail.com>
 146
 147         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 148         at what is really going on.
 149
 150 2016-03-02  Alan Modra  <amodra@gmail.com>
 151
 152         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 153
 154 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 155
 156         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 157         a constant to better align disassembler output.
 158
 159 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 160
 161         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 162
 163 2014-06-12  Alan Modra  <amodra@gmail.com>
 164
 165         * or1k.opc: Whitespace fixes.
 166
 167 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 168
 169         * or1korbis.cpu (h-atomic-reserve): New hardware.
 170         (h-atomic-address): Likewise.
 171         (insn-opcode): Add opcodes for LWA and SWA.
 172         (atomic-reserve): New operand.
 173         (atomic-address): Likewise.
 174         (l-lwa, l-swa): New instructions.
 175         (l-lbs): Fix typo in comment.
 176         (store-insn): Clear atomic reserve on store to atomic-address.
 177         Fix register names in fmt field.
 178
 179 2014-04-22  Christian Svensson  <blue@cmd.nu>
 180
 181         * openrisc.cpu: Delete.
 182         * openrisc.opc: Delete.
 183         * or1k.cpu: New file.
 184         * or1k.opc: New file.
 185         * or1kcommon.cpu: New file.
 186         * or1korbis.cpu: New file.
 187         * or1korfpx.cpu: New file.
 188
 189 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 190
 191         * epiphany.opc: Remove +x file mode.
 192
 193 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 194
 195         PR binutils/15241
 196         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 197         TLBVADDR, TLBPADDR and TLBBADVADDR.
 198
 199 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 200             Joern Rennecke  <joern.rennecke@embecosm.com>
 201
 202         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 203         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 204         (testset-insn): Add NO_DIS attribute to t.l.
 205         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 206         (move-insns): Add NO-DIS attribute to cmov.l.
 207         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 208         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 209         (op-rrr): Add NO-DIS attribute to .l.
 210         (shift-rrr): Add NO-DIS attribute to .l.
 211         (op-shift-rri): Add NO-DIS attribute to i32.l.
 212         (bitrl, movtl): Add NO-DIS attribute.
 213         (op-iextrrr): Add NO-DIS attribute to .l
 214         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 215         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 216
 217 2012-02-27  Alan Modra  <amodra@gmail.com>
 218
 219         * mt.opc (print_dollarhex): Trim values to 32 bits.
 220
 221 2011-12-15  Nick Clifton  <nickc@redhat.com>
 222
 223         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 224         hosts.
 225
 226 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 227
 228         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 229         Cast value before printing it as a long.
 230         (parse_postindex): Fix type of valuep.
 231
 232 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 233
 234         * cpu/epiphany.cpu: New file.
 235         * cpu/epiphany.opc: New file.
 236
 237 2011-08-22  Nick Clifton  <nickc@redhat.com>
 238
 239         * fr30.cpu: Newly contributed file.
 240         * fr30.opc: Likewise.
 241         * ip2k.cpu: Likewise.
 242         * ip2k.opc: Likewise.
 243         * mep-avc.cpu: Likewise.
 244         * mep-avc2.cpu: Likewise.
 245         * mep-c5.cpu: Likewise.
 246         * mep-core.cpu: Likewise.
 247         * mep-default.cpu: Likewise.
 248         * mep-ext-cop.cpu: Likewise.
 249         * mep-fmax.cpu: Likewise.
 250         * mep-h1.cpu: Likewise.
 251         * mep-ivc2.cpu: Likewise.
 252         * mep-rhcop.cpu: Likewise.
 253         * mep-sample-ucidsp.cpu: Likewise.
 254         * mep.cpu: Likewise.
 255         * mep.opc: Likewise.
 256         * openrisc.cpu: Likewise.
 257         * openrisc.opc: Likewise.
 258         * xstormy16.cpu: Likewise.
 259         * xstormy16.opc: Likewise.
 260
 261 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 262
 263         * frv.opc: #undef DEBUG.
 264
 265 2010-07-03  DJ Delorie  <dj@delorie.com>
 266
 267         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 268
 269 2010-02-11  Doug Evans  <dje@sebabeach.org>
 270
 271         * m32r.cpu (HASH-PREFIX): Delete.
 272         (duhpo, dshpo): New pmacros.
 273         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 274         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 275         attribute, define with dshpo.
 276         (uimm24): Delete HASH-PREFIX attribute.
 277         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 278         (print_signed_with_hash_prefix): New function.
 279         (print_unsigned_with_hash_prefix): New function.
 280         * xc16x.cpu (dowh): New pmacro.
 281         (upof16): Define with dowh, specify print handler.
 282         (qbit, qlobit, qhibit): Ditto.
 283         (upag16): Ditto.
 284         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 285         (print_with_dot_prefix): New functions.
 286         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 287
 288 2010-01-24  Doug Evans  <dje@sebabeach.org>
 289
 290         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 291         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 292         conditional-floating-point-conversion, ne-floating-point-conversion,
 293         float-parallel-mul-add-double-semantics): Ditto.
 294
 295 2010-01-05  Doug Evans  <dje@sebabeach.org>
 296
 297         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 298         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 299
 300 2010-01-02  Doug Evans  <dje@sebabeach.org>
 301
 302         * m32c.opc (parse_signed16): Fix typo.
 303
 304 2009-12-11  Nick Clifton  <nickc@redhat.com>
 305
 306         * frv.opc: Fix shadowed variable warnings.
 307         * m32c.opc: Fix shadowed variable warnings.
 308
 309 2009-11-14  Doug Evans  <dje@sebabeach.org>
 310
 311         Must use VOID expression in VOID context.
 312         * xc16x.cpu (mov4): Fix mode of `sequence'.
 313         (mov9, mov10): Ditto.
 314         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 315         (callr, callseg, calls, trap, rets, reti): Ditto.
 316         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 317         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 318         (exts, exts1, extsr, extsr1, prior): Ditto.
 319
 320 2009-10-23  Doug Evans  <dje@sebabeach.org>
 321
 322         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 323         cgen-ops.h -> cgen/basic-ops.h.
 324
 325 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 326
 327         * m32r.cpu (stb-plus): Typo fix.
 328
 329 2009-09-23  Doug Evans  <dje@sebabeach.org>
 330
 331         * m32r.cpu (sth-plus): Fix address mode and calculation.
 332         (stb-plus): Ditto.
 333         (clrpsw): Fix mask calculation.
 334         (bset, bclr, btst): Make mode in bit calculation match expression.
 335
 336         * xc16x.cpu (rtl-version): Set to 0.8.
 337         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 338         make uppercase.  Remove unnecessary name-prefix spec.
 339         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 340         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 341         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 342         (h-cr): New hardware.
 343         (muls): Comment out parts that won't compile, add fixme.
 344         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 345         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 346         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 347
 348 2009-07-16  Doug Evans  <dje@sebabeach.org>
 349
 350         * cpu/simplify.inc (*): One line doc strings don't need \n.
 351         (df): Invoke define-full-ifield instead of claiming it's an alias.
 352         (dno): Define.
 353         (dnop): Mark as deprecated.
 354
 355 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 356
 357         * m32c.opc (parse_lab_5_3): Use correct enum.
 358
 359 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 360
 361         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 362         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 363         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 364         arguments of "operation" to DI using "mode" and the new pmacros.
 365
 366 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 367
 368         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 369         of number 2, PID.
 370
 371 2008-12-23  Jon Beniston <jon@beniston.com>
 372
 373         * lm32.cpu: New file.
 374         * lm32.opc: New file.
 375
 376 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 377
 378         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 379         to source.
 380
 381 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 382
 383         * cris.cpu (movs, movu): Use result of extension operation when
 384         updating flags.
 385
 386 2007-07-04  Nick Clifton  <nickc@redhat.com>
 387
 388         * cris.cpu: Update copyright notice to refer to GPLv3.
 389         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 390         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 391         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 392         xc16x.opc: Likewise.
 393         * iq2000.cpu: Fix copyright notice to refer to FSF.
 394
 395 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 396
 397         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 398
 399 2007-04-20  Nick Clifton  <nickc@redhat.com>
 400
 401         * xc16x.cpu: Restore after accidentally overwriting this file with
 402         xc16x.opc.
 403
 404 2007-03-29  DJ Delorie  <dj@redhat.com>
 405
 406         * m32c.cpu (Imm-8-s4n): Fix print hook.
 407         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 408         (arith-jnz-imm4-dst-defn): Make relaxable.
 409         (arith-jnz16-imm4-dst-defn): Fix encodings.
 410
 411 2007-03-20  DJ Delorie  <dj@redhat.com>
 412
 413         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 414         mem20): New.
 415         (src16-16-20-An-relative-*): New.
 416         (dst16-*-20-An-relative-*): New.
 417         (dst16-16-16sa-*): New
 418         (dst16-16-16ar-*): New
 419         (dst32-16-16sa-Unprefixed-*): New
 420         (jsri): Fix operands.
 421         (setzx): Fix encoding.
 422
 423 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 424
 425         * m32r.opc: Formatting.
 426
 427 2006-05-22  Nick Clifton  <nickc@redhat.com>
 428
 429         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 430
 431 2006-04-10  DJ Delorie  <dj@redhat.com>
 432
 433         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 434         decides if this function accepts symbolic constants or not.
 435         (parse_signed_bitbase): Likewise.
 436         (parse_unsigned_bitbase8): Pass the new parameter.
 437         (parse_unsigned_bitbase11): Likewise.
 438         (parse_unsigned_bitbase16): Likewise.
 439         (parse_unsigned_bitbase19): Likewise.
 440         (parse_unsigned_bitbase27): Likewise.
 441         (parse_signed_bitbase8): Likewise.
 442         (parse_signed_bitbase11): Likewise.
 443         (parse_signed_bitbase19): Likewise.
 444
 445 2006-03-13  DJ Delorie  <dj@redhat.com>
 446
 447         * m32c.cpu (Bit3-S): New.
 448         (btst:s): New.
 449         * m32c.opc (parse_bit3_S): New.
 450
 451         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 452         (btst): Add optional :G suffix for MACH32.
 453         (or.b:S): New.
 454         (pop.w:G): Add optional :G suffix for MACH16.
 455         (push.b.imm): Fix syntax.
 456
 457 2006-03-10  DJ Delorie  <dj@redhat.com>
 458
 459         * m32c.cpu (mul.l): New.
 460         (mulu.l): New.
 461
 462 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 463
 464         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 465         an error message otherwise.
 466         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 467         Fix up comments to correctly describe the functions.
 468
 469 2006-02-24  DJ Delorie  <dj@redhat.com>
 470
 471         * m32c.cpu (RL_TYPE): New attribute, with macros.
 472         (Lab-8-24): Add RELAX.
 473         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 474         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 475         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 476         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 477         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 478         attribute.
 479         (jsri16, jsri32): Add 1ADDR attribute.
 480         (jsr32.w, jsr32.a): Add JUMP attribute.
 481
 482 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 483             Anil Paranjape   <anilp1@kpitcummins.com>
 484             Shilin Shakti    <shilins@kpitcummins.com>
 485
 486         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 487         description.
 488         * xc16x.opc: New file containing supporting XC16C routines.
 489
 490 2006-02-10  Nick Clifton  <nickc@redhat.com>
 491
 492         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 493
 494 2006-01-06  DJ Delorie  <dj@redhat.com>
 495
 496         * m32c.cpu (mov.w:q): Fix mode.
 497         (push32.b.imm): Likewise, for the comment.
 498
 499 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 500
 501         Second part of ms1 to mt renaming.
 502         * mt.cpu (define-arch, define-isa): Set name to mt.
 503         (define-mach): Adjust.
 504         * mt.opc (CGEN_ASM_HASH): Update.
 505         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 506         (parse_loopsize, parse_imm16): Adjust.
 507
 508 2005-12-13  DJ Delorie  <dj@redhat.com>
 509
 510         * m32c.cpu (jsri): Fix order so register names aren't treated as
 511         symbols.
 512         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 513         indexwd, indexws): Fix encodings.
 514
 515 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 516
 517         * mt.cpu: Rename from ms1.cpu.
 518         * mt.opc: Rename from ms1.opc.
 519
 520 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 521
 522         * cris.cpu (simplecris-common-writable-specregs)
 523         (simplecris-common-readable-specregs): Split from
 524         simplecris-common-specregs.  All users changed.
 525         (cris-implemented-writable-specregs-v0)
 526         (cris-implemented-readable-specregs-v0): Similar from
 527         cris-implemented-specregs-v0.
 528         (cris-implemented-writable-specregs-v3)
 529         (cris-implemented-readable-specregs-v3)
 530         (cris-implemented-writable-specregs-v8)
 531         (cris-implemented-readable-specregs-v8)
 532         (cris-implemented-writable-specregs-v10)
 533         (cris-implemented-readable-specregs-v10)
 534         (cris-implemented-writable-specregs-v32)
 535         (cris-implemented-readable-specregs-v32): Similar.
 536         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 537         insns and specializations.
 538
 539 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 540
 541         Add ms2
 542         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 543         model.
 544         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 545         f-cb2incr, f-rc3): New fields.
 546         (LOOP): New instruction.
 547         (JAL-HAZARD): New hazard.
 548         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 549         New operands.
 550         (mul, muli, dbnz, iflush): Enable for ms2
 551         (jal, reti): Has JAL-HAZARD.
 552         (ldctxt, ldfb, stfb): Only ms1.
 553         (fbcb): Only ms1,ms1-003.
 554         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 555         fbcbincrs, mfbcbincrs): Enable for ms2.
 556         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 557         * ms1.opc (parse_loopsize): New.
 558         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 559         (print_pcrel): New.
 560
 561 2005-10-28  Dave Brolley  <brolley@redhat.com>
 562
 563         Contribute the following change:
 564         2003-09-24  Dave Brolley  <brolley@redhat.com>
 565
 566         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 567         CGEN_ATTR_VALUE_TYPE.
 568         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 569         Use cgen_bitset_intersect_p.
 570
 571 2005-10-27  DJ Delorie  <dj@redhat.com>
 572
 573         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 574         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 575         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 576         imm operand is needed.
 577         (adjnz, sbjnz): Pass the right operands.
 578         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 579         unary-insn): Add -g variants for opcodes that need to support :G.
 580         (not.BW:G, push.BW:G): Call it.
 581         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 582         stzx16-imm8-imm8-abs16): Fix operand typos.
 583         * m32c.opc (m32c_asm_hash): Support bnCND.
 584         (parse_signed4n, print_signed4n): New.
 585
 586 2005-10-26  DJ Delorie  <dj@redhat.com>
 587
 588         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 589         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 590         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 591         dsp8[sp] is signed.
 592         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 593         (mov.BW:S r0,r1): Fix typo r1l->r1.
 594         (tst): Allow :G suffix.
 595         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 596
 597 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 598
 599         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 600
 601 2005-10-25  DJ Delorie  <dj@redhat.com>
 602
 603         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 604         making one a macro of the other.
 605
 606 2005-10-21  DJ Delorie  <dj@redhat.com>
 607
 608         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 609         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 610         indexld, indexls): .w variants have `1' bit.
 611         (rot32.b): QI, not SI.
 612         (rot32.w): HI, not SI.
 613         (xchg16): HI for .w variant.
 614
 615 2005-10-19  Nick Clifton  <nickc@redhat.com>
 616
 617         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 618
 619 2005-10-18  Andreas Schwab  <schwab@suse.de>
 620
 621         * m32r.opc (parse_slo16): Better version of previous patch.
 622
 623 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 624
 625         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 626         size.
 627
 628 2005-07-25  DJ Delorie  <dj@redhat.com>
 629
 630         * m32c.opc (parse_unsigned8): Add %dsp8().
 631         (parse_signed8): Add %hi8().
 632         (parse_unsigned16): Add %dsp16().
 633         (parse_signed16): Add %lo16() and %hi16().
 634         (parse_lab_5_3): Make valuep a bfd_vma *.
 635
 636 2005-07-18  Nick Clifton  <nickc@redhat.com>
 637
 638         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 639         components.
 640         (f-lab32-jmp-s): Fix insertion sequence.
 641         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 642         (Dsp-40-s8): Make parameter be signed.
 643         (Dsp-40-s16): Likewise.
 644         (Dsp-48-s8): Likewise.
 645         (Dsp-48-s16): Likewise.
 646         (Imm-13-u3): Likewise. (Despite its name!)
 647         (BitBase16-16-s8): Make the parameter be unsigned.
 648         (BitBase16-8-u11-S): Likewise.
 649         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 650         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 651         relaxation.
 652
 653         * m32c.opc: Fix formatting.
 654         Use safe-ctype.h instead of ctype.h
 655         Move duplicated code sequences into a macro.
 656         Fix compile time warnings about signedness mismatches.
 657         Remove dead code.
 658         (parse_lab_5_3): New parser function.
 659
 660 2005-07-16  Jim Blandy  <jimb@redhat.com>
 661
 662         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 663         to represent isa sets.
 664
 665 2005-07-15  Jim Blandy  <jimb@redhat.com>
 666
 667         * m32c.cpu, m32c.opc: Fix copyright.
 668
 669 2005-07-14  Jim Blandy  <jimb@redhat.com>
 670
 671         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 672
 673 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 674
 675         * ms1.opc (print_dollarhex): Correct format string.
 676
 677 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 678
 679         * iq2000.cpu: Include from binutils cpu dir.
 680
 681 2005-07-05  Nick Clifton  <nickc@redhat.com>
 682
 683         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 684         unsigned in order to avoid compile time warnings about sign
 685         conflicts.
 686
 687         * ms1.opc (parse_*): Likewise.
 688         (parse_imm16): Use a "void *" as it is passed both signed and
 689         unsigned arguments.
 690
 691 2005-07-01  Nick Clifton  <nickc@redhat.com>
 692
 693         * frv.opc: Update to ISO C90 function declaration style.
 694         * iq2000.opc: Likewise.
 695         * m32r.opc: Likewise.
 696         * sh.opc: Likewise.
 697
 698 2005-06-15  Dave Brolley  <brolley@redhat.com>
 699
 700         Contributed by Red Hat.
 701         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 702         * ms1.opc: New file.  Written by Stan Cox.
 703
 704 2005-05-10  Nick Clifton  <nickc@redhat.com>
 705
 706         * Update the address and phone number of the FSF organization in
 707         the GPL notices in the following files:
 708         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 709         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 710         sh64-media.cpu, simplify.inc
 711
 712 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 713
 714         * frv.opc (parse_A): Warning fix.
 715
 716 2005-02-23  Nick Clifton  <nickc@redhat.com>
 717
 718         * frv.opc: Fixed compile time warnings about differing signed'ness
 719         of pointers passed to functions.
 720         * m32r.opc: Likewise.
 721
 722 2005-02-11  Nick Clifton  <nickc@redhat.com>
 723
 724         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 725         'bfd_vma *' in order avoid compile time warning message.
 726
 727 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 728
 729         * cris.cpu (mstep): Add missing insn.
 730
 731 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 732
 733         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 734         * frv.cpu: Add support for TLS annotations in loads and calll.
 735         * frv.opc (parse_symbolic_address): New.
 736         (parse_ldd_annotation): New.
 737         (parse_call_annotation): New.
 738         (parse_ld_annotation): New.
 739         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 740         Introduce TLS relocations.
 741         (parse_d12, parse_s12, parse_u12): Likewise.
 742         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 743         (parse_call_label, print_at): New.
 744
 745 2004-12-21  Mikael Starvik  <starvik@axis.com>
 746
 747         * cris.cpu (cris-set-mem): Correct integral write semantics.
 748
 749 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 750
 751         * cris.cpu: New file.
 752
 753 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 754
 755         * iq2000.cpu: Added quotes around macro arguments so that they
 756         will work with newer versions of guile.
 757
 758 2004-10-27  Nick Clifton  <nickc@redhat.com>
 759
 760         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 761         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 762         operand.
 763         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 764         with guile.
 765
 766 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 767
 768         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 769
 770 2004-05-15  Nick Clifton  <nickc@redhat.com>
 771
 772         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 773
 774 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 775
 776         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 777
 778 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 779
 780         * frv.cpu (define-arch frv): Add fr450 mach.
 781         (define-mach fr450): New.
 782         (define-model fr450): New.  Add profile units to every fr450 insn.
 783         (define-attr UNIT): Add MDCUTSSI.
 784         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 785         (define-attr AUDIO): New boolean.
 786         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 787         (f-LRA-null, f-TLBPR-null): New fields.
 788         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 789         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 790         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 791         (LRA-null, TLBPR-null): New macros.
 792         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 793         (load-real-address): New macro.
 794         (lrai, lrad, tlbpr): New instructions.
 795         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 796         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 797         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 798         (media-low-clear-semantics, media-scope-limit-semantics)
 799         (media-quad-limit, media-quad-shift): New macros.
 800         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 801         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 802         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 803         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 804         (fr450_unit_mapping): New array.
 805         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 806         for new MDCUTSSI unit.
 807         (fr450_check_insn_major_constraints): New function.
 808         (check_insn_major_constraints): Use it.
 809
 810 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 811
 812         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
 813         (scutss): Change unit to I0.
 814         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
 815         (mqsaths): Fix FR400-MAJOR categorization.
 816         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
 817         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
 818         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
 819         combinations.
 820
 821 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 822
 823         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
 824         (rstb, rsth, rst, rstd, rstq): Delete.
 825         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
 826
 827 2004-02-23  Nick Clifton  <nickc@redhat.com>
 828
 829         * Apply these patches from Renesas:
 830
 831         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 832
 833         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
 834         disassembling codes for 0x*2 addresses.
 835
 836         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 837
 838         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
 839
 840         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 841
 842         * cpu/m32r.cpu : Add new model m32r2.
 843         Add new instructions.
 844         Replace occurrances of 'Mitsubishi' with 'Renesas'.
 845         Changed PIPE attr of push from O to OS.
 846         Care for Little-endian of M32R.
 847         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
 848         Care for Little-endian of M32R.
 849         (parse_slo16): signed extension for value.
 850
 851 2004-02-20  Andrew Cagney  <cagney@redhat.com>
 852
 853         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
 854         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
 855
 856         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
 857         written by Ben Elliston.
 858
 859 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 860
 861         * frv.cpu (UNIT): Add IACC.
 862         (iacc-multiply-r-r): Use it.
 863         * frv.opc (fr400_unit_mapping): Add entry for IACC.
 864         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
 865
 866 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 867
 868         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 869         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
 870         cut&paste errors in shifting/truncating numerical operands.
 871         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
 872         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 873         (parse_uslo16): Likewise.
 874         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 875         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 876         (parse_s12): Likewise.
 877         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 878         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
 879         (parse_uslo16): Likewise.
 880         (parse_uhi16): Parse gothi and gotfuncdeschi.
 881         (parse_d12): Parse got12 and gotfuncdesc12.
 882         (parse_s12): Likewise.
 883
 884 2003-10-10  Dave Brolley  <brolley@redhat.com>
 885
 886         * frv.cpu (dnpmop): New p-macro.
 887         (GRdoublek): Use dnpmop.
 888         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
 889         (store-double-r-r): Use (.sym regtype doublek).
 890         (r-store-double): Ditto.
 891         (store-double-r-r-u): Ditto.
 892         (conditional-store-double): Ditto.
 893         (conditional-store-double-u): Ditto.
 894         (store-double-r-simm): Ditto.
 895         (fmovs): Assign to UNIT FMALL.
 896
 897 2003-10-06  Dave Brolley  <brolley@redhat.com>
 898
 899         * frv.cpu, frv.opc: Add support for fr550.
 900
 901 2003-09-24  Dave Brolley  <brolley@redhat.com>
 902
 903         * frv.cpu (u-commit): New modelling unit for fr500.
 904         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
 905         (commit-r): Use u-commit model for fr500.
 906         (commit): Ditto.
 907         (conditional-float-binary-op): Take profiling data as an argument.
 908         Update callers.
 909         (ne-float-binary-op): Ditto.
 910
 911 2003-09-19  Michael Snyder  <msnyder@redhat.com>
 912
 913         * frv.cpu (nldqi): Delete unimplemented instruction.
 914
 915 2003-09-12  Dave Brolley  <brolley@redhat.com>
 916
 917         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
 918         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
 919         frv_ref_SI to get input register referenced for profiling.
 920         (clear-ne-flag-all): Pass insn profiling in as an argument.
 921         (clrgr,clrfr,clrga,clrfa): Add profiling information.
 922
 923 2003-09-11  Michael Snyder  <msnyder@redhat.com>
 924
 925         * frv.cpu: Typographical corrections.
 926
 927 2003-09-09  Dave Brolley  <brolley@redhat.com>
 928
 929         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
 930         (conditional-media-dual-complex, media-quad-complex): Likewise.
 931
 932 2003-09-04  Dave Brolley  <brolley@redhat.com>
 933
 934         * frv.cpu (register-transfer): Pass in all attributes in on argument.
 935         Update all callers.
 936         (conditional-register-transfer): Ditto.
 937         (cache-preload): Ditto.
 938         (floating-point-conversion): Ditto.
 939         (floating-point-neg): Ditto.
 940         (float-abs): Ditto.
 941         (float-binary-op-s): Ditto.
 942         (conditional-float-binary-op): Ditto.
 943         (ne-float-binary-op): Ditto.
 944         (float-dual-arith): Ditto.
 945         (ne-float-dual-arith): Ditto.
 946
 947 2003-09-03  Dave Brolley  <brolley@redhat.com>
 948
 949         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
 950         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
 951         MCLRACC-1.
 952         (A): Removed operand.
 953         (A0,A1): New operands replace operand A.
 954         (mnop): Now a real insn
 955         (mclracc): Removed insn.
 956         (mclracc-0, mclracc-1): New insns replace mclracc.
 957         (all insns): Use new UNIT attributes.
 958
 959 2003-08-21  Nick Clifton  <nickc@redhat.com>
 960
 961         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
 962         and u-media-dual-btoh with output parameter.
 963         (cmbtoh): Add profiling hack.
 964
 965 2003-08-19  Michael Snyder  <msnyder@redhat.com>
 966
 967         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
 968
 969 2003-06-10  Doug Evans  <dje@sebabeach.org>
 970
 971         * frv.cpu: Add IDOC attribute.
 972
 973 2003-06-06  Andrew Cagney  <cagney@redhat.com>
 974
 975         Contributed by Red Hat.
 976         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
 977         Stan Cox, and Frank Ch. Eigler.
 978         * iq2000.opc: New file.  Written by Ben Elliston, Frank
 979         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
 980         * iq2000m.cpu: New file.  Written by Jeff Johnston.
 981         * iq10.cpu: New file.  Written by Jeff Johnston.
 982
 983 2003-06-05  Nick Clifton  <nickc@redhat.com>
 984
 985         * frv.cpu (FRintieven): New operand.  An even-numbered only
 986         version of the FRinti operand.
 987         (FRintjeven): Likewise for FRintj.
 988         (FRintkeven): Likewise for FRintk.
 989         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
 990         media-quad-arith-sat-semantics, media-quad-arith-sat,
 991         conditional-media-quad-arith-sat, mdunpackh,
 992         media-quad-multiply-semantics, media-quad-multiply,
 993         conditional-media-quad-multiply, media-quad-complex-i,
 994         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
 995         conditional-media-quad-multiply-acc, munpackh,
 996         media-quad-multiply-cross-acc-semantics, mdpackh,
 997         media-quad-multiply-cross-acc, mbtoh-semantics,
 998         media-quad-cross-multiply-cross-acc-semantics,
 999         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1000         media-quad-cross-multiply-acc-semantics, cmbtoh,
1001         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1002         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1003         cmhtob): Use new operands.
1004         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1005         (parse_even_register): New function.
1006
1007 2003-06-03  Nick Clifton  <nickc@redhat.com>
1008
1009         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1010         immediate value not unsigned.
1011
1012 2003-06-03  Andrew Cagney  <cagney@redhat.com>
1013
1014         Contributed by Red Hat.
1015         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
1016         and Eric Christopher.
1017         * frv.opc: New file.  Written by Catherine Moore, and Dave
1018         Brolley.
1019         * simplify.inc: New file.  Written by Doug Evans.
1020
1021 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1022
1023         * New file.
1024
1025 \f
1026 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1027
1028 Copying and distribution of this file, with or without modification,
1029 are permitted in any medium without royalty provided the copyright
1030 notice and this notice are preserved.
1031
1032 Local Variables:
1033 mode: change-log
1034 left-margin: 8
1035 fill-column: 74
1036 version-control: never
1037 End: