1 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
3 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
4 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
5 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
6 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
7 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
8 doc/c-z80.texi, doc/internals.texi: Fix some typos.
10 2006-07-21 Nick Clifton <nickc@redhat.com>
12 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
15 2006-07-20 Thiemo Seufer <ths@mips.com>
16 Nigel Stephens <nigel@mips.com>
18 * config/tc-mips.c (md_parse_option): Don't infer optimisation
19 options from debug options.
21 2006-07-20 Thiemo Seufer <ths@mips.com>
23 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
24 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
26 2006-07-19 Paul Brook <paul@codesourcery.com>
28 * config/tc-arm.c (insns): Fix rbit Arm opcode.
30 2006-07-18 Paul Brook <paul@codesourcery.com>
32 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
33 (md_convert_frag): Use correct reloc for add_pc. Use
34 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
35 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
36 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
38 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
40 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
41 when file and line unknown.
43 2006-07-17 Thiemo Seufer <ths@mips.com>
45 * read.c (s_struct): Use IS_ELF.
46 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
47 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
48 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
49 s_mips_mask): Likewise.
51 2006-07-16 Thiemo Seufer <ths@mips.com>
52 David Ung <davidu@mips.com>
54 * read.c (s_struct): Handle ELF section changing.
55 * config/tc-mips.c (s_align): Leave enabling auto-align to the
57 (s_change_sec): Try section changing only if we output ELF.
59 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
61 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
63 (smallest_imm_type): Remove Cpu086.
64 (i386_target_format): Likewise.
66 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
69 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
70 Michael Meissner <michael.meissner@amd.com>
72 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
73 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
74 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
76 (i386_align_code): Ditto.
77 (md_assemble_code): Add support for insertq/extrq instructions,
78 swapping as needed for intel syntax.
79 (swap_imm_operands): New function to swap immediate operands.
80 (swap_operands): Deal with 4 operand instructions.
81 (build_modrm_byte): Add support for insertq instruction.
83 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
85 * config/tc-i386.h (Size64): Fix a typo in comment.
87 2006-07-12 Nick Clifton <nickc@redhat.com>
89 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
90 fixup_segment() to repeat a range check on a value that has
91 already been checked here.
93 2006-07-07 James E Wilson <wilson@specifix.com>
95 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
97 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
98 Nick Clifton <nickc@redhat.com>
101 * doc/as.texi: Fix spelling typo: branchs => branches.
102 * doc/c-m68hc11.texi: Likewise.
103 * config/tc-m68hc11.c: Likewise.
104 Support old spelling of command line switch for backwards
107 2006-07-04 Thiemo Seufer <ths@mips.com>
108 David Ung <davidu@mips.com>
110 * config/tc-mips.c (s_is_linkonce): New function.
111 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
112 weak, external, and linkonce symbols.
113 (pic_need_relax): Use s_is_linkonce.
115 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
117 * doc/as.texinfo (Org): Remove space.
118 (P2align): Add "@var{abs-expr},".
120 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
122 * config/tc-i386.c (cpu_arch_tune_set): New.
123 (cpu_arch_isa): Likewise.
124 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
125 nops with short or long nop sequences based on -march=/.arch
127 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
128 set cpu_arch_tune and cpu_arch_tune_flags.
129 (md_parse_option): For -march=, set cpu_arch_isa and set
130 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
131 0. Set cpu_arch_tune_set to 1 for -mtune=.
132 (i386_target_format): Don't set cpu_arch_tune.
134 2006-06-23 Nigel Stephens <nigel@mips.com>
136 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
137 generated .sbss.* and .gnu.linkonce.sb.*.
139 2006-06-23 Thiemo Seufer <ths@mips.com>
140 David Ung <davidu@mips.com>
142 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
144 * config/tc-mips.c (label_list): Define per-segment label_list.
145 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
146 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
147 mips_from_file_after_relocs, mips_define_label): Use per-segment
150 2006-06-22 Thiemo Seufer <ths@mips.com>
152 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
153 (append_insn): Use it.
154 (md_apply_fix): Whitespace formatting.
155 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
156 mips16_extended_frag): Remove register specifier.
157 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
160 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
162 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
163 a directive saving VFP registers for ARMv6 or later.
164 (s_arm_unwind_save): Add parameter arch_v6 and call
165 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
167 (md_pseudo_table): Add entry for new "vsave" directive.
168 * doc/c-arm.texi: Correct error in example for "save"
169 directive (fstmdf -> fstmdx). Also document "vsave" directive.
171 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
172 Anatoly Sokolov <aesok@post.ru>
174 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
175 and atmega644p devices. Rename atmega164/atmega324 devices to
176 atmega164p/atmega324p.
177 * doc/c-avr.texi: Document new mcu and arch options.
179 2006-06-17 Nick Clifton <nickc@redhat.com>
181 * config/tc-arm.c (enum parse_operand_result): Move outside of
182 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
184 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
186 * config/tc-i386.h (processor_type): New.
187 (arch_entry): Add type.
189 * config/tc-i386.c (cpu_arch_tune): New.
190 (cpu_arch_tune_flags): Likewise.
191 (cpu_arch_isa_flags): Likewise.
193 (set_cpu_arch): Also update cpu_arch_isa_flags.
194 (md_assemble): Update cpu_arch_isa_flags.
196 (OPTION_MTUNE): Likewise.
197 (md_longopts): Add -march= and -mtune=.
198 (md_parse_option): Support -march= and -mtune=.
199 (md_show_usage): Add -march=CPU/-mtune=CPU.
200 (i386_target_format): Also update cpu_arch_isa_flags,
201 cpu_arch_tune and cpu_arch_tune_flags.
203 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
205 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
207 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
209 * config/tc-arm.c (enum parse_operand_result): New.
210 (struct group_reloc_table_entry): New.
211 (enum group_reloc_type): New.
212 (group_reloc_table): New array.
213 (find_group_reloc_table_entry): New function.
214 (parse_shifter_operand_group_reloc): New function.
215 (parse_address_main): New function, incorporating code
216 from the old parse_address function. To be used via...
217 (parse_address): wrapper for parse_address_main; and
218 (parse_address_group_reloc): new function, likewise.
219 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
220 OP_ADDRGLDRS, OP_ADDRGLDC.
221 (parse_operands): Support for these new operand codes.
222 New macro po_misc_or_fail_no_backtrack.
223 (encode_arm_cp_address): Preserve group relocations.
224 (insns): Modify to use the above operand codes where group
225 relocations are permitted.
226 (md_apply_fix): Handle the group relocations
227 ALU_PC_G0_NC through LDC_SB_G2.
228 (tc_gen_reloc): Likewise.
229 (arm_force_relocation): Leave group relocations for the linker.
230 (arm_fix_adjustable): Likewise.
232 2006-06-15 Julian Brown <julian@codesourcery.com>
234 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
235 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
238 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
240 * config/tc-i386.c (process_suffix): Don't add rex64 for
243 2006-06-09 Thiemo Seufer <ths@mips.com>
245 * config/tc-mips.c (mips_ip): Maintain argument count.
247 2006-06-09 Alan Modra <amodra@bigpond.net.au>
249 * config/tc-iq2000.c: Include sb.h.
251 2006-06-08 Nigel Stephens <nigel@mips.com>
253 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
254 aliases for better compatibility with SGI tools.
256 2006-06-08 Alan Modra <amodra@bigpond.net.au>
258 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
259 * Makefile.am (GASLIBS): Expand @BFDLIB@.
261 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
262 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
263 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
265 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
266 * Makefile.in: Regenerate.
267 * doc/Makefile.in: Regenerate.
268 * configure: Regenerate.
270 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
272 * po/Make-in (pdf, ps): New dummy targets.
274 2006-06-07 Julian Brown <julian@codesourcery.com>
276 * config/tc-arm.c (stdarg.h): include.
277 (arm_it): Add uncond_value field. Add isvec and issingle to operand
279 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
280 REG_TYPE_NSDQ (single, double or quad vector reg).
281 (reg_expected_msgs): Update.
282 (BAD_FPU): Add macro for unsupported FPU instruction error.
283 (parse_neon_type): Support 'd' as an alias for .f64.
284 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
286 (parse_vfp_reg_list): Don't update first arg on error.
287 (parse_neon_mov): Support extra syntax for VFP moves.
288 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
289 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
290 (parse_operands): Support isvec, issingle operands fields, new parse
292 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
294 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
295 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
296 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
297 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
299 (neon_shape): Redefine in terms of above.
300 (neon_shape_class): New enumeration, table of shape classes.
301 (neon_shape_el): New enumeration. One element of a shape.
302 (neon_shape_el_size): Register widths of above, where appropriate.
303 (neon_shape_info): New struct. Info for shape table.
304 (neon_shape_tab): New array.
305 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
306 (neon_check_shape): Rewrite as...
307 (neon_select_shape): New function to classify instruction shapes,
308 driven by new table neon_shape_tab array.
309 (neon_quad): New function. Return 1 if shape should set Q flag in
310 instructions (or equivalent), 0 otherwise.
311 (type_chk_of_el_type): Support F64.
312 (el_type_of_type_chk): Likewise.
313 (neon_check_type): Add support for VFP type checking (VFP data
314 elements fill their containing registers).
315 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
316 in thumb mode for VFP instructions.
317 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
318 and encode the current instruction as if it were that opcode.
319 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
320 arguments, call function in PFN.
321 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
322 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
323 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
324 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
325 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
326 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
327 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
328 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
329 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
330 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
331 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
332 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
333 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
334 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
335 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
337 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
338 between VFP and Neon turns out to belong to Neon. Perform
339 architecture check and fill in condition field if appropriate.
340 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
341 (do_neon_cvt): Add support for VFP variants of instructions.
342 (neon_cvt_flavour): Extend to cover VFP conversions.
343 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
345 (do_neon_ldr_str): Handle single-precision VFP load/store.
346 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
347 NS_NULL not NS_IGNORE.
348 (opcode_tag): Add OT_csuffixF for operands which either take a
349 conditional suffix, or have 0xF in the condition field.
350 (md_assemble): Add support for OT_csuffixF.
351 (NCE): Replace macro with...
352 (NCE_tag, NCE, NCEF): New macros.
353 (nCE): Replace macro with...
354 (nCE_tag, nCE, nCEF): New macros.
355 (insns): Add support for VFP insns or VFP versions of insns msr,
356 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
357 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
358 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
359 VFP/Neon insns together.
361 2006-06-07 Alan Modra <amodra@bigpond.net.au>
362 Ladislav Michl <ladis@linux-mips.org>
364 * app.c: Don't include headers already included by as.h.
366 * atof-generic.c: Likewise.
368 * dwarf2dbg.c: Likewise.
370 * input-file.c: Likewise.
371 * input-scrub.c: Likewise.
373 * output-file.c: Likewise.
376 * config/bfin-lex.l: Likewise.
377 * config/obj-coff.h: Likewise.
378 * config/obj-elf.h: Likewise.
379 * config/obj-som.h: Likewise.
380 * config/tc-arc.c: Likewise.
381 * config/tc-arm.c: Likewise.
382 * config/tc-avr.c: Likewise.
383 * config/tc-bfin.c: Likewise.
384 * config/tc-cris.c: Likewise.
385 * config/tc-d10v.c: Likewise.
386 * config/tc-d30v.c: Likewise.
387 * config/tc-dlx.h: Likewise.
388 * config/tc-fr30.c: Likewise.
389 * config/tc-frv.c: Likewise.
390 * config/tc-h8300.c: Likewise.
391 * config/tc-hppa.c: Likewise.
392 * config/tc-i370.c: Likewise.
393 * config/tc-i860.c: Likewise.
394 * config/tc-i960.c: Likewise.
395 * config/tc-ip2k.c: Likewise.
396 * config/tc-iq2000.c: Likewise.
397 * config/tc-m32c.c: Likewise.
398 * config/tc-m32r.c: Likewise.
399 * config/tc-maxq.c: Likewise.
400 * config/tc-mcore.c: Likewise.
401 * config/tc-mips.c: Likewise.
402 * config/tc-mmix.c: Likewise.
403 * config/tc-mn10200.c: Likewise.
404 * config/tc-mn10300.c: Likewise.
405 * config/tc-msp430.c: Likewise.
406 * config/tc-mt.c: Likewise.
407 * config/tc-ns32k.c: Likewise.
408 * config/tc-openrisc.c: Likewise.
409 * config/tc-ppc.c: Likewise.
410 * config/tc-s390.c: Likewise.
411 * config/tc-sh.c: Likewise.
412 * config/tc-sh64.c: Likewise.
413 * config/tc-sparc.c: Likewise.
414 * config/tc-tic30.c: Likewise.
415 * config/tc-tic4x.c: Likewise.
416 * config/tc-tic54x.c: Likewise.
417 * config/tc-v850.c: Likewise.
418 * config/tc-vax.c: Likewise.
419 * config/tc-xc16x.c: Likewise.
420 * config/tc-xstormy16.c: Likewise.
421 * config/tc-xtensa.c: Likewise.
422 * config/tc-z80.c: Likewise.
423 * config/tc-z8k.c: Likewise.
424 * macro.h: Don't include sb.h or ansidecl.h.
425 * sb.h: Don't include stdio.h or ansidecl.h.
426 * cond.c: Include sb.h.
427 * itbl-lex.l: Include as.h instead of other system headers.
428 * itbl-parse.y: Likewise.
429 * itbl-ops.c: Similarly.
430 * itbl-ops.h: Don't include as.h or ansidecl.h.
431 * config/bfin-defs.h: Don't include bfd.h or as.h.
432 * config/bfin-parse.y: Include as.h instead of other system headers.
434 2006-06-06 Ben Elliston <bje@au.ibm.com>
435 Anton Blanchard <anton@samba.org>
437 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
438 (md_show_usage): Document it.
439 (ppc_setup_opcodes): Test power6 opcode flag bits.
440 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
442 2006-06-06 Thiemo Seufer <ths@mips.com>
443 Chao-ying Fu <fu@mips.com>
445 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
446 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
447 (macro_build): Update comment.
448 (mips_ip): Allow DSP64 instructions for MIPS64R2.
449 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
451 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
452 MIPS_CPU_ASE_MDMX flags for sb1.
454 2006-06-05 Thiemo Seufer <ths@mips.com>
456 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
458 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
459 (mips_ip): Make overflowed/underflowed constant arguments in DSP
460 and MT instructions a fatal error. Use INSERT_OPERAND where
461 appropriate. Improve warnings for break and wait code overflows.
462 Use symbolic constant of OP_MASK_COPZ.
463 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
465 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
467 * po/Make-in (top_builddir): Define.
469 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
471 * doc/Makefile.am (TEXI2DVI): Define.
472 * doc/Makefile.in: Regenerate.
473 * doc/c-arc.texi: Fix typo.
475 2006-06-01 Alan Modra <amodra@bigpond.net.au>
477 * config/obj-ieee.c: Delete.
478 * config/obj-ieee.h: Delete.
479 * Makefile.am (OBJ_FORMATS): Remove ieee.
480 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
481 (obj-ieee.o): Remove rule.
482 * Makefile.in: Regenerate.
483 * configure.in (atof): Remove tahoe.
484 (OBJ_MAYBE_IEEE): Don't define.
485 * configure: Regenerate.
486 * config.in: Regenerate.
487 * doc/Makefile.in: Regenerate.
488 * po/POTFILES.in: Regenerate.
490 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
492 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
493 and LIBINTL_DEP everywhere.
495 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
496 * acinclude.m4: Include new gettext macros.
497 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
498 Remove local code for po/Makefile.
499 * Makefile.in, configure, doc/Makefile.in: Regenerated.
501 2006-05-30 Nick Clifton <nickc@redhat.com>
503 * po/es.po: Updated Spanish translation.
505 2006-05-06 Denis Chertykov <denisc@overta.ru>
507 * doc/c-avr.texi: New file.
508 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
509 * doc/all.texi: Set AVR
510 * doc/as.texinfo: Include c-avr.texi
512 2006-05-28 Jie Zhang <jie.zhang@analog.com>
514 * config/bfin-parse.y (check_macfunc): Loose the condition of
515 calling check_multiply_halfregs ().
517 2006-05-25 Jie Zhang <jie.zhang@analog.com>
519 * config/bfin-parse.y (asm_1): Better check and deal with
520 vector and scalar Multiply 16-Bit Operands instructions.
522 2006-05-24 Nick Clifton <nickc@redhat.com>
524 * config/tc-hppa.c: Convert to ISO C90 format.
525 * config/tc-hppa.h: Likewise.
527 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
528 Randolph Chung <randolph@tausq.org>
530 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
531 is_tls_ieoff, is_tls_leoff): Define.
532 (fix_new_hppa): Handle TLS.
533 (cons_fix_new_hppa): Likewise.
535 (md_apply_fix): Handle TLS relocs.
536 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
538 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
540 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
542 2006-05-23 Thiemo Seufer <ths@mips.com>
543 David Ung <davidu@mips.com>
544 Nigel Stephens <nigel@mips.com>
547 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
548 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
549 ISA_HAS_MXHC1): New macros.
550 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
551 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
552 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
553 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
554 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
555 (mips_after_parse_args): Change default handling of float register
556 size to account for 32bit code with 64bit FP. Better sanity checking
557 of ISA/ASE/ABI option combinations.
558 (s_mipsset): Support switching of GPR and FPR sizes via
559 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
561 (mips_elf_final_processing): We should record the use of 64bit FP
562 registers in 32bit code but we don't, because ELF header flags are
564 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
565 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
566 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
567 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
568 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
569 missing -march options. Document .set arch=CPU. Move .set smartmips
570 to ASE page. Use @code for .set FOO examples.
572 2006-05-23 Jie Zhang <jie.zhang@analog.com>
574 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
577 2006-05-23 Jie Zhang <jie.zhang@analog.com>
579 * config/bfin-defs.h (bfin_equals): Remove declaration.
580 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
581 * config/tc-bfin.c (bfin_name_is_register): Remove.
582 (bfin_equals): Remove.
583 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
584 (bfin_name_is_register): Remove declaration.
586 2006-05-19 Thiemo Seufer <ths@mips.com>
587 Nigel Stephens <nigel@mips.com>
589 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
590 (mips_oddfpreg_ok): New function.
593 2006-05-19 Thiemo Seufer <ths@mips.com>
594 David Ung <davidu@mips.com>
596 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
597 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
598 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
599 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
600 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
601 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
602 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
603 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
604 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
605 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
606 reg_names_o32, reg_names_n32n64): Define register classes.
607 (reg_lookup): New function, use register classes.
608 (md_begin): Reserve register names in the symbol table. Simplify
610 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
612 (mips16_ip): Use reg_lookup.
613 (tc_get_register): Likewise.
614 (tc_mips_regname_to_dw2regnum): New function.
616 2006-05-19 Thiemo Seufer <ths@mips.com>
618 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
619 Un-constify string argument.
620 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
622 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
624 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
626 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
628 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
630 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
633 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
635 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
636 cfloat/m68881 to correct architecture before using it.
638 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
640 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
643 2006-05-15 Paul Brook <paul@codesourcery.com>
645 * config/tc-arm.c (arm_adjust_symtab): Use
646 bfd_is_arm_special_symbol_name.
648 2006-05-15 Bob Wilson <bob.wilson@acm.org>
650 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
651 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
652 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
653 Handle errors from calls to xtensa_opcode_is_* functions.
655 2006-05-14 Thiemo Seufer <ths@mips.com>
657 * config/tc-mips.c (macro_build): Test for currently active
659 (mips16_ip): Reject invalid opcodes.
661 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
663 * doc/as.texinfo: Rename "Index" to "AS Index",
664 and "ABORT" to "ABORT (COFF)".
666 2006-05-11 Paul Brook <paul@codesourcery.com>
668 * config/tc-arm.c (parse_half): New function.
669 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
670 (parse_operands): Ditto.
671 (do_mov16): Reject invalid relocations.
672 (do_t_mov16): Ditto. Use Thumb reloc numbers.
673 (insns): Replace Iffff with HALF.
674 (md_apply_fix): Add MOVW and MOVT relocs.
675 (tc_gen_reloc): Ditto.
676 * doc/c-arm.texi: Document relocation operators
678 2006-05-11 Paul Brook <paul@codesourcery.com>
680 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
682 2006-05-11 Thiemo Seufer <ths@mips.com>
684 * config/tc-mips.c (append_insn): Don't check the range of j or
687 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
689 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
690 relocs against external symbols for WinCE targets.
691 (md_apply_fix): Likewise.
693 2006-05-09 David Ung <davidu@mips.com>
695 * config/tc-mips.c (append_insn): Only warn about an out-of-range
698 2006-05-09 Nick Clifton <nickc@redhat.com>
700 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
701 against symbols which are not going to be placed into the symbol
704 2006-05-09 Ben Elliston <bje@au.ibm.com>
706 * expr.c (operand): Remove `if (0 && ..)' statement and
707 subsequently unused target_op label. Collapse `if (1 || ..)'
709 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
710 separately above the switch.
712 2006-05-08 Nick Clifton <nickc@redhat.com>
715 * config/tc-msp430.c (line_separator_character): Define as |.
717 2006-05-08 Thiemo Seufer <ths@mips.com>
718 Nigel Stephens <nigel@mips.com>
719 David Ung <davidu@mips.com>
721 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
722 (mips_opts): Likewise.
723 (file_ase_smartmips): New variable.
724 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
725 (macro_build): Handle SmartMIPS instructions.
727 (md_longopts): Add argument handling for smartmips.
728 (md_parse_options, mips_after_parse_args): Likewise.
729 (s_mipsset): Add .set smartmips support.
730 (md_show_usage): Document -msmartmips/-mno-smartmips.
731 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
733 * doc/c-mips.texi: Likewise.
735 2006-05-08 Alan Modra <amodra@bigpond.net.au>
737 * write.c (relax_segment): Add pass count arg. Don't error on
738 negative org/space on first two passes.
739 (relax_seg_info): New struct.
740 (relax_seg, write_object_file): Adjust.
741 * write.h (relax_segment): Update prototype.
743 2006-05-05 Julian Brown <julian@codesourcery.com>
745 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
747 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
748 architecture version checks.
749 (insns): Allow overlapping instructions to be used in VFP mode.
751 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
754 * config/obj-elf.c (obj_elf_change_section): Allow user
755 specified SHF_ALPHA_GPREL.
757 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
759 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
760 for PMEM related expressions.
762 2006-05-05 Nick Clifton <nickc@redhat.com>
765 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
766 insertion of a directory separator character into a string at a
767 given offset. Uses heuristics to decide when to use a backslash
768 character rather than a forward-slash character.
769 (dwarf2_directive_loc): Use the macro.
770 (out_debug_info): Likewise.
772 2006-05-05 Thiemo Seufer <ths@mips.com>
773 David Ung <davidu@mips.com>
775 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
777 (macro): Add new case M_CACHE_AB.
779 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
781 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
782 (opcode_lookup): Issue a warning for opcode with
783 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
784 identical to OT_cinfix3.
785 (TxC3w, TC3w, tC3w): New.
786 (insns): Use tC3w and TC3w for comparison instructions with
789 2006-05-04 Alan Modra <amodra@bigpond.net.au>
791 * subsegs.h (struct frchain): Delete frch_seg.
792 (frchain_root): Delete.
793 (seg_info): Define as macro.
794 * subsegs.c (frchain_root): Delete.
795 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
796 (subsegs_begin, subseg_change): Adjust for above.
797 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
798 rather than to one big list.
799 (subseg_get): Don't special case abs, und sections.
800 (subseg_new, subseg_force_new): Don't set frchainP here.
802 (subsegs_print_statistics): Adjust frag chain control list traversal.
803 * debug.c (dmp_frags): Likewise.
804 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
805 at frchain_root. Make use of known frchain ordering.
806 (last_frag_for_seg): Likewise.
807 (get_frag_fix): Likewise. Add seg param.
808 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
809 * write.c (chain_frchains_together_1): Adjust for struct frchain.
810 (SUB_SEGMENT_ALIGN): Likewise.
811 (subsegs_finish): Adjust frchain list traversal.
812 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
813 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
814 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
815 (xtensa_fix_b_j_loop_end_frags): Likewise.
816 (xtensa_fix_close_loop_end_frags): Likewise.
817 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
818 (retrieve_segment_info): Delete frch_seg initialisation.
820 2006-05-03 Alan Modra <amodra@bigpond.net.au>
822 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
823 * config/obj-elf.h (obj_sec_set_private_data): Delete.
824 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
825 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
827 2006-05-02 Joseph Myers <joseph@codesourcery.com>
829 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
831 (md_apply_fix3): Multiply offset by 4 here for
832 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
834 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
835 Jan Beulich <jbeulich@novell.com>
837 * config/tc-i386.c (output_invalid_buf): Change size for
839 * config/tc-tic30.c (output_invalid_buf): Likewise.
841 * config/tc-i386.c (output_invalid): Cast none-ascii char to
843 * config/tc-tic30.c (output_invalid): Likewise.
845 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
847 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
848 (TEXI2POD): Use AM_MAKEINFOFLAGS.
849 (asconfig.texi): Don't set top_srcdir.
850 * doc/as.texinfo: Don't use top_srcdir.
851 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
853 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
855 * config/tc-i386.c (output_invalid_buf): Change size to 16.
856 * config/tc-tic30.c (output_invalid_buf): Likewise.
858 * config/tc-i386.c (output_invalid): Use snprintf instead of
860 * config/tc-ia64.c (declare_register_set): Likewise.
861 (emit_one_bundle): Likewise.
862 (check_dependencies): Likewise.
863 * config/tc-tic30.c (output_invalid): Likewise.
865 2006-05-02 Paul Brook <paul@codesourcery.com>
867 * config/tc-arm.c (arm_optimize_expr): New function.
868 * config/tc-arm.h (md_optimize_expr): Define
869 (arm_optimize_expr): Add prototype.
870 (TC_FORCE_RELOCATION_SUB_SAME): Define.
872 2006-05-02 Ben Elliston <bje@au.ibm.com>
874 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
877 * sb.h (sb_list_vector): Move to sb.c.
878 * sb.c (free_list): Use type of sb_list_vector directly.
879 (sb_build): Fix off-by-one error in assertion about `size'.
881 2006-05-01 Ben Elliston <bje@au.ibm.com>
883 * listing.c (listing_listing): Remove useless loop.
884 * macro.c (macro_expand): Remove is_positional local variable.
885 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
886 and simplify surrounding expressions, where possible.
887 (assign_symbol): Likewise.
888 (s_weakref): Likewise.
889 * symbols.c (colon): Likewise.
891 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
893 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
895 2006-04-30 Thiemo Seufer <ths@mips.com>
896 David Ung <davidu@mips.com>
898 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
899 (mips_immed): New table that records various handling of udi
900 instruction patterns.
901 (mips_ip): Adds udi handling.
903 2006-04-28 Alan Modra <amodra@bigpond.net.au>
905 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
906 of list rather than beginning.
908 2006-04-26 Julian Brown <julian@codesourcery.com>
910 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
911 (is_quarter_float): Rename from above. Simplify slightly.
912 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
914 (parse_neon_mov): Parse floating-point constants.
915 (neon_qfloat_bits): Fix encoding.
916 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
917 preference to integer encoding when using the F32 type.
919 2006-04-26 Julian Brown <julian@codesourcery.com>
921 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
922 zero-initialising structures containing it will lead to invalid types).
923 (arm_it): Add vectype to each operand.
924 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
926 (neon_typed_alias): New structure. Extra information for typed
928 (reg_entry): Add neon type info field.
929 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
930 Break out alternative syntax for coprocessor registers, etc. into...
931 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
932 out from arm_reg_parse.
933 (parse_neon_type): Move. Return SUCCESS/FAIL.
934 (first_error): New function. Call to ensure first error which occurs is
936 (parse_neon_operand_type): Parse exactly one type.
937 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
938 (parse_typed_reg_or_scalar): New function. Handle core of both
939 arm_typed_reg_parse and parse_scalar.
940 (arm_typed_reg_parse): Parse a register with an optional type.
941 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
943 (parse_scalar): Parse a Neon scalar with optional type.
944 (parse_reg_list): Use first_error.
945 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
946 (neon_alias_types_same): New function. Return true if two (alias) types
948 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
950 (insert_reg_alias): Return new reg_entry not void.
951 (insert_neon_reg_alias): New function. Insert type/index information as
952 well as register for alias.
953 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
954 make typed register aliases accordingly.
955 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
957 (s_unreq): Delete type information if present.
958 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
959 (s_arm_unwind_save_mmxwcg): Likewise.
960 (s_arm_unwind_movsp): Likewise.
961 (s_arm_unwind_setfp): Likewise.
962 (parse_shift): Likewise.
963 (parse_shifter_operand): Likewise.
964 (parse_address): Likewise.
965 (parse_tb): Likewise.
966 (tc_arm_regname_to_dw2regnum): Likewise.
967 (md_pseudo_table): Add dn, qn.
968 (parse_neon_mov): Handle typed operands.
969 (parse_operands): Likewise.
970 (neon_type_mask): Add N_SIZ.
971 (N_ALLMODS): New macro.
972 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
973 (el_type_of_type_chk): Add some safeguards.
974 (modify_types_allowed): Fix logic bug.
975 (neon_check_type): Handle operands with types.
976 (neon_three_same): Remove redundant optional arg handling.
977 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
978 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
979 (do_neon_step): Adjust accordingly.
980 (neon_cmode_for_logic_imm): Use first_error.
981 (do_neon_bitfield): Call neon_check_type.
982 (neon_dyadic): Rename to...
983 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
984 to allow modification of type of the destination.
985 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
986 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
987 (do_neon_compare): Make destination be an untyped bitfield.
988 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
989 (neon_mul_mac): Return early in case of errors.
990 (neon_move_immediate): Use first_error.
991 (neon_mac_reg_scalar_long): Fix type to include scalar.
992 (do_neon_dup): Likewise.
993 (do_neon_mov): Likewise (in several places).
994 (do_neon_tbl_tbx): Fix type.
995 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
996 (do_neon_ld_dup): Exit early in case of errors and/or use
998 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
999 Handle .dn/.qn directives.
1000 (REGDEF): Add zero for reg_entry neon field.
1002 2006-04-26 Julian Brown <julian@codesourcery.com>
1004 * config/tc-arm.c (limits.h): Include.
1005 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1006 (fpu_vfp_v3_or_neon_ext): Declare constants.
1007 (neon_el_type): New enumeration of types for Neon vector elements.
1008 (neon_type_el): New struct. Define type and size of a vector element.
1009 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1011 (neon_type): Define struct. The type of an instruction.
1012 (arm_it): Add 'vectype' for the current instruction.
1013 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1014 (vfp_sp_reg_pos): Rename to...
1015 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1017 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1018 (Neon D or Q register).
1019 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1021 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1022 (my_get_expression): Allow above constant as argument to accept
1023 64-bit constants with optional prefix.
1024 (arm_reg_parse): Add extra argument to return the specific type of
1025 register in when either a D or Q register (REG_TYPE_NDQ) is
1026 requested. Can be NULL.
1027 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1028 (parse_reg_list): Update for new arm_reg_parse args.
1029 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1030 (parse_neon_el_struct_list): New function. Parse element/structure
1031 register lists for VLD<n>/VST<n> instructions.
1032 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1033 (s_arm_unwind_save_mmxwr): Likewise.
1034 (s_arm_unwind_save_mmxwcg): Likewise.
1035 (s_arm_unwind_movsp): Likewise.
1036 (s_arm_unwind_setfp): Likewise.
1037 (parse_big_immediate): New function. Parse an immediate, which may be
1038 64 bits wide. Put results in inst.operands[i].
1039 (parse_shift): Update for new arm_reg_parse args.
1040 (parse_address): Likewise. Add parsing of alignment specifiers.
1041 (parse_neon_mov): Parse the operands of a VMOV instruction.
1042 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1043 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1044 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1045 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1046 (parse_operands): Handle new codes above.
1047 (encode_arm_vfp_sp_reg): Rename to...
1048 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1049 selected VFP version only supports D0-D15.
1050 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1051 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1052 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1053 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1054 encode_arm_vfp_reg name, and allow 32 D regs.
1055 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1056 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1058 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1059 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1060 constant-load and conversion insns introduced with VFPv3.
1061 (neon_tab_entry): New struct.
1062 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1063 those which are the targets of pseudo-instructions.
1064 (neon_opc): Enumerate opcodes, use as indices into...
1065 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1066 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1067 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1068 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1070 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1072 (neon_type_mask): New. Compact type representation for type checking.
1073 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1074 permitted type combinations.
1075 (N_IGNORE_TYPE): New macro.
1076 (neon_check_shape): New function. Check an instruction shape for
1077 multiple alternatives. Return the specific shape for the current
1079 (neon_modify_type_size): New function. Modify a vector type and size,
1080 depending on the bit mask in argument 1.
1081 (neon_type_promote): New function. Convert a given "key" type (of an
1082 operand) into the correct type for a different operand, based on a bit
1084 (type_chk_of_el_type): New function. Convert a type and size into the
1085 compact representation used for type checking.
1086 (el_type_of_type_ckh): New function. Reverse of above (only when a
1087 single bit is set in the bit mask).
1088 (modify_types_allowed): New function. Alter a mask of allowed types
1089 based on a bit mask of modifications.
1090 (neon_check_type): New function. Check the type of the current
1091 instruction against the variable argument list. The "key" type of the
1092 instruction is returned.
1093 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1094 a Neon data-processing instruction depending on whether we're in ARM
1095 mode or Thumb-2 mode.
1096 (neon_logbits): New function.
1097 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1098 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1099 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1100 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1101 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1102 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1103 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1104 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1105 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1106 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1107 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1108 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1109 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1110 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1111 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1112 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1113 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1114 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1115 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1116 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1117 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1118 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1119 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1120 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1121 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1123 (parse_neon_type): New function. Parse Neon type specifier.
1124 (opcode_lookup): Allow parsing of Neon type specifiers.
1125 (REGNUM2, REGSETH, REGSET2): New macros.
1126 (reg_names): Add new VFPv3 and Neon registers.
1127 (NUF, nUF, NCE, nCE): New macros for opcode table.
1128 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1129 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1130 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1131 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1132 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1133 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1134 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1135 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1136 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1137 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1138 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1139 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1140 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1141 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1143 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1144 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1145 (arm_option_cpu_value): Add vfp3 and neon.
1146 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1149 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1151 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1152 syntax instead of hardcoded opcodes with ".w18" suffixes.
1153 (wide_branch_opcode): New.
1154 (build_transition): Use it to check for wide branch opcodes with
1155 either ".w18" or ".w15" suffixes.
1157 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1159 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1160 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1161 frag's is_literal flag.
1163 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1165 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1167 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1169 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1170 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1171 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1172 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1173 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1175 2005-04-20 Paul Brook <paul@codesourcery.com>
1177 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1179 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1181 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1183 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1184 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1185 Make some cpus unsupported on ELF. Run "make dep-am".
1186 * Makefile.in: Regenerate.
1188 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1190 * configure.in (--enable-targets): Indent help message.
1191 * configure: Regenerate.
1193 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1196 * config/tc-i386.c (i386_immediate): Check illegal immediate
1199 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1201 * config/tc-i386.c: Formatting.
1202 (output_disp, output_imm): ISO C90 params.
1204 * frags.c (frag_offset_fixed_p): Constify args.
1205 * frags.h (frag_offset_fixed_p): Ditto.
1207 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1208 (COFF_MAGIC): Delete.
1210 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1212 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1214 * po/POTFILES.in: Regenerated.
1216 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1218 * doc/as.texinfo: Mention that some .type syntaxes are not
1219 supported on all architectures.
1221 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1223 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1224 instructions when such transformations have been disabled.
1226 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1228 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1229 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1230 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1231 decoding the loop instructions. Remove current_offset variable.
1232 (xtensa_fix_short_loop_frags): Likewise.
1233 (min_bytes_to_other_loop_end): Remove current_offset argument.
1235 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1237 * config/tc-z80.c (z80_optimize_expr): Removed.
1238 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1240 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1242 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1243 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1244 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1245 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1246 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1247 at90can64, at90usb646, at90usb647, at90usb1286 and
1249 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1251 2006-04-07 Paul Brook <paul@codesourcery.com>
1253 * config/tc-arm.c (parse_operands): Set default error message.
1255 2006-04-07 Paul Brook <paul@codesourcery.com>
1257 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1259 2006-04-07 Paul Brook <paul@codesourcery.com>
1261 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1263 2006-04-07 Paul Brook <paul@codesourcery.com>
1265 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1266 (move_or_literal_pool): Handle Thumb-2 instructions.
1267 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1269 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1272 * config/tc-i386.c (match_template): Move 64-bit operand tests
1275 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1277 * po/Make-in: Add install-html target.
1278 * Makefile.am: Add install-html and install-html-recursive targets.
1279 * Makefile.in: Regenerate.
1280 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1281 * configure: Regenerate.
1282 * doc/Makefile.am: Add install-html and install-html-am targets.
1283 * doc/Makefile.in: Regenerate.
1285 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1287 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1290 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1291 Daniel Jacobowitz <dan@codesourcery.com>
1293 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1294 (GOTT_BASE, GOTT_INDEX): New.
1295 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1296 GOTT_INDEX when generating VxWorks PIC.
1297 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1298 use the generic *-*-vxworks* stanza instead.
1300 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1303 * frags.c (frag_offset_fixed_p): New function.
1304 * frags.h (frag_offset_fixed_p): Declare.
1305 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1306 (resolve_expression): Likewise.
1308 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1310 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1311 of the same length but different numbers of slots.
1313 2006-03-30 Andreas Schwab <schwab@suse.de>
1315 * configure.in: Fix help string for --enable-targets option.
1316 * configure: Regenerate.
1318 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1320 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1321 (m68k_ip): ... here. Use for all chips. Protect against buffer
1322 overrun and avoid excessive copying.
1324 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1325 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1326 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1327 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1328 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1329 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1330 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1331 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1332 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1333 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1334 (struct m68k_cpu): Change chip field to control_regs.
1335 (current_chip): Remove.
1336 (control_regs): New.
1337 (m68k_archs, m68k_extensions): Adjust.
1338 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1339 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1340 (find_cf_chip): Reimplement for new organization of cpu table.
1341 (select_control_regs): Remove.
1343 (struct save_opts): Save control regs, not chip.
1344 (s_save, s_restore): Adjust.
1345 (m68k_lookup_cpu): Give deprecated warning when necessary.
1346 (m68k_init_arch): Adjust.
1347 (md_show_usage): Adjust for new cpu table organization.
1349 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1351 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1352 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1353 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1355 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1356 (any_gotrel): New rule.
1357 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1358 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1360 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1361 (bfin_pic_ptr): New function.
1362 (md_pseudo_table): Add it for ".picptr".
1363 (OPTION_FDPIC): New macro.
1364 (md_longopts): Add -mfdpic.
1365 (md_parse_option): Handle it.
1366 (md_begin): Set BFD flags.
1367 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1368 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1370 * Makefile.am (bfin-parse.o): Update dependencies.
1371 (DEPTC_bfin_elf): Likewise.
1372 * Makefile.in: Regenerate.
1374 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1376 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1377 mcfemac instead of mcfmac.
1379 2006-03-23 Michael Matz <matz@suse.de>
1381 * config/tc-i386.c (type_names): Correct placement of 'static'.
1382 (reloc): Map some more relocs to their 64 bit counterpart when
1384 (output_insn): Work around breakage if DEBUG386 is defined.
1385 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1386 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1387 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1388 different from i386.
1389 (output_imm): Ditto.
1390 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1392 (md_convert_frag): Jumps can now be larger than 2GB away, error
1394 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1395 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1397 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1398 Daniel Jacobowitz <dan@codesourcery.com>
1399 Phil Edwards <phil@codesourcery.com>
1400 Zack Weinberg <zack@codesourcery.com>
1401 Mark Mitchell <mark@codesourcery.com>
1402 Nathan Sidwell <nathan@codesourcery.com>
1404 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1405 (md_begin): Complain about -G being used for PIC. Don't change
1406 the text, data and bss alignments on VxWorks.
1407 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1408 generating VxWorks PIC.
1409 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1410 (macro): Likewise, but do not treat la $25 specially for
1411 VxWorks PIC, and do not handle jal.
1412 (OPTION_MVXWORKS_PIC): New macro.
1413 (md_longopts): Add -mvxworks-pic.
1414 (md_parse_option): Don't complain about using PIC and -G together here.
1415 Handle OPTION_MVXWORKS_PIC.
1416 (md_estimate_size_before_relax): Always use the first relaxation
1417 sequence on VxWorks.
1418 * config/tc-mips.h (VXWORKS_PIC): New.
1420 2006-03-21 Paul Brook <paul@codesourcery.com>
1422 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1424 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1426 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1427 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1428 (get_loop_align_size): New.
1429 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1430 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1431 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1432 (get_noop_aligned_address): Use get_loop_align_size.
1433 (get_aligned_diff): Likewise.
1435 2006-03-21 Paul Brook <paul@codesourcery.com>
1437 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1439 2006-03-20 Paul Brook <paul@codesourcery.com>
1441 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1442 (do_t_branch): Encode branches inside IT blocks as unconditional.
1443 (do_t_cps): New function.
1444 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1445 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1446 (opcode_lookup): Allow conditional suffixes on all instructions in
1448 (md_assemble): Advance condexec state before checking for errors.
1449 (insns): Use do_t_cps.
1451 2006-03-20 Paul Brook <paul@codesourcery.com>
1453 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1454 outputting the insn.
1456 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1458 * config/tc-vax.c: Update copyright year.
1459 * config/tc-vax.h: Likewise.
1461 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1463 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1465 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1467 2006-03-17 Paul Brook <paul@codesourcery.com>
1469 * config/tc-arm.c (insns): Add ldm and stm.
1471 2006-03-17 Ben Elliston <bje@au.ibm.com>
1474 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1476 2006-03-16 Paul Brook <paul@codesourcery.com>
1478 * config/tc-arm.c (insns): Add "svc".
1480 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1482 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1483 flag and avoid double underscore prefixes.
1485 2006-03-10 Paul Brook <paul@codesourcery.com>
1487 * config/tc-arm.c (md_begin): Handle EABIv5.
1488 (arm_eabis): Add EF_ARM_EABI_VER5.
1489 * doc/c-arm.texi: Document -meabi=5.
1491 2006-03-10 Ben Elliston <bje@au.ibm.com>
1493 * app.c (do_scrub_chars): Simplify string handling.
1495 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1496 Daniel Jacobowitz <dan@codesourcery.com>
1497 Zack Weinberg <zack@codesourcery.com>
1498 Nathan Sidwell <nathan@codesourcery.com>
1499 Paul Brook <paul@codesourcery.com>
1500 Ricardo Anguiano <anguiano@codesourcery.com>
1501 Phil Edwards <phil@codesourcery.com>
1503 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1504 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1506 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1507 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1508 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1510 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1512 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1513 even when using the text-section-literals option.
1515 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1517 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1519 (m68k_ip): <case 'J'> Check we have some control regs.
1520 (md_parse_option): Allow raw arch switch.
1521 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1522 whether 68881 or cfloat was meant by -mfloat.
1523 (md_show_usage): Adjust extension display.
1524 (m68k_elf_final_processing): Adjust.
1526 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1528 * config/tc-avr.c (avr_mod_hash_value): New function.
1529 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1530 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1531 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1532 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1534 (tc_gen_reloc): Handle substractions of symbols, if possible do
1535 fixups, abort otherwise.
1536 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1537 tc_fix_adjustable): Define.
1539 2006-03-02 James E Wilson <wilson@specifix.com>
1541 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1542 change the template, then clear md.slot[curr].end_of_insn_group.
1544 2006-02-28 Jan Beulich <jbeulich@novell.com>
1546 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1548 2006-02-28 Jan Beulich <jbeulich@novell.com>
1551 * macro.c (getstring): Don't treat parentheses special anymore.
1552 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1553 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1556 2006-02-28 Mat <mat@csail.mit.edu>
1558 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1560 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1562 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1564 (CFI_signal_frame): Define.
1565 (cfi_pseudo_table): Add .cfi_signal_frame.
1566 (dot_cfi): Handle CFI_signal_frame.
1567 (output_cie): Handle cie->signal_frame.
1568 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1569 different. Copy signal_frame from FDE to newly created CIE.
1570 * doc/as.texinfo: Document .cfi_signal_frame.
1572 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1574 * doc/Makefile.am: Add html target.
1575 * doc/Makefile.in: Regenerate.
1576 * po/Make-in: Add html target.
1578 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1580 * config/tc-i386.c (output_insn): Support Intel Merom New
1583 * config/tc-i386.h (CpuMNI): New.
1584 (CpuUnknownFlags): Add CpuMNI.
1586 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1588 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1589 (hpriv_reg_table): New table for hyperprivileged registers.
1590 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1593 2006-02-24 DJ Delorie <dj@redhat.com>
1595 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1596 (tc_gen_reloc): Don't define.
1597 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1598 (OPTION_LINKRELAX): New.
1599 (md_longopts): Add it.
1601 (md_parse_options): Set it.
1602 (md_assemble): Emit relaxation relocs as needed.
1603 (md_convert_frag): Emit relaxation relocs as needed.
1604 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1605 (m32c_apply_fix): New.
1606 (tc_gen_reloc): New.
1607 (m32c_force_relocation): Force out jump relocs when relaxing.
1608 (m32c_fix_adjustable): Return false if relaxing.
1610 2006-02-24 Paul Brook <paul@codesourcery.com>
1612 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1613 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1614 (struct asm_barrier_opt): Define.
1615 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1616 (parse_psr): Accept V7M psr names.
1617 (parse_barrier): New function.
1618 (enum operand_parse_code): Add OP_oBARRIER.
1619 (parse_operands): Implement OP_oBARRIER.
1620 (do_barrier): New function.
1621 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1622 (do_t_cpsi): Add V7M restrictions.
1623 (do_t_mrs, do_t_msr): Validate V7M variants.
1624 (md_assemble): Check for NULL variants.
1625 (v7m_psrs, barrier_opt_names): New tables.
1626 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1627 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1628 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1629 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1630 (struct cpu_arch_ver_table): Define.
1631 (cpu_arch_ver): New.
1632 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1633 Tag_CPU_arch_profile.
1634 * doc/c-arm.texi: Document new cpu and arch options.
1636 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1638 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1640 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1642 * config/tc-ia64.c: Update copyright years.
1644 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1646 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1649 2005-02-22 Paul Brook <paul@codesourcery.com>
1651 * config/tc-arm.c (do_pld): Remove incorrect write to
1653 (encode_thumb32_addr_mode): Use correct operand.
1655 2006-02-21 Paul Brook <paul@codesourcery.com>
1657 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1659 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1660 Anil Paranjape <anilp1@kpitcummins.com>
1661 Shilin Shakti <shilins@kpitcummins.com>
1663 * Makefile.am: Add xc16x related entry.
1664 * Makefile.in: Regenerate.
1665 * configure.in: Added xc16x related entry.
1666 * configure: Regenerate.
1667 * config/tc-xc16x.h: New file
1668 * config/tc-xc16x.c: New file
1669 * doc/c-xc16x.texi: New file for xc16x
1670 * doc/all.texi: Entry for xc16x
1671 * doc/Makefile.texi: Added c-xc16x.texi
1672 * NEWS: Announce the support for the new target.
1674 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1676 * configure.tgt: set emulation for mips-*-netbsd*
1678 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1680 * config.in: Rebuilt.
1682 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1684 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1685 from 1, not 0, in error messages.
1686 (md_assemble): Simplify special-case check for ENTRY instructions.
1687 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1688 operand in error message.
1690 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1692 * configure.tgt (arm-*-linux-gnueabi*): Change to
1695 2006-02-10 Nick Clifton <nickc@redhat.com>
1697 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1698 32-bit value is propagated into the upper bits of a 64-bit long.
1700 * config/tc-arc.c (init_opcode_tables): Fix cast.
1701 (arc_extoper, md_operand): Likewise.
1703 2006-02-09 David Heine <dlheine@tensilica.com>
1705 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1706 each relaxation step.
1708 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1710 * configure.in (CHECK_DECLS): Add vsnprintf.
1711 * configure: Regenerate.
1712 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1713 include/declare here, but...
1714 * as.h: Move code detecting VARARGS idiom to the top.
1715 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1716 (vsnprintf): Declare if not already declared.
1718 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1720 * as.c (close_output_file): New.
1721 (main): Register close_output_file with xatexit before
1722 dump_statistics. Don't call output_file_close.
1724 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1726 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1727 mcf5329_control_regs): New.
1728 (not_current_architecture, selected_arch, selected_cpu): New.
1729 (m68k_archs, m68k_extensions): New.
1730 (archs): Renamed to ...
1731 (m68k_cpus): ... here. Adjust.
1733 (md_pseudo_table): Add arch and cpu directives.
1734 (find_cf_chip, m68k_ip): Adjust table scanning.
1735 (no_68851, no_68881): Remove.
1736 (md_assemble): Lazily initialize.
1737 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1738 (md_init_after_args): Move functionality to m68k_init_arch.
1739 (mri_chip): Adjust table scanning.
1740 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1741 options with saner parsing.
1742 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1743 m68k_init_arch): New.
1744 (s_m68k_cpu, s_m68k_arch): New.
1745 (md_show_usage): Adjust.
1746 (m68k_elf_final_processing): Set CF EF flags.
1747 * config/tc-m68k.h (m68k_init_after_args): Remove.
1748 (tc_init_after_args): Remove.
1749 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1750 (M68k-Directives): Document .arch and .cpu directives.
1752 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1754 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1755 synonyms for equ and defl.
1756 (z80_cons_fix_new): New function.
1757 (emit_byte): Disallow relative jumps to absolute locations.
1758 (emit_data): Only handle defb, prototype changed, because defb is
1759 now handled as pseudo-op rather than an instruction.
1760 (instab): Entries for defb,defw,db,dw moved from here...
1761 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1762 Add entries for def24,def32,d24,d32.
1763 (md_assemble): Improved error handling.
1764 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1765 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1766 (z80_cons_fix_new): Declare.
1767 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1768 (def24,d24,def32,d32): New pseudo-ops.
1770 2006-02-02 Paul Brook <paul@codesourcery.com>
1772 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1774 2005-02-02 Paul Brook <paul@codesourcery.com>
1776 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1777 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1778 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1779 T2_OPCODE_RSB): Define.
1780 (thumb32_negate_data_op): New function.
1781 (md_apply_fix): Use it.
1783 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1785 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1787 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1788 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1790 (relaxation_requirements): Add pfinish_frag argument and use it to
1791 replace setting tinsn->record_fix fields.
1792 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1793 and vinsn_to_insnbuf. Remove references to record_fix and
1794 slot_sub_symbols fields.
1795 (xtensa_mark_narrow_branches): Delete unused code.
1796 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1798 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1800 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1801 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1802 of the record_fix field. Simplify error messages for unexpected
1804 (set_expr_symbol_offset_diff): Delete.
1806 2006-01-31 Paul Brook <paul@codesourcery.com>
1808 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1810 2006-01-31 Paul Brook <paul@codesourcery.com>
1811 Richard Earnshaw <rearnsha@arm.com>
1813 * config/tc-arm.c: Use arm_feature_set.
1814 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1815 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1816 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1819 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1820 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1821 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1822 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1824 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1825 (arm_opts): Move old cpu/arch options from here...
1826 (arm_legacy_opts): ... to here.
1827 (md_parse_option): Search arm_legacy_opts.
1828 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1829 (arm_float_abis, arm_eabis): Make const.
1831 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1833 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1835 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1837 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1838 in load immediate intruction.
1840 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1842 * config/bfin-parse.y (value_match): Use correct conversion
1843 specifications in template string for __FILE__ and __LINE__.
1847 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1849 Introduce TLS descriptors for i386 and x86_64.
1850 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1851 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1852 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1853 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1854 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1856 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1857 (lex_got): Handle @tlsdesc and @tlscall.
1858 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1860 2006-01-11 Nick Clifton <nickc@redhat.com>
1862 Fixes for building on 64-bit hosts:
1863 * config/tc-avr.c (mod_index): New union to allow conversion
1864 between pointers and integers.
1865 (md_begin, avr_ldi_expression): Use it.
1866 * config/tc-i370.c (md_assemble): Add cast for argument to print
1868 * config/tc-tic54x.c (subsym_substitute): Likewise.
1869 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1870 opindex field of fr_cgen structure into a pointer so that it can
1871 be stored in a frag.
1872 * config/tc-mn10300.c (md_assemble): Likewise.
1873 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1875 * config/tc-v850.c: Replace uses of (int) casts with correct
1878 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1881 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1883 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1886 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1887 a local-label reference.
1889 For older changes see ChangeLog-2005
1895 version-control: never