]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - gas/NEWS
x86: mention dropped L1OM/K1OM support in ld/ as well
[thirdparty/binutils-gdb.git] / gas / NEWS
1 -*- text -*-
2
3 * Remove (rudimentary) support for the x86-64 sub-architectures Intel L1OM and
4 Intel K1OM.
5
6 Changes in 2.38:
7
8 * Add support for AArch64 system registers that were missing in previous
9 releases.
10
11 * Add support for the LoongArch instruction set.
12
13 * Add a command-line option, -muse-unaligned-vector-move, for x86 target
14 to encode aligned vector move as unaligned vector move.
15
16 * Add support for Cortex-R52+ for Arm.
17
18 * Add support for Cortex-A510, Cortex-A710, Cortex-X2 for AArch64.
19
20 * Add support for Cortex-A710 for Arm.
21
22 * Add support for Scalable Matrix Extension (SME) for AArch64.
23
24 * The --multibyte-handling=[allow|warn|warn-sym-only] option tells the
25 assembler what to when it encoutners multibyte characters in the input. The
26 default is to allow them. Setting the option to "warn" will generate a
27 warning message whenever any multibyte character is encountered. Using the
28 option to "warn-sym-only" will make the assembler generate a warning whenever a
29 symbol is defined containing multibyte characters. (References to undefined
30 symbols will not generate warnings).
31
32 * Outputs of .ds.x directive and .tfloat directive with hex input from
33 x86 assembler have been reduced from 12 bytes to 10 bytes to match the
34 output of .tfloat directive.
35
36 * Add support for 'armv8.8-a', 'armv9-a', 'armv9.1-a', 'armv9.2-a' and
37 'armv9.3-a' for -march in AArch64 GAS.
38
39 * Add support for 'armv8.7-a', 'armv8.8-a', 'armv9-a', 'armv9.1-a',
40 'armv9.2-a' and 'armv9.3-a' for -march in Arm GAS.
41
42 * Add support for Intel AVX512_FP16 instructions.
43
44 Changes in 2.37:
45
46 * arm-symbianelf support removed.
47
48 * Add support for Realm Management Extension (RME) for AArch64.
49
50 Changes in 2.36:
51
52 * Add support for Intel AVX VNNI instructions.
53
54 * Add support for Intel HRESET instruction.
55
56 * Add support for Intel UINTR instructions.
57
58 * Support non-absolute segment values for i386 lcall and ljmp.
59
60 * When setting the link order attribute of ELF sections, it is now possible to
61 use a numeric section index instead of symbol name.
62
63 * Add support for Cortex-A78, Cortex-A78AE, Cortex-A78C and Cortex-X1 for
64 AArch64 and ARM.
65 Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
66
67 * Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
68 Extension), TRBE (Trace Buffer Extension)and BRBE (Branch Record Buffer
69 Extension) system registers for AArch64.
70
71 * Add support for Armv8-R and Armv8.7-A AArch64.
72
73 * Add support for DSB memory nXS barrier, WFET and WFIT instruction for Armv8.7
74 AArch64.
75
76 * Add support for +flagm feature for -march in Armv8.4 AArch64.
77
78 * Add support for +ls64 feature for -march in Armv8.7 AArch64. Add atomic
79 64-byte load/store instructions for this feature.
80
81 * Add support for +pauth (Pointer Authentication) feature for -march in
82 AArch64.
83
84 * Add support for Intel TDX instructions.
85
86 * Add support for Intel Key Locker instructions.
87
88 * Added a .nop directive to generate a single no-op instruction in a target
89 neutral manner. This instruction does have an effect on DWARF line number
90 generation, if that is active.
91
92 * Removed --reduce-memory-overheads and --hash-size as gas now
93 uses hash tables that can be expand and shrink automatically.
94
95 * Add {disp16} pseudo prefix to x86 assembler.
96
97 * Add support for Intel AMX instructions.
98
99 * Configure with --enable-x86-used-note by default for Linux/x86.
100
101 * Add support for the SHF_GNU_RETAIN flag, which can be applied to
102 sections using the 'R' flag in the .section directive.
103 SHF_GNU_RETAIN specifies that the section should not be garbage
104 collected by the linker. It requires the GNU or FreeBSD ELF OSABIs.
105
106 Changes in 2.35:
107
108 * X86 NaCl target support is removed.
109
110 * Extend .symver directive to update visibility of the original symbol
111 and assign one original symbol to different versioned symbols.
112
113 * Add support for Intel SERIALIZE and TSXLDTRK instructions.
114
115 * Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
116 -mlfence-before-ret= options to x86 assembler to help mitigate
117 CVE-2020-0551.
118
119 * Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
120 (if such output is being generated). Added the ability to generate
121 version 5 .debug_line sections.
122
123 * Add -mbig-obj support to i386 MingW targets.
124
125 Changes in 2.34:
126
127 * Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
128 -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
129 options to x86 assembler to align branches within a fixed boundary
130 with segment prefixes or NOPs.
131
132 * Add support for Zilog eZ80 and Zilog Z180 CPUs.
133
134 * Add support for z80-elf target.
135
136 * Add support for relocation of each byte or word of multibyte value to Z80
137 targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
138 with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
139
140 * Add SDCC support for Z80 targets.
141
142 Changes in 2.33:
143
144 * Add support for the Arm Scalable Vector Extension version 2 (SVE2)
145 instructions.
146
147 * Add support for the Arm Transactional Memory Extension (TME)
148 instructions.
149
150 * Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
151 instructions.
152
153 * For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
154 LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
155 time option to set the default behavior. Set the default if the configure
156 option is not used to "no".
157
158 * Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
159 processors.
160
161 * Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
162 Cortex-A76AE, and Cortex-A77 processors.
163
164 * Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
165 floating point literals. Add .float16_format directive and
166 -mfp16-format=[ieee|alternative] option for Arm to control the format of the
167 encoding.
168
169 * Add --gdwarf-cie-version command line flag. This allows control over which
170 version of DWARF CIE the assembler creates.
171
172 Changes in 2.32:
173
174 * Add -mvexwig=[0|1] option to x86 assembler to control encoding of
175 VEX.W-ignored (WIG) VEX instructions.
176
177 * Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
178 notes. Add a --enable-x86-used-note configure time option to set the
179 default behavior. Set the default if the configure option is not used
180 to "no".
181
182 * Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
183
184 * Add support for the MIPS Loongson EXTensions (EXT) instructions.
185
186 * Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
187
188 * Add support for the C-SKY processor series.
189
190 * Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
191 ASE.
192
193 Changes in 2.31:
194
195 * The ADR and ADRL pseudo-instructions supported by the ARM assembler
196 now only set the bottom bit of the address of thumb function symbols
197 if the -mthumb-interwork command line option is active.
198
199 * Add support for the MIPS Global INValidate (GINV) ASE.
200
201 * Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
202
203 * Add support for the Freescale S12Z architecture.
204
205 * Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
206 Build Attribute notes if none are present in the input sources. Add a
207 --enable-generate-build-notes=[yes|no] configure time option to set the
208 default behaviour. Set the default if the configure option is not used
209 to "no".
210
211 * Remove -mold-gcc command-line option for x86 targets.
212
213 * Add -O[2|s] command-line options to x86 assembler to enable alternate
214 shorter instruction encoding.
215
216 * Add support for .nops directive. It is currently supported only for
217 x86 targets.
218
219 Changes in 2.30:
220
221 * Add support for loaction views in DWARF debug line information.
222
223 Changes in 2.29:
224
225 * Add support for ELF SHF_GNU_MBIND.
226
227 * Add support for the WebAssembly file format and wasm32 ELF conversion.
228
229 * PowerPC gas now checks that the correct register class is used in
230 instructions. For instance, "addi %f4,%cr3,%r31" warns three times
231 that the registers are invalid.
232
233 * Add support for the Texas Instruments PRU processor.
234
235 * Support for the ARMv8-R architecture and Cortex-R52 processor has been
236 added to the ARM port.
237
238 Changes in 2.28:
239
240 * Add support for the RISC-V architecture.
241
242 * Add support for the ARM Cortex-M23 and Cortex-M33 processors.
243
244 Changes in 2.27:
245
246 * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
247
248 * Add --no-pad-sections to stop the assembler from padding the end of output
249 sections up to their alignment boundary.
250
251 * Support for the ARMv8-M architecture has been added to the ARM port. Support
252 for the ARMv8-M Security and DSP Extensions has also been added to the ARM
253 port.
254
255 * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
256 .extCoreRegister pseudo-ops that allow an user to define custom
257 instructions, conditional codes, auxiliary and core registers.
258
259 * Add a configure option --enable-elf-stt-common to decide whether ELF
260 assembler should generate common symbols with the STT_COMMON type by
261 default. Default to no.
262
263 * New command-line option --elf-stt-common= for ELF targets to control
264 whether to generate common symbols with the STT_COMMON type.
265
266 * Add ability to set section flags and types via numeric values for ELF
267 based targets.
268
269 * Add a configure option --enable-x86-relax-relocations to decide whether
270 x86 assembler should generate relax relocations by default. Default to
271 yes, except for x86 Solaris targets older than Solaris 12.
272
273 * New command-line option -mrelax-relocations= for x86 target to control
274 whether to generate relax relocations.
275
276 * New command-line option -mfence-as-lock-add=yes for x86 target to encode
277 lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
278
279 * Add assembly-time relaxation option for ARC cpus.
280
281 * Add --with-cpu=TYPE configure option for ARC gas. This allows the default
282 cpu type to be adjusted at configure time.
283
284 Changes in 2.26:
285
286 * Add a configure option --enable-compressed-debug-sections={all,gas} to
287 decide whether DWARF debug sections should be compressed by default.
288
289 * Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
290 assembler support for Argonaut RISC architectures.
291
292 * Symbol and label names can now be enclosed in double quotes (") which allows
293 them to contain characters that are not part of valid symbol names in high
294 level languages.
295
296 * Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
297 previous spelling, -march=armv6zk, is still accepted.
298
299 * Support for the ARMv8.1 architecture has been added to the Aarch64 port.
300 Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
301 extensions has also been added to the Aarch64 port.
302
303 * Support for the ARMv8.1 architecture has been added to the ARM port. Support
304 for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
305 been added to the ARM port.
306
307 * Extend --compress-debug-sections option to support
308 --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
309 targets.
310
311 * --compress-debug-sections is turned on for Linux/x86 by default.
312
313 Changes in 2.25:
314
315 * Add support for the AVR Tiny microcontrollers.
316
317 * Replace support for openrisc and or32 with support for or1k.
318
319 * Enhanced the ARM port to accept the assembler output from the CodeComposer
320 Studio tool. Support is enabled via the new command-line option -mccs.
321
322 * Add support for the Andes NDS32.
323
324 Changes in 2.24:
325
326 * Add support for the Texas Instruments MSP430X processor.
327
328 * Add -gdwarf-sections command-line option to enable per-code-section
329 generation of DWARF .debug_line sections.
330
331 * Add support for Altera Nios II.
332
333 * Add support for the Imagination Technologies Meta processor.
334
335 * Add support for the v850e3v5.
336
337 * Remove assembler support for MIPS ECOFF targets.
338
339 Changes in 2.23:
340
341 * Add support for the 64-bit ARM architecture: AArch64.
342
343 * Add support for S12X processor.
344
345 * Add support for the VLE extension to the PowerPC architecture.
346
347 * Add support for the Freescale XGATE architecture.
348
349 * Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
350 directives. These are currently available only for x86 and ARM targets.
351
352 * Add support for the Renesas RL78 architecture.
353
354 * Add support for the Adapteva EPIPHANY architecture.
355
356 * For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
357
358 Changes in 2.22:
359
360 * Add support for the Tilera TILEPro and TILE-Gx architectures.
361
362 Changes in 2.21:
363
364 * Gas no longer requires doubling of ampersands in macros.
365
366 * Add support for the TMS320C6000 (TI C6X) processor family.
367
368 * GAS now understands an extended syntax in the .section directive flags
369 for COFF targets that allows the section's alignment to be specified. This
370 feature has also been backported to the 2.20 release series, starting with
371 2.20.1.
372
373 * Add support for the Renesas RX processor.
374
375 * New command-line option, --compress-debug-sections, which requests
376 compression of DWARF debug information sections in the relocatable output
377 file. Compressed debug sections are supported by readelf, objdump, and
378 gold, but not currently by Gnu ld.
379
380 Changes in 2.20:
381
382 * Added support for v850e2 and v850e2v3.
383
384 * GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
385 pseudo op. It marks the symbol as being globally unique in the entire
386 process.
387
388 * ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
389 in binary rather than text.
390
391 * Add support for common symbol alignment to PE formats.
392
393 * Add support for the new discriminator column in the DWARF line table,
394 with a discriminator operand for the .loc directive.
395
396 * Add support for Sunplus score architecture.
397
398 * The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
399 indicate that if the symbol is the target of a relocation, its value should
400 not be use. Instead the function should be invoked and its result used as
401 the value.
402
403 * Add support for Lattice Mico32 (lm32) architecture.
404
405 * Add support for Xilinx MicroBlaze architecture.
406
407 Changes in 2.19:
408
409 * New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
410 tables without runtime relocation.
411
412 * New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
413 adds compatibility with H'00 style hex constants.
414
415 * New command-line option, -msse-check=[none|error|warning], for x86
416 targets.
417
418 * New sub-option added to the assembler's -a command-line switch to
419 generate a listing output. The 'g' sub-option will insert into the listing
420 various information about the assembly, such as assembler version, the
421 command-line options used, and a time stamp.
422
423 * New command-line option -msse2avx for x86 target to encode SSE
424 instructions with VEX prefix.
425
426 * Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
427
428 * New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
429 -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
430 -mnaked-reg and -mold-gcc, for x86 targets.
431
432 * Support for generating wide character strings has been added via the new
433 pseudo ops: .string16, .string32 and .string64.
434
435 * Support for SSE5 has been added to the i386 port.
436
437 Changes in 2.18:
438
439 * The GAS sources are now released under the GPLv3.
440
441 * Support for the National Semiconductor CR16 target has been added.
442
443 * Added gas .reloc pseudo. This is a low-level interface for creating
444 relocations.
445
446 * Add support for x86_64 PE+ target.
447
448 * Add support for Score target.
449
450 Changes in 2.17:
451
452 * Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
453
454 * Support for ms2 architecture has been added.
455
456 * Support for the Z80 processor family has been added.
457
458 * Add support for the "@<file>" syntax to the command line, so that extra
459 switches can be read from <file>.
460
461 * The SH target supports a new command-line switch --enable-reg-prefix which,
462 if enabled, will allow register names to be optionally prefixed with a $
463 character. This allows register names to be distinguished from label names.
464
465 * Macros with a variable number of arguments are now supported. See the
466 documentation for how this works.
467
468 * Added --reduce-memory-overheads switch to reduce the size of the hash
469 tables used, at the expense of longer assembly times, and
470 --hash-size=<NUMBER> to set the size of the hash tables used by gas.
471
472 * Macro names and macro parameter names can now be any identifier that would
473 also be legal as a symbol elsewhere. For macro parameter names, this is
474 known to cause problems in certain sources when the respective target uses
475 characters inconsistently, and thus macro parameter references may no longer
476 be recognized as such (see the documentation for details).
477
478 * Support the .f_floating, .d_floating, .g_floating and .h_floating directives
479 for the VAX target in order to be more compatible with the VAX MACRO
480 assembler.
481
482 * New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
483
484 Changes in 2.16:
485
486 * Redefinition of macros now results in an error.
487
488 * New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
489
490 * New command-line option -munwind-check=[warning|error] for IA64
491 targets.
492
493 * The IA64 port now uses automatic dependency violation removal as its default
494 mode.
495
496 * Port to MAXQ processor contributed by HCL Tech.
497
498 * Added support for generating unwind tables for ARM ELF targets.
499
500 * Add a -g command-line option to generate debug information in the target's
501 preferred debug format.
502
503 * Support for the crx-elf target added.
504
505 * Support for the sh-symbianelf target added.
506
507 * Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
508 on pe[i]-i386; required for this target's DWARF 2 support.
509
510 * Support for Motorola MCF521x/5249/547x/548x added.
511
512 * Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
513 instrucitons.
514
515 * New command-line option -mno-shared for MIPS ELF targets.
516
517 * New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
518 added to enter (and leave) alternate macro syntax mode.
519
520 Changes in 2.15:
521
522 * The MIPS -membedded-pic option (Embedded-PIC code generation) is
523 deprecated and will be removed in a future release.
524
525 * Added PIC m32r Linux (ELF) and support to M32R assembler.
526
527 * Added support for ARM V6.
528
529 * Added support for sh4a and variants.
530
531 * Support for Renesas M32R2 added.
532
533 * Limited support for Mapping Symbols as specified in the ARM ELF
534 specification has been added to the arm assembler.
535
536 * On ARM architectures, added a new gas directive ".unreq" that undoes
537 definitions created by ".req".
538
539 * Support for Motorola ColdFire MCF528x added.
540
541 * Added --gstabs+ switch to enable the generation of STABS debug format
542 information with GNU extensions.
543
544 * Added support for MIPS64 Release 2.
545
546 * Added support for v850e1.
547
548 * Added -n switch for x86 assembler. By default, x86 GAS replaces
549 multiple nop instructions used for alignment within code sections
550 with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
551 switch disables the optimization.
552
553 * Removed -n option from MIPS assembler. It was not useful, and confused the
554 existing -non_shared option.
555
556 Changes in 2.14:
557
558 * Added support for MIPS32 Release 2.
559
560 * Added support for Xtensa architecture.
561
562 * Support for Intel's iWMMXt processor (an ARM variant) added.
563
564 * An assembler test generator has been contributed and an example file that
565 uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
566
567 * Support for SH2E added.
568
569 * GASP has now been removed.
570
571 * Support for Texas Instruments TMS320C4x and TMS320C3x series of
572 DSP's contributed by Michael Hayes and Svein E. Seldal.
573
574 * Support for the Ubicom IP2xxx microcontroller added.
575
576 Changes in 2.13:
577
578 * Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
579 and FR500 included.
580
581 * Support for DLX processor added.
582
583 * GASP has now been deprecated and will be removed in a future release. Use
584 the macro facilities in GAS instead.
585
586 * GASP now correctly parses floating point numbers. Unless the base is
587 explicitly specified, they are interpreted as decimal numbers regardless of
588 the currently specified base.
589
590 Changes in 2.12:
591
592 * Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
593
594 * Support for the OpenRISC 32-bit embedded processor by OpenCores.
595
596 * The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
597 specifying the target instruction set. The old method of specifying the
598 target processor has been deprecated, but is still accepted for
599 compatibility.
600
601 * Support for the VFP floating-point instruction set has been added to
602 the ARM assembler.
603
604 * New psuedo op: .incbin to include a set of binary data at a given point
605 in the assembly. Contributed by Anders Norlander.
606
607 * The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
608 but still works for compatability.
609
610 * The MIPS assembler no longer issues a warning by default when it
611 generates a nop instruction from a macro. The new command-line option
612 -n will turn on the warning.
613
614 Changes in 2.11:
615
616 * Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
617
618 * x86 gas now supports the full Pentium4 instruction set.
619
620 * Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
621
622 * Support for Motorola 68HC11 and 68HC12.
623
624 * Support for Texas Instruments TMS320C54x (tic54x).
625
626 * Support for IA-64.
627
628 * Support for i860, by Jason Eckhardt.
629
630 * Support for CRIS (Axis Communications ETRAX series).
631
632 * x86 gas has a new .arch pseudo op to specify the target CPU architecture.
633
634 * x86 gas -q command-line option quietens warnings about register size changes
635 due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
636 translating various deprecated floating point instructions.
637
638 Changes in 2.10:
639
640 * Support for the ARM msr instruction was changed to only allow an immediate
641 operand when altering the flags field.
642
643 * Support for ATMEL AVR.
644
645 * Support for IBM 370 ELF. Somewhat experimental.
646
647 * Support for numbers with suffixes.
648
649 * Added support for breaking to the end of repeat loops.
650
651 * Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
652
653 * New .elseif pseudo-op added.
654
655 * New --fatal-warnings option.
656
657 * picoJava architecture support added.
658
659 * Motorola MCore 210 processor support added.
660
661 * A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
662 assembly programs with intel syntax.
663
664 * New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
665
666 * Added -gdwarf2 option to generate DWARF 2 debugging information.
667
668 * Full 16-bit mode support for i386.
669
670 * Greatly improved instruction operand checking for i386. This change will
671 produce errors or warnings on incorrect assembly code that previous versions
672 of gas accepted. If you get unexpected messages from code that worked with
673 older versions of gas, please double check the code before reporting a bug.
674
675 * Weak symbol support added for COFF targets.
676
677 * Mitsubishi D30V support added.
678
679 * Texas Instruments c80 (tms320c80) support added.
680
681 * i960 ELF support added.
682
683 * ARM ELF support added.
684
685 Changes in 2.9:
686
687 * Texas Instruments c30 (tms320c30) support added.
688
689 * The assembler now optimizes the exception frame information generated by egcs
690 and gcc 2.8. The new --traditional-format option disables this optimization.
691
692 * Added --gstabs option to generate stabs debugging information.
693
694 * The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
695 listing.
696
697 * Added -MD option to print dependencies.
698
699 Changes in 2.8:
700
701 * BeOS support added.
702
703 * MIPS16 support added.
704
705 * Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
706
707 * Alpha/VMS support added.
708
709 * m68k options --base-size-default-16, --base-size-default-32,
710 --disp-size-default-16, and --disp-size-default-32 added.
711
712 * The alignment directives now take an optional third argument, which is the
713 maximum number of bytes to skip. If doing the alignment would require
714 skipping more than the given number of bytes, the alignment is not done at
715 all.
716
717 * The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
718
719 * The -a option takes a new suboption, c (e.g., -alc), to skip false
720 conditionals in listings.
721
722 * Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
723 the symbol is already defined.
724
725 Changes in 2.7:
726
727 * The PowerPC assembler now allows the use of symbolic register names (r0,
728 etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
729 can be used any time. PowerPC 860 move to/from SPR instructions have been
730 added.
731
732 * Alpha Linux (ELF) support added.
733
734 * PowerPC ELF support added.
735
736 * m68k Linux (ELF) support added.
737
738 * i960 Hx/Jx support added.
739
740 * i386/PowerPC gnu-win32 support added.
741
742 * SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
743 default is to build COFF-only support. To get a set of tools that generate
744 ELF (they'll understand both COFF and ELF), you must configure with
745 target=i386-unknown-sco3.2v5elf.
746
747 * m88k-motorola-sysv3* support added.
748
749 Changes in 2.6:
750
751 * Gas now directly supports macros, without requiring GASP.
752
753 * Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
754 MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
755 ``.mri 0'' is seen; this can be convenient for inline assembler code.
756
757 * Added --defsym SYM=VALUE option.
758
759 * Added -mips4 support to MIPS assembler.
760
761 * Added PIC support to Solaris and SPARC SunOS 4 assembler.
762
763 Changes in 2.4:
764
765 * Converted this directory to use an autoconf-generated configure script.
766
767 * ARM support, from Richard Earnshaw.
768
769 * Updated VMS support, from Pat Rankin, including considerably improved
770 debugging support.
771
772 * Support for the control registers in the 68060.
773
774 * Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
775 provide for possible future gcc changes, for targets where gas provides some
776 features not available in the native assembler. If the native assembler is
777 used, it should become obvious pretty quickly what the problem is.
778
779 * Usage message is available with "--help".
780
781 * The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
782 also, but didn't get into the NEWS file.)
783
784 * Weak symbol support for a.out.
785
786 * A bug in the listing code which could cause an infinite loop has been fixed.
787 Bugs in listings when generating a COFF object file have also been fixed.
788
789 * Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
790 Paul Kranenburg.
791
792 * Improved Alpha support. Immediate constants can have a much larger range
793 now. Support for the 21164 has been contributed by Digital.
794
795 * Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
796
797 Changes in 2.3:
798
799 * Mach i386 support, by David Mackenzie and Ken Raeburn.
800
801 * RS/6000 and PowerPC support by Ian Taylor.
802
803 * VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
804 based on mail received from various people. The `-h#' option should work
805 again too.
806
807 * HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
808 with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
809 version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
810 this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
811 in the "dist" directory.
812
813 * Vax support in gas fixed for BSD, so it builds and seems to run a couple
814 simple tests okay. I haven't put it through extensive testing. (GNU make is
815 currently required for BSD 4.3 builds.)
816
817 * Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
818 based on code donated by CMU, which used an a.out-based format. I'm afraid
819 the alpha-a.out support is pretty badly mangled, and much of it removed;
820 making it work will require rewriting it as BFD support for the format anyways.
821
822 * Irix 5 support.
823
824 * The test suites have been fixed up a bit, so that they should work with a
825 couple different versions of expect and dejagnu.
826
827 * Symbols' values are now handled internally as expressions, permitting more
828 flexibility in evaluating them in some cases. Some details of relocation
829 handling have also changed, and simple constant pool management has been
830 added, to make the Alpha port easier.
831
832 * New option "--statistics" for printing out program run times. This is
833 intended to be used with the gcc "-Q" option, which prints out times spent in
834 various phases of compilation. (You should be able to get all of them
835 printed out with "gcc -Q -Wa,--statistics", I think.)
836
837 Changes in 2.2:
838
839 * RS/6000 AIX and MIPS SGI Irix 5 support has been added.
840
841 * Configurations that are still in development (and therefore are convenient to
842 have listed in configure.in) still get rejected without a minor change to
843 gas/Makefile.in, so people not doing development work shouldn't get the
844 impression that support for such configurations is actually believed to be
845 reliable.
846
847 * The program name (usually "as") is printed when a fatal error message is
848 displayed. This should prevent some confusion about the source of occasional
849 messages about "internal errors".
850
851 * ELF support is falling into place. Support for the 386 should be working.
852 Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
853
854 * Symbol values are maintained as expressions instead of being immediately
855 boiled down to add-symbol, sub-symbol, and constant. This permits slightly
856 more complex calculations involving symbols whose values are not alreadey
857 known.
858
859 * DBX-style debugging info ("stabs") is now supported for COFF formats.
860 If any stabs directives are seen in the source, GAS will create two new
861 sections: a ".stab" and a ".stabstr" section. The format of the .stab
862 section is nearly identical to the a.out symbol format, and .stabstr is
863 its string table. For this to be useful, you must have configured GCC
864 to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
865 that can use the stab sections (4.11 or later).
866
867 * LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
868 support is in progress.
869
870 Changes in 2.1:
871
872 * Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
873 incorporated, but not well tested yet.
874
875 * Altered the opcode table split for m68k; it should require less VM to compile
876 with gcc now.
877
878 * Some minor adjustments to add (Convergent Technologies') Miniframe support,
879 suggested by Ronald Cole.
880
881 * HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
882 includes improved ELF support, which I've started adapting for SPARC Solaris
883 2.x. Integration isn't completely, so it probably won't work.
884
885 * HP9000/300 support, donated by HP, has been merged in.
886
887 * Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
888
889 * Better error messages for unsupported configurations (e.g., hppa-hpux).
890
891 * Test suite framework is starting to become reasonable.
892
893 Changes in 2.0:
894
895 * Mostly bug fixes.
896
897 * Some more merging of BFD and ELF code, but ELF still doesn't work.
898
899 Changes in 1.94:
900
901 * BFD merge is partly done. Adventurous souls may try giving configure the
902 "--with-bfd-assembler" option. Currently, ELF format requires it, a.out
903 format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
904 or "solaris". (ELF isn't really supported yet. It needs work. I've got
905 some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
906 fully merged yet.)
907
908 * The 68K opcode table has been split in half. It should now compile under gcc
909 without consuming ridiculous amounts of memory.
910
911 * A couple data structures have been reduced in size. This should result in
912 saving a little bit of space at runtime.
913
914 * Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
915 code provided ROSE format support, which I haven't merged in yet. (I can
916 make it available, if anyone wants to try it out.) Ralph's code, for BSD
917 4.4, supports a.out format. We don't have ECOFF support in just yet; it's
918 coming.
919
920 * Support for the Hitachi H8/500 has been added.
921
922 * VMS host and target support should be working now, thanks chiefly to Eric
923 Youngdale.
924
925 Changes in 1.93.01:
926
927 * For m68k, support for more processors has been added: 68040, CPU32, 68851.
928
929 * For i386, .align is now power-of-two; was number-of-bytes.
930
931 * For m68k, "%" is now accepted before register names. For COFF format, which
932 doesn't use underscore prefixes for C labels, it is required, so variable "a0"
933 can be distinguished from the register.
934
935 * Last public release was 1.38. Lots of configuration changes since then, lots
936 of new CPUs and formats, lots of bugs fixed.
937
938 \f
939 Copyright (C) 2012-2022 Free Software Foundation, Inc.
940
941 Copying and distribution of this file, with or without modification,
942 are permitted in any medium without royalty provided the copyright
943 notice and this notice are preserved.
944
945 Local variables:
946 fill-column: 79
947 End: