]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - gas/cgen.c
Fix: symbols eliminated by --gc-sections still trigger warnings for gnu.warning.SYM
[thirdparty/binutils-gdb.git] / gas / cgen.c
1 /* GAS interface for targets using CGEN: Cpu tools GENerator.
2 Copyright (C) 1996-2023 Free Software Foundation, Inc.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free Software
18 Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
19
20 #include "as.h"
21 #include <setjmp.h>
22 #include "symcat.h"
23 #include "cgen-desc.h"
24 #include "subsegs.h"
25 #include "cgen.h"
26 #include "dwarf2dbg.h"
27
28 #include "symbols.h"
29
30 #ifdef OBJ_COMPLEX_RELC
31 static expressionS * make_right_shifted_expr
32 (expressionS *, const int, const int);
33
34 static unsigned long gas_cgen_encode_addend
35 (const unsigned long, const unsigned long, const unsigned long, \
36 const unsigned long, const unsigned long, const unsigned long, \
37 const unsigned long);
38
39 static const char * weak_operand_overflow_check
40 (const expressionS *, const CGEN_OPERAND *);
41
42 static void queue_fixup_recursively
43 (const int, const int, expressionS *, \
44 const CGEN_MAYBE_MULTI_IFLD *, const int, const int);
45
46 static int rightshift = 0;
47 #endif
48 static void queue_fixup (int, int, expressionS *);
49
50 /* Opcode table descriptor, must be set by md_begin. */
51
52 CGEN_CPU_DESC gas_cgen_cpu_desc;
53
54 /* Callback to insert a register into the symbol table.
55 A target may choose to let GAS parse the registers.
56 ??? Not currently used. */
57
58 void
59 cgen_asm_record_register (char *name, int number)
60 {
61 /* Use symbol_create here instead of symbol_new so we don't try to
62 output registers into the object file's symbol table. */
63 symbol_table_insert (symbol_create (name, reg_section,
64 &zero_address_frag, number));
65 }
66
67 /* We need to keep a list of fixups. We can't simply generate them as
68 we go, because that would require us to first create the frag, and
69 that would screw up references to ``.''.
70
71 This is used by cpu's with simple operands. It keeps knowledge of what
72 an `expressionS' is and what a `fixup' is out of CGEN which for the time
73 being is preferable.
74
75 OPINDEX is the index in the operand table.
76 OPINFO is something the caller chooses to help in reloc determination. */
77
78 struct fixup
79 {
80 int opindex;
81 int opinfo;
82 expressionS exp;
83 struct cgen_maybe_multi_ifield * field;
84 int msb_field_p;
85 };
86
87 static struct fixup fixups[GAS_CGEN_MAX_FIXUPS];
88 static int num_fixups;
89
90 /* Prepare to parse an instruction.
91 ??? May wish to make this static and delete calls in md_assemble. */
92
93 void
94 gas_cgen_init_parse (void)
95 {
96 num_fixups = 0;
97 }
98
99 /* Queue a fixup. */
100
101 static void
102 queue_fixup (int opindex, int opinfo, expressionS *expP)
103 {
104 /* We need to generate a fixup for this expression. */
105 if (num_fixups >= GAS_CGEN_MAX_FIXUPS)
106 as_fatal (_("too many fixups"));
107 fixups[num_fixups].exp = *expP;
108 fixups[num_fixups].opindex = opindex;
109 fixups[num_fixups].opinfo = opinfo;
110 ++ num_fixups;
111 }
112
113 /* The following functions allow fixup chains to be stored, retrieved,
114 and swapped. They are a generalization of a pre-existing scheme
115 for storing, restoring and swapping fixup chains that was used by
116 the m32r port. The functionality is essentially the same, only
117 instead of only being able to store a single fixup chain, an entire
118 array of fixup chains can be stored. It is the user's responsibility
119 to keep track of how many fixup chains have been stored and which
120 elements of the array they are in.
121
122 The algorithms used are the same as in the old scheme. Other than the
123 "array-ness" of the whole thing, the functionality is identical to the
124 old scheme.
125
126 gas_cgen_initialize_saved_fixups_array():
127 Sets num_fixups_in_chain to 0 for each element. Call this from
128 md_begin() if you plan to use these functions and you want the
129 fixup count in each element to be set to 0 initially. This is
130 not necessary, but it's included just in case. It performs
131 the same function for each element in the array of fixup chains
132 that gas_init_parse() performs for the current fixups.
133
134 gas_cgen_save_fixups (element):
135 element - element number of the array you wish to store the fixups
136 to. No mechanism is built in for tracking what element
137 was last stored to.
138
139 gas_cgen_restore_fixups (element):
140 element - element number of the array you wish to restore the fixups
141 from.
142
143 gas_cgen_swap_fixups(int element):
144 element - swap the current fixups with those in this element number.
145 */
146
147 struct saved_fixups
148 {
149 struct fixup fixup_chain[GAS_CGEN_MAX_FIXUPS];
150 int num_fixups_in_chain;
151 };
152
153 static struct saved_fixups stored_fixups[MAX_SAVED_FIXUP_CHAINS];
154
155 void
156 gas_cgen_initialize_saved_fixups_array (void)
157 {
158 int i = 0;
159
160 while (i < MAX_SAVED_FIXUP_CHAINS)
161 stored_fixups[i++].num_fixups_in_chain = 0;
162 }
163
164 void
165 gas_cgen_save_fixups (int i)
166 {
167 if (i < 0 || i >= MAX_SAVED_FIXUP_CHAINS)
168 {
169 as_fatal ("index into stored_fixups[] out of bounds");
170 return;
171 }
172
173 stored_fixups[i].num_fixups_in_chain = num_fixups;
174 memcpy (stored_fixups[i].fixup_chain, fixups,
175 sizeof (fixups[0]) * num_fixups);
176 num_fixups = 0;
177 }
178
179 void
180 gas_cgen_restore_fixups (int i)
181 {
182 if (i < 0 || i >= MAX_SAVED_FIXUP_CHAINS)
183 {
184 as_fatal ("index into stored_fixups[] out of bounds");
185 return;
186 }
187
188 num_fixups = stored_fixups[i].num_fixups_in_chain;
189 memcpy (fixups, stored_fixups[i].fixup_chain,
190 (sizeof (stored_fixups[i].fixup_chain[0])) * num_fixups);
191 stored_fixups[i].num_fixups_in_chain = 0;
192 }
193
194 void
195 gas_cgen_swap_fixups (int i)
196 {
197 if (i < 0 || i >= MAX_SAVED_FIXUP_CHAINS)
198 {
199 as_fatal ("index into stored_fixups[] out of bounds");
200 return;
201 }
202
203 if (num_fixups == 0)
204 gas_cgen_restore_fixups (i);
205
206 else if (stored_fixups[i].num_fixups_in_chain == 0)
207 gas_cgen_save_fixups (i);
208
209 else
210 {
211 int tmp;
212 struct fixup tmp_fixup;
213
214 tmp = stored_fixups[i].num_fixups_in_chain;
215 stored_fixups[i].num_fixups_in_chain = num_fixups;
216 num_fixups = tmp;
217
218 for (tmp = GAS_CGEN_MAX_FIXUPS; tmp--;)
219 {
220 tmp_fixup = stored_fixups[i].fixup_chain [tmp];
221 stored_fixups[i].fixup_chain[tmp] = fixups [tmp];
222 fixups [tmp] = tmp_fixup;
223 }
224 }
225 }
226
227 /* Default routine to record a fixup.
228 This is a cover function to fix_new.
229 It exists because we record INSN with the fixup.
230
231 FRAG and WHERE are their respective arguments to fix_new_exp.
232 LENGTH is in bits.
233 OPINFO is something the caller chooses to help in reloc determination.
234
235 At this point we do not use a bfd_reloc_code_real_type for
236 operands residing in the insn, but instead just use the
237 operand index. This lets us easily handle fixups for any
238 operand type. We pick a BFD reloc type in md_apply_fix. */
239
240 fixS *
241 gas_cgen_record_fixup (fragS *frag, int where, const CGEN_INSN *insn,
242 int length, const CGEN_OPERAND *operand, int opinfo,
243 symbolS *symbol, offsetT offset)
244 {
245 fixS *fixP;
246
247 /* It may seem strange to use operand->attrs and not insn->attrs here,
248 but it is the operand that has a pc relative relocation. */
249 fixP = fix_new (frag, where, length / 8, symbol, offset,
250 CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_PCREL_ADDR),
251 (bfd_reloc_code_real_type)
252 ((int) BFD_RELOC_UNUSED
253 + (int) operand->type));
254 fixP->fx_cgen.insn = insn;
255 fixP->fx_cgen.opinfo = opinfo;
256 fixP->fx_cgen.field = NULL;
257 fixP->fx_cgen.msb_field_p = 0;
258
259 return fixP;
260 }
261
262 /* Default routine to record a fixup given an expression.
263 This is a cover function to fix_new_exp.
264 It exists because we record INSN with the fixup.
265
266 FRAG and WHERE are their respective arguments to fix_new_exp.
267 LENGTH is in bits.
268 OPINFO is something the caller chooses to help in reloc determination.
269
270 At this point we do not use a bfd_reloc_code_real_type for
271 operands residing in the insn, but instead just use the
272 operand index. This lets us easily handle fixups for any
273 operand type. We pick a BFD reloc type in md_apply_fix. */
274
275 fixS *
276 gas_cgen_record_fixup_exp (fragS *frag, int where, const CGEN_INSN *insn,
277 int length, const CGEN_OPERAND *operand, int opinfo,
278 expressionS *exp)
279 {
280 fixS *fixP;
281
282 /* It may seem strange to use operand->attrs and not insn->attrs here,
283 but it is the operand that has a pc relative relocation. */
284 fixP = fix_new_exp (frag, where, length / 8, exp,
285 CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_PCREL_ADDR),
286 (bfd_reloc_code_real_type)
287 ((int) BFD_RELOC_UNUSED
288 + (int) operand->type));
289 fixP->fx_cgen.insn = insn;
290 fixP->fx_cgen.opinfo = opinfo;
291 fixP->fx_cgen.field = NULL;
292 fixP->fx_cgen.msb_field_p = 0;
293
294 return fixP;
295 }
296
297 #ifdef OBJ_COMPLEX_RELC
298 static symbolS *
299 expr_build_binary (operatorT op, symbolS * s1, symbolS * s2)
300 {
301 expressionS e;
302
303 e.X_op = op;
304 e.X_add_symbol = s1;
305 e.X_op_symbol = s2;
306 e.X_add_number = 0;
307 return make_expr_symbol (& e);
308 }
309 #endif
310
311 /* Used for communication between the next two procedures. */
312 static jmp_buf expr_jmp_buf;
313 static int expr_jmp_buf_p;
314
315 /* Callback for cgen interface. Parse the expression at *STRP.
316 The result is an error message or NULL for success (in which case
317 *STRP is advanced past the parsed text).
318 WANT is an indication of what the caller is looking for.
319 If WANT == CGEN_ASM_PARSE_INIT the caller is beginning to try to match
320 a table entry with the insn, reset the queued fixups counter.
321 An enum cgen_parse_operand_result is stored in RESULTP.
322 OPINDEX is the operand's table entry index.
323 OPINFO is something the caller chooses to help in reloc determination.
324 The resulting value is stored in VALUEP. */
325
326 const char *
327 gas_cgen_parse_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
328 enum cgen_parse_operand_type want, const char **strP,
329 int opindex, int opinfo,
330 enum cgen_parse_operand_result *resultP,
331 bfd_vma *valueP)
332 {
333 #ifdef __STDC__
334 /* These are volatile to survive the setjmp. */
335 char * volatile hold;
336 enum cgen_parse_operand_result * volatile resultP_1;
337 volatile int opinfo_1;
338 #else
339 static char *hold;
340 static enum cgen_parse_operand_result *resultP_1;
341 int opinfo_1;
342 #endif
343 const char *errmsg;
344 expressionS exp;
345
346 #ifdef OBJ_COMPLEX_RELC
347 volatile int signed_p = 0;
348 symbolS * stmp = NULL;
349 bfd_reloc_code_real_type reloc_type;
350 const CGEN_OPERAND * operand;
351 fixS dummy_fixup;
352 #endif
353 if (want == CGEN_PARSE_OPERAND_INIT)
354 {
355 gas_cgen_init_parse ();
356 return NULL;
357 }
358
359 resultP_1 = resultP;
360 hold = input_line_pointer;
361 input_line_pointer = (char *) *strP;
362 opinfo_1 = opinfo;
363
364 /* We rely on md_operand to longjmp back to us.
365 This is done via gas_cgen_md_operand. */
366 if (setjmp (expr_jmp_buf) != 0)
367 {
368 expr_jmp_buf_p = 0;
369 input_line_pointer = (char *) hold;
370 *resultP_1 = CGEN_PARSE_OPERAND_RESULT_ERROR;
371 return _("illegal operand");
372 }
373
374 expr_jmp_buf_p = 1;
375 expression (&exp);
376 expr_jmp_buf_p = 0;
377 errmsg = NULL;
378
379 *strP = input_line_pointer;
380 input_line_pointer = hold;
381
382 #ifdef TC_CGEN_PARSE_FIX_EXP
383 opinfo_1 = TC_CGEN_PARSE_FIX_EXP (opinfo_1, & exp);
384 #endif
385
386 /* FIXME: Need to check `want'. */
387
388 resolve_register (&exp);
389
390 switch (exp.X_op)
391 {
392 case O_illegal:
393 errmsg = _("illegal operand");
394 *resultP = CGEN_PARSE_OPERAND_RESULT_ERROR;
395 break;
396 case O_absent:
397 errmsg = _("missing operand");
398 *resultP = CGEN_PARSE_OPERAND_RESULT_ERROR;
399 break;
400 case O_constant:
401 if (want == CGEN_PARSE_OPERAND_SYMBOLIC)
402 goto de_fault;
403 *valueP = exp.X_add_number;
404 *resultP = CGEN_PARSE_OPERAND_RESULT_NUMBER;
405 break;
406 case O_register:
407 *valueP = exp.X_add_number;
408 *resultP = CGEN_PARSE_OPERAND_RESULT_REGISTER;
409 break;
410 de_fault:
411 default:
412 #ifdef OBJ_COMPLEX_RELC
413 /* Look up operand, check to see if there's an obvious
414 overflow (this helps disambiguate some insn parses). */
415 operand = cgen_operand_lookup_by_num (cd, opindex);
416 errmsg = weak_operand_overflow_check (& exp, operand);
417
418 if (! errmsg)
419 {
420 asymbol *bsym;
421
422 /* Fragment the expression as necessary, and queue a reloc. */
423 memset (& dummy_fixup, 0, sizeof (fixS));
424
425 reloc_type = md_cgen_lookup_reloc (0, operand, & dummy_fixup);
426
427 if (exp.X_op == O_symbol
428 && reloc_type == BFD_RELOC_RELC
429 && symbol_constant_p (exp.X_add_symbol)
430 && (!symbol_symbolS (exp.X_add_symbol)
431 || (bsym = symbol_get_bfdsym (exp.X_add_symbol)) == NULL
432 || (bsym->section != expr_section
433 && bsym->section != absolute_section
434 && bsym->section != undefined_section)))
435 {
436 /* Local labels will have been (eagerly) turned into constants
437 by now, due to the inappropriately deep insight of the
438 expression parser. Unfortunately make_expr_symbol
439 prematurely dives into the symbol evaluator, and in this
440 case it gets a bad answer, so we manually create the
441 expression symbol we want here. */
442 stmp = symbol_create (FAKE_LABEL_NAME, expr_section,
443 &zero_address_frag, 0);
444 symbol_set_value_expression (stmp, & exp);
445 }
446 else
447 stmp = make_expr_symbol (& exp);
448
449 /* If this is a pc-relative RELC operand, we
450 need to subtract "." from the expression. */
451 if (reloc_type == BFD_RELOC_RELC
452 && CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_PCREL_ADDR))
453 stmp = expr_build_binary (O_subtract, stmp, expr_build_dot ());
454
455 /* FIXME: this is not a perfect heuristic for figuring out
456 whether an operand is signed: it only works when the operand
457 is an immediate. it's not terribly likely that any other
458 values will be signed relocs, but it's possible. */
459 if (operand && (operand->hw_type == HW_H_SINT))
460 signed_p = 1;
461
462 if (symbol_symbolS (stmp)
463 && (bsym = symbol_get_bfdsym (stmp)) != NULL
464 && bsym->section == expr_section
465 && ! S_IS_LOCAL (stmp))
466 {
467 if (signed_p)
468 bsym->flags |= BSF_SRELC;
469 else
470 bsym->flags |= BSF_RELC;
471 }
472
473 /* Now package it all up for the fixup emitter. */
474 exp.X_op = O_symbol;
475 exp.X_op_symbol = 0;
476 exp.X_add_symbol = stmp;
477 exp.X_add_number = 0;
478
479 /* Re-init rightshift quantity, just in case. */
480 rightshift = operand->length;
481 queue_fixup_recursively (opindex, opinfo_1, & exp,
482 (reloc_type == BFD_RELOC_RELC) ?
483 & (operand->index_fields) : 0,
484 signed_p, -1);
485 }
486 * resultP = errmsg
487 ? CGEN_PARSE_OPERAND_RESULT_ERROR
488 : CGEN_PARSE_OPERAND_RESULT_QUEUED;
489 *valueP = 0;
490 #else
491 queue_fixup (opindex, opinfo_1, &exp);
492 *valueP = 0;
493 *resultP = CGEN_PARSE_OPERAND_RESULT_QUEUED;
494 #endif
495 break;
496 }
497
498 return errmsg;
499 }
500
501 /* md_operand handler to catch unrecognized expressions and halt the
502 parsing process so the next entry can be tried.
503
504 ??? This could be done differently by adding code to `expression'. */
505
506 void
507 gas_cgen_md_operand (expressionS *expressionP ATTRIBUTE_UNUSED)
508 {
509 /* Don't longjmp if we're not called from within cgen_parse_operand(). */
510 if (expr_jmp_buf_p)
511 longjmp (expr_jmp_buf, 1);
512 }
513
514 /* Finish assembling instruction INSN.
515 BUF contains what we've built up so far.
516 LENGTH is the size of the insn in bits.
517 RELAX_P is non-zero if relaxable insns should be emitted as such.
518 Otherwise they're emitted in non-relaxable forms.
519 The "result" is stored in RESULT if non-NULL. */
520
521 void
522 gas_cgen_finish_insn (const CGEN_INSN *insn, CGEN_INSN_BYTES_PTR buf,
523 unsigned int length, int relax_p, finished_insnS *result)
524 {
525 int i;
526 int relax_operand;
527 char *f;
528 unsigned int byte_len = length / 8;
529
530 /* ??? Target foo issues various warnings here, so one might want to provide
531 a hook here. However, our caller is defined in tc-foo.c so there
532 shouldn't be a need for a hook. */
533
534 /* Write out the instruction.
535 It is important to fetch enough space in one call to `frag_more'.
536 We use (f - frag_now->fr_literal) to compute where we are and we
537 don't want frag_now to change between calls.
538
539 Relaxable instructions: We need to ensure we allocate enough
540 space for the largest insn. */
541
542 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED))
543 /* These currently shouldn't get here. */
544 abort ();
545
546 /* Is there a relaxable insn with the relaxable operand needing a fixup? */
547
548 relax_operand = -1;
549 if (relax_p && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXABLE))
550 {
551 /* Scan the fixups for the operand affected by relaxing
552 (i.e. the branch address). */
553
554 for (i = 0; i < num_fixups; ++i)
555 {
556 if (CGEN_OPERAND_ATTR_VALUE (cgen_operand_lookup_by_num (gas_cgen_cpu_desc, fixups[i].opindex),
557 CGEN_OPERAND_RELAX))
558 {
559 relax_operand = i;
560 break;
561 }
562 }
563 }
564
565 if (relax_operand != -1)
566 {
567 int max_len;
568 fragS *old_frag;
569 expressionS *exp;
570 symbolS *sym;
571 offsetT off;
572
573 #ifdef TC_CGEN_MAX_RELAX
574 max_len = TC_CGEN_MAX_RELAX (insn, byte_len);
575 #else
576 max_len = CGEN_MAX_INSN_SIZE;
577 #endif
578 /* Ensure variable part and fixed part are in same fragment. */
579 /* FIXME: Having to do this seems like a hack. */
580 frag_grow (max_len);
581
582 /* Allocate space for the fixed part. */
583 f = frag_more (byte_len);
584
585 /* Create a relaxable fragment for this instruction. */
586 old_frag = frag_now;
587
588 exp = &fixups[relax_operand].exp;
589 sym = exp->X_add_symbol;
590 off = exp->X_add_number;
591 if (exp->X_op != O_constant && exp->X_op != O_symbol)
592 {
593 /* Handle complex expressions. */
594 sym = make_expr_symbol (exp);
595 off = 0;
596 }
597
598 frag_var (rs_machine_dependent,
599 max_len - byte_len /* max chars */,
600 0 /* variable part already allocated */,
601 /* FIXME: When we machine generate the relax table,
602 machine generate a macro to compute subtype. */
603 1 /* subtype */,
604 sym,
605 off,
606 f);
607
608 /* Record the operand number with the fragment so md_convert_frag
609 can use gas_cgen_md_record_fixup to record the appropriate reloc. */
610 old_frag->fr_cgen.insn = insn;
611 old_frag->fr_cgen.opindex = fixups[relax_operand].opindex;
612 old_frag->fr_cgen.opinfo = fixups[relax_operand].opinfo;
613 if (result)
614 result->frag = old_frag;
615 }
616 else
617 {
618 f = frag_more (byte_len);
619 if (result)
620 result->frag = frag_now;
621 }
622
623 /* If we're recording insns as numbers (rather than a string of bytes),
624 target byte order handling is deferred until now. */
625 #if CGEN_INT_INSN_P
626 cgen_put_insn_value (gas_cgen_cpu_desc, (unsigned char *) f, length, *buf,
627 gas_cgen_cpu_desc->insn_endian);
628 #else
629 memcpy (f, buf, byte_len);
630 #endif
631
632 /* Emit DWARF2 debugging information. */
633 dwarf2_emit_insn (byte_len);
634
635 /* Create any fixups. */
636 for (i = 0; i < num_fixups; ++i)
637 {
638 fixS *fixP;
639 const CGEN_OPERAND *operand =
640 cgen_operand_lookup_by_num (gas_cgen_cpu_desc, fixups[i].opindex);
641
642 /* Don't create fixups for these. That's done during relaxation.
643 We don't need to test for CGEN_INSN_RELAXED as they can't get here
644 (see above). */
645 if (relax_p
646 && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXABLE)
647 && CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_RELAX))
648 continue;
649
650 #ifndef md_cgen_record_fixup_exp
651 #define md_cgen_record_fixup_exp gas_cgen_record_fixup_exp
652 #endif
653
654 fixP = md_cgen_record_fixup_exp (frag_now, f - frag_now->fr_literal,
655 insn, length, operand,
656 fixups[i].opinfo,
657 &fixups[i].exp);
658 fixP->fx_cgen.field = fixups[i].field;
659 fixP->fx_cgen.msb_field_p = fixups[i].msb_field_p;
660 if (result)
661 result->fixups[i] = fixP;
662 }
663
664 if (result)
665 {
666 result->num_fixups = num_fixups;
667 result->addr = f;
668 }
669 }
670
671 #ifdef OBJ_COMPLEX_RELC
672 /* Queue many fixups, recursively. If the field is a multi-ifield,
673 repeatedly queue its sub-parts, right shifted to fit into the field (we
674 assume here multi-fields represent a left-to-right, MSB0-LSB0
675 reading). */
676
677 static void
678 queue_fixup_recursively (const int opindex,
679 const int opinfo,
680 expressionS * expP,
681 const CGEN_MAYBE_MULTI_IFLD * field,
682 const int signed_p,
683 const int part_of_multi)
684 {
685 if (field && field->count)
686 {
687 int i;
688
689 for (i = 0; i < field->count; ++ i)
690 queue_fixup_recursively (opindex, opinfo, expP,
691 & (field->val.multi[i]), signed_p, i);
692 }
693 else
694 {
695 expressionS * new_exp = expP;
696
697 #ifdef DEBUG
698 printf ("queueing fixup for field %s\n",
699 (field ? field->val.leaf->name : "??"));
700 print_symbol_value (expP->X_add_symbol);
701 #endif
702 if (field && part_of_multi != -1)
703 {
704 rightshift -= field->val.leaf->length;
705
706 /* Shift reloc value by number of bits remaining after this
707 field. */
708 if (rightshift)
709 new_exp = make_right_shifted_expr (expP, rightshift, signed_p);
710 }
711
712 /* Truncate reloc values to length, *after* leftmost one. */
713 fixups[num_fixups].msb_field_p = (part_of_multi <= 0);
714 fixups[num_fixups].field = (CGEN_MAYBE_MULTI_IFLD *) field;
715
716 queue_fixup (opindex, opinfo, new_exp);
717 }
718 }
719
720 /* Encode the self-describing RELC reloc format's addend. */
721
722 static unsigned long
723 gas_cgen_encode_addend (const unsigned long start, /* in bits */
724 const unsigned long len, /* in bits */
725 const unsigned long oplen, /* in bits */
726 const unsigned long wordsz, /* in bytes */
727 const unsigned long chunksz, /* in bytes */
728 const unsigned long signed_p,
729 const unsigned long trunc_p)
730 {
731 unsigned long res = 0L;
732
733 res |= start & 0x3F;
734 res |= (oplen & 0x3F) << 6;
735 res |= (len & 0x3F) << 12;
736 res |= (wordsz & 0xF) << 18;
737 res |= (chunksz & 0xF) << 22;
738 res |= (CGEN_INSN_LSB0_P ? 1 : 0) << 27;
739 res |= signed_p << 28;
740 res |= trunc_p << 29;
741
742 return res;
743 }
744
745 /* Purpose: make a weak check that the expression doesn't overflow the
746 operand it's to be inserted into.
747
748 Rationale: some insns used to use %operators to disambiguate during a
749 parse. when these %operators are translated to expressions by the macro
750 expander, the ambiguity returns. we attempt to disambiguate by field
751 size.
752
753 Method: check to see if the expression's top node is an O_and operator,
754 and the mask is larger than the operand length. This would be an
755 overflow, so signal it by returning an error string. Any other case is
756 ambiguous, so we assume it's OK and return NULL. */
757
758 static const char *
759 weak_operand_overflow_check (const expressionS * exp,
760 const CGEN_OPERAND * operand)
761 {
762 const unsigned long len = operand->length;
763 unsigned long mask;
764 unsigned long opmask = len == 0 ? 0 : (1UL << (len - 1) << 1) - 1;
765
766 if (!exp)
767 return NULL;
768
769 if (exp->X_op != O_bit_and)
770 {
771 /* Check for implicit overflow flag. */
772 if (CGEN_OPERAND_ATTR_VALUE
773 (operand, CGEN_OPERAND_RELOC_IMPLIES_OVERFLOW))
774 return _("a reloc on this operand implies an overflow");
775 return NULL;
776 }
777
778 mask = exp->X_add_number;
779
780 if (exp->X_add_symbol
781 && symbol_constant_p (exp->X_add_symbol))
782 mask |= *symbol_X_add_number (exp->X_add_symbol);
783
784 if (exp->X_op_symbol
785 && symbol_constant_p (exp->X_op_symbol))
786 mask |= *symbol_X_add_number (exp->X_op_symbol);
787
788 /* Want to know if mask covers more bits than opmask.
789 this is the same as asking if mask has any bits not in opmask,
790 or whether (mask & ~opmask) is nonzero. */
791 if (mask && (mask & ~opmask))
792 {
793 #ifdef DEBUG
794 printf ("overflow: (mask = %8.8x, ~opmask = %8.8x, AND = %8.8x)\n",
795 mask, ~opmask, (mask & ~opmask));
796 #endif
797 return _("operand mask overflow");
798 }
799
800 return NULL;
801 }
802
803 static expressionS *
804 make_right_shifted_expr (expressionS * exp,
805 const int amount,
806 const int signed_p)
807 {
808 symbolS * stmp = 0;
809 expressionS * new_exp;
810 asymbol *bsym;
811
812 stmp = expr_build_binary (O_right_shift,
813 make_expr_symbol (exp),
814 expr_build_uconstant (amount));
815 bsym = symbol_get_bfdsym (stmp);
816
817 if (signed_p)
818 bsym->flags |= BSF_SRELC;
819 else
820 bsym->flags |= BSF_RELC;
821
822 /* Then wrap that in a "symbol expr" for good measure. */
823 new_exp = XNEW (expressionS);
824 memset (new_exp, 0, sizeof (expressionS));
825 new_exp->X_op = O_symbol;
826 new_exp->X_op_symbol = 0;
827 new_exp->X_add_symbol = stmp;
828 new_exp->X_add_number = 0;
829
830 return new_exp;
831 }
832
833 #endif
834
835 /* Apply a fixup to the object code. This is called for all the
836 fixups we generated by the call to fix_new_exp, above. In the call
837 above we used a reloc code which was the largest legal reloc code
838 plus the operand index. Here we undo that to recover the operand
839 index. At this point all symbol values should be fully resolved,
840 and we attempt to completely resolve the reloc. If we can not do
841 that, we determine the correct reloc code and put it back in the fixup. */
842
843 /* FIXME: This function handles some of the fixups and bfd_install_relocation
844 handles the rest. bfd_install_relocation (or some other bfd function)
845 should handle them all. */
846
847 void
848 gas_cgen_md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
849 {
850 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
851 valueT value = * valP;
852 /* Canonical name, since used a lot. */
853 CGEN_CPU_DESC cd = gas_cgen_cpu_desc;
854
855 if (fixP->fx_addsy == (symbolS *) NULL)
856 fixP->fx_done = 1;
857
858 /* We don't actually support subtracting a symbol. */
859 if (fixP->fx_subsy != (symbolS *) NULL)
860 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
861
862 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
863 {
864 int opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
865 const CGEN_OPERAND *operand = cgen_operand_lookup_by_num (cd, opindex);
866 const char *errmsg;
867 bfd_reloc_code_real_type reloc_type;
868 const CGEN_INSN *insn = fixP->fx_cgen.insn;
869 #ifdef OBJ_COMPLEX_RELC
870 int start;
871 int length;
872 int signed_p = 0;
873
874 if (fixP->fx_cgen.field)
875 {
876 /* Use the twisty little pointer path
877 back to the ifield if it exists. */
878 start = fixP->fx_cgen.field->val.leaf->start;
879 length = fixP->fx_cgen.field->val.leaf->length;
880 }
881 else
882 {
883 /* Or the far less useful operand-size guesstimate. */
884 start = operand->start;
885 length = operand->length;
886 }
887
888 /* FIXME: this is not a perfect heuristic for figuring out
889 whether an operand is signed: it only works when the operand
890 is an immediate. it's not terribly likely that any other
891 values will be signed relocs, but it's possible. */
892 if (operand && (operand->hw_type == HW_H_SINT))
893 signed_p = 1;
894 #endif
895
896 /* If the reloc has been fully resolved finish the operand here. */
897 /* FIXME: This duplicates the capabilities of code in BFD. */
898 if (fixP->fx_done
899 /* FIXME: If partial_inplace isn't set bfd_install_relocation won't
900 finish the job. Testing for pcrel is a temporary hack. */
901 || fixP->fx_pcrel)
902 {
903 CGEN_FIELDS *fields = xmalloc (CGEN_CPU_SIZEOF_FIELDS (cd));
904
905 CGEN_CPU_SET_FIELDS_BITSIZE (cd) (fields, CGEN_INSN_BITSIZE (insn));
906 CGEN_CPU_SET_VMA_OPERAND (cd) (cd, opindex, fields, (bfd_vma) value);
907
908 #if CGEN_INT_INSN_P
909 {
910 CGEN_INSN_INT insn_value =
911 cgen_get_insn_value (cd, (unsigned char *) where,
912 CGEN_INSN_BITSIZE (insn),
913 cd->insn_endian);
914
915 /* ??? 0 is passed for `pc'. */
916 errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields,
917 &insn_value, (bfd_vma) 0);
918 cgen_put_insn_value (cd, (unsigned char *) where,
919 CGEN_INSN_BITSIZE (insn), insn_value,
920 cd->insn_endian);
921 }
922 #else
923 /* ??? 0 is passed for `pc'. */
924 errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields,
925 (unsigned char *) where,
926 (bfd_vma) 0);
927 #endif
928 if (errmsg)
929 as_bad_where (fixP->fx_file, fixP->fx_line, "%s", errmsg);
930
931 free (fields);
932 }
933
934 if (fixP->fx_done)
935 return;
936
937 /* The operand isn't fully resolved. Determine a BFD reloc value
938 based on the operand information and leave it to
939 bfd_install_relocation. Note that this doesn't work when
940 partial_inplace == false. */
941
942 reloc_type = md_cgen_lookup_reloc (insn, operand, fixP);
943 #ifdef OBJ_COMPLEX_RELC
944 if (reloc_type == BFD_RELOC_RELC)
945 {
946 /* Change addend to "self-describing" form,
947 for BFD to handle in the linker. */
948 value = gas_cgen_encode_addend (start, operand->length,
949 length, fixP->fx_size,
950 cd->insn_chunk_bitsize / 8,
951 signed_p,
952 ! (fixP->fx_cgen.msb_field_p));
953 }
954 #endif
955
956 if (reloc_type != BFD_RELOC_NONE)
957 fixP->fx_r_type = reloc_type;
958 else
959 {
960 as_bad_where (fixP->fx_file, fixP->fx_line,
961 _("unresolved expression that must be resolved"));
962 fixP->fx_done = 1;
963 return;
964 }
965 }
966 else if (fixP->fx_done)
967 {
968 /* We're finished with this fixup. Install it because
969 bfd_install_relocation won't be called to do it. */
970 switch (fixP->fx_r_type)
971 {
972 case BFD_RELOC_8:
973 md_number_to_chars (where, value, 1);
974 break;
975 case BFD_RELOC_16:
976 md_number_to_chars (where, value, 2);
977 break;
978 case BFD_RELOC_32:
979 md_number_to_chars (where, value, 4);
980 break;
981 case BFD_RELOC_64:
982 md_number_to_chars (where, value, 8);
983 break;
984 default:
985 as_bad_where (fixP->fx_file, fixP->fx_line,
986 _("internal error: can't install fix for reloc type %d (`%s')"),
987 fixP->fx_r_type, bfd_get_reloc_code_name (fixP->fx_r_type));
988 break;
989 }
990 }
991 /* else
992 bfd_install_relocation will be called to finish things up. */
993
994 /* Tuck `value' away for use by tc_gen_reloc.
995 See the comment describing fx_addnumber in write.h.
996 This field is misnamed (or misused :-). */
997 fixP->fx_addnumber = value;
998 }
999
1000 bfd_reloc_code_real_type
1001 gas_cgen_pcrel_r_type (bfd_reloc_code_real_type r)
1002 {
1003 switch (r)
1004 {
1005 case BFD_RELOC_8: r = BFD_RELOC_8_PCREL; break;
1006 case BFD_RELOC_16: r = BFD_RELOC_16_PCREL; break;
1007 case BFD_RELOC_24: r = BFD_RELOC_24_PCREL; break;
1008 case BFD_RELOC_32: r = BFD_RELOC_32_PCREL; break;
1009 case BFD_RELOC_64: r = BFD_RELOC_64_PCREL; break;
1010 default:
1011 break;
1012 }
1013 return r;
1014 }
1015
1016 /* Translate internal representation of relocation info to BFD target format.
1017
1018 FIXME: To what extent can we get all relevant targets to use this? */
1019
1020 arelent *
1021 gas_cgen_tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixP)
1022 {
1023 bfd_reloc_code_real_type r_type = fixP->fx_r_type;
1024 arelent *reloc;
1025
1026 reloc = XNEW (arelent);
1027
1028 #ifdef GAS_CGEN_PCREL_R_TYPE
1029 if (fixP->fx_pcrel)
1030 r_type = GAS_CGEN_PCREL_R_TYPE (r_type);
1031 #endif
1032 reloc->howto = bfd_reloc_type_lookup (stdoutput, r_type);
1033
1034 if (reloc->howto == (reloc_howto_type *) NULL)
1035 {
1036 as_bad_where (fixP->fx_file, fixP->fx_line,
1037 _("relocation is not supported"));
1038 return NULL;
1039 }
1040
1041 gas_assert (!fixP->fx_pcrel == !reloc->howto->pc_relative);
1042
1043 reloc->sym_ptr_ptr = XNEW (asymbol *);
1044 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy);
1045
1046 /* Use fx_offset for these cases. */
1047 if (fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY
1048 || fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT)
1049 reloc->addend = fixP->fx_offset;
1050 else
1051 reloc->addend = fixP->fx_addnumber;
1052
1053 reloc->address = fixP->fx_frag->fr_address + fixP->fx_where;
1054 return reloc;
1055 }
1056
1057 /* Perform any cgen specific initialisation.
1058 Called after gas_cgen_cpu_desc has been created. */
1059
1060 void
1061 gas_cgen_begin (void)
1062 {
1063 if (flag_signed_overflow_ok)
1064 cgen_set_signed_overflow_ok (gas_cgen_cpu_desc);
1065 else
1066 cgen_clear_signed_overflow_ok (gas_cgen_cpu_desc);
1067 }