1 /* tc-fr30.c -- Assembler for the Fujitsu FR30.
2 Copyright (C) 1998 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /*!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
23 This file is work in progress and was copied from m32r/tc-m32r.c in
24 order to all gas/configure to run with the target fr30-unknown-elf.
25 Other than changing all occurances for m32r to fr30, this file has not
26 been customized for fr30 in any way.
27 !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!*/
37 /* Linked list of symbols that are debugging symbols to be defined as the
38 beginning of the current instruction. */
39 typedef struct sym_link
41 struct sym_link
*next
;
45 static sym_linkS
*debug_sym_link
= (sym_linkS
*)0;
47 /* Structure to hold all of the different components describing
48 an individual instruction. */
51 const CGEN_INSN
* insn
;
52 const CGEN_INSN
* orig_insn
;
55 CGEN_INSN_INT buffer
[1];
56 #define INSN_VALUE(buf) (*(buf))
58 unsigned char buffer
[CGEN_MAX_INSN_SIZE
];
59 #define INSN_VALUE(buf) (buf)
64 fixS
* fixups
[GAS_CGEN_MAX_FIXUPS
];
65 int indices
[MAX_OPERAND_INSTANCES
];
66 sym_linkS
*debug_sym_link
;
70 /* prev_insn.insn is non-null if last insn was a 16 bit insn on a 32 bit
71 boundary (i.e. was the first of two 16 bit insns). */
72 static fr30_insn prev_insn
;
74 /* Non-zero if we've seen a relaxable insn since the last 32 bit
76 static int seen_relaxable_p
= 0;
78 /* Non-zero if -relax specified, in which case sufficient relocs are output
79 for the linker to do relaxing.
80 We do simple forms of relaxing internally, but they are always done.
81 This flag does not apply to them. */
82 static int fr30_relax
;
84 #if 0 /* not supported yet */
85 /* If non-NULL, pointer to cpu description file to read.
86 This allows runtime additions to the assembler. */
87 static const char * fr30_cpu_desc
;
90 /* Non-zero if warn when a high/shigh reloc has no matching low reloc.
91 Each high/shigh reloc must be paired with it's low cousin in order to
92 properly calculate the addend in a relocatable link (since there is a
93 potential carry from the low to the high/shigh).
94 This option is off by default though for user-written assembler code it
95 might make sense to make the default be on (i.e. have gcc pass a flag
96 to turn it off). This warning must not be on for GCC created code as
97 optimization may delete the low but not the high/shigh (at least we
98 shouldn't assume or require it to). */
99 static int warn_unmatched_high
= 0;
101 /* stuff for .scomm symbols. */
102 static segT sbss_section
;
103 static asection scom_section
;
104 static asymbol scom_symbol
;
106 const char comment_chars
[] = ";";
107 const char line_comment_chars
[] = "#";
108 const char line_separator_chars
[] = "";
109 const char EXP_CHARS
[] = "eE";
110 const char FLT_CHARS
[] = "dD";
112 /* Relocations against symbols are done in two
113 parts, with a HI relocation and a LO relocation. Each relocation
114 has only 16 bits of space to store an addend. This means that in
115 order for the linker to handle carries correctly, it must be able
116 to locate both the HI and the LO relocation. This means that the
117 relocations must appear in order in the relocation table.
119 In order to implement this, we keep track of each unmatched HI
120 relocation. We then sort them so that they immediately precede the
121 corresponding LO relocation. */
125 struct fr30_hi_fixup
* next
; /* Next HI fixup. */
126 fixS
* fixp
; /* This fixup. */
127 segT seg
; /* The section this fixup is in. */
131 /* The list of unmatched HI relocs. */
133 static struct fr30_hi_fixup
* fr30_hi_fixup_list
;
136 #define FR30_SHORTOPTS ""
137 const char * md_shortopts
= FR30_SHORTOPTS
;
139 struct option md_longopts
[] =
141 /* Sigh. I guess all warnings must now have both variants. */
142 #define OPTION_WARN_UNMATCHED (OPTION_MD_BASE + 4)
143 {"warn-unmatched-high", OPTION_WARN_UNMATCHED
},
144 {"Wuh", OPTION_WARN_UNMATCHED
},
145 #define OPTION_NO_WARN_UNMATCHED (OPTION_MD_BASE + 5)
146 {"no-warn-unmatched-high", OPTION_WARN_UNMATCHED
},
147 {"Wnuh", OPTION_WARN_UNMATCHED
},
149 #if 0 /* not supported yet */
150 #define OPTION_RELAX (OPTION_MD_BASE + 6)
151 {"relax", no_argument
, NULL
, OPTION_RELAX
},
152 #define OPTION_CPU_DESC (OPTION_MD_BASE + 7)
153 {"cpu-desc", required_argument
, NULL
, OPTION_CPU_DESC
},
156 {NULL
, no_argument
, NULL
, 0}
158 size_t md_longopts_size
= sizeof (md_longopts
);
161 md_parse_option (c
, arg
)
167 case OPTION_WARN_UNMATCHED
:
168 warn_unmatched_high
= 1;
171 case OPTION_NO_WARN_UNMATCHED
:
172 warn_unmatched_high
= 0;
175 #if 0 /* not supported yet */
179 case OPTION_CPU_DESC
:
191 md_show_usage (stream
)
194 fprintf (stream
, _(" FR30 specific command line options:\n"));
196 fprintf (stream
, _("\
197 -warn-unmatched-high warn when an (s)high reloc has no matching low reloc\n"));
198 fprintf (stream
, _("\
199 -no-warn-unmatched-high do not warn about missing low relocs\n"));
200 fprintf (stream
, _("\
201 -Wuh synonym for -warn-unmatched-high\n"));
202 fprintf (stream
, _("\
203 -Wnuh synonym for -no-warn-unmatched-high\n"));
206 fprintf (stream
, _("\
207 -relax create linker relaxable code\n"));
208 fprintf (stream
, _("\
209 -cpu-desc provide runtime cpu description file\n"));
213 static void fill_insn
PARAMS ((int));
214 static void fr30_scomm
PARAMS ((int));
215 static void debug_sym
PARAMS ((int));
216 static void expand_debug_syms
PARAMS ((sym_linkS
*, int));
218 /* Set by md_assemble for use by fr30_fill_insn. */
219 static subsegT prev_subseg
;
220 static segT prev_seg
;
222 /* The target specific pseudo-ops which we support. */
223 const pseudo_typeS md_pseudo_table
[] =
226 { "fillinsn", fill_insn
, 0 },
227 { "scomm", fr30_scomm
, 0 },
228 { "debugsym", debug_sym
, 0 },
232 /* FIXME: Should be machine generated. */
233 #define NOP_INSN 0x7000
234 #define PAR_NOP_INSN 0xf000 /* can only be used in 2nd slot */
236 /* When we align the .text section, insert the correct NOP pattern.
237 N is the power of 2 alignment. LEN is the length of pattern FILL.
238 MAX is the maximum number of characters to skip when doing the alignment,
239 or 0 if there is no maximum. */
242 fr30_do_align (n
, fill
, len
, max
)
248 /* Only do this if the fill pattern wasn't specified. */
250 && (now_seg
->flags
& SEC_CODE
) != 0
251 /* Only do this special handling if aligning to at least a
254 /* Only do this special handling if we're allowed to emit at
256 && (max
== 0 || max
> 1))
258 static const unsigned char nop_pattern
[] = { 0xf0, 0x00 };
261 /* First align to a 2 byte boundary, in case there is an odd .byte. */
262 /* FIXME: How much memory will cause gas to use when assembling a big
263 program? Perhaps we can avoid the frag_align call? */
264 frag_align (1, 0, 0);
266 /* Next align to a 4 byte boundary (we know n >= 2) using a parallel
268 frag_align_pattern (2, nop_pattern
, sizeof nop_pattern
, 0);
269 /* If doing larger alignments use a repeating sequence of appropriate
273 static const unsigned char multi_nop_pattern
[] =
274 { 0x70, 0x00, 0xf0, 0x00 };
275 frag_align_pattern (n
, multi_nop_pattern
, sizeof multi_nop_pattern
,
279 prev_insn
.insn
= NULL
;
286 /* If the last instruction was the first of 2 16 bit insns,
287 output a nop to move the PC to a 32 bit boundary.
289 This is done via an alignment specification since branch relaxing
290 may make it unnecessary.
292 Internally, we need to output one of these each time a 32 bit insn is
293 seen after an insn that is relaxable. */
299 (void) fr30_do_align (2, NULL
, 0, 0);
300 prev_insn
.insn
= NULL
;
301 seen_relaxable_p
= 0;
304 /* Record the symbol so that when we output the insn, we can create
305 a symbol that is at the start of the instruction. This is used
306 to emit the label for the start of a breakpoint without causing
307 the assembler to emit a NOP if the previous instruction was a
308 16 bit instruction. */
316 register char *end_name
;
317 register symbolS
*symbolP
;
318 register sym_linkS
*link
;
320 name
= input_line_pointer
;
321 delim
= get_symbol_end ();
322 end_name
= input_line_pointer
;
324 if ((symbolP
= symbol_find (name
)) == NULL
325 && (symbolP
= md_undefined_symbol (name
)) == NULL
)
327 symbolP
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
330 symbol_table_insert (symbolP
);
331 if (S_IS_DEFINED (symbolP
) && S_GET_SEGMENT (symbolP
) != reg_section
)
332 /* xgettext:c-format */
333 as_bad (_("symbol `%s' already defined"), S_GET_NAME (symbolP
));
337 link
= (sym_linkS
*) xmalloc (sizeof (sym_linkS
));
338 link
->symbol
= symbolP
;
339 link
->next
= debug_sym_link
;
340 debug_sym_link
= link
;
345 demand_empty_rest_of_line ();
348 /* Second pass to expanding the debug symbols, go through linked
349 list of symbols and reassign the address. */
352 expand_debug_syms (syms
, align
)
356 char *save_input_line
= input_line_pointer
;
357 sym_linkS
*next_syms
;
362 (void) fr30_do_align (align
, NULL
, 0, 0);
363 for (; syms
!= (sym_linkS
*)0; syms
= next_syms
)
365 symbolS
*symbolP
= syms
->symbol
;
366 next_syms
= syms
->next
;
367 input_line_pointer
= ".\n";
368 pseudo_set (symbolP
);
372 input_line_pointer
= save_input_line
;
375 /* Cover function to fill_insn called after a label and at end of assembly.
376 The result is always 1: we're called in a conditional to see if the
377 current line is a label. */
380 fr30_fill_insn (done
)
383 if (prev_seg
!= NULL
)
386 subsegT subseg
= now_subseg
;
388 subseg_set (prev_seg
, prev_subseg
);
392 subseg_set (seg
, subseg
);
395 if (done
&& debug_sym_link
)
397 expand_debug_syms (debug_sym_link
, 1);
398 debug_sym_link
= (sym_linkS
*)0;
411 /* Initialize the `cgen' interface. */
413 /* Set the machine number and endian. */
414 gas_cgen_opcode_desc
= fr30_cgen_opcode_open (0 /* mach number */,
417 : CGEN_ENDIAN_LITTLE
);
418 fr30_cgen_init_asm (gas_cgen_opcode_desc
);
420 /* This is a callback from cgen to gas to parse operands. */
421 cgen_set_parse_operand_fn (gas_cgen_opcode_desc
, gas_cgen_parse_operand
);
423 #if 0 /* not supported yet */
424 /* If a runtime cpu description file was provided, parse it. */
425 if (fr30_cpu_desc
!= NULL
)
429 errmsg
= cgen_read_cpu_file (gas_cgen_opcode_desc
, fr30_cpu_desc
);
431 as_bad ("%s: %s", fr30_cpu_desc
, errmsg
);
435 /* Save the current subseg so we can restore it [it's the default one and
436 we don't want the initial section to be .sbss]. */
440 /* The sbss section is for local .scomm symbols. */
441 sbss_section
= subseg_new (".sbss", 0);
443 /* This is copied from perform_an_assembly_pass. */
444 applicable
= bfd_applicable_section_flags (stdoutput
);
445 bfd_set_section_flags (stdoutput
, sbss_section
, applicable
& SEC_ALLOC
);
447 #if 0 /* What does this do? [see perform_an_assembly_pass] */
448 seg_info (bss_section
)->bss
= 1;
451 subseg_set (seg
, subseg
);
453 /* We must construct a fake section similar to bfd_com_section
454 but with the name .scommon. */
455 scom_section
= bfd_com_section
;
456 scom_section
.name
= ".scommon";
457 scom_section
.output_section
= & scom_section
;
458 scom_section
.symbol
= & scom_symbol
;
459 scom_section
.symbol_ptr_ptr
= & scom_section
.symbol
;
460 scom_symbol
= * bfd_com_section
.symbol
;
461 scom_symbol
.name
= ".scommon";
462 scom_symbol
.section
= & scom_section
;
474 /* Initialize GAS's cgen interface for a new instruction. */
475 gas_cgen_init_parse ();
477 insn
.debug_sym_link
= debug_sym_link
;
478 debug_sym_link
= (sym_linkS
*)0;
480 insn
.insn
= fr30_cgen_assemble_insn
481 (gas_cgen_opcode_desc
, str
, & insn
.fields
, insn
.buffer
, & errmsg
);
489 if (CGEN_INSN_BITSIZE (insn
.insn
) == 32)
491 /* 32 bit insns must live on 32 bit boundaries. */
492 if (prev_insn
.insn
|| seen_relaxable_p
)
494 /* ??? If calling fill_insn too many times turns us into a memory
495 pig, can we call a fn to assemble a nop instead of
496 !seen_relaxable_p? */
500 expand_debug_syms (insn
.debug_sym_link
, 2);
502 /* Doesn't really matter what we pass for RELAX_P here. */
503 gas_cgen_finish_insn (insn
.insn
, insn
.buffer
,
504 CGEN_FIELDS_BITSIZE (& insn
.fields
), 1, NULL
);
508 int on_32bit_boundary_p
;
510 if (CGEN_INSN_BITSIZE (insn
.insn
) != 16)
513 insn
.orig_insn
= insn
.insn
;
515 /* Compute whether we're on a 32 bit boundary or not.
516 prev_insn.insn is NULL when we're on a 32 bit boundary. */
517 on_32bit_boundary_p
= prev_insn
.insn
== NULL
;
519 expand_debug_syms (insn
.debug_sym_link
, 1);
525 /* Ensure each pair of 16 bit insns is in the same frag. */
528 gas_cgen_finish_insn (insn
.orig_insn
, insn
.buffer
,
529 CGEN_FIELDS_BITSIZE (& insn
.fields
),
533 insn
.num_fixups
= fi
.num_fixups
;
534 for (i
= 0; i
< fi
.num_fixups
; ++i
)
535 insn
.fixups
[i
] = fi
.fixups
[i
];
538 /* Keep track of whether we've seen a pair of 16 bit insns.
539 prev_insn.insn is NULL when we're on a 32 bit boundary. */
540 if (on_32bit_boundary_p
)
543 prev_insn
.insn
= NULL
;
545 /* If the insn needs the following one to be on a 32 bit boundary
546 (e.g. subroutine calls), fill this insn's slot. */
547 if (on_32bit_boundary_p
548 && CGEN_INSN_ATTR (insn
.orig_insn
, CGEN_INSN_FILL_SLOT
) != 0)
551 /* If this is a relaxable insn (can be replaced with a larger version)
552 mark the fact so that we can emit an alignment directive for a
553 following 32 bit insn if we see one. */
554 if (CGEN_INSN_ATTR (insn
.orig_insn
, CGEN_INSN_RELAXABLE
) != 0)
555 seen_relaxable_p
= 1;
558 /* Set these so fr30_fill_insn can use them. */
560 prev_subseg
= now_subseg
;
564 /* The syntax in the manual says constants begin with '#'.
565 We just ignore it. */
568 md_operand (expressionP
)
569 expressionS
* expressionP
;
571 if (* input_line_pointer
== '#')
573 input_line_pointer
++;
574 expression (expressionP
);
579 md_section_align (segment
, size
)
583 int align
= bfd_get_section_alignment (stdoutput
, segment
);
584 return ((size
+ (1 << align
) - 1) & (-1 << align
));
588 md_undefined_symbol (name
)
594 /* .scomm pseudo-op handler.
596 This is a new pseudo-op to handle putting objects in .scommon.
597 By doing this the linker won't need to do any work and more importantly
598 it removes the implicit -G arg necessary to correctly link the object file.
605 register char * name
;
609 register symbolS
* symbolP
;
613 name
= input_line_pointer
;
614 c
= get_symbol_end ();
616 /* just after name is now '\0' */
617 p
= input_line_pointer
;
620 if (* input_line_pointer
!= ',')
622 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
623 ignore_rest_of_line ();
627 input_line_pointer
++; /* skip ',' */
628 if ((size
= get_absolute_expression ()) < 0)
630 /* xgettext:c-format */
631 as_warn (_(".SCOMMon length (%ld.) <0! Ignored."), (long) size
);
632 ignore_rest_of_line ();
636 /* The third argument to .scomm is the alignment. */
637 if (* input_line_pointer
!= ',')
641 ++ input_line_pointer
;
642 align
= get_absolute_expression ();
645 as_warn (_("ignoring bad alignment"));
649 /* Convert to a power of 2 alignment. */
652 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++ align2
)
656 as_bad (_("Common alignment not a power of 2"));
657 ignore_rest_of_line ();
665 symbolP
= symbol_find_or_make (name
);
668 if (S_IS_DEFINED (symbolP
))
670 /* xgettext:c-format */
671 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
672 S_GET_NAME (symbolP
));
673 ignore_rest_of_line ();
677 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
679 /* xgettext:c-format */
680 as_bad (_("Length of .scomm \"%s\" is already %ld. Not changed to %ld."),
681 S_GET_NAME (symbolP
),
682 (long) S_GET_VALUE (symbolP
),
685 ignore_rest_of_line ();
691 segT old_sec
= now_seg
;
692 int old_subsec
= now_subseg
;
695 record_alignment (sbss_section
, align2
);
696 subseg_set (sbss_section
, 0);
699 frag_align (align2
, 0, 0);
701 if (S_GET_SEGMENT (symbolP
) == sbss_section
)
702 symbolP
->sy_frag
->fr_symbol
= 0;
704 symbolP
->sy_frag
= frag_now
;
706 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
709 S_SET_SIZE (symbolP
, size
);
710 S_SET_SEGMENT (symbolP
, sbss_section
);
711 S_CLEAR_EXTERNAL (symbolP
);
712 subseg_set (old_sec
, old_subsec
);
716 S_SET_VALUE (symbolP
, (valueT
) size
);
717 S_SET_ALIGN (symbolP
, align2
);
718 S_SET_EXTERNAL (symbolP
);
719 S_SET_SEGMENT (symbolP
, & scom_section
);
722 demand_empty_rest_of_line ();
725 /* Interface to relax_segment. */
727 /* FIXME: Build table by hand, get it working, then machine generate. */
729 const relax_typeS md_relax_table
[] =
732 1) most positive reach of this state,
733 2) most negative reach of this state,
734 3) how many bytes this mode will add to the size of the current frag
735 4) which index into the table to try if we can't fit into this one. */
737 /* The first entry must be unused because an `rlx_more' value of zero ends
741 /* The displacement used by GAS is from the end of the 2 byte insn,
742 so we subtract 2 from the following. */
743 /* 16 bit insn, 8 bit disp -> 10 bit range.
744 This doesn't handle a branch in the right slot at the border:
745 the "& -4" isn't taken into account. It's not important enough to
746 complicate things over it, so we subtract an extra 2 (or + 2 in -ve
748 {511 - 2 - 2, -512 - 2 + 2, 0, 2 },
749 /* 32 bit insn, 24 bit disp -> 26 bit range. */
750 {0x2000000 - 1 - 2, -0x2000000 - 2, 2, 0 },
751 /* Same thing, but with leading nop for alignment. */
752 {0x2000000 - 1 - 2, -0x2000000 - 2, 4, 0 }
756 fr30_relax_frag (fragP
, stretch
)
760 /* Address of branch insn. */
761 long address
= fragP
->fr_address
+ fragP
->fr_fix
- 2;
764 /* Keep 32 bit insns aligned on 32 bit boundaries. */
765 if (fragP
->fr_subtype
== 2)
767 if ((address
& 3) != 0)
769 fragP
->fr_subtype
= 3;
773 else if (fragP
->fr_subtype
== 3)
775 if ((address
& 3) == 0)
777 fragP
->fr_subtype
= 2;
783 growth
= relax_frag (fragP
, stretch
);
785 /* Long jump on odd halfword boundary? */
786 if (fragP
->fr_subtype
== 2 && (address
& 3) != 0)
788 fragP
->fr_subtype
= 3;
796 /* Return an initial guess of the length by which a fragment must grow to
797 hold a branch to reach its destination.
798 Also updates fr_type/fr_subtype as necessary.
800 Called just before doing relaxation.
801 Any symbol that is now undefined will not become defined.
802 The guess for fr_var is ACTUALLY the growth beyond fr_fix.
803 Whatever we do to grow fr_fix or fr_var contributes to our returned value.
804 Although it may not be explicit in the frag, pretend fr_var starts with a
808 md_estimate_size_before_relax (fragP
, segment
)
812 int old_fr_fix
= fragP
->fr_fix
;
814 /* The only thing we have to handle here are symbols outside of the
815 current segment. They may be undefined or in a different segment in
816 which case linker scripts may place them anywhere.
817 However, we can't finish the fragment here and emit the reloc as insn
818 alignment requirements may move the insn about. */
820 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
822 /* The symbol is undefined in this segment.
823 Change the relaxation subtype to the max allowable and leave
824 all further handling to md_convert_frag. */
825 fragP
->fr_subtype
= 2;
827 #if 0 /* Can't use this, but leave in for illustration. */
828 /* Change 16 bit insn to 32 bit insn. */
829 fragP
->fr_opcode
[0] |= 0x80;
831 /* Increase known (fixed) size of fragment. */
834 /* Create a relocation for it. */
835 fix_new (fragP
, old_fr_fix
, 4,
837 fragP
->fr_offset
, 1 /* pcrel */,
838 /* FIXME: Can't use a real BFD reloc here.
839 gas_cgen_md_apply_fix3 can't handle it. */
840 BFD_RELOC_FR30_26_PCREL
);
842 /* Mark this fragment as finished. */
846 const CGEN_INSN
* insn
;
849 /* Update the recorded insn.
850 Fortunately we don't have to look very far.
851 FIXME: Change this to record in the instruction the next higher
852 relaxable insn to use. */
853 for (i
= 0, insn
= fragP
->fr_cgen
.insn
; i
< 4; i
++, insn
++)
855 if ((strcmp (CGEN_INSN_MNEMONIC (insn
),
856 CGEN_INSN_MNEMONIC (fragP
->fr_cgen
.insn
))
858 && CGEN_INSN_ATTR (insn
, CGEN_INSN_RELAX
))
864 fragP
->fr_cgen
.insn
= insn
;
870 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
873 /* *fragP has been relaxed to its final size, and now needs to have
874 the bytes inside it modified to conform to the new size.
876 Called after relaxation is finished.
877 fragP->fr_type == rs_machine_dependent.
878 fragP->fr_subtype is the subtype of what the address relaxed to. */
881 md_convert_frag (abfd
, sec
, fragP
)
894 opcode
= fragP
->fr_opcode
;
896 /* Address opcode resides at in file space. */
897 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
- 2;
899 switch (fragP
->fr_subtype
)
903 displacement
= & opcode
[1];
908 displacement
= & opcode
[1];
911 opcode
[2] = opcode
[0] | 0x80;
912 md_number_to_chars (opcode
, PAR_NOP_INSN
, 2);
915 displacement
= & opcode
[3];
921 if (S_GET_SEGMENT (fragP
->fr_symbol
) != sec
)
923 /* symbol must be resolved by linker */
924 if (fragP
->fr_offset
& 3)
925 as_warn (_("Addend to unresolved symbol not on word boundary."));
926 addend
= fragP
->fr_offset
>> 2;
930 /* Address we want to reach in file space. */
931 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
932 target_address
+= fragP
->fr_symbol
->sy_frag
->fr_address
;
933 addend
= (target_address
- (opcode_address
& -4)) >> 2;
936 /* Create a relocation for symbols that must be resolved by the linker.
937 Otherwise output the completed insn. */
939 if (S_GET_SEGMENT (fragP
->fr_symbol
) != sec
)
941 assert (fragP
->fr_subtype
!= 1);
942 assert (fragP
->fr_cgen
.insn
!= 0);
943 gas_cgen_record_fixup (fragP
,
944 /* Offset of branch insn in frag. */
945 fragP
->fr_fix
+ extension
- 4,
948 /* FIXME: quick hack */
950 CGEN_OPERAND_ENTRY (fragP
->fr_cgen
.opindex
),
952 CGEN_OPERAND_ENTRY (FR30_OPERAND_DISP24
),
954 fragP
->fr_cgen
.opinfo
,
955 fragP
->fr_symbol
, fragP
->fr_offset
);
958 #define SIZE_FROM_RELAX_STATE(n) ((n) == 1 ? 1 : 3)
960 md_number_to_chars (displacement
, (valueT
) addend
,
961 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
963 fragP
->fr_fix
+= extension
;
967 /* Functions concerning relocs. */
969 /* The location from which a PC relative jump should be calculated,
970 given a PC relative reloc. */
973 md_pcrel_from_section (fixP
, sec
)
977 if (fixP
->fx_addsy
!= (symbolS
*) NULL
978 && (! S_IS_DEFINED (fixP
->fx_addsy
)
979 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
981 /* The symbol is undefined (or is defined but not in this section).
982 Let the linker figure it out. */
986 return (fixP
->fx_frag
->fr_address
+ fixP
->fx_where
) & -4L;
989 /* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
990 Returns BFD_RELOC_NONE if no reloc type can be found.
991 *FIXP may be modified if desired. */
993 bfd_reloc_code_real_type
994 md_cgen_lookup_reloc (insn
, operand
, fixP
)
995 const CGEN_INSN
* insn
;
996 const CGEN_OPERAND
* operand
;
1000 switch (CGEN_OPERAND_TYPE (operand
))
1002 case FR30_OPERAND_DISP8
: return BFD_RELOC_FR30_10_PCREL
;
1003 case FR30_OPERAND_DISP16
: return BFD_RELOC_FR30_18_PCREL
;
1004 case FR30_OPERAND_DISP24
: return BFD_RELOC_FR30_26_PCREL
;
1005 case FR30_OPERAND_UIMM24
: return BFD_RELOC_FR30_24
;
1006 case FR30_OPERAND_HI16
:
1007 case FR30_OPERAND_SLO16
:
1008 case FR30_OPERAND_ULO16
:
1009 /* If low/high/shigh/sda was used, it is recorded in `opinfo'. */
1010 if (fixP
->tc_fix_data
.opinfo
!= 0)
1011 return fixP
->tc_fix_data
.opinfo
;
1013 default : /* avoid -Wall warning */
1017 return BFD_RELOC_NONE
;
1020 /* Record a HI16 reloc for later matching with its LO16 cousin. */
1023 fr30_record_hi16 (reloc_type
, fixP
, seg
)
1028 struct fr30_hi_fixup
* hi_fixup
;
1030 assert (reloc_type
== BFD_RELOC_FR30_HI16_SLO
1031 || reloc_type
== BFD_RELOC_FR30_HI16_ULO
);
1033 hi_fixup
= ((struct fr30_hi_fixup
*)
1034 xmalloc (sizeof (struct fr30_hi_fixup
)));
1035 hi_fixup
->fixp
= fixP
;
1036 hi_fixup
->seg
= now_seg
;
1037 hi_fixup
->next
= fr30_hi_fixup_list
;
1039 fr30_hi_fixup_list
= hi_fixup
;
1042 /* Called while parsing an instruction to create a fixup.
1043 We need to check for HI16 relocs and queue them up for later sorting. */
1046 fr30_cgen_record_fixup_exp (frag
, where
, insn
, length
, operand
, opinfo
, exp
)
1049 const CGEN_INSN
* insn
;
1051 const CGEN_OPERAND
* operand
;
1056 fixS
* fixP
= gas_cgen_record_fixup_exp (frag
, where
, insn
, length
,
1057 operand
, opinfo
, exp
);
1059 switch (CGEN_OPERAND_TYPE (operand
))
1061 case FR30_OPERAND_HI16
:
1062 /* If low/high/shigh/sda was used, it is recorded in `opinfo'. */
1063 if (fixP
->tc_fix_data
.opinfo
== BFD_RELOC_FR30_HI16_SLO
1064 || fixP
->tc_fix_data
.opinfo
== BFD_RELOC_FR30_HI16_ULO
)
1065 fr30_record_hi16 (fixP
->tc_fix_data
.opinfo
, fixP
, now_seg
);
1067 default : /* avoid -Wall warning */
1077 /* Return BFD reloc type from opinfo field in a fixS.
1078 It's tricky using fx_r_type in fr30_frob_file because the values
1079 are BFD_RELOC_UNUSED + operand number. */
1080 #define FX_OPINFO_R_TYPE(f) ((f)->tc_fix_data.opinfo)
1082 /* Sort any unmatched HI16 relocs so that they immediately precede
1083 the corresponding LO16 reloc. This is called before md_apply_fix and
1089 struct fr30_hi_fixup
* l
;
1091 for (l
= fr30_hi_fixup_list
; l
!= NULL
; l
= l
->next
)
1093 segment_info_type
* seginfo
;
1096 assert (FX_OPINFO_R_TYPE (l
->fixp
) == BFD_RELOC_FR30_HI16_SLO
1097 || FX_OPINFO_R_TYPE (l
->fixp
) == BFD_RELOC_FR30_HI16_ULO
);
1099 /* Check quickly whether the next fixup happens to be a matching low. */
1100 if (l
->fixp
->fx_next
!= NULL
1101 && FX_OPINFO_R_TYPE (l
->fixp
->fx_next
) == BFD_RELOC_FR30_LO16
1102 && l
->fixp
->fx_addsy
== l
->fixp
->fx_next
->fx_addsy
1103 && l
->fixp
->fx_offset
== l
->fixp
->fx_next
->fx_offset
)
1106 /* Look through the fixups for this segment for a matching `low'.
1107 When we find one, move the high/shigh just in front of it. We do
1108 this in two passes. In the first pass, we try to find a
1109 unique `low'. In the second pass, we permit multiple high's
1110 relocs for a single `low'. */
1111 seginfo
= seg_info (l
->seg
);
1112 for (pass
= 0; pass
< 2; pass
++)
1118 for (f
= seginfo
->fix_root
; f
!= NULL
; f
= f
->fx_next
)
1120 /* Check whether this is a `low' fixup which matches l->fixp. */
1121 if (FX_OPINFO_R_TYPE (f
) == BFD_RELOC_FR30_LO16
1122 && f
->fx_addsy
== l
->fixp
->fx_addsy
1123 && f
->fx_offset
== l
->fixp
->fx_offset
1126 || (FX_OPINFO_R_TYPE (prev
) != BFD_RELOC_FR30_HI16_SLO
1127 && FX_OPINFO_R_TYPE (prev
) != BFD_RELOC_FR30_HI16_ULO
)
1128 || prev
->fx_addsy
!= f
->fx_addsy
1129 || prev
->fx_offset
!= f
->fx_offset
))
1133 /* Move l->fixp before f. */
1134 for (pf
= &seginfo
->fix_root
;
1136 pf
= & (* pf
)->fx_next
)
1137 assert (* pf
!= NULL
);
1139 * pf
= l
->fixp
->fx_next
;
1141 l
->fixp
->fx_next
= f
;
1143 seginfo
->fix_root
= l
->fixp
;
1145 prev
->fx_next
= l
->fixp
;
1157 && warn_unmatched_high
)
1158 as_warn_where (l
->fixp
->fx_file
, l
->fixp
->fx_line
,
1159 _("Unmatched high/shigh reloc"));
1164 /* See whether we need to force a relocation into the output file.
1165 This is used to force out switch and PC relative relocations when
1169 fr30_force_relocation (fix
)
1172 if (fix
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
1173 || fix
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
1179 return (fix
->fx_pcrel
1183 /* Write a value out to the object file, using the appropriate endianness. */
1186 md_number_to_chars (buf
, val
, n
)
1191 if (target_big_endian
)
1192 number_to_chars_bigendian (buf
, val
, n
);
1194 number_to_chars_littleendian (buf
, val
, n
);
1197 /* Turn a string in input_line_pointer into a floating point constant of type
1198 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
1199 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
1202 /* Equal to MAX_PRECISION in atof-ieee.c */
1203 #define MAX_LITTLENUMS 6
1206 md_atof (type
, litP
, sizeP
)
1213 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
1215 char * atof_ieee ();
1233 /* FIXME: Some targets allow other format chars for bigger sizes here. */
1237 return _("Bad call to md_atof()");
1240 t
= atof_ieee (input_line_pointer
, type
, words
);
1242 input_line_pointer
= t
;
1243 * sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
1245 if (target_big_endian
)
1247 for (i
= 0; i
< prec
; i
++)
1249 md_number_to_chars (litP
, (valueT
) words
[i
],
1250 sizeof (LITTLENUM_TYPE
));
1251 litP
+= sizeof (LITTLENUM_TYPE
);
1256 for (i
= prec
- 1; i
>= 0; i
--)
1258 md_number_to_chars (litP
, (valueT
) words
[i
],
1259 sizeof (LITTLENUM_TYPE
));
1260 litP
+= sizeof (LITTLENUM_TYPE
);
1268 fr30_elf_section_change_hook ()
1270 /* If we have reached the end of a section and we have just emitted a
1271 16 bit insn, then emit a nop to make sure that the section ends on
1272 a 32 bit boundary. */
1274 if (prev_insn
.insn
|| seen_relaxable_p
)
1275 (void) fr30_fill_insn (0);
1279 fr30_fix_adjustable (fixP
)
1283 if (fixP
->fx_addsy
== NULL
)
1286 /* Prevent all adjustments to global symbols. */
1287 if (S_IS_EXTERN (fixP
->fx_addsy
))
1289 if (S_IS_WEAK (fixP
->fx_addsy
))
1292 /* We need the symbol name for the VTABLE entries */
1293 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
1294 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)