1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 1991, 1992, 1993 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 Intel 80386 machine specific gas.
22 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
23 Bugs & suggestions are completely welcome. This is free software.
24 Please help us make it better.
32 #include "opcode/i386.h"
34 /* 'md_assemble ()' gathers together information and puts it into a
39 /* TM holds the template for the insn were currently assembling. */
41 /* SUFFIX holds the opcode suffix (e.g. 'l' for 'movl') if given. */
43 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
45 /* OPERANDS gives the number of given operands. */
46 unsigned int operands
;
48 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
49 of given register, displacement, memory operands and immediate
51 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
53 /* TYPES [i] is the type (see above #defines) which tells us how to
54 search through DISPS [i] & IMMS [i] & REGS [i] for the required
56 unsigned int types
[MAX_OPERANDS
];
58 /* Displacements (if given) for each operand. */
59 expressionS
*disps
[MAX_OPERANDS
];
61 /* Immediate operands (if given) for each operand. */
62 expressionS
*imms
[MAX_OPERANDS
];
64 /* Register operands (if given) for each operand. */
65 reg_entry
*regs
[MAX_OPERANDS
];
67 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
68 the base index byte below. */
71 unsigned int log2_scale_factor
;
73 /* SEG gives the seg_entry of this insn. It is equal to zero unless
74 an explicit segment override is given. */
75 const seg_entry
*seg
; /* segment for memory operands (if given) */
77 /* PREFIX holds all the given prefix opcodes (usually null).
78 PREFIXES is the size of PREFIX. */
79 /* richfix: really unsigned? */
80 unsigned char prefix
[MAX_PREFIXES
];
81 unsigned int prefixes
;
83 /* RM and IB are the modrm byte and the base index byte where the
84 addressing modes of this insn are encoded. */
90 typedef struct _i386_insn i386_insn
;
92 /* This array holds the chars that always start a comment. If the
93 pre-processor is disabled, these aren't very useful */
94 #if defined (TE_I386AIX) || defined (OBJ_ELF)
95 const char comment_chars
[] = "#/";
97 const char comment_chars
[] = "#";
100 /* This array holds the chars that only start a comment at the beginning of
101 a line. If the line seems to have the form '# 123 filename'
102 .line and .file directives will appear in the pre-processed output */
103 /* Note that input_file.c hand checks for '#' at the beginning of the
104 first line of the input file. This is because the compiler outputs
105 #NO_APP at the beginning of its output. */
106 /* Also note that comments started like this one will always work if
107 '/' isn't otherwise defined. */
108 #if defined (TE_I386AIX) || defined (OBJ_ELF)
109 const char line_comment_chars
[];
111 const char line_comment_chars
[] = "/";
113 const char line_separator_chars
[] = "";
115 /* Chars that can be used to separate mant from exp in floating point nums */
116 const char EXP_CHARS
[] = "eE";
118 /* Chars that mean this number is a floating point constant */
121 const char FLT_CHARS
[] = "fFdDxX";
123 /* tables for lexical analysis */
124 static char opcode_chars
[256];
125 static char register_chars
[256];
126 static char operand_chars
[256];
127 static char space_chars
[256];
128 static char identifier_chars
[256];
129 static char digit_chars
[256];
132 #define is_opcode_char(x) (opcode_chars[(unsigned char) x])
133 #define is_operand_char(x) (operand_chars[(unsigned char) x])
134 #define is_register_char(x) (register_chars[(unsigned char) x])
135 #define is_space_char(x) (space_chars[(unsigned char) x])
136 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
137 #define is_digit_char(x) (digit_chars[(unsigned char) x])
139 /* put here all non-digit non-letter charcters that may occur in an operand */
140 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:";
142 static char *ordinal_names
[] = {"first", "second", "third"}; /* for printfs */
144 /* md_assemble() always leaves the strings it's passed unaltered. To
145 effect this we maintain a stack of saved characters that we've smashed
146 with '\0's (indicating end of strings for various sub-fields of the
147 assembler instruction). */
148 static char save_stack
[32];
149 static char *save_stack_p
; /* stack pointer */
150 #define END_STRING_AND_SAVE(s) *save_stack_p++ = *s; *s = '\0'
151 #define RESTORE_END_STRING(s) *s = *--save_stack_p
153 /* The instruction we're assembling. */
156 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
157 static expressionS disp_expressions
[2], im_expressions
[2];
159 /* pointers to ebp & esp entries in reg_hash hash table */
160 static reg_entry
*ebp
, *esp
;
162 static int this_operand
; /* current operand we are working on */
164 /* Interface to relax_segment.
165 There are 2 relax states for 386 jump insns: one for conditional &
166 one for unconditional jumps. This is because the these two types
167 of jumps add different sizes to frags when we're figuring out what
168 sort of jump to choose to reach a given label. */
171 #define COND_JUMP 1 /* conditional jump */
172 #define UNCOND_JUMP 2 /* unconditional jump */
177 #define UNKNOWN_SIZE 3
181 #define INLINE __inline__
187 #define ENCODE_RELAX_STATE(type,size) ((type<<2) | (size))
188 #define SIZE_FROM_RELAX_STATE(s) \
189 ( (((s) & 0x3) == BYTE ? 1 : (((s) & 0x3) == WORD ? 2 : 4)) )
191 const relax_typeS md_relax_table
[] =
194 1) most positive reach of this state,
195 2) most negative reach of this state,
196 3) how many bytes this mode will add to the size of the current frag
197 4) which index into the table to try if we can't fit into this one.
204 /* For now we don't use word displacement jumps; they may be
206 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, DWORD
)},
207 /* word conditionals add 3 bytes to frag:
208 2 opcode prefix; 1 displacement bytes */
209 {32767 + 2, -32768 + 2, 3, ENCODE_RELAX_STATE (COND_JUMP
, DWORD
)},
210 /* dword conditionals adds 4 bytes to frag:
211 1 opcode prefix; 3 displacement bytes */
215 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
)},
216 /* word jmp adds 2 bytes to frag:
217 1 opcode prefix; 1 displacement bytes */
218 {32767 + 2, -32768 + 2, 2, ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
)},
219 /* dword jmp adds 3 bytes to frag:
220 0 opcode prefix; 3 displacement bytes */
226 static char *output_invalid
PARAMS ((int c
));
227 static int i386_operand
PARAMS ((char *operand_string
));
228 static reg_entry
*parse_register
PARAMS ((char *reg_string
));
230 static void s_bss
PARAMS ((void));
233 static INLINE
unsigned long
234 mode_from_disp_size (t
)
237 return (t
& Disp8
) ? 1 : (t
& Disp32
) ? 2 : 0;
240 /* convert opcode suffix ('b' 'w' 'l' typically) into type specifier */
242 static INLINE
unsigned long
243 opcode_suffix_to_type (s
)
246 return (s
== BYTE_OPCODE_SUFFIX
247 ? Byte
: (s
== WORD_OPCODE_SUFFIX
249 } /* opcode_suffix_to_type() */
252 fits_in_signed_byte (num
)
255 return (num
>= -128) && (num
<= 127);
256 } /* fits_in_signed_byte() */
259 fits_in_unsigned_byte (num
)
262 return (num
& 0xff) == num
;
263 } /* fits_in_unsigned_byte() */
266 fits_in_unsigned_word (num
)
269 return (num
& 0xffff) == num
;
270 } /* fits_in_unsigned_word() */
273 fits_in_signed_word (num
)
276 return (-32768 <= num
) && (num
<= 32767);
277 } /* fits_in_signed_word() */
280 smallest_imm_type (num
)
284 ? (Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
)
285 : fits_in_signed_byte (num
)
286 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
287 : fits_in_unsigned_byte (num
)
288 ? (Imm8
| Imm16
| Imm32
)
289 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
292 } /* smallest_imm_type() */
294 /* Ignore certain directives generated by gcc. This probably should
299 while (*input_line_pointer
&& *input_line_pointer
!= '\n')
300 input_line_pointer
++;
303 const pseudo_typeS md_pseudo_table
[] =
309 {"align", s_align_bytes
, 0},
311 {"align", s_align_ptwo
, 0},
313 {"ffloat", float_cons
, 'f'},
314 {"dfloat", float_cons
, 'd'},
315 {"tfloat", float_cons
, 'x'},
317 {"noopt", s_ignore
, 0},
318 {"optim", s_ignore
, 0},
320 {"zero", s_space
, 0},
325 /* for interface with expression () */
326 extern char *input_line_pointer
;
328 /* obstack for constructing various things in md_begin */
331 /* hash table for opcode lookup */
332 static struct hash_control
*op_hash
= (struct hash_control
*) 0;
333 /* hash table for register lookup */
334 static struct hash_control
*reg_hash
= (struct hash_control
*) 0;
335 /* hash table for prefix lookup */
336 static struct hash_control
*prefix_hash
= (struct hash_control
*) 0;
344 obstack_begin (&o
, 4096);
346 /* initialize op_hash hash table */
347 op_hash
= hash_new (); /* xmalloc handles error */
350 register const template *optab
;
351 register templates
*core_optab
;
354 optab
= i386_optab
; /* setup for loop */
355 prev_name
= optab
->name
;
356 obstack_grow (&o
, optab
, sizeof (template));
357 core_optab
= (templates
*) xmalloc (sizeof (templates
));
359 for (optab
++; optab
< i386_optab_end
; optab
++)
361 if (!strcmp (optab
->name
, prev_name
))
363 /* same name as before --> append to current template list */
364 obstack_grow (&o
, optab
, sizeof (template));
368 /* different name --> ship out current template list;
369 add to hash table; & begin anew */
370 /* Note: end must be set before start! since obstack_next_free
371 changes upon opstack_finish */
372 core_optab
->end
= (template *) obstack_next_free (&o
);
373 core_optab
->start
= (template *) obstack_finish (&o
);
374 hash_err
= hash_insert (op_hash
, prev_name
, (char *) core_optab
);
375 if (hash_err
&& *hash_err
)
378 as_fatal ("Internal Error: Can't hash %s: %s", prev_name
,
381 prev_name
= optab
->name
;
382 core_optab
= (templates
*) xmalloc (sizeof (templates
));
383 obstack_grow (&o
, optab
, sizeof (template));
388 /* initialize reg_hash hash table */
389 reg_hash
= hash_new ();
391 register const reg_entry
*regtab
;
393 for (regtab
= i386_regtab
; regtab
< i386_regtab_end
; regtab
++)
395 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, regtab
);
396 if (hash_err
&& *hash_err
)
401 esp
= (reg_entry
*) hash_find (reg_hash
, "esp");
402 ebp
= (reg_entry
*) hash_find (reg_hash
, "ebp");
404 /* initialize reg_hash hash table */
405 prefix_hash
= hash_new ();
407 register const prefix_entry
*prefixtab
;
409 for (prefixtab
= i386_prefixtab
;
410 prefixtab
< i386_prefixtab_end
; prefixtab
++)
412 hash_err
= hash_insert (prefix_hash
, prefixtab
->prefix_name
, prefixtab
);
413 if (hash_err
&& *hash_err
)
418 /* fill in lexical tables: opcode_chars, operand_chars, space_chars */
420 register unsigned int c
;
422 memset (opcode_chars
, '\0', sizeof (opcode_chars
));
423 memset (operand_chars
, '\0', sizeof (operand_chars
));
424 memset (space_chars
, '\0', sizeof (space_chars
));
425 memset (identifier_chars
, '\0', sizeof (identifier_chars
));
426 memset (digit_chars
, '\0', sizeof (digit_chars
));
428 for (c
= 0; c
< 256; c
++)
430 if (islower (c
) || isdigit (c
))
433 register_chars
[c
] = c
;
435 else if (isupper (c
))
437 opcode_chars
[c
] = tolower (c
);
438 register_chars
[c
] = opcode_chars
[c
];
440 else if (c
== PREFIX_SEPERATOR
)
444 else if (c
== ')' || c
== '(')
446 register_chars
[c
] = c
;
449 if (isupper (c
) || islower (c
) || isdigit (c
))
450 operand_chars
[c
] = c
;
451 else if (c
&& strchr (operand_special_chars
, c
))
452 operand_chars
[c
] = c
;
454 if (isdigit (c
) || c
== '-')
457 if (isalpha (c
) || c
== '_' || c
== '.' || isdigit (c
))
458 identifier_chars
[c
] = c
;
460 if (c
== ' ' || c
== '\t')
469 } /* not much to do here. */
474 /* debugging routines for md_assemble */
475 /* static void pi (), pte (), pt (), pe (), ps (); */
482 register template *p
;
485 fprintf (stdout
, "%s: template ", line
);
487 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
488 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
489 fprintf (stdout
, " base %x index %x scale %x\n",
490 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
491 for (i
= 0; i
< x
->operands
; i
++)
493 fprintf (stdout
, " #%d: ", i
+ 1);
495 fprintf (stdout
, "\n");
496 if (x
->types
[i
] & Reg
)
497 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
498 if (x
->types
[i
] & Imm
)
500 if (x
->types
[i
] & (Disp
| Abs
))
510 fprintf (stdout
, " %d operands ", t
->operands
);
511 fprintf (stdout
, "opcode %x ",
513 if (t
->extension_opcode
!= None
)
514 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
515 if (t
->opcode_modifier
& D
)
516 fprintf (stdout
, "D");
517 if (t
->opcode_modifier
& W
)
518 fprintf (stdout
, "W");
519 fprintf (stdout
, "\n");
520 for (i
= 0; i
< t
->operands
; i
++)
522 fprintf (stdout
, " #%d type ", i
+ 1);
523 pt (t
->operand_types
[i
]);
524 fprintf (stdout
, "\n");
532 fprintf (stdout
, " operation %d\n", e
->X_op
);
533 fprintf (stdout
, " add_number %d (%x)\n",
534 e
->X_add_number
, e
->X_add_number
);
537 fprintf (stdout
, " add_symbol ");
538 ps (e
->X_add_symbol
);
539 fprintf (stdout
, "\n");
543 fprintf (stdout
, " op_symbol ");
545 fprintf (stdout
, "\n");
553 fprintf (stdout
, "%s type %s%s",
555 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
556 segment_name (S_GET_SEGMENT (s
)));
577 { BaseIndex
, "BaseIndex" },
587 { InOutPortReg
, "InOutPortReg" },
588 { ShiftCount
, "ShiftCount" },
590 { Control
, "control reg" },
591 { Test
, "test reg" },
592 { FloatReg
, "FReg" },
593 { FloatAcc
, "FAcc" },
594 { JumpAbsolute
, "Jump Absolute" },
602 register struct type_name
*ty
;
606 fprintf (stdout
, "Unknown");
610 for (ty
= type_names
; ty
->mask
; ty
++)
612 fprintf (stdout
, "%s, ", ty
->tname
);
617 #endif /* DEBUG386 */
620 static bfd_reloc_code_real_type
628 case 1: return BFD_RELOC_8_PCREL
;
629 case 2: return BFD_RELOC_16_PCREL
;
630 case 4: return BFD_RELOC_32_PCREL
;
635 case 1: return BFD_RELOC_8
;
636 case 2: return BFD_RELOC_16
;
637 case 4: return BFD_RELOC_32
;
642 #define reloc(SIZE,PCREL) 0
643 #define BFD_RELOC_32 0
644 #define BFD_RELOC_32_PCREL 0
647 /* This is the guts of the machine-dependent assembler. LINE points to a
648 machine dependent instruction. This function is supposed to emit
649 the frags/bytes it assembles to. */
654 /* Holds temlate once we've found it. */
655 register template *t
;
657 /* Possible templates for current insn */
658 templates
*current_templates
= (templates
*) 0;
660 /* Initialize globals. */
661 memset (&i
, '\0', sizeof (i
));
662 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
663 memset (im_expressions
, '\0', sizeof (im_expressions
));
664 save_stack_p
= save_stack
; /* reset stack pointer */
666 /* Fist parse an opcode & call i386_operand for the operands.
667 We assume that the scrubber has arranged it so that line[0] is the valid
668 start of a (possibly prefixed) opcode. */
670 register char *l
= line
; /* Fast place to put LINE. */
672 /* 1 if operand is pending after ','. */
673 unsigned int expecting_operand
= 0;
674 /* 1 if we found a prefix only acceptable with string insns. */
675 unsigned int expecting_string_instruction
= 0;
676 /* Non-zero if operand parens not balenced. */
677 unsigned int paren_not_balenced
;
678 char *token_start
= l
;
680 while (!is_space_char (*l
) && *l
!= END_OF_INSN
)
682 if (!is_opcode_char (*l
))
684 as_bad ("invalid character %s in opcode", output_invalid (*l
));
687 else if (*l
!= PREFIX_SEPERATOR
)
689 *l
= opcode_chars
[(unsigned char) *l
]; /* fold case of opcodes */
693 { /* this opcode's got a prefix */
694 register unsigned int q
;
695 register prefix_entry
*prefix
;
697 if (l
== token_start
)
699 as_bad ("expecting prefix; got nothing");
702 END_STRING_AND_SAVE (l
);
703 prefix
= (prefix_entry
*) hash_find (prefix_hash
, token_start
);
706 as_bad ("no such opcode prefix ('%s')", token_start
);
709 RESTORE_END_STRING (l
);
710 /* check for repeated prefix */
711 for (q
= 0; q
< i
.prefixes
; q
++)
712 if (i
.prefix
[q
] == prefix
->prefix_code
)
714 as_bad ("same prefix used twice; you don't really want this!");
717 if (i
.prefixes
== MAX_PREFIXES
)
719 as_bad ("too many opcode prefixes");
722 i
.prefix
[i
.prefixes
++] = prefix
->prefix_code
;
723 if (prefix
->prefix_code
== REPE
|| prefix
->prefix_code
== REPNE
)
724 expecting_string_instruction
= 1;
725 /* skip past PREFIX_SEPERATOR and reset token_start */
729 END_STRING_AND_SAVE (l
);
730 if (token_start
== l
)
732 as_bad ("expecting opcode; got nothing");
736 /* Lookup insn in hash; try intel & att naming conventions if appropriate;
737 that is: we only use the opcode suffix 'b' 'w' or 'l' if we need to. */
738 current_templates
= (templates
*) hash_find (op_hash
, token_start
);
739 if (!current_templates
)
741 int last_index
= strlen (token_start
) - 1;
742 char last_char
= token_start
[last_index
];
745 case DWORD_OPCODE_SUFFIX
:
746 case WORD_OPCODE_SUFFIX
:
747 case BYTE_OPCODE_SUFFIX
:
748 token_start
[last_index
] = '\0';
749 current_templates
= (templates
*) hash_find (op_hash
, token_start
);
750 token_start
[last_index
] = last_char
;
751 i
.suffix
= last_char
;
753 if (!current_templates
)
755 as_bad ("no such 386 instruction: `%s'", token_start
);
759 RESTORE_END_STRING (l
);
761 /* check for rep/repne without a string instruction */
762 if (expecting_string_instruction
&&
763 !IS_STRING_INSTRUCTION (current_templates
->
766 as_bad ("expecting string instruction after rep/repne");
770 /* There may be operands to parse. */
771 if (*l
!= END_OF_INSN
&&
772 /* For string instructions, we ignore any operands if given. This
773 kludges, for example, 'rep/movsb %ds:(%esi), %es:(%edi)' where
774 the operands are always going to be the same, and are not really
775 encoded in machine code. */
776 !IS_STRING_INSTRUCTION (current_templates
->
782 /* skip optional white space before operand */
783 while (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
785 if (!is_space_char (*l
))
787 as_bad ("invalid character %s before %s operand",
789 ordinal_names
[i
.operands
]);
794 token_start
= l
; /* after white space */
795 paren_not_balenced
= 0;
796 while (paren_not_balenced
|| *l
!= ',')
798 if (*l
== END_OF_INSN
)
800 if (paren_not_balenced
)
802 as_bad ("unbalenced parenthesis in %s operand.",
803 ordinal_names
[i
.operands
]);
807 break; /* we are done */
809 else if (!is_operand_char (*l
))
811 as_bad ("invalid character %s in %s operand",
813 ordinal_names
[i
.operands
]);
817 ++paren_not_balenced
;
819 --paren_not_balenced
;
822 if (l
!= token_start
)
823 { /* yes, we've read in another operand */
824 unsigned int operand_ok
;
825 this_operand
= i
.operands
++;
826 if (i
.operands
> MAX_OPERANDS
)
828 as_bad ("spurious operands; (%d operands/instruction max)",
832 /* now parse operand adding info to 'i' as we go along */
833 END_STRING_AND_SAVE (l
);
834 operand_ok
= i386_operand (token_start
);
835 RESTORE_END_STRING (l
); /* restore old contents */
841 if (expecting_operand
)
843 expecting_operand_after_comma
:
844 as_bad ("expecting operand after ','; got nothing");
849 as_bad ("expecting operand before ','; got nothing");
854 /* now *l must be either ',' or END_OF_INSN */
857 if (*++l
== END_OF_INSN
)
858 { /* just skip it, if it's \n complain */
859 goto expecting_operand_after_comma
;
861 expecting_operand
= 1;
864 while (*l
!= END_OF_INSN
); /* until we get end of insn */
868 /* Now we've parsed the opcode into a set of templates, and have the
871 Next, we find a template that matches the given insn,
872 making sure the overlap of the given operands types is consistent
873 with the template operand types. */
875 #define MATCH(overlap,given_type) \
877 (((overlap & (JumpAbsolute|BaseIndex|Mem8)) \
878 == (given_type & (JumpAbsolute|BaseIndex|Mem8))) \
879 || (overlap == InOutPortReg)))
882 /* If m0 and m1 are register matches they must be consistent
883 with the expected operand types t0 and t1.
884 That is, if both m0 & m1 are register matches
885 i.e. ( ((m0 & (Reg)) && (m1 & (Reg)) ) ?
886 then, either 1. or 2. must be true:
887 1. the expected operand type register overlap is null:
890 the given register overlap is null:
892 2. the expected operand type register overlap == the given
893 operand type overlap: (t0 & t1 & m0 & m1 & Reg).
895 #define CONSISTENT_REGISTER_MATCH(m0, m1, t0, t1) \
896 ( ((m0 & (Reg)) && (m1 & (Reg))) ? \
897 ( ((t0 & t1 & (Reg)) == 0 && (m0 & m1 & (Reg)) == 0) || \
898 ((t0 & t1) & (m0 & m1) & (Reg)) \
901 register unsigned int overlap0
, overlap1
;
903 unsigned int overlap2
;
904 unsigned int found_reverse_match
;
906 overlap0
= overlap1
= overlap2
= found_reverse_match
= 0;
907 for (t
= current_templates
->start
;
908 t
< current_templates
->end
;
912 /* must have right number of operands */
913 if (i
.operands
!= t
->operands
)
915 else if (!t
->operands
)
916 break; /* 0 operands always matches */
918 overlap0
= i
.types
[0] & t
->operand_types
[0];
922 if (!MATCH (overlap0
, i
.types
[0]))
927 overlap1
= i
.types
[1] & t
->operand_types
[1];
928 if (!MATCH (overlap0
, i
.types
[0]) ||
929 !MATCH (overlap1
, i
.types
[1]) ||
930 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap1
,
932 t
->operand_types
[1]))
935 /* check if other direction is valid ... */
936 if (!(t
->opcode_modifier
& COMES_IN_BOTH_DIRECTIONS
))
939 /* try reversing direction of operands */
940 overlap0
= i
.types
[0] & t
->operand_types
[1];
941 overlap1
= i
.types
[1] & t
->operand_types
[0];
942 if (!MATCH (overlap0
, i
.types
[0]) ||
943 !MATCH (overlap1
, i
.types
[1]) ||
944 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap1
,
946 t
->operand_types
[1]))
948 /* does not match either direction */
951 /* found a reverse match here -- slip through */
952 /* found_reverse_match holds which of D or FloatD we've found */
953 found_reverse_match
= t
->opcode_modifier
& COMES_IN_BOTH_DIRECTIONS
;
954 } /* endif: not forward match */
955 /* found either forward/reverse 2 operand match here */
956 if (t
->operands
== 3)
958 overlap2
= i
.types
[2] & t
->operand_types
[2];
959 if (!MATCH (overlap2
, i
.types
[2]) ||
960 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap2
,
962 t
->operand_types
[2]) ||
963 !CONSISTENT_REGISTER_MATCH (overlap1
, overlap2
,
965 t
->operand_types
[2]))
968 /* found either forward/reverse 2 or 3 operand match here:
969 slip through to break */
971 break; /* we've found a match; break out of loop */
973 if (t
== current_templates
->end
)
974 { /* we found no match */
975 as_bad ("operands given don't match any known 386 instruction");
979 /* Copy the template we found (we may change it!). */
980 memcpy (&i
.tm
, t
, sizeof (template));
981 t
= &i
.tm
; /* alter new copy of template */
983 /* If there's no opcode suffix we try to invent one based on register
985 if (!i
.suffix
&& i
.reg_operands
)
987 /* We take i.suffix from the LAST register operand specified. This
988 assumes that the last register operands is the destination register
991 for (o
= 0; o
< MAX_OPERANDS
; o
++)
992 if (i
.types
[o
] & Reg
)
994 i
.suffix
= (i
.types
[o
] == Reg8
) ? BYTE_OPCODE_SUFFIX
:
995 (i
.types
[o
] == Reg16
) ? WORD_OPCODE_SUFFIX
:
1000 /* Make still unresolved immediate matches conform to size of immediate
1001 given in i.suffix. Note: overlap2 cannot be an immediate!
1003 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1004 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1005 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1009 as_bad ("no opcode suffix given; can't determine immediate size");
1012 overlap0
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1013 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1015 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1016 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1017 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1021 as_bad ("no opcode suffix given; can't determine immediate size");
1024 overlap1
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1025 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1028 i
.types
[0] = overlap0
;
1029 i
.types
[1] = overlap1
;
1030 i
.types
[2] = overlap2
;
1032 if (overlap0
& ImplicitRegister
)
1034 if (overlap1
& ImplicitRegister
)
1036 if (overlap2
& ImplicitRegister
)
1038 if (overlap0
& Imm1
)
1039 i
.imm_operands
= 0; /* kludge for shift insns */
1041 if (found_reverse_match
)
1044 save
= t
->operand_types
[0];
1045 t
->operand_types
[0] = t
->operand_types
[1];
1046 t
->operand_types
[1] = save
;
1049 /* Finalize opcode. First, we change the opcode based on the operand
1050 size given by i.suffix: we never have to change things for byte insns,
1051 or when no opcode suffix is need to size the operands. */
1053 if (!i
.suffix
&& (t
->opcode_modifier
& W
))
1055 as_bad ("no opcode suffix given and no register operands; can't size instruction");
1059 if (i
.suffix
&& i
.suffix
!= BYTE_OPCODE_SUFFIX
)
1061 /* Select between byte and word/dword operations. */
1062 if (t
->opcode_modifier
& W
)
1063 t
->base_opcode
|= W
;
1064 /* Now select between word & dword operations via the
1065 operand size prefix. */
1066 if (i
.suffix
== WORD_OPCODE_SUFFIX
)
1068 if (i
.prefixes
== MAX_PREFIXES
)
1070 as_bad ("%d prefixes given and 'w' opcode suffix gives too many prefixes",
1074 i
.prefix
[i
.prefixes
++] = WORD_PREFIX_OPCODE
;
1078 /* For insns with operands there are more diddles to do to the opcode. */
1081 /* If we found a reverse match we must alter the opcode direction bit
1082 found_reverse_match holds bit to set (different for int &
1085 if (found_reverse_match
)
1087 t
->base_opcode
|= found_reverse_match
;
1090 /* The imul $imm, %reg instruction is converted into
1091 imul $imm, %reg, %reg. */
1092 if (t
->opcode_modifier
& imulKludge
)
1094 /* Pretend we saw the 3 operand case. */
1095 i
.regs
[2] = i
.regs
[1];
1099 /* Certain instructions expect the destination to be in the i.rm.reg
1100 field. This is by far the exceptional case. For these
1101 instructions, if the source operand is a register, we must reverse
1102 the i.rm.reg and i.rm.regmem fields. We accomplish this by faking
1103 that the two register operands were given in the reverse order. */
1104 if ((t
->opcode_modifier
& ReverseRegRegmem
) && i
.reg_operands
== 2)
1106 unsigned int first_reg_operand
= (i
.types
[0] & Reg
) ? 0 : 1;
1107 unsigned int second_reg_operand
= first_reg_operand
+ 1;
1108 reg_entry
*tmp
= i
.regs
[first_reg_operand
];
1109 i
.regs
[first_reg_operand
] = i
.regs
[second_reg_operand
];
1110 i
.regs
[second_reg_operand
] = tmp
;
1113 if (t
->opcode_modifier
& ShortForm
)
1115 /* The register or float register operand is in operand 0 or 1. */
1116 unsigned int o
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1117 /* Register goes in low 3 bits of opcode. */
1118 t
->base_opcode
|= i
.regs
[o
]->reg_num
;
1120 else if (t
->opcode_modifier
& ShortFormW
)
1122 /* Short form with 0x8 width bit. Register is always dest. operand */
1123 t
->base_opcode
|= i
.regs
[1]->reg_num
;
1124 if (i
.suffix
== WORD_OPCODE_SUFFIX
||
1125 i
.suffix
== DWORD_OPCODE_SUFFIX
)
1126 t
->base_opcode
|= 0x8;
1128 else if (t
->opcode_modifier
& Seg2ShortForm
)
1130 if (t
->base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
1132 as_bad ("you can't 'pop cs' on the 386.");
1135 t
->base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
1137 else if (t
->opcode_modifier
& Seg3ShortForm
)
1139 /* 'push %fs' is 0x0fa0; 'pop %fs' is 0x0fa1.
1140 'push %gs' is 0x0fa8; 'pop %fs' is 0x0fa9.
1141 So, only if i.regs[0]->reg_num == 5 (%gs) do we need
1142 to change the opcode. */
1143 if (i
.regs
[0]->reg_num
== 5)
1144 t
->base_opcode
|= 0x08;
1146 else if (t
->opcode_modifier
& Modrm
)
1148 /* The opcode is completed (modulo t->extension_opcode which must
1149 be put into the modrm byte.
1150 Now, we make the modrm & index base bytes based on all the info
1153 /* i.reg_operands MUST be the number of real register operands;
1154 implicit registers do not count. */
1155 if (i
.reg_operands
== 2)
1157 unsigned int source
, dest
;
1158 source
= (i
.types
[0] & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
)) ? 0 : 1;
1161 /* We must be careful to make sure that all
1162 segment/control/test/debug registers go into the i.rm.reg
1163 field (despite the whether they are source or destination
1165 if (i
.regs
[dest
]->reg_type
& (SReg2
| SReg3
| Control
| Debug
| Test
))
1167 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1168 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1172 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1173 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1177 { /* if it's not 2 reg operands... */
1180 unsigned int fake_zero_displacement
= 0;
1181 unsigned int o
= (i
.types
[0] & Mem
) ? 0 : ((i
.types
[1] & Mem
) ? 1 : 2);
1183 /* Encode memory operand into modrm byte and base index
1186 if (i
.base_reg
== esp
&& !i
.index_reg
)
1188 /* <disp>(%esp) becomes two byte modrm with no index
1190 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1191 i
.rm
.mode
= mode_from_disp_size (i
.types
[o
]);
1192 i
.bi
.base
= ESP_REG_NUM
;
1193 i
.bi
.index
= NO_INDEX_REGISTER
;
1194 i
.bi
.scale
= 0; /* Must be zero! */
1196 else if (i
.base_reg
== ebp
&& !i
.index_reg
)
1198 if (!(i
.types
[o
] & Disp
))
1200 /* Must fake a zero byte displacement. There is
1201 no direct way to code '(%ebp)' directly. */
1202 fake_zero_displacement
= 1;
1203 /* fake_zero_displacement code does not set this. */
1204 i
.types
[o
] |= Disp8
;
1206 i
.rm
.mode
= mode_from_disp_size (i
.types
[o
]);
1207 i
.rm
.regmem
= EBP_REG_NUM
;
1209 else if (!i
.base_reg
&& (i
.types
[o
] & BaseIndex
))
1211 /* There are three cases here.
1212 Case 1: '<32bit disp>(,1)' -- indirect absolute.
1213 (Same as cases 2 & 3 with NO index register)
1214 Case 2: <32bit disp> (,<index>) -- no base register with disp
1215 Case 3: (, <index>) --- no base register;
1216 no disp (must add 32bit 0 disp). */
1217 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1218 i
.rm
.mode
= 0; /* 32bit mode */
1219 i
.bi
.base
= NO_BASE_REGISTER
;
1220 i
.types
[o
] &= ~Disp
;
1221 i
.types
[o
] |= Disp32
; /* Must be 32bit! */
1223 { /* case 2 or case 3 */
1224 i
.bi
.index
= i
.index_reg
->reg_num
;
1225 i
.bi
.scale
= i
.log2_scale_factor
;
1226 if (i
.disp_operands
== 0)
1227 fake_zero_displacement
= 1; /* case 3 */
1231 i
.bi
.index
= NO_INDEX_REGISTER
;
1235 else if (i
.disp_operands
&& !i
.base_reg
&& !i
.index_reg
)
1237 /* Operand is just <32bit disp> */
1238 i
.rm
.regmem
= EBP_REG_NUM
;
1240 i
.types
[o
] &= ~Disp
;
1241 i
.types
[o
] |= Disp32
;
1245 /* It's not a special case; rev'em up. */
1246 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1247 i
.rm
.mode
= mode_from_disp_size (i
.types
[o
]);
1250 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1251 i
.bi
.base
= i
.base_reg
->reg_num
;
1252 i
.bi
.index
= i
.index_reg
->reg_num
;
1253 i
.bi
.scale
= i
.log2_scale_factor
;
1254 if (i
.base_reg
== ebp
&& i
.disp_operands
== 0)
1256 fake_zero_displacement
= 1;
1257 i
.types
[o
] |= Disp8
;
1258 i
.rm
.mode
= mode_from_disp_size (i
.types
[o
]);
1262 if (fake_zero_displacement
)
1264 /* Fakes a zero displacement assuming that i.types[o]
1265 holds the correct displacement size. */
1266 exp
= &disp_expressions
[i
.disp_operands
++];
1268 exp
->X_op
= O_constant
;
1269 exp
->X_add_number
= 0;
1270 exp
->X_add_symbol
= (symbolS
*) 0;
1271 exp
->X_op_symbol
= (symbolS
*) 0;
1274 /* Select the correct segment for the memory operand. */
1277 unsigned int seg_index
;
1278 const seg_entry
*default_seg
;
1280 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
)
1282 seg_index
= (i
.rm
.mode
<< 3) | i
.bi
.base
;
1283 default_seg
= two_byte_segment_defaults
[seg_index
];
1287 seg_index
= (i
.rm
.mode
<< 3) | i
.rm
.regmem
;
1288 default_seg
= one_byte_segment_defaults
[seg_index
];
1290 /* If the specified segment is not the default, use an
1291 opcode prefix to select it */
1292 if (i
.seg
!= default_seg
)
1294 if (i
.prefixes
== MAX_PREFIXES
)
1296 as_bad ("%d prefixes given and %s segment override gives too many prefixes",
1297 MAX_PREFIXES
, i
.seg
->seg_name
);
1300 i
.prefix
[i
.prefixes
++] = i
.seg
->seg_prefix
;
1305 /* Fill in i.rm.reg or i.rm.regmem field with register operand
1306 (if any) based on t->extension_opcode. Again, we must be
1307 careful to make sure that segment/control/debug/test
1308 registers are coded into the i.rm.reg field. */
1312 (i
.types
[0] & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
)) ? 0 :
1313 (i
.types
[1] & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
)) ? 1 : 2;
1314 /* If there is an extension opcode to put here, the
1315 register number must be put into the regmem field. */
1316 if (t
->extension_opcode
!= None
)
1317 i
.rm
.regmem
= i
.regs
[o
]->reg_num
;
1319 i
.rm
.reg
= i
.regs
[o
]->reg_num
;
1321 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1322 we must set it to 3 to indicate this is a register
1323 operand int the regmem field */
1324 if (!i
.mem_operands
)
1328 /* Fill in i.rm.reg field with extension opcode (if any). */
1329 if (t
->extension_opcode
!= None
)
1330 i
.rm
.reg
= t
->extension_opcode
;
1336 /* Handle conversion of 'int $3' --> special int3 insn. */
1337 if (t
->base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
1339 t
->base_opcode
= INT3_OPCODE
;
1343 /* We are ready to output the insn. */
1348 if (t
->opcode_modifier
& Jump
)
1350 int n
= i
.disps
[0]->X_add_number
;
1352 if (i
.disps
[0]->X_op
== O_constant
)
1354 if (fits_in_signed_byte (n
))
1357 p
[0] = t
->base_opcode
;
1360 #if 0 /* leave out 16 bit jumps - pace */
1361 else if (fits_in_signed_word (n
))
1364 p
[0] = WORD_PREFIX_OPCODE
;
1365 p
[1] = t
->base_opcode
;
1366 md_number_to_chars (&p
[2], n
, 2);
1370 { /* It's an absolute dword displacement. */
1371 if (t
->base_opcode
== JUMP_PC_RELATIVE
)
1373 /* unconditional jump */
1376 md_number_to_chars (&p
[1], n
, 4);
1380 /* conditional jump */
1382 p
[0] = TWO_BYTE_OPCODE_ESCAPE
;
1383 p
[1] = t
->base_opcode
+ 0x10;
1384 md_number_to_chars (&p
[2], n
, 4);
1390 /* It's a symbol; end frag & setup for relax.
1391 Make sure there are more than 6 chars left in the current frag;
1392 if not we'll have to start a new one. */
1393 if (obstack_room (&frags
) <= 6)
1395 frag_wane (frag_now
);
1399 p
[0] = t
->base_opcode
;
1400 frag_var (rs_machine_dependent
,
1401 6, /* 2 opcode/prefix + 4 displacement */
1403 ((unsigned char) *p
== JUMP_PC_RELATIVE
1404 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, BYTE
)
1405 : ENCODE_RELAX_STATE (COND_JUMP
, BYTE
)),
1406 i
.disps
[0]->X_add_symbol
,
1410 else if (t
->opcode_modifier
& (JumpByte
| JumpDword
))
1412 int size
= (t
->opcode_modifier
& JumpByte
) ? 1 : 4;
1413 int n
= i
.disps
[0]->X_add_number
;
1415 if (fits_in_unsigned_byte (t
->base_opcode
))
1417 FRAG_APPEND_1_CHAR (t
->base_opcode
);
1421 p
= frag_more (2); /* opcode can be at most two bytes */
1422 /* put out high byte first: can't use md_number_to_chars! */
1423 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1424 *p
= t
->base_opcode
& 0xff;
1427 p
= frag_more (size
);
1428 if (i
.disps
[0]->X_op
== O_constant
)
1430 md_number_to_chars (p
, n
, size
);
1431 if (size
== 1 && !fits_in_signed_byte (n
))
1433 as_bad ("loop/jecx only takes byte displacement; %d shortened to %d",
1439 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
1440 i
.disps
[0], 1, reloc (size
, 1));
1443 else if (t
->opcode_modifier
& JumpInterSegment
)
1445 p
= frag_more (1 + 2 + 4); /* 1 opcode; 2 segment; 4 offset */
1446 p
[0] = t
->base_opcode
;
1447 if (i
.imms
[1]->X_op
== O_constant
)
1448 md_number_to_chars (p
+ 1, i
.imms
[1]->X_add_number
, 4);
1450 fix_new_exp (frag_now
, p
+ 1 - frag_now
->fr_literal
, 4,
1451 i
.imms
[1], 0, BFD_RELOC_32
);
1452 if (i
.imms
[0]->X_op
!= O_constant
)
1453 as_bad ("can't handle non absolute segment in long call/jmp");
1454 md_number_to_chars (p
+ 5, i
.imms
[0]->X_add_number
, 2);
1458 /* Output normal instructions here. */
1461 /* First the prefix bytes. */
1462 for (q
= i
.prefix
; q
< i
.prefix
+ i
.prefixes
; q
++)
1465 md_number_to_chars (p
, (unsigned int) *q
, 1);
1468 /* Now the opcode; be careful about word order here! */
1469 if (fits_in_unsigned_byte (t
->base_opcode
))
1471 FRAG_APPEND_1_CHAR (t
->base_opcode
);
1473 else if (fits_in_unsigned_word (t
->base_opcode
))
1476 /* put out high byte first: can't use md_number_to_chars! */
1477 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1478 *p
= t
->base_opcode
& 0xff;
1481 { /* opcode is either 3 or 4 bytes */
1482 if (t
->base_opcode
& 0xff000000)
1485 *p
++ = (t
->base_opcode
>> 24) & 0xff;
1489 *p
++ = (t
->base_opcode
>> 16) & 0xff;
1490 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1491 *p
= (t
->base_opcode
) & 0xff;
1494 /* Now the modrm byte and base index byte (if present). */
1495 if (t
->opcode_modifier
& Modrm
)
1498 /* md_number_to_chars (p, i.rm, 1); */
1499 md_number_to_chars (p
, (i
.rm
.regmem
<< 0 | i
.rm
.reg
<< 3 | i
.rm
.mode
<< 6), 1);
1500 /* If i.rm.regmem == ESP (4) && i.rm.mode != Mode 3 (Register mode)
1501 ==> need second modrm byte. */
1502 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
&& i
.rm
.mode
!= 3)
1505 /* md_number_to_chars (p, i.bi, 1); */
1506 md_number_to_chars (p
, (i
.bi
.base
<< 0 | i
.bi
.index
<< 3 | i
.bi
.scale
<< 6), 1);
1510 if (i
.disp_operands
)
1512 register unsigned int n
;
1514 for (n
= 0; n
< i
.operands
; n
++)
1518 if (i
.disps
[n
]->X_op
== O_constant
)
1520 if (i
.types
[n
] & (Disp8
| Abs8
))
1523 md_number_to_chars (p
, i
.disps
[n
]->X_add_number
, 1);
1525 else if (i
.types
[n
] & (Disp16
| Abs16
))
1528 md_number_to_chars (p
, i
.disps
[n
]->X_add_number
, 2);
1531 { /* Disp32|Abs32 */
1533 md_number_to_chars (p
, i
.disps
[n
]->X_add_number
, 4);
1537 { /* not absolute_section */
1538 /* need a 32-bit fixup (don't support 8bit non-absolute disps) */
1540 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
1541 i
.disps
[n
], 0, BFD_RELOC_32
);
1545 } /* end displacement output */
1547 /* output immediate */
1550 register unsigned int n
;
1552 for (n
= 0; n
< i
.operands
; n
++)
1556 if (i
.imms
[n
]->X_op
== O_constant
)
1558 if (i
.types
[n
] & (Imm8
| Imm8S
))
1561 md_number_to_chars (p
, i
.imms
[n
]->X_add_number
, 1);
1563 else if (i
.types
[n
] & Imm16
)
1566 md_number_to_chars (p
, i
.imms
[n
]->X_add_number
, 2);
1571 md_number_to_chars (p
, i
.imms
[n
]->X_add_number
, 4);
1575 { /* not absolute_section */
1576 /* need a 32-bit fixup (don't support 8bit non-absolute ims) */
1577 /* try to support other sizes ... */
1579 if (i
.types
[n
] & (Imm8
| Imm8S
))
1581 else if (i
.types
[n
] & Imm16
)
1585 p
= frag_more (size
);
1586 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
1587 i
.imms
[n
], 0, reloc (size
, 0));
1591 } /* end immediate output */
1599 #endif /* DEBUG386 */
1605 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
1609 i386_operand (operand_string
)
1610 char *operand_string
;
1612 register char *op_string
= operand_string
;
1614 /* Address of '\0' at end of operand_string. */
1615 char *end_of_operand_string
= operand_string
+ strlen (operand_string
);
1617 /* Start and end of displacement string expression (if found). */
1618 char *displacement_string_start
= NULL
;
1619 char *displacement_string_end
= NULL
;
1621 /* We check for an absolute prefix (differentiating,
1622 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
1623 if (*op_string
== ABSOLUTE_PREFIX
)
1626 i
.types
[this_operand
] |= JumpAbsolute
;
1629 /* Check if operand is a register. */
1630 if (*op_string
== REGISTER_PREFIX
)
1632 register reg_entry
*r
;
1633 if (!(r
= parse_register (op_string
)))
1635 as_bad ("bad register name ('%s')", op_string
);
1638 /* Check for segment override, rather than segment register by
1639 searching for ':' after %<x>s where <x> = s, c, d, e, f, g. */
1640 if ((r
->reg_type
& (SReg2
| SReg3
)) && op_string
[3] == ':')
1645 i
.seg
= (seg_entry
*) & es
;
1648 i
.seg
= (seg_entry
*) & cs
;
1651 i
.seg
= (seg_entry
*) & ss
;
1654 i
.seg
= (seg_entry
*) & ds
;
1657 i
.seg
= (seg_entry
*) & fs
;
1660 i
.seg
= (seg_entry
*) & gs
;
1663 op_string
+= 4; /* skip % <x> s : */
1664 operand_string
= op_string
; /* Pretend given string starts here. */
1665 if (!is_digit_char (*op_string
) && !is_identifier_char (*op_string
)
1666 && *op_string
!= '(' && *op_string
!= ABSOLUTE_PREFIX
)
1668 as_bad ("bad memory operand after segment override");
1671 /* Handle case of %es:*foo. */
1672 if (*op_string
== ABSOLUTE_PREFIX
)
1675 i
.types
[this_operand
] |= JumpAbsolute
;
1677 goto do_memory_reference
;
1679 i
.types
[this_operand
] |= r
->reg_type
;
1680 i
.regs
[this_operand
] = r
;
1683 else if (*op_string
== IMMEDIATE_PREFIX
)
1684 { /* ... or an immediate */
1685 char *save_input_line_pointer
;
1689 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
1691 as_bad ("only 1 or 2 immediate operands are allowed");
1695 exp
= &im_expressions
[i
.imm_operands
++];
1696 i
.imms
[this_operand
] = exp
;
1697 save_input_line_pointer
= input_line_pointer
;
1698 input_line_pointer
= ++op_string
; /* must advance op_string! */
1699 exp_seg
= expression (exp
);
1700 input_line_pointer
= save_input_line_pointer
;
1702 if (exp
->X_op
== O_absent
)
1704 /* missing or bad expr becomes absolute 0 */
1705 as_bad ("missing or invalid immediate expression '%s' taken as 0",
1707 exp
->X_op
= O_constant
;
1708 exp
->X_add_number
= 0;
1709 exp
->X_add_symbol
= (symbolS
*) 0;
1710 exp
->X_op_symbol
= (symbolS
*) 0;
1711 i
.types
[this_operand
] |= Imm
;
1713 else if (exp
->X_op
== O_constant
)
1715 i
.types
[this_operand
] |= smallest_imm_type (exp
->X_add_number
);
1718 else if (exp_seg
!= text_section
1719 && exp_seg
!= data_section
1720 && exp_seg
!= bss_section
1721 && exp_seg
!= undefined_section
1722 #ifdef BFD_ASSEMBLER
1723 && ! bfd_is_com_section (exp_seg
)
1728 as_bad ("Unimplemented segment type %d in parse_operand", exp_seg
);
1734 /* this is an address ==> 32bit */
1735 i
.types
[this_operand
] |= Imm32
;
1737 /* shorten this type of this operand if the instruction wants
1738 * fewer bits than are present in the immediate. The bit field
1739 * code can put out 'andb $0xffffff, %al', for example. pace
1740 * also 'movw $foo,(%eax)'
1744 case WORD_OPCODE_SUFFIX
:
1745 i
.types
[this_operand
] |= Imm16
;
1747 case BYTE_OPCODE_SUFFIX
:
1748 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
1752 else if (is_digit_char (*op_string
) || is_identifier_char (*op_string
)
1753 || *op_string
== '(')
1755 /* This is a memory reference of some sort. */
1756 register char *base_string
;
1757 unsigned int found_base_index_form
;
1759 do_memory_reference
:
1760 if (i
.mem_operands
== MAX_MEMORY_OPERANDS
)
1762 as_bad ("more than 1 memory reference in instruction");
1767 /* Determine type of memory operand from opcode_suffix;
1768 no opcode suffix implies general memory references. */
1771 case BYTE_OPCODE_SUFFIX
:
1772 i
.types
[this_operand
] |= Mem8
;
1774 case WORD_OPCODE_SUFFIX
:
1775 i
.types
[this_operand
] |= Mem16
;
1777 case DWORD_OPCODE_SUFFIX
:
1779 i
.types
[this_operand
] |= Mem32
;
1782 /* Check for base index form. We detect the base index form by
1783 looking for an ')' at the end of the operand, searching
1784 for the '(' matching it, and finding a REGISTER_PREFIX or ','
1786 base_string
= end_of_operand_string
- 1;
1787 found_base_index_form
= 0;
1788 if (*base_string
== ')')
1790 unsigned int parens_balenced
= 1;
1791 /* We've already checked that the number of left & right ()'s are
1792 equal, so this loop will not be infinite. */
1796 if (*base_string
== ')')
1798 if (*base_string
== '(')
1801 while (parens_balenced
);
1802 base_string
++; /* Skip past '('. */
1803 if (*base_string
== REGISTER_PREFIX
|| *base_string
== ',')
1804 found_base_index_form
= 1;
1807 /* If we can't parse a base index register expression, we've found
1808 a pure displacement expression. We set up displacement_string_start
1809 and displacement_string_end for the code below. */
1810 if (!found_base_index_form
)
1812 displacement_string_start
= op_string
;
1813 displacement_string_end
= end_of_operand_string
;
1817 char *base_reg_name
, *index_reg_name
, *num_string
;
1820 i
.types
[this_operand
] |= BaseIndex
;
1822 /* If there is a displacement set-up for it to be parsed later. */
1823 if (base_string
!= op_string
+ 1)
1825 displacement_string_start
= op_string
;
1826 displacement_string_end
= base_string
- 1;
1829 /* Find base register (if any). */
1830 if (*base_string
!= ',')
1832 base_reg_name
= base_string
++;
1833 /* skip past register name & parse it */
1834 while (isalpha (*base_string
))
1836 if (base_string
== base_reg_name
+ 1)
1838 as_bad ("can't find base register name after '(%c'",
1842 END_STRING_AND_SAVE (base_string
);
1843 if (!(i
.base_reg
= parse_register (base_reg_name
)))
1845 as_bad ("bad base register name ('%s')", base_reg_name
);
1848 RESTORE_END_STRING (base_string
);
1851 /* Now check seperator; must be ',' ==> index reg
1852 OR num ==> no index reg. just scale factor
1853 OR ')' ==> end. (scale factor = 1) */
1854 if (*base_string
!= ',' && *base_string
!= ')')
1856 as_bad ("expecting ',' or ')' after base register in `%s'",
1861 /* There may index reg here; and there may be a scale factor. */
1862 if (*base_string
== ',' && *(base_string
+ 1) == REGISTER_PREFIX
)
1864 index_reg_name
= ++base_string
;
1865 while (isalpha (*++base_string
));
1866 END_STRING_AND_SAVE (base_string
);
1867 if (!(i
.index_reg
= parse_register (index_reg_name
)))
1869 as_bad ("bad index register name ('%s')", index_reg_name
);
1872 RESTORE_END_STRING (base_string
);
1875 /* Check for scale factor. */
1876 if (*base_string
== ',' && isdigit (*(base_string
+ 1)))
1878 num_string
= ++base_string
;
1879 while (is_digit_char (*base_string
))
1881 if (base_string
== num_string
)
1883 as_bad ("can't find a scale factor after ','");
1886 END_STRING_AND_SAVE (base_string
);
1887 /* We've got a scale factor. */
1888 if (!sscanf (num_string
, "%d", &num
))
1890 as_bad ("can't parse scale factor from '%s'", num_string
);
1893 RESTORE_END_STRING (base_string
);
1895 { /* must be 1 digit scale */
1897 i
.log2_scale_factor
= 0;
1900 i
.log2_scale_factor
= 1;
1903 i
.log2_scale_factor
= 2;
1906 i
.log2_scale_factor
= 3;
1909 as_bad ("expecting scale factor of 1, 2, 4, 8; got %d", num
);
1915 if (!i
.index_reg
&& *base_string
== ',')
1917 as_bad ("expecting index register or scale factor after ','; got '%c'",
1918 *(base_string
+ 1));
1924 /* If there's an expression begining the operand, parse it,
1925 assuming displacement_string_start and displacement_string_end
1927 if (displacement_string_start
)
1929 register expressionS
*exp
;
1931 char *save_input_line_pointer
;
1932 exp
= &disp_expressions
[i
.disp_operands
];
1933 i
.disps
[this_operand
] = exp
;
1935 save_input_line_pointer
= input_line_pointer
;
1936 input_line_pointer
= displacement_string_start
;
1937 END_STRING_AND_SAVE (displacement_string_end
);
1938 exp_seg
= expression (exp
);
1939 if (*input_line_pointer
)
1940 as_bad ("Ignoring junk '%s' after expression", input_line_pointer
);
1941 RESTORE_END_STRING (displacement_string_end
);
1942 input_line_pointer
= save_input_line_pointer
;
1943 if (exp
->X_op
== O_absent
)
1945 /* missing expr becomes absolute 0 */
1946 as_bad ("missing or invalid displacement '%s' taken as 0",
1948 i
.types
[this_operand
] |= (Disp
| Abs
);
1949 exp
->X_op
= O_constant
;
1950 exp
->X_add_number
= 0;
1951 exp
->X_add_symbol
= (symbolS
*) 0;
1952 exp
->X_op_symbol
= (symbolS
*) 0;
1954 else if (exp
->X_op
== O_constant
)
1956 i
.types
[this_operand
] |= SMALLEST_DISP_TYPE (exp
->X_add_number
);
1958 else if (exp_seg
== text_section
1959 || exp_seg
== data_section
1960 || exp_seg
== bss_section
1961 || exp_seg
== undefined_section
)
1963 i
.types
[this_operand
] |= Disp32
;
1968 i
.types
[this_operand
] |= Disp32
;
1970 goto seg_unimplemented
;
1975 /* Make sure the memory operand we've been dealt is valid. */
1976 if (i
.base_reg
&& i
.index_reg
&&
1977 !(i
.base_reg
->reg_type
& i
.index_reg
->reg_type
& Reg
))
1979 as_bad ("register size mismatch in (base,index,scale) expression");
1983 * special case for (%dx) while doing input/output op
1986 (i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)) &&
1987 (i
.index_reg
== 0)))
1989 i
.types
[this_operand
] |= InOutPortReg
;
1992 if ((i
.base_reg
&& (i
.base_reg
->reg_type
& Reg32
) == 0) ||
1993 (i
.index_reg
&& (i
.index_reg
->reg_type
& Reg32
) == 0))
1995 as_bad ("base/index register must be 32 bit register");
1998 if (i
.index_reg
&& i
.index_reg
== esp
)
2000 as_bad ("%s may not be used as an index register", esp
->reg_name
);
2005 { /* it's not a memory operand; argh! */
2006 as_bad ("invalid char %s begining %s operand '%s'",
2007 output_invalid (*op_string
), ordinal_names
[this_operand
],
2011 return 1; /* normal return */
2015 * md_estimate_size_before_relax()
2017 * Called just before relax().
2018 * Any symbol that is now undefined will not become defined.
2019 * Return the correct fr_subtype in the frag.
2020 * Return the initial "guess for fr_var" to caller.
2021 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
2022 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
2023 * Although it may not be explicit in the frag, pretend fr_var starts with a
2027 md_estimate_size_before_relax (fragP
, segment
)
2028 register fragS
*fragP
;
2029 register segT segment
;
2031 register unsigned char *opcode
;
2032 register int old_fr_fix
;
2034 old_fr_fix
= fragP
->fr_fix
;
2035 opcode
= (unsigned char *) fragP
->fr_opcode
;
2036 /* We've already got fragP->fr_subtype right; all we have to do is check
2037 for un-relaxable symbols. */
2038 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
2040 /* symbol is undefined in this segment */
2043 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
2044 opcode
[0] = 0xe9; /* dword disp jmp */
2046 fix_new (fragP
, old_fr_fix
, 4,
2048 fragP
->fr_offset
, 1, BFD_RELOC_32_PCREL
);
2052 /* This changes the byte-displacement jump 0x7N -->
2053 the dword-displacement jump 0x0f8N */
2054 opcode
[1] = opcode
[0] + 0x10;
2055 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
2056 fragP
->fr_fix
+= 1 + 4; /* we've added an opcode byte */
2057 fix_new (fragP
, old_fr_fix
+ 1, 4,
2059 fragP
->fr_offset
, 1, BFD_RELOC_32_PCREL
);
2064 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
2065 } /* md_estimate_size_before_relax() */
2068 * md_convert_frag();
2070 * Called after relax() is finished.
2071 * In: Address of frag.
2072 * fr_type == rs_machine_dependent.
2073 * fr_subtype is what the address relaxed to.
2075 * Out: Any fixSs and constants are set up.
2076 * Caller will turn frag into a ".space 0".
2078 #ifndef BFD_ASSEMBLER
2080 md_convert_frag (headers
, fragP
)
2081 object_headers
*headers
;
2082 register fragS
*fragP
;
2085 md_convert_frag (abfd
, sec
, fragP
)
2088 register fragS
*fragP
;
2091 register unsigned char *opcode
;
2092 unsigned char *where_to_put_displacement
= NULL
;
2093 unsigned int target_address
;
2094 unsigned int opcode_address
;
2095 unsigned int extension
= 0;
2096 int displacement_from_opcode_start
;
2098 opcode
= (unsigned char *) fragP
->fr_opcode
;
2100 /* Address we want to reach in file space. */
2101 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
2102 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
2103 target_address
+= fragP
->fr_symbol
->sy_frag
->fr_address
;
2106 /* Address opcode resides at in file space. */
2107 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
2109 /* Displacement from opcode start to fill into instruction. */
2110 displacement_from_opcode_start
= target_address
- opcode_address
;
2112 switch (fragP
->fr_subtype
)
2114 case ENCODE_RELAX_STATE (COND_JUMP
, BYTE
):
2115 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BYTE
):
2116 /* don't have to change opcode */
2117 extension
= 1; /* 1 opcode + 1 displacement */
2118 where_to_put_displacement
= &opcode
[1];
2121 case ENCODE_RELAX_STATE (COND_JUMP
, WORD
):
2122 opcode
[1] = TWO_BYTE_OPCODE_ESCAPE
;
2123 opcode
[2] = opcode
[0] + 0x10;
2124 opcode
[0] = WORD_PREFIX_OPCODE
;
2125 extension
= 4; /* 3 opcode + 2 displacement */
2126 where_to_put_displacement
= &opcode
[3];
2129 case ENCODE_RELAX_STATE (UNCOND_JUMP
, WORD
):
2131 opcode
[0] = WORD_PREFIX_OPCODE
;
2132 extension
= 3; /* 2 opcode + 2 displacement */
2133 where_to_put_displacement
= &opcode
[2];
2136 case ENCODE_RELAX_STATE (COND_JUMP
, DWORD
):
2137 opcode
[1] = opcode
[0] + 0x10;
2138 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
2139 extension
= 5; /* 2 opcode + 4 displacement */
2140 where_to_put_displacement
= &opcode
[2];
2143 case ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
):
2145 extension
= 4; /* 1 opcode + 4 displacement */
2146 where_to_put_displacement
= &opcode
[1];
2150 BAD_CASE (fragP
->fr_subtype
);
2153 /* now put displacement after opcode */
2154 md_number_to_chars ((char *) where_to_put_displacement
,
2155 displacement_from_opcode_start
- extension
,
2156 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
2157 fragP
->fr_fix
+= extension
;
2161 int md_short_jump_size
= 2; /* size of byte displacement jmp */
2162 int md_long_jump_size
= 5; /* size of dword displacement jmp */
2163 const int md_reloc_size
= 8; /* Size of relocation record */
2166 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
2168 addressT from_addr
, to_addr
;
2174 offset
= to_addr
- (from_addr
+ 2);
2175 md_number_to_chars (ptr
, (long) 0xeb, 1); /* opcode for byte-disp jump */
2176 md_number_to_chars (ptr
+ 1, offset
, 1);
2180 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
2182 addressT from_addr
, to_addr
;
2190 offset
= to_addr
- S_GET_VALUE (to_symbol
);
2191 md_number_to_chars (ptr
, 0xe9, 1); /* opcode for long jmp */
2192 md_number_to_chars (ptr
+ 1, offset
, 4);
2193 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
2194 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
2198 offset
= to_addr
- (from_addr
+ 5);
2199 md_number_to_chars (ptr
, (long) 0xe9, 1);
2200 md_number_to_chars (ptr
+ 1, offset
, 4);
2204 void /* Knows about order of bytes in address. */
2205 md_number_to_chars (con
, value
, nbytes
)
2206 char con
[]; /* Return 'nbytes' of chars here. */
2207 valueT value
; /* The value of the bits. */
2208 int nbytes
; /* Number of bytes in the output. */
2210 register char *p
= con
;
2215 p
[0] = value
& 0xff;
2218 p
[0] = value
& 0xff;
2219 p
[1] = (value
>> 8) & 0xff;
2222 p
[0] = value
& 0xff;
2223 p
[1] = (value
>> 8) & 0xff;
2224 p
[2] = (value
>> 16) & 0xff;
2225 p
[3] = (value
>> 24) & 0xff;
2233 /* Apply a fixup (fixS) to segment data, once it has been determined
2234 by our caller that we have all the info we need to fix it up.
2236 On the 386, immediates, displacements, and data pointers are all in
2237 the same (little-endian) format, so we don't need to care about which
2241 md_apply_fix_1 (fixP
, value
)
2242 fixS
*fixP
; /* The fix we're to put in */
2243 long value
; /* The value of the bits. */
2245 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2247 #ifdef BFD_ASSEMBLER
2249 * This is a hack. There should be a better way to
2252 if (fixP
->fx_r_type
== BFD_RELOC_32_PCREL
&& fixP
->fx_addsy
)
2254 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
2258 switch (fixP
->fx_size
)
2269 *p
++ = (value
>> 8);
2270 *p
++ = (value
>> 16);
2274 BAD_CASE (fixP
->fx_size
);
2278 #ifdef BFD_ASSEMBLER
2280 md_apply_fix (fixP
, valp
)
2284 md_apply_fix_1 (fixP
, *valp
);
2289 md_apply_fix (fixP
, val
)
2293 md_apply_fix_1 (fixP
, val
);
2297 long /* Knows about the byte order in a word. */
2298 md_chars_to_number (con
, nbytes
)
2299 unsigned char con
[]; /* Low order byte 1st. */
2300 int nbytes
; /* Number of bytes in the input. */
2303 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
2305 retval
<<= BITS_PER_CHAR
;
2313 #define MAX_LITTLENUMS 6
2315 /* Turn the string pointed to by litP into a floating point constant of type
2316 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
2317 is stored in *sizeP . An error message is returned, or NULL on OK. */
2319 md_atof (type
, litP
, sizeP
)
2325 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
2326 LITTLENUM_TYPE
*wordP
;
2348 return "Bad call to md_atof ()";
2350 t
= atof_ieee (input_line_pointer
, type
, words
);
2352 input_line_pointer
= t
;
2354 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
2355 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
2356 the bigendian 386. */
2357 for (wordP
= words
+ prec
- 1; prec
--;)
2359 md_number_to_chars (litP
, (long) (*wordP
--), sizeof (LITTLENUM_TYPE
));
2360 litP
+= sizeof (LITTLENUM_TYPE
);
2365 char output_invalid_buf
[8];
2372 sprintf (output_invalid_buf
, "'%c'", c
);
2374 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
2375 return output_invalid_buf
;
2378 /* reg_string starts *before* REGISTER_PREFIX */
2380 parse_register (reg_string
)
2383 register char *s
= reg_string
;
2385 char reg_name_given
[MAX_REG_NAME_SIZE
];
2387 s
++; /* skip REGISTER_PREFIX */
2388 for (p
= reg_name_given
; is_register_char (*s
); p
++, s
++)
2390 *p
= register_chars
[(unsigned char) *s
];
2391 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
2392 return (reg_entry
*) 0;
2395 return (reg_entry
*) hash_find (reg_hash
, reg_name_given
);
2399 /* We have no need to default values of symbols. */
2403 md_undefined_symbol (name
)
2409 /* Parse an operand that is machine-specific.
2410 We just return without modifying the expression if we have nothing
2415 md_operand (expressionP
)
2416 expressionS
*expressionP
;
2420 /* Round up a section size to the appropriate boundary. */
2422 md_section_align (segment
, size
)
2426 return size
; /* Byte alignment is fine */
2429 /* Exactly what point is a PC-relative offset relative TO? On the
2430 i386, they're relative to the address of the offset, plus its
2431 size. (??? Is this right? FIXME-SOON!) */
2433 md_pcrel_from (fixP
)
2436 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
2446 temp
= get_absolute_expression ();
2447 #ifdef BFD_ASSEMBLER
2448 subseg_set (bss_section
, (subsegT
) temp
);
2450 subseg_new (bss_section
, (subsegT
) temp
);
2452 demand_empty_rest_of_line ();
2458 #ifdef BFD_ASSEMBLER
2461 tc_gen_reloc (section
, fixp
)
2466 bfd_reloc_code_real_type code
;
2468 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
2469 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
2471 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
2472 MAP (1, 0, BFD_RELOC_8
);
2473 MAP (2, 0, BFD_RELOC_16
);
2474 MAP (4, 0, BFD_RELOC_32
);
2475 MAP (1, 1, BFD_RELOC_8_PCREL
);
2476 MAP (2, 1, BFD_RELOC_16_PCREL
);
2477 MAP (4, 1, BFD_RELOC_32_PCREL
);
2484 reloc
= (arelent
*) bfd_alloc_by_size_t (stdoutput
, sizeof (arelent
));
2485 assert (reloc
!= 0);
2486 reloc
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
2487 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
2489 reloc
->addend
= fixp
->fx_addnumber
;
2493 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
2494 assert (reloc
->howto
!= 0);
2499 #else /* ! BFD_ASSEMBLER */
2501 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
2503 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
2506 relax_addressT segment_address_in_file
;
2509 * In: length of relocation (or of address) in chars: 1, 2 or 4.
2510 * Out: GNU LD relocation length code: 0, 1, or 2.
2513 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
2516 know (fixP
->fx_addsy
!= NULL
);
2518 md_number_to_chars (where
,
2519 fixP
->fx_frag
->fr_address
+ fixP
->fx_where
- segment_address_in_file
,
2522 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
2523 ? S_GET_TYPE (fixP
->fx_addsy
)
2524 : fixP
->fx_addsy
->sy_number
);
2526 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
2527 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
2528 where
[4] = r_symbolnum
& 0x0ff;
2529 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
2530 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
2531 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
2534 #endif /* OBJ_AOUT or OBJ_BOUT */
2536 #if defined (I386COFF)
2539 tc_coff_fix2rtype (fixP
)
2542 return (fixP
->fx_pcrel
?
2543 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
2544 fixP
->fx_size
== 2 ? R_PCRWORD
:
2546 (fixP
->fx_size
== 1 ? R_RELBYTE
:
2547 fixP
->fx_size
== 2 ? R_RELWORD
:
2552 tc_coff_sizemachdep (frag
)
2556 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
2561 #endif /* I386COFF */
2563 #endif /* BFD_ASSEMBLER? */
2565 /* end of tc-i386.c */