1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
58 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
60 /* Some systems define MIN in, e.g., param.h. */
62 #define MIN(a,b) ((a) < (b) ? (a) : (b))
65 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
66 #define CURR_SLOT md.slot[md.curr_slot]
68 #define O_pseudo_fixup (O_max + 1)
72 /* IA-64 ABI section pseudo-ops. */
73 SPECIAL_SECTION_BSS
= 0,
75 SPECIAL_SECTION_SDATA
,
76 SPECIAL_SECTION_RODATA
,
77 SPECIAL_SECTION_COMMENT
,
78 SPECIAL_SECTION_UNWIND
,
79 SPECIAL_SECTION_UNWIND_INFO
,
80 /* HPUX specific section pseudo-ops. */
81 SPECIAL_SECTION_INIT_ARRAY
,
82 SPECIAL_SECTION_FINI_ARRAY
,
99 FUNC_LT_FPTR_RELATIVE
,
101 FUNC_LT_DTP_RELATIVE
,
109 REG_FR
= (REG_GR
+ 128),
110 REG_AR
= (REG_FR
+ 128),
111 REG_CR
= (REG_AR
+ 128),
112 REG_P
= (REG_CR
+ 128),
113 REG_BR
= (REG_P
+ 64),
114 REG_IP
= (REG_BR
+ 8),
121 /* The following are pseudo-registers for use by gas only. */
133 /* The following pseudo-registers are used for unwind directives only: */
141 DYNREG_GR
= 0, /* dynamic general purpose register */
142 DYNREG_FR
, /* dynamic floating point register */
143 DYNREG_PR
, /* dynamic predicate register */
147 enum operand_match_result
150 OPERAND_OUT_OF_RANGE
,
154 /* On the ia64, we can't know the address of a text label until the
155 instructions are packed into a bundle. To handle this, we keep
156 track of the list of labels that appear in front of each
160 struct label_fix
*next
;
164 /* This is the endianness of the current section. */
165 extern int target_big_endian
;
167 /* This is the default endianness. */
168 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
170 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
172 static void ia64_float_to_chars_bigendian
173 PARAMS ((char *, LITTLENUM_TYPE
*, int));
174 static void ia64_float_to_chars_littleendian
175 PARAMS ((char *, LITTLENUM_TYPE
*, int));
176 static void (*ia64_float_to_chars
)
177 PARAMS ((char *, LITTLENUM_TYPE
*, int));
179 static struct hash_control
*alias_hash
;
180 static struct hash_control
*alias_name_hash
;
181 static struct hash_control
*secalias_hash
;
182 static struct hash_control
*secalias_name_hash
;
184 /* List of chars besides those in app.c:symbol_chars that can start an
185 operand. Used to prevent the scrubber eating vital white-space. */
186 const char ia64_symbol_chars
[] = "@?";
188 /* Characters which always start a comment. */
189 const char comment_chars
[] = "";
191 /* Characters which start a comment at the beginning of a line. */
192 const char line_comment_chars
[] = "#";
194 /* Characters which may be used to separate multiple commands on a
196 const char line_separator_chars
[] = ";{}";
198 /* Characters which are used to indicate an exponent in a floating
200 const char EXP_CHARS
[] = "eE";
202 /* Characters which mean that a number is a floating point constant,
204 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
206 /* ia64-specific option processing: */
208 const char *md_shortopts
= "m:N:x::";
210 struct option md_longopts
[] =
212 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
213 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
214 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
215 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
218 size_t md_longopts_size
= sizeof (md_longopts
);
222 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
223 struct hash_control
*reg_hash
; /* register name hash table */
224 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
225 struct hash_control
*const_hash
; /* constant hash table */
226 struct hash_control
*entry_hash
; /* code entry hint hash table */
228 symbolS
*regsym
[REG_NUM
];
230 /* If X_op is != O_absent, the registername for the instruction's
231 qualifying predicate. If NULL, p0 is assumed for instructions
232 that are predicatable. */
235 /* Optimize for which CPU. */
242 /* What to do when hint.b is used. */
254 explicit_mode
: 1, /* which mode we're in */
255 default_explicit_mode
: 1, /* which mode is the default */
256 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
258 keep_pending_output
: 1;
260 /* What to do when something is wrong with unwind directives. */
263 unwind_check_warning
,
267 /* Each bundle consists of up to three instructions. We keep
268 track of four most recent instructions so we can correctly set
269 the end_of_insn_group for the last instruction in a bundle. */
271 int num_slots_in_use
;
275 end_of_insn_group
: 1,
276 manual_bundling_on
: 1,
277 manual_bundling_off
: 1,
278 loc_directive_seen
: 1;
279 signed char user_template
; /* user-selected template, if any */
280 unsigned char qp_regno
; /* qualifying predicate */
281 /* This duplicates a good fraction of "struct fix" but we
282 can't use a "struct fix" instead since we can't call
283 fix_new_exp() until we know the address of the instruction. */
287 bfd_reloc_code_real_type code
;
288 enum ia64_opnd opnd
; /* type of operand in need of fix */
289 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
290 expressionS expr
; /* the value to be inserted */
292 fixup
[2]; /* at most two fixups per insn */
293 struct ia64_opcode
*idesc
;
294 struct label_fix
*label_fixups
;
295 struct label_fix
*tag_fixups
;
296 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
299 unsigned int src_line
;
300 struct dwarf2_line_info debug_line
;
308 struct dynreg
*next
; /* next dynamic register */
310 unsigned short base
; /* the base register number */
311 unsigned short num_regs
; /* # of registers in this set */
313 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
315 flagword flags
; /* ELF-header flags */
318 unsigned hint
:1; /* is this hint currently valid? */
319 bfd_vma offset
; /* mem.offset offset */
320 bfd_vma base
; /* mem.offset base */
323 int path
; /* number of alt. entry points seen */
324 const char **entry_labels
; /* labels of all alternate paths in
325 the current DV-checking block. */
326 int maxpaths
; /* size currently allocated for
329 int pointer_size
; /* size in bytes of a pointer */
330 int pointer_size_shift
; /* shift size of a pointer for alignment */
334 /* These are not const, because they are modified to MMI for non-itanium1
336 /* MFI bundle of nops. */
337 static unsigned char le_nop
[16] =
339 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
340 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
342 /* MFI bundle of nops with stop-bit. */
343 static unsigned char le_nop_stop
[16] =
345 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
346 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
349 /* application registers: */
355 #define AR_BSPSTORE 18
370 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
371 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
372 {"ar.rsc", 16}, {"ar.bsp", 17},
373 {"ar.bspstore", 18}, {"ar.rnat", 19},
374 {"ar.fcr", 21}, {"ar.eflag", 24},
375 {"ar.csd", 25}, {"ar.ssd", 26},
376 {"ar.cflg", 27}, {"ar.fsr", 28},
377 {"ar.fir", 29}, {"ar.fdr", 30},
378 {"ar.ccv", 32}, {"ar.unat", 36},
379 {"ar.fpsr", 40}, {"ar.itc", 44},
380 {"ar.pfs", 64}, {"ar.lc", 65},
401 /* control registers: */
443 static const struct const_desc
450 /* PSR constant masks: */
453 {"psr.be", ((valueT
) 1) << 1},
454 {"psr.up", ((valueT
) 1) << 2},
455 {"psr.ac", ((valueT
) 1) << 3},
456 {"psr.mfl", ((valueT
) 1) << 4},
457 {"psr.mfh", ((valueT
) 1) << 5},
459 {"psr.ic", ((valueT
) 1) << 13},
460 {"psr.i", ((valueT
) 1) << 14},
461 {"psr.pk", ((valueT
) 1) << 15},
463 {"psr.dt", ((valueT
) 1) << 17},
464 {"psr.dfl", ((valueT
) 1) << 18},
465 {"psr.dfh", ((valueT
) 1) << 19},
466 {"psr.sp", ((valueT
) 1) << 20},
467 {"psr.pp", ((valueT
) 1) << 21},
468 {"psr.di", ((valueT
) 1) << 22},
469 {"psr.si", ((valueT
) 1) << 23},
470 {"psr.db", ((valueT
) 1) << 24},
471 {"psr.lp", ((valueT
) 1) << 25},
472 {"psr.tb", ((valueT
) 1) << 26},
473 {"psr.rt", ((valueT
) 1) << 27},
474 /* 28-31: reserved */
475 /* 32-33: cpl (current privilege level) */
476 {"psr.is", ((valueT
) 1) << 34},
477 {"psr.mc", ((valueT
) 1) << 35},
478 {"psr.it", ((valueT
) 1) << 36},
479 {"psr.id", ((valueT
) 1) << 37},
480 {"psr.da", ((valueT
) 1) << 38},
481 {"psr.dd", ((valueT
) 1) << 39},
482 {"psr.ss", ((valueT
) 1) << 40},
483 /* 41-42: ri (restart instruction) */
484 {"psr.ed", ((valueT
) 1) << 43},
485 {"psr.bn", ((valueT
) 1) << 44},
488 /* indirect register-sets/memory: */
497 { "CPUID", IND_CPUID
},
498 { "cpuid", IND_CPUID
},
510 /* Pseudo functions used to indicate relocation types (these functions
511 start with an at sign (@). */
533 /* reloc pseudo functions (these must come first!): */
534 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
535 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
536 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
537 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
538 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
539 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
540 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
541 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
542 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
543 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
544 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
545 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
546 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
547 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
548 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
549 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
550 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
552 /* mbtype4 constants: */
553 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
554 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
555 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
556 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
557 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
559 /* fclass constants: */
560 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
561 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
562 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
563 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
564 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
565 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
566 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
567 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
568 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
570 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
572 /* hint constants: */
573 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
575 /* unwind-related constants: */
576 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
577 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
578 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
579 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
580 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
581 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
582 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
584 /* unwind-related registers: */
585 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
588 /* 41-bit nop opcodes (one per unit): */
589 static const bfd_vma nop
[IA64_NUM_UNITS
] =
591 0x0000000000LL
, /* NIL => break 0 */
592 0x0008000000LL
, /* I-unit nop */
593 0x0008000000LL
, /* M-unit nop */
594 0x4000000000LL
, /* B-unit nop */
595 0x0008000000LL
, /* F-unit nop */
596 0x0008000000LL
, /* L-"unit" nop */
597 0x0008000000LL
, /* X-unit nop */
600 /* Can't be `const' as it's passed to input routines (which have the
601 habit of setting temporary sentinels. */
602 static char special_section_name
[][20] =
604 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
605 {".IA_64.unwind"}, {".IA_64.unwind_info"},
606 {".init_array"}, {".fini_array"}
609 /* The best template for a particular sequence of up to three
611 #define N IA64_NUM_TYPES
612 static unsigned char best_template
[N
][N
][N
];
615 /* Resource dependencies currently in effect */
617 int depind
; /* dependency index */
618 const struct ia64_dependency
*dependency
; /* actual dependency */
619 unsigned specific
:1, /* is this a specific bit/regno? */
620 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
621 int index
; /* specific regno/bit within dependency */
622 int note
; /* optional qualifying note (0 if none) */
626 int insn_srlz
; /* current insn serialization state */
627 int data_srlz
; /* current data serialization state */
628 int qp_regno
; /* qualifying predicate for this usage */
629 char *file
; /* what file marked this dependency */
630 unsigned int line
; /* what line marked this dependency */
631 struct mem_offset mem_offset
; /* optional memory offset hint */
632 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
633 int path
; /* corresponding code entry index */
635 static int regdepslen
= 0;
636 static int regdepstotlen
= 0;
637 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
638 static const char *dv_sem
[] = { "none", "implied", "impliedf",
639 "data", "instr", "specific", "stop", "other" };
640 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
642 /* Current state of PR mutexation */
643 static struct qpmutex
{
646 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
647 static int qp_mutexeslen
= 0;
648 static int qp_mutexestotlen
= 0;
649 static valueT qp_safe_across_calls
= 0;
651 /* Current state of PR implications */
652 static struct qp_imply
{
655 unsigned p2_branched
:1;
657 } *qp_implies
= NULL
;
658 static int qp_implieslen
= 0;
659 static int qp_impliestotlen
= 0;
661 /* Keep track of static GR values so that indirect register usage can
662 sometimes be tracked. */
673 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
679 /* Remember the alignment frag. */
680 static fragS
*align_frag
;
682 /* These are the routines required to output the various types of
685 /* A slot_number is a frag address plus the slot index (0-2). We use the
686 frag address here so that if there is a section switch in the middle of
687 a function, then instructions emitted to a different section are not
688 counted. Since there may be more than one frag for a function, this
689 means we also need to keep track of which frag this address belongs to
690 so we can compute inter-frag distances. This also nicely solves the
691 problem with nops emitted for align directives, which can't easily be
692 counted, but can easily be derived from frag sizes. */
694 typedef struct unw_rec_list
{
696 unsigned long slot_number
;
698 struct unw_rec_list
*next
;
701 #define SLOT_NUM_NOT_SET (unsigned)-1
703 /* Linked list of saved prologue counts. A very poor
704 implementation of a map from label numbers to prologue counts. */
705 typedef struct label_prologue_count
707 struct label_prologue_count
*next
;
708 unsigned long label_number
;
709 unsigned int prologue_count
;
710 } label_prologue_count
;
712 typedef struct proc_pending
715 struct proc_pending
*next
;
720 /* Maintain a list of unwind entries for the current function. */
724 /* Any unwind entires that should be attached to the current slot
725 that an insn is being constructed for. */
726 unw_rec_list
*current_entry
;
728 /* These are used to create the unwind table entry for this function. */
729 proc_pending proc_pending
;
730 symbolS
*info
; /* pointer to unwind info */
731 symbolS
*personality_routine
;
733 subsegT saved_text_subseg
;
734 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
736 /* TRUE if processing unwind directives in a prologue region. */
737 unsigned int prologue
: 1;
738 unsigned int prologue_mask
: 4;
739 unsigned int prologue_gr
: 7;
740 unsigned int body
: 1;
741 unsigned int insn
: 1;
742 unsigned int prologue_count
; /* number of .prologues seen so far */
743 /* Prologue counts at previous .label_state directives. */
744 struct label_prologue_count
* saved_prologue_counts
;
747 /* The input value is a negated offset from psp, and specifies an address
748 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
749 must add 16 and divide by 4 to get the encoded value. */
751 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
753 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
755 /* Forward declarations: */
756 static void set_section
PARAMS ((char *name
));
757 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
758 unsigned int, unsigned int));
759 static void dot_align (int);
760 static void dot_radix
PARAMS ((int));
761 static void dot_special_section
PARAMS ((int));
762 static void dot_proc
PARAMS ((int));
763 static void dot_fframe
PARAMS ((int));
764 static void dot_vframe
PARAMS ((int));
765 static void dot_vframesp
PARAMS ((int));
766 static void dot_save
PARAMS ((int));
767 static void dot_restore
PARAMS ((int));
768 static void dot_restorereg
PARAMS ((int));
769 static void dot_handlerdata
PARAMS ((int));
770 static void dot_unwentry
PARAMS ((int));
771 static void dot_altrp
PARAMS ((int));
772 static void dot_savemem
PARAMS ((int));
773 static void dot_saveg
PARAMS ((int));
774 static void dot_savef
PARAMS ((int));
775 static void dot_saveb
PARAMS ((int));
776 static void dot_savegf
PARAMS ((int));
777 static void dot_spill
PARAMS ((int));
778 static void dot_spillreg
PARAMS ((int));
779 static void dot_spillmem
PARAMS ((int));
780 static void dot_label_state
PARAMS ((int));
781 static void dot_copy_state
PARAMS ((int));
782 static void dot_unwabi
PARAMS ((int));
783 static void dot_personality
PARAMS ((int));
784 static void dot_body
PARAMS ((int));
785 static void dot_prologue
PARAMS ((int));
786 static void dot_endp
PARAMS ((int));
787 static void dot_template
PARAMS ((int));
788 static void dot_regstk
PARAMS ((int));
789 static void dot_rot
PARAMS ((int));
790 static void dot_byteorder
PARAMS ((int));
791 static void dot_psr
PARAMS ((int));
792 static void dot_alias
PARAMS ((int));
793 static void dot_ln
PARAMS ((int));
794 static void cross_section
PARAMS ((int ref
, void (*cons
) PARAMS((int)), int ua
));
795 static void dot_xdata
PARAMS ((int));
796 static void stmt_float_cons
PARAMS ((int));
797 static void stmt_cons_ua
PARAMS ((int));
798 static void dot_xfloat_cons
PARAMS ((int));
799 static void dot_xstringer
PARAMS ((int));
800 static void dot_xdata_ua
PARAMS ((int));
801 static void dot_xfloat_cons_ua
PARAMS ((int));
802 static void print_prmask
PARAMS ((valueT mask
));
803 static void dot_pred_rel
PARAMS ((int));
804 static void dot_reg_val
PARAMS ((int));
805 static void dot_serialize
PARAMS ((int));
806 static void dot_dv_mode
PARAMS ((int));
807 static void dot_entry
PARAMS ((int));
808 static void dot_mem_offset
PARAMS ((int));
809 static void add_unwind_entry
PARAMS((unw_rec_list
*, int));
810 static symbolS
*declare_register
PARAMS ((const char *name
, int regnum
));
811 static void declare_register_set
PARAMS ((const char *, int, int));
812 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
813 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
816 static int parse_operand
PARAMS ((expressionS
*, int));
817 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
818 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
819 static void emit_one_bundle
PARAMS ((void));
820 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
821 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
822 bfd_reloc_code_real_type r_type
));
823 static void insn_group_break
PARAMS ((int, int, int));
824 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
825 struct rsrc
*, int depind
, int path
));
826 static void add_qp_mutex
PARAMS((valueT mask
));
827 static void add_qp_imply
PARAMS((int p1
, int p2
));
828 static void clear_qp_branch_flag
PARAMS((valueT mask
));
829 static void clear_qp_mutex
PARAMS((valueT mask
));
830 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
831 static int has_suffix_p
PARAMS((const char *, const char *));
832 static void clear_register_values
PARAMS ((void));
833 static void print_dependency
PARAMS ((const char *action
, int depind
));
834 static void instruction_serialization
PARAMS ((void));
835 static void data_serialization
PARAMS ((void));
836 static void remove_marked_resource
PARAMS ((struct rsrc
*));
837 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
838 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
839 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
840 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
841 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
842 struct ia64_opcode
*, int, struct rsrc
[], int, int));
843 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
844 static void check_dependencies
PARAMS((struct ia64_opcode
*));
845 static void mark_resources
PARAMS((struct ia64_opcode
*));
846 static void update_dependencies
PARAMS((struct ia64_opcode
*));
847 static void note_register_values
PARAMS((struct ia64_opcode
*));
848 static int qp_mutex
PARAMS ((int, int, int));
849 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
850 static void output_vbyte_mem
PARAMS ((int, char *, char *));
851 static void count_output
PARAMS ((int, char *, char *));
852 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
853 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
854 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
855 static void output_P1_format
PARAMS ((vbyte_func
, int));
856 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
857 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
858 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
859 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
860 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
861 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
862 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
863 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
864 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
865 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
866 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
867 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
868 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
869 static char format_ab_reg
PARAMS ((int, int));
870 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
872 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
873 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
875 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
876 static unw_rec_list
*output_endp
PARAMS ((void));
877 static unw_rec_list
*output_prologue
PARAMS ((void));
878 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
879 static unw_rec_list
*output_body
PARAMS ((void));
880 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
881 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
882 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
883 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
884 static unw_rec_list
*output_rp_when
PARAMS ((void));
885 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
886 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
887 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
888 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
889 static unw_rec_list
*output_pfs_when
PARAMS ((void));
890 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
891 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
892 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
893 static unw_rec_list
*output_preds_when
PARAMS ((void));
894 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
895 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
896 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
897 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
898 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
899 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
900 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
901 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
902 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
903 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
904 static unw_rec_list
*output_unat_when
PARAMS ((void));
905 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
906 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
907 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
908 static unw_rec_list
*output_lc_when
PARAMS ((void));
909 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
910 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
911 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
912 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
913 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
914 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
915 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
916 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
917 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
918 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
919 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
920 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
921 static unw_rec_list
*output_bsp_when
PARAMS ((void));
922 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
923 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
924 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
925 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
926 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
927 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
928 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
929 static unw_rec_list
*output_rnat_when
PARAMS ((void));
930 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
931 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
932 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
933 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
934 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
935 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
936 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
937 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int,
939 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int,
941 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
942 unsigned int, unsigned int));
943 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
944 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
945 static int calc_record_size
PARAMS ((unw_rec_list
*));
946 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
947 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
948 unsigned long, fragS
*,
950 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
951 static void fixup_unw_records
PARAMS ((unw_rec_list
*, int));
952 static int parse_predicate_and_operand
PARAMS ((expressionS
*, unsigned *, const char *));
953 static void convert_expr_to_ab_reg
PARAMS ((const expressionS
*, unsigned int *, unsigned int *, const char *, int));
954 static void convert_expr_to_xy_reg
PARAMS ((const expressionS
*, unsigned int *, unsigned int *, const char *, int));
955 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
956 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
957 static void free_saved_prologue_counts
PARAMS ((void));
959 /* Determine if application register REGNUM resides only in the integer
960 unit (as opposed to the memory unit). */
962 ar_is_only_in_integer_unit (int reg
)
965 return reg
>= 64 && reg
<= 111;
968 /* Determine if application register REGNUM resides only in the memory
969 unit (as opposed to the integer unit). */
971 ar_is_only_in_memory_unit (int reg
)
974 return reg
>= 0 && reg
<= 47;
977 /* Switch to section NAME and create section if necessary. It's
978 rather ugly that we have to manipulate input_line_pointer but I
979 don't see any other way to accomplish the same thing without
980 changing obj-elf.c (which may be the Right Thing, in the end). */
985 char *saved_input_line_pointer
;
987 saved_input_line_pointer
= input_line_pointer
;
988 input_line_pointer
= name
;
990 input_line_pointer
= saved_input_line_pointer
;
993 /* Map 's' to SHF_IA_64_SHORT. */
996 ia64_elf_section_letter (letter
, ptr_msg
)
1001 return SHF_IA_64_SHORT
;
1002 else if (letter
== 'o')
1003 return SHF_LINK_ORDER
;
1005 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
1009 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
1012 ia64_elf_section_flags (flags
, attr
, type
)
1014 int attr
, type ATTRIBUTE_UNUSED
;
1016 if (attr
& SHF_IA_64_SHORT
)
1017 flags
|= SEC_SMALL_DATA
;
1022 ia64_elf_section_type (str
, len
)
1026 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1028 if (STREQ (ELF_STRING_ia64_unwind_info
))
1029 return SHT_PROGBITS
;
1031 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
1032 return SHT_PROGBITS
;
1034 if (STREQ (ELF_STRING_ia64_unwind
))
1035 return SHT_IA_64_UNWIND
;
1037 if (STREQ (ELF_STRING_ia64_unwind_once
))
1038 return SHT_IA_64_UNWIND
;
1040 if (STREQ ("unwind"))
1041 return SHT_IA_64_UNWIND
;
1048 set_regstack (ins
, locs
, outs
, rots
)
1049 unsigned int ins
, locs
, outs
, rots
;
1051 /* Size of frame. */
1054 sof
= ins
+ locs
+ outs
;
1057 as_bad ("Size of frame exceeds maximum of 96 registers");
1062 as_warn ("Size of rotating registers exceeds frame size");
1065 md
.in
.base
= REG_GR
+ 32;
1066 md
.loc
.base
= md
.in
.base
+ ins
;
1067 md
.out
.base
= md
.loc
.base
+ locs
;
1069 md
.in
.num_regs
= ins
;
1070 md
.loc
.num_regs
= locs
;
1071 md
.out
.num_regs
= outs
;
1072 md
.rot
.num_regs
= rots
;
1079 struct label_fix
*lfix
;
1081 subsegT saved_subseg
;
1084 if (!md
.last_text_seg
)
1087 saved_seg
= now_seg
;
1088 saved_subseg
= now_subseg
;
1090 subseg_set (md
.last_text_seg
, 0);
1092 while (md
.num_slots_in_use
> 0)
1093 emit_one_bundle (); /* force out queued instructions */
1095 /* In case there are labels following the last instruction, resolve
1097 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1099 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1100 symbol_set_frag (lfix
->sym
, frag_now
);
1102 CURR_SLOT
.label_fixups
= 0;
1103 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1105 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1106 symbol_set_frag (lfix
->sym
, frag_now
);
1108 CURR_SLOT
.tag_fixups
= 0;
1110 /* In case there are unwind directives following the last instruction,
1111 resolve those now. We only handle prologue, body, and endp directives
1112 here. Give an error for others. */
1113 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1115 switch (ptr
->r
.type
)
1121 ptr
->slot_number
= (unsigned long) frag_more (0);
1122 ptr
->slot_frag
= frag_now
;
1125 /* Allow any record which doesn't have a "t" field (i.e.,
1126 doesn't relate to a particular instruction). */
1142 as_bad (_("Unwind directive not followed by an instruction."));
1146 unwind
.current_entry
= NULL
;
1148 subseg_set (saved_seg
, saved_subseg
);
1150 if (md
.qp
.X_op
== O_register
)
1151 as_bad ("qualifying predicate not followed by instruction");
1155 ia64_do_align (int nbytes
)
1157 char *saved_input_line_pointer
= input_line_pointer
;
1159 input_line_pointer
= "";
1160 s_align_bytes (nbytes
);
1161 input_line_pointer
= saved_input_line_pointer
;
1165 ia64_cons_align (nbytes
)
1170 char *saved_input_line_pointer
= input_line_pointer
;
1171 input_line_pointer
= "";
1172 s_align_bytes (nbytes
);
1173 input_line_pointer
= saved_input_line_pointer
;
1177 /* Output COUNT bytes to a memory location. */
1178 static char *vbyte_mem_ptr
= NULL
;
1181 output_vbyte_mem (count
, ptr
, comment
)
1184 char *comment ATTRIBUTE_UNUSED
;
1187 if (vbyte_mem_ptr
== NULL
)
1192 for (x
= 0; x
< count
; x
++)
1193 *(vbyte_mem_ptr
++) = ptr
[x
];
1196 /* Count the number of bytes required for records. */
1197 static int vbyte_count
= 0;
1199 count_output (count
, ptr
, comment
)
1201 char *ptr ATTRIBUTE_UNUSED
;
1202 char *comment ATTRIBUTE_UNUSED
;
1204 vbyte_count
+= count
;
1208 output_R1_format (f
, rtype
, rlen
)
1210 unw_record_type rtype
;
1217 output_R3_format (f
, rtype
, rlen
);
1223 else if (rtype
!= prologue
)
1224 as_bad ("record type is not valid");
1226 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1227 (*f
) (1, &byte
, NULL
);
1231 output_R2_format (f
, mask
, grsave
, rlen
)
1238 mask
= (mask
& 0x0f);
1239 grsave
= (grsave
& 0x7f);
1241 bytes
[0] = (UNW_R2
| (mask
>> 1));
1242 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1243 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1244 (*f
) (count
, bytes
, NULL
);
1248 output_R3_format (f
, rtype
, rlen
)
1250 unw_record_type rtype
;
1257 output_R1_format (f
, rtype
, rlen
);
1263 else if (rtype
!= prologue
)
1264 as_bad ("record type is not valid");
1265 bytes
[0] = (UNW_R3
| r
);
1266 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1267 (*f
) (count
+ 1, bytes
, NULL
);
1271 output_P1_format (f
, brmask
)
1276 byte
= UNW_P1
| (brmask
& 0x1f);
1277 (*f
) (1, &byte
, NULL
);
1281 output_P2_format (f
, brmask
, gr
)
1287 brmask
= (brmask
& 0x1f);
1288 bytes
[0] = UNW_P2
| (brmask
>> 1);
1289 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1290 (*f
) (2, bytes
, NULL
);
1294 output_P3_format (f
, rtype
, reg
)
1296 unw_record_type rtype
;
1341 as_bad ("Invalid record type for P3 format.");
1343 bytes
[0] = (UNW_P3
| (r
>> 1));
1344 bytes
[1] = (((r
& 1) << 7) | reg
);
1345 (*f
) (2, bytes
, NULL
);
1349 output_P4_format (f
, imask
, imask_size
)
1351 unsigned char *imask
;
1352 unsigned long imask_size
;
1355 (*f
) (imask_size
, (char *) imask
, NULL
);
1359 output_P5_format (f
, grmask
, frmask
)
1362 unsigned long frmask
;
1365 grmask
= (grmask
& 0x0f);
1368 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1369 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1370 bytes
[3] = (frmask
& 0x000000ff);
1371 (*f
) (4, bytes
, NULL
);
1375 output_P6_format (f
, rtype
, rmask
)
1377 unw_record_type rtype
;
1383 if (rtype
== gr_mem
)
1385 else if (rtype
!= fr_mem
)
1386 as_bad ("Invalid record type for format P6");
1387 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1388 (*f
) (1, &byte
, NULL
);
1392 output_P7_format (f
, rtype
, w1
, w2
)
1394 unw_record_type rtype
;
1401 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1406 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1456 bytes
[0] = (UNW_P7
| r
);
1457 (*f
) (count
, bytes
, NULL
);
1461 output_P8_format (f
, rtype
, t
)
1463 unw_record_type rtype
;
1502 case bspstore_psprel
:
1505 case bspstore_sprel
:
1517 case priunat_when_gr
:
1520 case priunat_psprel
:
1526 case priunat_when_mem
:
1533 count
+= output_leb128 (bytes
+ 2, t
, 0);
1534 (*f
) (count
, bytes
, NULL
);
1538 output_P9_format (f
, grmask
, gr
)
1545 bytes
[1] = (grmask
& 0x0f);
1546 bytes
[2] = (gr
& 0x7f);
1547 (*f
) (3, bytes
, NULL
);
1551 output_P10_format (f
, abi
, context
)
1558 bytes
[1] = (abi
& 0xff);
1559 bytes
[2] = (context
& 0xff);
1560 (*f
) (3, bytes
, NULL
);
1564 output_B1_format (f
, rtype
, label
)
1566 unw_record_type rtype
;
1567 unsigned long label
;
1573 output_B4_format (f
, rtype
, label
);
1576 if (rtype
== copy_state
)
1578 else if (rtype
!= label_state
)
1579 as_bad ("Invalid record type for format B1");
1581 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1582 (*f
) (1, &byte
, NULL
);
1586 output_B2_format (f
, ecount
, t
)
1588 unsigned long ecount
;
1595 output_B3_format (f
, ecount
, t
);
1598 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1599 count
+= output_leb128 (bytes
+ 1, t
, 0);
1600 (*f
) (count
, bytes
, NULL
);
1604 output_B3_format (f
, ecount
, t
)
1606 unsigned long ecount
;
1613 output_B2_format (f
, ecount
, t
);
1617 count
+= output_leb128 (bytes
+ 1, t
, 0);
1618 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1619 (*f
) (count
, bytes
, NULL
);
1623 output_B4_format (f
, rtype
, label
)
1625 unw_record_type rtype
;
1626 unsigned long label
;
1633 output_B1_format (f
, rtype
, label
);
1637 if (rtype
== copy_state
)
1639 else if (rtype
!= label_state
)
1640 as_bad ("Invalid record type for format B1");
1642 bytes
[0] = (UNW_B4
| (r
<< 3));
1643 count
+= output_leb128 (bytes
+ 1, label
, 0);
1644 (*f
) (count
, bytes
, NULL
);
1648 format_ab_reg (ab
, reg
)
1655 ret
= (ab
<< 5) | reg
;
1660 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1662 unw_record_type rtype
;
1672 if (rtype
== spill_sprel
)
1674 else if (rtype
!= spill_psprel
)
1675 as_bad ("Invalid record type for format X1");
1676 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1677 count
+= output_leb128 (bytes
+ 2, t
, 0);
1678 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1679 (*f
) (count
, bytes
, NULL
);
1683 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1692 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1693 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1694 count
+= output_leb128 (bytes
+ 3, t
, 0);
1695 (*f
) (count
, bytes
, NULL
);
1699 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1701 unw_record_type rtype
;
1712 if (rtype
== spill_sprel_p
)
1714 else if (rtype
!= spill_psprel_p
)
1715 as_bad ("Invalid record type for format X3");
1716 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1717 bytes
[2] = format_ab_reg (ab
, reg
);
1718 count
+= output_leb128 (bytes
+ 3, t
, 0);
1719 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1720 (*f
) (count
, bytes
, NULL
);
1724 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1734 bytes
[1] = (qp
& 0x3f);
1735 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1736 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1737 count
+= output_leb128 (bytes
+ 4, t
, 0);
1738 (*f
) (count
, bytes
, NULL
);
1741 /* This function allocates a record list structure, and initializes fields. */
1743 static unw_rec_list
*
1744 alloc_record (unw_record_type t
)
1747 ptr
= xmalloc (sizeof (*ptr
));
1749 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1754 /* Dummy unwind record used for calculating the length of the last prologue or
1757 static unw_rec_list
*
1760 unw_rec_list
*ptr
= alloc_record (endp
);
1764 static unw_rec_list
*
1767 unw_rec_list
*ptr
= alloc_record (prologue
);
1768 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1772 static unw_rec_list
*
1773 output_prologue_gr (saved_mask
, reg
)
1774 unsigned int saved_mask
;
1777 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1778 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1779 ptr
->r
.record
.r
.grmask
= saved_mask
;
1780 ptr
->r
.record
.r
.grsave
= reg
;
1784 static unw_rec_list
*
1787 unw_rec_list
*ptr
= alloc_record (body
);
1791 static unw_rec_list
*
1792 output_mem_stack_f (size
)
1795 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1796 ptr
->r
.record
.p
.size
= size
;
1800 static unw_rec_list
*
1801 output_mem_stack_v ()
1803 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1807 static unw_rec_list
*
1811 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1812 ptr
->r
.record
.p
.gr
= gr
;
1816 static unw_rec_list
*
1817 output_psp_sprel (offset
)
1818 unsigned int offset
;
1820 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1821 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1825 static unw_rec_list
*
1828 unw_rec_list
*ptr
= alloc_record (rp_when
);
1832 static unw_rec_list
*
1836 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1837 ptr
->r
.record
.p
.gr
= gr
;
1841 static unw_rec_list
*
1845 unw_rec_list
*ptr
= alloc_record (rp_br
);
1846 ptr
->r
.record
.p
.br
= br
;
1850 static unw_rec_list
*
1851 output_rp_psprel (offset
)
1852 unsigned int offset
;
1854 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1855 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1859 static unw_rec_list
*
1860 output_rp_sprel (offset
)
1861 unsigned int offset
;
1863 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1864 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1868 static unw_rec_list
*
1871 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1875 static unw_rec_list
*
1879 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1880 ptr
->r
.record
.p
.gr
= gr
;
1884 static unw_rec_list
*
1885 output_pfs_psprel (offset
)
1886 unsigned int offset
;
1888 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1889 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1893 static unw_rec_list
*
1894 output_pfs_sprel (offset
)
1895 unsigned int offset
;
1897 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1898 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1902 static unw_rec_list
*
1903 output_preds_when ()
1905 unw_rec_list
*ptr
= alloc_record (preds_when
);
1909 static unw_rec_list
*
1910 output_preds_gr (gr
)
1913 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1914 ptr
->r
.record
.p
.gr
= gr
;
1918 static unw_rec_list
*
1919 output_preds_psprel (offset
)
1920 unsigned int offset
;
1922 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1923 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1927 static unw_rec_list
*
1928 output_preds_sprel (offset
)
1929 unsigned int offset
;
1931 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1932 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1936 static unw_rec_list
*
1937 output_fr_mem (mask
)
1940 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1941 ptr
->r
.record
.p
.rmask
= mask
;
1945 static unw_rec_list
*
1946 output_frgr_mem (gr_mask
, fr_mask
)
1947 unsigned int gr_mask
;
1948 unsigned int fr_mask
;
1950 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1951 ptr
->r
.record
.p
.grmask
= gr_mask
;
1952 ptr
->r
.record
.p
.frmask
= fr_mask
;
1956 static unw_rec_list
*
1957 output_gr_gr (mask
, reg
)
1961 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1962 ptr
->r
.record
.p
.grmask
= mask
;
1963 ptr
->r
.record
.p
.gr
= reg
;
1967 static unw_rec_list
*
1968 output_gr_mem (mask
)
1971 unw_rec_list
*ptr
= alloc_record (gr_mem
);
1972 ptr
->r
.record
.p
.rmask
= mask
;
1976 static unw_rec_list
*
1977 output_br_mem (unsigned int mask
)
1979 unw_rec_list
*ptr
= alloc_record (br_mem
);
1980 ptr
->r
.record
.p
.brmask
= mask
;
1984 static unw_rec_list
*
1985 output_br_gr (save_mask
, reg
)
1986 unsigned int save_mask
;
1989 unw_rec_list
*ptr
= alloc_record (br_gr
);
1990 ptr
->r
.record
.p
.brmask
= save_mask
;
1991 ptr
->r
.record
.p
.gr
= reg
;
1995 static unw_rec_list
*
1996 output_spill_base (offset
)
1997 unsigned int offset
;
1999 unw_rec_list
*ptr
= alloc_record (spill_base
);
2000 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2004 static unw_rec_list
*
2007 unw_rec_list
*ptr
= alloc_record (unat_when
);
2011 static unw_rec_list
*
2015 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2016 ptr
->r
.record
.p
.gr
= gr
;
2020 static unw_rec_list
*
2021 output_unat_psprel (offset
)
2022 unsigned int offset
;
2024 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2025 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2029 static unw_rec_list
*
2030 output_unat_sprel (offset
)
2031 unsigned int offset
;
2033 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2034 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2038 static unw_rec_list
*
2041 unw_rec_list
*ptr
= alloc_record (lc_when
);
2045 static unw_rec_list
*
2049 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2050 ptr
->r
.record
.p
.gr
= gr
;
2054 static unw_rec_list
*
2055 output_lc_psprel (offset
)
2056 unsigned int offset
;
2058 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2059 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2063 static unw_rec_list
*
2064 output_lc_sprel (offset
)
2065 unsigned int offset
;
2067 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2068 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2072 static unw_rec_list
*
2075 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2079 static unw_rec_list
*
2083 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2084 ptr
->r
.record
.p
.gr
= gr
;
2088 static unw_rec_list
*
2089 output_fpsr_psprel (offset
)
2090 unsigned int offset
;
2092 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2093 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2097 static unw_rec_list
*
2098 output_fpsr_sprel (offset
)
2099 unsigned int offset
;
2101 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2102 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2106 static unw_rec_list
*
2107 output_priunat_when_gr ()
2109 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2113 static unw_rec_list
*
2114 output_priunat_when_mem ()
2116 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2120 static unw_rec_list
*
2121 output_priunat_gr (gr
)
2124 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2125 ptr
->r
.record
.p
.gr
= gr
;
2129 static unw_rec_list
*
2130 output_priunat_psprel (offset
)
2131 unsigned int offset
;
2133 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2134 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2138 static unw_rec_list
*
2139 output_priunat_sprel (offset
)
2140 unsigned int offset
;
2142 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2143 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2147 static unw_rec_list
*
2150 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2154 static unw_rec_list
*
2158 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2159 ptr
->r
.record
.p
.gr
= gr
;
2163 static unw_rec_list
*
2164 output_bsp_psprel (offset
)
2165 unsigned int offset
;
2167 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2168 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2172 static unw_rec_list
*
2173 output_bsp_sprel (offset
)
2174 unsigned int offset
;
2176 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2177 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2181 static unw_rec_list
*
2182 output_bspstore_when ()
2184 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2188 static unw_rec_list
*
2189 output_bspstore_gr (gr
)
2192 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2193 ptr
->r
.record
.p
.gr
= gr
;
2197 static unw_rec_list
*
2198 output_bspstore_psprel (offset
)
2199 unsigned int offset
;
2201 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2202 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2206 static unw_rec_list
*
2207 output_bspstore_sprel (offset
)
2208 unsigned int offset
;
2210 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2211 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2215 static unw_rec_list
*
2218 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2222 static unw_rec_list
*
2226 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2227 ptr
->r
.record
.p
.gr
= gr
;
2231 static unw_rec_list
*
2232 output_rnat_psprel (offset
)
2233 unsigned int offset
;
2235 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2236 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2240 static unw_rec_list
*
2241 output_rnat_sprel (offset
)
2242 unsigned int offset
;
2244 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2245 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2249 static unw_rec_list
*
2250 output_unwabi (abi
, context
)
2252 unsigned long context
;
2254 unw_rec_list
*ptr
= alloc_record (unwabi
);
2255 ptr
->r
.record
.p
.abi
= abi
;
2256 ptr
->r
.record
.p
.context
= context
;
2260 static unw_rec_list
*
2261 output_epilogue (unsigned long ecount
)
2263 unw_rec_list
*ptr
= alloc_record (epilogue
);
2264 ptr
->r
.record
.b
.ecount
= ecount
;
2268 static unw_rec_list
*
2269 output_label_state (unsigned long label
)
2271 unw_rec_list
*ptr
= alloc_record (label_state
);
2272 ptr
->r
.record
.b
.label
= label
;
2276 static unw_rec_list
*
2277 output_copy_state (unsigned long label
)
2279 unw_rec_list
*ptr
= alloc_record (copy_state
);
2280 ptr
->r
.record
.b
.label
= label
;
2284 static unw_rec_list
*
2285 output_spill_psprel (ab
, reg
, offset
, predicate
)
2288 unsigned int offset
;
2289 unsigned int predicate
;
2291 unw_rec_list
*ptr
= alloc_record (predicate
? spill_psprel_p
: spill_psprel
);
2292 ptr
->r
.record
.x
.ab
= ab
;
2293 ptr
->r
.record
.x
.reg
= reg
;
2294 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2295 ptr
->r
.record
.x
.qp
= predicate
;
2299 static unw_rec_list
*
2300 output_spill_sprel (ab
, reg
, offset
, predicate
)
2303 unsigned int offset
;
2304 unsigned int predicate
;
2306 unw_rec_list
*ptr
= alloc_record (predicate
? spill_sprel_p
: spill_sprel
);
2307 ptr
->r
.record
.x
.ab
= ab
;
2308 ptr
->r
.record
.x
.reg
= reg
;
2309 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2310 ptr
->r
.record
.x
.qp
= predicate
;
2314 static unw_rec_list
*
2315 output_spill_reg (ab
, reg
, targ_reg
, xy
, predicate
)
2318 unsigned int targ_reg
;
2320 unsigned int predicate
;
2322 unw_rec_list
*ptr
= alloc_record (predicate
? spill_reg_p
: spill_reg
);
2323 ptr
->r
.record
.x
.ab
= ab
;
2324 ptr
->r
.record
.x
.reg
= reg
;
2325 ptr
->r
.record
.x
.treg
= targ_reg
;
2326 ptr
->r
.record
.x
.xy
= xy
;
2327 ptr
->r
.record
.x
.qp
= predicate
;
2331 /* Given a unw_rec_list process the correct format with the
2332 specified function. */
2335 process_one_record (ptr
, f
)
2339 unsigned long fr_mask
, gr_mask
;
2341 switch (ptr
->r
.type
)
2343 /* This is a dummy record that takes up no space in the output. */
2351 /* These are taken care of by prologue/prologue_gr. */
2356 if (ptr
->r
.type
== prologue_gr
)
2357 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2358 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2360 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2362 /* Output descriptor(s) for union of register spills (if any). */
2363 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2364 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2367 if ((fr_mask
& ~0xfUL
) == 0)
2368 output_P6_format (f
, fr_mem
, fr_mask
);
2371 output_P5_format (f
, gr_mask
, fr_mask
);
2376 output_P6_format (f
, gr_mem
, gr_mask
);
2377 if (ptr
->r
.record
.r
.mask
.br_mem
)
2378 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2380 /* output imask descriptor if necessary: */
2381 if (ptr
->r
.record
.r
.mask
.i
)
2382 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2383 ptr
->r
.record
.r
.imask_size
);
2387 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2391 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2392 ptr
->r
.record
.p
.size
);
2405 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.gr
);
2408 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.br
);
2411 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.spoff
, 0);
2419 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2428 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
, 0);
2438 case bspstore_sprel
:
2440 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.spoff
);
2443 output_P9_format (f
, ptr
->r
.record
.p
.grmask
, ptr
->r
.record
.p
.gr
);
2446 output_P2_format (f
, ptr
->r
.record
.p
.brmask
, ptr
->r
.record
.p
.gr
);
2449 as_bad ("spill_mask record unimplemented.");
2451 case priunat_when_gr
:
2452 case priunat_when_mem
:
2456 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2458 case priunat_psprel
:
2460 case bspstore_psprel
:
2462 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
);
2465 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2468 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2472 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2475 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2476 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2477 ptr
->r
.record
.x
.pspoff
);
2480 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2481 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2482 ptr
->r
.record
.x
.spoff
);
2485 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2486 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2487 ptr
->r
.record
.x
.treg
, ptr
->r
.record
.x
.t
);
2489 case spill_psprel_p
:
2490 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2491 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2492 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.pspoff
);
2495 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2496 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2497 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.spoff
);
2500 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2501 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2502 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.treg
,
2506 as_bad ("record_type_not_valid");
2511 /* Given a unw_rec_list list, process all the records with
2512 the specified function. */
2514 process_unw_records (list
, f
)
2519 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2520 process_one_record (ptr
, f
);
2523 /* Determine the size of a record list in bytes. */
2525 calc_record_size (list
)
2529 process_unw_records (list
, count_output
);
2533 /* Return the number of bits set in the input value.
2534 Perhaps this has a better place... */
2535 #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2536 # define popcount __builtin_popcount
2539 popcount (unsigned x
)
2541 static const unsigned char popcnt
[16] =
2549 if (x
< NELEMS (popcnt
))
2551 return popcnt
[x
% NELEMS (popcnt
)] + popcount (x
/ NELEMS (popcnt
));
2555 /* Update IMASK bitmask to reflect the fact that one or more registers
2556 of type TYPE are saved starting at instruction with index T. If N
2557 bits are set in REGMASK, it is assumed that instructions T through
2558 T+N-1 save these registers.
2562 1: instruction saves next fp reg
2563 2: instruction saves next general reg
2564 3: instruction saves next branch reg */
2566 set_imask (region
, regmask
, t
, type
)
2567 unw_rec_list
*region
;
2568 unsigned long regmask
;
2572 unsigned char *imask
;
2573 unsigned long imask_size
;
2577 imask
= region
->r
.record
.r
.mask
.i
;
2578 imask_size
= region
->r
.record
.r
.imask_size
;
2581 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2582 imask
= xmalloc (imask_size
);
2583 memset (imask
, 0, imask_size
);
2585 region
->r
.record
.r
.imask_size
= imask_size
;
2586 region
->r
.record
.r
.mask
.i
= imask
;
2590 pos
= 2 * (3 - t
% 4);
2593 if (i
>= imask_size
)
2595 as_bad ("Ignoring attempt to spill beyond end of region");
2599 imask
[i
] |= (type
& 0x3) << pos
;
2601 regmask
&= (regmask
- 1);
2611 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2612 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2613 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2617 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
, before_relax
)
2618 unsigned long slot_addr
;
2620 unsigned long first_addr
;
2624 unsigned long index
= 0;
2626 /* First time we are called, the initial address and frag are invalid. */
2627 if (first_addr
== 0)
2630 /* If the two addresses are in different frags, then we need to add in
2631 the remaining size of this frag, and then the entire size of intermediate
2633 while (slot_frag
!= first_frag
)
2635 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2639 /* We can get the final addresses only during and after
2641 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2642 index
+= 3 * ((first_frag
->fr_next
->fr_address
2643 - first_frag
->fr_address
2644 - first_frag
->fr_fix
) >> 4);
2647 /* We don't know what the final addresses will be. We try our
2648 best to estimate. */
2649 switch (first_frag
->fr_type
)
2655 as_fatal ("only constant space allocation is supported");
2661 /* Take alignment into account. Assume the worst case
2662 before relaxation. */
2663 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2667 if (first_frag
->fr_symbol
)
2669 as_fatal ("only constant offsets are supported");
2673 index
+= 3 * (first_frag
->fr_offset
>> 4);
2677 /* Add in the full size of the frag converted to instruction slots. */
2678 index
+= 3 * (first_frag
->fr_fix
>> 4);
2679 /* Subtract away the initial part before first_addr. */
2680 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2681 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2683 /* Move to the beginning of the next frag. */
2684 first_frag
= first_frag
->fr_next
;
2685 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2687 /* This can happen if there is section switching in the middle of a
2688 function, causing the frag chain for the function to be broken. */
2689 if (first_frag
== NULL
)
2691 /* We get six warnings for one problem, because of the loop in
2692 fixup_unw_records, and because fixup_unw_records is called 3
2693 times: once before creating the variant frag, once to estimate
2694 its size, and once to relax it. This is unreasonable, so we use
2695 a static var to make sure we only emit the warning once. */
2696 static int warned
= 0;
2700 as_warn ("Corrupted unwind info due to unsupported section switching");
2708 /* Add in the used part of the last frag. */
2709 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2710 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2714 /* Optimize unwind record directives. */
2716 static unw_rec_list
*
2717 optimize_unw_records (list
)
2723 /* If the only unwind record is ".prologue" or ".prologue" followed
2724 by ".body", then we can optimize the unwind directives away. */
2725 if (list
->r
.type
== prologue
2726 && (list
->next
->r
.type
== endp
2727 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2733 /* Given a complete record list, process any records which have
2734 unresolved fields, (ie length counts for a prologue). After
2735 this has been run, all necessary information should be available
2736 within each record to generate an image. */
2739 fixup_unw_records (list
, before_relax
)
2743 unw_rec_list
*ptr
, *region
= 0;
2744 unsigned long first_addr
= 0, rlen
= 0, t
;
2745 fragS
*first_frag
= 0;
2747 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2749 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2750 as_bad (" Insn slot not set in unwind record.");
2751 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2752 first_addr
, first_frag
, before_relax
);
2753 switch (ptr
->r
.type
)
2761 unsigned long last_addr
= 0;
2762 fragS
*last_frag
= NULL
;
2764 first_addr
= ptr
->slot_number
;
2765 first_frag
= ptr
->slot_frag
;
2766 /* Find either the next body/prologue start, or the end of
2767 the function, and determine the size of the region. */
2768 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2769 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2770 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2772 last_addr
= last
->slot_number
;
2773 last_frag
= last
->slot_frag
;
2776 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2778 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2779 if (ptr
->r
.type
== body
)
2780 /* End of region. */
2788 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2790 /* This happens when a memory-stack-less procedure uses a
2791 ".restore sp" directive at the end of a region to pop
2793 ptr
->r
.record
.b
.t
= 0;
2804 case priunat_when_gr
:
2805 case priunat_when_mem
:
2809 ptr
->r
.record
.p
.t
= t
;
2817 case spill_psprel_p
:
2818 ptr
->r
.record
.x
.t
= t
;
2824 as_bad ("frgr_mem record before region record!");
2827 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2828 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2829 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2830 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2835 as_bad ("fr_mem record before region record!");
2838 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.rmask
;
2839 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 1);
2844 as_bad ("gr_mem record before region record!");
2847 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.rmask
;
2848 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 2);
2853 as_bad ("br_mem record before region record!");
2856 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2857 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2863 as_bad ("gr_gr record before region record!");
2866 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2871 as_bad ("br_gr record before region record!");
2874 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2883 /* Estimate the size of a frag before relaxing. We only have one type of frag
2884 to handle here, which is the unwind info frag. */
2887 ia64_estimate_size_before_relax (fragS
*frag
,
2888 asection
*segtype ATTRIBUTE_UNUSED
)
2893 /* ??? This code is identical to the first part of ia64_convert_frag. */
2894 list
= (unw_rec_list
*) frag
->fr_opcode
;
2895 fixup_unw_records (list
, 0);
2897 len
= calc_record_size (list
);
2898 /* pad to pointer-size boundary. */
2899 pad
= len
% md
.pointer_size
;
2901 len
+= md
.pointer_size
- pad
;
2902 /* Add 8 for the header. */
2904 /* Add a pointer for the personality offset. */
2905 if (frag
->fr_offset
)
2906 size
+= md
.pointer_size
;
2908 /* fr_var carries the max_chars that we created the fragment with.
2909 We must, of course, have allocated enough memory earlier. */
2910 assert (frag
->fr_var
>= size
);
2912 return frag
->fr_fix
+ size
;
2915 /* This function converts a rs_machine_dependent variant frag into a
2916 normal fill frag with the unwind image from the the record list. */
2918 ia64_convert_frag (fragS
*frag
)
2924 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2925 list
= (unw_rec_list
*) frag
->fr_opcode
;
2926 fixup_unw_records (list
, 0);
2928 len
= calc_record_size (list
);
2929 /* pad to pointer-size boundary. */
2930 pad
= len
% md
.pointer_size
;
2932 len
+= md
.pointer_size
- pad
;
2933 /* Add 8 for the header. */
2935 /* Add a pointer for the personality offset. */
2936 if (frag
->fr_offset
)
2937 size
+= md
.pointer_size
;
2939 /* fr_var carries the max_chars that we created the fragment with.
2940 We must, of course, have allocated enough memory earlier. */
2941 assert (frag
->fr_var
>= size
);
2943 /* Initialize the header area. fr_offset is initialized with
2944 unwind.personality_routine. */
2945 if (frag
->fr_offset
)
2947 if (md
.flags
& EF_IA_64_ABI64
)
2948 flag_value
= (bfd_vma
) 3 << 32;
2950 /* 32-bit unwind info block. */
2951 flag_value
= (bfd_vma
) 0x1003 << 32;
2956 md_number_to_chars (frag
->fr_literal
,
2957 (((bfd_vma
) 1 << 48) /* Version. */
2958 | flag_value
/* U & E handler flags. */
2959 | (len
/ md
.pointer_size
)), /* Length. */
2962 /* Skip the header. */
2963 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
2964 process_unw_records (list
, output_vbyte_mem
);
2966 /* Fill the padding bytes with zeros. */
2968 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
2969 md
.pointer_size
- pad
);
2971 frag
->fr_fix
+= size
;
2972 frag
->fr_type
= rs_fill
;
2974 frag
->fr_offset
= 0;
2978 parse_predicate_and_operand (e
, qp
, po
)
2983 int sep
= parse_operand (e
, ',');
2985 *qp
= e
->X_add_number
- REG_P
;
2986 if (e
->X_op
!= O_register
|| *qp
> 63)
2988 as_bad ("First operand to .%s must be a predicate", po
);
2992 as_warn ("Pointless use of p0 as first operand to .%s", po
);
2994 sep
= parse_operand (e
, ',');
3001 convert_expr_to_ab_reg (e
, ab
, regp
, po
, n
)
3002 const expressionS
*e
;
3008 unsigned int reg
= e
->X_add_number
;
3010 *ab
= *regp
= 0; /* Anything valid is good here. */
3012 if (e
->X_op
!= O_register
)
3013 reg
= REG_GR
; /* Anything invalid is good here. */
3015 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
3018 *regp
= reg
- REG_GR
;
3020 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
3021 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
3024 *regp
= reg
- REG_FR
;
3026 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3029 *regp
= reg
- REG_BR
;
3036 case REG_PR
: *regp
= 0; break;
3037 case REG_PSP
: *regp
= 1; break;
3038 case REG_PRIUNAT
: *regp
= 2; break;
3039 case REG_BR
+ 0: *regp
= 3; break;
3040 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3041 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3042 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3043 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3044 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3045 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3046 case REG_AR
+ AR_LC
: *regp
= 10; break;
3049 as_bad ("Operand %d to .%s must be a preserved register", n
, po
);
3056 convert_expr_to_xy_reg (e
, xy
, regp
, po
, n
)
3057 const expressionS
*e
;
3063 unsigned int reg
= e
->X_add_number
;
3065 *xy
= *regp
= 0; /* Anything valid is good here. */
3067 if (e
->X_op
!= O_register
)
3068 reg
= REG_GR
; /* Anything invalid is good here. */
3070 if (reg
>= (REG_GR
+ 1) && reg
<= (REG_GR
+ 127))
3073 *regp
= reg
- REG_GR
;
3075 else if (reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 127))
3078 *regp
= reg
- REG_FR
;
3080 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3083 *regp
= reg
- REG_BR
;
3086 as_bad ("Operand %d to .%s must be a writable register", n
, po
);
3092 /* The current frag is an alignment frag. */
3093 align_frag
= frag_now
;
3094 s_align_bytes (arg
);
3099 int dummy ATTRIBUTE_UNUSED
;
3106 if (is_it_end_of_statement ())
3108 radix
= input_line_pointer
;
3109 ch
= get_symbol_end ();
3110 ia64_canonicalize_symbol_name (radix
);
3111 if (strcasecmp (radix
, "C"))
3112 as_bad ("Radix `%s' unsupported or invalid", radix
);
3113 *input_line_pointer
= ch
;
3114 demand_empty_rest_of_line ();
3117 /* Helper function for .loc directives. If the assembler is not generating
3118 line number info, then we need to remember which instructions have a .loc
3119 directive, and only call dwarf2_gen_line_info for those instructions. */
3124 CURR_SLOT
.loc_directive_seen
= 1;
3125 dwarf2_directive_loc (x
);
3128 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3130 dot_special_section (which
)
3133 set_section ((char *) special_section_name
[which
]);
3136 /* Return -1 for warning and 0 for error. */
3139 unwind_diagnostic (const char * region
, const char *directive
)
3141 if (md
.unwind_check
== unwind_check_warning
)
3143 as_warn (".%s outside of %s", directive
, region
);
3148 as_bad (".%s outside of %s", directive
, region
);
3149 ignore_rest_of_line ();
3154 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3155 a procedure but the unwind directive check is set to warning, 0 if
3156 a directive isn't in a procedure and the unwind directive check is set
3160 in_procedure (const char *directive
)
3162 if (unwind
.proc_pending
.sym
3163 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3165 return unwind_diagnostic ("procedure", directive
);
3168 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3169 a prologue but the unwind directive check is set to warning, 0 if
3170 a directive isn't in a prologue and the unwind directive check is set
3174 in_prologue (const char *directive
)
3176 int in
= in_procedure (directive
);
3179 /* We are in a procedure. Check if we are in a prologue. */
3180 if (unwind
.prologue
)
3182 /* We only want to issue one message. */
3184 return unwind_diagnostic ("prologue", directive
);
3191 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3192 a body but the unwind directive check is set to warning, 0 if
3193 a directive isn't in a body and the unwind directive check is set
3197 in_body (const char *directive
)
3199 int in
= in_procedure (directive
);
3202 /* We are in a procedure. Check if we are in a body. */
3205 /* We only want to issue one message. */
3207 return unwind_diagnostic ("body region", directive
);
3215 add_unwind_entry (ptr
, sep
)
3222 unwind
.tail
->next
= ptr
;
3227 /* The current entry can in fact be a chain of unwind entries. */
3228 if (unwind
.current_entry
== NULL
)
3229 unwind
.current_entry
= ptr
;
3232 /* The current entry can in fact be a chain of unwind entries. */
3233 if (unwind
.current_entry
== NULL
)
3234 unwind
.current_entry
= ptr
;
3238 /* Parse a tag permitted for the current directive. */
3242 ch
= get_symbol_end ();
3243 /* FIXME: For now, just issue a warning that this isn't implemented. */
3250 as_warn ("Tags on unwind pseudo-ops aren't supported, yet");
3253 *input_line_pointer
= ch
;
3255 if (sep
!= NOT_A_CHAR
)
3256 demand_empty_rest_of_line ();
3261 int dummy ATTRIBUTE_UNUSED
;
3266 if (!in_prologue ("fframe"))
3269 sep
= parse_operand (&e
, ',');
3271 if (e
.X_op
!= O_constant
)
3273 as_bad ("First operand to .fframe must be a constant");
3276 add_unwind_entry (output_mem_stack_f (e
.X_add_number
), sep
);
3281 int dummy ATTRIBUTE_UNUSED
;
3287 if (!in_prologue ("vframe"))
3290 sep
= parse_operand (&e
, ',');
3291 reg
= e
.X_add_number
- REG_GR
;
3292 if (e
.X_op
!= O_register
|| reg
> 127)
3294 as_bad ("First operand to .vframe must be a general register");
3297 add_unwind_entry (output_mem_stack_v (), sep
);
3298 if (! (unwind
.prologue_mask
& 2))
3299 add_unwind_entry (output_psp_gr (reg
), NOT_A_CHAR
);
3300 else if (reg
!= unwind
.prologue_gr
3301 + (unsigned) popcount (unwind
.prologue_mask
& (-2 << 1)))
3302 as_warn ("Operand of .vframe contradicts .prologue");
3313 as_warn (".vframepsp is meaningless, assuming .vframesp was meant");
3315 if (!in_prologue ("vframesp"))
3318 sep
= parse_operand (&e
, ',');
3319 if (e
.X_op
!= O_constant
)
3321 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3324 add_unwind_entry (output_mem_stack_v (), sep
);
3325 add_unwind_entry (output_psp_sprel (e
.X_add_number
), NOT_A_CHAR
);
3330 int dummy ATTRIBUTE_UNUSED
;
3333 unsigned reg1
, reg2
;
3336 if (!in_prologue ("save"))
3339 sep
= parse_operand (&e1
, ',');
3341 sep
= parse_operand (&e2
, ',');
3345 reg1
= e1
.X_add_number
;
3346 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3347 if (e1
.X_op
!= O_register
)
3349 as_bad ("First operand to .save not a register");
3350 reg1
= REG_PR
; /* Anything valid is good here. */
3352 reg2
= e2
.X_add_number
- REG_GR
;
3353 if (e2
.X_op
!= O_register
|| reg2
> 127)
3355 as_bad ("Second operand to .save not a valid register");
3360 case REG_AR
+ AR_BSP
:
3361 add_unwind_entry (output_bsp_when (), sep
);
3362 add_unwind_entry (output_bsp_gr (reg2
), NOT_A_CHAR
);
3364 case REG_AR
+ AR_BSPSTORE
:
3365 add_unwind_entry (output_bspstore_when (), sep
);
3366 add_unwind_entry (output_bspstore_gr (reg2
), NOT_A_CHAR
);
3368 case REG_AR
+ AR_RNAT
:
3369 add_unwind_entry (output_rnat_when (), sep
);
3370 add_unwind_entry (output_rnat_gr (reg2
), NOT_A_CHAR
);
3372 case REG_AR
+ AR_UNAT
:
3373 add_unwind_entry (output_unat_when (), sep
);
3374 add_unwind_entry (output_unat_gr (reg2
), NOT_A_CHAR
);
3376 case REG_AR
+ AR_FPSR
:
3377 add_unwind_entry (output_fpsr_when (), sep
);
3378 add_unwind_entry (output_fpsr_gr (reg2
), NOT_A_CHAR
);
3380 case REG_AR
+ AR_PFS
:
3381 add_unwind_entry (output_pfs_when (), sep
);
3382 if (! (unwind
.prologue_mask
& 4))
3383 add_unwind_entry (output_pfs_gr (reg2
), NOT_A_CHAR
);
3384 else if (reg2
!= unwind
.prologue_gr
3385 + (unsigned) popcount (unwind
.prologue_mask
& (-4 << 1)))
3386 as_warn ("Second operand of .save contradicts .prologue");
3388 case REG_AR
+ AR_LC
:
3389 add_unwind_entry (output_lc_when (), sep
);
3390 add_unwind_entry (output_lc_gr (reg2
), NOT_A_CHAR
);
3393 add_unwind_entry (output_rp_when (), sep
);
3394 if (! (unwind
.prologue_mask
& 8))
3395 add_unwind_entry (output_rp_gr (reg2
), NOT_A_CHAR
);
3396 else if (reg2
!= unwind
.prologue_gr
)
3397 as_warn ("Second operand of .save contradicts .prologue");
3400 add_unwind_entry (output_preds_when (), sep
);
3401 if (! (unwind
.prologue_mask
& 1))
3402 add_unwind_entry (output_preds_gr (reg2
), NOT_A_CHAR
);
3403 else if (reg2
!= unwind
.prologue_gr
3404 + (unsigned) popcount (unwind
.prologue_mask
& (-1 << 1)))
3405 as_warn ("Second operand of .save contradicts .prologue");
3408 add_unwind_entry (output_priunat_when_gr (), sep
);
3409 add_unwind_entry (output_priunat_gr (reg2
), NOT_A_CHAR
);
3412 as_bad ("First operand to .save not a valid register");
3413 add_unwind_entry (NULL
, sep
);
3420 int dummy ATTRIBUTE_UNUSED
;
3423 unsigned long ecount
; /* # of _additional_ regions to pop */
3426 if (!in_body ("restore"))
3429 sep
= parse_operand (&e1
, ',');
3430 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3431 as_bad ("First operand to .restore must be stack pointer (sp)");
3437 sep
= parse_operand (&e2
, ',');
3438 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3440 as_bad ("Second operand to .restore must be a constant >= 0");
3441 e2
.X_add_number
= 0;
3443 ecount
= e2
.X_add_number
;
3446 ecount
= unwind
.prologue_count
- 1;
3448 if (ecount
>= unwind
.prologue_count
)
3450 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3451 ecount
+ 1, unwind
.prologue_count
);
3455 add_unwind_entry (output_epilogue (ecount
), sep
);
3457 if (ecount
< unwind
.prologue_count
)
3458 unwind
.prologue_count
-= ecount
+ 1;
3460 unwind
.prologue_count
= 0;
3464 dot_restorereg (pred
)
3467 unsigned int qp
, ab
, reg
;
3470 const char * const po
= pred
? "restorereg.p" : "restorereg";
3472 if (!in_procedure (po
))
3476 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
3479 sep
= parse_operand (&e
, ',');
3482 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
3484 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0, qp
), sep
);
3487 static char *special_linkonce_name
[] =
3489 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3493 start_unwind_section (const segT text_seg
, int sec_index
)
3496 Use a slightly ugly scheme to derive the unwind section names from
3497 the text section name:
3499 text sect. unwind table sect.
3500 name: name: comments:
3501 ---------- ----------------- --------------------------------
3503 .text.foo .IA_64.unwind.text.foo
3504 .foo .IA_64.unwind.foo
3506 .gnu.linkonce.ia64unw.foo
3507 _info .IA_64.unwind_info gas issues error message (ditto)
3508 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3510 This mapping is done so that:
3512 (a) An object file with unwind info only in .text will use
3513 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3514 This follows the letter of the ABI and also ensures backwards
3515 compatibility with older toolchains.
3517 (b) An object file with unwind info in multiple text sections
3518 will use separate unwind sections for each text section.
3519 This allows us to properly set the "sh_info" and "sh_link"
3520 fields in SHT_IA_64_UNWIND as required by the ABI and also
3521 lets GNU ld support programs with multiple segments
3522 containing unwind info (as might be the case for certain
3523 embedded applications).
3525 (c) An error is issued if there would be a name clash.
3528 const char *text_name
, *sec_text_name
;
3530 const char *prefix
= special_section_name
[sec_index
];
3532 size_t prefix_len
, suffix_len
, sec_name_len
;
3534 sec_text_name
= segment_name (text_seg
);
3535 text_name
= sec_text_name
;
3536 if (strncmp (text_name
, "_info", 5) == 0)
3538 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3540 ignore_rest_of_line ();
3543 if (strcmp (text_name
, ".text") == 0)
3546 /* Build the unwind section name by appending the (possibly stripped)
3547 text section name to the unwind prefix. */
3549 if (strncmp (text_name
, ".gnu.linkonce.t.",
3550 sizeof (".gnu.linkonce.t.") - 1) == 0)
3552 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3553 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3556 prefix_len
= strlen (prefix
);
3557 suffix_len
= strlen (suffix
);
3558 sec_name_len
= prefix_len
+ suffix_len
;
3559 sec_name
= alloca (sec_name_len
+ 1);
3560 memcpy (sec_name
, prefix
, prefix_len
);
3561 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3562 sec_name
[sec_name_len
] = '\0';
3564 /* Handle COMDAT group. */
3565 if ((text_seg
->flags
& SEC_LINK_ONCE
) != 0
3566 && (elf_section_flags (text_seg
) & SHF_GROUP
) != 0)
3569 size_t len
, group_name_len
;
3570 const char *group_name
= elf_group_name (text_seg
);
3572 if (group_name
== NULL
)
3574 as_bad ("Group section `%s' has no group signature",
3576 ignore_rest_of_line ();
3579 /* We have to construct a fake section directive. */
3580 group_name_len
= strlen (group_name
);
3582 + 16 /* ,"aG",@progbits, */
3583 + group_name_len
/* ,group_name */
3586 section
= alloca (len
+ 1);
3587 memcpy (section
, sec_name
, sec_name_len
);
3588 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3589 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3590 memcpy (section
+ len
- 7, ",comdat", 7);
3591 section
[len
] = '\0';
3592 set_section (section
);
3596 set_section (sec_name
);
3597 bfd_set_section_flags (stdoutput
, now_seg
,
3598 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3601 elf_linked_to_section (now_seg
) = text_seg
;
3605 generate_unwind_image (const segT text_seg
)
3610 /* Mark the end of the unwind info, so that we can compute the size of the
3611 last unwind region. */
3612 add_unwind_entry (output_endp (), NOT_A_CHAR
);
3614 /* Force out pending instructions, to make sure all unwind records have
3615 a valid slot_number field. */
3616 ia64_flush_insns ();
3618 /* Generate the unwind record. */
3619 list
= optimize_unw_records (unwind
.list
);
3620 fixup_unw_records (list
, 1);
3621 size
= calc_record_size (list
);
3623 if (size
> 0 || unwind
.force_unwind_entry
)
3625 unwind
.force_unwind_entry
= 0;
3626 /* pad to pointer-size boundary. */
3627 pad
= size
% md
.pointer_size
;
3629 size
+= md
.pointer_size
- pad
;
3630 /* Add 8 for the header. */
3632 /* Add a pointer for the personality offset. */
3633 if (unwind
.personality_routine
)
3634 size
+= md
.pointer_size
;
3637 /* If there are unwind records, switch sections, and output the info. */
3641 bfd_reloc_code_real_type reloc
;
3643 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3645 /* Make sure the section has 4 byte alignment for ILP32 and
3646 8 byte alignment for LP64. */
3647 frag_align (md
.pointer_size_shift
, 0, 0);
3648 record_alignment (now_seg
, md
.pointer_size_shift
);
3650 /* Set expression which points to start of unwind descriptor area. */
3651 unwind
.info
= expr_build_dot ();
3653 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3654 (offsetT
) (long) unwind
.personality_routine
,
3657 /* Add the personality address to the image. */
3658 if (unwind
.personality_routine
!= 0)
3660 exp
.X_op
= O_symbol
;
3661 exp
.X_add_symbol
= unwind
.personality_routine
;
3662 exp
.X_add_number
= 0;
3664 if (md
.flags
& EF_IA_64_BE
)
3666 if (md
.flags
& EF_IA_64_ABI64
)
3667 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3669 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3673 if (md
.flags
& EF_IA_64_ABI64
)
3674 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3676 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3679 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3680 md
.pointer_size
, &exp
, 0, reloc
);
3681 unwind
.personality_routine
= 0;
3685 free_saved_prologue_counts ();
3686 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3690 dot_handlerdata (dummy
)
3691 int dummy ATTRIBUTE_UNUSED
;
3693 if (!in_procedure ("handlerdata"))
3695 unwind
.force_unwind_entry
= 1;
3697 /* Remember which segment we're in so we can switch back after .endp */
3698 unwind
.saved_text_seg
= now_seg
;
3699 unwind
.saved_text_subseg
= now_subseg
;
3701 /* Generate unwind info into unwind-info section and then leave that
3702 section as the currently active one so dataXX directives go into
3703 the language specific data area of the unwind info block. */
3704 generate_unwind_image (now_seg
);
3705 demand_empty_rest_of_line ();
3709 dot_unwentry (dummy
)
3710 int dummy ATTRIBUTE_UNUSED
;
3712 if (!in_procedure ("unwentry"))
3714 unwind
.force_unwind_entry
= 1;
3715 demand_empty_rest_of_line ();
3720 int dummy ATTRIBUTE_UNUSED
;
3725 if (!in_prologue ("altrp"))
3728 parse_operand (&e
, 0);
3729 reg
= e
.X_add_number
- REG_BR
;
3730 if (e
.X_op
!= O_register
|| reg
> 7)
3732 as_bad ("First operand to .altrp not a valid branch register");
3735 add_unwind_entry (output_rp_br (reg
), 0);
3739 dot_savemem (psprel
)
3745 const char * const po
= psprel
? "savepsp" : "savesp";
3747 if (!in_prologue (po
))
3750 sep
= parse_operand (&e1
, ',');
3752 sep
= parse_operand (&e2
, ',');
3756 reg1
= e1
.X_add_number
;
3757 val
= e2
.X_add_number
;
3759 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3760 if (e1
.X_op
!= O_register
)
3762 as_bad ("First operand to .%s not a register", po
);
3763 reg1
= REG_PR
; /* Anything valid is good here. */
3765 if (e2
.X_op
!= O_constant
)
3767 as_bad ("Second operand to .%s not a constant", po
);
3773 case REG_AR
+ AR_BSP
:
3774 add_unwind_entry (output_bsp_when (), sep
);
3775 add_unwind_entry ((psprel
3777 : output_bsp_sprel
) (val
), NOT_A_CHAR
);
3779 case REG_AR
+ AR_BSPSTORE
:
3780 add_unwind_entry (output_bspstore_when (), sep
);
3781 add_unwind_entry ((psprel
3782 ? output_bspstore_psprel
3783 : output_bspstore_sprel
) (val
), NOT_A_CHAR
);
3785 case REG_AR
+ AR_RNAT
:
3786 add_unwind_entry (output_rnat_when (), sep
);
3787 add_unwind_entry ((psprel
3788 ? output_rnat_psprel
3789 : output_rnat_sprel
) (val
), NOT_A_CHAR
);
3791 case REG_AR
+ AR_UNAT
:
3792 add_unwind_entry (output_unat_when (), sep
);
3793 add_unwind_entry ((psprel
3794 ? output_unat_psprel
3795 : output_unat_sprel
) (val
), NOT_A_CHAR
);
3797 case REG_AR
+ AR_FPSR
:
3798 add_unwind_entry (output_fpsr_when (), sep
);
3799 add_unwind_entry ((psprel
3800 ? output_fpsr_psprel
3801 : output_fpsr_sprel
) (val
), NOT_A_CHAR
);
3803 case REG_AR
+ AR_PFS
:
3804 add_unwind_entry (output_pfs_when (), sep
);
3805 add_unwind_entry ((psprel
3807 : output_pfs_sprel
) (val
), NOT_A_CHAR
);
3809 case REG_AR
+ AR_LC
:
3810 add_unwind_entry (output_lc_when (), sep
);
3811 add_unwind_entry ((psprel
3813 : output_lc_sprel
) (val
), NOT_A_CHAR
);
3816 add_unwind_entry (output_rp_when (), sep
);
3817 add_unwind_entry ((psprel
3819 : output_rp_sprel
) (val
), NOT_A_CHAR
);
3822 add_unwind_entry (output_preds_when (), sep
);
3823 add_unwind_entry ((psprel
3824 ? output_preds_psprel
3825 : output_preds_sprel
) (val
), NOT_A_CHAR
);
3828 add_unwind_entry (output_priunat_when_mem (), sep
);
3829 add_unwind_entry ((psprel
3830 ? output_priunat_psprel
3831 : output_priunat_sprel
) (val
), NOT_A_CHAR
);
3834 as_bad ("First operand to .%s not a valid register", po
);
3835 add_unwind_entry (NULL
, sep
);
3842 int dummy ATTRIBUTE_UNUSED
;
3848 if (!in_prologue ("save.g"))
3851 sep
= parse_operand (&e
, ',');
3853 grmask
= e
.X_add_number
;
3854 if (e
.X_op
!= O_constant
3855 || e
.X_add_number
<= 0
3856 || e
.X_add_number
> 0xf)
3858 as_bad ("First operand to .save.g must be a positive 4-bit constant");
3865 int n
= popcount (grmask
);
3867 parse_operand (&e
, 0);
3868 reg
= e
.X_add_number
- REG_GR
;
3869 if (e
.X_op
!= O_register
|| reg
> 127)
3871 as_bad ("Second operand to .save.g must be a general register");
3874 else if (reg
> 128U - n
)
3876 as_bad ("Second operand to .save.g must be the first of %d general registers", n
);
3879 add_unwind_entry (output_gr_gr (grmask
, reg
), 0);
3882 add_unwind_entry (output_gr_mem (grmask
), 0);
3887 int dummy ATTRIBUTE_UNUSED
;
3891 if (!in_prologue ("save.f"))
3894 parse_operand (&e
, 0);
3896 if (e
.X_op
!= O_constant
3897 || e
.X_add_number
<= 0
3898 || e
.X_add_number
> 0xfffff)
3900 as_bad ("Operand to .save.f must be a positive 20-bit constant");
3903 add_unwind_entry (output_fr_mem (e
.X_add_number
), 0);
3908 int dummy ATTRIBUTE_UNUSED
;
3914 if (!in_prologue ("save.b"))
3917 sep
= parse_operand (&e
, ',');
3919 brmask
= e
.X_add_number
;
3920 if (e
.X_op
!= O_constant
3921 || e
.X_add_number
<= 0
3922 || e
.X_add_number
> 0x1f)
3924 as_bad ("First operand to .save.b must be a positive 5-bit constant");
3931 int n
= popcount (brmask
);
3933 parse_operand (&e
, 0);
3934 reg
= e
.X_add_number
- REG_GR
;
3935 if (e
.X_op
!= O_register
|| reg
> 127)
3937 as_bad ("Second operand to .save.b must be a general register");
3940 else if (reg
> 128U - n
)
3942 as_bad ("Second operand to .save.b must be the first of %d general registers", n
);
3945 add_unwind_entry (output_br_gr (brmask
, reg
), 0);
3948 add_unwind_entry (output_br_mem (brmask
), 0);
3953 int dummy ATTRIBUTE_UNUSED
;
3957 if (!in_prologue ("save.gf"))
3960 if (parse_operand (&e1
, ',') == ',')
3961 parse_operand (&e2
, 0);
3965 if (e1
.X_op
!= O_constant
3966 || e1
.X_add_number
< 0
3967 || e1
.X_add_number
> 0xf)
3969 as_bad ("First operand to .save.gf must be a non-negative 4-bit constant");
3971 e1
.X_add_number
= 0;
3973 if (e2
.X_op
!= O_constant
3974 || e2
.X_add_number
< 0
3975 || e2
.X_add_number
> 0xfffff)
3977 as_bad ("Second operand to .save.gf must be a non-negative 20-bit constant");
3979 e2
.X_add_number
= 0;
3981 if (e1
.X_op
== O_constant
3982 && e2
.X_op
== O_constant
3983 && e1
.X_add_number
== 0
3984 && e2
.X_add_number
== 0)
3985 as_bad ("Operands to .save.gf may not be both zero");
3987 add_unwind_entry (output_frgr_mem (e1
.X_add_number
, e2
.X_add_number
), 0);
3992 int dummy ATTRIBUTE_UNUSED
;
3996 if (!in_prologue ("spill"))
3999 parse_operand (&e
, 0);
4001 if (e
.X_op
!= O_constant
)
4003 as_bad ("Operand to .spill must be a constant");
4006 add_unwind_entry (output_spill_base (e
.X_add_number
), 0);
4014 unsigned int qp
, ab
, xy
, reg
, treg
;
4016 const char * const po
= pred
? "spillreg.p" : "spillreg";
4018 if (!in_procedure (po
))
4022 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4025 sep
= parse_operand (&e
, ',');
4028 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4031 sep
= parse_operand (&e
, ',');
4034 convert_expr_to_xy_reg (&e
, &xy
, &treg
, po
, 2 + pred
);
4036 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
, qp
), sep
);
4040 dot_spillmem (psprel
)
4044 int pred
= (psprel
< 0), sep
;
4045 unsigned int qp
, ab
, reg
;
4051 po
= psprel
? "spillpsp.p" : "spillsp.p";
4054 po
= psprel
? "spillpsp" : "spillsp";
4056 if (!in_procedure (po
))
4060 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4063 sep
= parse_operand (&e
, ',');
4066 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4069 sep
= parse_operand (&e
, ',');
4072 if (e
.X_op
!= O_constant
)
4074 as_bad ("Operand %d to .%s must be a constant", 2 + pred
, po
);
4079 add_unwind_entry (output_spill_psprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4081 add_unwind_entry (output_spill_sprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4085 get_saved_prologue_count (lbl
)
4088 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4090 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4094 return lpc
->prologue_count
;
4096 as_bad ("Missing .label_state %ld", lbl
);
4101 save_prologue_count (lbl
, count
)
4105 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4107 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4111 lpc
->prologue_count
= count
;
4114 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4116 new_lpc
->next
= unwind
.saved_prologue_counts
;
4117 new_lpc
->label_number
= lbl
;
4118 new_lpc
->prologue_count
= count
;
4119 unwind
.saved_prologue_counts
= new_lpc
;
4124 free_saved_prologue_counts ()
4126 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4127 label_prologue_count
*next
;
4136 unwind
.saved_prologue_counts
= NULL
;
4140 dot_label_state (dummy
)
4141 int dummy ATTRIBUTE_UNUSED
;
4145 if (!in_body ("label_state"))
4148 parse_operand (&e
, 0);
4149 if (e
.X_op
== O_constant
)
4150 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4153 as_bad ("Operand to .label_state must be a constant");
4156 add_unwind_entry (output_label_state (e
.X_add_number
), 0);
4160 dot_copy_state (dummy
)
4161 int dummy ATTRIBUTE_UNUSED
;
4165 if (!in_body ("copy_state"))
4168 parse_operand (&e
, 0);
4169 if (e
.X_op
== O_constant
)
4170 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4173 as_bad ("Operand to .copy_state must be a constant");
4176 add_unwind_entry (output_copy_state (e
.X_add_number
), 0);
4181 int dummy ATTRIBUTE_UNUSED
;
4186 if (!in_prologue ("unwabi"))
4189 sep
= parse_operand (&e1
, ',');
4191 parse_operand (&e2
, 0);
4195 if (e1
.X_op
!= O_constant
)
4197 as_bad ("First operand to .unwabi must be a constant");
4198 e1
.X_add_number
= 0;
4201 if (e2
.X_op
!= O_constant
)
4203 as_bad ("Second operand to .unwabi must be a constant");
4204 e2
.X_add_number
= 0;
4207 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
), 0);
4211 dot_personality (dummy
)
4212 int dummy ATTRIBUTE_UNUSED
;
4215 if (!in_procedure ("personality"))
4218 name
= input_line_pointer
;
4219 c
= get_symbol_end ();
4220 p
= input_line_pointer
;
4221 unwind
.personality_routine
= symbol_find_or_make (name
);
4222 unwind
.force_unwind_entry
= 1;
4225 demand_empty_rest_of_line ();
4230 int dummy ATTRIBUTE_UNUSED
;
4234 proc_pending
*pending
, *last_pending
;
4236 if (unwind
.proc_pending
.sym
)
4238 (md
.unwind_check
== unwind_check_warning
4240 : as_bad
) ("Missing .endp after previous .proc");
4241 while (unwind
.proc_pending
.next
)
4243 pending
= unwind
.proc_pending
.next
;
4244 unwind
.proc_pending
.next
= pending
->next
;
4248 last_pending
= NULL
;
4250 /* Parse names of main and alternate entry points and mark them as
4251 function symbols: */
4255 name
= input_line_pointer
;
4256 c
= get_symbol_end ();
4257 p
= input_line_pointer
;
4259 as_bad ("Empty argument of .proc");
4262 sym
= symbol_find_or_make (name
);
4263 if (S_IS_DEFINED (sym
))
4264 as_bad ("`%s' was already defined", name
);
4265 else if (!last_pending
)
4267 unwind
.proc_pending
.sym
= sym
;
4268 last_pending
= &unwind
.proc_pending
;
4272 pending
= xmalloc (sizeof (*pending
));
4274 last_pending
= last_pending
->next
= pending
;
4276 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4280 if (*input_line_pointer
!= ',')
4282 ++input_line_pointer
;
4286 unwind
.proc_pending
.sym
= expr_build_dot ();
4287 last_pending
= &unwind
.proc_pending
;
4289 last_pending
->next
= NULL
;
4290 demand_empty_rest_of_line ();
4293 unwind
.prologue
= 0;
4294 unwind
.prologue_count
= 0;
4297 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4298 unwind
.personality_routine
= 0;
4303 int dummy ATTRIBUTE_UNUSED
;
4305 if (!in_procedure ("body"))
4307 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4308 as_warn ("Initial .body should precede any instructions");
4310 unwind
.prologue
= 0;
4311 unwind
.prologue_mask
= 0;
4314 add_unwind_entry (output_body (), 0);
4318 dot_prologue (dummy
)
4319 int dummy ATTRIBUTE_UNUSED
;
4321 unsigned mask
= 0, grsave
= 0;
4323 if (!in_procedure ("prologue"))
4325 if (unwind
.prologue
)
4327 as_bad (".prologue within prologue");
4328 ignore_rest_of_line ();
4331 if (!unwind
.body
&& unwind
.insn
)
4332 as_warn ("Initial .prologue should precede any instructions");
4334 if (!is_it_end_of_statement ())
4337 int n
, sep
= parse_operand (&e
, ',');
4339 if (e
.X_op
!= O_constant
4340 || e
.X_add_number
< 0
4341 || e
.X_add_number
> 0xf)
4342 as_bad ("First operand to .prologue must be a positive 4-bit constant");
4343 else if (e
.X_add_number
== 0)
4344 as_warn ("Pointless use of zero first operand to .prologue");
4346 mask
= e
.X_add_number
;
4347 n
= popcount (mask
);
4350 parse_operand (&e
, 0);
4353 if (e
.X_op
== O_constant
4354 && e
.X_add_number
>= 0
4355 && e
.X_add_number
< 128)
4357 if (md
.unwind_check
== unwind_check_error
)
4358 as_warn ("Using a constant as second operand to .prologue is deprecated");
4359 grsave
= e
.X_add_number
;
4361 else if (e
.X_op
!= O_register
4362 || (grsave
= e
.X_add_number
- REG_GR
) > 127)
4364 as_bad ("Second operand to .prologue must be a general register");
4367 else if (grsave
> 128U - n
)
4369 as_bad ("Second operand to .prologue must be the first of %d general registers", n
);
4376 add_unwind_entry (output_prologue_gr (mask
, grsave
), 0);
4378 add_unwind_entry (output_prologue (), 0);
4380 unwind
.prologue
= 1;
4381 unwind
.prologue_mask
= mask
;
4382 unwind
.prologue_gr
= grsave
;
4384 ++unwind
.prologue_count
;
4389 int dummy ATTRIBUTE_UNUSED
;
4392 int bytes_per_address
;
4395 subsegT saved_subseg
;
4396 proc_pending
*pending
;
4397 int unwind_check
= md
.unwind_check
;
4399 md
.unwind_check
= unwind_check_error
;
4400 if (!in_procedure ("endp"))
4402 md
.unwind_check
= unwind_check
;
4404 if (unwind
.saved_text_seg
)
4406 saved_seg
= unwind
.saved_text_seg
;
4407 saved_subseg
= unwind
.saved_text_subseg
;
4408 unwind
.saved_text_seg
= NULL
;
4412 saved_seg
= now_seg
;
4413 saved_subseg
= now_subseg
;
4416 insn_group_break (1, 0, 0);
4418 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4420 generate_unwind_image (saved_seg
);
4422 if (unwind
.info
|| unwind
.force_unwind_entry
)
4426 subseg_set (md
.last_text_seg
, 0);
4427 proc_end
= expr_build_dot ();
4429 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4431 /* Make sure that section has 4 byte alignment for ILP32 and
4432 8 byte alignment for LP64. */
4433 record_alignment (now_seg
, md
.pointer_size_shift
);
4435 /* Need space for 3 pointers for procedure start, procedure end,
4437 memset (frag_more (3 * md
.pointer_size
), 0, 3 * md
.pointer_size
);
4438 where
= frag_now_fix () - (3 * md
.pointer_size
);
4439 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4441 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4442 e
.X_op
= O_pseudo_fixup
;
4443 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4445 if (!S_IS_LOCAL (unwind
.proc_pending
.sym
)
4446 && S_IS_DEFINED (unwind
.proc_pending
.sym
))
4447 e
.X_add_symbol
= symbol_temp_new (S_GET_SEGMENT (unwind
.proc_pending
.sym
),
4448 S_GET_VALUE (unwind
.proc_pending
.sym
),
4449 symbol_get_frag (unwind
.proc_pending
.sym
));
4451 e
.X_add_symbol
= unwind
.proc_pending
.sym
;
4452 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4454 e
.X_op
= O_pseudo_fixup
;
4455 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4457 e
.X_add_symbol
= proc_end
;
4458 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4459 bytes_per_address
, &e
);
4463 e
.X_op
= O_pseudo_fixup
;
4464 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4466 e
.X_add_symbol
= unwind
.info
;
4467 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4468 bytes_per_address
, &e
);
4471 subseg_set (saved_seg
, saved_subseg
);
4473 /* Set symbol sizes. */
4474 pending
= &unwind
.proc_pending
;
4475 if (S_GET_NAME (pending
->sym
))
4479 symbolS
*sym
= pending
->sym
;
4481 if (!S_IS_DEFINED (sym
))
4482 as_bad ("`%s' was not defined within procedure", S_GET_NAME (sym
));
4483 else if (S_GET_SIZE (sym
) == 0
4484 && symbol_get_obj (sym
)->size
== NULL
)
4486 fragS
*frag
= symbol_get_frag (sym
);
4490 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4491 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4494 symbol_get_obj (sym
)->size
=
4495 (expressionS
*) xmalloc (sizeof (expressionS
));
4496 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4497 symbol_get_obj (sym
)->size
->X_add_symbol
4498 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4499 frag_now_fix (), frag_now
);
4500 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4501 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4505 } while ((pending
= pending
->next
) != NULL
);
4508 /* Parse names of main and alternate entry points. */
4514 name
= input_line_pointer
;
4515 c
= get_symbol_end ();
4516 p
= input_line_pointer
;
4518 (md
.unwind_check
== unwind_check_warning
4520 : as_bad
) ("Empty argument of .endp");
4523 symbolS
*sym
= symbol_find (name
);
4525 for (pending
= &unwind
.proc_pending
; pending
; pending
= pending
->next
)
4527 if (sym
== pending
->sym
)
4529 pending
->sym
= NULL
;
4533 if (!sym
|| !pending
)
4534 as_warn ("`%s' was not specified with previous .proc", name
);
4538 if (*input_line_pointer
!= ',')
4540 ++input_line_pointer
;
4542 demand_empty_rest_of_line ();
4544 /* Deliberately only checking for the main entry point here; the
4545 language spec even says all arguments to .endp are ignored. */
4546 if (unwind
.proc_pending
.sym
4547 && S_GET_NAME (unwind
.proc_pending
.sym
)
4548 && strcmp (S_GET_NAME (unwind
.proc_pending
.sym
), FAKE_LABEL_NAME
))
4549 as_warn ("`%s' should be an operand to this .endp",
4550 S_GET_NAME (unwind
.proc_pending
.sym
));
4551 while (unwind
.proc_pending
.next
)
4553 pending
= unwind
.proc_pending
.next
;
4554 unwind
.proc_pending
.next
= pending
->next
;
4557 unwind
.proc_pending
.sym
= unwind
.info
= NULL
;
4561 dot_template (template)
4564 CURR_SLOT
.user_template
= template;
4569 int dummy ATTRIBUTE_UNUSED
;
4571 int ins
, locs
, outs
, rots
;
4573 if (is_it_end_of_statement ())
4574 ins
= locs
= outs
= rots
= 0;
4577 ins
= get_absolute_expression ();
4578 if (*input_line_pointer
++ != ',')
4580 locs
= get_absolute_expression ();
4581 if (*input_line_pointer
++ != ',')
4583 outs
= get_absolute_expression ();
4584 if (*input_line_pointer
++ != ',')
4586 rots
= get_absolute_expression ();
4588 set_regstack (ins
, locs
, outs
, rots
);
4592 as_bad ("Comma expected");
4593 ignore_rest_of_line ();
4600 unsigned num_regs
, num_alloced
= 0;
4601 struct dynreg
**drpp
, *dr
;
4602 int ch
, base_reg
= 0;
4608 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4609 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4610 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4614 /* First, remove existing names from hash table. */
4615 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4617 hash_delete (md
.dynreg_hash
, dr
->name
);
4618 /* FIXME: Free dr->name. */
4622 drpp
= &md
.dynreg
[type
];
4625 start
= input_line_pointer
;
4626 ch
= get_symbol_end ();
4627 len
= strlen (ia64_canonicalize_symbol_name (start
));
4628 *input_line_pointer
= ch
;
4631 if (*input_line_pointer
!= '[')
4633 as_bad ("Expected '['");
4636 ++input_line_pointer
; /* skip '[' */
4638 num_regs
= get_absolute_expression ();
4640 if (*input_line_pointer
++ != ']')
4642 as_bad ("Expected ']'");
4647 num_alloced
+= num_regs
;
4651 if (num_alloced
> md
.rot
.num_regs
)
4653 as_bad ("Used more than the declared %d rotating registers",
4659 if (num_alloced
> 96)
4661 as_bad ("Used more than the available 96 rotating registers");
4666 if (num_alloced
> 48)
4668 as_bad ("Used more than the available 48 rotating registers");
4679 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4680 memset (*drpp
, 0, sizeof (*dr
));
4683 name
= obstack_alloc (¬es
, len
+ 1);
4684 memcpy (name
, start
, len
);
4689 dr
->num_regs
= num_regs
;
4690 dr
->base
= base_reg
;
4692 base_reg
+= num_regs
;
4694 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4696 as_bad ("Attempt to redefine register set `%s'", name
);
4697 obstack_free (¬es
, name
);
4701 if (*input_line_pointer
!= ',')
4703 ++input_line_pointer
; /* skip comma */
4706 demand_empty_rest_of_line ();
4710 ignore_rest_of_line ();
4714 dot_byteorder (byteorder
)
4717 segment_info_type
*seginfo
= seg_info (now_seg
);
4719 if (byteorder
== -1)
4721 if (seginfo
->tc_segment_info_data
.endian
== 0)
4722 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4723 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4726 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4728 if (target_big_endian
!= byteorder
)
4730 target_big_endian
= byteorder
;
4731 if (target_big_endian
)
4733 ia64_number_to_chars
= number_to_chars_bigendian
;
4734 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4738 ia64_number_to_chars
= number_to_chars_littleendian
;
4739 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4746 int dummy ATTRIBUTE_UNUSED
;
4753 option
= input_line_pointer
;
4754 ch
= get_symbol_end ();
4755 if (strcmp (option
, "lsb") == 0)
4756 md
.flags
&= ~EF_IA_64_BE
;
4757 else if (strcmp (option
, "msb") == 0)
4758 md
.flags
|= EF_IA_64_BE
;
4759 else if (strcmp (option
, "abi32") == 0)
4760 md
.flags
&= ~EF_IA_64_ABI64
;
4761 else if (strcmp (option
, "abi64") == 0)
4762 md
.flags
|= EF_IA_64_ABI64
;
4764 as_bad ("Unknown psr option `%s'", option
);
4765 *input_line_pointer
= ch
;
4768 if (*input_line_pointer
!= ',')
4771 ++input_line_pointer
;
4774 demand_empty_rest_of_line ();
4779 int dummy ATTRIBUTE_UNUSED
;
4781 new_logical_line (0, get_absolute_expression ());
4782 demand_empty_rest_of_line ();
4786 cross_section (ref
, cons
, ua
)
4788 void (*cons
) PARAMS((int));
4792 int saved_auto_align
;
4793 unsigned int section_count
;
4796 start
= input_line_pointer
;
4802 name
= demand_copy_C_string (&len
);
4803 obstack_free(¬es
, name
);
4806 ignore_rest_of_line ();
4812 char c
= get_symbol_end ();
4814 if (input_line_pointer
== start
)
4816 as_bad ("Missing section name");
4817 ignore_rest_of_line ();
4820 *input_line_pointer
= c
;
4822 end
= input_line_pointer
;
4824 if (*input_line_pointer
!= ',')
4826 as_bad ("Comma expected after section name");
4827 ignore_rest_of_line ();
4831 end
= input_line_pointer
+ 1; /* skip comma */
4832 input_line_pointer
= start
;
4833 md
.keep_pending_output
= 1;
4834 section_count
= bfd_count_sections(stdoutput
);
4835 obj_elf_section (0);
4836 if (section_count
!= bfd_count_sections(stdoutput
))
4837 as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.");
4838 input_line_pointer
= end
;
4839 saved_auto_align
= md
.auto_align
;
4844 md
.auto_align
= saved_auto_align
;
4845 obj_elf_previous (0);
4846 md
.keep_pending_output
= 0;
4853 cross_section (size
, cons
, 0);
4856 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4859 stmt_float_cons (kind
)
4880 ia64_do_align (alignment
);
4888 int saved_auto_align
= md
.auto_align
;
4892 md
.auto_align
= saved_auto_align
;
4896 dot_xfloat_cons (kind
)
4899 cross_section (kind
, stmt_float_cons
, 0);
4903 dot_xstringer (zero
)
4906 cross_section (zero
, stringer
, 0);
4913 cross_section (size
, cons
, 1);
4917 dot_xfloat_cons_ua (kind
)
4920 cross_section (kind
, float_cons
, 1);
4923 /* .reg.val <regname>,value */
4927 int dummy ATTRIBUTE_UNUSED
;
4932 if (reg
.X_op
!= O_register
)
4934 as_bad (_("Register name expected"));
4935 ignore_rest_of_line ();
4937 else if (*input_line_pointer
++ != ',')
4939 as_bad (_("Comma expected"));
4940 ignore_rest_of_line ();
4944 valueT value
= get_absolute_expression ();
4945 int regno
= reg
.X_add_number
;
4946 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
4947 as_warn (_("Register value annotation ignored"));
4950 gr_values
[regno
- REG_GR
].known
= 1;
4951 gr_values
[regno
- REG_GR
].value
= value
;
4952 gr_values
[regno
- REG_GR
].path
= md
.path
;
4955 demand_empty_rest_of_line ();
4960 .serialize.instruction
4963 dot_serialize (type
)
4966 insn_group_break (0, 0, 0);
4968 instruction_serialization ();
4970 data_serialization ();
4971 insn_group_break (0, 0, 0);
4972 demand_empty_rest_of_line ();
4975 /* select dv checking mode
4980 A stop is inserted when changing modes
4987 if (md
.manual_bundling
)
4988 as_warn (_("Directive invalid within a bundle"));
4990 if (type
== 'E' || type
== 'A')
4991 md
.mode_explicitly_set
= 0;
4993 md
.mode_explicitly_set
= 1;
5000 if (md
.explicit_mode
)
5001 insn_group_break (1, 0, 0);
5002 md
.explicit_mode
= 0;
5006 if (!md
.explicit_mode
)
5007 insn_group_break (1, 0, 0);
5008 md
.explicit_mode
= 1;
5012 if (md
.explicit_mode
!= md
.default_explicit_mode
)
5013 insn_group_break (1, 0, 0);
5014 md
.explicit_mode
= md
.default_explicit_mode
;
5015 md
.mode_explicitly_set
= 0;
5026 for (regno
= 0; regno
< 64; regno
++)
5028 if (mask
& ((valueT
) 1 << regno
))
5030 fprintf (stderr
, "%s p%d", comma
, regno
);
5037 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5038 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5039 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5040 .pred.safe_across_calls p1 [, p2 [,...]]
5049 int p1
= -1, p2
= -1;
5053 if (*input_line_pointer
== '"')
5056 char *form
= demand_copy_C_string (&len
);
5058 if (strcmp (form
, "mutex") == 0)
5060 else if (strcmp (form
, "clear") == 0)
5062 else if (strcmp (form
, "imply") == 0)
5064 obstack_free (¬es
, form
);
5066 else if (*input_line_pointer
== '@')
5068 char *form
= ++input_line_pointer
;
5069 char c
= get_symbol_end();
5071 if (strcmp (form
, "mutex") == 0)
5073 else if (strcmp (form
, "clear") == 0)
5075 else if (strcmp (form
, "imply") == 0)
5077 *input_line_pointer
= c
;
5081 as_bad (_("Missing predicate relation type"));
5082 ignore_rest_of_line ();
5087 as_bad (_("Unrecognized predicate relation type"));
5088 ignore_rest_of_line ();
5091 if (*input_line_pointer
== ',')
5092 ++input_line_pointer
;
5101 expressionS pr
, *pr1
, *pr2
;
5104 if (pr
.X_op
== O_register
5105 && pr
.X_add_number
>= REG_P
5106 && pr
.X_add_number
<= REG_P
+ 63)
5108 regno
= pr
.X_add_number
- REG_P
;
5116 else if (type
!= 'i'
5117 && pr
.X_op
== O_subtract
5118 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5119 && pr1
->X_op
== O_register
5120 && pr1
->X_add_number
>= REG_P
5121 && pr1
->X_add_number
<= REG_P
+ 63
5122 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5123 && pr2
->X_op
== O_register
5124 && pr2
->X_add_number
>= REG_P
5125 && pr2
->X_add_number
<= REG_P
+ 63)
5130 regno
= pr1
->X_add_number
- REG_P
;
5131 stop
= pr2
->X_add_number
- REG_P
;
5134 as_bad (_("Bad register range"));
5135 ignore_rest_of_line ();
5138 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5139 count
+= stop
- regno
+ 1;
5143 as_bad (_("Predicate register expected"));
5144 ignore_rest_of_line ();
5148 as_warn (_("Duplicate predicate register ignored"));
5150 if (*input_line_pointer
!= ',')
5152 ++input_line_pointer
;
5161 clear_qp_mutex (mask
);
5162 clear_qp_implies (mask
, (valueT
) 0);
5165 if (count
!= 2 || p1
== -1 || p2
== -1)
5166 as_bad (_("Predicate source and target required"));
5167 else if (p1
== 0 || p2
== 0)
5168 as_bad (_("Use of p0 is not valid in this context"));
5170 add_qp_imply (p1
, p2
);
5175 as_bad (_("At least two PR arguments expected"));
5180 as_bad (_("Use of p0 is not valid in this context"));
5183 add_qp_mutex (mask
);
5186 /* note that we don't override any existing relations */
5189 as_bad (_("At least one PR argument expected"));
5194 fprintf (stderr
, "Safe across calls: ");
5195 print_prmask (mask
);
5196 fprintf (stderr
, "\n");
5198 qp_safe_across_calls
= mask
;
5201 demand_empty_rest_of_line ();
5204 /* .entry label [, label [, ...]]
5205 Hint to DV code that the given labels are to be considered entry points.
5206 Otherwise, only global labels are considered entry points. */
5210 int dummy ATTRIBUTE_UNUSED
;
5219 name
= input_line_pointer
;
5220 c
= get_symbol_end ();
5221 symbolP
= symbol_find_or_make (name
);
5223 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
5225 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5228 *input_line_pointer
= c
;
5230 c
= *input_line_pointer
;
5233 input_line_pointer
++;
5235 if (*input_line_pointer
== '\n')
5241 demand_empty_rest_of_line ();
5244 /* .mem.offset offset, base
5245 "base" is used to distinguish between offsets from a different base. */
5248 dot_mem_offset (dummy
)
5249 int dummy ATTRIBUTE_UNUSED
;
5251 md
.mem_offset
.hint
= 1;
5252 md
.mem_offset
.offset
= get_absolute_expression ();
5253 if (*input_line_pointer
!= ',')
5255 as_bad (_("Comma expected"));
5256 ignore_rest_of_line ();
5259 ++input_line_pointer
;
5260 md
.mem_offset
.base
= get_absolute_expression ();
5261 demand_empty_rest_of_line ();
5264 /* ia64-specific pseudo-ops: */
5265 const pseudo_typeS md_pseudo_table
[] =
5267 { "radix", dot_radix
, 0 },
5268 { "lcomm", s_lcomm_bytes
, 1 },
5269 { "loc", dot_loc
, 0 },
5270 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5271 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5272 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5273 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5274 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5275 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5276 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5277 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5278 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5279 { "proc", dot_proc
, 0 },
5280 { "body", dot_body
, 0 },
5281 { "prologue", dot_prologue
, 0 },
5282 { "endp", dot_endp
, 0 },
5284 { "fframe", dot_fframe
, 0 },
5285 { "vframe", dot_vframe
, 0 },
5286 { "vframesp", dot_vframesp
, 0 },
5287 { "vframepsp", dot_vframesp
, 1 },
5288 { "save", dot_save
, 0 },
5289 { "restore", dot_restore
, 0 },
5290 { "restorereg", dot_restorereg
, 0 },
5291 { "restorereg.p", dot_restorereg
, 1 },
5292 { "handlerdata", dot_handlerdata
, 0 },
5293 { "unwentry", dot_unwentry
, 0 },
5294 { "altrp", dot_altrp
, 0 },
5295 { "savesp", dot_savemem
, 0 },
5296 { "savepsp", dot_savemem
, 1 },
5297 { "save.g", dot_saveg
, 0 },
5298 { "save.f", dot_savef
, 0 },
5299 { "save.b", dot_saveb
, 0 },
5300 { "save.gf", dot_savegf
, 0 },
5301 { "spill", dot_spill
, 0 },
5302 { "spillreg", dot_spillreg
, 0 },
5303 { "spillsp", dot_spillmem
, 0 },
5304 { "spillpsp", dot_spillmem
, 1 },
5305 { "spillreg.p", dot_spillreg
, 1 },
5306 { "spillsp.p", dot_spillmem
, ~0 },
5307 { "spillpsp.p", dot_spillmem
, ~1 },
5308 { "label_state", dot_label_state
, 0 },
5309 { "copy_state", dot_copy_state
, 0 },
5310 { "unwabi", dot_unwabi
, 0 },
5311 { "personality", dot_personality
, 0 },
5312 { "mii", dot_template
, 0x0 },
5313 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5314 { "mlx", dot_template
, 0x2 },
5315 { "mmi", dot_template
, 0x4 },
5316 { "mfi", dot_template
, 0x6 },
5317 { "mmf", dot_template
, 0x7 },
5318 { "mib", dot_template
, 0x8 },
5319 { "mbb", dot_template
, 0x9 },
5320 { "bbb", dot_template
, 0xb },
5321 { "mmb", dot_template
, 0xc },
5322 { "mfb", dot_template
, 0xe },
5323 { "align", dot_align
, 0 },
5324 { "regstk", dot_regstk
, 0 },
5325 { "rotr", dot_rot
, DYNREG_GR
},
5326 { "rotf", dot_rot
, DYNREG_FR
},
5327 { "rotp", dot_rot
, DYNREG_PR
},
5328 { "lsb", dot_byteorder
, 0 },
5329 { "msb", dot_byteorder
, 1 },
5330 { "psr", dot_psr
, 0 },
5331 { "alias", dot_alias
, 0 },
5332 { "secalias", dot_alias
, 1 },
5333 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5335 { "xdata1", dot_xdata
, 1 },
5336 { "xdata2", dot_xdata
, 2 },
5337 { "xdata4", dot_xdata
, 4 },
5338 { "xdata8", dot_xdata
, 8 },
5339 { "xdata16", dot_xdata
, 16 },
5340 { "xreal4", dot_xfloat_cons
, 'f' },
5341 { "xreal8", dot_xfloat_cons
, 'd' },
5342 { "xreal10", dot_xfloat_cons
, 'x' },
5343 { "xreal16", dot_xfloat_cons
, 'X' },
5344 { "xstring", dot_xstringer
, 0 },
5345 { "xstringz", dot_xstringer
, 1 },
5347 /* unaligned versions: */
5348 { "xdata2.ua", dot_xdata_ua
, 2 },
5349 { "xdata4.ua", dot_xdata_ua
, 4 },
5350 { "xdata8.ua", dot_xdata_ua
, 8 },
5351 { "xdata16.ua", dot_xdata_ua
, 16 },
5352 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5353 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5354 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5355 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5357 /* annotations/DV checking support */
5358 { "entry", dot_entry
, 0 },
5359 { "mem.offset", dot_mem_offset
, 0 },
5360 { "pred.rel", dot_pred_rel
, 0 },
5361 { "pred.rel.clear", dot_pred_rel
, 'c' },
5362 { "pred.rel.imply", dot_pred_rel
, 'i' },
5363 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5364 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5365 { "reg.val", dot_reg_val
, 0 },
5366 { "serialize.data", dot_serialize
, 0 },
5367 { "serialize.instruction", dot_serialize
, 1 },
5368 { "auto", dot_dv_mode
, 'a' },
5369 { "explicit", dot_dv_mode
, 'e' },
5370 { "default", dot_dv_mode
, 'd' },
5372 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5373 IA-64 aligns data allocation pseudo-ops by default, so we have to
5374 tell it that these ones are supposed to be unaligned. Long term,
5375 should rewrite so that only IA-64 specific data allocation pseudo-ops
5376 are aligned by default. */
5377 {"2byte", stmt_cons_ua
, 2},
5378 {"4byte", stmt_cons_ua
, 4},
5379 {"8byte", stmt_cons_ua
, 8},
5384 static const struct pseudo_opcode
5387 void (*handler
) (int);
5392 /* these are more like pseudo-ops, but don't start with a dot */
5393 { "data1", cons
, 1 },
5394 { "data2", cons
, 2 },
5395 { "data4", cons
, 4 },
5396 { "data8", cons
, 8 },
5397 { "data16", cons
, 16 },
5398 { "real4", stmt_float_cons
, 'f' },
5399 { "real8", stmt_float_cons
, 'd' },
5400 { "real10", stmt_float_cons
, 'x' },
5401 { "real16", stmt_float_cons
, 'X' },
5402 { "string", stringer
, 0 },
5403 { "stringz", stringer
, 1 },
5405 /* unaligned versions: */
5406 { "data2.ua", stmt_cons_ua
, 2 },
5407 { "data4.ua", stmt_cons_ua
, 4 },
5408 { "data8.ua", stmt_cons_ua
, 8 },
5409 { "data16.ua", stmt_cons_ua
, 16 },
5410 { "real4.ua", float_cons
, 'f' },
5411 { "real8.ua", float_cons
, 'd' },
5412 { "real10.ua", float_cons
, 'x' },
5413 { "real16.ua", float_cons
, 'X' },
5416 /* Declare a register by creating a symbol for it and entering it in
5417 the symbol table. */
5420 declare_register (name
, regnum
)
5427 sym
= symbol_new (name
, reg_section
, regnum
, &zero_address_frag
);
5429 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5431 as_fatal ("Inserting \"%s\" into register table failed: %s",
5438 declare_register_set (prefix
, num_regs
, base_regnum
)
5446 for (i
= 0; i
< num_regs
; ++i
)
5448 sprintf (name
, "%s%u", prefix
, i
);
5449 declare_register (name
, base_regnum
+ i
);
5454 operand_width (opnd
)
5455 enum ia64_opnd opnd
;
5457 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5458 unsigned int bits
= 0;
5462 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5463 bits
+= odesc
->field
[i
].bits
;
5468 static enum operand_match_result
5469 operand_match (idesc
, index
, e
)
5470 const struct ia64_opcode
*idesc
;
5474 enum ia64_opnd opnd
= idesc
->operands
[index
];
5475 int bits
, relocatable
= 0;
5476 struct insn_fix
*fix
;
5483 case IA64_OPND_AR_CCV
:
5484 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5485 return OPERAND_MATCH
;
5488 case IA64_OPND_AR_CSD
:
5489 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5490 return OPERAND_MATCH
;
5493 case IA64_OPND_AR_PFS
:
5494 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5495 return OPERAND_MATCH
;
5499 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5500 return OPERAND_MATCH
;
5504 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5505 return OPERAND_MATCH
;
5509 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5510 return OPERAND_MATCH
;
5513 case IA64_OPND_PR_ROT
:
5514 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5515 return OPERAND_MATCH
;
5519 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5520 return OPERAND_MATCH
;
5523 case IA64_OPND_PSR_L
:
5524 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5525 return OPERAND_MATCH
;
5528 case IA64_OPND_PSR_UM
:
5529 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5530 return OPERAND_MATCH
;
5534 if (e
->X_op
== O_constant
)
5536 if (e
->X_add_number
== 1)
5537 return OPERAND_MATCH
;
5539 return OPERAND_OUT_OF_RANGE
;
5544 if (e
->X_op
== O_constant
)
5546 if (e
->X_add_number
== 8)
5547 return OPERAND_MATCH
;
5549 return OPERAND_OUT_OF_RANGE
;
5554 if (e
->X_op
== O_constant
)
5556 if (e
->X_add_number
== 16)
5557 return OPERAND_MATCH
;
5559 return OPERAND_OUT_OF_RANGE
;
5563 /* register operands: */
5566 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5567 && e
->X_add_number
< REG_AR
+ 128)
5568 return OPERAND_MATCH
;
5573 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5574 && e
->X_add_number
< REG_BR
+ 8)
5575 return OPERAND_MATCH
;
5579 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5580 && e
->X_add_number
< REG_CR
+ 128)
5581 return OPERAND_MATCH
;
5588 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5589 && e
->X_add_number
< REG_FR
+ 128)
5590 return OPERAND_MATCH
;
5595 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5596 && e
->X_add_number
< REG_P
+ 64)
5597 return OPERAND_MATCH
;
5603 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5604 && e
->X_add_number
< REG_GR
+ 128)
5605 return OPERAND_MATCH
;
5608 case IA64_OPND_R3_2
:
5609 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5611 if (e
->X_add_number
< REG_GR
+ 4)
5612 return OPERAND_MATCH
;
5613 else if (e
->X_add_number
< REG_GR
+ 128)
5614 return OPERAND_OUT_OF_RANGE
;
5618 /* indirect operands: */
5619 case IA64_OPND_CPUID_R3
:
5620 case IA64_OPND_DBR_R3
:
5621 case IA64_OPND_DTR_R3
:
5622 case IA64_OPND_ITR_R3
:
5623 case IA64_OPND_IBR_R3
:
5624 case IA64_OPND_MSR_R3
:
5625 case IA64_OPND_PKR_R3
:
5626 case IA64_OPND_PMC_R3
:
5627 case IA64_OPND_PMD_R3
:
5628 case IA64_OPND_RR_R3
:
5629 if (e
->X_op
== O_index
&& e
->X_op_symbol
5630 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5631 == opnd
- IA64_OPND_CPUID_R3
))
5632 return OPERAND_MATCH
;
5636 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5637 return OPERAND_MATCH
;
5640 /* immediate operands: */
5641 case IA64_OPND_CNT2a
:
5642 case IA64_OPND_LEN4
:
5643 case IA64_OPND_LEN6
:
5644 bits
= operand_width (idesc
->operands
[index
]);
5645 if (e
->X_op
== O_constant
)
5647 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5648 return OPERAND_MATCH
;
5650 return OPERAND_OUT_OF_RANGE
;
5654 case IA64_OPND_CNT2b
:
5655 if (e
->X_op
== O_constant
)
5657 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5658 return OPERAND_MATCH
;
5660 return OPERAND_OUT_OF_RANGE
;
5664 case IA64_OPND_CNT2c
:
5665 val
= e
->X_add_number
;
5666 if (e
->X_op
== O_constant
)
5668 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5669 return OPERAND_MATCH
;
5671 return OPERAND_OUT_OF_RANGE
;
5676 /* SOR must be an integer multiple of 8 */
5677 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5678 return OPERAND_OUT_OF_RANGE
;
5681 if (e
->X_op
== O_constant
)
5683 if ((bfd_vma
) e
->X_add_number
<= 96)
5684 return OPERAND_MATCH
;
5686 return OPERAND_OUT_OF_RANGE
;
5690 case IA64_OPND_IMMU62
:
5691 if (e
->X_op
== O_constant
)
5693 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5694 return OPERAND_MATCH
;
5696 return OPERAND_OUT_OF_RANGE
;
5700 /* FIXME -- need 62-bit relocation type */
5701 as_bad (_("62-bit relocation not yet implemented"));
5705 case IA64_OPND_IMMU64
:
5706 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5707 || e
->X_op
== O_subtract
)
5709 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5710 fix
->code
= BFD_RELOC_IA64_IMM64
;
5711 if (e
->X_op
!= O_subtract
)
5713 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5714 if (e
->X_op
== O_pseudo_fixup
)
5718 fix
->opnd
= idesc
->operands
[index
];
5721 ++CURR_SLOT
.num_fixups
;
5722 return OPERAND_MATCH
;
5724 else if (e
->X_op
== O_constant
)
5725 return OPERAND_MATCH
;
5728 case IA64_OPND_CCNT5
:
5729 case IA64_OPND_CNT5
:
5730 case IA64_OPND_CNT6
:
5731 case IA64_OPND_CPOS6a
:
5732 case IA64_OPND_CPOS6b
:
5733 case IA64_OPND_CPOS6c
:
5734 case IA64_OPND_IMMU2
:
5735 case IA64_OPND_IMMU7a
:
5736 case IA64_OPND_IMMU7b
:
5737 case IA64_OPND_IMMU21
:
5738 case IA64_OPND_IMMU24
:
5739 case IA64_OPND_MBTYPE4
:
5740 case IA64_OPND_MHTYPE8
:
5741 case IA64_OPND_POS6
:
5742 bits
= operand_width (idesc
->operands
[index
]);
5743 if (e
->X_op
== O_constant
)
5745 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5746 return OPERAND_MATCH
;
5748 return OPERAND_OUT_OF_RANGE
;
5752 case IA64_OPND_IMMU9
:
5753 bits
= operand_width (idesc
->operands
[index
]);
5754 if (e
->X_op
== O_constant
)
5756 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5758 int lobits
= e
->X_add_number
& 0x3;
5759 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5760 e
->X_add_number
|= (bfd_vma
) 0x3;
5761 return OPERAND_MATCH
;
5764 return OPERAND_OUT_OF_RANGE
;
5768 case IA64_OPND_IMM44
:
5769 /* least 16 bits must be zero */
5770 if ((e
->X_add_number
& 0xffff) != 0)
5771 /* XXX technically, this is wrong: we should not be issuing warning
5772 messages until we're sure this instruction pattern is going to
5774 as_warn (_("lower 16 bits of mask ignored"));
5776 if (e
->X_op
== O_constant
)
5778 if (((e
->X_add_number
>= 0
5779 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5780 || (e
->X_add_number
< 0
5781 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5784 if (e
->X_add_number
>= 0
5785 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5787 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5789 return OPERAND_MATCH
;
5792 return OPERAND_OUT_OF_RANGE
;
5796 case IA64_OPND_IMM17
:
5797 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5798 if (e
->X_op
== O_constant
)
5800 if (((e
->X_add_number
>= 0
5801 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5802 || (e
->X_add_number
< 0
5803 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5806 if (e
->X_add_number
>= 0
5807 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5809 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5811 return OPERAND_MATCH
;
5814 return OPERAND_OUT_OF_RANGE
;
5818 case IA64_OPND_IMM14
:
5819 case IA64_OPND_IMM22
:
5821 case IA64_OPND_IMM1
:
5822 case IA64_OPND_IMM8
:
5823 case IA64_OPND_IMM8U4
:
5824 case IA64_OPND_IMM8M1
:
5825 case IA64_OPND_IMM8M1U4
:
5826 case IA64_OPND_IMM8M1U8
:
5827 case IA64_OPND_IMM9a
:
5828 case IA64_OPND_IMM9b
:
5829 bits
= operand_width (idesc
->operands
[index
]);
5830 if (relocatable
&& (e
->X_op
== O_symbol
5831 || e
->X_op
== O_subtract
5832 || e
->X_op
== O_pseudo_fixup
))
5834 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5836 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
5837 fix
->code
= BFD_RELOC_IA64_IMM14
;
5839 fix
->code
= BFD_RELOC_IA64_IMM22
;
5841 if (e
->X_op
!= O_subtract
)
5843 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5844 if (e
->X_op
== O_pseudo_fixup
)
5848 fix
->opnd
= idesc
->operands
[index
];
5851 ++CURR_SLOT
.num_fixups
;
5852 return OPERAND_MATCH
;
5854 else if (e
->X_op
!= O_constant
5855 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5856 return OPERAND_MISMATCH
;
5858 if (opnd
== IA64_OPND_IMM8M1U4
)
5860 /* Zero is not valid for unsigned compares that take an adjusted
5861 constant immediate range. */
5862 if (e
->X_add_number
== 0)
5863 return OPERAND_OUT_OF_RANGE
;
5865 /* Sign-extend 32-bit unsigned numbers, so that the following range
5866 checks will work. */
5867 val
= e
->X_add_number
;
5868 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5869 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5870 val
= ((val
<< 32) >> 32);
5872 /* Check for 0x100000000. This is valid because
5873 0x100000000-1 is the same as ((uint32_t) -1). */
5874 if (val
== ((bfd_signed_vma
) 1 << 32))
5875 return OPERAND_MATCH
;
5879 else if (opnd
== IA64_OPND_IMM8M1U8
)
5881 /* Zero is not valid for unsigned compares that take an adjusted
5882 constant immediate range. */
5883 if (e
->X_add_number
== 0)
5884 return OPERAND_OUT_OF_RANGE
;
5886 /* Check for 0x10000000000000000. */
5887 if (e
->X_op
== O_big
)
5889 if (generic_bignum
[0] == 0
5890 && generic_bignum
[1] == 0
5891 && generic_bignum
[2] == 0
5892 && generic_bignum
[3] == 0
5893 && generic_bignum
[4] == 1)
5894 return OPERAND_MATCH
;
5896 return OPERAND_OUT_OF_RANGE
;
5899 val
= e
->X_add_number
- 1;
5901 else if (opnd
== IA64_OPND_IMM8M1
)
5902 val
= e
->X_add_number
- 1;
5903 else if (opnd
== IA64_OPND_IMM8U4
)
5905 /* Sign-extend 32-bit unsigned numbers, so that the following range
5906 checks will work. */
5907 val
= e
->X_add_number
;
5908 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5909 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5910 val
= ((val
<< 32) >> 32);
5913 val
= e
->X_add_number
;
5915 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5916 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5917 return OPERAND_MATCH
;
5919 return OPERAND_OUT_OF_RANGE
;
5921 case IA64_OPND_INC3
:
5922 /* +/- 1, 4, 8, 16 */
5923 val
= e
->X_add_number
;
5926 if (e
->X_op
== O_constant
)
5928 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5929 return OPERAND_MATCH
;
5931 return OPERAND_OUT_OF_RANGE
;
5935 case IA64_OPND_TGT25
:
5936 case IA64_OPND_TGT25b
:
5937 case IA64_OPND_TGT25c
:
5938 case IA64_OPND_TGT64
:
5939 if (e
->X_op
== O_symbol
)
5941 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5942 if (opnd
== IA64_OPND_TGT25
)
5943 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5944 else if (opnd
== IA64_OPND_TGT25b
)
5945 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5946 else if (opnd
== IA64_OPND_TGT25c
)
5947 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5948 else if (opnd
== IA64_OPND_TGT64
)
5949 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5953 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5954 fix
->opnd
= idesc
->operands
[index
];
5957 ++CURR_SLOT
.num_fixups
;
5958 return OPERAND_MATCH
;
5960 case IA64_OPND_TAG13
:
5961 case IA64_OPND_TAG13b
:
5965 return OPERAND_MATCH
;
5968 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5969 /* There are no external relocs for TAG13/TAG13b fields, so we
5970 create a dummy reloc. This will not live past md_apply_fix. */
5971 fix
->code
= BFD_RELOC_UNUSED
;
5972 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5973 fix
->opnd
= idesc
->operands
[index
];
5976 ++CURR_SLOT
.num_fixups
;
5977 return OPERAND_MATCH
;
5984 case IA64_OPND_LDXMOV
:
5985 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5986 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5987 fix
->opnd
= idesc
->operands
[index
];
5990 ++CURR_SLOT
.num_fixups
;
5991 return OPERAND_MATCH
;
5996 return OPERAND_MISMATCH
;
6000 parse_operand (e
, more
)
6006 memset (e
, 0, sizeof (*e
));
6010 sep
= *input_line_pointer
;
6011 if (more
&& (sep
== ',' || sep
== more
))
6012 ++input_line_pointer
;
6016 /* Returns the next entry in the opcode table that matches the one in
6017 IDESC, and frees the entry in IDESC. If no matching entry is
6018 found, NULL is returned instead. */
6020 static struct ia64_opcode
*
6021 get_next_opcode (struct ia64_opcode
*idesc
)
6023 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6024 ia64_free_opcode (idesc
);
6028 /* Parse the operands for the opcode and find the opcode variant that
6029 matches the specified operands, or NULL if no match is possible. */
6031 static struct ia64_opcode
*
6032 parse_operands (idesc
)
6033 struct ia64_opcode
*idesc
;
6035 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6036 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6039 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6040 enum operand_match_result result
;
6042 char *first_arg
= 0, *end
, *saved_input_pointer
;
6045 assert (strlen (idesc
->name
) <= 128);
6047 strcpy (mnemonic
, idesc
->name
);
6048 if (idesc
->operands
[2] == IA64_OPND_SOF
6049 || idesc
->operands
[1] == IA64_OPND_SOF
)
6051 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6052 can't parse the first operand until we have parsed the
6053 remaining operands of the "alloc" instruction. */
6055 first_arg
= input_line_pointer
;
6056 end
= strchr (input_line_pointer
, '=');
6059 as_bad ("Expected separator `='");
6062 input_line_pointer
= end
+ 1;
6069 if (i
< NELEMS (CURR_SLOT
.opnd
))
6071 sep
= parse_operand (CURR_SLOT
.opnd
+ i
, '=');
6072 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6079 sep
= parse_operand (&dummy
, '=');
6080 if (dummy
.X_op
== O_absent
)
6086 if (sep
!= '=' && sep
!= ',')
6091 if (num_outputs
> 0)
6092 as_bad ("Duplicate equal sign (=) in instruction");
6094 num_outputs
= i
+ 1;
6099 as_bad ("Illegal operand separator `%c'", sep
);
6103 if (idesc
->operands
[2] == IA64_OPND_SOF
6104 || idesc
->operands
[1] == IA64_OPND_SOF
)
6106 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
6107 know (strcmp (idesc
->name
, "alloc") == 0);
6108 i
= (CURR_SLOT
.opnd
[1].X_op
== O_register
6109 && CURR_SLOT
.opnd
[1].X_add_number
== REG_AR
+ AR_PFS
) ? 2 : 1;
6110 if (num_operands
== i
+ 3 /* first_arg not included in this count! */
6111 && CURR_SLOT
.opnd
[i
].X_op
== O_constant
6112 && CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6113 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
6114 && CURR_SLOT
.opnd
[i
+ 3].X_op
== O_constant
)
6116 sof
= set_regstack (CURR_SLOT
.opnd
[i
].X_add_number
,
6117 CURR_SLOT
.opnd
[i
+ 1].X_add_number
,
6118 CURR_SLOT
.opnd
[i
+ 2].X_add_number
,
6119 CURR_SLOT
.opnd
[i
+ 3].X_add_number
);
6121 /* now we can parse the first arg: */
6122 saved_input_pointer
= input_line_pointer
;
6123 input_line_pointer
= first_arg
;
6124 sep
= parse_operand (CURR_SLOT
.opnd
+ 0, '=');
6126 --num_outputs
; /* force error */
6127 input_line_pointer
= saved_input_pointer
;
6129 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6130 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6131 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6132 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6136 highest_unmatched_operand
= -4;
6137 curr_out_of_range_pos
= -1;
6139 for (; idesc
; idesc
= get_next_opcode (idesc
))
6141 if (num_outputs
!= idesc
->num_outputs
)
6142 continue; /* mismatch in # of outputs */
6143 if (highest_unmatched_operand
< 0)
6144 highest_unmatched_operand
|= 1;
6145 if (num_operands
> NELEMS (idesc
->operands
)
6146 || (num_operands
< NELEMS (idesc
->operands
)
6147 && idesc
->operands
[num_operands
])
6148 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6149 continue; /* mismatch in number of arguments */
6150 if (highest_unmatched_operand
< 0)
6151 highest_unmatched_operand
|= 2;
6153 CURR_SLOT
.num_fixups
= 0;
6155 /* Try to match all operands. If we see an out-of-range operand,
6156 then continue trying to match the rest of the operands, since if
6157 the rest match, then this idesc will give the best error message. */
6159 out_of_range_pos
= -1;
6160 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6162 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6163 if (result
!= OPERAND_MATCH
)
6165 if (result
!= OPERAND_OUT_OF_RANGE
)
6167 if (out_of_range_pos
< 0)
6168 /* remember position of the first out-of-range operand: */
6169 out_of_range_pos
= i
;
6173 /* If we did not match all operands, or if at least one operand was
6174 out-of-range, then this idesc does not match. Keep track of which
6175 idesc matched the most operands before failing. If we have two
6176 idescs that failed at the same position, and one had an out-of-range
6177 operand, then prefer the out-of-range operand. Thus if we have
6178 "add r0=0x1000000,r1" we get an error saying the constant is out
6179 of range instead of an error saying that the constant should have been
6182 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6184 if (i
> highest_unmatched_operand
6185 || (i
== highest_unmatched_operand
6186 && out_of_range_pos
> curr_out_of_range_pos
))
6188 highest_unmatched_operand
= i
;
6189 if (out_of_range_pos
>= 0)
6191 expected_operand
= idesc
->operands
[out_of_range_pos
];
6192 error_pos
= out_of_range_pos
;
6196 expected_operand
= idesc
->operands
[i
];
6199 curr_out_of_range_pos
= out_of_range_pos
;
6208 if (expected_operand
)
6209 as_bad ("Operand %u of `%s' should be %s",
6210 error_pos
+ 1, mnemonic
,
6211 elf64_ia64_operands
[expected_operand
].desc
);
6212 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6213 as_bad ("Wrong number of output operands");
6214 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6215 as_bad ("Wrong number of input operands");
6217 as_bad ("Operand mismatch");
6221 /* Check that the instruction doesn't use
6222 - r0, f0, or f1 as output operands
6223 - the same predicate twice as output operands
6224 - r0 as address of a base update load or store
6225 - the same GR as output and address of a base update load
6226 - two even- or two odd-numbered FRs as output operands of a floating
6227 point parallel load.
6228 At most two (conflicting) output (or output-like) operands can exist,
6229 (floating point parallel loads have three outputs, but the base register,
6230 if updated, cannot conflict with the actual outputs). */
6232 for (i
= 0; i
< num_operands
; ++i
)
6237 switch (idesc
->operands
[i
])
6242 if (i
< num_outputs
)
6244 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6247 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6249 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6254 if (i
< num_outputs
)
6257 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6259 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6266 if (i
< num_outputs
)
6268 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6269 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6272 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6275 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6277 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6281 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6283 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6286 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6288 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6299 as_warn ("Invalid use of `%c%d' as output operand", reg_class
, regno
);
6302 as_warn ("Invalid use of `r%d' as base update address operand", regno
);
6308 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6313 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6318 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6326 as_warn ("Invalid duplicate use of `%c%d'", reg_class
, reg1
);
6328 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6329 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6330 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6331 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6332 && ! ((reg1
^ reg2
) & 1))
6333 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6334 reg1
- REG_FR
, reg2
- REG_FR
);
6335 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6336 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6337 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6338 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6339 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6340 reg1
- REG_FR
, reg2
- REG_FR
);
6345 build_insn (slot
, insnp
)
6349 const struct ia64_operand
*odesc
, *o2desc
;
6350 struct ia64_opcode
*idesc
= slot
->idesc
;
6356 insn
= idesc
->opcode
| slot
->qp_regno
;
6358 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6360 if (slot
->opnd
[i
].X_op
== O_register
6361 || slot
->opnd
[i
].X_op
== O_constant
6362 || slot
->opnd
[i
].X_op
== O_index
)
6363 val
= slot
->opnd
[i
].X_add_number
;
6364 else if (slot
->opnd
[i
].X_op
== O_big
)
6366 /* This must be the value 0x10000000000000000. */
6367 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6373 switch (idesc
->operands
[i
])
6375 case IA64_OPND_IMMU64
:
6376 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6377 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6378 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6379 | (((val
>> 63) & 0x1) << 36));
6382 case IA64_OPND_IMMU62
:
6383 val
&= 0x3fffffffffffffffULL
;
6384 if (val
!= slot
->opnd
[i
].X_add_number
)
6385 as_warn (_("Value truncated to 62 bits"));
6386 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6387 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6390 case IA64_OPND_TGT64
:
6392 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6393 insn
|= ((((val
>> 59) & 0x1) << 36)
6394 | (((val
>> 0) & 0xfffff) << 13));
6425 case IA64_OPND_R3_2
:
6426 case IA64_OPND_CPUID_R3
:
6427 case IA64_OPND_DBR_R3
:
6428 case IA64_OPND_DTR_R3
:
6429 case IA64_OPND_ITR_R3
:
6430 case IA64_OPND_IBR_R3
:
6432 case IA64_OPND_MSR_R3
:
6433 case IA64_OPND_PKR_R3
:
6434 case IA64_OPND_PMC_R3
:
6435 case IA64_OPND_PMD_R3
:
6436 case IA64_OPND_RR_R3
:
6444 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6445 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6447 as_bad_where (slot
->src_file
, slot
->src_line
,
6448 "Bad operand value: %s", err
);
6449 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6451 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6452 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6454 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6455 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6457 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6458 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6459 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6461 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6462 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6472 int manual_bundling_off
= 0, manual_bundling
= 0;
6473 enum ia64_unit required_unit
, insn_unit
= 0;
6474 enum ia64_insn_type type
[3], insn_type
;
6475 unsigned int template, orig_template
;
6476 bfd_vma insn
[3] = { -1, -1, -1 };
6477 struct ia64_opcode
*idesc
;
6478 int end_of_insn_group
= 0, user_template
= -1;
6479 int n
, i
, j
, first
, curr
, last_slot
;
6480 bfd_vma t0
= 0, t1
= 0;
6481 struct label_fix
*lfix
;
6482 struct insn_fix
*ifix
;
6488 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6489 know (first
>= 0 & first
< NUM_SLOTS
);
6490 n
= MIN (3, md
.num_slots_in_use
);
6492 /* Determine template: user user_template if specified, best match
6495 if (md
.slot
[first
].user_template
>= 0)
6496 user_template
= template = md
.slot
[first
].user_template
;
6499 /* Auto select appropriate template. */
6500 memset (type
, 0, sizeof (type
));
6502 for (i
= 0; i
< n
; ++i
)
6504 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6506 type
[i
] = md
.slot
[curr
].idesc
->type
;
6507 curr
= (curr
+ 1) % NUM_SLOTS
;
6509 template = best_template
[type
[0]][type
[1]][type
[2]];
6512 /* initialize instructions with appropriate nops: */
6513 for (i
= 0; i
< 3; ++i
)
6514 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6518 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6519 from the start of the frag. */
6520 addr_mod
= frag_now_fix () & 15;
6521 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6522 as_bad (_("instruction address is not a multiple of 16"));
6523 frag_now
->insn_addr
= addr_mod
;
6524 frag_now
->has_code
= 1;
6526 /* now fill in slots with as many insns as possible: */
6528 idesc
= md
.slot
[curr
].idesc
;
6529 end_of_insn_group
= 0;
6531 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6533 /* If we have unwind records, we may need to update some now. */
6534 unw_rec_list
*ptr
= md
.slot
[curr
].unwind_record
;
6535 unw_rec_list
*end_ptr
= NULL
;
6539 /* Find the last prologue/body record in the list for the current
6540 insn, and set the slot number for all records up to that point.
6541 This needs to be done now, because prologue/body records refer to
6542 the current point, not the point after the instruction has been
6543 issued. This matters because there may have been nops emitted
6544 meanwhile. Any non-prologue non-body record followed by a
6545 prologue/body record must also refer to the current point. */
6546 unw_rec_list
*last_ptr
;
6548 for (j
= 1; end_ptr
== NULL
&& j
< md
.num_slots_in_use
; ++j
)
6549 end_ptr
= md
.slot
[(curr
+ j
) % NUM_SLOTS
].unwind_record
;
6550 for (last_ptr
= NULL
; ptr
!= end_ptr
; ptr
= ptr
->next
)
6551 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6552 || ptr
->r
.type
== body
)
6556 /* Make last_ptr point one after the last prologue/body
6558 last_ptr
= last_ptr
->next
;
6559 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6562 ptr
->slot_number
= (unsigned long) f
+ i
;
6563 ptr
->slot_frag
= frag_now
;
6565 /* Remove the initialized records, so that we won't accidentally
6566 update them again if we insert a nop and continue. */
6567 md
.slot
[curr
].unwind_record
= last_ptr
;
6571 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6572 if (md
.slot
[curr
].manual_bundling_on
)
6575 manual_bundling
= 1;
6577 break; /* Need to start a new bundle. */
6580 /* If this instruction specifies a template, then it must be the first
6581 instruction of a bundle. */
6582 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6585 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6587 if (manual_bundling
&& !manual_bundling_off
)
6589 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6590 "`%s' must be last in bundle", idesc
->name
);
6592 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6596 if (idesc
->flags
& IA64_OPCODE_LAST
)
6599 unsigned int required_template
;
6601 /* If we need a stop bit after an M slot, our only choice is
6602 template 5 (M;;MI). If we need a stop bit after a B
6603 slot, our only choice is to place it at the end of the
6604 bundle, because the only available templates are MIB,
6605 MBB, BBB, MMB, and MFB. We don't handle anything other
6606 than M and B slots because these are the only kind of
6607 instructions that can have the IA64_OPCODE_LAST bit set. */
6608 required_template
= template;
6609 switch (idesc
->type
)
6613 required_template
= 5;
6621 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6622 "Internal error: don't know how to force %s to end"
6623 "of instruction group", idesc
->name
);
6628 && (i
> required_slot
6629 || (required_slot
== 2 && !manual_bundling_off
)
6630 || (user_template
>= 0
6631 /* Changing from MMI to M;MI is OK. */
6632 && (template ^ required_template
) > 1)))
6634 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6635 "`%s' must be last in instruction group",
6637 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6638 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6640 if (required_slot
< i
)
6641 /* Can't fit this instruction. */
6645 if (required_template
!= template)
6647 /* If we switch the template, we need to reset the NOPs
6648 after slot i. The slot-types of the instructions ahead
6649 of i never change, so we don't need to worry about
6650 changing NOPs in front of this slot. */
6651 for (j
= i
; j
< 3; ++j
)
6652 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6654 template = required_template
;
6656 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6658 if (manual_bundling
)
6660 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6661 "Label must be first in a bundle");
6662 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6664 /* This insn must go into the first slot of a bundle. */
6668 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6670 /* We need an instruction group boundary in the middle of a
6671 bundle. See if we can switch to an other template with
6672 an appropriate boundary. */
6674 orig_template
= template;
6675 if (i
== 1 && (user_template
== 4
6676 || (user_template
< 0
6677 && (ia64_templ_desc
[template].exec_unit
[0]
6681 end_of_insn_group
= 0;
6683 else if (i
== 2 && (user_template
== 0
6684 || (user_template
< 0
6685 && (ia64_templ_desc
[template].exec_unit
[1]
6687 /* This test makes sure we don't switch the template if
6688 the next instruction is one that needs to be first in
6689 an instruction group. Since all those instructions are
6690 in the M group, there is no way such an instruction can
6691 fit in this bundle even if we switch the template. The
6692 reason we have to check for this is that otherwise we
6693 may end up generating "MI;;I M.." which has the deadly
6694 effect that the second M instruction is no longer the
6695 first in the group! --davidm 99/12/16 */
6696 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6699 end_of_insn_group
= 0;
6702 && user_template
== 0
6703 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6704 /* Use the next slot. */
6706 else if (curr
!= first
)
6707 /* can't fit this insn */
6710 if (template != orig_template
)
6711 /* if we switch the template, we need to reset the NOPs
6712 after slot i. The slot-types of the instructions ahead
6713 of i never change, so we don't need to worry about
6714 changing NOPs in front of this slot. */
6715 for (j
= i
; j
< 3; ++j
)
6716 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6718 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6720 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6721 if (idesc
->type
== IA64_TYPE_DYN
)
6723 enum ia64_opnd opnd1
, opnd2
;
6725 if ((strcmp (idesc
->name
, "nop") == 0)
6726 || (strcmp (idesc
->name
, "break") == 0))
6727 insn_unit
= required_unit
;
6728 else if (strcmp (idesc
->name
, "hint") == 0)
6730 insn_unit
= required_unit
;
6731 if (required_unit
== IA64_UNIT_B
)
6737 case hint_b_warning
:
6738 as_warn ("hint in B unit may be treated as nop");
6741 /* When manual bundling is off and there is no
6742 user template, we choose a different unit so
6743 that hint won't go into the current slot. We
6744 will fill the current bundle with nops and
6745 try to put hint into the next bundle. */
6746 if (!manual_bundling
&& user_template
< 0)
6747 insn_unit
= IA64_UNIT_I
;
6749 as_bad ("hint in B unit can't be used");
6754 else if (strcmp (idesc
->name
, "chk.s") == 0
6755 || strcmp (idesc
->name
, "mov") == 0)
6757 insn_unit
= IA64_UNIT_M
;
6758 if (required_unit
== IA64_UNIT_I
6759 || (required_unit
== IA64_UNIT_F
&& template == 6))
6760 insn_unit
= IA64_UNIT_I
;
6763 as_fatal ("emit_one_bundle: unexpected dynamic op");
6765 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbfxx"[insn_unit
]);
6766 opnd1
= idesc
->operands
[0];
6767 opnd2
= idesc
->operands
[1];
6768 ia64_free_opcode (idesc
);
6769 idesc
= ia64_find_opcode (mnemonic
);
6770 /* moves to/from ARs have collisions */
6771 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6773 while (idesc
!= NULL
6774 && (idesc
->operands
[0] != opnd1
6775 || idesc
->operands
[1] != opnd2
))
6776 idesc
= get_next_opcode (idesc
);
6778 md
.slot
[curr
].idesc
= idesc
;
6782 insn_type
= idesc
->type
;
6783 insn_unit
= IA64_UNIT_NIL
;
6787 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6788 insn_unit
= required_unit
;
6790 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6791 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6792 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6793 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6794 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6799 if (insn_unit
!= required_unit
)
6800 continue; /* Try next slot. */
6802 if (debug_type
== DEBUG_DWARF2
|| md
.slot
[curr
].loc_directive_seen
)
6804 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6806 md
.slot
[curr
].loc_directive_seen
= 0;
6807 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6810 build_insn (md
.slot
+ curr
, insn
+ i
);
6812 ptr
= md
.slot
[curr
].unwind_record
;
6815 /* Set slot numbers for all remaining unwind records belonging to the
6816 current insn. There can not be any prologue/body unwind records
6818 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6820 ptr
->slot_number
= (unsigned long) f
+ i
;
6821 ptr
->slot_frag
= frag_now
;
6823 md
.slot
[curr
].unwind_record
= NULL
;
6826 if (required_unit
== IA64_UNIT_L
)
6829 /* skip one slot for long/X-unit instructions */
6832 --md
.num_slots_in_use
;
6835 /* now is a good time to fix up the labels for this insn: */
6836 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6838 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6839 symbol_set_frag (lfix
->sym
, frag_now
);
6841 /* and fix up the tags also. */
6842 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6844 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6845 symbol_set_frag (lfix
->sym
, frag_now
);
6848 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6850 ifix
= md
.slot
[curr
].fixup
+ j
;
6851 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6852 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6853 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6854 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
6855 fix
->fx_file
= md
.slot
[curr
].src_file
;
6856 fix
->fx_line
= md
.slot
[curr
].src_line
;
6859 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6862 ia64_free_opcode (md
.slot
[curr
].idesc
);
6863 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6864 md
.slot
[curr
].user_template
= -1;
6866 if (manual_bundling_off
)
6868 manual_bundling
= 0;
6871 curr
= (curr
+ 1) % NUM_SLOTS
;
6872 idesc
= md
.slot
[curr
].idesc
;
6874 if (manual_bundling
> 0)
6876 if (md
.num_slots_in_use
> 0)
6879 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6880 "`%s' does not fit into bundle", idesc
->name
);
6881 else if (last_slot
< 0)
6883 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6884 "`%s' does not fit into %s template",
6885 idesc
->name
, ia64_templ_desc
[template].name
);
6886 /* Drop first insn so we don't livelock. */
6887 --md
.num_slots_in_use
;
6888 know (curr
== first
);
6889 ia64_free_opcode (md
.slot
[curr
].idesc
);
6890 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6891 md
.slot
[curr
].user_template
= -1;
6899 else if (last_slot
== 0)
6900 where
= "slots 2 or 3";
6903 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6904 "`%s' can't go in %s of %s template",
6905 idesc
->name
, where
, ia64_templ_desc
[template].name
);
6909 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6910 "Missing '}' at end of file");
6912 know (md
.num_slots_in_use
< NUM_SLOTS
);
6914 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
6915 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6917 number_to_chars_littleendian (f
+ 0, t0
, 8);
6918 number_to_chars_littleendian (f
+ 8, t1
, 8);
6922 md_parse_option (c
, arg
)
6929 /* Switches from the Intel assembler. */
6931 if (strcmp (arg
, "ilp64") == 0
6932 || strcmp (arg
, "lp64") == 0
6933 || strcmp (arg
, "p64") == 0)
6935 md
.flags
|= EF_IA_64_ABI64
;
6937 else if (strcmp (arg
, "ilp32") == 0)
6939 md
.flags
&= ~EF_IA_64_ABI64
;
6941 else if (strcmp (arg
, "le") == 0)
6943 md
.flags
&= ~EF_IA_64_BE
;
6944 default_big_endian
= 0;
6946 else if (strcmp (arg
, "be") == 0)
6948 md
.flags
|= EF_IA_64_BE
;
6949 default_big_endian
= 1;
6951 else if (strncmp (arg
, "unwind-check=", 13) == 0)
6954 if (strcmp (arg
, "warning") == 0)
6955 md
.unwind_check
= unwind_check_warning
;
6956 else if (strcmp (arg
, "error") == 0)
6957 md
.unwind_check
= unwind_check_error
;
6961 else if (strncmp (arg
, "hint.b=", 7) == 0)
6964 if (strcmp (arg
, "ok") == 0)
6965 md
.hint_b
= hint_b_ok
;
6966 else if (strcmp (arg
, "warning") == 0)
6967 md
.hint_b
= hint_b_warning
;
6968 else if (strcmp (arg
, "error") == 0)
6969 md
.hint_b
= hint_b_error
;
6973 else if (strncmp (arg
, "tune=", 5) == 0)
6976 if (strcmp (arg
, "itanium1") == 0)
6978 else if (strcmp (arg
, "itanium2") == 0)
6988 if (strcmp (arg
, "so") == 0)
6990 /* Suppress signon message. */
6992 else if (strcmp (arg
, "pi") == 0)
6994 /* Reject privileged instructions. FIXME */
6996 else if (strcmp (arg
, "us") == 0)
6998 /* Allow union of signed and unsigned range. FIXME */
7000 else if (strcmp (arg
, "close_fcalls") == 0)
7002 /* Do not resolve global function calls. */
7009 /* temp[="prefix"] Insert temporary labels into the object file
7010 symbol table prefixed by "prefix".
7011 Default prefix is ":temp:".
7016 /* indirect=<tgt> Assume unannotated indirect branches behavior
7017 according to <tgt> --
7018 exit: branch out from the current context (default)
7019 labels: all labels in context may be branch targets
7021 if (strncmp (arg
, "indirect=", 9) != 0)
7026 /* -X conflicts with an ignored option, use -x instead */
7028 if (!arg
|| strcmp (arg
, "explicit") == 0)
7030 /* set default mode to explicit */
7031 md
.default_explicit_mode
= 1;
7034 else if (strcmp (arg
, "auto") == 0)
7036 md
.default_explicit_mode
= 0;
7038 else if (strcmp (arg
, "none") == 0)
7042 else if (strcmp (arg
, "debug") == 0)
7046 else if (strcmp (arg
, "debugx") == 0)
7048 md
.default_explicit_mode
= 1;
7051 else if (strcmp (arg
, "debugn") == 0)
7058 as_bad (_("Unrecognized option '-x%s'"), arg
);
7063 /* nops Print nops statistics. */
7066 /* GNU specific switches for gcc. */
7067 case OPTION_MCONSTANT_GP
:
7068 md
.flags
|= EF_IA_64_CONS_GP
;
7071 case OPTION_MAUTO_PIC
:
7072 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7083 md_show_usage (stream
)
7088 --mconstant-gp mark output file as using the constant-GP model\n\
7089 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7090 --mauto-pic mark output file as using the constant-GP model\n\
7091 without function descriptors (sets ELF header flag\n\
7092 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7093 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7094 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7095 -mtune=[itanium1|itanium2]\n\
7096 tune for a specific CPU (default -mtune=itanium2)\n\
7097 -munwind-check=[warning|error]\n\
7098 unwind directive check (default -munwind-check=warning)\n\
7099 -mhint.b=[ok|warning|error]\n\
7100 hint.b check (default -mhint.b=error)\n\
7101 -x | -xexplicit turn on dependency violation checking\n\
7102 -xauto automagically remove dependency violations (default)\n\
7103 -xnone turn off dependency violation checking\n\
7104 -xdebug debug dependency violation checker\n\
7105 -xdebugn debug dependency violation checker but turn off\n\
7106 dependency violation checking\n\
7107 -xdebugx debug dependency violation checker and turn on\n\
7108 dependency violation checking\n"),
7113 ia64_after_parse_args ()
7115 if (debug_type
== DEBUG_STABS
)
7116 as_fatal (_("--gstabs is not supported for ia64"));
7119 /* Return true if TYPE fits in TEMPL at SLOT. */
7122 match (int templ
, int type
, int slot
)
7124 enum ia64_unit unit
;
7127 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7130 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7132 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7134 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7135 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7136 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7137 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7138 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7139 default: result
= 0; break;
7144 /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7145 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7146 type M or I would fit in TEMPL at SLOT. */
7149 extra_goodness (int templ
, int slot
)
7154 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7156 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7162 if (match (templ
, IA64_TYPE_M
, slot
)
7163 || match (templ
, IA64_TYPE_I
, slot
))
7164 /* Favor M- and I-unit NOPs. We definitely want to avoid
7165 F-unit and B-unit may cause split-issue or less-than-optimal
7166 branch-prediction. */
7177 /* This function is called once, at assembler startup time. It sets
7178 up all the tables, etc. that the MD part of the assembler will need
7179 that can be determined before arguments are parsed. */
7183 int i
, j
, k
, t
, total
, ar_base
, cr_base
, goodness
, best
, regnum
, ok
;
7188 md
.explicit_mode
= md
.default_explicit_mode
;
7190 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7192 /* Make sure function pointers get initialized. */
7193 target_big_endian
= -1;
7194 dot_byteorder (default_big_endian
);
7196 alias_hash
= hash_new ();
7197 alias_name_hash
= hash_new ();
7198 secalias_hash
= hash_new ();
7199 secalias_name_hash
= hash_new ();
7201 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7202 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7203 &zero_address_frag
);
7205 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7206 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7207 &zero_address_frag
);
7209 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7210 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7211 &zero_address_frag
);
7213 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7214 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7215 &zero_address_frag
);
7217 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7218 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7219 &zero_address_frag
);
7221 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7222 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7223 &zero_address_frag
);
7225 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7226 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7227 &zero_address_frag
);
7229 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7230 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7231 &zero_address_frag
);
7233 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7234 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7235 &zero_address_frag
);
7237 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7238 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7239 &zero_address_frag
);
7241 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7242 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7243 &zero_address_frag
);
7245 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7246 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7247 &zero_address_frag
);
7249 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7250 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7251 &zero_address_frag
);
7253 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7254 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7255 &zero_address_frag
);
7257 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7258 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7259 &zero_address_frag
);
7261 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7262 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7263 &zero_address_frag
);
7265 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7266 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7267 &zero_address_frag
);
7269 if (md
.tune
!= itanium1
)
7271 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7273 le_nop_stop
[0] = 0x9;
7276 /* Compute the table of best templates. We compute goodness as a
7277 base 4 value, in which each match counts for 3. Match-failures
7278 result in NOPs and we use extra_goodness() to pick the execution
7279 units that are best suited for issuing the NOP. */
7280 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7281 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7282 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7285 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7288 if (match (t
, i
, 0))
7290 if (match (t
, j
, 1))
7292 if ((t
== 2 && j
== IA64_TYPE_X
) || match (t
, k
, 2))
7293 goodness
= 3 + 3 + 3;
7295 goodness
= 3 + 3 + extra_goodness (t
, 2);
7297 else if (match (t
, j
, 2))
7298 goodness
= 3 + 3 + extra_goodness (t
, 1);
7302 goodness
+= extra_goodness (t
, 1);
7303 goodness
+= extra_goodness (t
, 2);
7306 else if (match (t
, i
, 1))
7308 if ((t
== 2 && i
== IA64_TYPE_X
) || match (t
, j
, 2))
7311 goodness
= 3 + extra_goodness (t
, 2);
7313 else if (match (t
, i
, 2))
7314 goodness
= 3 + extra_goodness (t
, 1);
7316 if (goodness
> best
)
7319 best_template
[i
][j
][k
] = t
;
7324 #ifdef DEBUG_TEMPLATES
7325 /* For debugging changes to the best_template calculations. We don't care
7326 about combinations with invalid instructions, so start the loops at 1. */
7327 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7328 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7329 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7331 char type_letter
[IA64_NUM_TYPES
] = { 'n', 'a', 'i', 'm', 'b', 'f',
7333 fprintf (stderr
, "%c%c%c %s\n", type_letter
[i
], type_letter
[j
],
7335 ia64_templ_desc
[best_template
[i
][j
][k
]].name
);
7339 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7340 md
.slot
[i
].user_template
= -1;
7342 md
.pseudo_hash
= hash_new ();
7343 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7345 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7346 (void *) (pseudo_opcode
+ i
));
7348 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7349 pseudo_opcode
[i
].name
, err
);
7352 md
.reg_hash
= hash_new ();
7353 md
.dynreg_hash
= hash_new ();
7354 md
.const_hash
= hash_new ();
7355 md
.entry_hash
= hash_new ();
7357 /* general registers: */
7360 for (i
= 0; i
< total
; ++i
)
7362 sprintf (name
, "r%d", i
- REG_GR
);
7363 md
.regsym
[i
] = declare_register (name
, i
);
7366 /* floating point registers: */
7368 for (; i
< total
; ++i
)
7370 sprintf (name
, "f%d", i
- REG_FR
);
7371 md
.regsym
[i
] = declare_register (name
, i
);
7374 /* application registers: */
7377 for (; i
< total
; ++i
)
7379 sprintf (name
, "ar%d", i
- REG_AR
);
7380 md
.regsym
[i
] = declare_register (name
, i
);
7383 /* control registers: */
7386 for (; i
< total
; ++i
)
7388 sprintf (name
, "cr%d", i
- REG_CR
);
7389 md
.regsym
[i
] = declare_register (name
, i
);
7392 /* predicate registers: */
7394 for (; i
< total
; ++i
)
7396 sprintf (name
, "p%d", i
- REG_P
);
7397 md
.regsym
[i
] = declare_register (name
, i
);
7400 /* branch registers: */
7402 for (; i
< total
; ++i
)
7404 sprintf (name
, "b%d", i
- REG_BR
);
7405 md
.regsym
[i
] = declare_register (name
, i
);
7408 md
.regsym
[REG_IP
] = declare_register ("ip", REG_IP
);
7409 md
.regsym
[REG_CFM
] = declare_register ("cfm", REG_CFM
);
7410 md
.regsym
[REG_PR
] = declare_register ("pr", REG_PR
);
7411 md
.regsym
[REG_PR_ROT
] = declare_register ("pr.rot", REG_PR_ROT
);
7412 md
.regsym
[REG_PSR
] = declare_register ("psr", REG_PSR
);
7413 md
.regsym
[REG_PSR_L
] = declare_register ("psr.l", REG_PSR_L
);
7414 md
.regsym
[REG_PSR_UM
] = declare_register ("psr.um", REG_PSR_UM
);
7416 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7418 regnum
= indirect_reg
[i
].regnum
;
7419 md
.regsym
[regnum
] = declare_register (indirect_reg
[i
].name
, regnum
);
7422 /* define synonyms for application registers: */
7423 for (i
= REG_AR
; i
< REG_AR
+ NELEMS (ar
); ++i
)
7424 md
.regsym
[i
] = declare_register (ar
[i
- REG_AR
].name
,
7425 REG_AR
+ ar
[i
- REG_AR
].regnum
);
7427 /* define synonyms for control registers: */
7428 for (i
= REG_CR
; i
< REG_CR
+ NELEMS (cr
); ++i
)
7429 md
.regsym
[i
] = declare_register (cr
[i
- REG_CR
].name
,
7430 REG_CR
+ cr
[i
- REG_CR
].regnum
);
7432 declare_register ("gp", REG_GR
+ 1);
7433 declare_register ("sp", REG_GR
+ 12);
7434 declare_register ("rp", REG_BR
+ 0);
7436 /* pseudo-registers used to specify unwind info: */
7437 declare_register ("psp", REG_PSP
);
7439 declare_register_set ("ret", 4, REG_GR
+ 8);
7440 declare_register_set ("farg", 8, REG_FR
+ 8);
7441 declare_register_set ("fret", 8, REG_FR
+ 8);
7443 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7445 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7446 (PTR
) (const_bits
+ i
));
7448 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7452 /* Set the architecture and machine depending on defaults and command line
7454 if (md
.flags
& EF_IA_64_ABI64
)
7455 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7457 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7460 as_warn (_("Could not set architecture and machine"));
7462 /* Set the pointer size and pointer shift size depending on md.flags */
7464 if (md
.flags
& EF_IA_64_ABI64
)
7466 md
.pointer_size
= 8; /* pointers are 8 bytes */
7467 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7471 md
.pointer_size
= 4; /* pointers are 4 bytes */
7472 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7475 md
.mem_offset
.hint
= 0;
7478 md
.entry_labels
= NULL
;
7481 /* Set the default options in md. Cannot do this in md_begin because
7482 that is called after md_parse_option which is where we set the
7483 options in md based on command line options. */
7486 ia64_init (argc
, argv
)
7487 int argc ATTRIBUTE_UNUSED
;
7488 char **argv ATTRIBUTE_UNUSED
;
7490 md
.flags
= MD_FLAGS_DEFAULT
;
7492 /* FIXME: We should change it to unwind_check_error someday. */
7493 md
.unwind_check
= unwind_check_warning
;
7494 md
.hint_b
= hint_b_error
;
7498 /* Return a string for the target object file format. */
7501 ia64_target_format ()
7503 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7505 if (md
.flags
& EF_IA_64_BE
)
7507 if (md
.flags
& EF_IA_64_ABI64
)
7508 #if defined(TE_AIX50)
7509 return "elf64-ia64-aix-big";
7510 #elif defined(TE_HPUX)
7511 return "elf64-ia64-hpux-big";
7513 return "elf64-ia64-big";
7516 #if defined(TE_AIX50)
7517 return "elf32-ia64-aix-big";
7518 #elif defined(TE_HPUX)
7519 return "elf32-ia64-hpux-big";
7521 return "elf32-ia64-big";
7526 if (md
.flags
& EF_IA_64_ABI64
)
7528 return "elf64-ia64-aix-little";
7530 return "elf64-ia64-little";
7534 return "elf32-ia64-aix-little";
7536 return "elf32-ia64-little";
7541 return "unknown-format";
7545 ia64_end_of_source ()
7547 /* terminate insn group upon reaching end of file: */
7548 insn_group_break (1, 0, 0);
7550 /* emits slots we haven't written yet: */
7551 ia64_flush_insns ();
7553 bfd_set_private_flags (stdoutput
, md
.flags
);
7555 md
.mem_offset
.hint
= 0;
7564 /* Make sure we don't reference input_line_pointer[-1] when that's
7570 if (md
.qp
.X_op
== O_register
)
7571 as_bad ("qualifying predicate not followed by instruction");
7572 md
.qp
.X_op
= O_absent
;
7574 if (ignore_input ())
7577 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7579 if (md
.detect_dv
&& !md
.explicit_mode
)
7586 as_warn (_("Explicit stops are ignored in auto mode"));
7590 insn_group_break (1, 0, 0);
7592 else if (input_line_pointer
[-1] == '{')
7594 if (md
.manual_bundling
)
7595 as_warn ("Found '{' when manual bundling is already turned on");
7597 CURR_SLOT
.manual_bundling_on
= 1;
7598 md
.manual_bundling
= 1;
7600 /* Bundling is only acceptable in explicit mode
7601 or when in default automatic mode. */
7602 if (md
.detect_dv
&& !md
.explicit_mode
)
7604 if (!md
.mode_explicitly_set
7605 && !md
.default_explicit_mode
)
7608 as_warn (_("Found '{' after explicit switch to automatic mode"));
7611 else if (input_line_pointer
[-1] == '}')
7613 if (!md
.manual_bundling
)
7614 as_warn ("Found '}' when manual bundling is off");
7616 PREV_SLOT
.manual_bundling_off
= 1;
7617 md
.manual_bundling
= 0;
7619 /* switch back to automatic mode, if applicable */
7622 && !md
.mode_explicitly_set
7623 && !md
.default_explicit_mode
)
7628 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7630 static int defining_tag
= 0;
7633 ia64_unrecognized_line (ch
)
7639 expression (&md
.qp
);
7640 if (*input_line_pointer
++ != ')')
7642 as_bad ("Expected ')'");
7645 if (md
.qp
.X_op
!= O_register
)
7647 as_bad ("Qualifying predicate expected");
7650 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7652 as_bad ("Predicate register expected");
7664 if (md
.qp
.X_op
== O_register
)
7666 as_bad ("Tag must come before qualifying predicate.");
7670 /* This implements just enough of read_a_source_file in read.c to
7671 recognize labels. */
7672 if (is_name_beginner (*input_line_pointer
))
7674 s
= input_line_pointer
;
7675 c
= get_symbol_end ();
7677 else if (LOCAL_LABELS_FB
7678 && ISDIGIT (*input_line_pointer
))
7681 while (ISDIGIT (*input_line_pointer
))
7682 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7683 fb_label_instance_inc (temp
);
7684 s
= fb_label_name (temp
, 0);
7685 c
= *input_line_pointer
;
7694 /* Put ':' back for error messages' sake. */
7695 *input_line_pointer
++ = ':';
7696 as_bad ("Expected ':'");
7703 /* Put ':' back for error messages' sake. */
7704 *input_line_pointer
++ = ':';
7705 if (*input_line_pointer
++ != ']')
7707 as_bad ("Expected ']'");
7712 as_bad ("Tag name expected");
7722 /* Not a valid line. */
7727 ia64_frob_label (sym
)
7730 struct label_fix
*fix
;
7732 /* Tags need special handling since they are not bundle breaks like
7736 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7738 fix
->next
= CURR_SLOT
.tag_fixups
;
7739 CURR_SLOT
.tag_fixups
= fix
;
7744 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7746 md
.last_text_seg
= now_seg
;
7747 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7749 fix
->next
= CURR_SLOT
.label_fixups
;
7750 CURR_SLOT
.label_fixups
= fix
;
7752 /* Keep track of how many code entry points we've seen. */
7753 if (md
.path
== md
.maxpaths
)
7756 md
.entry_labels
= (const char **)
7757 xrealloc ((void *) md
.entry_labels
,
7758 md
.maxpaths
* sizeof (char *));
7760 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7765 /* The HP-UX linker will give unresolved symbol errors for symbols
7766 that are declared but unused. This routine removes declared,
7767 unused symbols from an object. */
7769 ia64_frob_symbol (sym
)
7772 if ((S_GET_SEGMENT (sym
) == &bfd_und_section
&& ! symbol_used_p (sym
) &&
7773 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7774 || (S_GET_SEGMENT (sym
) == &bfd_abs_section
7775 && ! S_IS_EXTERNAL (sym
)))
7782 ia64_flush_pending_output ()
7784 if (!md
.keep_pending_output
7785 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7787 /* ??? This causes many unnecessary stop bits to be emitted.
7788 Unfortunately, it isn't clear if it is safe to remove this. */
7789 insn_group_break (1, 0, 0);
7790 ia64_flush_insns ();
7794 /* Do ia64-specific expression optimization. All that's done here is
7795 to transform index expressions that are either due to the indexing
7796 of rotating registers or due to the indexing of indirect register
7799 ia64_optimize_expr (l
, op
, r
)
7808 if (l
->X_op
== O_register
&& r
->X_op
== O_constant
)
7810 num_regs
= (l
->X_add_number
>> 16);
7811 if ((unsigned) r
->X_add_number
>= num_regs
)
7814 as_bad ("No current frame");
7816 as_bad ("Index out of range 0..%u", num_regs
- 1);
7817 r
->X_add_number
= 0;
7819 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7822 else if (l
->X_op
== O_register
&& r
->X_op
== O_register
)
7824 if (l
->X_add_number
< IND_CPUID
|| l
->X_add_number
> IND_RR
7825 || l
->X_add_number
== IND_MEM
)
7827 as_bad ("Indirect register set name expected");
7828 l
->X_add_number
= IND_CPUID
;
7831 l
->X_op_symbol
= md
.regsym
[l
->X_add_number
];
7832 l
->X_add_number
= r
->X_add_number
;
7840 ia64_parse_name (name
, e
, nextcharP
)
7845 struct const_desc
*cdesc
;
7846 struct dynreg
*dr
= 0;
7853 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
7855 /* Find what relocation pseudo-function we're dealing with. */
7856 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
7857 if (pseudo_func
[idx
].name
7858 && pseudo_func
[idx
].name
[0] == name
[1]
7859 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
7861 pseudo_type
= pseudo_func
[idx
].type
;
7864 switch (pseudo_type
)
7866 case PSEUDO_FUNC_RELOC
:
7867 end
= input_line_pointer
;
7868 if (*nextcharP
!= '(')
7870 as_bad ("Expected '('");
7874 ++input_line_pointer
;
7876 if (*input_line_pointer
!= ')')
7878 as_bad ("Missing ')'");
7882 ++input_line_pointer
;
7883 if (e
->X_op
!= O_symbol
)
7885 if (e
->X_op
!= O_pseudo_fixup
)
7887 as_bad ("Not a symbolic expression");
7890 if (idx
!= FUNC_LT_RELATIVE
)
7892 as_bad ("Illegal combination of relocation functions");
7895 switch (S_GET_VALUE (e
->X_op_symbol
))
7897 case FUNC_FPTR_RELATIVE
:
7898 idx
= FUNC_LT_FPTR_RELATIVE
; break;
7899 case FUNC_DTP_MODULE
:
7900 idx
= FUNC_LT_DTP_MODULE
; break;
7901 case FUNC_DTP_RELATIVE
:
7902 idx
= FUNC_LT_DTP_RELATIVE
; break;
7903 case FUNC_TP_RELATIVE
:
7904 idx
= FUNC_LT_TP_RELATIVE
; break;
7906 as_bad ("Illegal combination of relocation functions");
7910 /* Make sure gas doesn't get rid of local symbols that are used
7912 e
->X_op
= O_pseudo_fixup
;
7913 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
7915 *nextcharP
= *input_line_pointer
;
7918 case PSEUDO_FUNC_CONST
:
7919 e
->X_op
= O_constant
;
7920 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7923 case PSEUDO_FUNC_REG
:
7924 e
->X_op
= O_register
;
7925 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7934 /* first see if NAME is a known register name: */
7935 sym
= hash_find (md
.reg_hash
, name
);
7938 e
->X_op
= O_register
;
7939 e
->X_add_number
= S_GET_VALUE (sym
);
7943 cdesc
= hash_find (md
.const_hash
, name
);
7946 e
->X_op
= O_constant
;
7947 e
->X_add_number
= cdesc
->value
;
7951 /* check for inN, locN, or outN: */
7956 if (name
[1] == 'n' && ISDIGIT (name
[2]))
7964 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
7972 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
7983 /* Ignore register numbers with leading zeroes, except zero itself. */
7984 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
7986 unsigned long regnum
;
7988 /* The name is inN, locN, or outN; parse the register number. */
7989 regnum
= strtoul (name
+ idx
, &end
, 10);
7990 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
7992 if (regnum
>= dr
->num_regs
)
7995 as_bad ("No current frame");
7997 as_bad ("Register number out of range 0..%u",
8001 e
->X_op
= O_register
;
8002 e
->X_add_number
= dr
->base
+ regnum
;
8007 end
= alloca (strlen (name
) + 1);
8009 name
= ia64_canonicalize_symbol_name (end
);
8010 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
8012 /* We've got ourselves the name of a rotating register set.
8013 Store the base register number in the low 16 bits of
8014 X_add_number and the size of the register set in the top 16
8016 e
->X_op
= O_register
;
8017 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8023 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8026 ia64_canonicalize_symbol_name (name
)
8029 size_t len
= strlen (name
), full
= len
;
8031 while (len
> 0 && name
[len
- 1] == '#')
8036 as_bad ("Standalone `#' is illegal");
8038 else if (len
< full
- 1)
8039 as_warn ("Redundant `#' suffix operators");
8044 /* Return true if idesc is a conditional branch instruction. This excludes
8045 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8046 because they always read/write resources regardless of the value of the
8047 qualifying predicate. br.ia must always use p0, and hence is always
8048 taken. Thus this function returns true for branches which can fall
8049 through, and which use no resources if they do fall through. */
8052 is_conditional_branch (idesc
)
8053 struct ia64_opcode
*idesc
;
8055 /* br is a conditional branch. Everything that starts with br. except
8056 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8057 Everything that starts with brl is a conditional branch. */
8058 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8059 && (idesc
->name
[2] == '\0'
8060 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8061 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8062 || idesc
->name
[2] == 'l'
8063 /* br.cond, br.call, br.clr */
8064 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8065 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8066 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8069 /* Return whether the given opcode is a taken branch. If there's any doubt,
8073 is_taken_branch (idesc
)
8074 struct ia64_opcode
*idesc
;
8076 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8077 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8080 /* Return whether the given opcode is an interruption or rfi. If there's any
8081 doubt, returns zero. */
8084 is_interruption_or_rfi (idesc
)
8085 struct ia64_opcode
*idesc
;
8087 if (strcmp (idesc
->name
, "rfi") == 0)
8092 /* Returns the index of the given dependency in the opcode's list of chks, or
8093 -1 if there is no dependency. */
8096 depends_on (depind
, idesc
)
8098 struct ia64_opcode
*idesc
;
8101 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8102 for (i
= 0; i
< dep
->nchks
; i
++)
8104 if (depind
== DEP (dep
->chks
[i
]))
8110 /* Determine a set of specific resources used for a particular resource
8111 class. Returns the number of specific resources identified For those
8112 cases which are not determinable statically, the resource returned is
8115 Meanings of value in 'NOTE':
8116 1) only read/write when the register number is explicitly encoded in the
8118 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8119 accesses CFM when qualifying predicate is in the rotating region.
8120 3) general register value is used to specify an indirect register; not
8121 determinable statically.
8122 4) only read the given resource when bits 7:0 of the indirect index
8123 register value does not match the register number of the resource; not
8124 determinable statically.
8125 5) all rules are implementation specific.
8126 6) only when both the index specified by the reader and the index specified
8127 by the writer have the same value in bits 63:61; not determinable
8129 7) only access the specified resource when the corresponding mask bit is
8131 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8132 only read when these insns reference FR2-31
8133 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8134 written when these insns write FR32-127
8135 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8137 11) The target predicates are written independently of PR[qp], but source
8138 registers are only read if PR[qp] is true. Since the state of PR[qp]
8139 cannot statically be determined, all source registers are marked used.
8140 12) This insn only reads the specified predicate register when that
8141 register is the PR[qp].
8142 13) This reference to ld-c only applies to teh GR whose value is loaded
8143 with data returned from memory, not the post-incremented address register.
8144 14) The RSE resource includes the implementation-specific RSE internal
8145 state resources. At least one (and possibly more) of these resources are
8146 read by each instruction listed in IC:rse-readers. At least one (and
8147 possibly more) of these resources are written by each insn listed in
8149 15+16) Represents reserved instructions, which the assembler does not
8152 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8153 this code; there are no dependency violations based on memory access.
8156 #define MAX_SPECS 256
8161 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
8162 const struct ia64_dependency
*dep
;
8163 struct ia64_opcode
*idesc
;
8164 int type
; /* is this a DV chk or a DV reg? */
8165 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
8166 int note
; /* resource note for this insn's usage */
8167 int path
; /* which execution path to examine */
8174 if (dep
->mode
== IA64_DV_WAW
8175 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8176 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8179 /* template for any resources we identify */
8180 tmpl
.dependency
= dep
;
8182 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8183 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8184 tmpl
.link_to_qp_branch
= 1;
8185 tmpl
.mem_offset
.hint
= 0;
8186 tmpl
.mem_offset
.offset
= 0;
8187 tmpl
.mem_offset
.base
= 0;
8190 tmpl
.cmp_type
= CMP_NONE
;
8197 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8198 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8199 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8201 /* we don't need to track these */
8202 if (dep
->semantics
== IA64_DVS_NONE
)
8205 switch (dep
->specifier
)
8210 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8212 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8213 if (regno
>= 0 && regno
<= 7)
8215 specs
[count
] = tmpl
;
8216 specs
[count
++].index
= regno
;
8222 for (i
= 0; i
< 8; i
++)
8224 specs
[count
] = tmpl
;
8225 specs
[count
++].index
= i
;
8234 case IA64_RS_AR_UNAT
:
8235 /* This is a mov =AR or mov AR= instruction. */
8236 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8238 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8239 if (regno
== AR_UNAT
)
8241 specs
[count
++] = tmpl
;
8246 /* This is a spill/fill, or other instruction that modifies the
8249 /* Unless we can determine the specific bits used, mark the whole
8250 thing; bits 8:3 of the memory address indicate the bit used in
8251 UNAT. The .mem.offset hint may be used to eliminate a small
8252 subset of conflicts. */
8253 specs
[count
] = tmpl
;
8254 if (md
.mem_offset
.hint
)
8257 fprintf (stderr
, " Using hint for spill/fill\n");
8258 /* The index isn't actually used, just set it to something
8259 approximating the bit index. */
8260 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8261 specs
[count
].mem_offset
.hint
= 1;
8262 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8263 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8267 specs
[count
++].specific
= 0;
8275 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8277 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8278 if ((regno
>= 8 && regno
<= 15)
8279 || (regno
>= 20 && regno
<= 23)
8280 || (regno
>= 31 && regno
<= 39)
8281 || (regno
>= 41 && regno
<= 47)
8282 || (regno
>= 67 && regno
<= 111))
8284 specs
[count
] = tmpl
;
8285 specs
[count
++].index
= regno
;
8298 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8300 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8301 if ((regno
>= 48 && regno
<= 63)
8302 || (regno
>= 112 && regno
<= 127))
8304 specs
[count
] = tmpl
;
8305 specs
[count
++].index
= regno
;
8311 for (i
= 48; i
< 64; i
++)
8313 specs
[count
] = tmpl
;
8314 specs
[count
++].index
= i
;
8316 for (i
= 112; i
< 128; i
++)
8318 specs
[count
] = tmpl
;
8319 specs
[count
++].index
= i
;
8337 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8338 if (idesc
->operands
[i
] == IA64_OPND_B1
8339 || idesc
->operands
[i
] == IA64_OPND_B2
)
8341 specs
[count
] = tmpl
;
8342 specs
[count
++].index
=
8343 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8348 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8349 if (idesc
->operands
[i
] == IA64_OPND_B1
8350 || idesc
->operands
[i
] == IA64_OPND_B2
)
8352 specs
[count
] = tmpl
;
8353 specs
[count
++].index
=
8354 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8360 case IA64_RS_CPUID
: /* four or more registers */
8363 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8365 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8366 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8369 specs
[count
] = tmpl
;
8370 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8374 specs
[count
] = tmpl
;
8375 specs
[count
++].specific
= 0;
8385 case IA64_RS_DBR
: /* four or more registers */
8388 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8390 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8391 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8394 specs
[count
] = tmpl
;
8395 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8399 specs
[count
] = tmpl
;
8400 specs
[count
++].specific
= 0;
8404 else if (note
== 0 && !rsrc_write
)
8406 specs
[count
] = tmpl
;
8407 specs
[count
++].specific
= 0;
8415 case IA64_RS_IBR
: /* four or more registers */
8418 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8420 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8421 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8424 specs
[count
] = tmpl
;
8425 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8429 specs
[count
] = tmpl
;
8430 specs
[count
++].specific
= 0;
8443 /* These are implementation specific. Force all references to
8444 conflict with all other references. */
8445 specs
[count
] = tmpl
;
8446 specs
[count
++].specific
= 0;
8454 case IA64_RS_PKR
: /* 16 or more registers */
8455 if (note
== 3 || note
== 4)
8457 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8459 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8460 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8465 specs
[count
] = tmpl
;
8466 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8469 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8471 /* Uses all registers *except* the one in R3. */
8472 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8474 specs
[count
] = tmpl
;
8475 specs
[count
++].index
= i
;
8481 specs
[count
] = tmpl
;
8482 specs
[count
++].specific
= 0;
8489 specs
[count
] = tmpl
;
8490 specs
[count
++].specific
= 0;
8494 case IA64_RS_PMC
: /* four or more registers */
8497 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8498 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8501 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8503 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
8504 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8507 specs
[count
] = tmpl
;
8508 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8512 specs
[count
] = tmpl
;
8513 specs
[count
++].specific
= 0;
8523 case IA64_RS_PMD
: /* four or more registers */
8526 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8528 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8529 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8532 specs
[count
] = tmpl
;
8533 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8537 specs
[count
] = tmpl
;
8538 specs
[count
++].specific
= 0;
8548 case IA64_RS_RR
: /* eight registers */
8551 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8553 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8554 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8557 specs
[count
] = tmpl
;
8558 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8562 specs
[count
] = tmpl
;
8563 specs
[count
++].specific
= 0;
8567 else if (note
== 0 && !rsrc_write
)
8569 specs
[count
] = tmpl
;
8570 specs
[count
++].specific
= 0;
8578 case IA64_RS_CR_IRR
:
8581 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8582 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8584 && idesc
->operands
[1] == IA64_OPND_CR3
8587 for (i
= 0; i
< 4; i
++)
8589 specs
[count
] = tmpl
;
8590 specs
[count
++].index
= CR_IRR0
+ i
;
8596 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8597 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8599 && regno
<= CR_IRR3
)
8601 specs
[count
] = tmpl
;
8602 specs
[count
++].index
= regno
;
8611 case IA64_RS_CR_LRR
:
8618 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8619 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8620 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8622 specs
[count
] = tmpl
;
8623 specs
[count
++].index
= regno
;
8631 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8633 specs
[count
] = tmpl
;
8634 specs
[count
++].index
=
8635 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8650 else if (rsrc_write
)
8652 if (dep
->specifier
== IA64_RS_FRb
8653 && idesc
->operands
[0] == IA64_OPND_F1
)
8655 specs
[count
] = tmpl
;
8656 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8661 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8663 if (idesc
->operands
[i
] == IA64_OPND_F2
8664 || idesc
->operands
[i
] == IA64_OPND_F3
8665 || idesc
->operands
[i
] == IA64_OPND_F4
)
8667 specs
[count
] = tmpl
;
8668 specs
[count
++].index
=
8669 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8678 /* This reference applies only to the GR whose value is loaded with
8679 data returned from memory. */
8680 specs
[count
] = tmpl
;
8681 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8687 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8688 if (idesc
->operands
[i
] == IA64_OPND_R1
8689 || idesc
->operands
[i
] == IA64_OPND_R2
8690 || idesc
->operands
[i
] == IA64_OPND_R3
)
8692 specs
[count
] = tmpl
;
8693 specs
[count
++].index
=
8694 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8696 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8697 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8698 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8700 specs
[count
] = tmpl
;
8701 specs
[count
++].index
=
8702 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8707 /* Look for anything that reads a GR. */
8708 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8710 if (idesc
->operands
[i
] == IA64_OPND_MR3
8711 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8712 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8713 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8714 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8715 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8716 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8717 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8718 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8719 || ((i
>= idesc
->num_outputs
)
8720 && (idesc
->operands
[i
] == IA64_OPND_R1
8721 || idesc
->operands
[i
] == IA64_OPND_R2
8722 || idesc
->operands
[i
] == IA64_OPND_R3
8723 /* addl source register. */
8724 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8726 specs
[count
] = tmpl
;
8727 specs
[count
++].index
=
8728 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8739 /* This is the same as IA64_RS_PRr, except that the register range is
8740 from 1 - 15, and there are no rotating register reads/writes here. */
8744 for (i
= 1; i
< 16; i
++)
8746 specs
[count
] = tmpl
;
8747 specs
[count
++].index
= i
;
8753 /* Mark only those registers indicated by the mask. */
8756 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8757 for (i
= 1; i
< 16; i
++)
8758 if (mask
& ((valueT
) 1 << i
))
8760 specs
[count
] = tmpl
;
8761 specs
[count
++].index
= i
;
8769 else if (note
== 11) /* note 11 implies note 1 as well */
8773 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8775 if (idesc
->operands
[i
] == IA64_OPND_P1
8776 || idesc
->operands
[i
] == IA64_OPND_P2
)
8778 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8779 if (regno
>= 1 && regno
< 16)
8781 specs
[count
] = tmpl
;
8782 specs
[count
++].index
= regno
;
8792 else if (note
== 12)
8794 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8796 specs
[count
] = tmpl
;
8797 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8804 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8805 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8806 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8807 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8809 if ((idesc
->operands
[0] == IA64_OPND_P1
8810 || idesc
->operands
[0] == IA64_OPND_P2
)
8811 && p1
>= 1 && p1
< 16)
8813 specs
[count
] = tmpl
;
8814 specs
[count
].cmp_type
=
8815 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8816 specs
[count
++].index
= p1
;
8818 if ((idesc
->operands
[1] == IA64_OPND_P1
8819 || idesc
->operands
[1] == IA64_OPND_P2
)
8820 && p2
>= 1 && p2
< 16)
8822 specs
[count
] = tmpl
;
8823 specs
[count
].cmp_type
=
8824 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8825 specs
[count
++].index
= p2
;
8830 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8832 specs
[count
] = tmpl
;
8833 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8835 if (idesc
->operands
[1] == IA64_OPND_PR
)
8837 for (i
= 1; i
< 16; i
++)
8839 specs
[count
] = tmpl
;
8840 specs
[count
++].index
= i
;
8851 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8852 simplified cases of this. */
8856 for (i
= 16; i
< 63; i
++)
8858 specs
[count
] = tmpl
;
8859 specs
[count
++].index
= i
;
8865 /* Mark only those registers indicated by the mask. */
8867 && idesc
->operands
[0] == IA64_OPND_PR
)
8869 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8870 if (mask
& ((valueT
) 1 << 16))
8871 for (i
= 16; i
< 63; i
++)
8873 specs
[count
] = tmpl
;
8874 specs
[count
++].index
= i
;
8878 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8880 for (i
= 16; i
< 63; i
++)
8882 specs
[count
] = tmpl
;
8883 specs
[count
++].index
= i
;
8891 else if (note
== 11) /* note 11 implies note 1 as well */
8895 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8897 if (idesc
->operands
[i
] == IA64_OPND_P1
8898 || idesc
->operands
[i
] == IA64_OPND_P2
)
8900 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8901 if (regno
>= 16 && regno
< 63)
8903 specs
[count
] = tmpl
;
8904 specs
[count
++].index
= regno
;
8914 else if (note
== 12)
8916 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8918 specs
[count
] = tmpl
;
8919 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8926 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8927 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8928 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8929 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8931 if ((idesc
->operands
[0] == IA64_OPND_P1
8932 || idesc
->operands
[0] == IA64_OPND_P2
)
8933 && p1
>= 16 && p1
< 63)
8935 specs
[count
] = tmpl
;
8936 specs
[count
].cmp_type
=
8937 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8938 specs
[count
++].index
= p1
;
8940 if ((idesc
->operands
[1] == IA64_OPND_P1
8941 || idesc
->operands
[1] == IA64_OPND_P2
)
8942 && p2
>= 16 && p2
< 63)
8944 specs
[count
] = tmpl
;
8945 specs
[count
].cmp_type
=
8946 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8947 specs
[count
++].index
= p2
;
8952 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8954 specs
[count
] = tmpl
;
8955 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8957 if (idesc
->operands
[1] == IA64_OPND_PR
)
8959 for (i
= 16; i
< 63; i
++)
8961 specs
[count
] = tmpl
;
8962 specs
[count
++].index
= i
;
8974 /* Verify that the instruction is using the PSR bit indicated in
8978 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
8980 if (dep
->regindex
< 6)
8982 specs
[count
++] = tmpl
;
8985 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
8987 if (dep
->regindex
< 32
8988 || dep
->regindex
== 35
8989 || dep
->regindex
== 36
8990 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
8992 specs
[count
++] = tmpl
;
8995 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
8997 if (dep
->regindex
< 32
8998 || dep
->regindex
== 35
8999 || dep
->regindex
== 36
9000 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
9002 specs
[count
++] = tmpl
;
9007 /* Several PSR bits have very specific dependencies. */
9008 switch (dep
->regindex
)
9011 specs
[count
++] = tmpl
;
9016 specs
[count
++] = tmpl
;
9020 /* Only certain CR accesses use PSR.ic */
9021 if (idesc
->operands
[0] == IA64_OPND_CR3
9022 || idesc
->operands
[1] == IA64_OPND_CR3
)
9025 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9028 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
9043 specs
[count
++] = tmpl
;
9052 specs
[count
++] = tmpl
;
9056 /* Only some AR accesses use cpl */
9057 if (idesc
->operands
[0] == IA64_OPND_AR3
9058 || idesc
->operands
[1] == IA64_OPND_AR3
)
9061 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9064 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
9071 && regno
<= AR_K7
))))
9073 specs
[count
++] = tmpl
;
9078 specs
[count
++] = tmpl
;
9088 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9090 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9096 if (mask
& ((valueT
) 1 << dep
->regindex
))
9098 specs
[count
++] = tmpl
;
9103 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9104 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9105 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9106 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9108 if (idesc
->operands
[i
] == IA64_OPND_F1
9109 || idesc
->operands
[i
] == IA64_OPND_F2
9110 || idesc
->operands
[i
] == IA64_OPND_F3
9111 || idesc
->operands
[i
] == IA64_OPND_F4
)
9113 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9114 if (reg
>= min
&& reg
<= max
)
9116 specs
[count
++] = tmpl
;
9123 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9124 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9125 /* mfh is read on writes to FR32-127; mfl is read on writes to
9127 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9129 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9131 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9132 if (reg
>= min
&& reg
<= max
)
9134 specs
[count
++] = tmpl
;
9139 else if (note
== 10)
9141 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9143 if (idesc
->operands
[i
] == IA64_OPND_R1
9144 || idesc
->operands
[i
] == IA64_OPND_R2
9145 || idesc
->operands
[i
] == IA64_OPND_R3
)
9147 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9148 if (regno
>= 16 && regno
<= 31)
9150 specs
[count
++] = tmpl
;
9161 case IA64_RS_AR_FPSR
:
9162 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9164 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9165 if (regno
== AR_FPSR
)
9167 specs
[count
++] = tmpl
;
9172 specs
[count
++] = tmpl
;
9177 /* Handle all AR[REG] resources */
9178 if (note
== 0 || note
== 1)
9180 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9181 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9182 && regno
== dep
->regindex
)
9184 specs
[count
++] = tmpl
;
9186 /* other AR[REG] resources may be affected by AR accesses */
9187 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9190 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9191 switch (dep
->regindex
)
9197 if (regno
== AR_BSPSTORE
)
9199 specs
[count
++] = tmpl
;
9203 (regno
== AR_BSPSTORE
9204 || regno
== AR_RNAT
))
9206 specs
[count
++] = tmpl
;
9211 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9214 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9215 switch (dep
->regindex
)
9220 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9222 specs
[count
++] = tmpl
;
9229 specs
[count
++] = tmpl
;
9239 /* Handle all CR[REG] resources */
9240 if (note
== 0 || note
== 1)
9242 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9244 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9245 if (regno
== dep
->regindex
)
9247 specs
[count
++] = tmpl
;
9249 else if (!rsrc_write
)
9251 /* Reads from CR[IVR] affect other resources. */
9252 if (regno
== CR_IVR
)
9254 if ((dep
->regindex
>= CR_IRR0
9255 && dep
->regindex
<= CR_IRR3
)
9256 || dep
->regindex
== CR_TPR
)
9258 specs
[count
++] = tmpl
;
9265 specs
[count
++] = tmpl
;
9274 case IA64_RS_INSERVICE
:
9275 /* look for write of EOI (67) or read of IVR (65) */
9276 if ((idesc
->operands
[0] == IA64_OPND_CR3
9277 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9278 || (idesc
->operands
[1] == IA64_OPND_CR3
9279 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9281 specs
[count
++] = tmpl
;
9288 specs
[count
++] = tmpl
;
9299 specs
[count
++] = tmpl
;
9303 /* Check if any of the registers accessed are in the rotating region.
9304 mov to/from pr accesses CFM only when qp_regno is in the rotating
9306 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9308 if (idesc
->operands
[i
] == IA64_OPND_R1
9309 || idesc
->operands
[i
] == IA64_OPND_R2
9310 || idesc
->operands
[i
] == IA64_OPND_R3
)
9312 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9313 /* Assumes that md.rot.num_regs is always valid */
9314 if (md
.rot
.num_regs
> 0
9316 && num
< 31 + md
.rot
.num_regs
)
9318 specs
[count
] = tmpl
;
9319 specs
[count
++].specific
= 0;
9322 else if (idesc
->operands
[i
] == IA64_OPND_F1
9323 || idesc
->operands
[i
] == IA64_OPND_F2
9324 || idesc
->operands
[i
] == IA64_OPND_F3
9325 || idesc
->operands
[i
] == IA64_OPND_F4
)
9327 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9330 specs
[count
] = tmpl
;
9331 specs
[count
++].specific
= 0;
9334 else if (idesc
->operands
[i
] == IA64_OPND_P1
9335 || idesc
->operands
[i
] == IA64_OPND_P2
)
9337 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9340 specs
[count
] = tmpl
;
9341 specs
[count
++].specific
= 0;
9345 if (CURR_SLOT
.qp_regno
> 15)
9347 specs
[count
] = tmpl
;
9348 specs
[count
++].specific
= 0;
9353 /* This is the same as IA64_RS_PRr, except simplified to account for
9354 the fact that there is only one register. */
9358 specs
[count
++] = tmpl
;
9363 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9364 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9365 if (mask
& ((valueT
) 1 << 63))
9366 specs
[count
++] = tmpl
;
9368 else if (note
== 11)
9370 if ((idesc
->operands
[0] == IA64_OPND_P1
9371 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9372 || (idesc
->operands
[1] == IA64_OPND_P2
9373 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9375 specs
[count
++] = tmpl
;
9378 else if (note
== 12)
9380 if (CURR_SLOT
.qp_regno
== 63)
9382 specs
[count
++] = tmpl
;
9389 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9390 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9391 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9392 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9395 && (idesc
->operands
[0] == IA64_OPND_P1
9396 || idesc
->operands
[0] == IA64_OPND_P2
))
9398 specs
[count
] = tmpl
;
9399 specs
[count
++].cmp_type
=
9400 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9403 && (idesc
->operands
[1] == IA64_OPND_P1
9404 || idesc
->operands
[1] == IA64_OPND_P2
))
9406 specs
[count
] = tmpl
;
9407 specs
[count
++].cmp_type
=
9408 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9413 if (CURR_SLOT
.qp_regno
== 63)
9415 specs
[count
++] = tmpl
;
9426 /* FIXME we can identify some individual RSE written resources, but RSE
9427 read resources have not yet been completely identified, so for now
9428 treat RSE as a single resource */
9429 if (strncmp (idesc
->name
, "mov", 3) == 0)
9433 if (idesc
->operands
[0] == IA64_OPND_AR3
9434 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9436 specs
[count
++] = tmpl
;
9441 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9443 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9444 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9446 specs
[count
++] = tmpl
;
9449 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9451 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9452 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9453 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9455 specs
[count
++] = tmpl
;
9462 specs
[count
++] = tmpl
;
9467 /* FIXME -- do any of these need to be non-specific? */
9468 specs
[count
++] = tmpl
;
9472 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9479 /* Clear branch flags on marked resources. This breaks the link between the
9480 QP of the marking instruction and a subsequent branch on the same QP. */
9483 clear_qp_branch_flag (mask
)
9487 for (i
= 0; i
< regdepslen
; i
++)
9489 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9490 if ((bit
& mask
) != 0)
9492 regdeps
[i
].link_to_qp_branch
= 0;
9497 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9498 any mutexes which contain one of the PRs and create new ones when
9502 update_qp_mutex (valueT mask
)
9508 while (i
< qp_mutexeslen
)
9510 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9512 /* If it destroys and creates the same mutex, do nothing. */
9513 if (qp_mutexes
[i
].prmask
== mask
9514 && qp_mutexes
[i
].path
== md
.path
)
9525 fprintf (stderr
, " Clearing mutex relation");
9526 print_prmask (qp_mutexes
[i
].prmask
);
9527 fprintf (stderr
, "\n");
9530 /* Deal with the old mutex with more than 3+ PRs only if
9531 the new mutex on the same execution path with it.
9533 FIXME: The 3+ mutex support is incomplete.
9534 dot_pred_rel () may be a better place to fix it. */
9535 if (qp_mutexes
[i
].path
== md
.path
)
9537 /* If it is a proper subset of the mutex, create a
9540 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9543 qp_mutexes
[i
].prmask
&= ~mask
;
9544 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9546 /* Modify the mutex if there are more than one
9554 /* Remove the mutex. */
9555 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9563 add_qp_mutex (mask
);
9568 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9570 Any changes to a PR clears the mutex relations which include that PR. */
9573 clear_qp_mutex (mask
)
9579 while (i
< qp_mutexeslen
)
9581 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9585 fprintf (stderr
, " Clearing mutex relation");
9586 print_prmask (qp_mutexes
[i
].prmask
);
9587 fprintf (stderr
, "\n");
9589 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9596 /* Clear implies relations which contain PRs in the given masks.
9597 P1_MASK indicates the source of the implies relation, while P2_MASK
9598 indicates the implied PR. */
9601 clear_qp_implies (p1_mask
, p2_mask
)
9608 while (i
< qp_implieslen
)
9610 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9611 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9614 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9615 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9616 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9623 /* Add the PRs specified to the list of implied relations. */
9626 add_qp_imply (p1
, p2
)
9633 /* p0 is not meaningful here. */
9634 if (p1
== 0 || p2
== 0)
9640 /* If it exists already, ignore it. */
9641 for (i
= 0; i
< qp_implieslen
; i
++)
9643 if (qp_implies
[i
].p1
== p1
9644 && qp_implies
[i
].p2
== p2
9645 && qp_implies
[i
].path
== md
.path
9646 && !qp_implies
[i
].p2_branched
)
9650 if (qp_implieslen
== qp_impliestotlen
)
9652 qp_impliestotlen
+= 20;
9653 qp_implies
= (struct qp_imply
*)
9654 xrealloc ((void *) qp_implies
,
9655 qp_impliestotlen
* sizeof (struct qp_imply
));
9658 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9659 qp_implies
[qp_implieslen
].p1
= p1
;
9660 qp_implies
[qp_implieslen
].p2
= p2
;
9661 qp_implies
[qp_implieslen
].path
= md
.path
;
9662 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9664 /* Add in the implied transitive relations; for everything that p2 implies,
9665 make p1 imply that, too; for everything that implies p1, make it imply p2
9667 for (i
= 0; i
< qp_implieslen
; i
++)
9669 if (qp_implies
[i
].p1
== p2
)
9670 add_qp_imply (p1
, qp_implies
[i
].p2
);
9671 if (qp_implies
[i
].p2
== p1
)
9672 add_qp_imply (qp_implies
[i
].p1
, p2
);
9674 /* Add in mutex relations implied by this implies relation; for each mutex
9675 relation containing p2, duplicate it and replace p2 with p1. */
9676 bit
= (valueT
) 1 << p1
;
9677 mask
= (valueT
) 1 << p2
;
9678 for (i
= 0; i
< qp_mutexeslen
; i
++)
9680 if (qp_mutexes
[i
].prmask
& mask
)
9681 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9685 /* Add the PRs specified in the mask to the mutex list; this means that only
9686 one of the PRs can be true at any time. PR0 should never be included in
9696 if (qp_mutexeslen
== qp_mutexestotlen
)
9698 qp_mutexestotlen
+= 20;
9699 qp_mutexes
= (struct qpmutex
*)
9700 xrealloc ((void *) qp_mutexes
,
9701 qp_mutexestotlen
* sizeof (struct qpmutex
));
9705 fprintf (stderr
, " Registering mutex on");
9706 print_prmask (mask
);
9707 fprintf (stderr
, "\n");
9709 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9710 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9714 has_suffix_p (name
, suffix
)
9718 size_t namelen
= strlen (name
);
9719 size_t sufflen
= strlen (suffix
);
9721 if (namelen
<= sufflen
)
9723 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9727 clear_register_values ()
9731 fprintf (stderr
, " Clearing register values\n");
9732 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9733 gr_values
[i
].known
= 0;
9736 /* Keep track of register values/changes which affect DV tracking.
9738 optimization note: should add a flag to classes of insns where otherwise we
9739 have to examine a group of strings to identify them. */
9742 note_register_values (idesc
)
9743 struct ia64_opcode
*idesc
;
9745 valueT qp_changemask
= 0;
9748 /* Invalidate values for registers being written to. */
9749 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9751 if (idesc
->operands
[i
] == IA64_OPND_R1
9752 || idesc
->operands
[i
] == IA64_OPND_R2
9753 || idesc
->operands
[i
] == IA64_OPND_R3
)
9755 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9756 if (regno
> 0 && regno
< NELEMS (gr_values
))
9757 gr_values
[regno
].known
= 0;
9759 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9761 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9762 if (regno
> 0 && regno
< 4)
9763 gr_values
[regno
].known
= 0;
9765 else if (idesc
->operands
[i
] == IA64_OPND_P1
9766 || idesc
->operands
[i
] == IA64_OPND_P2
)
9768 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9769 qp_changemask
|= (valueT
) 1 << regno
;
9771 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9773 if (idesc
->operands
[2] & (valueT
) 0x10000)
9774 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9776 qp_changemask
= idesc
->operands
[2];
9779 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9781 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9782 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9784 qp_changemask
= idesc
->operands
[1];
9785 qp_changemask
&= ~(valueT
) 0xFFFF;
9790 /* Always clear qp branch flags on any PR change. */
9791 /* FIXME there may be exceptions for certain compares. */
9792 clear_qp_branch_flag (qp_changemask
);
9794 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9795 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9797 qp_changemask
|= ~(valueT
) 0xFFFF;
9798 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9800 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9801 gr_values
[i
].known
= 0;
9803 clear_qp_mutex (qp_changemask
);
9804 clear_qp_implies (qp_changemask
, qp_changemask
);
9806 /* After a call, all register values are undefined, except those marked
9808 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9809 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9811 /* FIXME keep GR values which are marked as "safe_across_calls" */
9812 clear_register_values ();
9813 clear_qp_mutex (~qp_safe_across_calls
);
9814 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9815 clear_qp_branch_flag (~qp_safe_across_calls
);
9817 else if (is_interruption_or_rfi (idesc
)
9818 || is_taken_branch (idesc
))
9820 clear_register_values ();
9821 clear_qp_mutex (~(valueT
) 0);
9822 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9824 /* Look for mutex and implies relations. */
9825 else if ((idesc
->operands
[0] == IA64_OPND_P1
9826 || idesc
->operands
[0] == IA64_OPND_P2
)
9827 && (idesc
->operands
[1] == IA64_OPND_P1
9828 || idesc
->operands
[1] == IA64_OPND_P2
))
9830 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9831 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9832 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9833 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9835 /* If both PRs are PR0, we can't really do anything. */
9836 if (p1
== 0 && p2
== 0)
9839 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9841 /* In general, clear mutexes and implies which include P1 or P2,
9842 with the following exceptions. */
9843 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9844 || has_suffix_p (idesc
->name
, ".and.orcm"))
9846 clear_qp_implies (p2mask
, p1mask
);
9848 else if (has_suffix_p (idesc
->name
, ".andcm")
9849 || has_suffix_p (idesc
->name
, ".and"))
9851 clear_qp_implies (0, p1mask
| p2mask
);
9853 else if (has_suffix_p (idesc
->name
, ".orcm")
9854 || has_suffix_p (idesc
->name
, ".or"))
9856 clear_qp_mutex (p1mask
| p2mask
);
9857 clear_qp_implies (p1mask
| p2mask
, 0);
9863 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9865 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9866 if (p1
== 0 || p2
== 0)
9867 clear_qp_mutex (p1mask
| p2mask
);
9869 added
= update_qp_mutex (p1mask
| p2mask
);
9871 if (CURR_SLOT
.qp_regno
== 0
9872 || has_suffix_p (idesc
->name
, ".unc"))
9874 if (added
== 0 && p1
&& p2
)
9875 add_qp_mutex (p1mask
| p2mask
);
9876 if (CURR_SLOT
.qp_regno
!= 0)
9879 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9881 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9886 /* Look for mov imm insns into GRs. */
9887 else if (idesc
->operands
[0] == IA64_OPND_R1
9888 && (idesc
->operands
[1] == IA64_OPND_IMM22
9889 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9890 && CURR_SLOT
.opnd
[1].X_op
== O_constant
9891 && (strcmp (idesc
->name
, "mov") == 0
9892 || strcmp (idesc
->name
, "movl") == 0))
9894 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9895 if (regno
> 0 && regno
< NELEMS (gr_values
))
9897 gr_values
[regno
].known
= 1;
9898 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9899 gr_values
[regno
].path
= md
.path
;
9902 fprintf (stderr
, " Know gr%d = ", regno
);
9903 fprintf_vma (stderr
, gr_values
[regno
].value
);
9904 fputs ("\n", stderr
);
9908 /* Look for dep.z imm insns. */
9909 else if (idesc
->operands
[0] == IA64_OPND_R1
9910 && idesc
->operands
[1] == IA64_OPND_IMM8
9911 && strcmp (idesc
->name
, "dep.z") == 0)
9913 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9914 if (regno
> 0 && regno
< NELEMS (gr_values
))
9916 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
9918 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
9919 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
9920 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
9921 gr_values
[regno
].known
= 1;
9922 gr_values
[regno
].value
= value
;
9923 gr_values
[regno
].path
= md
.path
;
9926 fprintf (stderr
, " Know gr%d = ", regno
);
9927 fprintf_vma (stderr
, gr_values
[regno
].value
);
9928 fputs ("\n", stderr
);
9934 clear_qp_mutex (qp_changemask
);
9935 clear_qp_implies (qp_changemask
, qp_changemask
);
9939 /* Return whether the given predicate registers are currently mutex. */
9942 qp_mutex (p1
, p2
, path
)
9952 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
9953 for (i
= 0; i
< qp_mutexeslen
; i
++)
9955 if (qp_mutexes
[i
].path
>= path
9956 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9963 /* Return whether the given resource is in the given insn's list of chks
9964 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9968 resources_match (rs
, idesc
, note
, qp_regno
, path
)
9970 struct ia64_opcode
*idesc
;
9975 struct rsrc specs
[MAX_SPECS
];
9978 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9979 we don't need to check. One exception is note 11, which indicates that
9980 target predicates are written regardless of PR[qp]. */
9981 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
9985 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
9988 /* UNAT checking is a bit more specific than other resources */
9989 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
9990 && specs
[count
].mem_offset
.hint
9991 && rs
->mem_offset
.hint
)
9993 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
9995 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
9996 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
10003 /* Skip apparent PR write conflicts where both writes are an AND or both
10004 writes are an OR. */
10005 if (rs
->dependency
->specifier
== IA64_RS_PR
10006 || rs
->dependency
->specifier
== IA64_RS_PRr
10007 || rs
->dependency
->specifier
== IA64_RS_PR63
)
10009 if (specs
[count
].cmp_type
!= CMP_NONE
10010 && specs
[count
].cmp_type
== rs
->cmp_type
)
10013 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10014 dv_mode
[rs
->dependency
->mode
],
10015 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10016 specs
[count
].index
: 63);
10021 " %s on parallel compare conflict %s vs %s on PR%d\n",
10022 dv_mode
[rs
->dependency
->mode
],
10023 dv_cmp_type
[rs
->cmp_type
],
10024 dv_cmp_type
[specs
[count
].cmp_type
],
10025 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10026 specs
[count
].index
: 63);
10030 /* If either resource is not specific, conservatively assume a conflict
10032 if (!specs
[count
].specific
|| !rs
->specific
)
10034 else if (specs
[count
].index
== rs
->index
)
10041 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10042 insert a stop to create the break. Update all resource dependencies
10043 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10044 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10045 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10049 insn_group_break (insert_stop
, qp_regno
, save_current
)
10056 if (insert_stop
&& md
.num_slots_in_use
> 0)
10057 PREV_SLOT
.end_of_insn_group
= 1;
10061 fprintf (stderr
, " Insn group break%s",
10062 (insert_stop
? " (w/stop)" : ""));
10064 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10065 fprintf (stderr
, "\n");
10069 while (i
< regdepslen
)
10071 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10074 && regdeps
[i
].qp_regno
!= qp_regno
)
10081 && CURR_SLOT
.src_file
== regdeps
[i
].file
10082 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10088 /* clear dependencies which are automatically cleared by a stop, or
10089 those that have reached the appropriate state of insn serialization */
10090 if (dep
->semantics
== IA64_DVS_IMPLIED
10091 || dep
->semantics
== IA64_DVS_IMPLIEDF
10092 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10094 print_dependency ("Removing", i
);
10095 regdeps
[i
] = regdeps
[--regdepslen
];
10099 if (dep
->semantics
== IA64_DVS_DATA
10100 || dep
->semantics
== IA64_DVS_INSTR
10101 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10103 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10104 regdeps
[i
].insn_srlz
= STATE_STOP
;
10105 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10106 regdeps
[i
].data_srlz
= STATE_STOP
;
10113 /* Add the given resource usage spec to the list of active dependencies. */
10116 mark_resource (idesc
, dep
, spec
, depind
, path
)
10117 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
10118 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
10123 if (regdepslen
== regdepstotlen
)
10125 regdepstotlen
+= 20;
10126 regdeps
= (struct rsrc
*)
10127 xrealloc ((void *) regdeps
,
10128 regdepstotlen
* sizeof (struct rsrc
));
10131 regdeps
[regdepslen
] = *spec
;
10132 regdeps
[regdepslen
].depind
= depind
;
10133 regdeps
[regdepslen
].path
= path
;
10134 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10135 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10137 print_dependency ("Adding", regdepslen
);
10143 print_dependency (action
, depind
)
10144 const char *action
;
10149 fprintf (stderr
, " %s %s '%s'",
10150 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10151 (regdeps
[depind
].dependency
)->name
);
10152 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10153 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10154 if (regdeps
[depind
].mem_offset
.hint
)
10156 fputs (" ", stderr
);
10157 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10158 fputs ("+", stderr
);
10159 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10161 fprintf (stderr
, "\n");
10166 instruction_serialization ()
10170 fprintf (stderr
, " Instruction serialization\n");
10171 for (i
= 0; i
< regdepslen
; i
++)
10172 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10173 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10177 data_serialization ()
10181 fprintf (stderr
, " Data serialization\n");
10182 while (i
< regdepslen
)
10184 if (regdeps
[i
].data_srlz
== STATE_STOP
10185 /* Note: as of 991210, all "other" dependencies are cleared by a
10186 data serialization. This might change with new tables */
10187 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10189 print_dependency ("Removing", i
);
10190 regdeps
[i
] = regdeps
[--regdepslen
];
10197 /* Insert stops and serializations as needed to avoid DVs. */
10200 remove_marked_resource (rs
)
10203 switch (rs
->dependency
->semantics
)
10205 case IA64_DVS_SPECIFIC
:
10207 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10208 /* ...fall through... */
10209 case IA64_DVS_INSTR
:
10211 fprintf (stderr
, "Inserting instr serialization\n");
10212 if (rs
->insn_srlz
< STATE_STOP
)
10213 insn_group_break (1, 0, 0);
10214 if (rs
->insn_srlz
< STATE_SRLZ
)
10216 struct slot oldslot
= CURR_SLOT
;
10217 /* Manually jam a srlz.i insn into the stream */
10218 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10219 CURR_SLOT
.user_template
= -1;
10220 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10221 instruction_serialization ();
10222 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10223 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10224 emit_one_bundle ();
10225 CURR_SLOT
= oldslot
;
10227 insn_group_break (1, 0, 0);
10229 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10230 "other" types of DV are eliminated
10231 by a data serialization */
10232 case IA64_DVS_DATA
:
10234 fprintf (stderr
, "Inserting data serialization\n");
10235 if (rs
->data_srlz
< STATE_STOP
)
10236 insn_group_break (1, 0, 0);
10238 struct slot oldslot
= CURR_SLOT
;
10239 /* Manually jam a srlz.d insn into the stream */
10240 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10241 CURR_SLOT
.user_template
= -1;
10242 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10243 data_serialization ();
10244 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10245 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10246 emit_one_bundle ();
10247 CURR_SLOT
= oldslot
;
10250 case IA64_DVS_IMPLIED
:
10251 case IA64_DVS_IMPLIEDF
:
10253 fprintf (stderr
, "Inserting stop\n");
10254 insn_group_break (1, 0, 0);
10261 /* Check the resources used by the given opcode against the current dependency
10264 The check is run once for each execution path encountered. In this case,
10265 a unique execution path is the sequence of instructions following a code
10266 entry point, e.g. the following has three execution paths, one starting
10267 at L0, one at L1, and one at L2.
10276 check_dependencies (idesc
)
10277 struct ia64_opcode
*idesc
;
10279 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10283 /* Note that the number of marked resources may change within the
10284 loop if in auto mode. */
10286 while (i
< regdepslen
)
10288 struct rsrc
*rs
= ®deps
[i
];
10289 const struct ia64_dependency
*dep
= rs
->dependency
;
10292 int start_over
= 0;
10294 if (dep
->semantics
== IA64_DVS_NONE
10295 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10301 note
= NOTE (opdeps
->chks
[chkind
]);
10303 /* Check this resource against each execution path seen thus far. */
10304 for (path
= 0; path
<= md
.path
; path
++)
10308 /* If the dependency wasn't on the path being checked, ignore it. */
10309 if (rs
->path
< path
)
10312 /* If the QP for this insn implies a QP which has branched, don't
10313 bother checking. Ed. NOTE: I don't think this check is terribly
10314 useful; what's the point of generating code which will only be
10315 reached if its QP is zero?
10316 This code was specifically inserted to handle the following code,
10317 based on notes from Intel's DV checking code, where p1 implies p2.
10323 if (CURR_SLOT
.qp_regno
!= 0)
10327 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10329 if (qp_implies
[implies
].path
>= path
10330 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10331 && qp_implies
[implies
].p2_branched
)
10341 if ((matchtype
= resources_match (rs
, idesc
, note
,
10342 CURR_SLOT
.qp_regno
, path
)) != 0)
10345 char pathmsg
[256] = "";
10346 char indexmsg
[256] = "";
10347 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10350 sprintf (pathmsg
, " when entry is at label '%s'",
10351 md
.entry_labels
[path
- 1]);
10352 if (matchtype
== 1 && rs
->index
>= 0)
10353 sprintf (indexmsg
, ", specific resource number is %d",
10355 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10357 (certain
? "violates" : "may violate"),
10358 dv_mode
[dep
->mode
], dep
->name
,
10359 dv_sem
[dep
->semantics
],
10360 pathmsg
, indexmsg
);
10362 if (md
.explicit_mode
)
10364 as_warn ("%s", msg
);
10365 if (path
< md
.path
)
10366 as_warn (_("Only the first path encountering the conflict "
10368 as_warn_where (rs
->file
, rs
->line
,
10369 _("This is the location of the "
10370 "conflicting usage"));
10371 /* Don't bother checking other paths, to avoid duplicating
10372 the same warning */
10378 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10380 remove_marked_resource (rs
);
10382 /* since the set of dependencies has changed, start over */
10383 /* FIXME -- since we're removing dvs as we go, we
10384 probably don't really need to start over... */
10397 /* Register new dependencies based on the given opcode. */
10400 mark_resources (idesc
)
10401 struct ia64_opcode
*idesc
;
10404 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10405 int add_only_qp_reads
= 0;
10407 /* A conditional branch only uses its resources if it is taken; if it is
10408 taken, we stop following that path. The other branch types effectively
10409 *always* write their resources. If it's not taken, register only QP
10411 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10413 add_only_qp_reads
= 1;
10417 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10419 for (i
= 0; i
< opdeps
->nregs
; i
++)
10421 const struct ia64_dependency
*dep
;
10422 struct rsrc specs
[MAX_SPECS
];
10427 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10428 note
= NOTE (opdeps
->regs
[i
]);
10430 if (add_only_qp_reads
10431 && !(dep
->mode
== IA64_DV_WAR
10432 && (dep
->specifier
== IA64_RS_PR
10433 || dep
->specifier
== IA64_RS_PRr
10434 || dep
->specifier
== IA64_RS_PR63
)))
10437 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10439 while (count
-- > 0)
10441 mark_resource (idesc
, dep
, &specs
[count
],
10442 DEP (opdeps
->regs
[i
]), md
.path
);
10445 /* The execution path may affect register values, which may in turn
10446 affect which indirect-access resources are accessed. */
10447 switch (dep
->specifier
)
10451 case IA64_RS_CPUID
:
10459 for (path
= 0; path
< md
.path
; path
++)
10461 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10462 while (count
-- > 0)
10463 mark_resource (idesc
, dep
, &specs
[count
],
10464 DEP (opdeps
->regs
[i
]), path
);
10471 /* Remove dependencies when they no longer apply. */
10474 update_dependencies (idesc
)
10475 struct ia64_opcode
*idesc
;
10479 if (strcmp (idesc
->name
, "srlz.i") == 0)
10481 instruction_serialization ();
10483 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10485 data_serialization ();
10487 else if (is_interruption_or_rfi (idesc
)
10488 || is_taken_branch (idesc
))
10490 /* Although technically the taken branch doesn't clear dependencies
10491 which require a srlz.[id], we don't follow the branch; the next
10492 instruction is assumed to start with a clean slate. */
10496 else if (is_conditional_branch (idesc
)
10497 && CURR_SLOT
.qp_regno
!= 0)
10499 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10501 for (i
= 0; i
< qp_implieslen
; i
++)
10503 /* If the conditional branch's predicate is implied by the predicate
10504 in an existing dependency, remove that dependency. */
10505 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10508 /* Note that this implied predicate takes a branch so that if
10509 a later insn generates a DV but its predicate implies this
10510 one, we can avoid the false DV warning. */
10511 qp_implies
[i
].p2_branched
= 1;
10512 while (depind
< regdepslen
)
10514 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10516 print_dependency ("Removing", depind
);
10517 regdeps
[depind
] = regdeps
[--regdepslen
];
10524 /* Any marked resources which have this same predicate should be
10525 cleared, provided that the QP hasn't been modified between the
10526 marking instruction and the branch. */
10529 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10534 while (i
< regdepslen
)
10536 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10537 && regdeps
[i
].link_to_qp_branch
10538 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10539 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10541 /* Treat like a taken branch */
10542 print_dependency ("Removing", i
);
10543 regdeps
[i
] = regdeps
[--regdepslen
];
10552 /* Examine the current instruction for dependency violations. */
10556 struct ia64_opcode
*idesc
;
10560 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10561 idesc
->name
, CURR_SLOT
.src_line
,
10562 idesc
->dependencies
->nchks
,
10563 idesc
->dependencies
->nregs
);
10566 /* Look through the list of currently marked resources; if the current
10567 instruction has the dependency in its chks list which uses that resource,
10568 check against the specific resources used. */
10569 check_dependencies (idesc
);
10571 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10572 then add them to the list of marked resources. */
10573 mark_resources (idesc
);
10575 /* There are several types of dependency semantics, and each has its own
10576 requirements for being cleared
10578 Instruction serialization (insns separated by interruption, rfi, or
10579 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10581 Data serialization (instruction serialization, or writer + srlz.d +
10582 reader, where writer and srlz.d are in separate groups) clears
10583 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10584 always be the case).
10586 Instruction group break (groups separated by stop, taken branch,
10587 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10589 update_dependencies (idesc
);
10591 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10592 warning. Keep track of as many as possible that are useful. */
10593 note_register_values (idesc
);
10595 /* We don't need or want this anymore. */
10596 md
.mem_offset
.hint
= 0;
10601 /* Translate one line of assembly. Pseudo ops and labels do not show
10607 char *saved_input_line_pointer
, *mnemonic
;
10608 const struct pseudo_opcode
*pdesc
;
10609 struct ia64_opcode
*idesc
;
10610 unsigned char qp_regno
;
10611 unsigned int flags
;
10614 saved_input_line_pointer
= input_line_pointer
;
10615 input_line_pointer
= str
;
10617 /* extract the opcode (mnemonic): */
10619 mnemonic
= input_line_pointer
;
10620 ch
= get_symbol_end ();
10621 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10624 *input_line_pointer
= ch
;
10625 (*pdesc
->handler
) (pdesc
->arg
);
10629 /* Find the instruction descriptor matching the arguments. */
10631 idesc
= ia64_find_opcode (mnemonic
);
10632 *input_line_pointer
= ch
;
10635 as_bad ("Unknown opcode `%s'", mnemonic
);
10639 idesc
= parse_operands (idesc
);
10643 /* Handle the dynamic ops we can handle now: */
10644 if (idesc
->type
== IA64_TYPE_DYN
)
10646 if (strcmp (idesc
->name
, "add") == 0)
10648 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10649 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10653 ia64_free_opcode (idesc
);
10654 idesc
= ia64_find_opcode (mnemonic
);
10656 else if (strcmp (idesc
->name
, "mov") == 0)
10658 enum ia64_opnd opnd1
, opnd2
;
10661 opnd1
= idesc
->operands
[0];
10662 opnd2
= idesc
->operands
[1];
10663 if (opnd1
== IA64_OPND_AR3
)
10665 else if (opnd2
== IA64_OPND_AR3
)
10669 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10671 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10672 mnemonic
= "mov.i";
10673 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10674 mnemonic
= "mov.m";
10682 ia64_free_opcode (idesc
);
10683 idesc
= ia64_find_opcode (mnemonic
);
10684 while (idesc
!= NULL
10685 && (idesc
->operands
[0] != opnd1
10686 || idesc
->operands
[1] != opnd2
))
10687 idesc
= get_next_opcode (idesc
);
10691 else if (strcmp (idesc
->name
, "mov.i") == 0
10692 || strcmp (idesc
->name
, "mov.m") == 0)
10694 enum ia64_opnd opnd1
, opnd2
;
10697 opnd1
= idesc
->operands
[0];
10698 opnd2
= idesc
->operands
[1];
10699 if (opnd1
== IA64_OPND_AR3
)
10701 else if (opnd2
== IA64_OPND_AR3
)
10705 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10708 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10710 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10712 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10713 as_bad ("AR %d can only be accessed by %c-unit",
10714 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10718 else if (strcmp (idesc
->name
, "hint.b") == 0)
10724 case hint_b_warning
:
10725 as_warn ("hint.b may be treated as nop");
10728 as_bad ("hint.b shouldn't be used");
10734 if (md
.qp
.X_op
== O_register
)
10736 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10737 md
.qp
.X_op
= O_absent
;
10740 flags
= idesc
->flags
;
10742 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10744 /* The alignment frag has to end with a stop bit only if the
10745 next instruction after the alignment directive has to be
10746 the first instruction in an instruction group. */
10749 while (align_frag
->fr_type
!= rs_align_code
)
10751 align_frag
= align_frag
->fr_next
;
10755 /* align_frag can be NULL if there are directives in
10757 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10758 align_frag
->tc_frag_data
= 1;
10761 insn_group_break (1, 0, 0);
10765 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10767 as_bad ("`%s' cannot be predicated", idesc
->name
);
10771 /* Build the instruction. */
10772 CURR_SLOT
.qp_regno
= qp_regno
;
10773 CURR_SLOT
.idesc
= idesc
;
10774 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10775 dwarf2_where (&CURR_SLOT
.debug_line
);
10777 /* Add unwind entry, if there is one. */
10778 if (unwind
.current_entry
)
10780 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10781 unwind
.current_entry
= NULL
;
10783 if (unwind
.proc_pending
.sym
&& S_IS_DEFINED (unwind
.proc_pending
.sym
))
10786 /* Check for dependency violations. */
10790 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10791 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10792 emit_one_bundle ();
10794 if ((flags
& IA64_OPCODE_LAST
) != 0)
10795 insn_group_break (1, 0, 0);
10797 md
.last_text_seg
= now_seg
;
10800 input_line_pointer
= saved_input_line_pointer
;
10803 /* Called when symbol NAME cannot be found in the symbol table.
10804 Should be used for dynamic valued symbols only. */
10807 md_undefined_symbol (name
)
10808 char *name ATTRIBUTE_UNUSED
;
10813 /* Called for any expression that can not be recognized. When the
10814 function is called, `input_line_pointer' will point to the start of
10821 switch (*input_line_pointer
)
10824 ++input_line_pointer
;
10826 if (*input_line_pointer
!= ']')
10828 as_bad ("Closing bracket missing");
10833 if (e
->X_op
!= O_register
)
10834 as_bad ("Register expected as index");
10836 ++input_line_pointer
;
10847 ignore_rest_of_line ();
10850 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10851 a section symbol plus some offset. For relocs involving @fptr(),
10852 directives we don't want such adjustments since we need to have the
10853 original symbol's name in the reloc. */
10855 ia64_fix_adjustable (fix
)
10858 /* Prevent all adjustments to global symbols */
10859 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10862 switch (fix
->fx_r_type
)
10864 case BFD_RELOC_IA64_FPTR64I
:
10865 case BFD_RELOC_IA64_FPTR32MSB
:
10866 case BFD_RELOC_IA64_FPTR32LSB
:
10867 case BFD_RELOC_IA64_FPTR64MSB
:
10868 case BFD_RELOC_IA64_FPTR64LSB
:
10869 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10870 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10880 ia64_force_relocation (fix
)
10883 switch (fix
->fx_r_type
)
10885 case BFD_RELOC_IA64_FPTR64I
:
10886 case BFD_RELOC_IA64_FPTR32MSB
:
10887 case BFD_RELOC_IA64_FPTR32LSB
:
10888 case BFD_RELOC_IA64_FPTR64MSB
:
10889 case BFD_RELOC_IA64_FPTR64LSB
:
10891 case BFD_RELOC_IA64_LTOFF22
:
10892 case BFD_RELOC_IA64_LTOFF64I
:
10893 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10894 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10895 case BFD_RELOC_IA64_PLTOFF22
:
10896 case BFD_RELOC_IA64_PLTOFF64I
:
10897 case BFD_RELOC_IA64_PLTOFF64MSB
:
10898 case BFD_RELOC_IA64_PLTOFF64LSB
:
10900 case BFD_RELOC_IA64_LTOFF22X
:
10901 case BFD_RELOC_IA64_LDXMOV
:
10908 return generic_force_reloc (fix
);
10911 /* Decide from what point a pc-relative relocation is relative to,
10912 relative to the pc-relative fixup. Er, relatively speaking. */
10914 ia64_pcrel_from_section (fix
, sec
)
10918 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10920 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
10927 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10929 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10933 expr
.X_op
= O_pseudo_fixup
;
10934 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10935 expr
.X_add_number
= 0;
10936 expr
.X_add_symbol
= symbol
;
10937 emit_expr (&expr
, size
);
10940 /* This is called whenever some data item (not an instruction) needs a
10941 fixup. We pick the right reloc code depending on the byteorder
10942 currently in effect. */
10944 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
10950 bfd_reloc_code_real_type code
;
10955 /* There are no reloc for 8 and 16 bit quantities, but we allow
10956 them here since they will work fine as long as the expression
10957 is fully defined at the end of the pass over the source file. */
10958 case 1: code
= BFD_RELOC_8
; break;
10959 case 2: code
= BFD_RELOC_16
; break;
10961 if (target_big_endian
)
10962 code
= BFD_RELOC_IA64_DIR32MSB
;
10964 code
= BFD_RELOC_IA64_DIR32LSB
;
10968 /* In 32-bit mode, data8 could mean function descriptors too. */
10969 if (exp
->X_op
== O_pseudo_fixup
10970 && exp
->X_op_symbol
10971 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
10972 && !(md
.flags
& EF_IA_64_ABI64
))
10974 if (target_big_endian
)
10975 code
= BFD_RELOC_IA64_IPLTMSB
;
10977 code
= BFD_RELOC_IA64_IPLTLSB
;
10978 exp
->X_op
= O_symbol
;
10983 if (target_big_endian
)
10984 code
= BFD_RELOC_IA64_DIR64MSB
;
10986 code
= BFD_RELOC_IA64_DIR64LSB
;
10991 if (exp
->X_op
== O_pseudo_fixup
10992 && exp
->X_op_symbol
10993 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
10995 if (target_big_endian
)
10996 code
= BFD_RELOC_IA64_IPLTMSB
;
10998 code
= BFD_RELOC_IA64_IPLTLSB
;
10999 exp
->X_op
= O_symbol
;
11005 as_bad ("Unsupported fixup size %d", nbytes
);
11006 ignore_rest_of_line ();
11010 if (exp
->X_op
== O_pseudo_fixup
)
11012 exp
->X_op
= O_symbol
;
11013 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11014 /* ??? If code unchanged, unsupported. */
11017 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11018 /* We need to store the byte order in effect in case we're going
11019 to fix an 8 or 16 bit relocation (for which there no real
11020 relocs available). See md_apply_fix(). */
11021 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11024 /* Return the actual relocation we wish to associate with the pseudo
11025 reloc described by SYM and R_TYPE. SYM should be one of the
11026 symbols in the pseudo_func array, or NULL. */
11028 static bfd_reloc_code_real_type
11029 ia64_gen_real_reloc_type (sym
, r_type
)
11030 struct symbol
*sym
;
11031 bfd_reloc_code_real_type r_type
;
11033 bfd_reloc_code_real_type
new = 0;
11034 const char *type
= NULL
, *suffix
= "";
11041 switch (S_GET_VALUE (sym
))
11043 case FUNC_FPTR_RELATIVE
:
11046 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
11047 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
11048 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
11049 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
11050 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
11051 default: type
= "FPTR"; break;
11055 case FUNC_GP_RELATIVE
:
11058 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
11059 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
11060 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
11061 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
11062 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
11063 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
11064 default: type
= "GPREL"; break;
11068 case FUNC_LT_RELATIVE
:
11071 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
11072 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
11073 default: type
= "LTOFF"; break;
11077 case FUNC_LT_RELATIVE_X
:
11080 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
11081 default: type
= "LTOFF"; suffix
= "X"; break;
11085 case FUNC_PC_RELATIVE
:
11088 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
11089 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
11090 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
11091 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
11092 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
11093 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
11094 default: type
= "PCREL"; break;
11098 case FUNC_PLT_RELATIVE
:
11101 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
11102 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
11103 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
11104 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
11105 default: type
= "PLTOFF"; break;
11109 case FUNC_SEC_RELATIVE
:
11112 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
11113 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
11114 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
11115 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
11116 default: type
= "SECREL"; break;
11120 case FUNC_SEG_RELATIVE
:
11123 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
11124 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
11125 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
11126 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
11127 default: type
= "SEGREL"; break;
11131 case FUNC_LTV_RELATIVE
:
11134 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
11135 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
11136 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
11137 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
11138 default: type
= "LTV"; break;
11142 case FUNC_LT_FPTR_RELATIVE
:
11145 case BFD_RELOC_IA64_IMM22
:
11146 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11147 case BFD_RELOC_IA64_IMM64
:
11148 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11149 case BFD_RELOC_IA64_DIR32MSB
:
11150 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11151 case BFD_RELOC_IA64_DIR32LSB
:
11152 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11153 case BFD_RELOC_IA64_DIR64MSB
:
11154 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11155 case BFD_RELOC_IA64_DIR64LSB
:
11156 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11158 type
= "LTOFF_FPTR"; break;
11162 case FUNC_TP_RELATIVE
:
11165 case BFD_RELOC_IA64_IMM14
: new = BFD_RELOC_IA64_TPREL14
; break;
11166 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_TPREL22
; break;
11167 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_TPREL64I
; break;
11168 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_TPREL64MSB
; break;
11169 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_TPREL64LSB
; break;
11170 default: type
= "TPREL"; break;
11174 case FUNC_LT_TP_RELATIVE
:
11177 case BFD_RELOC_IA64_IMM22
:
11178 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11180 type
= "LTOFF_TPREL"; break;
11184 case FUNC_DTP_MODULE
:
11187 case BFD_RELOC_IA64_DIR64MSB
:
11188 new = BFD_RELOC_IA64_DTPMOD64MSB
; break;
11189 case BFD_RELOC_IA64_DIR64LSB
:
11190 new = BFD_RELOC_IA64_DTPMOD64LSB
; break;
11192 type
= "DTPMOD"; break;
11196 case FUNC_LT_DTP_MODULE
:
11199 case BFD_RELOC_IA64_IMM22
:
11200 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11202 type
= "LTOFF_DTPMOD"; break;
11206 case FUNC_DTP_RELATIVE
:
11209 case BFD_RELOC_IA64_DIR32MSB
:
11210 new = BFD_RELOC_IA64_DTPREL32MSB
; break;
11211 case BFD_RELOC_IA64_DIR32LSB
:
11212 new = BFD_RELOC_IA64_DTPREL32LSB
; break;
11213 case BFD_RELOC_IA64_DIR64MSB
:
11214 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
11215 case BFD_RELOC_IA64_DIR64LSB
:
11216 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
11217 case BFD_RELOC_IA64_IMM14
:
11218 new = BFD_RELOC_IA64_DTPREL14
; break;
11219 case BFD_RELOC_IA64_IMM22
:
11220 new = BFD_RELOC_IA64_DTPREL22
; break;
11221 case BFD_RELOC_IA64_IMM64
:
11222 new = BFD_RELOC_IA64_DTPREL64I
; break;
11224 type
= "DTPREL"; break;
11228 case FUNC_LT_DTP_RELATIVE
:
11231 case BFD_RELOC_IA64_IMM22
:
11232 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11234 type
= "LTOFF_DTPREL"; break;
11238 case FUNC_IPLT_RELOC
:
11241 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11242 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11243 default: type
= "IPLT"; break;
11261 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11262 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11263 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11264 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11265 case BFD_RELOC_UNUSED
: width
= 13; break;
11266 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11267 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11268 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11272 /* This should be an error, but since previously there wasn't any
11273 diagnostic here, dont't make it fail because of this for now. */
11274 as_warn ("Cannot express %s%d%s relocation", type
, width
, suffix
);
11279 /* Here is where generate the appropriate reloc for pseudo relocation
11282 ia64_validate_fix (fix
)
11285 switch (fix
->fx_r_type
)
11287 case BFD_RELOC_IA64_FPTR64I
:
11288 case BFD_RELOC_IA64_FPTR32MSB
:
11289 case BFD_RELOC_IA64_FPTR64LSB
:
11290 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11291 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11292 if (fix
->fx_offset
!= 0)
11293 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11294 "No addend allowed in @fptr() relocation");
11302 fix_insn (fix
, odesc
, value
)
11304 const struct ia64_operand
*odesc
;
11307 bfd_vma insn
[3], t0
, t1
, control_bits
;
11312 slot
= fix
->fx_where
& 0x3;
11313 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11315 /* Bundles are always in little-endian byte order */
11316 t0
= bfd_getl64 (fixpos
);
11317 t1
= bfd_getl64 (fixpos
+ 8);
11318 control_bits
= t0
& 0x1f;
11319 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11320 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11321 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11324 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11326 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11327 insn
[2] |= (((value
& 0x7f) << 13)
11328 | (((value
>> 7) & 0x1ff) << 27)
11329 | (((value
>> 16) & 0x1f) << 22)
11330 | (((value
>> 21) & 0x1) << 21)
11331 | (((value
>> 63) & 0x1) << 36));
11333 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11335 if (value
& ~0x3fffffffffffffffULL
)
11336 err
= "integer operand out of range";
11337 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11338 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11340 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11343 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11344 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11345 | (((value
>> 0) & 0xfffff) << 13));
11348 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11351 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
11353 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11354 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11355 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11356 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11359 /* Attempt to simplify or even eliminate a fixup. The return value is
11360 ignored; perhaps it was once meaningful, but now it is historical.
11361 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11363 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11367 md_apply_fix (fix
, valP
, seg
)
11370 segT seg ATTRIBUTE_UNUSED
;
11373 valueT value
= *valP
;
11375 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11379 switch (fix
->fx_r_type
)
11381 case BFD_RELOC_IA64_PCREL21B
: break;
11382 case BFD_RELOC_IA64_PCREL21BI
: break;
11383 case BFD_RELOC_IA64_PCREL21F
: break;
11384 case BFD_RELOC_IA64_PCREL21M
: break;
11385 case BFD_RELOC_IA64_PCREL60B
: break;
11386 case BFD_RELOC_IA64_PCREL22
: break;
11387 case BFD_RELOC_IA64_PCREL64I
: break;
11388 case BFD_RELOC_IA64_PCREL32MSB
: break;
11389 case BFD_RELOC_IA64_PCREL32LSB
: break;
11390 case BFD_RELOC_IA64_PCREL64MSB
: break;
11391 case BFD_RELOC_IA64_PCREL64LSB
: break;
11393 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11400 switch (fix
->fx_r_type
)
11402 case BFD_RELOC_UNUSED
:
11403 /* This must be a TAG13 or TAG13b operand. There are no external
11404 relocs defined for them, so we must give an error. */
11405 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11406 "%s must have a constant value",
11407 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11411 case BFD_RELOC_IA64_TPREL14
:
11412 case BFD_RELOC_IA64_TPREL22
:
11413 case BFD_RELOC_IA64_TPREL64I
:
11414 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11415 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11416 case BFD_RELOC_IA64_DTPREL14
:
11417 case BFD_RELOC_IA64_DTPREL22
:
11418 case BFD_RELOC_IA64_DTPREL64I
:
11419 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11420 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11427 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11429 if (fix
->tc_fix_data
.bigendian
)
11430 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11432 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11437 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11442 /* Generate the BFD reloc to be stuck in the object file from the
11443 fixup used internally in the assembler. */
11446 tc_gen_reloc (sec
, fixp
)
11447 asection
*sec ATTRIBUTE_UNUSED
;
11452 reloc
= xmalloc (sizeof (*reloc
));
11453 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11454 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11455 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11456 reloc
->addend
= fixp
->fx_offset
;
11457 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11461 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11462 "Cannot represent %s relocation in object file",
11463 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11468 /* Turn a string in input_line_pointer into a floating point constant
11469 of type TYPE, and store the appropriate bytes in *LIT. The number
11470 of LITTLENUMS emitted is stored in *SIZE. An error message is
11471 returned, or NULL on OK. */
11473 #define MAX_LITTLENUMS 5
11476 md_atof (type
, lit
, size
)
11481 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11511 return "Bad call to MD_ATOF()";
11513 t
= atof_ieee (input_line_pointer
, type
, words
);
11515 input_line_pointer
= t
;
11517 (*ia64_float_to_chars
) (lit
, words
, prec
);
11521 /* It is 10 byte floating point with 6 byte padding. */
11522 memset (&lit
[10], 0, 6);
11523 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11526 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11531 /* Handle ia64 specific semantics of the align directive. */
11534 ia64_md_do_align (n
, fill
, len
, max
)
11535 int n ATTRIBUTE_UNUSED
;
11536 const char *fill ATTRIBUTE_UNUSED
;
11537 int len ATTRIBUTE_UNUSED
;
11538 int max ATTRIBUTE_UNUSED
;
11540 if (subseg_text_p (now_seg
))
11541 ia64_flush_insns ();
11544 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11545 of an rs_align_code fragment. */
11548 ia64_handle_align (fragp
)
11553 const unsigned char *nop
;
11555 if (fragp
->fr_type
!= rs_align_code
)
11558 /* Check if this frag has to end with a stop bit. */
11559 nop
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11561 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11562 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11564 /* If no paddings are needed, we check if we need a stop bit. */
11565 if (!bytes
&& fragp
->tc_frag_data
)
11567 if (fragp
->fr_fix
< 16)
11569 /* FIXME: It won't work with
11571 alloc r32=ar.pfs,1,2,4,0
11575 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11576 _("Can't add stop bit to mark end of instruction group"));
11579 /* Bundles are always in little-endian byte order. Make sure
11580 the previous bundle has the stop bit. */
11584 /* Make sure we are on a 16-byte boundary, in case someone has been
11585 putting data into a text section. */
11588 int fix
= bytes
& 15;
11589 memset (p
, 0, fix
);
11592 fragp
->fr_fix
+= fix
;
11595 /* Instruction bundles are always little-endian. */
11596 memcpy (p
, nop
, 16);
11597 fragp
->fr_var
= 16;
11601 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11606 number_to_chars_bigendian (lit
, (long) (*words
++),
11607 sizeof (LITTLENUM_TYPE
));
11608 lit
+= sizeof (LITTLENUM_TYPE
);
11613 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11618 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11619 sizeof (LITTLENUM_TYPE
));
11620 lit
+= sizeof (LITTLENUM_TYPE
);
11625 ia64_elf_section_change_hook (void)
11627 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11628 && elf_linked_to_section (now_seg
) == NULL
)
11629 elf_linked_to_section (now_seg
) = text_section
;
11630 dot_byteorder (-1);
11633 /* Check if a label should be made global. */
11635 ia64_check_label (symbolS
*label
)
11637 if (*input_line_pointer
== ':')
11639 S_SET_EXTERNAL (label
);
11640 input_line_pointer
++;
11644 /* Used to remember where .alias and .secalias directives are seen. We
11645 will rename symbol and section names when we are about to output
11646 the relocatable file. */
11649 char *file
; /* The file where the directive is seen. */
11650 unsigned int line
; /* The line number the directive is at. */
11651 const char *name
; /* The orignale name of the symbol. */
11654 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11655 .secalias. Otherwise, it is .alias. */
11657 dot_alias (int section
)
11659 char *name
, *alias
;
11663 const char *error_string
;
11666 struct hash_control
*ahash
, *nhash
;
11669 name
= input_line_pointer
;
11670 delim
= get_symbol_end ();
11671 end_name
= input_line_pointer
;
11674 if (name
== end_name
)
11676 as_bad (_("expected symbol name"));
11677 ignore_rest_of_line ();
11681 SKIP_WHITESPACE ();
11683 if (*input_line_pointer
!= ',')
11686 as_bad (_("expected comma after \"%s\""), name
);
11688 ignore_rest_of_line ();
11692 input_line_pointer
++;
11694 ia64_canonicalize_symbol_name (name
);
11696 /* We call demand_copy_C_string to check if alias string is valid.
11697 There should be a closing `"' and no `\0' in the string. */
11698 alias
= demand_copy_C_string (&len
);
11701 ignore_rest_of_line ();
11705 /* Make a copy of name string. */
11706 len
= strlen (name
) + 1;
11707 obstack_grow (¬es
, name
, len
);
11708 name
= obstack_finish (¬es
);
11713 ahash
= secalias_hash
;
11714 nhash
= secalias_name_hash
;
11719 ahash
= alias_hash
;
11720 nhash
= alias_name_hash
;
11723 /* Check if alias has been used before. */
11724 h
= (struct alias
*) hash_find (ahash
, alias
);
11727 if (strcmp (h
->name
, name
))
11728 as_bad (_("`%s' is already the alias of %s `%s'"),
11729 alias
, kind
, h
->name
);
11733 /* Check if name already has an alias. */
11734 a
= (const char *) hash_find (nhash
, name
);
11737 if (strcmp (a
, alias
))
11738 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11742 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11743 as_where (&h
->file
, &h
->line
);
11746 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
11749 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11750 alias
, kind
, error_string
);
11754 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
11757 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11758 alias
, kind
, error_string
);
11760 obstack_free (¬es
, name
);
11761 obstack_free (¬es
, alias
);
11764 demand_empty_rest_of_line ();
11767 /* It renames the original symbol name to its alias. */
11769 do_alias (const char *alias
, PTR value
)
11771 struct alias
*h
= (struct alias
*) value
;
11772 symbolS
*sym
= symbol_find (h
->name
);
11775 as_warn_where (h
->file
, h
->line
,
11776 _("symbol `%s' aliased to `%s' is not used"),
11779 S_SET_NAME (sym
, (char *) alias
);
11782 /* Called from write_object_file. */
11784 ia64_adjust_symtab (void)
11786 hash_traverse (alias_hash
, do_alias
);
11789 /* It renames the original section name to its alias. */
11791 do_secalias (const char *alias
, PTR value
)
11793 struct alias
*h
= (struct alias
*) value
;
11794 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11797 as_warn_where (h
->file
, h
->line
,
11798 _("section `%s' aliased to `%s' is not used"),
11804 /* Called from write_object_file. */
11806 ia64_frob_file (void)
11808 hash_traverse (secalias_hash
, do_secalias
);