1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2020 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
39 #include "coff/xcoff.h"
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian
;
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian
= 0;
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
54 #define TARGET_REG_NAMES_P TRUE
56 #define TARGET_REG_NAMES_P FALSE
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
94 static bfd_boolean reg_names_p
= TARGET_REG_NAMES_P
;
96 static void ppc_macro (char *, const struct powerpc_macro
*);
97 static void ppc_byte (int);
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS
*, offsetT
);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
136 static void ppc_elf_gnu_attribute (int);
140 static void ppc_previous (int);
141 static void ppc_pdata (int);
142 static void ppc_ydata (int);
143 static void ppc_reldata (int);
144 static void ppc_rdata (int);
145 static void ppc_ualong (int);
146 static void ppc_znop (int);
147 static void ppc_pe_comm (int);
148 static void ppc_pe_section (int);
149 static void ppc_pe_function (int);
150 static void ppc_pe_tocd (int);
153 /* Generic assembler global variables which must be defined by all
157 /* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161 static const char ppc_solaris_comment_chars
[] = "#!";
162 static const char ppc_eabi_comment_chars
[] = "#";
164 #ifdef TARGET_SOLARIS_COMMENT
165 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
167 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
170 const char comment_chars
[] = "#";
173 /* Characters which start a comment at the beginning of a line. */
174 const char line_comment_chars
[] = "#";
176 /* Characters which may be used to separate multiple commands on a
178 const char line_separator_chars
[] = ";";
180 /* Characters which are used to indicate an exponent in a floating
182 const char EXP_CHARS
[] = "eE";
184 /* Characters which mean that a number is a floating point constant,
186 const char FLT_CHARS
[] = "dD";
188 /* Anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190 const char ppc_symbol_chars
[] = "%[";
192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193 int ppc_cie_data_alignment
;
195 /* The dwarf2 minimum instruction length. */
196 int ppc_dwarf2_line_min_insn_length
;
198 /* More than this number of nops in an alignment op gets a branch
200 unsigned long nop_limit
= 4;
202 /* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
204 ppc_cpu_t ppc_cpu
= 0;
205 ppc_cpu_t sticky
= 0;
207 /* Value for ELF e_flags EF_PPC64_ABI. */
208 unsigned int ppc_abiversion
= 0;
211 /* Flags set on encountering toc relocs. */
213 has_large_toc_reloc
= 1,
214 has_small_toc_reloc
= 2
218 /* Warn on emitting data to code sections. */
224 /* The target specific pseudo-ops which we support. */
226 const pseudo_typeS md_pseudo_table
[] =
228 /* Pseudo-ops which must be overridden. */
229 { "byte", ppc_byte
, 0 },
232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
233 legitimately belong in the obj-*.c file. However, XCOFF is based
234 on COFF, and is only implemented for the RS/6000. We just use
235 obj-coff.c, and add what we need here. */
236 { "comm", ppc_comm
, 0 },
237 { "lcomm", ppc_comm
, 1 },
241 { "bi", ppc_biei
, 0 },
243 { "csect", ppc_csect
, 0 },
244 { "dwsect", ppc_dwsect
, 0 },
245 { "data", ppc_section
, 'd' },
249 { "ei", ppc_biei
, 1 },
251 { "extern", ppc_extern
, 0 },
252 { "function", ppc_function
, 0 },
253 { "lglobl", ppc_lglobl
, 0 },
254 { "ref", ppc_ref
, 0 },
255 { "rename", ppc_rename
, 0 },
256 { "section", ppc_named_section
, 0 },
257 { "stabx", ppc_stabx
, 0 },
258 { "text", ppc_section
, 't' },
259 { "toc", ppc_toc
, 0 },
260 { "long", ppc_xcoff_cons
, 2 },
261 { "llong", ppc_xcoff_cons
, 3 },
262 { "word", ppc_xcoff_cons
, 1 },
263 { "short", ppc_xcoff_cons
, 1 },
264 { "vbyte", ppc_vbyte
, 0 },
268 { "llong", cons
, 8 },
269 { "rdata", ppc_elf_rdata
, 0 },
270 { "rodata", ppc_elf_rdata
, 0 },
271 { "lcomm", ppc_elf_lcomm
, 0 },
272 { "localentry", ppc_elf_localentry
, 0 },
273 { "abiversion", ppc_elf_abiversion
, 0 },
274 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
279 { "previous", ppc_previous
, 0 },
280 { "pdata", ppc_pdata
, 0 },
281 { "ydata", ppc_ydata
, 0 },
282 { "reldata", ppc_reldata
, 0 },
283 { "rdata", ppc_rdata
, 0 },
284 { "ualong", ppc_ualong
, 0 },
285 { "znop", ppc_znop
, 0 },
286 { "comm", ppc_pe_comm
, 0 },
287 { "lcomm", ppc_pe_comm
, 1 },
288 { "section", ppc_pe_section
, 0 },
289 { "function", ppc_pe_function
,0 },
290 { "tocd", ppc_pe_tocd
, 0 },
293 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
295 { "machine", ppc_machine
, 0 },
302 /* Predefined register names if -mregnames (or default for Windows NT).
303 In general, there are lots of them, in an attempt to be compatible
304 with a number of other Windows NT assemblers. */
306 /* Structure to hold information about predefined registers. */
310 unsigned short value
;
311 unsigned short flags
;
314 /* List of registers that are pre-defined:
316 Each general register has predefined names of the form:
317 1. r<reg_num> which has the value <reg_num>.
318 2. r.<reg_num> which has the value <reg_num>.
320 Each floating point register has predefined names of the form:
321 1. f<reg_num> which has the value <reg_num>.
322 2. f.<reg_num> which has the value <reg_num>.
324 Each vector unit register has predefined names of the form:
325 1. v<reg_num> which has the value <reg_num>.
326 2. v.<reg_num> which has the value <reg_num>.
328 Each condition register has predefined names of the form:
329 1. cr<reg_num> which has the value <reg_num>.
330 2. cr.<reg_num> which has the value <reg_num>.
332 There are individual registers as well:
333 sp or r.sp has the value 1
334 rtoc or r.toc has the value 2
339 dsisr has the value 18
341 sdr1 has the value 25
342 srr0 has the value 26
343 srr1 has the value 27
345 The table is sorted. Suitable for searching by a binary search. */
347 static const struct pd_reg pre_defined_registers
[] =
349 /* Condition Registers */
350 { "cr.0", 0, PPC_OPERAND_CR_REG
},
351 { "cr.1", 1, PPC_OPERAND_CR_REG
},
352 { "cr.2", 2, PPC_OPERAND_CR_REG
},
353 { "cr.3", 3, PPC_OPERAND_CR_REG
},
354 { "cr.4", 4, PPC_OPERAND_CR_REG
},
355 { "cr.5", 5, PPC_OPERAND_CR_REG
},
356 { "cr.6", 6, PPC_OPERAND_CR_REG
},
357 { "cr.7", 7, PPC_OPERAND_CR_REG
},
359 { "cr0", 0, PPC_OPERAND_CR_REG
},
360 { "cr1", 1, PPC_OPERAND_CR_REG
},
361 { "cr2", 2, PPC_OPERAND_CR_REG
},
362 { "cr3", 3, PPC_OPERAND_CR_REG
},
363 { "cr4", 4, PPC_OPERAND_CR_REG
},
364 { "cr5", 5, PPC_OPERAND_CR_REG
},
365 { "cr6", 6, PPC_OPERAND_CR_REG
},
366 { "cr7", 7, PPC_OPERAND_CR_REG
},
368 { "ctr", 9, PPC_OPERAND_SPR
},
369 { "dar", 19, PPC_OPERAND_SPR
},
370 { "dec", 22, PPC_OPERAND_SPR
},
371 { "dsisr", 18, PPC_OPERAND_SPR
},
373 /* Floating point registers */
374 { "f.0", 0, PPC_OPERAND_FPR
},
375 { "f.1", 1, PPC_OPERAND_FPR
},
376 { "f.10", 10, PPC_OPERAND_FPR
},
377 { "f.11", 11, PPC_OPERAND_FPR
},
378 { "f.12", 12, PPC_OPERAND_FPR
},
379 { "f.13", 13, PPC_OPERAND_FPR
},
380 { "f.14", 14, PPC_OPERAND_FPR
},
381 { "f.15", 15, PPC_OPERAND_FPR
},
382 { "f.16", 16, PPC_OPERAND_FPR
},
383 { "f.17", 17, PPC_OPERAND_FPR
},
384 { "f.18", 18, PPC_OPERAND_FPR
},
385 { "f.19", 19, PPC_OPERAND_FPR
},
386 { "f.2", 2, PPC_OPERAND_FPR
},
387 { "f.20", 20, PPC_OPERAND_FPR
},
388 { "f.21", 21, PPC_OPERAND_FPR
},
389 { "f.22", 22, PPC_OPERAND_FPR
},
390 { "f.23", 23, PPC_OPERAND_FPR
},
391 { "f.24", 24, PPC_OPERAND_FPR
},
392 { "f.25", 25, PPC_OPERAND_FPR
},
393 { "f.26", 26, PPC_OPERAND_FPR
},
394 { "f.27", 27, PPC_OPERAND_FPR
},
395 { "f.28", 28, PPC_OPERAND_FPR
},
396 { "f.29", 29, PPC_OPERAND_FPR
},
397 { "f.3", 3, PPC_OPERAND_FPR
},
398 { "f.30", 30, PPC_OPERAND_FPR
},
399 { "f.31", 31, PPC_OPERAND_FPR
},
400 { "f.32", 32, PPC_OPERAND_VSR
},
401 { "f.33", 33, PPC_OPERAND_VSR
},
402 { "f.34", 34, PPC_OPERAND_VSR
},
403 { "f.35", 35, PPC_OPERAND_VSR
},
404 { "f.36", 36, PPC_OPERAND_VSR
},
405 { "f.37", 37, PPC_OPERAND_VSR
},
406 { "f.38", 38, PPC_OPERAND_VSR
},
407 { "f.39", 39, PPC_OPERAND_VSR
},
408 { "f.4", 4, PPC_OPERAND_FPR
},
409 { "f.40", 40, PPC_OPERAND_VSR
},
410 { "f.41", 41, PPC_OPERAND_VSR
},
411 { "f.42", 42, PPC_OPERAND_VSR
},
412 { "f.43", 43, PPC_OPERAND_VSR
},
413 { "f.44", 44, PPC_OPERAND_VSR
},
414 { "f.45", 45, PPC_OPERAND_VSR
},
415 { "f.46", 46, PPC_OPERAND_VSR
},
416 { "f.47", 47, PPC_OPERAND_VSR
},
417 { "f.48", 48, PPC_OPERAND_VSR
},
418 { "f.49", 49, PPC_OPERAND_VSR
},
419 { "f.5", 5, PPC_OPERAND_FPR
},
420 { "f.50", 50, PPC_OPERAND_VSR
},
421 { "f.51", 51, PPC_OPERAND_VSR
},
422 { "f.52", 52, PPC_OPERAND_VSR
},
423 { "f.53", 53, PPC_OPERAND_VSR
},
424 { "f.54", 54, PPC_OPERAND_VSR
},
425 { "f.55", 55, PPC_OPERAND_VSR
},
426 { "f.56", 56, PPC_OPERAND_VSR
},
427 { "f.57", 57, PPC_OPERAND_VSR
},
428 { "f.58", 58, PPC_OPERAND_VSR
},
429 { "f.59", 59, PPC_OPERAND_VSR
},
430 { "f.6", 6, PPC_OPERAND_FPR
},
431 { "f.60", 60, PPC_OPERAND_VSR
},
432 { "f.61", 61, PPC_OPERAND_VSR
},
433 { "f.62", 62, PPC_OPERAND_VSR
},
434 { "f.63", 63, PPC_OPERAND_VSR
},
435 { "f.7", 7, PPC_OPERAND_FPR
},
436 { "f.8", 8, PPC_OPERAND_FPR
},
437 { "f.9", 9, PPC_OPERAND_FPR
},
439 { "f0", 0, PPC_OPERAND_FPR
},
440 { "f1", 1, PPC_OPERAND_FPR
},
441 { "f10", 10, PPC_OPERAND_FPR
},
442 { "f11", 11, PPC_OPERAND_FPR
},
443 { "f12", 12, PPC_OPERAND_FPR
},
444 { "f13", 13, PPC_OPERAND_FPR
},
445 { "f14", 14, PPC_OPERAND_FPR
},
446 { "f15", 15, PPC_OPERAND_FPR
},
447 { "f16", 16, PPC_OPERAND_FPR
},
448 { "f17", 17, PPC_OPERAND_FPR
},
449 { "f18", 18, PPC_OPERAND_FPR
},
450 { "f19", 19, PPC_OPERAND_FPR
},
451 { "f2", 2, PPC_OPERAND_FPR
},
452 { "f20", 20, PPC_OPERAND_FPR
},
453 { "f21", 21, PPC_OPERAND_FPR
},
454 { "f22", 22, PPC_OPERAND_FPR
},
455 { "f23", 23, PPC_OPERAND_FPR
},
456 { "f24", 24, PPC_OPERAND_FPR
},
457 { "f25", 25, PPC_OPERAND_FPR
},
458 { "f26", 26, PPC_OPERAND_FPR
},
459 { "f27", 27, PPC_OPERAND_FPR
},
460 { "f28", 28, PPC_OPERAND_FPR
},
461 { "f29", 29, PPC_OPERAND_FPR
},
462 { "f3", 3, PPC_OPERAND_FPR
},
463 { "f30", 30, PPC_OPERAND_FPR
},
464 { "f31", 31, PPC_OPERAND_FPR
},
465 { "f32", 32, PPC_OPERAND_VSR
},
466 { "f33", 33, PPC_OPERAND_VSR
},
467 { "f34", 34, PPC_OPERAND_VSR
},
468 { "f35", 35, PPC_OPERAND_VSR
},
469 { "f36", 36, PPC_OPERAND_VSR
},
470 { "f37", 37, PPC_OPERAND_VSR
},
471 { "f38", 38, PPC_OPERAND_VSR
},
472 { "f39", 39, PPC_OPERAND_VSR
},
473 { "f4", 4, PPC_OPERAND_FPR
},
474 { "f40", 40, PPC_OPERAND_VSR
},
475 { "f41", 41, PPC_OPERAND_VSR
},
476 { "f42", 42, PPC_OPERAND_VSR
},
477 { "f43", 43, PPC_OPERAND_VSR
},
478 { "f44", 44, PPC_OPERAND_VSR
},
479 { "f45", 45, PPC_OPERAND_VSR
},
480 { "f46", 46, PPC_OPERAND_VSR
},
481 { "f47", 47, PPC_OPERAND_VSR
},
482 { "f48", 48, PPC_OPERAND_VSR
},
483 { "f49", 49, PPC_OPERAND_VSR
},
484 { "f5", 5, PPC_OPERAND_FPR
},
485 { "f50", 50, PPC_OPERAND_VSR
},
486 { "f51", 51, PPC_OPERAND_VSR
},
487 { "f52", 52, PPC_OPERAND_VSR
},
488 { "f53", 53, PPC_OPERAND_VSR
},
489 { "f54", 54, PPC_OPERAND_VSR
},
490 { "f55", 55, PPC_OPERAND_VSR
},
491 { "f56", 56, PPC_OPERAND_VSR
},
492 { "f57", 57, PPC_OPERAND_VSR
},
493 { "f58", 58, PPC_OPERAND_VSR
},
494 { "f59", 59, PPC_OPERAND_VSR
},
495 { "f6", 6, PPC_OPERAND_FPR
},
496 { "f60", 60, PPC_OPERAND_VSR
},
497 { "f61", 61, PPC_OPERAND_VSR
},
498 { "f62", 62, PPC_OPERAND_VSR
},
499 { "f63", 63, PPC_OPERAND_VSR
},
500 { "f7", 7, PPC_OPERAND_FPR
},
501 { "f8", 8, PPC_OPERAND_FPR
},
502 { "f9", 9, PPC_OPERAND_FPR
},
504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0, PPC_OPERAND_GQR
},
506 { "gqr.1", 1, PPC_OPERAND_GQR
},
507 { "gqr.2", 2, PPC_OPERAND_GQR
},
508 { "gqr.3", 3, PPC_OPERAND_GQR
},
509 { "gqr.4", 4, PPC_OPERAND_GQR
},
510 { "gqr.5", 5, PPC_OPERAND_GQR
},
511 { "gqr.6", 6, PPC_OPERAND_GQR
},
512 { "gqr.7", 7, PPC_OPERAND_GQR
},
513 { "gqr0", 0, PPC_OPERAND_GQR
},
514 { "gqr1", 1, PPC_OPERAND_GQR
},
515 { "gqr2", 2, PPC_OPERAND_GQR
},
516 { "gqr3", 3, PPC_OPERAND_GQR
},
517 { "gqr4", 4, PPC_OPERAND_GQR
},
518 { "gqr5", 5, PPC_OPERAND_GQR
},
519 { "gqr6", 6, PPC_OPERAND_GQR
},
520 { "gqr7", 7, PPC_OPERAND_GQR
},
522 { "lr", 8, PPC_OPERAND_SPR
},
524 /* General Purpose Registers */
525 { "r.0", 0, PPC_OPERAND_GPR
},
526 { "r.1", 1, PPC_OPERAND_GPR
},
527 { "r.10", 10, PPC_OPERAND_GPR
},
528 { "r.11", 11, PPC_OPERAND_GPR
},
529 { "r.12", 12, PPC_OPERAND_GPR
},
530 { "r.13", 13, PPC_OPERAND_GPR
},
531 { "r.14", 14, PPC_OPERAND_GPR
},
532 { "r.15", 15, PPC_OPERAND_GPR
},
533 { "r.16", 16, PPC_OPERAND_GPR
},
534 { "r.17", 17, PPC_OPERAND_GPR
},
535 { "r.18", 18, PPC_OPERAND_GPR
},
536 { "r.19", 19, PPC_OPERAND_GPR
},
537 { "r.2", 2, PPC_OPERAND_GPR
},
538 { "r.20", 20, PPC_OPERAND_GPR
},
539 { "r.21", 21, PPC_OPERAND_GPR
},
540 { "r.22", 22, PPC_OPERAND_GPR
},
541 { "r.23", 23, PPC_OPERAND_GPR
},
542 { "r.24", 24, PPC_OPERAND_GPR
},
543 { "r.25", 25, PPC_OPERAND_GPR
},
544 { "r.26", 26, PPC_OPERAND_GPR
},
545 { "r.27", 27, PPC_OPERAND_GPR
},
546 { "r.28", 28, PPC_OPERAND_GPR
},
547 { "r.29", 29, PPC_OPERAND_GPR
},
548 { "r.3", 3, PPC_OPERAND_GPR
},
549 { "r.30", 30, PPC_OPERAND_GPR
},
550 { "r.31", 31, PPC_OPERAND_GPR
},
551 { "r.4", 4, PPC_OPERAND_GPR
},
552 { "r.5", 5, PPC_OPERAND_GPR
},
553 { "r.6", 6, PPC_OPERAND_GPR
},
554 { "r.7", 7, PPC_OPERAND_GPR
},
555 { "r.8", 8, PPC_OPERAND_GPR
},
556 { "r.9", 9, PPC_OPERAND_GPR
},
558 { "r.sp", 1, PPC_OPERAND_GPR
},
560 { "r.toc", 2, PPC_OPERAND_GPR
},
562 { "r0", 0, PPC_OPERAND_GPR
},
563 { "r1", 1, PPC_OPERAND_GPR
},
564 { "r10", 10, PPC_OPERAND_GPR
},
565 { "r11", 11, PPC_OPERAND_GPR
},
566 { "r12", 12, PPC_OPERAND_GPR
},
567 { "r13", 13, PPC_OPERAND_GPR
},
568 { "r14", 14, PPC_OPERAND_GPR
},
569 { "r15", 15, PPC_OPERAND_GPR
},
570 { "r16", 16, PPC_OPERAND_GPR
},
571 { "r17", 17, PPC_OPERAND_GPR
},
572 { "r18", 18, PPC_OPERAND_GPR
},
573 { "r19", 19, PPC_OPERAND_GPR
},
574 { "r2", 2, PPC_OPERAND_GPR
},
575 { "r20", 20, PPC_OPERAND_GPR
},
576 { "r21", 21, PPC_OPERAND_GPR
},
577 { "r22", 22, PPC_OPERAND_GPR
},
578 { "r23", 23, PPC_OPERAND_GPR
},
579 { "r24", 24, PPC_OPERAND_GPR
},
580 { "r25", 25, PPC_OPERAND_GPR
},
581 { "r26", 26, PPC_OPERAND_GPR
},
582 { "r27", 27, PPC_OPERAND_GPR
},
583 { "r28", 28, PPC_OPERAND_GPR
},
584 { "r29", 29, PPC_OPERAND_GPR
},
585 { "r3", 3, PPC_OPERAND_GPR
},
586 { "r30", 30, PPC_OPERAND_GPR
},
587 { "r31", 31, PPC_OPERAND_GPR
},
588 { "r4", 4, PPC_OPERAND_GPR
},
589 { "r5", 5, PPC_OPERAND_GPR
},
590 { "r6", 6, PPC_OPERAND_GPR
},
591 { "r7", 7, PPC_OPERAND_GPR
},
592 { "r8", 8, PPC_OPERAND_GPR
},
593 { "r9", 9, PPC_OPERAND_GPR
},
595 { "rtoc", 2, PPC_OPERAND_GPR
},
597 { "sdr1", 25, PPC_OPERAND_SPR
},
599 { "sp", 1, PPC_OPERAND_GPR
},
601 { "srr0", 26, PPC_OPERAND_SPR
},
602 { "srr1", 27, PPC_OPERAND_SPR
},
604 /* Vector (Altivec/VMX) registers */
605 { "v.0", 0, PPC_OPERAND_VR
},
606 { "v.1", 1, PPC_OPERAND_VR
},
607 { "v.10", 10, PPC_OPERAND_VR
},
608 { "v.11", 11, PPC_OPERAND_VR
},
609 { "v.12", 12, PPC_OPERAND_VR
},
610 { "v.13", 13, PPC_OPERAND_VR
},
611 { "v.14", 14, PPC_OPERAND_VR
},
612 { "v.15", 15, PPC_OPERAND_VR
},
613 { "v.16", 16, PPC_OPERAND_VR
},
614 { "v.17", 17, PPC_OPERAND_VR
},
615 { "v.18", 18, PPC_OPERAND_VR
},
616 { "v.19", 19, PPC_OPERAND_VR
},
617 { "v.2", 2, PPC_OPERAND_VR
},
618 { "v.20", 20, PPC_OPERAND_VR
},
619 { "v.21", 21, PPC_OPERAND_VR
},
620 { "v.22", 22, PPC_OPERAND_VR
},
621 { "v.23", 23, PPC_OPERAND_VR
},
622 { "v.24", 24, PPC_OPERAND_VR
},
623 { "v.25", 25, PPC_OPERAND_VR
},
624 { "v.26", 26, PPC_OPERAND_VR
},
625 { "v.27", 27, PPC_OPERAND_VR
},
626 { "v.28", 28, PPC_OPERAND_VR
},
627 { "v.29", 29, PPC_OPERAND_VR
},
628 { "v.3", 3, PPC_OPERAND_VR
},
629 { "v.30", 30, PPC_OPERAND_VR
},
630 { "v.31", 31, PPC_OPERAND_VR
},
631 { "v.4", 4, PPC_OPERAND_VR
},
632 { "v.5", 5, PPC_OPERAND_VR
},
633 { "v.6", 6, PPC_OPERAND_VR
},
634 { "v.7", 7, PPC_OPERAND_VR
},
635 { "v.8", 8, PPC_OPERAND_VR
},
636 { "v.9", 9, PPC_OPERAND_VR
},
638 { "v0", 0, PPC_OPERAND_VR
},
639 { "v1", 1, PPC_OPERAND_VR
},
640 { "v10", 10, PPC_OPERAND_VR
},
641 { "v11", 11, PPC_OPERAND_VR
},
642 { "v12", 12, PPC_OPERAND_VR
},
643 { "v13", 13, PPC_OPERAND_VR
},
644 { "v14", 14, PPC_OPERAND_VR
},
645 { "v15", 15, PPC_OPERAND_VR
},
646 { "v16", 16, PPC_OPERAND_VR
},
647 { "v17", 17, PPC_OPERAND_VR
},
648 { "v18", 18, PPC_OPERAND_VR
},
649 { "v19", 19, PPC_OPERAND_VR
},
650 { "v2", 2, PPC_OPERAND_VR
},
651 { "v20", 20, PPC_OPERAND_VR
},
652 { "v21", 21, PPC_OPERAND_VR
},
653 { "v22", 22, PPC_OPERAND_VR
},
654 { "v23", 23, PPC_OPERAND_VR
},
655 { "v24", 24, PPC_OPERAND_VR
},
656 { "v25", 25, PPC_OPERAND_VR
},
657 { "v26", 26, PPC_OPERAND_VR
},
658 { "v27", 27, PPC_OPERAND_VR
},
659 { "v28", 28, PPC_OPERAND_VR
},
660 { "v29", 29, PPC_OPERAND_VR
},
661 { "v3", 3, PPC_OPERAND_VR
},
662 { "v30", 30, PPC_OPERAND_VR
},
663 { "v31", 31, PPC_OPERAND_VR
},
664 { "v4", 4, PPC_OPERAND_VR
},
665 { "v5", 5, PPC_OPERAND_VR
},
666 { "v6", 6, PPC_OPERAND_VR
},
667 { "v7", 7, PPC_OPERAND_VR
},
668 { "v8", 8, PPC_OPERAND_VR
},
669 { "v9", 9, PPC_OPERAND_VR
},
671 /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.0", 0, PPC_OPERAND_VSR
},
673 { "vs.1", 1, PPC_OPERAND_VSR
},
674 { "vs.10", 10, PPC_OPERAND_VSR
},
675 { "vs.11", 11, PPC_OPERAND_VSR
},
676 { "vs.12", 12, PPC_OPERAND_VSR
},
677 { "vs.13", 13, PPC_OPERAND_VSR
},
678 { "vs.14", 14, PPC_OPERAND_VSR
},
679 { "vs.15", 15, PPC_OPERAND_VSR
},
680 { "vs.16", 16, PPC_OPERAND_VSR
},
681 { "vs.17", 17, PPC_OPERAND_VSR
},
682 { "vs.18", 18, PPC_OPERAND_VSR
},
683 { "vs.19", 19, PPC_OPERAND_VSR
},
684 { "vs.2", 2, PPC_OPERAND_VSR
},
685 { "vs.20", 20, PPC_OPERAND_VSR
},
686 { "vs.21", 21, PPC_OPERAND_VSR
},
687 { "vs.22", 22, PPC_OPERAND_VSR
},
688 { "vs.23", 23, PPC_OPERAND_VSR
},
689 { "vs.24", 24, PPC_OPERAND_VSR
},
690 { "vs.25", 25, PPC_OPERAND_VSR
},
691 { "vs.26", 26, PPC_OPERAND_VSR
},
692 { "vs.27", 27, PPC_OPERAND_VSR
},
693 { "vs.28", 28, PPC_OPERAND_VSR
},
694 { "vs.29", 29, PPC_OPERAND_VSR
},
695 { "vs.3", 3, PPC_OPERAND_VSR
},
696 { "vs.30", 30, PPC_OPERAND_VSR
},
697 { "vs.31", 31, PPC_OPERAND_VSR
},
698 { "vs.32", 32, PPC_OPERAND_VSR
},
699 { "vs.33", 33, PPC_OPERAND_VSR
},
700 { "vs.34", 34, PPC_OPERAND_VSR
},
701 { "vs.35", 35, PPC_OPERAND_VSR
},
702 { "vs.36", 36, PPC_OPERAND_VSR
},
703 { "vs.37", 37, PPC_OPERAND_VSR
},
704 { "vs.38", 38, PPC_OPERAND_VSR
},
705 { "vs.39", 39, PPC_OPERAND_VSR
},
706 { "vs.4", 4, PPC_OPERAND_VSR
},
707 { "vs.40", 40, PPC_OPERAND_VSR
},
708 { "vs.41", 41, PPC_OPERAND_VSR
},
709 { "vs.42", 42, PPC_OPERAND_VSR
},
710 { "vs.43", 43, PPC_OPERAND_VSR
},
711 { "vs.44", 44, PPC_OPERAND_VSR
},
712 { "vs.45", 45, PPC_OPERAND_VSR
},
713 { "vs.46", 46, PPC_OPERAND_VSR
},
714 { "vs.47", 47, PPC_OPERAND_VSR
},
715 { "vs.48", 48, PPC_OPERAND_VSR
},
716 { "vs.49", 49, PPC_OPERAND_VSR
},
717 { "vs.5", 5, PPC_OPERAND_VSR
},
718 { "vs.50", 50, PPC_OPERAND_VSR
},
719 { "vs.51", 51, PPC_OPERAND_VSR
},
720 { "vs.52", 52, PPC_OPERAND_VSR
},
721 { "vs.53", 53, PPC_OPERAND_VSR
},
722 { "vs.54", 54, PPC_OPERAND_VSR
},
723 { "vs.55", 55, PPC_OPERAND_VSR
},
724 { "vs.56", 56, PPC_OPERAND_VSR
},
725 { "vs.57", 57, PPC_OPERAND_VSR
},
726 { "vs.58", 58, PPC_OPERAND_VSR
},
727 { "vs.59", 59, PPC_OPERAND_VSR
},
728 { "vs.6", 6, PPC_OPERAND_VSR
},
729 { "vs.60", 60, PPC_OPERAND_VSR
},
730 { "vs.61", 61, PPC_OPERAND_VSR
},
731 { "vs.62", 62, PPC_OPERAND_VSR
},
732 { "vs.63", 63, PPC_OPERAND_VSR
},
733 { "vs.7", 7, PPC_OPERAND_VSR
},
734 { "vs.8", 8, PPC_OPERAND_VSR
},
735 { "vs.9", 9, PPC_OPERAND_VSR
},
737 { "vs0", 0, PPC_OPERAND_VSR
},
738 { "vs1", 1, PPC_OPERAND_VSR
},
739 { "vs10", 10, PPC_OPERAND_VSR
},
740 { "vs11", 11, PPC_OPERAND_VSR
},
741 { "vs12", 12, PPC_OPERAND_VSR
},
742 { "vs13", 13, PPC_OPERAND_VSR
},
743 { "vs14", 14, PPC_OPERAND_VSR
},
744 { "vs15", 15, PPC_OPERAND_VSR
},
745 { "vs16", 16, PPC_OPERAND_VSR
},
746 { "vs17", 17, PPC_OPERAND_VSR
},
747 { "vs18", 18, PPC_OPERAND_VSR
},
748 { "vs19", 19, PPC_OPERAND_VSR
},
749 { "vs2", 2, PPC_OPERAND_VSR
},
750 { "vs20", 20, PPC_OPERAND_VSR
},
751 { "vs21", 21, PPC_OPERAND_VSR
},
752 { "vs22", 22, PPC_OPERAND_VSR
},
753 { "vs23", 23, PPC_OPERAND_VSR
},
754 { "vs24", 24, PPC_OPERAND_VSR
},
755 { "vs25", 25, PPC_OPERAND_VSR
},
756 { "vs26", 26, PPC_OPERAND_VSR
},
757 { "vs27", 27, PPC_OPERAND_VSR
},
758 { "vs28", 28, PPC_OPERAND_VSR
},
759 { "vs29", 29, PPC_OPERAND_VSR
},
760 { "vs3", 3, PPC_OPERAND_VSR
},
761 { "vs30", 30, PPC_OPERAND_VSR
},
762 { "vs31", 31, PPC_OPERAND_VSR
},
763 { "vs32", 32, PPC_OPERAND_VSR
},
764 { "vs33", 33, PPC_OPERAND_VSR
},
765 { "vs34", 34, PPC_OPERAND_VSR
},
766 { "vs35", 35, PPC_OPERAND_VSR
},
767 { "vs36", 36, PPC_OPERAND_VSR
},
768 { "vs37", 37, PPC_OPERAND_VSR
},
769 { "vs38", 38, PPC_OPERAND_VSR
},
770 { "vs39", 39, PPC_OPERAND_VSR
},
771 { "vs4", 4, PPC_OPERAND_VSR
},
772 { "vs40", 40, PPC_OPERAND_VSR
},
773 { "vs41", 41, PPC_OPERAND_VSR
},
774 { "vs42", 42, PPC_OPERAND_VSR
},
775 { "vs43", 43, PPC_OPERAND_VSR
},
776 { "vs44", 44, PPC_OPERAND_VSR
},
777 { "vs45", 45, PPC_OPERAND_VSR
},
778 { "vs46", 46, PPC_OPERAND_VSR
},
779 { "vs47", 47, PPC_OPERAND_VSR
},
780 { "vs48", 48, PPC_OPERAND_VSR
},
781 { "vs49", 49, PPC_OPERAND_VSR
},
782 { "vs5", 5, PPC_OPERAND_VSR
},
783 { "vs50", 50, PPC_OPERAND_VSR
},
784 { "vs51", 51, PPC_OPERAND_VSR
},
785 { "vs52", 52, PPC_OPERAND_VSR
},
786 { "vs53", 53, PPC_OPERAND_VSR
},
787 { "vs54", 54, PPC_OPERAND_VSR
},
788 { "vs55", 55, PPC_OPERAND_VSR
},
789 { "vs56", 56, PPC_OPERAND_VSR
},
790 { "vs57", 57, PPC_OPERAND_VSR
},
791 { "vs58", 58, PPC_OPERAND_VSR
},
792 { "vs59", 59, PPC_OPERAND_VSR
},
793 { "vs6", 6, PPC_OPERAND_VSR
},
794 { "vs60", 60, PPC_OPERAND_VSR
},
795 { "vs61", 61, PPC_OPERAND_VSR
},
796 { "vs62", 62, PPC_OPERAND_VSR
},
797 { "vs63", 63, PPC_OPERAND_VSR
},
798 { "vs7", 7, PPC_OPERAND_VSR
},
799 { "vs8", 8, PPC_OPERAND_VSR
},
800 { "vs9", 9, PPC_OPERAND_VSR
},
802 { "xer", 1, PPC_OPERAND_SPR
}
805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
807 /* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
810 static const struct pd_reg
*
811 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
813 int middle
, low
, high
;
821 middle
= (low
+ high
) / 2;
822 cmp
= strcasecmp (name
, regs
[middle
].name
);
828 return ®s
[middle
];
836 * Summary of register_name.
838 * in: Input_line_pointer points to 1st char of operand.
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 register_name (expressionS
*expressionP
)
850 const struct pd_reg
*reg
;
855 /* Find the spelling of the operand. */
856 start
= name
= input_line_pointer
;
857 if (name
[0] == '%' && ISALPHA (name
[1]))
858 name
= ++input_line_pointer
;
860 else if (!reg_names_p
|| !ISALPHA (name
[0]))
863 c
= get_symbol_name (&name
);
864 reg
= reg_name_search (pre_defined_registers
, REG_NAME_CNT
, name
);
866 /* Put back the delimiting char. */
867 *input_line_pointer
= c
;
869 /* Look to see if it's in the register table. */
872 expressionP
->X_op
= O_register
;
873 expressionP
->X_add_number
= reg
->value
;
874 expressionP
->X_md
= reg
->flags
;
876 /* Make the rest nice. */
877 expressionP
->X_add_symbol
= NULL
;
878 expressionP
->X_op_symbol
= NULL
;
882 /* Reset the line as if we had not done anything. */
883 input_line_pointer
= start
;
887 /* This function is called for each symbol seen in an expression. It
888 handles the special parsing which PowerPC assemblers are supposed
889 to use for condition codes. */
891 /* Whether to do the special parsing. */
892 static bfd_boolean cr_operand
;
894 /* Names to recognize in a condition code. This table is sorted. */
895 static const struct pd_reg cr_names
[] =
897 { "cr0", 0, PPC_OPERAND_CR_REG
},
898 { "cr1", 1, PPC_OPERAND_CR_REG
},
899 { "cr2", 2, PPC_OPERAND_CR_REG
},
900 { "cr3", 3, PPC_OPERAND_CR_REG
},
901 { "cr4", 4, PPC_OPERAND_CR_REG
},
902 { "cr5", 5, PPC_OPERAND_CR_REG
},
903 { "cr6", 6, PPC_OPERAND_CR_REG
},
904 { "cr7", 7, PPC_OPERAND_CR_REG
},
905 { "eq", 2, PPC_OPERAND_CR_BIT
},
906 { "gt", 1, PPC_OPERAND_CR_BIT
},
907 { "lt", 0, PPC_OPERAND_CR_BIT
},
908 { "so", 3, PPC_OPERAND_CR_BIT
},
909 { "un", 3, PPC_OPERAND_CR_BIT
}
912 /* Parsing function. This returns non-zero if it recognized an
916 ppc_parse_name (const char *name
, expressionS
*exp
)
918 const struct pd_reg
*reg
;
925 reg
= reg_name_search (cr_names
, sizeof cr_names
/ sizeof cr_names
[0],
930 exp
->X_op
= O_register
;
931 exp
->X_add_number
= reg
->value
;
932 exp
->X_md
= reg
->flags
;
937 /* Propagate X_md and check register expressions. This is to support
938 condition codes like 4*cr5+eq. */
941 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
943 /* Accept 4*cr<n> and cr<n>*4. */
945 && ((right
->X_op
== O_register
946 && right
->X_md
== PPC_OPERAND_CR_REG
947 && left
->X_op
== O_constant
948 && left
->X_add_number
== 4)
949 || (left
->X_op
== O_register
950 && left
->X_md
== PPC_OPERAND_CR_REG
951 && right
->X_op
== O_constant
952 && right
->X_add_number
== 4)))
954 left
->X_op
= O_register
;
955 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
956 left
->X_add_number
*= right
->X_add_number
;
960 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
961 if (right
->X_op
== O_register
962 && left
->X_op
== O_register
964 && ((right
->X_md
== PPC_OPERAND_CR_BIT
965 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
966 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
967 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
969 left
->X_md
= PPC_OPERAND_CR_BIT
;
970 right
->X_op
= O_constant
;
974 /* Accept reg +/- constant. */
975 if (left
->X_op
== O_register
976 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
977 as_warn (_("invalid register expression"));
979 /* Accept constant + reg. */
980 if (right
->X_op
== O_register
)
982 if (op
== O_add
&& left
->X_op
== O_constant
)
983 left
->X_md
= right
->X_md
;
985 as_warn (_("invalid register expression"));
991 /* Local variables. */
993 /* Whether to target xcoff64/elf64. */
994 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
996 /* Opcode hash table. */
997 static struct hash_control
*ppc_hash
;
999 /* Macro hash table. */
1000 static struct hash_control
*ppc_macro_hash
;
1003 /* What type of shared library support to use. */
1004 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
1006 /* Flags to set in the elf header. */
1007 static flagword ppc_flags
= 0;
1009 /* Whether this is Solaris or not. */
1010 #ifdef TARGET_SOLARIS_COMMENT
1011 #define SOLARIS_P TRUE
1013 #define SOLARIS_P FALSE
1016 static bfd_boolean msolaris
= SOLARIS_P
;
1021 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1022 using a bunch of different sections. These assembler sections,
1023 however, are all encompassed within the .text or .data sections of
1024 the final output file. We handle this by using different
1025 subsegments within these main segments. */
1027 /* Next subsegment to allocate within the .text segment. */
1028 static subsegT ppc_text_subsegment
= 2;
1030 /* Linked list of csects in the text section. */
1031 static symbolS
*ppc_text_csects
;
1033 /* Next subsegment to allocate within the .data segment. */
1034 static subsegT ppc_data_subsegment
= 2;
1036 /* Linked list of csects in the data section. */
1037 static symbolS
*ppc_data_csects
;
1039 /* The current csect. */
1040 static symbolS
*ppc_current_csect
;
1042 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1043 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1044 A special relocation is used when accessing TOC entries. We handle
1045 the TOC as a subsegment within the .data segment. We set it up if
1046 we see a .toc pseudo-op, and save the csect symbol here. */
1047 static symbolS
*ppc_toc_csect
;
1049 /* The first frag in the TOC subsegment. */
1050 static fragS
*ppc_toc_frag
;
1052 /* The first frag in the first subsegment after the TOC in the .data
1053 segment. NULL if there are no subsegments after the TOC. */
1054 static fragS
*ppc_after_toc_frag
;
1056 /* The current static block. */
1057 static symbolS
*ppc_current_block
;
1059 /* The COFF debugging section; set by md_begin. This is not the
1060 .debug section, but is instead the secret BFD section which will
1061 cause BFD to set the section number of a symbol to N_DEBUG. */
1062 static asection
*ppc_coff_debug_section
;
1064 /* Structure to set the length field of the dwarf sections. */
1065 struct dw_subsection
{
1066 /* Subsections are simply linked. */
1067 struct dw_subsection
*link
;
1069 /* The subsection number. */
1072 /* Expression to compute the length of the section. */
1073 expressionS end_exp
;
1076 static struct dw_section
{
1077 /* Corresponding section. */
1080 /* Simply linked list of subsections with a label. */
1081 struct dw_subsection
*list_subseg
;
1083 /* The anonymous subsection. */
1084 struct dw_subsection
*anon_subseg
;
1085 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1086 #endif /* OBJ_XCOFF */
1090 /* Various sections that we need for PE coff support. */
1091 static segT ydata_section
;
1092 static segT pdata_section
;
1093 static segT reldata_section
;
1094 static segT rdata_section
;
1095 static segT tocdata_section
;
1097 /* The current section and the previous section. See ppc_previous. */
1098 static segT ppc_previous_section
;
1099 static segT ppc_current_section
;
1104 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1105 unsigned long *ppc_apuinfo_list
;
1106 unsigned int ppc_apuinfo_num
;
1107 unsigned int ppc_apuinfo_num_alloc
;
1108 #endif /* OBJ_ELF */
1111 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1113 const char *const md_shortopts
= "um:";
1115 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1116 const struct option md_longopts
[] = {
1117 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1118 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1119 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1120 {NULL
, no_argument
, NULL
, 0}
1122 const size_t md_longopts_size
= sizeof (md_longopts
);
1125 md_parse_option (int c
, const char *arg
)
1132 /* -u means that any undefined symbols should be treated as
1133 external, which is the default for gas anyhow. */
1138 /* Solaris as takes -le (presumably for little endian). For completeness
1139 sake, recognize -be also. */
1140 if (strcmp (arg
, "e") == 0)
1142 target_big_endian
= 0;
1143 set_target_endian
= 1;
1144 if (ppc_cpu
& PPC_OPCODE_VLE
)
1145 as_bad (_("the use of -mvle requires big endian."));
1153 if (strcmp (arg
, "e") == 0)
1155 target_big_endian
= 1;
1156 set_target_endian
= 1;
1164 /* Recognize -K PIC. */
1165 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1168 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1176 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1178 if (strcmp (arg
, "64") == 0)
1182 if (ppc_cpu
& PPC_OPCODE_VLE
)
1183 as_bad (_("the use of -mvle requires -a32."));
1185 as_fatal (_("%s unsupported"), "-a64");
1188 else if (strcmp (arg
, "32") == 0)
1195 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1196 /* "raw" is only valid for the disassembler. */
1197 if (new_cpu
!= 0 && (new_cpu
& PPC_OPCODE_RAW
) == 0)
1200 if (strcmp (arg
, "vle") == 0)
1202 if (set_target_endian
&& target_big_endian
== 0)
1203 as_bad (_("the use of -mvle requires big endian."));
1205 as_bad (_("the use of -mvle requires -a32."));
1209 else if (strcmp (arg
, "no-vle") == 0)
1211 sticky
&= ~PPC_OPCODE_VLE
;
1213 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, "booke");
1214 new_cpu
&= ~PPC_OPCODE_VLE
;
1219 else if (strcmp (arg
, "regnames") == 0)
1222 else if (strcmp (arg
, "no-regnames") == 0)
1223 reg_names_p
= FALSE
;
1226 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1227 that require relocation. */
1228 else if (strcmp (arg
, "relocatable") == 0)
1230 shlib
= SHLIB_MRELOCATABLE
;
1231 ppc_flags
|= EF_PPC_RELOCATABLE
;
1234 else if (strcmp (arg
, "relocatable-lib") == 0)
1236 shlib
= SHLIB_MRELOCATABLE
;
1237 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1240 /* -memb, set embedded bit. */
1241 else if (strcmp (arg
, "emb") == 0)
1242 ppc_flags
|= EF_PPC_EMB
;
1244 /* -mlittle/-mbig set the endianness. */
1245 else if (strcmp (arg
, "little") == 0
1246 || strcmp (arg
, "little-endian") == 0)
1248 target_big_endian
= 0;
1249 set_target_endian
= 1;
1250 if (ppc_cpu
& PPC_OPCODE_VLE
)
1251 as_bad (_("the use of -mvle requires big endian."));
1254 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1256 target_big_endian
= 1;
1257 set_target_endian
= 1;
1260 else if (strcmp (arg
, "solaris") == 0)
1263 ppc_comment_chars
= ppc_solaris_comment_chars
;
1266 else if (strcmp (arg
, "no-solaris") == 0)
1269 ppc_comment_chars
= ppc_eabi_comment_chars
;
1271 else if (strcmp (arg
, "spe2") == 0)
1273 ppc_cpu
|= PPC_OPCODE_SPE2
;
1278 as_bad (_("invalid switch -m%s"), arg
);
1284 /* -V: SVR4 argument to print version ID. */
1286 print_version_id ();
1289 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1290 should be emitted or not. FIXME: Not implemented. */
1294 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1295 rather than .stabs.excl, which is ignored by the linker.
1296 FIXME: Not implemented. */
1307 nop_limit
= strtoul (optarg
, &end
, 0);
1309 as_bad (_("--nops needs a numeric argument"));
1324 is_ppc64_target (const bfd_target
*targ
, void *data ATTRIBUTE_UNUSED
)
1326 switch (targ
->flavour
)
1329 case bfd_target_elf_flavour
:
1330 return strncmp (targ
->name
, "elf64-powerpc", 13) == 0;
1333 case bfd_target_xcoff_flavour
:
1334 return (strcmp (targ
->name
, "aixcoff64-rs6000") == 0
1335 || strcmp (targ
->name
, "aix5coff64-rs6000") == 0);
1343 md_show_usage (FILE *stream
)
1345 fprintf (stream
, _("\
1346 PowerPC options:\n"));
1347 fprintf (stream
, _("\
1348 -a32 generate ELF32/XCOFF32\n"));
1349 if (bfd_iterate_over_targets (is_ppc64_target
, NULL
))
1350 fprintf (stream
, _("\
1351 -a64 generate ELF64/XCOFF64\n"));
1352 fprintf (stream
, _("\
1354 fprintf (stream
, _("\
1355 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n"));
1356 fprintf (stream
, _("\
1357 -mpwr generate code for POWER (RIOS1)\n"));
1358 fprintf (stream
, _("\
1359 -m601 generate code for PowerPC 601\n"));
1360 fprintf (stream
, _("\
1361 -mppc, -mppc32, -m603, -m604\n\
1362 generate code for PowerPC 603/604\n"));
1363 fprintf (stream
, _("\
1364 -m403 generate code for PowerPC 403\n"));
1365 fprintf (stream
, _("\
1366 -m405 generate code for PowerPC 405\n"));
1367 fprintf (stream
, _("\
1368 -m440 generate code for PowerPC 440\n"));
1369 fprintf (stream
, _("\
1370 -m464 generate code for PowerPC 464\n"));
1371 fprintf (stream
, _("\
1372 -m476 generate code for PowerPC 476\n"));
1373 fprintf (stream
, _("\
1374 -m7400, -m7410, -m7450, -m7455\n\
1375 generate code for PowerPC 7400/7410/7450/7455\n"));
1376 fprintf (stream
, _("\
1377 -m750cl, -mgekko, -mbroadway\n\
1378 generate code for PowerPC 750cl/Gekko/Broadway\n"));
1379 fprintf (stream
, _("\
1380 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1381 fprintf (stream
, _("\
1382 -mppc64, -m620 generate code for PowerPC 620/625/630\n"));
1383 fprintf (stream
, _("\
1384 -mppc64bridge generate code for PowerPC 64, including bridge insns\n"));
1385 fprintf (stream
, _("\
1386 -mbooke generate code for 32-bit PowerPC BookE\n"));
1387 fprintf (stream
, _("\
1388 -ma2 generate code for A2 architecture\n"));
1389 fprintf (stream
, _("\
1390 -mpower4, -mpwr4 generate code for Power4 architecture\n"));
1391 fprintf (stream
, _("\
1392 -mpower5, -mpwr5, -mpwr5x\n\
1393 generate code for Power5 architecture\n"));
1394 fprintf (stream
, _("\
1395 -mpower6, -mpwr6 generate code for Power6 architecture\n"));
1396 fprintf (stream
, _("\
1397 -mpower7, -mpwr7 generate code for Power7 architecture\n"));
1398 fprintf (stream
, _("\
1399 -mpower8, -mpwr8 generate code for Power8 architecture\n"));
1400 fprintf (stream
, _("\
1401 -mpower9, -mpwr9 generate code for Power9 architecture\n"));
1402 fprintf (stream
, _("\
1403 -mcell generate code for Cell Broadband Engine architecture\n"));
1404 fprintf (stream
, _("\
1405 -mcom generate code for Power/PowerPC common instructions\n"));
1406 fprintf (stream
, _("\
1407 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1408 fprintf (stream
, _("\
1409 -maltivec generate code for AltiVec\n"));
1410 fprintf (stream
, _("\
1411 -mvsx generate code for Vector-Scalar (VSX) instructions\n"));
1412 fprintf (stream
, _("\
1413 -me300 generate code for PowerPC e300 family\n"));
1414 fprintf (stream
, _("\
1415 -me500, -me500x2 generate code for Motorola e500 core complex\n"));
1416 fprintf (stream
, _("\
1417 -me500mc, generate code for Freescale e500mc core complex\n"));
1418 fprintf (stream
, _("\
1419 -me500mc64, generate code for Freescale e500mc64 core complex\n"));
1420 fprintf (stream
, _("\
1421 -me5500, generate code for Freescale e5500 core complex\n"));
1422 fprintf (stream
, _("\
1423 -me6500, generate code for Freescale e6500 core complex\n"));
1424 fprintf (stream
, _("\
1425 -mspe generate code for Motorola SPE instructions\n"));
1426 fprintf (stream
, _("\
1427 -mspe2 generate code for Freescale SPE2 instructions\n"));
1428 fprintf (stream
, _("\
1429 -mvle generate code for Freescale VLE instructions\n"));
1430 fprintf (stream
, _("\
1431 -mtitan generate code for AppliedMicro Titan core complex\n"));
1432 fprintf (stream
, _("\
1433 -mregnames Allow symbolic names for registers\n"));
1434 fprintf (stream
, _("\
1435 -mno-regnames Do not allow symbolic names for registers\n"));
1437 fprintf (stream
, _("\
1438 -mrelocatable support for GCC's -mrelocatble option\n"));
1439 fprintf (stream
, _("\
1440 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n"));
1441 fprintf (stream
, _("\
1442 -memb set PPC_EMB bit in ELF flags\n"));
1443 fprintf (stream
, _("\
1444 -mlittle, -mlittle-endian, -le\n\
1445 generate code for a little endian machine\n"));
1446 fprintf (stream
, _("\
1447 -mbig, -mbig-endian, -be\n\
1448 generate code for a big endian machine\n"));
1449 fprintf (stream
, _("\
1450 -msolaris generate code for Solaris\n"));
1451 fprintf (stream
, _("\
1452 -mno-solaris do not generate code for Solaris\n"));
1453 fprintf (stream
, _("\
1454 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n"));
1455 fprintf (stream
, _("\
1456 -V print assembler version number\n"));
1457 fprintf (stream
, _("\
1458 -Qy, -Qn ignored\n"));
1460 fprintf (stream
, _("\
1461 -nops=count when aligning, more than COUNT nops uses a branch\n"));
1462 fprintf (stream
, _("\
1463 -ppc476-workaround warn if emitting data to code sections\n"));
1466 /* Set ppc_cpu if it is not already set. */
1471 const char *default_os
= TARGET_OS
;
1472 const char *default_cpu
= TARGET_CPU
;
1474 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1477 if (target_big_endian
)
1478 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1480 /* The minimum supported cpu for 64-bit little-endian is power8. */
1481 ppc_cpu
|= ppc_parse_cpu (ppc_cpu
, &sticky
, "power8");
1482 else if (strncmp (default_os
, "aix", 3) == 0
1483 && default_os
[3] >= '4' && default_os
[3] <= '9')
1484 ppc_cpu
|= PPC_OPCODE_COMMON
;
1485 else if (strncmp (default_os
, "aix3", 4) == 0)
1486 ppc_cpu
|= PPC_OPCODE_POWER
;
1487 else if (strcmp (default_cpu
, "rs6000") == 0)
1488 ppc_cpu
|= PPC_OPCODE_POWER
;
1489 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1490 ppc_cpu
|= PPC_OPCODE_PPC
;
1492 as_fatal (_("unknown default cpu = %s, os = %s"),
1493 default_cpu
, default_os
);
1497 /* Figure out the BFD architecture to use. This function and ppc_mach
1498 are called well before md_begin, when the output file is opened. */
1500 enum bfd_architecture
1503 const char *default_cpu
= TARGET_CPU
;
1506 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1507 return bfd_arch_powerpc
;
1508 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1509 return bfd_arch_powerpc
;
1510 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1511 return bfd_arch_rs6000
;
1512 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1514 if (strcmp (default_cpu
, "rs6000") == 0)
1515 return bfd_arch_rs6000
;
1516 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1517 return bfd_arch_powerpc
;
1520 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1521 return bfd_arch_unknown
;
1528 return bfd_mach_ppc64
;
1529 else if (ppc_arch () == bfd_arch_rs6000
)
1530 return bfd_mach_rs6k
;
1531 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1532 return bfd_mach_ppc_titan
;
1533 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1534 return bfd_mach_ppc_vle
;
1536 return bfd_mach_ppc
;
1540 ppc_target_format (void)
1544 return target_big_endian
? "pe-powerpc" : "pe-powerpcle";
1546 return "xcoff-powermac";
1549 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1551 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1557 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1558 # elif defined (TE_VXWORKS)
1559 return "elf32-powerpc-vxworks";
1561 return (target_big_endian
1562 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1563 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1568 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1569 Return TRUE if there's a problem, otherwise FALSE. */
1572 insn_validate (const struct powerpc_opcode
*op
)
1574 const unsigned char *o
;
1575 uint64_t omask
= op
->mask
;
1577 /* The mask had better not trim off opcode bits. */
1578 if ((op
->opcode
& omask
) != op
->opcode
)
1580 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1584 /* The operands must not overlap the opcode or each other. */
1585 for (o
= op
->operands
; *o
; ++o
)
1587 bfd_boolean optional
= FALSE
;
1588 if (*o
>= num_powerpc_operands
)
1590 as_bad (_("operand index error for %s"), op
->name
);
1596 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1597 if (operand
->shift
== (int) PPC_OPSHIFT_INV
)
1604 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1606 else if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1608 mask
= (*operand
->insert
) (0, val
, ppc_cpu
, &errmsg
);
1610 else if (operand
->shift
>= 0)
1611 mask
= operand
->bitm
<< operand
->shift
;
1613 mask
= operand
->bitm
>> -operand
->shift
;
1616 as_bad (_("operand %d overlap in %s"),
1617 (int) (o
- op
->operands
), op
->name
);
1621 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
1625 as_bad (_("non-optional operand %d follows optional operand in %s"),
1626 (int) (o
- op
->operands
), op
->name
);
1634 /* Insert opcodes and macros into hash tables. Called at startup and
1635 for .machine pseudo. */
1638 ppc_setup_opcodes (void)
1640 const struct powerpc_opcode
*op
;
1641 const struct powerpc_opcode
*op_end
;
1642 const struct powerpc_macro
*macro
;
1643 const struct powerpc_macro
*macro_end
;
1644 bfd_boolean bad_insn
= FALSE
;
1646 if (ppc_hash
!= NULL
)
1647 hash_die (ppc_hash
);
1648 if (ppc_macro_hash
!= NULL
)
1649 hash_die (ppc_macro_hash
);
1651 /* Insert the opcodes into a hash table. */
1652 ppc_hash
= hash_new ();
1654 if (ENABLE_CHECKING
)
1658 /* An index into powerpc_operands is stored in struct fix
1659 fx_pcrel_adjust which is 8 bits wide. */
1660 gas_assert (num_powerpc_operands
< 256);
1662 /* Check operand masks. Code here and in the disassembler assumes
1663 all the 1's in the mask are contiguous. */
1664 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1666 uint64_t mask
= powerpc_operands
[i
].bitm
;
1670 right_bit
= mask
& -mask
;
1672 right_bit
= mask
& -mask
;
1673 if (mask
!= right_bit
)
1675 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1678 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1679 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1680 sizeof (powerpc_operands
[0])) == 0)
1682 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1689 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1690 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1692 if (ENABLE_CHECKING
)
1694 unsigned int new_opcode
= PPC_OP (op
[0].opcode
);
1696 #ifdef PRINT_OPCODE_TABLE
1697 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1698 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1699 new_opcode
, (unsigned long long) op
->opcode
,
1700 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1703 /* The major opcodes had better be sorted. Code in the disassembler
1704 assumes the insns are sorted according to major opcode. */
1705 if (op
!= powerpc_opcodes
1706 && new_opcode
< PPC_OP (op
[-1].opcode
))
1708 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1712 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1714 as_bad (_("%s is enabled by vle flag"), op
->name
);
1717 if (PPC_OP (op
->opcode
) != 4
1718 && PPC_OP (op
->opcode
) != 31
1719 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1721 as_bad (_("%s not disabled by vle flag"), op
->name
);
1724 bad_insn
|= insn_validate (op
);
1727 if ((ppc_cpu
& op
->flags
) != 0
1728 && !(ppc_cpu
& op
->deprecated
))
1732 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1735 as_bad (_("duplicate instruction %s"),
1742 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1743 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1744 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1746 op_end
= prefix_opcodes
+ prefix_num_opcodes
;
1747 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1749 if (ENABLE_CHECKING
)
1751 unsigned int new_opcode
= PPC_PREFIX_SEG (op
[0].opcode
);
1753 #ifdef PRINT_OPCODE_TABLE
1754 printf ("%-14s\t#%04u\tmajor op/2: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1755 op
->name
, (unsigned int) (op
- prefix_opcodes
),
1756 new_opcode
, (unsigned long long) op
->opcode
,
1757 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1760 /* The major opcodes had better be sorted. Code in the disassembler
1761 assumes the insns are sorted according to major opcode. */
1762 if (op
!= prefix_opcodes
1763 && new_opcode
< PPC_PREFIX_SEG (op
[-1].opcode
))
1765 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1768 bad_insn
|= insn_validate (op
);
1771 if ((ppc_cpu
& op
->flags
) != 0
1772 && !(ppc_cpu
& op
->deprecated
))
1776 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1779 as_bad (_("duplicate instruction %s"),
1786 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1787 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1788 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1790 op_end
= vle_opcodes
+ vle_num_opcodes
;
1791 for (op
= vle_opcodes
; op
< op_end
; op
++)
1793 if (ENABLE_CHECKING
)
1795 unsigned new_seg
= VLE_OP_TO_SEG (VLE_OP (op
[0].opcode
, op
[0].mask
));
1797 #ifdef PRINT_OPCODE_TABLE
1798 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1799 op
->name
, (unsigned int) (op
- vle_opcodes
),
1800 (unsigned int) new_seg
, (unsigned long long) op
->opcode
,
1801 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1804 /* The major opcodes had better be sorted. Code in the disassembler
1805 assumes the insns are sorted according to major opcode. */
1806 if (op
!= vle_opcodes
1807 && new_seg
< VLE_OP_TO_SEG (VLE_OP (op
[-1].opcode
, op
[-1].mask
)))
1809 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1813 bad_insn
|= insn_validate (op
);
1816 if ((ppc_cpu
& op
->flags
) != 0
1817 && !(ppc_cpu
& op
->deprecated
))
1821 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1824 as_bad (_("duplicate instruction %s"),
1831 /* SPE2 instructions */
1832 if ((ppc_cpu
& PPC_OPCODE_SPE2
) == PPC_OPCODE_SPE2
)
1834 op_end
= spe2_opcodes
+ spe2_num_opcodes
;
1835 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1837 if (ENABLE_CHECKING
)
1839 if (op
!= spe2_opcodes
)
1841 unsigned old_seg
, new_seg
;
1843 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1844 old_seg
= VLE_OP_TO_SEG (old_seg
);
1845 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1846 new_seg
= VLE_OP_TO_SEG (new_seg
);
1848 /* The major opcodes had better be sorted. Code in the
1849 disassembler assumes the insns are sorted according to
1851 if (new_seg
< old_seg
)
1853 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1858 bad_insn
|= insn_validate (op
);
1861 if ((ppc_cpu
& op
->flags
) != 0 && !(ppc_cpu
& op
->deprecated
))
1865 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1868 as_bad (_("duplicate instruction %s"),
1875 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1876 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1879 /* Insert the macros into a hash table. */
1880 ppc_macro_hash
= hash_new ();
1882 macro_end
= powerpc_macros
+ powerpc_num_macros
;
1883 for (macro
= powerpc_macros
; macro
< macro_end
; macro
++)
1885 if ((macro
->flags
& ppc_cpu
) != 0 || (ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1889 retval
= hash_insert (ppc_macro_hash
, macro
->name
, (void *) macro
);
1890 if (retval
!= (const char *) NULL
)
1892 as_bad (_("duplicate macro %s"), macro
->name
);
1902 /* This function is called when the assembler starts up. It is called
1903 after the options have been parsed and the output file has been
1911 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1912 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1915 /* Set the ELF flags if desired. */
1916 if (ppc_flags
&& !msolaris
)
1917 bfd_set_private_flags (stdoutput
, ppc_flags
);
1920 ppc_setup_opcodes ();
1922 /* Tell the main code what the endianness is if it is not overridden
1924 if (!set_target_endian
)
1926 set_target_endian
= 1;
1927 target_big_endian
= PPC_BIG_ENDIAN
;
1931 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1933 /* Create dummy symbols to serve as initial csects. This forces the
1934 text csects to precede the data csects. These symbols will not
1936 ppc_text_csects
= symbol_make ("dummy\001");
1937 symbol_get_tc (ppc_text_csects
)->within
= ppc_text_csects
;
1938 ppc_data_csects
= symbol_make ("dummy\001");
1939 symbol_get_tc (ppc_data_csects
)->within
= ppc_data_csects
;
1944 ppc_current_section
= text_section
;
1945 ppc_previous_section
= 0;
1954 if (ppc_apuinfo_list
== NULL
)
1957 /* Ok, so write the section info out. We have this layout:
1961 0 8 length of "APUinfo\0"
1962 4 (n*4) number of APU's (4 bytes each)
1965 20 APU#1 first APU's info
1966 24 APU#2 second APU's info
1971 asection
*seg
= now_seg
;
1972 subsegT subseg
= now_subseg
;
1973 asection
*apuinfo_secp
= (asection
*) NULL
;
1976 /* Create the .PPC.EMB.apuinfo section. */
1977 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1978 bfd_set_section_flags (apuinfo_secp
, SEC_HAS_CONTENTS
| SEC_READONLY
);
1981 md_number_to_chars (p
, (valueT
) 8, 4);
1984 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1987 md_number_to_chars (p
, (valueT
) 2, 4);
1990 strcpy (p
, APUINFO_LABEL
);
1992 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1995 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
1998 frag_align (2, 0, 0);
2000 /* We probably can't restore the current segment, for there likely
2003 subseg_set (seg
, subseg
);
2008 /* Insert an operand value into an instruction. */
2011 ppc_insert_operand (uint64_t insn
,
2012 const struct powerpc_operand
*operand
,
2018 int64_t min
, max
, right
;
2020 max
= operand
->bitm
;
2024 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
2026 /* Extend the allowed range for addis to [-32768, 65535].
2027 Similarly for cmpli and some VLE high part insns. For 64-bit
2028 it would be good to disable this for signed fields since the
2029 value is sign extended into the high 32 bits of the register.
2030 If the value is, say, an address, then we might care about
2031 the high bits. However, gcc as of 2014-06 uses unsigned
2032 values when loading the high part of 64-bit constants using
2034 min
= ~(max
>> 1) & -right
;
2036 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
2038 max
= (max
>> 1) & -right
;
2039 min
= ~max
& -right
;
2042 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
2045 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
2054 /* Some people write constants with the sign extension done by
2055 hand but only up to 32 bits. This shouldn't really be valid,
2056 but, to permit this code to assemble on a 64-bit host, we
2057 sign extend the 32-bit value to 64 bits if so doing makes the
2058 value valid. We only do this for operands that are 32-bits or
2061 && (operand
->bitm
& ~0xffffffffULL
) == 0
2062 && (val
- (1LL << 32)) >= min
2063 && (val
- (1LL << 32)) <= max
2064 && ((val
- (1LL << 32)) & (right
- 1)) == 0)
2065 val
= val
- (1LL << 32);
2067 /* Similarly, people write expressions like ~(1<<15), and expect
2068 this to be OK for a 32-bit unsigned value. */
2070 && (operand
->bitm
& ~0xffffffffULL
) == 0
2071 && (val
+ (1LL << 32)) >= min
2072 && (val
+ (1LL << 32)) <= max
2073 && ((val
+ (1LL << 32)) & (right
- 1)) == 0)
2074 val
= val
+ (1LL << 32);
2078 || (val
& (right
- 1)) != 0)
2079 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
2082 if (operand
->insert
)
2087 insn
= (*operand
->insert
) (insn
, val
, cpu
, &errmsg
);
2088 if (errmsg
!= (const char *) NULL
)
2089 as_bad_where (file
, line
, "%s", errmsg
);
2091 else if (operand
->shift
>= 0)
2092 insn
|= (val
& operand
->bitm
) << operand
->shift
;
2094 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
2101 /* Parse @got, etc. and return the desired relocation. */
2102 static bfd_reloc_code_real_type
2103 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
2107 unsigned int length
: 8;
2108 unsigned int valid32
: 1;
2109 unsigned int valid64
: 1;
2118 const struct map_bfd
*ptr
;
2120 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2121 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2122 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2124 static const struct map_bfd mapping
[] = {
2125 MAP ("l", BFD_RELOC_LO16
),
2126 MAP ("h", BFD_RELOC_HI16
),
2127 MAP ("ha", BFD_RELOC_HI16_S
),
2128 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
2129 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
2130 MAP ("got", BFD_RELOC_16_GOTOFF
),
2131 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
2132 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
2133 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
2134 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
2135 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
2136 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
2137 MAP ("copy", BFD_RELOC_PPC_COPY
),
2138 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
2139 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
2140 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
2141 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
2142 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
2143 MAP ("tls", BFD_RELOC_PPC_TLS
),
2144 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
2145 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
2146 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
2147 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
2148 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
2149 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
2150 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
2151 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
2152 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
2153 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
2154 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
2155 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
2156 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
2157 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
2158 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
2159 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
2160 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
2161 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
2162 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
2163 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
2164 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
2165 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
2166 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
2167 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
2168 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
2169 MAP32 ("fixup", BFD_RELOC_CTOR
),
2170 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
2171 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
2172 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
2173 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
2174 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
2175 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
2176 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
2177 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
2178 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
2179 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
2180 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
2181 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
2182 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
2183 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
2184 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
2185 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
2186 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
2187 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
2188 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2189 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2190 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2191 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2192 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2193 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2194 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2195 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2196 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2197 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2198 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2199 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2200 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2201 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2202 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2203 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2204 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2205 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2206 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2207 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2208 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2209 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2210 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2211 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2212 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2213 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2214 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2215 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2216 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2217 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2218 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2219 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2220 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2221 MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC
),
2222 MAP64 ("pcrel", BFD_RELOC_PPC64_PCREL34
),
2223 MAP64 ("got@pcrel", BFD_RELOC_PPC64_GOT_PCREL34
),
2224 MAP64 ("plt@pcrel", BFD_RELOC_PPC64_PLT_PCREL34
),
2225 MAP64 ("tls@pcrel", BFD_RELOC_PPC64_TLS_PCREL
),
2226 MAP64 ("got@tlsgd@pcrel", BFD_RELOC_PPC64_GOT_TLSGD34
),
2227 MAP64 ("got@tlsld@pcrel", BFD_RELOC_PPC64_GOT_TLSLD34
),
2228 MAP64 ("got@tprel@pcrel", BFD_RELOC_PPC64_GOT_TPREL34
),
2229 MAP64 ("got@dtprel@pcrel", BFD_RELOC_PPC64_GOT_DTPREL34
),
2230 MAP64 ("higher34", BFD_RELOC_PPC64_ADDR16_HIGHER34
),
2231 MAP64 ("highera34", BFD_RELOC_PPC64_ADDR16_HIGHERA34
),
2232 MAP64 ("highest34", BFD_RELOC_PPC64_ADDR16_HIGHEST34
),
2233 MAP64 ("highesta34", BFD_RELOC_PPC64_ADDR16_HIGHESTA34
),
2234 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2238 return BFD_RELOC_NONE
;
2240 for (ch
= *str
, str2
= ident
;
2241 (str2
< ident
+ sizeof (ident
) - 1
2242 && (ISALNUM (ch
) || ch
== '@'));
2245 *str2
++ = TOLOWER (ch
);
2252 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2253 if (ch
== ptr
->string
[0]
2254 && len
== ptr
->length
2255 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2256 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2258 int reloc
= ptr
->reloc
;
2260 if (!ppc_obj64
&& exp_p
->X_add_number
!= 0)
2264 case BFD_RELOC_16_GOTOFF
:
2265 case BFD_RELOC_LO16_GOTOFF
:
2266 case BFD_RELOC_HI16_GOTOFF
:
2267 case BFD_RELOC_HI16_S_GOTOFF
:
2268 as_warn (_("symbol+offset@%s means symbol@%s+offset"),
2269 ptr
->string
, ptr
->string
);
2272 case BFD_RELOC_PPC_GOT_TLSGD16
:
2273 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2274 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2275 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2276 case BFD_RELOC_PPC_GOT_TLSLD16
:
2277 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2278 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2279 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2280 case BFD_RELOC_PPC_GOT_DTPREL16
:
2281 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2282 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2283 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2284 case BFD_RELOC_PPC_GOT_TPREL16
:
2285 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2286 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2287 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2288 as_bad (_("symbol+offset@%s not supported"), ptr
->string
);
2293 /* Now check for identifier@suffix+constant. */
2294 if (*str
== '-' || *str
== '+')
2296 char *orig_line
= input_line_pointer
;
2297 expressionS new_exp
;
2299 input_line_pointer
= str
;
2300 expression (&new_exp
);
2301 if (new_exp
.X_op
== O_constant
)
2303 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2304 str
= input_line_pointer
;
2307 if (&input_line_pointer
!= str_p
)
2308 input_line_pointer
= orig_line
;
2312 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2313 && exp_p
->X_op
== O_symbol
2314 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2316 /* Change the symbol so that the dummy .TOC. symbol can be
2317 omitted from the object file. */
2318 exp_p
->X_add_symbol
= &abs_symbol
;
2321 return (bfd_reloc_code_real_type
) reloc
;
2324 return BFD_RELOC_NONE
;
2327 /* Support @got, etc. on constants emitted via .short, .int etc. */
2329 bfd_reloc_code_real_type
2330 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2333 if (nbytes
>= 2 && *input_line_pointer
== '@')
2334 return ppc_elf_suffix (&input_line_pointer
, exp
);
2335 return BFD_RELOC_NONE
;
2338 /* Warn when emitting data to code sections, unless we are emitting
2339 a relocation that ld --ppc476-workaround uses to recognise data
2340 *and* there was an unconditional branch prior to the data. */
2343 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2344 unsigned int nbytes
, fixS
*fix
)
2347 && (now_seg
->flags
& SEC_CODE
) != 0
2350 || !(fix
->fx_r_type
== BFD_RELOC_32
2351 || fix
->fx_r_type
== BFD_RELOC_CTOR
2352 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2353 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2354 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2355 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2356 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2357 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2358 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2359 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2361 /* Flag that we've warned. */
2365 as_warn (_("data in executable section"));
2369 /* Solaris pseduo op to change to the .rodata section. */
2371 ppc_elf_rdata (int xxx
)
2373 char *save_line
= input_line_pointer
;
2374 static char section
[] = ".rodata\n";
2376 /* Just pretend this is .section .rodata */
2377 input_line_pointer
= section
;
2378 obj_elf_section (xxx
);
2380 input_line_pointer
= save_line
;
2383 /* Pseudo op to make file scope bss items. */
2385 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2398 c
= get_symbol_name (&name
);
2400 /* Just after name is now '\0'. */
2401 p
= input_line_pointer
;
2403 SKIP_WHITESPACE_AFTER_NAME ();
2404 if (*input_line_pointer
!= ',')
2406 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2407 ignore_rest_of_line ();
2411 input_line_pointer
++; /* skip ',' */
2412 if ((size
= get_absolute_expression ()) < 0)
2414 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2415 ignore_rest_of_line ();
2419 /* The third argument to .lcomm is the alignment. */
2420 if (*input_line_pointer
!= ',')
2424 ++input_line_pointer
;
2425 align
= get_absolute_expression ();
2428 as_warn (_("ignoring bad alignment"));
2434 symbolP
= symbol_find_or_make (name
);
2437 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2439 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2440 S_GET_NAME (symbolP
));
2441 ignore_rest_of_line ();
2445 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2447 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2448 S_GET_NAME (symbolP
),
2449 (long) S_GET_VALUE (symbolP
),
2452 ignore_rest_of_line ();
2458 old_subsec
= now_subseg
;
2461 /* Convert to a power of 2 alignment. */
2462 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2465 as_bad (_("common alignment not a power of 2"));
2466 ignore_rest_of_line ();
2473 record_alignment (bss_section
, align2
);
2474 subseg_set (bss_section
, 1);
2476 frag_align (align2
, 0, 0);
2477 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2478 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2479 symbol_set_frag (symbolP
, frag_now
);
2480 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2483 S_SET_SIZE (symbolP
, size
);
2484 S_SET_SEGMENT (symbolP
, bss_section
);
2485 subseg_set (old_sec
, old_subsec
);
2486 demand_empty_rest_of_line ();
2489 /* Pseudo op to set symbol local entry point. */
2491 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2494 char c
= get_symbol_name (&name
);
2499 elf_symbol_type
*elfsym
;
2501 p
= input_line_pointer
;
2503 SKIP_WHITESPACE_AFTER_NAME ();
2504 if (*input_line_pointer
!= ',')
2507 as_bad (_("expected comma after name `%s' in .localentry directive"),
2510 ignore_rest_of_line ();
2513 input_line_pointer
++;
2515 if (exp
.X_op
== O_absent
)
2517 as_bad (_("missing expression in .localentry directive"));
2518 exp
.X_op
= O_constant
;
2519 exp
.X_add_number
= 0;
2522 sym
= symbol_find_or_make (name
);
2525 if (resolve_expression (&exp
)
2526 && exp
.X_op
== O_constant
)
2528 unsigned int encoded
, ok
;
2531 if (exp
.X_add_number
== 1 || exp
.X_add_number
== 7)
2532 encoded
= exp
.X_add_number
<< STO_PPC64_LOCAL_BIT
;
2535 encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2536 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2538 as_bad (_(".localentry expression for `%s' "
2539 "is not a valid power of 2"), S_GET_NAME (sym
));
2545 bfdsym
= symbol_get_bfdsym (sym
);
2546 elfsym
= elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
2547 gas_assert (elfsym
);
2548 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2549 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2550 if (ppc_abiversion
== 0)
2555 as_bad (_(".localentry expression for `%s' "
2556 "does not evaluate to a constant"), S_GET_NAME (sym
));
2558 demand_empty_rest_of_line ();
2561 /* Pseudo op to set ABI version. */
2563 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2568 if (exp
.X_op
== O_absent
)
2570 as_bad (_("missing expression in .abiversion directive"));
2571 exp
.X_op
= O_constant
;
2572 exp
.X_add_number
= 0;
2575 if (resolve_expression (&exp
)
2576 && exp
.X_op
== O_constant
)
2577 ppc_abiversion
= exp
.X_add_number
;
2579 as_bad (_(".abiversion expression does not evaluate to a constant"));
2580 demand_empty_rest_of_line ();
2583 /* Parse a .gnu_attribute directive. */
2585 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2587 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2589 /* Check validity of defined powerpc tags. */
2590 if (tag
== Tag_GNU_Power_ABI_FP
2591 || tag
== Tag_GNU_Power_ABI_Vector
2592 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2596 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2598 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2599 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2600 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2601 as_warn (_("unknown .gnu_attribute value"));
2605 /* Set ABI version in output file. */
2609 if (ppc_obj64
&& ppc_abiversion
!= 0)
2611 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2612 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2614 /* Any selection of opcodes based on ppc_cpu after gas has finished
2615 parsing the file is invalid. md_apply_fix and ppc_handle_align
2616 must select opcodes based on the machine in force at the point
2617 where the fixup or alignment frag was created, not the machine in
2618 force at the end of file. */
2622 /* Validate any relocations emitted for -mrelocatable, possibly adding
2623 fixups for word relocations in writable segments, so we can adjust
2626 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2628 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2637 case SHLIB_MRELOCATABLE
:
2638 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2639 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2640 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2641 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2642 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2643 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2644 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2645 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2646 && (seg
->flags
& SEC_LOAD
) != 0
2647 && strcmp (segment_name (seg
), ".got2") != 0
2648 && strcmp (segment_name (seg
), ".dtors") != 0
2649 && strcmp (segment_name (seg
), ".ctors") != 0
2650 && strcmp (segment_name (seg
), ".fixup") != 0
2651 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2652 && strcmp (segment_name (seg
), ".eh_frame") != 0
2653 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2655 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2656 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2658 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2659 _("relocation cannot be done when using -mrelocatable"));
2666 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2667 function descriptor sym if the corresponding code sym is used. */
2670 ppc_frob_file_before_adjust (void)
2678 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2684 name
= S_GET_NAME (symp
);
2688 if (! S_IS_WEAK (symp
)
2689 || S_IS_DEFINED (symp
))
2692 dotname
= concat (".", name
, (char *) NULL
);
2693 dotsym
= symbol_find_noref (dotname
, 1);
2695 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2696 || symbol_used_in_reloc_p (dotsym
)))
2697 symbol_mark_used (symp
);
2701 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2703 && toc_reloc_types
!= has_large_toc_reloc
2704 && bfd_section_size (toc
) > 0x10000)
2705 as_warn (_("TOC section size exceeds 64k"));
2708 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2709 emitted. Other uses of .TOC. will cause the symbol to be marked
2710 with BSF_KEEP in md_apply_fix. */
2713 ppc_elf_adjust_symtab (void)
2718 symp
= symbol_find (".TOC.");
2721 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2722 if ((bsym
->flags
& BSF_KEEP
) == 0)
2723 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2727 #endif /* OBJ_ELF */
2732 * Summary of parse_toc_entry.
2734 * in: Input_line_pointer points to the '[' in one of:
2736 * [toc] [tocv] [toc32] [toc64]
2738 * Anything else is an error of one kind or another.
2741 * return value: success or failure
2742 * toc_kind: kind of toc reference
2743 * input_line_pointer:
2744 * success: first char after the ']'
2745 * failure: unchanged
2749 * [toc] - rv == success, toc_kind = default_toc
2750 * [tocv] - rv == success, toc_kind = data_in_toc
2751 * [toc32] - rv == success, toc_kind = must_be_32
2752 * [toc64] - rv == success, toc_kind = must_be_64
2756 enum toc_size_qualifier
2758 default_toc
, /* The toc cell constructed should be the system default size */
2759 data_in_toc
, /* This is a direct reference to a toc cell */
2760 must_be_32
, /* The toc cell constructed must be 32 bits wide */
2761 must_be_64
/* The toc cell constructed must be 64 bits wide */
2765 parse_toc_entry (enum toc_size_qualifier
*toc_kind
)
2770 enum toc_size_qualifier t
;
2772 /* Save the input_line_pointer. */
2773 start
= input_line_pointer
;
2775 /* Skip over the '[' , and whitespace. */
2776 ++input_line_pointer
;
2779 /* Find the spelling of the operand. */
2780 c
= get_symbol_name (&toc_spec
);
2782 if (strcmp (toc_spec
, "toc") == 0)
2786 else if (strcmp (toc_spec
, "tocv") == 0)
2790 else if (strcmp (toc_spec
, "toc32") == 0)
2794 else if (strcmp (toc_spec
, "toc64") == 0)
2800 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec
);
2801 *input_line_pointer
= c
;
2802 input_line_pointer
= start
;
2806 /* Now find the ']'. */
2807 *input_line_pointer
= c
;
2809 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2810 c
= *input_line_pointer
++; /* input_line_pointer->past char in c. */
2814 as_bad (_("syntax error: expected `]', found `%c'"), c
);
2815 input_line_pointer
= start
;
2824 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2825 /* See whether a symbol is in the TOC section. */
2828 ppc_is_toc_sym (symbolS
*sym
)
2831 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2832 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2835 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2837 return strcmp (sname
, ".toc") == 0;
2839 return strcmp (sname
, ".got") == 0;
2842 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2846 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2848 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2852 /* Check we don't already exist. */
2853 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2854 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2857 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2859 if (ppc_apuinfo_num_alloc
== 0)
2861 ppc_apuinfo_num_alloc
= 4;
2862 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2866 ppc_apuinfo_num_alloc
+= 4;
2867 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2868 ppc_apuinfo_num_alloc
);
2871 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2876 /* Various frobbings of labels and their addresses. */
2878 /* Symbols labelling the current insn. */
2879 struct insn_label_list
2881 struct insn_label_list
*next
;
2885 static struct insn_label_list
*insn_labels
;
2886 static struct insn_label_list
*free_insn_labels
;
2889 ppc_record_label (symbolS
*sym
)
2891 struct insn_label_list
*l
;
2893 if (free_insn_labels
== NULL
)
2894 l
= XNEW (struct insn_label_list
);
2897 l
= free_insn_labels
;
2898 free_insn_labels
= l
->next
;
2902 l
->next
= insn_labels
;
2907 ppc_clear_labels (void)
2909 while (insn_labels
!= NULL
)
2911 struct insn_label_list
*l
= insn_labels
;
2912 insn_labels
= l
->next
;
2913 l
->next
= free_insn_labels
;
2914 free_insn_labels
= l
;
2919 ppc_start_line_hook (void)
2921 ppc_clear_labels ();
2925 ppc_new_dot_label (symbolS
*sym
)
2927 ppc_record_label (sym
);
2929 /* Anchor this label to the current csect for relocations. */
2930 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2935 ppc_frob_label (symbolS
*sym
)
2937 ppc_record_label (sym
);
2940 /* Set the class of a label based on where it is defined. This handles
2941 symbols without suffixes. Also, move the symbol so that it follows
2942 the csect symbol. */
2943 if (ppc_current_csect
!= (symbolS
*) NULL
)
2945 if (symbol_get_tc (sym
)->symbol_class
== -1)
2946 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
2948 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
2949 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
2950 &symbol_rootP
, &symbol_lastP
);
2951 symbol_get_tc (ppc_current_csect
)->within
= sym
;
2952 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2957 dwarf2_emit_label (sym
);
2961 /* We need to keep a list of fixups. We can't simply generate them as
2962 we go, because that would require us to first create the frag, and
2963 that would screw up references to ``.''. */
2969 bfd_reloc_code_real_type reloc
;
2972 #define MAX_INSN_FIXUPS (5)
2974 /* Return the field size operated on by RELOC, and whether it is
2975 pc-relative in PC_RELATIVE. */
2978 fixup_size (bfd_reloc_code_real_type reloc
, bfd_boolean
*pc_relative
)
2980 unsigned int size
= 0;
2981 bfd_boolean pcrel
= FALSE
;
2985 /* This switch statement must handle all BFD_RELOC values
2986 possible in instruction fixups. As is, it handles all
2987 BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c,
2988 bfd/coff-ppc, bfd/coff-rs6000.c and bfd/coff64-rs6000.c.
2989 Overkill since data and marker relocs need not be handled
2990 here, but this way we can be sure a needed fixup reloc isn't
2991 accidentally omitted. */
2992 case BFD_RELOC_PPC_EMB_MRKREF
:
2993 case BFD_RELOC_VTABLE_ENTRY
:
2994 case BFD_RELOC_VTABLE_INHERIT
:
3002 case BFD_RELOC_16_BASEREL
:
3003 case BFD_RELOC_16_GOTOFF
:
3004 case BFD_RELOC_GPREL16
:
3005 case BFD_RELOC_HI16
:
3006 case BFD_RELOC_HI16_BASEREL
:
3007 case BFD_RELOC_HI16_GOTOFF
:
3008 case BFD_RELOC_HI16_PLTOFF
:
3009 case BFD_RELOC_HI16_S
:
3010 case BFD_RELOC_HI16_S_BASEREL
:
3011 case BFD_RELOC_HI16_S_GOTOFF
:
3012 case BFD_RELOC_HI16_S_PLTOFF
:
3013 case BFD_RELOC_LO16
:
3014 case BFD_RELOC_LO16_BASEREL
:
3015 case BFD_RELOC_LO16_GOTOFF
:
3016 case BFD_RELOC_LO16_PLTOFF
:
3017 case BFD_RELOC_PPC64_ADDR16_DS
:
3018 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3019 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3020 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
3021 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
3022 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
3023 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
3024 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
3025 case BFD_RELOC_PPC64_DTPREL16_DS
:
3026 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
3027 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
3028 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
3029 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
3030 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
3031 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
3032 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
3033 case BFD_RELOC_PPC64_GOT16_DS
:
3034 case BFD_RELOC_PPC64_GOT16_LO_DS
:
3035 case BFD_RELOC_PPC64_HIGHER
:
3036 case BFD_RELOC_PPC64_HIGHER_S
:
3037 case BFD_RELOC_PPC64_HIGHEST
:
3038 case BFD_RELOC_PPC64_HIGHEST_S
:
3039 case BFD_RELOC_PPC64_PLT16_LO_DS
:
3040 case BFD_RELOC_PPC64_PLTGOT16
:
3041 case BFD_RELOC_PPC64_PLTGOT16_DS
:
3042 case BFD_RELOC_PPC64_PLTGOT16_HA
:
3043 case BFD_RELOC_PPC64_PLTGOT16_HI
:
3044 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3045 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
3046 case BFD_RELOC_PPC64_SECTOFF_DS
:
3047 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
3048 case BFD_RELOC_PPC64_TOC16_DS
:
3049 case BFD_RELOC_PPC64_TOC16_HA
:
3050 case BFD_RELOC_PPC64_TOC16_HI
:
3051 case BFD_RELOC_PPC64_TOC16_LO
:
3052 case BFD_RELOC_PPC64_TOC16_LO_DS
:
3053 case BFD_RELOC_PPC64_TPREL16_DS
:
3054 case BFD_RELOC_PPC64_TPREL16_HIGH
:
3055 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
3056 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
3057 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
3058 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
3059 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
3060 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
3062 case BFD_RELOC_PPC_BA16
:
3064 case BFD_RELOC_PPC_DTPREL16
:
3065 case BFD_RELOC_PPC_DTPREL16_HA
:
3066 case BFD_RELOC_PPC_DTPREL16_HI
:
3067 case BFD_RELOC_PPC_DTPREL16_LO
:
3068 case BFD_RELOC_PPC_EMB_NADDR16
:
3069 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
3070 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
3071 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
3072 case BFD_RELOC_PPC_EMB_RELSDA
:
3073 case BFD_RELOC_PPC_EMB_RELSEC16
:
3074 case BFD_RELOC_PPC_EMB_RELST_LO
:
3075 case BFD_RELOC_PPC_EMB_RELST_HI
:
3076 case BFD_RELOC_PPC_EMB_RELST_HA
:
3077 case BFD_RELOC_PPC_EMB_SDA2I16
:
3078 case BFD_RELOC_PPC_EMB_SDA2REL
:
3079 case BFD_RELOC_PPC_EMB_SDAI16
:
3080 case BFD_RELOC_PPC_GOT_DTPREL16
:
3081 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
3082 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
3083 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3084 case BFD_RELOC_PPC_GOT_TLSGD16
:
3085 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
3086 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
3087 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
3088 case BFD_RELOC_PPC_GOT_TLSLD16
:
3089 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
3090 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
3091 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
3092 case BFD_RELOC_PPC_GOT_TPREL16
:
3093 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
3094 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
3095 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3096 case BFD_RELOC_PPC_TOC16
:
3097 case BFD_RELOC_PPC_TPREL16
:
3098 case BFD_RELOC_PPC_TPREL16_HA
:
3099 case BFD_RELOC_PPC_TPREL16_HI
:
3100 case BFD_RELOC_PPC_TPREL16_LO
:
3104 case BFD_RELOC_16_PCREL
:
3105 case BFD_RELOC_HI16_PCREL
:
3106 case BFD_RELOC_HI16_S_PCREL
:
3107 case BFD_RELOC_LO16_PCREL
:
3108 case BFD_RELOC_PPC64_REL16_HIGH
:
3109 case BFD_RELOC_PPC64_REL16_HIGHA
:
3110 case BFD_RELOC_PPC64_REL16_HIGHER
:
3111 case BFD_RELOC_PPC64_REL16_HIGHER34
:
3112 case BFD_RELOC_PPC64_REL16_HIGHERA
:
3113 case BFD_RELOC_PPC64_REL16_HIGHERA34
:
3114 case BFD_RELOC_PPC64_REL16_HIGHEST
:
3115 case BFD_RELOC_PPC64_REL16_HIGHEST34
:
3116 case BFD_RELOC_PPC64_REL16_HIGHESTA
:
3117 case BFD_RELOC_PPC64_REL16_HIGHESTA34
:
3119 case BFD_RELOC_PPC_B16
:
3121 case BFD_RELOC_PPC_VLE_REL8
:
3126 case BFD_RELOC_16_GOT_PCREL
: /* coff reloc, bad name re size. */
3128 case BFD_RELOC_32_GOTOFF
:
3129 case BFD_RELOC_32_PLTOFF
:
3131 case BFD_RELOC_CTOR
:
3133 case BFD_RELOC_PPC64_ENTRY
:
3134 case BFD_RELOC_PPC_16DX_HA
:
3136 case BFD_RELOC_PPC_BA16
:
3138 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
3139 case BFD_RELOC_PPC_BA16_BRTAKEN
:
3140 case BFD_RELOC_PPC_BA26
:
3141 case BFD_RELOC_PPC_EMB_BIT_FLD
:
3142 case BFD_RELOC_PPC_EMB_NADDR32
:
3143 case BFD_RELOC_PPC_EMB_SDA21
:
3144 case BFD_RELOC_PPC_TLS
:
3145 case BFD_RELOC_PPC_TLSGD
:
3146 case BFD_RELOC_PPC_TLSLD
:
3147 case BFD_RELOC_PPC_VLE_HA16A
:
3148 case BFD_RELOC_PPC_VLE_HA16D
:
3149 case BFD_RELOC_PPC_VLE_HI16A
:
3150 case BFD_RELOC_PPC_VLE_HI16D
:
3151 case BFD_RELOC_PPC_VLE_LO16A
:
3152 case BFD_RELOC_PPC_VLE_LO16D
:
3153 case BFD_RELOC_PPC_VLE_SDA21
:
3154 case BFD_RELOC_PPC_VLE_SDA21_LO
:
3155 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3156 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
3157 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3158 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
3159 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3160 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
3161 case BFD_RELOC_PPC64_TLS_PCREL
:
3166 case BFD_RELOC_24_PLT_PCREL
:
3167 case BFD_RELOC_32_PCREL
:
3168 case BFD_RELOC_32_PLT_PCREL
:
3169 case BFD_RELOC_PPC64_REL24_NOTOC
:
3171 case BFD_RELOC_PPC_B16
:
3173 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3174 case BFD_RELOC_PPC_B16_BRTAKEN
:
3175 case BFD_RELOC_PPC_B26
:
3176 case BFD_RELOC_PPC_LOCAL24PC
:
3177 case BFD_RELOC_PPC_REL16DX_HA
:
3178 case BFD_RELOC_PPC_VLE_REL15
:
3179 case BFD_RELOC_PPC_VLE_REL24
:
3185 case BFD_RELOC_CTOR
:
3187 case BFD_RELOC_PPC_COPY
:
3188 case BFD_RELOC_PPC_DTPMOD
:
3189 case BFD_RELOC_PPC_DTPREL
:
3190 case BFD_RELOC_PPC_GLOB_DAT
:
3191 case BFD_RELOC_PPC_TPREL
:
3192 size
= ppc_obj64
? 8 : 4;
3196 case BFD_RELOC_64_PLTOFF
:
3197 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
3198 case BFD_RELOC_PPC64_D28
:
3199 case BFD_RELOC_PPC64_D34
:
3200 case BFD_RELOC_PPC64_D34_LO
:
3201 case BFD_RELOC_PPC64_D34_HI30
:
3202 case BFD_RELOC_PPC64_D34_HA30
:
3203 case BFD_RELOC_PPC64_TPREL34
:
3204 case BFD_RELOC_PPC64_DTPREL34
:
3205 case BFD_RELOC_PPC64_TOC
:
3209 case BFD_RELOC_64_PCREL
:
3210 case BFD_RELOC_64_PLT_PCREL
:
3211 case BFD_RELOC_PPC64_GOT_PCREL34
:
3212 case BFD_RELOC_PPC64_GOT_TLSGD34
:
3213 case BFD_RELOC_PPC64_GOT_TLSLD34
:
3214 case BFD_RELOC_PPC64_GOT_TPREL34
:
3215 case BFD_RELOC_PPC64_GOT_DTPREL34
:
3216 case BFD_RELOC_PPC64_PCREL28
:
3217 case BFD_RELOC_PPC64_PCREL34
:
3218 case BFD_RELOC_PPC64_PLT_PCREL34
:
3227 if (ENABLE_CHECKING
)
3229 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
3230 if (reloc_howto
!= NULL
3231 && (size
!= bfd_get_reloc_size (reloc_howto
)
3232 || pcrel
!= reloc_howto
->pc_relative
))
3234 as_bad (_("%s howto doesn't match size/pcrel in gas"),
3239 *pc_relative
= pcrel
;
3244 /* If we have parsed a call to __tls_get_addr, parse an argument like
3245 (gd0@tlsgd). *STR is the leading parenthesis on entry. If an arg
3246 is successfully parsed, *STR is updated past the trailing
3247 parenthesis and trailing white space, and *TLS_FIX contains the
3248 reloc and arg expression. */
3251 parse_tls_arg (char **str
, const expressionS
*exp
, struct ppc_fixup
*tls_fix
)
3253 const char *sym_name
= S_GET_NAME (exp
->X_add_symbol
);
3254 if (sym_name
[0] == '.')
3257 tls_fix
->reloc
= BFD_RELOC_NONE
;
3258 if (strncasecmp (sym_name
, "__tls_get_addr", 14) == 0
3259 && (sym_name
[14] == 0
3260 || strcasecmp (sym_name
+ 14, "_desc") == 0
3261 || strcasecmp (sym_name
+ 14, "_opt") == 0))
3263 char *hold
= input_line_pointer
;
3264 input_line_pointer
= *str
+ 1;
3265 expression (&tls_fix
->exp
);
3266 if (tls_fix
->exp
.X_op
== O_symbol
)
3268 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3269 tls_fix
->reloc
= BFD_RELOC_PPC_TLSGD
;
3270 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3271 tls_fix
->reloc
= BFD_RELOC_PPC_TLSLD
;
3272 if (tls_fix
->reloc
!= BFD_RELOC_NONE
)
3274 input_line_pointer
+= 7;
3276 *str
= input_line_pointer
;
3279 input_line_pointer
= hold
;
3281 return tls_fix
->reloc
!= BFD_RELOC_NONE
;
3285 /* This routine is called for each instruction to be assembled. */
3288 md_assemble (char *str
)
3291 const struct powerpc_opcode
*opcode
;
3293 const unsigned char *opindex_ptr
;
3296 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
3301 unsigned int insn_length
;
3303 /* Get the opcode. */
3304 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
); s
++)
3309 /* Look up the opcode in the hash table. */
3310 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, str
);
3311 if (opcode
== (const struct powerpc_opcode
*) NULL
)
3313 const struct powerpc_macro
*macro
;
3315 macro
= (const struct powerpc_macro
*) hash_find (ppc_macro_hash
, str
);
3316 if (macro
== (const struct powerpc_macro
*) NULL
)
3317 as_bad (_("unrecognized opcode: `%s'"), str
);
3319 ppc_macro (s
, macro
);
3321 ppc_clear_labels ();
3325 insn
= opcode
->opcode
;
3328 while (ISSPACE (*str
))
3331 /* PowerPC operands are just expressions. The only real issue is
3332 that a few operand types are optional. If an instruction has
3333 multiple optional operands and one is omitted, then all optional
3334 operands past the first omitted one must also be omitted. */
3335 int num_optional_operands
= 0;
3336 int num_optional_provided
= 0;
3338 /* Gather the operands. */
3342 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
3344 const struct powerpc_operand
*operand
;
3350 if (next_opindex
== 0)
3351 operand
= &powerpc_operands
[*opindex_ptr
];
3354 operand
= &powerpc_operands
[next_opindex
];
3359 /* If this is an optional operand, and we are skipping it, just
3360 insert the default value, usually a zero. */
3361 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3362 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
3364 if (num_optional_operands
== 0)
3366 const unsigned char *optr
;
3372 for (optr
= opindex_ptr
; *optr
!= 0; optr
++)
3374 const struct powerpc_operand
*op
;
3375 op
= &powerpc_operands
[*optr
];
3379 if ((op
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3380 && !((op
->flags
& PPC_OPERAND_OPTIONAL32
) != 0
3382 ++num_optional_operands
;
3384 if (s
!= NULL
&& *s
!= '\0')
3388 /* Look for the start of the next operand. */
3389 if ((op
->flags
& PPC_OPERAND_PARENS
) != 0)
3390 s
= strpbrk (s
, "(,");
3392 s
= strchr (s
, ',');
3398 omitted
= total
- provided
;
3399 num_optional_provided
= num_optional_operands
- omitted
;
3401 if (--num_optional_provided
< 0)
3403 int64_t val
= ppc_optional_operand_value (operand
, insn
, ppc_cpu
,
3404 num_optional_provided
);
3405 if (operand
->insert
)
3407 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
3408 if (errmsg
!= (const char *) NULL
)
3409 as_bad ("%s", errmsg
);
3411 else if (operand
->shift
>= 0)
3412 insn
|= (val
& operand
->bitm
) << operand
->shift
;
3414 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
3416 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
3417 next_opindex
= *opindex_ptr
+ 1;
3422 /* Gather the operand. */
3423 hold
= input_line_pointer
;
3424 input_line_pointer
= str
;
3427 if (*input_line_pointer
== '[')
3429 /* We are expecting something like the second argument here:
3431 * lwz r4,[toc].GS.0.static_int(rtoc)
3432 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
3433 * The argument following the `]' must be a symbol name, and the
3434 * register must be the toc register: 'rtoc' or '2'
3436 * The effect is to 0 as the displacement field
3437 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
3438 * the appropriate variation) reloc against it based on the symbol.
3439 * The linker will build the toc, and insert the resolved toc offset.
3442 * o The size of the toc entry is currently assumed to be
3443 * 32 bits. This should not be assumed to be a hard coded
3445 * o In an effort to cope with a change from 32 to 64 bits,
3446 * there are also toc entries that are specified to be
3447 * either 32 or 64 bits:
3448 * lwz r4,[toc32].GS.0.static_int(rtoc)
3449 * lwz r4,[toc64].GS.0.static_int(rtoc)
3450 * These demand toc entries of the specified size, and the
3451 * instruction probably requires it.
3455 enum toc_size_qualifier toc_kind
;
3456 bfd_reloc_code_real_type toc_reloc
;
3458 /* Go parse off the [tocXX] part. */
3459 valid_toc
= parse_toc_entry (&toc_kind
);
3463 ignore_rest_of_line ();
3467 /* Now get the symbol following the ']'. */
3473 /* In this case, we may not have seen the symbol yet,
3474 since it is allowed to appear on a .extern or .globl
3475 or just be a label in the .data section. */
3476 toc_reloc
= BFD_RELOC_PPC_TOC16
;
3479 /* 1. The symbol must be defined and either in the toc
3480 section, or a global.
3481 2. The reloc generated must have the TOCDEFN flag set
3482 in upper bit mess of the reloc type.
3483 FIXME: It's a little confusing what the tocv
3484 qualifier can be used for. At the very least, I've
3485 seen three uses, only one of which I'm sure I can
3487 if (ex
.X_op
== O_symbol
)
3489 gas_assert (ex
.X_add_symbol
!= NULL
);
3490 if (symbol_get_bfdsym (ex
.X_add_symbol
)->section
3493 as_bad (_("[tocv] symbol is not a toc symbol"));
3497 toc_reloc
= BFD_RELOC_PPC_TOC16
;
3500 /* FIXME: these next two specifically specify 32/64 bit
3501 toc entries. We don't support them today. Is this
3502 the right way to say that? */
3503 toc_reloc
= BFD_RELOC_NONE
;
3504 as_bad (_("unimplemented toc32 expression modifier"));
3507 /* FIXME: see above. */
3508 toc_reloc
= BFD_RELOC_NONE
;
3509 as_bad (_("unimplemented toc64 expression modifier"));
3513 _("Unexpected return value [%d] from parse_toc_entry!\n"),
3519 /* We need to generate a fixup for this expression. */
3520 if (fc
>= MAX_INSN_FIXUPS
)
3521 as_fatal (_("too many fixups"));
3523 fixups
[fc
].reloc
= toc_reloc
;
3524 fixups
[fc
].exp
= ex
;
3525 fixups
[fc
].opindex
= *opindex_ptr
;
3528 /* Ok. We've set up the fixup for the instruction. Now make it
3529 look like the constant 0 was found here. */
3531 ex
.X_op
= O_constant
;
3532 ex
.X_add_number
= 0;
3533 ex
.X_add_symbol
= NULL
;
3534 ex
.X_op_symbol
= NULL
;
3541 && (((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3542 || ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)))
3543 || !register_name (&ex
))
3545 char save_lex
= lex_type
['%'];
3547 if (((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)
3548 || (operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3551 lex_type
['%'] |= LEX_BEGIN_NAME
;
3555 lex_type
['%'] = save_lex
;
3559 str
= input_line_pointer
;
3560 input_line_pointer
= hold
;
3562 if (ex
.X_op
== O_illegal
)
3563 as_bad (_("illegal operand"));
3564 else if (ex
.X_op
== O_absent
)
3565 as_bad (_("missing operand"));
3566 else if (ex
.X_op
== O_register
)
3570 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
3571 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
3572 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
)) != 0
3573 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
3574 && ex
.X_add_number
!= 0
3575 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
3576 as_warn (_("invalid register expression"));
3577 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3578 ppc_cpu
, (char *) NULL
, 0);
3580 else if (ex
.X_op
== O_constant
)
3583 /* Allow @HA, @L, @H on constants. */
3584 bfd_reloc_code_real_type reloc
;
3585 char *orig_str
= str
;
3587 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3594 case BFD_RELOC_LO16
:
3595 ex
.X_add_number
&= 0xffff;
3596 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3597 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3600 case BFD_RELOC_HI16
:
3601 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3603 /* PowerPC64 @h is tested for overflow. */
3604 ex
.X_add_number
= (addressT
) ex
.X_add_number
>> 16;
3605 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3607 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3609 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3615 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3616 ex
.X_add_number
= PPC_HI (ex
.X_add_number
);
3617 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3618 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3621 case BFD_RELOC_HI16_S
:
3622 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3624 /* PowerPC64 @ha is tested for overflow. */
3626 = ((addressT
) ex
.X_add_number
+ 0x8000) >> 16;
3627 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3629 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3631 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3637 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3638 ex
.X_add_number
= PPC_HA (ex
.X_add_number
);
3639 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3640 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3643 case BFD_RELOC_PPC64_HIGHER
:
3644 ex
.X_add_number
= PPC_HIGHER (ex
.X_add_number
);
3645 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3646 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3649 case BFD_RELOC_PPC64_HIGHER_S
:
3650 ex
.X_add_number
= PPC_HIGHERA (ex
.X_add_number
);
3651 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3652 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3655 case BFD_RELOC_PPC64_HIGHEST
:
3656 ex
.X_add_number
= PPC_HIGHEST (ex
.X_add_number
);
3657 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3658 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3661 case BFD_RELOC_PPC64_HIGHEST_S
:
3662 ex
.X_add_number
= PPC_HIGHESTA (ex
.X_add_number
);
3663 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3664 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3667 #endif /* OBJ_ELF */
3668 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3669 ppc_cpu
, (char *) NULL
, 0);
3673 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3675 /* Look for a __tls_get_addr arg using the insane old syntax. */
3676 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3677 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3679 fixups
[fc
].opindex
= *opindex_ptr
;
3683 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3685 /* If VLE-mode convert LO/HI/HA relocations. */
3686 if (opcode
->flags
& PPC_OPCODE_VLE
)
3688 uint64_t tmp_insn
= insn
& opcode
->mask
;
3690 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3691 || tmp_insn
== E_AND2I_DOT_INSN
3692 || tmp_insn
== E_OR2IS_INSN
3693 || tmp_insn
== E_LI_INSN
3694 || tmp_insn
== E_LIS_INSN
3695 || tmp_insn
== E_AND2IS_DOT_INSN
);
3698 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3699 || tmp_insn
== E_ADD2IS_INSN
3700 || tmp_insn
== E_CMP16I_INSN
3701 || tmp_insn
== E_MULL2I_INSN
3702 || tmp_insn
== E_CMPL16I_INSN
3703 || tmp_insn
== E_CMPH16I_INSN
3704 || tmp_insn
== E_CMPHL16I_INSN
);
3711 case BFD_RELOC_PPC_EMB_SDA21
:
3712 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3715 case BFD_RELOC_LO16
:
3717 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3718 else if (use_a_reloc
)
3719 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3722 case BFD_RELOC_HI16
:
3724 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3725 else if (use_a_reloc
)
3726 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3729 case BFD_RELOC_HI16_S
:
3731 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3732 else if (use_a_reloc
)
3733 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3736 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3738 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3741 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3743 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3746 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3748 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3753 /* TLS and other tweaks. */
3759 case BFD_RELOC_PPC_TLS
:
3760 case BFD_RELOC_PPC64_TLS_PCREL
:
3761 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3762 as_bad (_("@tls may not be used with \"%s\" operands"),
3764 else if (operand
->shift
!= 11)
3765 as_bad (_("@tls may only be used in last operand"));
3767 insn
= ppc_insert_operand (insn
, operand
,
3769 ppc_cpu
, (char *) NULL
, 0);
3772 /* We'll only use the 32 (or 64) bit form of these relocations
3773 in constants. Instructions get the 16 or 34 bit form. */
3774 case BFD_RELOC_PPC_DTPREL
:
3775 if (operand
->bitm
== 0x3ffffffffULL
)
3776 reloc
= BFD_RELOC_PPC64_DTPREL34
;
3778 reloc
= BFD_RELOC_PPC_DTPREL16
;
3781 case BFD_RELOC_PPC_TPREL
:
3782 if (operand
->bitm
== 0x3ffffffffULL
)
3783 reloc
= BFD_RELOC_PPC64_TPREL34
;
3785 reloc
= BFD_RELOC_PPC_TPREL16
;
3788 case BFD_RELOC_PPC64_PCREL34
:
3789 if (operand
->bitm
== 0xfffffffULL
)
3791 reloc
= BFD_RELOC_PPC64_PCREL28
;
3795 case BFD_RELOC_PPC64_GOT_PCREL34
:
3796 case BFD_RELOC_PPC64_PLT_PCREL34
:
3797 case BFD_RELOC_PPC64_GOT_TLSGD34
:
3798 case BFD_RELOC_PPC64_GOT_TLSLD34
:
3799 case BFD_RELOC_PPC64_GOT_TPREL34
:
3800 case BFD_RELOC_PPC64_GOT_DTPREL34
:
3801 if (operand
->bitm
!= 0x3ffffffffULL
3802 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3803 as_warn (_("%s unsupported on this instruction"), "@pcrel");
3806 case BFD_RELOC_LO16
:
3807 if (operand
->bitm
== 0x3ffffffffULL
3808 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3809 reloc
= BFD_RELOC_PPC64_D34_LO
;
3810 else if ((operand
->bitm
| 0xf) != 0xffff
3811 || operand
->shift
!= 0
3812 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3813 as_warn (_("%s unsupported on this instruction"), "@l");
3816 case BFD_RELOC_HI16
:
3817 if (operand
->bitm
== 0x3ffffffffULL
3818 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3819 reloc
= BFD_RELOC_PPC64_D34_HI30
;
3820 else if (operand
->bitm
!= 0xffff
3821 || operand
->shift
!= 0
3822 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3823 as_warn (_("%s unsupported on this instruction"), "@h");
3826 case BFD_RELOC_HI16_S
:
3827 if (operand
->bitm
== 0x3ffffffffULL
3828 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3829 reloc
= BFD_RELOC_PPC64_D34_HA30
;
3830 else if (operand
->bitm
== 0xffff
3831 && operand
->shift
== (int) PPC_OPSHIFT_INV
3832 && opcode
->opcode
== (19 << 26) + (2 << 1))
3834 reloc
= BFD_RELOC_PPC_16DX_HA
;
3835 else if (operand
->bitm
!= 0xffff
3836 || operand
->shift
!= 0
3837 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3838 as_warn (_("%s unsupported on this instruction"), "@ha");
3841 #endif /* OBJ_ELF */
3843 if (reloc
!= BFD_RELOC_NONE
)
3845 /* Determine a BFD reloc value based on the operand information.
3846 We are only prepared to turn a few of the operands into
3848 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3849 | PPC_OPERAND_ABSOLUTE
)) != 0
3850 && operand
->bitm
== 0x3fffffc
3851 && operand
->shift
== 0)
3852 reloc
= BFD_RELOC_PPC_B26
;
3853 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3854 | PPC_OPERAND_ABSOLUTE
)) != 0
3855 && operand
->bitm
== 0xfffc
3856 && operand
->shift
== 0)
3857 reloc
= BFD_RELOC_PPC_B16
;
3858 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3859 && operand
->bitm
== 0x1fe
3860 && operand
->shift
== -1)
3861 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3862 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3863 && operand
->bitm
== 0xfffe
3864 && operand
->shift
== 0)
3865 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3866 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3867 && operand
->bitm
== 0x1fffffe
3868 && operand
->shift
== 0)
3869 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3870 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3871 && (operand
->bitm
& 0xfff0) == 0xfff0
3872 && operand
->shift
== 0)
3874 reloc
= BFD_RELOC_16
;
3875 #if defined OBJ_XCOFF || defined OBJ_ELF
3876 /* Note: the symbol may be not yet defined. */
3877 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3878 && ppc_is_toc_sym (ex
.X_add_symbol
))
3880 reloc
= BFD_RELOC_PPC_TOC16
;
3882 as_warn (_("assuming %s on symbol"),
3883 ppc_obj64
? "@toc" : "@xgot");
3888 else if (operand
->bitm
== 0x3ffffffffULL
)
3889 reloc
= BFD_RELOC_PPC64_D34
;
3890 else if (operand
->bitm
== 0xfffffffULL
)
3891 reloc
= BFD_RELOC_PPC64_D28
;
3893 /* For the absolute forms of branches, convert the PC
3894 relative form back into the absolute. */
3895 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3899 case BFD_RELOC_PPC_B26
:
3900 reloc
= BFD_RELOC_PPC_BA26
;
3902 case BFD_RELOC_PPC_B16
:
3903 reloc
= BFD_RELOC_PPC_BA16
;
3906 case BFD_RELOC_PPC_B16_BRTAKEN
:
3907 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3909 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3910 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3921 case BFD_RELOC_PPC_TOC16
:
3922 toc_reloc_types
|= has_small_toc_reloc
;
3924 case BFD_RELOC_PPC64_TOC16_LO
:
3925 case BFD_RELOC_PPC64_TOC16_HI
:
3926 case BFD_RELOC_PPC64_TOC16_HA
:
3927 toc_reloc_types
|= has_large_toc_reloc
;
3934 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3939 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3942 case BFD_RELOC_LO16
:
3943 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3946 case BFD_RELOC_16_GOTOFF
:
3947 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3950 case BFD_RELOC_LO16_GOTOFF
:
3951 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3954 case BFD_RELOC_LO16_PLTOFF
:
3955 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3958 case BFD_RELOC_16_BASEREL
:
3959 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3962 case BFD_RELOC_LO16_BASEREL
:
3963 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3966 case BFD_RELOC_PPC_TOC16
:
3967 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3970 case BFD_RELOC_PPC64_TOC16_LO
:
3971 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3974 case BFD_RELOC_PPC64_PLTGOT16
:
3975 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3978 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3979 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3982 case BFD_RELOC_PPC_DTPREL16
:
3983 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3986 case BFD_RELOC_PPC_DTPREL16_LO
:
3987 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3990 case BFD_RELOC_PPC_TPREL16
:
3991 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3994 case BFD_RELOC_PPC_TPREL16_LO
:
3995 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3998 case BFD_RELOC_PPC_GOT_DTPREL16
:
3999 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
4000 case BFD_RELOC_PPC_GOT_TPREL16
:
4001 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
4005 as_bad (_("unsupported relocation for DS offset field"));
4010 /* Look for a __tls_get_addr arg after any __tls_get_addr
4011 modifiers like @plt. This fixup must be emitted before
4012 the usual call fixup. */
4013 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
4014 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
4016 fixups
[fc
].opindex
= *opindex_ptr
;
4021 /* We need to generate a fixup for this expression. */
4022 if (fc
>= MAX_INSN_FIXUPS
)
4023 as_fatal (_("too many fixups"));
4024 fixups
[fc
].exp
= ex
;
4025 fixups
[fc
].opindex
= *opindex_ptr
;
4026 fixups
[fc
].reloc
= reloc
;
4034 /* If expecting more operands, then we want to see "),". */
4035 if (*str
== endc
&& opindex_ptr
[1] != 0)
4039 while (ISSPACE (*str
));
4043 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
4048 /* The call to expression should have advanced str past any
4056 else if (*str
!= '\0')
4058 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
4061 else if (endc
== ')')
4063 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
4068 while (ISSPACE (*str
))
4072 as_bad (_("junk at end of line: `%s'"), str
);
4075 /* Do we need/want an APUinfo section? */
4076 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
4079 /* These are all version "1". */
4080 if (opcode
->flags
& PPC_OPCODE_SPE
)
4081 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
4082 if (opcode
->flags
& PPC_OPCODE_ISEL
)
4083 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
4084 if (opcode
->flags
& PPC_OPCODE_EFS
)
4085 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
4086 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
4087 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
4088 if (opcode
->flags
& PPC_OPCODE_PMR
)
4089 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
4090 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
4091 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
4092 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
4093 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
4094 /* Only set the VLE flag if the instruction has been pulled via
4095 the VLE instruction set. This way the flag is guaranteed to
4096 be set for VLE-only instructions or for VLE-only processors,
4097 however it'll remain clear for dual-mode instructions on
4098 dual-mode and, more importantly, standard-mode processors. */
4099 if ((ppc_cpu
& opcode
->flags
) == PPC_OPCODE_VLE
)
4101 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
4102 if (elf_section_data (now_seg
) != NULL
)
4103 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
4108 /* Write out the instruction. */
4111 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
4112 /* All instructions can start on a 2 byte boundary for VLE. */
4115 if (frag_now
->insn_addr
!= addr_mask
)
4117 /* Don't emit instructions to a frag started for data, or for a
4118 CPU differing in VLE mode. Data is allowed to be misaligned,
4119 and it's possible to start a new frag in the middle of
4121 frag_wane (frag_now
);
4125 /* Check that insns within the frag are aligned. ppc_frag_check
4126 will ensure that the frag start address is aligned. */
4127 if ((frag_now_fix () & addr_mask
) != 0)
4128 as_bad (_("instruction address is not a multiple of %d"), addr_mask
+ 1);
4130 /* Differentiate between two, four, and eight byte insns. */
4132 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && PPC_OP_SE_VLE (insn
))
4134 else if ((opcode
->flags
& PPC_OPCODE_POWERXX
) != 0
4135 && PPC_PREFIX_P (insn
))
4137 struct insn_label_list
*l
;
4141 /* 8-byte prefix instructions are not allowed to cross 64-byte
4143 frag_align_code (6, 4);
4144 record_alignment (now_seg
, 6);
4146 /* Update "dot" in any expressions used by this instruction, and
4147 a label attached to the instruction. By "attached" we mean
4148 on the same source line as the instruction and without any
4149 intervening semicolons. */
4150 dot_value
= frag_now_fix ();
4151 dot_frag
= frag_now
;
4152 for (l
= insn_labels
; l
!= NULL
; l
= l
->next
)
4154 symbol_set_frag (l
->label
, dot_frag
);
4155 S_SET_VALUE (l
->label
, dot_value
);
4159 ppc_clear_labels ();
4161 f
= frag_more (insn_length
);
4162 frag_now
->insn_addr
= addr_mask
;
4164 /* The prefix part of an 8-byte instruction always occupies the lower
4165 addressed word in a doubleword, regardless of endianness. */
4166 if (!target_big_endian
&& insn_length
== 8)
4168 md_number_to_chars (f
, PPC_GET_PREFIX (insn
), 4);
4169 md_number_to_chars (f
+ 4, PPC_GET_SUFFIX (insn
), 4);
4172 md_number_to_chars (f
, insn
, insn_length
);
4176 last_subseg
= now_subseg
;
4179 dwarf2_emit_insn (insn_length
);
4182 /* Create any fixups. */
4183 for (i
= 0; i
< fc
; i
++)
4186 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
4189 unsigned int size
= fixup_size (fixups
[i
].reloc
, &pcrel
);
4190 int offset
= target_big_endian
? (insn_length
- size
) : 0;
4192 fixP
= fix_new_exp (frag_now
,
4193 f
- frag_now
->fr_literal
+ offset
,
4201 const struct powerpc_operand
*operand
;
4203 operand
= &powerpc_operands
[fixups
[i
].opindex
];
4204 fixP
= fix_new_exp (frag_now
,
4205 f
- frag_now
->fr_literal
,
4208 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
4211 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
4215 /* Handle a macro. Gather all the operands, transform them as
4216 described by the macro, and call md_assemble recursively. All the
4217 operands are separated by commas; we don't accept parentheses
4218 around operands here. */
4221 ppc_macro (char *str
, const struct powerpc_macro
*macro
)
4232 /* Gather the users operands into the operands array. */
4237 if (count
>= sizeof operands
/ sizeof operands
[0])
4239 operands
[count
++] = s
;
4240 s
= strchr (s
, ',');
4241 if (s
== (char *) NULL
)
4246 if (count
!= macro
->operands
)
4248 as_bad (_("wrong number of operands"));
4252 /* Work out how large the string must be (the size is unbounded
4253 because it includes user input). */
4255 format
= macro
->format
;
4256 while (*format
!= '\0')
4265 arg
= strtol (format
+ 1, &send
, 10);
4266 know (send
!= format
&& arg
< count
);
4267 len
+= strlen (operands
[arg
]);
4272 /* Put the string together. */
4273 complete
= s
= XNEWVEC (char, len
+ 1);
4274 format
= macro
->format
;
4275 while (*format
!= '\0')
4281 arg
= strtol (format
+ 1, &send
, 10);
4282 strcpy (s
, operands
[arg
]);
4289 /* Assemble the constructed instruction. */
4290 md_assemble (complete
);
4295 /* For ELF, add support for SHT_ORDERED. */
4298 ppc_section_type (char *str
, size_t len
)
4300 if (len
== 7 && strncmp (str
, "ordered", 7) == 0)
4307 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
4309 if (type
== SHT_ORDERED
)
4310 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
4316 ppc_elf_section_letter (int letter
, const char **ptrmsg
)
4321 *ptrmsg
= _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
4324 #endif /* OBJ_ELF */
4327 /* Pseudo-op handling. */
4329 /* The .byte pseudo-op. This is similar to the normal .byte
4330 pseudo-op, but it can also take a single ASCII string. */
4333 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
4337 if (*input_line_pointer
!= '\"')
4343 /* Gather characters. A real double quote is doubled. Unusual
4344 characters are not permitted. */
4345 ++input_line_pointer
;
4350 c
= *input_line_pointer
++;
4354 if (*input_line_pointer
!= '\"')
4356 ++input_line_pointer
;
4359 FRAG_APPEND_1_CHAR (c
);
4363 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
4364 as_warn (_("data in executable section"));
4365 demand_empty_rest_of_line ();
4370 /* XCOFF specific pseudo-op handling. */
4372 /* This is set if we are creating a .stabx symbol, since we don't want
4373 to handle symbol suffixes for such symbols. */
4374 static bfd_boolean ppc_stab_symbol
;
4376 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
4377 symbols in the .bss segment as though they were local common
4378 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
4379 aligns .comm and .lcomm to 4 bytes. */
4382 ppc_comm (int lcomm
)
4384 asection
*current_seg
= now_seg
;
4385 subsegT current_subseg
= now_subseg
;
4391 symbolS
*lcomm_sym
= NULL
;
4395 endc
= get_symbol_name (&name
);
4396 end_name
= input_line_pointer
;
4397 (void) restore_line_pointer (endc
);
4399 if (*input_line_pointer
!= ',')
4401 as_bad (_("missing size"));
4402 ignore_rest_of_line ();
4405 ++input_line_pointer
;
4407 size
= get_absolute_expression ();
4410 as_bad (_("negative size"));
4411 ignore_rest_of_line ();
4417 /* The third argument to .comm is the alignment. */
4418 if (*input_line_pointer
!= ',')
4422 ++input_line_pointer
;
4423 align
= get_absolute_expression ();
4426 as_warn (_("ignoring bad alignment"));
4436 /* The third argument to .lcomm appears to be the real local
4437 common symbol to create. References to the symbol named in
4438 the first argument are turned into references to the third
4440 if (*input_line_pointer
!= ',')
4442 as_bad (_("missing real symbol name"));
4443 ignore_rest_of_line ();
4446 ++input_line_pointer
;
4448 lcomm_endc
= get_symbol_name (&lcomm_name
);
4450 lcomm_sym
= symbol_find_or_make (lcomm_name
);
4452 (void) restore_line_pointer (lcomm_endc
);
4454 /* The fourth argument to .lcomm is the alignment. */
4455 if (*input_line_pointer
!= ',')
4464 ++input_line_pointer
;
4465 align
= get_absolute_expression ();
4468 as_warn (_("ignoring bad alignment"));
4475 sym
= symbol_find_or_make (name
);
4478 if (S_IS_DEFINED (sym
)
4479 || S_GET_VALUE (sym
) != 0)
4481 as_bad (_("attempt to redefine symbol"));
4482 ignore_rest_of_line ();
4486 record_alignment (bss_section
, align
);
4489 || ! S_IS_DEFINED (lcomm_sym
))
4498 S_SET_EXTERNAL (sym
);
4502 symbol_get_tc (lcomm_sym
)->output
= 1;
4503 def_sym
= lcomm_sym
;
4507 subseg_set (bss_section
, 1);
4508 frag_align (align
, 0, 0);
4510 symbol_set_frag (def_sym
, frag_now
);
4511 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
4512 def_size
, (char *) NULL
);
4514 S_SET_SEGMENT (def_sym
, bss_section
);
4515 symbol_get_tc (def_sym
)->align
= align
;
4519 /* Align the size of lcomm_sym. */
4520 symbol_get_frag (lcomm_sym
)->fr_offset
=
4521 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
4522 &~ ((1 << align
) - 1));
4523 if (align
> symbol_get_tc (lcomm_sym
)->align
)
4524 symbol_get_tc (lcomm_sym
)->align
= align
;
4529 /* Make sym an offset from lcomm_sym. */
4530 S_SET_SEGMENT (sym
, bss_section
);
4531 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
4532 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
4533 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
4536 subseg_set (current_seg
, current_subseg
);
4538 demand_empty_rest_of_line ();
4541 /* The .csect pseudo-op. This switches us into a different
4542 subsegment. The first argument is a symbol whose value is the
4543 start of the .csect. In COFF, csect symbols get special aux
4544 entries defined by the x_csect field of union internal_auxent. The
4545 optional second argument is the alignment (the default is 2). */
4548 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
4555 endc
= get_symbol_name (&name
);
4557 sym
= symbol_find_or_make (name
);
4559 (void) restore_line_pointer (endc
);
4561 if (S_GET_NAME (sym
)[0] == '\0')
4563 /* An unnamed csect is assumed to be [PR]. */
4564 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
4568 if (*input_line_pointer
== ',')
4570 ++input_line_pointer
;
4571 align
= get_absolute_expression ();
4574 ppc_change_csect (sym
, align
);
4576 demand_empty_rest_of_line ();
4579 /* Change to a different csect. */
4582 ppc_change_csect (symbolS
*sym
, offsetT align
)
4584 if (S_IS_DEFINED (sym
))
4585 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
4595 /* This is a new csect. We need to look at the symbol class to
4596 figure out whether it should go in the text section or the
4600 switch (symbol_get_tc (sym
)->symbol_class
)
4610 S_SET_SEGMENT (sym
, text_section
);
4611 symbol_get_tc (sym
)->subseg
= ppc_text_subsegment
;
4612 ++ppc_text_subsegment
;
4613 list_ptr
= &ppc_text_csects
;
4623 if (ppc_toc_csect
!= NULL
4624 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
4625 == ppc_data_subsegment
))
4627 S_SET_SEGMENT (sym
, data_section
);
4628 symbol_get_tc (sym
)->subseg
= ppc_data_subsegment
;
4629 ++ppc_data_subsegment
;
4630 list_ptr
= &ppc_data_csects
;
4636 /* We set the obstack chunk size to a small value before
4637 changing subsegments, so that we don't use a lot of memory
4638 space for what may be a small section. */
4639 hold_chunksize
= chunksize
;
4642 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
4643 symbol_get_tc (sym
)->subseg
);
4645 chunksize
= hold_chunksize
;
4648 ppc_after_toc_frag
= frag_now
;
4650 record_alignment (sec
, align
);
4652 frag_align_code (align
, 0);
4654 frag_align (align
, 0, 0);
4656 symbol_set_frag (sym
, frag_now
);
4657 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4659 symbol_get_tc (sym
)->align
= align
;
4660 symbol_get_tc (sym
)->output
= 1;
4661 symbol_get_tc (sym
)->within
= sym
;
4663 for (list
= *list_ptr
;
4664 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4665 list
= symbol_get_tc (list
)->next
)
4667 symbol_get_tc (list
)->next
= sym
;
4669 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4670 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4674 ppc_current_csect
= sym
;
4678 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
4682 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
4684 sec
= subseg_new (dw
->name
, subseg
);
4685 oldflags
= bfd_section_flags (sec
);
4686 if (oldflags
== SEC_NO_FLAGS
)
4688 /* Just created section. */
4689 gas_assert (dw_sections
[idx
].sect
== NULL
);
4691 bfd_set_section_flags (sec
, SEC_DEBUGGING
);
4692 bfd_set_section_alignment (sec
, 0);
4693 dw_sections
[idx
].sect
= sec
;
4696 /* Not anymore in a csect. */
4697 ppc_current_csect
= NULL
;
4700 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4701 .dwsect flag [, opt-label ]
4705 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4709 const struct xcoff_dwsect_name
*dw
;
4710 struct dw_subsection
*subseg
;
4711 struct dw_section
*dws
;
4715 flag
= get_absolute_expression ();
4717 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4718 if (xcoff_dwsect_names
[i
].flag
== flag
)
4720 dw
= &xcoff_dwsect_names
[i
];
4724 /* Parse opt-label. */
4725 if (*input_line_pointer
== ',')
4730 ++input_line_pointer
;
4732 c
= get_symbol_name (&label
);
4733 opt_label
= symbol_find_or_make (label
);
4734 (void) restore_line_pointer (c
);
4739 demand_empty_rest_of_line ();
4741 /* Return now in case of unknown subsection. */
4744 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4749 /* Find the subsection. */
4750 dws
= &dw_sections
[i
];
4752 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4754 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4755 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4757 as_bad (_("label %s was not defined in this dwarf section"),
4758 S_GET_NAME (opt_label
));
4759 subseg
= dws
->anon_subseg
;
4763 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4768 /* Switch to the subsection. */
4769 ppc_change_debug_section (i
, subseg
->subseg
);
4773 /* Create a new dw subsection. */
4774 subseg
= XNEW (struct dw_subsection
);
4776 if (opt_label
== NULL
)
4778 /* The anonymous one. */
4780 subseg
->link
= NULL
;
4781 dws
->anon_subseg
= subseg
;
4786 if (dws
->list_subseg
!= NULL
)
4787 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4791 subseg
->link
= dws
->list_subseg
;
4792 dws
->list_subseg
= subseg
;
4793 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4796 ppc_change_debug_section (i
, subseg
->subseg
);
4800 /* Add the length field. */
4801 expressionS
*exp
= &subseg
->end_exp
;
4804 if (opt_label
!= NULL
)
4805 symbol_set_value_now (opt_label
);
4807 /* Add the length field. Note that according to the AIX assembler
4808 manual, the size of the length field is 4 for powerpc32 but
4809 12 for powerpc64. */
4812 /* Write the 64bit marker. */
4813 md_number_to_chars (frag_more (4), -1, 4);
4816 exp
->X_op
= O_subtract
;
4817 exp
->X_op_symbol
= symbol_temp_new_now ();
4818 exp
->X_add_symbol
= symbol_temp_make ();
4820 sz
= ppc_obj64
? 8 : 4;
4821 exp
->X_add_number
= -sz
;
4822 emit_expr (exp
, sz
);
4827 /* This function handles the .text and .data pseudo-ops. These
4828 pseudo-ops aren't really used by XCOFF; we implement them for the
4829 convenience of people who aren't used to XCOFF. */
4832 ppc_section (int type
)
4839 else if (type
== 'd')
4844 sym
= symbol_find_or_make (name
);
4846 ppc_change_csect (sym
, 2);
4848 demand_empty_rest_of_line ();
4851 /* This function handles the .section pseudo-op. This is mostly to
4852 give an error, since XCOFF only supports .text, .data and .bss, but
4853 we do permit the user to name the text or data section. */
4856 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4859 const char *real_name
;
4863 c
= get_symbol_name (&user_name
);
4865 if (strcmp (user_name
, ".text") == 0)
4866 real_name
= ".text[PR]";
4867 else if (strcmp (user_name
, ".data") == 0)
4868 real_name
= ".data[RW]";
4871 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4872 (void) restore_line_pointer (c
);
4873 ignore_rest_of_line ();
4877 (void) restore_line_pointer (c
);
4879 sym
= symbol_find_or_make (real_name
);
4881 ppc_change_csect (sym
, 2);
4883 demand_empty_rest_of_line ();
4886 /* The .extern pseudo-op. We create an undefined symbol. */
4889 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4894 endc
= get_symbol_name (&name
);
4896 (void) symbol_find_or_make (name
);
4898 (void) restore_line_pointer (endc
);
4900 demand_empty_rest_of_line ();
4903 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4906 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
4912 endc
= get_symbol_name (&name
);
4914 sym
= symbol_find_or_make (name
);
4916 (void) restore_line_pointer (endc
);
4918 symbol_get_tc (sym
)->output
= 1;
4920 demand_empty_rest_of_line ();
4923 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4924 relocations at the beginning of the current csect.
4926 (In principle, there's no reason why the relocations _have_ to be at
4927 the beginning. Anywhere in the csect would do. However, inserting
4928 at the beginning is what the native assembler does, and it helps to
4929 deal with cases where the .ref statements follow the section contents.)
4931 ??? .refs don't work for empty .csects. However, the native assembler
4932 doesn't report an error in this case, and neither yet do we. */
4935 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
4940 if (ppc_current_csect
== NULL
)
4942 as_bad (_(".ref outside .csect"));
4943 ignore_rest_of_line ();
4949 c
= get_symbol_name (&name
);
4951 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
4952 symbol_find_or_make (name
), 0, FALSE
, BFD_RELOC_NONE
);
4954 *input_line_pointer
= c
;
4955 SKIP_WHITESPACE_AFTER_NAME ();
4956 c
= *input_line_pointer
;
4959 input_line_pointer
++;
4961 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
4963 as_bad (_("missing symbol name"));
4964 ignore_rest_of_line ();
4971 demand_empty_rest_of_line ();
4974 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4975 although I don't know why it bothers. */
4978 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
4985 endc
= get_symbol_name (&name
);
4987 sym
= symbol_find_or_make (name
);
4989 (void) restore_line_pointer (endc
);
4991 if (*input_line_pointer
!= ',')
4993 as_bad (_("missing rename string"));
4994 ignore_rest_of_line ();
4997 ++input_line_pointer
;
4999 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
5001 demand_empty_rest_of_line ();
5004 /* The .stabx pseudo-op. This is similar to a normal .stabs
5005 pseudo-op, but slightly different. A sample is
5006 .stabx "main:F-1",.main,142,0
5007 The first argument is the symbol name to create. The second is the
5008 value, and the third is the storage class. The fourth seems to be
5009 always zero, and I am assuming it is the type. */
5012 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
5019 name
= demand_copy_C_string (&len
);
5021 if (*input_line_pointer
!= ',')
5023 as_bad (_("missing value"));
5026 ++input_line_pointer
;
5028 ppc_stab_symbol
= TRUE
;
5029 sym
= symbol_make (name
);
5030 ppc_stab_symbol
= FALSE
;
5032 symbol_get_tc (sym
)->real_name
= name
;
5034 (void) expression (&exp
);
5041 as_bad (_("illegal .stabx expression; zero assumed"));
5042 exp
.X_add_number
= 0;
5045 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
5046 symbol_set_frag (sym
, &zero_address_frag
);
5050 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
5051 symbol_set_value_expression (sym
, &exp
);
5055 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
5056 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
5061 /* The value is some complex expression. This will probably
5062 fail at some later point, but this is probably the right
5063 thing to do here. */
5064 symbol_set_value_expression (sym
, &exp
);
5068 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5069 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5071 if (*input_line_pointer
!= ',')
5073 as_bad (_("missing class"));
5076 ++input_line_pointer
;
5078 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
5080 if (*input_line_pointer
!= ',')
5082 as_bad (_("missing type"));
5085 ++input_line_pointer
;
5087 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
5089 symbol_get_tc (sym
)->output
= 1;
5091 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
5096 .stabx "z",arrays_,133,0
5099 .comm arrays_,13768,3
5101 resolve_symbol_value will copy the exp's "within" into sym's when the
5102 offset is 0. Since this seems to be corner case problem,
5103 only do the correction for storage class C_STSYM. A better solution
5104 would be to have the tc field updated in ppc_symbol_new_hook. */
5106 if (exp
.X_op
== O_symbol
)
5108 if (ppc_current_block
== NULL
)
5109 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
5111 symbol_get_tc (sym
)->within
= ppc_current_block
;
5112 symbol_get_tc (exp
.X_add_symbol
)->within
= ppc_current_block
;
5116 if (exp
.X_op
!= O_symbol
5117 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
5118 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
5119 ppc_frob_label (sym
);
5122 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5123 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
5124 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
5125 symbol_get_tc (ppc_current_csect
)->within
= sym
;
5128 demand_empty_rest_of_line ();
5131 /* The .function pseudo-op. This takes several arguments. The first
5132 argument seems to be the external name of the symbol. The second
5133 argument seems to be the label for the start of the function. gcc
5134 uses the same name for both. I have no idea what the third and
5135 fourth arguments are meant to be. The optional fifth argument is
5136 an expression for the size of the function. In COFF this symbol
5137 gets an aux entry like that used for a csect. */
5140 ppc_function (int ignore ATTRIBUTE_UNUSED
)
5148 endc
= get_symbol_name (&name
);
5150 /* Ignore any [PR] suffix. */
5151 name
= ppc_canonicalize_symbol_name (name
);
5152 s
= strchr (name
, '[');
5153 if (s
!= (char *) NULL
5154 && strcmp (s
+ 1, "PR]") == 0)
5157 ext_sym
= symbol_find_or_make (name
);
5159 (void) restore_line_pointer (endc
);
5161 if (*input_line_pointer
!= ',')
5163 as_bad (_("missing symbol name"));
5164 ignore_rest_of_line ();
5167 ++input_line_pointer
;
5169 endc
= get_symbol_name (&name
);
5171 lab_sym
= symbol_find_or_make (name
);
5173 (void) restore_line_pointer (endc
);
5175 if (ext_sym
!= lab_sym
)
5179 exp
.X_op
= O_symbol
;
5180 exp
.X_add_symbol
= lab_sym
;
5181 exp
.X_op_symbol
= NULL
;
5182 exp
.X_add_number
= 0;
5184 symbol_set_value_expression (ext_sym
, &exp
);
5187 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
5188 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
5189 symbol_get_tc (ext_sym
)->output
= 1;
5191 if (*input_line_pointer
== ',')
5195 /* Ignore the third argument. */
5196 ++input_line_pointer
;
5198 if (*input_line_pointer
== ',')
5200 /* Ignore the fourth argument. */
5201 ++input_line_pointer
;
5203 if (*input_line_pointer
== ',')
5205 /* The fifth argument is the function size. */
5206 ++input_line_pointer
;
5207 symbol_get_tc (ext_sym
)->u
.size
= symbol_new
5208 ("L0\001", absolute_section
,(valueT
) 0, &zero_address_frag
);
5209 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
5214 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
5215 SF_SET_FUNCTION (ext_sym
);
5216 SF_SET_PROCESS (ext_sym
);
5217 coff_add_linesym (ext_sym
);
5219 demand_empty_rest_of_line ();
5222 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
5223 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
5224 with the correct line number */
5226 static symbolS
*saved_bi_sym
= 0;
5229 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
5233 sym
= symbol_make (".bf");
5234 S_SET_SEGMENT (sym
, text_section
);
5235 symbol_set_frag (sym
, frag_now
);
5236 S_SET_VALUE (sym
, frag_now_fix ());
5237 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5239 coff_line_base
= get_absolute_expression ();
5241 S_SET_NUMBER_AUXILIARY (sym
, 1);
5242 SA_SET_SYM_LNNO (sym
, coff_line_base
);
5244 /* Line number for bi. */
5247 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
5252 symbol_get_tc (sym
)->output
= 1;
5254 ppc_frob_label (sym
);
5256 demand_empty_rest_of_line ();
5259 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
5260 ".ef", except that the line number is absolute, not relative to the
5261 most recent ".bf" symbol. */
5264 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
5268 sym
= symbol_make (".ef");
5269 S_SET_SEGMENT (sym
, text_section
);
5270 symbol_set_frag (sym
, frag_now
);
5271 S_SET_VALUE (sym
, frag_now_fix ());
5272 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5273 S_SET_NUMBER_AUXILIARY (sym
, 1);
5274 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5275 symbol_get_tc (sym
)->output
= 1;
5277 ppc_frob_label (sym
);
5279 demand_empty_rest_of_line ();
5282 /* The .bi and .ei pseudo-ops. These take a string argument and
5283 generates a C_BINCL or C_EINCL symbol, which goes at the start of
5284 the symbol list. The value of .bi will be know when the next .bf
5290 static symbolS
*last_biei
;
5297 name
= demand_copy_C_string (&len
);
5299 /* The value of these symbols is actually file offset. Here we set
5300 the value to the index into the line number entries. In
5301 ppc_frob_symbols we set the fix_line field, which will cause BFD
5302 to do the right thing. */
5304 sym
= symbol_make (name
);
5305 /* obj-coff.c currently only handles line numbers correctly in the
5307 S_SET_SEGMENT (sym
, text_section
);
5308 S_SET_VALUE (sym
, coff_n_line_nos
);
5309 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5311 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
5312 symbol_get_tc (sym
)->output
= 1;
5320 for (look
= last_biei
? last_biei
: symbol_rootP
;
5321 (look
!= (symbolS
*) NULL
5322 && (S_GET_STORAGE_CLASS (look
) == C_FILE
5323 || S_GET_STORAGE_CLASS (look
) == C_BINCL
5324 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
5325 look
= symbol_next (look
))
5327 if (look
!= (symbolS
*) NULL
)
5329 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5330 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
5334 demand_empty_rest_of_line ();
5337 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
5338 There is one argument, which is a csect symbol. The value of the
5339 .bs symbol is the index of this csect symbol. */
5342 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
5349 if (ppc_current_block
!= NULL
)
5350 as_bad (_("nested .bs blocks"));
5352 endc
= get_symbol_name (&name
);
5354 csect
= symbol_find_or_make (name
);
5356 (void) restore_line_pointer (endc
);
5358 sym
= symbol_make (".bs");
5359 S_SET_SEGMENT (sym
, now_seg
);
5360 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
5361 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5362 symbol_get_tc (sym
)->output
= 1;
5364 symbol_get_tc (sym
)->within
= csect
;
5366 ppc_frob_label (sym
);
5368 ppc_current_block
= sym
;
5370 demand_empty_rest_of_line ();
5373 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
5376 ppc_es (int ignore ATTRIBUTE_UNUSED
)
5380 if (ppc_current_block
== NULL
)
5381 as_bad (_(".es without preceding .bs"));
5383 sym
= symbol_make (".es");
5384 S_SET_SEGMENT (sym
, now_seg
);
5385 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
5386 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5387 symbol_get_tc (sym
)->output
= 1;
5389 ppc_frob_label (sym
);
5391 ppc_current_block
= NULL
;
5393 demand_empty_rest_of_line ();
5396 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
5400 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
5404 sym
= symbol_make (".bb");
5405 S_SET_SEGMENT (sym
, text_section
);
5406 symbol_set_frag (sym
, frag_now
);
5407 S_SET_VALUE (sym
, frag_now_fix ());
5408 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5410 S_SET_NUMBER_AUXILIARY (sym
, 1);
5411 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5413 symbol_get_tc (sym
)->output
= 1;
5415 SF_SET_PROCESS (sym
);
5417 ppc_frob_label (sym
);
5419 demand_empty_rest_of_line ();
5422 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
5426 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
5430 sym
= symbol_make (".eb");
5431 S_SET_SEGMENT (sym
, text_section
);
5432 symbol_set_frag (sym
, frag_now
);
5433 S_SET_VALUE (sym
, frag_now_fix ());
5434 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5435 S_SET_NUMBER_AUXILIARY (sym
, 1);
5436 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5437 symbol_get_tc (sym
)->output
= 1;
5439 SF_SET_PROCESS (sym
);
5441 ppc_frob_label (sym
);
5443 demand_empty_rest_of_line ();
5446 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
5450 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
5456 name
= demand_copy_C_string (&len
);
5457 sym
= symbol_make (name
);
5458 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5459 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5460 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
5461 S_SET_VALUE (sym
, 0);
5462 symbol_get_tc (sym
)->output
= 1;
5464 ppc_frob_label (sym
);
5466 demand_empty_rest_of_line ();
5469 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
5472 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
5476 sym
= symbol_make (".ec");
5477 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5478 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5479 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
5480 S_SET_VALUE (sym
, 0);
5481 symbol_get_tc (sym
)->output
= 1;
5483 ppc_frob_label (sym
);
5485 demand_empty_rest_of_line ();
5488 /* The .toc pseudo-op. Switch to the .toc subsegment. */
5491 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
5493 if (ppc_toc_csect
!= (symbolS
*) NULL
)
5494 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
5501 subseg
= ppc_data_subsegment
;
5502 ++ppc_data_subsegment
;
5504 subseg_new (segment_name (data_section
), subseg
);
5505 ppc_toc_frag
= frag_now
;
5507 sym
= symbol_find_or_make ("TOC[TC0]");
5508 symbol_set_frag (sym
, frag_now
);
5509 S_SET_SEGMENT (sym
, data_section
);
5510 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5511 symbol_get_tc (sym
)->subseg
= subseg
;
5512 symbol_get_tc (sym
)->output
= 1;
5513 symbol_get_tc (sym
)->within
= sym
;
5515 ppc_toc_csect
= sym
;
5517 for (list
= ppc_data_csects
;
5518 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
5519 list
= symbol_get_tc (list
)->next
)
5521 symbol_get_tc (list
)->next
= sym
;
5523 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5524 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
5528 ppc_current_csect
= ppc_toc_csect
;
5530 demand_empty_rest_of_line ();
5533 /* The AIX assembler automatically aligns the operands of a .long or
5534 .short pseudo-op, and we want to be compatible. */
5537 ppc_xcoff_cons (int log_size
)
5539 frag_align (log_size
, 0, 0);
5540 record_alignment (now_seg
, log_size
);
5541 cons (1 << log_size
);
5545 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
5550 (void) expression (&exp
);
5552 if (exp
.X_op
!= O_constant
)
5554 as_bad (_("non-constant byte count"));
5558 byte_count
= exp
.X_add_number
;
5560 if (*input_line_pointer
!= ',')
5562 as_bad (_("missing value"));
5566 ++input_line_pointer
;
5571 ppc_xcoff_end (void)
5575 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
5577 struct dw_section
*dws
= &dw_sections
[i
];
5578 struct dw_subsection
*dwss
;
5580 if (dws
->anon_subseg
)
5582 dwss
= dws
->anon_subseg
;
5583 dwss
->link
= dws
->list_subseg
;
5586 dwss
= dws
->list_subseg
;
5588 for (; dwss
!= NULL
; dwss
= dwss
->link
)
5589 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
5591 subseg_set (dws
->sect
, dwss
->subseg
);
5592 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
5598 #endif /* OBJ_XCOFF */
5599 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5601 /* The .tc pseudo-op. This is used when generating either XCOFF or
5602 ELF. This takes two or more arguments.
5604 When generating XCOFF output, the first argument is the name to
5605 give to this location in the toc; this will be a symbol with class
5606 TC. The rest of the arguments are N-byte values to actually put at
5607 this location in the TOC; often there is just one more argument, a
5608 relocatable symbol reference. The size of the value to store
5609 depends on target word size. A 32-bit target uses 4-byte values, a
5610 64-bit target uses 8-byte values.
5612 When not generating XCOFF output, the arguments are the same, but
5613 the first argument is simply ignored. */
5616 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
5620 /* Define the TOC symbol name. */
5626 if (ppc_toc_csect
== (symbolS
*) NULL
5627 || ppc_toc_csect
!= ppc_current_csect
)
5629 as_bad (_(".tc not in .toc section"));
5630 ignore_rest_of_line ();
5634 endc
= get_symbol_name (&name
);
5636 sym
= symbol_find_or_make (name
);
5638 (void) restore_line_pointer (endc
);
5640 if (S_IS_DEFINED (sym
))
5644 label
= symbol_get_tc (ppc_current_csect
)->within
;
5645 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
5647 as_bad (_(".tc with no label"));
5648 ignore_rest_of_line ();
5652 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
5653 symbol_set_frag (label
, symbol_get_frag (sym
));
5654 S_SET_VALUE (label
, S_GET_VALUE (sym
));
5656 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5657 ++input_line_pointer
;
5662 S_SET_SEGMENT (sym
, now_seg
);
5663 symbol_set_frag (sym
, frag_now
);
5664 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5665 symbol_get_tc (sym
)->symbol_class
= XMC_TC
;
5666 symbol_get_tc (sym
)->output
= 1;
5668 ppc_frob_label (sym
);
5671 #endif /* OBJ_XCOFF */
5675 /* Skip the TOC symbol name. */
5676 while (is_part_of_name (*input_line_pointer
)
5677 || *input_line_pointer
== ' '
5678 || *input_line_pointer
== '['
5679 || *input_line_pointer
== ']'
5680 || *input_line_pointer
== '{'
5681 || *input_line_pointer
== '}')
5682 ++input_line_pointer
;
5684 /* Align to a four/eight byte boundary. */
5685 align
= ppc_obj64
? 3 : 2;
5686 frag_align (align
, 0, 0);
5687 record_alignment (now_seg
, align
);
5688 #endif /* OBJ_ELF */
5690 if (*input_line_pointer
!= ',')
5691 demand_empty_rest_of_line ();
5694 ++input_line_pointer
;
5695 cons (ppc_obj64
? 8 : 4);
5699 /* Pseudo-op .machine. */
5702 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5706 #define MAX_HISTORY 100
5707 static ppc_cpu_t
*cpu_history
;
5708 static int curr_hist
;
5712 c
= get_symbol_name (&cpu_string
);
5713 cpu_string
= xstrdup (cpu_string
);
5714 (void) restore_line_pointer (c
);
5716 if (cpu_string
!= NULL
)
5718 ppc_cpu_t old_cpu
= ppc_cpu
;
5722 for (p
= cpu_string
; *p
!= 0; p
++)
5725 if (strcmp (cpu_string
, "push") == 0)
5727 if (cpu_history
== NULL
)
5728 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5730 if (curr_hist
>= MAX_HISTORY
)
5731 as_bad (_(".machine stack overflow"));
5733 cpu_history
[curr_hist
++] = ppc_cpu
;
5735 else if (strcmp (cpu_string
, "pop") == 0)
5738 as_bad (_(".machine stack underflow"));
5740 ppc_cpu
= cpu_history
[--curr_hist
];
5742 else if ((new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, cpu_string
)) != 0)
5745 as_bad (_("invalid machine `%s'"), cpu_string
);
5747 if (ppc_cpu
!= old_cpu
)
5748 ppc_setup_opcodes ();
5751 demand_empty_rest_of_line ();
5753 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5757 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
5759 /* Set the current section. */
5761 ppc_set_current_section (segT
new)
5763 ppc_previous_section
= ppc_current_section
;
5764 ppc_current_section
= new;
5767 /* pseudo-op: .previous
5768 behaviour: toggles the current section with the previous section.
5770 warnings: "No previous section" */
5773 ppc_previous (int ignore ATTRIBUTE_UNUSED
)
5775 if (ppc_previous_section
== NULL
)
5777 as_warn (_("no previous section to return to, ignored."));
5781 subseg_set (ppc_previous_section
, 0);
5783 ppc_set_current_section (ppc_previous_section
);
5786 /* pseudo-op: .pdata
5787 behaviour: predefined read only data section
5791 initial: .section .pdata "adr3"
5792 a - don't know -- maybe a misprint
5793 d - initialized data
5795 3 - double word aligned (that would be 4 byte boundary)
5798 Tag index tables (also known as the function table) for exception
5799 handling, debugging, etc. */
5802 ppc_pdata (int ignore ATTRIBUTE_UNUSED
)
5804 if (pdata_section
== 0)
5806 pdata_section
= subseg_new (".pdata", 0);
5808 bfd_set_section_flags (pdata_section
, (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5809 | SEC_READONLY
| SEC_DATA
));
5811 bfd_set_section_alignment (pdata_section
, 2);
5815 pdata_section
= subseg_new (".pdata", 0);
5817 ppc_set_current_section (pdata_section
);
5820 /* pseudo-op: .ydata
5821 behaviour: predefined read only data section
5825 initial: .section .ydata "drw3"
5826 a - don't know -- maybe a misprint
5827 d - initialized data
5829 3 - double word aligned (that would be 4 byte boundary)
5831 Tag tables (also known as the scope table) for exception handling,
5835 ppc_ydata (int ignore ATTRIBUTE_UNUSED
)
5837 if (ydata_section
== 0)
5839 ydata_section
= subseg_new (".ydata", 0);
5840 bfd_set_section_flags (ydata_section
, (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5841 | SEC_READONLY
| SEC_DATA
));
5843 bfd_set_section_alignment (ydata_section
, 3);
5847 ydata_section
= subseg_new (".ydata", 0);
5849 ppc_set_current_section (ydata_section
);
5852 /* pseudo-op: .reldata
5853 behaviour: predefined read write data section
5854 double word aligned (4-byte)
5855 FIXME: relocation is applied to it
5856 FIXME: what's the difference between this and .data?
5859 initial: .section .reldata "drw3"
5860 d - initialized data
5863 3 - double word aligned (that would be 8 byte boundary)
5866 Like .data, but intended to hold data subject to relocation, such as
5867 function descriptors, etc. */
5870 ppc_reldata (int ignore ATTRIBUTE_UNUSED
)
5872 if (reldata_section
== 0)
5874 reldata_section
= subseg_new (".reldata", 0);
5876 bfd_set_section_flags (reldata_section
, (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5879 bfd_set_section_alignment (reldata_section
, 2);
5883 reldata_section
= subseg_new (".reldata", 0);
5885 ppc_set_current_section (reldata_section
);
5888 /* pseudo-op: .rdata
5889 behaviour: predefined read only data section
5893 initial: .section .rdata "dr3"
5894 d - initialized data
5896 3 - double word aligned (that would be 4 byte boundary) */
5899 ppc_rdata (int ignore ATTRIBUTE_UNUSED
)
5901 if (rdata_section
== 0)
5903 rdata_section
= subseg_new (".rdata", 0);
5904 bfd_set_section_flags (rdata_section
, (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5905 | SEC_READONLY
| SEC_DATA
));
5907 bfd_set_section_alignment (rdata_section
, 2);
5911 rdata_section
= subseg_new (".rdata", 0);
5913 ppc_set_current_section (rdata_section
);
5916 /* pseudo-op: .ualong
5917 behaviour: much like .int, with the exception that no alignment is
5919 FIXME: test the alignment statement
5924 ppc_ualong (int ignore ATTRIBUTE_UNUSED
)
5930 /* pseudo-op: .znop <symbol name>
5931 behaviour: Issue a nop instruction
5932 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5933 the supplied symbol name.
5935 warnings: Missing symbol name */
5938 ppc_znop (int ignore ATTRIBUTE_UNUSED
)
5941 const struct powerpc_opcode
*opcode
;
5948 /* Strip out the symbol name. */
5949 c
= get_symbol_name (&symbol_name
);
5951 name
= xstrdup (symbol_name
);
5953 sym
= symbol_find_or_make (name
);
5955 *input_line_pointer
= c
;
5957 SKIP_WHITESPACE_AFTER_NAME ();
5959 /* Look up the opcode in the hash table. */
5960 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, "nop");
5962 /* Stick in the nop. */
5963 insn
= opcode
->opcode
;
5965 /* Write out the instruction. */
5967 md_number_to_chars (f
, insn
, 4);
5969 f
- frag_now
->fr_literal
,
5974 BFD_RELOC_16_GOT_PCREL
);
5984 ppc_pe_comm (int lcomm
)
5993 c
= get_symbol_name (&name
);
5995 /* just after name is now '\0'. */
5996 p
= input_line_pointer
;
5998 SKIP_WHITESPACE_AFTER_NAME ();
5999 if (*input_line_pointer
!= ',')
6001 as_bad (_("expected comma after symbol-name: rest of line ignored."));
6002 ignore_rest_of_line ();
6006 input_line_pointer
++; /* skip ',' */
6007 if ((temp
= get_absolute_expression ()) < 0)
6009 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp
);
6010 ignore_rest_of_line ();
6016 /* The third argument to .comm is the alignment. */
6017 if (*input_line_pointer
!= ',')
6021 ++input_line_pointer
;
6022 align
= get_absolute_expression ();
6025 as_warn (_("ignoring bad alignment"));
6032 symbolP
= symbol_find_or_make (name
);
6035 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
6037 as_bad (_("ignoring attempt to re-define symbol `%s'."),
6038 S_GET_NAME (symbolP
));
6039 ignore_rest_of_line ();
6043 if (S_GET_VALUE (symbolP
))
6045 if (S_GET_VALUE (symbolP
) != (valueT
) temp
)
6046 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
6047 S_GET_NAME (symbolP
),
6048 (long) S_GET_VALUE (symbolP
),
6053 S_SET_VALUE (symbolP
, (valueT
) temp
);
6054 S_SET_EXTERNAL (symbolP
);
6055 S_SET_SEGMENT (symbolP
, bfd_com_section_ptr
);
6058 demand_empty_rest_of_line ();
6062 * implement the .section pseudo op:
6063 * .section name {, "flags"}
6065 * | +--- optional flags: 'b' for bss
6067 * +-- section name 'l' for lib
6071 * 'd' (apparently m88k for data)
6073 * But if the argument is not a quoted string, treat it as a
6074 * subsegment number.
6076 * FIXME: this is a copy of the section processing from obj-coff.c, with
6077 * additions/changes for the moto-pas assembler support. There are three
6080 * FIXME: I just noticed this. This doesn't work at all really. It it
6081 * setting bits that bfd probably neither understands or uses. The
6082 * correct approach (?) will have to incorporate extra fields attached
6083 * to the section to hold the system specific stuff. (krk)
6086 * 'a' - unknown - referred to in documentation, but no definition supplied
6087 * 'c' - section has code
6088 * 'd' - section has initialized data
6089 * 'u' - section has uninitialized data
6090 * 'i' - section contains directives (info)
6091 * 'n' - section can be discarded
6092 * 'R' - remove section at link time
6094 * Section Protection:
6095 * 'r' - section is readable
6096 * 'w' - section is writable
6097 * 'x' - section is executable
6098 * 's' - section is sharable
6100 * Section Alignment:
6101 * '0' - align to byte boundary
6102 * '1' - align to halfword boundary
6103 * '2' - align to word boundary
6104 * '3' - align to doubleword boundary
6105 * '4' - align to quadword boundary
6106 * '5' - align to 32 byte boundary
6107 * '6' - align to 64 byte boundary
6112 ppc_pe_section (int ignore ATTRIBUTE_UNUSED
)
6114 /* Strip out the section name. */
6123 c
= get_symbol_name (§ion_name
);
6125 name
= xstrdup (section_name
);
6127 *input_line_pointer
= c
;
6129 SKIP_WHITESPACE_AFTER_NAME ();
6132 flags
= SEC_NO_FLAGS
;
6134 if (strcmp (name
, ".idata$2") == 0)
6138 else if (strcmp (name
, ".idata$3") == 0)
6142 else if (strcmp (name
, ".idata$4") == 0)
6146 else if (strcmp (name
, ".idata$5") == 0)
6150 else if (strcmp (name
, ".idata$6") == 0)
6155 /* Default alignment to 16 byte boundary. */
6158 if (*input_line_pointer
== ',')
6160 ++input_line_pointer
;
6162 if (*input_line_pointer
!= '"')
6163 exp
= get_absolute_expression ();
6166 ++input_line_pointer
;
6167 while (*input_line_pointer
!= '"'
6168 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
6170 switch (*input_line_pointer
)
6172 /* Section Contents */
6173 case 'a': /* unknown */
6174 as_bad (_("unsupported section attribute -- 'a'"));
6176 case 'c': /* code section */
6179 case 'd': /* section has initialized data */
6182 case 'u': /* section has uninitialized data */
6183 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
6187 case 'i': /* section contains directives (info) */
6188 /* FIXME: This is IMAGE_SCN_LNK_INFO
6190 flags
|= SEC_HAS_CONTENTS
;
6192 case 'n': /* section can be discarded */
6195 case 'R': /* Remove section at link time */
6196 flags
|= SEC_NEVER_LOAD
;
6198 #if IFLICT_BRAIN_DAMAGE
6199 /* Section Protection */
6200 case 'r': /* section is readable */
6201 flags
|= IMAGE_SCN_MEM_READ
;
6203 case 'w': /* section is writable */
6204 flags
|= IMAGE_SCN_MEM_WRITE
;
6206 case 'x': /* section is executable */
6207 flags
|= IMAGE_SCN_MEM_EXECUTE
;
6209 case 's': /* section is sharable */
6210 flags
|= IMAGE_SCN_MEM_SHARED
;
6213 /* Section Alignment */
6214 case '0': /* align to byte boundary */
6215 flags
|= IMAGE_SCN_ALIGN_1BYTES
;
6218 case '1': /* align to halfword boundary */
6219 flags
|= IMAGE_SCN_ALIGN_2BYTES
;
6222 case '2': /* align to word boundary */
6223 flags
|= IMAGE_SCN_ALIGN_4BYTES
;
6226 case '3': /* align to doubleword boundary */
6227 flags
|= IMAGE_SCN_ALIGN_8BYTES
;
6230 case '4': /* align to quadword boundary */
6231 flags
|= IMAGE_SCN_ALIGN_16BYTES
;
6234 case '5': /* align to 32 byte boundary */
6235 flags
|= IMAGE_SCN_ALIGN_32BYTES
;
6238 case '6': /* align to 64 byte boundary */
6239 flags
|= IMAGE_SCN_ALIGN_64BYTES
;
6244 as_bad (_("unknown section attribute '%c'"),
6245 *input_line_pointer
);
6248 ++input_line_pointer
;
6250 if (*input_line_pointer
== '"')
6251 ++input_line_pointer
;
6255 sec
= subseg_new (name
, (subsegT
) exp
);
6257 ppc_set_current_section (sec
);
6259 if (flags
!= SEC_NO_FLAGS
)
6261 if (!bfd_set_section_flags (sec
, flags
))
6262 as_bad (_("error setting flags for \"%s\": %s"),
6263 bfd_section_name (sec
),
6264 bfd_errmsg (bfd_get_error ()));
6267 bfd_set_section_alignment (sec
, align
);
6271 ppc_pe_function (int ignore ATTRIBUTE_UNUSED
)
6277 endc
= get_symbol_name (&name
);
6279 ext_sym
= symbol_find_or_make (name
);
6281 (void) restore_line_pointer (endc
);
6283 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
6284 SF_SET_FUNCTION (ext_sym
);
6285 SF_SET_PROCESS (ext_sym
);
6286 coff_add_linesym (ext_sym
);
6288 demand_empty_rest_of_line ();
6292 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED
)
6294 if (tocdata_section
== 0)
6296 tocdata_section
= subseg_new (".tocd", 0);
6297 /* FIXME: section flags won't work. */
6298 bfd_set_section_flags (tocdata_section
, (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
6299 | SEC_READONLY
| SEC_DATA
));
6301 bfd_set_section_alignment (tocdata_section
, 2);
6305 rdata_section
= subseg_new (".tocd", 0);
6308 ppc_set_current_section (tocdata_section
);
6310 demand_empty_rest_of_line ();
6313 /* Don't adjust TOC relocs to use the section symbol. */
6316 ppc_pe_fix_adjustable (fixS
*fix
)
6318 return fix
->fx_r_type
!= BFD_RELOC_PPC_TOC16
;
6325 /* XCOFF specific symbol and file handling. */
6327 /* Canonicalize the symbol name. We use the to force the suffix, if
6328 any, to use square brackets, and to be in upper case. */
6331 ppc_canonicalize_symbol_name (char *name
)
6335 if (ppc_stab_symbol
)
6338 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
6352 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
6355 if (*s
== '\0' || s
[1] != '\0')
6356 as_bad (_("bad symbol suffix"));
6364 /* Set the class of a symbol based on the suffix, if any. This is
6365 called whenever a new symbol is created. */
6368 ppc_symbol_new_hook (symbolS
*sym
)
6370 struct ppc_tc_sy
*tc
;
6373 tc
= symbol_get_tc (sym
);
6376 tc
->symbol_class
= -1;
6377 tc
->real_name
= NULL
;
6384 if (ppc_stab_symbol
)
6387 s
= strchr (S_GET_NAME (sym
), '[');
6388 if (s
== (const char *) NULL
)
6390 /* There is no suffix. */
6399 if (strcmp (s
, "BS]") == 0)
6400 tc
->symbol_class
= XMC_BS
;
6403 if (strcmp (s
, "DB]") == 0)
6404 tc
->symbol_class
= XMC_DB
;
6405 else if (strcmp (s
, "DS]") == 0)
6406 tc
->symbol_class
= XMC_DS
;
6409 if (strcmp (s
, "GL]") == 0)
6410 tc
->symbol_class
= XMC_GL
;
6413 if (strcmp (s
, "PR]") == 0)
6414 tc
->symbol_class
= XMC_PR
;
6417 if (strcmp (s
, "RO]") == 0)
6418 tc
->symbol_class
= XMC_RO
;
6419 else if (strcmp (s
, "RW]") == 0)
6420 tc
->symbol_class
= XMC_RW
;
6423 if (strcmp (s
, "SV]") == 0)
6424 tc
->symbol_class
= XMC_SV
;
6427 if (strcmp (s
, "TC]") == 0)
6428 tc
->symbol_class
= XMC_TC
;
6429 else if (strcmp (s
, "TI]") == 0)
6430 tc
->symbol_class
= XMC_TI
;
6431 else if (strcmp (s
, "TB]") == 0)
6432 tc
->symbol_class
= XMC_TB
;
6433 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
6434 tc
->symbol_class
= XMC_TC0
;
6437 if (strcmp (s
, "UA]") == 0)
6438 tc
->symbol_class
= XMC_UA
;
6439 else if (strcmp (s
, "UC]") == 0)
6440 tc
->symbol_class
= XMC_UC
;
6443 if (strcmp (s
, "XO]") == 0)
6444 tc
->symbol_class
= XMC_XO
;
6448 if (tc
->symbol_class
== -1)
6449 as_bad (_("unrecognized symbol suffix"));
6452 /* This variable is set by ppc_frob_symbol if any absolute symbols are
6453 seen. It tells ppc_adjust_symtab whether it needs to look through
6456 static bfd_boolean ppc_saw_abs
;
6458 /* Change the name of a symbol just before writing it out. Set the
6459 real name if the .rename pseudo-op was used. Otherwise, remove any
6460 class suffix. Return 1 if the symbol should not be included in the
6464 ppc_frob_symbol (symbolS
*sym
)
6466 static symbolS
*ppc_last_function
;
6467 static symbolS
*set_end
;
6469 /* Discard symbols that should not be included in the output symbol
6471 if (! symbol_used_in_reloc_p (sym
)
6472 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
6473 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6474 && ! symbol_get_tc (sym
)->output
6475 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
6478 /* This one will disappear anyway. Don't make a csect sym for it. */
6479 if (sym
== abs_section_sym
)
6482 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
6483 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
6489 name
= S_GET_NAME (sym
);
6490 s
= strchr (name
, '[');
6491 if (s
!= (char *) NULL
)
6497 snew
= xstrndup (name
, len
);
6499 S_SET_NAME (sym
, snew
);
6503 if (set_end
!= (symbolS
*) NULL
)
6505 SA_SET_SYM_ENDNDX (set_end
, sym
);
6509 if (SF_GET_FUNCTION (sym
))
6511 if (ppc_last_function
!= (symbolS
*) NULL
)
6512 as_bad (_("two .function pseudo-ops with no intervening .ef"));
6513 ppc_last_function
= sym
;
6514 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
6516 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
6517 SA_SET_SYM_FSIZE (sym
,
6518 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
6521 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
6522 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
6524 if (ppc_last_function
== (symbolS
*) NULL
)
6525 as_bad (_(".ef with no preceding .function"));
6528 set_end
= ppc_last_function
;
6529 ppc_last_function
= NULL
;
6531 /* We don't have a C_EFCN symbol, but we need to force the
6532 COFF backend to believe that it has seen one. */
6533 coff_last_function
= NULL
;
6537 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6538 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
6539 && S_GET_STORAGE_CLASS (sym
) != C_FILE
6540 && S_GET_STORAGE_CLASS (sym
) != C_FCN
6541 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
6542 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
6543 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
6544 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
6545 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
6546 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
6547 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
6549 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
6550 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
6551 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
6554 union internal_auxent
*a
;
6556 /* Create a csect aux. */
6557 i
= S_GET_NUMBER_AUXILIARY (sym
);
6558 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
6559 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
6560 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
6562 /* This is the TOC table. */
6563 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
6564 a
->x_csect
.x_scnlen
.l
= 0;
6565 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6567 else if (symbol_get_tc (sym
)->subseg
!= 0)
6569 /* This is a csect symbol. x_scnlen is the size of the
6571 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
6572 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (S_GET_SEGMENT (sym
))
6573 - S_GET_VALUE (sym
));
6576 resolve_symbol_value (symbol_get_tc (sym
)->next
);
6577 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
6578 - S_GET_VALUE (sym
));
6580 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
6582 else if (S_GET_SEGMENT (sym
) == bss_section
)
6584 /* This is a common symbol. */
6585 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
6586 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6587 if (S_IS_EXTERNAL (sym
))
6588 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
6590 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
6592 else if (S_GET_SEGMENT (sym
) == absolute_section
)
6594 /* This is an absolute symbol. The csect will be created by
6595 ppc_adjust_symtab. */
6597 a
->x_csect
.x_smtyp
= XTY_LD
;
6598 if (symbol_get_tc (sym
)->symbol_class
== -1)
6599 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
6601 else if (! S_IS_DEFINED (sym
))
6603 /* This is an external symbol. */
6604 a
->x_csect
.x_scnlen
.l
= 0;
6605 a
->x_csect
.x_smtyp
= XTY_ER
;
6607 else if (symbol_get_tc (sym
)->symbol_class
== XMC_TC
)
6611 /* This is a TOC definition. x_scnlen is the size of the
6613 next
= symbol_next (sym
);
6614 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
6615 next
= symbol_next (next
);
6616 if (next
== (symbolS
*) NULL
6617 || symbol_get_tc (next
)->symbol_class
!= XMC_TC
)
6619 if (ppc_after_toc_frag
== (fragS
*) NULL
)
6620 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (data_section
)
6621 - S_GET_VALUE (sym
));
6623 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
6624 - S_GET_VALUE (sym
));
6628 resolve_symbol_value (next
);
6629 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
6630 - S_GET_VALUE (sym
));
6632 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6638 /* This is a normal symbol definition. x_scnlen is the
6639 symbol index of the containing csect. */
6640 if (S_GET_SEGMENT (sym
) == text_section
)
6641 csect
= ppc_text_csects
;
6642 else if (S_GET_SEGMENT (sym
) == data_section
)
6643 csect
= ppc_data_csects
;
6647 /* Skip the initial dummy symbol. */
6648 csect
= symbol_get_tc (csect
)->next
;
6650 if (csect
== (symbolS
*) NULL
)
6652 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
6653 a
->x_csect
.x_scnlen
.l
= 0;
6657 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
6659 resolve_symbol_value (symbol_get_tc (csect
)->next
);
6660 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
6661 > S_GET_VALUE (sym
))
6663 csect
= symbol_get_tc (csect
)->next
;
6666 a
->x_csect
.x_scnlen
.p
=
6667 coffsymbol (symbol_get_bfdsym (csect
))->native
;
6668 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
6671 a
->x_csect
.x_smtyp
= XTY_LD
;
6674 a
->x_csect
.x_parmhash
= 0;
6675 a
->x_csect
.x_snhash
= 0;
6676 if (symbol_get_tc (sym
)->symbol_class
== -1)
6677 a
->x_csect
.x_smclas
= XMC_PR
;
6679 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
6680 a
->x_csect
.x_stab
= 0;
6681 a
->x_csect
.x_snstab
= 0;
6683 /* Don't let the COFF backend resort these symbols. */
6684 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
6686 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
6688 /* We want the value to be the symbol index of the referenced
6689 csect symbol. BFD will do that for us if we set the right
6691 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
6692 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
6694 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
6695 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
6697 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
6702 block
= symbol_get_tc (sym
)->within
;
6705 /* The value is the offset from the enclosing csect. */
6708 csect
= symbol_get_tc (block
)->within
;
6709 resolve_symbol_value (csect
);
6710 base
= S_GET_VALUE (csect
);
6715 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
6717 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
6718 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
6720 /* We want the value to be a file offset into the line numbers.
6721 BFD will do that for us if we set the right flags. We have
6722 already set the value correctly. */
6723 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
6729 /* Adjust the symbol table. This creates csect symbols for all
6730 absolute symbols. */
6733 ppc_adjust_symtab (void)
6740 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
6744 union internal_auxent
*a
;
6746 if (S_GET_SEGMENT (sym
) != absolute_section
)
6749 csect
= symbol_create (".abs[XO]", absolute_section
,
6750 S_GET_VALUE (sym
), &zero_address_frag
);
6751 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
6752 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
6753 i
= S_GET_NUMBER_AUXILIARY (csect
);
6754 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
6755 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
6756 a
->x_csect
.x_scnlen
.l
= 0;
6757 a
->x_csect
.x_smtyp
= XTY_SD
;
6758 a
->x_csect
.x_parmhash
= 0;
6759 a
->x_csect
.x_snhash
= 0;
6760 a
->x_csect
.x_smclas
= XMC_XO
;
6761 a
->x_csect
.x_stab
= 0;
6762 a
->x_csect
.x_snstab
= 0;
6764 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
6766 i
= S_GET_NUMBER_AUXILIARY (sym
);
6767 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
6768 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
6769 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
6772 ppc_saw_abs
= FALSE
;
6775 /* Set the VMA for a section. This is called on all the sections in
6779 ppc_frob_section (asection
*sec
)
6781 static bfd_vma vma
= 0;
6783 /* Dwarf sections start at 0. */
6784 if (bfd_section_flags (sec
) & SEC_DEBUGGING
)
6787 vma
= md_section_align (sec
, vma
);
6788 bfd_set_section_vma (sec
, vma
);
6789 vma
+= bfd_section_size (sec
);
6792 #endif /* OBJ_XCOFF */
6795 md_atof (int type
, char *litp
, int *sizep
)
6797 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6800 /* Write a value out to the object file, using the appropriate
6804 md_number_to_chars (char *buf
, valueT val
, int n
)
6806 if (target_big_endian
)
6807 number_to_chars_bigendian (buf
, val
, n
);
6809 number_to_chars_littleendian (buf
, val
, n
);
6812 /* Align a section (I don't know why this is machine dependent). */
6815 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6820 int align
= bfd_section_alignment (seg
);
6822 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6826 /* We don't have any form of relaxing. */
6829 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6830 asection
*seg ATTRIBUTE_UNUSED
)
6836 /* Convert a machine dependent frag. We never generate these. */
6839 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6840 asection
*sec ATTRIBUTE_UNUSED
,
6841 fragS
*fragp ATTRIBUTE_UNUSED
)
6846 /* We have no need to default values of symbols. */
6849 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6854 /* Functions concerning relocs. */
6856 /* The location from which a PC relative jump should be calculated,
6857 given a PC relative reloc. */
6860 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6862 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6867 /* This is called to see whether a fixup should be adjusted to use a
6868 section symbol. We take the opportunity to change a fixup against
6869 a symbol in the TOC subsegment into a reloc against the
6870 corresponding .tc symbol. */
6873 ppc_fix_adjustable (fixS
*fix
)
6875 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6876 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6877 TC_SYMFIELD_TYPE
*tc
;
6879 if (symseg
== absolute_section
)
6882 /* Always adjust symbols in debugging sections. */
6883 if (bfd_section_flags (symseg
) & SEC_DEBUGGING
)
6886 if (ppc_toc_csect
!= (symbolS
*) NULL
6887 && fix
->fx_addsy
!= ppc_toc_csect
6888 && symseg
== data_section
6889 && val
>= ppc_toc_frag
->fr_address
6890 && (ppc_after_toc_frag
== (fragS
*) NULL
6891 || val
< ppc_after_toc_frag
->fr_address
))
6895 for (sy
= symbol_next (ppc_toc_csect
);
6896 sy
!= (symbolS
*) NULL
;
6897 sy
= symbol_next (sy
))
6899 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6901 if (sy_tc
->symbol_class
== XMC_TC0
)
6903 if (sy_tc
->symbol_class
!= XMC_TC
)
6905 if (val
== resolve_symbol_value (sy
))
6908 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6913 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6914 _("symbol in .toc does not match any .tc"));
6917 /* Possibly adjust the reloc to be against the csect. */
6918 tc
= symbol_get_tc (fix
->fx_addsy
);
6920 && tc
->symbol_class
!= XMC_TC0
6921 && tc
->symbol_class
!= XMC_TC
6922 && symseg
!= bss_section
6923 /* Don't adjust if this is a reloc in the toc section. */
6924 && (symseg
!= data_section
6925 || ppc_toc_csect
== NULL
6926 || val
< ppc_toc_frag
->fr_address
6927 || (ppc_after_toc_frag
!= NULL
6928 && val
>= ppc_after_toc_frag
->fr_address
)))
6930 symbolS
*csect
= tc
->within
;
6932 /* If the symbol was not declared by a label (eg: a section symbol),
6933 use the section instead of the csect. This doesn't happen in
6934 normal AIX assembly code. */
6936 csect
= seg_info (symseg
)->sym
;
6938 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6939 fix
->fx_addsy
= csect
;
6944 /* Adjust a reloc against a .lcomm symbol to be against the base
6946 if (symseg
== bss_section
6947 && ! S_IS_EXTERNAL (fix
->fx_addsy
))
6949 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6951 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6958 /* A reloc from one csect to another must be kept. The assembler
6959 will, of course, keep relocs between sections, and it will keep
6960 absolute relocs, but we need to force it to keep PC relative relocs
6961 between two csects in the same section. */
6964 ppc_force_relocation (fixS
*fix
)
6966 /* At this point fix->fx_addsy should already have been converted to
6967 a csect symbol. If the csect does not include the fragment, then
6968 we need to force the relocation. */
6970 && fix
->fx_addsy
!= NULL
6971 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6972 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6973 > fix
->fx_frag
->fr_address
)
6974 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6975 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6976 <= fix
->fx_frag
->fr_address
))))
6979 return generic_force_reloc (fix
);
6981 #endif /* OBJ_XCOFF */
6984 /* If this function returns non-zero, it guarantees that a relocation
6985 will be emitted for a fixup. */
6988 ppc_force_relocation (fixS
*fix
)
6990 /* Branch prediction relocations must force a relocation, as must
6991 the vtable description relocs. */
6992 switch (fix
->fx_r_type
)
6994 case BFD_RELOC_PPC_B16_BRTAKEN
:
6995 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6996 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6997 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6998 case BFD_RELOC_24_PLT_PCREL
:
6999 case BFD_RELOC_PPC64_TOC
:
7001 case BFD_RELOC_PPC_B26
:
7002 case BFD_RELOC_PPC_BA26
:
7003 case BFD_RELOC_PPC_B16
:
7004 case BFD_RELOC_PPC_BA16
:
7005 case BFD_RELOC_PPC64_REL24_NOTOC
:
7006 /* All branch fixups targeting a localentry symbol must
7007 force a relocation. */
7010 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
7011 elf_symbol_type
*elfsym
7012 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
7013 gas_assert (elfsym
);
7014 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
7022 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
7023 && fix
->fx_r_type
<= BFD_RELOC_PPC64_TLS_PCREL
)
7026 return generic_force_reloc (fix
);
7030 ppc_fix_adjustable (fixS
*fix
)
7032 switch (fix
->fx_r_type
)
7034 /* All branch fixups targeting a localentry symbol must
7035 continue using the symbol. */
7036 case BFD_RELOC_PPC_B26
:
7037 case BFD_RELOC_PPC_BA26
:
7038 case BFD_RELOC_PPC_B16
:
7039 case BFD_RELOC_PPC_BA16
:
7040 case BFD_RELOC_PPC_B16_BRTAKEN
:
7041 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7042 case BFD_RELOC_PPC_BA16_BRTAKEN
:
7043 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
7044 case BFD_RELOC_PPC64_REL24_NOTOC
:
7047 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
7048 elf_symbol_type
*elfsym
7049 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
7050 gas_assert (elfsym
);
7051 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
7059 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
7060 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
7061 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
7062 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
7063 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
7064 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
7065 && fix
->fx_r_type
!= BFD_RELOC_16_GOT_PCREL
7066 && fix
->fx_r_type
!= BFD_RELOC_32_GOTOFF
7067 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT_PCREL34
7068 && fix
->fx_r_type
!= BFD_RELOC_24_PLT_PCREL
7069 && fix
->fx_r_type
!= BFD_RELOC_32_PLTOFF
7070 && fix
->fx_r_type
!= BFD_RELOC_32_PLT_PCREL
7071 && fix
->fx_r_type
!= BFD_RELOC_LO16_PLTOFF
7072 && fix
->fx_r_type
!= BFD_RELOC_HI16_PLTOFF
7073 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_PLTOFF
7074 && fix
->fx_r_type
!= BFD_RELOC_64_PLTOFF
7075 && fix
->fx_r_type
!= BFD_RELOC_64_PLT_PCREL
7076 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT16_LO_DS
7077 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT_PCREL34
7078 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16
7079 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO
7080 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HI
7081 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HA
7082 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_DS
7083 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO_DS
7084 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
7085 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_LO16A
7086 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HI16A
7087 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HA16A
7088 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
7089 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
7090 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
7091 && fix
->fx_r_type
<= BFD_RELOC_PPC64_TLS_PCREL
));
7096 ppc_frag_check (struct frag
*fragP
)
7098 if ((fragP
->fr_address
& fragP
->insn_addr
) != 0)
7099 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
7100 _("instruction address is not a multiple of %d"),
7101 fragP
->insn_addr
+ 1);
7104 /* rs_align_code frag handling. */
7106 enum ppc_nop_encoding_for_rs_align_code
7115 ppc_nop_select (void)
7117 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
7119 if ((ppc_cpu
& (PPC_OPCODE_POWER9
| PPC_OPCODE_E500MC
)) == 0)
7121 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0)
7122 return PPC_NOP_GROUP_P7
;
7123 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0)
7124 return PPC_NOP_GROUP_P6
;
7126 return PPC_NOP_VANILLA
;
7130 ppc_handle_align (struct frag
*fragP
)
7132 valueT count
= (fragP
->fr_next
->fr_address
7133 - (fragP
->fr_address
+ fragP
->fr_fix
));
7134 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
7135 enum ppc_nop_encoding_for_rs_align_code nop_select
= *dest
& 0xff;
7137 /* Pad with zeros if not inserting a whole number of instructions.
7138 We could pad with zeros up to an instruction boundary then follow
7139 with nops but odd counts indicate data in an executable section
7140 so padding with zeros is most appropriate. */
7142 || (nop_select
== PPC_NOP_VLE
? (count
& 1) != 0 : (count
& 3) != 0))
7148 if (nop_select
== PPC_NOP_VLE
)
7152 md_number_to_chars (dest
, 0x4400, 2);
7158 if (count
> 4 * nop_limit
&& count
< 0x2000000)
7162 /* Make a branch, then follow with nops. Insert another
7163 frag to handle the nops. */
7164 md_number_to_chars (dest
, 0x48000000 + count
, 4);
7169 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
7170 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
7171 fragP
->fr_next
= rest
;
7173 rest
->fr_address
+= rest
->fr_fix
+ 4;
7175 /* If we leave the next frag as rs_align_code we'll come here
7176 again, resulting in a bunch of branches rather than a
7177 branch followed by nops. */
7178 rest
->fr_type
= rs_align
;
7179 dest
= rest
->fr_literal
;
7182 md_number_to_chars (dest
, 0x60000000, 4);
7184 if (nop_select
>= PPC_NOP_GROUP_P6
)
7186 /* For power6, power7, and power8, we want the last nop to
7187 be a group terminating one. Do this by inserting an
7188 rs_fill frag immediately after this one, with its address
7189 set to the last nop location. This will automatically
7190 reduce the number of nops in the current frag by one. */
7193 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
7195 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
7196 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
7197 group_nop
->fr_fix
= 0;
7198 group_nop
->fr_offset
= 1;
7199 group_nop
->fr_type
= rs_fill
;
7200 fragP
->fr_next
= group_nop
;
7201 dest
= group_nop
->fr_literal
;
7204 if (nop_select
== PPC_NOP_GROUP_P6
)
7205 /* power6 group terminating nop: "ori 1,1,0". */
7206 md_number_to_chars (dest
, 0x60210000, 4);
7208 /* power7/power8 group terminating nop: "ori 2,2,0". */
7209 md_number_to_chars (dest
, 0x60420000, 4);
7214 /* Apply a fixup to the object code. This is called for all the
7215 fixups we generated by the calls to fix_new_exp, above. */
7218 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
7220 valueT value
= * valP
;
7222 const struct powerpc_operand
*operand
;
7225 if (fixP
->fx_addsy
!= NULL
)
7227 /* Hack around bfd_install_relocation brain damage. */
7229 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
7231 if (fixP
->fx_addsy
== abs_section_sym
)
7237 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7238 the symbol values. If we are doing this relocation the code in
7239 write.c is going to call bfd_install_relocation, which is also
7240 going to use the symbol value. That means that if the reloc is
7241 fully resolved we want to use *valP since bfd_install_relocation is
7243 However, if the reloc is not fully resolved we do not want to
7244 use *valP, and must use fx_offset instead. If the relocation
7245 is PC-relative, we then need to re-apply md_pcrel_from_section
7246 to this new relocation value. */
7247 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
7252 value
= fixP
->fx_offset
;
7254 value
-= md_pcrel_from_section (fixP
, seg
);
7258 /* We are only able to convert some relocs to pc-relative. */
7261 switch (fixP
->fx_r_type
)
7264 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
7268 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
7272 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
7275 case BFD_RELOC_LO16
:
7276 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
7279 case BFD_RELOC_HI16
:
7280 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
7283 case BFD_RELOC_HI16_S
:
7284 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
7287 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7288 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGH
;
7291 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7292 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHA
;
7295 case BFD_RELOC_PPC64_HIGHER
:
7296 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER
;
7299 case BFD_RELOC_PPC64_HIGHER_S
:
7300 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA
;
7303 case BFD_RELOC_PPC64_HIGHEST
:
7304 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST
;
7307 case BFD_RELOC_PPC64_HIGHEST_S
:
7308 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA
;
7311 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
7312 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER34
;
7315 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
7316 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA34
;
7319 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
7320 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST34
;
7323 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
7324 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA34
;
7327 case BFD_RELOC_PPC_16DX_HA
:
7328 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7331 case BFD_RELOC_PPC64_D34
:
7332 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL34
;
7335 case BFD_RELOC_PPC64_D28
:
7336 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL28
;
7343 else if (!fixP
->fx_done
7344 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
7346 /* addpcis is relative to next insn address. */
7348 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7353 if (fixP
->fx_pcrel_adjust
!= 0)
7355 /* This is a fixup on an instruction. */
7356 int opindex
= fixP
->fx_pcrel_adjust
& 0xff;
7358 operand
= &powerpc_operands
[opindex
];
7360 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
7361 does not generate a reloc. It uses the offset of `sym' within its
7362 csect. Other usages, such as `.long sym', generate relocs. This
7363 is the documented behaviour of non-TOC symbols. */
7364 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
7365 && (operand
->bitm
& 0xfff0) == 0xfff0
7366 && operand
->shift
== 0
7367 && (operand
->insert
== NULL
|| ppc_obj64
)
7368 && fixP
->fx_addsy
!= NULL
7369 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
7370 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC
7371 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC0
7372 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
7374 value
= fixP
->fx_offset
;
7378 /* During parsing of instructions, a TOC16 reloc is generated for
7379 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
7380 in the toc. But at parse time, SYM may be not yet defined, so
7381 check again here. */
7382 if (fixP
->fx_r_type
== BFD_RELOC_16
7383 && fixP
->fx_addsy
!= NULL
7384 && ppc_is_toc_sym (fixP
->fx_addsy
))
7385 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
7389 /* Calculate value to be stored in field. */
7391 switch (fixP
->fx_r_type
)
7394 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
7395 case BFD_RELOC_PPC_VLE_LO16A
:
7396 case BFD_RELOC_PPC_VLE_LO16D
:
7398 case BFD_RELOC_LO16
:
7399 case BFD_RELOC_LO16_PCREL
:
7400 fieldval
= value
& 0xffff;
7402 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7403 fieldval
= SEX16 (fieldval
);
7404 fixP
->fx_no_overflow
= 1;
7407 case BFD_RELOC_HI16
:
7408 case BFD_RELOC_HI16_PCREL
:
7410 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7412 fieldval
= value
>> 16;
7413 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7415 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7416 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7422 case BFD_RELOC_PPC_VLE_HI16A
:
7423 case BFD_RELOC_PPC_VLE_HI16D
:
7424 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7426 fieldval
= PPC_HI (value
);
7427 goto sign_extend_16
;
7429 case BFD_RELOC_HI16_S
:
7430 case BFD_RELOC_HI16_S_PCREL
:
7431 case BFD_RELOC_PPC_16DX_HA
:
7432 case BFD_RELOC_PPC_REL16DX_HA
:
7434 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7436 fieldval
= (value
+ 0x8000) >> 16;
7437 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7439 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7440 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7446 case BFD_RELOC_PPC_VLE_HA16A
:
7447 case BFD_RELOC_PPC_VLE_HA16D
:
7448 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7450 fieldval
= PPC_HA (value
);
7451 goto sign_extend_16
;
7454 case BFD_RELOC_PPC64_HIGHER
:
7455 fieldval
= PPC_HIGHER (value
);
7456 goto sign_extend_16
;
7458 case BFD_RELOC_PPC64_HIGHER_S
:
7459 fieldval
= PPC_HIGHERA (value
);
7460 goto sign_extend_16
;
7462 case BFD_RELOC_PPC64_HIGHEST
:
7463 fieldval
= PPC_HIGHEST (value
);
7464 goto sign_extend_16
;
7466 case BFD_RELOC_PPC64_HIGHEST_S
:
7467 fieldval
= PPC_HIGHESTA (value
);
7468 goto sign_extend_16
;
7475 if (operand
!= NULL
)
7477 /* Handle relocs in an insn. */
7478 switch (fixP
->fx_r_type
)
7481 /* The following relocs can't be calculated by the assembler.
7482 Leave the field zero. */
7483 case BFD_RELOC_PPC_TPREL16
:
7484 case BFD_RELOC_PPC_TPREL16_LO
:
7485 case BFD_RELOC_PPC_TPREL16_HI
:
7486 case BFD_RELOC_PPC_TPREL16_HA
:
7487 case BFD_RELOC_PPC_DTPREL16
:
7488 case BFD_RELOC_PPC_DTPREL16_LO
:
7489 case BFD_RELOC_PPC_DTPREL16_HI
:
7490 case BFD_RELOC_PPC_DTPREL16_HA
:
7491 case BFD_RELOC_PPC_GOT_TLSGD16
:
7492 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7493 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7494 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7495 case BFD_RELOC_PPC_GOT_TLSLD16
:
7496 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7497 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7498 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7499 case BFD_RELOC_PPC_GOT_TPREL16
:
7500 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7501 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7502 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7503 case BFD_RELOC_PPC_GOT_DTPREL16
:
7504 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7505 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7506 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7507 case BFD_RELOC_PPC64_TPREL16_DS
:
7508 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
7509 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7510 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7511 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7512 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7513 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7514 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7515 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7516 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7517 case BFD_RELOC_PPC64_DTPREL16_DS
:
7518 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
7519 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7520 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7521 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7522 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7523 case BFD_RELOC_PPC64_TPREL34
:
7524 case BFD_RELOC_PPC64_DTPREL34
:
7525 case BFD_RELOC_PPC64_GOT_TLSGD34
:
7526 case BFD_RELOC_PPC64_GOT_TLSLD34
:
7527 case BFD_RELOC_PPC64_GOT_TPREL34
:
7528 case BFD_RELOC_PPC64_GOT_DTPREL34
:
7529 gas_assert (fixP
->fx_addsy
!= NULL
);
7530 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7534 /* These also should leave the field zero for the same
7535 reason. Note that older versions of gas wrote values
7536 here. If we want to go back to the old behaviour, then
7537 all _LO and _LO_DS cases will need to be treated like
7538 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
7539 case BFD_RELOC_16_GOTOFF
:
7540 case BFD_RELOC_LO16_GOTOFF
:
7541 case BFD_RELOC_HI16_GOTOFF
:
7542 case BFD_RELOC_HI16_S_GOTOFF
:
7543 case BFD_RELOC_LO16_PLTOFF
:
7544 case BFD_RELOC_HI16_PLTOFF
:
7545 case BFD_RELOC_HI16_S_PLTOFF
:
7546 case BFD_RELOC_GPREL16
:
7547 case BFD_RELOC_16_BASEREL
:
7548 case BFD_RELOC_LO16_BASEREL
:
7549 case BFD_RELOC_HI16_BASEREL
:
7550 case BFD_RELOC_HI16_S_BASEREL
:
7551 case BFD_RELOC_PPC_TOC16
:
7552 case BFD_RELOC_PPC64_TOC16_LO
:
7553 case BFD_RELOC_PPC64_TOC16_HI
:
7554 case BFD_RELOC_PPC64_TOC16_HA
:
7555 case BFD_RELOC_PPC64_PLTGOT16
:
7556 case BFD_RELOC_PPC64_PLTGOT16_LO
:
7557 case BFD_RELOC_PPC64_PLTGOT16_HI
:
7558 case BFD_RELOC_PPC64_PLTGOT16_HA
:
7559 case BFD_RELOC_PPC64_GOT16_DS
:
7560 case BFD_RELOC_PPC64_GOT16_LO_DS
:
7561 case BFD_RELOC_PPC64_PLT16_LO_DS
:
7562 case BFD_RELOC_PPC64_SECTOFF_DS
:
7563 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
7564 case BFD_RELOC_PPC64_TOC16_DS
:
7565 case BFD_RELOC_PPC64_TOC16_LO_DS
:
7566 case BFD_RELOC_PPC64_PLTGOT16_DS
:
7567 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
7568 case BFD_RELOC_PPC_EMB_NADDR16
:
7569 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7570 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7571 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7572 case BFD_RELOC_PPC_EMB_SDAI16
:
7573 case BFD_RELOC_PPC_EMB_SDA2I16
:
7574 case BFD_RELOC_PPC_EMB_SDA2REL
:
7575 case BFD_RELOC_PPC_EMB_SDA21
:
7576 case BFD_RELOC_PPC_EMB_MRKREF
:
7577 case BFD_RELOC_PPC_EMB_RELSEC16
:
7578 case BFD_RELOC_PPC_EMB_RELST_LO
:
7579 case BFD_RELOC_PPC_EMB_RELST_HI
:
7580 case BFD_RELOC_PPC_EMB_RELST_HA
:
7581 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7582 case BFD_RELOC_PPC_EMB_RELSDA
:
7583 case BFD_RELOC_PPC_VLE_SDA21
:
7584 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7585 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7586 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
7587 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7588 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
7589 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7590 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
7591 case BFD_RELOC_PPC64_GOT_PCREL34
:
7592 case BFD_RELOC_PPC64_PLT_PCREL34
:
7593 gas_assert (fixP
->fx_addsy
!= NULL
);
7596 case BFD_RELOC_PPC_TLS
:
7597 case BFD_RELOC_PPC_TLSGD
:
7598 case BFD_RELOC_PPC_TLSLD
:
7599 case BFD_RELOC_PPC64_TLS_PCREL
:
7605 case BFD_RELOC_PPC_B16
:
7606 /* Adjust the offset to the instruction boundary. */
7611 case BFD_RELOC_VTABLE_INHERIT
:
7612 case BFD_RELOC_VTABLE_ENTRY
:
7613 case BFD_RELOC_PPC_DTPMOD
:
7614 case BFD_RELOC_PPC_TPREL
:
7615 case BFD_RELOC_PPC_DTPREL
:
7616 case BFD_RELOC_PPC_COPY
:
7617 case BFD_RELOC_PPC_GLOB_DAT
:
7618 case BFD_RELOC_32_PLT_PCREL
:
7619 case BFD_RELOC_PPC_EMB_NADDR32
:
7620 case BFD_RELOC_PPC64_TOC
:
7621 case BFD_RELOC_CTOR
:
7623 case BFD_RELOC_32_PCREL
:
7626 case BFD_RELOC_64_PCREL
:
7627 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7628 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7629 _("%s unsupported as instruction fixup"),
7630 bfd_get_reloc_code_name (fixP
->fx_r_type
));
7639 /* powerpc uses RELA style relocs, so if emitting a reloc the field
7640 contents can stay at zero. */
7641 #define APPLY_RELOC fixP->fx_done
7643 #define APPLY_RELOC 1
7645 /* We need to call the insert function even when fieldval is
7646 zero if the insert function would translate that zero to a
7647 bit pattern other than all zeros. */
7648 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
7651 unsigned char *where
;
7653 /* Fetch the instruction, insert the fully resolved operand
7654 value, and stuff the instruction back again. */
7655 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
7656 if (target_big_endian
)
7658 if (fixP
->fx_size
< 4)
7659 insn
= bfd_getb16 (where
);
7662 insn
= bfd_getb32 (where
);
7663 if (fixP
->fx_size
> 4)
7664 insn
= insn
<< 32 | bfd_getb32 (where
+ 4);
7669 if (fixP
->fx_size
< 4)
7670 insn
= bfd_getl16 (where
);
7673 insn
= bfd_getl32 (where
);
7674 if (fixP
->fx_size
> 4)
7675 insn
= insn
<< 32 | bfd_getl32 (where
+ 4);
7678 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
7679 fixP
->tc_fix_data
.ppc_cpu
,
7680 fixP
->fx_file
, fixP
->fx_line
);
7681 if (target_big_endian
)
7683 if (fixP
->fx_size
< 4)
7684 bfd_putb16 (insn
, where
);
7687 if (fixP
->fx_size
> 4)
7689 bfd_putb32 (insn
, where
+ 4);
7692 bfd_putb32 (insn
, where
);
7697 if (fixP
->fx_size
< 4)
7698 bfd_putl16 (insn
, where
);
7701 if (fixP
->fx_size
> 4)
7703 bfd_putl32 (insn
, where
+ 4);
7706 bfd_putl32 (insn
, where
);
7712 /* Nothing else to do here. */
7715 gas_assert (fixP
->fx_addsy
!= NULL
);
7716 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
7721 /* Use expr_symbol_where to see if this is an expression
7723 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
7724 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7725 _("unresolved expression that must be resolved"));
7727 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7728 _("unsupported relocation against %s"),
7729 S_GET_NAME (fixP
->fx_addsy
));
7736 /* Handle relocs in data. */
7737 switch (fixP
->fx_r_type
)
7739 case BFD_RELOC_VTABLE_INHERIT
:
7741 && !S_IS_DEFINED (fixP
->fx_addsy
)
7742 && !S_IS_WEAK (fixP
->fx_addsy
))
7743 S_SET_WEAK (fixP
->fx_addsy
);
7746 case BFD_RELOC_VTABLE_ENTRY
:
7751 /* These can appear with @l etc. in data. */
7752 case BFD_RELOC_LO16
:
7753 case BFD_RELOC_LO16_PCREL
:
7754 case BFD_RELOC_HI16
:
7755 case BFD_RELOC_HI16_PCREL
:
7756 case BFD_RELOC_HI16_S
:
7757 case BFD_RELOC_HI16_S_PCREL
:
7758 case BFD_RELOC_PPC64_HIGHER
:
7759 case BFD_RELOC_PPC64_HIGHER_S
:
7760 case BFD_RELOC_PPC64_HIGHEST
:
7761 case BFD_RELOC_PPC64_HIGHEST_S
:
7762 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7763 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7764 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7767 case BFD_RELOC_PPC_DTPMOD
:
7768 case BFD_RELOC_PPC_TPREL
:
7769 case BFD_RELOC_PPC_DTPREL
:
7770 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7773 /* Just punt all of these to the linker. */
7774 case BFD_RELOC_PPC_B16_BRTAKEN
:
7775 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7776 case BFD_RELOC_16_GOTOFF
:
7777 case BFD_RELOC_LO16_GOTOFF
:
7778 case BFD_RELOC_HI16_GOTOFF
:
7779 case BFD_RELOC_HI16_S_GOTOFF
:
7780 case BFD_RELOC_LO16_PLTOFF
:
7781 case BFD_RELOC_HI16_PLTOFF
:
7782 case BFD_RELOC_HI16_S_PLTOFF
:
7783 case BFD_RELOC_PPC_COPY
:
7784 case BFD_RELOC_PPC_GLOB_DAT
:
7785 case BFD_RELOC_16_BASEREL
:
7786 case BFD_RELOC_LO16_BASEREL
:
7787 case BFD_RELOC_HI16_BASEREL
:
7788 case BFD_RELOC_HI16_S_BASEREL
:
7789 case BFD_RELOC_PPC_TLS
:
7790 case BFD_RELOC_PPC_DTPREL16_LO
:
7791 case BFD_RELOC_PPC_DTPREL16_HI
:
7792 case BFD_RELOC_PPC_DTPREL16_HA
:
7793 case BFD_RELOC_PPC_TPREL16_LO
:
7794 case BFD_RELOC_PPC_TPREL16_HI
:
7795 case BFD_RELOC_PPC_TPREL16_HA
:
7796 case BFD_RELOC_PPC_GOT_TLSGD16
:
7797 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7798 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7799 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7800 case BFD_RELOC_PPC_GOT_TLSLD16
:
7801 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7802 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7803 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7804 case BFD_RELOC_PPC_GOT_DTPREL16
:
7805 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7806 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7807 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7808 case BFD_RELOC_PPC_GOT_TPREL16
:
7809 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7810 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7811 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7812 case BFD_RELOC_24_PLT_PCREL
:
7813 case BFD_RELOC_PPC_LOCAL24PC
:
7814 case BFD_RELOC_32_PLT_PCREL
:
7815 case BFD_RELOC_GPREL16
:
7816 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7817 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7818 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7819 case BFD_RELOC_PPC_EMB_NADDR32
:
7820 case BFD_RELOC_PPC_EMB_NADDR16
:
7821 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7822 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7823 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7824 case BFD_RELOC_PPC_EMB_SDAI16
:
7825 case BFD_RELOC_PPC_EMB_SDA2REL
:
7826 case BFD_RELOC_PPC_EMB_SDA2I16
:
7827 case BFD_RELOC_PPC_EMB_SDA21
:
7828 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7829 case BFD_RELOC_PPC_EMB_MRKREF
:
7830 case BFD_RELOC_PPC_EMB_RELSEC16
:
7831 case BFD_RELOC_PPC_EMB_RELST_LO
:
7832 case BFD_RELOC_PPC_EMB_RELST_HI
:
7833 case BFD_RELOC_PPC_EMB_RELST_HA
:
7834 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7835 case BFD_RELOC_PPC_EMB_RELSDA
:
7836 case BFD_RELOC_PPC64_TOC
:
7837 case BFD_RELOC_PPC_TOC16
:
7838 case BFD_RELOC_PPC64_TOC16_LO
:
7839 case BFD_RELOC_PPC64_TOC16_HI
:
7840 case BFD_RELOC_PPC64_TOC16_HA
:
7841 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7842 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7843 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7844 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7845 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7846 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7847 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7848 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7849 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7850 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7851 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7852 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7853 case BFD_RELOC_PPC64_TLS_PCREL
:
7859 case BFD_RELOC_NONE
:
7861 case BFD_RELOC_CTOR
:
7863 case BFD_RELOC_32_PCREL
:
7866 case BFD_RELOC_64_PCREL
:
7868 case BFD_RELOC_16_PCREL
:
7874 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7879 if (fixP
->fx_size
&& APPLY_RELOC
)
7880 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7881 fieldval
, fixP
->fx_size
);
7883 && (seg
->flags
& SEC_CODE
) != 0
7884 && fixP
->fx_size
== 4
7887 && (fixP
->fx_r_type
== BFD_RELOC_32
7888 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7889 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7890 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7891 _("data in executable section"));
7895 ppc_elf_validate_fix (fixP
, seg
);
7896 fixP
->fx_addnumber
= value
;
7898 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7899 from the section contents. If we are going to be emitting a reloc
7900 then the section contents are immaterial, so don't warn if they
7901 happen to overflow. Leave such warnings to ld. */
7904 fixP
->fx_no_overflow
= 1;
7906 /* Arrange to emit .TOC. as a normal symbol if used in anything
7907 but .TOC.@tocbase. */
7909 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7910 && fixP
->fx_addsy
!= NULL
7911 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7912 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7915 if (fixP
->fx_r_type
!= BFD_RELOC_PPC_TOC16
)
7916 fixP
->fx_addnumber
= 0;
7920 fixP
->fx_addnumber
= 0;
7922 /* We want to use the offset within the toc, not the actual VMA
7924 fixP
->fx_addnumber
= (- bfd_section_vma (S_GET_SEGMENT (fixP
->fx_addsy
))
7925 - S_GET_VALUE (ppc_toc_csect
));
7926 /* Set *valP to avoid errors. */
7933 /* Generate a reloc for a fixup. */
7936 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7940 reloc
= XNEW (arelent
);
7942 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7943 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7944 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7945 /* BFD_RELOC_PPC64_TLS_PCREL generates R_PPC64_TLS with an odd r_offset. */
7946 if (fixp
->fx_r_type
== BFD_RELOC_PPC64_TLS_PCREL
)
7948 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7949 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7951 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7952 _("reloc %d not supported by object file format"),
7953 (int) fixp
->fx_r_type
);
7956 reloc
->addend
= fixp
->fx_addnumber
;
7962 ppc_cfi_frame_initial_instructions (void)
7964 cfi_add_CFA_def_cfa (1, 0);
7968 tc_ppc_regname_to_dw2regnum (char *regname
)
7970 unsigned int regnum
= -1;
7974 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7976 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7977 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7978 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7979 { "spe_acc", 111 }, { "spefscr", 112 }
7982 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7983 if (strcmp (regnames
[i
].name
, regname
) == 0)
7984 return regnames
[i
].dw2regnum
;
7986 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7988 p
= regname
+ 1 + (regname
[1] == '.');
7989 regnum
= strtoul (p
, &q
, 10);
7990 if (p
== q
|| *q
|| regnum
>= 32)
7992 if (regname
[0] == 'f')
7994 else if (regname
[0] == 'v')
7997 else if (regname
[0] == 'c' && regname
[1] == 'r')
7999 p
= regname
+ 2 + (regname
[2] == '.');
8000 if (p
[0] < '0' || p
[0] > '7' || p
[1])
8002 regnum
= p
[0] - '0' + 68;