1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2022 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
35 #include "coff/xcoff.h"
39 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
41 /* Tell the main code what the endianness is. */
42 extern int target_big_endian
;
44 /* Whether or not, we've set target_big_endian. */
45 static int set_target_endian
= 0;
47 /* Whether to use user friendly register names. */
48 #ifndef TARGET_REG_NAMES_P
49 #define TARGET_REG_NAMES_P false
52 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
55 /* #lo(value) denotes the least significant 16 bits of the indicated. */
56 #define PPC_LO(v) ((v) & 0xffff)
58 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
59 #define PPC_HI(v) (((v) >> 16) & 0xffff)
61 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
62 the indicated value, compensating for #lo() being treated as a
64 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
66 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
67 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
69 /* #highera(value) denotes bits 32 through 47 of the indicated value,
70 compensating for #lo() being treated as a signed number. */
71 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
73 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
74 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
76 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
77 compensating for #lo being treated as a signed number. */
78 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
80 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
82 /* For the time being on ppc64, don't report overflow on @h and @ha
83 applied to constants. */
84 #define REPORT_OVERFLOW_HI 0
86 static bool reg_names_p
= TARGET_REG_NAMES_P
;
88 static void ppc_byte (int);
90 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
91 static void ppc_tc (int);
92 static void ppc_machine (int);
96 static void ppc_comm (int);
97 static void ppc_bb (int);
98 static void ppc_bc (int);
99 static void ppc_bf (int);
100 static void ppc_biei (int);
101 static void ppc_bs (int);
102 static void ppc_eb (int);
103 static void ppc_ec (int);
104 static void ppc_ef (int);
105 static void ppc_es (int);
106 static void ppc_csect (int);
107 static void ppc_dwsect (int);
108 static void ppc_change_csect (symbolS
*, offsetT
);
109 static void ppc_file (int);
110 static void ppc_function (int);
111 static void ppc_extern (int);
112 static void ppc_globl (int);
113 static void ppc_lglobl (int);
114 static void ppc_ref (int);
115 static void ppc_section (int);
116 static void ppc_named_section (int);
117 static void ppc_stabx (int);
118 static void ppc_rename (int);
119 static void ppc_toc (int);
120 static void ppc_xcoff_cons (int);
121 static void ppc_vbyte (int);
122 static void ppc_weak (int);
123 static void ppc_GNU_visibility (int);
127 static void ppc_elf_rdata (int);
128 static void ppc_elf_lcomm (int);
129 static void ppc_elf_localentry (int);
130 static void ppc_elf_abiversion (int);
131 static void ppc_elf_gnu_attribute (int);
134 /* Generic assembler global variables which must be defined by all
138 /* This string holds the chars that always start a comment. If the
139 pre-processor is disabled, these aren't very useful. The macro
140 tc_comment_chars points to this. We use this, rather than the
141 usual comment_chars, so that we can switch for Solaris conventions. */
142 static const char ppc_solaris_comment_chars
[] = "#!";
143 static const char ppc_eabi_comment_chars
[] = "#";
145 #ifdef TARGET_SOLARIS_COMMENT
146 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
148 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
151 const char comment_chars
[] = "#";
154 /* Characters which start a comment at the beginning of a line. */
155 const char line_comment_chars
[] = "#";
157 /* Characters which may be used to separate multiple commands on a
159 const char line_separator_chars
[] = ";";
161 /* Characters which are used to indicate an exponent in a floating
163 const char EXP_CHARS
[] = "eE";
165 /* Characters which mean that a number is a floating point constant,
167 const char FLT_CHARS
[] = "dD";
169 /* Anything that can start an operand needs to be mentioned here,
170 to stop the input scrubber eating whitespace. */
171 const char ppc_symbol_chars
[] = "%[";
173 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
174 int ppc_cie_data_alignment
;
176 /* The dwarf2 minimum instruction length. */
177 int ppc_dwarf2_line_min_insn_length
;
179 /* More than this number of nops in an alignment op gets a branch
181 unsigned long nop_limit
= 4;
183 /* The type of processor we are assembling for. This is one or more
184 of the PPC_OPCODE flags defined in opcode/ppc.h. */
185 ppc_cpu_t ppc_cpu
= 0;
186 ppc_cpu_t sticky
= 0;
188 /* Value for ELF e_flags EF_PPC64_ABI. */
189 unsigned int ppc_abiversion
= 0;
192 /* Flags set on encountering toc relocs. */
194 has_large_toc_reloc
= 1,
195 has_small_toc_reloc
= 2
199 /* Warn on emitting data to code sections. */
205 /* The target specific pseudo-ops which we support. */
207 const pseudo_typeS md_pseudo_table
[] =
209 /* Pseudo-ops which must be overridden. */
210 { "byte", ppc_byte
, 0 },
213 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
214 legitimately belong in the obj-*.c file. However, XCOFF is based
215 on COFF, and is only implemented for the RS/6000. We just use
216 obj-coff.c, and add what we need here. */
217 { "comm", ppc_comm
, 0 },
218 { "lcomm", ppc_comm
, 1 },
222 { "bi", ppc_biei
, 0 },
224 { "csect", ppc_csect
, 0 },
225 { "dwsect", ppc_dwsect
, 0 },
226 { "data", ppc_section
, 'd' },
230 { "ei", ppc_biei
, 1 },
232 { "extern", ppc_extern
, 0 },
233 { "file", ppc_file
, 0 },
234 { "function", ppc_function
, 0 },
235 { "globl", ppc_globl
, 0 },
236 { "lglobl", ppc_lglobl
, 0 },
237 { "ref", ppc_ref
, 0 },
238 { "rename", ppc_rename
, 0 },
239 { "section", ppc_named_section
, 0 },
240 { "stabx", ppc_stabx
, 0 },
241 { "text", ppc_section
, 't' },
242 { "toc", ppc_toc
, 0 },
243 { "long", ppc_xcoff_cons
, 2 },
244 { "llong", ppc_xcoff_cons
, 3 },
245 { "word", ppc_xcoff_cons
, 1 },
246 { "short", ppc_xcoff_cons
, 1 },
247 { "vbyte", ppc_vbyte
, 0 },
248 { "weak", ppc_weak
, 0 },
250 /* Enable GNU syntax for symbol visibility. */
251 {"internal", ppc_GNU_visibility
, SYM_V_INTERNAL
},
252 {"hidden", ppc_GNU_visibility
, SYM_V_HIDDEN
},
253 {"protected", ppc_GNU_visibility
, SYM_V_PROTECTED
},
257 { "llong", cons
, 8 },
258 { "rdata", ppc_elf_rdata
, 0 },
259 { "rodata", ppc_elf_rdata
, 0 },
260 { "lcomm", ppc_elf_lcomm
, 0 },
261 { "localentry", ppc_elf_localentry
, 0 },
262 { "abiversion", ppc_elf_abiversion
, 0 },
263 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
266 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
268 { "machine", ppc_machine
, 0 },
275 /* Predefined register names if -mregnames (or default for Windows NT).
276 In general, there are lots of them, in an attempt to be compatible
277 with a number of other Windows NT assemblers. */
279 /* Structure to hold information about predefined registers. */
283 unsigned short value
;
284 unsigned short flags
;
287 /* List of registers that are pre-defined:
289 Each general register has predefined names of the form:
290 1. r<reg_num> which has the value <reg_num>.
291 2. r.<reg_num> which has the value <reg_num>.
293 Each floating point register has predefined names of the form:
294 1. f<reg_num> which has the value <reg_num>.
295 2. f.<reg_num> which has the value <reg_num>.
297 Each vector unit register has predefined names of the form:
298 1. v<reg_num> which has the value <reg_num>.
299 2. v.<reg_num> which has the value <reg_num>.
301 Each condition register has predefined names of the form:
302 1. cr<reg_num> which has the value <reg_num>.
303 2. cr.<reg_num> which has the value <reg_num>.
305 There are individual registers as well:
306 sp or r.sp has the value 1
307 rtoc or r.toc has the value 2
312 dsisr has the value 18
314 sdr1 has the value 25
315 srr0 has the value 26
316 srr1 has the value 27
318 The table is sorted. Suitable for searching by a binary search. */
320 static const struct pd_reg pre_defined_registers
[] =
322 /* VSX accumulators. */
323 { "a0", 0, PPC_OPERAND_ACC
},
324 { "a1", 1, PPC_OPERAND_ACC
},
325 { "a2", 2, PPC_OPERAND_ACC
},
326 { "a3", 3, PPC_OPERAND_ACC
},
327 { "a4", 4, PPC_OPERAND_ACC
},
328 { "a5", 5, PPC_OPERAND_ACC
},
329 { "a6", 6, PPC_OPERAND_ACC
},
330 { "a7", 7, PPC_OPERAND_ACC
},
332 /* Condition Registers */
333 { "cr.0", 0, PPC_OPERAND_CR_REG
},
334 { "cr.1", 1, PPC_OPERAND_CR_REG
},
335 { "cr.2", 2, PPC_OPERAND_CR_REG
},
336 { "cr.3", 3, PPC_OPERAND_CR_REG
},
337 { "cr.4", 4, PPC_OPERAND_CR_REG
},
338 { "cr.5", 5, PPC_OPERAND_CR_REG
},
339 { "cr.6", 6, PPC_OPERAND_CR_REG
},
340 { "cr.7", 7, PPC_OPERAND_CR_REG
},
342 { "cr0", 0, PPC_OPERAND_CR_REG
},
343 { "cr1", 1, PPC_OPERAND_CR_REG
},
344 { "cr2", 2, PPC_OPERAND_CR_REG
},
345 { "cr3", 3, PPC_OPERAND_CR_REG
},
346 { "cr4", 4, PPC_OPERAND_CR_REG
},
347 { "cr5", 5, PPC_OPERAND_CR_REG
},
348 { "cr6", 6, PPC_OPERAND_CR_REG
},
349 { "cr7", 7, PPC_OPERAND_CR_REG
},
351 { "ctr", 9, PPC_OPERAND_SPR
},
352 { "dar", 19, PPC_OPERAND_SPR
},
353 { "dec", 22, PPC_OPERAND_SPR
},
354 { "dsisr", 18, PPC_OPERAND_SPR
},
356 /* Floating point registers */
357 { "f.0", 0, PPC_OPERAND_FPR
},
358 { "f.1", 1, PPC_OPERAND_FPR
},
359 { "f.10", 10, PPC_OPERAND_FPR
},
360 { "f.11", 11, PPC_OPERAND_FPR
},
361 { "f.12", 12, PPC_OPERAND_FPR
},
362 { "f.13", 13, PPC_OPERAND_FPR
},
363 { "f.14", 14, PPC_OPERAND_FPR
},
364 { "f.15", 15, PPC_OPERAND_FPR
},
365 { "f.16", 16, PPC_OPERAND_FPR
},
366 { "f.17", 17, PPC_OPERAND_FPR
},
367 { "f.18", 18, PPC_OPERAND_FPR
},
368 { "f.19", 19, PPC_OPERAND_FPR
},
369 { "f.2", 2, PPC_OPERAND_FPR
},
370 { "f.20", 20, PPC_OPERAND_FPR
},
371 { "f.21", 21, PPC_OPERAND_FPR
},
372 { "f.22", 22, PPC_OPERAND_FPR
},
373 { "f.23", 23, PPC_OPERAND_FPR
},
374 { "f.24", 24, PPC_OPERAND_FPR
},
375 { "f.25", 25, PPC_OPERAND_FPR
},
376 { "f.26", 26, PPC_OPERAND_FPR
},
377 { "f.27", 27, PPC_OPERAND_FPR
},
378 { "f.28", 28, PPC_OPERAND_FPR
},
379 { "f.29", 29, PPC_OPERAND_FPR
},
380 { "f.3", 3, PPC_OPERAND_FPR
},
381 { "f.30", 30, PPC_OPERAND_FPR
},
382 { "f.31", 31, PPC_OPERAND_FPR
},
383 { "f.32", 32, PPC_OPERAND_VSR
},
384 { "f.33", 33, PPC_OPERAND_VSR
},
385 { "f.34", 34, PPC_OPERAND_VSR
},
386 { "f.35", 35, PPC_OPERAND_VSR
},
387 { "f.36", 36, PPC_OPERAND_VSR
},
388 { "f.37", 37, PPC_OPERAND_VSR
},
389 { "f.38", 38, PPC_OPERAND_VSR
},
390 { "f.39", 39, PPC_OPERAND_VSR
},
391 { "f.4", 4, PPC_OPERAND_FPR
},
392 { "f.40", 40, PPC_OPERAND_VSR
},
393 { "f.41", 41, PPC_OPERAND_VSR
},
394 { "f.42", 42, PPC_OPERAND_VSR
},
395 { "f.43", 43, PPC_OPERAND_VSR
},
396 { "f.44", 44, PPC_OPERAND_VSR
},
397 { "f.45", 45, PPC_OPERAND_VSR
},
398 { "f.46", 46, PPC_OPERAND_VSR
},
399 { "f.47", 47, PPC_OPERAND_VSR
},
400 { "f.48", 48, PPC_OPERAND_VSR
},
401 { "f.49", 49, PPC_OPERAND_VSR
},
402 { "f.5", 5, PPC_OPERAND_FPR
},
403 { "f.50", 50, PPC_OPERAND_VSR
},
404 { "f.51", 51, PPC_OPERAND_VSR
},
405 { "f.52", 52, PPC_OPERAND_VSR
},
406 { "f.53", 53, PPC_OPERAND_VSR
},
407 { "f.54", 54, PPC_OPERAND_VSR
},
408 { "f.55", 55, PPC_OPERAND_VSR
},
409 { "f.56", 56, PPC_OPERAND_VSR
},
410 { "f.57", 57, PPC_OPERAND_VSR
},
411 { "f.58", 58, PPC_OPERAND_VSR
},
412 { "f.59", 59, PPC_OPERAND_VSR
},
413 { "f.6", 6, PPC_OPERAND_FPR
},
414 { "f.60", 60, PPC_OPERAND_VSR
},
415 { "f.61", 61, PPC_OPERAND_VSR
},
416 { "f.62", 62, PPC_OPERAND_VSR
},
417 { "f.63", 63, PPC_OPERAND_VSR
},
418 { "f.7", 7, PPC_OPERAND_FPR
},
419 { "f.8", 8, PPC_OPERAND_FPR
},
420 { "f.9", 9, PPC_OPERAND_FPR
},
422 { "f0", 0, PPC_OPERAND_FPR
},
423 { "f1", 1, PPC_OPERAND_FPR
},
424 { "f10", 10, PPC_OPERAND_FPR
},
425 { "f11", 11, PPC_OPERAND_FPR
},
426 { "f12", 12, PPC_OPERAND_FPR
},
427 { "f13", 13, PPC_OPERAND_FPR
},
428 { "f14", 14, PPC_OPERAND_FPR
},
429 { "f15", 15, PPC_OPERAND_FPR
},
430 { "f16", 16, PPC_OPERAND_FPR
},
431 { "f17", 17, PPC_OPERAND_FPR
},
432 { "f18", 18, PPC_OPERAND_FPR
},
433 { "f19", 19, PPC_OPERAND_FPR
},
434 { "f2", 2, PPC_OPERAND_FPR
},
435 { "f20", 20, PPC_OPERAND_FPR
},
436 { "f21", 21, PPC_OPERAND_FPR
},
437 { "f22", 22, PPC_OPERAND_FPR
},
438 { "f23", 23, PPC_OPERAND_FPR
},
439 { "f24", 24, PPC_OPERAND_FPR
},
440 { "f25", 25, PPC_OPERAND_FPR
},
441 { "f26", 26, PPC_OPERAND_FPR
},
442 { "f27", 27, PPC_OPERAND_FPR
},
443 { "f28", 28, PPC_OPERAND_FPR
},
444 { "f29", 29, PPC_OPERAND_FPR
},
445 { "f3", 3, PPC_OPERAND_FPR
},
446 { "f30", 30, PPC_OPERAND_FPR
},
447 { "f31", 31, PPC_OPERAND_FPR
},
448 { "f32", 32, PPC_OPERAND_VSR
},
449 { "f33", 33, PPC_OPERAND_VSR
},
450 { "f34", 34, PPC_OPERAND_VSR
},
451 { "f35", 35, PPC_OPERAND_VSR
},
452 { "f36", 36, PPC_OPERAND_VSR
},
453 { "f37", 37, PPC_OPERAND_VSR
},
454 { "f38", 38, PPC_OPERAND_VSR
},
455 { "f39", 39, PPC_OPERAND_VSR
},
456 { "f4", 4, PPC_OPERAND_FPR
},
457 { "f40", 40, PPC_OPERAND_VSR
},
458 { "f41", 41, PPC_OPERAND_VSR
},
459 { "f42", 42, PPC_OPERAND_VSR
},
460 { "f43", 43, PPC_OPERAND_VSR
},
461 { "f44", 44, PPC_OPERAND_VSR
},
462 { "f45", 45, PPC_OPERAND_VSR
},
463 { "f46", 46, PPC_OPERAND_VSR
},
464 { "f47", 47, PPC_OPERAND_VSR
},
465 { "f48", 48, PPC_OPERAND_VSR
},
466 { "f49", 49, PPC_OPERAND_VSR
},
467 { "f5", 5, PPC_OPERAND_FPR
},
468 { "f50", 50, PPC_OPERAND_VSR
},
469 { "f51", 51, PPC_OPERAND_VSR
},
470 { "f52", 52, PPC_OPERAND_VSR
},
471 { "f53", 53, PPC_OPERAND_VSR
},
472 { "f54", 54, PPC_OPERAND_VSR
},
473 { "f55", 55, PPC_OPERAND_VSR
},
474 { "f56", 56, PPC_OPERAND_VSR
},
475 { "f57", 57, PPC_OPERAND_VSR
},
476 { "f58", 58, PPC_OPERAND_VSR
},
477 { "f59", 59, PPC_OPERAND_VSR
},
478 { "f6", 6, PPC_OPERAND_FPR
},
479 { "f60", 60, PPC_OPERAND_VSR
},
480 { "f61", 61, PPC_OPERAND_VSR
},
481 { "f62", 62, PPC_OPERAND_VSR
},
482 { "f63", 63, PPC_OPERAND_VSR
},
483 { "f7", 7, PPC_OPERAND_FPR
},
484 { "f8", 8, PPC_OPERAND_FPR
},
485 { "f9", 9, PPC_OPERAND_FPR
},
487 /* Quantization registers used with pair single instructions. */
488 { "gqr.0", 0, PPC_OPERAND_GQR
},
489 { "gqr.1", 1, PPC_OPERAND_GQR
},
490 { "gqr.2", 2, PPC_OPERAND_GQR
},
491 { "gqr.3", 3, PPC_OPERAND_GQR
},
492 { "gqr.4", 4, PPC_OPERAND_GQR
},
493 { "gqr.5", 5, PPC_OPERAND_GQR
},
494 { "gqr.6", 6, PPC_OPERAND_GQR
},
495 { "gqr.7", 7, PPC_OPERAND_GQR
},
496 { "gqr0", 0, PPC_OPERAND_GQR
},
497 { "gqr1", 1, PPC_OPERAND_GQR
},
498 { "gqr2", 2, PPC_OPERAND_GQR
},
499 { "gqr3", 3, PPC_OPERAND_GQR
},
500 { "gqr4", 4, PPC_OPERAND_GQR
},
501 { "gqr5", 5, PPC_OPERAND_GQR
},
502 { "gqr6", 6, PPC_OPERAND_GQR
},
503 { "gqr7", 7, PPC_OPERAND_GQR
},
505 { "lr", 8, PPC_OPERAND_SPR
},
507 /* General Purpose Registers */
508 { "r.0", 0, PPC_OPERAND_GPR
},
509 { "r.1", 1, PPC_OPERAND_GPR
},
510 { "r.10", 10, PPC_OPERAND_GPR
},
511 { "r.11", 11, PPC_OPERAND_GPR
},
512 { "r.12", 12, PPC_OPERAND_GPR
},
513 { "r.13", 13, PPC_OPERAND_GPR
},
514 { "r.14", 14, PPC_OPERAND_GPR
},
515 { "r.15", 15, PPC_OPERAND_GPR
},
516 { "r.16", 16, PPC_OPERAND_GPR
},
517 { "r.17", 17, PPC_OPERAND_GPR
},
518 { "r.18", 18, PPC_OPERAND_GPR
},
519 { "r.19", 19, PPC_OPERAND_GPR
},
520 { "r.2", 2, PPC_OPERAND_GPR
},
521 { "r.20", 20, PPC_OPERAND_GPR
},
522 { "r.21", 21, PPC_OPERAND_GPR
},
523 { "r.22", 22, PPC_OPERAND_GPR
},
524 { "r.23", 23, PPC_OPERAND_GPR
},
525 { "r.24", 24, PPC_OPERAND_GPR
},
526 { "r.25", 25, PPC_OPERAND_GPR
},
527 { "r.26", 26, PPC_OPERAND_GPR
},
528 { "r.27", 27, PPC_OPERAND_GPR
},
529 { "r.28", 28, PPC_OPERAND_GPR
},
530 { "r.29", 29, PPC_OPERAND_GPR
},
531 { "r.3", 3, PPC_OPERAND_GPR
},
532 { "r.30", 30, PPC_OPERAND_GPR
},
533 { "r.31", 31, PPC_OPERAND_GPR
},
534 { "r.4", 4, PPC_OPERAND_GPR
},
535 { "r.5", 5, PPC_OPERAND_GPR
},
536 { "r.6", 6, PPC_OPERAND_GPR
},
537 { "r.7", 7, PPC_OPERAND_GPR
},
538 { "r.8", 8, PPC_OPERAND_GPR
},
539 { "r.9", 9, PPC_OPERAND_GPR
},
541 { "r.sp", 1, PPC_OPERAND_GPR
},
543 { "r.toc", 2, PPC_OPERAND_GPR
},
545 { "r0", 0, PPC_OPERAND_GPR
},
546 { "r1", 1, PPC_OPERAND_GPR
},
547 { "r10", 10, PPC_OPERAND_GPR
},
548 { "r11", 11, PPC_OPERAND_GPR
},
549 { "r12", 12, PPC_OPERAND_GPR
},
550 { "r13", 13, PPC_OPERAND_GPR
},
551 { "r14", 14, PPC_OPERAND_GPR
},
552 { "r15", 15, PPC_OPERAND_GPR
},
553 { "r16", 16, PPC_OPERAND_GPR
},
554 { "r17", 17, PPC_OPERAND_GPR
},
555 { "r18", 18, PPC_OPERAND_GPR
},
556 { "r19", 19, PPC_OPERAND_GPR
},
557 { "r2", 2, PPC_OPERAND_GPR
},
558 { "r20", 20, PPC_OPERAND_GPR
},
559 { "r21", 21, PPC_OPERAND_GPR
},
560 { "r22", 22, PPC_OPERAND_GPR
},
561 { "r23", 23, PPC_OPERAND_GPR
},
562 { "r24", 24, PPC_OPERAND_GPR
},
563 { "r25", 25, PPC_OPERAND_GPR
},
564 { "r26", 26, PPC_OPERAND_GPR
},
565 { "r27", 27, PPC_OPERAND_GPR
},
566 { "r28", 28, PPC_OPERAND_GPR
},
567 { "r29", 29, PPC_OPERAND_GPR
},
568 { "r3", 3, PPC_OPERAND_GPR
},
569 { "r30", 30, PPC_OPERAND_GPR
},
570 { "r31", 31, PPC_OPERAND_GPR
},
571 { "r4", 4, PPC_OPERAND_GPR
},
572 { "r5", 5, PPC_OPERAND_GPR
},
573 { "r6", 6, PPC_OPERAND_GPR
},
574 { "r7", 7, PPC_OPERAND_GPR
},
575 { "r8", 8, PPC_OPERAND_GPR
},
576 { "r9", 9, PPC_OPERAND_GPR
},
578 { "rtoc", 2, PPC_OPERAND_GPR
},
580 { "sdr1", 25, PPC_OPERAND_SPR
},
582 { "sp", 1, PPC_OPERAND_GPR
},
584 { "srr0", 26, PPC_OPERAND_SPR
},
585 { "srr1", 27, PPC_OPERAND_SPR
},
587 /* Vector (Altivec/VMX) registers */
588 { "v.0", 0, PPC_OPERAND_VR
},
589 { "v.1", 1, PPC_OPERAND_VR
},
590 { "v.10", 10, PPC_OPERAND_VR
},
591 { "v.11", 11, PPC_OPERAND_VR
},
592 { "v.12", 12, PPC_OPERAND_VR
},
593 { "v.13", 13, PPC_OPERAND_VR
},
594 { "v.14", 14, PPC_OPERAND_VR
},
595 { "v.15", 15, PPC_OPERAND_VR
},
596 { "v.16", 16, PPC_OPERAND_VR
},
597 { "v.17", 17, PPC_OPERAND_VR
},
598 { "v.18", 18, PPC_OPERAND_VR
},
599 { "v.19", 19, PPC_OPERAND_VR
},
600 { "v.2", 2, PPC_OPERAND_VR
},
601 { "v.20", 20, PPC_OPERAND_VR
},
602 { "v.21", 21, PPC_OPERAND_VR
},
603 { "v.22", 22, PPC_OPERAND_VR
},
604 { "v.23", 23, PPC_OPERAND_VR
},
605 { "v.24", 24, PPC_OPERAND_VR
},
606 { "v.25", 25, PPC_OPERAND_VR
},
607 { "v.26", 26, PPC_OPERAND_VR
},
608 { "v.27", 27, PPC_OPERAND_VR
},
609 { "v.28", 28, PPC_OPERAND_VR
},
610 { "v.29", 29, PPC_OPERAND_VR
},
611 { "v.3", 3, PPC_OPERAND_VR
},
612 { "v.30", 30, PPC_OPERAND_VR
},
613 { "v.31", 31, PPC_OPERAND_VR
},
614 { "v.4", 4, PPC_OPERAND_VR
},
615 { "v.5", 5, PPC_OPERAND_VR
},
616 { "v.6", 6, PPC_OPERAND_VR
},
617 { "v.7", 7, PPC_OPERAND_VR
},
618 { "v.8", 8, PPC_OPERAND_VR
},
619 { "v.9", 9, PPC_OPERAND_VR
},
621 { "v0", 0, PPC_OPERAND_VR
},
622 { "v1", 1, PPC_OPERAND_VR
},
623 { "v10", 10, PPC_OPERAND_VR
},
624 { "v11", 11, PPC_OPERAND_VR
},
625 { "v12", 12, PPC_OPERAND_VR
},
626 { "v13", 13, PPC_OPERAND_VR
},
627 { "v14", 14, PPC_OPERAND_VR
},
628 { "v15", 15, PPC_OPERAND_VR
},
629 { "v16", 16, PPC_OPERAND_VR
},
630 { "v17", 17, PPC_OPERAND_VR
},
631 { "v18", 18, PPC_OPERAND_VR
},
632 { "v19", 19, PPC_OPERAND_VR
},
633 { "v2", 2, PPC_OPERAND_VR
},
634 { "v20", 20, PPC_OPERAND_VR
},
635 { "v21", 21, PPC_OPERAND_VR
},
636 { "v22", 22, PPC_OPERAND_VR
},
637 { "v23", 23, PPC_OPERAND_VR
},
638 { "v24", 24, PPC_OPERAND_VR
},
639 { "v25", 25, PPC_OPERAND_VR
},
640 { "v26", 26, PPC_OPERAND_VR
},
641 { "v27", 27, PPC_OPERAND_VR
},
642 { "v28", 28, PPC_OPERAND_VR
},
643 { "v29", 29, PPC_OPERAND_VR
},
644 { "v3", 3, PPC_OPERAND_VR
},
645 { "v30", 30, PPC_OPERAND_VR
},
646 { "v31", 31, PPC_OPERAND_VR
},
647 { "v4", 4, PPC_OPERAND_VR
},
648 { "v5", 5, PPC_OPERAND_VR
},
649 { "v6", 6, PPC_OPERAND_VR
},
650 { "v7", 7, PPC_OPERAND_VR
},
651 { "v8", 8, PPC_OPERAND_VR
},
652 { "v9", 9, PPC_OPERAND_VR
},
654 /* Vector Scalar (VSX) registers (ISA 2.06). */
655 { "vs.0", 0, PPC_OPERAND_VSR
},
656 { "vs.1", 1, PPC_OPERAND_VSR
},
657 { "vs.10", 10, PPC_OPERAND_VSR
},
658 { "vs.11", 11, PPC_OPERAND_VSR
},
659 { "vs.12", 12, PPC_OPERAND_VSR
},
660 { "vs.13", 13, PPC_OPERAND_VSR
},
661 { "vs.14", 14, PPC_OPERAND_VSR
},
662 { "vs.15", 15, PPC_OPERAND_VSR
},
663 { "vs.16", 16, PPC_OPERAND_VSR
},
664 { "vs.17", 17, PPC_OPERAND_VSR
},
665 { "vs.18", 18, PPC_OPERAND_VSR
},
666 { "vs.19", 19, PPC_OPERAND_VSR
},
667 { "vs.2", 2, PPC_OPERAND_VSR
},
668 { "vs.20", 20, PPC_OPERAND_VSR
},
669 { "vs.21", 21, PPC_OPERAND_VSR
},
670 { "vs.22", 22, PPC_OPERAND_VSR
},
671 { "vs.23", 23, PPC_OPERAND_VSR
},
672 { "vs.24", 24, PPC_OPERAND_VSR
},
673 { "vs.25", 25, PPC_OPERAND_VSR
},
674 { "vs.26", 26, PPC_OPERAND_VSR
},
675 { "vs.27", 27, PPC_OPERAND_VSR
},
676 { "vs.28", 28, PPC_OPERAND_VSR
},
677 { "vs.29", 29, PPC_OPERAND_VSR
},
678 { "vs.3", 3, PPC_OPERAND_VSR
},
679 { "vs.30", 30, PPC_OPERAND_VSR
},
680 { "vs.31", 31, PPC_OPERAND_VSR
},
681 { "vs.32", 32, PPC_OPERAND_VSR
},
682 { "vs.33", 33, PPC_OPERAND_VSR
},
683 { "vs.34", 34, PPC_OPERAND_VSR
},
684 { "vs.35", 35, PPC_OPERAND_VSR
},
685 { "vs.36", 36, PPC_OPERAND_VSR
},
686 { "vs.37", 37, PPC_OPERAND_VSR
},
687 { "vs.38", 38, PPC_OPERAND_VSR
},
688 { "vs.39", 39, PPC_OPERAND_VSR
},
689 { "vs.4", 4, PPC_OPERAND_VSR
},
690 { "vs.40", 40, PPC_OPERAND_VSR
},
691 { "vs.41", 41, PPC_OPERAND_VSR
},
692 { "vs.42", 42, PPC_OPERAND_VSR
},
693 { "vs.43", 43, PPC_OPERAND_VSR
},
694 { "vs.44", 44, PPC_OPERAND_VSR
},
695 { "vs.45", 45, PPC_OPERAND_VSR
},
696 { "vs.46", 46, PPC_OPERAND_VSR
},
697 { "vs.47", 47, PPC_OPERAND_VSR
},
698 { "vs.48", 48, PPC_OPERAND_VSR
},
699 { "vs.49", 49, PPC_OPERAND_VSR
},
700 { "vs.5", 5, PPC_OPERAND_VSR
},
701 { "vs.50", 50, PPC_OPERAND_VSR
},
702 { "vs.51", 51, PPC_OPERAND_VSR
},
703 { "vs.52", 52, PPC_OPERAND_VSR
},
704 { "vs.53", 53, PPC_OPERAND_VSR
},
705 { "vs.54", 54, PPC_OPERAND_VSR
},
706 { "vs.55", 55, PPC_OPERAND_VSR
},
707 { "vs.56", 56, PPC_OPERAND_VSR
},
708 { "vs.57", 57, PPC_OPERAND_VSR
},
709 { "vs.58", 58, PPC_OPERAND_VSR
},
710 { "vs.59", 59, PPC_OPERAND_VSR
},
711 { "vs.6", 6, PPC_OPERAND_VSR
},
712 { "vs.60", 60, PPC_OPERAND_VSR
},
713 { "vs.61", 61, PPC_OPERAND_VSR
},
714 { "vs.62", 62, PPC_OPERAND_VSR
},
715 { "vs.63", 63, PPC_OPERAND_VSR
},
716 { "vs.7", 7, PPC_OPERAND_VSR
},
717 { "vs.8", 8, PPC_OPERAND_VSR
},
718 { "vs.9", 9, PPC_OPERAND_VSR
},
720 { "vs0", 0, PPC_OPERAND_VSR
},
721 { "vs1", 1, PPC_OPERAND_VSR
},
722 { "vs10", 10, PPC_OPERAND_VSR
},
723 { "vs11", 11, PPC_OPERAND_VSR
},
724 { "vs12", 12, PPC_OPERAND_VSR
},
725 { "vs13", 13, PPC_OPERAND_VSR
},
726 { "vs14", 14, PPC_OPERAND_VSR
},
727 { "vs15", 15, PPC_OPERAND_VSR
},
728 { "vs16", 16, PPC_OPERAND_VSR
},
729 { "vs17", 17, PPC_OPERAND_VSR
},
730 { "vs18", 18, PPC_OPERAND_VSR
},
731 { "vs19", 19, PPC_OPERAND_VSR
},
732 { "vs2", 2, PPC_OPERAND_VSR
},
733 { "vs20", 20, PPC_OPERAND_VSR
},
734 { "vs21", 21, PPC_OPERAND_VSR
},
735 { "vs22", 22, PPC_OPERAND_VSR
},
736 { "vs23", 23, PPC_OPERAND_VSR
},
737 { "vs24", 24, PPC_OPERAND_VSR
},
738 { "vs25", 25, PPC_OPERAND_VSR
},
739 { "vs26", 26, PPC_OPERAND_VSR
},
740 { "vs27", 27, PPC_OPERAND_VSR
},
741 { "vs28", 28, PPC_OPERAND_VSR
},
742 { "vs29", 29, PPC_OPERAND_VSR
},
743 { "vs3", 3, PPC_OPERAND_VSR
},
744 { "vs30", 30, PPC_OPERAND_VSR
},
745 { "vs31", 31, PPC_OPERAND_VSR
},
746 { "vs32", 32, PPC_OPERAND_VSR
},
747 { "vs33", 33, PPC_OPERAND_VSR
},
748 { "vs34", 34, PPC_OPERAND_VSR
},
749 { "vs35", 35, PPC_OPERAND_VSR
},
750 { "vs36", 36, PPC_OPERAND_VSR
},
751 { "vs37", 37, PPC_OPERAND_VSR
},
752 { "vs38", 38, PPC_OPERAND_VSR
},
753 { "vs39", 39, PPC_OPERAND_VSR
},
754 { "vs4", 4, PPC_OPERAND_VSR
},
755 { "vs40", 40, PPC_OPERAND_VSR
},
756 { "vs41", 41, PPC_OPERAND_VSR
},
757 { "vs42", 42, PPC_OPERAND_VSR
},
758 { "vs43", 43, PPC_OPERAND_VSR
},
759 { "vs44", 44, PPC_OPERAND_VSR
},
760 { "vs45", 45, PPC_OPERAND_VSR
},
761 { "vs46", 46, PPC_OPERAND_VSR
},
762 { "vs47", 47, PPC_OPERAND_VSR
},
763 { "vs48", 48, PPC_OPERAND_VSR
},
764 { "vs49", 49, PPC_OPERAND_VSR
},
765 { "vs5", 5, PPC_OPERAND_VSR
},
766 { "vs50", 50, PPC_OPERAND_VSR
},
767 { "vs51", 51, PPC_OPERAND_VSR
},
768 { "vs52", 52, PPC_OPERAND_VSR
},
769 { "vs53", 53, PPC_OPERAND_VSR
},
770 { "vs54", 54, PPC_OPERAND_VSR
},
771 { "vs55", 55, PPC_OPERAND_VSR
},
772 { "vs56", 56, PPC_OPERAND_VSR
},
773 { "vs57", 57, PPC_OPERAND_VSR
},
774 { "vs58", 58, PPC_OPERAND_VSR
},
775 { "vs59", 59, PPC_OPERAND_VSR
},
776 { "vs6", 6, PPC_OPERAND_VSR
},
777 { "vs60", 60, PPC_OPERAND_VSR
},
778 { "vs61", 61, PPC_OPERAND_VSR
},
779 { "vs62", 62, PPC_OPERAND_VSR
},
780 { "vs63", 63, PPC_OPERAND_VSR
},
781 { "vs7", 7, PPC_OPERAND_VSR
},
782 { "vs8", 8, PPC_OPERAND_VSR
},
783 { "vs9", 9, PPC_OPERAND_VSR
},
785 { "xer", 1, PPC_OPERAND_SPR
}
788 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
790 /* Given NAME, find the register number associated with that name, return
791 the integer value associated with the given name or -1 on failure. */
793 static const struct pd_reg
*
794 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
796 int middle
, low
, high
;
804 middle
= (low
+ high
) / 2;
805 cmp
= strcasecmp (name
, regs
[middle
].name
);
811 return ®s
[middle
];
819 * Summary of register_name.
821 * in: Input_line_pointer points to 1st char of operand.
823 * out: A expressionS.
824 * The operand may have been a register: in this case, X_op == O_register,
825 * X_add_number is set to the register number, and truth is returned.
826 * Input_line_pointer->(next non-blank) char after operand, or is in its
831 register_name (expressionS
*expressionP
)
833 const struct pd_reg
*reg
;
838 /* Find the spelling of the operand. */
839 start
= name
= input_line_pointer
;
840 if (name
[0] == '%' && ISALPHA (name
[1]))
841 name
= ++input_line_pointer
;
843 else if (!reg_names_p
|| !ISALPHA (name
[0]))
846 c
= get_symbol_name (&name
);
847 reg
= reg_name_search (pre_defined_registers
, REG_NAME_CNT
, name
);
849 /* Put back the delimiting char. */
850 *input_line_pointer
= c
;
852 /* Look to see if it's in the register table. */
855 expressionP
->X_op
= O_register
;
856 expressionP
->X_add_number
= reg
->value
;
857 expressionP
->X_md
= reg
->flags
;
859 /* Make the rest nice. */
860 expressionP
->X_add_symbol
= NULL
;
861 expressionP
->X_op_symbol
= NULL
;
865 /* Reset the line as if we had not done anything. */
866 input_line_pointer
= start
;
870 /* This function is called for each symbol seen in an expression. It
871 handles the special parsing which PowerPC assemblers are supposed
872 to use for condition codes. */
874 /* Whether to do the special parsing. */
875 static bool cr_operand
;
877 /* Names to recognize in a condition code. This table is sorted. */
878 static const struct pd_reg cr_names
[] =
880 { "cr0", 0, PPC_OPERAND_CR_REG
},
881 { "cr1", 1, PPC_OPERAND_CR_REG
},
882 { "cr2", 2, PPC_OPERAND_CR_REG
},
883 { "cr3", 3, PPC_OPERAND_CR_REG
},
884 { "cr4", 4, PPC_OPERAND_CR_REG
},
885 { "cr5", 5, PPC_OPERAND_CR_REG
},
886 { "cr6", 6, PPC_OPERAND_CR_REG
},
887 { "cr7", 7, PPC_OPERAND_CR_REG
},
888 { "eq", 2, PPC_OPERAND_CR_BIT
},
889 { "gt", 1, PPC_OPERAND_CR_BIT
},
890 { "lt", 0, PPC_OPERAND_CR_BIT
},
891 { "so", 3, PPC_OPERAND_CR_BIT
},
892 { "un", 3, PPC_OPERAND_CR_BIT
}
895 /* Parsing function. This returns non-zero if it recognized an
899 ppc_parse_name (const char *name
, expressionS
*exp
)
901 const struct pd_reg
*reg
;
908 reg
= reg_name_search (cr_names
, sizeof cr_names
/ sizeof cr_names
[0],
913 exp
->X_op
= O_register
;
914 exp
->X_add_number
= reg
->value
;
915 exp
->X_md
= reg
->flags
;
920 /* Propagate X_md and check register expressions. This is to support
921 condition codes like 4*cr5+eq. */
924 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
926 /* Accept 4*cr<n> and cr<n>*4. */
928 && ((right
->X_op
== O_register
929 && right
->X_md
== PPC_OPERAND_CR_REG
930 && left
->X_op
== O_constant
931 && left
->X_add_number
== 4)
932 || (left
->X_op
== O_register
933 && left
->X_md
== PPC_OPERAND_CR_REG
934 && right
->X_op
== O_constant
935 && right
->X_add_number
== 4)))
937 left
->X_op
= O_register
;
938 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
939 left
->X_add_number
*= right
->X_add_number
;
943 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
944 if (right
->X_op
== O_register
945 && left
->X_op
== O_register
947 && ((right
->X_md
== PPC_OPERAND_CR_BIT
948 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
949 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
950 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
952 left
->X_md
= PPC_OPERAND_CR_BIT
;
953 right
->X_op
= O_constant
;
957 /* Accept reg +/- constant. */
958 if (left
->X_op
== O_register
959 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
960 as_warn (_("invalid register expression"));
962 /* Accept constant + reg. */
963 if (right
->X_op
== O_register
)
965 if (op
== O_add
&& left
->X_op
== O_constant
)
966 left
->X_md
= right
->X_md
;
968 as_warn (_("invalid register expression"));
974 /* Local variables. */
976 /* Whether to target xcoff64/elf64. */
977 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
979 /* A separate obstack for use by ppc_hash, so that we can quickly
980 throw away hash table memory . */
981 struct obstack insn_obstack
;
983 /* Opcode hash table. */
984 static htab_t ppc_hash
;
987 /* What type of shared library support to use. */
988 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
990 /* Flags to set in the elf header. */
991 static flagword ppc_flags
= 0;
993 /* Whether this is Solaris or not. */
994 #ifdef TARGET_SOLARIS_COMMENT
995 #define SOLARIS_P true
997 #define SOLARIS_P false
1000 static bool msolaris
= SOLARIS_P
;
1005 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1006 using a bunch of different sections. These assembler sections,
1007 however, are all encompassed within the .text, .data or .bss sections
1008 of the final output file. We handle this by using different
1009 subsegments within these main segments.
1010 .tdata and .tbss sections only have one type of csects for now,
1011 but it's better to follow the same construction like the others. */
1013 struct ppc_xcoff_section ppc_xcoff_text_section
;
1014 struct ppc_xcoff_section ppc_xcoff_data_section
;
1015 struct ppc_xcoff_section ppc_xcoff_bss_section
;
1016 struct ppc_xcoff_section ppc_xcoff_tdata_section
;
1017 struct ppc_xcoff_section ppc_xcoff_tbss_section
;
1019 /* Return true if the ppc_xcoff_section structure is already
1022 ppc_xcoff_section_is_initialized (struct ppc_xcoff_section
*section
)
1024 return section
->segment
!= NULL
;
1027 /* Initialize a ppc_xcoff_section.
1028 Dummy symbols are used to ensure the position of .text over .data
1029 and .tdata. Moreover, they allow all algorithms here to be sure that
1030 csects isn't NULL. These symbols won't be output. */
1032 ppc_init_xcoff_section (struct ppc_xcoff_section
*s
, segT seg
)
1035 s
->next_subsegment
= 2;
1036 s
->csects
= symbol_make ("dummy\001");
1037 symbol_get_tc (s
->csects
)->within
= s
->csects
;
1040 /* The current csect. */
1041 static symbolS
*ppc_current_csect
;
1043 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1044 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1045 A special relocation is used when accessing TOC entries. We handle
1046 the TOC as a subsegment within the .data segment. We set it up if
1047 we see a .toc pseudo-op, and save the csect symbol here. */
1048 static symbolS
*ppc_toc_csect
;
1050 /* The first frag in the TOC subsegment. */
1051 static fragS
*ppc_toc_frag
;
1053 /* The first frag in the first subsegment after the TOC in the .data
1054 segment. NULL if there are no subsegments after the TOC. */
1055 static fragS
*ppc_after_toc_frag
;
1057 /* The current static block. */
1058 static symbolS
*ppc_current_block
;
1060 /* The COFF debugging section; set by md_begin. This is not the
1061 .debug section, but is instead the secret BFD section which will
1062 cause BFD to set the section number of a symbol to N_DEBUG. */
1063 static asection
*ppc_coff_debug_section
;
1065 /* Structure to set the length field of the dwarf sections. */
1066 struct dw_subsection
{
1067 /* Subsections are simply linked. */
1068 struct dw_subsection
*link
;
1070 /* The subsection number. */
1073 /* Expression to compute the length of the section. */
1074 expressionS end_exp
;
1077 static struct dw_section
{
1078 /* Corresponding section. */
1081 /* Simply linked list of subsections with a label. */
1082 struct dw_subsection
*list_subseg
;
1084 /* The anonymous subsection. */
1085 struct dw_subsection
*anon_subseg
;
1086 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1087 #endif /* OBJ_XCOFF */
1090 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1091 unsigned long *ppc_apuinfo_list
;
1092 unsigned int ppc_apuinfo_num
;
1093 unsigned int ppc_apuinfo_num_alloc
;
1094 #endif /* OBJ_ELF */
1097 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1099 const char *const md_shortopts
= "um:";
1101 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1102 const struct option md_longopts
[] = {
1103 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1104 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1105 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1106 {NULL
, no_argument
, NULL
, 0}
1108 const size_t md_longopts_size
= sizeof (md_longopts
);
1111 md_parse_option (int c
, const char *arg
)
1118 /* -u means that any undefined symbols should be treated as
1119 external, which is the default for gas anyhow. */
1124 /* Solaris as takes -le (presumably for little endian). For completeness
1125 sake, recognize -be also. */
1126 if (strcmp (arg
, "e") == 0)
1128 target_big_endian
= 0;
1129 set_target_endian
= 1;
1130 if (ppc_cpu
& PPC_OPCODE_VLE
)
1131 as_bad (_("the use of -mvle requires big endian."));
1139 if (strcmp (arg
, "e") == 0)
1141 target_big_endian
= 1;
1142 set_target_endian
= 1;
1150 /* Recognize -K PIC. */
1151 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1154 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1162 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1164 if (strcmp (arg
, "64") == 0)
1168 if (ppc_cpu
& PPC_OPCODE_VLE
)
1169 as_bad (_("the use of -mvle requires -a32."));
1171 as_fatal (_("%s unsupported"), "-a64");
1174 else if (strcmp (arg
, "32") == 0)
1181 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1182 /* "raw" is only valid for the disassembler. */
1183 if (new_cpu
!= 0 && (new_cpu
& PPC_OPCODE_RAW
) == 0)
1186 if (strcmp (arg
, "vle") == 0)
1188 if (set_target_endian
&& target_big_endian
== 0)
1189 as_bad (_("the use of -mvle requires big endian."));
1191 as_bad (_("the use of -mvle requires -a32."));
1195 else if (strcmp (arg
, "no-vle") == 0)
1197 sticky
&= ~PPC_OPCODE_VLE
;
1199 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, "booke");
1200 new_cpu
&= ~PPC_OPCODE_VLE
;
1205 else if (strcmp (arg
, "regnames") == 0)
1208 else if (strcmp (arg
, "no-regnames") == 0)
1209 reg_names_p
= false;
1212 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1213 that require relocation. */
1214 else if (strcmp (arg
, "relocatable") == 0)
1216 shlib
= SHLIB_MRELOCATABLE
;
1217 ppc_flags
|= EF_PPC_RELOCATABLE
;
1220 else if (strcmp (arg
, "relocatable-lib") == 0)
1222 shlib
= SHLIB_MRELOCATABLE
;
1223 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1226 /* -memb, set embedded bit. */
1227 else if (strcmp (arg
, "emb") == 0)
1228 ppc_flags
|= EF_PPC_EMB
;
1230 /* -mlittle/-mbig set the endianness. */
1231 else if (strcmp (arg
, "little") == 0
1232 || strcmp (arg
, "little-endian") == 0)
1234 target_big_endian
= 0;
1235 set_target_endian
= 1;
1236 if (ppc_cpu
& PPC_OPCODE_VLE
)
1237 as_bad (_("the use of -mvle requires big endian."));
1240 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1242 target_big_endian
= 1;
1243 set_target_endian
= 1;
1246 else if (strcmp (arg
, "solaris") == 0)
1249 ppc_comment_chars
= ppc_solaris_comment_chars
;
1252 else if (strcmp (arg
, "no-solaris") == 0)
1255 ppc_comment_chars
= ppc_eabi_comment_chars
;
1257 else if (strcmp (arg
, "spe2") == 0)
1259 ppc_cpu
|= PPC_OPCODE_SPE2
;
1264 as_bad (_("invalid switch -m%s"), arg
);
1270 /* -V: SVR4 argument to print version ID. */
1272 print_version_id ();
1275 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1276 should be emitted or not. FIXME: Not implemented. */
1280 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1281 rather than .stabs.excl, which is ignored by the linker.
1282 FIXME: Not implemented. */
1293 nop_limit
= strtoul (optarg
, &end
, 0);
1295 as_bad (_("--nops needs a numeric argument"));
1310 is_ppc64_target (const bfd_target
*targ
, void *data ATTRIBUTE_UNUSED
)
1312 switch (targ
->flavour
)
1315 case bfd_target_elf_flavour
:
1316 return startswith (targ
->name
, "elf64-powerpc");
1319 case bfd_target_xcoff_flavour
:
1320 return (strcmp (targ
->name
, "aixcoff64-rs6000") == 0
1321 || strcmp (targ
->name
, "aix5coff64-rs6000") == 0);
1329 md_show_usage (FILE *stream
)
1331 fprintf (stream
, _("\
1332 PowerPC options:\n"));
1333 fprintf (stream
, _("\
1334 -a32 generate ELF32/XCOFF32\n"));
1335 if (bfd_iterate_over_targets (is_ppc64_target
, NULL
))
1336 fprintf (stream
, _("\
1337 -a64 generate ELF64/XCOFF64\n"));
1338 fprintf (stream
, _("\
1340 fprintf (stream
, _("\
1341 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n"));
1342 fprintf (stream
, _("\
1343 -mpwr generate code for POWER (RIOS1)\n"));
1344 fprintf (stream
, _("\
1345 -m601 generate code for PowerPC 601\n"));
1346 fprintf (stream
, _("\
1347 -mppc, -mppc32, -m603, -m604\n\
1348 generate code for PowerPC 603/604\n"));
1349 fprintf (stream
, _("\
1350 -m403 generate code for PowerPC 403\n"));
1351 fprintf (stream
, _("\
1352 -m405 generate code for PowerPC 405\n"));
1353 fprintf (stream
, _("\
1354 -m440 generate code for PowerPC 440\n"));
1355 fprintf (stream
, _("\
1356 -m464 generate code for PowerPC 464\n"));
1357 fprintf (stream
, _("\
1358 -m476 generate code for PowerPC 476\n"));
1359 fprintf (stream
, _("\
1360 -m7400, -m7410, -m7450, -m7455\n\
1361 generate code for PowerPC 7400/7410/7450/7455\n"));
1362 fprintf (stream
, _("\
1363 -m750cl, -mgekko, -mbroadway\n\
1364 generate code for PowerPC 750cl/Gekko/Broadway\n"));
1365 fprintf (stream
, _("\
1366 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1367 fprintf (stream
, _("\
1368 -mppc64, -m620 generate code for PowerPC 620/625/630\n"));
1369 fprintf (stream
, _("\
1370 -mppc64bridge generate code for PowerPC 64, including bridge insns\n"));
1371 fprintf (stream
, _("\
1372 -mbooke generate code for 32-bit PowerPC BookE\n"));
1373 fprintf (stream
, _("\
1374 -ma2 generate code for A2 architecture\n"));
1375 fprintf (stream
, _("\
1376 -mpower4, -mpwr4 generate code for Power4 architecture\n"));
1377 fprintf (stream
, _("\
1378 -mpower5, -mpwr5, -mpwr5x\n\
1379 generate code for Power5 architecture\n"));
1380 fprintf (stream
, _("\
1381 -mpower6, -mpwr6 generate code for Power6 architecture\n"));
1382 fprintf (stream
, _("\
1383 -mpower7, -mpwr7 generate code for Power7 architecture\n"));
1384 fprintf (stream
, _("\
1385 -mpower8, -mpwr8 generate code for Power8 architecture\n"));
1386 fprintf (stream
, _("\
1387 -mpower9, -mpwr9 generate code for Power9 architecture\n"));
1388 fprintf (stream
, _("\
1389 -mpower10, -mpwr10 generate code for Power10 architecture\n"));
1390 fprintf (stream
, _("\
1391 -mcell generate code for Cell Broadband Engine architecture\n"));
1392 fprintf (stream
, _("\
1393 -mcom generate code for Power/PowerPC common instructions\n"));
1394 fprintf (stream
, _("\
1395 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1396 fprintf (stream
, _("\
1397 -maltivec generate code for AltiVec\n"));
1398 fprintf (stream
, _("\
1399 -mvsx generate code for Vector-Scalar (VSX) instructions\n"));
1400 fprintf (stream
, _("\
1401 -me300 generate code for PowerPC e300 family\n"));
1402 fprintf (stream
, _("\
1403 -me500, -me500x2 generate code for Motorola e500 core complex\n"));
1404 fprintf (stream
, _("\
1405 -me500mc, generate code for Freescale e500mc core complex\n"));
1406 fprintf (stream
, _("\
1407 -me500mc64, generate code for Freescale e500mc64 core complex\n"));
1408 fprintf (stream
, _("\
1409 -me5500, generate code for Freescale e5500 core complex\n"));
1410 fprintf (stream
, _("\
1411 -me6500, generate code for Freescale e6500 core complex\n"));
1412 fprintf (stream
, _("\
1413 -mspe generate code for Motorola SPE instructions\n"));
1414 fprintf (stream
, _("\
1415 -mspe2 generate code for Freescale SPE2 instructions\n"));
1416 fprintf (stream
, _("\
1417 -mvle generate code for Freescale VLE instructions\n"));
1418 fprintf (stream
, _("\
1419 -mtitan generate code for AppliedMicro Titan core complex\n"));
1420 fprintf (stream
, _("\
1421 -mregnames Allow symbolic names for registers\n"));
1422 fprintf (stream
, _("\
1423 -mno-regnames Do not allow symbolic names for registers\n"));
1425 fprintf (stream
, _("\
1426 -mrelocatable support for GCC's -mrelocatble option\n"));
1427 fprintf (stream
, _("\
1428 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n"));
1429 fprintf (stream
, _("\
1430 -memb set PPC_EMB bit in ELF flags\n"));
1431 fprintf (stream
, _("\
1432 -mlittle, -mlittle-endian, -le\n\
1433 generate code for a little endian machine\n"));
1434 fprintf (stream
, _("\
1435 -mbig, -mbig-endian, -be\n\
1436 generate code for a big endian machine\n"));
1437 fprintf (stream
, _("\
1438 -msolaris generate code for Solaris\n"));
1439 fprintf (stream
, _("\
1440 -mno-solaris do not generate code for Solaris\n"));
1441 fprintf (stream
, _("\
1442 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n"));
1443 fprintf (stream
, _("\
1444 -V print assembler version number\n"));
1445 fprintf (stream
, _("\
1446 -Qy, -Qn ignored\n"));
1448 fprintf (stream
, _("\
1449 -nops=count when aligning, more than COUNT nops uses a branch\n"));
1450 fprintf (stream
, _("\
1451 -ppc476-workaround warn if emitting data to code sections\n"));
1454 /* Set ppc_cpu if it is not already set. */
1459 const char *default_os
= TARGET_OS
;
1460 const char *default_cpu
= TARGET_CPU
;
1462 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1465 if (target_big_endian
)
1466 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1468 /* The minimum supported cpu for 64-bit little-endian is power8. */
1469 ppc_cpu
|= ppc_parse_cpu (ppc_cpu
, &sticky
, "power8");
1470 else if (startswith (default_os
, "aix")
1471 && default_os
[3] >= '4' && default_os
[3] <= '9')
1472 ppc_cpu
|= PPC_OPCODE_COMMON
;
1473 else if (startswith (default_os
, "aix3"))
1474 ppc_cpu
|= PPC_OPCODE_POWER
;
1475 else if (strcmp (default_cpu
, "rs6000") == 0)
1476 ppc_cpu
|= PPC_OPCODE_POWER
;
1477 else if (startswith (default_cpu
, "powerpc"))
1478 ppc_cpu
|= PPC_OPCODE_PPC
;
1480 as_fatal (_("unknown default cpu = %s, os = %s"),
1481 default_cpu
, default_os
);
1485 /* Figure out the BFD architecture to use. This function and ppc_mach
1486 are called well before md_begin, when the output file is opened. */
1488 enum bfd_architecture
1491 const char *default_cpu
= TARGET_CPU
;
1494 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1495 return bfd_arch_powerpc
;
1496 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1497 return bfd_arch_powerpc
;
1498 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1499 return bfd_arch_rs6000
;
1500 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1502 if (strcmp (default_cpu
, "rs6000") == 0)
1503 return bfd_arch_rs6000
;
1504 else if (startswith (default_cpu
, "powerpc"))
1505 return bfd_arch_powerpc
;
1508 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1509 return bfd_arch_unknown
;
1516 return bfd_mach_ppc64
;
1517 else if (ppc_arch () == bfd_arch_rs6000
)
1518 return bfd_mach_rs6k
;
1519 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1520 return bfd_mach_ppc_titan
;
1521 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1522 return bfd_mach_ppc_vle
;
1524 return bfd_mach_ppc
;
1528 ppc_target_format (void)
1532 return "xcoff-powermac";
1535 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1537 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1543 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1544 # elif defined (TE_VXWORKS)
1545 return "elf32-powerpc-vxworks";
1547 return (target_big_endian
1548 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1549 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1554 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1555 Return TRUE if there's a problem, otherwise FALSE. */
1558 insn_validate (const struct powerpc_opcode
*op
)
1560 const ppc_opindex_t
*o
;
1561 uint64_t omask
= op
->mask
;
1563 /* The mask had better not trim off opcode bits. */
1564 if ((op
->opcode
& omask
) != op
->opcode
)
1566 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1570 /* The operands must not overlap the opcode or each other. */
1571 for (o
= op
->operands
; *o
; ++o
)
1573 bool optional
= false;
1574 if (*o
>= num_powerpc_operands
)
1576 as_bad (_("operand index error for %s"), op
->name
);
1582 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1583 if (operand
->shift
== (int) PPC_OPSHIFT_INV
)
1590 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1592 mask
= (*operand
->insert
) (0, val
, ppc_cpu
, &errmsg
);
1594 else if (operand
->shift
== (int) PPC_OPSHIFT_SH6
)
1595 mask
= (0x1f << 11) | 0x2;
1596 else if (operand
->shift
>= 0)
1597 mask
= operand
->bitm
<< operand
->shift
;
1599 mask
= operand
->bitm
>> -operand
->shift
;
1602 as_bad (_("operand %d overlap in %s"),
1603 (int) (o
- op
->operands
), op
->name
);
1607 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
1611 as_bad (_("non-optional operand %d follows optional operand in %s"),
1612 (int) (o
- op
->operands
), op
->name
);
1621 insn_calloc (size_t n
, size_t size
)
1623 size_t amt
= n
* size
;
1624 void *ret
= obstack_alloc (&insn_obstack
, amt
);
1625 memset (ret
, 0, amt
);
1629 /* Insert opcodes into hash tables. Called at startup and for
1633 ppc_setup_opcodes (void)
1635 const struct powerpc_opcode
*op
;
1636 const struct powerpc_opcode
*op_end
;
1637 bool bad_insn
= false;
1639 if (ppc_hash
!= NULL
)
1641 htab_delete (ppc_hash
);
1642 _obstack_free (&insn_obstack
, NULL
);
1645 obstack_begin (&insn_obstack
, chunksize
);
1647 /* Insert the opcodes into a hash table. */
1648 ppc_hash
= htab_create_alloc (5000, hash_string_tuple
, eq_string_tuple
,
1649 NULL
, insn_calloc
, NULL
);
1651 if (ENABLE_CHECKING
)
1655 /* An index into powerpc_operands is stored in struct fix
1656 fx_pcrel_adjust which is a 16 bit field. */
1657 gas_assert (num_powerpc_operands
<= PPC_OPINDEX_MAX
+ 1);
1659 /* Check operand masks. Code here and in the disassembler assumes
1660 all the 1's in the mask are contiguous. */
1661 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1663 uint64_t mask
= powerpc_operands
[i
].bitm
;
1667 right_bit
= mask
& -mask
;
1669 right_bit
= mask
& -mask
;
1670 if (mask
!= right_bit
)
1672 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1675 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1676 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1677 sizeof (powerpc_operands
[0])) == 0)
1679 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1686 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1687 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1689 if (ENABLE_CHECKING
)
1691 unsigned int new_opcode
= PPC_OP (op
[0].opcode
);
1693 #ifdef PRINT_OPCODE_TABLE
1694 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1695 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1696 new_opcode
, (unsigned long long) op
->opcode
,
1697 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1700 /* The major opcodes had better be sorted. Code in the disassembler
1701 assumes the insns are sorted according to major opcode. */
1702 if (op
!= powerpc_opcodes
1703 && new_opcode
< PPC_OP (op
[-1].opcode
))
1705 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1709 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1711 as_bad (_("%s is enabled by vle flag"), op
->name
);
1714 if (PPC_OP (op
->opcode
) != 4
1715 && PPC_OP (op
->opcode
) != 31
1716 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1718 as_bad (_("%s not disabled by vle flag"), op
->name
);
1721 bad_insn
|= insn_validate (op
);
1724 if ((ppc_cpu
& op
->flags
) != 0
1725 && !(ppc_cpu
& op
->deprecated
)
1726 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1728 as_bad (_("duplicate %s"), op
->name
);
1733 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1734 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1735 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1737 op_end
= prefix_opcodes
+ prefix_num_opcodes
;
1738 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1740 if (ENABLE_CHECKING
)
1742 unsigned int new_opcode
= PPC_PREFIX_SEG (op
[0].opcode
);
1744 #ifdef PRINT_OPCODE_TABLE
1745 printf ("%-14s\t#%04u\tmajor op/2: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1746 op
->name
, (unsigned int) (op
- prefix_opcodes
),
1747 new_opcode
, (unsigned long long) op
->opcode
,
1748 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1751 /* The major opcodes had better be sorted. Code in the disassembler
1752 assumes the insns are sorted according to major opcode. */
1753 if (op
!= prefix_opcodes
1754 && new_opcode
< PPC_PREFIX_SEG (op
[-1].opcode
))
1756 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1759 bad_insn
|= insn_validate (op
);
1762 if ((ppc_cpu
& op
->flags
) != 0
1763 && !(ppc_cpu
& op
->deprecated
)
1764 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1766 as_bad (_("duplicate %s"), op
->name
);
1771 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1772 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1773 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1775 op_end
= vle_opcodes
+ vle_num_opcodes
;
1776 for (op
= vle_opcodes
; op
< op_end
; op
++)
1778 if (ENABLE_CHECKING
)
1780 unsigned new_seg
= VLE_OP_TO_SEG (VLE_OP (op
[0].opcode
, op
[0].mask
));
1782 #ifdef PRINT_OPCODE_TABLE
1783 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1784 op
->name
, (unsigned int) (op
- vle_opcodes
),
1785 (unsigned int) new_seg
, (unsigned long long) op
->opcode
,
1786 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1789 /* The major opcodes had better be sorted. Code in the disassembler
1790 assumes the insns are sorted according to major opcode. */
1791 if (op
!= vle_opcodes
1792 && new_seg
< VLE_OP_TO_SEG (VLE_OP (op
[-1].opcode
, op
[-1].mask
)))
1794 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1798 bad_insn
|= insn_validate (op
);
1801 if ((ppc_cpu
& op
->flags
) != 0
1802 && !(ppc_cpu
& op
->deprecated
)
1803 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1805 as_bad (_("duplicate %s"), op
->name
);
1810 /* SPE2 instructions */
1811 if ((ppc_cpu
& PPC_OPCODE_SPE2
) == PPC_OPCODE_SPE2
)
1813 op_end
= spe2_opcodes
+ spe2_num_opcodes
;
1814 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1816 if (ENABLE_CHECKING
)
1818 if (op
!= spe2_opcodes
)
1820 unsigned old_seg
, new_seg
;
1822 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1823 old_seg
= VLE_OP_TO_SEG (old_seg
);
1824 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1825 new_seg
= VLE_OP_TO_SEG (new_seg
);
1827 /* The major opcodes had better be sorted. Code in the
1828 disassembler assumes the insns are sorted according to
1830 if (new_seg
< old_seg
)
1832 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1837 bad_insn
|= insn_validate (op
);
1840 if ((ppc_cpu
& op
->flags
) != 0
1841 && !(ppc_cpu
& op
->deprecated
)
1842 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1844 as_bad (_("duplicate %s"), op
->name
);
1849 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1850 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1857 /* This function is called when the assembler starts up. It is called
1858 after the options have been parsed and the output file has been
1866 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1867 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1870 /* Set the ELF flags if desired. */
1871 if (ppc_flags
&& !msolaris
)
1872 bfd_set_private_flags (stdoutput
, ppc_flags
);
1875 ppc_setup_opcodes ();
1877 /* Tell the main code what the endianness is if it is not overridden
1879 if (!set_target_endian
)
1881 set_target_endian
= 1;
1882 target_big_endian
= PPC_BIG_ENDIAN
;
1886 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1888 /* Create XCOFF sections with .text in first, as it's creating dummy symbols
1889 to serve as initial csects. This forces the text csects to precede the
1890 data csects. These symbols will not be output. */
1891 ppc_init_xcoff_section (&ppc_xcoff_text_section
, text_section
);
1892 ppc_init_xcoff_section (&ppc_xcoff_data_section
, data_section
);
1893 ppc_init_xcoff_section (&ppc_xcoff_bss_section
, bss_section
);
1902 htab_delete (ppc_hash
);
1903 _obstack_free (&insn_obstack
, NULL
);
1912 if (ppc_apuinfo_list
== NULL
)
1915 /* Ok, so write the section info out. We have this layout:
1919 0 8 length of "APUinfo\0"
1920 4 (n*4) number of APU's (4 bytes each)
1923 20 APU#1 first APU's info
1924 24 APU#2 second APU's info
1929 asection
*seg
= now_seg
;
1930 subsegT subseg
= now_subseg
;
1931 asection
*apuinfo_secp
= (asection
*) NULL
;
1934 /* Create the .PPC.EMB.apuinfo section. */
1935 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1936 bfd_set_section_flags (apuinfo_secp
, SEC_HAS_CONTENTS
| SEC_READONLY
);
1939 md_number_to_chars (p
, (valueT
) 8, 4);
1942 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1945 md_number_to_chars (p
, (valueT
) 2, 4);
1948 strcpy (p
, APUINFO_LABEL
);
1950 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1953 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
1956 frag_align (2, 0, 0);
1958 /* We probably can't restore the current segment, for there likely
1961 subseg_set (seg
, subseg
);
1966 /* Insert an operand value into an instruction. */
1969 ppc_insert_operand (uint64_t insn
,
1970 const struct powerpc_operand
*operand
,
1976 int64_t min
, max
, right
;
1978 max
= operand
->bitm
;
1982 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
1984 /* Extend the allowed range for addis to [-32768, 65535].
1985 Similarly for cmpli and some VLE high part insns. For 64-bit
1986 it would be good to disable this for signed fields since the
1987 value is sign extended into the high 32 bits of the register.
1988 If the value is, say, an address, then we might care about
1989 the high bits. However, gcc as of 2014-06 uses unsigned
1990 values when loading the high part of 64-bit constants using
1992 min
= ~(max
>> 1) & -right
;
1994 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
1996 max
= (max
>> 1) & -right
;
1997 min
= ~max
& -right
;
2000 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
2003 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
2012 /* Some people write constants with the sign extension done by
2013 hand but only up to 32 bits. This shouldn't really be valid,
2014 but, to permit this code to assemble on a 64-bit host, we
2015 sign extend the 32-bit value to 64 bits if so doing makes the
2016 value valid. We only do this for operands that are 32-bits or
2019 && (operand
->bitm
& ~0xffffffffULL
) == 0
2020 && (val
- (1LL << 32)) >= min
2021 && (val
- (1LL << 32)) <= max
2022 && ((val
- (1LL << 32)) & (right
- 1)) == 0)
2023 val
= val
- (1LL << 32);
2025 /* Similarly, people write expressions like ~(1<<15), and expect
2026 this to be OK for a 32-bit unsigned value. */
2028 && (operand
->bitm
& ~0xffffffffULL
) == 0
2029 && (val
+ (1LL << 32)) >= min
2030 && (val
+ (1LL << 32)) <= max
2031 && ((val
+ (1LL << 32)) & (right
- 1)) == 0)
2032 val
= val
+ (1LL << 32);
2036 || (val
& (right
- 1)) != 0)
2037 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
2040 if (operand
->insert
)
2045 insn
= (*operand
->insert
) (insn
, val
, cpu
, &errmsg
);
2046 if (errmsg
!= (const char *) NULL
)
2047 as_bad_where (file
, line
, "%s", errmsg
);
2049 else if (operand
->shift
>= 0)
2050 insn
|= (val
& operand
->bitm
) << operand
->shift
;
2052 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
2059 /* Parse @got, etc. and return the desired relocation. */
2060 static bfd_reloc_code_real_type
2061 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
2065 unsigned int length
: 8;
2066 unsigned int valid32
: 1;
2067 unsigned int valid64
: 1;
2076 const struct map_bfd
*ptr
;
2078 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2079 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2080 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2082 static const struct map_bfd mapping
[] = {
2083 MAP ("l", BFD_RELOC_LO16
),
2084 MAP ("h", BFD_RELOC_HI16
),
2085 MAP ("ha", BFD_RELOC_HI16_S
),
2086 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
2087 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
2088 MAP ("got", BFD_RELOC_16_GOTOFF
),
2089 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
2090 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
2091 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
2092 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
2093 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
2094 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
2095 MAP ("copy", BFD_RELOC_PPC_COPY
),
2096 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
2097 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
2098 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
2099 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
2100 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
2101 MAP ("tls", BFD_RELOC_PPC_TLS
),
2102 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
2103 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
2104 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
2105 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
2106 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
2107 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
2108 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
2109 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
2110 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
2111 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
2112 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
2113 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
2114 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
2115 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
2116 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
2117 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
2118 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
2119 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
2120 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
2121 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
2122 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
2123 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
2124 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
2125 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
2126 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
2127 MAP32 ("fixup", BFD_RELOC_CTOR
),
2128 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
2129 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
2130 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
2131 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
2132 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
2133 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
2134 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
2135 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
2136 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
2137 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
2138 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
2139 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
2140 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
2141 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
2142 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
2143 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
2144 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
2145 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
2146 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2147 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2148 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2149 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2150 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2151 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2152 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2153 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2154 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2155 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2156 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2157 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2158 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2159 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2160 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2161 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2162 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2163 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2164 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2165 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2166 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2167 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2168 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2169 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2170 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2171 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2172 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2173 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2174 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2175 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2176 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2177 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2178 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2179 MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC
),
2180 MAP64 ("pcrel", BFD_RELOC_PPC64_PCREL34
),
2181 MAP64 ("got@pcrel", BFD_RELOC_PPC64_GOT_PCREL34
),
2182 MAP64 ("plt@pcrel", BFD_RELOC_PPC64_PLT_PCREL34
),
2183 MAP64 ("tls@pcrel", BFD_RELOC_PPC64_TLS_PCREL
),
2184 MAP64 ("got@tlsgd@pcrel", BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
),
2185 MAP64 ("got@tlsld@pcrel", BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
),
2186 MAP64 ("got@tprel@pcrel", BFD_RELOC_PPC64_GOT_TPREL_PCREL34
),
2187 MAP64 ("got@dtprel@pcrel", BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
),
2188 MAP64 ("higher34", BFD_RELOC_PPC64_ADDR16_HIGHER34
),
2189 MAP64 ("highera34", BFD_RELOC_PPC64_ADDR16_HIGHERA34
),
2190 MAP64 ("highest34", BFD_RELOC_PPC64_ADDR16_HIGHEST34
),
2191 MAP64 ("highesta34", BFD_RELOC_PPC64_ADDR16_HIGHESTA34
),
2192 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2196 return BFD_RELOC_NONE
;
2198 for (ch
= *str
, str2
= ident
;
2199 (str2
< ident
+ sizeof (ident
) - 1
2200 && (ISALNUM (ch
) || ch
== '@'));
2203 *str2
++ = TOLOWER (ch
);
2210 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2211 if (ch
== ptr
->string
[0]
2212 && len
== ptr
->length
2213 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2214 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2216 int reloc
= ptr
->reloc
;
2218 if (!ppc_obj64
&& (exp_p
->X_op
== O_big
|| exp_p
->X_add_number
!= 0))
2222 case BFD_RELOC_16_GOTOFF
:
2223 case BFD_RELOC_LO16_GOTOFF
:
2224 case BFD_RELOC_HI16_GOTOFF
:
2225 case BFD_RELOC_HI16_S_GOTOFF
:
2226 as_warn (_("symbol+offset@%s means symbol@%s+offset"),
2227 ptr
->string
, ptr
->string
);
2230 case BFD_RELOC_PPC_GOT_TLSGD16
:
2231 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2232 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2233 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2234 case BFD_RELOC_PPC_GOT_TLSLD16
:
2235 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2236 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2237 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2238 case BFD_RELOC_PPC_GOT_DTPREL16
:
2239 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2240 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2241 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2242 case BFD_RELOC_PPC_GOT_TPREL16
:
2243 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2244 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2245 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2246 as_bad (_("symbol+offset@%s not supported"), ptr
->string
);
2251 /* Now check for identifier@suffix+constant. */
2252 if (*str
== '-' || *str
== '+')
2254 char *orig_line
= input_line_pointer
;
2255 expressionS new_exp
;
2257 input_line_pointer
= str
;
2258 expression (&new_exp
);
2259 if (new_exp
.X_op
== O_constant
&& exp_p
->X_op
!= O_big
)
2261 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2262 str
= input_line_pointer
;
2264 input_line_pointer
= orig_line
;
2268 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2269 && exp_p
->X_op
== O_symbol
2270 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2272 /* Change the symbol so that the dummy .TOC. symbol can be
2273 omitted from the object file. */
2274 exp_p
->X_add_symbol
= &abs_symbol
;
2277 if (reloc
== BFD_RELOC_PPC64_REL24_NOTOC
2278 && (ppc_cpu
& PPC_OPCODE_POWER10
) == 0)
2279 reloc
= BFD_RELOC_PPC64_REL24_P9NOTOC
;
2281 return (bfd_reloc_code_real_type
) reloc
;
2284 return BFD_RELOC_NONE
;
2287 /* Support @got, etc. on constants emitted via .short, .int etc. */
2289 bfd_reloc_code_real_type
2290 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2293 if (nbytes
>= 2 && *input_line_pointer
== '@')
2294 return ppc_elf_suffix (&input_line_pointer
, exp
);
2295 return BFD_RELOC_NONE
;
2298 /* Warn when emitting data to code sections, unless we are emitting
2299 a relocation that ld --ppc476-workaround uses to recognise data
2300 *and* there was an unconditional branch prior to the data. */
2303 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2304 unsigned int nbytes
, fixS
*fix
)
2307 && (now_seg
->flags
& SEC_CODE
) != 0
2310 || !(fix
->fx_r_type
== BFD_RELOC_32
2311 || fix
->fx_r_type
== BFD_RELOC_CTOR
2312 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2313 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2314 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2315 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2316 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2317 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2318 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2319 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2321 /* Flag that we've warned. */
2325 as_warn (_("data in executable section"));
2329 /* Solaris pseduo op to change to the .rodata section. */
2331 ppc_elf_rdata (int xxx
)
2333 char *save_line
= input_line_pointer
;
2334 static char section
[] = ".rodata\n";
2336 /* Just pretend this is .section .rodata */
2337 input_line_pointer
= section
;
2338 obj_elf_section (xxx
);
2340 input_line_pointer
= save_line
;
2343 /* Pseudo op to make file scope bss items. */
2345 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2358 c
= get_symbol_name (&name
);
2360 /* Just after name is now '\0'. */
2361 p
= input_line_pointer
;
2363 SKIP_WHITESPACE_AFTER_NAME ();
2364 if (*input_line_pointer
!= ',')
2366 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2367 ignore_rest_of_line ();
2371 input_line_pointer
++; /* skip ',' */
2372 if ((size
= get_absolute_expression ()) < 0)
2374 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2375 ignore_rest_of_line ();
2379 /* The third argument to .lcomm is the alignment. */
2380 if (*input_line_pointer
!= ',')
2384 ++input_line_pointer
;
2385 align
= get_absolute_expression ();
2388 as_warn (_("ignoring bad alignment"));
2394 symbolP
= symbol_find_or_make (name
);
2397 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2399 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2400 S_GET_NAME (symbolP
));
2401 ignore_rest_of_line ();
2405 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2407 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2408 S_GET_NAME (symbolP
),
2409 (long) S_GET_VALUE (symbolP
),
2412 ignore_rest_of_line ();
2418 old_subsec
= now_subseg
;
2421 /* Convert to a power of 2 alignment. */
2422 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2425 as_bad (_("common alignment not a power of 2"));
2426 ignore_rest_of_line ();
2433 record_alignment (bss_section
, align2
);
2434 subseg_set (bss_section
, 1);
2436 frag_align (align2
, 0, 0);
2437 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2438 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2439 symbol_set_frag (symbolP
, frag_now
);
2440 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2443 S_SET_SIZE (symbolP
, size
);
2444 S_SET_SEGMENT (symbolP
, bss_section
);
2445 subseg_set (old_sec
, old_subsec
);
2446 demand_empty_rest_of_line ();
2449 /* Pseudo op to set symbol local entry point. */
2451 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2454 char c
= get_symbol_name (&name
);
2459 elf_symbol_type
*elfsym
;
2461 p
= input_line_pointer
;
2463 SKIP_WHITESPACE_AFTER_NAME ();
2464 if (*input_line_pointer
!= ',')
2467 as_bad (_("expected comma after name `%s' in .localentry directive"),
2470 ignore_rest_of_line ();
2473 input_line_pointer
++;
2475 if (exp
.X_op
== O_absent
)
2477 as_bad (_("missing expression in .localentry directive"));
2478 exp
.X_op
= O_constant
;
2479 exp
.X_add_number
= 0;
2482 sym
= symbol_find_or_make (name
);
2485 if (resolve_expression (&exp
)
2486 && exp
.X_op
== O_constant
)
2488 unsigned int encoded
, ok
;
2491 if (exp
.X_add_number
== 1 || exp
.X_add_number
== 7)
2492 encoded
= exp
.X_add_number
<< STO_PPC64_LOCAL_BIT
;
2495 encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2496 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2498 as_bad (_(".localentry expression for `%s' "
2499 "is not a valid power of 2"), S_GET_NAME (sym
));
2505 bfdsym
= symbol_get_bfdsym (sym
);
2506 elfsym
= elf_symbol_from (bfdsym
);
2507 gas_assert (elfsym
);
2508 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2509 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2510 if (ppc_abiversion
== 0)
2515 as_bad (_(".localentry expression for `%s' "
2516 "does not evaluate to a constant"), S_GET_NAME (sym
));
2518 demand_empty_rest_of_line ();
2521 /* Pseudo op to set ABI version. */
2523 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2528 if (exp
.X_op
== O_absent
)
2530 as_bad (_("missing expression in .abiversion directive"));
2531 exp
.X_op
= O_constant
;
2532 exp
.X_add_number
= 0;
2535 if (resolve_expression (&exp
)
2536 && exp
.X_op
== O_constant
)
2537 ppc_abiversion
= exp
.X_add_number
;
2539 as_bad (_(".abiversion expression does not evaluate to a constant"));
2540 demand_empty_rest_of_line ();
2543 /* Parse a .gnu_attribute directive. */
2545 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2547 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2549 /* Check validity of defined powerpc tags. */
2550 if (tag
== Tag_GNU_Power_ABI_FP
2551 || tag
== Tag_GNU_Power_ABI_Vector
2552 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2556 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2558 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2559 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2560 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2561 as_warn (_("unknown .gnu_attribute value"));
2565 /* Set ABI version in output file. */
2567 ppc_elf_md_finish (void)
2569 if (ppc_obj64
&& ppc_abiversion
!= 0)
2571 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2572 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2574 /* Any selection of opcodes based on ppc_cpu after gas has finished
2575 parsing the file is invalid. md_apply_fix and ppc_handle_align
2576 must select opcodes based on the machine in force at the point
2577 where the fixup or alignment frag was created, not the machine in
2578 force at the end of file. */
2582 /* Validate any relocations emitted for -mrelocatable, possibly adding
2583 fixups for word relocations in writable segments, so we can adjust
2586 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2588 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2597 case SHLIB_MRELOCATABLE
:
2598 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2599 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2600 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2601 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2602 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2603 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2604 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2605 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2606 && (seg
->flags
& SEC_LOAD
) != 0
2607 && strcmp (segment_name (seg
), ".got2") != 0
2608 && strcmp (segment_name (seg
), ".dtors") != 0
2609 && strcmp (segment_name (seg
), ".ctors") != 0
2610 && strcmp (segment_name (seg
), ".fixup") != 0
2611 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2612 && strcmp (segment_name (seg
), ".eh_frame") != 0
2613 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2615 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2616 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2618 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2619 _("relocation cannot be done when using -mrelocatable"));
2626 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2627 function descriptor sym if the corresponding code sym is used. */
2630 ppc_frob_file_before_adjust (void)
2638 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2644 name
= S_GET_NAME (symp
);
2648 if (! S_IS_WEAK (symp
)
2649 || S_IS_DEFINED (symp
))
2652 dotname
= concat (".", name
, (char *) NULL
);
2653 dotsym
= symbol_find_noref (dotname
, 1);
2655 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2656 || symbol_used_in_reloc_p (dotsym
)))
2657 symbol_mark_used (symp
);
2661 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2663 && toc_reloc_types
!= has_large_toc_reloc
2664 && bfd_section_size (toc
) > 0x10000)
2665 as_warn (_("TOC section size exceeds 64k"));
2668 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2669 emitted. Other uses of .TOC. will cause the symbol to be marked
2670 with BSF_KEEP in md_apply_fix. */
2673 ppc_elf_adjust_symtab (void)
2678 symp
= symbol_find (".TOC.");
2681 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2682 if ((bsym
->flags
& BSF_KEEP
) == 0)
2683 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2687 #endif /* OBJ_ELF */
2690 /* Parse XCOFF relocations. */
2691 static bfd_reloc_code_real_type
2692 ppc_xcoff_suffix (char **str_p
)
2696 unsigned int length
: 8;
2697 unsigned int valid32
: 1;
2698 unsigned int valid64
: 1;
2707 const struct map_bfd
*ptr
;
2709 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2710 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2711 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2713 static const struct map_bfd mapping
[] = {
2714 MAP ("l", BFD_RELOC_PPC_TOC16_LO
),
2715 MAP ("u", BFD_RELOC_PPC_TOC16_HI
),
2716 MAP32 ("ie", BFD_RELOC_PPC_TLSIE
),
2717 MAP32 ("ld", BFD_RELOC_PPC_TLSLD
),
2718 MAP32 ("le", BFD_RELOC_PPC_TLSLE
),
2719 MAP32 ("m", BFD_RELOC_PPC_TLSM
),
2720 MAP32 ("ml", BFD_RELOC_PPC_TLSML
),
2721 MAP64 ("ie", BFD_RELOC_PPC64_TLSIE
),
2722 MAP64 ("ld", BFD_RELOC_PPC64_TLSLD
),
2723 MAP64 ("le", BFD_RELOC_PPC64_TLSLE
),
2724 MAP64 ("m", BFD_RELOC_PPC64_TLSM
),
2725 MAP64 ("ml", BFD_RELOC_PPC64_TLSML
),
2729 return BFD_RELOC_NONE
;
2731 for (ch
= *str
, str2
= ident
;
2732 (str2
< ident
+ sizeof (ident
) - 1
2733 && (ISALNUM (ch
) || ch
== '@'));
2736 *str2
++ = TOLOWER (ch
);
2743 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2744 if (ch
== ptr
->string
[0]
2745 && len
== ptr
->length
2746 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2747 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2750 return (bfd_reloc_code_real_type
) ptr
->reloc
;
2753 return BFD_RELOC_NONE
;
2756 /* Restore XCOFF addis instruction to ELF format.
2757 AIX often generates addis instructions using "addis RT,D(RA)"
2758 format instead of the ELF "addis RT,RA,SI" one.
2759 On entry RT_E is at the comma after RT, D_E is at the open
2760 parenthesis after D, and RA_E is at the close parenthesis after RA. */
2762 ppc_xcoff_fixup_addis (char *rt_e
, char *d_e
, char *ra_e
)
2764 size_t ra_size
= ra_e
- d_e
- 1;
2765 char *save_ra
= xmalloc (ra_size
);
2768 memcpy (save_ra
, d_e
+ 1, ra_size
);
2769 /* Shuffle D to make room for RA, copying the comma too. */
2770 memmove (rt_e
+ ra_size
+ 1, rt_e
, d_e
- rt_e
);
2771 /* Erase the trailing ')', keeping any rubbish for potential errors. */
2772 memmove (ra_e
, ra_e
+ 1, strlen (ra_e
));
2773 /* Write RA back. */
2774 memcpy (rt_e
+ 1, save_ra
, ra_size
);
2778 /* Support @ie, etc. on constants emitted via .short, .int etc. */
2780 bfd_reloc_code_real_type
2781 ppc_xcoff_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2784 if (nbytes
>= 2 && *input_line_pointer
== '@')
2785 return ppc_xcoff_suffix (&input_line_pointer
);
2787 /* There isn't any @ symbol for default TLS relocations (R_TLS). */
2788 if (exp
->X_add_symbol
!= NULL
2789 && (symbol_get_tc (exp
->X_add_symbol
)->symbol_class
== XMC_TL
2790 || symbol_get_tc (exp
->X_add_symbol
)->symbol_class
== XMC_UL
))
2791 return (ppc_obj64
? BFD_RELOC_PPC64_TLSGD
: BFD_RELOC_PPC_TLSGD
);
2793 return BFD_RELOC_NONE
;
2796 #endif /* OBJ_XCOFF */
2798 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2799 /* See whether a symbol is in the TOC section. */
2802 ppc_is_toc_sym (symbolS
*sym
)
2805 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2806 || symbol_get_tc (sym
)->symbol_class
== XMC_TE
2807 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2810 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2812 return strcmp (sname
, ".toc") == 0;
2814 return strcmp (sname
, ".got") == 0;
2817 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2821 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2823 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2827 /* Check we don't already exist. */
2828 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2829 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2832 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2834 if (ppc_apuinfo_num_alloc
== 0)
2836 ppc_apuinfo_num_alloc
= 4;
2837 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2841 ppc_apuinfo_num_alloc
+= 4;
2842 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2843 ppc_apuinfo_num_alloc
);
2846 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2851 /* Various frobbings of labels and their addresses. */
2853 /* Symbols labelling the current insn. */
2854 struct insn_label_list
2856 struct insn_label_list
*next
;
2860 static struct insn_label_list
*insn_labels
;
2861 static struct insn_label_list
*free_insn_labels
;
2864 ppc_record_label (symbolS
*sym
)
2866 struct insn_label_list
*l
;
2868 if (free_insn_labels
== NULL
)
2869 l
= XNEW (struct insn_label_list
);
2872 l
= free_insn_labels
;
2873 free_insn_labels
= l
->next
;
2877 l
->next
= insn_labels
;
2882 ppc_clear_labels (void)
2884 while (insn_labels
!= NULL
)
2886 struct insn_label_list
*l
= insn_labels
;
2887 insn_labels
= l
->next
;
2888 l
->next
= free_insn_labels
;
2889 free_insn_labels
= l
;
2894 ppc_start_line_hook (void)
2896 ppc_clear_labels ();
2900 ppc_new_dot_label (symbolS
*sym
)
2902 ppc_record_label (sym
);
2904 /* Anchor this label to the current csect for relocations. */
2905 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2910 ppc_frob_label (symbolS
*sym
)
2912 ppc_record_label (sym
);
2915 /* Set the class of a label based on where it is defined. This handles
2916 symbols without suffixes. Also, move the symbol so that it follows
2917 the csect symbol. */
2918 if (ppc_current_csect
!= (symbolS
*) NULL
)
2920 if (symbol_get_tc (sym
)->symbol_class
== -1)
2921 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
2923 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
2924 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
2925 &symbol_rootP
, &symbol_lastP
);
2926 /* Update last csect symbol. */
2927 symbol_get_tc (ppc_current_csect
)->within
= sym
;
2929 /* Some labels like .bs are using within differently.
2930 So avoid changing it, if it's already set. */
2931 if (symbol_get_tc (sym
)->within
== NULL
)
2932 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2937 dwarf2_emit_label (sym
);
2941 /* We need to keep a list of fixups. We can't simply generate them as
2942 we go, because that would require us to first create the frag, and
2943 that would screw up references to ``.''. */
2949 bfd_reloc_code_real_type reloc
;
2952 #define MAX_INSN_FIXUPS (5)
2954 /* Return the field size operated on by RELOC, and whether it is
2955 pc-relative in PC_RELATIVE. */
2958 fixup_size (bfd_reloc_code_real_type reloc
, bool *pc_relative
)
2960 unsigned int size
= 0;
2965 /* This switch statement must handle all BFD_RELOC values
2966 possible in instruction fixups. As is, it handles all
2967 BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c,
2968 bfd/coff-rs6000.c and bfd/coff64-rs6000.c.
2969 Overkill since data and marker relocs need not be handled
2970 here, but this way we can be sure a needed fixup reloc isn't
2971 accidentally omitted. */
2972 case BFD_RELOC_PPC_EMB_MRKREF
:
2973 case BFD_RELOC_VTABLE_ENTRY
:
2974 case BFD_RELOC_VTABLE_INHERIT
:
2982 case BFD_RELOC_16_BASEREL
:
2983 case BFD_RELOC_16_GOTOFF
:
2984 case BFD_RELOC_GPREL16
:
2985 case BFD_RELOC_HI16
:
2986 case BFD_RELOC_HI16_BASEREL
:
2987 case BFD_RELOC_HI16_GOTOFF
:
2988 case BFD_RELOC_HI16_PLTOFF
:
2989 case BFD_RELOC_HI16_S
:
2990 case BFD_RELOC_HI16_S_BASEREL
:
2991 case BFD_RELOC_HI16_S_GOTOFF
:
2992 case BFD_RELOC_HI16_S_PLTOFF
:
2993 case BFD_RELOC_LO16
:
2994 case BFD_RELOC_LO16_BASEREL
:
2995 case BFD_RELOC_LO16_GOTOFF
:
2996 case BFD_RELOC_LO16_PLTOFF
:
2997 case BFD_RELOC_PPC64_ADDR16_DS
:
2998 case BFD_RELOC_PPC64_ADDR16_HIGH
:
2999 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3000 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
3001 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
3002 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
3003 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
3004 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
3005 case BFD_RELOC_PPC64_DTPREL16_DS
:
3006 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
3007 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
3008 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
3009 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
3010 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
3011 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
3012 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
3013 case BFD_RELOC_PPC64_GOT16_DS
:
3014 case BFD_RELOC_PPC64_GOT16_LO_DS
:
3015 case BFD_RELOC_PPC64_HIGHER
:
3016 case BFD_RELOC_PPC64_HIGHER_S
:
3017 case BFD_RELOC_PPC64_HIGHEST
:
3018 case BFD_RELOC_PPC64_HIGHEST_S
:
3019 case BFD_RELOC_PPC64_PLT16_LO_DS
:
3020 case BFD_RELOC_PPC64_PLTGOT16
:
3021 case BFD_RELOC_PPC64_PLTGOT16_DS
:
3022 case BFD_RELOC_PPC64_PLTGOT16_HA
:
3023 case BFD_RELOC_PPC64_PLTGOT16_HI
:
3024 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3025 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
3026 case BFD_RELOC_PPC64_SECTOFF_DS
:
3027 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
3028 case BFD_RELOC_PPC64_TOC16_DS
:
3029 case BFD_RELOC_PPC64_TOC16_HA
:
3030 case BFD_RELOC_PPC64_TOC16_HI
:
3031 case BFD_RELOC_PPC64_TOC16_LO
:
3032 case BFD_RELOC_PPC64_TOC16_LO_DS
:
3033 case BFD_RELOC_PPC64_TPREL16_DS
:
3034 case BFD_RELOC_PPC64_TPREL16_HIGH
:
3035 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
3036 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
3037 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
3038 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
3039 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
3040 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
3042 case BFD_RELOC_PPC_BA16
:
3044 case BFD_RELOC_PPC_DTPREL16
:
3045 case BFD_RELOC_PPC_DTPREL16_HA
:
3046 case BFD_RELOC_PPC_DTPREL16_HI
:
3047 case BFD_RELOC_PPC_DTPREL16_LO
:
3048 case BFD_RELOC_PPC_EMB_NADDR16
:
3049 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
3050 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
3051 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
3052 case BFD_RELOC_PPC_EMB_RELSDA
:
3053 case BFD_RELOC_PPC_EMB_RELSEC16
:
3054 case BFD_RELOC_PPC_EMB_RELST_LO
:
3055 case BFD_RELOC_PPC_EMB_RELST_HI
:
3056 case BFD_RELOC_PPC_EMB_RELST_HA
:
3057 case BFD_RELOC_PPC_EMB_SDA2I16
:
3058 case BFD_RELOC_PPC_EMB_SDA2REL
:
3059 case BFD_RELOC_PPC_EMB_SDAI16
:
3060 case BFD_RELOC_PPC_GOT_DTPREL16
:
3061 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
3062 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
3063 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3064 case BFD_RELOC_PPC_GOT_TLSGD16
:
3065 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
3066 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
3067 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
3068 case BFD_RELOC_PPC_GOT_TLSLD16
:
3069 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
3070 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
3071 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
3072 case BFD_RELOC_PPC_GOT_TPREL16
:
3073 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
3074 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
3075 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3076 case BFD_RELOC_PPC_TOC16
:
3077 case BFD_RELOC_PPC_TOC16_HI
:
3078 case BFD_RELOC_PPC_TOC16_LO
:
3079 case BFD_RELOC_PPC_TPREL16
:
3080 case BFD_RELOC_PPC_TPREL16_HA
:
3081 case BFD_RELOC_PPC_TPREL16_HI
:
3082 case BFD_RELOC_PPC_TPREL16_LO
:
3086 case BFD_RELOC_16_PCREL
:
3087 case BFD_RELOC_HI16_PCREL
:
3088 case BFD_RELOC_HI16_S_PCREL
:
3089 case BFD_RELOC_LO16_PCREL
:
3090 case BFD_RELOC_PPC64_REL16_HIGH
:
3091 case BFD_RELOC_PPC64_REL16_HIGHA
:
3092 case BFD_RELOC_PPC64_REL16_HIGHER
:
3093 case BFD_RELOC_PPC64_REL16_HIGHER34
:
3094 case BFD_RELOC_PPC64_REL16_HIGHERA
:
3095 case BFD_RELOC_PPC64_REL16_HIGHERA34
:
3096 case BFD_RELOC_PPC64_REL16_HIGHEST
:
3097 case BFD_RELOC_PPC64_REL16_HIGHEST34
:
3098 case BFD_RELOC_PPC64_REL16_HIGHESTA
:
3099 case BFD_RELOC_PPC64_REL16_HIGHESTA34
:
3101 case BFD_RELOC_PPC_B16
:
3103 case BFD_RELOC_PPC_VLE_REL8
:
3109 case BFD_RELOC_32_PLTOFF
:
3111 case BFD_RELOC_CTOR
:
3113 case BFD_RELOC_PPC64_ENTRY
:
3114 case BFD_RELOC_PPC_16DX_HA
:
3116 case BFD_RELOC_PPC_BA16
:
3118 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
3119 case BFD_RELOC_PPC_BA16_BRTAKEN
:
3120 case BFD_RELOC_PPC_BA26
:
3121 case BFD_RELOC_PPC_EMB_BIT_FLD
:
3122 case BFD_RELOC_PPC_EMB_NADDR32
:
3123 case BFD_RELOC_PPC_EMB_SDA21
:
3124 case BFD_RELOC_PPC_TLS
:
3125 case BFD_RELOC_PPC_TLSGD
:
3126 case BFD_RELOC_PPC_TLSLD
:
3127 case BFD_RELOC_PPC_TLSLE
:
3128 case BFD_RELOC_PPC_TLSIE
:
3129 case BFD_RELOC_PPC_TLSM
:
3130 case BFD_RELOC_PPC_TLSML
:
3131 case BFD_RELOC_PPC_VLE_HA16A
:
3132 case BFD_RELOC_PPC_VLE_HA16D
:
3133 case BFD_RELOC_PPC_VLE_HI16A
:
3134 case BFD_RELOC_PPC_VLE_HI16D
:
3135 case BFD_RELOC_PPC_VLE_LO16A
:
3136 case BFD_RELOC_PPC_VLE_LO16D
:
3137 case BFD_RELOC_PPC_VLE_SDA21
:
3138 case BFD_RELOC_PPC_VLE_SDA21_LO
:
3139 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3140 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
3141 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3142 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
3143 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3144 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
3145 case BFD_RELOC_PPC64_TLS_PCREL
:
3150 case BFD_RELOC_24_PLT_PCREL
:
3151 case BFD_RELOC_32_PCREL
:
3152 case BFD_RELOC_32_PLT_PCREL
:
3153 case BFD_RELOC_PPC64_REL24_NOTOC
:
3154 case BFD_RELOC_PPC64_REL24_P9NOTOC
:
3156 case BFD_RELOC_PPC_B16
:
3158 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3159 case BFD_RELOC_PPC_B16_BRTAKEN
:
3160 case BFD_RELOC_PPC_B26
:
3161 case BFD_RELOC_PPC_LOCAL24PC
:
3162 case BFD_RELOC_PPC_REL16DX_HA
:
3163 case BFD_RELOC_PPC_VLE_REL15
:
3164 case BFD_RELOC_PPC_VLE_REL24
:
3170 case BFD_RELOC_CTOR
:
3172 case BFD_RELOC_PPC_COPY
:
3173 case BFD_RELOC_PPC_DTPMOD
:
3174 case BFD_RELOC_PPC_DTPREL
:
3175 case BFD_RELOC_PPC_GLOB_DAT
:
3176 case BFD_RELOC_PPC_TPREL
:
3177 size
= ppc_obj64
? 8 : 4;
3181 case BFD_RELOC_64_PLTOFF
:
3182 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
3183 case BFD_RELOC_PPC64_D28
:
3184 case BFD_RELOC_PPC64_D34
:
3185 case BFD_RELOC_PPC64_D34_LO
:
3186 case BFD_RELOC_PPC64_D34_HI30
:
3187 case BFD_RELOC_PPC64_D34_HA30
:
3188 case BFD_RELOC_PPC64_TPREL34
:
3189 case BFD_RELOC_PPC64_DTPREL34
:
3190 case BFD_RELOC_PPC64_TOC
:
3191 case BFD_RELOC_PPC64_TLSGD
:
3192 case BFD_RELOC_PPC64_TLSLD
:
3193 case BFD_RELOC_PPC64_TLSLE
:
3194 case BFD_RELOC_PPC64_TLSIE
:
3195 case BFD_RELOC_PPC64_TLSM
:
3196 case BFD_RELOC_PPC64_TLSML
:
3200 case BFD_RELOC_64_PCREL
:
3201 case BFD_RELOC_64_PLT_PCREL
:
3202 case BFD_RELOC_PPC64_GOT_PCREL34
:
3203 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
3204 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
3205 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
3206 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
3207 case BFD_RELOC_PPC64_PCREL28
:
3208 case BFD_RELOC_PPC64_PCREL34
:
3209 case BFD_RELOC_PPC64_PLT_PCREL34
:
3218 if (ENABLE_CHECKING
)
3220 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
3221 if (reloc_howto
!= NULL
3222 && (size
!= bfd_get_reloc_size (reloc_howto
)
3223 || pcrel
!= reloc_howto
->pc_relative
))
3225 as_bad (_("%s howto doesn't match size/pcrel in gas"),
3230 *pc_relative
= pcrel
;
3235 /* If we have parsed a call to __tls_get_addr, parse an argument like
3236 (gd0@tlsgd). *STR is the leading parenthesis on entry. If an arg
3237 is successfully parsed, *STR is updated past the trailing
3238 parenthesis and trailing white space, and *TLS_FIX contains the
3239 reloc and arg expression. */
3242 parse_tls_arg (char **str
, const expressionS
*exp
, struct ppc_fixup
*tls_fix
)
3244 const char *sym_name
= S_GET_NAME (exp
->X_add_symbol
);
3245 if (sym_name
[0] == '.')
3248 tls_fix
->reloc
= BFD_RELOC_NONE
;
3249 if (strncasecmp (sym_name
, "__tls_get_addr", 14) == 0
3250 && (sym_name
[14] == 0
3251 || strcasecmp (sym_name
+ 14, "_desc") == 0
3252 || strcasecmp (sym_name
+ 14, "_opt") == 0))
3254 char *hold
= input_line_pointer
;
3255 input_line_pointer
= *str
+ 1;
3256 expression (&tls_fix
->exp
);
3257 if (tls_fix
->exp
.X_op
== O_symbol
)
3259 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3260 tls_fix
->reloc
= BFD_RELOC_PPC_TLSGD
;
3261 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3262 tls_fix
->reloc
= BFD_RELOC_PPC_TLSLD
;
3263 if (tls_fix
->reloc
!= BFD_RELOC_NONE
)
3265 input_line_pointer
+= 7;
3267 *str
= input_line_pointer
;
3270 input_line_pointer
= hold
;
3272 return tls_fix
->reloc
!= BFD_RELOC_NONE
;
3276 /* This routine is called for each instruction to be assembled. */
3279 md_assemble (char *str
)
3282 const struct powerpc_opcode
*opcode
;
3284 const ppc_opindex_t
*opindex_ptr
;
3287 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
3292 unsigned int insn_length
;
3294 /* Get the opcode. */
3295 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
); s
++)
3300 /* Look up the opcode in the hash table. */
3301 opcode
= (const struct powerpc_opcode
*) str_hash_find (ppc_hash
, str
);
3302 if (opcode
== (const struct powerpc_opcode
*) NULL
)
3304 as_bad (_("unrecognized opcode: `%s'"), str
);
3305 ppc_clear_labels ();
3309 insn
= opcode
->opcode
;
3310 if (!target_big_endian
3311 && ((insn
& ~(1 << 26)) == 46u << 26
3312 || (insn
& ~(0xc0 << 1)) == (31u << 26 | 533 << 1)))
3314 /* lmw, stmw, lswi, lswx, stswi, stswx */
3315 as_bad (_("`%s' invalid when little-endian"), str
);
3316 ppc_clear_labels ();
3321 while (ISSPACE (*str
))
3325 /* AIX often generates addis instructions using "addis RT, D(RA)"
3326 format instead of the classic "addis RT, RA, SI" one.
3327 Restore it to the default format as it's the one encoded
3329 if (!strcmp (opcode
->name
, "addis"))
3331 char *rt_e
= strchr (str
, ',');
3333 && strchr (rt_e
+ 1, ',') == NULL
)
3335 char *d_e
= strchr (rt_e
+ 1, '(');
3336 if (d_e
!= NULL
&& d_e
!= rt_e
+ 1)
3338 char *ra_e
= strrchr (d_e
+ 1, ')');
3339 if (ra_e
!= NULL
&& ra_e
!= d_e
+ 1)
3340 ppc_xcoff_fixup_addis (rt_e
, d_e
, ra_e
);
3346 /* PowerPC operands are just expressions. The only real issue is
3347 that a few operand types are optional. If an instruction has
3348 multiple optional operands and one is omitted, then all optional
3349 operands past the first omitted one must also be omitted. */
3350 int num_optional_operands
= 0;
3351 int num_optional_provided
= 0;
3353 /* Gather the operands. */
3357 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
3359 const struct powerpc_operand
*operand
;
3365 if (next_opindex
== 0)
3366 operand
= &powerpc_operands
[*opindex_ptr
];
3369 operand
= &powerpc_operands
[next_opindex
];
3374 /* If this is an optional operand, and we are skipping it, just
3375 insert the default value, usually a zero. */
3376 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3377 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
3379 if (num_optional_operands
== 0)
3381 const ppc_opindex_t
*optr
;
3387 for (optr
= opindex_ptr
; *optr
!= 0; optr
++)
3389 const struct powerpc_operand
*op
;
3390 op
= &powerpc_operands
[*optr
];
3394 if ((op
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3395 && !((op
->flags
& PPC_OPERAND_OPTIONAL32
) != 0
3397 ++num_optional_operands
;
3399 if (s
!= NULL
&& *s
!= '\0')
3403 /* Look for the start of the next operand. */
3404 if ((op
->flags
& PPC_OPERAND_PARENS
) != 0)
3405 s
= strpbrk (s
, "(,");
3407 s
= strchr (s
, ',');
3413 omitted
= total
- provided
;
3414 num_optional_provided
= num_optional_operands
- omitted
;
3416 if (--num_optional_provided
< 0)
3418 uint64_t val
= ppc_optional_operand_value (operand
, insn
, ppc_cpu
,
3419 num_optional_provided
);
3420 if (operand
->insert
)
3422 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
3423 if (errmsg
!= (const char *) NULL
)
3424 as_bad ("%s", errmsg
);
3426 else if (operand
->shift
>= 0)
3427 insn
|= (val
& operand
->bitm
) << operand
->shift
;
3429 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
3431 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
3432 next_opindex
= *opindex_ptr
+ 1;
3437 /* Gather the operand. */
3438 hold
= input_line_pointer
;
3439 input_line_pointer
= str
;
3442 && (((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3443 || ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)))
3444 || !register_name (&ex
))
3446 char save_lex
= lex_type
['%'];
3448 if (((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)
3449 || (operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3452 lex_type
['%'] |= LEX_BEGIN_NAME
;
3456 lex_type
['%'] = save_lex
;
3459 str
= input_line_pointer
;
3460 input_line_pointer
= hold
;
3462 if (ex
.X_op
== O_illegal
)
3463 as_bad (_("illegal operand"));
3464 else if (ex
.X_op
== O_absent
)
3465 as_bad (_("missing operand"));
3466 else if (ex
.X_op
== O_register
)
3470 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
3471 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
3472 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
| PPC_OPERAND_ACC
)) != 0
3473 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
3474 && ex
.X_add_number
!= 0
3475 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
3476 as_warn (_("invalid register expression"));
3477 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3478 ppc_cpu
, (char *) NULL
, 0);
3480 else if (ex
.X_op
== O_constant
3481 || (ex
.X_op
== O_big
&& ex
.X_add_number
> 0))
3484 if (ex
.X_op
== O_constant
)
3486 val
= ex
.X_add_number
;
3487 if (sizeof (ex
.X_add_number
) < sizeof (val
)
3488 && (ex
.X_add_number
< 0) != ex
.X_extrabit
)
3489 val
= val
^ ((addressT
) -1 ^ (uint64_t) -1);
3492 val
= generic_bignum_to_int64 ();
3494 /* Allow @HA, @L, @H on constants. */
3495 char *orig_str
= str
;
3496 bfd_reloc_code_real_type reloc
= ppc_elf_suffix (&str
, &ex
);
3498 if (ex
.X_op
== O_constant
)
3500 val
= ex
.X_add_number
;
3501 if (sizeof (ex
.X_add_number
) < sizeof (val
)
3502 && (ex
.X_add_number
< 0) != ex
.X_extrabit
)
3503 val
= val
^ ((addressT
) -1 ^ (uint64_t) -1);
3505 if (reloc
!= BFD_RELOC_NONE
)
3512 case BFD_RELOC_LO16
:
3514 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3518 case BFD_RELOC_HI16
:
3519 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3521 /* PowerPC64 @h is tested for overflow. */
3523 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3525 uint64_t sign
= (((uint64_t) -1 >> 16) + 1) >> 1;
3526 val
= (val
^ sign
) - sign
;
3532 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3534 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3538 case BFD_RELOC_HI16_S
:
3539 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3541 /* PowerPC64 @ha is tested for overflow. */
3542 val
= (val
+ 0x8000) >> 16;
3543 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3545 uint64_t sign
= (((uint64_t) -1 >> 16) + 1) >> 1;
3546 val
= (val
^ sign
) - sign
;
3552 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3554 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3558 case BFD_RELOC_PPC64_HIGHER
:
3559 val
= PPC_HIGHER (val
);
3560 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3564 case BFD_RELOC_PPC64_HIGHER_S
:
3565 val
= PPC_HIGHERA (val
);
3566 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3570 case BFD_RELOC_PPC64_HIGHEST
:
3571 val
= PPC_HIGHEST (val
);
3572 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3576 case BFD_RELOC_PPC64_HIGHEST_S
:
3577 val
= PPC_HIGHESTA (val
);
3578 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3582 #endif /* OBJ_ELF */
3583 insn
= ppc_insert_operand (insn
, operand
, val
, ppc_cpu
, NULL
, 0);
3587 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3589 /* Look for a __tls_get_addr arg using the insane old syntax. */
3590 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3591 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3593 fixups
[fc
].opindex
= *opindex_ptr
;
3597 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3599 /* If VLE-mode convert LO/HI/HA relocations. */
3600 if (opcode
->flags
& PPC_OPCODE_VLE
)
3602 uint64_t tmp_insn
= insn
& opcode
->mask
;
3604 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3605 || tmp_insn
== E_AND2I_DOT_INSN
3606 || tmp_insn
== E_OR2IS_INSN
3607 || tmp_insn
== E_LI_INSN
3608 || tmp_insn
== E_LIS_INSN
3609 || tmp_insn
== E_AND2IS_DOT_INSN
);
3612 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3613 || tmp_insn
== E_ADD2IS_INSN
3614 || tmp_insn
== E_CMP16I_INSN
3615 || tmp_insn
== E_MULL2I_INSN
3616 || tmp_insn
== E_CMPL16I_INSN
3617 || tmp_insn
== E_CMPH16I_INSN
3618 || tmp_insn
== E_CMPHL16I_INSN
);
3625 case BFD_RELOC_PPC_EMB_SDA21
:
3626 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3629 case BFD_RELOC_LO16
:
3631 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3632 else if (use_a_reloc
)
3633 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3636 case BFD_RELOC_HI16
:
3638 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3639 else if (use_a_reloc
)
3640 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3643 case BFD_RELOC_HI16_S
:
3645 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3646 else if (use_a_reloc
)
3647 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3650 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3652 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3655 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3657 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3660 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3662 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3667 /* TLS and other tweaks. */
3673 case BFD_RELOC_PPC_TLS
:
3674 case BFD_RELOC_PPC64_TLS_PCREL
:
3675 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3676 as_bad (_("@tls may not be used with \"%s\" operands"),
3678 else if (operand
->shift
!= 11)
3679 as_bad (_("@tls may only be used in last operand"));
3681 insn
= ppc_insert_operand (insn
, operand
,
3683 ppc_cpu
, (char *) NULL
, 0);
3686 /* We'll only use the 32 (or 64) bit form of these relocations
3687 in constants. Instructions get the 16 or 34 bit form. */
3688 case BFD_RELOC_PPC_DTPREL
:
3689 if (operand
->bitm
== 0x3ffffffffULL
)
3690 reloc
= BFD_RELOC_PPC64_DTPREL34
;
3692 reloc
= BFD_RELOC_PPC_DTPREL16
;
3695 case BFD_RELOC_PPC_TPREL
:
3696 if (operand
->bitm
== 0x3ffffffffULL
)
3697 reloc
= BFD_RELOC_PPC64_TPREL34
;
3699 reloc
= BFD_RELOC_PPC_TPREL16
;
3702 case BFD_RELOC_PPC64_PCREL34
:
3703 if (operand
->bitm
== 0xfffffffULL
)
3705 reloc
= BFD_RELOC_PPC64_PCREL28
;
3709 case BFD_RELOC_PPC64_GOT_PCREL34
:
3710 case BFD_RELOC_PPC64_PLT_PCREL34
:
3711 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
3712 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
3713 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
3714 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
3715 if (operand
->bitm
!= 0x3ffffffffULL
3716 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3717 as_warn (_("%s unsupported on this instruction"), "@pcrel");
3720 case BFD_RELOC_LO16
:
3721 if (operand
->bitm
== 0x3ffffffffULL
3722 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3723 reloc
= BFD_RELOC_PPC64_D34_LO
;
3724 else if ((operand
->bitm
| 0xf) != 0xffff
3725 || operand
->shift
!= 0
3726 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3727 as_warn (_("%s unsupported on this instruction"), "@l");
3730 case BFD_RELOC_HI16
:
3731 if (operand
->bitm
== 0x3ffffffffULL
3732 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3733 reloc
= BFD_RELOC_PPC64_D34_HI30
;
3734 else if (operand
->bitm
!= 0xffff
3735 || operand
->shift
!= 0
3736 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3737 as_warn (_("%s unsupported on this instruction"), "@h");
3740 case BFD_RELOC_HI16_S
:
3741 if (operand
->bitm
== 0x3ffffffffULL
3742 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3743 reloc
= BFD_RELOC_PPC64_D34_HA30
;
3744 else if (operand
->bitm
== 0xffff
3745 && operand
->shift
== (int) PPC_OPSHIFT_INV
3746 && opcode
->opcode
== (19 << 26) + (2 << 1))
3748 reloc
= BFD_RELOC_PPC_16DX_HA
;
3749 else if (operand
->bitm
!= 0xffff
3750 || operand
->shift
!= 0
3751 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3752 as_warn (_("%s unsupported on this instruction"), "@ha");
3755 #endif /* OBJ_ELF */
3757 reloc
= ppc_xcoff_suffix (&str
);
3758 #endif /* OBJ_XCOFF */
3760 if (reloc
!= BFD_RELOC_NONE
)
3762 /* Determine a BFD reloc value based on the operand information.
3763 We are only prepared to turn a few of the operands into
3765 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3766 | PPC_OPERAND_ABSOLUTE
)) != 0
3767 && operand
->bitm
== 0x3fffffc
3768 && operand
->shift
== 0)
3769 reloc
= BFD_RELOC_PPC_B26
;
3770 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3771 | PPC_OPERAND_ABSOLUTE
)) != 0
3772 && operand
->bitm
== 0xfffc
3773 && operand
->shift
== 0)
3774 reloc
= BFD_RELOC_PPC_B16
;
3775 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3776 && operand
->bitm
== 0x1fe
3777 && operand
->shift
== -1)
3778 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3779 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3780 && operand
->bitm
== 0xfffe
3781 && operand
->shift
== 0)
3782 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3783 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3784 && operand
->bitm
== 0x1fffffe
3785 && operand
->shift
== 0)
3786 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3787 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3788 && (operand
->bitm
& 0xfff0) == 0xfff0
3789 && operand
->shift
== 0)
3791 reloc
= BFD_RELOC_16
;
3792 #if defined OBJ_XCOFF || defined OBJ_ELF
3793 /* Note: the symbol may be not yet defined. */
3794 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3795 && ppc_is_toc_sym (ex
.X_add_symbol
))
3797 reloc
= BFD_RELOC_PPC_TOC16
;
3799 as_warn (_("assuming %s on symbol"),
3800 ppc_obj64
? "@toc" : "@xgot");
3805 else if (operand
->bitm
== 0x3ffffffffULL
)
3806 reloc
= BFD_RELOC_PPC64_D34
;
3807 else if (operand
->bitm
== 0xfffffffULL
)
3808 reloc
= BFD_RELOC_PPC64_D28
;
3810 /* For the absolute forms of branches, convert the PC
3811 relative form back into the absolute. */
3812 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3816 case BFD_RELOC_PPC_B26
:
3817 reloc
= BFD_RELOC_PPC_BA26
;
3819 case BFD_RELOC_PPC_B16
:
3820 reloc
= BFD_RELOC_PPC_BA16
;
3823 case BFD_RELOC_PPC_B16_BRTAKEN
:
3824 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3826 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3827 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3838 case BFD_RELOC_PPC_TOC16
:
3839 toc_reloc_types
|= has_small_toc_reloc
;
3841 case BFD_RELOC_PPC64_TOC16_LO
:
3842 case BFD_RELOC_PPC64_TOC16_HI
:
3843 case BFD_RELOC_PPC64_TOC16_HA
:
3844 toc_reloc_types
|= has_large_toc_reloc
;
3851 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3856 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3859 case BFD_RELOC_LO16
:
3860 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3863 case BFD_RELOC_16_GOTOFF
:
3864 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3867 case BFD_RELOC_LO16_GOTOFF
:
3868 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3871 case BFD_RELOC_LO16_PLTOFF
:
3872 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3875 case BFD_RELOC_16_BASEREL
:
3876 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3879 case BFD_RELOC_LO16_BASEREL
:
3880 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3883 case BFD_RELOC_PPC_TOC16
:
3884 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3887 case BFD_RELOC_PPC64_TOC16_LO
:
3888 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3891 case BFD_RELOC_PPC64_PLTGOT16
:
3892 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3895 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3896 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3899 case BFD_RELOC_PPC_DTPREL16
:
3900 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3903 case BFD_RELOC_PPC_DTPREL16_LO
:
3904 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3907 case BFD_RELOC_PPC_TPREL16
:
3908 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3911 case BFD_RELOC_PPC_TPREL16_LO
:
3912 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3915 case BFD_RELOC_PPC_GOT_DTPREL16
:
3916 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3917 case BFD_RELOC_PPC_GOT_TPREL16
:
3918 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3922 as_bad (_("unsupported relocation for DS offset field"));
3927 /* Look for a __tls_get_addr arg after any __tls_get_addr
3928 modifiers like @plt. This fixup must be emitted before
3929 the usual call fixup. */
3930 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3931 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3933 fixups
[fc
].opindex
= *opindex_ptr
;
3938 /* We need to generate a fixup for this expression. */
3939 if (fc
>= MAX_INSN_FIXUPS
)
3940 as_fatal (_("too many fixups"));
3941 fixups
[fc
].exp
= ex
;
3942 fixups
[fc
].opindex
= *opindex_ptr
;
3943 fixups
[fc
].reloc
= reloc
;
3951 /* If expecting more operands, then we want to see "),". */
3952 if (*str
== endc
&& opindex_ptr
[1] != 0)
3956 while (ISSPACE (*str
));
3960 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
3965 /* The call to expression should have advanced str past any
3973 else if (*str
!= '\0')
3975 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
3978 else if (endc
== ')')
3980 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
3985 while (ISSPACE (*str
))
3989 as_bad (_("junk at end of line: `%s'"), str
);
3992 /* Do we need/want an APUinfo section? */
3993 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
3996 /* These are all version "1". */
3997 if (opcode
->flags
& PPC_OPCODE_SPE
)
3998 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
3999 if (opcode
->flags
& PPC_OPCODE_ISEL
)
4000 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
4001 if (opcode
->flags
& PPC_OPCODE_EFS
)
4002 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
4003 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
4004 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
4005 if (opcode
->flags
& PPC_OPCODE_PMR
)
4006 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
4007 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
4008 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
4009 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
4010 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
4011 /* Only set the VLE flag if the instruction has been pulled via
4012 the VLE instruction set. This way the flag is guaranteed to
4013 be set for VLE-only instructions or for VLE-only processors,
4014 however it'll remain clear for dual-mode instructions on
4015 dual-mode and, more importantly, standard-mode processors. */
4016 if ((ppc_cpu
& opcode
->flags
) == PPC_OPCODE_VLE
)
4018 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
4019 if (elf_section_data (now_seg
) != NULL
)
4020 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
4025 /* Write out the instruction. */
4028 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
4029 /* All instructions can start on a 2 byte boundary for VLE. */
4032 if (frag_now
->insn_addr
!= addr_mask
)
4034 /* Don't emit instructions to a frag started for data, or for a
4035 CPU differing in VLE mode. Data is allowed to be misaligned,
4036 and it's possible to start a new frag in the middle of
4038 frag_wane (frag_now
);
4042 /* Check that insns within the frag are aligned. ppc_frag_check
4043 will ensure that the frag start address is aligned. */
4044 if ((frag_now_fix () & addr_mask
) != 0)
4045 as_bad (_("instruction address is not a multiple of %d"), addr_mask
+ 1);
4047 /* Differentiate between two, four, and eight byte insns. */
4049 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && PPC_OP_SE_VLE (insn
))
4051 else if ((opcode
->flags
& PPC_OPCODE_POWER10
) != 0
4052 && PPC_PREFIX_P (insn
))
4054 struct insn_label_list
*l
;
4058 /* 8-byte prefix instructions are not allowed to cross 64-byte
4060 frag_align_code (6, 4);
4061 record_alignment (now_seg
, 6);
4063 /* Update alignment of the containing csect. */
4064 if (symbol_get_tc (ppc_current_csect
)->align
< 6)
4065 symbol_get_tc (ppc_current_csect
)->align
= 6;
4068 /* Update "dot" in any expressions used by this instruction, and
4069 a label attached to the instruction. By "attached" we mean
4070 on the same source line as the instruction and without any
4071 intervening semicolons. */
4072 dot_value
= frag_now_fix ();
4073 dot_frag
= frag_now
;
4074 for (l
= insn_labels
; l
!= NULL
; l
= l
->next
)
4076 symbol_set_frag (l
->label
, dot_frag
);
4077 S_SET_VALUE (l
->label
, dot_value
);
4081 ppc_clear_labels ();
4083 f
= frag_more (insn_length
);
4084 frag_now
->insn_addr
= addr_mask
;
4086 /* The prefix part of an 8-byte instruction always occupies the lower
4087 addressed word in a doubleword, regardless of endianness. */
4088 if (insn_length
== 8
4089 && (sizeof (insn
) > sizeof (valueT
) || !target_big_endian
))
4091 md_number_to_chars (f
, PPC_GET_PREFIX (insn
), 4);
4092 md_number_to_chars (f
+ 4, PPC_GET_SUFFIX (insn
), 4);
4095 md_number_to_chars (f
, insn
, insn_length
);
4099 last_subseg
= now_subseg
;
4102 dwarf2_emit_insn (insn_length
);
4105 /* Create any fixups. */
4106 for (i
= 0; i
< fc
; i
++)
4109 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
4112 unsigned int size
= fixup_size (fixups
[i
].reloc
, &pcrel
);
4113 int offset
= target_big_endian
? (insn_length
- size
) : 0;
4115 fixP
= fix_new_exp (frag_now
,
4116 f
- frag_now
->fr_literal
+ offset
,
4124 const struct powerpc_operand
*operand
;
4126 operand
= &powerpc_operands
[fixups
[i
].opindex
];
4127 fixP
= fix_new_exp (frag_now
,
4128 f
- frag_now
->fr_literal
,
4131 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
4134 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
4139 /* For ELF, add support for SHT_ORDERED. */
4142 ppc_section_type (char *str
, size_t len
)
4144 if (len
== 7 && startswith (str
, "ordered"))
4151 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
4153 if (type
== SHT_ORDERED
)
4154 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
4160 ppc_elf_section_letter (int letter
, const char **ptrmsg
)
4165 *ptrmsg
= _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
4168 #endif /* OBJ_ELF */
4171 /* Pseudo-op handling. */
4173 /* The .byte pseudo-op. This is similar to the normal .byte
4174 pseudo-op, but it can also take a single ASCII string. */
4177 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
4181 if (*input_line_pointer
!= '\"')
4187 /* Gather characters. A real double quote is doubled. Unusual
4188 characters are not permitted. */
4189 ++input_line_pointer
;
4194 c
= *input_line_pointer
++;
4198 if (*input_line_pointer
!= '\"')
4200 ++input_line_pointer
;
4203 FRAG_APPEND_1_CHAR (c
);
4207 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
4208 as_warn (_("data in executable section"));
4209 demand_empty_rest_of_line ();
4214 /* XCOFF specific pseudo-op handling. */
4216 /* This is set if we are creating a .stabx symbol, since we don't want
4217 to handle symbol suffixes for such symbols. */
4218 static bool ppc_stab_symbol
;
4220 /* Retrieve the visiblity input for pseudo-ops having ones. */
4221 static unsigned short
4222 ppc_xcoff_get_visibility (void) {
4225 if (startswith (input_line_pointer
, "exported"))
4227 input_line_pointer
+= 8;
4228 return SYM_V_EXPORTED
;
4231 if (startswith (input_line_pointer
, "hidden"))
4233 input_line_pointer
+= 6;
4234 return SYM_V_HIDDEN
;
4237 if (startswith (input_line_pointer
, "internal"))
4239 input_line_pointer
+= 8;
4240 return SYM_V_INTERNAL
;
4243 if (startswith (input_line_pointer
, "protected"))
4245 input_line_pointer
+= 9;
4246 return SYM_V_PROTECTED
;
4252 /* Retrieve visiblity using GNU syntax. */
4253 static void ppc_GNU_visibility (int visibility
) {
4257 coff_symbol_type
*coffsym
;
4261 if ((name
= read_symbol_name ()) == NULL
)
4263 symbolP
= symbol_find_or_make (name
);
4265 coffsym
= coffsymbol (symbol_get_bfdsym (symbolP
));
4267 coffsym
->native
->u
.syment
.n_type
&= ~SYM_V_MASK
;
4268 coffsym
->native
->u
.syment
.n_type
|= visibility
;
4270 c
= *input_line_pointer
;
4273 input_line_pointer
++;
4277 if (*input_line_pointer
== '\n')
4283 demand_empty_rest_of_line ();
4286 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
4287 symbols in the .bss segment as though they were local common
4288 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
4289 aligns .comm and .lcomm to 4 bytes.
4290 Symbols having a XMC_UL storage class are uninialized thread-local
4294 ppc_comm (int lcomm
)
4296 asection
*current_seg
= now_seg
;
4297 subsegT current_subseg
= now_subseg
;
4303 symbolS
*lcomm_sym
= NULL
;
4306 unsigned short visibility
= 0;
4307 struct ppc_xcoff_section
*section
;
4309 endc
= get_symbol_name (&name
);
4310 end_name
= input_line_pointer
;
4311 (void) restore_line_pointer (endc
);
4313 if (*input_line_pointer
!= ',')
4315 as_bad (_("missing size"));
4316 ignore_rest_of_line ();
4319 ++input_line_pointer
;
4321 size
= get_absolute_expression ();
4324 as_bad (_("negative size"));
4325 ignore_rest_of_line ();
4331 /* The third argument to .comm is the alignment. */
4332 if (*input_line_pointer
!= ',')
4336 ++input_line_pointer
;
4337 align
= get_absolute_expression ();
4340 as_warn (_("ignoring bad alignment"));
4344 /* The fourth argument to .comm is the visibility. */
4345 if (*input_line_pointer
== ',')
4347 input_line_pointer
++;
4348 visibility
= ppc_xcoff_get_visibility ();
4351 as_bad (_("Unknown visibility field in .comm"));
4352 ignore_rest_of_line ();
4363 /* The third argument to .lcomm appears to be the real local
4364 common symbol to create. References to the symbol named in
4365 the first argument are turned into references to the third
4367 if (*input_line_pointer
!= ',')
4369 as_bad (_("missing real symbol name"));
4370 ignore_rest_of_line ();
4373 ++input_line_pointer
;
4375 lcomm_endc
= get_symbol_name (&lcomm_name
);
4377 lcomm_sym
= symbol_find_or_make (lcomm_name
);
4379 (void) restore_line_pointer (lcomm_endc
);
4381 /* The fourth argument to .lcomm is the alignment. */
4382 if (*input_line_pointer
!= ',')
4391 ++input_line_pointer
;
4392 align
= get_absolute_expression ();
4395 as_warn (_("ignoring bad alignment"));
4402 sym
= symbol_find_or_make (name
);
4405 if (S_IS_DEFINED (sym
)
4406 || S_GET_VALUE (sym
) != 0)
4408 as_bad (_("attempt to redefine symbol"));
4409 ignore_rest_of_line ();
4413 if (symbol_get_tc (sym
)->symbol_class
== XMC_UL
4414 || (lcomm
&& symbol_get_tc (lcomm_sym
)->symbol_class
== XMC_UL
))
4416 section
= &ppc_xcoff_tbss_section
;
4417 if (!ppc_xcoff_section_is_initialized (section
))
4419 ppc_init_xcoff_section (section
, subseg_new (".tbss", 0));
4420 bfd_set_section_flags (section
->segment
,
4421 SEC_ALLOC
| SEC_THREAD_LOCAL
);
4422 seg_info (section
->segment
)->bss
= 1;
4426 section
= &ppc_xcoff_bss_section
;
4428 record_alignment (section
->segment
, align
);
4431 || ! S_IS_DEFINED (lcomm_sym
))
4440 S_SET_EXTERNAL (sym
);
4444 symbol_get_tc (lcomm_sym
)->output
= 1;
4445 def_sym
= lcomm_sym
;
4449 subseg_set (section
->segment
, 1);
4450 frag_align (align
, 0, 0);
4452 symbol_set_frag (def_sym
, frag_now
);
4453 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
4454 def_size
, (char *) NULL
);
4456 S_SET_SEGMENT (def_sym
, section
->segment
);
4457 symbol_get_tc (def_sym
)->align
= align
;
4461 /* Align the size of lcomm_sym. */
4462 symbol_get_frag (lcomm_sym
)->fr_offset
=
4463 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
4464 &~ ((1 << align
) - 1));
4465 if (align
> symbol_get_tc (lcomm_sym
)->align
)
4466 symbol_get_tc (lcomm_sym
)->align
= align
;
4471 /* Make sym an offset from lcomm_sym. */
4472 S_SET_SEGMENT (sym
, section
->segment
);
4473 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
4474 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
4475 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
4478 if (!lcomm
&& visibility
)
4480 /* Add visibility to .comm symbol. */
4481 coff_symbol_type
*coffsym
= coffsymbol (symbol_get_bfdsym (sym
));
4482 coffsym
->native
->u
.syment
.n_type
&= ~SYM_V_MASK
;
4483 coffsym
->native
->u
.syment
.n_type
|= visibility
;
4486 subseg_set (current_seg
, current_subseg
);
4488 demand_empty_rest_of_line ();
4491 /* The .csect pseudo-op. This switches us into a different
4492 subsegment. The first argument is a symbol whose value is the
4493 start of the .csect. In COFF, csect symbols get special aux
4494 entries defined by the x_csect field of union internal_auxent. The
4495 optional second argument is the alignment (the default is 2). */
4498 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
4505 endc
= get_symbol_name (&name
);
4507 sym
= symbol_find_or_make (name
);
4509 (void) restore_line_pointer (endc
);
4511 if (S_GET_NAME (sym
)[0] == '\0')
4513 /* An unnamed csect is assumed to be [PR]. */
4514 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
4518 if (*input_line_pointer
== ',')
4520 ++input_line_pointer
;
4521 align
= get_absolute_expression ();
4524 ppc_change_csect (sym
, align
);
4526 demand_empty_rest_of_line ();
4529 /* Change to a different csect. */
4532 ppc_change_csect (symbolS
*sym
, offsetT align
)
4534 if (S_IS_DEFINED (sym
))
4535 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
4538 struct ppc_xcoff_section
*section
;
4545 /* This is a new csect. We need to look at the symbol class to
4546 figure out whether it should go in the text section or the
4550 switch (symbol_get_tc (sym
)->symbol_class
)
4560 section
= &ppc_xcoff_text_section
;
4570 section
= &ppc_xcoff_data_section
;
4571 if (ppc_toc_csect
!= NULL
4572 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
4573 == section
->next_subsegment
))
4577 section
= &ppc_xcoff_bss_section
;
4580 section
= &ppc_xcoff_tdata_section
;
4581 /* Create .tdata section if not yet done. */
4582 if (!ppc_xcoff_section_is_initialized (section
))
4584 ppc_init_xcoff_section (section
, subseg_new (".tdata", 0));
4585 bfd_set_section_flags (section
->segment
, SEC_ALLOC
4586 | SEC_LOAD
| SEC_RELOC
| SEC_DATA
4587 | SEC_THREAD_LOCAL
);
4591 section
= &ppc_xcoff_tbss_section
;
4592 /* Create .tbss section if not yet done. */
4593 if (!ppc_xcoff_section_is_initialized (section
))
4595 ppc_init_xcoff_section (section
, subseg_new (".tbss", 0));
4596 bfd_set_section_flags (section
->segment
, SEC_ALLOC
|
4598 seg_info (section
->segment
)->bss
= 1;
4605 S_SET_SEGMENT (sym
, section
->segment
);
4606 symbol_get_tc (sym
)->subseg
= section
->next_subsegment
;
4607 ++section
->next_subsegment
;
4609 /* We set the obstack chunk size to a small value before
4610 changing subsegments, so that we don't use a lot of memory
4611 space for what may be a small section. */
4612 hold_chunksize
= chunksize
;
4615 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
4616 symbol_get_tc (sym
)->subseg
);
4618 chunksize
= hold_chunksize
;
4621 ppc_after_toc_frag
= frag_now
;
4623 record_alignment (sec
, align
);
4625 frag_align_code (align
, 0);
4627 frag_align (align
, 0, 0);
4629 symbol_set_frag (sym
, frag_now
);
4630 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4632 symbol_get_tc (sym
)->align
= align
;
4633 symbol_get_tc (sym
)->output
= 1;
4634 symbol_get_tc (sym
)->within
= sym
;
4636 for (list
= section
->csects
;
4637 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4638 list
= symbol_get_tc (list
)->next
)
4640 symbol_get_tc (list
)->next
= sym
;
4642 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4643 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4647 ppc_current_csect
= sym
;
4651 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
4655 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
4657 sec
= subseg_new (dw
->xcoff_name
, subseg
);
4658 oldflags
= bfd_section_flags (sec
);
4659 if (oldflags
== SEC_NO_FLAGS
)
4661 /* Just created section. */
4662 gas_assert (dw_sections
[idx
].sect
== NULL
);
4664 bfd_set_section_flags (sec
, SEC_DEBUGGING
);
4665 bfd_set_section_alignment (sec
, 0);
4666 dw_sections
[idx
].sect
= sec
;
4669 /* Not anymore in a csect. */
4670 ppc_current_csect
= NULL
;
4673 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4674 .dwsect flag [, opt-label ]
4678 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4682 const struct xcoff_dwsect_name
*dw
;
4683 struct dw_subsection
*subseg
;
4684 struct dw_section
*dws
;
4688 flag
= get_absolute_expression ();
4690 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4691 if (xcoff_dwsect_names
[i
].flag
== flag
)
4693 dw
= &xcoff_dwsect_names
[i
];
4697 /* Parse opt-label. */
4698 if (*input_line_pointer
== ',')
4703 ++input_line_pointer
;
4705 c
= get_symbol_name (&label
);
4706 opt_label
= symbol_find_or_make (label
);
4707 (void) restore_line_pointer (c
);
4712 demand_empty_rest_of_line ();
4714 /* Return now in case of unknown subsection. */
4717 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4722 /* Find the subsection. */
4723 dws
= &dw_sections
[i
];
4725 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4727 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4728 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4730 as_bad (_("label %s was not defined in this dwarf section"),
4731 S_GET_NAME (opt_label
));
4732 subseg
= dws
->anon_subseg
;
4736 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4741 /* Switch to the subsection. */
4742 ppc_change_debug_section (i
, subseg
->subseg
);
4746 /* Create a new dw subsection. */
4747 subseg
= XCNEW (struct dw_subsection
);
4749 if (opt_label
== NULL
)
4751 /* The anonymous one. */
4753 subseg
->link
= NULL
;
4754 dws
->anon_subseg
= subseg
;
4759 if (dws
->list_subseg
!= NULL
)
4760 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4764 subseg
->link
= dws
->list_subseg
;
4765 dws
->list_subseg
= subseg
;
4766 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4769 ppc_change_debug_section (i
, subseg
->subseg
);
4773 /* Add the length field. */
4774 expressionS
*exp
= &subseg
->end_exp
;
4777 if (opt_label
!= NULL
)
4778 symbol_set_value_now (opt_label
);
4780 /* Add the length field. Note that according to the AIX assembler
4781 manual, the size of the length field is 4 for powerpc32 but
4782 12 for powerpc64. */
4785 /* Write the 64bit marker. */
4786 md_number_to_chars (frag_more (4), -1, 4);
4789 exp
->X_op
= O_subtract
;
4790 exp
->X_op_symbol
= symbol_temp_new_now ();
4791 exp
->X_add_symbol
= symbol_temp_make ();
4793 sz
= ppc_obj64
? 8 : 4;
4794 exp
->X_add_number
= -sz
;
4795 emit_expr (exp
, sz
);
4800 /* This function handles the .text and .data pseudo-ops. These
4801 pseudo-ops aren't really used by XCOFF; we implement them for the
4802 convenience of people who aren't used to XCOFF. */
4805 ppc_section (int type
)
4812 else if (type
== 'd')
4817 sym
= symbol_find_or_make (name
);
4819 ppc_change_csect (sym
, 2);
4821 demand_empty_rest_of_line ();
4824 /* This function handles the .section pseudo-op. This is mostly to
4825 give an error, since XCOFF only supports .text, .data and .bss, but
4826 we do permit the user to name the text or data section. */
4829 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4832 const char *real_name
;
4836 c
= get_symbol_name (&user_name
);
4838 if (strcmp (user_name
, ".text") == 0)
4839 real_name
= ".text[PR]";
4840 else if (strcmp (user_name
, ".data") == 0)
4841 real_name
= ".data[RW]";
4844 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4845 (void) restore_line_pointer (c
);
4846 ignore_rest_of_line ();
4850 (void) restore_line_pointer (c
);
4852 sym
= symbol_find_or_make (real_name
);
4854 ppc_change_csect (sym
, 2);
4856 demand_empty_rest_of_line ();
4859 /* The .extern pseudo-op. We create an undefined symbol. */
4862 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4867 if ((name
= read_symbol_name ()) == NULL
)
4870 sym
= symbol_find_or_make (name
);
4873 if (*input_line_pointer
== ',')
4875 unsigned short visibility
;
4876 coff_symbol_type
*coffsym
= coffsymbol (symbol_get_bfdsym (sym
));
4878 input_line_pointer
++;
4879 visibility
= ppc_xcoff_get_visibility ();
4882 as_bad (_("Unknown visibility field in .extern"));
4883 ignore_rest_of_line ();
4887 coffsym
->native
->u
.syment
.n_type
&= ~SYM_V_MASK
;
4888 coffsym
->native
->u
.syment
.n_type
|= visibility
;
4891 demand_empty_rest_of_line ();
4894 /* XCOFF semantic for .globl says that the second parameter is
4895 the symbol visibility. */
4898 ppc_globl (int ignore ATTRIBUTE_UNUSED
)
4903 if ((name
= read_symbol_name ()) == NULL
)
4906 sym
= symbol_find_or_make (name
);
4908 S_SET_EXTERNAL (sym
);
4910 if (*input_line_pointer
== ',')
4912 unsigned short visibility
;
4913 coff_symbol_type
*coffsym
= coffsymbol (symbol_get_bfdsym (sym
));
4915 input_line_pointer
++;
4916 visibility
= ppc_xcoff_get_visibility ();
4919 as_bad (_("Unknown visibility field in .globl"));
4920 ignore_rest_of_line ();
4924 coffsym
->native
->u
.syment
.n_type
&= ~SYM_V_MASK
;
4925 coffsym
->native
->u
.syment
.n_type
|= visibility
;
4928 demand_empty_rest_of_line ();
4931 /* XCOFF semantic for .weak says that the second parameter is
4932 the symbol visibility. */
4935 ppc_weak (int ignore ATTRIBUTE_UNUSED
)
4940 if ((name
= read_symbol_name ()) == NULL
)
4943 sym
= symbol_find_or_make (name
);
4947 if (*input_line_pointer
== ',')
4949 unsigned short visibility
;
4950 coff_symbol_type
*coffsym
= coffsymbol (symbol_get_bfdsym (sym
));
4952 input_line_pointer
++;
4953 visibility
= ppc_xcoff_get_visibility ();
4956 as_bad (_("Unknown visibility field in .weak"));
4957 ignore_rest_of_line ();
4961 coffsym
->native
->u
.syment
.n_type
&= ~SYM_V_MASK
;
4962 coffsym
->native
->u
.syment
.n_type
|= visibility
;
4965 demand_empty_rest_of_line ();
4968 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4971 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
4977 endc
= get_symbol_name (&name
);
4979 sym
= symbol_find_or_make (name
);
4981 (void) restore_line_pointer (endc
);
4983 symbol_get_tc (sym
)->output
= 1;
4985 demand_empty_rest_of_line ();
4988 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4989 relocations at the beginning of the current csect.
4991 (In principle, there's no reason why the relocations _have_ to be at
4992 the beginning. Anywhere in the csect would do. However, inserting
4993 at the beginning is what the native assembler does, and it helps to
4994 deal with cases where the .ref statements follow the section contents.)
4996 ??? .refs don't work for empty .csects. However, the native assembler
4997 doesn't report an error in this case, and neither yet do we. */
5000 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
5005 if (ppc_current_csect
== NULL
)
5007 as_bad (_(".ref outside .csect"));
5008 ignore_rest_of_line ();
5014 c
= get_symbol_name (&name
);
5016 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
5017 symbol_find_or_make (name
), 0, false, BFD_RELOC_NONE
);
5019 *input_line_pointer
= c
;
5020 SKIP_WHITESPACE_AFTER_NAME ();
5021 c
= *input_line_pointer
;
5024 input_line_pointer
++;
5026 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
5028 as_bad (_("missing symbol name"));
5029 ignore_rest_of_line ();
5036 demand_empty_rest_of_line ();
5039 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
5040 although I don't know why it bothers. */
5043 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
5050 endc
= get_symbol_name (&name
);
5052 sym
= symbol_find_or_make (name
);
5054 (void) restore_line_pointer (endc
);
5056 if (*input_line_pointer
!= ',')
5058 as_bad (_("missing rename string"));
5059 ignore_rest_of_line ();
5062 ++input_line_pointer
;
5064 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
5066 demand_empty_rest_of_line ();
5069 /* The .stabx pseudo-op. This is similar to a normal .stabs
5070 pseudo-op, but slightly different. A sample is
5071 .stabx "main:F-1",.main,142,0
5072 The first argument is the symbol name to create. The second is the
5073 value, and the third is the storage class. The fourth seems to be
5074 always zero, and I am assuming it is the type. */
5077 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
5084 name
= demand_copy_C_string (&len
);
5086 if (*input_line_pointer
!= ',')
5088 as_bad (_("missing value"));
5091 ++input_line_pointer
;
5093 ppc_stab_symbol
= true;
5094 sym
= symbol_make (name
);
5095 ppc_stab_symbol
= false;
5097 symbol_get_tc (sym
)->real_name
= name
;
5099 (void) expression (&exp
);
5106 as_bad (_("illegal .stabx expression; zero assumed"));
5107 exp
.X_add_number
= 0;
5110 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
5111 symbol_set_frag (sym
, &zero_address_frag
);
5115 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
5116 symbol_set_value_expression (sym
, &exp
);
5120 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
5121 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
5126 /* The value is some complex expression. This will probably
5127 fail at some later point, but this is probably the right
5128 thing to do here. */
5129 symbol_set_value_expression (sym
, &exp
);
5133 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5134 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5136 if (*input_line_pointer
!= ',')
5138 as_bad (_("missing class"));
5141 ++input_line_pointer
;
5143 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
5145 if (*input_line_pointer
!= ',')
5147 as_bad (_("missing type"));
5150 ++input_line_pointer
;
5152 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
5154 symbol_get_tc (sym
)->output
= 1;
5156 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
5161 .stabx "z",arrays_,133,0
5164 .comm arrays_,13768,3
5166 resolve_symbol_value will copy the exp's "within" into sym's when the
5167 offset is 0. Since this seems to be corner case problem,
5168 only do the correction for storage class C_STSYM. A better solution
5169 would be to have the tc field updated in ppc_symbol_new_hook. */
5171 if (exp
.X_op
== O_symbol
)
5173 if (ppc_current_block
== NULL
)
5174 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
5176 symbol_get_tc (sym
)->within
= ppc_current_block
;
5180 if (exp
.X_op
!= O_symbol
5181 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
5182 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
5183 ppc_frob_label (sym
);
5186 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5187 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
5188 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
5189 symbol_get_tc (ppc_current_csect
)->within
= sym
;
5192 demand_empty_rest_of_line ();
5195 /* The .file pseudo-op. On XCOFF, .file can have several parameters
5196 which are being added to the symbol table to provide additional
5200 ppc_file (int ignore ATTRIBUTE_UNUSED
)
5202 char *sfname
, *s1
= NULL
, *s2
= NULL
, *s3
= NULL
;
5203 int length
, auxnb
= 1;
5205 /* Some assemblers tolerate immediately following '"'. */
5206 if ((sfname
= demand_copy_string (&length
)) != 0)
5208 coff_symbol_type
*coffsym
;
5209 if (*input_line_pointer
== ',')
5211 ++input_line_pointer
;
5212 s1
= demand_copy_string (&length
);
5215 if (*input_line_pointer
== ',')
5217 ++input_line_pointer
;
5218 s2
= demand_copy_string (&length
);
5221 if (*input_line_pointer
== ',')
5223 ++input_line_pointer
;
5224 s3
= demand_copy_string (&length
);
5230 /* Use coff dot_file creation and adjust auxiliary entries. */
5231 c_dot_file_symbol (sfname
);
5232 S_SET_NUMBER_AUXILIARY (symbol_rootP
, auxnb
);
5233 coffsym
= coffsymbol (symbol_get_bfdsym (symbol_rootP
));
5234 coffsym
->native
[1].u
.auxent
.x_file
.x_ftype
= XFT_FN
;
5238 coffsym
->native
[2].u
.auxent
.x_file
.x_ftype
= XFT_CT
;
5239 coffsym
->native
[2].extrap
= s1
;
5243 coffsym
->native
[3].u
.auxent
.x_file
.x_ftype
= XFT_CV
;
5244 coffsym
->native
[3].extrap
= s2
;
5248 coffsym
->native
[4].u
.auxent
.x_file
.x_ftype
= XFT_CD
;
5249 coffsym
->native
[4].extrap
= s3
;
5252 demand_empty_rest_of_line ();
5256 /* The .function pseudo-op. This takes several arguments. The first
5257 argument seems to be the external name of the symbol. The second
5258 argument seems to be the label for the start of the function. gcc
5259 uses the same name for both. I have no idea what the third and
5260 fourth arguments are meant to be. The optional fifth argument is
5261 an expression for the size of the function. In COFF this symbol
5262 gets an aux entry like that used for a csect. */
5265 ppc_function (int ignore ATTRIBUTE_UNUSED
)
5273 endc
= get_symbol_name (&name
);
5275 /* Ignore any [PR] suffix. */
5276 name
= ppc_canonicalize_symbol_name (name
);
5277 s
= strchr (name
, '[');
5278 if (s
!= (char *) NULL
5279 && strcmp (s
+ 1, "PR]") == 0)
5282 ext_sym
= symbol_find_or_make (name
);
5284 (void) restore_line_pointer (endc
);
5286 if (*input_line_pointer
!= ',')
5288 as_bad (_("missing symbol name"));
5289 ignore_rest_of_line ();
5292 ++input_line_pointer
;
5294 endc
= get_symbol_name (&name
);
5296 lab_sym
= symbol_find_or_make (name
);
5298 (void) restore_line_pointer (endc
);
5300 if (ext_sym
!= lab_sym
)
5304 exp
.X_op
= O_symbol
;
5305 exp
.X_add_symbol
= lab_sym
;
5306 exp
.X_op_symbol
= NULL
;
5307 exp
.X_add_number
= 0;
5309 symbol_set_value_expression (ext_sym
, &exp
);
5312 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
5313 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
5314 symbol_get_tc (ext_sym
)->output
= 1;
5316 if (*input_line_pointer
== ',')
5320 /* Ignore the third argument. */
5321 ++input_line_pointer
;
5323 if (*input_line_pointer
== ',')
5325 /* Ignore the fourth argument. */
5326 ++input_line_pointer
;
5328 if (*input_line_pointer
== ',')
5330 /* The fifth argument is the function size.
5331 If it's omitted, the size will be the containing csect.
5332 This will be donce during ppc_frob_symtab. */
5333 ++input_line_pointer
;
5334 symbol_get_tc (ext_sym
)->u
.size
5335 = symbol_new ("L0\001", absolute_section
,
5336 &zero_address_frag
, 0);
5337 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
5342 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
5343 SF_SET_FUNCTION (ext_sym
);
5344 SF_SET_PROCESS (ext_sym
);
5345 coff_add_linesym (ext_sym
);
5347 demand_empty_rest_of_line ();
5350 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
5351 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
5352 with the correct line number */
5354 static symbolS
*saved_bi_sym
= 0;
5357 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
5361 sym
= symbol_make (".bf");
5362 S_SET_SEGMENT (sym
, text_section
);
5363 symbol_set_frag (sym
, frag_now
);
5364 S_SET_VALUE (sym
, frag_now_fix ());
5365 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5367 coff_line_base
= get_absolute_expression ();
5369 S_SET_NUMBER_AUXILIARY (sym
, 1);
5370 SA_SET_SYM_LNNO (sym
, coff_line_base
);
5372 /* Line number for bi. */
5375 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
5380 symbol_get_tc (sym
)->output
= 1;
5382 ppc_frob_label (sym
);
5384 demand_empty_rest_of_line ();
5387 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
5388 ".ef", except that the line number is absolute, not relative to the
5389 most recent ".bf" symbol. */
5392 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
5396 sym
= symbol_make (".ef");
5397 S_SET_SEGMENT (sym
, text_section
);
5398 symbol_set_frag (sym
, frag_now
);
5399 S_SET_VALUE (sym
, frag_now_fix ());
5400 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5401 S_SET_NUMBER_AUXILIARY (sym
, 1);
5402 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5403 symbol_get_tc (sym
)->output
= 1;
5405 ppc_frob_label (sym
);
5407 demand_empty_rest_of_line ();
5410 /* The .bi and .ei pseudo-ops. These take a string argument and
5411 generates a C_BINCL or C_EINCL symbol, which goes at the start of
5412 the symbol list. The value of .bi will be know when the next .bf
5418 static symbolS
*last_biei
;
5425 name
= demand_copy_C_string (&len
);
5427 /* The value of these symbols is actually file offset. Here we set
5428 the value to the index into the line number entries. In
5429 ppc_frob_symbols we set the fix_line field, which will cause BFD
5430 to do the right thing. */
5432 sym
= symbol_make (name
);
5433 /* obj-coff.c currently only handles line numbers correctly in the
5435 S_SET_SEGMENT (sym
, text_section
);
5436 S_SET_VALUE (sym
, coff_n_line_nos
);
5437 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5439 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
5440 symbol_get_tc (sym
)->output
= 1;
5448 for (look
= last_biei
? last_biei
: symbol_rootP
;
5449 (look
!= (symbolS
*) NULL
5450 && (S_GET_STORAGE_CLASS (look
) == C_FILE
5451 || S_GET_STORAGE_CLASS (look
) == C_BINCL
5452 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
5453 look
= symbol_next (look
))
5455 if (look
!= (symbolS
*) NULL
)
5457 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5458 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
5462 demand_empty_rest_of_line ();
5465 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
5466 There is one argument, which is a csect symbol. The value of the
5467 .bs symbol is the index of this csect symbol. */
5470 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
5477 if (ppc_current_block
!= NULL
)
5478 as_bad (_("nested .bs blocks"));
5480 endc
= get_symbol_name (&name
);
5482 csect
= symbol_find_or_make (name
);
5484 (void) restore_line_pointer (endc
);
5486 sym
= symbol_make (".bs");
5487 S_SET_SEGMENT (sym
, now_seg
);
5488 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
5489 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5490 symbol_get_tc (sym
)->output
= 1;
5492 symbol_get_tc (sym
)->within
= csect
;
5494 ppc_frob_label (sym
);
5496 ppc_current_block
= sym
;
5498 demand_empty_rest_of_line ();
5501 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
5504 ppc_es (int ignore ATTRIBUTE_UNUSED
)
5508 if (ppc_current_block
== NULL
)
5509 as_bad (_(".es without preceding .bs"));
5511 sym
= symbol_make (".es");
5512 S_SET_SEGMENT (sym
, now_seg
);
5513 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
5514 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5515 symbol_get_tc (sym
)->output
= 1;
5517 ppc_frob_label (sym
);
5519 ppc_current_block
= NULL
;
5521 demand_empty_rest_of_line ();
5524 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
5528 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
5532 sym
= symbol_make (".bb");
5533 S_SET_SEGMENT (sym
, text_section
);
5534 symbol_set_frag (sym
, frag_now
);
5535 S_SET_VALUE (sym
, frag_now_fix ());
5536 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5538 S_SET_NUMBER_AUXILIARY (sym
, 1);
5539 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5541 symbol_get_tc (sym
)->output
= 1;
5543 SF_SET_PROCESS (sym
);
5545 ppc_frob_label (sym
);
5547 demand_empty_rest_of_line ();
5550 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
5554 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
5558 sym
= symbol_make (".eb");
5559 S_SET_SEGMENT (sym
, text_section
);
5560 symbol_set_frag (sym
, frag_now
);
5561 S_SET_VALUE (sym
, frag_now_fix ());
5562 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5563 S_SET_NUMBER_AUXILIARY (sym
, 1);
5564 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5565 symbol_get_tc (sym
)->output
= 1;
5567 SF_SET_PROCESS (sym
);
5569 ppc_frob_label (sym
);
5571 demand_empty_rest_of_line ();
5574 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
5578 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
5584 name
= demand_copy_C_string (&len
);
5585 sym
= symbol_make (name
);
5586 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5587 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5588 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
5589 S_SET_VALUE (sym
, 0);
5590 symbol_get_tc (sym
)->output
= 1;
5592 ppc_frob_label (sym
);
5594 demand_empty_rest_of_line ();
5597 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
5600 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
5604 sym
= symbol_make (".ec");
5605 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5606 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5607 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
5608 S_SET_VALUE (sym
, 0);
5609 symbol_get_tc (sym
)->output
= 1;
5611 ppc_frob_label (sym
);
5613 demand_empty_rest_of_line ();
5616 /* The .toc pseudo-op. Switch to the .toc subsegment. */
5619 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
5621 if (ppc_toc_csect
!= (symbolS
*) NULL
)
5622 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
5629 subseg
= ppc_xcoff_data_section
.next_subsegment
;
5630 ++ppc_xcoff_data_section
.next_subsegment
;
5632 subseg_new (segment_name (data_section
), subseg
);
5633 ppc_toc_frag
= frag_now
;
5635 sym
= symbol_find_or_make ("TOC[TC0]");
5636 symbol_set_frag (sym
, frag_now
);
5637 S_SET_SEGMENT (sym
, data_section
);
5638 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5639 symbol_get_tc (sym
)->subseg
= subseg
;
5640 symbol_get_tc (sym
)->output
= 1;
5641 symbol_get_tc (sym
)->within
= sym
;
5643 ppc_toc_csect
= sym
;
5645 for (list
= ppc_xcoff_data_section
.csects
;
5646 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
5647 list
= symbol_get_tc (list
)->next
)
5649 symbol_get_tc (list
)->next
= sym
;
5651 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5652 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
5656 ppc_current_csect
= ppc_toc_csect
;
5658 demand_empty_rest_of_line ();
5661 /* The AIX assembler automatically aligns the operands of a .long or
5662 .short pseudo-op, and we want to be compatible. */
5665 ppc_xcoff_cons (int log_size
)
5667 frag_align (log_size
, 0, 0);
5668 record_alignment (now_seg
, log_size
);
5669 cons (1 << log_size
);
5673 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
5678 (void) expression (&exp
);
5680 if (exp
.X_op
!= O_constant
)
5682 as_bad (_("non-constant byte count"));
5686 byte_count
= exp
.X_add_number
;
5688 if (*input_line_pointer
!= ',')
5690 as_bad (_("missing value"));
5694 ++input_line_pointer
;
5699 ppc_xcoff_md_finish (void)
5703 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
5705 struct dw_section
*dws
= &dw_sections
[i
];
5706 struct dw_subsection
*dwss
;
5708 if (dws
->anon_subseg
)
5710 dwss
= dws
->anon_subseg
;
5711 dwss
->link
= dws
->list_subseg
;
5714 dwss
= dws
->list_subseg
;
5716 for (; dwss
!= NULL
; dwss
= dwss
->link
)
5717 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
5719 subseg_set (dws
->sect
, dwss
->subseg
);
5720 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
5726 #endif /* OBJ_XCOFF */
5727 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5729 /* The .tc pseudo-op. This is used when generating either XCOFF or
5730 ELF. This takes two or more arguments.
5732 When generating XCOFF output, the first argument is the name to
5733 give to this location in the toc; this will be a symbol with class
5734 TC. The rest of the arguments are N-byte values to actually put at
5735 this location in the TOC; often there is just one more argument, a
5736 relocatable symbol reference. The size of the value to store
5737 depends on target word size. A 32-bit target uses 4-byte values, a
5738 64-bit target uses 8-byte values.
5740 When not generating XCOFF output, the arguments are the same, but
5741 the first argument is simply ignored. */
5744 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
5748 /* Define the TOC symbol name. */
5754 if (ppc_toc_csect
== (symbolS
*) NULL
5755 || ppc_toc_csect
!= ppc_current_csect
)
5757 as_bad (_(".tc not in .toc section"));
5758 ignore_rest_of_line ();
5762 endc
= get_symbol_name (&name
);
5764 sym
= symbol_find_or_make (name
);
5766 (void) restore_line_pointer (endc
);
5768 if (S_IS_DEFINED (sym
))
5772 label
= symbol_get_tc (ppc_current_csect
)->within
;
5773 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
5775 as_bad (_(".tc with no label"));
5776 ignore_rest_of_line ();
5780 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
5781 symbol_set_frag (label
, symbol_get_frag (sym
));
5782 S_SET_VALUE (label
, S_GET_VALUE (sym
));
5784 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5785 ++input_line_pointer
;
5790 S_SET_SEGMENT (sym
, now_seg
);
5791 symbol_set_frag (sym
, frag_now
);
5792 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5794 /* AIX assembler seems to allow any storage class to be set in .tc.
5795 But for now, only XMC_TC and XMC_TE are supported by us. */
5796 switch (symbol_get_tc (sym
)->symbol_class
)
5803 as_bad (_(".tc with storage class %d not yet supported"),
5804 symbol_get_tc (sym
)->symbol_class
);
5805 ignore_rest_of_line ();
5808 symbol_get_tc (sym
)->output
= 1;
5810 ppc_frob_label (sym
);
5813 #endif /* OBJ_XCOFF */
5817 /* Skip the TOC symbol name. */
5818 while (is_part_of_name (*input_line_pointer
)
5819 || *input_line_pointer
== ' '
5820 || *input_line_pointer
== '['
5821 || *input_line_pointer
== ']'
5822 || *input_line_pointer
== '{'
5823 || *input_line_pointer
== '}')
5824 ++input_line_pointer
;
5826 /* Align to a four/eight byte boundary. */
5827 align
= ppc_obj64
? 3 : 2;
5828 frag_align (align
, 0, 0);
5829 record_alignment (now_seg
, align
);
5830 #endif /* OBJ_ELF */
5832 if (*input_line_pointer
!= ',')
5833 demand_empty_rest_of_line ();
5836 ++input_line_pointer
;
5837 cons (ppc_obj64
? 8 : 4);
5841 /* Pseudo-op .machine. */
5844 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5848 #define MAX_HISTORY 100
5849 static ppc_cpu_t
*cpu_history
;
5850 static int curr_hist
;
5854 c
= get_symbol_name (&cpu_string
);
5855 cpu_string
= xstrdup (cpu_string
);
5856 (void) restore_line_pointer (c
);
5858 if (cpu_string
!= NULL
)
5860 ppc_cpu_t old_cpu
= ppc_cpu
;
5863 for (p
= cpu_string
; *p
!= 0; p
++)
5866 if (strcmp (cpu_string
, "push") == 0)
5868 if (cpu_history
== NULL
)
5869 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5871 if (curr_hist
>= MAX_HISTORY
)
5872 as_bad (_(".machine stack overflow"));
5874 cpu_history
[curr_hist
++] = ppc_cpu
;
5876 else if (strcmp (cpu_string
, "pop") == 0)
5879 as_bad (_(".machine stack underflow"));
5881 ppc_cpu
= cpu_history
[--curr_hist
];
5886 /* Not using the global "sticky" variable here results in
5887 none of the extra functional unit command line options,
5888 -many, -maltivec, -mspe, -mspe2, -mvle, -mvsx, being in
5889 force after selecting a new cpu with .machine.
5890 ".machine altivec" and other extra functional unit
5891 options do not count as a new machine, instead they add
5892 to currently selected opcodes. */
5893 ppc_cpu_t machine_sticky
= 0;
5894 /* Unfortunately, some versions of gcc emit a .machine
5895 directive very near the start of the compiler's assembly
5896 output file. This is bad because it overrides user -Wa
5897 cpu selection. Worse, there are versions of gcc that
5898 emit the *wrong* cpu, not even respecting the -mcpu given
5899 to gcc. See gcc pr101393. And to compound the problem,
5900 as of 20220222 gcc doesn't pass the correct cpu option to
5901 gas on the command line. See gcc pr59828. Hack around
5902 this by keeping sticky options for an early .machine. */
5904 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
5906 segment_info_type
*info
= seg_info (sec
);
5907 /* Are the frags for this section perturbed from their
5908 initial state? Even .align will count here. */
5910 && (info
->frchainP
->frch_root
!= info
->frchainP
->frch_last
5911 || info
->frchainP
->frch_root
->fr_type
!= rs_fill
5912 || info
->frchainP
->frch_root
->fr_fix
!= 0))
5915 new_cpu
= ppc_parse_cpu (ppc_cpu
,
5916 sec
== NULL
? &sticky
: &machine_sticky
,
5921 as_bad (_("invalid machine `%s'"), cpu_string
);
5924 if (ppc_cpu
!= old_cpu
)
5925 ppc_setup_opcodes ();
5928 demand_empty_rest_of_line ();
5930 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5934 /* XCOFF specific symbol and file handling. */
5936 /* Canonicalize the symbol name. We use the to force the suffix, if
5937 any, to use square brackets, and to be in upper case. */
5940 ppc_canonicalize_symbol_name (char *name
)
5944 if (ppc_stab_symbol
)
5947 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
5961 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
5964 if (*s
== '\0' || s
[1] != '\0')
5965 as_bad (_("bad symbol suffix"));
5973 /* Set the class of a symbol based on the suffix, if any. This is
5974 called whenever a new symbol is created. */
5977 ppc_symbol_new_hook (symbolS
*sym
)
5979 struct ppc_tc_sy
*tc
;
5982 tc
= symbol_get_tc (sym
);
5985 tc
->symbol_class
= -1;
5986 tc
->real_name
= NULL
;
5993 if (ppc_stab_symbol
)
5996 s
= strchr (S_GET_NAME (sym
), '[');
5997 if (s
== (const char *) NULL
)
5999 /* There is no suffix. */
6008 if (strcmp (s
, "BS]") == 0)
6009 tc
->symbol_class
= XMC_BS
;
6012 if (strcmp (s
, "DB]") == 0)
6013 tc
->symbol_class
= XMC_DB
;
6014 else if (strcmp (s
, "DS]") == 0)
6015 tc
->symbol_class
= XMC_DS
;
6018 if (strcmp (s
, "GL]") == 0)
6019 tc
->symbol_class
= XMC_GL
;
6022 if (strcmp (s
, "PR]") == 0)
6023 tc
->symbol_class
= XMC_PR
;
6026 if (strcmp (s
, "RO]") == 0)
6027 tc
->symbol_class
= XMC_RO
;
6028 else if (strcmp (s
, "RW]") == 0)
6029 tc
->symbol_class
= XMC_RW
;
6032 if (strcmp (s
, "SV]") == 0)
6033 tc
->symbol_class
= XMC_SV
;
6036 if (strcmp (s
, "TC]") == 0)
6037 tc
->symbol_class
= XMC_TC
;
6038 else if (strcmp (s
, "TI]") == 0)
6039 tc
->symbol_class
= XMC_TI
;
6040 else if (strcmp (s
, "TB]") == 0)
6041 tc
->symbol_class
= XMC_TB
;
6042 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
6043 tc
->symbol_class
= XMC_TC0
;
6044 else if (strcmp (s
, "TE]") == 0)
6045 tc
->symbol_class
= XMC_TE
;
6046 else if (strcmp (s
, "TL]") == 0)
6047 tc
->symbol_class
= XMC_TL
;
6050 if (strcmp (s
, "UA]") == 0)
6051 tc
->symbol_class
= XMC_UA
;
6052 else if (strcmp (s
, "UC]") == 0)
6053 tc
->symbol_class
= XMC_UC
;
6054 else if (strcmp (s
, "UL]") == 0)
6055 tc
->symbol_class
= XMC_UL
;
6058 if (strcmp (s
, "XO]") == 0)
6059 tc
->symbol_class
= XMC_XO
;
6063 if (tc
->symbol_class
== -1)
6064 as_bad (_("unrecognized symbol suffix"));
6067 /* This variable is set by ppc_frob_symbol if any absolute symbols are
6068 seen. It tells ppc_adjust_symtab whether it needs to look through
6071 static bool ppc_saw_abs
;
6073 /* Change the name of a symbol just before writing it out. Set the
6074 real name if the .rename pseudo-op was used. Otherwise, remove any
6075 class suffix. Return 1 if the symbol should not be included in the
6079 ppc_frob_symbol (symbolS
*sym
)
6081 static symbolS
*ppc_last_function
;
6082 static symbolS
*set_end
;
6084 /* Discard symbols that should not be included in the output symbol
6086 if (! symbol_used_in_reloc_p (sym
)
6087 && S_GET_STORAGE_CLASS (sym
) != C_DWARF
6088 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
6089 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6090 && ! symbol_get_tc (sym
)->output
6091 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
6094 /* This one will disappear anyway. Don't make a csect sym for it. */
6095 if (sym
== abs_section_sym
)
6098 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
6099 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
6105 name
= S_GET_NAME (sym
);
6106 s
= strchr (name
, '[');
6107 if (s
!= (char *) NULL
)
6113 snew
= xstrndup (name
, len
);
6115 S_SET_NAME (sym
, snew
);
6119 if (set_end
!= (symbolS
*) NULL
)
6121 SA_SET_SYM_ENDNDX (set_end
, sym
);
6125 if (SF_GET_FUNCTION (sym
))
6127 /* Make sure coff_last_function is reset. Otherwise, we won't create
6128 the auxent for the next function. */
6129 coff_last_function
= 0;
6130 ppc_last_function
= sym
;
6131 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
6133 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
6134 SA_SET_SYM_FSIZE (sym
,
6135 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
6139 /* Size of containing csect. */
6140 symbolS
* within
= symbol_get_tc (sym
)->within
;
6141 union internal_auxent
*csectaux
;
6142 csectaux
= &coffsymbol (symbol_get_bfdsym (within
))
6143 ->native
[S_GET_NUMBER_AUXILIARY(within
)].u
.auxent
;
6145 SA_SET_SYM_FSIZE (sym
, csectaux
->x_csect
.x_scnlen
.l
);
6148 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
6149 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
6151 if (ppc_last_function
== (symbolS
*) NULL
)
6152 as_bad (_(".ef with no preceding .function"));
6155 set_end
= ppc_last_function
;
6156 ppc_last_function
= NULL
;
6158 /* We don't have a C_EFCN symbol, but we need to force the
6159 COFF backend to believe that it has seen one. */
6160 coff_last_function
= NULL
;
6164 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6165 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
6166 && S_GET_STORAGE_CLASS (sym
) != C_FILE
6167 && S_GET_STORAGE_CLASS (sym
) != C_FCN
6168 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
6169 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
6170 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
6171 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
6172 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
6173 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
6174 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
6176 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
6177 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
6178 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
6181 union internal_auxent
*a
;
6183 /* Create a csect aux. */
6184 i
= S_GET_NUMBER_AUXILIARY (sym
);
6185 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
6186 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
6187 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
6189 /* This is the TOC table. */
6190 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
6191 a
->x_csect
.x_scnlen
.l
= 0;
6192 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6194 else if (symbol_get_tc (sym
)->subseg
!= 0)
6196 /* This is a csect symbol. x_scnlen is the size of the
6198 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
6199 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (S_GET_SEGMENT (sym
))
6200 - S_GET_VALUE (sym
));
6203 resolve_symbol_value (symbol_get_tc (sym
)->next
);
6204 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
6205 - S_GET_VALUE (sym
));
6207 if (symbol_get_tc (sym
)->symbol_class
== XMC_BS
6208 || symbol_get_tc (sym
)->symbol_class
== XMC_UL
)
6209 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6211 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
6213 else if (S_GET_SEGMENT (sym
) == bss_section
6214 || S_GET_SEGMENT (sym
) == ppc_xcoff_tbss_section
.segment
)
6216 /* This is a common symbol. */
6217 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
6218 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6219 if (S_GET_SEGMENT (sym
) == ppc_xcoff_tbss_section
.segment
)
6220 symbol_get_tc (sym
)->symbol_class
= XMC_UL
;
6221 else if (S_IS_EXTERNAL (sym
))
6222 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
6224 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
6226 else if (S_GET_SEGMENT (sym
) == absolute_section
)
6228 /* This is an absolute symbol. The csect will be created by
6229 ppc_adjust_symtab. */
6231 a
->x_csect
.x_smtyp
= XTY_LD
;
6232 if (symbol_get_tc (sym
)->symbol_class
== -1)
6233 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
6235 else if (! S_IS_DEFINED (sym
))
6237 /* This is an external symbol. */
6238 a
->x_csect
.x_scnlen
.l
= 0;
6239 a
->x_csect
.x_smtyp
= XTY_ER
;
6241 else if (ppc_is_toc_sym (sym
))
6245 /* This is a TOC definition. x_scnlen is the size of the
6247 next
= symbol_next (sym
);
6248 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
6249 next
= symbol_next (next
);
6250 if (next
== (symbolS
*) NULL
6251 || (!ppc_is_toc_sym (next
)))
6253 if (ppc_after_toc_frag
== (fragS
*) NULL
)
6254 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (data_section
)
6255 - S_GET_VALUE (sym
));
6257 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
6258 - S_GET_VALUE (sym
));
6262 resolve_symbol_value (next
);
6263 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
6264 - S_GET_VALUE (sym
));
6266 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6272 /* This is a normal symbol definition. x_scnlen is the
6273 symbol index of the containing csect. */
6274 if (S_GET_SEGMENT (sym
) == text_section
)
6275 csect
= ppc_xcoff_text_section
.csects
;
6276 else if (S_GET_SEGMENT (sym
) == data_section
)
6277 csect
= ppc_xcoff_data_section
.csects
;
6278 else if (S_GET_SEGMENT (sym
) == ppc_xcoff_tdata_section
.segment
)
6279 csect
= ppc_xcoff_tdata_section
.csects
;
6283 /* Skip the initial dummy symbol. */
6284 csect
= symbol_get_tc (csect
)->next
;
6286 if (csect
== (symbolS
*) NULL
)
6288 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
6289 a
->x_csect
.x_scnlen
.l
= 0;
6293 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
6295 resolve_symbol_value (symbol_get_tc (csect
)->next
);
6296 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
6297 > S_GET_VALUE (sym
))
6299 csect
= symbol_get_tc (csect
)->next
;
6302 a
->x_csect
.x_scnlen
.p
=
6303 coffsymbol (symbol_get_bfdsym (csect
))->native
;
6304 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
6307 a
->x_csect
.x_smtyp
= XTY_LD
;
6310 a
->x_csect
.x_parmhash
= 0;
6311 a
->x_csect
.x_snhash
= 0;
6312 if (symbol_get_tc (sym
)->symbol_class
== -1)
6313 a
->x_csect
.x_smclas
= XMC_PR
;
6315 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
6316 a
->x_csect
.x_stab
= 0;
6317 a
->x_csect
.x_snstab
= 0;
6319 /* Don't let the COFF backend resort these symbols. */
6320 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
6322 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
6324 /* We want the value to be the symbol index of the referenced
6325 csect symbol. BFD will do that for us if we set the right
6327 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
6328 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
6330 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
6331 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
6333 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
6338 block
= symbol_get_tc (sym
)->within
;
6341 /* The value is the offset from the enclosing csect. */
6344 csect
= symbol_get_tc (block
)->within
;
6345 resolve_symbol_value (csect
);
6346 base
= S_GET_VALUE (csect
);
6351 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
6353 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
6354 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
6356 /* We want the value to be a file offset into the line numbers.
6357 BFD will do that for us if we set the right flags. We have
6358 already set the value correctly. */
6359 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
6365 /* Adjust the symbol table. */
6368 ppc_adjust_symtab (void)
6373 /* Make sure C_DWARF symbols come right after C_FILE.
6374 As the C_FILE might not be defined yet and as C_DWARF
6375 might already be ordered, we insert them before the
6376 first symbol which isn't a C_FILE or a C_DWARF. */
6377 for (anchorSym
= symbol_rootP
; anchorSym
!= NULL
;
6378 anchorSym
= symbol_next (anchorSym
))
6380 if (S_GET_STORAGE_CLASS (anchorSym
) != C_FILE
6381 && S_GET_STORAGE_CLASS (anchorSym
) != C_DWARF
)
6388 if (S_GET_STORAGE_CLASS (sym
) != C_DWARF
)
6390 sym
= symbol_next (sym
);
6394 symbolS
* tsym
= sym
;
6395 sym
= symbol_next (sym
);
6397 symbol_remove (tsym
, &symbol_rootP
, &symbol_lastP
);
6398 symbol_insert (tsym
, anchorSym
, &symbol_rootP
, &symbol_lastP
);
6401 /* Create csect symbols for all absolute symbols. */
6406 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
6410 union internal_auxent
*a
;
6412 if (S_GET_SEGMENT (sym
) != absolute_section
)
6415 csect
= symbol_create (".abs[XO]", absolute_section
,
6416 &zero_address_frag
, S_GET_VALUE (sym
));
6417 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
6418 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
6419 i
= S_GET_NUMBER_AUXILIARY (csect
);
6420 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
6421 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
6422 a
->x_csect
.x_scnlen
.l
= 0;
6423 a
->x_csect
.x_smtyp
= XTY_SD
;
6424 a
->x_csect
.x_parmhash
= 0;
6425 a
->x_csect
.x_snhash
= 0;
6426 a
->x_csect
.x_smclas
= XMC_XO
;
6427 a
->x_csect
.x_stab
= 0;
6428 a
->x_csect
.x_snstab
= 0;
6430 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
6432 i
= S_GET_NUMBER_AUXILIARY (sym
);
6433 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
6434 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
6435 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
6438 ppc_saw_abs
= false;
6441 /* Set the VMA for a section. This is called on all the sections in
6445 ppc_frob_section (asection
*sec
)
6447 static bfd_vma vma
= 0;
6449 /* Dwarf sections start at 0. */
6450 if (bfd_section_flags (sec
) & SEC_DEBUGGING
)
6453 vma
= md_section_align (sec
, vma
);
6454 bfd_set_section_vma (sec
, vma
);
6455 vma
+= bfd_section_size (sec
);
6458 #endif /* OBJ_XCOFF */
6461 md_atof (int type
, char *litp
, int *sizep
)
6463 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6466 /* Write a value out to the object file, using the appropriate
6470 md_number_to_chars (char *buf
, valueT val
, int n
)
6472 if (target_big_endian
)
6473 number_to_chars_bigendian (buf
, val
, n
);
6475 number_to_chars_littleendian (buf
, val
, n
);
6478 /* Align a section (I don't know why this is machine dependent). */
6481 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6486 int align
= bfd_section_alignment (seg
);
6488 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6492 /* We don't have any form of relaxing. */
6495 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6496 asection
*seg ATTRIBUTE_UNUSED
)
6502 /* Convert a machine dependent frag. We never generate these. */
6505 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6506 asection
*sec ATTRIBUTE_UNUSED
,
6507 fragS
*fragp ATTRIBUTE_UNUSED
)
6512 /* We have no need to default values of symbols. */
6515 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6520 /* Functions concerning relocs. */
6522 /* The location from which a PC relative jump should be calculated,
6523 given a PC relative reloc. */
6526 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6528 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6533 /* Return the surrending csect for sym when possible. */
6536 ppc_get_csect_to_adjust (symbolS
*sym
)
6541 valueT val
= resolve_symbol_value (sym
);
6542 TC_SYMFIELD_TYPE
*tc
= symbol_get_tc (sym
);
6543 segT symseg
= S_GET_SEGMENT (sym
);
6546 && tc
->symbol_class
!= XMC_TC0
6547 && tc
->symbol_class
!= XMC_TC
6548 && tc
->symbol_class
!= XMC_TE
6549 && symseg
!= bss_section
6550 && symseg
!= ppc_xcoff_tbss_section
.segment
6551 /* Don't adjust if this is a reloc in the toc section. */
6552 && (symseg
!= data_section
6553 || ppc_toc_csect
== NULL
6554 || val
< ppc_toc_frag
->fr_address
6555 || (ppc_after_toc_frag
!= NULL
6556 && val
>= ppc_after_toc_frag
->fr_address
)))
6558 symbolS
* csect
= tc
->within
;
6560 /* If the symbol was not declared by a label (eg: a section symbol),
6561 use the section instead of the csect. This doesn't happen in
6562 normal AIX assembly code. */
6564 csect
= seg_info (symseg
)->sym
;
6572 /* This is called to see whether a fixup should be adjusted to use a
6573 section symbol. We take the opportunity to change a fixup against
6574 a symbol in the TOC subsegment into a reloc against the
6575 corresponding .tc symbol. */
6578 ppc_fix_adjustable (fixS
*fix
)
6580 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6581 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6584 if (symseg
== absolute_section
)
6587 /* Always adjust symbols in debugging sections. */
6588 if (bfd_section_flags (symseg
) & SEC_DEBUGGING
)
6591 if (ppc_toc_csect
!= (symbolS
*) NULL
6592 && fix
->fx_addsy
!= ppc_toc_csect
6593 && symseg
== data_section
6594 && val
>= ppc_toc_frag
->fr_address
6595 && (ppc_after_toc_frag
== (fragS
*) NULL
6596 || val
< ppc_after_toc_frag
->fr_address
))
6600 for (sy
= symbol_next (ppc_toc_csect
);
6601 sy
!= (symbolS
*) NULL
;
6602 sy
= symbol_next (sy
))
6604 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6606 if (sy_tc
->symbol_class
== XMC_TC0
)
6608 if (sy_tc
->symbol_class
!= XMC_TC
6609 && sy_tc
->symbol_class
!= XMC_TE
)
6611 if (val
== resolve_symbol_value (sy
))
6614 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6619 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6620 _("symbol in .toc does not match any .tc"));
6623 /* Possibly adjust the reloc to be against the csect. */
6624 if ((csect
= ppc_get_csect_to_adjust (fix
->fx_addsy
)) != NULL
)
6626 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6627 fix
->fx_addsy
= csect
;
6630 if ((csect
= ppc_get_csect_to_adjust (fix
->fx_subsy
)) != NULL
)
6632 fix
->fx_offset
-= resolve_symbol_value (fix
->fx_subsy
)
6633 - symbol_get_frag (csect
)->fr_address
;
6634 fix
->fx_subsy
= csect
;
6637 /* Adjust a reloc against a .lcomm symbol to be against the base
6639 if (symseg
== bss_section
6640 && ! S_IS_EXTERNAL (fix
->fx_addsy
)
6641 && symbol_get_tc (fix
->fx_addsy
)->subseg
== 0)
6643 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6645 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6652 /* A reloc from one csect to another must be kept. The assembler
6653 will, of course, keep relocs between sections, and it will keep
6654 absolute relocs, but we need to force it to keep PC relative relocs
6655 between two csects in the same section. */
6658 ppc_force_relocation (fixS
*fix
)
6660 /* At this point fix->fx_addsy should already have been converted to
6661 a csect symbol. If the csect does not include the fragment, then
6662 we need to force the relocation. */
6664 && fix
->fx_addsy
!= NULL
6665 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6666 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6667 > fix
->fx_frag
->fr_address
)
6668 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6669 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6670 <= fix
->fx_frag
->fr_address
))))
6673 return generic_force_reloc (fix
);
6675 #endif /* OBJ_XCOFF */
6678 /* If this function returns non-zero, it guarantees that a relocation
6679 will be emitted for a fixup. */
6682 ppc_force_relocation (fixS
*fix
)
6684 /* Branch prediction relocations must force a relocation, as must
6685 the vtable description relocs. */
6686 switch (fix
->fx_r_type
)
6688 case BFD_RELOC_PPC_B16_BRTAKEN
:
6689 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6690 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6691 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6692 case BFD_RELOC_24_PLT_PCREL
:
6693 case BFD_RELOC_PPC64_TOC
:
6695 case BFD_RELOC_PPC_B26
:
6696 case BFD_RELOC_PPC_BA26
:
6697 case BFD_RELOC_PPC_B16
:
6698 case BFD_RELOC_PPC_BA16
:
6699 case BFD_RELOC_PPC64_REL24_NOTOC
:
6700 case BFD_RELOC_PPC64_REL24_P9NOTOC
:
6701 /* All branch fixups targeting a localentry symbol must
6702 force a relocation. */
6705 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6706 elf_symbol_type
*elfsym
= elf_symbol_from (bfdsym
);
6707 gas_assert (elfsym
);
6708 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6716 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6717 && fix
->fx_r_type
<= BFD_RELOC_PPC64_TLS_PCREL
)
6720 return generic_force_reloc (fix
);
6724 ppc_fix_adjustable (fixS
*fix
)
6726 switch (fix
->fx_r_type
)
6728 /* All branch fixups targeting a localentry symbol must
6729 continue using the symbol. */
6730 case BFD_RELOC_PPC_B26
:
6731 case BFD_RELOC_PPC_BA26
:
6732 case BFD_RELOC_PPC_B16
:
6733 case BFD_RELOC_PPC_BA16
:
6734 case BFD_RELOC_PPC_B16_BRTAKEN
:
6735 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6736 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6737 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6738 case BFD_RELOC_PPC64_REL24_NOTOC
:
6739 case BFD_RELOC_PPC64_REL24_P9NOTOC
:
6742 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6743 elf_symbol_type
*elfsym
= elf_symbol_from (bfdsym
);
6744 gas_assert (elfsym
);
6745 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6753 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
6754 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
6755 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
6756 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
6757 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
6758 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
6759 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT_PCREL34
6760 && fix
->fx_r_type
!= BFD_RELOC_24_PLT_PCREL
6761 && fix
->fx_r_type
!= BFD_RELOC_32_PLTOFF
6762 && fix
->fx_r_type
!= BFD_RELOC_32_PLT_PCREL
6763 && fix
->fx_r_type
!= BFD_RELOC_LO16_PLTOFF
6764 && fix
->fx_r_type
!= BFD_RELOC_HI16_PLTOFF
6765 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_PLTOFF
6766 && fix
->fx_r_type
!= BFD_RELOC_64_PLTOFF
6767 && fix
->fx_r_type
!= BFD_RELOC_64_PLT_PCREL
6768 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT16_LO_DS
6769 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT_PCREL34
6770 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16
6771 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO
6772 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HI
6773 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HA
6774 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_DS
6775 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO_DS
6776 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
6777 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_LO16A
6778 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HI16A
6779 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HA16A
6780 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
6781 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
6782 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6783 && fix
->fx_r_type
<= BFD_RELOC_PPC64_TLS_PCREL
));
6788 ppc_frag_check (struct frag
*fragP
)
6790 if ((fragP
->fr_address
& fragP
->insn_addr
) != 0)
6791 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
6792 _("instruction address is not a multiple of %d"),
6793 fragP
->insn_addr
+ 1);
6796 /* rs_align_code frag handling. */
6798 enum ppc_nop_encoding_for_rs_align_code
6807 ppc_nop_select (void)
6809 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
6811 if ((ppc_cpu
& (PPC_OPCODE_POWER9
| PPC_OPCODE_E500MC
)) == 0)
6813 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0)
6814 return PPC_NOP_GROUP_P7
;
6815 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0)
6816 return PPC_NOP_GROUP_P6
;
6818 return PPC_NOP_VANILLA
;
6822 ppc_handle_align (struct frag
*fragP
)
6824 valueT count
= (fragP
->fr_next
->fr_address
6825 - (fragP
->fr_address
+ fragP
->fr_fix
));
6826 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6827 enum ppc_nop_encoding_for_rs_align_code nop_select
= *dest
& 0xff;
6829 /* Pad with zeros if not inserting a whole number of instructions.
6830 We could pad with zeros up to an instruction boundary then follow
6831 with nops but odd counts indicate data in an executable section
6832 so padding with zeros is most appropriate. */
6834 || (nop_select
== PPC_NOP_VLE
? (count
& 1) != 0 : (count
& 3) != 0))
6840 if (nop_select
== PPC_NOP_VLE
)
6844 md_number_to_chars (dest
, 0x4400, 2);
6850 if (count
> 4 * nop_limit
&& count
< 0x2000000)
6854 /* Make a branch, then follow with nops. Insert another
6855 frag to handle the nops. */
6856 md_number_to_chars (dest
, 0x48000000 + count
, 4);
6861 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6862 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
6863 fragP
->fr_next
= rest
;
6865 rest
->fr_address
+= rest
->fr_fix
+ 4;
6867 /* If we leave the next frag as rs_align_code we'll come here
6868 again, resulting in a bunch of branches rather than a
6869 branch followed by nops. */
6870 rest
->fr_type
= rs_align
;
6871 dest
= rest
->fr_literal
;
6874 md_number_to_chars (dest
, 0x60000000, 4);
6876 if (nop_select
>= PPC_NOP_GROUP_P6
)
6878 /* For power6, power7, and power8, we want the last nop to
6879 be a group terminating one. Do this by inserting an
6880 rs_fill frag immediately after this one, with its address
6881 set to the last nop location. This will automatically
6882 reduce the number of nops in the current frag by one. */
6885 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6887 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
6888 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
6889 group_nop
->fr_fix
= 0;
6890 group_nop
->fr_offset
= 1;
6891 group_nop
->fr_type
= rs_fill
;
6892 fragP
->fr_next
= group_nop
;
6893 dest
= group_nop
->fr_literal
;
6896 if (nop_select
== PPC_NOP_GROUP_P6
)
6897 /* power6 group terminating nop: "ori 1,1,0". */
6898 md_number_to_chars (dest
, 0x60210000, 4);
6900 /* power7/power8 group terminating nop: "ori 2,2,0". */
6901 md_number_to_chars (dest
, 0x60420000, 4);
6906 /* Apply a fixup to the object code. This is called for all the
6907 fixups we generated by the calls to fix_new_exp, above. */
6910 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
6912 valueT value
= * valP
;
6914 const struct powerpc_operand
*operand
;
6917 if (fixP
->fx_addsy
!= NULL
)
6919 /* Hack around bfd_install_relocation brain damage. */
6921 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
6923 if (fixP
->fx_addsy
== abs_section_sym
)
6929 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6930 the symbol values. If we are doing this relocation the code in
6931 write.c is going to call bfd_install_relocation, which is also
6932 going to use the symbol value. That means that if the reloc is
6933 fully resolved we want to use *valP since bfd_install_relocation is
6935 However, if the reloc is not fully resolved we do not want to
6936 use *valP, and must use fx_offset instead. If the relocation
6937 is PC-relative, we then need to re-apply md_pcrel_from_section
6938 to this new relocation value. */
6939 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
6944 value
= fixP
->fx_offset
;
6946 value
-= md_pcrel_from_section (fixP
, seg
);
6950 /* We are only able to convert some relocs to pc-relative. */
6953 switch (fixP
->fx_r_type
)
6956 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
6960 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
6964 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
6967 case BFD_RELOC_LO16
:
6968 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
6971 case BFD_RELOC_HI16
:
6972 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
6975 case BFD_RELOC_HI16_S
:
6976 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
6979 case BFD_RELOC_PPC64_ADDR16_HIGH
:
6980 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGH
;
6983 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
6984 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHA
;
6987 case BFD_RELOC_PPC64_HIGHER
:
6988 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER
;
6991 case BFD_RELOC_PPC64_HIGHER_S
:
6992 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA
;
6995 case BFD_RELOC_PPC64_HIGHEST
:
6996 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST
;
6999 case BFD_RELOC_PPC64_HIGHEST_S
:
7000 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA
;
7003 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
7004 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER34
;
7007 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
7008 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA34
;
7011 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
7012 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST34
;
7015 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
7016 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA34
;
7019 case BFD_RELOC_PPC_16DX_HA
:
7020 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7023 case BFD_RELOC_PPC64_D34
:
7024 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL34
;
7027 case BFD_RELOC_PPC64_D28
:
7028 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL28
;
7035 else if (!fixP
->fx_done
7036 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
7038 /* addpcis is relative to next insn address. */
7040 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7045 if (fixP
->fx_pcrel_adjust
!= 0)
7047 /* This is a fixup on an instruction. */
7048 ppc_opindex_t opindex
= fixP
->fx_pcrel_adjust
& PPC_OPINDEX_MAX
;
7050 operand
= &powerpc_operands
[opindex
];
7052 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
7053 does not generate a reloc. It uses the offset of `sym' within its
7054 csect. Other usages, such as `.long sym', generate relocs. This
7055 is the documented behaviour of non-TOC symbols. */
7056 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
7057 && (operand
->bitm
& 0xfff0) == 0xfff0
7058 && operand
->shift
== 0
7059 && (operand
->insert
== NULL
|| ppc_obj64
)
7060 && fixP
->fx_addsy
!= NULL
7061 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
7062 && !ppc_is_toc_sym (fixP
->fx_addsy
)
7063 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
7065 value
= fixP
->fx_offset
;
7069 /* During parsing of instructions, a TOC16 reloc is generated for
7070 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
7071 in the toc. But at parse time, SYM may be not yet defined, so
7072 check again here. */
7073 if (fixP
->fx_r_type
== BFD_RELOC_16
7074 && fixP
->fx_addsy
!= NULL
7075 && ppc_is_toc_sym (fixP
->fx_addsy
))
7076 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
7080 /* Calculate value to be stored in field. */
7082 switch (fixP
->fx_r_type
)
7085 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
7086 case BFD_RELOC_PPC_VLE_LO16A
:
7087 case BFD_RELOC_PPC_VLE_LO16D
:
7089 case BFD_RELOC_LO16
:
7090 case BFD_RELOC_LO16_PCREL
:
7091 fieldval
= value
& 0xffff;
7093 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7094 fieldval
= SEX16 (fieldval
);
7095 fixP
->fx_no_overflow
= 1;
7098 case BFD_RELOC_HI16
:
7099 case BFD_RELOC_HI16_PCREL
:
7101 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7103 fieldval
= value
>> 16;
7104 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7106 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7107 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7113 case BFD_RELOC_PPC_VLE_HI16A
:
7114 case BFD_RELOC_PPC_VLE_HI16D
:
7115 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7117 fieldval
= PPC_HI (value
);
7118 goto sign_extend_16
;
7120 case BFD_RELOC_HI16_S
:
7121 case BFD_RELOC_HI16_S_PCREL
:
7122 case BFD_RELOC_PPC_16DX_HA
:
7123 case BFD_RELOC_PPC_REL16DX_HA
:
7125 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7127 fieldval
= (value
+ 0x8000) >> 16;
7128 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7130 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7131 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7137 case BFD_RELOC_PPC_VLE_HA16A
:
7138 case BFD_RELOC_PPC_VLE_HA16D
:
7139 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7141 fieldval
= PPC_HA (value
);
7142 goto sign_extend_16
;
7145 case BFD_RELOC_PPC64_HIGHER
:
7146 fieldval
= PPC_HIGHER (value
);
7147 goto sign_extend_16
;
7149 case BFD_RELOC_PPC64_HIGHER_S
:
7150 fieldval
= PPC_HIGHERA (value
);
7151 goto sign_extend_16
;
7153 case BFD_RELOC_PPC64_HIGHEST
:
7154 fieldval
= PPC_HIGHEST (value
);
7155 goto sign_extend_16
;
7157 case BFD_RELOC_PPC64_HIGHEST_S
:
7158 fieldval
= PPC_HIGHESTA (value
);
7159 goto sign_extend_16
;
7166 if (operand
!= NULL
)
7168 /* Handle relocs in an insn. */
7169 switch (fixP
->fx_r_type
)
7172 /* The following relocs can't be calculated by the assembler.
7173 Leave the field zero. */
7174 case BFD_RELOC_PPC_TPREL16
:
7175 case BFD_RELOC_PPC_TPREL16_LO
:
7176 case BFD_RELOC_PPC_TPREL16_HI
:
7177 case BFD_RELOC_PPC_TPREL16_HA
:
7178 case BFD_RELOC_PPC_DTPREL16
:
7179 case BFD_RELOC_PPC_DTPREL16_LO
:
7180 case BFD_RELOC_PPC_DTPREL16_HI
:
7181 case BFD_RELOC_PPC_DTPREL16_HA
:
7182 case BFD_RELOC_PPC_GOT_TLSGD16
:
7183 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7184 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7185 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7186 case BFD_RELOC_PPC_GOT_TLSLD16
:
7187 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7188 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7189 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7190 case BFD_RELOC_PPC_GOT_TPREL16
:
7191 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7192 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7193 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7194 case BFD_RELOC_PPC_GOT_DTPREL16
:
7195 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7196 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7197 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7198 case BFD_RELOC_PPC64_TPREL16_DS
:
7199 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
7200 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7201 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7202 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7203 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7204 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7205 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7206 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7207 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7208 case BFD_RELOC_PPC64_DTPREL16_DS
:
7209 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
7210 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7211 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7212 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7213 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7214 case BFD_RELOC_PPC64_TPREL34
:
7215 case BFD_RELOC_PPC64_DTPREL34
:
7216 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
7217 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
7218 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
7219 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
7220 gas_assert (fixP
->fx_addsy
!= NULL
);
7221 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7225 /* These also should leave the field zero for the same
7226 reason. Note that older versions of gas wrote values
7227 here. If we want to go back to the old behaviour, then
7228 all _LO and _LO_DS cases will need to be treated like
7229 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
7230 case BFD_RELOC_16_GOTOFF
:
7231 case BFD_RELOC_LO16_GOTOFF
:
7232 case BFD_RELOC_HI16_GOTOFF
:
7233 case BFD_RELOC_HI16_S_GOTOFF
:
7234 case BFD_RELOC_LO16_PLTOFF
:
7235 case BFD_RELOC_HI16_PLTOFF
:
7236 case BFD_RELOC_HI16_S_PLTOFF
:
7237 case BFD_RELOC_GPREL16
:
7238 case BFD_RELOC_16_BASEREL
:
7239 case BFD_RELOC_LO16_BASEREL
:
7240 case BFD_RELOC_HI16_BASEREL
:
7241 case BFD_RELOC_HI16_S_BASEREL
:
7242 case BFD_RELOC_PPC_TOC16
:
7243 case BFD_RELOC_PPC64_TOC16_LO
:
7244 case BFD_RELOC_PPC64_TOC16_HI
:
7245 case BFD_RELOC_PPC64_TOC16_HA
:
7246 case BFD_RELOC_PPC64_PLTGOT16
:
7247 case BFD_RELOC_PPC64_PLTGOT16_LO
:
7248 case BFD_RELOC_PPC64_PLTGOT16_HI
:
7249 case BFD_RELOC_PPC64_PLTGOT16_HA
:
7250 case BFD_RELOC_PPC64_GOT16_DS
:
7251 case BFD_RELOC_PPC64_GOT16_LO_DS
:
7252 case BFD_RELOC_PPC64_PLT16_LO_DS
:
7253 case BFD_RELOC_PPC64_SECTOFF_DS
:
7254 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
7255 case BFD_RELOC_PPC64_TOC16_DS
:
7256 case BFD_RELOC_PPC64_TOC16_LO_DS
:
7257 case BFD_RELOC_PPC64_PLTGOT16_DS
:
7258 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
7259 case BFD_RELOC_PPC_EMB_NADDR16
:
7260 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7261 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7262 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7263 case BFD_RELOC_PPC_EMB_SDAI16
:
7264 case BFD_RELOC_PPC_EMB_SDA2I16
:
7265 case BFD_RELOC_PPC_EMB_SDA2REL
:
7266 case BFD_RELOC_PPC_EMB_SDA21
:
7267 case BFD_RELOC_PPC_EMB_MRKREF
:
7268 case BFD_RELOC_PPC_EMB_RELSEC16
:
7269 case BFD_RELOC_PPC_EMB_RELST_LO
:
7270 case BFD_RELOC_PPC_EMB_RELST_HI
:
7271 case BFD_RELOC_PPC_EMB_RELST_HA
:
7272 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7273 case BFD_RELOC_PPC_EMB_RELSDA
:
7274 case BFD_RELOC_PPC_VLE_SDA21
:
7275 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7276 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7277 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
7278 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7279 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
7280 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7281 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
7282 case BFD_RELOC_PPC64_GOT_PCREL34
:
7283 case BFD_RELOC_PPC64_PLT_PCREL34
:
7284 gas_assert (fixP
->fx_addsy
!= NULL
);
7287 case BFD_RELOC_PPC_TLS
:
7288 case BFD_RELOC_PPC_TLSGD
:
7289 case BFD_RELOC_PPC_TLSLD
:
7290 case BFD_RELOC_PPC64_TLS_PCREL
:
7296 case BFD_RELOC_PPC_B16
:
7297 /* Adjust the offset to the instruction boundary. */
7302 case BFD_RELOC_VTABLE_INHERIT
:
7303 case BFD_RELOC_VTABLE_ENTRY
:
7304 case BFD_RELOC_PPC_DTPMOD
:
7305 case BFD_RELOC_PPC_TPREL
:
7306 case BFD_RELOC_PPC_DTPREL
:
7307 case BFD_RELOC_PPC_COPY
:
7308 case BFD_RELOC_PPC_GLOB_DAT
:
7309 case BFD_RELOC_32_PLT_PCREL
:
7310 case BFD_RELOC_PPC_EMB_NADDR32
:
7311 case BFD_RELOC_PPC64_TOC
:
7312 case BFD_RELOC_CTOR
:
7314 case BFD_RELOC_32_PCREL
:
7317 case BFD_RELOC_64_PCREL
:
7318 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7319 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7320 _("%s unsupported as instruction fixup"),
7321 bfd_get_reloc_code_name (fixP
->fx_r_type
));
7330 /* powerpc uses RELA style relocs, so if emitting a reloc the field
7331 contents can stay at zero. */
7332 #define APPLY_RELOC fixP->fx_done
7334 #define APPLY_RELOC 1
7336 /* We need to call the insert function even when fieldval is
7337 zero if the insert function would translate that zero to a
7338 bit pattern other than all zeros. */
7339 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
7342 unsigned char *where
;
7344 /* Fetch the instruction, insert the fully resolved operand
7345 value, and stuff the instruction back again. */
7346 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
7347 if (target_big_endian
)
7349 if (fixP
->fx_size
< 4)
7350 insn
= bfd_getb16 (where
);
7353 insn
= bfd_getb32 (where
);
7354 if (fixP
->fx_size
> 4)
7355 insn
= insn
<< 32 | bfd_getb32 (where
+ 4);
7360 if (fixP
->fx_size
< 4)
7361 insn
= bfd_getl16 (where
);
7364 insn
= bfd_getl32 (where
);
7365 if (fixP
->fx_size
> 4)
7366 insn
= insn
<< 32 | bfd_getl32 (where
+ 4);
7369 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
7370 fixP
->tc_fix_data
.ppc_cpu
,
7371 fixP
->fx_file
, fixP
->fx_line
);
7372 if (target_big_endian
)
7374 if (fixP
->fx_size
< 4)
7375 bfd_putb16 (insn
, where
);
7378 if (fixP
->fx_size
> 4)
7380 bfd_putb32 (insn
, where
+ 4);
7383 bfd_putb32 (insn
, where
);
7388 if (fixP
->fx_size
< 4)
7389 bfd_putl16 (insn
, where
);
7392 if (fixP
->fx_size
> 4)
7394 bfd_putl32 (insn
, where
+ 4);
7397 bfd_putl32 (insn
, where
);
7403 /* Nothing else to do here. */
7406 gas_assert (fixP
->fx_addsy
!= NULL
);
7407 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
7412 /* Use expr_symbol_where to see if this is an expression
7414 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
7415 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7416 _("unresolved expression that must be resolved"));
7418 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7419 _("unsupported relocation against %s"),
7420 S_GET_NAME (fixP
->fx_addsy
));
7427 /* Handle relocs in data. */
7428 switch (fixP
->fx_r_type
)
7430 case BFD_RELOC_VTABLE_INHERIT
:
7432 && !S_IS_DEFINED (fixP
->fx_addsy
)
7433 && !S_IS_WEAK (fixP
->fx_addsy
))
7434 S_SET_WEAK (fixP
->fx_addsy
);
7437 case BFD_RELOC_VTABLE_ENTRY
:
7442 /* These can appear with @l etc. in data. */
7443 case BFD_RELOC_LO16
:
7444 case BFD_RELOC_LO16_PCREL
:
7445 case BFD_RELOC_HI16
:
7446 case BFD_RELOC_HI16_PCREL
:
7447 case BFD_RELOC_HI16_S
:
7448 case BFD_RELOC_HI16_S_PCREL
:
7449 case BFD_RELOC_PPC64_HIGHER
:
7450 case BFD_RELOC_PPC64_HIGHER_S
:
7451 case BFD_RELOC_PPC64_HIGHEST
:
7452 case BFD_RELOC_PPC64_HIGHEST_S
:
7453 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7454 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7455 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7458 case BFD_RELOC_PPC_DTPMOD
:
7459 case BFD_RELOC_PPC_TPREL
:
7460 case BFD_RELOC_PPC_DTPREL
:
7461 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7464 /* Just punt all of these to the linker. */
7465 case BFD_RELOC_PPC_B16_BRTAKEN
:
7466 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7467 case BFD_RELOC_16_GOTOFF
:
7468 case BFD_RELOC_LO16_GOTOFF
:
7469 case BFD_RELOC_HI16_GOTOFF
:
7470 case BFD_RELOC_HI16_S_GOTOFF
:
7471 case BFD_RELOC_LO16_PLTOFF
:
7472 case BFD_RELOC_HI16_PLTOFF
:
7473 case BFD_RELOC_HI16_S_PLTOFF
:
7474 case BFD_RELOC_PPC_COPY
:
7475 case BFD_RELOC_PPC_GLOB_DAT
:
7476 case BFD_RELOC_16_BASEREL
:
7477 case BFD_RELOC_LO16_BASEREL
:
7478 case BFD_RELOC_HI16_BASEREL
:
7479 case BFD_RELOC_HI16_S_BASEREL
:
7480 case BFD_RELOC_PPC_TLS
:
7481 case BFD_RELOC_PPC_DTPREL16_LO
:
7482 case BFD_RELOC_PPC_DTPREL16_HI
:
7483 case BFD_RELOC_PPC_DTPREL16_HA
:
7484 case BFD_RELOC_PPC_TPREL16_LO
:
7485 case BFD_RELOC_PPC_TPREL16_HI
:
7486 case BFD_RELOC_PPC_TPREL16_HA
:
7487 case BFD_RELOC_PPC_GOT_TLSGD16
:
7488 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7489 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7490 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7491 case BFD_RELOC_PPC_GOT_TLSLD16
:
7492 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7493 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7494 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7495 case BFD_RELOC_PPC_GOT_DTPREL16
:
7496 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7497 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7498 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7499 case BFD_RELOC_PPC_GOT_TPREL16
:
7500 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7501 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7502 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7503 case BFD_RELOC_24_PLT_PCREL
:
7504 case BFD_RELOC_PPC_LOCAL24PC
:
7505 case BFD_RELOC_32_PLT_PCREL
:
7506 case BFD_RELOC_GPREL16
:
7507 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7508 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7509 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7510 case BFD_RELOC_PPC_EMB_NADDR32
:
7511 case BFD_RELOC_PPC_EMB_NADDR16
:
7512 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7513 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7514 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7515 case BFD_RELOC_PPC_EMB_SDAI16
:
7516 case BFD_RELOC_PPC_EMB_SDA2REL
:
7517 case BFD_RELOC_PPC_EMB_SDA2I16
:
7518 case BFD_RELOC_PPC_EMB_SDA21
:
7519 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7520 case BFD_RELOC_PPC_EMB_MRKREF
:
7521 case BFD_RELOC_PPC_EMB_RELSEC16
:
7522 case BFD_RELOC_PPC_EMB_RELST_LO
:
7523 case BFD_RELOC_PPC_EMB_RELST_HI
:
7524 case BFD_RELOC_PPC_EMB_RELST_HA
:
7525 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7526 case BFD_RELOC_PPC_EMB_RELSDA
:
7527 case BFD_RELOC_PPC64_TOC
:
7528 case BFD_RELOC_PPC_TOC16
:
7529 case BFD_RELOC_PPC_TOC16_LO
:
7530 case BFD_RELOC_PPC_TOC16_HI
:
7531 case BFD_RELOC_PPC64_TOC16_LO
:
7532 case BFD_RELOC_PPC64_TOC16_HI
:
7533 case BFD_RELOC_PPC64_TOC16_HA
:
7534 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7535 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7536 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7537 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7538 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7539 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7540 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7541 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7542 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7543 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7544 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7545 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7546 case BFD_RELOC_PPC64_TLS_PCREL
:
7552 case BFD_RELOC_PPC_TLSGD
:
7553 case BFD_RELOC_PPC_TLSLD
:
7554 case BFD_RELOC_PPC_TLSLE
:
7555 case BFD_RELOC_PPC_TLSIE
:
7556 case BFD_RELOC_PPC_TLSM
:
7557 case BFD_RELOC_PPC64_TLSGD
:
7558 case BFD_RELOC_PPC64_TLSLD
:
7559 case BFD_RELOC_PPC64_TLSLE
:
7560 case BFD_RELOC_PPC64_TLSIE
:
7561 case BFD_RELOC_PPC64_TLSM
:
7562 gas_assert (fixP
->fx_addsy
!= NULL
);
7563 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7566 /* Officially, R_TLSML relocations must be from a TOC entry
7567 targeting itself. In practice, this TOC entry is always
7568 named (or .rename) "_$TLSML".
7569 Thus, as it doesn't seem possible to retrieve the symbol
7570 being relocated here, we simply check that the symbol
7571 targeted by R_TLSML is indeed a TOC entry named "_$TLSML".
7572 FIXME: Find a way to correctly check R_TLSML relocations
7573 as described above. */
7574 case BFD_RELOC_PPC_TLSML
:
7575 case BFD_RELOC_PPC64_TLSML
:
7576 gas_assert (fixP
->fx_addsy
!= NULL
);
7577 if ((symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC
7578 || symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TE
)
7579 && strcmp (symbol_get_tc (fixP
->fx_addsy
)->real_name
, "_$TLSML") != 0)
7580 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7581 _("R_TLSML relocation doesn't target a "
7582 "TOC entry named \"_$TLSML\": %s"), S_GET_NAME(fixP
->fx_addsy
));
7586 case BFD_RELOC_NONE
:
7588 case BFD_RELOC_CTOR
:
7590 case BFD_RELOC_32_PCREL
:
7593 case BFD_RELOC_64_PCREL
:
7595 case BFD_RELOC_16_PCREL
:
7601 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7606 if (fixP
->fx_size
&& APPLY_RELOC
)
7607 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7608 fieldval
, fixP
->fx_size
);
7610 && (seg
->flags
& SEC_CODE
) != 0
7611 && fixP
->fx_size
== 4
7614 && (fixP
->fx_r_type
== BFD_RELOC_32
7615 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7616 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7617 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7618 _("data in executable section"));
7622 ppc_elf_validate_fix (fixP
, seg
);
7623 fixP
->fx_addnumber
= value
;
7625 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7626 from the section contents. If we are going to be emitting a reloc
7627 then the section contents are immaterial, so don't warn if they
7628 happen to overflow. Leave such warnings to ld. */
7631 fixP
->fx_no_overflow
= 1;
7633 /* Arrange to emit .TOC. as a normal symbol if used in anything
7634 but .TOC.@tocbase. */
7636 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7637 && fixP
->fx_addsy
!= NULL
7638 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7639 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7642 if (fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16
7643 || fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16_HI
7644 || fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16_LO
)
7646 /* We want to use the offset within the toc, not the actual VMA
7648 fixP
->fx_addnumber
= (- bfd_section_vma (S_GET_SEGMENT (fixP
->fx_addsy
))
7649 - S_GET_VALUE (ppc_toc_csect
));
7651 /* The high bits must be adjusted for the low bits being signed. */
7652 if (fixP
->fx_r_type
== BFD_RELOC_PPC_TOC16_HI
) {
7653 fixP
->fx_addnumber
+= 0x8000;
7656 /* Set *valP to avoid errors. */
7659 else if (fixP
->fx_r_type
== BFD_RELOC_PPC_TLSM
7660 || fixP
->fx_r_type
== BFD_RELOC_PPC64_TLSM
7661 || fixP
->fx_r_type
== BFD_RELOC_PPC_TLSML
7662 || fixP
->fx_r_type
== BFD_RELOC_PPC64_TLSML
)
7663 /* AIX ld expects the section contents for these relocations
7664 to be zero. Arrange for that to occur when
7665 bfd_install_relocation is called. */
7666 fixP
->fx_addnumber
= (- bfd_section_vma (S_GET_SEGMENT (fixP
->fx_addsy
))
7667 - S_GET_VALUE (fixP
->fx_addsy
)
7670 fixP
->fx_addnumber
= 0;
7674 /* Generate a reloc for a fixup. */
7677 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7679 static arelent
*relocs
[3];
7682 relocs
[0] = reloc
= XNEW (arelent
);
7685 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7686 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7687 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7688 /* BFD_RELOC_PPC64_TLS_PCREL generates R_PPC64_TLS with an odd r_offset. */
7689 if (fixp
->fx_r_type
== BFD_RELOC_PPC64_TLS_PCREL
)
7691 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7692 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7694 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7695 _("reloc %d not supported by object file format"),
7696 (int) fixp
->fx_r_type
);
7699 reloc
->addend
= fixp
->fx_addnumber
;
7701 if (fixp
->fx_subsy
!= NULL
)
7703 relocs
[1] = reloc
= XNEW (arelent
);
7706 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7707 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
7708 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7710 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_PPC_NEG
);
7711 reloc
->addend
= fixp
->fx_addnumber
;
7713 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7715 as_bad_subtract (fixp
);
7716 free (relocs
[1]->sym_ptr_ptr
);
7718 free (relocs
[0]->sym_ptr_ptr
);
7729 ppc_cfi_frame_initial_instructions (void)
7731 cfi_add_CFA_def_cfa (1, 0);
7735 tc_ppc_regname_to_dw2regnum (char *regname
)
7737 unsigned int regnum
= -1;
7741 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7743 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7744 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7745 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7746 { "spe_acc", 111 }, { "spefscr", 112 }
7749 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7750 if (strcmp (regnames
[i
].name
, regname
) == 0)
7751 return regnames
[i
].dw2regnum
;
7753 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7755 p
= regname
+ 1 + (regname
[1] == '.');
7756 regnum
= strtoul (p
, &q
, 10);
7757 if (p
== q
|| *q
|| regnum
>= 32)
7759 if (regname
[0] == 'f')
7761 else if (regname
[0] == 'v')
7764 else if (regname
[0] == 'c' && regname
[1] == 'r')
7766 p
= regname
+ 2 + (regname
[2] == '.');
7767 if (p
[0] < '0' || p
[0] > '7' || p
[1])
7769 regnum
= p
[0] - '0' + 68;