1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2019 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
39 #include "coff/xcoff.h"
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian
;
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian
= 0;
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
54 #define TARGET_REG_NAMES_P TRUE
56 #define TARGET_REG_NAMES_P FALSE
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
94 static bfd_boolean reg_names_p
= TARGET_REG_NAMES_P
;
96 static void ppc_macro (char *, const struct powerpc_macro
*);
97 static void ppc_byte (int);
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS
*, offsetT
);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
136 static void ppc_elf_gnu_attribute (int);
140 static void ppc_previous (int);
141 static void ppc_pdata (int);
142 static void ppc_ydata (int);
143 static void ppc_reldata (int);
144 static void ppc_rdata (int);
145 static void ppc_ualong (int);
146 static void ppc_znop (int);
147 static void ppc_pe_comm (int);
148 static void ppc_pe_section (int);
149 static void ppc_pe_function (int);
150 static void ppc_pe_tocd (int);
153 /* Generic assembler global variables which must be defined by all
157 /* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161 static const char ppc_solaris_comment_chars
[] = "#!";
162 static const char ppc_eabi_comment_chars
[] = "#";
164 #ifdef TARGET_SOLARIS_COMMENT
165 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
167 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
170 const char comment_chars
[] = "#";
173 /* Characters which start a comment at the beginning of a line. */
174 const char line_comment_chars
[] = "#";
176 /* Characters which may be used to separate multiple commands on a
178 const char line_separator_chars
[] = ";";
180 /* Characters which are used to indicate an exponent in a floating
182 const char EXP_CHARS
[] = "eE";
184 /* Characters which mean that a number is a floating point constant,
186 const char FLT_CHARS
[] = "dD";
188 /* Anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190 const char ppc_symbol_chars
[] = "%[";
192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193 int ppc_cie_data_alignment
;
195 /* The dwarf2 minimum instruction length. */
196 int ppc_dwarf2_line_min_insn_length
;
198 /* More than this number of nops in an alignment op gets a branch
200 unsigned long nop_limit
= 4;
202 /* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
204 ppc_cpu_t ppc_cpu
= 0;
205 ppc_cpu_t sticky
= 0;
207 /* Value for ELF e_flags EF_PPC64_ABI. */
208 unsigned int ppc_abiversion
= 0;
211 /* Flags set on encountering toc relocs. */
213 has_large_toc_reloc
= 1,
214 has_small_toc_reloc
= 2
218 /* Warn on emitting data to code sections. */
224 /* The target specific pseudo-ops which we support. */
226 const pseudo_typeS md_pseudo_table
[] =
228 /* Pseudo-ops which must be overridden. */
229 { "byte", ppc_byte
, 0 },
232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
233 legitimately belong in the obj-*.c file. However, XCOFF is based
234 on COFF, and is only implemented for the RS/6000. We just use
235 obj-coff.c, and add what we need here. */
236 { "comm", ppc_comm
, 0 },
237 { "lcomm", ppc_comm
, 1 },
241 { "bi", ppc_biei
, 0 },
243 { "csect", ppc_csect
, 0 },
244 { "dwsect", ppc_dwsect
, 0 },
245 { "data", ppc_section
, 'd' },
249 { "ei", ppc_biei
, 1 },
251 { "extern", ppc_extern
, 0 },
252 { "function", ppc_function
, 0 },
253 { "lglobl", ppc_lglobl
, 0 },
254 { "ref", ppc_ref
, 0 },
255 { "rename", ppc_rename
, 0 },
256 { "section", ppc_named_section
, 0 },
257 { "stabx", ppc_stabx
, 0 },
258 { "text", ppc_section
, 't' },
259 { "toc", ppc_toc
, 0 },
260 { "long", ppc_xcoff_cons
, 2 },
261 { "llong", ppc_xcoff_cons
, 3 },
262 { "word", ppc_xcoff_cons
, 1 },
263 { "short", ppc_xcoff_cons
, 1 },
264 { "vbyte", ppc_vbyte
, 0 },
268 { "llong", cons
, 8 },
269 { "rdata", ppc_elf_rdata
, 0 },
270 { "rodata", ppc_elf_rdata
, 0 },
271 { "lcomm", ppc_elf_lcomm
, 0 },
272 { "localentry", ppc_elf_localentry
, 0 },
273 { "abiversion", ppc_elf_abiversion
, 0 },
274 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
279 { "previous", ppc_previous
, 0 },
280 { "pdata", ppc_pdata
, 0 },
281 { "ydata", ppc_ydata
, 0 },
282 { "reldata", ppc_reldata
, 0 },
283 { "rdata", ppc_rdata
, 0 },
284 { "ualong", ppc_ualong
, 0 },
285 { "znop", ppc_znop
, 0 },
286 { "comm", ppc_pe_comm
, 0 },
287 { "lcomm", ppc_pe_comm
, 1 },
288 { "section", ppc_pe_section
, 0 },
289 { "function", ppc_pe_function
,0 },
290 { "tocd", ppc_pe_tocd
, 0 },
293 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
295 { "machine", ppc_machine
, 0 },
302 /* Predefined register names if -mregnames (or default for Windows NT).
303 In general, there are lots of them, in an attempt to be compatible
304 with a number of other Windows NT assemblers. */
306 /* Structure to hold information about predefined registers. */
310 unsigned short value
;
311 unsigned short flags
;
314 /* List of registers that are pre-defined:
316 Each general register has predefined names of the form:
317 1. r<reg_num> which has the value <reg_num>.
318 2. r.<reg_num> which has the value <reg_num>.
320 Each floating point register has predefined names of the form:
321 1. f<reg_num> which has the value <reg_num>.
322 2. f.<reg_num> which has the value <reg_num>.
324 Each vector unit register has predefined names of the form:
325 1. v<reg_num> which has the value <reg_num>.
326 2. v.<reg_num> which has the value <reg_num>.
328 Each condition register has predefined names of the form:
329 1. cr<reg_num> which has the value <reg_num>.
330 2. cr.<reg_num> which has the value <reg_num>.
332 There are individual registers as well:
333 sp or r.sp has the value 1
334 rtoc or r.toc has the value 2
339 dsisr has the value 18
341 sdr1 has the value 25
342 srr0 has the value 26
343 srr1 has the value 27
345 The table is sorted. Suitable for searching by a binary search. */
347 static const struct pd_reg pre_defined_registers
[] =
349 /* Condition Registers */
350 { "cr.0", 0, PPC_OPERAND_CR_REG
},
351 { "cr.1", 1, PPC_OPERAND_CR_REG
},
352 { "cr.2", 2, PPC_OPERAND_CR_REG
},
353 { "cr.3", 3, PPC_OPERAND_CR_REG
},
354 { "cr.4", 4, PPC_OPERAND_CR_REG
},
355 { "cr.5", 5, PPC_OPERAND_CR_REG
},
356 { "cr.6", 6, PPC_OPERAND_CR_REG
},
357 { "cr.7", 7, PPC_OPERAND_CR_REG
},
359 { "cr0", 0, PPC_OPERAND_CR_REG
},
360 { "cr1", 1, PPC_OPERAND_CR_REG
},
361 { "cr2", 2, PPC_OPERAND_CR_REG
},
362 { "cr3", 3, PPC_OPERAND_CR_REG
},
363 { "cr4", 4, PPC_OPERAND_CR_REG
},
364 { "cr5", 5, PPC_OPERAND_CR_REG
},
365 { "cr6", 6, PPC_OPERAND_CR_REG
},
366 { "cr7", 7, PPC_OPERAND_CR_REG
},
368 { "ctr", 9, PPC_OPERAND_SPR
},
369 { "dar", 19, PPC_OPERAND_SPR
},
370 { "dec", 22, PPC_OPERAND_SPR
},
371 { "dsisr", 18, PPC_OPERAND_SPR
},
373 /* Floating point registers */
374 { "f.0", 0, PPC_OPERAND_FPR
},
375 { "f.1", 1, PPC_OPERAND_FPR
},
376 { "f.10", 10, PPC_OPERAND_FPR
},
377 { "f.11", 11, PPC_OPERAND_FPR
},
378 { "f.12", 12, PPC_OPERAND_FPR
},
379 { "f.13", 13, PPC_OPERAND_FPR
},
380 { "f.14", 14, PPC_OPERAND_FPR
},
381 { "f.15", 15, PPC_OPERAND_FPR
},
382 { "f.16", 16, PPC_OPERAND_FPR
},
383 { "f.17", 17, PPC_OPERAND_FPR
},
384 { "f.18", 18, PPC_OPERAND_FPR
},
385 { "f.19", 19, PPC_OPERAND_FPR
},
386 { "f.2", 2, PPC_OPERAND_FPR
},
387 { "f.20", 20, PPC_OPERAND_FPR
},
388 { "f.21", 21, PPC_OPERAND_FPR
},
389 { "f.22", 22, PPC_OPERAND_FPR
},
390 { "f.23", 23, PPC_OPERAND_FPR
},
391 { "f.24", 24, PPC_OPERAND_FPR
},
392 { "f.25", 25, PPC_OPERAND_FPR
},
393 { "f.26", 26, PPC_OPERAND_FPR
},
394 { "f.27", 27, PPC_OPERAND_FPR
},
395 { "f.28", 28, PPC_OPERAND_FPR
},
396 { "f.29", 29, PPC_OPERAND_FPR
},
397 { "f.3", 3, PPC_OPERAND_FPR
},
398 { "f.30", 30, PPC_OPERAND_FPR
},
399 { "f.31", 31, PPC_OPERAND_FPR
},
400 { "f.32", 32, PPC_OPERAND_VSR
},
401 { "f.33", 33, PPC_OPERAND_VSR
},
402 { "f.34", 34, PPC_OPERAND_VSR
},
403 { "f.35", 35, PPC_OPERAND_VSR
},
404 { "f.36", 36, PPC_OPERAND_VSR
},
405 { "f.37", 37, PPC_OPERAND_VSR
},
406 { "f.38", 38, PPC_OPERAND_VSR
},
407 { "f.39", 39, PPC_OPERAND_VSR
},
408 { "f.4", 4, PPC_OPERAND_FPR
},
409 { "f.40", 40, PPC_OPERAND_VSR
},
410 { "f.41", 41, PPC_OPERAND_VSR
},
411 { "f.42", 42, PPC_OPERAND_VSR
},
412 { "f.43", 43, PPC_OPERAND_VSR
},
413 { "f.44", 44, PPC_OPERAND_VSR
},
414 { "f.45", 45, PPC_OPERAND_VSR
},
415 { "f.46", 46, PPC_OPERAND_VSR
},
416 { "f.47", 47, PPC_OPERAND_VSR
},
417 { "f.48", 48, PPC_OPERAND_VSR
},
418 { "f.49", 49, PPC_OPERAND_VSR
},
419 { "f.5", 5, PPC_OPERAND_FPR
},
420 { "f.50", 50, PPC_OPERAND_VSR
},
421 { "f.51", 51, PPC_OPERAND_VSR
},
422 { "f.52", 52, PPC_OPERAND_VSR
},
423 { "f.53", 53, PPC_OPERAND_VSR
},
424 { "f.54", 54, PPC_OPERAND_VSR
},
425 { "f.55", 55, PPC_OPERAND_VSR
},
426 { "f.56", 56, PPC_OPERAND_VSR
},
427 { "f.57", 57, PPC_OPERAND_VSR
},
428 { "f.58", 58, PPC_OPERAND_VSR
},
429 { "f.59", 59, PPC_OPERAND_VSR
},
430 { "f.6", 6, PPC_OPERAND_FPR
},
431 { "f.60", 60, PPC_OPERAND_VSR
},
432 { "f.61", 61, PPC_OPERAND_VSR
},
433 { "f.62", 62, PPC_OPERAND_VSR
},
434 { "f.63", 63, PPC_OPERAND_VSR
},
435 { "f.7", 7, PPC_OPERAND_FPR
},
436 { "f.8", 8, PPC_OPERAND_FPR
},
437 { "f.9", 9, PPC_OPERAND_FPR
},
439 { "f0", 0, PPC_OPERAND_FPR
},
440 { "f1", 1, PPC_OPERAND_FPR
},
441 { "f10", 10, PPC_OPERAND_FPR
},
442 { "f11", 11, PPC_OPERAND_FPR
},
443 { "f12", 12, PPC_OPERAND_FPR
},
444 { "f13", 13, PPC_OPERAND_FPR
},
445 { "f14", 14, PPC_OPERAND_FPR
},
446 { "f15", 15, PPC_OPERAND_FPR
},
447 { "f16", 16, PPC_OPERAND_FPR
},
448 { "f17", 17, PPC_OPERAND_FPR
},
449 { "f18", 18, PPC_OPERAND_FPR
},
450 { "f19", 19, PPC_OPERAND_FPR
},
451 { "f2", 2, PPC_OPERAND_FPR
},
452 { "f20", 20, PPC_OPERAND_FPR
},
453 { "f21", 21, PPC_OPERAND_FPR
},
454 { "f22", 22, PPC_OPERAND_FPR
},
455 { "f23", 23, PPC_OPERAND_FPR
},
456 { "f24", 24, PPC_OPERAND_FPR
},
457 { "f25", 25, PPC_OPERAND_FPR
},
458 { "f26", 26, PPC_OPERAND_FPR
},
459 { "f27", 27, PPC_OPERAND_FPR
},
460 { "f28", 28, PPC_OPERAND_FPR
},
461 { "f29", 29, PPC_OPERAND_FPR
},
462 { "f3", 3, PPC_OPERAND_FPR
},
463 { "f30", 30, PPC_OPERAND_FPR
},
464 { "f31", 31, PPC_OPERAND_FPR
},
465 { "f32", 32, PPC_OPERAND_VSR
},
466 { "f33", 33, PPC_OPERAND_VSR
},
467 { "f34", 34, PPC_OPERAND_VSR
},
468 { "f35", 35, PPC_OPERAND_VSR
},
469 { "f36", 36, PPC_OPERAND_VSR
},
470 { "f37", 37, PPC_OPERAND_VSR
},
471 { "f38", 38, PPC_OPERAND_VSR
},
472 { "f39", 39, PPC_OPERAND_VSR
},
473 { "f4", 4, PPC_OPERAND_FPR
},
474 { "f40", 40, PPC_OPERAND_VSR
},
475 { "f41", 41, PPC_OPERAND_VSR
},
476 { "f42", 42, PPC_OPERAND_VSR
},
477 { "f43", 43, PPC_OPERAND_VSR
},
478 { "f44", 44, PPC_OPERAND_VSR
},
479 { "f45", 45, PPC_OPERAND_VSR
},
480 { "f46", 46, PPC_OPERAND_VSR
},
481 { "f47", 47, PPC_OPERAND_VSR
},
482 { "f48", 48, PPC_OPERAND_VSR
},
483 { "f49", 49, PPC_OPERAND_VSR
},
484 { "f5", 5, PPC_OPERAND_FPR
},
485 { "f50", 50, PPC_OPERAND_VSR
},
486 { "f51", 51, PPC_OPERAND_VSR
},
487 { "f52", 52, PPC_OPERAND_VSR
},
488 { "f53", 53, PPC_OPERAND_VSR
},
489 { "f54", 54, PPC_OPERAND_VSR
},
490 { "f55", 55, PPC_OPERAND_VSR
},
491 { "f56", 56, PPC_OPERAND_VSR
},
492 { "f57", 57, PPC_OPERAND_VSR
},
493 { "f58", 58, PPC_OPERAND_VSR
},
494 { "f59", 59, PPC_OPERAND_VSR
},
495 { "f6", 6, PPC_OPERAND_FPR
},
496 { "f60", 60, PPC_OPERAND_VSR
},
497 { "f61", 61, PPC_OPERAND_VSR
},
498 { "f62", 62, PPC_OPERAND_VSR
},
499 { "f63", 63, PPC_OPERAND_VSR
},
500 { "f7", 7, PPC_OPERAND_FPR
},
501 { "f8", 8, PPC_OPERAND_FPR
},
502 { "f9", 9, PPC_OPERAND_FPR
},
504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0, PPC_OPERAND_GQR
},
506 { "gqr.1", 1, PPC_OPERAND_GQR
},
507 { "gqr.2", 2, PPC_OPERAND_GQR
},
508 { "gqr.3", 3, PPC_OPERAND_GQR
},
509 { "gqr.4", 4, PPC_OPERAND_GQR
},
510 { "gqr.5", 5, PPC_OPERAND_GQR
},
511 { "gqr.6", 6, PPC_OPERAND_GQR
},
512 { "gqr.7", 7, PPC_OPERAND_GQR
},
513 { "gqr0", 0, PPC_OPERAND_GQR
},
514 { "gqr1", 1, PPC_OPERAND_GQR
},
515 { "gqr2", 2, PPC_OPERAND_GQR
},
516 { "gqr3", 3, PPC_OPERAND_GQR
},
517 { "gqr4", 4, PPC_OPERAND_GQR
},
518 { "gqr5", 5, PPC_OPERAND_GQR
},
519 { "gqr6", 6, PPC_OPERAND_GQR
},
520 { "gqr7", 7, PPC_OPERAND_GQR
},
522 { "lr", 8, PPC_OPERAND_SPR
},
524 /* General Purpose Registers */
525 { "r.0", 0, PPC_OPERAND_GPR
},
526 { "r.1", 1, PPC_OPERAND_GPR
},
527 { "r.10", 10, PPC_OPERAND_GPR
},
528 { "r.11", 11, PPC_OPERAND_GPR
},
529 { "r.12", 12, PPC_OPERAND_GPR
},
530 { "r.13", 13, PPC_OPERAND_GPR
},
531 { "r.14", 14, PPC_OPERAND_GPR
},
532 { "r.15", 15, PPC_OPERAND_GPR
},
533 { "r.16", 16, PPC_OPERAND_GPR
},
534 { "r.17", 17, PPC_OPERAND_GPR
},
535 { "r.18", 18, PPC_OPERAND_GPR
},
536 { "r.19", 19, PPC_OPERAND_GPR
},
537 { "r.2", 2, PPC_OPERAND_GPR
},
538 { "r.20", 20, PPC_OPERAND_GPR
},
539 { "r.21", 21, PPC_OPERAND_GPR
},
540 { "r.22", 22, PPC_OPERAND_GPR
},
541 { "r.23", 23, PPC_OPERAND_GPR
},
542 { "r.24", 24, PPC_OPERAND_GPR
},
543 { "r.25", 25, PPC_OPERAND_GPR
},
544 { "r.26", 26, PPC_OPERAND_GPR
},
545 { "r.27", 27, PPC_OPERAND_GPR
},
546 { "r.28", 28, PPC_OPERAND_GPR
},
547 { "r.29", 29, PPC_OPERAND_GPR
},
548 { "r.3", 3, PPC_OPERAND_GPR
},
549 { "r.30", 30, PPC_OPERAND_GPR
},
550 { "r.31", 31, PPC_OPERAND_GPR
},
551 { "r.4", 4, PPC_OPERAND_GPR
},
552 { "r.5", 5, PPC_OPERAND_GPR
},
553 { "r.6", 6, PPC_OPERAND_GPR
},
554 { "r.7", 7, PPC_OPERAND_GPR
},
555 { "r.8", 8, PPC_OPERAND_GPR
},
556 { "r.9", 9, PPC_OPERAND_GPR
},
558 { "r.sp", 1, PPC_OPERAND_GPR
},
560 { "r.toc", 2, PPC_OPERAND_GPR
},
562 { "r0", 0, PPC_OPERAND_GPR
},
563 { "r1", 1, PPC_OPERAND_GPR
},
564 { "r10", 10, PPC_OPERAND_GPR
},
565 { "r11", 11, PPC_OPERAND_GPR
},
566 { "r12", 12, PPC_OPERAND_GPR
},
567 { "r13", 13, PPC_OPERAND_GPR
},
568 { "r14", 14, PPC_OPERAND_GPR
},
569 { "r15", 15, PPC_OPERAND_GPR
},
570 { "r16", 16, PPC_OPERAND_GPR
},
571 { "r17", 17, PPC_OPERAND_GPR
},
572 { "r18", 18, PPC_OPERAND_GPR
},
573 { "r19", 19, PPC_OPERAND_GPR
},
574 { "r2", 2, PPC_OPERAND_GPR
},
575 { "r20", 20, PPC_OPERAND_GPR
},
576 { "r21", 21, PPC_OPERAND_GPR
},
577 { "r22", 22, PPC_OPERAND_GPR
},
578 { "r23", 23, PPC_OPERAND_GPR
},
579 { "r24", 24, PPC_OPERAND_GPR
},
580 { "r25", 25, PPC_OPERAND_GPR
},
581 { "r26", 26, PPC_OPERAND_GPR
},
582 { "r27", 27, PPC_OPERAND_GPR
},
583 { "r28", 28, PPC_OPERAND_GPR
},
584 { "r29", 29, PPC_OPERAND_GPR
},
585 { "r3", 3, PPC_OPERAND_GPR
},
586 { "r30", 30, PPC_OPERAND_GPR
},
587 { "r31", 31, PPC_OPERAND_GPR
},
588 { "r4", 4, PPC_OPERAND_GPR
},
589 { "r5", 5, PPC_OPERAND_GPR
},
590 { "r6", 6, PPC_OPERAND_GPR
},
591 { "r7", 7, PPC_OPERAND_GPR
},
592 { "r8", 8, PPC_OPERAND_GPR
},
593 { "r9", 9, PPC_OPERAND_GPR
},
595 { "rtoc", 2, PPC_OPERAND_GPR
},
597 { "sdr1", 25, PPC_OPERAND_SPR
},
599 { "sp", 1, PPC_OPERAND_GPR
},
601 { "srr0", 26, PPC_OPERAND_SPR
},
602 { "srr1", 27, PPC_OPERAND_SPR
},
604 /* Vector (Altivec/VMX) registers */
605 { "v.0", 0, PPC_OPERAND_VR
},
606 { "v.1", 1, PPC_OPERAND_VR
},
607 { "v.10", 10, PPC_OPERAND_VR
},
608 { "v.11", 11, PPC_OPERAND_VR
},
609 { "v.12", 12, PPC_OPERAND_VR
},
610 { "v.13", 13, PPC_OPERAND_VR
},
611 { "v.14", 14, PPC_OPERAND_VR
},
612 { "v.15", 15, PPC_OPERAND_VR
},
613 { "v.16", 16, PPC_OPERAND_VR
},
614 { "v.17", 17, PPC_OPERAND_VR
},
615 { "v.18", 18, PPC_OPERAND_VR
},
616 { "v.19", 19, PPC_OPERAND_VR
},
617 { "v.2", 2, PPC_OPERAND_VR
},
618 { "v.20", 20, PPC_OPERAND_VR
},
619 { "v.21", 21, PPC_OPERAND_VR
},
620 { "v.22", 22, PPC_OPERAND_VR
},
621 { "v.23", 23, PPC_OPERAND_VR
},
622 { "v.24", 24, PPC_OPERAND_VR
},
623 { "v.25", 25, PPC_OPERAND_VR
},
624 { "v.26", 26, PPC_OPERAND_VR
},
625 { "v.27", 27, PPC_OPERAND_VR
},
626 { "v.28", 28, PPC_OPERAND_VR
},
627 { "v.29", 29, PPC_OPERAND_VR
},
628 { "v.3", 3, PPC_OPERAND_VR
},
629 { "v.30", 30, PPC_OPERAND_VR
},
630 { "v.31", 31, PPC_OPERAND_VR
},
631 { "v.4", 4, PPC_OPERAND_VR
},
632 { "v.5", 5, PPC_OPERAND_VR
},
633 { "v.6", 6, PPC_OPERAND_VR
},
634 { "v.7", 7, PPC_OPERAND_VR
},
635 { "v.8", 8, PPC_OPERAND_VR
},
636 { "v.9", 9, PPC_OPERAND_VR
},
638 { "v0", 0, PPC_OPERAND_VR
},
639 { "v1", 1, PPC_OPERAND_VR
},
640 { "v10", 10, PPC_OPERAND_VR
},
641 { "v11", 11, PPC_OPERAND_VR
},
642 { "v12", 12, PPC_OPERAND_VR
},
643 { "v13", 13, PPC_OPERAND_VR
},
644 { "v14", 14, PPC_OPERAND_VR
},
645 { "v15", 15, PPC_OPERAND_VR
},
646 { "v16", 16, PPC_OPERAND_VR
},
647 { "v17", 17, PPC_OPERAND_VR
},
648 { "v18", 18, PPC_OPERAND_VR
},
649 { "v19", 19, PPC_OPERAND_VR
},
650 { "v2", 2, PPC_OPERAND_VR
},
651 { "v20", 20, PPC_OPERAND_VR
},
652 { "v21", 21, PPC_OPERAND_VR
},
653 { "v22", 22, PPC_OPERAND_VR
},
654 { "v23", 23, PPC_OPERAND_VR
},
655 { "v24", 24, PPC_OPERAND_VR
},
656 { "v25", 25, PPC_OPERAND_VR
},
657 { "v26", 26, PPC_OPERAND_VR
},
658 { "v27", 27, PPC_OPERAND_VR
},
659 { "v28", 28, PPC_OPERAND_VR
},
660 { "v29", 29, PPC_OPERAND_VR
},
661 { "v3", 3, PPC_OPERAND_VR
},
662 { "v30", 30, PPC_OPERAND_VR
},
663 { "v31", 31, PPC_OPERAND_VR
},
664 { "v4", 4, PPC_OPERAND_VR
},
665 { "v5", 5, PPC_OPERAND_VR
},
666 { "v6", 6, PPC_OPERAND_VR
},
667 { "v7", 7, PPC_OPERAND_VR
},
668 { "v8", 8, PPC_OPERAND_VR
},
669 { "v9", 9, PPC_OPERAND_VR
},
671 /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.0", 0, PPC_OPERAND_VSR
},
673 { "vs.1", 1, PPC_OPERAND_VSR
},
674 { "vs.10", 10, PPC_OPERAND_VSR
},
675 { "vs.11", 11, PPC_OPERAND_VSR
},
676 { "vs.12", 12, PPC_OPERAND_VSR
},
677 { "vs.13", 13, PPC_OPERAND_VSR
},
678 { "vs.14", 14, PPC_OPERAND_VSR
},
679 { "vs.15", 15, PPC_OPERAND_VSR
},
680 { "vs.16", 16, PPC_OPERAND_VSR
},
681 { "vs.17", 17, PPC_OPERAND_VSR
},
682 { "vs.18", 18, PPC_OPERAND_VSR
},
683 { "vs.19", 19, PPC_OPERAND_VSR
},
684 { "vs.2", 2, PPC_OPERAND_VSR
},
685 { "vs.20", 20, PPC_OPERAND_VSR
},
686 { "vs.21", 21, PPC_OPERAND_VSR
},
687 { "vs.22", 22, PPC_OPERAND_VSR
},
688 { "vs.23", 23, PPC_OPERAND_VSR
},
689 { "vs.24", 24, PPC_OPERAND_VSR
},
690 { "vs.25", 25, PPC_OPERAND_VSR
},
691 { "vs.26", 26, PPC_OPERAND_VSR
},
692 { "vs.27", 27, PPC_OPERAND_VSR
},
693 { "vs.28", 28, PPC_OPERAND_VSR
},
694 { "vs.29", 29, PPC_OPERAND_VSR
},
695 { "vs.3", 3, PPC_OPERAND_VSR
},
696 { "vs.30", 30, PPC_OPERAND_VSR
},
697 { "vs.31", 31, PPC_OPERAND_VSR
},
698 { "vs.32", 32, PPC_OPERAND_VSR
},
699 { "vs.33", 33, PPC_OPERAND_VSR
},
700 { "vs.34", 34, PPC_OPERAND_VSR
},
701 { "vs.35", 35, PPC_OPERAND_VSR
},
702 { "vs.36", 36, PPC_OPERAND_VSR
},
703 { "vs.37", 37, PPC_OPERAND_VSR
},
704 { "vs.38", 38, PPC_OPERAND_VSR
},
705 { "vs.39", 39, PPC_OPERAND_VSR
},
706 { "vs.4", 4, PPC_OPERAND_VSR
},
707 { "vs.40", 40, PPC_OPERAND_VSR
},
708 { "vs.41", 41, PPC_OPERAND_VSR
},
709 { "vs.42", 42, PPC_OPERAND_VSR
},
710 { "vs.43", 43, PPC_OPERAND_VSR
},
711 { "vs.44", 44, PPC_OPERAND_VSR
},
712 { "vs.45", 45, PPC_OPERAND_VSR
},
713 { "vs.46", 46, PPC_OPERAND_VSR
},
714 { "vs.47", 47, PPC_OPERAND_VSR
},
715 { "vs.48", 48, PPC_OPERAND_VSR
},
716 { "vs.49", 49, PPC_OPERAND_VSR
},
717 { "vs.5", 5, PPC_OPERAND_VSR
},
718 { "vs.50", 50, PPC_OPERAND_VSR
},
719 { "vs.51", 51, PPC_OPERAND_VSR
},
720 { "vs.52", 52, PPC_OPERAND_VSR
},
721 { "vs.53", 53, PPC_OPERAND_VSR
},
722 { "vs.54", 54, PPC_OPERAND_VSR
},
723 { "vs.55", 55, PPC_OPERAND_VSR
},
724 { "vs.56", 56, PPC_OPERAND_VSR
},
725 { "vs.57", 57, PPC_OPERAND_VSR
},
726 { "vs.58", 58, PPC_OPERAND_VSR
},
727 { "vs.59", 59, PPC_OPERAND_VSR
},
728 { "vs.6", 6, PPC_OPERAND_VSR
},
729 { "vs.60", 60, PPC_OPERAND_VSR
},
730 { "vs.61", 61, PPC_OPERAND_VSR
},
731 { "vs.62", 62, PPC_OPERAND_VSR
},
732 { "vs.63", 63, PPC_OPERAND_VSR
},
733 { "vs.7", 7, PPC_OPERAND_VSR
},
734 { "vs.8", 8, PPC_OPERAND_VSR
},
735 { "vs.9", 9, PPC_OPERAND_VSR
},
737 { "vs0", 0, PPC_OPERAND_VSR
},
738 { "vs1", 1, PPC_OPERAND_VSR
},
739 { "vs10", 10, PPC_OPERAND_VSR
},
740 { "vs11", 11, PPC_OPERAND_VSR
},
741 { "vs12", 12, PPC_OPERAND_VSR
},
742 { "vs13", 13, PPC_OPERAND_VSR
},
743 { "vs14", 14, PPC_OPERAND_VSR
},
744 { "vs15", 15, PPC_OPERAND_VSR
},
745 { "vs16", 16, PPC_OPERAND_VSR
},
746 { "vs17", 17, PPC_OPERAND_VSR
},
747 { "vs18", 18, PPC_OPERAND_VSR
},
748 { "vs19", 19, PPC_OPERAND_VSR
},
749 { "vs2", 2, PPC_OPERAND_VSR
},
750 { "vs20", 20, PPC_OPERAND_VSR
},
751 { "vs21", 21, PPC_OPERAND_VSR
},
752 { "vs22", 22, PPC_OPERAND_VSR
},
753 { "vs23", 23, PPC_OPERAND_VSR
},
754 { "vs24", 24, PPC_OPERAND_VSR
},
755 { "vs25", 25, PPC_OPERAND_VSR
},
756 { "vs26", 26, PPC_OPERAND_VSR
},
757 { "vs27", 27, PPC_OPERAND_VSR
},
758 { "vs28", 28, PPC_OPERAND_VSR
},
759 { "vs29", 29, PPC_OPERAND_VSR
},
760 { "vs3", 3, PPC_OPERAND_VSR
},
761 { "vs30", 30, PPC_OPERAND_VSR
},
762 { "vs31", 31, PPC_OPERAND_VSR
},
763 { "vs32", 32, PPC_OPERAND_VSR
},
764 { "vs33", 33, PPC_OPERAND_VSR
},
765 { "vs34", 34, PPC_OPERAND_VSR
},
766 { "vs35", 35, PPC_OPERAND_VSR
},
767 { "vs36", 36, PPC_OPERAND_VSR
},
768 { "vs37", 37, PPC_OPERAND_VSR
},
769 { "vs38", 38, PPC_OPERAND_VSR
},
770 { "vs39", 39, PPC_OPERAND_VSR
},
771 { "vs4", 4, PPC_OPERAND_VSR
},
772 { "vs40", 40, PPC_OPERAND_VSR
},
773 { "vs41", 41, PPC_OPERAND_VSR
},
774 { "vs42", 42, PPC_OPERAND_VSR
},
775 { "vs43", 43, PPC_OPERAND_VSR
},
776 { "vs44", 44, PPC_OPERAND_VSR
},
777 { "vs45", 45, PPC_OPERAND_VSR
},
778 { "vs46", 46, PPC_OPERAND_VSR
},
779 { "vs47", 47, PPC_OPERAND_VSR
},
780 { "vs48", 48, PPC_OPERAND_VSR
},
781 { "vs49", 49, PPC_OPERAND_VSR
},
782 { "vs5", 5, PPC_OPERAND_VSR
},
783 { "vs50", 50, PPC_OPERAND_VSR
},
784 { "vs51", 51, PPC_OPERAND_VSR
},
785 { "vs52", 52, PPC_OPERAND_VSR
},
786 { "vs53", 53, PPC_OPERAND_VSR
},
787 { "vs54", 54, PPC_OPERAND_VSR
},
788 { "vs55", 55, PPC_OPERAND_VSR
},
789 { "vs56", 56, PPC_OPERAND_VSR
},
790 { "vs57", 57, PPC_OPERAND_VSR
},
791 { "vs58", 58, PPC_OPERAND_VSR
},
792 { "vs59", 59, PPC_OPERAND_VSR
},
793 { "vs6", 6, PPC_OPERAND_VSR
},
794 { "vs60", 60, PPC_OPERAND_VSR
},
795 { "vs61", 61, PPC_OPERAND_VSR
},
796 { "vs62", 62, PPC_OPERAND_VSR
},
797 { "vs63", 63, PPC_OPERAND_VSR
},
798 { "vs7", 7, PPC_OPERAND_VSR
},
799 { "vs8", 8, PPC_OPERAND_VSR
},
800 { "vs9", 9, PPC_OPERAND_VSR
},
802 { "xer", 1, PPC_OPERAND_SPR
}
805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
807 /* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
810 static const struct pd_reg
*
811 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
813 int middle
, low
, high
;
821 middle
= (low
+ high
) / 2;
822 cmp
= strcasecmp (name
, regs
[middle
].name
);
828 return ®s
[middle
];
836 * Summary of register_name.
838 * in: Input_line_pointer points to 1st char of operand.
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 register_name (expressionS
*expressionP
)
850 const struct pd_reg
*reg
;
855 /* Find the spelling of the operand. */
856 start
= name
= input_line_pointer
;
857 if (name
[0] == '%' && ISALPHA (name
[1]))
858 name
= ++input_line_pointer
;
860 else if (!reg_names_p
|| !ISALPHA (name
[0]))
863 c
= get_symbol_name (&name
);
864 reg
= reg_name_search (pre_defined_registers
, REG_NAME_CNT
, name
);
866 /* Put back the delimiting char. */
867 *input_line_pointer
= c
;
869 /* Look to see if it's in the register table. */
872 expressionP
->X_op
= O_register
;
873 expressionP
->X_add_number
= reg
->value
;
874 expressionP
->X_md
= reg
->flags
;
876 /* Make the rest nice. */
877 expressionP
->X_add_symbol
= NULL
;
878 expressionP
->X_op_symbol
= NULL
;
882 /* Reset the line as if we had not done anything. */
883 input_line_pointer
= start
;
887 /* This function is called for each symbol seen in an expression. It
888 handles the special parsing which PowerPC assemblers are supposed
889 to use for condition codes. */
891 /* Whether to do the special parsing. */
892 static bfd_boolean cr_operand
;
894 /* Names to recognize in a condition code. This table is sorted. */
895 static const struct pd_reg cr_names
[] =
897 { "cr0", 0, PPC_OPERAND_CR_REG
},
898 { "cr1", 1, PPC_OPERAND_CR_REG
},
899 { "cr2", 2, PPC_OPERAND_CR_REG
},
900 { "cr3", 3, PPC_OPERAND_CR_REG
},
901 { "cr4", 4, PPC_OPERAND_CR_REG
},
902 { "cr5", 5, PPC_OPERAND_CR_REG
},
903 { "cr6", 6, PPC_OPERAND_CR_REG
},
904 { "cr7", 7, PPC_OPERAND_CR_REG
},
905 { "eq", 2, PPC_OPERAND_CR_BIT
},
906 { "gt", 1, PPC_OPERAND_CR_BIT
},
907 { "lt", 0, PPC_OPERAND_CR_BIT
},
908 { "so", 3, PPC_OPERAND_CR_BIT
},
909 { "un", 3, PPC_OPERAND_CR_BIT
}
912 /* Parsing function. This returns non-zero if it recognized an
916 ppc_parse_name (const char *name
, expressionS
*exp
)
918 const struct pd_reg
*reg
;
925 reg
= reg_name_search (cr_names
, sizeof cr_names
/ sizeof cr_names
[0],
930 exp
->X_op
= O_register
;
931 exp
->X_add_number
= reg
->value
;
932 exp
->X_md
= reg
->flags
;
937 /* Propagate X_md and check register expressions. This is to support
938 condition codes like 4*cr5+eq. */
941 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
943 /* Accept 4*cr<n> and cr<n>*4. */
945 && ((right
->X_op
== O_register
946 && right
->X_md
== PPC_OPERAND_CR_REG
947 && left
->X_op
== O_constant
948 && left
->X_add_number
== 4)
949 || (left
->X_op
== O_register
950 && left
->X_md
== PPC_OPERAND_CR_REG
951 && right
->X_op
== O_constant
952 && right
->X_add_number
== 4)))
954 left
->X_op
= O_register
;
955 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
956 left
->X_add_number
*= right
->X_add_number
;
960 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
961 if (right
->X_op
== O_register
962 && left
->X_op
== O_register
964 && ((right
->X_md
== PPC_OPERAND_CR_BIT
965 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
966 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
967 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
969 left
->X_md
= PPC_OPERAND_CR_BIT
;
970 right
->X_op
= O_constant
;
974 /* Accept reg +/- constant. */
975 if (left
->X_op
== O_register
976 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
977 as_warn (_("invalid register expression"));
979 /* Accept constant + reg. */
980 if (right
->X_op
== O_register
)
982 if (op
== O_add
&& left
->X_op
== O_constant
)
983 left
->X_md
= right
->X_md
;
985 as_warn (_("invalid register expression"));
991 /* Local variables. */
993 /* Whether to target xcoff64/elf64. */
994 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
996 /* Opcode hash table. */
997 static struct hash_control
*ppc_hash
;
999 /* Macro hash table. */
1000 static struct hash_control
*ppc_macro_hash
;
1003 /* What type of shared library support to use. */
1004 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
1006 /* Flags to set in the elf header. */
1007 static flagword ppc_flags
= 0;
1009 /* Whether this is Solaris or not. */
1010 #ifdef TARGET_SOLARIS_COMMENT
1011 #define SOLARIS_P TRUE
1013 #define SOLARIS_P FALSE
1016 static bfd_boolean msolaris
= SOLARIS_P
;
1021 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1022 using a bunch of different sections. These assembler sections,
1023 however, are all encompassed within the .text or .data sections of
1024 the final output file. We handle this by using different
1025 subsegments within these main segments. */
1027 /* Next subsegment to allocate within the .text segment. */
1028 static subsegT ppc_text_subsegment
= 2;
1030 /* Linked list of csects in the text section. */
1031 static symbolS
*ppc_text_csects
;
1033 /* Next subsegment to allocate within the .data segment. */
1034 static subsegT ppc_data_subsegment
= 2;
1036 /* Linked list of csects in the data section. */
1037 static symbolS
*ppc_data_csects
;
1039 /* The current csect. */
1040 static symbolS
*ppc_current_csect
;
1042 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1043 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1044 A special relocation is used when accessing TOC entries. We handle
1045 the TOC as a subsegment within the .data segment. We set it up if
1046 we see a .toc pseudo-op, and save the csect symbol here. */
1047 static symbolS
*ppc_toc_csect
;
1049 /* The first frag in the TOC subsegment. */
1050 static fragS
*ppc_toc_frag
;
1052 /* The first frag in the first subsegment after the TOC in the .data
1053 segment. NULL if there are no subsegments after the TOC. */
1054 static fragS
*ppc_after_toc_frag
;
1056 /* The current static block. */
1057 static symbolS
*ppc_current_block
;
1059 /* The COFF debugging section; set by md_begin. This is not the
1060 .debug section, but is instead the secret BFD section which will
1061 cause BFD to set the section number of a symbol to N_DEBUG. */
1062 static asection
*ppc_coff_debug_section
;
1064 /* Structure to set the length field of the dwarf sections. */
1065 struct dw_subsection
{
1066 /* Subsections are simply linked. */
1067 struct dw_subsection
*link
;
1069 /* The subsection number. */
1072 /* Expression to compute the length of the section. */
1073 expressionS end_exp
;
1076 static struct dw_section
{
1077 /* Corresponding section. */
1080 /* Simply linked list of subsections with a label. */
1081 struct dw_subsection
*list_subseg
;
1083 /* The anonymous subsection. */
1084 struct dw_subsection
*anon_subseg
;
1085 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1086 #endif /* OBJ_XCOFF */
1090 /* Various sections that we need for PE coff support. */
1091 static segT ydata_section
;
1092 static segT pdata_section
;
1093 static segT reldata_section
;
1094 static segT rdata_section
;
1095 static segT tocdata_section
;
1097 /* The current section and the previous section. See ppc_previous. */
1098 static segT ppc_previous_section
;
1099 static segT ppc_current_section
;
1104 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1105 unsigned long *ppc_apuinfo_list
;
1106 unsigned int ppc_apuinfo_num
;
1107 unsigned int ppc_apuinfo_num_alloc
;
1108 #endif /* OBJ_ELF */
1111 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1113 const char *const md_shortopts
= "um:";
1115 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1116 const struct option md_longopts
[] = {
1117 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1118 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1119 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1120 {NULL
, no_argument
, NULL
, 0}
1122 const size_t md_longopts_size
= sizeof (md_longopts
);
1125 md_parse_option (int c
, const char *arg
)
1132 /* -u means that any undefined symbols should be treated as
1133 external, which is the default for gas anyhow. */
1138 /* Solaris as takes -le (presumably for little endian). For completeness
1139 sake, recognize -be also. */
1140 if (strcmp (arg
, "e") == 0)
1142 target_big_endian
= 0;
1143 set_target_endian
= 1;
1144 if (ppc_cpu
& PPC_OPCODE_VLE
)
1145 as_bad (_("the use of -mvle requires big endian."));
1153 if (strcmp (arg
, "e") == 0)
1155 target_big_endian
= 1;
1156 set_target_endian
= 1;
1164 /* Recognize -K PIC. */
1165 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1168 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1176 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1178 if (strcmp (arg
, "64") == 0)
1182 if (ppc_cpu
& PPC_OPCODE_VLE
)
1183 as_bad (_("the use of -mvle requires -a32."));
1185 as_fatal (_("%s unsupported"), "-a64");
1188 else if (strcmp (arg
, "32") == 0)
1195 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1196 /* "raw" is only valid for the disassembler. */
1197 if (new_cpu
!= 0 && (new_cpu
& PPC_OPCODE_RAW
) == 0)
1200 if (strcmp (arg
, "vle") == 0)
1202 if (set_target_endian
&& target_big_endian
== 0)
1203 as_bad (_("the use of -mvle requires big endian."));
1205 as_bad (_("the use of -mvle requires -a32."));
1209 else if (strcmp (arg
, "no-vle") == 0)
1211 sticky
&= ~PPC_OPCODE_VLE
;
1213 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, "booke");
1214 new_cpu
&= ~PPC_OPCODE_VLE
;
1219 else if (strcmp (arg
, "regnames") == 0)
1222 else if (strcmp (arg
, "no-regnames") == 0)
1223 reg_names_p
= FALSE
;
1226 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1227 that require relocation. */
1228 else if (strcmp (arg
, "relocatable") == 0)
1230 shlib
= SHLIB_MRELOCATABLE
;
1231 ppc_flags
|= EF_PPC_RELOCATABLE
;
1234 else if (strcmp (arg
, "relocatable-lib") == 0)
1236 shlib
= SHLIB_MRELOCATABLE
;
1237 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1240 /* -memb, set embedded bit. */
1241 else if (strcmp (arg
, "emb") == 0)
1242 ppc_flags
|= EF_PPC_EMB
;
1244 /* -mlittle/-mbig set the endianness. */
1245 else if (strcmp (arg
, "little") == 0
1246 || strcmp (arg
, "little-endian") == 0)
1248 target_big_endian
= 0;
1249 set_target_endian
= 1;
1250 if (ppc_cpu
& PPC_OPCODE_VLE
)
1251 as_bad (_("the use of -mvle requires big endian."));
1254 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1256 target_big_endian
= 1;
1257 set_target_endian
= 1;
1260 else if (strcmp (arg
, "solaris") == 0)
1263 ppc_comment_chars
= ppc_solaris_comment_chars
;
1266 else if (strcmp (arg
, "no-solaris") == 0)
1269 ppc_comment_chars
= ppc_eabi_comment_chars
;
1271 else if (strcmp (arg
, "spe2") == 0)
1273 ppc_cpu
|= PPC_OPCODE_SPE2
;
1278 as_bad (_("invalid switch -m%s"), arg
);
1284 /* -V: SVR4 argument to print version ID. */
1286 print_version_id ();
1289 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1290 should be emitted or not. FIXME: Not implemented. */
1294 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1295 rather than .stabs.excl, which is ignored by the linker.
1296 FIXME: Not implemented. */
1307 nop_limit
= strtoul (optarg
, &end
, 0);
1309 as_bad (_("--nops needs a numeric argument"));
1324 is_ppc64_target (const bfd_target
*targ
, void *data ATTRIBUTE_UNUSED
)
1326 switch (targ
->flavour
)
1329 case bfd_target_elf_flavour
:
1330 return strncmp (targ
->name
, "elf64-powerpc", 13) == 0;
1333 case bfd_target_xcoff_flavour
:
1334 return (strcmp (targ
->name
, "aixcoff64-rs6000") == 0
1335 || strcmp (targ
->name
, "aix5coff64-rs6000") == 0);
1343 md_show_usage (FILE *stream
)
1345 fprintf (stream
, _("\
1346 PowerPC options:\n"));
1347 fprintf (stream
, _("\
1348 -a32 generate ELF32/XCOFF32\n"));
1349 if (bfd_iterate_over_targets (is_ppc64_target
, NULL
))
1350 fprintf (stream
, _("\
1351 -a64 generate ELF64/XCOFF64\n"));
1352 fprintf (stream
, _("\
1354 fprintf (stream
, _("\
1355 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n"));
1356 fprintf (stream
, _("\
1357 -mpwr generate code for POWER (RIOS1)\n"));
1358 fprintf (stream
, _("\
1359 -m601 generate code for PowerPC 601\n"));
1360 fprintf (stream
, _("\
1361 -mppc, -mppc32, -m603, -m604\n\
1362 generate code for PowerPC 603/604\n"));
1363 fprintf (stream
, _("\
1364 -m403 generate code for PowerPC 403\n"));
1365 fprintf (stream
, _("\
1366 -m405 generate code for PowerPC 405\n"));
1367 fprintf (stream
, _("\
1368 -m440 generate code for PowerPC 440\n"));
1369 fprintf (stream
, _("\
1370 -m464 generate code for PowerPC 464\n"));
1371 fprintf (stream
, _("\
1372 -m476 generate code for PowerPC 476\n"));
1373 fprintf (stream
, _("\
1374 -m7400, -m7410, -m7450, -m7455\n\
1375 generate code for PowerPC 7400/7410/7450/7455\n"));
1376 fprintf (stream
, _("\
1377 -m750cl, -mgekko, -mbroadway\n\
1378 generate code for PowerPC 750cl/Gekko/Broadway\n"));
1379 fprintf (stream
, _("\
1380 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1381 fprintf (stream
, _("\
1382 -mppc64, -m620 generate code for PowerPC 620/625/630\n"));
1383 fprintf (stream
, _("\
1384 -mppc64bridge generate code for PowerPC 64, including bridge insns\n"));
1385 fprintf (stream
, _("\
1386 -mbooke generate code for 32-bit PowerPC BookE\n"));
1387 fprintf (stream
, _("\
1388 -ma2 generate code for A2 architecture\n"));
1389 fprintf (stream
, _("\
1390 -mpower4, -mpwr4 generate code for Power4 architecture\n"));
1391 fprintf (stream
, _("\
1392 -mpower5, -mpwr5, -mpwr5x\n\
1393 generate code for Power5 architecture\n"));
1394 fprintf (stream
, _("\
1395 -mpower6, -mpwr6 generate code for Power6 architecture\n"));
1396 fprintf (stream
, _("\
1397 -mpower7, -mpwr7 generate code for Power7 architecture\n"));
1398 fprintf (stream
, _("\
1399 -mpower8, -mpwr8 generate code for Power8 architecture\n"));
1400 fprintf (stream
, _("\
1401 -mpower9, -mpwr9 generate code for Power9 architecture\n"));
1402 fprintf (stream
, _("\
1403 -mcell generate code for Cell Broadband Engine architecture\n"));
1404 fprintf (stream
, _("\
1405 -mcom generate code for Power/PowerPC common instructions\n"));
1406 fprintf (stream
, _("\
1407 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1408 fprintf (stream
, _("\
1409 -maltivec generate code for AltiVec\n"));
1410 fprintf (stream
, _("\
1411 -mvsx generate code for Vector-Scalar (VSX) instructions\n"));
1412 fprintf (stream
, _("\
1413 -me300 generate code for PowerPC e300 family\n"));
1414 fprintf (stream
, _("\
1415 -me500, -me500x2 generate code for Motorola e500 core complex\n"));
1416 fprintf (stream
, _("\
1417 -me500mc, generate code for Freescale e500mc core complex\n"));
1418 fprintf (stream
, _("\
1419 -me500mc64, generate code for Freescale e500mc64 core complex\n"));
1420 fprintf (stream
, _("\
1421 -me5500, generate code for Freescale e5500 core complex\n"));
1422 fprintf (stream
, _("\
1423 -me6500, generate code for Freescale e6500 core complex\n"));
1424 fprintf (stream
, _("\
1425 -mspe generate code for Motorola SPE instructions\n"));
1426 fprintf (stream
, _("\
1427 -mspe2 generate code for Freescale SPE2 instructions\n"));
1428 fprintf (stream
, _("\
1429 -mvle generate code for Freescale VLE instructions\n"));
1430 fprintf (stream
, _("\
1431 -mtitan generate code for AppliedMicro Titan core complex\n"));
1432 fprintf (stream
, _("\
1433 -mregnames Allow symbolic names for registers\n"));
1434 fprintf (stream
, _("\
1435 -mno-regnames Do not allow symbolic names for registers\n"));
1437 fprintf (stream
, _("\
1438 -mrelocatable support for GCC's -mrelocatble option\n"));
1439 fprintf (stream
, _("\
1440 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n"));
1441 fprintf (stream
, _("\
1442 -memb set PPC_EMB bit in ELF flags\n"));
1443 fprintf (stream
, _("\
1444 -mlittle, -mlittle-endian, -le\n\
1445 generate code for a little endian machine\n"));
1446 fprintf (stream
, _("\
1447 -mbig, -mbig-endian, -be\n\
1448 generate code for a big endian machine\n"));
1449 fprintf (stream
, _("\
1450 -msolaris generate code for Solaris\n"));
1451 fprintf (stream
, _("\
1452 -mno-solaris do not generate code for Solaris\n"));
1453 fprintf (stream
, _("\
1454 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n"));
1455 fprintf (stream
, _("\
1456 -V print assembler version number\n"));
1457 fprintf (stream
, _("\
1458 -Qy, -Qn ignored\n"));
1460 fprintf (stream
, _("\
1461 -nops=count when aligning, more than COUNT nops uses a branch\n"));
1462 fprintf (stream
, _("\
1463 -ppc476-workaround warn if emitting data to code sections\n"));
1466 /* Set ppc_cpu if it is not already set. */
1471 const char *default_os
= TARGET_OS
;
1472 const char *default_cpu
= TARGET_CPU
;
1474 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1477 if (target_big_endian
)
1478 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1480 /* The minimum supported cpu for 64-bit little-endian is power8. */
1481 ppc_cpu
|= ppc_parse_cpu (ppc_cpu
, &sticky
, "power8");
1482 else if (strncmp (default_os
, "aix", 3) == 0
1483 && default_os
[3] >= '4' && default_os
[3] <= '9')
1484 ppc_cpu
|= PPC_OPCODE_COMMON
;
1485 else if (strncmp (default_os
, "aix3", 4) == 0)
1486 ppc_cpu
|= PPC_OPCODE_POWER
;
1487 else if (strcmp (default_cpu
, "rs6000") == 0)
1488 ppc_cpu
|= PPC_OPCODE_POWER
;
1489 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1490 ppc_cpu
|= PPC_OPCODE_PPC
;
1492 as_fatal (_("unknown default cpu = %s, os = %s"),
1493 default_cpu
, default_os
);
1497 /* Figure out the BFD architecture to use. This function and ppc_mach
1498 are called well before md_begin, when the output file is opened. */
1500 enum bfd_architecture
1503 const char *default_cpu
= TARGET_CPU
;
1506 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1507 return bfd_arch_powerpc
;
1508 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1509 return bfd_arch_powerpc
;
1510 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1511 return bfd_arch_rs6000
;
1512 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1514 if (strcmp (default_cpu
, "rs6000") == 0)
1515 return bfd_arch_rs6000
;
1516 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1517 return bfd_arch_powerpc
;
1520 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1521 return bfd_arch_unknown
;
1528 return bfd_mach_ppc64
;
1529 else if (ppc_arch () == bfd_arch_rs6000
)
1530 return bfd_mach_rs6k
;
1531 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1532 return bfd_mach_ppc_titan
;
1533 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1534 return bfd_mach_ppc_vle
;
1536 return bfd_mach_ppc
;
1540 ppc_target_format (void)
1544 return target_big_endian
? "pe-powerpc" : "pe-powerpcle";
1546 return "xcoff-powermac";
1549 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1551 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1557 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1558 # elif defined (TE_VXWORKS)
1559 return "elf32-powerpc-vxworks";
1561 return (target_big_endian
1562 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1563 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1568 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1569 Return TRUE if there's a problem, otherwise FALSE. */
1572 insn_validate (const struct powerpc_opcode
*op
)
1574 const unsigned char *o
;
1575 uint64_t omask
= op
->mask
;
1577 /* The mask had better not trim off opcode bits. */
1578 if ((op
->opcode
& omask
) != op
->opcode
)
1580 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1584 /* The operands must not overlap the opcode or each other. */
1585 for (o
= op
->operands
; *o
; ++o
)
1587 bfd_boolean optional
= FALSE
;
1588 if (*o
>= num_powerpc_operands
)
1590 as_bad (_("operand index error for %s"), op
->name
);
1596 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1597 if (operand
->shift
== (int) PPC_OPSHIFT_INV
)
1604 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1606 else if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1608 mask
= (*operand
->insert
) (0, val
, ppc_cpu
, &errmsg
);
1610 else if (operand
->shift
>= 0)
1611 mask
= operand
->bitm
<< operand
->shift
;
1613 mask
= operand
->bitm
>> -operand
->shift
;
1616 as_bad (_("operand %d overlap in %s"),
1617 (int) (o
- op
->operands
), op
->name
);
1621 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
1625 as_bad (_("non-optional operand %d follows optional operand in %s"),
1626 (int) (o
- op
->operands
), op
->name
);
1634 /* Insert opcodes and macros into hash tables. Called at startup and
1635 for .machine pseudo. */
1638 ppc_setup_opcodes (void)
1640 const struct powerpc_opcode
*op
;
1641 const struct powerpc_opcode
*op_end
;
1642 const struct powerpc_macro
*macro
;
1643 const struct powerpc_macro
*macro_end
;
1644 bfd_boolean bad_insn
= FALSE
;
1646 if (ppc_hash
!= NULL
)
1647 hash_die (ppc_hash
);
1648 if (ppc_macro_hash
!= NULL
)
1649 hash_die (ppc_macro_hash
);
1651 /* Insert the opcodes into a hash table. */
1652 ppc_hash
= hash_new ();
1654 if (ENABLE_CHECKING
)
1658 /* An index into powerpc_operands is stored in struct fix
1659 fx_pcrel_adjust which is 8 bits wide. */
1660 gas_assert (num_powerpc_operands
< 256);
1662 /* Check operand masks. Code here and in the disassembler assumes
1663 all the 1's in the mask are contiguous. */
1664 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1666 uint64_t mask
= powerpc_operands
[i
].bitm
;
1670 right_bit
= mask
& -mask
;
1672 right_bit
= mask
& -mask
;
1673 if (mask
!= right_bit
)
1675 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1678 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1679 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1680 sizeof (powerpc_operands
[0])) == 0)
1682 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1689 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1690 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1692 if (ENABLE_CHECKING
)
1694 unsigned int new_opcode
= PPC_OP (op
[0].opcode
);
1696 #ifdef PRINT_OPCODE_TABLE
1697 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1698 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1699 new_opcode
, (unsigned long long) op
->opcode
,
1700 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1703 /* The major opcodes had better be sorted. Code in the disassembler
1704 assumes the insns are sorted according to major opcode. */
1705 if (op
!= powerpc_opcodes
1706 && new_opcode
< PPC_OP (op
[-1].opcode
))
1708 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1712 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1714 as_bad (_("%s is enabled by vle flag"), op
->name
);
1717 if (PPC_OP (op
->opcode
) != 4
1718 && PPC_OP (op
->opcode
) != 31
1719 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1721 as_bad (_("%s not disabled by vle flag"), op
->name
);
1724 bad_insn
|= insn_validate (op
);
1727 if ((ppc_cpu
& op
->flags
) != 0
1728 && !(ppc_cpu
& op
->deprecated
))
1732 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1735 as_bad (_("duplicate instruction %s"),
1742 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1743 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1744 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1746 op_end
= prefix_opcodes
+ prefix_num_opcodes
;
1747 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1749 if (ENABLE_CHECKING
)
1751 unsigned int new_opcode
= PPC_PREFIX_SEG (op
[0].opcode
);
1753 #ifdef PRINT_OPCODE_TABLE
1754 printf ("%-14s\t#%04u\tmajor op/2: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1755 op
->name
, (unsigned int) (op
- prefix_opcodes
),
1756 new_opcode
, (unsigned long long) op
->opcode
,
1757 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1760 /* The major opcodes had better be sorted. Code in the disassembler
1761 assumes the insns are sorted according to major opcode. */
1762 if (op
!= prefix_opcodes
1763 && new_opcode
< PPC_PREFIX_SEG (op
[-1].opcode
))
1765 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1768 bad_insn
|= insn_validate (op
);
1771 if ((ppc_cpu
& op
->flags
) != 0
1772 && !(ppc_cpu
& op
->deprecated
))
1776 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1779 as_bad (_("duplicate instruction %s"),
1786 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1787 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1788 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1790 op_end
= vle_opcodes
+ vle_num_opcodes
;
1791 for (op
= vle_opcodes
; op
< op_end
; op
++)
1793 if (ENABLE_CHECKING
)
1795 unsigned new_seg
= VLE_OP_TO_SEG (VLE_OP (op
[0].opcode
, op
[0].mask
));
1797 #ifdef PRINT_OPCODE_TABLE
1798 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1799 op
->name
, (unsigned int) (op
- vle_opcodes
),
1800 (unsigned int) new_seg
, (unsigned long long) op
->opcode
,
1801 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1804 /* The major opcodes had better be sorted. Code in the disassembler
1805 assumes the insns are sorted according to major opcode. */
1806 if (op
!= vle_opcodes
1807 && new_seg
< VLE_OP_TO_SEG (VLE_OP (op
[-1].opcode
, op
[-1].mask
)))
1809 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1813 bad_insn
|= insn_validate (op
);
1816 if ((ppc_cpu
& op
->flags
) != 0
1817 && !(ppc_cpu
& op
->deprecated
))
1821 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1824 as_bad (_("duplicate instruction %s"),
1831 /* SPE2 instructions */
1832 if ((ppc_cpu
& PPC_OPCODE_SPE2
) == PPC_OPCODE_SPE2
)
1834 op_end
= spe2_opcodes
+ spe2_num_opcodes
;
1835 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1837 if (ENABLE_CHECKING
)
1839 if (op
!= spe2_opcodes
)
1841 unsigned old_seg
, new_seg
;
1843 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1844 old_seg
= VLE_OP_TO_SEG (old_seg
);
1845 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1846 new_seg
= VLE_OP_TO_SEG (new_seg
);
1848 /* The major opcodes had better be sorted. Code in the
1849 disassembler assumes the insns are sorted according to
1851 if (new_seg
< old_seg
)
1853 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1858 bad_insn
|= insn_validate (op
);
1861 if ((ppc_cpu
& op
->flags
) != 0 && !(ppc_cpu
& op
->deprecated
))
1865 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1868 as_bad (_("duplicate instruction %s"),
1875 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1876 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1879 /* Insert the macros into a hash table. */
1880 ppc_macro_hash
= hash_new ();
1882 macro_end
= powerpc_macros
+ powerpc_num_macros
;
1883 for (macro
= powerpc_macros
; macro
< macro_end
; macro
++)
1885 if ((macro
->flags
& ppc_cpu
) != 0 || (ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1889 retval
= hash_insert (ppc_macro_hash
, macro
->name
, (void *) macro
);
1890 if (retval
!= (const char *) NULL
)
1892 as_bad (_("duplicate macro %s"), macro
->name
);
1902 /* This function is called when the assembler starts up. It is called
1903 after the options have been parsed and the output file has been
1911 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1912 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1915 /* Set the ELF flags if desired. */
1916 if (ppc_flags
&& !msolaris
)
1917 bfd_set_private_flags (stdoutput
, ppc_flags
);
1920 ppc_setup_opcodes ();
1922 /* Tell the main code what the endianness is if it is not overridden
1924 if (!set_target_endian
)
1926 set_target_endian
= 1;
1927 target_big_endian
= PPC_BIG_ENDIAN
;
1931 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1933 /* Create dummy symbols to serve as initial csects. This forces the
1934 text csects to precede the data csects. These symbols will not
1936 ppc_text_csects
= symbol_make ("dummy\001");
1937 symbol_get_tc (ppc_text_csects
)->within
= ppc_text_csects
;
1938 ppc_data_csects
= symbol_make ("dummy\001");
1939 symbol_get_tc (ppc_data_csects
)->within
= ppc_data_csects
;
1944 ppc_current_section
= text_section
;
1945 ppc_previous_section
= 0;
1954 if (ppc_apuinfo_list
== NULL
)
1957 /* Ok, so write the section info out. We have this layout:
1961 0 8 length of "APUinfo\0"
1962 4 (n*4) number of APU's (4 bytes each)
1965 20 APU#1 first APU's info
1966 24 APU#2 second APU's info
1971 asection
*seg
= now_seg
;
1972 subsegT subseg
= now_subseg
;
1973 asection
*apuinfo_secp
= (asection
*) NULL
;
1976 /* Create the .PPC.EMB.apuinfo section. */
1977 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1978 bfd_set_section_flags (stdoutput
,
1980 SEC_HAS_CONTENTS
| SEC_READONLY
);
1983 md_number_to_chars (p
, (valueT
) 8, 4);
1986 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1989 md_number_to_chars (p
, (valueT
) 2, 4);
1992 strcpy (p
, APUINFO_LABEL
);
1994 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1997 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
2000 frag_align (2, 0, 0);
2002 /* We probably can't restore the current segment, for there likely
2005 subseg_set (seg
, subseg
);
2010 /* Insert an operand value into an instruction. */
2013 ppc_insert_operand (uint64_t insn
,
2014 const struct powerpc_operand
*operand
,
2020 int64_t min
, max
, right
;
2022 max
= operand
->bitm
;
2026 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
2028 /* Extend the allowed range for addis to [-32768, 65535].
2029 Similarly for cmpli and some VLE high part insns. For 64-bit
2030 it would be good to disable this for signed fields since the
2031 value is sign extended into the high 32 bits of the register.
2032 If the value is, say, an address, then we might care about
2033 the high bits. However, gcc as of 2014-06 uses unsigned
2034 values when loading the high part of 64-bit constants using
2036 min
= ~(max
>> 1) & -right
;
2038 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
2040 max
= (max
>> 1) & -right
;
2041 min
= ~max
& -right
;
2044 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
2047 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
2056 /* Some people write constants with the sign extension done by
2057 hand but only up to 32 bits. This shouldn't really be valid,
2058 but, to permit this code to assemble on a 64-bit host, we
2059 sign extend the 32-bit value to 64 bits if so doing makes the
2060 value valid. We only do this for operands that are 32-bits or
2063 && (operand
->bitm
& ~0xffffffffULL
) == 0
2064 && (val
- (1LL << 32)) >= min
2065 && (val
- (1LL << 32)) <= max
2066 && ((val
- (1LL << 32)) & (right
- 1)) == 0)
2067 val
= val
- (1LL << 32);
2069 /* Similarly, people write expressions like ~(1<<15), and expect
2070 this to be OK for a 32-bit unsigned value. */
2072 && (operand
->bitm
& ~0xffffffffULL
) == 0
2073 && (val
+ (1LL << 32)) >= min
2074 && (val
+ (1LL << 32)) <= max
2075 && ((val
+ (1LL << 32)) & (right
- 1)) == 0)
2076 val
= val
+ (1LL << 32);
2080 || (val
& (right
- 1)) != 0)
2081 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
2084 if (operand
->insert
)
2089 insn
= (*operand
->insert
) (insn
, val
, cpu
, &errmsg
);
2090 if (errmsg
!= (const char *) NULL
)
2091 as_bad_where (file
, line
, "%s", errmsg
);
2093 else if (operand
->shift
>= 0)
2094 insn
|= (val
& operand
->bitm
) << operand
->shift
;
2096 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
2103 /* Parse @got, etc. and return the desired relocation. */
2104 static bfd_reloc_code_real_type
2105 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
2109 unsigned int length
: 8;
2110 unsigned int valid32
: 1;
2111 unsigned int valid64
: 1;
2120 const struct map_bfd
*ptr
;
2122 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2123 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2124 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2126 static const struct map_bfd mapping
[] = {
2127 MAP ("l", BFD_RELOC_LO16
),
2128 MAP ("h", BFD_RELOC_HI16
),
2129 MAP ("ha", BFD_RELOC_HI16_S
),
2130 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
2131 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
2132 MAP ("got", BFD_RELOC_16_GOTOFF
),
2133 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
2134 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
2135 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
2136 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
2137 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
2138 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
2139 MAP ("copy", BFD_RELOC_PPC_COPY
),
2140 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
2141 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
2142 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
2143 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
2144 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
2145 MAP ("tls", BFD_RELOC_PPC_TLS
),
2146 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
2147 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
2148 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
2149 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
2150 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
2151 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
2152 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
2153 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
2154 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
2155 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
2156 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
2157 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
2158 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
2159 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
2160 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
2161 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
2162 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
2163 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
2164 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
2165 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
2166 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
2167 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
2168 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
2169 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
2170 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
2171 MAP32 ("fixup", BFD_RELOC_CTOR
),
2172 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
2173 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
2174 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
2175 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
2176 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
2177 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
2178 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
2179 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
2180 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
2181 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
2182 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
2183 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
2184 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
2185 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
2186 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
2187 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
2188 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
2189 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
2190 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2191 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2192 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2193 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2194 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2195 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2196 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2197 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2198 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2199 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2200 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2201 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2202 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2203 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2204 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2205 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2206 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2207 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2208 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2209 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2210 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2211 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2212 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2213 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2214 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2215 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2216 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2217 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2218 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2219 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2220 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2221 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2222 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2223 MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC
),
2224 MAP64 ("pcrel", BFD_RELOC_PPC64_PCREL34
),
2225 MAP64 ("got@pcrel", BFD_RELOC_PPC64_GOT_PCREL34
),
2226 MAP64 ("plt@pcrel", BFD_RELOC_PPC64_PLT_PCREL34
),
2227 MAP64 ("higher34", BFD_RELOC_PPC64_ADDR16_HIGHER34
),
2228 MAP64 ("highera34", BFD_RELOC_PPC64_ADDR16_HIGHERA34
),
2229 MAP64 ("highest34", BFD_RELOC_PPC64_ADDR16_HIGHEST34
),
2230 MAP64 ("highesta34", BFD_RELOC_PPC64_ADDR16_HIGHESTA34
),
2231 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2235 return BFD_RELOC_NONE
;
2237 for (ch
= *str
, str2
= ident
;
2238 (str2
< ident
+ sizeof (ident
) - 1
2239 && (ISALNUM (ch
) || ch
== '@'));
2242 *str2
++ = TOLOWER (ch
);
2249 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2250 if (ch
== ptr
->string
[0]
2251 && len
== ptr
->length
2252 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2253 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2255 int reloc
= ptr
->reloc
;
2257 if (!ppc_obj64
&& exp_p
->X_add_number
!= 0)
2261 case BFD_RELOC_16_GOTOFF
:
2262 case BFD_RELOC_LO16_GOTOFF
:
2263 case BFD_RELOC_HI16_GOTOFF
:
2264 case BFD_RELOC_HI16_S_GOTOFF
:
2265 as_warn (_("identifier+constant@got means "
2266 "identifier@got+constant"));
2269 case BFD_RELOC_PPC_GOT_TLSGD16
:
2270 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2271 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2272 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2273 case BFD_RELOC_PPC_GOT_TLSLD16
:
2274 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2275 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2276 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2277 case BFD_RELOC_PPC_GOT_DTPREL16
:
2278 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2279 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2280 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2281 case BFD_RELOC_PPC_GOT_TPREL16
:
2282 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2283 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2284 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2285 as_bad (_("symbol+offset not supported for got tls"));
2290 /* Now check for identifier@suffix+constant. */
2291 if (*str
== '-' || *str
== '+')
2293 char *orig_line
= input_line_pointer
;
2294 expressionS new_exp
;
2296 input_line_pointer
= str
;
2297 expression (&new_exp
);
2298 if (new_exp
.X_op
== O_constant
)
2300 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2301 str
= input_line_pointer
;
2304 if (&input_line_pointer
!= str_p
)
2305 input_line_pointer
= orig_line
;
2309 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2310 && exp_p
->X_op
== O_symbol
2311 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2313 /* Change the symbol so that the dummy .TOC. symbol can be
2314 omitted from the object file. */
2315 exp_p
->X_add_symbol
= &abs_symbol
;
2318 return (bfd_reloc_code_real_type
) reloc
;
2321 return BFD_RELOC_NONE
;
2324 /* Support @got, etc. on constants emitted via .short, .int etc. */
2326 bfd_reloc_code_real_type
2327 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2330 if (nbytes
>= 2 && *input_line_pointer
== '@')
2331 return ppc_elf_suffix (&input_line_pointer
, exp
);
2332 return BFD_RELOC_NONE
;
2335 /* Warn when emitting data to code sections, unless we are emitting
2336 a relocation that ld --ppc476-workaround uses to recognise data
2337 *and* there was an unconditional branch prior to the data. */
2340 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2341 unsigned int nbytes
, fixS
*fix
)
2344 && (now_seg
->flags
& SEC_CODE
) != 0
2347 || !(fix
->fx_r_type
== BFD_RELOC_32
2348 || fix
->fx_r_type
== BFD_RELOC_CTOR
2349 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2350 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2351 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2352 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2353 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2354 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2355 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2356 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2358 /* Flag that we've warned. */
2362 as_warn (_("data in executable section"));
2366 /* Solaris pseduo op to change to the .rodata section. */
2368 ppc_elf_rdata (int xxx
)
2370 char *save_line
= input_line_pointer
;
2371 static char section
[] = ".rodata\n";
2373 /* Just pretend this is .section .rodata */
2374 input_line_pointer
= section
;
2375 obj_elf_section (xxx
);
2377 input_line_pointer
= save_line
;
2380 /* Pseudo op to make file scope bss items. */
2382 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2395 c
= get_symbol_name (&name
);
2397 /* Just after name is now '\0'. */
2398 p
= input_line_pointer
;
2400 SKIP_WHITESPACE_AFTER_NAME ();
2401 if (*input_line_pointer
!= ',')
2403 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2404 ignore_rest_of_line ();
2408 input_line_pointer
++; /* skip ',' */
2409 if ((size
= get_absolute_expression ()) < 0)
2411 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2412 ignore_rest_of_line ();
2416 /* The third argument to .lcomm is the alignment. */
2417 if (*input_line_pointer
!= ',')
2421 ++input_line_pointer
;
2422 align
= get_absolute_expression ();
2425 as_warn (_("ignoring bad alignment"));
2431 symbolP
= symbol_find_or_make (name
);
2434 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2436 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2437 S_GET_NAME (symbolP
));
2438 ignore_rest_of_line ();
2442 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2444 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2445 S_GET_NAME (symbolP
),
2446 (long) S_GET_VALUE (symbolP
),
2449 ignore_rest_of_line ();
2455 old_subsec
= now_subseg
;
2458 /* Convert to a power of 2 alignment. */
2459 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2462 as_bad (_("common alignment not a power of 2"));
2463 ignore_rest_of_line ();
2470 record_alignment (bss_section
, align2
);
2471 subseg_set (bss_section
, 1);
2473 frag_align (align2
, 0, 0);
2474 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2475 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2476 symbol_set_frag (symbolP
, frag_now
);
2477 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2480 S_SET_SIZE (symbolP
, size
);
2481 S_SET_SEGMENT (symbolP
, bss_section
);
2482 subseg_set (old_sec
, old_subsec
);
2483 demand_empty_rest_of_line ();
2486 /* Pseudo op to set symbol local entry point. */
2488 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2491 char c
= get_symbol_name (&name
);
2496 elf_symbol_type
*elfsym
;
2498 p
= input_line_pointer
;
2500 SKIP_WHITESPACE_AFTER_NAME ();
2501 if (*input_line_pointer
!= ',')
2504 as_bad (_("expected comma after name `%s' in .localentry directive"),
2507 ignore_rest_of_line ();
2510 input_line_pointer
++;
2512 if (exp
.X_op
== O_absent
)
2514 as_bad (_("missing expression in .localentry directive"));
2515 exp
.X_op
= O_constant
;
2516 exp
.X_add_number
= 0;
2519 sym
= symbol_find_or_make (name
);
2522 if (resolve_expression (&exp
)
2523 && exp
.X_op
== O_constant
)
2525 unsigned int encoded
, ok
;
2528 if (exp
.X_add_number
== 1 || exp
.X_add_number
== 7)
2529 encoded
= exp
.X_add_number
<< STO_PPC64_LOCAL_BIT
;
2532 encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2533 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2535 as_bad (_(".localentry expression for `%s' "
2536 "is not a valid power of 2"), S_GET_NAME (sym
));
2542 bfdsym
= symbol_get_bfdsym (sym
);
2543 elfsym
= elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
2544 gas_assert (elfsym
);
2545 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2546 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2547 if (ppc_abiversion
== 0)
2552 as_bad (_(".localentry expression for `%s' "
2553 "does not evaluate to a constant"), S_GET_NAME (sym
));
2555 demand_empty_rest_of_line ();
2558 /* Pseudo op to set ABI version. */
2560 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2565 if (exp
.X_op
== O_absent
)
2567 as_bad (_("missing expression in .abiversion directive"));
2568 exp
.X_op
= O_constant
;
2569 exp
.X_add_number
= 0;
2572 if (resolve_expression (&exp
)
2573 && exp
.X_op
== O_constant
)
2574 ppc_abiversion
= exp
.X_add_number
;
2576 as_bad (_(".abiversion expression does not evaluate to a constant"));
2577 demand_empty_rest_of_line ();
2580 /* Parse a .gnu_attribute directive. */
2582 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2584 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2586 /* Check validity of defined powerpc tags. */
2587 if (tag
== Tag_GNU_Power_ABI_FP
2588 || tag
== Tag_GNU_Power_ABI_Vector
2589 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2593 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2595 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2596 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2597 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2598 as_warn (_("unknown .gnu_attribute value"));
2602 /* Set ABI version in output file. */
2606 if (ppc_obj64
&& ppc_abiversion
!= 0)
2608 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2609 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2611 /* Any selection of opcodes based on ppc_cpu after gas has finished
2612 parsing the file is invalid. md_apply_fix and ppc_handle_align
2613 must select opcodes based on the machine in force at the point
2614 where the fixup or alignment frag was created, not the machine in
2615 force at the end of file. */
2619 /* Validate any relocations emitted for -mrelocatable, possibly adding
2620 fixups for word relocations in writable segments, so we can adjust
2623 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2625 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2634 case SHLIB_MRELOCATABLE
:
2635 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2636 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2637 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2638 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2639 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2640 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2641 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2642 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2643 && (seg
->flags
& SEC_LOAD
) != 0
2644 && strcmp (segment_name (seg
), ".got2") != 0
2645 && strcmp (segment_name (seg
), ".dtors") != 0
2646 && strcmp (segment_name (seg
), ".ctors") != 0
2647 && strcmp (segment_name (seg
), ".fixup") != 0
2648 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2649 && strcmp (segment_name (seg
), ".eh_frame") != 0
2650 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2652 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2653 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2655 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2656 _("relocation cannot be done when using -mrelocatable"));
2663 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2664 function descriptor sym if the corresponding code sym is used. */
2667 ppc_frob_file_before_adjust (void)
2675 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2681 name
= S_GET_NAME (symp
);
2685 if (! S_IS_WEAK (symp
)
2686 || S_IS_DEFINED (symp
))
2689 dotname
= concat (".", name
, (char *) NULL
);
2690 dotsym
= symbol_find_noref (dotname
, 1);
2692 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2693 || symbol_used_in_reloc_p (dotsym
)))
2694 symbol_mark_used (symp
);
2698 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2700 && toc_reloc_types
!= has_large_toc_reloc
2701 && bfd_section_size (stdoutput
, toc
) > 0x10000)
2702 as_warn (_("TOC section size exceeds 64k"));
2705 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2706 emitted. Other uses of .TOC. will cause the symbol to be marked
2707 with BSF_KEEP in md_apply_fix. */
2710 ppc_elf_adjust_symtab (void)
2715 symp
= symbol_find (".TOC.");
2718 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2719 if ((bsym
->flags
& BSF_KEEP
) == 0)
2720 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2724 #endif /* OBJ_ELF */
2729 * Summary of parse_toc_entry.
2731 * in: Input_line_pointer points to the '[' in one of:
2733 * [toc] [tocv] [toc32] [toc64]
2735 * Anything else is an error of one kind or another.
2738 * return value: success or failure
2739 * toc_kind: kind of toc reference
2740 * input_line_pointer:
2741 * success: first char after the ']'
2742 * failure: unchanged
2746 * [toc] - rv == success, toc_kind = default_toc
2747 * [tocv] - rv == success, toc_kind = data_in_toc
2748 * [toc32] - rv == success, toc_kind = must_be_32
2749 * [toc64] - rv == success, toc_kind = must_be_64
2753 enum toc_size_qualifier
2755 default_toc
, /* The toc cell constructed should be the system default size */
2756 data_in_toc
, /* This is a direct reference to a toc cell */
2757 must_be_32
, /* The toc cell constructed must be 32 bits wide */
2758 must_be_64
/* The toc cell constructed must be 64 bits wide */
2762 parse_toc_entry (enum toc_size_qualifier
*toc_kind
)
2767 enum toc_size_qualifier t
;
2769 /* Save the input_line_pointer. */
2770 start
= input_line_pointer
;
2772 /* Skip over the '[' , and whitespace. */
2773 ++input_line_pointer
;
2776 /* Find the spelling of the operand. */
2777 c
= get_symbol_name (&toc_spec
);
2779 if (strcmp (toc_spec
, "toc") == 0)
2783 else if (strcmp (toc_spec
, "tocv") == 0)
2787 else if (strcmp (toc_spec
, "toc32") == 0)
2791 else if (strcmp (toc_spec
, "toc64") == 0)
2797 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec
);
2798 *input_line_pointer
= c
;
2799 input_line_pointer
= start
;
2803 /* Now find the ']'. */
2804 *input_line_pointer
= c
;
2806 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2807 c
= *input_line_pointer
++; /* input_line_pointer->past char in c. */
2811 as_bad (_("syntax error: expected `]', found `%c'"), c
);
2812 input_line_pointer
= start
;
2821 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2822 /* See whether a symbol is in the TOC section. */
2825 ppc_is_toc_sym (symbolS
*sym
)
2828 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2829 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2832 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2834 return strcmp (sname
, ".toc") == 0;
2836 return strcmp (sname
, ".got") == 0;
2839 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2843 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2845 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2849 /* Check we don't already exist. */
2850 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2851 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2854 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2856 if (ppc_apuinfo_num_alloc
== 0)
2858 ppc_apuinfo_num_alloc
= 4;
2859 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2863 ppc_apuinfo_num_alloc
+= 4;
2864 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2865 ppc_apuinfo_num_alloc
);
2868 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2873 /* Various frobbings of labels and their addresses. */
2875 /* Symbols labelling the current insn. */
2876 struct insn_label_list
2878 struct insn_label_list
*next
;
2882 static struct insn_label_list
*insn_labels
;
2883 static struct insn_label_list
*free_insn_labels
;
2886 ppc_record_label (symbolS
*sym
)
2888 struct insn_label_list
*l
;
2890 if (free_insn_labels
== NULL
)
2891 l
= XNEW (struct insn_label_list
);
2894 l
= free_insn_labels
;
2895 free_insn_labels
= l
->next
;
2899 l
->next
= insn_labels
;
2904 ppc_clear_labels (void)
2906 while (insn_labels
!= NULL
)
2908 struct insn_label_list
*l
= insn_labels
;
2909 insn_labels
= l
->next
;
2910 l
->next
= free_insn_labels
;
2911 free_insn_labels
= l
;
2916 ppc_start_line_hook (void)
2918 ppc_clear_labels ();
2922 ppc_new_dot_label (symbolS
*sym
)
2924 ppc_record_label (sym
);
2926 /* Anchor this label to the current csect for relocations. */
2927 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2932 ppc_frob_label (symbolS
*sym
)
2934 ppc_record_label (sym
);
2937 /* Set the class of a label based on where it is defined. This handles
2938 symbols without suffixes. Also, move the symbol so that it follows
2939 the csect symbol. */
2940 if (ppc_current_csect
!= (symbolS
*) NULL
)
2942 if (symbol_get_tc (sym
)->symbol_class
== -1)
2943 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
2945 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
2946 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
2947 &symbol_rootP
, &symbol_lastP
);
2948 symbol_get_tc (ppc_current_csect
)->within
= sym
;
2949 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2954 dwarf2_emit_label (sym
);
2958 /* We need to keep a list of fixups. We can't simply generate them as
2959 we go, because that would require us to first create the frag, and
2960 that would screw up references to ``.''. */
2966 bfd_reloc_code_real_type reloc
;
2969 #define MAX_INSN_FIXUPS (5)
2971 /* Return the field size operated on by RELOC, and whether it is
2972 pc-relative in PC_RELATIVE. */
2975 fixup_size (bfd_reloc_code_real_type reloc
, bfd_boolean
*pc_relative
)
2977 unsigned int size
= 0;
2978 bfd_boolean pcrel
= FALSE
;
2982 /* This switch statement must handle all BFD_RELOC values
2983 possible in instruction fixups. As is, it handles all
2984 BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c,
2985 bfd/coff-ppc, bfd/coff-rs6000.c and bfd/coff64-rs6000.c.
2986 Overkill since data and marker relocs need not be handled
2987 here, but this way we can be sure a needed fixup reloc isn't
2988 accidentally omitted. */
2989 case BFD_RELOC_PPC_EMB_MRKREF
:
2990 case BFD_RELOC_VTABLE_ENTRY
:
2991 case BFD_RELOC_VTABLE_INHERIT
:
2999 case BFD_RELOC_16_BASEREL
:
3000 case BFD_RELOC_16_GOTOFF
:
3001 case BFD_RELOC_GPREL16
:
3002 case BFD_RELOC_HI16
:
3003 case BFD_RELOC_HI16_BASEREL
:
3004 case BFD_RELOC_HI16_GOTOFF
:
3005 case BFD_RELOC_HI16_PLTOFF
:
3006 case BFD_RELOC_HI16_S
:
3007 case BFD_RELOC_HI16_S_BASEREL
:
3008 case BFD_RELOC_HI16_S_GOTOFF
:
3009 case BFD_RELOC_HI16_S_PLTOFF
:
3010 case BFD_RELOC_LO16
:
3011 case BFD_RELOC_LO16_BASEREL
:
3012 case BFD_RELOC_LO16_GOTOFF
:
3013 case BFD_RELOC_LO16_PLTOFF
:
3014 case BFD_RELOC_PPC64_ADDR16_DS
:
3015 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3016 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3017 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
3018 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
3019 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
3020 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
3021 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
3022 case BFD_RELOC_PPC64_DTPREL16_DS
:
3023 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
3024 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
3025 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
3026 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
3027 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
3028 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
3029 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
3030 case BFD_RELOC_PPC64_GOT16_DS
:
3031 case BFD_RELOC_PPC64_GOT16_LO_DS
:
3032 case BFD_RELOC_PPC64_HIGHER
:
3033 case BFD_RELOC_PPC64_HIGHER_S
:
3034 case BFD_RELOC_PPC64_HIGHEST
:
3035 case BFD_RELOC_PPC64_HIGHEST_S
:
3036 case BFD_RELOC_PPC64_PLT16_LO_DS
:
3037 case BFD_RELOC_PPC64_PLTGOT16
:
3038 case BFD_RELOC_PPC64_PLTGOT16_DS
:
3039 case BFD_RELOC_PPC64_PLTGOT16_HA
:
3040 case BFD_RELOC_PPC64_PLTGOT16_HI
:
3041 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3042 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
3043 case BFD_RELOC_PPC64_SECTOFF_DS
:
3044 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
3045 case BFD_RELOC_PPC64_TOC16_DS
:
3046 case BFD_RELOC_PPC64_TOC16_HA
:
3047 case BFD_RELOC_PPC64_TOC16_HI
:
3048 case BFD_RELOC_PPC64_TOC16_LO
:
3049 case BFD_RELOC_PPC64_TOC16_LO_DS
:
3050 case BFD_RELOC_PPC64_TPREL16_DS
:
3051 case BFD_RELOC_PPC64_TPREL16_HIGH
:
3052 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
3053 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
3054 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
3055 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
3056 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
3057 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
3059 case BFD_RELOC_PPC_BA16
:
3061 case BFD_RELOC_PPC_DTPREL16
:
3062 case BFD_RELOC_PPC_DTPREL16_HA
:
3063 case BFD_RELOC_PPC_DTPREL16_HI
:
3064 case BFD_RELOC_PPC_DTPREL16_LO
:
3065 case BFD_RELOC_PPC_EMB_NADDR16
:
3066 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
3067 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
3068 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
3069 case BFD_RELOC_PPC_EMB_RELSDA
:
3070 case BFD_RELOC_PPC_EMB_RELSEC16
:
3071 case BFD_RELOC_PPC_EMB_RELST_LO
:
3072 case BFD_RELOC_PPC_EMB_RELST_HI
:
3073 case BFD_RELOC_PPC_EMB_RELST_HA
:
3074 case BFD_RELOC_PPC_EMB_SDA2I16
:
3075 case BFD_RELOC_PPC_EMB_SDA2REL
:
3076 case BFD_RELOC_PPC_EMB_SDAI16
:
3077 case BFD_RELOC_PPC_GOT_DTPREL16
:
3078 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
3079 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
3080 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3081 case BFD_RELOC_PPC_GOT_TLSGD16
:
3082 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
3083 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
3084 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
3085 case BFD_RELOC_PPC_GOT_TLSLD16
:
3086 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
3087 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
3088 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
3089 case BFD_RELOC_PPC_GOT_TPREL16
:
3090 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
3091 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
3092 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3093 case BFD_RELOC_PPC_TOC16
:
3094 case BFD_RELOC_PPC_TPREL16
:
3095 case BFD_RELOC_PPC_TPREL16_HA
:
3096 case BFD_RELOC_PPC_TPREL16_HI
:
3097 case BFD_RELOC_PPC_TPREL16_LO
:
3101 case BFD_RELOC_16_PCREL
:
3102 case BFD_RELOC_HI16_PCREL
:
3103 case BFD_RELOC_HI16_S_PCREL
:
3104 case BFD_RELOC_LO16_PCREL
:
3105 case BFD_RELOC_PPC64_REL16_HIGH
:
3106 case BFD_RELOC_PPC64_REL16_HIGHA
:
3107 case BFD_RELOC_PPC64_REL16_HIGHER
:
3108 case BFD_RELOC_PPC64_REL16_HIGHER34
:
3109 case BFD_RELOC_PPC64_REL16_HIGHERA
:
3110 case BFD_RELOC_PPC64_REL16_HIGHERA34
:
3111 case BFD_RELOC_PPC64_REL16_HIGHEST
:
3112 case BFD_RELOC_PPC64_REL16_HIGHEST34
:
3113 case BFD_RELOC_PPC64_REL16_HIGHESTA
:
3114 case BFD_RELOC_PPC64_REL16_HIGHESTA34
:
3116 case BFD_RELOC_PPC_B16
:
3118 case BFD_RELOC_PPC_VLE_REL8
:
3123 case BFD_RELOC_16_GOT_PCREL
: /* coff reloc, bad name re size. */
3125 case BFD_RELOC_32_GOTOFF
:
3126 case BFD_RELOC_32_PLTOFF
:
3128 case BFD_RELOC_CTOR
:
3130 case BFD_RELOC_PPC64_ENTRY
:
3131 case BFD_RELOC_PPC_16DX_HA
:
3133 case BFD_RELOC_PPC_BA16
:
3135 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
3136 case BFD_RELOC_PPC_BA16_BRTAKEN
:
3137 case BFD_RELOC_PPC_BA26
:
3138 case BFD_RELOC_PPC_EMB_BIT_FLD
:
3139 case BFD_RELOC_PPC_EMB_NADDR32
:
3140 case BFD_RELOC_PPC_EMB_SDA21
:
3141 case BFD_RELOC_PPC_TLS
:
3142 case BFD_RELOC_PPC_TLSGD
:
3143 case BFD_RELOC_PPC_TLSLD
:
3144 case BFD_RELOC_PPC_VLE_HA16A
:
3145 case BFD_RELOC_PPC_VLE_HA16D
:
3146 case BFD_RELOC_PPC_VLE_HI16A
:
3147 case BFD_RELOC_PPC_VLE_HI16D
:
3148 case BFD_RELOC_PPC_VLE_LO16A
:
3149 case BFD_RELOC_PPC_VLE_LO16D
:
3150 case BFD_RELOC_PPC_VLE_SDA21
:
3151 case BFD_RELOC_PPC_VLE_SDA21_LO
:
3152 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3153 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
3154 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3155 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
3156 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3157 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
3162 case BFD_RELOC_24_PLT_PCREL
:
3163 case BFD_RELOC_32_PCREL
:
3164 case BFD_RELOC_32_PLT_PCREL
:
3165 case BFD_RELOC_PPC64_REL24_NOTOC
:
3167 case BFD_RELOC_PPC_B16
:
3169 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3170 case BFD_RELOC_PPC_B16_BRTAKEN
:
3171 case BFD_RELOC_PPC_B26
:
3172 case BFD_RELOC_PPC_LOCAL24PC
:
3173 case BFD_RELOC_PPC_REL16DX_HA
:
3174 case BFD_RELOC_PPC_VLE_REL15
:
3175 case BFD_RELOC_PPC_VLE_REL24
:
3181 case BFD_RELOC_CTOR
:
3183 case BFD_RELOC_PPC_COPY
:
3184 case BFD_RELOC_PPC_DTPMOD
:
3185 case BFD_RELOC_PPC_DTPREL
:
3186 case BFD_RELOC_PPC_GLOB_DAT
:
3187 case BFD_RELOC_PPC_TPREL
:
3188 size
= ppc_obj64
? 8 : 4;
3192 case BFD_RELOC_64_PLTOFF
:
3193 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
3194 case BFD_RELOC_PPC64_D28
:
3195 case BFD_RELOC_PPC64_D34
:
3196 case BFD_RELOC_PPC64_D34_LO
:
3197 case BFD_RELOC_PPC64_D34_HI30
:
3198 case BFD_RELOC_PPC64_D34_HA30
:
3199 case BFD_RELOC_PPC64_TOC
:
3203 case BFD_RELOC_64_PCREL
:
3204 case BFD_RELOC_64_PLT_PCREL
:
3205 case BFD_RELOC_PPC64_GOT_PCREL34
:
3206 case BFD_RELOC_PPC64_PCREL28
:
3207 case BFD_RELOC_PPC64_PCREL34
:
3208 case BFD_RELOC_PPC64_PLT_PCREL34
:
3217 if (ENABLE_CHECKING
)
3219 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
3220 if (reloc_howto
!= NULL
3221 && (size
!= bfd_get_reloc_size (reloc_howto
)
3222 || pcrel
!= reloc_howto
->pc_relative
))
3224 as_bad (_("%s howto doesn't match size/pcrel in gas"),
3229 *pc_relative
= pcrel
;
3234 /* If we have parsed a call to __tls_get_addr, parse an argument like
3235 (gd0@tlsgd). *STR is the leading parenthesis on entry. If an arg
3236 is successfully parsed, *STR is updated past the trailing
3237 parenthesis and trailing white space, and *TLS_FIX contains the
3238 reloc and arg expression. */
3241 parse_tls_arg (char **str
, const expressionS
*exp
, struct ppc_fixup
*tls_fix
)
3243 const char *sym_name
= S_GET_NAME (exp
->X_add_symbol
);
3244 if (sym_name
[0] == '.')
3247 tls_fix
->reloc
= BFD_RELOC_NONE
;
3248 if (strcasecmp (sym_name
, "__tls_get_addr") == 0)
3250 char *hold
= input_line_pointer
;
3251 input_line_pointer
= *str
+ 1;
3252 expression (&tls_fix
->exp
);
3253 if (tls_fix
->exp
.X_op
== O_symbol
)
3255 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3256 tls_fix
->reloc
= BFD_RELOC_PPC_TLSGD
;
3257 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3258 tls_fix
->reloc
= BFD_RELOC_PPC_TLSLD
;
3259 if (tls_fix
->reloc
!= BFD_RELOC_NONE
)
3261 input_line_pointer
+= 7;
3263 *str
= input_line_pointer
;
3266 input_line_pointer
= hold
;
3268 return tls_fix
->reloc
!= BFD_RELOC_NONE
;
3272 /* This routine is called for each instruction to be assembled. */
3275 md_assemble (char *str
)
3278 const struct powerpc_opcode
*opcode
;
3280 const unsigned char *opindex_ptr
;
3283 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
3288 unsigned int insn_length
;
3290 /* Get the opcode. */
3291 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
); s
++)
3296 /* Look up the opcode in the hash table. */
3297 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, str
);
3298 if (opcode
== (const struct powerpc_opcode
*) NULL
)
3300 const struct powerpc_macro
*macro
;
3302 macro
= (const struct powerpc_macro
*) hash_find (ppc_macro_hash
, str
);
3303 if (macro
== (const struct powerpc_macro
*) NULL
)
3304 as_bad (_("unrecognized opcode: `%s'"), str
);
3306 ppc_macro (s
, macro
);
3308 ppc_clear_labels ();
3312 insn
= opcode
->opcode
;
3315 while (ISSPACE (*str
))
3318 /* PowerPC operands are just expressions. The only real issue is
3319 that a few operand types are optional. If an instruction has
3320 multiple optional operands and one is omitted, then all optional
3321 operands past the first omitted one must also be omitted. */
3322 int num_optional_operands
= 0;
3323 int num_optional_provided
= 0;
3325 /* Gather the operands. */
3329 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
3331 const struct powerpc_operand
*operand
;
3337 if (next_opindex
== 0)
3338 operand
= &powerpc_operands
[*opindex_ptr
];
3341 operand
= &powerpc_operands
[next_opindex
];
3346 /* If this is an optional operand, and we are skipping it, just
3347 insert the default value, usually a zero. */
3348 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3349 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
3351 if (num_optional_operands
== 0)
3353 const unsigned char *optr
;
3359 for (optr
= opindex_ptr
; *optr
!= 0; optr
++)
3361 const struct powerpc_operand
*op
;
3362 op
= &powerpc_operands
[*optr
];
3366 if ((op
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3367 && !((op
->flags
& PPC_OPERAND_OPTIONAL32
) != 0
3369 ++num_optional_operands
;
3371 if (s
!= NULL
&& *s
!= '\0')
3375 /* Look for the start of the next operand. */
3376 if ((op
->flags
& PPC_OPERAND_PARENS
) != 0)
3377 s
= strpbrk (s
, "(,");
3379 s
= strchr (s
, ',');
3385 omitted
= total
- provided
;
3386 num_optional_provided
= num_optional_operands
- omitted
;
3388 if (--num_optional_provided
< 0)
3390 int64_t val
= ppc_optional_operand_value (operand
, insn
, ppc_cpu
,
3391 num_optional_provided
);
3392 if (operand
->insert
)
3394 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
3395 if (errmsg
!= (const char *) NULL
)
3396 as_bad ("%s", errmsg
);
3398 else if (operand
->shift
>= 0)
3399 insn
|= (val
& operand
->bitm
) << operand
->shift
;
3401 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
3403 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
3404 next_opindex
= *opindex_ptr
+ 1;
3409 /* Gather the operand. */
3410 hold
= input_line_pointer
;
3411 input_line_pointer
= str
;
3414 if (*input_line_pointer
== '[')
3416 /* We are expecting something like the second argument here:
3418 * lwz r4,[toc].GS.0.static_int(rtoc)
3419 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
3420 * The argument following the `]' must be a symbol name, and the
3421 * register must be the toc register: 'rtoc' or '2'
3423 * The effect is to 0 as the displacement field
3424 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
3425 * the appropriate variation) reloc against it based on the symbol.
3426 * The linker will build the toc, and insert the resolved toc offset.
3429 * o The size of the toc entry is currently assumed to be
3430 * 32 bits. This should not be assumed to be a hard coded
3432 * o In an effort to cope with a change from 32 to 64 bits,
3433 * there are also toc entries that are specified to be
3434 * either 32 or 64 bits:
3435 * lwz r4,[toc32].GS.0.static_int(rtoc)
3436 * lwz r4,[toc64].GS.0.static_int(rtoc)
3437 * These demand toc entries of the specified size, and the
3438 * instruction probably requires it.
3442 enum toc_size_qualifier toc_kind
;
3443 bfd_reloc_code_real_type toc_reloc
;
3445 /* Go parse off the [tocXX] part. */
3446 valid_toc
= parse_toc_entry (&toc_kind
);
3450 ignore_rest_of_line ();
3454 /* Now get the symbol following the ']'. */
3460 /* In this case, we may not have seen the symbol yet,
3461 since it is allowed to appear on a .extern or .globl
3462 or just be a label in the .data section. */
3463 toc_reloc
= BFD_RELOC_PPC_TOC16
;
3466 /* 1. The symbol must be defined and either in the toc
3467 section, or a global.
3468 2. The reloc generated must have the TOCDEFN flag set
3469 in upper bit mess of the reloc type.
3470 FIXME: It's a little confusing what the tocv
3471 qualifier can be used for. At the very least, I've
3472 seen three uses, only one of which I'm sure I can
3474 if (ex
.X_op
== O_symbol
)
3476 gas_assert (ex
.X_add_symbol
!= NULL
);
3477 if (symbol_get_bfdsym (ex
.X_add_symbol
)->section
3480 as_bad (_("[tocv] symbol is not a toc symbol"));
3484 toc_reloc
= BFD_RELOC_PPC_TOC16
;
3487 /* FIXME: these next two specifically specify 32/64 bit
3488 toc entries. We don't support them today. Is this
3489 the right way to say that? */
3490 toc_reloc
= BFD_RELOC_NONE
;
3491 as_bad (_("unimplemented toc32 expression modifier"));
3494 /* FIXME: see above. */
3495 toc_reloc
= BFD_RELOC_NONE
;
3496 as_bad (_("unimplemented toc64 expression modifier"));
3500 _("Unexpected return value [%d] from parse_toc_entry!\n"),
3506 /* We need to generate a fixup for this expression. */
3507 if (fc
>= MAX_INSN_FIXUPS
)
3508 as_fatal (_("too many fixups"));
3510 fixups
[fc
].reloc
= toc_reloc
;
3511 fixups
[fc
].exp
= ex
;
3512 fixups
[fc
].opindex
= *opindex_ptr
;
3515 /* Ok. We've set up the fixup for the instruction. Now make it
3516 look like the constant 0 was found here. */
3518 ex
.X_op
= O_constant
;
3519 ex
.X_add_number
= 0;
3520 ex
.X_add_symbol
= NULL
;
3521 ex
.X_op_symbol
= NULL
;
3528 && (((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3529 || ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)))
3530 || !register_name (&ex
))
3532 char save_lex
= lex_type
['%'];
3534 if (((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)
3535 || (operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3538 lex_type
['%'] |= LEX_BEGIN_NAME
;
3542 lex_type
['%'] = save_lex
;
3546 str
= input_line_pointer
;
3547 input_line_pointer
= hold
;
3549 if (ex
.X_op
== O_illegal
)
3550 as_bad (_("illegal operand"));
3551 else if (ex
.X_op
== O_absent
)
3552 as_bad (_("missing operand"));
3553 else if (ex
.X_op
== O_register
)
3557 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
3558 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
3559 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
)) != 0
3560 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
3561 && ex
.X_add_number
!= 0
3562 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
3563 as_warn (_("invalid register expression"));
3564 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3565 ppc_cpu
, (char *) NULL
, 0);
3567 else if (ex
.X_op
== O_constant
)
3570 /* Allow @HA, @L, @H on constants. */
3571 bfd_reloc_code_real_type reloc
;
3572 char *orig_str
= str
;
3574 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3581 case BFD_RELOC_LO16
:
3582 ex
.X_add_number
&= 0xffff;
3583 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3584 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3587 case BFD_RELOC_HI16
:
3588 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3590 /* PowerPC64 @h is tested for overflow. */
3591 ex
.X_add_number
= (addressT
) ex
.X_add_number
>> 16;
3592 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3594 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3596 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3602 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3603 ex
.X_add_number
= PPC_HI (ex
.X_add_number
);
3604 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3605 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3608 case BFD_RELOC_HI16_S
:
3609 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3611 /* PowerPC64 @ha is tested for overflow. */
3613 = ((addressT
) ex
.X_add_number
+ 0x8000) >> 16;
3614 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3616 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3618 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3624 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3625 ex
.X_add_number
= PPC_HA (ex
.X_add_number
);
3626 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3627 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3630 case BFD_RELOC_PPC64_HIGHER
:
3631 ex
.X_add_number
= PPC_HIGHER (ex
.X_add_number
);
3632 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3633 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3636 case BFD_RELOC_PPC64_HIGHER_S
:
3637 ex
.X_add_number
= PPC_HIGHERA (ex
.X_add_number
);
3638 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3639 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3642 case BFD_RELOC_PPC64_HIGHEST
:
3643 ex
.X_add_number
= PPC_HIGHEST (ex
.X_add_number
);
3644 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3645 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3648 case BFD_RELOC_PPC64_HIGHEST_S
:
3649 ex
.X_add_number
= PPC_HIGHESTA (ex
.X_add_number
);
3650 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3651 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3654 #endif /* OBJ_ELF */
3655 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3656 ppc_cpu
, (char *) NULL
, 0);
3660 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3662 /* Look for a __tls_get_addr arg using the insane old syntax. */
3663 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3664 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3666 fixups
[fc
].opindex
= *opindex_ptr
;
3670 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3672 /* If VLE-mode convert LO/HI/HA relocations. */
3673 if (opcode
->flags
& PPC_OPCODE_VLE
)
3675 uint64_t tmp_insn
= insn
& opcode
->mask
;
3677 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3678 || tmp_insn
== E_AND2I_DOT_INSN
3679 || tmp_insn
== E_OR2IS_INSN
3680 || tmp_insn
== E_LI_INSN
3681 || tmp_insn
== E_LIS_INSN
3682 || tmp_insn
== E_AND2IS_DOT_INSN
);
3685 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3686 || tmp_insn
== E_ADD2IS_INSN
3687 || tmp_insn
== E_CMP16I_INSN
3688 || tmp_insn
== E_MULL2I_INSN
3689 || tmp_insn
== E_CMPL16I_INSN
3690 || tmp_insn
== E_CMPH16I_INSN
3691 || tmp_insn
== E_CMPHL16I_INSN
);
3698 case BFD_RELOC_PPC_EMB_SDA21
:
3699 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3702 case BFD_RELOC_LO16
:
3704 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3705 else if (use_a_reloc
)
3706 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3709 case BFD_RELOC_HI16
:
3711 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3712 else if (use_a_reloc
)
3713 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3716 case BFD_RELOC_HI16_S
:
3718 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3719 else if (use_a_reloc
)
3720 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3723 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3725 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3728 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3730 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3733 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3735 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3740 /* TLS and other tweaks. */
3746 case BFD_RELOC_PPC_TLS
:
3747 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3748 as_bad (_("@tls may not be used with \"%s\" operands"),
3750 else if (operand
->shift
!= 11)
3751 as_bad (_("@tls may only be used in last operand"));
3753 insn
= ppc_insert_operand (insn
, operand
,
3755 ppc_cpu
, (char *) NULL
, 0);
3758 /* We'll only use the 32 (or 64) bit form of these relocations
3759 in constants. Instructions get the 16 bit form. */
3760 case BFD_RELOC_PPC_DTPREL
:
3761 reloc
= BFD_RELOC_PPC_DTPREL16
;
3764 case BFD_RELOC_PPC_TPREL
:
3765 reloc
= BFD_RELOC_PPC_TPREL16
;
3768 case BFD_RELOC_PPC64_PCREL34
:
3769 if (operand
->bitm
== 0xfffffffULL
)
3771 reloc
= BFD_RELOC_PPC64_PCREL28
;
3775 case BFD_RELOC_PPC64_GOT_PCREL34
:
3776 case BFD_RELOC_PPC64_PLT_PCREL34
:
3777 if (operand
->bitm
!= 0x3ffffffffULL
3778 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3779 as_warn (_("%s unsupported on this instruction"), "@pcrel");
3782 case BFD_RELOC_LO16
:
3783 if (operand
->bitm
== 0x3ffffffffULL
3784 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3785 reloc
= BFD_RELOC_PPC64_D34_LO
;
3786 else if ((operand
->bitm
| 0xf) != 0xffff
3787 || operand
->shift
!= 0
3788 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3789 as_warn (_("%s unsupported on this instruction"), "@l");
3792 case BFD_RELOC_HI16
:
3793 if (operand
->bitm
== 0x3ffffffffULL
3794 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3795 reloc
= BFD_RELOC_PPC64_D34_HI30
;
3796 else if (operand
->bitm
!= 0xffff
3797 || operand
->shift
!= 0
3798 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3799 as_warn (_("%s unsupported on this instruction"), "@h");
3802 case BFD_RELOC_HI16_S
:
3803 if (operand
->bitm
== 0x3ffffffffULL
3804 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3805 reloc
= BFD_RELOC_PPC64_D34_HA30
;
3806 else if (operand
->bitm
== 0xffff
3807 && operand
->shift
== (int) PPC_OPSHIFT_INV
3808 && opcode
->opcode
== (19 << 26) + (2 << 1))
3810 reloc
= BFD_RELOC_PPC_16DX_HA
;
3811 else if (operand
->bitm
!= 0xffff
3812 || operand
->shift
!= 0
3813 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3814 as_warn (_("%s unsupported on this instruction"), "@ha");
3817 #endif /* OBJ_ELF */
3819 if (reloc
!= BFD_RELOC_NONE
)
3821 /* Determine a BFD reloc value based on the operand information.
3822 We are only prepared to turn a few of the operands into
3824 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3825 | PPC_OPERAND_ABSOLUTE
)) != 0
3826 && operand
->bitm
== 0x3fffffc
3827 && operand
->shift
== 0)
3828 reloc
= BFD_RELOC_PPC_B26
;
3829 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3830 | PPC_OPERAND_ABSOLUTE
)) != 0
3831 && operand
->bitm
== 0xfffc
3832 && operand
->shift
== 0)
3833 reloc
= BFD_RELOC_PPC_B16
;
3834 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3835 && operand
->bitm
== 0x1fe
3836 && operand
->shift
== -1)
3837 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3838 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3839 && operand
->bitm
== 0xfffe
3840 && operand
->shift
== 0)
3841 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3842 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3843 && operand
->bitm
== 0x1fffffe
3844 && operand
->shift
== 0)
3845 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3846 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3847 && (operand
->bitm
& 0xfff0) == 0xfff0
3848 && operand
->shift
== 0)
3850 reloc
= BFD_RELOC_16
;
3851 #if defined OBJ_XCOFF || defined OBJ_ELF
3852 /* Note: the symbol may be not yet defined. */
3853 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3854 && ppc_is_toc_sym (ex
.X_add_symbol
))
3856 reloc
= BFD_RELOC_PPC_TOC16
;
3858 as_warn (_("assuming %s on symbol"),
3859 ppc_obj64
? "@toc" : "@xgot");
3864 else if (operand
->bitm
== 0x3ffffffffULL
)
3865 reloc
= BFD_RELOC_PPC64_D34
;
3866 else if (operand
->bitm
== 0xfffffffULL
)
3867 reloc
= BFD_RELOC_PPC64_D28
;
3869 /* For the absolute forms of branches, convert the PC
3870 relative form back into the absolute. */
3871 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3875 case BFD_RELOC_PPC_B26
:
3876 reloc
= BFD_RELOC_PPC_BA26
;
3878 case BFD_RELOC_PPC_B16
:
3879 reloc
= BFD_RELOC_PPC_BA16
;
3882 case BFD_RELOC_PPC_B16_BRTAKEN
:
3883 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3885 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3886 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3897 case BFD_RELOC_PPC_TOC16
:
3898 toc_reloc_types
|= has_small_toc_reloc
;
3900 case BFD_RELOC_PPC64_TOC16_LO
:
3901 case BFD_RELOC_PPC64_TOC16_HI
:
3902 case BFD_RELOC_PPC64_TOC16_HA
:
3903 toc_reloc_types
|= has_large_toc_reloc
;
3910 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3915 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3918 case BFD_RELOC_LO16
:
3919 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3922 case BFD_RELOC_16_GOTOFF
:
3923 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3926 case BFD_RELOC_LO16_GOTOFF
:
3927 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3930 case BFD_RELOC_LO16_PLTOFF
:
3931 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3934 case BFD_RELOC_16_BASEREL
:
3935 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3938 case BFD_RELOC_LO16_BASEREL
:
3939 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3942 case BFD_RELOC_PPC_TOC16
:
3943 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3946 case BFD_RELOC_PPC64_TOC16_LO
:
3947 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3950 case BFD_RELOC_PPC64_PLTGOT16
:
3951 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3954 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3955 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3958 case BFD_RELOC_PPC_DTPREL16
:
3959 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3962 case BFD_RELOC_PPC_DTPREL16_LO
:
3963 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3966 case BFD_RELOC_PPC_TPREL16
:
3967 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3970 case BFD_RELOC_PPC_TPREL16_LO
:
3971 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3974 case BFD_RELOC_PPC_GOT_DTPREL16
:
3975 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3976 case BFD_RELOC_PPC_GOT_TPREL16
:
3977 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3981 as_bad (_("unsupported relocation for DS offset field"));
3986 /* Look for a __tls_get_addr arg after any __tls_get_addr
3987 modifiers like @plt. This fixup must be emitted before
3988 the usual call fixup. */
3989 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3990 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3992 fixups
[fc
].opindex
= *opindex_ptr
;
3997 /* We need to generate a fixup for this expression. */
3998 if (fc
>= MAX_INSN_FIXUPS
)
3999 as_fatal (_("too many fixups"));
4000 fixups
[fc
].exp
= ex
;
4001 fixups
[fc
].opindex
= *opindex_ptr
;
4002 fixups
[fc
].reloc
= reloc
;
4010 /* If expecting more operands, then we want to see "),". */
4011 if (*str
== endc
&& opindex_ptr
[1] != 0)
4015 while (ISSPACE (*str
));
4019 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
4024 /* The call to expression should have advanced str past any
4032 else if (*str
!= '\0')
4034 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
4037 else if (endc
== ')')
4039 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
4044 while (ISSPACE (*str
))
4048 as_bad (_("junk at end of line: `%s'"), str
);
4051 /* Do we need/want an APUinfo section? */
4052 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
4055 /* These are all version "1". */
4056 if (opcode
->flags
& PPC_OPCODE_SPE
)
4057 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
4058 if (opcode
->flags
& PPC_OPCODE_ISEL
)
4059 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
4060 if (opcode
->flags
& PPC_OPCODE_EFS
)
4061 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
4062 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
4063 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
4064 if (opcode
->flags
& PPC_OPCODE_PMR
)
4065 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
4066 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
4067 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
4068 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
4069 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
4070 /* Only set the VLE flag if the instruction has been pulled via
4071 the VLE instruction set. This way the flag is guaranteed to
4072 be set for VLE-only instructions or for VLE-only processors,
4073 however it'll remain clear for dual-mode instructions on
4074 dual-mode and, more importantly, standard-mode processors. */
4075 if ((ppc_cpu
& opcode
->flags
) == PPC_OPCODE_VLE
)
4077 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
4078 if (elf_section_data (now_seg
) != NULL
)
4079 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
4084 /* Write out the instruction. */
4087 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
4088 /* All instructions can start on a 2 byte boundary for VLE. */
4091 if (frag_now
->insn_addr
!= addr_mask
)
4093 /* Don't emit instructions to a frag started for data, or for a
4094 CPU differing in VLE mode. Data is allowed to be misaligned,
4095 and it's possible to start a new frag in the middle of
4097 frag_wane (frag_now
);
4101 /* Check that insns within the frag are aligned. ppc_frag_check
4102 will ensure that the frag start address is aligned. */
4103 if ((frag_now_fix () & addr_mask
) != 0)
4104 as_bad (_("instruction address is not a multiple of %d"), addr_mask
+ 1);
4106 /* Differentiate between two, four, and eight byte insns. */
4108 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && PPC_OP_SE_VLE (insn
))
4110 else if ((opcode
->flags
& PPC_OPCODE_POWERXX
) != 0
4111 && PPC_PREFIX_P (insn
))
4113 struct insn_label_list
*l
;
4117 /* 8-byte prefix instructions are not allowed to cross 64-byte
4119 frag_align_code (6, 4);
4120 record_alignment (now_seg
, 6);
4122 /* Update "dot" in any expressions used by this instruction, and
4123 a label attached to the instruction. By "attached" we mean
4124 on the same source line as the instruction and without any
4125 intervening semicolons. */
4126 dot_value
= frag_now_fix ();
4127 dot_frag
= frag_now
;
4128 for (l
= insn_labels
; l
!= NULL
; l
= l
->next
)
4130 symbol_set_frag (l
->label
, dot_frag
);
4131 S_SET_VALUE (l
->label
, dot_value
);
4135 ppc_clear_labels ();
4137 f
= frag_more (insn_length
);
4138 frag_now
->insn_addr
= addr_mask
;
4140 /* The prefix part of an 8-byte instruction always occupies the lower
4141 addressed word in a doubleword, regardless of endianness. */
4142 if (!target_big_endian
&& insn_length
== 8)
4144 md_number_to_chars (f
, PPC_GET_PREFIX (insn
), 4);
4145 md_number_to_chars (f
+ 4, PPC_GET_SUFFIX (insn
), 4);
4148 md_number_to_chars (f
, insn
, insn_length
);
4152 last_subseg
= now_subseg
;
4155 dwarf2_emit_insn (insn_length
);
4158 /* Create any fixups. */
4159 for (i
= 0; i
< fc
; i
++)
4162 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
4165 unsigned int size
= fixup_size (fixups
[i
].reloc
, &pcrel
);
4166 int offset
= target_big_endian
? (insn_length
- size
) : 0;
4168 fixP
= fix_new_exp (frag_now
,
4169 f
- frag_now
->fr_literal
+ offset
,
4177 const struct powerpc_operand
*operand
;
4179 operand
= &powerpc_operands
[fixups
[i
].opindex
];
4180 fixP
= fix_new_exp (frag_now
,
4181 f
- frag_now
->fr_literal
,
4184 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
4187 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
4191 /* Handle a macro. Gather all the operands, transform them as
4192 described by the macro, and call md_assemble recursively. All the
4193 operands are separated by commas; we don't accept parentheses
4194 around operands here. */
4197 ppc_macro (char *str
, const struct powerpc_macro
*macro
)
4208 /* Gather the users operands into the operands array. */
4213 if (count
>= sizeof operands
/ sizeof operands
[0])
4215 operands
[count
++] = s
;
4216 s
= strchr (s
, ',');
4217 if (s
== (char *) NULL
)
4222 if (count
!= macro
->operands
)
4224 as_bad (_("wrong number of operands"));
4228 /* Work out how large the string must be (the size is unbounded
4229 because it includes user input). */
4231 format
= macro
->format
;
4232 while (*format
!= '\0')
4241 arg
= strtol (format
+ 1, &send
, 10);
4242 know (send
!= format
&& arg
< count
);
4243 len
+= strlen (operands
[arg
]);
4248 /* Put the string together. */
4249 complete
= s
= XNEWVEC (char, len
+ 1);
4250 format
= macro
->format
;
4251 while (*format
!= '\0')
4257 arg
= strtol (format
+ 1, &send
, 10);
4258 strcpy (s
, operands
[arg
]);
4265 /* Assemble the constructed instruction. */
4266 md_assemble (complete
);
4271 /* For ELF, add support for SHT_ORDERED. */
4274 ppc_section_type (char *str
, size_t len
)
4276 if (len
== 7 && strncmp (str
, "ordered", 7) == 0)
4283 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
4285 if (type
== SHT_ORDERED
)
4286 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
4292 ppc_elf_section_letter (int letter
, const char **ptrmsg
)
4297 *ptrmsg
= _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
4300 #endif /* OBJ_ELF */
4303 /* Pseudo-op handling. */
4305 /* The .byte pseudo-op. This is similar to the normal .byte
4306 pseudo-op, but it can also take a single ASCII string. */
4309 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
4313 if (*input_line_pointer
!= '\"')
4319 /* Gather characters. A real double quote is doubled. Unusual
4320 characters are not permitted. */
4321 ++input_line_pointer
;
4326 c
= *input_line_pointer
++;
4330 if (*input_line_pointer
!= '\"')
4332 ++input_line_pointer
;
4335 FRAG_APPEND_1_CHAR (c
);
4339 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
4340 as_warn (_("data in executable section"));
4341 demand_empty_rest_of_line ();
4346 /* XCOFF specific pseudo-op handling. */
4348 /* This is set if we are creating a .stabx symbol, since we don't want
4349 to handle symbol suffixes for such symbols. */
4350 static bfd_boolean ppc_stab_symbol
;
4352 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
4353 symbols in the .bss segment as though they were local common
4354 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
4355 aligns .comm and .lcomm to 4 bytes. */
4358 ppc_comm (int lcomm
)
4360 asection
*current_seg
= now_seg
;
4361 subsegT current_subseg
= now_subseg
;
4367 symbolS
*lcomm_sym
= NULL
;
4371 endc
= get_symbol_name (&name
);
4372 end_name
= input_line_pointer
;
4373 (void) restore_line_pointer (endc
);
4375 if (*input_line_pointer
!= ',')
4377 as_bad (_("missing size"));
4378 ignore_rest_of_line ();
4381 ++input_line_pointer
;
4383 size
= get_absolute_expression ();
4386 as_bad (_("negative size"));
4387 ignore_rest_of_line ();
4393 /* The third argument to .comm is the alignment. */
4394 if (*input_line_pointer
!= ',')
4398 ++input_line_pointer
;
4399 align
= get_absolute_expression ();
4402 as_warn (_("ignoring bad alignment"));
4412 /* The third argument to .lcomm appears to be the real local
4413 common symbol to create. References to the symbol named in
4414 the first argument are turned into references to the third
4416 if (*input_line_pointer
!= ',')
4418 as_bad (_("missing real symbol name"));
4419 ignore_rest_of_line ();
4422 ++input_line_pointer
;
4424 lcomm_endc
= get_symbol_name (&lcomm_name
);
4426 lcomm_sym
= symbol_find_or_make (lcomm_name
);
4428 (void) restore_line_pointer (lcomm_endc
);
4430 /* The fourth argument to .lcomm is the alignment. */
4431 if (*input_line_pointer
!= ',')
4440 ++input_line_pointer
;
4441 align
= get_absolute_expression ();
4444 as_warn (_("ignoring bad alignment"));
4451 sym
= symbol_find_or_make (name
);
4454 if (S_IS_DEFINED (sym
)
4455 || S_GET_VALUE (sym
) != 0)
4457 as_bad (_("attempt to redefine symbol"));
4458 ignore_rest_of_line ();
4462 record_alignment (bss_section
, align
);
4465 || ! S_IS_DEFINED (lcomm_sym
))
4474 S_SET_EXTERNAL (sym
);
4478 symbol_get_tc (lcomm_sym
)->output
= 1;
4479 def_sym
= lcomm_sym
;
4483 subseg_set (bss_section
, 1);
4484 frag_align (align
, 0, 0);
4486 symbol_set_frag (def_sym
, frag_now
);
4487 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
4488 def_size
, (char *) NULL
);
4490 S_SET_SEGMENT (def_sym
, bss_section
);
4491 symbol_get_tc (def_sym
)->align
= align
;
4495 /* Align the size of lcomm_sym. */
4496 symbol_get_frag (lcomm_sym
)->fr_offset
=
4497 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
4498 &~ ((1 << align
) - 1));
4499 if (align
> symbol_get_tc (lcomm_sym
)->align
)
4500 symbol_get_tc (lcomm_sym
)->align
= align
;
4505 /* Make sym an offset from lcomm_sym. */
4506 S_SET_SEGMENT (sym
, bss_section
);
4507 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
4508 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
4509 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
4512 subseg_set (current_seg
, current_subseg
);
4514 demand_empty_rest_of_line ();
4517 /* The .csect pseudo-op. This switches us into a different
4518 subsegment. The first argument is a symbol whose value is the
4519 start of the .csect. In COFF, csect symbols get special aux
4520 entries defined by the x_csect field of union internal_auxent. The
4521 optional second argument is the alignment (the default is 2). */
4524 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
4531 endc
= get_symbol_name (&name
);
4533 sym
= symbol_find_or_make (name
);
4535 (void) restore_line_pointer (endc
);
4537 if (S_GET_NAME (sym
)[0] == '\0')
4539 /* An unnamed csect is assumed to be [PR]. */
4540 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
4544 if (*input_line_pointer
== ',')
4546 ++input_line_pointer
;
4547 align
= get_absolute_expression ();
4550 ppc_change_csect (sym
, align
);
4552 demand_empty_rest_of_line ();
4555 /* Change to a different csect. */
4558 ppc_change_csect (symbolS
*sym
, offsetT align
)
4560 if (S_IS_DEFINED (sym
))
4561 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
4571 /* This is a new csect. We need to look at the symbol class to
4572 figure out whether it should go in the text section or the
4576 switch (symbol_get_tc (sym
)->symbol_class
)
4586 S_SET_SEGMENT (sym
, text_section
);
4587 symbol_get_tc (sym
)->subseg
= ppc_text_subsegment
;
4588 ++ppc_text_subsegment
;
4589 list_ptr
= &ppc_text_csects
;
4599 if (ppc_toc_csect
!= NULL
4600 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
4601 == ppc_data_subsegment
))
4603 S_SET_SEGMENT (sym
, data_section
);
4604 symbol_get_tc (sym
)->subseg
= ppc_data_subsegment
;
4605 ++ppc_data_subsegment
;
4606 list_ptr
= &ppc_data_csects
;
4612 /* We set the obstack chunk size to a small value before
4613 changing subsegments, so that we don't use a lot of memory
4614 space for what may be a small section. */
4615 hold_chunksize
= chunksize
;
4618 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
4619 symbol_get_tc (sym
)->subseg
);
4621 chunksize
= hold_chunksize
;
4624 ppc_after_toc_frag
= frag_now
;
4626 record_alignment (sec
, align
);
4628 frag_align_code (align
, 0);
4630 frag_align (align
, 0, 0);
4632 symbol_set_frag (sym
, frag_now
);
4633 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4635 symbol_get_tc (sym
)->align
= align
;
4636 symbol_get_tc (sym
)->output
= 1;
4637 symbol_get_tc (sym
)->within
= sym
;
4639 for (list
= *list_ptr
;
4640 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4641 list
= symbol_get_tc (list
)->next
)
4643 symbol_get_tc (list
)->next
= sym
;
4645 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4646 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4650 ppc_current_csect
= sym
;
4654 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
4658 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
4660 sec
= subseg_new (dw
->name
, subseg
);
4661 oldflags
= bfd_get_section_flags (stdoutput
, sec
);
4662 if (oldflags
== SEC_NO_FLAGS
)
4664 /* Just created section. */
4665 gas_assert (dw_sections
[idx
].sect
== NULL
);
4667 bfd_set_section_flags (stdoutput
, sec
, SEC_DEBUGGING
);
4668 bfd_set_section_alignment (stdoutput
, sec
, 0);
4669 dw_sections
[idx
].sect
= sec
;
4672 /* Not anymore in a csect. */
4673 ppc_current_csect
= NULL
;
4676 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4677 .dwsect flag [, opt-label ]
4681 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4685 const struct xcoff_dwsect_name
*dw
;
4686 struct dw_subsection
*subseg
;
4687 struct dw_section
*dws
;
4691 flag
= get_absolute_expression ();
4693 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4694 if (xcoff_dwsect_names
[i
].flag
== flag
)
4696 dw
= &xcoff_dwsect_names
[i
];
4700 /* Parse opt-label. */
4701 if (*input_line_pointer
== ',')
4706 ++input_line_pointer
;
4708 c
= get_symbol_name (&label
);
4709 opt_label
= symbol_find_or_make (label
);
4710 (void) restore_line_pointer (c
);
4715 demand_empty_rest_of_line ();
4717 /* Return now in case of unknown subsection. */
4720 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4725 /* Find the subsection. */
4726 dws
= &dw_sections
[i
];
4728 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4730 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4731 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4733 as_bad (_("label %s was not defined in this dwarf section"),
4734 S_GET_NAME (opt_label
));
4735 subseg
= dws
->anon_subseg
;
4739 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4744 /* Switch to the subsection. */
4745 ppc_change_debug_section (i
, subseg
->subseg
);
4749 /* Create a new dw subsection. */
4750 subseg
= XNEW (struct dw_subsection
);
4752 if (opt_label
== NULL
)
4754 /* The anonymous one. */
4756 subseg
->link
= NULL
;
4757 dws
->anon_subseg
= subseg
;
4762 if (dws
->list_subseg
!= NULL
)
4763 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4767 subseg
->link
= dws
->list_subseg
;
4768 dws
->list_subseg
= subseg
;
4769 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4772 ppc_change_debug_section (i
, subseg
->subseg
);
4776 /* Add the length field. */
4777 expressionS
*exp
= &subseg
->end_exp
;
4780 if (opt_label
!= NULL
)
4781 symbol_set_value_now (opt_label
);
4783 /* Add the length field. Note that according to the AIX assembler
4784 manual, the size of the length field is 4 for powerpc32 but
4785 12 for powerpc64. */
4788 /* Write the 64bit marker. */
4789 md_number_to_chars (frag_more (4), -1, 4);
4792 exp
->X_op
= O_subtract
;
4793 exp
->X_op_symbol
= symbol_temp_new_now ();
4794 exp
->X_add_symbol
= symbol_temp_make ();
4796 sz
= ppc_obj64
? 8 : 4;
4797 exp
->X_add_number
= -sz
;
4798 emit_expr (exp
, sz
);
4803 /* This function handles the .text and .data pseudo-ops. These
4804 pseudo-ops aren't really used by XCOFF; we implement them for the
4805 convenience of people who aren't used to XCOFF. */
4808 ppc_section (int type
)
4815 else if (type
== 'd')
4820 sym
= symbol_find_or_make (name
);
4822 ppc_change_csect (sym
, 2);
4824 demand_empty_rest_of_line ();
4827 /* This function handles the .section pseudo-op. This is mostly to
4828 give an error, since XCOFF only supports .text, .data and .bss, but
4829 we do permit the user to name the text or data section. */
4832 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4835 const char *real_name
;
4839 c
= get_symbol_name (&user_name
);
4841 if (strcmp (user_name
, ".text") == 0)
4842 real_name
= ".text[PR]";
4843 else if (strcmp (user_name
, ".data") == 0)
4844 real_name
= ".data[RW]";
4847 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4848 (void) restore_line_pointer (c
);
4849 ignore_rest_of_line ();
4853 (void) restore_line_pointer (c
);
4855 sym
= symbol_find_or_make (real_name
);
4857 ppc_change_csect (sym
, 2);
4859 demand_empty_rest_of_line ();
4862 /* The .extern pseudo-op. We create an undefined symbol. */
4865 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4870 endc
= get_symbol_name (&name
);
4872 (void) symbol_find_or_make (name
);
4874 (void) restore_line_pointer (endc
);
4876 demand_empty_rest_of_line ();
4879 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4882 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
4888 endc
= get_symbol_name (&name
);
4890 sym
= symbol_find_or_make (name
);
4892 (void) restore_line_pointer (endc
);
4894 symbol_get_tc (sym
)->output
= 1;
4896 demand_empty_rest_of_line ();
4899 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4900 relocations at the beginning of the current csect.
4902 (In principle, there's no reason why the relocations _have_ to be at
4903 the beginning. Anywhere in the csect would do. However, inserting
4904 at the beginning is what the native assembler does, and it helps to
4905 deal with cases where the .ref statements follow the section contents.)
4907 ??? .refs don't work for empty .csects. However, the native assembler
4908 doesn't report an error in this case, and neither yet do we. */
4911 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
4916 if (ppc_current_csect
== NULL
)
4918 as_bad (_(".ref outside .csect"));
4919 ignore_rest_of_line ();
4925 c
= get_symbol_name (&name
);
4927 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
4928 symbol_find_or_make (name
), 0, FALSE
, BFD_RELOC_NONE
);
4930 *input_line_pointer
= c
;
4931 SKIP_WHITESPACE_AFTER_NAME ();
4932 c
= *input_line_pointer
;
4935 input_line_pointer
++;
4937 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
4939 as_bad (_("missing symbol name"));
4940 ignore_rest_of_line ();
4947 demand_empty_rest_of_line ();
4950 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4951 although I don't know why it bothers. */
4954 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
4961 endc
= get_symbol_name (&name
);
4963 sym
= symbol_find_or_make (name
);
4965 (void) restore_line_pointer (endc
);
4967 if (*input_line_pointer
!= ',')
4969 as_bad (_("missing rename string"));
4970 ignore_rest_of_line ();
4973 ++input_line_pointer
;
4975 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
4977 demand_empty_rest_of_line ();
4980 /* The .stabx pseudo-op. This is similar to a normal .stabs
4981 pseudo-op, but slightly different. A sample is
4982 .stabx "main:F-1",.main,142,0
4983 The first argument is the symbol name to create. The second is the
4984 value, and the third is the storage class. The fourth seems to be
4985 always zero, and I am assuming it is the type. */
4988 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
4995 name
= demand_copy_C_string (&len
);
4997 if (*input_line_pointer
!= ',')
4999 as_bad (_("missing value"));
5002 ++input_line_pointer
;
5004 ppc_stab_symbol
= TRUE
;
5005 sym
= symbol_make (name
);
5006 ppc_stab_symbol
= FALSE
;
5008 symbol_get_tc (sym
)->real_name
= name
;
5010 (void) expression (&exp
);
5017 as_bad (_("illegal .stabx expression; zero assumed"));
5018 exp
.X_add_number
= 0;
5021 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
5022 symbol_set_frag (sym
, &zero_address_frag
);
5026 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
5027 symbol_set_value_expression (sym
, &exp
);
5031 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
5032 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
5037 /* The value is some complex expression. This will probably
5038 fail at some later point, but this is probably the right
5039 thing to do here. */
5040 symbol_set_value_expression (sym
, &exp
);
5044 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5045 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5047 if (*input_line_pointer
!= ',')
5049 as_bad (_("missing class"));
5052 ++input_line_pointer
;
5054 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
5056 if (*input_line_pointer
!= ',')
5058 as_bad (_("missing type"));
5061 ++input_line_pointer
;
5063 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
5065 symbol_get_tc (sym
)->output
= 1;
5067 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
5072 .stabx "z",arrays_,133,0
5075 .comm arrays_,13768,3
5077 resolve_symbol_value will copy the exp's "within" into sym's when the
5078 offset is 0. Since this seems to be corner case problem,
5079 only do the correction for storage class C_STSYM. A better solution
5080 would be to have the tc field updated in ppc_symbol_new_hook. */
5082 if (exp
.X_op
== O_symbol
)
5084 if (ppc_current_block
== NULL
)
5085 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
5087 symbol_get_tc (sym
)->within
= ppc_current_block
;
5088 symbol_get_tc (exp
.X_add_symbol
)->within
= ppc_current_block
;
5092 if (exp
.X_op
!= O_symbol
5093 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
5094 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
5095 ppc_frob_label (sym
);
5098 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5099 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
5100 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
5101 symbol_get_tc (ppc_current_csect
)->within
= sym
;
5104 demand_empty_rest_of_line ();
5107 /* The .function pseudo-op. This takes several arguments. The first
5108 argument seems to be the external name of the symbol. The second
5109 argument seems to be the label for the start of the function. gcc
5110 uses the same name for both. I have no idea what the third and
5111 fourth arguments are meant to be. The optional fifth argument is
5112 an expression for the size of the function. In COFF this symbol
5113 gets an aux entry like that used for a csect. */
5116 ppc_function (int ignore ATTRIBUTE_UNUSED
)
5124 endc
= get_symbol_name (&name
);
5126 /* Ignore any [PR] suffix. */
5127 name
= ppc_canonicalize_symbol_name (name
);
5128 s
= strchr (name
, '[');
5129 if (s
!= (char *) NULL
5130 && strcmp (s
+ 1, "PR]") == 0)
5133 ext_sym
= symbol_find_or_make (name
);
5135 (void) restore_line_pointer (endc
);
5137 if (*input_line_pointer
!= ',')
5139 as_bad (_("missing symbol name"));
5140 ignore_rest_of_line ();
5143 ++input_line_pointer
;
5145 endc
= get_symbol_name (&name
);
5147 lab_sym
= symbol_find_or_make (name
);
5149 (void) restore_line_pointer (endc
);
5151 if (ext_sym
!= lab_sym
)
5155 exp
.X_op
= O_symbol
;
5156 exp
.X_add_symbol
= lab_sym
;
5157 exp
.X_op_symbol
= NULL
;
5158 exp
.X_add_number
= 0;
5160 symbol_set_value_expression (ext_sym
, &exp
);
5163 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
5164 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
5165 symbol_get_tc (ext_sym
)->output
= 1;
5167 if (*input_line_pointer
== ',')
5171 /* Ignore the third argument. */
5172 ++input_line_pointer
;
5174 if (*input_line_pointer
== ',')
5176 /* Ignore the fourth argument. */
5177 ++input_line_pointer
;
5179 if (*input_line_pointer
== ',')
5181 /* The fifth argument is the function size. */
5182 ++input_line_pointer
;
5183 symbol_get_tc (ext_sym
)->u
.size
= symbol_new
5184 ("L0\001", absolute_section
,(valueT
) 0, &zero_address_frag
);
5185 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
5190 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
5191 SF_SET_FUNCTION (ext_sym
);
5192 SF_SET_PROCESS (ext_sym
);
5193 coff_add_linesym (ext_sym
);
5195 demand_empty_rest_of_line ();
5198 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
5199 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
5200 with the correct line number */
5202 static symbolS
*saved_bi_sym
= 0;
5205 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
5209 sym
= symbol_make (".bf");
5210 S_SET_SEGMENT (sym
, text_section
);
5211 symbol_set_frag (sym
, frag_now
);
5212 S_SET_VALUE (sym
, frag_now_fix ());
5213 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5215 coff_line_base
= get_absolute_expression ();
5217 S_SET_NUMBER_AUXILIARY (sym
, 1);
5218 SA_SET_SYM_LNNO (sym
, coff_line_base
);
5220 /* Line number for bi. */
5223 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
5228 symbol_get_tc (sym
)->output
= 1;
5230 ppc_frob_label (sym
);
5232 demand_empty_rest_of_line ();
5235 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
5236 ".ef", except that the line number is absolute, not relative to the
5237 most recent ".bf" symbol. */
5240 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
5244 sym
= symbol_make (".ef");
5245 S_SET_SEGMENT (sym
, text_section
);
5246 symbol_set_frag (sym
, frag_now
);
5247 S_SET_VALUE (sym
, frag_now_fix ());
5248 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5249 S_SET_NUMBER_AUXILIARY (sym
, 1);
5250 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5251 symbol_get_tc (sym
)->output
= 1;
5253 ppc_frob_label (sym
);
5255 demand_empty_rest_of_line ();
5258 /* The .bi and .ei pseudo-ops. These take a string argument and
5259 generates a C_BINCL or C_EINCL symbol, which goes at the start of
5260 the symbol list. The value of .bi will be know when the next .bf
5266 static symbolS
*last_biei
;
5273 name
= demand_copy_C_string (&len
);
5275 /* The value of these symbols is actually file offset. Here we set
5276 the value to the index into the line number entries. In
5277 ppc_frob_symbols we set the fix_line field, which will cause BFD
5278 to do the right thing. */
5280 sym
= symbol_make (name
);
5281 /* obj-coff.c currently only handles line numbers correctly in the
5283 S_SET_SEGMENT (sym
, text_section
);
5284 S_SET_VALUE (sym
, coff_n_line_nos
);
5285 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5287 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
5288 symbol_get_tc (sym
)->output
= 1;
5296 for (look
= last_biei
? last_biei
: symbol_rootP
;
5297 (look
!= (symbolS
*) NULL
5298 && (S_GET_STORAGE_CLASS (look
) == C_FILE
5299 || S_GET_STORAGE_CLASS (look
) == C_BINCL
5300 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
5301 look
= symbol_next (look
))
5303 if (look
!= (symbolS
*) NULL
)
5305 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5306 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
5310 demand_empty_rest_of_line ();
5313 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
5314 There is one argument, which is a csect symbol. The value of the
5315 .bs symbol is the index of this csect symbol. */
5318 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
5325 if (ppc_current_block
!= NULL
)
5326 as_bad (_("nested .bs blocks"));
5328 endc
= get_symbol_name (&name
);
5330 csect
= symbol_find_or_make (name
);
5332 (void) restore_line_pointer (endc
);
5334 sym
= symbol_make (".bs");
5335 S_SET_SEGMENT (sym
, now_seg
);
5336 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
5337 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5338 symbol_get_tc (sym
)->output
= 1;
5340 symbol_get_tc (sym
)->within
= csect
;
5342 ppc_frob_label (sym
);
5344 ppc_current_block
= sym
;
5346 demand_empty_rest_of_line ();
5349 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
5352 ppc_es (int ignore ATTRIBUTE_UNUSED
)
5356 if (ppc_current_block
== NULL
)
5357 as_bad (_(".es without preceding .bs"));
5359 sym
= symbol_make (".es");
5360 S_SET_SEGMENT (sym
, now_seg
);
5361 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
5362 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5363 symbol_get_tc (sym
)->output
= 1;
5365 ppc_frob_label (sym
);
5367 ppc_current_block
= NULL
;
5369 demand_empty_rest_of_line ();
5372 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
5376 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
5380 sym
= symbol_make (".bb");
5381 S_SET_SEGMENT (sym
, text_section
);
5382 symbol_set_frag (sym
, frag_now
);
5383 S_SET_VALUE (sym
, frag_now_fix ());
5384 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5386 S_SET_NUMBER_AUXILIARY (sym
, 1);
5387 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5389 symbol_get_tc (sym
)->output
= 1;
5391 SF_SET_PROCESS (sym
);
5393 ppc_frob_label (sym
);
5395 demand_empty_rest_of_line ();
5398 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
5402 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
5406 sym
= symbol_make (".eb");
5407 S_SET_SEGMENT (sym
, text_section
);
5408 symbol_set_frag (sym
, frag_now
);
5409 S_SET_VALUE (sym
, frag_now_fix ());
5410 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5411 S_SET_NUMBER_AUXILIARY (sym
, 1);
5412 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5413 symbol_get_tc (sym
)->output
= 1;
5415 SF_SET_PROCESS (sym
);
5417 ppc_frob_label (sym
);
5419 demand_empty_rest_of_line ();
5422 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
5426 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
5432 name
= demand_copy_C_string (&len
);
5433 sym
= symbol_make (name
);
5434 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5435 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5436 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
5437 S_SET_VALUE (sym
, 0);
5438 symbol_get_tc (sym
)->output
= 1;
5440 ppc_frob_label (sym
);
5442 demand_empty_rest_of_line ();
5445 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
5448 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
5452 sym
= symbol_make (".ec");
5453 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5454 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5455 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
5456 S_SET_VALUE (sym
, 0);
5457 symbol_get_tc (sym
)->output
= 1;
5459 ppc_frob_label (sym
);
5461 demand_empty_rest_of_line ();
5464 /* The .toc pseudo-op. Switch to the .toc subsegment. */
5467 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
5469 if (ppc_toc_csect
!= (symbolS
*) NULL
)
5470 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
5477 subseg
= ppc_data_subsegment
;
5478 ++ppc_data_subsegment
;
5480 subseg_new (segment_name (data_section
), subseg
);
5481 ppc_toc_frag
= frag_now
;
5483 sym
= symbol_find_or_make ("TOC[TC0]");
5484 symbol_set_frag (sym
, frag_now
);
5485 S_SET_SEGMENT (sym
, data_section
);
5486 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5487 symbol_get_tc (sym
)->subseg
= subseg
;
5488 symbol_get_tc (sym
)->output
= 1;
5489 symbol_get_tc (sym
)->within
= sym
;
5491 ppc_toc_csect
= sym
;
5493 for (list
= ppc_data_csects
;
5494 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
5495 list
= symbol_get_tc (list
)->next
)
5497 symbol_get_tc (list
)->next
= sym
;
5499 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5500 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
5504 ppc_current_csect
= ppc_toc_csect
;
5506 demand_empty_rest_of_line ();
5509 /* The AIX assembler automatically aligns the operands of a .long or
5510 .short pseudo-op, and we want to be compatible. */
5513 ppc_xcoff_cons (int log_size
)
5515 frag_align (log_size
, 0, 0);
5516 record_alignment (now_seg
, log_size
);
5517 cons (1 << log_size
);
5521 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
5526 (void) expression (&exp
);
5528 if (exp
.X_op
!= O_constant
)
5530 as_bad (_("non-constant byte count"));
5534 byte_count
= exp
.X_add_number
;
5536 if (*input_line_pointer
!= ',')
5538 as_bad (_("missing value"));
5542 ++input_line_pointer
;
5547 ppc_xcoff_end (void)
5551 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
5553 struct dw_section
*dws
= &dw_sections
[i
];
5554 struct dw_subsection
*dwss
;
5556 if (dws
->anon_subseg
)
5558 dwss
= dws
->anon_subseg
;
5559 dwss
->link
= dws
->list_subseg
;
5562 dwss
= dws
->list_subseg
;
5564 for (; dwss
!= NULL
; dwss
= dwss
->link
)
5565 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
5567 subseg_set (dws
->sect
, dwss
->subseg
);
5568 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
5574 #endif /* OBJ_XCOFF */
5575 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5577 /* The .tc pseudo-op. This is used when generating either XCOFF or
5578 ELF. This takes two or more arguments.
5580 When generating XCOFF output, the first argument is the name to
5581 give to this location in the toc; this will be a symbol with class
5582 TC. The rest of the arguments are N-byte values to actually put at
5583 this location in the TOC; often there is just one more argument, a
5584 relocatable symbol reference. The size of the value to store
5585 depends on target word size. A 32-bit target uses 4-byte values, a
5586 64-bit target uses 8-byte values.
5588 When not generating XCOFF output, the arguments are the same, but
5589 the first argument is simply ignored. */
5592 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
5596 /* Define the TOC symbol name. */
5602 if (ppc_toc_csect
== (symbolS
*) NULL
5603 || ppc_toc_csect
!= ppc_current_csect
)
5605 as_bad (_(".tc not in .toc section"));
5606 ignore_rest_of_line ();
5610 endc
= get_symbol_name (&name
);
5612 sym
= symbol_find_or_make (name
);
5614 (void) restore_line_pointer (endc
);
5616 if (S_IS_DEFINED (sym
))
5620 label
= symbol_get_tc (ppc_current_csect
)->within
;
5621 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
5623 as_bad (_(".tc with no label"));
5624 ignore_rest_of_line ();
5628 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
5629 symbol_set_frag (label
, symbol_get_frag (sym
));
5630 S_SET_VALUE (label
, S_GET_VALUE (sym
));
5632 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5633 ++input_line_pointer
;
5638 S_SET_SEGMENT (sym
, now_seg
);
5639 symbol_set_frag (sym
, frag_now
);
5640 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5641 symbol_get_tc (sym
)->symbol_class
= XMC_TC
;
5642 symbol_get_tc (sym
)->output
= 1;
5644 ppc_frob_label (sym
);
5647 #endif /* OBJ_XCOFF */
5651 /* Skip the TOC symbol name. */
5652 while (is_part_of_name (*input_line_pointer
)
5653 || *input_line_pointer
== ' '
5654 || *input_line_pointer
== '['
5655 || *input_line_pointer
== ']'
5656 || *input_line_pointer
== '{'
5657 || *input_line_pointer
== '}')
5658 ++input_line_pointer
;
5660 /* Align to a four/eight byte boundary. */
5661 align
= ppc_obj64
? 3 : 2;
5662 frag_align (align
, 0, 0);
5663 record_alignment (now_seg
, align
);
5664 #endif /* OBJ_ELF */
5666 if (*input_line_pointer
!= ',')
5667 demand_empty_rest_of_line ();
5670 ++input_line_pointer
;
5671 cons (ppc_obj64
? 8 : 4);
5675 /* Pseudo-op .machine. */
5678 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5682 #define MAX_HISTORY 100
5683 static ppc_cpu_t
*cpu_history
;
5684 static int curr_hist
;
5688 c
= get_symbol_name (&cpu_string
);
5689 cpu_string
= xstrdup (cpu_string
);
5690 (void) restore_line_pointer (c
);
5692 if (cpu_string
!= NULL
)
5694 ppc_cpu_t old_cpu
= ppc_cpu
;
5698 for (p
= cpu_string
; *p
!= 0; p
++)
5701 if (strcmp (cpu_string
, "push") == 0)
5703 if (cpu_history
== NULL
)
5704 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5706 if (curr_hist
>= MAX_HISTORY
)
5707 as_bad (_(".machine stack overflow"));
5709 cpu_history
[curr_hist
++] = ppc_cpu
;
5711 else if (strcmp (cpu_string
, "pop") == 0)
5714 as_bad (_(".machine stack underflow"));
5716 ppc_cpu
= cpu_history
[--curr_hist
];
5718 else if ((new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, cpu_string
)) != 0)
5721 as_bad (_("invalid machine `%s'"), cpu_string
);
5723 if (ppc_cpu
!= old_cpu
)
5724 ppc_setup_opcodes ();
5727 demand_empty_rest_of_line ();
5729 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5733 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
5735 /* Set the current section. */
5737 ppc_set_current_section (segT
new)
5739 ppc_previous_section
= ppc_current_section
;
5740 ppc_current_section
= new;
5743 /* pseudo-op: .previous
5744 behaviour: toggles the current section with the previous section.
5746 warnings: "No previous section" */
5749 ppc_previous (int ignore ATTRIBUTE_UNUSED
)
5751 if (ppc_previous_section
== NULL
)
5753 as_warn (_("no previous section to return to, ignored."));
5757 subseg_set (ppc_previous_section
, 0);
5759 ppc_set_current_section (ppc_previous_section
);
5762 /* pseudo-op: .pdata
5763 behaviour: predefined read only data section
5767 initial: .section .pdata "adr3"
5768 a - don't know -- maybe a misprint
5769 d - initialized data
5771 3 - double word aligned (that would be 4 byte boundary)
5774 Tag index tables (also known as the function table) for exception
5775 handling, debugging, etc. */
5778 ppc_pdata (int ignore ATTRIBUTE_UNUSED
)
5780 if (pdata_section
== 0)
5782 pdata_section
= subseg_new (".pdata", 0);
5784 bfd_set_section_flags (stdoutput
, pdata_section
,
5785 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5786 | SEC_READONLY
| SEC_DATA
));
5788 bfd_set_section_alignment (stdoutput
, pdata_section
, 2);
5792 pdata_section
= subseg_new (".pdata", 0);
5794 ppc_set_current_section (pdata_section
);
5797 /* pseudo-op: .ydata
5798 behaviour: predefined read only data section
5802 initial: .section .ydata "drw3"
5803 a - don't know -- maybe a misprint
5804 d - initialized data
5806 3 - double word aligned (that would be 4 byte boundary)
5808 Tag tables (also known as the scope table) for exception handling,
5812 ppc_ydata (int ignore ATTRIBUTE_UNUSED
)
5814 if (ydata_section
== 0)
5816 ydata_section
= subseg_new (".ydata", 0);
5817 bfd_set_section_flags (stdoutput
, ydata_section
,
5818 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5819 | SEC_READONLY
| SEC_DATA
));
5821 bfd_set_section_alignment (stdoutput
, ydata_section
, 3);
5825 ydata_section
= subseg_new (".ydata", 0);
5827 ppc_set_current_section (ydata_section
);
5830 /* pseudo-op: .reldata
5831 behaviour: predefined read write data section
5832 double word aligned (4-byte)
5833 FIXME: relocation is applied to it
5834 FIXME: what's the difference between this and .data?
5837 initial: .section .reldata "drw3"
5838 d - initialized data
5841 3 - double word aligned (that would be 8 byte boundary)
5844 Like .data, but intended to hold data subject to relocation, such as
5845 function descriptors, etc. */
5848 ppc_reldata (int ignore ATTRIBUTE_UNUSED
)
5850 if (reldata_section
== 0)
5852 reldata_section
= subseg_new (".reldata", 0);
5854 bfd_set_section_flags (stdoutput
, reldata_section
,
5855 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5858 bfd_set_section_alignment (stdoutput
, reldata_section
, 2);
5862 reldata_section
= subseg_new (".reldata", 0);
5864 ppc_set_current_section (reldata_section
);
5867 /* pseudo-op: .rdata
5868 behaviour: predefined read only data section
5872 initial: .section .rdata "dr3"
5873 d - initialized data
5875 3 - double word aligned (that would be 4 byte boundary) */
5878 ppc_rdata (int ignore ATTRIBUTE_UNUSED
)
5880 if (rdata_section
== 0)
5882 rdata_section
= subseg_new (".rdata", 0);
5883 bfd_set_section_flags (stdoutput
, rdata_section
,
5884 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5885 | SEC_READONLY
| SEC_DATA
));
5887 bfd_set_section_alignment (stdoutput
, rdata_section
, 2);
5891 rdata_section
= subseg_new (".rdata", 0);
5893 ppc_set_current_section (rdata_section
);
5896 /* pseudo-op: .ualong
5897 behaviour: much like .int, with the exception that no alignment is
5899 FIXME: test the alignment statement
5904 ppc_ualong (int ignore ATTRIBUTE_UNUSED
)
5910 /* pseudo-op: .znop <symbol name>
5911 behaviour: Issue a nop instruction
5912 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5913 the supplied symbol name.
5915 warnings: Missing symbol name */
5918 ppc_znop (int ignore ATTRIBUTE_UNUSED
)
5921 const struct powerpc_opcode
*opcode
;
5928 /* Strip out the symbol name. */
5929 c
= get_symbol_name (&symbol_name
);
5931 name
= xstrdup (symbol_name
);
5933 sym
= symbol_find_or_make (name
);
5935 *input_line_pointer
= c
;
5937 SKIP_WHITESPACE_AFTER_NAME ();
5939 /* Look up the opcode in the hash table. */
5940 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, "nop");
5942 /* Stick in the nop. */
5943 insn
= opcode
->opcode
;
5945 /* Write out the instruction. */
5947 md_number_to_chars (f
, insn
, 4);
5949 f
- frag_now
->fr_literal
,
5954 BFD_RELOC_16_GOT_PCREL
);
5964 ppc_pe_comm (int lcomm
)
5973 c
= get_symbol_name (&name
);
5975 /* just after name is now '\0'. */
5976 p
= input_line_pointer
;
5978 SKIP_WHITESPACE_AFTER_NAME ();
5979 if (*input_line_pointer
!= ',')
5981 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5982 ignore_rest_of_line ();
5986 input_line_pointer
++; /* skip ',' */
5987 if ((temp
= get_absolute_expression ()) < 0)
5989 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp
);
5990 ignore_rest_of_line ();
5996 /* The third argument to .comm is the alignment. */
5997 if (*input_line_pointer
!= ',')
6001 ++input_line_pointer
;
6002 align
= get_absolute_expression ();
6005 as_warn (_("ignoring bad alignment"));
6012 symbolP
= symbol_find_or_make (name
);
6015 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
6017 as_bad (_("ignoring attempt to re-define symbol `%s'."),
6018 S_GET_NAME (symbolP
));
6019 ignore_rest_of_line ();
6023 if (S_GET_VALUE (symbolP
))
6025 if (S_GET_VALUE (symbolP
) != (valueT
) temp
)
6026 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
6027 S_GET_NAME (symbolP
),
6028 (long) S_GET_VALUE (symbolP
),
6033 S_SET_VALUE (symbolP
, (valueT
) temp
);
6034 S_SET_EXTERNAL (symbolP
);
6035 S_SET_SEGMENT (symbolP
, bfd_com_section_ptr
);
6038 demand_empty_rest_of_line ();
6042 * implement the .section pseudo op:
6043 * .section name {, "flags"}
6045 * | +--- optional flags: 'b' for bss
6047 * +-- section name 'l' for lib
6051 * 'd' (apparently m88k for data)
6053 * But if the argument is not a quoted string, treat it as a
6054 * subsegment number.
6056 * FIXME: this is a copy of the section processing from obj-coff.c, with
6057 * additions/changes for the moto-pas assembler support. There are three
6060 * FIXME: I just noticed this. This doesn't work at all really. It it
6061 * setting bits that bfd probably neither understands or uses. The
6062 * correct approach (?) will have to incorporate extra fields attached
6063 * to the section to hold the system specific stuff. (krk)
6066 * 'a' - unknown - referred to in documentation, but no definition supplied
6067 * 'c' - section has code
6068 * 'd' - section has initialized data
6069 * 'u' - section has uninitialized data
6070 * 'i' - section contains directives (info)
6071 * 'n' - section can be discarded
6072 * 'R' - remove section at link time
6074 * Section Protection:
6075 * 'r' - section is readable
6076 * 'w' - section is writable
6077 * 'x' - section is executable
6078 * 's' - section is sharable
6080 * Section Alignment:
6081 * '0' - align to byte boundary
6082 * '1' - align to halfword boundary
6083 * '2' - align to word boundary
6084 * '3' - align to doubleword boundary
6085 * '4' - align to quadword boundary
6086 * '5' - align to 32 byte boundary
6087 * '6' - align to 64 byte boundary
6092 ppc_pe_section (int ignore ATTRIBUTE_UNUSED
)
6094 /* Strip out the section name. */
6103 c
= get_symbol_name (§ion_name
);
6105 name
= xstrdup (section_name
);
6107 *input_line_pointer
= c
;
6109 SKIP_WHITESPACE_AFTER_NAME ();
6112 flags
= SEC_NO_FLAGS
;
6114 if (strcmp (name
, ".idata$2") == 0)
6118 else if (strcmp (name
, ".idata$3") == 0)
6122 else if (strcmp (name
, ".idata$4") == 0)
6126 else if (strcmp (name
, ".idata$5") == 0)
6130 else if (strcmp (name
, ".idata$6") == 0)
6135 /* Default alignment to 16 byte boundary. */
6138 if (*input_line_pointer
== ',')
6140 ++input_line_pointer
;
6142 if (*input_line_pointer
!= '"')
6143 exp
= get_absolute_expression ();
6146 ++input_line_pointer
;
6147 while (*input_line_pointer
!= '"'
6148 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
6150 switch (*input_line_pointer
)
6152 /* Section Contents */
6153 case 'a': /* unknown */
6154 as_bad (_("unsupported section attribute -- 'a'"));
6156 case 'c': /* code section */
6159 case 'd': /* section has initialized data */
6162 case 'u': /* section has uninitialized data */
6163 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
6167 case 'i': /* section contains directives (info) */
6168 /* FIXME: This is IMAGE_SCN_LNK_INFO
6170 flags
|= SEC_HAS_CONTENTS
;
6172 case 'n': /* section can be discarded */
6175 case 'R': /* Remove section at link time */
6176 flags
|= SEC_NEVER_LOAD
;
6178 #if IFLICT_BRAIN_DAMAGE
6179 /* Section Protection */
6180 case 'r': /* section is readable */
6181 flags
|= IMAGE_SCN_MEM_READ
;
6183 case 'w': /* section is writable */
6184 flags
|= IMAGE_SCN_MEM_WRITE
;
6186 case 'x': /* section is executable */
6187 flags
|= IMAGE_SCN_MEM_EXECUTE
;
6189 case 's': /* section is sharable */
6190 flags
|= IMAGE_SCN_MEM_SHARED
;
6193 /* Section Alignment */
6194 case '0': /* align to byte boundary */
6195 flags
|= IMAGE_SCN_ALIGN_1BYTES
;
6198 case '1': /* align to halfword boundary */
6199 flags
|= IMAGE_SCN_ALIGN_2BYTES
;
6202 case '2': /* align to word boundary */
6203 flags
|= IMAGE_SCN_ALIGN_4BYTES
;
6206 case '3': /* align to doubleword boundary */
6207 flags
|= IMAGE_SCN_ALIGN_8BYTES
;
6210 case '4': /* align to quadword boundary */
6211 flags
|= IMAGE_SCN_ALIGN_16BYTES
;
6214 case '5': /* align to 32 byte boundary */
6215 flags
|= IMAGE_SCN_ALIGN_32BYTES
;
6218 case '6': /* align to 64 byte boundary */
6219 flags
|= IMAGE_SCN_ALIGN_64BYTES
;
6224 as_bad (_("unknown section attribute '%c'"),
6225 *input_line_pointer
);
6228 ++input_line_pointer
;
6230 if (*input_line_pointer
== '"')
6231 ++input_line_pointer
;
6235 sec
= subseg_new (name
, (subsegT
) exp
);
6237 ppc_set_current_section (sec
);
6239 if (flags
!= SEC_NO_FLAGS
)
6241 if (! bfd_set_section_flags (stdoutput
, sec
, flags
))
6242 as_bad (_("error setting flags for \"%s\": %s"),
6243 bfd_section_name (stdoutput
, sec
),
6244 bfd_errmsg (bfd_get_error ()));
6247 bfd_set_section_alignment (stdoutput
, sec
, align
);
6251 ppc_pe_function (int ignore ATTRIBUTE_UNUSED
)
6257 endc
= get_symbol_name (&name
);
6259 ext_sym
= symbol_find_or_make (name
);
6261 (void) restore_line_pointer (endc
);
6263 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
6264 SF_SET_FUNCTION (ext_sym
);
6265 SF_SET_PROCESS (ext_sym
);
6266 coff_add_linesym (ext_sym
);
6268 demand_empty_rest_of_line ();
6272 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED
)
6274 if (tocdata_section
== 0)
6276 tocdata_section
= subseg_new (".tocd", 0);
6277 /* FIXME: section flags won't work. */
6278 bfd_set_section_flags (stdoutput
, tocdata_section
,
6279 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
6280 | SEC_READONLY
| SEC_DATA
));
6282 bfd_set_section_alignment (stdoutput
, tocdata_section
, 2);
6286 rdata_section
= subseg_new (".tocd", 0);
6289 ppc_set_current_section (tocdata_section
);
6291 demand_empty_rest_of_line ();
6294 /* Don't adjust TOC relocs to use the section symbol. */
6297 ppc_pe_fix_adjustable (fixS
*fix
)
6299 return fix
->fx_r_type
!= BFD_RELOC_PPC_TOC16
;
6306 /* XCOFF specific symbol and file handling. */
6308 /* Canonicalize the symbol name. We use the to force the suffix, if
6309 any, to use square brackets, and to be in upper case. */
6312 ppc_canonicalize_symbol_name (char *name
)
6316 if (ppc_stab_symbol
)
6319 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
6333 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
6336 if (*s
== '\0' || s
[1] != '\0')
6337 as_bad (_("bad symbol suffix"));
6345 /* Set the class of a symbol based on the suffix, if any. This is
6346 called whenever a new symbol is created. */
6349 ppc_symbol_new_hook (symbolS
*sym
)
6351 struct ppc_tc_sy
*tc
;
6354 tc
= symbol_get_tc (sym
);
6357 tc
->symbol_class
= -1;
6358 tc
->real_name
= NULL
;
6365 if (ppc_stab_symbol
)
6368 s
= strchr (S_GET_NAME (sym
), '[');
6369 if (s
== (const char *) NULL
)
6371 /* There is no suffix. */
6380 if (strcmp (s
, "BS]") == 0)
6381 tc
->symbol_class
= XMC_BS
;
6384 if (strcmp (s
, "DB]") == 0)
6385 tc
->symbol_class
= XMC_DB
;
6386 else if (strcmp (s
, "DS]") == 0)
6387 tc
->symbol_class
= XMC_DS
;
6390 if (strcmp (s
, "GL]") == 0)
6391 tc
->symbol_class
= XMC_GL
;
6394 if (strcmp (s
, "PR]") == 0)
6395 tc
->symbol_class
= XMC_PR
;
6398 if (strcmp (s
, "RO]") == 0)
6399 tc
->symbol_class
= XMC_RO
;
6400 else if (strcmp (s
, "RW]") == 0)
6401 tc
->symbol_class
= XMC_RW
;
6404 if (strcmp (s
, "SV]") == 0)
6405 tc
->symbol_class
= XMC_SV
;
6408 if (strcmp (s
, "TC]") == 0)
6409 tc
->symbol_class
= XMC_TC
;
6410 else if (strcmp (s
, "TI]") == 0)
6411 tc
->symbol_class
= XMC_TI
;
6412 else if (strcmp (s
, "TB]") == 0)
6413 tc
->symbol_class
= XMC_TB
;
6414 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
6415 tc
->symbol_class
= XMC_TC0
;
6418 if (strcmp (s
, "UA]") == 0)
6419 tc
->symbol_class
= XMC_UA
;
6420 else if (strcmp (s
, "UC]") == 0)
6421 tc
->symbol_class
= XMC_UC
;
6424 if (strcmp (s
, "XO]") == 0)
6425 tc
->symbol_class
= XMC_XO
;
6429 if (tc
->symbol_class
== -1)
6430 as_bad (_("unrecognized symbol suffix"));
6433 /* This variable is set by ppc_frob_symbol if any absolute symbols are
6434 seen. It tells ppc_adjust_symtab whether it needs to look through
6437 static bfd_boolean ppc_saw_abs
;
6439 /* Change the name of a symbol just before writing it out. Set the
6440 real name if the .rename pseudo-op was used. Otherwise, remove any
6441 class suffix. Return 1 if the symbol should not be included in the
6445 ppc_frob_symbol (symbolS
*sym
)
6447 static symbolS
*ppc_last_function
;
6448 static symbolS
*set_end
;
6450 /* Discard symbols that should not be included in the output symbol
6452 if (! symbol_used_in_reloc_p (sym
)
6453 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
6454 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6455 && ! symbol_get_tc (sym
)->output
6456 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
6459 /* This one will disappear anyway. Don't make a csect sym for it. */
6460 if (sym
== abs_section_sym
)
6463 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
6464 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
6470 name
= S_GET_NAME (sym
);
6471 s
= strchr (name
, '[');
6472 if (s
!= (char *) NULL
)
6478 snew
= xstrndup (name
, len
);
6480 S_SET_NAME (sym
, snew
);
6484 if (set_end
!= (symbolS
*) NULL
)
6486 SA_SET_SYM_ENDNDX (set_end
, sym
);
6490 if (SF_GET_FUNCTION (sym
))
6492 if (ppc_last_function
!= (symbolS
*) NULL
)
6493 as_bad (_("two .function pseudo-ops with no intervening .ef"));
6494 ppc_last_function
= sym
;
6495 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
6497 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
6498 SA_SET_SYM_FSIZE (sym
,
6499 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
6502 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
6503 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
6505 if (ppc_last_function
== (symbolS
*) NULL
)
6506 as_bad (_(".ef with no preceding .function"));
6509 set_end
= ppc_last_function
;
6510 ppc_last_function
= NULL
;
6512 /* We don't have a C_EFCN symbol, but we need to force the
6513 COFF backend to believe that it has seen one. */
6514 coff_last_function
= NULL
;
6518 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6519 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
6520 && S_GET_STORAGE_CLASS (sym
) != C_FILE
6521 && S_GET_STORAGE_CLASS (sym
) != C_FCN
6522 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
6523 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
6524 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
6525 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
6526 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
6527 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
6528 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
6530 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
6531 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
6532 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
6535 union internal_auxent
*a
;
6537 /* Create a csect aux. */
6538 i
= S_GET_NUMBER_AUXILIARY (sym
);
6539 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
6540 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
6541 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
6543 /* This is the TOC table. */
6544 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
6545 a
->x_csect
.x_scnlen
.l
= 0;
6546 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6548 else if (symbol_get_tc (sym
)->subseg
!= 0)
6550 /* This is a csect symbol. x_scnlen is the size of the
6552 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
6553 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
6554 S_GET_SEGMENT (sym
))
6555 - S_GET_VALUE (sym
));
6558 resolve_symbol_value (symbol_get_tc (sym
)->next
);
6559 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
6560 - S_GET_VALUE (sym
));
6562 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
6564 else if (S_GET_SEGMENT (sym
) == bss_section
)
6566 /* This is a common symbol. */
6567 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
6568 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6569 if (S_IS_EXTERNAL (sym
))
6570 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
6572 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
6574 else if (S_GET_SEGMENT (sym
) == absolute_section
)
6576 /* This is an absolute symbol. The csect will be created by
6577 ppc_adjust_symtab. */
6579 a
->x_csect
.x_smtyp
= XTY_LD
;
6580 if (symbol_get_tc (sym
)->symbol_class
== -1)
6581 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
6583 else if (! S_IS_DEFINED (sym
))
6585 /* This is an external symbol. */
6586 a
->x_csect
.x_scnlen
.l
= 0;
6587 a
->x_csect
.x_smtyp
= XTY_ER
;
6589 else if (symbol_get_tc (sym
)->symbol_class
== XMC_TC
)
6593 /* This is a TOC definition. x_scnlen is the size of the
6595 next
= symbol_next (sym
);
6596 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
6597 next
= symbol_next (next
);
6598 if (next
== (symbolS
*) NULL
6599 || symbol_get_tc (next
)->symbol_class
!= XMC_TC
)
6601 if (ppc_after_toc_frag
== (fragS
*) NULL
)
6602 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
6604 - S_GET_VALUE (sym
));
6606 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
6607 - S_GET_VALUE (sym
));
6611 resolve_symbol_value (next
);
6612 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
6613 - S_GET_VALUE (sym
));
6615 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6621 /* This is a normal symbol definition. x_scnlen is the
6622 symbol index of the containing csect. */
6623 if (S_GET_SEGMENT (sym
) == text_section
)
6624 csect
= ppc_text_csects
;
6625 else if (S_GET_SEGMENT (sym
) == data_section
)
6626 csect
= ppc_data_csects
;
6630 /* Skip the initial dummy symbol. */
6631 csect
= symbol_get_tc (csect
)->next
;
6633 if (csect
== (symbolS
*) NULL
)
6635 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
6636 a
->x_csect
.x_scnlen
.l
= 0;
6640 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
6642 resolve_symbol_value (symbol_get_tc (csect
)->next
);
6643 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
6644 > S_GET_VALUE (sym
))
6646 csect
= symbol_get_tc (csect
)->next
;
6649 a
->x_csect
.x_scnlen
.p
=
6650 coffsymbol (symbol_get_bfdsym (csect
))->native
;
6651 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
6654 a
->x_csect
.x_smtyp
= XTY_LD
;
6657 a
->x_csect
.x_parmhash
= 0;
6658 a
->x_csect
.x_snhash
= 0;
6659 if (symbol_get_tc (sym
)->symbol_class
== -1)
6660 a
->x_csect
.x_smclas
= XMC_PR
;
6662 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
6663 a
->x_csect
.x_stab
= 0;
6664 a
->x_csect
.x_snstab
= 0;
6666 /* Don't let the COFF backend resort these symbols. */
6667 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
6669 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
6671 /* We want the value to be the symbol index of the referenced
6672 csect symbol. BFD will do that for us if we set the right
6674 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
6675 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
6677 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
6678 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
6680 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
6685 block
= symbol_get_tc (sym
)->within
;
6688 /* The value is the offset from the enclosing csect. */
6691 csect
= symbol_get_tc (block
)->within
;
6692 resolve_symbol_value (csect
);
6693 base
= S_GET_VALUE (csect
);
6698 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
6700 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
6701 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
6703 /* We want the value to be a file offset into the line numbers.
6704 BFD will do that for us if we set the right flags. We have
6705 already set the value correctly. */
6706 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
6712 /* Adjust the symbol table. This creates csect symbols for all
6713 absolute symbols. */
6716 ppc_adjust_symtab (void)
6723 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
6727 union internal_auxent
*a
;
6729 if (S_GET_SEGMENT (sym
) != absolute_section
)
6732 csect
= symbol_create (".abs[XO]", absolute_section
,
6733 S_GET_VALUE (sym
), &zero_address_frag
);
6734 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
6735 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
6736 i
= S_GET_NUMBER_AUXILIARY (csect
);
6737 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
6738 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
6739 a
->x_csect
.x_scnlen
.l
= 0;
6740 a
->x_csect
.x_smtyp
= XTY_SD
;
6741 a
->x_csect
.x_parmhash
= 0;
6742 a
->x_csect
.x_snhash
= 0;
6743 a
->x_csect
.x_smclas
= XMC_XO
;
6744 a
->x_csect
.x_stab
= 0;
6745 a
->x_csect
.x_snstab
= 0;
6747 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
6749 i
= S_GET_NUMBER_AUXILIARY (sym
);
6750 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
6751 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
6752 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
6755 ppc_saw_abs
= FALSE
;
6758 /* Set the VMA for a section. This is called on all the sections in
6762 ppc_frob_section (asection
*sec
)
6764 static bfd_vma vma
= 0;
6766 /* Dwarf sections start at 0. */
6767 if (bfd_get_section_flags (NULL
, sec
) & SEC_DEBUGGING
)
6770 vma
= md_section_align (sec
, vma
);
6771 bfd_set_section_vma (stdoutput
, sec
, vma
);
6772 vma
+= bfd_section_size (stdoutput
, sec
);
6775 #endif /* OBJ_XCOFF */
6778 md_atof (int type
, char *litp
, int *sizep
)
6780 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6783 /* Write a value out to the object file, using the appropriate
6787 md_number_to_chars (char *buf
, valueT val
, int n
)
6789 if (target_big_endian
)
6790 number_to_chars_bigendian (buf
, val
, n
);
6792 number_to_chars_littleendian (buf
, val
, n
);
6795 /* Align a section (I don't know why this is machine dependent). */
6798 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6803 int align
= bfd_get_section_alignment (stdoutput
, seg
);
6805 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6809 /* We don't have any form of relaxing. */
6812 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6813 asection
*seg ATTRIBUTE_UNUSED
)
6819 /* Convert a machine dependent frag. We never generate these. */
6822 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6823 asection
*sec ATTRIBUTE_UNUSED
,
6824 fragS
*fragp ATTRIBUTE_UNUSED
)
6829 /* We have no need to default values of symbols. */
6832 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6837 /* Functions concerning relocs. */
6839 /* The location from which a PC relative jump should be calculated,
6840 given a PC relative reloc. */
6843 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6845 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6850 /* This is called to see whether a fixup should be adjusted to use a
6851 section symbol. We take the opportunity to change a fixup against
6852 a symbol in the TOC subsegment into a reloc against the
6853 corresponding .tc symbol. */
6856 ppc_fix_adjustable (fixS
*fix
)
6858 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6859 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6860 TC_SYMFIELD_TYPE
*tc
;
6862 if (symseg
== absolute_section
)
6865 /* Always adjust symbols in debugging sections. */
6866 if (bfd_get_section_flags (stdoutput
, symseg
) & SEC_DEBUGGING
)
6869 if (ppc_toc_csect
!= (symbolS
*) NULL
6870 && fix
->fx_addsy
!= ppc_toc_csect
6871 && symseg
== data_section
6872 && val
>= ppc_toc_frag
->fr_address
6873 && (ppc_after_toc_frag
== (fragS
*) NULL
6874 || val
< ppc_after_toc_frag
->fr_address
))
6878 for (sy
= symbol_next (ppc_toc_csect
);
6879 sy
!= (symbolS
*) NULL
;
6880 sy
= symbol_next (sy
))
6882 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6884 if (sy_tc
->symbol_class
== XMC_TC0
)
6886 if (sy_tc
->symbol_class
!= XMC_TC
)
6888 if (val
== resolve_symbol_value (sy
))
6891 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6896 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6897 _("symbol in .toc does not match any .tc"));
6900 /* Possibly adjust the reloc to be against the csect. */
6901 tc
= symbol_get_tc (fix
->fx_addsy
);
6903 && tc
->symbol_class
!= XMC_TC0
6904 && tc
->symbol_class
!= XMC_TC
6905 && symseg
!= bss_section
6906 /* Don't adjust if this is a reloc in the toc section. */
6907 && (symseg
!= data_section
6908 || ppc_toc_csect
== NULL
6909 || val
< ppc_toc_frag
->fr_address
6910 || (ppc_after_toc_frag
!= NULL
6911 && val
>= ppc_after_toc_frag
->fr_address
)))
6913 symbolS
*csect
= tc
->within
;
6915 /* If the symbol was not declared by a label (eg: a section symbol),
6916 use the section instead of the csect. This doesn't happen in
6917 normal AIX assembly code. */
6919 csect
= seg_info (symseg
)->sym
;
6921 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6922 fix
->fx_addsy
= csect
;
6927 /* Adjust a reloc against a .lcomm symbol to be against the base
6929 if (symseg
== bss_section
6930 && ! S_IS_EXTERNAL (fix
->fx_addsy
))
6932 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6934 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6941 /* A reloc from one csect to another must be kept. The assembler
6942 will, of course, keep relocs between sections, and it will keep
6943 absolute relocs, but we need to force it to keep PC relative relocs
6944 between two csects in the same section. */
6947 ppc_force_relocation (fixS
*fix
)
6949 /* At this point fix->fx_addsy should already have been converted to
6950 a csect symbol. If the csect does not include the fragment, then
6951 we need to force the relocation. */
6953 && fix
->fx_addsy
!= NULL
6954 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6955 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6956 > fix
->fx_frag
->fr_address
)
6957 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6958 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6959 <= fix
->fx_frag
->fr_address
))))
6962 return generic_force_reloc (fix
);
6964 #endif /* OBJ_XCOFF */
6967 /* If this function returns non-zero, it guarantees that a relocation
6968 will be emitted for a fixup. */
6971 ppc_force_relocation (fixS
*fix
)
6973 /* Branch prediction relocations must force a relocation, as must
6974 the vtable description relocs. */
6975 switch (fix
->fx_r_type
)
6977 case BFD_RELOC_PPC_B16_BRTAKEN
:
6978 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6979 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6980 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6981 case BFD_RELOC_24_PLT_PCREL
:
6982 case BFD_RELOC_PPC64_TOC
:
6984 case BFD_RELOC_PPC_B26
:
6985 case BFD_RELOC_PPC_BA26
:
6986 case BFD_RELOC_PPC_B16
:
6987 case BFD_RELOC_PPC_BA16
:
6988 case BFD_RELOC_PPC64_REL24_NOTOC
:
6989 /* All branch fixups targeting a localentry symbol must
6990 force a relocation. */
6993 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6994 elf_symbol_type
*elfsym
6995 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6996 gas_assert (elfsym
);
6997 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
7005 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
7006 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
)
7009 return generic_force_reloc (fix
);
7013 ppc_fix_adjustable (fixS
*fix
)
7015 switch (fix
->fx_r_type
)
7017 /* All branch fixups targeting a localentry symbol must
7018 continue using the symbol. */
7019 case BFD_RELOC_PPC_B26
:
7020 case BFD_RELOC_PPC_BA26
:
7021 case BFD_RELOC_PPC_B16
:
7022 case BFD_RELOC_PPC_BA16
:
7023 case BFD_RELOC_PPC_B16_BRTAKEN
:
7024 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7025 case BFD_RELOC_PPC_BA16_BRTAKEN
:
7026 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
7027 case BFD_RELOC_PPC64_REL24_NOTOC
:
7030 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
7031 elf_symbol_type
*elfsym
7032 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
7033 gas_assert (elfsym
);
7034 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
7042 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
7043 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
7044 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
7045 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
7046 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
7047 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
7048 && fix
->fx_r_type
!= BFD_RELOC_16_GOT_PCREL
7049 && fix
->fx_r_type
!= BFD_RELOC_32_GOTOFF
7050 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT_PCREL34
7051 && fix
->fx_r_type
!= BFD_RELOC_24_PLT_PCREL
7052 && fix
->fx_r_type
!= BFD_RELOC_32_PLTOFF
7053 && fix
->fx_r_type
!= BFD_RELOC_32_PLT_PCREL
7054 && fix
->fx_r_type
!= BFD_RELOC_LO16_PLTOFF
7055 && fix
->fx_r_type
!= BFD_RELOC_HI16_PLTOFF
7056 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_PLTOFF
7057 && fix
->fx_r_type
!= BFD_RELOC_64_PLTOFF
7058 && fix
->fx_r_type
!= BFD_RELOC_64_PLT_PCREL
7059 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT16_LO_DS
7060 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT_PCREL34
7061 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16
7062 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO
7063 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HI
7064 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HA
7065 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_DS
7066 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO_DS
7067 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
7068 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_LO16A
7069 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HI16A
7070 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HA16A
7071 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
7072 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
7073 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
7074 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
));
7079 ppc_frag_check (struct frag
*fragP
)
7081 if ((fragP
->fr_address
& fragP
->insn_addr
) != 0)
7082 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
7083 _("instruction address is not a multiple of %d"),
7084 fragP
->insn_addr
+ 1);
7087 /* rs_align_code frag handling. */
7089 enum ppc_nop_encoding_for_rs_align_code
7098 ppc_nop_select (void)
7100 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
7102 if ((ppc_cpu
& (PPC_OPCODE_POWER9
| PPC_OPCODE_E500MC
)) == 0)
7104 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0)
7105 return PPC_NOP_GROUP_P7
;
7106 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0)
7107 return PPC_NOP_GROUP_P6
;
7109 return PPC_NOP_VANILLA
;
7113 ppc_handle_align (struct frag
*fragP
)
7115 valueT count
= (fragP
->fr_next
->fr_address
7116 - (fragP
->fr_address
+ fragP
->fr_fix
));
7117 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
7118 enum ppc_nop_encoding_for_rs_align_code nop_select
= *dest
& 0xff;
7120 /* Pad with zeros if not inserting a whole number of instructions.
7121 We could pad with zeros up to an instruction boundary then follow
7122 with nops but odd counts indicate data in an executable section
7123 so padding with zeros is most appropriate. */
7125 || nop_select
== PPC_NOP_VLE
? (count
& 1) != 0 : (count
& 3) != 0)
7131 if (nop_select
== PPC_NOP_VLE
)
7135 md_number_to_chars (dest
, 0x4400, 2);
7141 if (count
> 4 * nop_limit
&& count
< 0x2000000)
7145 /* Make a branch, then follow with nops. Insert another
7146 frag to handle the nops. */
7147 md_number_to_chars (dest
, 0x48000000 + count
, 4);
7152 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
7153 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
7154 fragP
->fr_next
= rest
;
7156 rest
->fr_address
+= rest
->fr_fix
+ 4;
7158 /* If we leave the next frag as rs_align_code we'll come here
7159 again, resulting in a bunch of branches rather than a
7160 branch followed by nops. */
7161 rest
->fr_type
= rs_align
;
7162 dest
= rest
->fr_literal
;
7165 md_number_to_chars (dest
, 0x60000000, 4);
7167 if (nop_select
>= PPC_NOP_GROUP_P6
)
7169 /* For power6, power7, and power8, we want the last nop to
7170 be a group terminating one. Do this by inserting an
7171 rs_fill frag immediately after this one, with its address
7172 set to the last nop location. This will automatically
7173 reduce the number of nops in the current frag by one. */
7176 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
7178 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
7179 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
7180 group_nop
->fr_fix
= 0;
7181 group_nop
->fr_offset
= 1;
7182 group_nop
->fr_type
= rs_fill
;
7183 fragP
->fr_next
= group_nop
;
7184 dest
= group_nop
->fr_literal
;
7187 if (nop_select
== PPC_NOP_GROUP_P6
)
7188 /* power6 group terminating nop: "ori 1,1,0". */
7189 md_number_to_chars (dest
, 0x60210000, 4);
7191 /* power7/power8 group terminating nop: "ori 2,2,0". */
7192 md_number_to_chars (dest
, 0x60420000, 4);
7197 /* Apply a fixup to the object code. This is called for all the
7198 fixups we generated by the calls to fix_new_exp, above. */
7201 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
7203 valueT value
= * valP
;
7205 const struct powerpc_operand
*operand
;
7208 if (fixP
->fx_addsy
!= NULL
)
7210 /* Hack around bfd_install_relocation brain damage. */
7212 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
7214 if (fixP
->fx_addsy
== abs_section_sym
)
7220 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7221 the symbol values. If we are doing this relocation the code in
7222 write.c is going to call bfd_install_relocation, which is also
7223 going to use the symbol value. That means that if the reloc is
7224 fully resolved we want to use *valP since bfd_install_relocation is
7226 However, if the reloc is not fully resolved we do not want to
7227 use *valP, and must use fx_offset instead. If the relocation
7228 is PC-relative, we then need to re-apply md_pcrel_from_section
7229 to this new relocation value. */
7230 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
7235 value
= fixP
->fx_offset
;
7237 value
-= md_pcrel_from_section (fixP
, seg
);
7241 /* We are only able to convert some relocs to pc-relative. */
7244 switch (fixP
->fx_r_type
)
7247 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
7251 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
7255 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
7258 case BFD_RELOC_LO16
:
7259 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
7262 case BFD_RELOC_HI16
:
7263 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
7266 case BFD_RELOC_HI16_S
:
7267 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
7270 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7271 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGH
;
7274 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7275 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHA
;
7278 case BFD_RELOC_PPC64_HIGHER
:
7279 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER
;
7282 case BFD_RELOC_PPC64_HIGHER_S
:
7283 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA
;
7286 case BFD_RELOC_PPC64_HIGHEST
:
7287 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST
;
7290 case BFD_RELOC_PPC64_HIGHEST_S
:
7291 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA
;
7294 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
7295 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER34
;
7298 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
7299 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA34
;
7302 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
7303 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST34
;
7306 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
7307 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA34
;
7310 case BFD_RELOC_PPC_16DX_HA
:
7311 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7314 case BFD_RELOC_PPC64_D34
:
7315 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL34
;
7318 case BFD_RELOC_PPC64_D28
:
7319 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL28
;
7326 else if (!fixP
->fx_done
7327 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
7329 /* addpcis is relative to next insn address. */
7331 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7336 if (fixP
->fx_pcrel_adjust
!= 0)
7338 /* This is a fixup on an instruction. */
7339 int opindex
= fixP
->fx_pcrel_adjust
& 0xff;
7341 operand
= &powerpc_operands
[opindex
];
7343 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
7344 does not generate a reloc. It uses the offset of `sym' within its
7345 csect. Other usages, such as `.long sym', generate relocs. This
7346 is the documented behaviour of non-TOC symbols. */
7347 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
7348 && (operand
->bitm
& 0xfff0) == 0xfff0
7349 && operand
->shift
== 0
7350 && (operand
->insert
== NULL
|| ppc_obj64
)
7351 && fixP
->fx_addsy
!= NULL
7352 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
7353 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC
7354 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC0
7355 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
7357 value
= fixP
->fx_offset
;
7361 /* During parsing of instructions, a TOC16 reloc is generated for
7362 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
7363 in the toc. But at parse time, SYM may be not yet defined, so
7364 check again here. */
7365 if (fixP
->fx_r_type
== BFD_RELOC_16
7366 && fixP
->fx_addsy
!= NULL
7367 && ppc_is_toc_sym (fixP
->fx_addsy
))
7368 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
7372 /* Calculate value to be stored in field. */
7374 switch (fixP
->fx_r_type
)
7377 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
7378 case BFD_RELOC_PPC_VLE_LO16A
:
7379 case BFD_RELOC_PPC_VLE_LO16D
:
7381 case BFD_RELOC_LO16
:
7382 case BFD_RELOC_LO16_PCREL
:
7383 fieldval
= value
& 0xffff;
7385 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7386 fieldval
= SEX16 (fieldval
);
7387 fixP
->fx_no_overflow
= 1;
7390 case BFD_RELOC_HI16
:
7391 case BFD_RELOC_HI16_PCREL
:
7393 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7395 fieldval
= value
>> 16;
7396 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7398 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7399 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7405 case BFD_RELOC_PPC_VLE_HI16A
:
7406 case BFD_RELOC_PPC_VLE_HI16D
:
7407 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7409 fieldval
= PPC_HI (value
);
7410 goto sign_extend_16
;
7412 case BFD_RELOC_HI16_S
:
7413 case BFD_RELOC_HI16_S_PCREL
:
7414 case BFD_RELOC_PPC_16DX_HA
:
7415 case BFD_RELOC_PPC_REL16DX_HA
:
7417 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7419 fieldval
= (value
+ 0x8000) >> 16;
7420 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7422 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7423 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7429 case BFD_RELOC_PPC_VLE_HA16A
:
7430 case BFD_RELOC_PPC_VLE_HA16D
:
7431 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7433 fieldval
= PPC_HA (value
);
7434 goto sign_extend_16
;
7437 case BFD_RELOC_PPC64_HIGHER
:
7438 fieldval
= PPC_HIGHER (value
);
7439 goto sign_extend_16
;
7441 case BFD_RELOC_PPC64_HIGHER_S
:
7442 fieldval
= PPC_HIGHERA (value
);
7443 goto sign_extend_16
;
7445 case BFD_RELOC_PPC64_HIGHEST
:
7446 fieldval
= PPC_HIGHEST (value
);
7447 goto sign_extend_16
;
7449 case BFD_RELOC_PPC64_HIGHEST_S
:
7450 fieldval
= PPC_HIGHESTA (value
);
7451 goto sign_extend_16
;
7458 if (operand
!= NULL
)
7460 /* Handle relocs in an insn. */
7461 switch (fixP
->fx_r_type
)
7464 /* The following relocs can't be calculated by the assembler.
7465 Leave the field zero. */
7466 case BFD_RELOC_PPC_TPREL16
:
7467 case BFD_RELOC_PPC_TPREL16_LO
:
7468 case BFD_RELOC_PPC_TPREL16_HI
:
7469 case BFD_RELOC_PPC_TPREL16_HA
:
7470 case BFD_RELOC_PPC_DTPREL16
:
7471 case BFD_RELOC_PPC_DTPREL16_LO
:
7472 case BFD_RELOC_PPC_DTPREL16_HI
:
7473 case BFD_RELOC_PPC_DTPREL16_HA
:
7474 case BFD_RELOC_PPC_GOT_TLSGD16
:
7475 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7476 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7477 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7478 case BFD_RELOC_PPC_GOT_TLSLD16
:
7479 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7480 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7481 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7482 case BFD_RELOC_PPC_GOT_TPREL16
:
7483 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7484 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7485 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7486 case BFD_RELOC_PPC_GOT_DTPREL16
:
7487 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7488 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7489 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7490 case BFD_RELOC_PPC64_TPREL16_DS
:
7491 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
7492 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7493 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7494 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7495 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7496 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7497 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7498 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7499 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7500 case BFD_RELOC_PPC64_DTPREL16_DS
:
7501 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
7502 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7503 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7504 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7505 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7506 gas_assert (fixP
->fx_addsy
!= NULL
);
7507 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7511 /* These also should leave the field zero for the same
7512 reason. Note that older versions of gas wrote values
7513 here. If we want to go back to the old behaviour, then
7514 all _LO and _LO_DS cases will need to be treated like
7515 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
7516 case BFD_RELOC_16_GOTOFF
:
7517 case BFD_RELOC_LO16_GOTOFF
:
7518 case BFD_RELOC_HI16_GOTOFF
:
7519 case BFD_RELOC_HI16_S_GOTOFF
:
7520 case BFD_RELOC_LO16_PLTOFF
:
7521 case BFD_RELOC_HI16_PLTOFF
:
7522 case BFD_RELOC_HI16_S_PLTOFF
:
7523 case BFD_RELOC_GPREL16
:
7524 case BFD_RELOC_16_BASEREL
:
7525 case BFD_RELOC_LO16_BASEREL
:
7526 case BFD_RELOC_HI16_BASEREL
:
7527 case BFD_RELOC_HI16_S_BASEREL
:
7528 case BFD_RELOC_PPC_TOC16
:
7529 case BFD_RELOC_PPC64_TOC16_LO
:
7530 case BFD_RELOC_PPC64_TOC16_HI
:
7531 case BFD_RELOC_PPC64_TOC16_HA
:
7532 case BFD_RELOC_PPC64_PLTGOT16
:
7533 case BFD_RELOC_PPC64_PLTGOT16_LO
:
7534 case BFD_RELOC_PPC64_PLTGOT16_HI
:
7535 case BFD_RELOC_PPC64_PLTGOT16_HA
:
7536 case BFD_RELOC_PPC64_GOT16_DS
:
7537 case BFD_RELOC_PPC64_GOT16_LO_DS
:
7538 case BFD_RELOC_PPC64_PLT16_LO_DS
:
7539 case BFD_RELOC_PPC64_SECTOFF_DS
:
7540 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
7541 case BFD_RELOC_PPC64_TOC16_DS
:
7542 case BFD_RELOC_PPC64_TOC16_LO_DS
:
7543 case BFD_RELOC_PPC64_PLTGOT16_DS
:
7544 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
7545 case BFD_RELOC_PPC_EMB_NADDR16
:
7546 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7547 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7548 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7549 case BFD_RELOC_PPC_EMB_SDAI16
:
7550 case BFD_RELOC_PPC_EMB_SDA2I16
:
7551 case BFD_RELOC_PPC_EMB_SDA2REL
:
7552 case BFD_RELOC_PPC_EMB_SDA21
:
7553 case BFD_RELOC_PPC_EMB_MRKREF
:
7554 case BFD_RELOC_PPC_EMB_RELSEC16
:
7555 case BFD_RELOC_PPC_EMB_RELST_LO
:
7556 case BFD_RELOC_PPC_EMB_RELST_HI
:
7557 case BFD_RELOC_PPC_EMB_RELST_HA
:
7558 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7559 case BFD_RELOC_PPC_EMB_RELSDA
:
7560 case BFD_RELOC_PPC_VLE_SDA21
:
7561 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7562 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7563 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
7564 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7565 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
7566 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7567 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
7568 case BFD_RELOC_PPC64_GOT_PCREL34
:
7569 case BFD_RELOC_PPC64_PLT_PCREL34
:
7570 gas_assert (fixP
->fx_addsy
!= NULL
);
7573 case BFD_RELOC_PPC_TLS
:
7574 case BFD_RELOC_PPC_TLSGD
:
7575 case BFD_RELOC_PPC_TLSLD
:
7581 case BFD_RELOC_PPC_B16
:
7582 /* Adjust the offset to the instruction boundary. */
7587 case BFD_RELOC_VTABLE_INHERIT
:
7588 case BFD_RELOC_VTABLE_ENTRY
:
7589 case BFD_RELOC_PPC_DTPMOD
:
7590 case BFD_RELOC_PPC_TPREL
:
7591 case BFD_RELOC_PPC_DTPREL
:
7592 case BFD_RELOC_PPC_COPY
:
7593 case BFD_RELOC_PPC_GLOB_DAT
:
7594 case BFD_RELOC_32_PLT_PCREL
:
7595 case BFD_RELOC_PPC_EMB_NADDR32
:
7596 case BFD_RELOC_PPC64_TOC
:
7597 case BFD_RELOC_CTOR
:
7599 case BFD_RELOC_32_PCREL
:
7602 case BFD_RELOC_64_PCREL
:
7603 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7604 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7605 _("%s unsupported as instruction fixup"),
7606 bfd_get_reloc_code_name (fixP
->fx_r_type
));
7615 /* powerpc uses RELA style relocs, so if emitting a reloc the field
7616 contents can stay at zero. */
7617 #define APPLY_RELOC fixP->fx_done
7619 #define APPLY_RELOC 1
7621 /* We need to call the insert function even when fieldval is
7622 zero if the insert function would translate that zero to a
7623 bit pattern other than all zeros. */
7624 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
7627 unsigned char *where
;
7629 /* Fetch the instruction, insert the fully resolved operand
7630 value, and stuff the instruction back again. */
7631 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
7632 if (target_big_endian
)
7634 if (fixP
->fx_size
< 4)
7635 insn
= bfd_getb16 (where
);
7638 insn
= bfd_getb32 (where
);
7639 if (fixP
->fx_size
> 4)
7640 insn
= insn
<< 32 | bfd_getb32 (where
+ 4);
7645 if (fixP
->fx_size
< 4)
7646 insn
= bfd_getl16 (where
);
7649 insn
= bfd_getl32 (where
);
7650 if (fixP
->fx_size
> 4)
7651 insn
= insn
<< 32 | bfd_getl32 (where
+ 4);
7654 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
7655 fixP
->tc_fix_data
.ppc_cpu
,
7656 fixP
->fx_file
, fixP
->fx_line
);
7657 if (target_big_endian
)
7659 if (fixP
->fx_size
< 4)
7660 bfd_putb16 (insn
, where
);
7663 if (fixP
->fx_size
> 4)
7665 bfd_putb32 (insn
, where
+ 4);
7668 bfd_putb32 (insn
, where
);
7673 if (fixP
->fx_size
< 4)
7674 bfd_putl16 (insn
, where
);
7677 if (fixP
->fx_size
> 4)
7679 bfd_putl32 (insn
, where
+ 4);
7682 bfd_putl32 (insn
, where
);
7688 /* Nothing else to do here. */
7691 gas_assert (fixP
->fx_addsy
!= NULL
);
7692 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
7697 /* Use expr_symbol_where to see if this is an expression
7699 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
7700 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7701 _("unresolved expression that must be resolved"));
7703 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7704 _("unsupported relocation against %s"),
7705 S_GET_NAME (fixP
->fx_addsy
));
7712 /* Handle relocs in data. */
7713 switch (fixP
->fx_r_type
)
7715 case BFD_RELOC_VTABLE_INHERIT
:
7717 && !S_IS_DEFINED (fixP
->fx_addsy
)
7718 && !S_IS_WEAK (fixP
->fx_addsy
))
7719 S_SET_WEAK (fixP
->fx_addsy
);
7722 case BFD_RELOC_VTABLE_ENTRY
:
7727 /* These can appear with @l etc. in data. */
7728 case BFD_RELOC_LO16
:
7729 case BFD_RELOC_LO16_PCREL
:
7730 case BFD_RELOC_HI16
:
7731 case BFD_RELOC_HI16_PCREL
:
7732 case BFD_RELOC_HI16_S
:
7733 case BFD_RELOC_HI16_S_PCREL
:
7734 case BFD_RELOC_PPC64_HIGHER
:
7735 case BFD_RELOC_PPC64_HIGHER_S
:
7736 case BFD_RELOC_PPC64_HIGHEST
:
7737 case BFD_RELOC_PPC64_HIGHEST_S
:
7738 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7739 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7740 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7743 case BFD_RELOC_PPC_DTPMOD
:
7744 case BFD_RELOC_PPC_TPREL
:
7745 case BFD_RELOC_PPC_DTPREL
:
7746 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7749 /* Just punt all of these to the linker. */
7750 case BFD_RELOC_PPC_B16_BRTAKEN
:
7751 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7752 case BFD_RELOC_16_GOTOFF
:
7753 case BFD_RELOC_LO16_GOTOFF
:
7754 case BFD_RELOC_HI16_GOTOFF
:
7755 case BFD_RELOC_HI16_S_GOTOFF
:
7756 case BFD_RELOC_LO16_PLTOFF
:
7757 case BFD_RELOC_HI16_PLTOFF
:
7758 case BFD_RELOC_HI16_S_PLTOFF
:
7759 case BFD_RELOC_PPC_COPY
:
7760 case BFD_RELOC_PPC_GLOB_DAT
:
7761 case BFD_RELOC_16_BASEREL
:
7762 case BFD_RELOC_LO16_BASEREL
:
7763 case BFD_RELOC_HI16_BASEREL
:
7764 case BFD_RELOC_HI16_S_BASEREL
:
7765 case BFD_RELOC_PPC_TLS
:
7766 case BFD_RELOC_PPC_DTPREL16_LO
:
7767 case BFD_RELOC_PPC_DTPREL16_HI
:
7768 case BFD_RELOC_PPC_DTPREL16_HA
:
7769 case BFD_RELOC_PPC_TPREL16_LO
:
7770 case BFD_RELOC_PPC_TPREL16_HI
:
7771 case BFD_RELOC_PPC_TPREL16_HA
:
7772 case BFD_RELOC_PPC_GOT_TLSGD16
:
7773 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7774 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7775 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7776 case BFD_RELOC_PPC_GOT_TLSLD16
:
7777 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7778 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7779 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7780 case BFD_RELOC_PPC_GOT_DTPREL16
:
7781 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7782 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7783 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7784 case BFD_RELOC_PPC_GOT_TPREL16
:
7785 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7786 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7787 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7788 case BFD_RELOC_24_PLT_PCREL
:
7789 case BFD_RELOC_PPC_LOCAL24PC
:
7790 case BFD_RELOC_32_PLT_PCREL
:
7791 case BFD_RELOC_GPREL16
:
7792 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7793 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7794 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7795 case BFD_RELOC_PPC_EMB_NADDR32
:
7796 case BFD_RELOC_PPC_EMB_NADDR16
:
7797 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7798 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7799 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7800 case BFD_RELOC_PPC_EMB_SDAI16
:
7801 case BFD_RELOC_PPC_EMB_SDA2REL
:
7802 case BFD_RELOC_PPC_EMB_SDA2I16
:
7803 case BFD_RELOC_PPC_EMB_SDA21
:
7804 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7805 case BFD_RELOC_PPC_EMB_MRKREF
:
7806 case BFD_RELOC_PPC_EMB_RELSEC16
:
7807 case BFD_RELOC_PPC_EMB_RELST_LO
:
7808 case BFD_RELOC_PPC_EMB_RELST_HI
:
7809 case BFD_RELOC_PPC_EMB_RELST_HA
:
7810 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7811 case BFD_RELOC_PPC_EMB_RELSDA
:
7812 case BFD_RELOC_PPC64_TOC
:
7813 case BFD_RELOC_PPC_TOC16
:
7814 case BFD_RELOC_PPC64_TOC16_LO
:
7815 case BFD_RELOC_PPC64_TOC16_HI
:
7816 case BFD_RELOC_PPC64_TOC16_HA
:
7817 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7818 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7819 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7820 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7821 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7822 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7823 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7824 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7825 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7826 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7827 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7828 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7834 case BFD_RELOC_NONE
:
7836 case BFD_RELOC_CTOR
:
7838 case BFD_RELOC_32_PCREL
:
7841 case BFD_RELOC_64_PCREL
:
7843 case BFD_RELOC_16_PCREL
:
7849 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7854 if (fixP
->fx_size
&& APPLY_RELOC
)
7855 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7856 fieldval
, fixP
->fx_size
);
7858 && (seg
->flags
& SEC_CODE
) != 0
7859 && fixP
->fx_size
== 4
7862 && (fixP
->fx_r_type
== BFD_RELOC_32
7863 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7864 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7865 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7866 _("data in executable section"));
7870 ppc_elf_validate_fix (fixP
, seg
);
7871 fixP
->fx_addnumber
= value
;
7873 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7874 from the section contents. If we are going to be emitting a reloc
7875 then the section contents are immaterial, so don't warn if they
7876 happen to overflow. Leave such warnings to ld. */
7879 fixP
->fx_no_overflow
= 1;
7881 /* Arrange to emit .TOC. as a normal symbol if used in anything
7882 but .TOC.@tocbase. */
7884 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7885 && fixP
->fx_addsy
!= NULL
7886 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7887 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7890 if (fixP
->fx_r_type
!= BFD_RELOC_PPC_TOC16
)
7891 fixP
->fx_addnumber
= 0;
7895 fixP
->fx_addnumber
= 0;
7897 /* We want to use the offset within the toc, not the actual VMA
7899 fixP
->fx_addnumber
=
7900 - bfd_get_section_vma (stdoutput
, S_GET_SEGMENT (fixP
->fx_addsy
))
7901 - S_GET_VALUE (ppc_toc_csect
);
7902 /* Set *valP to avoid errors. */
7909 /* Generate a reloc for a fixup. */
7912 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7916 reloc
= XNEW (arelent
);
7918 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7919 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7920 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7921 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7922 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7924 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7925 _("reloc %d not supported by object file format"),
7926 (int) fixp
->fx_r_type
);
7929 reloc
->addend
= fixp
->fx_addnumber
;
7935 ppc_cfi_frame_initial_instructions (void)
7937 cfi_add_CFA_def_cfa (1, 0);
7941 tc_ppc_regname_to_dw2regnum (char *regname
)
7943 unsigned int regnum
= -1;
7947 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7949 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7950 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7951 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7952 { "spe_acc", 111 }, { "spefscr", 112 }
7955 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7956 if (strcmp (regnames
[i
].name
, regname
) == 0)
7957 return regnames
[i
].dw2regnum
;
7959 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7961 p
= regname
+ 1 + (regname
[1] == '.');
7962 regnum
= strtoul (p
, &q
, 10);
7963 if (p
== q
|| *q
|| regnum
>= 32)
7965 if (regname
[0] == 'f')
7967 else if (regname
[0] == 'v')
7970 else if (regname
[0] == 'c' && regname
[1] == 'r')
7972 p
= regname
+ 2 + (regname
[2] == '.');
7973 if (p
[0] < '0' || p
[0] > '7' || p
[1])
7975 regnum
= p
[0] - '0' + 68;