1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2018 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
39 #include "coff/xcoff.h"
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian
;
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian
= 0;
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
54 #define TARGET_REG_NAMES_P TRUE
56 #define TARGET_REG_NAMES_P FALSE
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
94 static bfd_boolean reg_names_p
= TARGET_REG_NAMES_P
;
96 static void ppc_macro (char *, const struct powerpc_macro
*);
97 static void ppc_byte (int);
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS
*, offsetT
);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
136 static void ppc_elf_gnu_attribute (int);
140 static void ppc_previous (int);
141 static void ppc_pdata (int);
142 static void ppc_ydata (int);
143 static void ppc_reldata (int);
144 static void ppc_rdata (int);
145 static void ppc_ualong (int);
146 static void ppc_znop (int);
147 static void ppc_pe_comm (int);
148 static void ppc_pe_section (int);
149 static void ppc_pe_function (int);
150 static void ppc_pe_tocd (int);
153 /* Generic assembler global variables which must be defined by all
157 /* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161 static const char ppc_solaris_comment_chars
[] = "#!";
162 static const char ppc_eabi_comment_chars
[] = "#";
164 #ifdef TARGET_SOLARIS_COMMENT
165 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
167 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
170 const char comment_chars
[] = "#";
173 /* Characters which start a comment at the beginning of a line. */
174 const char line_comment_chars
[] = "#";
176 /* Characters which may be used to separate multiple commands on a
178 const char line_separator_chars
[] = ";";
180 /* Characters which are used to indicate an exponent in a floating
182 const char EXP_CHARS
[] = "eE";
184 /* Characters which mean that a number is a floating point constant,
186 const char FLT_CHARS
[] = "dD";
188 /* Anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190 const char ppc_symbol_chars
[] = "%[";
192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193 int ppc_cie_data_alignment
;
195 /* The dwarf2 minimum instruction length. */
196 int ppc_dwarf2_line_min_insn_length
;
198 /* More than this number of nops in an alignment op gets a branch
200 unsigned long nop_limit
= 4;
202 /* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
204 ppc_cpu_t ppc_cpu
= 0;
205 ppc_cpu_t sticky
= 0;
207 /* Value for ELF e_flags EF_PPC64_ABI. */
208 unsigned int ppc_abiversion
= 0;
211 /* Flags set on encountering toc relocs. */
213 has_large_toc_reloc
= 1,
214 has_small_toc_reloc
= 2
218 /* Warn on emitting data to code sections. */
224 /* The target specific pseudo-ops which we support. */
226 const pseudo_typeS md_pseudo_table
[] =
228 /* Pseudo-ops which must be overridden. */
229 { "byte", ppc_byte
, 0 },
232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
233 legitimately belong in the obj-*.c file. However, XCOFF is based
234 on COFF, and is only implemented for the RS/6000. We just use
235 obj-coff.c, and add what we need here. */
236 { "comm", ppc_comm
, 0 },
237 { "lcomm", ppc_comm
, 1 },
241 { "bi", ppc_biei
, 0 },
243 { "csect", ppc_csect
, 0 },
244 { "dwsect", ppc_dwsect
, 0 },
245 { "data", ppc_section
, 'd' },
249 { "ei", ppc_biei
, 1 },
251 { "extern", ppc_extern
, 0 },
252 { "function", ppc_function
, 0 },
253 { "lglobl", ppc_lglobl
, 0 },
254 { "ref", ppc_ref
, 0 },
255 { "rename", ppc_rename
, 0 },
256 { "section", ppc_named_section
, 0 },
257 { "stabx", ppc_stabx
, 0 },
258 { "text", ppc_section
, 't' },
259 { "toc", ppc_toc
, 0 },
260 { "long", ppc_xcoff_cons
, 2 },
261 { "llong", ppc_xcoff_cons
, 3 },
262 { "word", ppc_xcoff_cons
, 1 },
263 { "short", ppc_xcoff_cons
, 1 },
264 { "vbyte", ppc_vbyte
, 0 },
268 { "llong", cons
, 8 },
269 { "rdata", ppc_elf_rdata
, 0 },
270 { "rodata", ppc_elf_rdata
, 0 },
271 { "lcomm", ppc_elf_lcomm
, 0 },
272 { "localentry", ppc_elf_localentry
, 0 },
273 { "abiversion", ppc_elf_abiversion
, 0 },
274 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
279 { "previous", ppc_previous
, 0 },
280 { "pdata", ppc_pdata
, 0 },
281 { "ydata", ppc_ydata
, 0 },
282 { "reldata", ppc_reldata
, 0 },
283 { "rdata", ppc_rdata
, 0 },
284 { "ualong", ppc_ualong
, 0 },
285 { "znop", ppc_znop
, 0 },
286 { "comm", ppc_pe_comm
, 0 },
287 { "lcomm", ppc_pe_comm
, 1 },
288 { "section", ppc_pe_section
, 0 },
289 { "function", ppc_pe_function
,0 },
290 { "tocd", ppc_pe_tocd
, 0 },
293 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
295 { "machine", ppc_machine
, 0 },
302 /* Predefined register names if -mregnames (or default for Windows NT).
303 In general, there are lots of them, in an attempt to be compatible
304 with a number of other Windows NT assemblers. */
306 /* Structure to hold information about predefined registers. */
310 unsigned short value
;
311 unsigned short flags
;
314 /* List of registers that are pre-defined:
316 Each general register has predefined names of the form:
317 1. r<reg_num> which has the value <reg_num>.
318 2. r.<reg_num> which has the value <reg_num>.
320 Each floating point register has predefined names of the form:
321 1. f<reg_num> which has the value <reg_num>.
322 2. f.<reg_num> which has the value <reg_num>.
324 Each vector unit register has predefined names of the form:
325 1. v<reg_num> which has the value <reg_num>.
326 2. v.<reg_num> which has the value <reg_num>.
328 Each condition register has predefined names of the form:
329 1. cr<reg_num> which has the value <reg_num>.
330 2. cr.<reg_num> which has the value <reg_num>.
332 There are individual registers as well:
333 sp or r.sp has the value 1
334 rtoc or r.toc has the value 2
339 dsisr has the value 18
341 sdr1 has the value 25
342 srr0 has the value 26
343 srr1 has the value 27
345 The table is sorted. Suitable for searching by a binary search. */
347 static const struct pd_reg pre_defined_registers
[] =
349 /* Condition Registers */
350 { "cr.0", 0, PPC_OPERAND_CR_REG
},
351 { "cr.1", 1, PPC_OPERAND_CR_REG
},
352 { "cr.2", 2, PPC_OPERAND_CR_REG
},
353 { "cr.3", 3, PPC_OPERAND_CR_REG
},
354 { "cr.4", 4, PPC_OPERAND_CR_REG
},
355 { "cr.5", 5, PPC_OPERAND_CR_REG
},
356 { "cr.6", 6, PPC_OPERAND_CR_REG
},
357 { "cr.7", 7, PPC_OPERAND_CR_REG
},
359 { "cr0", 0, PPC_OPERAND_CR_REG
},
360 { "cr1", 1, PPC_OPERAND_CR_REG
},
361 { "cr2", 2, PPC_OPERAND_CR_REG
},
362 { "cr3", 3, PPC_OPERAND_CR_REG
},
363 { "cr4", 4, PPC_OPERAND_CR_REG
},
364 { "cr5", 5, PPC_OPERAND_CR_REG
},
365 { "cr6", 6, PPC_OPERAND_CR_REG
},
366 { "cr7", 7, PPC_OPERAND_CR_REG
},
368 { "ctr", 9, PPC_OPERAND_SPR
},
369 { "dar", 19, PPC_OPERAND_SPR
},
370 { "dec", 22, PPC_OPERAND_SPR
},
371 { "dsisr", 18, PPC_OPERAND_SPR
},
373 /* Floating point registers */
374 { "f.0", 0, PPC_OPERAND_FPR
},
375 { "f.1", 1, PPC_OPERAND_FPR
},
376 { "f.10", 10, PPC_OPERAND_FPR
},
377 { "f.11", 11, PPC_OPERAND_FPR
},
378 { "f.12", 12, PPC_OPERAND_FPR
},
379 { "f.13", 13, PPC_OPERAND_FPR
},
380 { "f.14", 14, PPC_OPERAND_FPR
},
381 { "f.15", 15, PPC_OPERAND_FPR
},
382 { "f.16", 16, PPC_OPERAND_FPR
},
383 { "f.17", 17, PPC_OPERAND_FPR
},
384 { "f.18", 18, PPC_OPERAND_FPR
},
385 { "f.19", 19, PPC_OPERAND_FPR
},
386 { "f.2", 2, PPC_OPERAND_FPR
},
387 { "f.20", 20, PPC_OPERAND_FPR
},
388 { "f.21", 21, PPC_OPERAND_FPR
},
389 { "f.22", 22, PPC_OPERAND_FPR
},
390 { "f.23", 23, PPC_OPERAND_FPR
},
391 { "f.24", 24, PPC_OPERAND_FPR
},
392 { "f.25", 25, PPC_OPERAND_FPR
},
393 { "f.26", 26, PPC_OPERAND_FPR
},
394 { "f.27", 27, PPC_OPERAND_FPR
},
395 { "f.28", 28, PPC_OPERAND_FPR
},
396 { "f.29", 29, PPC_OPERAND_FPR
},
397 { "f.3", 3, PPC_OPERAND_FPR
},
398 { "f.30", 30, PPC_OPERAND_FPR
},
399 { "f.31", 31, PPC_OPERAND_FPR
},
400 { "f.32", 32, PPC_OPERAND_VSR
},
401 { "f.33", 33, PPC_OPERAND_VSR
},
402 { "f.34", 34, PPC_OPERAND_VSR
},
403 { "f.35", 35, PPC_OPERAND_VSR
},
404 { "f.36", 36, PPC_OPERAND_VSR
},
405 { "f.37", 37, PPC_OPERAND_VSR
},
406 { "f.38", 38, PPC_OPERAND_VSR
},
407 { "f.39", 39, PPC_OPERAND_VSR
},
408 { "f.4", 4, PPC_OPERAND_FPR
},
409 { "f.40", 40, PPC_OPERAND_VSR
},
410 { "f.41", 41, PPC_OPERAND_VSR
},
411 { "f.42", 42, PPC_OPERAND_VSR
},
412 { "f.43", 43, PPC_OPERAND_VSR
},
413 { "f.44", 44, PPC_OPERAND_VSR
},
414 { "f.45", 45, PPC_OPERAND_VSR
},
415 { "f.46", 46, PPC_OPERAND_VSR
},
416 { "f.47", 47, PPC_OPERAND_VSR
},
417 { "f.48", 48, PPC_OPERAND_VSR
},
418 { "f.49", 49, PPC_OPERAND_VSR
},
419 { "f.5", 5, PPC_OPERAND_FPR
},
420 { "f.50", 50, PPC_OPERAND_VSR
},
421 { "f.51", 51, PPC_OPERAND_VSR
},
422 { "f.52", 52, PPC_OPERAND_VSR
},
423 { "f.53", 53, PPC_OPERAND_VSR
},
424 { "f.54", 54, PPC_OPERAND_VSR
},
425 { "f.55", 55, PPC_OPERAND_VSR
},
426 { "f.56", 56, PPC_OPERAND_VSR
},
427 { "f.57", 57, PPC_OPERAND_VSR
},
428 { "f.58", 58, PPC_OPERAND_VSR
},
429 { "f.59", 59, PPC_OPERAND_VSR
},
430 { "f.6", 6, PPC_OPERAND_FPR
},
431 { "f.60", 60, PPC_OPERAND_VSR
},
432 { "f.61", 61, PPC_OPERAND_VSR
},
433 { "f.62", 62, PPC_OPERAND_VSR
},
434 { "f.63", 63, PPC_OPERAND_VSR
},
435 { "f.7", 7, PPC_OPERAND_FPR
},
436 { "f.8", 8, PPC_OPERAND_FPR
},
437 { "f.9", 9, PPC_OPERAND_FPR
},
439 { "f0", 0, PPC_OPERAND_FPR
},
440 { "f1", 1, PPC_OPERAND_FPR
},
441 { "f10", 10, PPC_OPERAND_FPR
},
442 { "f11", 11, PPC_OPERAND_FPR
},
443 { "f12", 12, PPC_OPERAND_FPR
},
444 { "f13", 13, PPC_OPERAND_FPR
},
445 { "f14", 14, PPC_OPERAND_FPR
},
446 { "f15", 15, PPC_OPERAND_FPR
},
447 { "f16", 16, PPC_OPERAND_FPR
},
448 { "f17", 17, PPC_OPERAND_FPR
},
449 { "f18", 18, PPC_OPERAND_FPR
},
450 { "f19", 19, PPC_OPERAND_FPR
},
451 { "f2", 2, PPC_OPERAND_FPR
},
452 { "f20", 20, PPC_OPERAND_FPR
},
453 { "f21", 21, PPC_OPERAND_FPR
},
454 { "f22", 22, PPC_OPERAND_FPR
},
455 { "f23", 23, PPC_OPERAND_FPR
},
456 { "f24", 24, PPC_OPERAND_FPR
},
457 { "f25", 25, PPC_OPERAND_FPR
},
458 { "f26", 26, PPC_OPERAND_FPR
},
459 { "f27", 27, PPC_OPERAND_FPR
},
460 { "f28", 28, PPC_OPERAND_FPR
},
461 { "f29", 29, PPC_OPERAND_FPR
},
462 { "f3", 3, PPC_OPERAND_FPR
},
463 { "f30", 30, PPC_OPERAND_FPR
},
464 { "f31", 31, PPC_OPERAND_FPR
},
465 { "f32", 32, PPC_OPERAND_VSR
},
466 { "f33", 33, PPC_OPERAND_VSR
},
467 { "f34", 34, PPC_OPERAND_VSR
},
468 { "f35", 35, PPC_OPERAND_VSR
},
469 { "f36", 36, PPC_OPERAND_VSR
},
470 { "f37", 37, PPC_OPERAND_VSR
},
471 { "f38", 38, PPC_OPERAND_VSR
},
472 { "f39", 39, PPC_OPERAND_VSR
},
473 { "f4", 4, PPC_OPERAND_FPR
},
474 { "f40", 40, PPC_OPERAND_VSR
},
475 { "f41", 41, PPC_OPERAND_VSR
},
476 { "f42", 42, PPC_OPERAND_VSR
},
477 { "f43", 43, PPC_OPERAND_VSR
},
478 { "f44", 44, PPC_OPERAND_VSR
},
479 { "f45", 45, PPC_OPERAND_VSR
},
480 { "f46", 46, PPC_OPERAND_VSR
},
481 { "f47", 47, PPC_OPERAND_VSR
},
482 { "f48", 48, PPC_OPERAND_VSR
},
483 { "f49", 49, PPC_OPERAND_VSR
},
484 { "f5", 5, PPC_OPERAND_FPR
},
485 { "f50", 50, PPC_OPERAND_VSR
},
486 { "f51", 51, PPC_OPERAND_VSR
},
487 { "f52", 52, PPC_OPERAND_VSR
},
488 { "f53", 53, PPC_OPERAND_VSR
},
489 { "f54", 54, PPC_OPERAND_VSR
},
490 { "f55", 55, PPC_OPERAND_VSR
},
491 { "f56", 56, PPC_OPERAND_VSR
},
492 { "f57", 57, PPC_OPERAND_VSR
},
493 { "f58", 58, PPC_OPERAND_VSR
},
494 { "f59", 59, PPC_OPERAND_VSR
},
495 { "f6", 6, PPC_OPERAND_FPR
},
496 { "f60", 60, PPC_OPERAND_VSR
},
497 { "f61", 61, PPC_OPERAND_VSR
},
498 { "f62", 62, PPC_OPERAND_VSR
},
499 { "f63", 63, PPC_OPERAND_VSR
},
500 { "f7", 7, PPC_OPERAND_FPR
},
501 { "f8", 8, PPC_OPERAND_FPR
},
502 { "f9", 9, PPC_OPERAND_FPR
},
504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0, PPC_OPERAND_GQR
},
506 { "gqr.1", 1, PPC_OPERAND_GQR
},
507 { "gqr.2", 2, PPC_OPERAND_GQR
},
508 { "gqr.3", 3, PPC_OPERAND_GQR
},
509 { "gqr.4", 4, PPC_OPERAND_GQR
},
510 { "gqr.5", 5, PPC_OPERAND_GQR
},
511 { "gqr.6", 6, PPC_OPERAND_GQR
},
512 { "gqr.7", 7, PPC_OPERAND_GQR
},
513 { "gqr0", 0, PPC_OPERAND_GQR
},
514 { "gqr1", 1, PPC_OPERAND_GQR
},
515 { "gqr2", 2, PPC_OPERAND_GQR
},
516 { "gqr3", 3, PPC_OPERAND_GQR
},
517 { "gqr4", 4, PPC_OPERAND_GQR
},
518 { "gqr5", 5, PPC_OPERAND_GQR
},
519 { "gqr6", 6, PPC_OPERAND_GQR
},
520 { "gqr7", 7, PPC_OPERAND_GQR
},
522 { "lr", 8, PPC_OPERAND_SPR
},
524 /* General Purpose Registers */
525 { "r.0", 0, PPC_OPERAND_GPR
},
526 { "r.1", 1, PPC_OPERAND_GPR
},
527 { "r.10", 10, PPC_OPERAND_GPR
},
528 { "r.11", 11, PPC_OPERAND_GPR
},
529 { "r.12", 12, PPC_OPERAND_GPR
},
530 { "r.13", 13, PPC_OPERAND_GPR
},
531 { "r.14", 14, PPC_OPERAND_GPR
},
532 { "r.15", 15, PPC_OPERAND_GPR
},
533 { "r.16", 16, PPC_OPERAND_GPR
},
534 { "r.17", 17, PPC_OPERAND_GPR
},
535 { "r.18", 18, PPC_OPERAND_GPR
},
536 { "r.19", 19, PPC_OPERAND_GPR
},
537 { "r.2", 2, PPC_OPERAND_GPR
},
538 { "r.20", 20, PPC_OPERAND_GPR
},
539 { "r.21", 21, PPC_OPERAND_GPR
},
540 { "r.22", 22, PPC_OPERAND_GPR
},
541 { "r.23", 23, PPC_OPERAND_GPR
},
542 { "r.24", 24, PPC_OPERAND_GPR
},
543 { "r.25", 25, PPC_OPERAND_GPR
},
544 { "r.26", 26, PPC_OPERAND_GPR
},
545 { "r.27", 27, PPC_OPERAND_GPR
},
546 { "r.28", 28, PPC_OPERAND_GPR
},
547 { "r.29", 29, PPC_OPERAND_GPR
},
548 { "r.3", 3, PPC_OPERAND_GPR
},
549 { "r.30", 30, PPC_OPERAND_GPR
},
550 { "r.31", 31, PPC_OPERAND_GPR
},
551 { "r.4", 4, PPC_OPERAND_GPR
},
552 { "r.5", 5, PPC_OPERAND_GPR
},
553 { "r.6", 6, PPC_OPERAND_GPR
},
554 { "r.7", 7, PPC_OPERAND_GPR
},
555 { "r.8", 8, PPC_OPERAND_GPR
},
556 { "r.9", 9, PPC_OPERAND_GPR
},
558 { "r.sp", 1, PPC_OPERAND_GPR
},
560 { "r.toc", 2, PPC_OPERAND_GPR
},
562 { "r0", 0, PPC_OPERAND_GPR
},
563 { "r1", 1, PPC_OPERAND_GPR
},
564 { "r10", 10, PPC_OPERAND_GPR
},
565 { "r11", 11, PPC_OPERAND_GPR
},
566 { "r12", 12, PPC_OPERAND_GPR
},
567 { "r13", 13, PPC_OPERAND_GPR
},
568 { "r14", 14, PPC_OPERAND_GPR
},
569 { "r15", 15, PPC_OPERAND_GPR
},
570 { "r16", 16, PPC_OPERAND_GPR
},
571 { "r17", 17, PPC_OPERAND_GPR
},
572 { "r18", 18, PPC_OPERAND_GPR
},
573 { "r19", 19, PPC_OPERAND_GPR
},
574 { "r2", 2, PPC_OPERAND_GPR
},
575 { "r20", 20, PPC_OPERAND_GPR
},
576 { "r21", 21, PPC_OPERAND_GPR
},
577 { "r22", 22, PPC_OPERAND_GPR
},
578 { "r23", 23, PPC_OPERAND_GPR
},
579 { "r24", 24, PPC_OPERAND_GPR
},
580 { "r25", 25, PPC_OPERAND_GPR
},
581 { "r26", 26, PPC_OPERAND_GPR
},
582 { "r27", 27, PPC_OPERAND_GPR
},
583 { "r28", 28, PPC_OPERAND_GPR
},
584 { "r29", 29, PPC_OPERAND_GPR
},
585 { "r3", 3, PPC_OPERAND_GPR
},
586 { "r30", 30, PPC_OPERAND_GPR
},
587 { "r31", 31, PPC_OPERAND_GPR
},
588 { "r4", 4, PPC_OPERAND_GPR
},
589 { "r5", 5, PPC_OPERAND_GPR
},
590 { "r6", 6, PPC_OPERAND_GPR
},
591 { "r7", 7, PPC_OPERAND_GPR
},
592 { "r8", 8, PPC_OPERAND_GPR
},
593 { "r9", 9, PPC_OPERAND_GPR
},
595 { "rtoc", 2, PPC_OPERAND_GPR
},
597 { "sdr1", 25, PPC_OPERAND_SPR
},
599 { "sp", 1, PPC_OPERAND_GPR
},
601 { "srr0", 26, PPC_OPERAND_SPR
},
602 { "srr1", 27, PPC_OPERAND_SPR
},
604 /* Vector (Altivec/VMX) registers */
605 { "v.0", 0, PPC_OPERAND_VR
},
606 { "v.1", 1, PPC_OPERAND_VR
},
607 { "v.10", 10, PPC_OPERAND_VR
},
608 { "v.11", 11, PPC_OPERAND_VR
},
609 { "v.12", 12, PPC_OPERAND_VR
},
610 { "v.13", 13, PPC_OPERAND_VR
},
611 { "v.14", 14, PPC_OPERAND_VR
},
612 { "v.15", 15, PPC_OPERAND_VR
},
613 { "v.16", 16, PPC_OPERAND_VR
},
614 { "v.17", 17, PPC_OPERAND_VR
},
615 { "v.18", 18, PPC_OPERAND_VR
},
616 { "v.19", 19, PPC_OPERAND_VR
},
617 { "v.2", 2, PPC_OPERAND_VR
},
618 { "v.20", 20, PPC_OPERAND_VR
},
619 { "v.21", 21, PPC_OPERAND_VR
},
620 { "v.22", 22, PPC_OPERAND_VR
},
621 { "v.23", 23, PPC_OPERAND_VR
},
622 { "v.24", 24, PPC_OPERAND_VR
},
623 { "v.25", 25, PPC_OPERAND_VR
},
624 { "v.26", 26, PPC_OPERAND_VR
},
625 { "v.27", 27, PPC_OPERAND_VR
},
626 { "v.28", 28, PPC_OPERAND_VR
},
627 { "v.29", 29, PPC_OPERAND_VR
},
628 { "v.3", 3, PPC_OPERAND_VR
},
629 { "v.30", 30, PPC_OPERAND_VR
},
630 { "v.31", 31, PPC_OPERAND_VR
},
631 { "v.4", 4, PPC_OPERAND_VR
},
632 { "v.5", 5, PPC_OPERAND_VR
},
633 { "v.6", 6, PPC_OPERAND_VR
},
634 { "v.7", 7, PPC_OPERAND_VR
},
635 { "v.8", 8, PPC_OPERAND_VR
},
636 { "v.9", 9, PPC_OPERAND_VR
},
638 { "v0", 0, PPC_OPERAND_VR
},
639 { "v1", 1, PPC_OPERAND_VR
},
640 { "v10", 10, PPC_OPERAND_VR
},
641 { "v11", 11, PPC_OPERAND_VR
},
642 { "v12", 12, PPC_OPERAND_VR
},
643 { "v13", 13, PPC_OPERAND_VR
},
644 { "v14", 14, PPC_OPERAND_VR
},
645 { "v15", 15, PPC_OPERAND_VR
},
646 { "v16", 16, PPC_OPERAND_VR
},
647 { "v17", 17, PPC_OPERAND_VR
},
648 { "v18", 18, PPC_OPERAND_VR
},
649 { "v19", 19, PPC_OPERAND_VR
},
650 { "v2", 2, PPC_OPERAND_VR
},
651 { "v20", 20, PPC_OPERAND_VR
},
652 { "v21", 21, PPC_OPERAND_VR
},
653 { "v22", 22, PPC_OPERAND_VR
},
654 { "v23", 23, PPC_OPERAND_VR
},
655 { "v24", 24, PPC_OPERAND_VR
},
656 { "v25", 25, PPC_OPERAND_VR
},
657 { "v26", 26, PPC_OPERAND_VR
},
658 { "v27", 27, PPC_OPERAND_VR
},
659 { "v28", 28, PPC_OPERAND_VR
},
660 { "v29", 29, PPC_OPERAND_VR
},
661 { "v3", 3, PPC_OPERAND_VR
},
662 { "v30", 30, PPC_OPERAND_VR
},
663 { "v31", 31, PPC_OPERAND_VR
},
664 { "v4", 4, PPC_OPERAND_VR
},
665 { "v5", 5, PPC_OPERAND_VR
},
666 { "v6", 6, PPC_OPERAND_VR
},
667 { "v7", 7, PPC_OPERAND_VR
},
668 { "v8", 8, PPC_OPERAND_VR
},
669 { "v9", 9, PPC_OPERAND_VR
},
671 /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.0", 0, PPC_OPERAND_VSR
},
673 { "vs.1", 1, PPC_OPERAND_VSR
},
674 { "vs.10", 10, PPC_OPERAND_VSR
},
675 { "vs.11", 11, PPC_OPERAND_VSR
},
676 { "vs.12", 12, PPC_OPERAND_VSR
},
677 { "vs.13", 13, PPC_OPERAND_VSR
},
678 { "vs.14", 14, PPC_OPERAND_VSR
},
679 { "vs.15", 15, PPC_OPERAND_VSR
},
680 { "vs.16", 16, PPC_OPERAND_VSR
},
681 { "vs.17", 17, PPC_OPERAND_VSR
},
682 { "vs.18", 18, PPC_OPERAND_VSR
},
683 { "vs.19", 19, PPC_OPERAND_VSR
},
684 { "vs.2", 2, PPC_OPERAND_VSR
},
685 { "vs.20", 20, PPC_OPERAND_VSR
},
686 { "vs.21", 21, PPC_OPERAND_VSR
},
687 { "vs.22", 22, PPC_OPERAND_VSR
},
688 { "vs.23", 23, PPC_OPERAND_VSR
},
689 { "vs.24", 24, PPC_OPERAND_VSR
},
690 { "vs.25", 25, PPC_OPERAND_VSR
},
691 { "vs.26", 26, PPC_OPERAND_VSR
},
692 { "vs.27", 27, PPC_OPERAND_VSR
},
693 { "vs.28", 28, PPC_OPERAND_VSR
},
694 { "vs.29", 29, PPC_OPERAND_VSR
},
695 { "vs.3", 3, PPC_OPERAND_VSR
},
696 { "vs.30", 30, PPC_OPERAND_VSR
},
697 { "vs.31", 31, PPC_OPERAND_VSR
},
698 { "vs.32", 32, PPC_OPERAND_VSR
},
699 { "vs.33", 33, PPC_OPERAND_VSR
},
700 { "vs.34", 34, PPC_OPERAND_VSR
},
701 { "vs.35", 35, PPC_OPERAND_VSR
},
702 { "vs.36", 36, PPC_OPERAND_VSR
},
703 { "vs.37", 37, PPC_OPERAND_VSR
},
704 { "vs.38", 38, PPC_OPERAND_VSR
},
705 { "vs.39", 39, PPC_OPERAND_VSR
},
706 { "vs.4", 4, PPC_OPERAND_VSR
},
707 { "vs.40", 40, PPC_OPERAND_VSR
},
708 { "vs.41", 41, PPC_OPERAND_VSR
},
709 { "vs.42", 42, PPC_OPERAND_VSR
},
710 { "vs.43", 43, PPC_OPERAND_VSR
},
711 { "vs.44", 44, PPC_OPERAND_VSR
},
712 { "vs.45", 45, PPC_OPERAND_VSR
},
713 { "vs.46", 46, PPC_OPERAND_VSR
},
714 { "vs.47", 47, PPC_OPERAND_VSR
},
715 { "vs.48", 48, PPC_OPERAND_VSR
},
716 { "vs.49", 49, PPC_OPERAND_VSR
},
717 { "vs.5", 5, PPC_OPERAND_VSR
},
718 { "vs.50", 50, PPC_OPERAND_VSR
},
719 { "vs.51", 51, PPC_OPERAND_VSR
},
720 { "vs.52", 52, PPC_OPERAND_VSR
},
721 { "vs.53", 53, PPC_OPERAND_VSR
},
722 { "vs.54", 54, PPC_OPERAND_VSR
},
723 { "vs.55", 55, PPC_OPERAND_VSR
},
724 { "vs.56", 56, PPC_OPERAND_VSR
},
725 { "vs.57", 57, PPC_OPERAND_VSR
},
726 { "vs.58", 58, PPC_OPERAND_VSR
},
727 { "vs.59", 59, PPC_OPERAND_VSR
},
728 { "vs.6", 6, PPC_OPERAND_VSR
},
729 { "vs.60", 60, PPC_OPERAND_VSR
},
730 { "vs.61", 61, PPC_OPERAND_VSR
},
731 { "vs.62", 62, PPC_OPERAND_VSR
},
732 { "vs.63", 63, PPC_OPERAND_VSR
},
733 { "vs.7", 7, PPC_OPERAND_VSR
},
734 { "vs.8", 8, PPC_OPERAND_VSR
},
735 { "vs.9", 9, PPC_OPERAND_VSR
},
737 { "vs0", 0, PPC_OPERAND_VSR
},
738 { "vs1", 1, PPC_OPERAND_VSR
},
739 { "vs10", 10, PPC_OPERAND_VSR
},
740 { "vs11", 11, PPC_OPERAND_VSR
},
741 { "vs12", 12, PPC_OPERAND_VSR
},
742 { "vs13", 13, PPC_OPERAND_VSR
},
743 { "vs14", 14, PPC_OPERAND_VSR
},
744 { "vs15", 15, PPC_OPERAND_VSR
},
745 { "vs16", 16, PPC_OPERAND_VSR
},
746 { "vs17", 17, PPC_OPERAND_VSR
},
747 { "vs18", 18, PPC_OPERAND_VSR
},
748 { "vs19", 19, PPC_OPERAND_VSR
},
749 { "vs2", 2, PPC_OPERAND_VSR
},
750 { "vs20", 20, PPC_OPERAND_VSR
},
751 { "vs21", 21, PPC_OPERAND_VSR
},
752 { "vs22", 22, PPC_OPERAND_VSR
},
753 { "vs23", 23, PPC_OPERAND_VSR
},
754 { "vs24", 24, PPC_OPERAND_VSR
},
755 { "vs25", 25, PPC_OPERAND_VSR
},
756 { "vs26", 26, PPC_OPERAND_VSR
},
757 { "vs27", 27, PPC_OPERAND_VSR
},
758 { "vs28", 28, PPC_OPERAND_VSR
},
759 { "vs29", 29, PPC_OPERAND_VSR
},
760 { "vs3", 3, PPC_OPERAND_VSR
},
761 { "vs30", 30, PPC_OPERAND_VSR
},
762 { "vs31", 31, PPC_OPERAND_VSR
},
763 { "vs32", 32, PPC_OPERAND_VSR
},
764 { "vs33", 33, PPC_OPERAND_VSR
},
765 { "vs34", 34, PPC_OPERAND_VSR
},
766 { "vs35", 35, PPC_OPERAND_VSR
},
767 { "vs36", 36, PPC_OPERAND_VSR
},
768 { "vs37", 37, PPC_OPERAND_VSR
},
769 { "vs38", 38, PPC_OPERAND_VSR
},
770 { "vs39", 39, PPC_OPERAND_VSR
},
771 { "vs4", 4, PPC_OPERAND_VSR
},
772 { "vs40", 40, PPC_OPERAND_VSR
},
773 { "vs41", 41, PPC_OPERAND_VSR
},
774 { "vs42", 42, PPC_OPERAND_VSR
},
775 { "vs43", 43, PPC_OPERAND_VSR
},
776 { "vs44", 44, PPC_OPERAND_VSR
},
777 { "vs45", 45, PPC_OPERAND_VSR
},
778 { "vs46", 46, PPC_OPERAND_VSR
},
779 { "vs47", 47, PPC_OPERAND_VSR
},
780 { "vs48", 48, PPC_OPERAND_VSR
},
781 { "vs49", 49, PPC_OPERAND_VSR
},
782 { "vs5", 5, PPC_OPERAND_VSR
},
783 { "vs50", 50, PPC_OPERAND_VSR
},
784 { "vs51", 51, PPC_OPERAND_VSR
},
785 { "vs52", 52, PPC_OPERAND_VSR
},
786 { "vs53", 53, PPC_OPERAND_VSR
},
787 { "vs54", 54, PPC_OPERAND_VSR
},
788 { "vs55", 55, PPC_OPERAND_VSR
},
789 { "vs56", 56, PPC_OPERAND_VSR
},
790 { "vs57", 57, PPC_OPERAND_VSR
},
791 { "vs58", 58, PPC_OPERAND_VSR
},
792 { "vs59", 59, PPC_OPERAND_VSR
},
793 { "vs6", 6, PPC_OPERAND_VSR
},
794 { "vs60", 60, PPC_OPERAND_VSR
},
795 { "vs61", 61, PPC_OPERAND_VSR
},
796 { "vs62", 62, PPC_OPERAND_VSR
},
797 { "vs63", 63, PPC_OPERAND_VSR
},
798 { "vs7", 7, PPC_OPERAND_VSR
},
799 { "vs8", 8, PPC_OPERAND_VSR
},
800 { "vs9", 9, PPC_OPERAND_VSR
},
802 { "xer", 1, PPC_OPERAND_SPR
}
805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
807 /* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
810 static const struct pd_reg
*
811 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
813 int middle
, low
, high
;
821 middle
= (low
+ high
) / 2;
822 cmp
= strcasecmp (name
, regs
[middle
].name
);
828 return ®s
[middle
];
836 * Summary of register_name.
838 * in: Input_line_pointer points to 1st char of operand.
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 register_name (expressionS
*expressionP
)
850 const struct pd_reg
*reg
;
855 /* Find the spelling of the operand. */
856 start
= name
= input_line_pointer
;
857 if (name
[0] == '%' && ISALPHA (name
[1]))
858 name
= ++input_line_pointer
;
860 else if (!reg_names_p
|| !ISALPHA (name
[0]))
863 c
= get_symbol_name (&name
);
864 reg
= reg_name_search (pre_defined_registers
, REG_NAME_CNT
, name
);
866 /* Put back the delimiting char. */
867 *input_line_pointer
= c
;
869 /* Look to see if it's in the register table. */
872 expressionP
->X_op
= O_register
;
873 expressionP
->X_add_number
= reg
->value
;
874 expressionP
->X_md
= reg
->flags
;
876 /* Make the rest nice. */
877 expressionP
->X_add_symbol
= NULL
;
878 expressionP
->X_op_symbol
= NULL
;
882 /* Reset the line as if we had not done anything. */
883 input_line_pointer
= start
;
887 /* This function is called for each symbol seen in an expression. It
888 handles the special parsing which PowerPC assemblers are supposed
889 to use for condition codes. */
891 /* Whether to do the special parsing. */
892 static bfd_boolean cr_operand
;
894 /* Names to recognize in a condition code. This table is sorted. */
895 static const struct pd_reg cr_names
[] =
897 { "cr0", 0, PPC_OPERAND_CR_REG
},
898 { "cr1", 1, PPC_OPERAND_CR_REG
},
899 { "cr2", 2, PPC_OPERAND_CR_REG
},
900 { "cr3", 3, PPC_OPERAND_CR_REG
},
901 { "cr4", 4, PPC_OPERAND_CR_REG
},
902 { "cr5", 5, PPC_OPERAND_CR_REG
},
903 { "cr6", 6, PPC_OPERAND_CR_REG
},
904 { "cr7", 7, PPC_OPERAND_CR_REG
},
905 { "eq", 2, PPC_OPERAND_CR_BIT
},
906 { "gt", 1, PPC_OPERAND_CR_BIT
},
907 { "lt", 0, PPC_OPERAND_CR_BIT
},
908 { "so", 3, PPC_OPERAND_CR_BIT
},
909 { "un", 3, PPC_OPERAND_CR_BIT
}
912 /* Parsing function. This returns non-zero if it recognized an
916 ppc_parse_name (const char *name
, expressionS
*exp
)
918 const struct pd_reg
*reg
;
925 reg
= reg_name_search (cr_names
, sizeof cr_names
/ sizeof cr_names
[0],
930 exp
->X_op
= O_register
;
931 exp
->X_add_number
= reg
->value
;
932 exp
->X_md
= reg
->flags
;
937 /* Propagate X_md and check register expressions. This is to support
938 condition codes like 4*cr5+eq. */
941 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
943 /* Accept 4*cr<n> and cr<n>*4. */
945 && ((right
->X_op
== O_register
946 && right
->X_md
== PPC_OPERAND_CR_REG
947 && left
->X_op
== O_constant
948 && left
->X_add_number
== 4)
949 || (left
->X_op
== O_register
950 && left
->X_md
== PPC_OPERAND_CR_REG
951 && right
->X_op
== O_constant
952 && right
->X_add_number
== 4)))
954 left
->X_op
= O_register
;
955 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
956 left
->X_add_number
*= right
->X_add_number
;
960 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
961 if (right
->X_op
== O_register
962 && left
->X_op
== O_register
964 && ((right
->X_md
== PPC_OPERAND_CR_BIT
965 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
966 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
967 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
969 left
->X_md
= PPC_OPERAND_CR_BIT
;
970 right
->X_op
= O_constant
;
974 /* Accept reg +/- constant. */
975 if (left
->X_op
== O_register
976 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
977 as_warn (_("invalid register expression"));
979 /* Accept constant + reg. */
980 if (right
->X_op
== O_register
)
982 if (op
== O_add
&& left
->X_op
== O_constant
)
983 left
->X_md
= right
->X_md
;
985 as_warn (_("invalid register expression"));
991 /* Local variables. */
993 /* Whether to target xcoff64/elf64. */
994 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
996 /* Opcode hash table. */
997 static struct hash_control
*ppc_hash
;
999 /* Macro hash table. */
1000 static struct hash_control
*ppc_macro_hash
;
1003 /* What type of shared library support to use. */
1004 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
1006 /* Flags to set in the elf header. */
1007 static flagword ppc_flags
= 0;
1009 /* Whether this is Solaris or not. */
1010 #ifdef TARGET_SOLARIS_COMMENT
1011 #define SOLARIS_P TRUE
1013 #define SOLARIS_P FALSE
1016 static bfd_boolean msolaris
= SOLARIS_P
;
1021 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1022 using a bunch of different sections. These assembler sections,
1023 however, are all encompassed within the .text or .data sections of
1024 the final output file. We handle this by using different
1025 subsegments within these main segments. */
1027 /* Next subsegment to allocate within the .text segment. */
1028 static subsegT ppc_text_subsegment
= 2;
1030 /* Linked list of csects in the text section. */
1031 static symbolS
*ppc_text_csects
;
1033 /* Next subsegment to allocate within the .data segment. */
1034 static subsegT ppc_data_subsegment
= 2;
1036 /* Linked list of csects in the data section. */
1037 static symbolS
*ppc_data_csects
;
1039 /* The current csect. */
1040 static symbolS
*ppc_current_csect
;
1042 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1043 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1044 A special relocation is used when accessing TOC entries. We handle
1045 the TOC as a subsegment within the .data segment. We set it up if
1046 we see a .toc pseudo-op, and save the csect symbol here. */
1047 static symbolS
*ppc_toc_csect
;
1049 /* The first frag in the TOC subsegment. */
1050 static fragS
*ppc_toc_frag
;
1052 /* The first frag in the first subsegment after the TOC in the .data
1053 segment. NULL if there are no subsegments after the TOC. */
1054 static fragS
*ppc_after_toc_frag
;
1056 /* The current static block. */
1057 static symbolS
*ppc_current_block
;
1059 /* The COFF debugging section; set by md_begin. This is not the
1060 .debug section, but is instead the secret BFD section which will
1061 cause BFD to set the section number of a symbol to N_DEBUG. */
1062 static asection
*ppc_coff_debug_section
;
1064 /* Structure to set the length field of the dwarf sections. */
1065 struct dw_subsection
{
1066 /* Subsections are simply linked. */
1067 struct dw_subsection
*link
;
1069 /* The subsection number. */
1072 /* Expression to compute the length of the section. */
1073 expressionS end_exp
;
1076 static struct dw_section
{
1077 /* Corresponding section. */
1080 /* Simply linked list of subsections with a label. */
1081 struct dw_subsection
*list_subseg
;
1083 /* The anonymous subsection. */
1084 struct dw_subsection
*anon_subseg
;
1085 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1086 #endif /* OBJ_XCOFF */
1090 /* Various sections that we need for PE coff support. */
1091 static segT ydata_section
;
1092 static segT pdata_section
;
1093 static segT reldata_section
;
1094 static segT rdata_section
;
1095 static segT tocdata_section
;
1097 /* The current section and the previous section. See ppc_previous. */
1098 static segT ppc_previous_section
;
1099 static segT ppc_current_section
;
1104 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1105 unsigned long *ppc_apuinfo_list
;
1106 unsigned int ppc_apuinfo_num
;
1107 unsigned int ppc_apuinfo_num_alloc
;
1108 #endif /* OBJ_ELF */
1111 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1113 const char *const md_shortopts
= "um:";
1115 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1116 const struct option md_longopts
[] = {
1117 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1118 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1119 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1120 {NULL
, no_argument
, NULL
, 0}
1122 const size_t md_longopts_size
= sizeof (md_longopts
);
1125 md_parse_option (int c
, const char *arg
)
1132 /* -u means that any undefined symbols should be treated as
1133 external, which is the default for gas anyhow. */
1138 /* Solaris as takes -le (presumably for little endian). For completeness
1139 sake, recognize -be also. */
1140 if (strcmp (arg
, "e") == 0)
1142 target_big_endian
= 0;
1143 set_target_endian
= 1;
1144 if (ppc_cpu
& PPC_OPCODE_VLE
)
1145 as_bad (_("the use of -mvle requires big endian."));
1153 if (strcmp (arg
, "e") == 0)
1155 target_big_endian
= 1;
1156 set_target_endian
= 1;
1164 /* Recognize -K PIC. */
1165 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1168 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1176 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1178 if (strcmp (arg
, "64") == 0)
1182 if (ppc_cpu
& PPC_OPCODE_VLE
)
1183 as_bad (_("the use of -mvle requires -a32."));
1185 as_fatal (_("%s unsupported"), "-a64");
1188 else if (strcmp (arg
, "32") == 0)
1195 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1196 /* "raw" is only valid for the disassembler. */
1197 if (new_cpu
!= 0 && (new_cpu
& PPC_OPCODE_RAW
) == 0)
1200 if (strcmp (arg
, "vle") == 0)
1202 if (set_target_endian
&& target_big_endian
== 0)
1203 as_bad (_("the use of -mvle requires big endian."));
1205 as_bad (_("the use of -mvle requires -a32."));
1209 else if (strcmp (arg
, "no-vle") == 0)
1211 sticky
&= ~PPC_OPCODE_VLE
;
1213 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, "booke");
1214 new_cpu
&= ~PPC_OPCODE_VLE
;
1219 else if (strcmp (arg
, "regnames") == 0)
1222 else if (strcmp (arg
, "no-regnames") == 0)
1223 reg_names_p
= FALSE
;
1226 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1227 that require relocation. */
1228 else if (strcmp (arg
, "relocatable") == 0)
1230 shlib
= SHLIB_MRELOCATABLE
;
1231 ppc_flags
|= EF_PPC_RELOCATABLE
;
1234 else if (strcmp (arg
, "relocatable-lib") == 0)
1236 shlib
= SHLIB_MRELOCATABLE
;
1237 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1240 /* -memb, set embedded bit. */
1241 else if (strcmp (arg
, "emb") == 0)
1242 ppc_flags
|= EF_PPC_EMB
;
1244 /* -mlittle/-mbig set the endianness. */
1245 else if (strcmp (arg
, "little") == 0
1246 || strcmp (arg
, "little-endian") == 0)
1248 target_big_endian
= 0;
1249 set_target_endian
= 1;
1250 if (ppc_cpu
& PPC_OPCODE_VLE
)
1251 as_bad (_("the use of -mvle requires big endian."));
1254 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1256 target_big_endian
= 1;
1257 set_target_endian
= 1;
1260 else if (strcmp (arg
, "solaris") == 0)
1263 ppc_comment_chars
= ppc_solaris_comment_chars
;
1266 else if (strcmp (arg
, "no-solaris") == 0)
1269 ppc_comment_chars
= ppc_eabi_comment_chars
;
1271 else if (strcmp (arg
, "spe2") == 0)
1273 ppc_cpu
|= PPC_OPCODE_SPE2
;
1278 as_bad (_("invalid switch -m%s"), arg
);
1284 /* -V: SVR4 argument to print version ID. */
1286 print_version_id ();
1289 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1290 should be emitted or not. FIXME: Not implemented. */
1294 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1295 rather than .stabs.excl, which is ignored by the linker.
1296 FIXME: Not implemented. */
1307 nop_limit
= strtoul (optarg
, &end
, 0);
1309 as_bad (_("--nops needs a numeric argument"));
1324 md_show_usage (FILE *stream
)
1326 fprintf (stream
, _("\
1328 -a32 generate ELF32/XCOFF32\n\
1329 -a64 generate ELF64/XCOFF64\n\
1331 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1332 -mpwr generate code for POWER (RIOS1)\n\
1333 -m601 generate code for PowerPC 601\n\
1334 -mppc, -mppc32, -m603, -m604\n\
1335 generate code for PowerPC 603/604\n\
1336 -m403 generate code for PowerPC 403\n\
1337 -m405 generate code for PowerPC 405\n\
1338 -m440 generate code for PowerPC 440\n\
1339 -m464 generate code for PowerPC 464\n\
1340 -m476 generate code for PowerPC 476\n\
1341 -m7400, -m7410, -m7450, -m7455\n\
1342 generate code for PowerPC 7400/7410/7450/7455\n\
1343 -m750cl, -mgekko, -mbroadway\n\
1344 generate code for PowerPC 750cl/Gekko/Broadway\n\
1345 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1346 fprintf (stream
, _("\
1347 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1348 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1349 -mbooke generate code for 32-bit PowerPC BookE\n\
1350 -ma2 generate code for A2 architecture\n\
1351 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1352 -mpower5, -mpwr5, -mpwr5x\n\
1353 generate code for Power5 architecture\n\
1354 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1355 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1356 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1357 -mpower9, -mpwr9 generate code for Power9 architecture\n\
1358 -mcell generate code for Cell Broadband Engine architecture\n\
1359 -mcom generate code for Power/PowerPC common instructions\n\
1360 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1361 fprintf (stream
, _("\
1362 -maltivec generate code for AltiVec\n\
1363 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1364 -me300 generate code for PowerPC e300 family\n\
1365 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1366 -me500mc, generate code for Freescale e500mc core complex\n\
1367 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1368 -me5500, generate code for Freescale e5500 core complex\n\
1369 -me6500, generate code for Freescale e6500 core complex\n\
1370 -mspe generate code for Motorola SPE instructions\n\
1371 -mspe2 generate code for Freescale SPE2 instructions\n\
1372 -mvle generate code for Freescale VLE instructions\n\
1373 -mtitan generate code for AppliedMicro Titan core complex\n\
1374 -mregnames Allow symbolic names for registers\n\
1375 -mno-regnames Do not allow symbolic names for registers\n"));
1377 fprintf (stream
, _("\
1378 -mrelocatable support for GCC's -mrelocatble option\n\
1379 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1380 -memb set PPC_EMB bit in ELF flags\n\
1381 -mlittle, -mlittle-endian, -le\n\
1382 generate code for a little endian machine\n\
1383 -mbig, -mbig-endian, -be\n\
1384 generate code for a big endian machine\n\
1385 -msolaris generate code for Solaris\n\
1386 -mno-solaris do not generate code for Solaris\n\
1387 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1388 -V print assembler version number\n\
1389 -Qy, -Qn ignored\n"));
1391 fprintf (stream
, _("\
1392 -nops=count when aligning, more than COUNT nops uses a branch\n\
1393 -ppc476-workaround warn if emitting data to code sections\n"));
1396 /* Set ppc_cpu if it is not already set. */
1401 const char *default_os
= TARGET_OS
;
1402 const char *default_cpu
= TARGET_CPU
;
1404 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1407 if (target_big_endian
)
1408 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1410 /* The minimum supported cpu for 64-bit little-endian is power8. */
1411 ppc_cpu
|= ppc_parse_cpu (ppc_cpu
, &sticky
, "power8");
1412 else if (strncmp (default_os
, "aix", 3) == 0
1413 && default_os
[3] >= '4' && default_os
[3] <= '9')
1414 ppc_cpu
|= PPC_OPCODE_COMMON
;
1415 else if (strncmp (default_os
, "aix3", 4) == 0)
1416 ppc_cpu
|= PPC_OPCODE_POWER
;
1417 else if (strcmp (default_cpu
, "rs6000") == 0)
1418 ppc_cpu
|= PPC_OPCODE_POWER
;
1419 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1420 ppc_cpu
|= PPC_OPCODE_PPC
;
1422 as_fatal (_("unknown default cpu = %s, os = %s"),
1423 default_cpu
, default_os
);
1427 /* Figure out the BFD architecture to use. This function and ppc_mach
1428 are called well before md_begin, when the output file is opened. */
1430 enum bfd_architecture
1433 const char *default_cpu
= TARGET_CPU
;
1436 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1437 return bfd_arch_powerpc
;
1438 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1439 return bfd_arch_powerpc
;
1440 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1441 return bfd_arch_rs6000
;
1442 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1444 if (strcmp (default_cpu
, "rs6000") == 0)
1445 return bfd_arch_rs6000
;
1446 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1447 return bfd_arch_powerpc
;
1450 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1451 return bfd_arch_unknown
;
1458 return bfd_mach_ppc64
;
1459 else if (ppc_arch () == bfd_arch_rs6000
)
1460 return bfd_mach_rs6k
;
1461 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1462 return bfd_mach_ppc_titan
;
1463 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1464 return bfd_mach_ppc_vle
;
1466 return bfd_mach_ppc
;
1470 ppc_target_format (void)
1474 return target_big_endian
? "pe-powerpc" : "pe-powerpcle";
1476 return "xcoff-powermac";
1479 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1481 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1487 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1488 # elif defined (TE_VXWORKS)
1489 return "elf32-powerpc-vxworks";
1491 return (target_big_endian
1492 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1493 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1498 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1499 Return TRUE if there's a problem, otherwise FALSE. */
1502 insn_validate (const struct powerpc_opcode
*op
)
1504 const unsigned char *o
;
1505 uint64_t omask
= op
->mask
;
1507 /* The mask had better not trim off opcode bits. */
1508 if ((op
->opcode
& omask
) != op
->opcode
)
1510 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1514 /* The operands must not overlap the opcode or each other. */
1515 for (o
= op
->operands
; *o
; ++o
)
1517 bfd_boolean optional
= FALSE
;
1518 if (*o
>= num_powerpc_operands
)
1520 as_bad (_("operand index error for %s"), op
->name
);
1526 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1527 if (operand
->shift
== (int) PPC_OPSHIFT_INV
)
1534 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1536 else if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1538 mask
= (*operand
->insert
) (0, val
, ppc_cpu
, &errmsg
);
1540 else if (operand
->shift
>= 0)
1541 mask
= operand
->bitm
<< operand
->shift
;
1543 mask
= operand
->bitm
>> -operand
->shift
;
1546 as_bad (_("operand %d overlap in %s"),
1547 (int) (o
- op
->operands
), op
->name
);
1551 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
1555 as_bad (_("non-optional operand %d follows optional operand in %s"),
1556 (int) (o
- op
->operands
), op
->name
);
1564 /* Insert opcodes and macros into hash tables. Called at startup and
1565 for .machine pseudo. */
1568 ppc_setup_opcodes (void)
1570 const struct powerpc_opcode
*op
;
1571 const struct powerpc_opcode
*op_end
;
1572 const struct powerpc_macro
*macro
;
1573 const struct powerpc_macro
*macro_end
;
1574 bfd_boolean bad_insn
= FALSE
;
1576 if (ppc_hash
!= NULL
)
1577 hash_die (ppc_hash
);
1578 if (ppc_macro_hash
!= NULL
)
1579 hash_die (ppc_macro_hash
);
1581 /* Insert the opcodes into a hash table. */
1582 ppc_hash
= hash_new ();
1584 if (ENABLE_CHECKING
)
1588 /* An index into powerpc_operands is stored in struct fix
1589 fx_pcrel_adjust which is 8 bits wide. */
1590 gas_assert (num_powerpc_operands
< 256);
1592 /* Check operand masks. Code here and in the disassembler assumes
1593 all the 1's in the mask are contiguous. */
1594 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1596 uint64_t mask
= powerpc_operands
[i
].bitm
;
1600 right_bit
= mask
& -mask
;
1602 right_bit
= mask
& -mask
;
1603 if (mask
!= right_bit
)
1605 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1608 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1609 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1610 sizeof (powerpc_operands
[0])) == 0)
1612 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1619 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1620 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1622 if (ENABLE_CHECKING
)
1624 unsigned int new_opcode
= PPC_OP (op
[0].opcode
);
1626 #ifdef PRINT_OPCODE_TABLE
1627 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1628 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1629 new_opcode
, (unsigned long long) op
->opcode
,
1630 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1633 /* The major opcodes had better be sorted. Code in the disassembler
1634 assumes the insns are sorted according to major opcode. */
1635 if (op
!= powerpc_opcodes
1636 && new_opcode
< PPC_OP (op
[-1].opcode
))
1638 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1642 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1644 as_bad (_("%s is enabled by vle flag"), op
->name
);
1647 if (PPC_OP (op
->opcode
) != 4
1648 && PPC_OP (op
->opcode
) != 31
1649 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1651 as_bad (_("%s not disabled by vle flag"), op
->name
);
1654 bad_insn
|= insn_validate (op
);
1657 if ((ppc_cpu
& op
->flags
) != 0
1658 && !(ppc_cpu
& op
->deprecated
))
1662 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1665 as_bad (_("duplicate instruction %s"),
1672 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1673 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1674 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1676 op_end
= vle_opcodes
+ vle_num_opcodes
;
1677 for (op
= vle_opcodes
; op
< op_end
; op
++)
1679 if (ENABLE_CHECKING
)
1681 unsigned new_seg
= VLE_OP_TO_SEG (VLE_OP (op
[0].opcode
, op
[0].mask
));
1683 #ifdef PRINT_OPCODE_TABLE
1684 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1685 op
->name
, (unsigned int) (op
- vle_opcodes
),
1686 (unsigned int) new_seg
, (unsigned long long) op
->opcode
,
1687 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1690 /* The major opcodes had better be sorted. Code in the disassembler
1691 assumes the insns are sorted according to major opcode. */
1692 if (op
!= vle_opcodes
1693 && new_seg
< VLE_OP_TO_SEG (VLE_OP (op
[-1].opcode
, op
[-1].mask
)))
1695 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1699 bad_insn
|= insn_validate (op
);
1702 if ((ppc_cpu
& op
->flags
) != 0
1703 && !(ppc_cpu
& op
->deprecated
))
1707 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1710 as_bad (_("duplicate instruction %s"),
1717 /* SPE2 instructions */
1718 if ((ppc_cpu
& PPC_OPCODE_SPE2
) == PPC_OPCODE_SPE2
)
1720 op_end
= spe2_opcodes
+ spe2_num_opcodes
;
1721 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1723 if (ENABLE_CHECKING
)
1725 if (op
!= spe2_opcodes
)
1727 unsigned old_seg
, new_seg
;
1729 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1730 old_seg
= VLE_OP_TO_SEG (old_seg
);
1731 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1732 new_seg
= VLE_OP_TO_SEG (new_seg
);
1734 /* The major opcodes had better be sorted. Code in the
1735 disassembler assumes the insns are sorted according to
1737 if (new_seg
< old_seg
)
1739 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1744 bad_insn
|= insn_validate (op
);
1747 if ((ppc_cpu
& op
->flags
) != 0 && !(ppc_cpu
& op
->deprecated
))
1751 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1754 as_bad (_("duplicate instruction %s"),
1761 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1762 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1765 /* Insert the macros into a hash table. */
1766 ppc_macro_hash
= hash_new ();
1768 macro_end
= powerpc_macros
+ powerpc_num_macros
;
1769 for (macro
= powerpc_macros
; macro
< macro_end
; macro
++)
1771 if ((macro
->flags
& ppc_cpu
) != 0 || (ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1775 retval
= hash_insert (ppc_macro_hash
, macro
->name
, (void *) macro
);
1776 if (retval
!= (const char *) NULL
)
1778 as_bad (_("duplicate macro %s"), macro
->name
);
1788 /* This function is called when the assembler starts up. It is called
1789 after the options have been parsed and the output file has been
1797 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1798 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1801 /* Set the ELF flags if desired. */
1802 if (ppc_flags
&& !msolaris
)
1803 bfd_set_private_flags (stdoutput
, ppc_flags
);
1806 ppc_setup_opcodes ();
1808 /* Tell the main code what the endianness is if it is not overridden
1810 if (!set_target_endian
)
1812 set_target_endian
= 1;
1813 target_big_endian
= PPC_BIG_ENDIAN
;
1817 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1819 /* Create dummy symbols to serve as initial csects. This forces the
1820 text csects to precede the data csects. These symbols will not
1822 ppc_text_csects
= symbol_make ("dummy\001");
1823 symbol_get_tc (ppc_text_csects
)->within
= ppc_text_csects
;
1824 ppc_data_csects
= symbol_make ("dummy\001");
1825 symbol_get_tc (ppc_data_csects
)->within
= ppc_data_csects
;
1830 ppc_current_section
= text_section
;
1831 ppc_previous_section
= 0;
1840 if (ppc_apuinfo_list
== NULL
)
1843 /* Ok, so write the section info out. We have this layout:
1847 0 8 length of "APUinfo\0"
1848 4 (n*4) number of APU's (4 bytes each)
1851 20 APU#1 first APU's info
1852 24 APU#2 second APU's info
1857 asection
*seg
= now_seg
;
1858 subsegT subseg
= now_subseg
;
1859 asection
*apuinfo_secp
= (asection
*) NULL
;
1862 /* Create the .PPC.EMB.apuinfo section. */
1863 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1864 bfd_set_section_flags (stdoutput
,
1866 SEC_HAS_CONTENTS
| SEC_READONLY
);
1869 md_number_to_chars (p
, (valueT
) 8, 4);
1872 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1875 md_number_to_chars (p
, (valueT
) 2, 4);
1878 strcpy (p
, APUINFO_LABEL
);
1880 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1883 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
1886 frag_align (2, 0, 0);
1888 /* We probably can't restore the current segment, for there likely
1891 subseg_set (seg
, subseg
);
1896 /* Insert an operand value into an instruction. */
1899 ppc_insert_operand (uint64_t insn
,
1900 const struct powerpc_operand
*operand
,
1906 int64_t min
, max
, right
;
1908 max
= operand
->bitm
;
1912 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
1914 /* Extend the allowed range for addis to [-32768, 65535].
1915 Similarly for cmpli and some VLE high part insns. For 64-bit
1916 it would be good to disable this for signed fields since the
1917 value is sign extended into the high 32 bits of the register.
1918 If the value is, say, an address, then we might care about
1919 the high bits. However, gcc as of 2014-06 uses unsigned
1920 values when loading the high part of 64-bit constants using
1922 min
= ~(max
>> 1) & -right
;
1924 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
1926 max
= (max
>> 1) & -right
;
1927 min
= ~max
& -right
;
1930 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1933 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1942 /* Some people write constants with the sign extension done by
1943 hand but only up to 32 bits. This shouldn't really be valid,
1944 but, to permit this code to assemble on a 64-bit host, we
1945 sign extend the 32-bit value to 64 bits if so doing makes the
1948 && (val
- (1LL << 32)) >= min
1949 && (val
- (1LL << 32)) <= max
1950 && ((val
- (1LL << 32)) & (right
- 1)) == 0)
1951 val
= val
- (1LL << 32);
1953 /* Similarly, people write expressions like ~(1<<15), and expect
1954 this to be OK for a 32-bit unsigned value. */
1956 && (val
+ (1LL << 32)) >= min
1957 && (val
+ (1LL << 32)) <= max
1958 && ((val
+ (1LL << 32)) & (right
- 1)) == 0)
1959 val
= val
+ (1LL << 32);
1963 || (val
& (right
- 1)) != 0)
1964 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
1967 if (operand
->insert
)
1972 insn
= (*operand
->insert
) (insn
, val
, cpu
, &errmsg
);
1973 if (errmsg
!= (const char *) NULL
)
1974 as_bad_where (file
, line
, "%s", errmsg
);
1976 else if (operand
->shift
>= 0)
1977 insn
|= (val
& operand
->bitm
) << operand
->shift
;
1979 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
1986 /* Parse @got, etc. and return the desired relocation. */
1987 static bfd_reloc_code_real_type
1988 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
1992 unsigned int length
: 8;
1993 unsigned int valid32
: 1;
1994 unsigned int valid64
: 1;
2003 const struct map_bfd
*ptr
;
2005 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2006 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2007 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2009 static const struct map_bfd mapping
[] = {
2010 MAP ("l", BFD_RELOC_LO16
),
2011 MAP ("h", BFD_RELOC_HI16
),
2012 MAP ("ha", BFD_RELOC_HI16_S
),
2013 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
2014 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
2015 MAP ("got", BFD_RELOC_16_GOTOFF
),
2016 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
2017 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
2018 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
2019 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
2020 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
2021 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
2022 MAP ("copy", BFD_RELOC_PPC_COPY
),
2023 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
2024 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
2025 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
2026 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
2027 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
2028 MAP ("tls", BFD_RELOC_PPC_TLS
),
2029 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
2030 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
2031 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
2032 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
2033 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
2034 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
2035 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
2036 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
2037 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
2038 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
2039 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
2040 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
2041 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
2042 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
2043 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
2044 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
2045 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
2046 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
2047 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
2048 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
2049 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
2050 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
2051 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
2052 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
2053 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
2054 MAP32 ("fixup", BFD_RELOC_CTOR
),
2055 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
2056 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
2057 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
2058 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
2059 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
2060 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
2061 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
2062 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
2063 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
2064 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
2065 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
2066 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
2067 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
2068 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
2069 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
2070 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
2071 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
2072 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
2073 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2074 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2075 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2076 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2077 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2078 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2079 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2080 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2081 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2082 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2083 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2084 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2085 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2086 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2087 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2088 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2089 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2090 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2091 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2092 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2093 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2094 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2095 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2096 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2097 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2098 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2099 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2100 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2101 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2102 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2103 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2104 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2105 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2106 MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC
),
2107 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2111 return BFD_RELOC_NONE
;
2113 for (ch
= *str
, str2
= ident
;
2114 (str2
< ident
+ sizeof (ident
) - 1
2115 && (ISALNUM (ch
) || ch
== '@'));
2118 *str2
++ = TOLOWER (ch
);
2125 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2126 if (ch
== ptr
->string
[0]
2127 && len
== ptr
->length
2128 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2129 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2131 int reloc
= ptr
->reloc
;
2133 if (!ppc_obj64
&& exp_p
->X_add_number
!= 0)
2137 case BFD_RELOC_16_GOTOFF
:
2138 case BFD_RELOC_LO16_GOTOFF
:
2139 case BFD_RELOC_HI16_GOTOFF
:
2140 case BFD_RELOC_HI16_S_GOTOFF
:
2141 as_warn (_("identifier+constant@got means "
2142 "identifier@got+constant"));
2145 case BFD_RELOC_PPC_GOT_TLSGD16
:
2146 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2147 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2148 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2149 case BFD_RELOC_PPC_GOT_TLSLD16
:
2150 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2151 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2152 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2153 case BFD_RELOC_PPC_GOT_DTPREL16
:
2154 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2155 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2156 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2157 case BFD_RELOC_PPC_GOT_TPREL16
:
2158 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2159 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2160 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2161 as_bad (_("symbol+offset not supported for got tls"));
2166 /* Now check for identifier@suffix+constant. */
2167 if (*str
== '-' || *str
== '+')
2169 char *orig_line
= input_line_pointer
;
2170 expressionS new_exp
;
2172 input_line_pointer
= str
;
2173 expression (&new_exp
);
2174 if (new_exp
.X_op
== O_constant
)
2176 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2177 str
= input_line_pointer
;
2180 if (&input_line_pointer
!= str_p
)
2181 input_line_pointer
= orig_line
;
2185 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2186 && exp_p
->X_op
== O_symbol
2187 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2189 /* Change the symbol so that the dummy .TOC. symbol can be
2190 omitted from the object file. */
2191 exp_p
->X_add_symbol
= &abs_symbol
;
2194 return (bfd_reloc_code_real_type
) reloc
;
2197 return BFD_RELOC_NONE
;
2200 /* Support @got, etc. on constants emitted via .short, .int etc. */
2202 bfd_reloc_code_real_type
2203 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2206 if (nbytes
>= 2 && *input_line_pointer
== '@')
2207 return ppc_elf_suffix (&input_line_pointer
, exp
);
2208 return BFD_RELOC_NONE
;
2211 /* Warn when emitting data to code sections, unless we are emitting
2212 a relocation that ld --ppc476-workaround uses to recognise data
2213 *and* there was an unconditional branch prior to the data. */
2216 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2217 unsigned int nbytes
, fixS
*fix
)
2220 && (now_seg
->flags
& SEC_CODE
) != 0
2223 || !(fix
->fx_r_type
== BFD_RELOC_32
2224 || fix
->fx_r_type
== BFD_RELOC_CTOR
2225 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2226 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2227 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2228 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2229 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2230 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2231 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2232 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2234 /* Flag that we've warned. */
2238 as_warn (_("data in executable section"));
2242 /* Solaris pseduo op to change to the .rodata section. */
2244 ppc_elf_rdata (int xxx
)
2246 char *save_line
= input_line_pointer
;
2247 static char section
[] = ".rodata\n";
2249 /* Just pretend this is .section .rodata */
2250 input_line_pointer
= section
;
2251 obj_elf_section (xxx
);
2253 input_line_pointer
= save_line
;
2256 /* Pseudo op to make file scope bss items. */
2258 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2271 c
= get_symbol_name (&name
);
2273 /* Just after name is now '\0'. */
2274 p
= input_line_pointer
;
2276 SKIP_WHITESPACE_AFTER_NAME ();
2277 if (*input_line_pointer
!= ',')
2279 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2280 ignore_rest_of_line ();
2284 input_line_pointer
++; /* skip ',' */
2285 if ((size
= get_absolute_expression ()) < 0)
2287 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2288 ignore_rest_of_line ();
2292 /* The third argument to .lcomm is the alignment. */
2293 if (*input_line_pointer
!= ',')
2297 ++input_line_pointer
;
2298 align
= get_absolute_expression ();
2301 as_warn (_("ignoring bad alignment"));
2307 symbolP
= symbol_find_or_make (name
);
2310 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2312 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2313 S_GET_NAME (symbolP
));
2314 ignore_rest_of_line ();
2318 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2320 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2321 S_GET_NAME (symbolP
),
2322 (long) S_GET_VALUE (symbolP
),
2325 ignore_rest_of_line ();
2331 old_subsec
= now_subseg
;
2334 /* Convert to a power of 2 alignment. */
2335 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2338 as_bad (_("common alignment not a power of 2"));
2339 ignore_rest_of_line ();
2346 record_alignment (bss_section
, align2
);
2347 subseg_set (bss_section
, 1);
2349 frag_align (align2
, 0, 0);
2350 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2351 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2352 symbol_set_frag (symbolP
, frag_now
);
2353 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2356 S_SET_SIZE (symbolP
, size
);
2357 S_SET_SEGMENT (symbolP
, bss_section
);
2358 subseg_set (old_sec
, old_subsec
);
2359 demand_empty_rest_of_line ();
2362 /* Pseudo op to set symbol local entry point. */
2364 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2367 char c
= get_symbol_name (&name
);
2372 elf_symbol_type
*elfsym
;
2374 p
= input_line_pointer
;
2376 SKIP_WHITESPACE_AFTER_NAME ();
2377 if (*input_line_pointer
!= ',')
2380 as_bad (_("expected comma after name `%s' in .localentry directive"),
2383 ignore_rest_of_line ();
2386 input_line_pointer
++;
2388 if (exp
.X_op
== O_absent
)
2390 as_bad (_("missing expression in .localentry directive"));
2391 exp
.X_op
= O_constant
;
2392 exp
.X_add_number
= 0;
2395 sym
= symbol_find_or_make (name
);
2398 if (resolve_expression (&exp
)
2399 && exp
.X_op
== O_constant
)
2401 unsigned int encoded
, ok
;
2404 if (exp
.X_add_number
== 1 || exp
.X_add_number
== 7)
2405 encoded
= exp
.X_add_number
<< STO_PPC64_LOCAL_BIT
;
2408 encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2409 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2411 as_bad (_(".localentry expression for `%s' "
2412 "is not a valid power of 2"), S_GET_NAME (sym
));
2418 bfdsym
= symbol_get_bfdsym (sym
);
2419 elfsym
= elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
2420 gas_assert (elfsym
);
2421 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2422 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2423 if (ppc_abiversion
== 0)
2428 as_bad (_(".localentry expression for `%s' "
2429 "does not evaluate to a constant"), S_GET_NAME (sym
));
2431 demand_empty_rest_of_line ();
2434 /* Pseudo op to set ABI version. */
2436 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2441 if (exp
.X_op
== O_absent
)
2443 as_bad (_("missing expression in .abiversion directive"));
2444 exp
.X_op
= O_constant
;
2445 exp
.X_add_number
= 0;
2448 if (resolve_expression (&exp
)
2449 && exp
.X_op
== O_constant
)
2450 ppc_abiversion
= exp
.X_add_number
;
2452 as_bad (_(".abiversion expression does not evaluate to a constant"));
2453 demand_empty_rest_of_line ();
2456 /* Parse a .gnu_attribute directive. */
2458 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2460 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2462 /* Check validity of defined powerpc tags. */
2463 if (tag
== Tag_GNU_Power_ABI_FP
2464 || tag
== Tag_GNU_Power_ABI_Vector
2465 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2469 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2471 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2472 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2473 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2474 as_warn (_("unknown .gnu_attribute value"));
2478 /* Set ABI version in output file. */
2482 if (ppc_obj64
&& ppc_abiversion
!= 0)
2484 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2485 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2489 /* Validate any relocations emitted for -mrelocatable, possibly adding
2490 fixups for word relocations in writable segments, so we can adjust
2493 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2495 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2504 case SHLIB_MRELOCATABLE
:
2505 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2506 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2507 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2508 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2509 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2510 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2511 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2512 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2513 && (seg
->flags
& SEC_LOAD
) != 0
2514 && strcmp (segment_name (seg
), ".got2") != 0
2515 && strcmp (segment_name (seg
), ".dtors") != 0
2516 && strcmp (segment_name (seg
), ".ctors") != 0
2517 && strcmp (segment_name (seg
), ".fixup") != 0
2518 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2519 && strcmp (segment_name (seg
), ".eh_frame") != 0
2520 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2522 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2523 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2525 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2526 _("relocation cannot be done when using -mrelocatable"));
2533 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2534 function descriptor sym if the corresponding code sym is used. */
2537 ppc_frob_file_before_adjust (void)
2545 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2551 name
= S_GET_NAME (symp
);
2555 if (! S_IS_WEAK (symp
)
2556 || S_IS_DEFINED (symp
))
2559 dotname
= concat (".", name
, (char *) NULL
);
2560 dotsym
= symbol_find_noref (dotname
, 1);
2562 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2563 || symbol_used_in_reloc_p (dotsym
)))
2564 symbol_mark_used (symp
);
2568 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2570 && toc_reloc_types
!= has_large_toc_reloc
2571 && bfd_section_size (stdoutput
, toc
) > 0x10000)
2572 as_warn (_("TOC section size exceeds 64k"));
2575 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2576 emitted. Other uses of .TOC. will cause the symbol to be marked
2577 with BSF_KEEP in md_apply_fix. */
2580 ppc_elf_adjust_symtab (void)
2585 symp
= symbol_find (".TOC.");
2588 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2589 if ((bsym
->flags
& BSF_KEEP
) == 0)
2590 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2594 #endif /* OBJ_ELF */
2599 * Summary of parse_toc_entry.
2601 * in: Input_line_pointer points to the '[' in one of:
2603 * [toc] [tocv] [toc32] [toc64]
2605 * Anything else is an error of one kind or another.
2608 * return value: success or failure
2609 * toc_kind: kind of toc reference
2610 * input_line_pointer:
2611 * success: first char after the ']'
2612 * failure: unchanged
2616 * [toc] - rv == success, toc_kind = default_toc
2617 * [tocv] - rv == success, toc_kind = data_in_toc
2618 * [toc32] - rv == success, toc_kind = must_be_32
2619 * [toc64] - rv == success, toc_kind = must_be_64
2623 enum toc_size_qualifier
2625 default_toc
, /* The toc cell constructed should be the system default size */
2626 data_in_toc
, /* This is a direct reference to a toc cell */
2627 must_be_32
, /* The toc cell constructed must be 32 bits wide */
2628 must_be_64
/* The toc cell constructed must be 64 bits wide */
2632 parse_toc_entry (enum toc_size_qualifier
*toc_kind
)
2637 enum toc_size_qualifier t
;
2639 /* Save the input_line_pointer. */
2640 start
= input_line_pointer
;
2642 /* Skip over the '[' , and whitespace. */
2643 ++input_line_pointer
;
2646 /* Find the spelling of the operand. */
2647 c
= get_symbol_name (&toc_spec
);
2649 if (strcmp (toc_spec
, "toc") == 0)
2653 else if (strcmp (toc_spec
, "tocv") == 0)
2657 else if (strcmp (toc_spec
, "toc32") == 0)
2661 else if (strcmp (toc_spec
, "toc64") == 0)
2667 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec
);
2668 *input_line_pointer
= c
;
2669 input_line_pointer
= start
;
2673 /* Now find the ']'. */
2674 *input_line_pointer
= c
;
2676 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2677 c
= *input_line_pointer
++; /* input_line_pointer->past char in c. */
2681 as_bad (_("syntax error: expected `]', found `%c'"), c
);
2682 input_line_pointer
= start
;
2691 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2692 /* See whether a symbol is in the TOC section. */
2695 ppc_is_toc_sym (symbolS
*sym
)
2698 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2699 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2702 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2704 return strcmp (sname
, ".toc") == 0;
2706 return strcmp (sname
, ".got") == 0;
2709 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2713 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2715 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2719 /* Check we don't already exist. */
2720 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2721 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2724 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2726 if (ppc_apuinfo_num_alloc
== 0)
2728 ppc_apuinfo_num_alloc
= 4;
2729 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2733 ppc_apuinfo_num_alloc
+= 4;
2734 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2735 ppc_apuinfo_num_alloc
);
2738 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2744 /* We need to keep a list of fixups. We can't simply generate them as
2745 we go, because that would require us to first create the frag, and
2746 that would screw up references to ``.''. */
2752 bfd_reloc_code_real_type reloc
;
2755 #define MAX_INSN_FIXUPS (5)
2757 /* This routine is called for each instruction to be assembled. */
2760 md_assemble (char *str
)
2763 const struct powerpc_opcode
*opcode
;
2765 const unsigned char *opindex_ptr
;
2768 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
2773 unsigned int insn_length
;
2775 /* Get the opcode. */
2776 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
); s
++)
2781 /* Look up the opcode in the hash table. */
2782 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, str
);
2783 if (opcode
== (const struct powerpc_opcode
*) NULL
)
2785 const struct powerpc_macro
*macro
;
2787 macro
= (const struct powerpc_macro
*) hash_find (ppc_macro_hash
, str
);
2788 if (macro
== (const struct powerpc_macro
*) NULL
)
2789 as_bad (_("unrecognized opcode: `%s'"), str
);
2791 ppc_macro (s
, macro
);
2796 insn
= opcode
->opcode
;
2799 while (ISSPACE (*str
))
2802 /* PowerPC operands are just expressions. The only real issue is
2803 that a few operand types are optional. If an instruction has
2804 multiple optional operands and one is omitted, then all optional
2805 operands past the first omitted one must also be omitted. */
2806 int num_optional_operands
= 0;
2807 int num_optional_provided
= 0;
2809 /* Gather the operands. */
2813 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
2815 const struct powerpc_operand
*operand
;
2821 if (next_opindex
== 0)
2822 operand
= &powerpc_operands
[*opindex_ptr
];
2825 operand
= &powerpc_operands
[next_opindex
];
2830 /* If this is an optional operand, and we are skipping it, just
2831 insert the default value, usually a zero. */
2832 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
2833 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
2835 if (num_optional_operands
== 0)
2837 const unsigned char *optr
;
2843 for (optr
= opindex_ptr
; *optr
!= 0; optr
++)
2845 const struct powerpc_operand
*op
;
2846 op
= &powerpc_operands
[*optr
];
2850 if ((op
->flags
& PPC_OPERAND_OPTIONAL
) != 0
2851 && !((op
->flags
& PPC_OPERAND_OPTIONAL32
) != 0
2853 ++num_optional_operands
;
2855 if (s
!= NULL
&& *s
!= '\0')
2859 /* Look for the start of the next operand. */
2860 if ((op
->flags
& PPC_OPERAND_PARENS
) != 0)
2861 s
= strpbrk (s
, "(,");
2863 s
= strchr (s
, ',');
2869 omitted
= total
- provided
;
2870 num_optional_provided
= num_optional_operands
- omitted
;
2872 if (--num_optional_provided
< 0)
2874 int64_t val
= ppc_optional_operand_value (operand
, insn
, ppc_cpu
,
2875 num_optional_provided
);
2876 if (operand
->insert
)
2878 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
2879 if (errmsg
!= (const char *) NULL
)
2880 as_bad ("%s", errmsg
);
2882 else if (operand
->shift
>= 0)
2883 insn
|= (val
& operand
->bitm
) << operand
->shift
;
2885 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
2887 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
2888 next_opindex
= *opindex_ptr
+ 1;
2893 /* Gather the operand. */
2894 hold
= input_line_pointer
;
2895 input_line_pointer
= str
;
2898 if (*input_line_pointer
== '[')
2900 /* We are expecting something like the second argument here:
2902 * lwz r4,[toc].GS.0.static_int(rtoc)
2903 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2904 * The argument following the `]' must be a symbol name, and the
2905 * register must be the toc register: 'rtoc' or '2'
2907 * The effect is to 0 as the displacement field
2908 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2909 * the appropriate variation) reloc against it based on the symbol.
2910 * The linker will build the toc, and insert the resolved toc offset.
2913 * o The size of the toc entry is currently assumed to be
2914 * 32 bits. This should not be assumed to be a hard coded
2916 * o In an effort to cope with a change from 32 to 64 bits,
2917 * there are also toc entries that are specified to be
2918 * either 32 or 64 bits:
2919 * lwz r4,[toc32].GS.0.static_int(rtoc)
2920 * lwz r4,[toc64].GS.0.static_int(rtoc)
2921 * These demand toc entries of the specified size, and the
2922 * instruction probably requires it.
2926 enum toc_size_qualifier toc_kind
;
2927 bfd_reloc_code_real_type toc_reloc
;
2929 /* Go parse off the [tocXX] part. */
2930 valid_toc
= parse_toc_entry (&toc_kind
);
2934 ignore_rest_of_line ();
2938 /* Now get the symbol following the ']'. */
2944 /* In this case, we may not have seen the symbol yet,
2945 since it is allowed to appear on a .extern or .globl
2946 or just be a label in the .data section. */
2947 toc_reloc
= BFD_RELOC_PPC_TOC16
;
2950 /* 1. The symbol must be defined and either in the toc
2951 section, or a global.
2952 2. The reloc generated must have the TOCDEFN flag set
2953 in upper bit mess of the reloc type.
2954 FIXME: It's a little confusing what the tocv
2955 qualifier can be used for. At the very least, I've
2956 seen three uses, only one of which I'm sure I can
2958 if (ex
.X_op
== O_symbol
)
2960 gas_assert (ex
.X_add_symbol
!= NULL
);
2961 if (symbol_get_bfdsym (ex
.X_add_symbol
)->section
2964 as_bad (_("[tocv] symbol is not a toc symbol"));
2968 toc_reloc
= BFD_RELOC_PPC_TOC16
;
2971 /* FIXME: these next two specifically specify 32/64 bit
2972 toc entries. We don't support them today. Is this
2973 the right way to say that? */
2974 toc_reloc
= BFD_RELOC_NONE
;
2975 as_bad (_("unimplemented toc32 expression modifier"));
2978 /* FIXME: see above. */
2979 toc_reloc
= BFD_RELOC_NONE
;
2980 as_bad (_("unimplemented toc64 expression modifier"));
2984 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2990 /* We need to generate a fixup for this expression. */
2991 if (fc
>= MAX_INSN_FIXUPS
)
2992 as_fatal (_("too many fixups"));
2994 fixups
[fc
].reloc
= toc_reloc
;
2995 fixups
[fc
].exp
= ex
;
2996 fixups
[fc
].opindex
= *opindex_ptr
;
2999 /* Ok. We've set up the fixup for the instruction. Now make it
3000 look like the constant 0 was found here. */
3002 ex
.X_op
= O_constant
;
3003 ex
.X_add_number
= 0;
3004 ex
.X_add_symbol
= NULL
;
3005 ex
.X_op_symbol
= NULL
;
3012 && (((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3013 || ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)))
3014 || !register_name (&ex
))
3016 char save_lex
= lex_type
['%'];
3018 if (((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)
3019 || (operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3022 lex_type
['%'] |= LEX_BEGIN_NAME
;
3026 lex_type
['%'] = save_lex
;
3030 str
= input_line_pointer
;
3031 input_line_pointer
= hold
;
3033 if (ex
.X_op
== O_illegal
)
3034 as_bad (_("illegal operand"));
3035 else if (ex
.X_op
== O_absent
)
3036 as_bad (_("missing operand"));
3037 else if (ex
.X_op
== O_register
)
3041 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
3042 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
3043 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
)) != 0
3044 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
3045 && ex
.X_add_number
!= 0
3046 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
3047 as_warn (_("invalid register expression"));
3048 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3049 ppc_cpu
, (char *) NULL
, 0);
3051 else if (ex
.X_op
== O_constant
)
3054 /* Allow @HA, @L, @H on constants. */
3055 bfd_reloc_code_real_type reloc
;
3056 char *orig_str
= str
;
3058 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3065 case BFD_RELOC_LO16
:
3066 ex
.X_add_number
&= 0xffff;
3067 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3068 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3071 case BFD_RELOC_HI16
:
3072 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3074 /* PowerPC64 @h is tested for overflow. */
3075 ex
.X_add_number
= (addressT
) ex
.X_add_number
>> 16;
3076 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3078 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3080 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3086 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3087 ex
.X_add_number
= PPC_HI (ex
.X_add_number
);
3088 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3089 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3092 case BFD_RELOC_HI16_S
:
3093 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3095 /* PowerPC64 @ha is tested for overflow. */
3097 = ((addressT
) ex
.X_add_number
+ 0x8000) >> 16;
3098 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3100 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3102 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3108 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3109 ex
.X_add_number
= PPC_HA (ex
.X_add_number
);
3110 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3111 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3114 case BFD_RELOC_PPC64_HIGHER
:
3115 ex
.X_add_number
= PPC_HIGHER (ex
.X_add_number
);
3116 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3117 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3120 case BFD_RELOC_PPC64_HIGHER_S
:
3121 ex
.X_add_number
= PPC_HIGHERA (ex
.X_add_number
);
3122 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3123 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3126 case BFD_RELOC_PPC64_HIGHEST
:
3127 ex
.X_add_number
= PPC_HIGHEST (ex
.X_add_number
);
3128 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3129 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3132 case BFD_RELOC_PPC64_HIGHEST_S
:
3133 ex
.X_add_number
= PPC_HIGHESTA (ex
.X_add_number
);
3134 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3135 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3138 #endif /* OBJ_ELF */
3139 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3140 ppc_cpu
, (char *) NULL
, 0);
3144 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3146 if (ex
.X_op
== O_symbol
&& str
[0] == '(')
3148 const char *sym_name
= S_GET_NAME (ex
.X_add_symbol
);
3149 if (sym_name
[0] == '.')
3152 if (strcasecmp (sym_name
, "__tls_get_addr") == 0)
3154 expressionS tls_exp
;
3156 hold
= input_line_pointer
;
3157 input_line_pointer
= str
+ 1;
3158 expression (&tls_exp
);
3159 if (tls_exp
.X_op
== O_symbol
)
3161 reloc
= BFD_RELOC_NONE
;
3162 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3164 reloc
= BFD_RELOC_PPC_TLSGD
;
3165 input_line_pointer
+= 7;
3167 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3169 reloc
= BFD_RELOC_PPC_TLSLD
;
3170 input_line_pointer
+= 7;
3172 if (reloc
!= BFD_RELOC_NONE
)
3175 str
= input_line_pointer
;
3177 if (fc
>= MAX_INSN_FIXUPS
)
3178 as_fatal (_("too many fixups"));
3179 fixups
[fc
].exp
= tls_exp
;
3180 fixups
[fc
].opindex
= *opindex_ptr
;
3181 fixups
[fc
].reloc
= reloc
;
3185 input_line_pointer
= hold
;
3189 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3191 /* Some TLS tweaks. */
3197 case BFD_RELOC_PPC_TLS
:
3198 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3199 as_bad (_("@tls may not be used with \"%s\" operands"),
3201 else if (operand
->shift
!= 11)
3202 as_bad (_("@tls may only be used in last operand"));
3204 insn
= ppc_insert_operand (insn
, operand
,
3206 ppc_cpu
, (char *) NULL
, 0);
3209 /* We'll only use the 32 (or 64) bit form of these relocations
3210 in constants. Instructions get the 16 bit form. */
3211 case BFD_RELOC_PPC_DTPREL
:
3212 reloc
= BFD_RELOC_PPC_DTPREL16
;
3214 case BFD_RELOC_PPC_TPREL
:
3215 reloc
= BFD_RELOC_PPC_TPREL16
;
3220 if (opcode
->opcode
== (19 << 26) + (2 << 1)
3221 && reloc
== BFD_RELOC_HI16_S
)
3222 reloc
= BFD_RELOC_PPC_16DX_HA
;
3224 /* If VLE-mode convert LO/HI/HA relocations. */
3225 if (opcode
->flags
& PPC_OPCODE_VLE
)
3227 uint64_t tmp_insn
= insn
& opcode
->mask
;
3229 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3230 || tmp_insn
== E_AND2I_DOT_INSN
3231 || tmp_insn
== E_OR2IS_INSN
3232 || tmp_insn
== E_LIS_INSN
3233 || tmp_insn
== E_AND2IS_DOT_INSN
);
3236 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3237 || tmp_insn
== E_ADD2IS_INSN
3238 || tmp_insn
== E_CMP16I_INSN
3239 || tmp_insn
== E_MULL2I_INSN
3240 || tmp_insn
== E_CMPL16I_INSN
3241 || tmp_insn
== E_CMPH16I_INSN
3242 || tmp_insn
== E_CMPHL16I_INSN
);
3249 case BFD_RELOC_PPC_EMB_SDA21
:
3250 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3253 case BFD_RELOC_LO16
:
3255 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3256 else if (use_a_reloc
)
3257 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3260 case BFD_RELOC_HI16
:
3262 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3263 else if (use_a_reloc
)
3264 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3267 case BFD_RELOC_HI16_S
:
3269 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3270 else if (use_a_reloc
)
3271 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3274 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3276 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3279 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3281 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3284 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3286 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3291 #endif /* OBJ_ELF */
3293 if (reloc
!= BFD_RELOC_NONE
)
3295 /* Determine a BFD reloc value based on the operand information.
3296 We are only prepared to turn a few of the operands into
3298 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3299 | PPC_OPERAND_ABSOLUTE
)) != 0
3300 && operand
->bitm
== 0x3fffffc
3301 && operand
->shift
== 0)
3302 reloc
= BFD_RELOC_PPC_B26
;
3303 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3304 | PPC_OPERAND_ABSOLUTE
)) != 0
3305 && operand
->bitm
== 0xfffc
3306 && operand
->shift
== 0)
3307 reloc
= BFD_RELOC_PPC_B16
;
3308 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3309 && operand
->bitm
== 0x1fe
3310 && operand
->shift
== -1)
3311 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3312 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3313 && operand
->bitm
== 0xfffe
3314 && operand
->shift
== 0)
3315 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3316 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3317 && operand
->bitm
== 0x1fffffe
3318 && operand
->shift
== 0)
3319 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3320 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3321 && (operand
->bitm
& 0xfff0) == 0xfff0
3322 && operand
->shift
== 0)
3324 reloc
= BFD_RELOC_16
;
3325 #if defined OBJ_XCOFF || defined OBJ_ELF
3326 /* Note: the symbol may be not yet defined. */
3327 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3328 && ppc_is_toc_sym (ex
.X_add_symbol
))
3330 reloc
= BFD_RELOC_PPC_TOC16
;
3332 as_warn (_("assuming %s on symbol"),
3333 ppc_obj64
? "@toc" : "@xgot");
3339 /* For the absolute forms of branches, convert the PC
3340 relative form back into the absolute. */
3341 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3345 case BFD_RELOC_PPC_B26
:
3346 reloc
= BFD_RELOC_PPC_BA26
;
3348 case BFD_RELOC_PPC_B16
:
3349 reloc
= BFD_RELOC_PPC_BA16
;
3352 case BFD_RELOC_PPC_B16_BRTAKEN
:
3353 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3355 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3356 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3367 case BFD_RELOC_PPC_TOC16
:
3368 toc_reloc_types
|= has_small_toc_reloc
;
3370 case BFD_RELOC_PPC64_TOC16_LO
:
3371 case BFD_RELOC_PPC64_TOC16_HI
:
3372 case BFD_RELOC_PPC64_TOC16_HA
:
3373 toc_reloc_types
|= has_large_toc_reloc
;
3380 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3385 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3387 case BFD_RELOC_LO16
:
3388 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3390 case BFD_RELOC_16_GOTOFF
:
3391 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3393 case BFD_RELOC_LO16_GOTOFF
:
3394 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3396 case BFD_RELOC_LO16_PLTOFF
:
3397 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3399 case BFD_RELOC_16_BASEREL
:
3400 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3402 case BFD_RELOC_LO16_BASEREL
:
3403 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3405 case BFD_RELOC_PPC_TOC16
:
3406 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3408 case BFD_RELOC_PPC64_TOC16_LO
:
3409 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3411 case BFD_RELOC_PPC64_PLTGOT16
:
3412 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3414 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3415 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3417 case BFD_RELOC_PPC_DTPREL16
:
3418 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3420 case BFD_RELOC_PPC_DTPREL16_LO
:
3421 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3423 case BFD_RELOC_PPC_TPREL16
:
3424 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3426 case BFD_RELOC_PPC_TPREL16_LO
:
3427 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3429 case BFD_RELOC_PPC_GOT_DTPREL16
:
3430 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3431 case BFD_RELOC_PPC_GOT_TPREL16
:
3432 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3435 as_bad (_("unsupported relocation for DS offset field"));
3441 /* We need to generate a fixup for this expression. */
3442 if (fc
>= MAX_INSN_FIXUPS
)
3443 as_fatal (_("too many fixups"));
3444 fixups
[fc
].exp
= ex
;
3445 fixups
[fc
].opindex
= *opindex_ptr
;
3446 fixups
[fc
].reloc
= reloc
;
3454 /* If expecting more operands, then we want to see "),". */
3455 if (*str
== endc
&& opindex_ptr
[1] != 0)
3459 while (ISSPACE (*str
));
3463 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
3468 /* The call to expression should have advanced str past any
3476 else if (*str
!= '\0')
3478 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
3481 else if (endc
== ')')
3483 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
3488 while (ISSPACE (*str
))
3492 as_bad (_("junk at end of line: `%s'"), str
);
3495 /* Do we need/want an APUinfo section? */
3496 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
3499 /* These are all version "1". */
3500 if (opcode
->flags
& PPC_OPCODE_SPE
)
3501 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
3502 if (opcode
->flags
& PPC_OPCODE_ISEL
)
3503 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
3504 if (opcode
->flags
& PPC_OPCODE_EFS
)
3505 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
3506 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
3507 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
3508 if (opcode
->flags
& PPC_OPCODE_PMR
)
3509 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
3510 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
3511 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
3512 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
3513 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
3514 /* Only set the VLE flag if the instruction has been pulled via
3515 the VLE instruction set. This way the flag is guaranteed to
3516 be set for VLE-only instructions or for VLE-only processors,
3517 however it'll remain clear for dual-mode instructions on
3518 dual-mode and, more importantly, standard-mode processors. */
3519 if ((ppc_cpu
& opcode
->flags
) == PPC_OPCODE_VLE
)
3521 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
3522 if (elf_section_data (now_seg
) != NULL
)
3523 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
3528 /* Write out the instruction. */
3531 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
3532 /* All instructions can start on a 2 byte boundary for VLE. */
3535 if (frag_now
->insn_addr
!= addr_mask
)
3537 /* Don't emit instructions to a frag started for data, or for a
3538 CPU differing in VLE mode. Data is allowed to be misaligned,
3539 and it's possible to start a new frag in the middle of
3541 frag_wane (frag_now
);
3545 /* Check that insns within the frag are aligned. ppc_frag_check
3546 will ensure that the frag start address is aligned. */
3547 if ((frag_now_fix () & addr_mask
) != 0)
3548 as_bad (_("instruction address is not a multiple of %d"), addr_mask
+ 1);
3550 /* Differentiate between two and four byte insns. */
3552 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && PPC_OP_SE_VLE (insn
))
3555 f
= frag_more (insn_length
);
3556 frag_now
->insn_addr
= addr_mask
;
3557 md_number_to_chars (f
, insn
, insn_length
);
3560 last_subseg
= now_subseg
;
3563 dwarf2_emit_insn (insn_length
);
3566 /* Create any fixups. */
3567 for (i
= 0; i
< fc
; i
++)
3570 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
3572 reloc_howto_type
*reloc_howto
;
3576 reloc_howto
= bfd_reloc_type_lookup (stdoutput
, fixups
[i
].reloc
);
3580 size
= bfd_get_reloc_size (reloc_howto
);
3581 offset
= target_big_endian
? (insn_length
- size
) : 0;
3583 fixP
= fix_new_exp (frag_now
,
3584 f
- frag_now
->fr_literal
+ offset
,
3587 reloc_howto
->pc_relative
,
3592 const struct powerpc_operand
*operand
;
3594 operand
= &powerpc_operands
[fixups
[i
].opindex
];
3595 fixP
= fix_new_exp (frag_now
,
3596 f
- frag_now
->fr_literal
,
3599 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
3602 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
3606 /* Handle a macro. Gather all the operands, transform them as
3607 described by the macro, and call md_assemble recursively. All the
3608 operands are separated by commas; we don't accept parentheses
3609 around operands here. */
3612 ppc_macro (char *str
, const struct powerpc_macro
*macro
)
3623 /* Gather the users operands into the operands array. */
3628 if (count
>= sizeof operands
/ sizeof operands
[0])
3630 operands
[count
++] = s
;
3631 s
= strchr (s
, ',');
3632 if (s
== (char *) NULL
)
3637 if (count
!= macro
->operands
)
3639 as_bad (_("wrong number of operands"));
3643 /* Work out how large the string must be (the size is unbounded
3644 because it includes user input). */
3646 format
= macro
->format
;
3647 while (*format
!= '\0')
3656 arg
= strtol (format
+ 1, &send
, 10);
3657 know (send
!= format
&& arg
< count
);
3658 len
+= strlen (operands
[arg
]);
3663 /* Put the string together. */
3664 complete
= s
= XNEWVEC (char, len
+ 1);
3665 format
= macro
->format
;
3666 while (*format
!= '\0')
3672 arg
= strtol (format
+ 1, &send
, 10);
3673 strcpy (s
, operands
[arg
]);
3680 /* Assemble the constructed instruction. */
3681 md_assemble (complete
);
3686 /* For ELF, add support for SHT_ORDERED. */
3689 ppc_section_type (char *str
, size_t len
)
3691 if (len
== 7 && strncmp (str
, "ordered", 7) == 0)
3698 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
3700 if (type
== SHT_ORDERED
)
3701 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
3707 ppc_elf_section_letter (int letter
, const char **ptrmsg
)
3712 *ptrmsg
= _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
3715 #endif /* OBJ_ELF */
3718 /* Pseudo-op handling. */
3720 /* The .byte pseudo-op. This is similar to the normal .byte
3721 pseudo-op, but it can also take a single ASCII string. */
3724 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
3728 if (*input_line_pointer
!= '\"')
3734 /* Gather characters. A real double quote is doubled. Unusual
3735 characters are not permitted. */
3736 ++input_line_pointer
;
3741 c
= *input_line_pointer
++;
3745 if (*input_line_pointer
!= '\"')
3747 ++input_line_pointer
;
3750 FRAG_APPEND_1_CHAR (c
);
3754 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
3755 as_warn (_("data in executable section"));
3756 demand_empty_rest_of_line ();
3761 /* XCOFF specific pseudo-op handling. */
3763 /* This is set if we are creating a .stabx symbol, since we don't want
3764 to handle symbol suffixes for such symbols. */
3765 static bfd_boolean ppc_stab_symbol
;
3767 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3768 symbols in the .bss segment as though they were local common
3769 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3770 aligns .comm and .lcomm to 4 bytes. */
3773 ppc_comm (int lcomm
)
3775 asection
*current_seg
= now_seg
;
3776 subsegT current_subseg
= now_subseg
;
3782 symbolS
*lcomm_sym
= NULL
;
3786 endc
= get_symbol_name (&name
);
3787 end_name
= input_line_pointer
;
3788 (void) restore_line_pointer (endc
);
3790 if (*input_line_pointer
!= ',')
3792 as_bad (_("missing size"));
3793 ignore_rest_of_line ();
3796 ++input_line_pointer
;
3798 size
= get_absolute_expression ();
3801 as_bad (_("negative size"));
3802 ignore_rest_of_line ();
3808 /* The third argument to .comm is the alignment. */
3809 if (*input_line_pointer
!= ',')
3813 ++input_line_pointer
;
3814 align
= get_absolute_expression ();
3817 as_warn (_("ignoring bad alignment"));
3827 /* The third argument to .lcomm appears to be the real local
3828 common symbol to create. References to the symbol named in
3829 the first argument are turned into references to the third
3831 if (*input_line_pointer
!= ',')
3833 as_bad (_("missing real symbol name"));
3834 ignore_rest_of_line ();
3837 ++input_line_pointer
;
3839 lcomm_endc
= get_symbol_name (&lcomm_name
);
3841 lcomm_sym
= symbol_find_or_make (lcomm_name
);
3843 (void) restore_line_pointer (lcomm_endc
);
3845 /* The fourth argument to .lcomm is the alignment. */
3846 if (*input_line_pointer
!= ',')
3855 ++input_line_pointer
;
3856 align
= get_absolute_expression ();
3859 as_warn (_("ignoring bad alignment"));
3866 sym
= symbol_find_or_make (name
);
3869 if (S_IS_DEFINED (sym
)
3870 || S_GET_VALUE (sym
) != 0)
3872 as_bad (_("attempt to redefine symbol"));
3873 ignore_rest_of_line ();
3877 record_alignment (bss_section
, align
);
3880 || ! S_IS_DEFINED (lcomm_sym
))
3889 S_SET_EXTERNAL (sym
);
3893 symbol_get_tc (lcomm_sym
)->output
= 1;
3894 def_sym
= lcomm_sym
;
3898 subseg_set (bss_section
, 1);
3899 frag_align (align
, 0, 0);
3901 symbol_set_frag (def_sym
, frag_now
);
3902 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
3903 def_size
, (char *) NULL
);
3905 S_SET_SEGMENT (def_sym
, bss_section
);
3906 symbol_get_tc (def_sym
)->align
= align
;
3910 /* Align the size of lcomm_sym. */
3911 symbol_get_frag (lcomm_sym
)->fr_offset
=
3912 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
3913 &~ ((1 << align
) - 1));
3914 if (align
> symbol_get_tc (lcomm_sym
)->align
)
3915 symbol_get_tc (lcomm_sym
)->align
= align
;
3920 /* Make sym an offset from lcomm_sym. */
3921 S_SET_SEGMENT (sym
, bss_section
);
3922 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
3923 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
3924 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
3927 subseg_set (current_seg
, current_subseg
);
3929 demand_empty_rest_of_line ();
3932 /* The .csect pseudo-op. This switches us into a different
3933 subsegment. The first argument is a symbol whose value is the
3934 start of the .csect. In COFF, csect symbols get special aux
3935 entries defined by the x_csect field of union internal_auxent. The
3936 optional second argument is the alignment (the default is 2). */
3939 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
3946 endc
= get_symbol_name (&name
);
3948 sym
= symbol_find_or_make (name
);
3950 (void) restore_line_pointer (endc
);
3952 if (S_GET_NAME (sym
)[0] == '\0')
3954 /* An unnamed csect is assumed to be [PR]. */
3955 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
3959 if (*input_line_pointer
== ',')
3961 ++input_line_pointer
;
3962 align
= get_absolute_expression ();
3965 ppc_change_csect (sym
, align
);
3967 demand_empty_rest_of_line ();
3970 /* Change to a different csect. */
3973 ppc_change_csect (symbolS
*sym
, offsetT align
)
3975 if (S_IS_DEFINED (sym
))
3976 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
3986 /* This is a new csect. We need to look at the symbol class to
3987 figure out whether it should go in the text section or the
3991 switch (symbol_get_tc (sym
)->symbol_class
)
4001 S_SET_SEGMENT (sym
, text_section
);
4002 symbol_get_tc (sym
)->subseg
= ppc_text_subsegment
;
4003 ++ppc_text_subsegment
;
4004 list_ptr
= &ppc_text_csects
;
4014 if (ppc_toc_csect
!= NULL
4015 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
4016 == ppc_data_subsegment
))
4018 S_SET_SEGMENT (sym
, data_section
);
4019 symbol_get_tc (sym
)->subseg
= ppc_data_subsegment
;
4020 ++ppc_data_subsegment
;
4021 list_ptr
= &ppc_data_csects
;
4027 /* We set the obstack chunk size to a small value before
4028 changing subsegments, so that we don't use a lot of memory
4029 space for what may be a small section. */
4030 hold_chunksize
= chunksize
;
4033 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
4034 symbol_get_tc (sym
)->subseg
);
4036 chunksize
= hold_chunksize
;
4039 ppc_after_toc_frag
= frag_now
;
4041 record_alignment (sec
, align
);
4043 frag_align_code (align
, 0);
4045 frag_align (align
, 0, 0);
4047 symbol_set_frag (sym
, frag_now
);
4048 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4050 symbol_get_tc (sym
)->align
= align
;
4051 symbol_get_tc (sym
)->output
= 1;
4052 symbol_get_tc (sym
)->within
= sym
;
4054 for (list
= *list_ptr
;
4055 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4056 list
= symbol_get_tc (list
)->next
)
4058 symbol_get_tc (list
)->next
= sym
;
4060 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4061 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4065 ppc_current_csect
= sym
;
4069 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
4073 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
4075 sec
= subseg_new (dw
->name
, subseg
);
4076 oldflags
= bfd_get_section_flags (stdoutput
, sec
);
4077 if (oldflags
== SEC_NO_FLAGS
)
4079 /* Just created section. */
4080 gas_assert (dw_sections
[idx
].sect
== NULL
);
4082 bfd_set_section_flags (stdoutput
, sec
, SEC_DEBUGGING
);
4083 bfd_set_section_alignment (stdoutput
, sec
, 0);
4084 dw_sections
[idx
].sect
= sec
;
4087 /* Not anymore in a csect. */
4088 ppc_current_csect
= NULL
;
4091 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4092 .dwsect flag [, opt-label ]
4096 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4100 const struct xcoff_dwsect_name
*dw
;
4101 struct dw_subsection
*subseg
;
4102 struct dw_section
*dws
;
4106 flag
= get_absolute_expression ();
4108 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4109 if (xcoff_dwsect_names
[i
].flag
== flag
)
4111 dw
= &xcoff_dwsect_names
[i
];
4115 /* Parse opt-label. */
4116 if (*input_line_pointer
== ',')
4121 ++input_line_pointer
;
4123 c
= get_symbol_name (&label
);
4124 opt_label
= symbol_find_or_make (label
);
4125 (void) restore_line_pointer (c
);
4130 demand_empty_rest_of_line ();
4132 /* Return now in case of unknown subsection. */
4135 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4140 /* Find the subsection. */
4141 dws
= &dw_sections
[i
];
4143 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4145 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4146 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4148 as_bad (_("label %s was not defined in this dwarf section"),
4149 S_GET_NAME (opt_label
));
4150 subseg
= dws
->anon_subseg
;
4154 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4159 /* Switch to the subsection. */
4160 ppc_change_debug_section (i
, subseg
->subseg
);
4164 /* Create a new dw subsection. */
4165 subseg
= XNEW (struct dw_subsection
);
4167 if (opt_label
== NULL
)
4169 /* The anonymous one. */
4171 subseg
->link
= NULL
;
4172 dws
->anon_subseg
= subseg
;
4177 if (dws
->list_subseg
!= NULL
)
4178 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4182 subseg
->link
= dws
->list_subseg
;
4183 dws
->list_subseg
= subseg
;
4184 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4187 ppc_change_debug_section (i
, subseg
->subseg
);
4191 /* Add the length field. */
4192 expressionS
*exp
= &subseg
->end_exp
;
4195 if (opt_label
!= NULL
)
4196 symbol_set_value_now (opt_label
);
4198 /* Add the length field. Note that according to the AIX assembler
4199 manual, the size of the length field is 4 for powerpc32 but
4200 12 for powerpc64. */
4203 /* Write the 64bit marker. */
4204 md_number_to_chars (frag_more (4), -1, 4);
4207 exp
->X_op
= O_subtract
;
4208 exp
->X_op_symbol
= symbol_temp_new_now ();
4209 exp
->X_add_symbol
= symbol_temp_make ();
4211 sz
= ppc_obj64
? 8 : 4;
4212 exp
->X_add_number
= -sz
;
4213 emit_expr (exp
, sz
);
4218 /* This function handles the .text and .data pseudo-ops. These
4219 pseudo-ops aren't really used by XCOFF; we implement them for the
4220 convenience of people who aren't used to XCOFF. */
4223 ppc_section (int type
)
4230 else if (type
== 'd')
4235 sym
= symbol_find_or_make (name
);
4237 ppc_change_csect (sym
, 2);
4239 demand_empty_rest_of_line ();
4242 /* This function handles the .section pseudo-op. This is mostly to
4243 give an error, since XCOFF only supports .text, .data and .bss, but
4244 we do permit the user to name the text or data section. */
4247 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4250 const char *real_name
;
4254 c
= get_symbol_name (&user_name
);
4256 if (strcmp (user_name
, ".text") == 0)
4257 real_name
= ".text[PR]";
4258 else if (strcmp (user_name
, ".data") == 0)
4259 real_name
= ".data[RW]";
4262 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4263 (void) restore_line_pointer (c
);
4264 ignore_rest_of_line ();
4268 (void) restore_line_pointer (c
);
4270 sym
= symbol_find_or_make (real_name
);
4272 ppc_change_csect (sym
, 2);
4274 demand_empty_rest_of_line ();
4277 /* The .extern pseudo-op. We create an undefined symbol. */
4280 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4285 endc
= get_symbol_name (&name
);
4287 (void) symbol_find_or_make (name
);
4289 (void) restore_line_pointer (endc
);
4291 demand_empty_rest_of_line ();
4294 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4297 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
4303 endc
= get_symbol_name (&name
);
4305 sym
= symbol_find_or_make (name
);
4307 (void) restore_line_pointer (endc
);
4309 symbol_get_tc (sym
)->output
= 1;
4311 demand_empty_rest_of_line ();
4314 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4315 relocations at the beginning of the current csect.
4317 (In principle, there's no reason why the relocations _have_ to be at
4318 the beginning. Anywhere in the csect would do. However, inserting
4319 at the beginning is what the native assembler does, and it helps to
4320 deal with cases where the .ref statements follow the section contents.)
4322 ??? .refs don't work for empty .csects. However, the native assembler
4323 doesn't report an error in this case, and neither yet do we. */
4326 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
4331 if (ppc_current_csect
== NULL
)
4333 as_bad (_(".ref outside .csect"));
4334 ignore_rest_of_line ();
4340 c
= get_symbol_name (&name
);
4342 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
4343 symbol_find_or_make (name
), 0, FALSE
, BFD_RELOC_NONE
);
4345 *input_line_pointer
= c
;
4346 SKIP_WHITESPACE_AFTER_NAME ();
4347 c
= *input_line_pointer
;
4350 input_line_pointer
++;
4352 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
4354 as_bad (_("missing symbol name"));
4355 ignore_rest_of_line ();
4362 demand_empty_rest_of_line ();
4365 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4366 although I don't know why it bothers. */
4369 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
4376 endc
= get_symbol_name (&name
);
4378 sym
= symbol_find_or_make (name
);
4380 (void) restore_line_pointer (endc
);
4382 if (*input_line_pointer
!= ',')
4384 as_bad (_("missing rename string"));
4385 ignore_rest_of_line ();
4388 ++input_line_pointer
;
4390 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
4392 demand_empty_rest_of_line ();
4395 /* The .stabx pseudo-op. This is similar to a normal .stabs
4396 pseudo-op, but slightly different. A sample is
4397 .stabx "main:F-1",.main,142,0
4398 The first argument is the symbol name to create. The second is the
4399 value, and the third is the storage class. The fourth seems to be
4400 always zero, and I am assuming it is the type. */
4403 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
4410 name
= demand_copy_C_string (&len
);
4412 if (*input_line_pointer
!= ',')
4414 as_bad (_("missing value"));
4417 ++input_line_pointer
;
4419 ppc_stab_symbol
= TRUE
;
4420 sym
= symbol_make (name
);
4421 ppc_stab_symbol
= FALSE
;
4423 symbol_get_tc (sym
)->real_name
= name
;
4425 (void) expression (&exp
);
4432 as_bad (_("illegal .stabx expression; zero assumed"));
4433 exp
.X_add_number
= 0;
4436 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
4437 symbol_set_frag (sym
, &zero_address_frag
);
4441 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
4442 symbol_set_value_expression (sym
, &exp
);
4446 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
4447 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
4452 /* The value is some complex expression. This will probably
4453 fail at some later point, but this is probably the right
4454 thing to do here. */
4455 symbol_set_value_expression (sym
, &exp
);
4459 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4460 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4462 if (*input_line_pointer
!= ',')
4464 as_bad (_("missing class"));
4467 ++input_line_pointer
;
4469 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
4471 if (*input_line_pointer
!= ',')
4473 as_bad (_("missing type"));
4476 ++input_line_pointer
;
4478 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
4480 symbol_get_tc (sym
)->output
= 1;
4482 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
4487 .stabx "z",arrays_,133,0
4490 .comm arrays_,13768,3
4492 resolve_symbol_value will copy the exp's "within" into sym's when the
4493 offset is 0. Since this seems to be corner case problem,
4494 only do the correction for storage class C_STSYM. A better solution
4495 would be to have the tc field updated in ppc_symbol_new_hook. */
4497 if (exp
.X_op
== O_symbol
)
4499 if (ppc_current_block
== NULL
)
4500 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4502 symbol_get_tc (sym
)->within
= ppc_current_block
;
4503 symbol_get_tc (exp
.X_add_symbol
)->within
= ppc_current_block
;
4507 if (exp
.X_op
!= O_symbol
4508 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
4509 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
4510 ppc_frob_label (sym
);
4513 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4514 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
4515 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
4516 symbol_get_tc (ppc_current_csect
)->within
= sym
;
4519 demand_empty_rest_of_line ();
4522 /* The .function pseudo-op. This takes several arguments. The first
4523 argument seems to be the external name of the symbol. The second
4524 argument seems to be the label for the start of the function. gcc
4525 uses the same name for both. I have no idea what the third and
4526 fourth arguments are meant to be. The optional fifth argument is
4527 an expression for the size of the function. In COFF this symbol
4528 gets an aux entry like that used for a csect. */
4531 ppc_function (int ignore ATTRIBUTE_UNUSED
)
4539 endc
= get_symbol_name (&name
);
4541 /* Ignore any [PR] suffix. */
4542 name
= ppc_canonicalize_symbol_name (name
);
4543 s
= strchr (name
, '[');
4544 if (s
!= (char *) NULL
4545 && strcmp (s
+ 1, "PR]") == 0)
4548 ext_sym
= symbol_find_or_make (name
);
4550 (void) restore_line_pointer (endc
);
4552 if (*input_line_pointer
!= ',')
4554 as_bad (_("missing symbol name"));
4555 ignore_rest_of_line ();
4558 ++input_line_pointer
;
4560 endc
= get_symbol_name (&name
);
4562 lab_sym
= symbol_find_or_make (name
);
4564 (void) restore_line_pointer (endc
);
4566 if (ext_sym
!= lab_sym
)
4570 exp
.X_op
= O_symbol
;
4571 exp
.X_add_symbol
= lab_sym
;
4572 exp
.X_op_symbol
= NULL
;
4573 exp
.X_add_number
= 0;
4575 symbol_set_value_expression (ext_sym
, &exp
);
4578 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
4579 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
4580 symbol_get_tc (ext_sym
)->output
= 1;
4582 if (*input_line_pointer
== ',')
4586 /* Ignore the third argument. */
4587 ++input_line_pointer
;
4589 if (*input_line_pointer
== ',')
4591 /* Ignore the fourth argument. */
4592 ++input_line_pointer
;
4594 if (*input_line_pointer
== ',')
4596 /* The fifth argument is the function size. */
4597 ++input_line_pointer
;
4598 symbol_get_tc (ext_sym
)->u
.size
= symbol_new
4599 ("L0\001", absolute_section
,(valueT
) 0, &zero_address_frag
);
4600 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
4605 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
4606 SF_SET_FUNCTION (ext_sym
);
4607 SF_SET_PROCESS (ext_sym
);
4608 coff_add_linesym (ext_sym
);
4610 demand_empty_rest_of_line ();
4613 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4614 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4615 with the correct line number */
4617 static symbolS
*saved_bi_sym
= 0;
4620 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
4624 sym
= symbol_make (".bf");
4625 S_SET_SEGMENT (sym
, text_section
);
4626 symbol_set_frag (sym
, frag_now
);
4627 S_SET_VALUE (sym
, frag_now_fix ());
4628 S_SET_STORAGE_CLASS (sym
, C_FCN
);
4630 coff_line_base
= get_absolute_expression ();
4632 S_SET_NUMBER_AUXILIARY (sym
, 1);
4633 SA_SET_SYM_LNNO (sym
, coff_line_base
);
4635 /* Line number for bi. */
4638 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
4643 symbol_get_tc (sym
)->output
= 1;
4645 ppc_frob_label (sym
);
4647 demand_empty_rest_of_line ();
4650 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4651 ".ef", except that the line number is absolute, not relative to the
4652 most recent ".bf" symbol. */
4655 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
4659 sym
= symbol_make (".ef");
4660 S_SET_SEGMENT (sym
, text_section
);
4661 symbol_set_frag (sym
, frag_now
);
4662 S_SET_VALUE (sym
, frag_now_fix ());
4663 S_SET_STORAGE_CLASS (sym
, C_FCN
);
4664 S_SET_NUMBER_AUXILIARY (sym
, 1);
4665 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
4666 symbol_get_tc (sym
)->output
= 1;
4668 ppc_frob_label (sym
);
4670 demand_empty_rest_of_line ();
4673 /* The .bi and .ei pseudo-ops. These take a string argument and
4674 generates a C_BINCL or C_EINCL symbol, which goes at the start of
4675 the symbol list. The value of .bi will be know when the next .bf
4681 static symbolS
*last_biei
;
4688 name
= demand_copy_C_string (&len
);
4690 /* The value of these symbols is actually file offset. Here we set
4691 the value to the index into the line number entries. In
4692 ppc_frob_symbols we set the fix_line field, which will cause BFD
4693 to do the right thing. */
4695 sym
= symbol_make (name
);
4696 /* obj-coff.c currently only handles line numbers correctly in the
4698 S_SET_SEGMENT (sym
, text_section
);
4699 S_SET_VALUE (sym
, coff_n_line_nos
);
4700 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4702 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
4703 symbol_get_tc (sym
)->output
= 1;
4711 for (look
= last_biei
? last_biei
: symbol_rootP
;
4712 (look
!= (symbolS
*) NULL
4713 && (S_GET_STORAGE_CLASS (look
) == C_FILE
4714 || S_GET_STORAGE_CLASS (look
) == C_BINCL
4715 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
4716 look
= symbol_next (look
))
4718 if (look
!= (symbolS
*) NULL
)
4720 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4721 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
4725 demand_empty_rest_of_line ();
4728 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4729 There is one argument, which is a csect symbol. The value of the
4730 .bs symbol is the index of this csect symbol. */
4733 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
4740 if (ppc_current_block
!= NULL
)
4741 as_bad (_("nested .bs blocks"));
4743 endc
= get_symbol_name (&name
);
4745 csect
= symbol_find_or_make (name
);
4747 (void) restore_line_pointer (endc
);
4749 sym
= symbol_make (".bs");
4750 S_SET_SEGMENT (sym
, now_seg
);
4751 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
4752 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4753 symbol_get_tc (sym
)->output
= 1;
4755 symbol_get_tc (sym
)->within
= csect
;
4757 ppc_frob_label (sym
);
4759 ppc_current_block
= sym
;
4761 demand_empty_rest_of_line ();
4764 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4767 ppc_es (int ignore ATTRIBUTE_UNUSED
)
4771 if (ppc_current_block
== NULL
)
4772 as_bad (_(".es without preceding .bs"));
4774 sym
= symbol_make (".es");
4775 S_SET_SEGMENT (sym
, now_seg
);
4776 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
4777 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4778 symbol_get_tc (sym
)->output
= 1;
4780 ppc_frob_label (sym
);
4782 ppc_current_block
= NULL
;
4784 demand_empty_rest_of_line ();
4787 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4791 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
4795 sym
= symbol_make (".bb");
4796 S_SET_SEGMENT (sym
, text_section
);
4797 symbol_set_frag (sym
, frag_now
);
4798 S_SET_VALUE (sym
, frag_now_fix ());
4799 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
4801 S_SET_NUMBER_AUXILIARY (sym
, 1);
4802 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
4804 symbol_get_tc (sym
)->output
= 1;
4806 SF_SET_PROCESS (sym
);
4808 ppc_frob_label (sym
);
4810 demand_empty_rest_of_line ();
4813 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4817 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
4821 sym
= symbol_make (".eb");
4822 S_SET_SEGMENT (sym
, text_section
);
4823 symbol_set_frag (sym
, frag_now
);
4824 S_SET_VALUE (sym
, frag_now_fix ());
4825 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
4826 S_SET_NUMBER_AUXILIARY (sym
, 1);
4827 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
4828 symbol_get_tc (sym
)->output
= 1;
4830 SF_SET_PROCESS (sym
);
4832 ppc_frob_label (sym
);
4834 demand_empty_rest_of_line ();
4837 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4841 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
4847 name
= demand_copy_C_string (&len
);
4848 sym
= symbol_make (name
);
4849 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4850 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4851 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
4852 S_SET_VALUE (sym
, 0);
4853 symbol_get_tc (sym
)->output
= 1;
4855 ppc_frob_label (sym
);
4857 demand_empty_rest_of_line ();
4860 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4863 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
4867 sym
= symbol_make (".ec");
4868 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4869 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4870 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
4871 S_SET_VALUE (sym
, 0);
4872 symbol_get_tc (sym
)->output
= 1;
4874 ppc_frob_label (sym
);
4876 demand_empty_rest_of_line ();
4879 /* The .toc pseudo-op. Switch to the .toc subsegment. */
4882 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
4884 if (ppc_toc_csect
!= (symbolS
*) NULL
)
4885 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
4892 subseg
= ppc_data_subsegment
;
4893 ++ppc_data_subsegment
;
4895 subseg_new (segment_name (data_section
), subseg
);
4896 ppc_toc_frag
= frag_now
;
4898 sym
= symbol_find_or_make ("TOC[TC0]");
4899 symbol_set_frag (sym
, frag_now
);
4900 S_SET_SEGMENT (sym
, data_section
);
4901 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4902 symbol_get_tc (sym
)->subseg
= subseg
;
4903 symbol_get_tc (sym
)->output
= 1;
4904 symbol_get_tc (sym
)->within
= sym
;
4906 ppc_toc_csect
= sym
;
4908 for (list
= ppc_data_csects
;
4909 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4910 list
= symbol_get_tc (list
)->next
)
4912 symbol_get_tc (list
)->next
= sym
;
4914 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4915 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4919 ppc_current_csect
= ppc_toc_csect
;
4921 demand_empty_rest_of_line ();
4924 /* The AIX assembler automatically aligns the operands of a .long or
4925 .short pseudo-op, and we want to be compatible. */
4928 ppc_xcoff_cons (int log_size
)
4930 frag_align (log_size
, 0, 0);
4931 record_alignment (now_seg
, log_size
);
4932 cons (1 << log_size
);
4936 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
4941 (void) expression (&exp
);
4943 if (exp
.X_op
!= O_constant
)
4945 as_bad (_("non-constant byte count"));
4949 byte_count
= exp
.X_add_number
;
4951 if (*input_line_pointer
!= ',')
4953 as_bad (_("missing value"));
4957 ++input_line_pointer
;
4962 ppc_xcoff_end (void)
4966 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4968 struct dw_section
*dws
= &dw_sections
[i
];
4969 struct dw_subsection
*dwss
;
4971 if (dws
->anon_subseg
)
4973 dwss
= dws
->anon_subseg
;
4974 dwss
->link
= dws
->list_subseg
;
4977 dwss
= dws
->list_subseg
;
4979 for (; dwss
!= NULL
; dwss
= dwss
->link
)
4980 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
4982 subseg_set (dws
->sect
, dwss
->subseg
);
4983 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
4988 #endif /* OBJ_XCOFF */
4989 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4991 /* The .tc pseudo-op. This is used when generating either XCOFF or
4992 ELF. This takes two or more arguments.
4994 When generating XCOFF output, the first argument is the name to
4995 give to this location in the toc; this will be a symbol with class
4996 TC. The rest of the arguments are N-byte values to actually put at
4997 this location in the TOC; often there is just one more argument, a
4998 relocatable symbol reference. The size of the value to store
4999 depends on target word size. A 32-bit target uses 4-byte values, a
5000 64-bit target uses 8-byte values.
5002 When not generating XCOFF output, the arguments are the same, but
5003 the first argument is simply ignored. */
5006 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
5010 /* Define the TOC symbol name. */
5016 if (ppc_toc_csect
== (symbolS
*) NULL
5017 || ppc_toc_csect
!= ppc_current_csect
)
5019 as_bad (_(".tc not in .toc section"));
5020 ignore_rest_of_line ();
5024 endc
= get_symbol_name (&name
);
5026 sym
= symbol_find_or_make (name
);
5028 (void) restore_line_pointer (endc
);
5030 if (S_IS_DEFINED (sym
))
5034 label
= symbol_get_tc (ppc_current_csect
)->within
;
5035 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
5037 as_bad (_(".tc with no label"));
5038 ignore_rest_of_line ();
5042 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
5043 symbol_set_frag (label
, symbol_get_frag (sym
));
5044 S_SET_VALUE (label
, S_GET_VALUE (sym
));
5046 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5047 ++input_line_pointer
;
5052 S_SET_SEGMENT (sym
, now_seg
);
5053 symbol_set_frag (sym
, frag_now
);
5054 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5055 symbol_get_tc (sym
)->symbol_class
= XMC_TC
;
5056 symbol_get_tc (sym
)->output
= 1;
5058 ppc_frob_label (sym
);
5061 #endif /* OBJ_XCOFF */
5065 /* Skip the TOC symbol name. */
5066 while (is_part_of_name (*input_line_pointer
)
5067 || *input_line_pointer
== ' '
5068 || *input_line_pointer
== '['
5069 || *input_line_pointer
== ']'
5070 || *input_line_pointer
== '{'
5071 || *input_line_pointer
== '}')
5072 ++input_line_pointer
;
5074 /* Align to a four/eight byte boundary. */
5075 align
= ppc_obj64
? 3 : 2;
5076 frag_align (align
, 0, 0);
5077 record_alignment (now_seg
, align
);
5078 #endif /* OBJ_ELF */
5080 if (*input_line_pointer
!= ',')
5081 demand_empty_rest_of_line ();
5084 ++input_line_pointer
;
5085 cons (ppc_obj64
? 8 : 4);
5089 /* Pseudo-op .machine. */
5092 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5096 #define MAX_HISTORY 100
5097 static ppc_cpu_t
*cpu_history
;
5098 static int curr_hist
;
5102 c
= get_symbol_name (&cpu_string
);
5103 cpu_string
= xstrdup (cpu_string
);
5104 (void) restore_line_pointer (c
);
5106 if (cpu_string
!= NULL
)
5108 ppc_cpu_t old_cpu
= ppc_cpu
;
5112 for (p
= cpu_string
; *p
!= 0; p
++)
5115 if (strcmp (cpu_string
, "push") == 0)
5117 if (cpu_history
== NULL
)
5118 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5120 if (curr_hist
>= MAX_HISTORY
)
5121 as_bad (_(".machine stack overflow"));
5123 cpu_history
[curr_hist
++] = ppc_cpu
;
5125 else if (strcmp (cpu_string
, "pop") == 0)
5128 as_bad (_(".machine stack underflow"));
5130 ppc_cpu
= cpu_history
[--curr_hist
];
5132 else if ((new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, cpu_string
)) != 0)
5135 as_bad (_("invalid machine `%s'"), cpu_string
);
5137 if (ppc_cpu
!= old_cpu
)
5138 ppc_setup_opcodes ();
5141 demand_empty_rest_of_line ();
5143 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5147 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
5149 /* Set the current section. */
5151 ppc_set_current_section (segT
new)
5153 ppc_previous_section
= ppc_current_section
;
5154 ppc_current_section
= new;
5157 /* pseudo-op: .previous
5158 behaviour: toggles the current section with the previous section.
5160 warnings: "No previous section" */
5163 ppc_previous (int ignore ATTRIBUTE_UNUSED
)
5165 if (ppc_previous_section
== NULL
)
5167 as_warn (_("no previous section to return to, ignored."));
5171 subseg_set (ppc_previous_section
, 0);
5173 ppc_set_current_section (ppc_previous_section
);
5176 /* pseudo-op: .pdata
5177 behaviour: predefined read only data section
5181 initial: .section .pdata "adr3"
5182 a - don't know -- maybe a misprint
5183 d - initialized data
5185 3 - double word aligned (that would be 4 byte boundary)
5188 Tag index tables (also known as the function table) for exception
5189 handling, debugging, etc. */
5192 ppc_pdata (int ignore ATTRIBUTE_UNUSED
)
5194 if (pdata_section
== 0)
5196 pdata_section
= subseg_new (".pdata", 0);
5198 bfd_set_section_flags (stdoutput
, pdata_section
,
5199 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5200 | SEC_READONLY
| SEC_DATA
));
5202 bfd_set_section_alignment (stdoutput
, pdata_section
, 2);
5206 pdata_section
= subseg_new (".pdata", 0);
5208 ppc_set_current_section (pdata_section
);
5211 /* pseudo-op: .ydata
5212 behaviour: predefined read only data section
5216 initial: .section .ydata "drw3"
5217 a - don't know -- maybe a misprint
5218 d - initialized data
5220 3 - double word aligned (that would be 4 byte boundary)
5222 Tag tables (also known as the scope table) for exception handling,
5226 ppc_ydata (int ignore ATTRIBUTE_UNUSED
)
5228 if (ydata_section
== 0)
5230 ydata_section
= subseg_new (".ydata", 0);
5231 bfd_set_section_flags (stdoutput
, ydata_section
,
5232 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5233 | SEC_READONLY
| SEC_DATA
));
5235 bfd_set_section_alignment (stdoutput
, ydata_section
, 3);
5239 ydata_section
= subseg_new (".ydata", 0);
5241 ppc_set_current_section (ydata_section
);
5244 /* pseudo-op: .reldata
5245 behaviour: predefined read write data section
5246 double word aligned (4-byte)
5247 FIXME: relocation is applied to it
5248 FIXME: what's the difference between this and .data?
5251 initial: .section .reldata "drw3"
5252 d - initialized data
5255 3 - double word aligned (that would be 8 byte boundary)
5258 Like .data, but intended to hold data subject to relocation, such as
5259 function descriptors, etc. */
5262 ppc_reldata (int ignore ATTRIBUTE_UNUSED
)
5264 if (reldata_section
== 0)
5266 reldata_section
= subseg_new (".reldata", 0);
5268 bfd_set_section_flags (stdoutput
, reldata_section
,
5269 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5272 bfd_set_section_alignment (stdoutput
, reldata_section
, 2);
5276 reldata_section
= subseg_new (".reldata", 0);
5278 ppc_set_current_section (reldata_section
);
5281 /* pseudo-op: .rdata
5282 behaviour: predefined read only data section
5286 initial: .section .rdata "dr3"
5287 d - initialized data
5289 3 - double word aligned (that would be 4 byte boundary) */
5292 ppc_rdata (int ignore ATTRIBUTE_UNUSED
)
5294 if (rdata_section
== 0)
5296 rdata_section
= subseg_new (".rdata", 0);
5297 bfd_set_section_flags (stdoutput
, rdata_section
,
5298 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5299 | SEC_READONLY
| SEC_DATA
));
5301 bfd_set_section_alignment (stdoutput
, rdata_section
, 2);
5305 rdata_section
= subseg_new (".rdata", 0);
5307 ppc_set_current_section (rdata_section
);
5310 /* pseudo-op: .ualong
5311 behaviour: much like .int, with the exception that no alignment is
5313 FIXME: test the alignment statement
5318 ppc_ualong (int ignore ATTRIBUTE_UNUSED
)
5324 /* pseudo-op: .znop <symbol name>
5325 behaviour: Issue a nop instruction
5326 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5327 the supplied symbol name.
5329 warnings: Missing symbol name */
5332 ppc_znop (int ignore ATTRIBUTE_UNUSED
)
5335 const struct powerpc_opcode
*opcode
;
5342 /* Strip out the symbol name. */
5343 c
= get_symbol_name (&symbol_name
);
5345 name
= xstrdup (symbol_name
);
5347 sym
= symbol_find_or_make (name
);
5349 *input_line_pointer
= c
;
5351 SKIP_WHITESPACE_AFTER_NAME ();
5353 /* Look up the opcode in the hash table. */
5354 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, "nop");
5356 /* Stick in the nop. */
5357 insn
= opcode
->opcode
;
5359 /* Write out the instruction. */
5361 md_number_to_chars (f
, insn
, 4);
5363 f
- frag_now
->fr_literal
,
5368 BFD_RELOC_16_GOT_PCREL
);
5378 ppc_pe_comm (int lcomm
)
5387 c
= get_symbol_name (&name
);
5389 /* just after name is now '\0'. */
5390 p
= input_line_pointer
;
5392 SKIP_WHITESPACE_AFTER_NAME ();
5393 if (*input_line_pointer
!= ',')
5395 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5396 ignore_rest_of_line ();
5400 input_line_pointer
++; /* skip ',' */
5401 if ((temp
= get_absolute_expression ()) < 0)
5403 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp
);
5404 ignore_rest_of_line ();
5410 /* The third argument to .comm is the alignment. */
5411 if (*input_line_pointer
!= ',')
5415 ++input_line_pointer
;
5416 align
= get_absolute_expression ();
5419 as_warn (_("ignoring bad alignment"));
5426 symbolP
= symbol_find_or_make (name
);
5429 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
5431 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5432 S_GET_NAME (symbolP
));
5433 ignore_rest_of_line ();
5437 if (S_GET_VALUE (symbolP
))
5439 if (S_GET_VALUE (symbolP
) != (valueT
) temp
)
5440 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5441 S_GET_NAME (symbolP
),
5442 (long) S_GET_VALUE (symbolP
),
5447 S_SET_VALUE (symbolP
, (valueT
) temp
);
5448 S_SET_EXTERNAL (symbolP
);
5449 S_SET_SEGMENT (symbolP
, bfd_com_section_ptr
);
5452 demand_empty_rest_of_line ();
5456 * implement the .section pseudo op:
5457 * .section name {, "flags"}
5459 * | +--- optional flags: 'b' for bss
5461 * +-- section name 'l' for lib
5465 * 'd' (apparently m88k for data)
5467 * But if the argument is not a quoted string, treat it as a
5468 * subsegment number.
5470 * FIXME: this is a copy of the section processing from obj-coff.c, with
5471 * additions/changes for the moto-pas assembler support. There are three
5474 * FIXME: I just noticed this. This doesn't work at all really. It it
5475 * setting bits that bfd probably neither understands or uses. The
5476 * correct approach (?) will have to incorporate extra fields attached
5477 * to the section to hold the system specific stuff. (krk)
5480 * 'a' - unknown - referred to in documentation, but no definition supplied
5481 * 'c' - section has code
5482 * 'd' - section has initialized data
5483 * 'u' - section has uninitialized data
5484 * 'i' - section contains directives (info)
5485 * 'n' - section can be discarded
5486 * 'R' - remove section at link time
5488 * Section Protection:
5489 * 'r' - section is readable
5490 * 'w' - section is writable
5491 * 'x' - section is executable
5492 * 's' - section is sharable
5494 * Section Alignment:
5495 * '0' - align to byte boundary
5496 * '1' - align to halfword boundary
5497 * '2' - align to word boundary
5498 * '3' - align to doubleword boundary
5499 * '4' - align to quadword boundary
5500 * '5' - align to 32 byte boundary
5501 * '6' - align to 64 byte boundary
5506 ppc_pe_section (int ignore ATTRIBUTE_UNUSED
)
5508 /* Strip out the section name. */
5517 c
= get_symbol_name (§ion_name
);
5519 name
= xstrdup (section_name
);
5521 *input_line_pointer
= c
;
5523 SKIP_WHITESPACE_AFTER_NAME ();
5526 flags
= SEC_NO_FLAGS
;
5528 if (strcmp (name
, ".idata$2") == 0)
5532 else if (strcmp (name
, ".idata$3") == 0)
5536 else if (strcmp (name
, ".idata$4") == 0)
5540 else if (strcmp (name
, ".idata$5") == 0)
5544 else if (strcmp (name
, ".idata$6") == 0)
5549 /* Default alignment to 16 byte boundary. */
5552 if (*input_line_pointer
== ',')
5554 ++input_line_pointer
;
5556 if (*input_line_pointer
!= '"')
5557 exp
= get_absolute_expression ();
5560 ++input_line_pointer
;
5561 while (*input_line_pointer
!= '"'
5562 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
5564 switch (*input_line_pointer
)
5566 /* Section Contents */
5567 case 'a': /* unknown */
5568 as_bad (_("unsupported section attribute -- 'a'"));
5570 case 'c': /* code section */
5573 case 'd': /* section has initialized data */
5576 case 'u': /* section has uninitialized data */
5577 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5581 case 'i': /* section contains directives (info) */
5582 /* FIXME: This is IMAGE_SCN_LNK_INFO
5584 flags
|= SEC_HAS_CONTENTS
;
5586 case 'n': /* section can be discarded */
5589 case 'R': /* Remove section at link time */
5590 flags
|= SEC_NEVER_LOAD
;
5592 #if IFLICT_BRAIN_DAMAGE
5593 /* Section Protection */
5594 case 'r': /* section is readable */
5595 flags
|= IMAGE_SCN_MEM_READ
;
5597 case 'w': /* section is writable */
5598 flags
|= IMAGE_SCN_MEM_WRITE
;
5600 case 'x': /* section is executable */
5601 flags
|= IMAGE_SCN_MEM_EXECUTE
;
5603 case 's': /* section is sharable */
5604 flags
|= IMAGE_SCN_MEM_SHARED
;
5607 /* Section Alignment */
5608 case '0': /* align to byte boundary */
5609 flags
|= IMAGE_SCN_ALIGN_1BYTES
;
5612 case '1': /* align to halfword boundary */
5613 flags
|= IMAGE_SCN_ALIGN_2BYTES
;
5616 case '2': /* align to word boundary */
5617 flags
|= IMAGE_SCN_ALIGN_4BYTES
;
5620 case '3': /* align to doubleword boundary */
5621 flags
|= IMAGE_SCN_ALIGN_8BYTES
;
5624 case '4': /* align to quadword boundary */
5625 flags
|= IMAGE_SCN_ALIGN_16BYTES
;
5628 case '5': /* align to 32 byte boundary */
5629 flags
|= IMAGE_SCN_ALIGN_32BYTES
;
5632 case '6': /* align to 64 byte boundary */
5633 flags
|= IMAGE_SCN_ALIGN_64BYTES
;
5638 as_bad (_("unknown section attribute '%c'"),
5639 *input_line_pointer
);
5642 ++input_line_pointer
;
5644 if (*input_line_pointer
== '"')
5645 ++input_line_pointer
;
5649 sec
= subseg_new (name
, (subsegT
) exp
);
5651 ppc_set_current_section (sec
);
5653 if (flags
!= SEC_NO_FLAGS
)
5655 if (! bfd_set_section_flags (stdoutput
, sec
, flags
))
5656 as_bad (_("error setting flags for \"%s\": %s"),
5657 bfd_section_name (stdoutput
, sec
),
5658 bfd_errmsg (bfd_get_error ()));
5661 bfd_set_section_alignment (stdoutput
, sec
, align
);
5665 ppc_pe_function (int ignore ATTRIBUTE_UNUSED
)
5671 endc
= get_symbol_name (&name
);
5673 ext_sym
= symbol_find_or_make (name
);
5675 (void) restore_line_pointer (endc
);
5677 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
5678 SF_SET_FUNCTION (ext_sym
);
5679 SF_SET_PROCESS (ext_sym
);
5680 coff_add_linesym (ext_sym
);
5682 demand_empty_rest_of_line ();
5686 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED
)
5688 if (tocdata_section
== 0)
5690 tocdata_section
= subseg_new (".tocd", 0);
5691 /* FIXME: section flags won't work. */
5692 bfd_set_section_flags (stdoutput
, tocdata_section
,
5693 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5694 | SEC_READONLY
| SEC_DATA
));
5696 bfd_set_section_alignment (stdoutput
, tocdata_section
, 2);
5700 rdata_section
= subseg_new (".tocd", 0);
5703 ppc_set_current_section (tocdata_section
);
5705 demand_empty_rest_of_line ();
5708 /* Don't adjust TOC relocs to use the section symbol. */
5711 ppc_pe_fix_adjustable (fixS
*fix
)
5713 return fix
->fx_r_type
!= BFD_RELOC_PPC_TOC16
;
5720 /* XCOFF specific symbol and file handling. */
5722 /* Canonicalize the symbol name. We use the to force the suffix, if
5723 any, to use square brackets, and to be in upper case. */
5726 ppc_canonicalize_symbol_name (char *name
)
5730 if (ppc_stab_symbol
)
5733 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
5747 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
5750 if (*s
== '\0' || s
[1] != '\0')
5751 as_bad (_("bad symbol suffix"));
5759 /* Set the class of a symbol based on the suffix, if any. This is
5760 called whenever a new symbol is created. */
5763 ppc_symbol_new_hook (symbolS
*sym
)
5765 struct ppc_tc_sy
*tc
;
5768 tc
= symbol_get_tc (sym
);
5771 tc
->symbol_class
= -1;
5772 tc
->real_name
= NULL
;
5779 if (ppc_stab_symbol
)
5782 s
= strchr (S_GET_NAME (sym
), '[');
5783 if (s
== (const char *) NULL
)
5785 /* There is no suffix. */
5794 if (strcmp (s
, "BS]") == 0)
5795 tc
->symbol_class
= XMC_BS
;
5798 if (strcmp (s
, "DB]") == 0)
5799 tc
->symbol_class
= XMC_DB
;
5800 else if (strcmp (s
, "DS]") == 0)
5801 tc
->symbol_class
= XMC_DS
;
5804 if (strcmp (s
, "GL]") == 0)
5805 tc
->symbol_class
= XMC_GL
;
5808 if (strcmp (s
, "PR]") == 0)
5809 tc
->symbol_class
= XMC_PR
;
5812 if (strcmp (s
, "RO]") == 0)
5813 tc
->symbol_class
= XMC_RO
;
5814 else if (strcmp (s
, "RW]") == 0)
5815 tc
->symbol_class
= XMC_RW
;
5818 if (strcmp (s
, "SV]") == 0)
5819 tc
->symbol_class
= XMC_SV
;
5822 if (strcmp (s
, "TC]") == 0)
5823 tc
->symbol_class
= XMC_TC
;
5824 else if (strcmp (s
, "TI]") == 0)
5825 tc
->symbol_class
= XMC_TI
;
5826 else if (strcmp (s
, "TB]") == 0)
5827 tc
->symbol_class
= XMC_TB
;
5828 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
5829 tc
->symbol_class
= XMC_TC0
;
5832 if (strcmp (s
, "UA]") == 0)
5833 tc
->symbol_class
= XMC_UA
;
5834 else if (strcmp (s
, "UC]") == 0)
5835 tc
->symbol_class
= XMC_UC
;
5838 if (strcmp (s
, "XO]") == 0)
5839 tc
->symbol_class
= XMC_XO
;
5843 if (tc
->symbol_class
== -1)
5844 as_bad (_("unrecognized symbol suffix"));
5847 /* Set the class of a label based on where it is defined. This
5848 handles symbols without suffixes. Also, move the symbol so that it
5849 follows the csect symbol. */
5852 ppc_frob_label (symbolS
*sym
)
5854 if (ppc_current_csect
!= (symbolS
*) NULL
)
5856 if (symbol_get_tc (sym
)->symbol_class
== -1)
5857 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
5859 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5860 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
5861 &symbol_rootP
, &symbol_lastP
);
5862 symbol_get_tc (ppc_current_csect
)->within
= sym
;
5863 symbol_get_tc (sym
)->within
= ppc_current_csect
;
5867 dwarf2_emit_label (sym
);
5871 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5872 seen. It tells ppc_adjust_symtab whether it needs to look through
5875 static bfd_boolean ppc_saw_abs
;
5877 /* Change the name of a symbol just before writing it out. Set the
5878 real name if the .rename pseudo-op was used. Otherwise, remove any
5879 class suffix. Return 1 if the symbol should not be included in the
5883 ppc_frob_symbol (symbolS
*sym
)
5885 static symbolS
*ppc_last_function
;
5886 static symbolS
*set_end
;
5888 /* Discard symbols that should not be included in the output symbol
5890 if (! symbol_used_in_reloc_p (sym
)
5891 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
5892 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
5893 && ! symbol_get_tc (sym
)->output
5894 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
5897 /* This one will disappear anyway. Don't make a csect sym for it. */
5898 if (sym
== abs_section_sym
)
5901 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
5902 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
5908 name
= S_GET_NAME (sym
);
5909 s
= strchr (name
, '[');
5910 if (s
!= (char *) NULL
)
5916 snew
= xstrndup (name
, len
);
5918 S_SET_NAME (sym
, snew
);
5922 if (set_end
!= (symbolS
*) NULL
)
5924 SA_SET_SYM_ENDNDX (set_end
, sym
);
5928 if (SF_GET_FUNCTION (sym
))
5930 if (ppc_last_function
!= (symbolS
*) NULL
)
5931 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5932 ppc_last_function
= sym
;
5933 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
5935 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
5936 SA_SET_SYM_FSIZE (sym
,
5937 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
5940 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
5941 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
5943 if (ppc_last_function
== (symbolS
*) NULL
)
5944 as_bad (_(".ef with no preceding .function"));
5947 set_end
= ppc_last_function
;
5948 ppc_last_function
= NULL
;
5950 /* We don't have a C_EFCN symbol, but we need to force the
5951 COFF backend to believe that it has seen one. */
5952 coff_last_function
= NULL
;
5956 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
5957 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
5958 && S_GET_STORAGE_CLASS (sym
) != C_FILE
5959 && S_GET_STORAGE_CLASS (sym
) != C_FCN
5960 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
5961 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
5962 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
5963 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
5964 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
5965 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
5966 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
5968 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
5969 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
5970 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
5973 union internal_auxent
*a
;
5975 /* Create a csect aux. */
5976 i
= S_GET_NUMBER_AUXILIARY (sym
);
5977 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
5978 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
5979 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
5981 /* This is the TOC table. */
5982 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
5983 a
->x_csect
.x_scnlen
.l
= 0;
5984 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
5986 else if (symbol_get_tc (sym
)->subseg
!= 0)
5988 /* This is a csect symbol. x_scnlen is the size of the
5990 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
5991 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
5992 S_GET_SEGMENT (sym
))
5993 - S_GET_VALUE (sym
));
5996 resolve_symbol_value (symbol_get_tc (sym
)->next
);
5997 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
5998 - S_GET_VALUE (sym
));
6000 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
6002 else if (S_GET_SEGMENT (sym
) == bss_section
)
6004 /* This is a common symbol. */
6005 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
6006 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6007 if (S_IS_EXTERNAL (sym
))
6008 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
6010 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
6012 else if (S_GET_SEGMENT (sym
) == absolute_section
)
6014 /* This is an absolute symbol. The csect will be created by
6015 ppc_adjust_symtab. */
6017 a
->x_csect
.x_smtyp
= XTY_LD
;
6018 if (symbol_get_tc (sym
)->symbol_class
== -1)
6019 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
6021 else if (! S_IS_DEFINED (sym
))
6023 /* This is an external symbol. */
6024 a
->x_csect
.x_scnlen
.l
= 0;
6025 a
->x_csect
.x_smtyp
= XTY_ER
;
6027 else if (symbol_get_tc (sym
)->symbol_class
== XMC_TC
)
6031 /* This is a TOC definition. x_scnlen is the size of the
6033 next
= symbol_next (sym
);
6034 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
6035 next
= symbol_next (next
);
6036 if (next
== (symbolS
*) NULL
6037 || symbol_get_tc (next
)->symbol_class
!= XMC_TC
)
6039 if (ppc_after_toc_frag
== (fragS
*) NULL
)
6040 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
6042 - S_GET_VALUE (sym
));
6044 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
6045 - S_GET_VALUE (sym
));
6049 resolve_symbol_value (next
);
6050 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
6051 - S_GET_VALUE (sym
));
6053 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6059 /* This is a normal symbol definition. x_scnlen is the
6060 symbol index of the containing csect. */
6061 if (S_GET_SEGMENT (sym
) == text_section
)
6062 csect
= ppc_text_csects
;
6063 else if (S_GET_SEGMENT (sym
) == data_section
)
6064 csect
= ppc_data_csects
;
6068 /* Skip the initial dummy symbol. */
6069 csect
= symbol_get_tc (csect
)->next
;
6071 if (csect
== (symbolS
*) NULL
)
6073 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
6074 a
->x_csect
.x_scnlen
.l
= 0;
6078 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
6080 resolve_symbol_value (symbol_get_tc (csect
)->next
);
6081 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
6082 > S_GET_VALUE (sym
))
6084 csect
= symbol_get_tc (csect
)->next
;
6087 a
->x_csect
.x_scnlen
.p
=
6088 coffsymbol (symbol_get_bfdsym (csect
))->native
;
6089 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
6092 a
->x_csect
.x_smtyp
= XTY_LD
;
6095 a
->x_csect
.x_parmhash
= 0;
6096 a
->x_csect
.x_snhash
= 0;
6097 if (symbol_get_tc (sym
)->symbol_class
== -1)
6098 a
->x_csect
.x_smclas
= XMC_PR
;
6100 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
6101 a
->x_csect
.x_stab
= 0;
6102 a
->x_csect
.x_snstab
= 0;
6104 /* Don't let the COFF backend resort these symbols. */
6105 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
6107 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
6109 /* We want the value to be the symbol index of the referenced
6110 csect symbol. BFD will do that for us if we set the right
6112 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
6113 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
6115 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
6116 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
6118 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
6123 block
= symbol_get_tc (sym
)->within
;
6126 /* The value is the offset from the enclosing csect. */
6129 csect
= symbol_get_tc (block
)->within
;
6130 resolve_symbol_value (csect
);
6131 base
= S_GET_VALUE (csect
);
6136 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
6138 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
6139 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
6141 /* We want the value to be a file offset into the line numbers.
6142 BFD will do that for us if we set the right flags. We have
6143 already set the value correctly. */
6144 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
6150 /* Adjust the symbol table. This creates csect symbols for all
6151 absolute symbols. */
6154 ppc_adjust_symtab (void)
6161 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
6165 union internal_auxent
*a
;
6167 if (S_GET_SEGMENT (sym
) != absolute_section
)
6170 csect
= symbol_create (".abs[XO]", absolute_section
,
6171 S_GET_VALUE (sym
), &zero_address_frag
);
6172 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
6173 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
6174 i
= S_GET_NUMBER_AUXILIARY (csect
);
6175 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
6176 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
6177 a
->x_csect
.x_scnlen
.l
= 0;
6178 a
->x_csect
.x_smtyp
= XTY_SD
;
6179 a
->x_csect
.x_parmhash
= 0;
6180 a
->x_csect
.x_snhash
= 0;
6181 a
->x_csect
.x_smclas
= XMC_XO
;
6182 a
->x_csect
.x_stab
= 0;
6183 a
->x_csect
.x_snstab
= 0;
6185 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
6187 i
= S_GET_NUMBER_AUXILIARY (sym
);
6188 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
6189 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
6190 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
6193 ppc_saw_abs
= FALSE
;
6196 /* Set the VMA for a section. This is called on all the sections in
6200 ppc_frob_section (asection
*sec
)
6202 static bfd_vma vma
= 0;
6204 /* Dwarf sections start at 0. */
6205 if (bfd_get_section_flags (NULL
, sec
) & SEC_DEBUGGING
)
6208 vma
= md_section_align (sec
, vma
);
6209 bfd_set_section_vma (stdoutput
, sec
, vma
);
6210 vma
+= bfd_section_size (stdoutput
, sec
);
6213 #endif /* OBJ_XCOFF */
6216 md_atof (int type
, char *litp
, int *sizep
)
6218 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6221 /* Write a value out to the object file, using the appropriate
6225 md_number_to_chars (char *buf
, valueT val
, int n
)
6227 if (target_big_endian
)
6228 number_to_chars_bigendian (buf
, val
, n
);
6230 number_to_chars_littleendian (buf
, val
, n
);
6233 /* Align a section (I don't know why this is machine dependent). */
6236 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6241 int align
= bfd_get_section_alignment (stdoutput
, seg
);
6243 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6247 /* We don't have any form of relaxing. */
6250 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6251 asection
*seg ATTRIBUTE_UNUSED
)
6257 /* Convert a machine dependent frag. We never generate these. */
6260 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6261 asection
*sec ATTRIBUTE_UNUSED
,
6262 fragS
*fragp ATTRIBUTE_UNUSED
)
6267 /* We have no need to default values of symbols. */
6270 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6275 /* Functions concerning relocs. */
6277 /* The location from which a PC relative jump should be calculated,
6278 given a PC relative reloc. */
6281 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6283 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6288 /* This is called to see whether a fixup should be adjusted to use a
6289 section symbol. We take the opportunity to change a fixup against
6290 a symbol in the TOC subsegment into a reloc against the
6291 corresponding .tc symbol. */
6294 ppc_fix_adjustable (fixS
*fix
)
6296 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6297 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6298 TC_SYMFIELD_TYPE
*tc
;
6300 if (symseg
== absolute_section
)
6303 /* Always adjust symbols in debugging sections. */
6304 if (bfd_get_section_flags (stdoutput
, symseg
) & SEC_DEBUGGING
)
6307 if (ppc_toc_csect
!= (symbolS
*) NULL
6308 && fix
->fx_addsy
!= ppc_toc_csect
6309 && symseg
== data_section
6310 && val
>= ppc_toc_frag
->fr_address
6311 && (ppc_after_toc_frag
== (fragS
*) NULL
6312 || val
< ppc_after_toc_frag
->fr_address
))
6316 for (sy
= symbol_next (ppc_toc_csect
);
6317 sy
!= (symbolS
*) NULL
;
6318 sy
= symbol_next (sy
))
6320 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6322 if (sy_tc
->symbol_class
== XMC_TC0
)
6324 if (sy_tc
->symbol_class
!= XMC_TC
)
6326 if (val
== resolve_symbol_value (sy
))
6329 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6334 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6335 _("symbol in .toc does not match any .tc"));
6338 /* Possibly adjust the reloc to be against the csect. */
6339 tc
= symbol_get_tc (fix
->fx_addsy
);
6341 && tc
->symbol_class
!= XMC_TC0
6342 && tc
->symbol_class
!= XMC_TC
6343 && symseg
!= bss_section
6344 /* Don't adjust if this is a reloc in the toc section. */
6345 && (symseg
!= data_section
6346 || ppc_toc_csect
== NULL
6347 || val
< ppc_toc_frag
->fr_address
6348 || (ppc_after_toc_frag
!= NULL
6349 && val
>= ppc_after_toc_frag
->fr_address
)))
6351 symbolS
*csect
= tc
->within
;
6353 /* If the symbol was not declared by a label (eg: a section symbol),
6354 use the section instead of the csect. This doesn't happen in
6355 normal AIX assembly code. */
6357 csect
= seg_info (symseg
)->sym
;
6359 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6360 fix
->fx_addsy
= csect
;
6365 /* Adjust a reloc against a .lcomm symbol to be against the base
6367 if (symseg
== bss_section
6368 && ! S_IS_EXTERNAL (fix
->fx_addsy
))
6370 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6372 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6379 /* A reloc from one csect to another must be kept. The assembler
6380 will, of course, keep relocs between sections, and it will keep
6381 absolute relocs, but we need to force it to keep PC relative relocs
6382 between two csects in the same section. */
6385 ppc_force_relocation (fixS
*fix
)
6387 /* At this point fix->fx_addsy should already have been converted to
6388 a csect symbol. If the csect does not include the fragment, then
6389 we need to force the relocation. */
6391 && fix
->fx_addsy
!= NULL
6392 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6393 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6394 > fix
->fx_frag
->fr_address
)
6395 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6396 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6397 <= fix
->fx_frag
->fr_address
))))
6400 return generic_force_reloc (fix
);
6404 ppc_new_dot_label (symbolS
*sym
)
6406 /* Anchor this label to the current csect for relocations. */
6407 symbol_get_tc (sym
)->within
= ppc_current_csect
;
6410 #endif /* OBJ_XCOFF */
6413 /* If this function returns non-zero, it guarantees that a relocation
6414 will be emitted for a fixup. */
6417 ppc_force_relocation (fixS
*fix
)
6419 /* Branch prediction relocations must force a relocation, as must
6420 the vtable description relocs. */
6421 switch (fix
->fx_r_type
)
6423 case BFD_RELOC_PPC_B16_BRTAKEN
:
6424 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6425 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6426 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6427 case BFD_RELOC_24_PLT_PCREL
:
6428 case BFD_RELOC_PPC64_TOC
:
6430 case BFD_RELOC_PPC_B26
:
6431 case BFD_RELOC_PPC_BA26
:
6432 case BFD_RELOC_PPC_B16
:
6433 case BFD_RELOC_PPC_BA16
:
6434 case BFD_RELOC_PPC64_REL24_NOTOC
:
6435 /* All branch fixups targeting a localentry symbol must
6436 force a relocation. */
6439 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6440 elf_symbol_type
*elfsym
6441 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6442 gas_assert (elfsym
);
6443 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6451 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6452 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
)
6455 return generic_force_reloc (fix
);
6459 ppc_fix_adjustable (fixS
*fix
)
6461 switch (fix
->fx_r_type
)
6463 /* All branch fixups targeting a localentry symbol must
6464 continue using the symbol. */
6465 case BFD_RELOC_PPC_B26
:
6466 case BFD_RELOC_PPC_BA26
:
6467 case BFD_RELOC_PPC_B16
:
6468 case BFD_RELOC_PPC_BA16
:
6469 case BFD_RELOC_PPC_B16_BRTAKEN
:
6470 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6471 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6472 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6473 case BFD_RELOC_PPC64_REL24_NOTOC
:
6476 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6477 elf_symbol_type
*elfsym
6478 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6479 gas_assert (elfsym
);
6480 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6488 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
6489 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
6490 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
6491 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
6492 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
6493 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
6494 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
6495 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
6496 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
6497 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6498 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
));
6503 ppc_frag_check (struct frag
*fragP
)
6505 if ((fragP
->fr_address
& fragP
->insn_addr
) != 0)
6506 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
6507 _("instruction address is not a multiple of %d"),
6508 fragP
->insn_addr
+ 1);
6511 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6512 rs_align_code frag. */
6515 ppc_handle_align (struct frag
*fragP
)
6517 valueT count
= (fragP
->fr_next
->fr_address
6518 - (fragP
->fr_address
+ fragP
->fr_fix
));
6520 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && count
!= 0 && (count
& 1) == 0)
6522 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6525 md_number_to_chars (dest
, 0x4400, 2);
6527 else if (count
!= 0 && (count
& 3) == 0)
6529 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6533 if (count
> 4 * nop_limit
&& count
< 0x2000000)
6537 /* Make a branch, then follow with nops. Insert another
6538 frag to handle the nops. */
6539 md_number_to_chars (dest
, 0x48000000 + count
, 4);
6544 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6545 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
6546 fragP
->fr_next
= rest
;
6548 rest
->fr_address
+= rest
->fr_fix
+ 4;
6550 /* If we leave the next frag as rs_align_code we'll come here
6551 again, resulting in a bunch of branches rather than a
6552 branch followed by nops. */
6553 rest
->fr_type
= rs_align
;
6554 dest
= rest
->fr_literal
;
6557 md_number_to_chars (dest
, 0x60000000, 4);
6559 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0
6560 && (ppc_cpu
& PPC_OPCODE_POWER9
) == 0)
6562 /* For power6, power7, and power8, we want the last nop to
6563 be a group terminating one. Do this by inserting an
6564 rs_fill frag immediately after this one, with its address
6565 set to the last nop location. This will automatically
6566 reduce the number of nops in the current frag by one. */
6569 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6571 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
6572 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
6573 group_nop
->fr_fix
= 0;
6574 group_nop
->fr_offset
= 1;
6575 group_nop
->fr_type
= rs_fill
;
6576 fragP
->fr_next
= group_nop
;
6577 dest
= group_nop
->fr_literal
;
6580 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0)
6582 if (ppc_cpu
& PPC_OPCODE_E500MC
)
6583 /* e500mc group terminating nop: "ori 0,0,0". */
6584 md_number_to_chars (dest
, 0x60000000, 4);
6586 /* power7/power8 group terminating nop: "ori 2,2,0". */
6587 md_number_to_chars (dest
, 0x60420000, 4);
6590 /* power6 group terminating nop: "ori 1,1,0". */
6591 md_number_to_chars (dest
, 0x60210000, 4);
6596 /* Apply a fixup to the object code. This is called for all the
6597 fixups we generated by the calls to fix_new_exp, above. */
6600 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
6602 valueT value
= * valP
;
6604 const struct powerpc_operand
*operand
;
6607 if (fixP
->fx_addsy
!= NULL
)
6609 /* Hack around bfd_install_relocation brain damage. */
6611 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
6613 if (fixP
->fx_addsy
== abs_section_sym
)
6619 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6620 the symbol values. If we are doing this relocation the code in
6621 write.c is going to call bfd_install_relocation, which is also
6622 going to use the symbol value. That means that if the reloc is
6623 fully resolved we want to use *valP since bfd_install_relocation is
6625 However, if the reloc is not fully resolved we do not want to
6626 use *valP, and must use fx_offset instead. If the relocation
6627 is PC-relative, we then need to re-apply md_pcrel_from_section
6628 to this new relocation value. */
6629 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
6634 value
= fixP
->fx_offset
;
6636 value
-= md_pcrel_from_section (fixP
, seg
);
6640 /* We are only able to convert some relocs to pc-relative. */
6643 switch (fixP
->fx_r_type
)
6646 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
6650 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
6654 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
6657 case BFD_RELOC_LO16
:
6658 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
6661 case BFD_RELOC_HI16
:
6662 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
6665 case BFD_RELOC_HI16_S
:
6666 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
6669 case BFD_RELOC_PPC64_ADDR16_HIGH
:
6670 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGH
;
6673 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
6674 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHA
;
6677 case BFD_RELOC_PPC64_HIGHER
:
6678 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER
;
6681 case BFD_RELOC_PPC64_HIGHER_S
:
6682 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA
;
6685 case BFD_RELOC_PPC64_HIGHEST
:
6686 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST
;
6689 case BFD_RELOC_PPC64_HIGHEST_S
:
6690 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA
;
6693 case BFD_RELOC_PPC_16DX_HA
:
6694 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
6701 else if (!fixP
->fx_done
6702 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
6704 /* addpcis is relative to next insn address. */
6706 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
6711 if (fixP
->fx_pcrel_adjust
!= 0)
6713 /* This is a fixup on an instruction. */
6714 int opindex
= fixP
->fx_pcrel_adjust
& 0xff;
6716 operand
= &powerpc_operands
[opindex
];
6718 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6719 does not generate a reloc. It uses the offset of `sym' within its
6720 csect. Other usages, such as `.long sym', generate relocs. This
6721 is the documented behaviour of non-TOC symbols. */
6722 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
6723 && (operand
->bitm
& 0xfff0) == 0xfff0
6724 && operand
->shift
== 0
6725 && (operand
->insert
== NULL
|| ppc_obj64
)
6726 && fixP
->fx_addsy
!= NULL
6727 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
6728 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC
6729 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC0
6730 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
6732 value
= fixP
->fx_offset
;
6736 /* During parsing of instructions, a TOC16 reloc is generated for
6737 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6738 in the toc. But at parse time, SYM may be not yet defined, so
6739 check again here. */
6740 if (fixP
->fx_r_type
== BFD_RELOC_16
6741 && fixP
->fx_addsy
!= NULL
6742 && ppc_is_toc_sym (fixP
->fx_addsy
))
6743 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
6747 /* Calculate value to be stored in field. */
6749 switch (fixP
->fx_r_type
)
6752 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
6753 case BFD_RELOC_PPC_VLE_LO16A
:
6754 case BFD_RELOC_PPC_VLE_LO16D
:
6756 case BFD_RELOC_LO16
:
6757 case BFD_RELOC_LO16_PCREL
:
6758 fieldval
= value
& 0xffff;
6760 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6761 fieldval
= SEX16 (fieldval
);
6762 fixP
->fx_no_overflow
= 1;
6765 case BFD_RELOC_HI16
:
6766 case BFD_RELOC_HI16_PCREL
:
6768 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
6770 fieldval
= value
>> 16;
6771 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6773 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
6774 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
6780 case BFD_RELOC_PPC_VLE_HI16A
:
6781 case BFD_RELOC_PPC_VLE_HI16D
:
6782 case BFD_RELOC_PPC64_ADDR16_HIGH
:
6784 fieldval
= PPC_HI (value
);
6785 goto sign_extend_16
;
6787 case BFD_RELOC_HI16_S
:
6788 case BFD_RELOC_HI16_S_PCREL
:
6789 case BFD_RELOC_PPC_16DX_HA
:
6790 case BFD_RELOC_PPC_REL16DX_HA
:
6792 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
6794 fieldval
= (value
+ 0x8000) >> 16;
6795 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6797 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
6798 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
6804 case BFD_RELOC_PPC_VLE_HA16A
:
6805 case BFD_RELOC_PPC_VLE_HA16D
:
6806 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
6808 fieldval
= PPC_HA (value
);
6809 goto sign_extend_16
;
6812 case BFD_RELOC_PPC64_HIGHER
:
6813 fieldval
= PPC_HIGHER (value
);
6814 goto sign_extend_16
;
6816 case BFD_RELOC_PPC64_HIGHER_S
:
6817 fieldval
= PPC_HIGHERA (value
);
6818 goto sign_extend_16
;
6820 case BFD_RELOC_PPC64_HIGHEST
:
6821 fieldval
= PPC_HIGHEST (value
);
6822 goto sign_extend_16
;
6824 case BFD_RELOC_PPC64_HIGHEST_S
:
6825 fieldval
= PPC_HIGHESTA (value
);
6826 goto sign_extend_16
;
6833 if (operand
!= NULL
)
6835 /* Handle relocs in an insn. */
6836 switch (fixP
->fx_r_type
)
6839 /* The following relocs can't be calculated by the assembler.
6840 Leave the field zero. */
6841 case BFD_RELOC_PPC_TPREL16
:
6842 case BFD_RELOC_PPC_TPREL16_LO
:
6843 case BFD_RELOC_PPC_TPREL16_HI
:
6844 case BFD_RELOC_PPC_TPREL16_HA
:
6845 case BFD_RELOC_PPC_DTPREL16
:
6846 case BFD_RELOC_PPC_DTPREL16_LO
:
6847 case BFD_RELOC_PPC_DTPREL16_HI
:
6848 case BFD_RELOC_PPC_DTPREL16_HA
:
6849 case BFD_RELOC_PPC_GOT_TLSGD16
:
6850 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
6851 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
6852 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
6853 case BFD_RELOC_PPC_GOT_TLSLD16
:
6854 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
6855 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
6856 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
6857 case BFD_RELOC_PPC_GOT_TPREL16
:
6858 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
6859 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
6860 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
6861 case BFD_RELOC_PPC_GOT_DTPREL16
:
6862 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
6863 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
6864 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
6865 case BFD_RELOC_PPC64_TPREL16_DS
:
6866 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
6867 case BFD_RELOC_PPC64_TPREL16_HIGH
:
6868 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
6869 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
6870 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
6871 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
6872 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
6873 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
6874 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
6875 case BFD_RELOC_PPC64_DTPREL16_DS
:
6876 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
6877 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
6878 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
6879 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
6880 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
6881 gas_assert (fixP
->fx_addsy
!= NULL
);
6882 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
6886 /* These also should leave the field zero for the same
6887 reason. Note that older versions of gas wrote values
6888 here. If we want to go back to the old behaviour, then
6889 all _LO and _LO_DS cases will need to be treated like
6890 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6891 case BFD_RELOC_16_GOTOFF
:
6892 case BFD_RELOC_LO16_GOTOFF
:
6893 case BFD_RELOC_HI16_GOTOFF
:
6894 case BFD_RELOC_HI16_S_GOTOFF
:
6895 case BFD_RELOC_LO16_PLTOFF
:
6896 case BFD_RELOC_HI16_PLTOFF
:
6897 case BFD_RELOC_HI16_S_PLTOFF
:
6898 case BFD_RELOC_GPREL16
:
6899 case BFD_RELOC_16_BASEREL
:
6900 case BFD_RELOC_LO16_BASEREL
:
6901 case BFD_RELOC_HI16_BASEREL
:
6902 case BFD_RELOC_HI16_S_BASEREL
:
6903 case BFD_RELOC_PPC_TOC16
:
6904 case BFD_RELOC_PPC64_TOC16_LO
:
6905 case BFD_RELOC_PPC64_TOC16_HI
:
6906 case BFD_RELOC_PPC64_TOC16_HA
:
6907 case BFD_RELOC_PPC64_PLTGOT16
:
6908 case BFD_RELOC_PPC64_PLTGOT16_LO
:
6909 case BFD_RELOC_PPC64_PLTGOT16_HI
:
6910 case BFD_RELOC_PPC64_PLTGOT16_HA
:
6911 case BFD_RELOC_PPC64_GOT16_DS
:
6912 case BFD_RELOC_PPC64_GOT16_LO_DS
:
6913 case BFD_RELOC_PPC64_PLT16_LO_DS
:
6914 case BFD_RELOC_PPC64_SECTOFF_DS
:
6915 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
6916 case BFD_RELOC_PPC64_TOC16_DS
:
6917 case BFD_RELOC_PPC64_TOC16_LO_DS
:
6918 case BFD_RELOC_PPC64_PLTGOT16_DS
:
6919 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
6920 case BFD_RELOC_PPC_EMB_NADDR16
:
6921 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
6922 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
6923 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
6924 case BFD_RELOC_PPC_EMB_SDAI16
:
6925 case BFD_RELOC_PPC_EMB_SDA2I16
:
6926 case BFD_RELOC_PPC_EMB_SDA2REL
:
6927 case BFD_RELOC_PPC_EMB_SDA21
:
6928 case BFD_RELOC_PPC_EMB_MRKREF
:
6929 case BFD_RELOC_PPC_EMB_RELSEC16
:
6930 case BFD_RELOC_PPC_EMB_RELST_LO
:
6931 case BFD_RELOC_PPC_EMB_RELST_HI
:
6932 case BFD_RELOC_PPC_EMB_RELST_HA
:
6933 case BFD_RELOC_PPC_EMB_BIT_FLD
:
6934 case BFD_RELOC_PPC_EMB_RELSDA
:
6935 case BFD_RELOC_PPC_VLE_SDA21
:
6936 case BFD_RELOC_PPC_VLE_SDA21_LO
:
6937 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
6938 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
6939 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
6940 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
6941 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
6942 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
6943 gas_assert (fixP
->fx_addsy
!= NULL
);
6946 case BFD_RELOC_PPC_TLS
:
6947 case BFD_RELOC_PPC_TLSGD
:
6948 case BFD_RELOC_PPC_TLSLD
:
6954 case BFD_RELOC_PPC_B16
:
6955 /* Adjust the offset to the instruction boundary. */
6960 case BFD_RELOC_VTABLE_INHERIT
:
6961 case BFD_RELOC_VTABLE_ENTRY
:
6962 case BFD_RELOC_PPC_DTPMOD
:
6963 case BFD_RELOC_PPC_TPREL
:
6964 case BFD_RELOC_PPC_DTPREL
:
6965 case BFD_RELOC_PPC_COPY
:
6966 case BFD_RELOC_PPC_GLOB_DAT
:
6967 case BFD_RELOC_32_PLT_PCREL
:
6968 case BFD_RELOC_PPC_EMB_NADDR32
:
6969 case BFD_RELOC_PPC64_TOC
:
6970 case BFD_RELOC_CTOR
:
6972 case BFD_RELOC_32_PCREL
:
6975 case BFD_RELOC_64_PCREL
:
6976 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
6977 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
6978 _("%s unsupported as instruction fixup"),
6979 bfd_get_reloc_code_name (fixP
->fx_r_type
));
6988 /* powerpc uses RELA style relocs, so if emitting a reloc the field
6989 contents can stay at zero. */
6990 #define APPLY_RELOC fixP->fx_done
6992 #define APPLY_RELOC 1
6994 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
6997 unsigned char *where
;
6999 /* Fetch the instruction, insert the fully resolved operand
7000 value, and stuff the instruction back again. */
7001 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
7002 if (target_big_endian
)
7004 if (fixP
->fx_size
== 4)
7005 insn
= bfd_getb32 (where
);
7007 insn
= bfd_getb16 (where
);
7011 if (fixP
->fx_size
== 4)
7012 insn
= bfd_getl32 (where
);
7014 insn
= bfd_getl16 (where
);
7016 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
7017 fixP
->tc_fix_data
.ppc_cpu
,
7018 fixP
->fx_file
, fixP
->fx_line
);
7019 if (target_big_endian
)
7021 if (fixP
->fx_size
== 4)
7022 bfd_putb32 (insn
, where
);
7024 bfd_putb16 (insn
, where
);
7028 if (fixP
->fx_size
== 4)
7029 bfd_putl32 (insn
, where
);
7031 bfd_putl16 (insn
, where
);
7036 /* Nothing else to do here. */
7039 gas_assert (fixP
->fx_addsy
!= NULL
);
7040 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
7045 /* Use expr_symbol_where to see if this is an expression
7047 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
7048 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7049 _("unresolved expression that must be resolved"));
7051 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7052 _("unsupported relocation against %s"),
7053 S_GET_NAME (fixP
->fx_addsy
));
7060 /* Handle relocs in data. */
7061 switch (fixP
->fx_r_type
)
7063 case BFD_RELOC_VTABLE_INHERIT
:
7065 && !S_IS_DEFINED (fixP
->fx_addsy
)
7066 && !S_IS_WEAK (fixP
->fx_addsy
))
7067 S_SET_WEAK (fixP
->fx_addsy
);
7070 case BFD_RELOC_VTABLE_ENTRY
:
7075 /* These can appear with @l etc. in data. */
7076 case BFD_RELOC_LO16
:
7077 case BFD_RELOC_LO16_PCREL
:
7078 case BFD_RELOC_HI16
:
7079 case BFD_RELOC_HI16_PCREL
:
7080 case BFD_RELOC_HI16_S
:
7081 case BFD_RELOC_HI16_S_PCREL
:
7082 case BFD_RELOC_PPC64_HIGHER
:
7083 case BFD_RELOC_PPC64_HIGHER_S
:
7084 case BFD_RELOC_PPC64_HIGHEST
:
7085 case BFD_RELOC_PPC64_HIGHEST_S
:
7086 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7087 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7088 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7091 case BFD_RELOC_PPC_DTPMOD
:
7092 case BFD_RELOC_PPC_TPREL
:
7093 case BFD_RELOC_PPC_DTPREL
:
7094 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7097 /* Just punt all of these to the linker. */
7098 case BFD_RELOC_PPC_B16_BRTAKEN
:
7099 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7100 case BFD_RELOC_16_GOTOFF
:
7101 case BFD_RELOC_LO16_GOTOFF
:
7102 case BFD_RELOC_HI16_GOTOFF
:
7103 case BFD_RELOC_HI16_S_GOTOFF
:
7104 case BFD_RELOC_LO16_PLTOFF
:
7105 case BFD_RELOC_HI16_PLTOFF
:
7106 case BFD_RELOC_HI16_S_PLTOFF
:
7107 case BFD_RELOC_PPC_COPY
:
7108 case BFD_RELOC_PPC_GLOB_DAT
:
7109 case BFD_RELOC_16_BASEREL
:
7110 case BFD_RELOC_LO16_BASEREL
:
7111 case BFD_RELOC_HI16_BASEREL
:
7112 case BFD_RELOC_HI16_S_BASEREL
:
7113 case BFD_RELOC_PPC_TLS
:
7114 case BFD_RELOC_PPC_DTPREL16_LO
:
7115 case BFD_RELOC_PPC_DTPREL16_HI
:
7116 case BFD_RELOC_PPC_DTPREL16_HA
:
7117 case BFD_RELOC_PPC_TPREL16_LO
:
7118 case BFD_RELOC_PPC_TPREL16_HI
:
7119 case BFD_RELOC_PPC_TPREL16_HA
:
7120 case BFD_RELOC_PPC_GOT_TLSGD16
:
7121 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7122 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7123 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7124 case BFD_RELOC_PPC_GOT_TLSLD16
:
7125 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7126 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7127 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7128 case BFD_RELOC_PPC_GOT_DTPREL16
:
7129 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7130 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7131 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7132 case BFD_RELOC_PPC_GOT_TPREL16
:
7133 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7134 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7135 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7136 case BFD_RELOC_24_PLT_PCREL
:
7137 case BFD_RELOC_PPC_LOCAL24PC
:
7138 case BFD_RELOC_32_PLT_PCREL
:
7139 case BFD_RELOC_GPREL16
:
7140 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7141 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7142 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7143 case BFD_RELOC_PPC_EMB_NADDR32
:
7144 case BFD_RELOC_PPC_EMB_NADDR16
:
7145 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7146 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7147 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7148 case BFD_RELOC_PPC_EMB_SDAI16
:
7149 case BFD_RELOC_PPC_EMB_SDA2REL
:
7150 case BFD_RELOC_PPC_EMB_SDA2I16
:
7151 case BFD_RELOC_PPC_EMB_SDA21
:
7152 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7153 case BFD_RELOC_PPC_EMB_MRKREF
:
7154 case BFD_RELOC_PPC_EMB_RELSEC16
:
7155 case BFD_RELOC_PPC_EMB_RELST_LO
:
7156 case BFD_RELOC_PPC_EMB_RELST_HI
:
7157 case BFD_RELOC_PPC_EMB_RELST_HA
:
7158 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7159 case BFD_RELOC_PPC_EMB_RELSDA
:
7160 case BFD_RELOC_PPC64_TOC
:
7161 case BFD_RELOC_PPC_TOC16
:
7162 case BFD_RELOC_PPC64_TOC16_LO
:
7163 case BFD_RELOC_PPC64_TOC16_HI
:
7164 case BFD_RELOC_PPC64_TOC16_HA
:
7165 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7166 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7167 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7168 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7169 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7170 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7171 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7172 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7173 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7174 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7175 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7176 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7182 case BFD_RELOC_NONE
:
7184 case BFD_RELOC_CTOR
:
7186 case BFD_RELOC_32_PCREL
:
7189 case BFD_RELOC_64_PCREL
:
7191 case BFD_RELOC_16_PCREL
:
7197 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7202 if (fixP
->fx_size
&& APPLY_RELOC
)
7203 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7204 fieldval
, fixP
->fx_size
);
7206 && (seg
->flags
& SEC_CODE
) != 0
7207 && fixP
->fx_size
== 4
7210 && (fixP
->fx_r_type
== BFD_RELOC_32
7211 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7212 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7213 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7214 _("data in executable section"));
7218 ppc_elf_validate_fix (fixP
, seg
);
7219 fixP
->fx_addnumber
= value
;
7221 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7222 from the section contents. If we are going to be emitting a reloc
7223 then the section contents are immaterial, so don't warn if they
7224 happen to overflow. Leave such warnings to ld. */
7227 fixP
->fx_no_overflow
= 1;
7229 /* Arrange to emit .TOC. as a normal symbol if used in anything
7230 but .TOC.@tocbase. */
7232 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7233 && fixP
->fx_addsy
!= NULL
7234 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7235 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7238 if (fixP
->fx_r_type
!= BFD_RELOC_PPC_TOC16
)
7239 fixP
->fx_addnumber
= 0;
7243 fixP
->fx_addnumber
= 0;
7245 /* We want to use the offset within the toc, not the actual VMA
7247 fixP
->fx_addnumber
=
7248 - bfd_get_section_vma (stdoutput
, S_GET_SEGMENT (fixP
->fx_addsy
))
7249 - S_GET_VALUE (ppc_toc_csect
);
7250 /* Set *valP to avoid errors. */
7257 /* Generate a reloc for a fixup. */
7260 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7264 reloc
= XNEW (arelent
);
7266 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7267 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7268 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7269 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7270 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7272 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7273 _("reloc %d not supported by object file format"),
7274 (int) fixp
->fx_r_type
);
7277 reloc
->addend
= fixp
->fx_addnumber
;
7283 ppc_cfi_frame_initial_instructions (void)
7285 cfi_add_CFA_def_cfa (1, 0);
7289 tc_ppc_regname_to_dw2regnum (char *regname
)
7291 unsigned int regnum
= -1;
7295 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7297 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7298 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7299 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7300 { "spe_acc", 111 }, { "spefscr", 112 }
7303 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7304 if (strcmp (regnames
[i
].name
, regname
) == 0)
7305 return regnames
[i
].dw2regnum
;
7307 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7309 p
= regname
+ 1 + (regname
[1] == '.');
7310 regnum
= strtoul (p
, &q
, 10);
7311 if (p
== q
|| *q
|| regnum
>= 32)
7313 if (regname
[0] == 'f')
7315 else if (regname
[0] == 'v')
7318 else if (regname
[0] == 'c' && regname
[1] == 'r')
7320 p
= regname
+ 2 + (regname
[2] == '.');
7321 if (p
[0] < '0' || p
[0] > '7' || p
[1])
7323 regnum
= p
[0] - '0' + 68;