1 /* tc-xtensa.c -- Assemble Xtensa instructions.
2 Copyright (C) 2003-2016 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
24 #include "safe-ctype.h"
25 #include "tc-xtensa.h"
27 #include "xtensa-relax.h"
28 #include "dwarf2dbg.h"
29 #include "xtensa-istack.h"
30 #include "struc-symbol.h"
31 #include "xtensa-config.h"
33 /* Provide default values for new configuration settings. */
39 #define uint32 unsigned int
42 #define int32 signed int
47 Naming conventions (used somewhat inconsistently):
48 The xtensa_ functions are exported
49 The xg_ functions are internal
51 We also have a couple of different extensibility mechanisms.
52 1) The idiom replacement:
53 This is used when a line is first parsed to
54 replace an instruction pattern with another instruction
55 It is currently limited to replacements of instructions
56 with constant operands.
57 2) The xtensa-relax.c mechanism that has stronger instruction
58 replacement patterns. When an instruction's immediate field
59 does not fit the next instruction sequence is attempted.
60 In addition, "narrow" opcodes are supported this way. */
63 /* Define characters with special meanings to GAS. */
64 const char comment_chars
[] = "#";
65 const char line_comment_chars
[] = "#";
66 const char line_separator_chars
[] = ";";
67 const char EXP_CHARS
[] = "eE";
68 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
71 /* Flags to indicate whether the hardware supports the density and
72 absolute literals options. */
74 bfd_boolean density_supported
= XCHAL_HAVE_DENSITY
;
75 bfd_boolean absolute_literals_supported
= XSHAL_USE_ABSOLUTE_LITERALS
;
77 static vliw_insn cur_vinsn
;
79 unsigned xtensa_num_pipe_stages
;
80 unsigned xtensa_fetch_width
= XCHAL_INST_FETCH_WIDTH
;
82 static enum debug_info_type xt_saved_debug_type
= DEBUG_NONE
;
84 /* Some functions are only valid in the front end. This variable
85 allows us to assert that we haven't crossed over into the
87 static bfd_boolean past_xtensa_end
= FALSE
;
89 /* Flags for properties of the last instruction in a segment. */
90 #define FLAG_IS_A0_WRITER 0x1
91 #define FLAG_IS_BAD_LOOPEND 0x2
94 /* We define a special segment names ".literal" to place literals
95 into. The .fini and .init sections are special because they
96 contain code that is moved together by the linker. We give them
97 their own special .fini.literal and .init.literal sections. */
99 #define LITERAL_SECTION_NAME xtensa_section_rename (".literal")
100 #define LIT4_SECTION_NAME xtensa_section_rename (".lit4")
101 #define INIT_SECTION_NAME xtensa_section_rename (".init")
102 #define FINI_SECTION_NAME xtensa_section_rename (".fini")
105 /* This type is used for the directive_stack to keep track of the
106 state of the literal collection pools. If lit_prefix is set, it is
107 used to determine the literal section names; otherwise, the literal
108 sections are determined based on the current text section. The
109 lit_seg and lit4_seg fields cache these literal sections, with the
110 current_text_seg field used a tag to indicate whether the cached
113 typedef struct lit_state_struct
116 segT current_text_seg
;
121 static lit_state default_lit_sections
;
124 /* We keep a list of literal segments. The seg_list type is the node
125 for this list. The literal_head pointer is the head of the list,
126 with the literal_head_h dummy node at the start. */
128 typedef struct seg_list_struct
130 struct seg_list_struct
*next
;
134 static seg_list literal_head_h
;
135 static seg_list
*literal_head
= &literal_head_h
;
138 /* Lists of symbols. We keep a list of symbols that label the current
139 instruction, so that we can adjust the symbols when inserting alignment
140 for various instructions. We also keep a list of all the symbols on
141 literals, so that we can fix up those symbols when the literals are
142 later moved into the text sections. */
144 typedef struct sym_list_struct
146 struct sym_list_struct
*next
;
150 static sym_list
*insn_labels
= NULL
;
151 static sym_list
*free_insn_labels
= NULL
;
152 static sym_list
*saved_insn_labels
= NULL
;
154 static sym_list
*literal_syms
;
157 /* Flags to determine whether to prefer const16 or l32r
158 if both options are available. */
159 int prefer_const16
= 0;
162 /* Global flag to indicate when we are emitting literals. */
163 int generating_literals
= 0;
165 /* The following PROPERTY table definitions are copied from
166 <elf/xtensa.h> and must be kept in sync with the code there. */
168 /* Flags in the property tables to specify whether blocks of memory
169 are literals, instructions, data, or unreachable. For
170 instructions, blocks that begin loop targets and branch targets are
171 designated. Blocks that do not allow density, instruction
172 reordering or transformation are also specified. Finally, for
173 branch targets, branch target alignment priority is included.
174 Alignment of the next block is specified in the current block
175 and the size of the current block does not include any fill required
176 to align to the next block. */
178 #define XTENSA_PROP_LITERAL 0x00000001
179 #define XTENSA_PROP_INSN 0x00000002
180 #define XTENSA_PROP_DATA 0x00000004
181 #define XTENSA_PROP_UNREACHABLE 0x00000008
182 /* Instruction only properties at beginning of code. */
183 #define XTENSA_PROP_INSN_LOOP_TARGET 0x00000010
184 #define XTENSA_PROP_INSN_BRANCH_TARGET 0x00000020
185 /* Instruction only properties about code. */
186 #define XTENSA_PROP_INSN_NO_DENSITY 0x00000040
187 #define XTENSA_PROP_INSN_NO_REORDER 0x00000080
188 /* Historically, NO_TRANSFORM was a property of instructions,
189 but it should apply to literals under certain circumstances. */
190 #define XTENSA_PROP_NO_TRANSFORM 0x00000100
192 /* Branch target alignment information. This transmits information
193 to the linker optimization about the priority of aligning a
194 particular block for branch target alignment: None, low priority,
195 high priority, or required. These only need to be checked in
196 instruction blocks marked as XTENSA_PROP_INSN_BRANCH_TARGET.
199 switch (GET_XTENSA_PROP_BT_ALIGN (flags))
200 case XTENSA_PROP_BT_ALIGN_NONE:
201 case XTENSA_PROP_BT_ALIGN_LOW:
202 case XTENSA_PROP_BT_ALIGN_HIGH:
203 case XTENSA_PROP_BT_ALIGN_REQUIRE:
205 #define XTENSA_PROP_BT_ALIGN_MASK 0x00000600
207 /* No branch target alignment. */
208 #define XTENSA_PROP_BT_ALIGN_NONE 0x0
209 /* Low priority branch target alignment. */
210 #define XTENSA_PROP_BT_ALIGN_LOW 0x1
211 /* High priority branch target alignment. */
212 #define XTENSA_PROP_BT_ALIGN_HIGH 0x2
213 /* Required branch target alignment. */
214 #define XTENSA_PROP_BT_ALIGN_REQUIRE 0x3
216 #define GET_XTENSA_PROP_BT_ALIGN(flag) \
217 (((unsigned) ((flag) & (XTENSA_PROP_BT_ALIGN_MASK))) >> 9)
218 #define SET_XTENSA_PROP_BT_ALIGN(flag, align) \
219 (((flag) & (~XTENSA_PROP_BT_ALIGN_MASK)) | \
220 (((align) << 9) & XTENSA_PROP_BT_ALIGN_MASK))
223 /* Alignment is specified in the block BEFORE the one that needs
224 alignment. Up to 5 bits. Use GET_XTENSA_PROP_ALIGNMENT(flags) to
225 get the required alignment specified as a power of 2. Use
226 SET_XTENSA_PROP_ALIGNMENT(flags, pow2) to set the required
227 alignment. Be careful of side effects since the SET will evaluate
228 flags twice. Also, note that the SIZE of a block in the property
229 table does not include the alignment size, so the alignment fill
230 must be calculated to determine if two blocks are contiguous.
231 TEXT_ALIGN is not currently implemented but is a placeholder for a
232 possible future implementation. */
234 #define XTENSA_PROP_ALIGN 0x00000800
236 #define XTENSA_PROP_ALIGNMENT_MASK 0x0001f000
238 #define GET_XTENSA_PROP_ALIGNMENT(flag) \
239 (((unsigned) ((flag) & (XTENSA_PROP_ALIGNMENT_MASK))) >> 12)
240 #define SET_XTENSA_PROP_ALIGNMENT(flag, align) \
241 (((flag) & (~XTENSA_PROP_ALIGNMENT_MASK)) | \
242 (((align) << 12) & XTENSA_PROP_ALIGNMENT_MASK))
244 #define XTENSA_PROP_INSN_ABSLIT 0x00020000
247 /* Structure for saving instruction and alignment per-fragment data
248 that will be written to the object file. This structure is
249 equivalent to the actual data that will be written out to the file
250 but is easier to use. We provide a conversion to file flags
251 in frag_flags_to_number. */
253 typedef struct frag_flags_struct frag_flags
;
255 struct frag_flags_struct
257 /* is_literal should only be used after xtensa_move_literals.
258 If you need to check if you are generating a literal fragment,
259 then use the generating_literals global. */
261 unsigned is_literal
: 1;
262 unsigned is_insn
: 1;
263 unsigned is_data
: 1;
264 unsigned is_unreachable
: 1;
266 /* is_specific_opcode implies no_transform. */
267 unsigned is_no_transform
: 1;
271 unsigned is_loop_target
: 1;
272 unsigned is_branch_target
: 1; /* Branch targets have a priority. */
273 unsigned bt_align_priority
: 2;
275 unsigned is_no_density
: 1;
276 /* no_longcalls flag does not need to be placed in the object file. */
278 unsigned is_no_reorder
: 1;
280 /* Uses absolute literal addressing for l32r. */
281 unsigned is_abslit
: 1;
283 unsigned is_align
: 1;
284 unsigned alignment
: 5;
288 /* Structure for saving information about a block of property data
289 for frags that have the same flags. */
290 struct xtensa_block_info_struct
296 struct xtensa_block_info_struct
*next
;
300 /* Structure for saving the current state before emitting literals. */
301 typedef struct emit_state_struct
306 int generating_literals
;
310 /* Opcode placement information */
312 typedef unsigned long long bitfield
;
313 #define bit_is_set(bit, bf) ((bf) & (0x01ll << (bit)))
314 #define set_bit(bit, bf) ((bf) |= (0x01ll << (bit)))
315 #define clear_bit(bit, bf) ((bf) &= ~(0x01ll << (bit)))
317 #define MAX_FORMATS 32
319 typedef struct op_placement_info_struct
322 /* A number describing how restrictive the issue is for this
323 opcode. For example, an opcode that fits lots of different
324 formats has a high freedom, as does an opcode that fits
325 only one format but many slots in that format. The most
326 restrictive is the opcode that fits only one slot in one
329 xtensa_format narrowest
;
333 /* formats is a bitfield with the Nth bit set
334 if the opcode fits in the Nth xtensa_format. */
337 /* slots[N]'s Mth bit is set if the op fits in the
338 Mth slot of the Nth xtensa_format. */
339 bitfield slots
[MAX_FORMATS
];
341 /* A count of the number of slots in a given format
342 an op can fit (i.e., the bitcount of the slot field above). */
343 char slots_in_format
[MAX_FORMATS
];
345 } op_placement_info
, *op_placement_info_table
;
347 op_placement_info_table op_placement_table
;
350 /* Extra expression types. */
352 #define O_pltrel O_md1 /* like O_symbol but use a PLT reloc */
353 #define O_hi16 O_md2 /* use high 16 bits of symbolic value */
354 #define O_lo16 O_md3 /* use low 16 bits of symbolic value */
355 #define O_pcrel O_md4 /* value is a PC-relative offset */
356 #define O_tlsfunc O_md5 /* TLS_FUNC/TLSDESC_FN relocation */
357 #define O_tlsarg O_md6 /* TLS_ARG/TLSDESC_ARG relocation */
358 #define O_tlscall O_md7 /* TLS_CALL relocation */
359 #define O_tpoff O_md8 /* TPOFF relocation */
360 #define O_dtpoff O_md9 /* DTPOFF relocation */
362 struct suffix_reloc_map
366 bfd_reloc_code_real_type reloc
;
367 unsigned char operator;
370 #define SUFFIX_MAP(str, reloc, op) { str, sizeof (str) - 1, reloc, op }
372 static struct suffix_reloc_map suffix_relocs
[] =
374 SUFFIX_MAP ("l", BFD_RELOC_LO16
, O_lo16
),
375 SUFFIX_MAP ("h", BFD_RELOC_HI16
, O_hi16
),
376 SUFFIX_MAP ("plt", BFD_RELOC_XTENSA_PLT
, O_pltrel
),
377 SUFFIX_MAP ("pcrel", BFD_RELOC_32_PCREL
, O_pcrel
),
378 SUFFIX_MAP ("tlsfunc", BFD_RELOC_XTENSA_TLS_FUNC
, O_tlsfunc
),
379 SUFFIX_MAP ("tlsarg", BFD_RELOC_XTENSA_TLS_ARG
, O_tlsarg
),
380 SUFFIX_MAP ("tlscall", BFD_RELOC_XTENSA_TLS_CALL
, O_tlscall
),
381 SUFFIX_MAP ("tpoff", BFD_RELOC_XTENSA_TLS_TPOFF
, O_tpoff
),
382 SUFFIX_MAP ("dtpoff", BFD_RELOC_XTENSA_TLS_DTPOFF
, O_dtpoff
),
383 { (char *) 0, 0, BFD_RELOC_UNUSED
, 0 }
397 directive_literal_prefix
,
399 directive_absolute_literals
,
400 directive_last_directive
406 bfd_boolean can_be_negated
;
409 const directive_infoS directive_info
[] =
412 { "literal", FALSE
},
414 { "transform", TRUE
},
415 { "freeregs", FALSE
},
416 { "longcalls", TRUE
},
417 { "literal_prefix", FALSE
},
418 { "schedule", TRUE
},
419 { "absolute-literals", TRUE
}
422 bfd_boolean directive_state
[] =
426 #if !XCHAL_HAVE_DENSITY
431 TRUE
, /* transform */
432 FALSE
, /* freeregs */
433 FALSE
, /* longcalls */
434 FALSE
, /* literal_prefix */
435 FALSE
, /* schedule */
436 #if XSHAL_USE_ABSOLUTE_LITERALS
437 TRUE
/* absolute_literals */
439 FALSE
/* absolute_literals */
443 /* A circular list of all potential and actual literal pool locations
447 struct litpool_frag
*next
;
448 struct litpool_frag
*prev
;
451 short priority
; /* 1, 2, or 3 -- 1 is highest */
452 short original_priority
;
455 /* Map a segment to its litpool_frag list. */
458 struct litpool_seg
*next
;
460 struct litpool_frag frag_list
;
461 int frag_count
; /* since last litpool location */
464 static struct litpool_seg litpool_seg_list
;
467 /* Directive functions. */
469 static void xtensa_begin_directive (int);
470 static void xtensa_end_directive (int);
471 static void xtensa_literal_prefix (void);
472 static void xtensa_literal_position (int);
473 static void xtensa_literal_pseudo (int);
474 static void xtensa_frequency_pseudo (int);
475 static void xtensa_elf_cons (int);
476 static void xtensa_leb128 (int);
478 /* Parsing and Idiom Translation. */
480 static bfd_reloc_code_real_type
xtensa_elf_suffix (char **, expressionS
*);
482 /* Various Other Internal Functions. */
484 extern bfd_boolean
xg_is_single_relaxable_insn (TInsn
*, TInsn
*, bfd_boolean
);
485 static bfd_boolean
xg_build_to_insn (TInsn
*, TInsn
*, BuildInstr
*);
486 static void xtensa_mark_literal_pool_location (void);
487 static addressT
get_expanded_loop_offset (xtensa_opcode
);
488 static fragS
*get_literal_pool_location (segT
);
489 static void set_literal_pool_location (segT
, fragS
*);
490 static void xtensa_set_frag_assembly_state (fragS
*);
491 static void finish_vinsn (vliw_insn
*);
492 static bfd_boolean
emit_single_op (TInsn
*);
493 static int total_frag_text_expansion (fragS
*);
494 static bfd_boolean use_trampolines
= TRUE
;
495 static void xtensa_check_frag_count (void);
496 static void xtensa_create_trampoline_frag (bfd_boolean
);
497 static void xtensa_maybe_create_trampoline_frag (void);
498 struct trampoline_frag
;
499 static int init_trampoline_frag (struct trampoline_frag
*);
500 static void xtensa_maybe_create_literal_pool_frag (bfd_boolean
, bfd_boolean
);
501 static bfd_boolean auto_litpools
= FALSE
;
502 static int auto_litpool_limit
= 10000;
504 /* Alignment Functions. */
506 static int get_text_align_power (unsigned);
507 static int get_text_align_max_fill_size (int, bfd_boolean
, bfd_boolean
);
508 static int branch_align_power (segT
);
510 /* Helpers for xtensa_relax_frag(). */
512 static long relax_frag_add_nop (fragS
*);
514 /* Accessors for additional per-subsegment information. */
516 static unsigned get_last_insn_flags (segT
, subsegT
);
517 static void set_last_insn_flags (segT
, subsegT
, unsigned, bfd_boolean
);
518 static float get_subseg_total_freq (segT
, subsegT
);
519 static float get_subseg_target_freq (segT
, subsegT
);
520 static void set_subseg_freq (segT
, subsegT
, float, float);
522 /* Segment list functions. */
524 static void xtensa_move_literals (void);
525 static void xtensa_reorder_segments (void);
526 static void xtensa_switch_to_literal_fragment (emit_state
*);
527 static void xtensa_switch_to_non_abs_literal_fragment (emit_state
*);
528 static void xtensa_switch_section_emit_state (emit_state
*, segT
, subsegT
);
529 static void xtensa_restore_emit_state (emit_state
*);
530 static segT
cache_literal_section (bfd_boolean
);
532 /* Import from elf32-xtensa.c in BFD library. */
534 extern asection
*xtensa_make_property_section (asection
*, const char *);
536 /* op_placement_info functions. */
538 static void init_op_placement_info_table (void);
539 extern bfd_boolean
opcode_fits_format_slot (xtensa_opcode
, xtensa_format
, int);
540 static int xg_get_single_size (xtensa_opcode
);
541 static xtensa_format
xg_get_single_format (xtensa_opcode
);
542 static int xg_get_single_slot (xtensa_opcode
);
544 /* TInsn and IStack functions. */
546 static bfd_boolean
tinsn_has_symbolic_operands (const TInsn
*);
547 static bfd_boolean
tinsn_has_invalid_symbolic_operands (const TInsn
*);
548 static bfd_boolean
tinsn_has_complex_operands (const TInsn
*);
549 static bfd_boolean
tinsn_to_insnbuf (TInsn
*, xtensa_insnbuf
);
550 static bfd_boolean
tinsn_check_arguments (const TInsn
*);
551 static void tinsn_from_chars (TInsn
*, char *, int);
552 static void tinsn_immed_from_frag (TInsn
*, fragS
*, int);
553 static int get_num_stack_text_bytes (IStack
*);
554 static int get_num_stack_literal_bytes (IStack
*);
555 static bfd_boolean
tinsn_to_slotbuf (xtensa_format
, int, TInsn
*, xtensa_insnbuf
);
557 /* vliw_insn functions. */
559 static void xg_init_vinsn (vliw_insn
*);
560 static void xg_copy_vinsn (vliw_insn
*, vliw_insn
*);
561 static void xg_clear_vinsn (vliw_insn
*);
562 static bfd_boolean
vinsn_has_specific_opcodes (vliw_insn
*);
563 static void xg_free_vinsn (vliw_insn
*);
564 static bfd_boolean vinsn_to_insnbuf
565 (vliw_insn
*, char *, fragS
*, bfd_boolean
);
566 static void vinsn_from_chars (vliw_insn
*, char *);
568 /* Expression Utilities. */
570 bfd_boolean
expr_is_const (const expressionS
*);
571 offsetT
get_expr_const (const expressionS
*);
572 void set_expr_const (expressionS
*, offsetT
);
573 bfd_boolean
expr_is_register (const expressionS
*);
574 offsetT
get_expr_register (const expressionS
*);
575 void set_expr_symbol_offset (expressionS
*, symbolS
*, offsetT
);
576 bfd_boolean
expr_is_equal (expressionS
*, expressionS
*);
577 static void copy_expr (expressionS
*, const expressionS
*);
579 /* Section renaming. */
581 static void build_section_rename (const char *);
584 /* ISA imported from bfd. */
585 extern xtensa_isa xtensa_default_isa
;
587 extern int target_big_endian
;
589 static xtensa_opcode xtensa_addi_opcode
;
590 static xtensa_opcode xtensa_addmi_opcode
;
591 static xtensa_opcode xtensa_call0_opcode
;
592 static xtensa_opcode xtensa_call4_opcode
;
593 static xtensa_opcode xtensa_call8_opcode
;
594 static xtensa_opcode xtensa_call12_opcode
;
595 static xtensa_opcode xtensa_callx0_opcode
;
596 static xtensa_opcode xtensa_callx4_opcode
;
597 static xtensa_opcode xtensa_callx8_opcode
;
598 static xtensa_opcode xtensa_callx12_opcode
;
599 static xtensa_opcode xtensa_const16_opcode
;
600 static xtensa_opcode xtensa_entry_opcode
;
601 static xtensa_opcode xtensa_extui_opcode
;
602 static xtensa_opcode xtensa_movi_opcode
;
603 static xtensa_opcode xtensa_movi_n_opcode
;
604 static xtensa_opcode xtensa_isync_opcode
;
605 static xtensa_opcode xtensa_j_opcode
;
606 static xtensa_opcode xtensa_jx_opcode
;
607 static xtensa_opcode xtensa_l32r_opcode
;
608 static xtensa_opcode xtensa_loop_opcode
;
609 static xtensa_opcode xtensa_loopnez_opcode
;
610 static xtensa_opcode xtensa_loopgtz_opcode
;
611 static xtensa_opcode xtensa_nop_opcode
;
612 static xtensa_opcode xtensa_nop_n_opcode
;
613 static xtensa_opcode xtensa_or_opcode
;
614 static xtensa_opcode xtensa_ret_opcode
;
615 static xtensa_opcode xtensa_ret_n_opcode
;
616 static xtensa_opcode xtensa_retw_opcode
;
617 static xtensa_opcode xtensa_retw_n_opcode
;
618 static xtensa_opcode xtensa_rsr_lcount_opcode
;
619 static xtensa_opcode xtensa_waiti_opcode
;
620 static int config_max_slots
= 0;
623 /* Command-line Options. */
625 bfd_boolean use_literal_section
= TRUE
;
626 enum flix_level produce_flix
= FLIX_ALL
;
627 static bfd_boolean align_targets
= TRUE
;
628 static bfd_boolean warn_unaligned_branch_targets
= FALSE
;
629 static bfd_boolean has_a0_b_retw
= FALSE
;
630 static bfd_boolean workaround_a0_b_retw
= FALSE
;
631 static bfd_boolean workaround_b_j_loop_end
= FALSE
;
632 static bfd_boolean workaround_short_loop
= FALSE
;
633 static bfd_boolean maybe_has_short_loop
= FALSE
;
634 static bfd_boolean workaround_close_loop_end
= FALSE
;
635 static bfd_boolean maybe_has_close_loop_end
= FALSE
;
636 static bfd_boolean enforce_three_byte_loop_align
= FALSE
;
638 /* When workaround_short_loops is TRUE, all loops with early exits must
639 have at least 3 instructions. workaround_all_short_loops is a modifier
640 to the workaround_short_loop flag. In addition to the
641 workaround_short_loop actions, all straightline loopgtz and loopnez
642 must have at least 3 instructions. */
644 static bfd_boolean workaround_all_short_loops
= FALSE
;
648 xtensa_setup_hw_workarounds (int earliest
, int latest
)
650 if (earliest
> latest
)
651 as_fatal (_("illegal range of target hardware versions"));
653 /* Enable all workarounds for pre-T1050.0 hardware. */
654 if (earliest
< 105000 || latest
< 105000)
656 workaround_a0_b_retw
|= TRUE
;
657 workaround_b_j_loop_end
|= TRUE
;
658 workaround_short_loop
|= TRUE
;
659 workaround_close_loop_end
|= TRUE
;
660 workaround_all_short_loops
|= TRUE
;
661 enforce_three_byte_loop_align
= TRUE
;
668 option_density
= OPTION_MD_BASE
,
672 option_no_generate_flix
,
679 option_no_link_relax
,
687 option_text_section_literals
,
688 option_no_text_section_literals
,
690 option_absolute_literals
,
691 option_no_absolute_literals
,
693 option_align_targets
,
694 option_no_align_targets
,
696 option_warn_unaligned_targets
,
701 option_workaround_a0_b_retw
,
702 option_no_workaround_a0_b_retw
,
704 option_workaround_b_j_loop_end
,
705 option_no_workaround_b_j_loop_end
,
707 option_workaround_short_loop
,
708 option_no_workaround_short_loop
,
710 option_workaround_all_short_loops
,
711 option_no_workaround_all_short_loops
,
713 option_workaround_close_loop_end
,
714 option_no_workaround_close_loop_end
,
716 option_no_workarounds
,
718 option_rename_section_name
,
721 option_prefer_const16
,
723 option_target_hardware
,
726 option_no_trampolines
,
728 option_auto_litpools
,
729 option_no_auto_litpools
,
730 option_auto_litpool_limit
,
733 const char *md_shortopts
= "";
735 struct option md_longopts
[] =
737 { "density", no_argument
, NULL
, option_density
},
738 { "no-density", no_argument
, NULL
, option_no_density
},
740 { "flix", no_argument
, NULL
, option_flix
},
741 { "no-generate-flix", no_argument
, NULL
, option_no_generate_flix
},
742 { "no-allow-flix", no_argument
, NULL
, option_no_flix
},
744 /* Both "relax" and "generics" are deprecated and treated as equivalent
745 to the "transform" option. */
746 { "relax", no_argument
, NULL
, option_relax
},
747 { "no-relax", no_argument
, NULL
, option_no_relax
},
748 { "generics", no_argument
, NULL
, option_generics
},
749 { "no-generics", no_argument
, NULL
, option_no_generics
},
751 { "transform", no_argument
, NULL
, option_transform
},
752 { "no-transform", no_argument
, NULL
, option_no_transform
},
753 { "text-section-literals", no_argument
, NULL
, option_text_section_literals
},
754 { "no-text-section-literals", no_argument
, NULL
,
755 option_no_text_section_literals
},
756 { "absolute-literals", no_argument
, NULL
, option_absolute_literals
},
757 { "no-absolute-literals", no_argument
, NULL
, option_no_absolute_literals
},
758 /* This option was changed from -align-target to -target-align
759 because it conflicted with the "-al" option. */
760 { "target-align", no_argument
, NULL
, option_align_targets
},
761 { "no-target-align", no_argument
, NULL
, option_no_align_targets
},
762 { "warn-unaligned-targets", no_argument
, NULL
,
763 option_warn_unaligned_targets
},
764 { "longcalls", no_argument
, NULL
, option_longcalls
},
765 { "no-longcalls", no_argument
, NULL
, option_no_longcalls
},
767 { "no-workaround-a0-b-retw", no_argument
, NULL
,
768 option_no_workaround_a0_b_retw
},
769 { "workaround-a0-b-retw", no_argument
, NULL
, option_workaround_a0_b_retw
},
771 { "no-workaround-b-j-loop-end", no_argument
, NULL
,
772 option_no_workaround_b_j_loop_end
},
773 { "workaround-b-j-loop-end", no_argument
, NULL
,
774 option_workaround_b_j_loop_end
},
776 { "no-workaround-short-loops", no_argument
, NULL
,
777 option_no_workaround_short_loop
},
778 { "workaround-short-loops", no_argument
, NULL
,
779 option_workaround_short_loop
},
781 { "no-workaround-all-short-loops", no_argument
, NULL
,
782 option_no_workaround_all_short_loops
},
783 { "workaround-all-short-loop", no_argument
, NULL
,
784 option_workaround_all_short_loops
},
786 { "prefer-l32r", no_argument
, NULL
, option_prefer_l32r
},
787 { "prefer-const16", no_argument
, NULL
, option_prefer_const16
},
789 { "no-workarounds", no_argument
, NULL
, option_no_workarounds
},
791 { "no-workaround-close-loop-end", no_argument
, NULL
,
792 option_no_workaround_close_loop_end
},
793 { "workaround-close-loop-end", no_argument
, NULL
,
794 option_workaround_close_loop_end
},
796 { "rename-section", required_argument
, NULL
, option_rename_section_name
},
798 { "link-relax", no_argument
, NULL
, option_link_relax
},
799 { "no-link-relax", no_argument
, NULL
, option_no_link_relax
},
801 { "target-hardware", required_argument
, NULL
, option_target_hardware
},
803 { "trampolines", no_argument
, NULL
, option_trampolines
},
804 { "no-trampolines", no_argument
, NULL
, option_no_trampolines
},
806 { "auto-litpools", no_argument
, NULL
, option_auto_litpools
},
807 { "no-auto-litpools", no_argument
, NULL
, option_no_auto_litpools
},
808 { "auto-litpool-limit", required_argument
, NULL
, option_auto_litpool_limit
},
810 { NULL
, no_argument
, NULL
, 0 }
813 size_t md_longopts_size
= sizeof md_longopts
;
817 md_parse_option (int c
, const char *arg
)
822 as_warn (_("--density option is ignored"));
824 case option_no_density
:
825 as_warn (_("--no-density option is ignored"));
827 case option_link_relax
:
830 case option_no_link_relax
:
834 produce_flix
= FLIX_ALL
;
836 case option_no_generate_flix
:
837 produce_flix
= FLIX_NO_GENERATE
;
840 produce_flix
= FLIX_NONE
;
842 case option_generics
:
843 as_warn (_("--generics is deprecated; use --transform instead"));
844 return md_parse_option (option_transform
, arg
);
845 case option_no_generics
:
846 as_warn (_("--no-generics is deprecated; use --no-transform instead"));
847 return md_parse_option (option_no_transform
, arg
);
849 as_warn (_("--relax is deprecated; use --transform instead"));
850 return md_parse_option (option_transform
, arg
);
851 case option_no_relax
:
852 as_warn (_("--no-relax is deprecated; use --no-transform instead"));
853 return md_parse_option (option_no_transform
, arg
);
854 case option_longcalls
:
855 directive_state
[directive_longcalls
] = TRUE
;
857 case option_no_longcalls
:
858 directive_state
[directive_longcalls
] = FALSE
;
860 case option_text_section_literals
:
861 use_literal_section
= FALSE
;
863 case option_no_text_section_literals
:
864 use_literal_section
= TRUE
;
866 case option_absolute_literals
:
867 if (!absolute_literals_supported
)
869 as_fatal (_("--absolute-literals option not supported in this Xtensa configuration"));
872 directive_state
[directive_absolute_literals
] = TRUE
;
874 case option_no_absolute_literals
:
875 directive_state
[directive_absolute_literals
] = FALSE
;
878 case option_workaround_a0_b_retw
:
879 workaround_a0_b_retw
= TRUE
;
881 case option_no_workaround_a0_b_retw
:
882 workaround_a0_b_retw
= FALSE
;
884 case option_workaround_b_j_loop_end
:
885 workaround_b_j_loop_end
= TRUE
;
887 case option_no_workaround_b_j_loop_end
:
888 workaround_b_j_loop_end
= FALSE
;
891 case option_workaround_short_loop
:
892 workaround_short_loop
= TRUE
;
894 case option_no_workaround_short_loop
:
895 workaround_short_loop
= FALSE
;
898 case option_workaround_all_short_loops
:
899 workaround_all_short_loops
= TRUE
;
901 case option_no_workaround_all_short_loops
:
902 workaround_all_short_loops
= FALSE
;
905 case option_workaround_close_loop_end
:
906 workaround_close_loop_end
= TRUE
;
908 case option_no_workaround_close_loop_end
:
909 workaround_close_loop_end
= FALSE
;
912 case option_no_workarounds
:
913 workaround_a0_b_retw
= FALSE
;
914 workaround_b_j_loop_end
= FALSE
;
915 workaround_short_loop
= FALSE
;
916 workaround_all_short_loops
= FALSE
;
917 workaround_close_loop_end
= FALSE
;
920 case option_align_targets
:
921 align_targets
= TRUE
;
923 case option_no_align_targets
:
924 align_targets
= FALSE
;
927 case option_warn_unaligned_targets
:
928 warn_unaligned_branch_targets
= TRUE
;
931 case option_rename_section_name
:
932 build_section_rename (arg
);
936 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
937 should be emitted or not. FIXME: Not implemented. */
940 case option_prefer_l32r
:
942 as_fatal (_("prefer-l32r conflicts with prefer-const16"));
946 case option_prefer_const16
:
948 as_fatal (_("prefer-const16 conflicts with prefer-l32r"));
952 case option_target_hardware
:
954 int earliest
, latest
= 0;
956 if (*arg
== 0 || *arg
== '-')
957 as_fatal (_("invalid target hardware version"));
959 earliest
= strtol (arg
, &end
, 0);
963 else if (*end
== '-')
966 as_fatal (_("invalid target hardware version"));
967 latest
= strtol (end
, &end
, 0);
970 as_fatal (_("invalid target hardware version"));
972 xtensa_setup_hw_workarounds (earliest
, latest
);
976 case option_transform
:
977 /* This option has no affect other than to use the defaults,
978 which are already set. */
981 case option_no_transform
:
982 /* This option turns off all transformations of any kind.
983 However, because we want to preserve the state of other
984 directives, we only change its own field. Thus, before
985 you perform any transformation, always check if transform
986 is available. If you use the functions we provide for this
987 purpose, you will be ok. */
988 directive_state
[directive_transform
] = FALSE
;
991 case option_trampolines
:
992 use_trampolines
= TRUE
;
995 case option_no_trampolines
:
996 use_trampolines
= FALSE
;
999 case option_auto_litpools
:
1000 auto_litpools
= TRUE
;
1001 use_literal_section
= FALSE
;
1004 case option_no_auto_litpools
:
1005 auto_litpools
= FALSE
;
1006 auto_litpool_limit
= -1;
1009 case option_auto_litpool_limit
:
1013 if (auto_litpool_limit
< 0)
1014 as_fatal (_("no-auto-litpools is incompatible with auto-litpool-limit"));
1015 if (*arg
== 0 || *arg
== '-')
1016 as_fatal (_("invalid auto-litpool-limit argument"));
1017 value
= strtol (arg
, &end
, 10);
1019 as_fatal (_("invalid auto-litpool-limit argument"));
1020 if (value
< 100 || value
> 10000)
1021 as_fatal (_("invalid auto-litpool-limit argument (range is 100-10000)"));
1022 auto_litpool_limit
= value
;
1023 auto_litpools
= TRUE
;
1024 use_literal_section
= FALSE
;
1035 md_show_usage (FILE *stream
)
1039 --[no-]text-section-literals\n\
1040 [Do not] put literals in the text section\n\
1041 --[no-]absolute-literals\n\
1042 [Do not] default to use non-PC-relative literals\n\
1043 --[no-]target-align [Do not] try to align branch targets\n\
1044 --[no-]longcalls [Do not] emit 32-bit call sequences\n\
1045 --[no-]transform [Do not] transform instructions\n\
1046 --flix both allow hand-written and generate flix bundles\n\
1047 --no-generate-flix allow hand-written but do not generate\n\
1049 --no-allow-flix neither allow hand-written nor generate\n\
1051 --rename-section old=new Rename section 'old' to 'new'\n\
1052 --[no-]trampolines [Do not] generate trampolines (jumps to jumps)\n\
1053 when jumps do not reach their targets\n\
1054 --[no-]auto-litpools [Do not] automatically create literal pools\n\
1055 --auto-litpool-limit=<value>\n\
1056 (range 100-10000) Maximum number of blocks of\n\
1057 instructions to emit between literal pool\n\
1058 locations; implies --auto-litpools flag\n", stream
);
1062 /* Functions related to the list of current label symbols. */
1065 xtensa_add_insn_label (symbolS
*sym
)
1069 if (!free_insn_labels
)
1070 l
= (sym_list
*) xmalloc (sizeof (sym_list
));
1073 l
= free_insn_labels
;
1074 free_insn_labels
= l
->next
;
1078 l
->next
= insn_labels
;
1084 xtensa_clear_insn_labels (void)
1088 for (pl
= &free_insn_labels
; *pl
!= NULL
; pl
= &(*pl
)->next
)
1096 xtensa_move_labels (fragS
*new_frag
, valueT new_offset
)
1100 for (lit
= insn_labels
; lit
; lit
= lit
->next
)
1102 symbolS
*lit_sym
= lit
->sym
;
1103 S_SET_VALUE (lit_sym
, new_offset
);
1104 symbol_set_frag (lit_sym
, new_frag
);
1109 /* Directive data and functions. */
1111 typedef struct state_stackS_struct
1113 directiveE directive
;
1114 bfd_boolean negated
;
1115 bfd_boolean old_state
;
1119 struct state_stackS_struct
*prev
;
1122 state_stackS
*directive_state_stack
;
1124 const pseudo_typeS md_pseudo_table
[] =
1126 { "align", s_align_bytes
, 0 }, /* Defaulting is invalid (0). */
1127 { "literal_position", xtensa_literal_position
, 0 },
1128 { "frame", s_ignore
, 0 }, /* Formerly used for STABS debugging. */
1129 { "long", xtensa_elf_cons
, 4 },
1130 { "word", xtensa_elf_cons
, 4 },
1131 { "4byte", xtensa_elf_cons
, 4 },
1132 { "short", xtensa_elf_cons
, 2 },
1133 { "2byte", xtensa_elf_cons
, 2 },
1134 { "sleb128", xtensa_leb128
, 1},
1135 { "uleb128", xtensa_leb128
, 0},
1136 { "begin", xtensa_begin_directive
, 0 },
1137 { "end", xtensa_end_directive
, 0 },
1138 { "literal", xtensa_literal_pseudo
, 0 },
1139 { "frequency", xtensa_frequency_pseudo
, 0 },
1145 use_transform (void)
1147 /* After md_end, you should be checking frag by frag, rather
1148 than state directives. */
1149 gas_assert (!past_xtensa_end
);
1150 return directive_state
[directive_transform
];
1155 do_align_targets (void)
1157 /* Do not use this function after md_end; just look at align_targets
1158 instead. There is no target-align directive, so alignment is either
1159 enabled for all frags or not done at all. */
1160 gas_assert (!past_xtensa_end
);
1161 return align_targets
&& use_transform ();
1166 directive_push (directiveE directive
, bfd_boolean negated
, const void *datum
)
1170 state_stackS
*stack
= (state_stackS
*) xmalloc (sizeof (state_stackS
));
1172 file
= as_where (&line
);
1174 stack
->directive
= directive
;
1175 stack
->negated
= negated
;
1176 stack
->old_state
= directive_state
[directive
];
1179 stack
->datum
= datum
;
1180 stack
->prev
= directive_state_stack
;
1181 directive_state_stack
= stack
;
1183 directive_state
[directive
] = !negated
;
1188 directive_pop (directiveE
*directive
,
1189 bfd_boolean
*negated
,
1194 state_stackS
*top
= directive_state_stack
;
1196 if (!directive_state_stack
)
1198 as_bad (_("unmatched end directive"));
1199 *directive
= directive_none
;
1203 directive_state
[directive_state_stack
->directive
] = top
->old_state
;
1204 *directive
= top
->directive
;
1205 *negated
= top
->negated
;
1208 *datum
= top
->datum
;
1209 directive_state_stack
= top
->prev
;
1215 directive_balance (void)
1217 while (directive_state_stack
)
1219 directiveE directive
;
1220 bfd_boolean negated
;
1225 directive_pop (&directive
, &negated
, &file
, &line
, &datum
);
1226 as_warn_where ((char *) file
, line
,
1227 _(".begin directive with no matching .end directive"));
1233 inside_directive (directiveE dir
)
1235 state_stackS
*top
= directive_state_stack
;
1237 while (top
&& top
->directive
!= dir
)
1240 return (top
!= NULL
);
1245 get_directive (directiveE
*directive
, bfd_boolean
*negated
)
1249 const char *directive_string
;
1251 if (strncmp (input_line_pointer
, "no-", 3) != 0)
1256 input_line_pointer
+= 3;
1259 len
= strspn (input_line_pointer
,
1260 "abcdefghijklmnopqrstuvwxyz_-/0123456789.");
1262 /* This code is a hack to make .begin [no-][generics|relax] exactly
1263 equivalent to .begin [no-]transform. We should remove it when
1264 we stop accepting those options. */
1266 if (strncmp (input_line_pointer
, "generics", strlen ("generics")) == 0)
1268 as_warn (_("[no-]generics is deprecated; use [no-]transform instead"));
1269 directive_string
= "transform";
1271 else if (strncmp (input_line_pointer
, "relax", strlen ("relax")) == 0)
1273 as_warn (_("[no-]relax is deprecated; use [no-]transform instead"));
1274 directive_string
= "transform";
1277 directive_string
= input_line_pointer
;
1279 for (i
= 0; i
< sizeof (directive_info
) / sizeof (*directive_info
); ++i
)
1281 if (strncmp (directive_string
, directive_info
[i
].name
, len
) == 0)
1283 input_line_pointer
+= len
;
1284 *directive
= (directiveE
) i
;
1285 if (*negated
&& !directive_info
[i
].can_be_negated
)
1286 as_bad (_("directive %s cannot be negated"),
1287 directive_info
[i
].name
);
1292 as_bad (_("unknown directive"));
1293 *directive
= (directiveE
) XTENSA_UNDEFINED
;
1298 xtensa_begin_directive (int ignore ATTRIBUTE_UNUSED
)
1300 directiveE directive
;
1301 bfd_boolean negated
;
1305 get_directive (&directive
, &negated
);
1306 if (directive
== (directiveE
) XTENSA_UNDEFINED
)
1308 discard_rest_of_line ();
1312 if (cur_vinsn
.inside_bundle
)
1313 as_bad (_("directives are not valid inside bundles"));
1317 case directive_literal
:
1318 if (!inside_directive (directive_literal
))
1320 /* Previous labels go with whatever follows this directive, not with
1321 the literal, so save them now. */
1322 saved_insn_labels
= insn_labels
;
1325 as_warn (_(".begin literal is deprecated; use .literal instead"));
1326 state
= (emit_state
*) xmalloc (sizeof (emit_state
));
1327 xtensa_switch_to_literal_fragment (state
);
1328 directive_push (directive_literal
, negated
, state
);
1331 case directive_literal_prefix
:
1332 /* Have to flush pending output because a movi relaxed to an l32r
1333 might produce a literal. */
1334 md_flush_pending_output ();
1335 /* Check to see if the current fragment is a literal
1336 fragment. If it is, then this operation is not allowed. */
1337 if (generating_literals
)
1339 as_bad (_("cannot set literal_prefix inside literal fragment"));
1343 /* Allocate the literal state for this section and push
1344 onto the directive stack. */
1345 ls
= xmalloc (sizeof (lit_state
));
1348 *ls
= default_lit_sections
;
1349 directive_push (directive_literal_prefix
, negated
, ls
);
1351 /* Process the new prefix. */
1352 xtensa_literal_prefix ();
1355 case directive_freeregs
:
1356 /* This information is currently unused, but we'll accept the statement
1357 and just discard the rest of the line. This won't check the syntax,
1358 but it will accept every correct freeregs directive. */
1359 input_line_pointer
+= strcspn (input_line_pointer
, "\n");
1360 directive_push (directive_freeregs
, negated
, 0);
1363 case directive_schedule
:
1364 md_flush_pending_output ();
1365 frag_var (rs_fill
, 0, 0, frag_now
->fr_subtype
,
1366 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
1367 directive_push (directive_schedule
, negated
, 0);
1368 xtensa_set_frag_assembly_state (frag_now
);
1371 case directive_density
:
1372 as_warn (_(".begin [no-]density is ignored"));
1375 case directive_absolute_literals
:
1376 md_flush_pending_output ();
1377 if (!absolute_literals_supported
&& !negated
)
1379 as_warn (_("Xtensa absolute literals option not supported; ignored"));
1382 xtensa_set_frag_assembly_state (frag_now
);
1383 directive_push (directive
, negated
, 0);
1387 md_flush_pending_output ();
1388 xtensa_set_frag_assembly_state (frag_now
);
1389 directive_push (directive
, negated
, 0);
1393 demand_empty_rest_of_line ();
1398 xtensa_end_directive (int ignore ATTRIBUTE_UNUSED
)
1400 directiveE begin_directive
, end_directive
;
1401 bfd_boolean begin_negated
, end_negated
;
1405 emit_state
**state_ptr
;
1408 if (cur_vinsn
.inside_bundle
)
1409 as_bad (_("directives are not valid inside bundles"));
1411 get_directive (&end_directive
, &end_negated
);
1413 md_flush_pending_output ();
1415 switch ((int) end_directive
)
1417 case XTENSA_UNDEFINED
:
1418 discard_rest_of_line ();
1421 case (int) directive_density
:
1422 as_warn (_(".end [no-]density is ignored"));
1423 demand_empty_rest_of_line ();
1426 case (int) directive_absolute_literals
:
1427 if (!absolute_literals_supported
&& !end_negated
)
1429 as_warn (_("Xtensa absolute literals option not supported; ignored"));
1430 demand_empty_rest_of_line ();
1439 state_ptr
= &state
; /* use state_ptr to avoid type-punning warning */
1440 directive_pop (&begin_directive
, &begin_negated
, &file
, &line
,
1441 (const void **) state_ptr
);
1443 if (begin_directive
!= directive_none
)
1445 if (begin_directive
!= end_directive
|| begin_negated
!= end_negated
)
1447 as_bad (_("does not match begin %s%s at %s:%d"),
1448 begin_negated
? "no-" : "",
1449 directive_info
[begin_directive
].name
, file
, line
);
1453 switch (end_directive
)
1455 case directive_literal
:
1456 frag_var (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
1457 xtensa_restore_emit_state (state
);
1458 xtensa_set_frag_assembly_state (frag_now
);
1460 if (!inside_directive (directive_literal
))
1462 /* Restore the list of current labels. */
1463 xtensa_clear_insn_labels ();
1464 insn_labels
= saved_insn_labels
;
1468 case directive_literal_prefix
:
1469 /* Restore the default collection sections from saved state. */
1470 s
= (lit_state
*) state
;
1472 default_lit_sections
= *s
;
1474 /* Free the state storage. */
1475 free (s
->lit_prefix
);
1479 case directive_schedule
:
1480 case directive_freeregs
:
1484 xtensa_set_frag_assembly_state (frag_now
);
1490 demand_empty_rest_of_line ();
1494 /* Place an aligned literal fragment at the current location. */
1497 xtensa_literal_position (int ignore ATTRIBUTE_UNUSED
)
1499 md_flush_pending_output ();
1501 if (inside_directive (directive_literal
))
1502 as_warn (_(".literal_position inside literal directive; ignoring"));
1503 xtensa_mark_literal_pool_location ();
1505 demand_empty_rest_of_line ();
1506 xtensa_clear_insn_labels ();
1510 /* Support .literal label, expr, ... */
1513 xtensa_literal_pseudo (int ignored ATTRIBUTE_UNUSED
)
1516 char *p
, *base_name
;
1520 if (inside_directive (directive_literal
))
1522 as_bad (_(".literal not allowed inside .begin literal region"));
1523 ignore_rest_of_line ();
1527 md_flush_pending_output ();
1529 /* Previous labels go with whatever follows this directive, not with
1530 the literal, so save them now. */
1531 saved_insn_labels
= insn_labels
;
1534 /* If we are using text-section literals, then this is the right value... */
1537 base_name
= input_line_pointer
;
1539 xtensa_switch_to_literal_fragment (&state
);
1541 /* ...but if we aren't using text-section-literals, then we
1542 need to put them in the section we just switched to. */
1543 if (use_literal_section
|| directive_state
[directive_absolute_literals
])
1546 /* FIXME, despite the previous comments, dest_seg is unused... */
1549 /* All literals are aligned to four-byte boundaries. */
1550 frag_align (2, 0, 0);
1551 record_alignment (now_seg
, 2);
1553 c
= get_symbol_name (&base_name
);
1554 /* Just after name is now '\0'. */
1555 p
= input_line_pointer
;
1557 SKIP_WHITESPACE_AFTER_NAME ();
1559 if (*input_line_pointer
!= ',' && *input_line_pointer
!= ':')
1561 as_bad (_("expected comma or colon after symbol name; "
1562 "rest of line ignored"));
1563 ignore_rest_of_line ();
1564 xtensa_restore_emit_state (&state
);
1572 input_line_pointer
++; /* skip ',' or ':' */
1574 xtensa_elf_cons (4);
1576 xtensa_restore_emit_state (&state
);
1578 /* Restore the list of current labels. */
1579 xtensa_clear_insn_labels ();
1580 insn_labels
= saved_insn_labels
;
1585 xtensa_literal_prefix (void)
1590 /* Parse the new prefix from the input_line_pointer. */
1592 len
= strspn (input_line_pointer
,
1593 "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
1594 "abcdefghijklmnopqrstuvwxyz_/0123456789.$");
1596 /* Get a null-terminated copy of the name. */
1597 name
= xmalloc (len
+ 1);
1599 strncpy (name
, input_line_pointer
, len
);
1602 /* Skip the name in the input line. */
1603 input_line_pointer
+= len
;
1605 default_lit_sections
.lit_prefix
= name
;
1607 /* Clear cached literal sections, since the prefix has changed. */
1608 default_lit_sections
.lit_seg
= NULL
;
1609 default_lit_sections
.lit4_seg
= NULL
;
1613 /* Support ".frequency branch_target_frequency fall_through_frequency". */
1616 xtensa_frequency_pseudo (int ignored ATTRIBUTE_UNUSED
)
1618 float fall_through_f
, target_f
;
1620 fall_through_f
= (float) strtod (input_line_pointer
, &input_line_pointer
);
1621 if (fall_through_f
< 0)
1623 as_bad (_("fall through frequency must be greater than 0"));
1624 ignore_rest_of_line ();
1628 target_f
= (float) strtod (input_line_pointer
, &input_line_pointer
);
1631 as_bad (_("branch target frequency must be greater than 0"));
1632 ignore_rest_of_line ();
1636 set_subseg_freq (now_seg
, now_subseg
, target_f
+ fall_through_f
, target_f
);
1638 demand_empty_rest_of_line ();
1642 /* Like normal .long/.short/.word, except support @plt, etc.
1643 Clobbers input_line_pointer, checks end-of-line. */
1646 xtensa_elf_cons (int nbytes
)
1649 bfd_reloc_code_real_type reloc
;
1651 md_flush_pending_output ();
1653 if (cur_vinsn
.inside_bundle
)
1654 as_bad (_("directives are not valid inside bundles"));
1656 if (is_it_end_of_statement ())
1658 demand_empty_rest_of_line ();
1665 if (exp
.X_op
== O_symbol
1666 && *input_line_pointer
== '@'
1667 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, &exp
))
1670 reloc_howto_type
*reloc_howto
=
1671 bfd_reloc_type_lookup (stdoutput
, reloc
);
1673 if (reloc
== BFD_RELOC_UNUSED
|| !reloc_howto
)
1674 as_bad (_("unsupported relocation"));
1675 else if ((reloc
>= BFD_RELOC_XTENSA_SLOT0_OP
1676 && reloc
<= BFD_RELOC_XTENSA_SLOT14_OP
)
1677 || (reloc
>= BFD_RELOC_XTENSA_SLOT0_ALT
1678 && reloc
<= BFD_RELOC_XTENSA_SLOT14_ALT
))
1679 as_bad (_("opcode-specific %s relocation used outside "
1680 "an instruction"), reloc_howto
->name
);
1681 else if (nbytes
!= (int) bfd_get_reloc_size (reloc_howto
))
1682 as_bad (_("%s relocations do not fit in %d bytes"),
1683 reloc_howto
->name
, nbytes
);
1684 else if (reloc
== BFD_RELOC_XTENSA_TLS_FUNC
1685 || reloc
== BFD_RELOC_XTENSA_TLS_ARG
1686 || reloc
== BFD_RELOC_XTENSA_TLS_CALL
)
1687 as_bad (_("invalid use of %s relocation"), reloc_howto
->name
);
1690 char *p
= frag_more ((int) nbytes
);
1691 xtensa_set_frag_assembly_state (frag_now
);
1692 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
,
1693 nbytes
, &exp
, reloc_howto
->pc_relative
, reloc
);
1698 xtensa_set_frag_assembly_state (frag_now
);
1699 emit_expr (&exp
, (unsigned int) nbytes
);
1702 while (*input_line_pointer
++ == ',');
1704 input_line_pointer
--; /* Put terminator back into stream. */
1705 demand_empty_rest_of_line ();
1708 static bfd_boolean is_leb128_expr
;
1711 xtensa_leb128 (int sign
)
1713 is_leb128_expr
= TRUE
;
1715 is_leb128_expr
= FALSE
;
1719 /* Parsing and Idiom Translation. */
1721 /* Parse @plt, etc. and return the desired relocation. */
1722 static bfd_reloc_code_real_type
1723 xtensa_elf_suffix (char **str_p
, expressionS
*exp_p
)
1730 struct suffix_reloc_map
*ptr
;
1733 return BFD_RELOC_NONE
;
1735 for (ch
= *str
, str2
= ident
;
1736 (str2
< ident
+ sizeof (ident
) - 1
1737 && (ISALNUM (ch
) || ch
== '@'));
1740 *str2
++ = (ISLOWER (ch
)) ? ch
: TOLOWER (ch
);
1747 for (ptr
= &suffix_relocs
[0]; ptr
->length
> 0; ptr
++)
1748 if (ch
== ptr
->suffix
[0]
1749 && len
== ptr
->length
1750 && memcmp (ident
, ptr
->suffix
, ptr
->length
) == 0)
1752 /* Now check for "identifier@suffix+constant". */
1753 if (*str
== '-' || *str
== '+')
1755 char *orig_line
= input_line_pointer
;
1756 expressionS new_exp
;
1758 input_line_pointer
= str
;
1759 expression (&new_exp
);
1760 if (new_exp
.X_op
== O_constant
)
1762 exp_p
->X_add_number
+= new_exp
.X_add_number
;
1763 str
= input_line_pointer
;
1766 if (&input_line_pointer
!= str_p
)
1767 input_line_pointer
= orig_line
;
1774 return BFD_RELOC_UNUSED
;
1778 /* Find the matching operator type. */
1779 static unsigned char
1780 map_suffix_reloc_to_operator (bfd_reloc_code_real_type reloc
)
1782 struct suffix_reloc_map
*sfx
;
1783 unsigned char operator = (unsigned char) -1;
1785 for (sfx
= &suffix_relocs
[0]; sfx
->suffix
; sfx
++)
1787 if (sfx
->reloc
== reloc
)
1789 operator = sfx
->operator;
1793 gas_assert (operator != (unsigned char) -1);
1798 /* Find the matching reloc type. */
1799 static bfd_reloc_code_real_type
1800 map_operator_to_reloc (unsigned char operator, bfd_boolean is_literal
)
1802 struct suffix_reloc_map
*sfx
;
1803 bfd_reloc_code_real_type reloc
= BFD_RELOC_UNUSED
;
1805 for (sfx
= &suffix_relocs
[0]; sfx
->suffix
; sfx
++)
1807 if (sfx
->operator == operator)
1816 if (reloc
== BFD_RELOC_XTENSA_TLS_FUNC
)
1817 return BFD_RELOC_XTENSA_TLSDESC_FN
;
1818 else if (reloc
== BFD_RELOC_XTENSA_TLS_ARG
)
1819 return BFD_RELOC_XTENSA_TLSDESC_ARG
;
1822 if (reloc
== BFD_RELOC_UNUSED
)
1823 return BFD_RELOC_32
;
1830 expression_end (const char *name
)
1853 #define ERROR_REG_NUM ((unsigned) -1)
1856 tc_get_register (const char *prefix
)
1859 const char *next_expr
;
1860 const char *old_line_pointer
;
1863 old_line_pointer
= input_line_pointer
;
1865 if (*input_line_pointer
== '$')
1866 ++input_line_pointer
;
1868 /* Accept "sp" as a synonym for "a1". */
1869 if (input_line_pointer
[0] == 's' && input_line_pointer
[1] == 'p'
1870 && expression_end (input_line_pointer
+ 2))
1872 input_line_pointer
+= 2;
1873 return 1; /* AR[1] */
1876 while (*input_line_pointer
++ == *prefix
++)
1878 --input_line_pointer
;
1883 as_bad (_("bad register name: %s"), old_line_pointer
);
1884 return ERROR_REG_NUM
;
1887 if (!ISDIGIT ((unsigned char) *input_line_pointer
))
1889 as_bad (_("bad register number: %s"), input_line_pointer
);
1890 return ERROR_REG_NUM
;
1895 while (ISDIGIT ((int) *input_line_pointer
))
1896 reg
= reg
* 10 + *input_line_pointer
++ - '0';
1898 if (!(next_expr
= expression_end (input_line_pointer
)))
1900 as_bad (_("bad register name: %s"), old_line_pointer
);
1901 return ERROR_REG_NUM
;
1904 input_line_pointer
= (char *) next_expr
;
1911 expression_maybe_register (xtensa_opcode opc
, int opnd
, expressionS
*tok
)
1913 xtensa_isa isa
= xtensa_default_isa
;
1915 /* Check if this is an immediate operand. */
1916 if (xtensa_operand_is_register (isa
, opc
, opnd
) == 0)
1918 bfd_reloc_code_real_type reloc
;
1919 segT t
= expression (tok
);
1921 if (t
== absolute_section
1922 && xtensa_operand_is_PCrelative (isa
, opc
, opnd
) == 1)
1924 gas_assert (tok
->X_op
== O_constant
);
1925 tok
->X_op
= O_symbol
;
1926 tok
->X_add_symbol
= &abs_symbol
;
1929 if ((tok
->X_op
== O_constant
|| tok
->X_op
== O_symbol
)
1930 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, tok
))
1935 case BFD_RELOC_LO16
:
1936 if (tok
->X_op
== O_constant
)
1938 tok
->X_add_number
&= 0xffff;
1942 case BFD_RELOC_HI16
:
1943 if (tok
->X_op
== O_constant
)
1945 tok
->X_add_number
= ((unsigned) tok
->X_add_number
) >> 16;
1949 case BFD_RELOC_UNUSED
:
1950 as_bad (_("unsupported relocation"));
1952 case BFD_RELOC_32_PCREL
:
1953 as_bad (_("pcrel relocation not allowed in an instruction"));
1958 tok
->X_op
= map_suffix_reloc_to_operator (reloc
);
1963 xtensa_regfile opnd_rf
= xtensa_operand_regfile (isa
, opc
, opnd
);
1964 unsigned reg
= tc_get_register (xtensa_regfile_shortname (isa
, opnd_rf
));
1966 if (reg
!= ERROR_REG_NUM
) /* Already errored */
1969 if (xtensa_operand_encode (isa
, opc
, opnd
, &buf
))
1970 as_bad (_("register number out of range"));
1973 tok
->X_op
= O_register
;
1974 tok
->X_add_symbol
= 0;
1975 tok
->X_add_number
= reg
;
1980 /* Split up the arguments for an opcode or pseudo-op. */
1983 tokenize_arguments (char **args
, char *str
)
1985 char *old_input_line_pointer
;
1986 bfd_boolean saw_comma
= FALSE
;
1987 bfd_boolean saw_arg
= FALSE
;
1988 bfd_boolean saw_colon
= FALSE
;
1990 char *arg_end
, *arg
;
1993 /* Save and restore input_line_pointer around this function. */
1994 old_input_line_pointer
= input_line_pointer
;
1995 input_line_pointer
= str
;
1997 while (*input_line_pointer
)
2000 switch (*input_line_pointer
)
2007 input_line_pointer
++;
2008 if (saw_comma
|| saw_colon
|| !saw_arg
)
2014 input_line_pointer
++;
2015 if (saw_comma
|| saw_colon
|| !saw_arg
)
2021 if (!saw_comma
&& !saw_colon
&& saw_arg
)
2024 arg_end
= input_line_pointer
+ 1;
2025 while (!expression_end (arg_end
))
2028 arg_len
= arg_end
- input_line_pointer
;
2029 arg
= (char *) xmalloc ((saw_colon
? 1 : 0) + arg_len
+ 1);
2030 args
[num_args
] = arg
;
2034 strncpy (arg
, input_line_pointer
, arg_len
);
2035 arg
[arg_len
] = '\0';
2037 input_line_pointer
= arg_end
;
2047 if (saw_comma
|| saw_colon
)
2049 input_line_pointer
= old_input_line_pointer
;
2054 as_bad (_("extra comma"));
2056 as_bad (_("extra colon"));
2058 as_bad (_("missing argument"));
2060 as_bad (_("missing comma or colon"));
2061 input_line_pointer
= old_input_line_pointer
;
2066 /* Parse the arguments to an opcode. Return TRUE on error. */
2069 parse_arguments (TInsn
*insn
, int num_args
, char **arg_strings
)
2071 expressionS
*tok
, *last_tok
;
2072 xtensa_opcode opcode
= insn
->opcode
;
2073 bfd_boolean had_error
= TRUE
;
2074 xtensa_isa isa
= xtensa_default_isa
;
2075 int n
, num_regs
= 0;
2076 int opcode_operand_count
;
2077 int opnd_cnt
, last_opnd_cnt
;
2078 unsigned int next_reg
= 0;
2079 char *old_input_line_pointer
;
2081 if (insn
->insn_type
== ITYPE_LITERAL
)
2082 opcode_operand_count
= 1;
2084 opcode_operand_count
= xtensa_opcode_num_operands (isa
, opcode
);
2087 memset (tok
, 0, sizeof (*tok
) * MAX_INSN_ARGS
);
2089 /* Save and restore input_line_pointer around this function. */
2090 old_input_line_pointer
= input_line_pointer
;
2096 /* Skip invisible operands. */
2097 while (xtensa_operand_is_visible (isa
, opcode
, opnd_cnt
) == 0)
2103 for (n
= 0; n
< num_args
; n
++)
2105 input_line_pointer
= arg_strings
[n
];
2106 if (*input_line_pointer
== ':')
2108 xtensa_regfile opnd_rf
;
2109 input_line_pointer
++;
2112 gas_assert (opnd_cnt
> 0);
2114 opnd_rf
= xtensa_operand_regfile (isa
, opcode
, last_opnd_cnt
);
2116 != tc_get_register (xtensa_regfile_shortname (isa
, opnd_rf
)))
2117 as_warn (_("incorrect register number, ignoring"));
2122 if (opnd_cnt
>= opcode_operand_count
)
2124 as_warn (_("too many arguments"));
2127 gas_assert (opnd_cnt
< MAX_INSN_ARGS
);
2129 expression_maybe_register (opcode
, opnd_cnt
, tok
);
2130 next_reg
= tok
->X_add_number
+ 1;
2132 if (tok
->X_op
== O_illegal
|| tok
->X_op
== O_absent
)
2134 if (xtensa_operand_is_register (isa
, opcode
, opnd_cnt
) == 1)
2136 num_regs
= xtensa_operand_num_regs (isa
, opcode
, opnd_cnt
) - 1;
2137 /* minus 1 because we are seeing one right now */
2143 last_opnd_cnt
= opnd_cnt
;
2144 demand_empty_rest_of_line ();
2151 while (xtensa_operand_is_visible (isa
, opcode
, opnd_cnt
) == 0);
2155 if (num_regs
> 0 && ((int) next_reg
!= last_tok
->X_add_number
+ 1))
2158 insn
->ntok
= tok
- insn
->tok
;
2162 input_line_pointer
= old_input_line_pointer
;
2168 get_invisible_operands (TInsn
*insn
)
2170 xtensa_isa isa
= xtensa_default_isa
;
2171 static xtensa_insnbuf slotbuf
= NULL
;
2173 xtensa_opcode opc
= insn
->opcode
;
2174 int slot
, opnd
, fmt_found
;
2178 slotbuf
= xtensa_insnbuf_alloc (isa
);
2180 /* Find format/slot where this can be encoded. */
2183 for (fmt
= 0; fmt
< xtensa_isa_num_formats (isa
); fmt
++)
2185 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
2187 if (xtensa_opcode_encode (isa
, fmt
, slot
, slotbuf
, opc
) == 0)
2193 if (fmt_found
) break;
2198 as_bad (_("cannot encode opcode \"%s\""), xtensa_opcode_name (isa
, opc
));
2202 /* First encode all the visible operands
2203 (to deal with shared field operands). */
2204 for (opnd
= 0; opnd
< insn
->ntok
; opnd
++)
2206 if (xtensa_operand_is_visible (isa
, opc
, opnd
) == 1
2207 && (insn
->tok
[opnd
].X_op
== O_register
2208 || insn
->tok
[opnd
].X_op
== O_constant
))
2210 val
= insn
->tok
[opnd
].X_add_number
;
2211 xtensa_operand_encode (isa
, opc
, opnd
, &val
);
2212 xtensa_operand_set_field (isa
, opc
, opnd
, fmt
, slot
, slotbuf
, val
);
2216 /* Then pull out the values for the invisible ones. */
2217 for (opnd
= 0; opnd
< insn
->ntok
; opnd
++)
2219 if (xtensa_operand_is_visible (isa
, opc
, opnd
) == 0)
2221 xtensa_operand_get_field (isa
, opc
, opnd
, fmt
, slot
, slotbuf
, &val
);
2222 xtensa_operand_decode (isa
, opc
, opnd
, &val
);
2223 insn
->tok
[opnd
].X_add_number
= val
;
2224 if (xtensa_operand_is_register (isa
, opc
, opnd
) == 1)
2225 insn
->tok
[opnd
].X_op
= O_register
;
2227 insn
->tok
[opnd
].X_op
= O_constant
;
2236 xg_reverse_shift_count (char **cnt_argp
)
2238 char *cnt_arg
, *new_arg
;
2239 cnt_arg
= *cnt_argp
;
2241 /* replace the argument with "31-(argument)" */
2242 new_arg
= (char *) xmalloc (strlen (cnt_arg
) + 6);
2243 sprintf (new_arg
, "31-(%s)", cnt_arg
);
2246 *cnt_argp
= new_arg
;
2250 /* If "arg" is a constant expression, return non-zero with the value
2254 xg_arg_is_constant (char *arg
, offsetT
*valp
)
2257 char *save_ptr
= input_line_pointer
;
2259 input_line_pointer
= arg
;
2261 input_line_pointer
= save_ptr
;
2263 if (exp
.X_op
== O_constant
)
2265 *valp
= exp
.X_add_number
;
2274 xg_replace_opname (char **popname
, const char *newop
)
2277 *popname
= (char *) xmalloc (strlen (newop
) + 1);
2278 strcpy (*popname
, newop
);
2283 xg_check_num_args (int *pnum_args
,
2288 int num_args
= *pnum_args
;
2290 if (num_args
< expected_num
)
2292 as_bad (_("not enough operands (%d) for '%s'; expected %d"),
2293 num_args
, opname
, expected_num
);
2297 if (num_args
> expected_num
)
2299 as_warn (_("too many operands (%d) for '%s'; expected %d"),
2300 num_args
, opname
, expected_num
);
2301 while (num_args
-- > expected_num
)
2303 free (arg_strings
[num_args
]);
2304 arg_strings
[num_args
] = 0;
2306 *pnum_args
= expected_num
;
2314 /* If the register is not specified as part of the opcode,
2315 then get it from the operand and move it to the opcode. */
2318 xg_translate_sysreg_op (char **popname
, int *pnum_args
, char **arg_strings
)
2320 xtensa_isa isa
= xtensa_default_isa
;
2322 char *opname
, *new_opname
;
2323 const char *sr_name
;
2324 int is_user
, is_write
;
2329 is_user
= (opname
[1] == 'u');
2330 is_write
= (opname
[0] == 'w');
2332 /* Opname == [rw]ur or [rwx]sr... */
2334 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
2337 /* Check if the argument is a symbolic register name. */
2338 sr
= xtensa_sysreg_lookup_name (isa
, arg_strings
[1]);
2339 /* Handle WSR to "INTSET" as a special case. */
2340 if (sr
== XTENSA_UNDEFINED
&& is_write
&& !is_user
2341 && !strcasecmp (arg_strings
[1], "intset"))
2342 sr
= xtensa_sysreg_lookup_name (isa
, "interrupt");
2343 if (sr
== XTENSA_UNDEFINED
2344 || (xtensa_sysreg_is_user (isa
, sr
) == 1) != is_user
)
2346 /* Maybe it's a register number.... */
2348 if (!xg_arg_is_constant (arg_strings
[1], &val
))
2350 as_bad (_("invalid register '%s' for '%s' instruction"),
2351 arg_strings
[1], opname
);
2354 sr
= xtensa_sysreg_lookup (isa
, val
, is_user
);
2355 if (sr
== XTENSA_UNDEFINED
)
2357 as_bad (_("invalid register number (%ld) for '%s' instruction"),
2358 (long) val
, opname
);
2363 /* Remove the last argument, which is now part of the opcode. */
2364 free (arg_strings
[1]);
2368 /* Translate the opcode. */
2369 sr_name
= xtensa_sysreg_name (isa
, sr
);
2370 /* Another special case for "WSR.INTSET".... */
2371 if (is_write
&& !is_user
&& !strcasecmp ("interrupt", sr_name
))
2373 new_opname
= (char *) xmalloc (strlen (sr_name
) + 6);
2374 sprintf (new_opname
, "%s.%s", *popname
, sr_name
);
2376 *popname
= new_opname
;
2383 xtensa_translate_old_userreg_ops (char **popname
)
2385 xtensa_isa isa
= xtensa_default_isa
;
2387 char *opname
, *new_opname
;
2388 const char *sr_name
;
2389 bfd_boolean has_underbar
= FALSE
;
2392 if (opname
[0] == '_')
2394 has_underbar
= TRUE
;
2398 sr
= xtensa_sysreg_lookup_name (isa
, opname
+ 1);
2399 if (sr
!= XTENSA_UNDEFINED
)
2401 /* The new default name ("nnn") is different from the old default
2402 name ("URnnn"). The old default is handled below, and we don't
2403 want to recognize [RW]nnn, so do nothing if the name is the (new)
2405 static char namebuf
[10];
2406 sprintf (namebuf
, "%d", xtensa_sysreg_number (isa
, sr
));
2407 if (strcmp (namebuf
, opname
+ 1) == 0)
2415 /* Only continue if the reg name is "URnnn". */
2416 if (opname
[1] != 'u' || opname
[2] != 'r')
2418 val
= strtoul (opname
+ 3, &end
, 10);
2422 sr
= xtensa_sysreg_lookup (isa
, val
, 1);
2423 if (sr
== XTENSA_UNDEFINED
)
2425 as_bad (_("invalid register number (%ld) for '%s'"),
2426 (long) val
, opname
);
2431 /* Translate the opcode. */
2432 sr_name
= xtensa_sysreg_name (isa
, sr
);
2433 new_opname
= (char *) xmalloc (strlen (sr_name
) + 6);
2434 sprintf (new_opname
, "%s%cur.%s", (has_underbar
? "_" : ""),
2435 opname
[0], sr_name
);
2437 *popname
= new_opname
;
2444 xtensa_translate_zero_immed (const char *old_op
,
2454 gas_assert (opname
[0] != '_');
2456 if (strcmp (opname
, old_op
) != 0)
2459 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2461 if (xg_arg_is_constant (arg_strings
[1], &val
) && val
== 0)
2463 xg_replace_opname (popname
, new_op
);
2464 free (arg_strings
[1]);
2465 arg_strings
[1] = arg_strings
[2];
2474 /* If the instruction is an idiom (i.e., a built-in macro), translate it.
2475 Returns non-zero if an error was found. */
2478 xg_translate_idioms (char **popname
, int *pnum_args
, char **arg_strings
)
2480 char *opname
= *popname
;
2481 bfd_boolean has_underbar
= FALSE
;
2485 has_underbar
= TRUE
;
2489 if (strcmp (opname
, "mov") == 0)
2491 if (use_transform () && !has_underbar
&& density_supported
)
2492 xg_replace_opname (popname
, "mov.n");
2495 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
2497 xg_replace_opname (popname
, (has_underbar
? "_or" : "or"));
2498 arg_strings
[2] = (char *) xmalloc (strlen (arg_strings
[1]) + 1);
2499 strcpy (arg_strings
[2], arg_strings
[1]);
2505 if (strcmp (opname
, "bbsi.l") == 0)
2507 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2509 xg_replace_opname (popname
, (has_underbar
? "_bbsi" : "bbsi"));
2510 if (target_big_endian
)
2511 xg_reverse_shift_count (&arg_strings
[1]);
2515 if (strcmp (opname
, "bbci.l") == 0)
2517 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2519 xg_replace_opname (popname
, (has_underbar
? "_bbci" : "bbci"));
2520 if (target_big_endian
)
2521 xg_reverse_shift_count (&arg_strings
[1]);
2525 /* Don't do anything special with NOPs inside FLIX instructions. They
2526 are handled elsewhere. Real NOP instructions are always available
2527 in configurations with FLIX, so this should never be an issue but
2528 check for it anyway. */
2529 if (!cur_vinsn
.inside_bundle
&& xtensa_nop_opcode
== XTENSA_UNDEFINED
2530 && strcmp (opname
, "nop") == 0)
2532 if (use_transform () && !has_underbar
&& density_supported
)
2533 xg_replace_opname (popname
, "nop.n");
2536 if (xg_check_num_args (pnum_args
, 0, opname
, arg_strings
))
2538 xg_replace_opname (popname
, (has_underbar
? "_or" : "or"));
2539 arg_strings
[0] = (char *) xmalloc (3);
2540 arg_strings
[1] = (char *) xmalloc (3);
2541 arg_strings
[2] = (char *) xmalloc (3);
2542 strcpy (arg_strings
[0], "a1");
2543 strcpy (arg_strings
[1], "a1");
2544 strcpy (arg_strings
[2], "a1");
2550 /* Recognize [RW]UR and [RWX]SR. */
2551 if ((((opname
[0] == 'r' || opname
[0] == 'w')
2552 && (opname
[1] == 'u' || opname
[1] == 's'))
2553 || (opname
[0] == 'x' && opname
[1] == 's'))
2555 && opname
[3] == '\0')
2556 return xg_translate_sysreg_op (popname
, pnum_args
, arg_strings
);
2558 /* Backward compatibility for RUR and WUR: Recognize [RW]UR<nnn> and
2559 [RW]<name> if <name> is the non-default name of a user register. */
2560 if ((opname
[0] == 'r' || opname
[0] == 'w')
2561 && xtensa_opcode_lookup (xtensa_default_isa
, opname
) == XTENSA_UNDEFINED
)
2562 return xtensa_translate_old_userreg_ops (popname
);
2564 /* Relax branches that don't allow comparisons against an immediate value
2565 of zero to the corresponding branches with implicit zero immediates. */
2566 if (!has_underbar
&& use_transform ())
2568 if (xtensa_translate_zero_immed ("bnei", "bnez", popname
,
2569 pnum_args
, arg_strings
))
2572 if (xtensa_translate_zero_immed ("beqi", "beqz", popname
,
2573 pnum_args
, arg_strings
))
2576 if (xtensa_translate_zero_immed ("bgei", "bgez", popname
,
2577 pnum_args
, arg_strings
))
2580 if (xtensa_translate_zero_immed ("blti", "bltz", popname
,
2581 pnum_args
, arg_strings
))
2589 /* Functions for dealing with the Xtensa ISA. */
2591 /* Currently the assembler only allows us to use a single target per
2592 fragment. Because of this, only one operand for a given
2593 instruction may be symbolic. If there is a PC-relative operand,
2594 the last one is chosen. Otherwise, the result is the number of the
2595 last immediate operand, and if there are none of those, we fail and
2599 get_relaxable_immed (xtensa_opcode opcode
)
2601 int last_immed
= -1;
2604 if (opcode
== XTENSA_UNDEFINED
)
2607 noperands
= xtensa_opcode_num_operands (xtensa_default_isa
, opcode
);
2608 for (opi
= noperands
- 1; opi
>= 0; opi
--)
2610 if (xtensa_operand_is_visible (xtensa_default_isa
, opcode
, opi
) == 0)
2612 if (xtensa_operand_is_PCrelative (xtensa_default_isa
, opcode
, opi
) == 1)
2614 if (last_immed
== -1
2615 && xtensa_operand_is_register (xtensa_default_isa
, opcode
, opi
) == 0)
2622 static xtensa_opcode
2623 get_opcode_from_buf (const char *buf
, int slot
)
2625 static xtensa_insnbuf insnbuf
= NULL
;
2626 static xtensa_insnbuf slotbuf
= NULL
;
2627 xtensa_isa isa
= xtensa_default_isa
;
2632 insnbuf
= xtensa_insnbuf_alloc (isa
);
2633 slotbuf
= xtensa_insnbuf_alloc (isa
);
2636 xtensa_insnbuf_from_chars (isa
, insnbuf
, (const unsigned char *) buf
, 0);
2637 fmt
= xtensa_format_decode (isa
, insnbuf
);
2638 if (fmt
== XTENSA_UNDEFINED
)
2639 return XTENSA_UNDEFINED
;
2641 if (slot
>= xtensa_format_num_slots (isa
, fmt
))
2642 return XTENSA_UNDEFINED
;
2644 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
2645 return xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
2649 #ifdef TENSILICA_DEBUG
2651 /* For debugging, print out the mapping of opcode numbers to opcodes. */
2654 xtensa_print_insn_table (void)
2656 int num_opcodes
, num_operands
;
2657 xtensa_opcode opcode
;
2658 xtensa_isa isa
= xtensa_default_isa
;
2660 num_opcodes
= xtensa_isa_num_opcodes (xtensa_default_isa
);
2661 for (opcode
= 0; opcode
< num_opcodes
; opcode
++)
2664 fprintf (stderr
, "%d: %s: ", opcode
, xtensa_opcode_name (isa
, opcode
));
2665 num_operands
= xtensa_opcode_num_operands (isa
, opcode
);
2666 for (opn
= 0; opn
< num_operands
; opn
++)
2668 if (xtensa_operand_is_visible (isa
, opcode
, opn
) == 0)
2670 if (xtensa_operand_is_register (isa
, opcode
, opn
) == 1)
2672 xtensa_regfile opnd_rf
=
2673 xtensa_operand_regfile (isa
, opcode
, opn
);
2674 fprintf (stderr
, "%s ", xtensa_regfile_shortname (isa
, opnd_rf
));
2676 else if (xtensa_operand_is_PCrelative (isa
, opcode
, opn
) == 1)
2677 fputs ("[lLr] ", stderr
);
2679 fputs ("i ", stderr
);
2681 fprintf (stderr
, "\n");
2687 print_vliw_insn (xtensa_insnbuf vbuf
)
2689 xtensa_isa isa
= xtensa_default_isa
;
2690 xtensa_format f
= xtensa_format_decode (isa
, vbuf
);
2691 xtensa_insnbuf sbuf
= xtensa_insnbuf_alloc (isa
);
2694 fprintf (stderr
, "format = %d\n", f
);
2696 for (op
= 0; op
< xtensa_format_num_slots (isa
, f
); op
++)
2698 xtensa_opcode opcode
;
2702 xtensa_format_get_slot (isa
, f
, op
, vbuf
, sbuf
);
2703 opcode
= xtensa_opcode_decode (isa
, f
, op
, sbuf
);
2704 opname
= xtensa_opcode_name (isa
, opcode
);
2706 fprintf (stderr
, "op in slot %i is %s;\n", op
, opname
);
2707 fprintf (stderr
, " operands = ");
2709 operands
< xtensa_opcode_num_operands (isa
, opcode
);
2713 if (xtensa_operand_is_visible (isa
, opcode
, operands
) == 0)
2715 xtensa_operand_get_field (isa
, opcode
, operands
, f
, op
, sbuf
, &val
);
2716 xtensa_operand_decode (isa
, opcode
, operands
, &val
);
2717 fprintf (stderr
, "%d ", val
);
2719 fprintf (stderr
, "\n");
2721 xtensa_insnbuf_free (isa
, sbuf
);
2724 #endif /* TENSILICA_DEBUG */
2728 is_direct_call_opcode (xtensa_opcode opcode
)
2730 xtensa_isa isa
= xtensa_default_isa
;
2731 int n
, num_operands
;
2733 if (xtensa_opcode_is_call (isa
, opcode
) != 1)
2736 num_operands
= xtensa_opcode_num_operands (isa
, opcode
);
2737 for (n
= 0; n
< num_operands
; n
++)
2739 if (xtensa_operand_is_register (isa
, opcode
, n
) == 0
2740 && xtensa_operand_is_PCrelative (isa
, opcode
, n
) == 1)
2747 /* Convert from BFD relocation type code to slot and operand number.
2748 Returns non-zero on failure. */
2751 decode_reloc (bfd_reloc_code_real_type reloc
, int *slot
, bfd_boolean
*is_alt
)
2753 if (reloc
>= BFD_RELOC_XTENSA_SLOT0_OP
2754 && reloc
<= BFD_RELOC_XTENSA_SLOT14_OP
)
2756 *slot
= reloc
- BFD_RELOC_XTENSA_SLOT0_OP
;
2759 else if (reloc
>= BFD_RELOC_XTENSA_SLOT0_ALT
2760 && reloc
<= BFD_RELOC_XTENSA_SLOT14_ALT
)
2762 *slot
= reloc
- BFD_RELOC_XTENSA_SLOT0_ALT
;
2772 /* Convert from slot number to BFD relocation type code for the
2773 standard PC-relative relocations. Return BFD_RELOC_NONE on
2776 static bfd_reloc_code_real_type
2777 encode_reloc (int slot
)
2779 if (slot
< 0 || slot
> 14)
2780 return BFD_RELOC_NONE
;
2782 return BFD_RELOC_XTENSA_SLOT0_OP
+ slot
;
2786 /* Convert from slot numbers to BFD relocation type code for the
2787 "alternate" relocations. Return BFD_RELOC_NONE on failure. */
2789 static bfd_reloc_code_real_type
2790 encode_alt_reloc (int slot
)
2792 if (slot
< 0 || slot
> 14)
2793 return BFD_RELOC_NONE
;
2795 return BFD_RELOC_XTENSA_SLOT0_ALT
+ slot
;
2800 xtensa_insnbuf_set_operand (xtensa_insnbuf slotbuf
,
2803 xtensa_opcode opcode
,
2809 uint32 valbuf
= value
;
2811 if (xtensa_operand_encode (xtensa_default_isa
, opcode
, operand
, &valbuf
))
2813 if (xtensa_operand_is_PCrelative (xtensa_default_isa
, opcode
, operand
)
2815 as_bad_where ((char *) file
, line
,
2816 _("operand %d of '%s' has out of range value '%u'"),
2818 xtensa_opcode_name (xtensa_default_isa
, opcode
),
2821 as_bad_where ((char *) file
, line
,
2822 _("operand %d of '%s' has invalid value '%u'"),
2824 xtensa_opcode_name (xtensa_default_isa
, opcode
),
2829 xtensa_operand_set_field (xtensa_default_isa
, opcode
, operand
, fmt
, slot
,
2835 xtensa_insnbuf_get_operand (xtensa_insnbuf slotbuf
,
2838 xtensa_opcode opcode
,
2842 (void) xtensa_operand_get_field (xtensa_default_isa
, opcode
, opnum
,
2843 fmt
, slot
, slotbuf
, &val
);
2844 (void) xtensa_operand_decode (xtensa_default_isa
, opcode
, opnum
, &val
);
2849 /* Checks for rules from xtensa-relax tables. */
2851 /* The routine xg_instruction_matches_option_term must return TRUE
2852 when a given option term is true. The meaning of all of the option
2853 terms is given interpretation by this function. */
2856 xg_instruction_matches_option_term (TInsn
*insn
, const ReqOrOption
*option
)
2858 if (strcmp (option
->option_name
, "realnop") == 0
2859 || strncmp (option
->option_name
, "IsaUse", 6) == 0)
2861 /* These conditions were evaluated statically when building the
2862 relaxation table. There's no need to reevaluate them now. */
2865 else if (strcmp (option
->option_name
, "FREEREG") == 0)
2866 return insn
->extra_arg
.X_op
== O_register
;
2869 as_fatal (_("internal error: unknown option name '%s'"),
2870 option
->option_name
);
2876 xg_instruction_matches_or_options (TInsn
*insn
,
2877 const ReqOrOptionList
*or_option
)
2879 const ReqOrOption
*option
;
2880 /* Must match each of the AND terms. */
2881 for (option
= or_option
; option
!= NULL
; option
= option
->next
)
2883 if (xg_instruction_matches_option_term (insn
, option
))
2891 xg_instruction_matches_options (TInsn
*insn
, const ReqOptionList
*options
)
2893 const ReqOption
*req_options
;
2894 /* Must match each of the AND terms. */
2895 for (req_options
= options
;
2896 req_options
!= NULL
;
2897 req_options
= req_options
->next
)
2899 /* Must match one of the OR clauses. */
2900 if (!xg_instruction_matches_or_options (insn
,
2901 req_options
->or_option_terms
))
2908 /* Return the transition rule that matches or NULL if none matches. */
2911 xg_instruction_matches_rule (TInsn
*insn
, TransitionRule
*rule
)
2913 PreconditionList
*condition_l
;
2915 if (rule
->opcode
!= insn
->opcode
)
2918 for (condition_l
= rule
->conditions
;
2919 condition_l
!= NULL
;
2920 condition_l
= condition_l
->next
)
2924 Precondition
*cond
= condition_l
->precond
;
2929 /* The expression must be the constant. */
2930 gas_assert (cond
->op_num
< insn
->ntok
);
2931 exp1
= &insn
->tok
[cond
->op_num
];
2932 if (expr_is_const (exp1
))
2937 if (get_expr_const (exp1
) != cond
->op_data
)
2941 if (get_expr_const (exp1
) == cond
->op_data
)
2948 else if (expr_is_register (exp1
))
2953 if (get_expr_register (exp1
) != cond
->op_data
)
2957 if (get_expr_register (exp1
) == cond
->op_data
)
2969 gas_assert (cond
->op_num
< insn
->ntok
);
2970 gas_assert (cond
->op_data
< insn
->ntok
);
2971 exp1
= &insn
->tok
[cond
->op_num
];
2972 exp2
= &insn
->tok
[cond
->op_data
];
2977 if (!expr_is_equal (exp1
, exp2
))
2981 if (expr_is_equal (exp1
, exp2
))
2993 if (!xg_instruction_matches_options (insn
, rule
->options
))
3001 transition_rule_cmp (const TransitionRule
*a
, const TransitionRule
*b
)
3003 bfd_boolean a_greater
= FALSE
;
3004 bfd_boolean b_greater
= FALSE
;
3006 ReqOptionList
*l_a
= a
->options
;
3007 ReqOptionList
*l_b
= b
->options
;
3009 /* We only care if they both are the same except for
3010 a const16 vs. an l32r. */
3012 while (l_a
&& l_b
&& ((l_a
->next
== NULL
) == (l_b
->next
== NULL
)))
3014 ReqOrOptionList
*l_or_a
= l_a
->or_option_terms
;
3015 ReqOrOptionList
*l_or_b
= l_b
->or_option_terms
;
3016 while (l_or_a
&& l_or_b
&& ((l_a
->next
== NULL
) == (l_b
->next
== NULL
)))
3018 if (l_or_a
->is_true
!= l_or_b
->is_true
)
3020 if (strcmp (l_or_a
->option_name
, l_or_b
->option_name
) != 0)
3022 /* This is the case we care about. */
3023 if (strcmp (l_or_a
->option_name
, "IsaUseConst16") == 0
3024 && strcmp (l_or_b
->option_name
, "IsaUseL32R") == 0)
3031 else if (strcmp (l_or_a
->option_name
, "IsaUseL32R") == 0
3032 && strcmp (l_or_b
->option_name
, "IsaUseConst16") == 0)
3042 l_or_a
= l_or_a
->next
;
3043 l_or_b
= l_or_b
->next
;
3045 if (l_or_a
|| l_or_b
)
3054 /* Incomparable if the substitution was used differently in two cases. */
3055 if (a_greater
&& b_greater
)
3067 static TransitionRule
*
3068 xg_instruction_match (TInsn
*insn
)
3070 TransitionTable
*table
= xg_build_simplify_table (&transition_rule_cmp
);
3072 gas_assert (insn
->opcode
< table
->num_opcodes
);
3074 /* Walk through all of the possible transitions. */
3075 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3077 TransitionRule
*rule
= l
->rule
;
3078 if (xg_instruction_matches_rule (insn
, rule
))
3085 /* Various Other Internal Functions. */
3088 is_unique_insn_expansion (TransitionRule
*r
)
3090 if (!r
->to_instr
|| r
->to_instr
->next
!= NULL
)
3092 if (r
->to_instr
->typ
!= INSTR_INSTR
)
3098 /* Check if there is exactly one relaxation for INSN that converts it to
3099 another instruction of equal or larger size. If so, and if TARG is
3100 non-null, go ahead and generate the relaxed instruction into TARG. If
3101 NARROW_ONLY is true, then only consider relaxations that widen a narrow
3102 instruction, i.e., ignore relaxations that convert to an instruction of
3103 equal size. In some contexts where this function is used, only
3104 a single widening is allowed and the NARROW_ONLY argument is used to
3105 exclude cases like ADDI being "widened" to an ADDMI, which may
3106 later be relaxed to an ADDMI/ADDI pair. */
3109 xg_is_single_relaxable_insn (TInsn
*insn
, TInsn
*targ
, bfd_boolean narrow_only
)
3111 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3113 TransitionRule
*match
= 0;
3115 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3116 gas_assert (insn
->opcode
< table
->num_opcodes
);
3118 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3120 TransitionRule
*rule
= l
->rule
;
3122 if (xg_instruction_matches_rule (insn
, rule
)
3123 && is_unique_insn_expansion (rule
)
3124 && (xg_get_single_size (insn
->opcode
) + (narrow_only
? 1 : 0)
3125 <= xg_get_single_size (rule
->to_instr
->opcode
)))
3136 xg_build_to_insn (targ
, insn
, match
->to_instr
);
3141 /* Return the maximum number of bytes this opcode can expand to. */
3144 xg_get_max_insn_widen_size (xtensa_opcode opcode
)
3146 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3148 int max_size
= xg_get_single_size (opcode
);
3150 gas_assert (opcode
< table
->num_opcodes
);
3152 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
3154 TransitionRule
*rule
= l
->rule
;
3155 BuildInstr
*build_list
;
3160 build_list
= rule
->to_instr
;
3161 if (is_unique_insn_expansion (rule
))
3163 gas_assert (build_list
->typ
== INSTR_INSTR
);
3164 this_size
= xg_get_max_insn_widen_size (build_list
->opcode
);
3167 for (; build_list
!= NULL
; build_list
= build_list
->next
)
3169 switch (build_list
->typ
)
3172 this_size
+= xg_get_single_size (build_list
->opcode
);
3174 case INSTR_LITERAL_DEF
:
3175 case INSTR_LABEL_DEF
:
3180 if (this_size
> max_size
)
3181 max_size
= this_size
;
3187 /* Return the maximum number of literal bytes this opcode can generate. */
3190 xg_get_max_insn_widen_literal_size (xtensa_opcode opcode
)
3192 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3196 gas_assert (opcode
< table
->num_opcodes
);
3198 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
3200 TransitionRule
*rule
= l
->rule
;
3201 BuildInstr
*build_list
;
3206 build_list
= rule
->to_instr
;
3207 if (is_unique_insn_expansion (rule
))
3209 gas_assert (build_list
->typ
== INSTR_INSTR
);
3210 this_size
= xg_get_max_insn_widen_literal_size (build_list
->opcode
);
3213 for (; build_list
!= NULL
; build_list
= build_list
->next
)
3215 switch (build_list
->typ
)
3217 case INSTR_LITERAL_DEF
:
3218 /* Hard-coded 4-byte literal. */
3222 case INSTR_LABEL_DEF
:
3227 if (this_size
> max_size
)
3228 max_size
= this_size
;
3235 xg_is_relaxable_insn (TInsn
*insn
, int lateral_steps
)
3237 int steps_taken
= 0;
3238 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3241 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3242 gas_assert (insn
->opcode
< table
->num_opcodes
);
3244 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3246 TransitionRule
*rule
= l
->rule
;
3248 if (xg_instruction_matches_rule (insn
, rule
))
3250 if (steps_taken
== lateral_steps
)
3260 get_special_literal_symbol (void)
3262 static symbolS
*sym
= NULL
;
3265 sym
= symbol_find_or_make ("SPECIAL_LITERAL0\001");
3271 get_special_label_symbol (void)
3273 static symbolS
*sym
= NULL
;
3276 sym
= symbol_find_or_make ("SPECIAL_LABEL0\001");
3282 xg_valid_literal_expression (const expressionS
*exp
)
3304 /* This will check to see if the value can be converted into the
3305 operand type. It will return TRUE if it does not fit. */
3308 xg_check_operand (int32 value
, xtensa_opcode opcode
, int operand
)
3310 uint32 valbuf
= value
;
3311 if (xtensa_operand_encode (xtensa_default_isa
, opcode
, operand
, &valbuf
))
3317 /* Assumes: All immeds are constants. Check that all constants fit
3318 into their immeds; return FALSE if not. */
3321 xg_immeds_fit (const TInsn
*insn
)
3323 xtensa_isa isa
= xtensa_default_isa
;
3327 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3328 for (i
= 0; i
< n
; ++i
)
3330 const expressionS
*exp
= &insn
->tok
[i
];
3332 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
3339 if (xg_check_operand (exp
->X_add_number
, insn
->opcode
, i
))
3344 /* The symbol should have a fixup associated with it. */
3353 /* This should only be called after we have an initial
3354 estimate of the addresses. */
3357 xg_symbolic_immeds_fit (const TInsn
*insn
,
3363 xtensa_isa isa
= xtensa_default_isa
;
3371 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3373 for (i
= 0; i
< n
; ++i
)
3375 const expressionS
*exp
= &insn
->tok
[i
];
3377 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
3384 if (xg_check_operand (exp
->X_add_number
, insn
->opcode
, i
))
3390 /* Check for the worst case. */
3391 if (xg_check_operand (0xffff, insn
->opcode
, i
))
3396 /* We only allow symbols for PC-relative references.
3397 If pc_frag == 0, then we don't have frag locations yet. */
3399 || xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 0)
3402 /* If it is a weak symbol or a symbol in a different section,
3403 it cannot be known to fit at assembly time. */
3404 if (S_IS_WEAK (exp
->X_add_symbol
)
3405 || S_GET_SEGMENT (exp
->X_add_symbol
) != pc_seg
)
3407 /* For a direct call with --no-longcalls, be optimistic and
3408 assume it will be in range. If the symbol is weak and
3409 undefined, it may remain undefined at link-time, in which
3410 case it will have a zero value and almost certainly be out
3411 of range for a direct call; thus, relax for undefined weak
3412 symbols even if longcalls is not enabled. */
3413 if (is_direct_call_opcode (insn
->opcode
)
3414 && ! pc_frag
->tc_frag_data
.use_longcalls
3415 && (! S_IS_WEAK (exp
->X_add_symbol
)
3416 || S_IS_DEFINED (exp
->X_add_symbol
)))
3422 symbolP
= exp
->X_add_symbol
;
3423 sym_frag
= symbol_get_frag (symbolP
);
3424 target
= S_GET_VALUE (symbolP
) + exp
->X_add_number
;
3425 pc
= pc_frag
->fr_address
+ pc_offset
;
3427 /* If frag has yet to be reached on this pass, assume it
3428 will move by STRETCH just as we did. If this is not so,
3429 it will be because some frag between grows, and that will
3430 force another pass. Beware zero-length frags. There
3431 should be a faster way to do this. */
3434 && sym_frag
->relax_marker
!= pc_frag
->relax_marker
3435 && S_GET_SEGMENT (symbolP
) == pc_seg
)
3440 new_offset
= target
;
3441 xtensa_operand_do_reloc (isa
, insn
->opcode
, i
, &new_offset
, pc
);
3442 if (xg_check_operand (new_offset
, insn
->opcode
, i
))
3447 /* The symbol should have a fixup associated with it. */
3456 /* Return TRUE on success. */
3459 xg_build_to_insn (TInsn
*targ
, TInsn
*insn
, BuildInstr
*bi
)
3465 targ
->debug_line
= insn
->debug_line
;
3466 targ
->loc_directive_seen
= insn
->loc_directive_seen
;
3471 targ
->opcode
= bi
->opcode
;
3472 targ
->insn_type
= ITYPE_INSN
;
3473 targ
->is_specific_opcode
= FALSE
;
3475 for (; op
!= NULL
; op
= op
->next
)
3477 int op_num
= op
->op_num
;
3478 int op_data
= op
->op_data
;
3480 gas_assert (op
->op_num
< MAX_INSN_ARGS
);
3482 if (targ
->ntok
<= op_num
)
3483 targ
->ntok
= op_num
+ 1;
3488 set_expr_const (&targ
->tok
[op_num
], op_data
);
3491 gas_assert (op_data
< insn
->ntok
);
3492 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3495 if (insn
->extra_arg
.X_op
!= O_register
)
3497 copy_expr (&targ
->tok
[op_num
], &insn
->extra_arg
);
3500 sym
= get_special_literal_symbol ();
3501 set_expr_symbol_offset (&targ
->tok
[op_num
], sym
, 0);
3502 if (insn
->tok
[op_data
].X_op
== O_tlsfunc
3503 || insn
->tok
[op_data
].X_op
== O_tlsarg
)
3504 copy_expr (&targ
->extra_arg
, &insn
->tok
[op_data
]);
3507 sym
= get_special_label_symbol ();
3508 set_expr_symbol_offset (&targ
->tok
[op_num
], sym
, 0);
3510 case OP_OPERAND_HI16U
:
3511 case OP_OPERAND_LOW16U
:
3512 gas_assert (op_data
< insn
->ntok
);
3513 if (expr_is_const (&insn
->tok
[op_data
]))
3516 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3517 val
= xg_apply_userdef_op_fn (op
->typ
,
3520 targ
->tok
[op_num
].X_add_number
= val
;
3524 /* For const16 we can create relocations for these. */
3525 if (targ
->opcode
== XTENSA_UNDEFINED
3526 || (targ
->opcode
!= xtensa_const16_opcode
))
3528 gas_assert (op_data
< insn
->ntok
);
3529 /* Need to build a O_lo16 or O_hi16. */
3530 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3531 if (targ
->tok
[op_num
].X_op
== O_symbol
)
3533 if (op
->typ
== OP_OPERAND_HI16U
)
3534 targ
->tok
[op_num
].X_op
= O_hi16
;
3535 else if (op
->typ
== OP_OPERAND_LOW16U
)
3536 targ
->tok
[op_num
].X_op
= O_lo16
;
3543 /* currently handles:
3546 OP_OPERAND_F32MINUS */
3547 if (xg_has_userdef_op_fn (op
->typ
))
3549 gas_assert (op_data
< insn
->ntok
);
3550 if (expr_is_const (&insn
->tok
[op_data
]))
3553 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3554 val
= xg_apply_userdef_op_fn (op
->typ
,
3557 targ
->tok
[op_num
].X_add_number
= val
;
3560 return FALSE
; /* We cannot use a relocation for this. */
3569 case INSTR_LITERAL_DEF
:
3571 targ
->opcode
= XTENSA_UNDEFINED
;
3572 targ
->insn_type
= ITYPE_LITERAL
;
3573 targ
->is_specific_opcode
= FALSE
;
3574 for (; op
!= NULL
; op
= op
->next
)
3576 int op_num
= op
->op_num
;
3577 int op_data
= op
->op_data
;
3578 gas_assert (op
->op_num
< MAX_INSN_ARGS
);
3580 if (targ
->ntok
<= op_num
)
3581 targ
->ntok
= op_num
+ 1;
3586 gas_assert (op_data
< insn
->ntok
);
3587 /* We can only pass resolvable literals through. */
3588 if (!xg_valid_literal_expression (&insn
->tok
[op_data
]))
3590 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3602 case INSTR_LABEL_DEF
:
3604 targ
->opcode
= XTENSA_UNDEFINED
;
3605 targ
->insn_type
= ITYPE_LABEL
;
3606 targ
->is_specific_opcode
= FALSE
;
3607 /* Literal with no ops is a label? */
3608 gas_assert (op
== NULL
);
3619 /* Return TRUE on success. */
3622 xg_build_to_stack (IStack
*istack
, TInsn
*insn
, BuildInstr
*bi
)
3624 for (; bi
!= NULL
; bi
= bi
->next
)
3626 TInsn
*next_insn
= istack_push_space (istack
);
3628 if (!xg_build_to_insn (next_insn
, insn
, bi
))
3635 /* Return TRUE on valid expansion. */
3638 xg_expand_to_stack (IStack
*istack
, TInsn
*insn
, int lateral_steps
)
3640 int stack_size
= istack
->ninsn
;
3641 int steps_taken
= 0;
3642 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3645 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3646 gas_assert (insn
->opcode
< table
->num_opcodes
);
3648 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3650 TransitionRule
*rule
= l
->rule
;
3652 if (xg_instruction_matches_rule (insn
, rule
))
3654 if (lateral_steps
== steps_taken
)
3658 /* This is it. Expand the rule to the stack. */
3659 if (!xg_build_to_stack (istack
, insn
, rule
->to_instr
))
3662 /* Check to see if it fits. */
3663 for (i
= stack_size
; i
< istack
->ninsn
; i
++)
3665 TInsn
*tinsn
= &istack
->insn
[i
];
3667 if (tinsn
->insn_type
== ITYPE_INSN
3668 && !tinsn_has_symbolic_operands (tinsn
)
3669 && !xg_immeds_fit (tinsn
))
3671 istack
->ninsn
= stack_size
;
3684 /* Relax the assembly instruction at least "min_steps".
3685 Return the number of steps taken.
3687 For relaxation to correctly terminate, every relaxation chain must
3688 terminate in one of two ways:
3690 1. If the chain from one instruction to the next consists entirely of
3691 single instructions, then the chain *must* handle all possible
3692 immediates without failing. It must not ever fail because an
3693 immediate is out of range. The MOVI.N -> MOVI -> L32R relaxation
3694 chain is one example. L32R loads 32 bits, and there cannot be an
3695 immediate larger than 32 bits, so it satisfies this condition.
3696 Single instruction relaxation chains are as defined by
3697 xg_is_single_relaxable_instruction.
3699 2. Otherwise, the chain must end in a multi-instruction expansion: e.g.,
3700 BNEZ.N -> BNEZ -> BNEZ.W15 -> BENZ.N/J
3702 Strictly speaking, in most cases you can violate condition 1 and be OK
3703 -- in particular when the last two instructions have the same single
3704 size. But nevertheless, you should guarantee the above two conditions.
3706 We could fix this so that single-instruction expansions correctly
3707 terminate when they can't handle the range, but the error messages are
3708 worse, and it actually turns out that in every case but one (18-bit wide
3709 branches), you need a multi-instruction expansion to get the full range
3710 anyway. And because 18-bit branches are handled identically to 15-bit
3711 branches, there isn't any point in changing it. */
3714 xg_assembly_relax (IStack
*istack
,
3717 fragS
*pc_frag
, /* if pc_frag == 0, not pc-relative */
3718 offsetT pc_offset
, /* offset in fragment */
3719 int min_steps
, /* minimum conversion steps */
3720 long stretch
) /* number of bytes stretched so far */
3722 int steps_taken
= 0;
3724 /* Some of its immeds don't fit. Try to build a relaxed version.
3725 This may go through a couple of stages of single instruction
3726 transformations before we get there. */
3728 TInsn single_target
;
3730 int lateral_steps
= 0;
3731 int istack_size
= istack
->ninsn
;
3733 if (xg_symbolic_immeds_fit (insn
, pc_seg
, pc_frag
, pc_offset
, stretch
)
3734 && steps_taken
>= min_steps
)
3736 istack_push (istack
, insn
);
3739 current_insn
= *insn
;
3741 /* Walk through all of the single instruction expansions. */
3742 while (xg_is_single_relaxable_insn (¤t_insn
, &single_target
, FALSE
))
3745 if (xg_symbolic_immeds_fit (&single_target
, pc_seg
, pc_frag
, pc_offset
,
3748 if (steps_taken
>= min_steps
)
3750 istack_push (istack
, &single_target
);
3754 current_insn
= single_target
;
3757 /* Now check for a multi-instruction expansion. */
3758 while (xg_is_relaxable_insn (¤t_insn
, lateral_steps
))
3760 if (xg_symbolic_immeds_fit (¤t_insn
, pc_seg
, pc_frag
, pc_offset
,
3763 if (steps_taken
>= min_steps
)
3765 istack_push (istack
, ¤t_insn
);
3770 if (xg_expand_to_stack (istack
, ¤t_insn
, lateral_steps
))
3772 if (steps_taken
>= min_steps
)
3776 istack
->ninsn
= istack_size
;
3779 /* It's not going to work -- use the original. */
3780 istack_push (istack
, insn
);
3786 xg_finish_frag (char *last_insn
,
3787 enum xtensa_relax_statesE frag_state
,
3788 enum xtensa_relax_statesE slot0_state
,
3790 bfd_boolean is_insn
)
3792 /* Finish off this fragment so that it has at LEAST the desired
3793 max_growth. If it doesn't fit in this fragment, close this one
3794 and start a new one. In either case, return a pointer to the
3795 beginning of the growth area. */
3799 frag_grow (max_growth
);
3800 old_frag
= frag_now
;
3802 frag_now
->fr_opcode
= last_insn
;
3804 frag_now
->tc_frag_data
.is_insn
= TRUE
;
3806 frag_var (rs_machine_dependent
, max_growth
, max_growth
,
3807 frag_state
, frag_now
->fr_symbol
, frag_now
->fr_offset
, last_insn
);
3809 old_frag
->tc_frag_data
.slot_subtypes
[0] = slot0_state
;
3810 xtensa_set_frag_assembly_state (frag_now
);
3812 /* Just to make sure that we did not split it up. */
3813 gas_assert (old_frag
->fr_next
== frag_now
);
3817 /* Return TRUE if the target frag is one of the next non-empty frags. */
3820 is_next_frag_target (const fragS
*fragP
, const fragS
*target
)
3825 for (; fragP
; fragP
= fragP
->fr_next
)
3827 if (fragP
== target
)
3829 if (fragP
->fr_fix
!= 0)
3831 if (fragP
->fr_type
== rs_fill
&& fragP
->fr_offset
!= 0)
3833 if ((fragP
->fr_type
== rs_align
|| fragP
->fr_type
== rs_align_code
)
3834 && ((fragP
->fr_address
% (1 << fragP
->fr_offset
)) != 0))
3836 if (fragP
->fr_type
== rs_space
)
3844 is_branch_jmp_to_next (TInsn
*insn
, fragS
*fragP
)
3846 xtensa_isa isa
= xtensa_default_isa
;
3848 int num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
3853 if (xtensa_opcode_is_branch (isa
, insn
->opcode
) != 1
3854 && xtensa_opcode_is_jump (isa
, insn
->opcode
) != 1)
3857 for (i
= 0; i
< num_ops
; i
++)
3859 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1)
3865 if (target_op
== -1)
3868 if (insn
->ntok
<= target_op
)
3871 if (insn
->tok
[target_op
].X_op
!= O_symbol
)
3874 sym
= insn
->tok
[target_op
].X_add_symbol
;
3878 if (insn
->tok
[target_op
].X_add_number
!= 0)
3881 target_frag
= symbol_get_frag (sym
);
3882 if (target_frag
== NULL
)
3885 if (is_next_frag_target (fragP
->fr_next
, target_frag
)
3886 && S_GET_VALUE (sym
) == target_frag
->fr_address
)
3894 xg_add_branch_and_loop_targets (TInsn
*insn
)
3896 xtensa_isa isa
= xtensa_default_isa
;
3897 int num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
3899 if (xtensa_opcode_is_loop (isa
, insn
->opcode
) == 1)
3902 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1
3903 && insn
->tok
[i
].X_op
== O_symbol
)
3904 symbol_get_tc (insn
->tok
[i
].X_add_symbol
)->is_loop_target
= TRUE
;
3908 if (xtensa_opcode_is_branch (isa
, insn
->opcode
) == 1
3909 || xtensa_opcode_is_loop (isa
, insn
->opcode
) == 1)
3913 for (i
= 0; i
< insn
->ntok
&& i
< num_ops
; i
++)
3915 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1
3916 && insn
->tok
[i
].X_op
== O_symbol
)
3918 symbolS
*sym
= insn
->tok
[i
].X_add_symbol
;
3919 symbol_get_tc (sym
)->is_branch_target
= TRUE
;
3920 if (S_IS_DEFINED (sym
))
3921 symbol_get_frag (sym
)->tc_frag_data
.is_branch_target
= TRUE
;
3928 /* Return FALSE if no error. */
3931 xg_build_token_insn (BuildInstr
*instr_spec
, TInsn
*old_insn
, TInsn
*new_insn
)
3936 switch (instr_spec
->typ
)
3939 new_insn
->insn_type
= ITYPE_INSN
;
3940 new_insn
->opcode
= instr_spec
->opcode
;
3942 case INSTR_LITERAL_DEF
:
3943 new_insn
->insn_type
= ITYPE_LITERAL
;
3944 new_insn
->opcode
= XTENSA_UNDEFINED
;
3946 case INSTR_LABEL_DEF
:
3949 new_insn
->is_specific_opcode
= FALSE
;
3950 new_insn
->debug_line
= old_insn
->debug_line
;
3951 new_insn
->loc_directive_seen
= old_insn
->loc_directive_seen
;
3953 for (b_op
= instr_spec
->ops
; b_op
!= NULL
; b_op
= b_op
->next
)
3956 const expressionS
*src_exp
;
3962 /* The expression must be the constant. */
3963 gas_assert (b_op
->op_num
< MAX_INSN_ARGS
);
3964 exp
= &new_insn
->tok
[b_op
->op_num
];
3965 set_expr_const (exp
, b_op
->op_data
);
3969 gas_assert (b_op
->op_num
< MAX_INSN_ARGS
);
3970 gas_assert (b_op
->op_data
< (unsigned) old_insn
->ntok
);
3971 src_exp
= &old_insn
->tok
[b_op
->op_data
];
3972 exp
= &new_insn
->tok
[b_op
->op_num
];
3973 copy_expr (exp
, src_exp
);
3978 as_bad (_("can't handle generation of literal/labels yet"));
3982 as_bad (_("can't handle undefined OP TYPE"));
3987 new_insn
->ntok
= num_ops
;
3992 /* Return TRUE if it was simplified. */
3995 xg_simplify_insn (TInsn
*old_insn
, TInsn
*new_insn
)
3997 TransitionRule
*rule
;
3998 BuildInstr
*insn_spec
;
4000 if (old_insn
->is_specific_opcode
|| !density_supported
)
4003 rule
= xg_instruction_match (old_insn
);
4007 insn_spec
= rule
->to_instr
;
4008 /* There should only be one. */
4009 gas_assert (insn_spec
!= NULL
);
4010 gas_assert (insn_spec
->next
== NULL
);
4011 if (insn_spec
->next
!= NULL
)
4014 xg_build_token_insn (insn_spec
, old_insn
, new_insn
);
4020 /* xg_expand_assembly_insn: (1) Simplify the instruction, i.e., l32i ->
4021 l32i.n. (2) Check the number of operands. (3) Place the instruction
4022 tokens into the stack or relax it and place multiple
4023 instructions/literals onto the stack. Return FALSE if no error. */
4026 xg_expand_assembly_insn (IStack
*istack
, TInsn
*orig_insn
)
4030 bfd_boolean do_expand
;
4032 tinsn_init (&new_insn
);
4034 /* Narrow it if we can. xg_simplify_insn now does all the
4035 appropriate checking (e.g., for the density option). */
4036 if (xg_simplify_insn (orig_insn
, &new_insn
))
4037 orig_insn
= &new_insn
;
4039 noperands
= xtensa_opcode_num_operands (xtensa_default_isa
,
4041 if (orig_insn
->ntok
< noperands
)
4043 as_bad (_("found %d operands for '%s': Expected %d"),
4045 xtensa_opcode_name (xtensa_default_isa
, orig_insn
->opcode
),
4049 if (orig_insn
->ntok
> noperands
)
4050 as_warn (_("found too many (%d) operands for '%s': Expected %d"),
4052 xtensa_opcode_name (xtensa_default_isa
, orig_insn
->opcode
),
4055 /* If there are not enough operands, we will assert above. If there
4056 are too many, just cut out the extras here. */
4057 orig_insn
->ntok
= noperands
;
4059 if (tinsn_has_invalid_symbolic_operands (orig_insn
))
4062 /* Special case for extui opcode which has constraints not handled
4063 by the ordinary operand encoding checks. The number of operands
4064 and related syntax issues have already been checked. */
4065 if (orig_insn
->opcode
== xtensa_extui_opcode
)
4067 int shiftimm
= orig_insn
->tok
[2].X_add_number
;
4068 int maskimm
= orig_insn
->tok
[3].X_add_number
;
4069 if (shiftimm
+ maskimm
> 32)
4071 as_bad (_("immediate operands sum to greater than 32"));
4076 /* If the instruction will definitely need to be relaxed, it is better
4077 to expand it now for better scheduling. Decide whether to expand
4079 do_expand
= (!orig_insn
->is_specific_opcode
&& use_transform ());
4081 /* Calls should be expanded to longcalls only in the backend relaxation
4082 so that the assembly scheduler will keep the L32R/CALLX instructions
4084 if (is_direct_call_opcode (orig_insn
->opcode
))
4087 if (tinsn_has_symbolic_operands (orig_insn
))
4089 /* The values of symbolic operands are not known yet, so only expand
4090 now if an operand is "complex" (e.g., difference of symbols) and
4091 will have to be stored as a literal regardless of the value. */
4092 if (!tinsn_has_complex_operands (orig_insn
))
4095 else if (xg_immeds_fit (orig_insn
))
4099 xg_assembly_relax (istack
, orig_insn
, 0, 0, 0, 0, 0);
4101 istack_push (istack
, orig_insn
);
4107 /* Return TRUE if the section flags are marked linkonce
4108 or the name is .gnu.linkonce.*. */
4110 static int linkonce_len
= sizeof (".gnu.linkonce.") - 1;
4113 get_is_linkonce_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
)
4115 flagword flags
, link_once_flags
;
4117 flags
= bfd_get_section_flags (abfd
, sec
);
4118 link_once_flags
= (flags
& SEC_LINK_ONCE
);
4120 /* Flags might not be set yet. */
4121 if (!link_once_flags
4122 && strncmp (segment_name (sec
), ".gnu.linkonce.", linkonce_len
) == 0)
4123 link_once_flags
= SEC_LINK_ONCE
;
4125 return (link_once_flags
!= 0);
4130 xtensa_add_literal_sym (symbolS
*sym
)
4134 l
= (sym_list
*) xmalloc (sizeof (sym_list
));
4136 l
->next
= literal_syms
;
4142 xtensa_create_literal_symbol (segT sec
, fragS
*frag
)
4144 static int lit_num
= 0;
4145 static char name
[256];
4148 sprintf (name
, ".L_lit_sym%d", lit_num
);
4150 /* Create a local symbol. If it is in a linkonce section, we have to
4151 be careful to make sure that if it is used in a relocation that the
4152 symbol will be in the output file. */
4153 if (get_is_linkonce_section (stdoutput
, sec
))
4155 symbolP
= symbol_new (name
, sec
, 0, frag
);
4156 S_CLEAR_EXTERNAL (symbolP
);
4157 /* symbolP->local = 1; */
4160 symbolP
= symbol_new (name
, sec
, 0, frag
);
4162 xtensa_add_literal_sym (symbolP
);
4169 /* Currently all literals that are generated here are 32-bit L32R targets. */
4172 xg_assemble_literal (/* const */ TInsn
*insn
)
4175 symbolS
*lit_sym
= NULL
;
4176 bfd_reloc_code_real_type reloc
;
4177 bfd_boolean pcrel
= FALSE
;
4180 /* size = 4 for L32R. It could easily be larger when we move to
4181 larger constants. Add a parameter later. */
4182 offsetT litsize
= 4;
4183 offsetT litalign
= 2; /* 2^2 = 4 */
4184 expressionS saved_loc
;
4185 expressionS
* emit_val
;
4187 set_expr_symbol_offset (&saved_loc
, frag_now
->fr_symbol
, frag_now_fix ());
4189 gas_assert (insn
->insn_type
== ITYPE_LITERAL
);
4190 gas_assert (insn
->ntok
== 1); /* must be only one token here */
4192 xtensa_switch_to_literal_fragment (&state
);
4194 emit_val
= &insn
->tok
[0];
4195 if (emit_val
->X_op
== O_big
)
4197 int size
= emit_val
->X_add_number
* CHARS_PER_LITTLENUM
;
4200 /* This happens when someone writes a "movi a2, big_number". */
4201 as_bad_where (frag_now
->fr_file
, frag_now
->fr_line
,
4202 _("invalid immediate"));
4203 xtensa_restore_emit_state (&state
);
4208 /* Force a 4-byte align here. Note that this opens a new frag, so all
4209 literals done with this function have a frag to themselves. That's
4210 important for the way text section literals work. */
4211 frag_align (litalign
, 0, 0);
4212 record_alignment (now_seg
, litalign
);
4214 switch (emit_val
->X_op
)
4224 p
= frag_more (litsize
);
4225 xtensa_set_frag_assembly_state (frag_now
);
4226 reloc
= map_operator_to_reloc (emit_val
->X_op
, TRUE
);
4227 if (emit_val
->X_add_symbol
)
4228 emit_val
->X_op
= O_symbol
;
4230 emit_val
->X_op
= O_constant
;
4231 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
,
4232 litsize
, emit_val
, pcrel
, reloc
);
4236 emit_expr (emit_val
, litsize
);
4240 gas_assert (frag_now
->tc_frag_data
.literal_frag
== NULL
);
4241 frag_now
->tc_frag_data
.literal_frag
= get_literal_pool_location (now_seg
);
4242 frag_now
->fr_symbol
= xtensa_create_literal_symbol (now_seg
, frag_now
);
4243 lit_sym
= frag_now
->fr_symbol
;
4246 xtensa_restore_emit_state (&state
);
4252 xg_assemble_literal_space (/* const */ int size
, int slot
)
4255 /* We might have to do something about this alignment. It only
4256 takes effect if something is placed here. */
4257 offsetT litalign
= 2; /* 2^2 = 4 */
4258 fragS
*lit_saved_frag
;
4260 gas_assert (size
% 4 == 0);
4262 xtensa_switch_to_literal_fragment (&state
);
4264 /* Force a 4-byte align here. */
4265 frag_align (litalign
, 0, 0);
4266 record_alignment (now_seg
, litalign
);
4270 lit_saved_frag
= frag_now
;
4271 frag_now
->tc_frag_data
.literal_frag
= get_literal_pool_location (now_seg
);
4272 frag_now
->fr_symbol
= xtensa_create_literal_symbol (now_seg
, frag_now
);
4273 xg_finish_frag (0, RELAX_LITERAL
, 0, size
, FALSE
);
4276 xtensa_restore_emit_state (&state
);
4277 frag_now
->tc_frag_data
.literal_frags
[slot
] = lit_saved_frag
;
4281 /* Put in a fixup record based on the opcode.
4282 Return TRUE on success. */
4285 xg_add_opcode_fix (TInsn
*tinsn
,
4293 xtensa_opcode opcode
= tinsn
->opcode
;
4294 bfd_reloc_code_real_type reloc
;
4295 reloc_howto_type
*howto
;
4299 reloc
= BFD_RELOC_NONE
;
4301 /* First try the special cases for "alternate" relocs. */
4302 if (opcode
== xtensa_l32r_opcode
)
4304 if (fragP
->tc_frag_data
.use_absolute_literals
)
4305 reloc
= encode_alt_reloc (slot
);
4307 else if (opcode
== xtensa_const16_opcode
)
4309 if (exp
->X_op
== O_lo16
)
4311 reloc
= encode_reloc (slot
);
4312 exp
->X_op
= O_symbol
;
4314 else if (exp
->X_op
== O_hi16
)
4316 reloc
= encode_alt_reloc (slot
);
4317 exp
->X_op
= O_symbol
;
4321 if (opnum
!= get_relaxable_immed (opcode
))
4323 as_bad (_("invalid relocation for operand %i of '%s'"),
4324 opnum
+ 1, xtensa_opcode_name (xtensa_default_isa
, opcode
));
4328 /* Handle erroneous "@h" and "@l" expressions here before they propagate
4329 into the symbol table where the generic portions of the assembler
4330 won't know what to do with them. */
4331 if (exp
->X_op
== O_lo16
|| exp
->X_op
== O_hi16
)
4333 as_bad (_("invalid expression for operand %i of '%s'"),
4334 opnum
+ 1, xtensa_opcode_name (xtensa_default_isa
, opcode
));
4338 /* Next try the generic relocs. */
4339 if (reloc
== BFD_RELOC_NONE
)
4340 reloc
= encode_reloc (slot
);
4341 if (reloc
== BFD_RELOC_NONE
)
4343 as_bad (_("invalid relocation in instruction slot %i"), slot
);
4347 howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
4350 as_bad (_("undefined symbol for opcode \"%s\""),
4351 xtensa_opcode_name (xtensa_default_isa
, opcode
));
4355 fmt_length
= xtensa_format_length (xtensa_default_isa
, fmt
);
4356 the_fix
= fix_new_exp (fragP
, offset
, fmt_length
, exp
,
4357 howto
->pc_relative
, reloc
);
4358 the_fix
->fx_no_overflow
= 1;
4359 the_fix
->tc_fix_data
.X_add_symbol
= exp
->X_add_symbol
;
4360 the_fix
->tc_fix_data
.X_add_number
= exp
->X_add_number
;
4361 the_fix
->tc_fix_data
.slot
= slot
;
4368 xg_emit_insn_to_buf (TInsn
*tinsn
,
4372 bfd_boolean build_fix
)
4374 static xtensa_insnbuf insnbuf
= NULL
;
4375 bfd_boolean has_symbolic_immed
= FALSE
;
4376 bfd_boolean ok
= TRUE
;
4379 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
4381 has_symbolic_immed
= tinsn_to_insnbuf (tinsn
, insnbuf
);
4382 if (has_symbolic_immed
&& build_fix
)
4385 xtensa_format fmt
= xg_get_single_format (tinsn
->opcode
);
4386 int slot
= xg_get_single_slot (tinsn
->opcode
);
4387 int opnum
= get_relaxable_immed (tinsn
->opcode
);
4388 expressionS
*exp
= &tinsn
->tok
[opnum
];
4390 if (!xg_add_opcode_fix (tinsn
, opnum
, fmt
, slot
, exp
, fragP
, offset
))
4393 fragP
->tc_frag_data
.is_insn
= TRUE
;
4394 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
,
4395 (unsigned char *) buf
, 0);
4401 xg_resolve_literals (TInsn
*insn
, symbolS
*lit_sym
)
4403 symbolS
*sym
= get_special_literal_symbol ();
4407 gas_assert (insn
->insn_type
== ITYPE_INSN
);
4408 for (i
= 0; i
< insn
->ntok
; i
++)
4409 if (insn
->tok
[i
].X_add_symbol
== sym
)
4410 insn
->tok
[i
].X_add_symbol
= lit_sym
;
4416 xg_resolve_labels (TInsn
*insn
, symbolS
*label_sym
)
4418 symbolS
*sym
= get_special_label_symbol ();
4420 for (i
= 0; i
< insn
->ntok
; i
++)
4421 if (insn
->tok
[i
].X_add_symbol
== sym
)
4422 insn
->tok
[i
].X_add_symbol
= label_sym
;
4427 /* Return TRUE if the instruction can write to the specified
4428 integer register. */
4431 is_register_writer (const TInsn
*insn
, const char *regset
, int regnum
)
4435 xtensa_isa isa
= xtensa_default_isa
;
4437 num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
4439 for (i
= 0; i
< num_ops
; i
++)
4442 inout
= xtensa_operand_inout (isa
, insn
->opcode
, i
);
4443 if ((inout
== 'o' || inout
== 'm')
4444 && xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
4446 xtensa_regfile opnd_rf
=
4447 xtensa_operand_regfile (isa
, insn
->opcode
, i
);
4448 if (!strcmp (xtensa_regfile_shortname (isa
, opnd_rf
), regset
))
4450 if ((insn
->tok
[i
].X_op
== O_register
)
4451 && (insn
->tok
[i
].X_add_number
== regnum
))
4461 is_bad_loopend_opcode (const TInsn
*tinsn
)
4463 xtensa_opcode opcode
= tinsn
->opcode
;
4465 if (opcode
== XTENSA_UNDEFINED
)
4468 if (opcode
== xtensa_call0_opcode
4469 || opcode
== xtensa_callx0_opcode
4470 || opcode
== xtensa_call4_opcode
4471 || opcode
== xtensa_callx4_opcode
4472 || opcode
== xtensa_call8_opcode
4473 || opcode
== xtensa_callx8_opcode
4474 || opcode
== xtensa_call12_opcode
4475 || opcode
== xtensa_callx12_opcode
4476 || opcode
== xtensa_isync_opcode
4477 || opcode
== xtensa_ret_opcode
4478 || opcode
== xtensa_ret_n_opcode
4479 || opcode
== xtensa_retw_opcode
4480 || opcode
== xtensa_retw_n_opcode
4481 || opcode
== xtensa_waiti_opcode
4482 || opcode
== xtensa_rsr_lcount_opcode
)
4489 /* Labels that begin with ".Ln" or ".LM" are unaligned.
4490 This allows the debugger to add unaligned labels.
4491 Also, the assembler generates stabs labels that need
4492 not be aligned: FAKE_LABEL_NAME . {"F", "L", "endfunc"}. */
4495 is_unaligned_label (symbolS
*sym
)
4497 const char *name
= S_GET_NAME (sym
);
4498 static size_t fake_size
= 0;
4502 && name
[1] == 'L' && (name
[2] == 'n' || name
[2] == 'M'))
4505 /* FAKE_LABEL_NAME followed by "F", "L" or "endfunc" */
4507 fake_size
= strlen (FAKE_LABEL_NAME
);
4510 && strncmp (FAKE_LABEL_NAME
, name
, fake_size
) == 0
4511 && (name
[fake_size
] == 'F'
4512 || name
[fake_size
] == 'L'
4513 || (name
[fake_size
] == 'e'
4514 && strncmp ("endfunc", name
+fake_size
, 7) == 0)))
4522 next_non_empty_frag (const fragS
*fragP
)
4524 fragS
*next_fragP
= fragP
->fr_next
;
4526 /* Sometimes an empty will end up here due storage allocation issues.
4527 So we have to skip until we find something legit. */
4528 while (next_fragP
&& next_fragP
->fr_fix
== 0)
4529 next_fragP
= next_fragP
->fr_next
;
4531 if (next_fragP
== NULL
|| next_fragP
->fr_fix
== 0)
4539 next_frag_opcode_is_loop (const fragS
*fragP
, xtensa_opcode
*opcode
)
4541 xtensa_opcode out_opcode
;
4542 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
4544 if (next_fragP
== NULL
)
4547 out_opcode
= get_opcode_from_buf (next_fragP
->fr_literal
, 0);
4548 if (xtensa_opcode_is_loop (xtensa_default_isa
, out_opcode
) == 1)
4550 *opcode
= out_opcode
;
4558 frag_format_size (const fragS
*fragP
)
4560 static xtensa_insnbuf insnbuf
= NULL
;
4561 xtensa_isa isa
= xtensa_default_isa
;
4566 insnbuf
= xtensa_insnbuf_alloc (isa
);
4569 return XTENSA_UNDEFINED
;
4571 xtensa_insnbuf_from_chars (isa
, insnbuf
,
4572 (unsigned char *) fragP
->fr_literal
, 0);
4574 fmt
= xtensa_format_decode (isa
, insnbuf
);
4575 if (fmt
== XTENSA_UNDEFINED
)
4576 return XTENSA_UNDEFINED
;
4577 fmt_size
= xtensa_format_length (isa
, fmt
);
4579 /* If the next format won't be changing due to relaxation, just
4580 return the length of the first format. */
4581 if (fragP
->fr_opcode
!= fragP
->fr_literal
)
4584 /* If during relaxation we have to pull an instruction out of a
4585 multi-slot instruction, we will return the more conservative
4586 number. This works because alignment on bigger instructions
4587 is more restrictive than alignment on smaller instructions.
4588 This is more conservative than we would like, but it happens
4591 if (xtensa_format_num_slots (xtensa_default_isa
, fmt
) > 1)
4594 /* If we aren't doing one of our own relaxations or it isn't
4595 slot-based, then the insn size won't change. */
4596 if (fragP
->fr_type
!= rs_machine_dependent
)
4598 if (fragP
->fr_subtype
!= RELAX_SLOTS
)
4601 /* If an instruction is about to grow, return the longer size. */
4602 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP1
4603 || fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP2
4604 || fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP3
)
4606 /* For most frags at RELAX_IMMED_STEPX, with X > 0, the first
4607 instruction in the relaxed version is of length 3. (The case
4608 where we have to pull the instruction out of a FLIX bundle
4609 is handled conservatively above.) However, frags with opcodes
4610 that are expanding to wide branches end up having formats that
4611 are not determinable by the RELAX_IMMED_STEPX enumeration, and
4612 we can't tell directly what format the relaxer picked. This
4613 is a wart in the design of the relaxer that should someday be
4614 fixed, but would require major changes, or at least should
4615 be accompanied by major changes to make use of that data.
4617 In any event, we can tell that we are expanding from a single-slot
4618 format to a wider one with the logic below. */
4621 int relaxed_size
= fmt_size
+ fragP
->tc_frag_data
.text_expansion
[0];
4623 for (i
= 0; i
< xtensa_isa_num_formats (isa
); i
++)
4625 if (relaxed_size
== xtensa_format_length (isa
, i
))
4626 return relaxed_size
;
4632 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
4633 return 2 + fragP
->tc_frag_data
.text_expansion
[0];
4640 next_frag_format_size (const fragS
*fragP
)
4642 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
4643 return frag_format_size (next_fragP
);
4647 /* In early Xtensa Processors, for reasons that are unclear, the ISA
4648 required two-byte instructions to be treated as three-byte instructions
4649 for loop instruction alignment. This restriction was removed beginning
4650 with Xtensa LX. Now the only requirement on loop instruction alignment
4651 is that the first instruction of the loop must appear at an address that
4652 does not cross a fetch boundary. */
4655 get_loop_align_size (int insn_size
)
4657 if (insn_size
== XTENSA_UNDEFINED
)
4658 return xtensa_fetch_width
;
4660 if (enforce_three_byte_loop_align
&& insn_size
== 2)
4667 /* If the next legit fragment is an end-of-loop marker,
4668 switch its state so it will instantiate a NOP. */
4671 update_next_frag_state (fragS
*fragP
)
4673 fragS
*next_fragP
= fragP
->fr_next
;
4674 fragS
*new_target
= NULL
;
4678 /* We are guaranteed there will be one of these... */
4679 while (!(next_fragP
->fr_type
== rs_machine_dependent
4680 && (next_fragP
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
4681 || next_fragP
->fr_subtype
== RELAX_UNREACHABLE
)))
4682 next_fragP
= next_fragP
->fr_next
;
4684 gas_assert (next_fragP
->fr_type
== rs_machine_dependent
4685 && (next_fragP
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
4686 || next_fragP
->fr_subtype
== RELAX_UNREACHABLE
));
4688 /* ...and one of these. */
4689 new_target
= next_fragP
->fr_next
;
4690 while (!(new_target
->fr_type
== rs_machine_dependent
4691 && (new_target
->fr_subtype
== RELAX_MAYBE_DESIRE_ALIGN
4692 || new_target
->fr_subtype
== RELAX_DESIRE_ALIGN
)))
4693 new_target
= new_target
->fr_next
;
4695 gas_assert (new_target
->fr_type
== rs_machine_dependent
4696 && (new_target
->fr_subtype
== RELAX_MAYBE_DESIRE_ALIGN
4697 || new_target
->fr_subtype
== RELAX_DESIRE_ALIGN
));
4700 while (next_fragP
&& next_fragP
->fr_fix
== 0)
4702 if (next_fragP
->fr_type
== rs_machine_dependent
4703 && next_fragP
->fr_subtype
== RELAX_LOOP_END
)
4705 next_fragP
->fr_subtype
= RELAX_LOOP_END_ADD_NOP
;
4709 next_fragP
= next_fragP
->fr_next
;
4715 next_frag_is_branch_target (const fragS
*fragP
)
4717 /* Sometimes an empty will end up here due to storage allocation issues,
4718 so we have to skip until we find something legit. */
4719 for (fragP
= fragP
->fr_next
; fragP
; fragP
= fragP
->fr_next
)
4721 if (fragP
->tc_frag_data
.is_branch_target
)
4723 if (fragP
->fr_fix
!= 0)
4731 next_frag_is_loop_target (const fragS
*fragP
)
4733 /* Sometimes an empty will end up here due storage allocation issues.
4734 So we have to skip until we find something legit. */
4735 for (fragP
= fragP
->fr_next
; fragP
; fragP
= fragP
->fr_next
)
4737 if (fragP
->tc_frag_data
.is_loop_target
)
4739 if (fragP
->fr_fix
!= 0)
4746 /* As specified in the relaxation table, when a loop instruction is
4747 relaxed, there are 24 bytes between the loop instruction itself and
4748 the first instruction in the loop. */
4750 #define RELAXED_LOOP_INSN_BYTES 24
4753 next_frag_pre_opcode_bytes (const fragS
*fragp
)
4755 const fragS
*next_fragp
= fragp
->fr_next
;
4756 xtensa_opcode next_opcode
;
4758 if (!next_frag_opcode_is_loop (fragp
, &next_opcode
))
4761 /* Sometimes an empty will end up here due to storage allocation issues,
4762 so we have to skip until we find something legit. */
4763 while (next_fragp
->fr_fix
== 0)
4764 next_fragp
= next_fragp
->fr_next
;
4766 if (next_fragp
->fr_type
!= rs_machine_dependent
)
4769 /* There is some implicit knowledge encoded in here.
4770 The LOOP instructions that are NOT RELAX_IMMED have
4771 been relaxed. Note that we can assume that the LOOP
4772 instruction is in slot 0 because loops aren't bundleable. */
4773 if (next_fragp
->tc_frag_data
.slot_subtypes
[0] > RELAX_IMMED
)
4774 return get_expanded_loop_offset (next_opcode
) + RELAXED_LOOP_INSN_BYTES
;
4780 /* Mark a location where we can later insert literal frags. Update
4781 the section's literal_pool_loc, so subsequent literals can be
4782 placed nearest to their use. */
4785 xtensa_mark_literal_pool_location (void)
4787 /* Any labels pointing to the current location need
4788 to be adjusted to after the literal pool. */
4790 fragS
*pool_location
;
4792 if (use_literal_section
)
4795 /* We stash info in these frags so we can later move the literal's
4796 fixes into this frchain's fix list. */
4797 pool_location
= frag_now
;
4798 frag_now
->tc_frag_data
.lit_frchain
= frchain_now
;
4799 frag_now
->tc_frag_data
.literal_frag
= frag_now
;
4800 /* Just record this frag. */
4801 xtensa_maybe_create_literal_pool_frag (FALSE
, FALSE
);
4802 frag_variant (rs_machine_dependent
, 0, 0,
4803 RELAX_LITERAL_POOL_BEGIN
, NULL
, 0, NULL
);
4804 xtensa_set_frag_assembly_state (frag_now
);
4805 frag_now
->tc_frag_data
.lit_seg
= now_seg
;
4806 frag_variant (rs_machine_dependent
, 0, 0,
4807 RELAX_LITERAL_POOL_END
, NULL
, 0, NULL
);
4808 xtensa_set_frag_assembly_state (frag_now
);
4810 /* Now put a frag into the literal pool that points to this location. */
4811 set_literal_pool_location (now_seg
, pool_location
);
4812 xtensa_switch_to_non_abs_literal_fragment (&s
);
4813 frag_align (2, 0, 0);
4814 record_alignment (now_seg
, 2);
4816 /* Close whatever frag is there. */
4817 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
4818 xtensa_set_frag_assembly_state (frag_now
);
4819 frag_now
->tc_frag_data
.literal_frag
= pool_location
;
4820 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
4821 xtensa_restore_emit_state (&s
);
4822 xtensa_set_frag_assembly_state (frag_now
);
4826 /* Build a nop of the correct size into tinsn. */
4829 build_nop (TInsn
*tinsn
, int size
)
4835 tinsn
->opcode
= xtensa_nop_n_opcode
;
4837 if (tinsn
->opcode
== XTENSA_UNDEFINED
)
4838 as_fatal (_("opcode 'NOP.N' unavailable in this configuration"));
4842 if (xtensa_nop_opcode
== XTENSA_UNDEFINED
)
4844 tinsn
->opcode
= xtensa_or_opcode
;
4845 set_expr_const (&tinsn
->tok
[0], 1);
4846 set_expr_const (&tinsn
->tok
[1], 1);
4847 set_expr_const (&tinsn
->tok
[2], 1);
4851 tinsn
->opcode
= xtensa_nop_opcode
;
4853 gas_assert (tinsn
->opcode
!= XTENSA_UNDEFINED
);
4858 /* Assemble a NOP of the requested size in the buffer. User must have
4859 allocated "buf" with at least "size" bytes. */
4862 assemble_nop (int size
, char *buf
)
4864 static xtensa_insnbuf insnbuf
= NULL
;
4867 build_nop (&tinsn
, size
);
4870 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
4872 tinsn_to_insnbuf (&tinsn
, insnbuf
);
4873 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
,
4874 (unsigned char *) buf
, 0);
4878 /* Return the number of bytes for the offset of the expanded loop
4879 instruction. This should be incorporated into the relaxation
4880 specification but is hard-coded here. This is used to auto-align
4881 the loop instruction. It is invalid to call this function if the
4882 configuration does not have loops or if the opcode is not a loop
4886 get_expanded_loop_offset (xtensa_opcode opcode
)
4888 /* This is the OFFSET of the loop instruction in the expanded loop.
4889 This MUST correspond directly to the specification of the loop
4890 expansion. It will be validated on fragment conversion. */
4891 gas_assert (opcode
!= XTENSA_UNDEFINED
);
4892 if (opcode
== xtensa_loop_opcode
)
4894 if (opcode
== xtensa_loopnez_opcode
)
4896 if (opcode
== xtensa_loopgtz_opcode
)
4898 as_fatal (_("get_expanded_loop_offset: invalid opcode"));
4904 get_literal_pool_location (segT seg
)
4906 struct litpool_seg
*lps
= litpool_seg_list
.next
;
4907 struct litpool_frag
*lpf
;
4908 for ( ; lps
&& lps
->seg
->id
!= seg
->id
; lps
= lps
->next
)
4912 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4913 { /* Skip "candidates" for now. */
4914 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
&&
4918 /* Must convert a lower-priority pool. */
4919 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4921 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
)
4924 /* Still no match -- try for a low priority pool. */
4925 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4927 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
4931 return seg_info (seg
)->tc_segment_info_data
.literal_pool_loc
;
4936 set_literal_pool_location (segT seg
, fragS
*literal_pool_loc
)
4938 seg_info (seg
)->tc_segment_info_data
.literal_pool_loc
= literal_pool_loc
;
4942 /* Set frag assembly state should be called when a new frag is
4943 opened and after a frag has been closed. */
4946 xtensa_set_frag_assembly_state (fragS
*fragP
)
4948 if (!density_supported
)
4949 fragP
->tc_frag_data
.is_no_density
= TRUE
;
4951 /* This function is called from subsegs_finish, which is called
4952 after xtensa_end, so we can't use "use_transform" or
4953 "use_schedule" here. */
4954 if (!directive_state
[directive_transform
])
4955 fragP
->tc_frag_data
.is_no_transform
= TRUE
;
4956 if (directive_state
[directive_longcalls
])
4957 fragP
->tc_frag_data
.use_longcalls
= TRUE
;
4958 fragP
->tc_frag_data
.use_absolute_literals
=
4959 directive_state
[directive_absolute_literals
];
4960 fragP
->tc_frag_data
.is_assembly_state_set
= TRUE
;
4965 relaxable_section (asection
*sec
)
4967 return ((sec
->flags
& SEC_DEBUGGING
) == 0
4968 && strcmp (sec
->name
, ".eh_frame") != 0);
4973 xtensa_mark_frags_for_org (void)
4977 /* Walk over each fragment of all of the current segments. If we find
4978 a .org frag in any of the segments, mark all frags prior to it as
4979 "no transform", which will prevent linker optimizations from messing
4980 up the .org distance. This should be done after
4981 xtensa_find_unmarked_state_frags, because we don't want to worry here
4982 about that function trashing the data we save here. */
4984 for (seclist
= &stdoutput
->sections
;
4985 seclist
&& *seclist
;
4986 seclist
= &(*seclist
)->next
)
4988 segT sec
= *seclist
;
4989 segment_info_type
*seginfo
;
4992 flags
= bfd_get_section_flags (stdoutput
, sec
);
4993 if (flags
& SEC_DEBUGGING
)
4995 if (!(flags
& SEC_ALLOC
))
4998 seginfo
= seg_info (sec
);
4999 if (seginfo
&& seginfo
->frchainP
)
5001 fragS
*last_fragP
= seginfo
->frchainP
->frch_root
;
5002 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
;
5003 fragP
= fragP
->fr_next
)
5005 /* cvt_frag_to_fill has changed the fr_type of org frags to
5006 rs_fill, so use the value as cached in rs_subtype here. */
5007 if (fragP
->fr_subtype
== RELAX_ORG
)
5009 while (last_fragP
!= fragP
->fr_next
)
5011 last_fragP
->tc_frag_data
.is_no_transform
= TRUE
;
5012 last_fragP
= last_fragP
->fr_next
;
5022 xtensa_find_unmarked_state_frags (void)
5026 /* Walk over each fragment of all of the current segments. For each
5027 unmarked fragment, mark it with the same info as the previous
5029 for (seclist
= &stdoutput
->sections
;
5030 seclist
&& *seclist
;
5031 seclist
= &(*seclist
)->next
)
5033 segT sec
= *seclist
;
5034 segment_info_type
*seginfo
;
5037 flags
= bfd_get_section_flags (stdoutput
, sec
);
5038 if (flags
& SEC_DEBUGGING
)
5040 if (!(flags
& SEC_ALLOC
))
5043 seginfo
= seg_info (sec
);
5044 if (seginfo
&& seginfo
->frchainP
)
5046 fragS
*last_fragP
= 0;
5047 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
;
5048 fragP
= fragP
->fr_next
)
5050 if (fragP
->fr_fix
!= 0
5051 && !fragP
->tc_frag_data
.is_assembly_state_set
)
5053 if (last_fragP
== 0)
5055 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
5056 _("assembly state not set for first frag in section %s"),
5061 fragP
->tc_frag_data
.is_assembly_state_set
= TRUE
;
5062 fragP
->tc_frag_data
.is_no_density
=
5063 last_fragP
->tc_frag_data
.is_no_density
;
5064 fragP
->tc_frag_data
.is_no_transform
=
5065 last_fragP
->tc_frag_data
.is_no_transform
;
5066 fragP
->tc_frag_data
.use_longcalls
=
5067 last_fragP
->tc_frag_data
.use_longcalls
;
5068 fragP
->tc_frag_data
.use_absolute_literals
=
5069 last_fragP
->tc_frag_data
.use_absolute_literals
;
5072 if (fragP
->tc_frag_data
.is_assembly_state_set
)
5081 xtensa_find_unaligned_branch_targets (bfd
*abfd ATTRIBUTE_UNUSED
,
5083 void *unused ATTRIBUTE_UNUSED
)
5085 flagword flags
= bfd_get_section_flags (abfd
, sec
);
5086 segment_info_type
*seginfo
= seg_info (sec
);
5087 fragS
*frag
= seginfo
->frchainP
->frch_root
;
5089 if (flags
& SEC_CODE
)
5091 xtensa_isa isa
= xtensa_default_isa
;
5092 xtensa_insnbuf insnbuf
= xtensa_insnbuf_alloc (isa
);
5093 while (frag
!= NULL
)
5095 if (frag
->tc_frag_data
.is_branch_target
)
5098 addressT branch_align
, frag_addr
;
5101 xtensa_insnbuf_from_chars
5102 (isa
, insnbuf
, (unsigned char *) frag
->fr_literal
, 0);
5103 fmt
= xtensa_format_decode (isa
, insnbuf
);
5104 op_size
= xtensa_format_length (isa
, fmt
);
5105 branch_align
= 1 << branch_align_power (sec
);
5106 frag_addr
= frag
->fr_address
% branch_align
;
5107 if (frag_addr
+ op_size
> branch_align
)
5108 as_warn_where (frag
->fr_file
, frag
->fr_line
,
5109 _("unaligned branch target: %d bytes at 0x%lx"),
5110 op_size
, (long) frag
->fr_address
);
5112 frag
= frag
->fr_next
;
5114 xtensa_insnbuf_free (isa
, insnbuf
);
5120 xtensa_find_unaligned_loops (bfd
*abfd ATTRIBUTE_UNUSED
,
5122 void *unused ATTRIBUTE_UNUSED
)
5124 flagword flags
= bfd_get_section_flags (abfd
, sec
);
5125 segment_info_type
*seginfo
= seg_info (sec
);
5126 fragS
*frag
= seginfo
->frchainP
->frch_root
;
5127 xtensa_isa isa
= xtensa_default_isa
;
5129 if (flags
& SEC_CODE
)
5131 xtensa_insnbuf insnbuf
= xtensa_insnbuf_alloc (isa
);
5132 while (frag
!= NULL
)
5134 if (frag
->tc_frag_data
.is_first_loop_insn
)
5140 if (frag
->fr_fix
== 0)
5141 frag
= next_non_empty_frag (frag
);
5145 xtensa_insnbuf_from_chars
5146 (isa
, insnbuf
, (unsigned char *) frag
->fr_literal
, 0);
5147 fmt
= xtensa_format_decode (isa
, insnbuf
);
5148 op_size
= xtensa_format_length (isa
, fmt
);
5149 frag_addr
= frag
->fr_address
% xtensa_fetch_width
;
5151 if (frag_addr
+ op_size
> xtensa_fetch_width
)
5152 as_warn_where (frag
->fr_file
, frag
->fr_line
,
5153 _("unaligned loop: %d bytes at 0x%lx"),
5154 op_size
, (long) frag
->fr_address
);
5157 frag
= frag
->fr_next
;
5159 xtensa_insnbuf_free (isa
, insnbuf
);
5165 xg_apply_fix_value (fixS
*fixP
, valueT val
)
5167 xtensa_isa isa
= xtensa_default_isa
;
5168 static xtensa_insnbuf insnbuf
= NULL
;
5169 static xtensa_insnbuf slotbuf
= NULL
;
5172 bfd_boolean alt_reloc
;
5173 xtensa_opcode opcode
;
5174 char *const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
5176 if (decode_reloc (fixP
->fx_r_type
, &slot
, &alt_reloc
)
5178 as_fatal (_("unexpected fix"));
5182 insnbuf
= xtensa_insnbuf_alloc (isa
);
5183 slotbuf
= xtensa_insnbuf_alloc (isa
);
5186 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) fixpos
, 0);
5187 fmt
= xtensa_format_decode (isa
, insnbuf
);
5188 if (fmt
== XTENSA_UNDEFINED
)
5189 as_fatal (_("undecodable fix"));
5190 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5191 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
5192 if (opcode
== XTENSA_UNDEFINED
)
5193 as_fatal (_("undecodable fix"));
5195 /* CONST16 immediates are not PC-relative, despite the fact that we
5196 reuse the normal PC-relative operand relocations for the low part
5197 of a CONST16 operand. */
5198 if (opcode
== xtensa_const16_opcode
)
5201 xtensa_insnbuf_set_operand (slotbuf
, fmt
, slot
, opcode
,
5202 get_relaxable_immed (opcode
), val
,
5203 fixP
->fx_file
, fixP
->fx_line
);
5205 xtensa_format_set_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5206 xtensa_insnbuf_to_chars (isa
, insnbuf
, (unsigned char *) fixpos
, 0);
5212 /* External Functions and Other GAS Hooks. */
5215 xtensa_target_format (void)
5217 return (target_big_endian
? "elf32-xtensa-be" : "elf32-xtensa-le");
5222 xtensa_file_arch_init (bfd
*abfd
)
5224 bfd_set_private_flags (abfd
, 0x100 | 0x200);
5229 md_number_to_chars (char *buf
, valueT val
, int n
)
5231 if (target_big_endian
)
5232 number_to_chars_bigendian (buf
, val
, n
);
5234 number_to_chars_littleendian (buf
, val
, n
);
5238 /* This function is called once, at assembler startup time. It should
5239 set up all the tables, etc. that the MD part of the assembler will
5245 segT current_section
= now_seg
;
5246 int current_subsec
= now_subseg
;
5250 xtensa_default_isa
= xtensa_isa_init (0, 0);
5251 isa
= xtensa_default_isa
;
5255 /* Set up the literal sections. */
5256 memset (&default_lit_sections
, 0, sizeof (default_lit_sections
));
5258 subseg_set (current_section
, current_subsec
);
5260 xtensa_addi_opcode
= xtensa_opcode_lookup (isa
, "addi");
5261 xtensa_addmi_opcode
= xtensa_opcode_lookup (isa
, "addmi");
5262 xtensa_call0_opcode
= xtensa_opcode_lookup (isa
, "call0");
5263 xtensa_call4_opcode
= xtensa_opcode_lookup (isa
, "call4");
5264 xtensa_call8_opcode
= xtensa_opcode_lookup (isa
, "call8");
5265 xtensa_call12_opcode
= xtensa_opcode_lookup (isa
, "call12");
5266 xtensa_callx0_opcode
= xtensa_opcode_lookup (isa
, "callx0");
5267 xtensa_callx4_opcode
= xtensa_opcode_lookup (isa
, "callx4");
5268 xtensa_callx8_opcode
= xtensa_opcode_lookup (isa
, "callx8");
5269 xtensa_callx12_opcode
= xtensa_opcode_lookup (isa
, "callx12");
5270 xtensa_const16_opcode
= xtensa_opcode_lookup (isa
, "const16");
5271 xtensa_entry_opcode
= xtensa_opcode_lookup (isa
, "entry");
5272 xtensa_extui_opcode
= xtensa_opcode_lookup (isa
, "extui");
5273 xtensa_movi_opcode
= xtensa_opcode_lookup (isa
, "movi");
5274 xtensa_movi_n_opcode
= xtensa_opcode_lookup (isa
, "movi.n");
5275 xtensa_isync_opcode
= xtensa_opcode_lookup (isa
, "isync");
5276 xtensa_j_opcode
= xtensa_opcode_lookup (isa
, "j");
5277 xtensa_jx_opcode
= xtensa_opcode_lookup (isa
, "jx");
5278 xtensa_l32r_opcode
= xtensa_opcode_lookup (isa
, "l32r");
5279 xtensa_loop_opcode
= xtensa_opcode_lookup (isa
, "loop");
5280 xtensa_loopnez_opcode
= xtensa_opcode_lookup (isa
, "loopnez");
5281 xtensa_loopgtz_opcode
= xtensa_opcode_lookup (isa
, "loopgtz");
5282 xtensa_nop_opcode
= xtensa_opcode_lookup (isa
, "nop");
5283 xtensa_nop_n_opcode
= xtensa_opcode_lookup (isa
, "nop.n");
5284 xtensa_or_opcode
= xtensa_opcode_lookup (isa
, "or");
5285 xtensa_ret_opcode
= xtensa_opcode_lookup (isa
, "ret");
5286 xtensa_ret_n_opcode
= xtensa_opcode_lookup (isa
, "ret.n");
5287 xtensa_retw_opcode
= xtensa_opcode_lookup (isa
, "retw");
5288 xtensa_retw_n_opcode
= xtensa_opcode_lookup (isa
, "retw.n");
5289 xtensa_rsr_lcount_opcode
= xtensa_opcode_lookup (isa
, "rsr.lcount");
5290 xtensa_waiti_opcode
= xtensa_opcode_lookup (isa
, "waiti");
5292 for (i
= 0; i
< xtensa_isa_num_formats (isa
); i
++)
5294 int format_slots
= xtensa_format_num_slots (isa
, i
);
5295 if (format_slots
> config_max_slots
)
5296 config_max_slots
= format_slots
;
5299 xg_init_vinsn (&cur_vinsn
);
5301 xtensa_num_pipe_stages
= xtensa_isa_num_pipe_stages (isa
);
5303 init_op_placement_info_table ();
5305 /* Set up the assembly state. */
5306 if (!frag_now
->tc_frag_data
.is_assembly_state_set
)
5307 xtensa_set_frag_assembly_state (frag_now
);
5311 /* TC_INIT_FIX_DATA hook */
5314 xtensa_init_fix_data (fixS
*x
)
5316 x
->tc_fix_data
.slot
= 0;
5317 x
->tc_fix_data
.X_add_symbol
= NULL
;
5318 x
->tc_fix_data
.X_add_number
= 0;
5322 /* tc_frob_label hook */
5325 xtensa_frob_label (symbolS
*sym
)
5329 if (cur_vinsn
.inside_bundle
)
5331 as_bad (_("labels are not valid inside bundles"));
5335 freq
= get_subseg_target_freq (now_seg
, now_subseg
);
5337 /* Since the label was already attached to a frag associated with the
5338 previous basic block, it now needs to be reset to the current frag. */
5339 symbol_set_frag (sym
, frag_now
);
5340 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5342 if (generating_literals
)
5343 xtensa_add_literal_sym (sym
);
5345 xtensa_add_insn_label (sym
);
5347 if (symbol_get_tc (sym
)->is_loop_target
)
5349 if ((get_last_insn_flags (now_seg
, now_subseg
)
5350 & FLAG_IS_BAD_LOOPEND
) != 0)
5351 as_bad (_("invalid last instruction for a zero-overhead loop"));
5353 xtensa_set_frag_assembly_state (frag_now
);
5354 frag_var (rs_machine_dependent
, 4, 4, RELAX_LOOP_END
,
5355 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
5357 xtensa_set_frag_assembly_state (frag_now
);
5358 xtensa_move_labels (frag_now
, 0);
5361 /* No target aligning in the absolute section. */
5362 if (now_seg
!= absolute_section
5363 && !is_unaligned_label (sym
)
5364 && !generating_literals
)
5366 xtensa_set_frag_assembly_state (frag_now
);
5368 if (do_align_targets ())
5369 frag_var (rs_machine_dependent
, 0, (int) freq
,
5370 RELAX_DESIRE_ALIGN_IF_TARGET
, frag_now
->fr_symbol
,
5371 frag_now
->fr_offset
, NULL
);
5373 frag_var (rs_fill
, 0, 0, frag_now
->fr_subtype
,
5374 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
5375 xtensa_set_frag_assembly_state (frag_now
);
5376 xtensa_move_labels (frag_now
, 0);
5379 /* We need to mark the following properties even if we aren't aligning. */
5381 /* If the label is already known to be a branch target, i.e., a
5382 forward branch, mark the frag accordingly. Backward branches
5383 are handled by xg_add_branch_and_loop_targets. */
5384 if (symbol_get_tc (sym
)->is_branch_target
)
5385 symbol_get_frag (sym
)->tc_frag_data
.is_branch_target
= TRUE
;
5387 /* Loops only go forward, so they can be identified here. */
5388 if (symbol_get_tc (sym
)->is_loop_target
)
5389 symbol_get_frag (sym
)->tc_frag_data
.is_loop_target
= TRUE
;
5391 dwarf2_emit_label (sym
);
5395 /* tc_unrecognized_line hook */
5398 xtensa_unrecognized_line (int ch
)
5403 if (cur_vinsn
.inside_bundle
== 0)
5405 /* PR8110: Cannot emit line number info inside a FLIX bundle
5406 when using --gstabs. Temporarily disable debug info. */
5407 generate_lineno_debug ();
5408 if (debug_type
== DEBUG_STABS
)
5410 xt_saved_debug_type
= debug_type
;
5411 debug_type
= DEBUG_NONE
;
5414 cur_vinsn
.inside_bundle
= 1;
5418 as_bad (_("extra opening brace"));
5424 if (cur_vinsn
.inside_bundle
)
5425 finish_vinsn (&cur_vinsn
);
5428 as_bad (_("extra closing brace"));
5433 as_bad (_("syntax error"));
5440 /* md_flush_pending_output hook */
5443 xtensa_flush_pending_output (void)
5445 /* This line fixes a bug where automatically generated gstabs info
5446 separates a function label from its entry instruction, ending up
5447 with the literal position between the function label and the entry
5448 instruction and crashing code. It only happens with --gstabs and
5449 --text-section-literals, and when several other obscure relaxation
5450 conditions are met. */
5451 if (outputting_stabs_line_debug
)
5454 if (cur_vinsn
.inside_bundle
)
5455 as_bad (_("missing closing brace"));
5457 /* If there is a non-zero instruction fragment, close it. */
5458 if (frag_now_fix () != 0 && frag_now
->tc_frag_data
.is_insn
)
5460 frag_wane (frag_now
);
5462 xtensa_set_frag_assembly_state (frag_now
);
5464 frag_now
->tc_frag_data
.is_insn
= FALSE
;
5466 xtensa_clear_insn_labels ();
5470 /* We had an error while parsing an instruction. The string might look
5471 like this: "insn arg1, arg2 }". If so, we need to see the closing
5472 brace and reset some fields. Otherwise, the vinsn never gets closed
5473 and the num_slots field will grow past the end of the array of slots,
5474 and bad things happen. */
5477 error_reset_cur_vinsn (void)
5479 if (cur_vinsn
.inside_bundle
)
5481 if (*input_line_pointer
== '}'
5482 || *(input_line_pointer
- 1) == '}'
5483 || *(input_line_pointer
- 2) == '}')
5484 xg_clear_vinsn (&cur_vinsn
);
5490 md_assemble (char *str
)
5492 xtensa_isa isa
= xtensa_default_isa
;
5495 bfd_boolean has_underbar
= FALSE
;
5496 char *arg_strings
[MAX_INSN_ARGS
];
5498 TInsn orig_insn
; /* Original instruction from the input. */
5500 tinsn_init (&orig_insn
);
5502 /* Split off the opcode. */
5503 opnamelen
= strspn (str
, "abcdefghijklmnopqrstuvwxyz_/0123456789.");
5504 opname
= xmalloc (opnamelen
+ 1);
5505 memcpy (opname
, str
, opnamelen
);
5506 opname
[opnamelen
] = '\0';
5508 num_args
= tokenize_arguments (arg_strings
, str
+ opnamelen
);
5511 as_bad (_("syntax error"));
5515 if (xg_translate_idioms (&opname
, &num_args
, arg_strings
))
5518 /* Check for an underbar prefix. */
5521 has_underbar
= TRUE
;
5525 orig_insn
.insn_type
= ITYPE_INSN
;
5527 orig_insn
.is_specific_opcode
= (has_underbar
|| !use_transform ());
5528 orig_insn
.opcode
= xtensa_opcode_lookup (isa
, opname
);
5530 /* Special case: Check for "CALLXn.TLS" psuedo op. If found, grab its
5531 extra argument and set the opcode to "CALLXn". */
5532 if (orig_insn
.opcode
== XTENSA_UNDEFINED
5533 && strncasecmp (opname
, "callx", 5) == 0)
5535 unsigned long window_size
;
5538 window_size
= strtoul (opname
+ 5, &suffix
, 10);
5539 if (suffix
!= opname
+ 5
5540 && (window_size
== 0
5543 || window_size
== 12)
5544 && strcasecmp (suffix
, ".tls") == 0)
5546 switch (window_size
)
5548 case 0: orig_insn
.opcode
= xtensa_callx0_opcode
; break;
5549 case 4: orig_insn
.opcode
= xtensa_callx4_opcode
; break;
5550 case 8: orig_insn
.opcode
= xtensa_callx8_opcode
; break;
5551 case 12: orig_insn
.opcode
= xtensa_callx12_opcode
; break;
5555 as_bad (_("wrong number of operands for '%s'"), opname
);
5558 bfd_reloc_code_real_type reloc
;
5559 char *old_input_line_pointer
;
5560 expressionS
*tok
= &orig_insn
.extra_arg
;
5562 old_input_line_pointer
= input_line_pointer
;
5563 input_line_pointer
= arg_strings
[num_args
- 1];
5566 if (tok
->X_op
== O_symbol
5567 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, tok
))
5568 == BFD_RELOC_XTENSA_TLS_CALL
))
5569 tok
->X_op
= map_suffix_reloc_to_operator (reloc
);
5571 as_bad (_("bad relocation expression for '%s'"), opname
);
5573 input_line_pointer
= old_input_line_pointer
;
5579 /* Special case: Check for "j.l" psuedo op. */
5580 if (orig_insn
.opcode
== XTENSA_UNDEFINED
5581 && strncasecmp (opname
, "j.l", 3) == 0)
5584 as_bad (_("wrong number of operands for '%s'"), opname
);
5587 char *old_input_line_pointer
;
5588 expressionS
*tok
= &orig_insn
.extra_arg
;
5590 old_input_line_pointer
= input_line_pointer
;
5591 input_line_pointer
= arg_strings
[num_args
- 1];
5593 expression_maybe_register (xtensa_jx_opcode
, 0, tok
);
5594 input_line_pointer
= old_input_line_pointer
;
5597 orig_insn
.opcode
= xtensa_j_opcode
;
5601 if (orig_insn
.opcode
== XTENSA_UNDEFINED
)
5603 xtensa_format fmt
= xtensa_format_lookup (isa
, opname
);
5604 if (fmt
== XTENSA_UNDEFINED
)
5606 as_bad (_("unknown opcode or format name '%s'"), opname
);
5607 error_reset_cur_vinsn ();
5610 if (!cur_vinsn
.inside_bundle
)
5612 as_bad (_("format names only valid inside bundles"));
5613 error_reset_cur_vinsn ();
5616 if (cur_vinsn
.format
!= XTENSA_UNDEFINED
)
5617 as_warn (_("multiple formats specified for one bundle; using '%s'"),
5619 cur_vinsn
.format
= fmt
;
5620 free (has_underbar
? opname
- 1 : opname
);
5621 error_reset_cur_vinsn ();
5625 /* Parse the arguments. */
5626 if (parse_arguments (&orig_insn
, num_args
, arg_strings
))
5628 as_bad (_("syntax error"));
5629 error_reset_cur_vinsn ();
5633 /* Free the opcode and argument strings, now that they've been parsed. */
5634 free (has_underbar
? opname
- 1 : opname
);
5636 while (num_args
-- > 0)
5637 free (arg_strings
[num_args
]);
5639 /* Get expressions for invisible operands. */
5640 if (get_invisible_operands (&orig_insn
))
5642 error_reset_cur_vinsn ();
5646 /* Check for the right number and type of arguments. */
5647 if (tinsn_check_arguments (&orig_insn
))
5649 error_reset_cur_vinsn ();
5653 /* Record the line number for each TInsn, because a FLIX bundle may be
5654 spread across multiple input lines and individual instructions may be
5655 moved around in some cases. */
5656 orig_insn
.loc_directive_seen
= dwarf2_loc_directive_seen
;
5657 dwarf2_where (&orig_insn
.debug_line
);
5658 dwarf2_consume_line_info ();
5660 xg_add_branch_and_loop_targets (&orig_insn
);
5662 /* Check that immediate value for ENTRY is >= 16. */
5663 if (orig_insn
.opcode
== xtensa_entry_opcode
&& orig_insn
.ntok
>= 3)
5665 expressionS
*exp
= &orig_insn
.tok
[2];
5666 if (exp
->X_op
== O_constant
&& exp
->X_add_number
< 16)
5667 as_warn (_("entry instruction with stack decrement < 16"));
5671 assemble_tokens (opcode, tok, ntok);
5672 expand the tokens from the orig_insn into the
5673 stack of instructions that will not expand
5674 unless required at relaxation time. */
5676 if (!cur_vinsn
.inside_bundle
)
5677 emit_single_op (&orig_insn
);
5678 else /* We are inside a bundle. */
5680 cur_vinsn
.slots
[cur_vinsn
.num_slots
] = orig_insn
;
5681 cur_vinsn
.num_slots
++;
5682 if (*input_line_pointer
== '}'
5683 || *(input_line_pointer
- 1) == '}'
5684 || *(input_line_pointer
- 2) == '}')
5685 finish_vinsn (&cur_vinsn
);
5688 /* We've just emitted a new instruction so clear the list of labels. */
5689 xtensa_clear_insn_labels ();
5691 xtensa_check_frag_count ();
5695 /* HANDLE_ALIGN hook */
5697 /* For a .align directive, we mark the previous block with the alignment
5698 information. This will be placed in the object file in the
5699 property section corresponding to this section. */
5702 xtensa_handle_align (fragS
*fragP
)
5705 && ! fragP
->tc_frag_data
.is_literal
5706 && (fragP
->fr_type
== rs_align
5707 || fragP
->fr_type
== rs_align_code
)
5708 && fragP
->fr_offset
> 0
5709 && now_seg
!= bss_section
)
5711 fragP
->tc_frag_data
.is_align
= TRUE
;
5712 fragP
->tc_frag_data
.alignment
= fragP
->fr_offset
;
5715 if (fragP
->fr_type
== rs_align_test
)
5718 count
= fragP
->fr_next
->fr_address
- fragP
->fr_address
- fragP
->fr_fix
;
5720 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
5721 _("unaligned entry instruction"));
5724 if (linkrelax
&& fragP
->fr_type
== rs_org
)
5725 fragP
->fr_subtype
= RELAX_ORG
;
5729 /* TC_FRAG_INIT hook */
5732 xtensa_frag_init (fragS
*frag
)
5734 xtensa_set_frag_assembly_state (frag
);
5739 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
5745 /* Round up a section size to the appropriate boundary. */
5748 md_section_align (segT segment ATTRIBUTE_UNUSED
, valueT size
)
5750 return size
; /* Byte alignment is fine. */
5755 md_pcrel_from (fixS
*fixP
)
5758 static xtensa_insnbuf insnbuf
= NULL
;
5759 static xtensa_insnbuf slotbuf
= NULL
;
5762 xtensa_opcode opcode
;
5765 xtensa_isa isa
= xtensa_default_isa
;
5766 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
5767 bfd_boolean alt_reloc
;
5769 if (fixP
->fx_r_type
== BFD_RELOC_XTENSA_ASM_EXPAND
)
5772 if (fixP
->fx_r_type
== BFD_RELOC_32_PCREL
)
5777 insnbuf
= xtensa_insnbuf_alloc (isa
);
5778 slotbuf
= xtensa_insnbuf_alloc (isa
);
5781 insn_p
= &fixP
->fx_frag
->fr_literal
[fixP
->fx_where
];
5782 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) insn_p
, 0);
5783 fmt
= xtensa_format_decode (isa
, insnbuf
);
5785 if (fmt
== XTENSA_UNDEFINED
)
5786 as_fatal (_("bad instruction format"));
5788 if (decode_reloc (fixP
->fx_r_type
, &slot
, &alt_reloc
) != 0)
5789 as_fatal (_("invalid relocation"));
5791 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5792 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
5794 /* Check for "alternate" relocations (operand not specified). None
5795 of the current uses for these are really PC-relative. */
5796 if (alt_reloc
|| opcode
== xtensa_const16_opcode
)
5798 if (opcode
!= xtensa_l32r_opcode
5799 && opcode
!= xtensa_const16_opcode
)
5800 as_fatal (_("invalid relocation for '%s' instruction"),
5801 xtensa_opcode_name (isa
, opcode
));
5805 opnum
= get_relaxable_immed (opcode
);
5807 if (xtensa_operand_is_PCrelative (isa
, opcode
, opnum
) != 1
5808 || xtensa_operand_do_reloc (isa
, opcode
, opnum
, &opnd_value
, addr
))
5810 as_bad_where (fixP
->fx_file
,
5812 _("invalid relocation for operand %d of '%s'"),
5813 opnum
, xtensa_opcode_name (isa
, opcode
));
5816 return 0 - opnd_value
;
5820 /* TC_FORCE_RELOCATION hook */
5823 xtensa_force_relocation (fixS
*fix
)
5825 switch (fix
->fx_r_type
)
5827 case BFD_RELOC_XTENSA_ASM_EXPAND
:
5828 case BFD_RELOC_XTENSA_SLOT0_ALT
:
5829 case BFD_RELOC_XTENSA_SLOT1_ALT
:
5830 case BFD_RELOC_XTENSA_SLOT2_ALT
:
5831 case BFD_RELOC_XTENSA_SLOT3_ALT
:
5832 case BFD_RELOC_XTENSA_SLOT4_ALT
:
5833 case BFD_RELOC_XTENSA_SLOT5_ALT
:
5834 case BFD_RELOC_XTENSA_SLOT6_ALT
:
5835 case BFD_RELOC_XTENSA_SLOT7_ALT
:
5836 case BFD_RELOC_XTENSA_SLOT8_ALT
:
5837 case BFD_RELOC_XTENSA_SLOT9_ALT
:
5838 case BFD_RELOC_XTENSA_SLOT10_ALT
:
5839 case BFD_RELOC_XTENSA_SLOT11_ALT
:
5840 case BFD_RELOC_XTENSA_SLOT12_ALT
:
5841 case BFD_RELOC_XTENSA_SLOT13_ALT
:
5842 case BFD_RELOC_XTENSA_SLOT14_ALT
:
5848 if (linkrelax
&& fix
->fx_addsy
5849 && relaxable_section (S_GET_SEGMENT (fix
->fx_addsy
)))
5852 return generic_force_reloc (fix
);
5856 /* TC_VALIDATE_FIX_SUB hook */
5859 xtensa_validate_fix_sub (fixS
*fix
)
5861 segT add_symbol_segment
, sub_symbol_segment
;
5863 /* The difference of two symbols should be resolved by the assembler when
5864 linkrelax is not set. If the linker may relax the section containing
5865 the symbols, then an Xtensa DIFF relocation must be generated so that
5866 the linker knows to adjust the difference value. */
5867 if (!linkrelax
|| fix
->fx_addsy
== NULL
)
5870 /* Make sure both symbols are in the same segment, and that segment is
5871 "normal" and relaxable. If the segment is not "normal", then the
5872 fix is not valid. If the segment is not "relaxable", then the fix
5873 should have been handled earlier. */
5874 add_symbol_segment
= S_GET_SEGMENT (fix
->fx_addsy
);
5875 if (! SEG_NORMAL (add_symbol_segment
) ||
5876 ! relaxable_section (add_symbol_segment
))
5878 sub_symbol_segment
= S_GET_SEGMENT (fix
->fx_subsy
);
5879 return (sub_symbol_segment
== add_symbol_segment
);
5883 /* NO_PSEUDO_DOT hook */
5885 /* This function has nothing to do with pseudo dots, but this is the
5886 nearest macro to where the check needs to take place. FIXME: This
5890 xtensa_check_inside_bundle (void)
5892 if (cur_vinsn
.inside_bundle
&& input_line_pointer
[-1] == '.')
5893 as_bad (_("directives are not valid inside bundles"));
5895 /* This function must always return FALSE because it is called via a
5896 macro that has nothing to do with bundling. */
5901 /* md_elf_section_change_hook */
5904 xtensa_elf_section_change_hook (void)
5906 /* Set up the assembly state. */
5907 if (!frag_now
->tc_frag_data
.is_assembly_state_set
)
5908 xtensa_set_frag_assembly_state (frag_now
);
5912 /* tc_fix_adjustable hook */
5915 xtensa_fix_adjustable (fixS
*fixP
)
5917 /* We need the symbol name for the VTABLE entries. */
5918 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
5919 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
5926 /* tc_symbol_new_hook */
5928 symbolS
*expr_symbols
= NULL
;
5931 xtensa_symbol_new_hook (symbolS
*sym
)
5933 if (is_leb128_expr
&& S_GET_SEGMENT (sym
) == expr_section
)
5935 symbol_get_tc (sym
)->next_expr_symbol
= expr_symbols
;
5942 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
5944 char *const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
5947 /* Subtracted symbols are only allowed for a few relocation types, and
5948 unless linkrelax is enabled, they should not make it to this point. */
5949 if (fixP
->fx_subsy
&& !(linkrelax
&& (fixP
->fx_r_type
== BFD_RELOC_32
5950 || fixP
->fx_r_type
== BFD_RELOC_16
5951 || fixP
->fx_r_type
== BFD_RELOC_8
)))
5952 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("expression too complex"));
5954 switch (fixP
->fx_r_type
)
5956 case BFD_RELOC_32_PCREL
:
5962 switch (fixP
->fx_r_type
)
5965 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF8
;
5966 fixP
->fx_signed
= 0;
5969 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF16
;
5970 fixP
->fx_signed
= 0;
5973 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF32
;
5974 fixP
->fx_signed
= 0;
5980 val
= (S_GET_VALUE (fixP
->fx_addsy
) + fixP
->fx_offset
5981 - S_GET_VALUE (fixP
->fx_subsy
));
5983 /* The difference value gets written out, and the DIFF reloc
5984 identifies the address of the subtracted symbol (i.e., the one
5985 with the lowest address). */
5987 fixP
->fx_offset
-= val
;
5988 fixP
->fx_subsy
= NULL
;
5990 else if (! fixP
->fx_addsy
)
5997 case BFD_RELOC_XTENSA_PLT
:
5998 md_number_to_chars (fixpos
, val
, fixP
->fx_size
);
5999 fixP
->fx_no_overflow
= 0; /* Use the standard overflow check. */
6002 case BFD_RELOC_XTENSA_TLSDESC_FN
:
6003 case BFD_RELOC_XTENSA_TLSDESC_ARG
:
6004 case BFD_RELOC_XTENSA_TLS_TPOFF
:
6005 case BFD_RELOC_XTENSA_TLS_DTPOFF
:
6006 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
6007 md_number_to_chars (fixpos
, 0, fixP
->fx_size
);
6008 fixP
->fx_no_overflow
= 0; /* Use the standard overflow check. */
6011 case BFD_RELOC_XTENSA_SLOT0_OP
:
6012 case BFD_RELOC_XTENSA_SLOT1_OP
:
6013 case BFD_RELOC_XTENSA_SLOT2_OP
:
6014 case BFD_RELOC_XTENSA_SLOT3_OP
:
6015 case BFD_RELOC_XTENSA_SLOT4_OP
:
6016 case BFD_RELOC_XTENSA_SLOT5_OP
:
6017 case BFD_RELOC_XTENSA_SLOT6_OP
:
6018 case BFD_RELOC_XTENSA_SLOT7_OP
:
6019 case BFD_RELOC_XTENSA_SLOT8_OP
:
6020 case BFD_RELOC_XTENSA_SLOT9_OP
:
6021 case BFD_RELOC_XTENSA_SLOT10_OP
:
6022 case BFD_RELOC_XTENSA_SLOT11_OP
:
6023 case BFD_RELOC_XTENSA_SLOT12_OP
:
6024 case BFD_RELOC_XTENSA_SLOT13_OP
:
6025 case BFD_RELOC_XTENSA_SLOT14_OP
:
6028 /* Write the tentative value of a PC-relative relocation to a
6029 local symbol into the instruction. The value will be ignored
6030 by the linker, and it makes the object file disassembly
6031 readable when all branch targets are encoded in relocations. */
6033 gas_assert (fixP
->fx_addsy
);
6034 if (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
6035 && !S_FORCE_RELOC (fixP
->fx_addsy
, 1))
6037 val
= (S_GET_VALUE (fixP
->fx_addsy
) + fixP
->fx_offset
6038 - md_pcrel_from (fixP
));
6039 (void) xg_apply_fix_value (fixP
, val
);
6042 else if (! fixP
->fx_addsy
)
6045 if (xg_apply_fix_value (fixP
, val
))
6050 case BFD_RELOC_XTENSA_ASM_EXPAND
:
6051 case BFD_RELOC_XTENSA_TLS_FUNC
:
6052 case BFD_RELOC_XTENSA_TLS_ARG
:
6053 case BFD_RELOC_XTENSA_TLS_CALL
:
6054 case BFD_RELOC_XTENSA_SLOT0_ALT
:
6055 case BFD_RELOC_XTENSA_SLOT1_ALT
:
6056 case BFD_RELOC_XTENSA_SLOT2_ALT
:
6057 case BFD_RELOC_XTENSA_SLOT3_ALT
:
6058 case BFD_RELOC_XTENSA_SLOT4_ALT
:
6059 case BFD_RELOC_XTENSA_SLOT5_ALT
:
6060 case BFD_RELOC_XTENSA_SLOT6_ALT
:
6061 case BFD_RELOC_XTENSA_SLOT7_ALT
:
6062 case BFD_RELOC_XTENSA_SLOT8_ALT
:
6063 case BFD_RELOC_XTENSA_SLOT9_ALT
:
6064 case BFD_RELOC_XTENSA_SLOT10_ALT
:
6065 case BFD_RELOC_XTENSA_SLOT11_ALT
:
6066 case BFD_RELOC_XTENSA_SLOT12_ALT
:
6067 case BFD_RELOC_XTENSA_SLOT13_ALT
:
6068 case BFD_RELOC_XTENSA_SLOT14_ALT
:
6069 /* These all need to be resolved at link-time. Do nothing now. */
6072 case BFD_RELOC_VTABLE_INHERIT
:
6073 case BFD_RELOC_VTABLE_ENTRY
:
6078 as_bad (_("unhandled local relocation fix %s"),
6079 bfd_get_reloc_code_name (fixP
->fx_r_type
));
6085 md_atof (int type
, char *litP
, int *sizeP
)
6087 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
6092 md_estimate_size_before_relax (fragS
*fragP
, segT seg ATTRIBUTE_UNUSED
)
6094 return total_frag_text_expansion (fragP
);
6098 /* Translate internal representation of relocation info to BFD target
6102 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
6106 reloc
= (arelent
*) xmalloc (sizeof (arelent
));
6107 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
6108 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
6109 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6111 /* Make sure none of our internal relocations make it this far.
6112 They'd better have been fully resolved by this point. */
6113 gas_assert ((int) fixp
->fx_r_type
> 0);
6115 reloc
->addend
= fixp
->fx_offset
;
6117 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
6118 if (reloc
->howto
== NULL
)
6120 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
6121 _("cannot represent `%s' relocation in object file"),
6122 bfd_get_reloc_code_name (fixp
->fx_r_type
));
6123 free (reloc
->sym_ptr_ptr
);
6128 if (!fixp
->fx_pcrel
!= !reloc
->howto
->pc_relative
)
6129 as_fatal (_("internal error; cannot generate `%s' relocation"),
6130 bfd_get_reloc_code_name (fixp
->fx_r_type
));
6136 /* Checks for resource conflicts between instructions. */
6138 /* The func unit stuff could be implemented as bit-vectors rather
6139 than the iterative approach here. If it ends up being too
6140 slow, we will switch it. */
6143 new_resource_table (void *data
,
6146 unit_num_copies_func uncf
,
6147 opcode_num_units_func onuf
,
6148 opcode_funcUnit_use_unit_func ouuf
,
6149 opcode_funcUnit_use_stage_func ousf
)
6152 resource_table
*rt
= (resource_table
*) xmalloc (sizeof (resource_table
));
6154 rt
->cycles
= cycles
;
6155 rt
->allocated_cycles
= cycles
;
6157 rt
->unit_num_copies
= uncf
;
6158 rt
->opcode_num_units
= onuf
;
6159 rt
->opcode_unit_use
= ouuf
;
6160 rt
->opcode_unit_stage
= ousf
;
6162 rt
->units
= (unsigned char **) xcalloc (cycles
, sizeof (unsigned char *));
6163 for (i
= 0; i
< cycles
; i
++)
6164 rt
->units
[i
] = (unsigned char *) xcalloc (nu
, sizeof (unsigned char));
6171 clear_resource_table (resource_table
*rt
)
6174 for (i
= 0; i
< rt
->allocated_cycles
; i
++)
6175 for (j
= 0; j
< rt
->num_units
; j
++)
6176 rt
->units
[i
][j
] = 0;
6180 /* We never shrink it, just fake it into thinking so. */
6183 resize_resource_table (resource_table
*rt
, int cycles
)
6187 rt
->cycles
= cycles
;
6188 if (cycles
<= rt
->allocated_cycles
)
6191 old_cycles
= rt
->allocated_cycles
;
6192 rt
->allocated_cycles
= cycles
;
6194 rt
->units
= xrealloc (rt
->units
,
6195 rt
->allocated_cycles
* sizeof (unsigned char *));
6196 for (i
= 0; i
< old_cycles
; i
++)
6197 rt
->units
[i
] = xrealloc (rt
->units
[i
],
6198 rt
->num_units
* sizeof (unsigned char));
6199 for (i
= old_cycles
; i
< cycles
; i
++)
6200 rt
->units
[i
] = xcalloc (rt
->num_units
, sizeof (unsigned char));
6205 resources_available (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6208 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6210 for (i
= 0; i
< uses
; i
++)
6212 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6213 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6214 int copies_in_use
= rt
->units
[stage
+ cycle
][unit
];
6215 int copies
= (rt
->unit_num_copies
) (rt
->data
, unit
);
6216 if (copies_in_use
>= copies
)
6224 reserve_resources (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6227 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6229 for (i
= 0; i
< uses
; i
++)
6231 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6232 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6233 /* Note that this allows resources to be oversubscribed. That's
6234 essential to the way the optional scheduler works.
6235 resources_available reports when a resource is over-subscribed,
6236 so it's easy to tell. */
6237 rt
->units
[stage
+ cycle
][unit
]++;
6243 release_resources (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6246 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6248 for (i
= 0; i
< uses
; i
++)
6250 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6251 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6252 gas_assert (rt
->units
[stage
+ cycle
][unit
] > 0);
6253 rt
->units
[stage
+ cycle
][unit
]--;
6258 /* Wrapper functions make parameterized resource reservation
6262 opcode_funcUnit_use_unit (void *data
, xtensa_opcode opcode
, int idx
)
6264 xtensa_funcUnit_use
*use
= xtensa_opcode_funcUnit_use (data
, opcode
, idx
);
6270 opcode_funcUnit_use_stage (void *data
, xtensa_opcode opcode
, int idx
)
6272 xtensa_funcUnit_use
*use
= xtensa_opcode_funcUnit_use (data
, opcode
, idx
);
6277 /* Note that this function does not check issue constraints, but
6278 solely whether the hardware is available to execute the given
6279 instructions together. It also doesn't check if the tinsns
6280 write the same state, or access the same tieports. That is
6281 checked by check_t1_t2_reads_and_writes. */
6284 resources_conflict (vliw_insn
*vinsn
)
6287 static resource_table
*rt
= NULL
;
6289 /* This is the most common case by far. Optimize it. */
6290 if (vinsn
->num_slots
== 1)
6295 xtensa_isa isa
= xtensa_default_isa
;
6296 rt
= new_resource_table
6297 (isa
, xtensa_num_pipe_stages
,
6298 xtensa_isa_num_funcUnits (isa
),
6299 (unit_num_copies_func
) xtensa_funcUnit_num_copies
,
6300 (opcode_num_units_func
) xtensa_opcode_num_funcUnit_uses
,
6301 opcode_funcUnit_use_unit
,
6302 opcode_funcUnit_use_stage
);
6305 clear_resource_table (rt
);
6307 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6309 if (!resources_available (rt
, vinsn
->slots
[i
].opcode
, 0))
6311 reserve_resources (rt
, vinsn
->slots
[i
].opcode
, 0);
6318 /* finish_vinsn, emit_single_op and helper functions. */
6320 static bfd_boolean
find_vinsn_conflicts (vliw_insn
*);
6321 static xtensa_format
xg_find_narrowest_format (vliw_insn
*);
6322 static void xg_assemble_vliw_tokens (vliw_insn
*);
6325 /* We have reached the end of a bundle; emit into the frag. */
6328 finish_vinsn (vliw_insn
*vinsn
)
6333 if (find_vinsn_conflicts (vinsn
))
6335 xg_clear_vinsn (vinsn
);
6339 /* First, find a format that works. */
6340 if (vinsn
->format
== XTENSA_UNDEFINED
)
6341 vinsn
->format
= xg_find_narrowest_format (vinsn
);
6343 if (xtensa_format_num_slots (xtensa_default_isa
, vinsn
->format
) > 1
6344 && produce_flix
== FLIX_NONE
)
6346 as_bad (_("The option \"--no-allow-flix\" prohibits multi-slot flix."));
6347 xg_clear_vinsn (vinsn
);
6351 if (vinsn
->format
== XTENSA_UNDEFINED
)
6353 as_bad (_("couldn't find a valid instruction format"));
6354 fprintf (stderr
, _(" ops were: "));
6355 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6356 fprintf (stderr
, _(" %s;"),
6357 xtensa_opcode_name (xtensa_default_isa
,
6358 vinsn
->slots
[i
].opcode
));
6359 fprintf (stderr
, _("\n"));
6360 xg_clear_vinsn (vinsn
);
6364 if (vinsn
->num_slots
6365 != xtensa_format_num_slots (xtensa_default_isa
, vinsn
->format
))
6367 as_bad (_("format '%s' allows %d slots, but there are %d opcodes"),
6368 xtensa_format_name (xtensa_default_isa
, vinsn
->format
),
6369 xtensa_format_num_slots (xtensa_default_isa
, vinsn
->format
),
6371 xg_clear_vinsn (vinsn
);
6375 if (resources_conflict (vinsn
))
6377 as_bad (_("illegal resource usage in bundle"));
6378 fprintf (stderr
, " ops were: ");
6379 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6380 fprintf (stderr
, " %s;",
6381 xtensa_opcode_name (xtensa_default_isa
,
6382 vinsn
->slots
[i
].opcode
));
6383 fprintf (stderr
, "\n");
6384 xg_clear_vinsn (vinsn
);
6388 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6390 if (vinsn
->slots
[i
].opcode
!= XTENSA_UNDEFINED
)
6392 symbolS
*lit_sym
= NULL
;
6394 bfd_boolean e
= FALSE
;
6395 bfd_boolean saved_density
= density_supported
;
6397 /* We don't want to narrow ops inside multi-slot bundles. */
6398 if (vinsn
->num_slots
> 1)
6399 density_supported
= FALSE
;
6401 istack_init (&slotstack
);
6402 if (vinsn
->slots
[i
].opcode
== xtensa_nop_opcode
)
6404 vinsn
->slots
[i
].opcode
=
6405 xtensa_format_slot_nop_opcode (xtensa_default_isa
,
6407 vinsn
->slots
[i
].ntok
= 0;
6410 if (xg_expand_assembly_insn (&slotstack
, &vinsn
->slots
[i
]))
6416 density_supported
= saved_density
;
6420 xg_clear_vinsn (vinsn
);
6424 for (j
= 0; j
< slotstack
.ninsn
; j
++)
6426 TInsn
*insn
= &slotstack
.insn
[j
];
6427 if (insn
->insn_type
== ITYPE_LITERAL
)
6429 gas_assert (lit_sym
== NULL
);
6430 lit_sym
= xg_assemble_literal (insn
);
6434 gas_assert (insn
->insn_type
== ITYPE_INSN
);
6436 xg_resolve_literals (insn
, lit_sym
);
6437 if (j
!= slotstack
.ninsn
- 1)
6438 emit_single_op (insn
);
6442 if (vinsn
->num_slots
> 1)
6444 if (opcode_fits_format_slot
6445 (slotstack
.insn
[slotstack
.ninsn
- 1].opcode
,
6448 vinsn
->slots
[i
] = slotstack
.insn
[slotstack
.ninsn
- 1];
6452 emit_single_op (&slotstack
.insn
[slotstack
.ninsn
- 1]);
6453 if (vinsn
->format
== XTENSA_UNDEFINED
)
6454 vinsn
->slots
[i
].opcode
= xtensa_nop_opcode
;
6456 vinsn
->slots
[i
].opcode
6457 = xtensa_format_slot_nop_opcode (xtensa_default_isa
,
6460 vinsn
->slots
[i
].ntok
= 0;
6465 vinsn
->slots
[0] = slotstack
.insn
[slotstack
.ninsn
- 1];
6466 vinsn
->format
= XTENSA_UNDEFINED
;
6471 /* Now check resource conflicts on the modified bundle. */
6472 if (resources_conflict (vinsn
))
6474 as_bad (_("illegal resource usage in bundle"));
6475 fprintf (stderr
, " ops were: ");
6476 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6477 fprintf (stderr
, " %s;",
6478 xtensa_opcode_name (xtensa_default_isa
,
6479 vinsn
->slots
[i
].opcode
));
6480 fprintf (stderr
, "\n");
6481 xg_clear_vinsn (vinsn
);
6485 /* First, find a format that works. */
6486 if (vinsn
->format
== XTENSA_UNDEFINED
)
6487 vinsn
->format
= xg_find_narrowest_format (vinsn
);
6489 xg_assemble_vliw_tokens (vinsn
);
6491 xg_clear_vinsn (vinsn
);
6493 xtensa_check_frag_count ();
6497 /* Given an vliw instruction, what conflicts are there in register
6498 usage and in writes to states and queues?
6500 This function does two things:
6501 1. Reports an error when a vinsn contains illegal combinations
6502 of writes to registers states or queues.
6503 2. Marks individual tinsns as not relaxable if the combination
6504 contains antidependencies.
6506 Job 2 handles things like swap semantics in instructions that need
6507 to be relaxed. For example,
6511 normally would be relaxed to
6516 _but_, if the above instruction is bundled with an a0 reader, e.g.,
6518 { addi a0, a1, 10000 ; add a2, a0, a4 ; }
6520 then we can't relax it into
6523 { add a0, a1, a0 ; add a2, a0, a4 ; }
6525 because the value of a0 is trashed before the second add can read it. */
6527 static char check_t1_t2_reads_and_writes (TInsn
*, TInsn
*);
6530 find_vinsn_conflicts (vliw_insn
*vinsn
)
6534 xtensa_isa isa
= xtensa_default_isa
;
6536 gas_assert (!past_xtensa_end
);
6538 for (i
= 0 ; i
< vinsn
->num_slots
; i
++)
6540 TInsn
*op1
= &vinsn
->slots
[i
];
6541 if (op1
->is_specific_opcode
)
6542 op1
->keep_wide
= TRUE
;
6544 op1
->keep_wide
= FALSE
;
6547 for (i
= 0 ; i
< vinsn
->num_slots
; i
++)
6549 TInsn
*op1
= &vinsn
->slots
[i
];
6551 if (xtensa_opcode_is_branch (isa
, op1
->opcode
) == 1)
6554 for (j
= 0; j
< vinsn
->num_slots
; j
++)
6558 TInsn
*op2
= &vinsn
->slots
[j
];
6559 char conflict_type
= check_t1_t2_reads_and_writes (op1
, op2
);
6560 switch (conflict_type
)
6563 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same register"),
6564 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6565 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6568 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same state"),
6569 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6570 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6573 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same port"),
6574 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6575 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6578 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) both have volatile port accesses"),
6579 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6580 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6583 /* Everything is OK. */
6586 op2
->is_specific_opcode
= (op2
->is_specific_opcode
6587 || conflict_type
== 'a');
6594 as_bad (_("multiple branches or jumps in the same bundle"));
6602 /* Check how the state used by t1 and t2 relate.
6605 case A: t1 reads a register t2 writes (an antidependency within a bundle)
6606 case B: no relationship between what is read and written (both could
6607 read the same reg though)
6608 case C: t1 writes a register t2 writes (a register conflict within a
6610 case D: t1 writes a state that t2 also writes
6611 case E: t1 writes a tie queue that t2 also writes
6612 case F: two volatile queue accesses
6616 check_t1_t2_reads_and_writes (TInsn
*t1
, TInsn
*t2
)
6618 xtensa_isa isa
= xtensa_default_isa
;
6619 xtensa_regfile t1_regfile
, t2_regfile
;
6621 int t1_base_reg
, t1_last_reg
;
6622 int t2_base_reg
, t2_last_reg
;
6623 char t1_inout
, t2_inout
;
6625 char conflict
= 'b';
6630 bfd_boolean t1_volatile
= FALSE
;
6631 bfd_boolean t2_volatile
= FALSE
;
6633 /* Check registers. */
6634 for (j
= 0; j
< t2
->ntok
; j
++)
6636 if (xtensa_operand_is_register (isa
, t2
->opcode
, j
) != 1)
6639 t2_regfile
= xtensa_operand_regfile (isa
, t2
->opcode
, j
);
6640 t2_base_reg
= t2
->tok
[j
].X_add_number
;
6641 t2_last_reg
= t2_base_reg
+ xtensa_operand_num_regs (isa
, t2
->opcode
, j
);
6643 for (i
= 0; i
< t1
->ntok
; i
++)
6645 if (xtensa_operand_is_register (isa
, t1
->opcode
, i
) != 1)
6648 t1_regfile
= xtensa_operand_regfile (isa
, t1
->opcode
, i
);
6650 if (t1_regfile
!= t2_regfile
)
6653 t1_inout
= xtensa_operand_inout (isa
, t1
->opcode
, i
);
6654 t2_inout
= xtensa_operand_inout (isa
, t2
->opcode
, j
);
6656 if (xtensa_operand_is_known_reg (isa
, t1
->opcode
, i
) == 0
6657 || xtensa_operand_is_known_reg (isa
, t2
->opcode
, j
) == 0)
6659 if (t1_inout
== 'm' || t1_inout
== 'o'
6660 || t2_inout
== 'm' || t2_inout
== 'o')
6667 t1_base_reg
= t1
->tok
[i
].X_add_number
;
6668 t1_last_reg
= (t1_base_reg
6669 + xtensa_operand_num_regs (isa
, t1
->opcode
, i
));
6671 for (t1_reg
= t1_base_reg
; t1_reg
< t1_last_reg
; t1_reg
++)
6673 for (t2_reg
= t2_base_reg
; t2_reg
< t2_last_reg
; t2_reg
++)
6675 if (t1_reg
!= t2_reg
)
6678 if (t2_inout
== 'i' && (t1_inout
== 'm' || t1_inout
== 'o'))
6684 if (t1_inout
== 'i' && (t2_inout
== 'm' || t2_inout
== 'o'))
6690 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6698 t1_states
= xtensa_opcode_num_stateOperands (isa
, t1
->opcode
);
6699 t2_states
= xtensa_opcode_num_stateOperands (isa
, t2
->opcode
);
6700 for (j
= 0; j
< t2_states
; j
++)
6702 xtensa_state t2_so
= xtensa_stateOperand_state (isa
, t2
->opcode
, j
);
6703 t2_inout
= xtensa_stateOperand_inout (isa
, t2
->opcode
, j
);
6704 for (i
= 0; i
< t1_states
; i
++)
6706 xtensa_state t1_so
= xtensa_stateOperand_state (isa
, t1
->opcode
, i
);
6707 t1_inout
= xtensa_stateOperand_inout (isa
, t1
->opcode
, i
);
6708 if (t1_so
!= t2_so
|| xtensa_state_is_shared_or (isa
, t1_so
) == 1)
6711 if (t2_inout
== 'i' && (t1_inout
== 'm' || t1_inout
== 'o'))
6717 if (t1_inout
== 'i' && (t2_inout
== 'm' || t2_inout
== 'o'))
6723 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6728 /* Check tieports. */
6729 t1_interfaces
= xtensa_opcode_num_interfaceOperands (isa
, t1
->opcode
);
6730 t2_interfaces
= xtensa_opcode_num_interfaceOperands (isa
, t2
->opcode
);
6731 for (j
= 0; j
< t2_interfaces
; j
++)
6733 xtensa_interface t2_int
6734 = xtensa_interfaceOperand_interface (isa
, t2
->opcode
, j
);
6735 int t2_class
= xtensa_interface_class_id (isa
, t2_int
);
6737 t2_inout
= xtensa_interface_inout (isa
, t2_int
);
6738 if (xtensa_interface_has_side_effect (isa
, t2_int
) == 1)
6741 for (i
= 0; i
< t1_interfaces
; i
++)
6743 xtensa_interface t1_int
6744 = xtensa_interfaceOperand_interface (isa
, t1
->opcode
, j
);
6745 int t1_class
= xtensa_interface_class_id (isa
, t1_int
);
6747 t1_inout
= xtensa_interface_inout (isa
, t1_int
);
6748 if (xtensa_interface_has_side_effect (isa
, t1_int
) == 1)
6751 if (t1_volatile
&& t2_volatile
&& (t1_class
== t2_class
))
6754 if (t1_int
!= t2_int
)
6757 if (t2_inout
== 'i' && t1_inout
== 'o')
6763 if (t1_inout
== 'i' && t2_inout
== 'o')
6769 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6778 static xtensa_format
6779 xg_find_narrowest_format (vliw_insn
*vinsn
)
6781 /* Right now we assume that the ops within the vinsn are properly
6782 ordered for the slots that the programmer wanted them in. In
6783 other words, we don't rearrange the ops in hopes of finding a
6784 better format. The scheduler handles that. */
6786 xtensa_isa isa
= xtensa_default_isa
;
6787 xtensa_format format
;
6788 xtensa_opcode nop_opcode
= xtensa_nop_opcode
;
6790 if (vinsn
->num_slots
== 1)
6791 return xg_get_single_format (vinsn
->slots
[0].opcode
);
6793 for (format
= 0; format
< xtensa_isa_num_formats (isa
); format
++)
6796 xg_copy_vinsn (&v_copy
, vinsn
);
6797 if (xtensa_format_num_slots (isa
, format
) == v_copy
.num_slots
)
6801 for (slot
= 0; slot
< v_copy
.num_slots
; slot
++)
6803 if (v_copy
.slots
[slot
].opcode
== nop_opcode
)
6805 v_copy
.slots
[slot
].opcode
=
6806 xtensa_format_slot_nop_opcode (isa
, format
, slot
);
6807 v_copy
.slots
[slot
].ntok
= 0;
6810 if (opcode_fits_format_slot (v_copy
.slots
[slot
].opcode
,
6813 else if (v_copy
.num_slots
> 1)
6816 /* Try the widened version. */
6817 if (!v_copy
.slots
[slot
].keep_wide
6818 && !v_copy
.slots
[slot
].is_specific_opcode
6819 && xg_is_single_relaxable_insn (&v_copy
.slots
[slot
],
6821 && opcode_fits_format_slot (widened
.opcode
,
6824 v_copy
.slots
[slot
] = widened
;
6829 if (fit
== v_copy
.num_slots
)
6831 xg_copy_vinsn (vinsn
, &v_copy
);
6832 xtensa_format_encode (isa
, format
, vinsn
->insnbuf
);
6833 vinsn
->format
= format
;
6839 if (format
== xtensa_isa_num_formats (isa
))
6840 return XTENSA_UNDEFINED
;
6846 /* Return the additional space needed in a frag
6847 for possible relaxations of any ops in a VLIW insn.
6848 Also fill out the relaxations that might be required of
6849 each tinsn in the vinsn. */
6852 relaxation_requirements (vliw_insn
*vinsn
, bfd_boolean
*pfinish_frag
)
6854 bfd_boolean finish_frag
= FALSE
;
6855 int extra_space
= 0;
6858 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
6860 TInsn
*tinsn
= &vinsn
->slots
[slot
];
6861 if (!tinsn_has_symbolic_operands (tinsn
))
6863 /* A narrow instruction could be widened later to help
6864 alignment issues. */
6865 if (xg_is_single_relaxable_insn (tinsn
, 0, TRUE
)
6866 && !tinsn
->is_specific_opcode
6867 && vinsn
->num_slots
== 1)
6869 /* Difference in bytes between narrow and wide insns... */
6871 tinsn
->subtype
= RELAX_NARROW
;
6876 if (workaround_b_j_loop_end
6877 && tinsn
->opcode
== xtensa_jx_opcode
6878 && use_transform ())
6880 /* Add 2 of these. */
6881 extra_space
+= 3; /* for the nop size */
6882 tinsn
->subtype
= RELAX_ADD_NOP_IF_PRE_LOOP_END
;
6885 /* Need to assemble it with space for the relocation. */
6886 if (xg_is_relaxable_insn (tinsn
, 0)
6887 && !tinsn
->is_specific_opcode
)
6889 int max_size
= xg_get_max_insn_widen_size (tinsn
->opcode
);
6890 int max_literal_size
=
6891 xg_get_max_insn_widen_literal_size (tinsn
->opcode
);
6893 tinsn
->literal_space
= max_literal_size
;
6895 tinsn
->subtype
= RELAX_IMMED
;
6896 extra_space
+= max_size
;
6900 /* A fix record will be added for this instruction prior
6901 to relaxation, so make it end the frag. */
6906 *pfinish_frag
= finish_frag
;
6912 bundle_tinsn (TInsn
*tinsn
, vliw_insn
*vinsn
)
6914 xtensa_isa isa
= xtensa_default_isa
;
6915 int slot
, chosen_slot
;
6917 vinsn
->format
= xg_get_single_format (tinsn
->opcode
);
6918 gas_assert (vinsn
->format
!= XTENSA_UNDEFINED
);
6919 vinsn
->num_slots
= xtensa_format_num_slots (isa
, vinsn
->format
);
6921 chosen_slot
= xg_get_single_slot (tinsn
->opcode
);
6922 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
6924 if (slot
== chosen_slot
)
6925 vinsn
->slots
[slot
] = *tinsn
;
6928 vinsn
->slots
[slot
].opcode
=
6929 xtensa_format_slot_nop_opcode (isa
, vinsn
->format
, slot
);
6930 vinsn
->slots
[slot
].ntok
= 0;
6931 vinsn
->slots
[slot
].insn_type
= ITYPE_INSN
;
6938 emit_single_op (TInsn
*orig_insn
)
6941 IStack istack
; /* put instructions into here */
6942 symbolS
*lit_sym
= NULL
;
6943 symbolS
*label_sym
= NULL
;
6945 istack_init (&istack
);
6947 /* Special-case for "movi aX, foo" which is guaranteed to need relaxing.
6948 Because the scheduling and bundling characteristics of movi and
6949 l32r or const16 are so different, we can do much better if we relax
6950 it prior to scheduling and bundling, rather than after. */
6951 if ((orig_insn
->opcode
== xtensa_movi_opcode
6952 || orig_insn
->opcode
== xtensa_movi_n_opcode
)
6953 && !cur_vinsn
.inside_bundle
6954 && (orig_insn
->tok
[1].X_op
== O_symbol
6955 || orig_insn
->tok
[1].X_op
== O_pltrel
6956 || orig_insn
->tok
[1].X_op
== O_tlsfunc
6957 || orig_insn
->tok
[1].X_op
== O_tlsarg
6958 || orig_insn
->tok
[1].X_op
== O_tpoff
6959 || orig_insn
->tok
[1].X_op
== O_dtpoff
)
6960 && !orig_insn
->is_specific_opcode
&& use_transform ())
6961 xg_assembly_relax (&istack
, orig_insn
, now_seg
, frag_now
, 0, 1, 0);
6963 if (xg_expand_assembly_insn (&istack
, orig_insn
))
6966 for (i
= 0; i
< istack
.ninsn
; i
++)
6968 TInsn
*insn
= &istack
.insn
[i
];
6969 switch (insn
->insn_type
)
6972 gas_assert (lit_sym
== NULL
);
6973 lit_sym
= xg_assemble_literal (insn
);
6977 static int relaxed_sym_idx
= 0;
6978 char *label
= xmalloc (strlen (FAKE_LABEL_NAME
) + 12);
6979 sprintf (label
, "%s_rl_%x", FAKE_LABEL_NAME
, relaxed_sym_idx
++);
6981 gas_assert (label_sym
== NULL
);
6982 label_sym
= symbol_find_or_make (label
);
6983 gas_assert (label_sym
);
6991 xg_resolve_literals (insn
, lit_sym
);
6993 xg_resolve_labels (insn
, label_sym
);
6995 bundle_tinsn (insn
, &v
);
7010 total_frag_text_expansion (fragS
*fragP
)
7013 int total_expansion
= 0;
7015 for (slot
= 0; slot
< config_max_slots
; slot
++)
7016 total_expansion
+= fragP
->tc_frag_data
.text_expansion
[slot
];
7018 return total_expansion
;
7022 /* Emit a vliw instruction to the current fragment. */
7025 xg_assemble_vliw_tokens (vliw_insn
*vinsn
)
7027 bfd_boolean finish_frag
;
7028 bfd_boolean is_jump
= FALSE
;
7029 bfd_boolean is_branch
= FALSE
;
7030 xtensa_isa isa
= xtensa_default_isa
;
7035 struct dwarf2_line_info debug_line
;
7036 bfd_boolean loc_directive_seen
= FALSE
;
7039 memset (&debug_line
, 0, sizeof (struct dwarf2_line_info
));
7041 if (generating_literals
)
7043 static int reported
= 0;
7045 as_bad_where (frag_now
->fr_file
, frag_now
->fr_line
,
7046 _("cannot assemble into a literal fragment"));
7053 if (frag_now_fix () != 0
7054 && (! frag_now
->tc_frag_data
.is_insn
7055 || (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7056 || (!use_transform ()) != frag_now
->tc_frag_data
.is_no_transform
7057 || (directive_state
[directive_longcalls
]
7058 != frag_now
->tc_frag_data
.use_longcalls
)
7059 || (directive_state
[directive_absolute_literals
]
7060 != frag_now
->tc_frag_data
.use_absolute_literals
)))
7062 frag_wane (frag_now
);
7064 xtensa_set_frag_assembly_state (frag_now
);
7067 if (workaround_a0_b_retw
7068 && vinsn
->num_slots
== 1
7069 && (get_last_insn_flags (now_seg
, now_subseg
) & FLAG_IS_A0_WRITER
) != 0
7070 && xtensa_opcode_is_branch (isa
, vinsn
->slots
[0].opcode
) == 1
7071 && use_transform ())
7073 has_a0_b_retw
= TRUE
;
7075 /* Mark this fragment with the special RELAX_ADD_NOP_IF_A0_B_RETW.
7076 After the first assembly pass we will check all of them and
7077 add a nop if needed. */
7078 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7079 frag_var (rs_machine_dependent
, 4, 4,
7080 RELAX_ADD_NOP_IF_A0_B_RETW
,
7081 frag_now
->fr_symbol
,
7082 frag_now
->fr_offset
,
7084 xtensa_set_frag_assembly_state (frag_now
);
7085 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7086 frag_var (rs_machine_dependent
, 4, 4,
7087 RELAX_ADD_NOP_IF_A0_B_RETW
,
7088 frag_now
->fr_symbol
,
7089 frag_now
->fr_offset
,
7091 xtensa_set_frag_assembly_state (frag_now
);
7094 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
7096 tinsn
= &vinsn
->slots
[slot
];
7098 /* See if the instruction implies an aligned section. */
7099 if (xtensa_opcode_is_loop (isa
, tinsn
->opcode
) == 1)
7100 record_alignment (now_seg
, 2);
7102 /* Determine the best line number for debug info. */
7103 if ((tinsn
->loc_directive_seen
|| !loc_directive_seen
)
7104 && (tinsn
->debug_line
.filenum
!= debug_line
.filenum
7105 || tinsn
->debug_line
.line
< debug_line
.line
7106 || tinsn
->debug_line
.column
< debug_line
.column
))
7107 debug_line
= tinsn
->debug_line
;
7108 if (tinsn
->loc_directive_seen
)
7109 loc_directive_seen
= TRUE
;
7112 /* Special cases for instructions that force an alignment... */
7113 /* None of these opcodes are bundle-able. */
7114 if (xtensa_opcode_is_loop (isa
, vinsn
->slots
[0].opcode
) == 1)
7118 /* Remember the symbol that marks the end of the loop in the frag
7119 that marks the start of the loop. This way we can easily find
7120 the end of the loop at the beginning, without adding special code
7121 to mark the loop instructions themselves. */
7122 symbolS
*target_sym
= NULL
;
7123 if (vinsn
->slots
[0].tok
[1].X_op
== O_symbol
)
7124 target_sym
= vinsn
->slots
[0].tok
[1].X_add_symbol
;
7126 xtensa_set_frag_assembly_state (frag_now
);
7127 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7129 max_fill
= get_text_align_max_fill_size
7130 (get_text_align_power (xtensa_fetch_width
),
7131 TRUE
, frag_now
->tc_frag_data
.is_no_density
);
7133 if (use_transform ())
7134 frag_var (rs_machine_dependent
, max_fill
, max_fill
,
7135 RELAX_ALIGN_NEXT_OPCODE
, target_sym
, 0, NULL
);
7137 frag_var (rs_machine_dependent
, 0, 0,
7138 RELAX_CHECK_ALIGN_NEXT_OPCODE
, target_sym
, 0, NULL
);
7139 xtensa_set_frag_assembly_state (frag_now
);
7142 if (vinsn
->slots
[0].opcode
== xtensa_entry_opcode
7143 && !vinsn
->slots
[0].is_specific_opcode
)
7145 xtensa_mark_literal_pool_location ();
7146 xtensa_move_labels (frag_now
, 0);
7147 frag_var (rs_align_test
, 1, 1, 0, NULL
, 2, NULL
);
7150 if (vinsn
->num_slots
== 1)
7152 if (workaround_a0_b_retw
&& use_transform ())
7153 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_A0_WRITER
,
7154 is_register_writer (&vinsn
->slots
[0], "a", 0));
7156 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_BAD_LOOPEND
,
7157 is_bad_loopend_opcode (&vinsn
->slots
[0]));
7160 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_BAD_LOOPEND
, FALSE
);
7162 insn_size
= xtensa_format_length (isa
, vinsn
->format
);
7164 extra_space
= relaxation_requirements (vinsn
, &finish_frag
);
7166 /* vinsn_to_insnbuf will produce the error. */
7167 if (vinsn
->format
!= XTENSA_UNDEFINED
)
7169 f
= frag_more (insn_size
+ extra_space
);
7170 xtensa_set_frag_assembly_state (frag_now
);
7171 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7174 vinsn_to_insnbuf (vinsn
, f
, frag_now
, FALSE
);
7175 if (vinsn
->format
== XTENSA_UNDEFINED
)
7178 xtensa_insnbuf_to_chars (isa
, vinsn
->insnbuf
, (unsigned char *) f
, 0);
7180 if (debug_type
== DEBUG_DWARF2
|| loc_directive_seen
)
7181 dwarf2_gen_line_info (frag_now_fix () - (insn_size
+ extra_space
),
7184 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
7186 tinsn
= &vinsn
->slots
[slot
];
7187 frag_now
->tc_frag_data
.slot_subtypes
[slot
] = tinsn
->subtype
;
7188 frag_now
->tc_frag_data
.slot_symbols
[slot
] = tinsn
->symbol
;
7189 frag_now
->tc_frag_data
.slot_offsets
[slot
] = tinsn
->offset
;
7190 frag_now
->tc_frag_data
.literal_frags
[slot
] = tinsn
->literal_frag
;
7191 if (tinsn
->opcode
== xtensa_l32r_opcode
)
7193 frag_now
->tc_frag_data
.literal_frags
[slot
] =
7194 tinsn
->tok
[1].X_add_symbol
->sy_frag
;
7196 if (tinsn
->literal_space
!= 0)
7197 xg_assemble_literal_space (tinsn
->literal_space
, slot
);
7198 frag_now
->tc_frag_data
.free_reg
[slot
] = tinsn
->extra_arg
;
7200 if (tinsn
->subtype
== RELAX_NARROW
)
7201 gas_assert (vinsn
->num_slots
== 1);
7202 if (xtensa_opcode_is_jump (isa
, tinsn
->opcode
) == 1)
7204 if (xtensa_opcode_is_branch (isa
, tinsn
->opcode
) == 1)
7207 if (tinsn
->subtype
|| tinsn
->symbol
|| tinsn
->offset
7208 || tinsn
->literal_frag
|| is_jump
|| is_branch
)
7212 if (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7213 frag_now
->tc_frag_data
.is_specific_opcode
= TRUE
;
7217 frag_variant (rs_machine_dependent
,
7218 extra_space
, extra_space
, RELAX_SLOTS
,
7219 frag_now
->fr_symbol
, frag_now
->fr_offset
, f
);
7220 xtensa_set_frag_assembly_state (frag_now
);
7223 /* Special cases for loops:
7224 close_loop_end should be inserted AFTER short_loop.
7225 Make sure that CLOSE loops are processed BEFORE short_loops
7226 when converting them. */
7228 /* "short_loop": Add a NOP if the loop is < 4 bytes. */
7229 if (xtensa_opcode_is_loop (isa
, vinsn
->slots
[0].opcode
) == 1
7230 && !vinsn
->slots
[0].is_specific_opcode
)
7232 if (workaround_short_loop
&& use_transform ())
7234 maybe_has_short_loop
= TRUE
;
7235 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7236 frag_var (rs_machine_dependent
, 4, 4,
7237 RELAX_ADD_NOP_IF_SHORT_LOOP
,
7238 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7239 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7240 frag_var (rs_machine_dependent
, 4, 4,
7241 RELAX_ADD_NOP_IF_SHORT_LOOP
,
7242 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7245 /* "close_loop_end": Add up to 12 bytes of NOPs to keep a
7246 loop at least 12 bytes away from another loop's end. */
7247 if (workaround_close_loop_end
&& use_transform ())
7249 maybe_has_close_loop_end
= TRUE
;
7250 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7251 frag_var (rs_machine_dependent
, 12, 12,
7252 RELAX_ADD_NOP_IF_CLOSE_LOOP_END
,
7253 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7257 if (use_transform ())
7261 gas_assert (finish_frag
);
7262 frag_var (rs_machine_dependent
,
7263 xtensa_fetch_width
, xtensa_fetch_width
,
7265 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7266 xtensa_set_frag_assembly_state (frag_now
);
7267 xtensa_maybe_create_trampoline_frag ();
7268 /* Always create one here. */
7269 xtensa_maybe_create_literal_pool_frag (TRUE
, FALSE
);
7271 else if (is_branch
&& do_align_targets ())
7273 gas_assert (finish_frag
);
7274 frag_var (rs_machine_dependent
,
7275 xtensa_fetch_width
, xtensa_fetch_width
,
7276 RELAX_MAYBE_UNREACHABLE
,
7277 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7278 xtensa_set_frag_assembly_state (frag_now
);
7279 frag_var (rs_machine_dependent
,
7281 RELAX_MAYBE_DESIRE_ALIGN
,
7282 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7283 xtensa_set_frag_assembly_state (frag_now
);
7287 /* Now, if the original opcode was a call... */
7288 if (do_align_targets ()
7289 && xtensa_opcode_is_call (isa
, vinsn
->slots
[0].opcode
) == 1)
7291 float freq
= get_subseg_total_freq (now_seg
, now_subseg
);
7292 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7293 frag_var (rs_machine_dependent
, 4, (int) freq
, RELAX_DESIRE_ALIGN
,
7294 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7295 xtensa_set_frag_assembly_state (frag_now
);
7298 if (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7300 frag_wane (frag_now
);
7302 xtensa_set_frag_assembly_state (frag_now
);
7307 /* xtensa_end and helper functions. */
7309 static void xtensa_cleanup_align_frags (void);
7310 static void xtensa_fix_target_frags (void);
7311 static void xtensa_mark_narrow_branches (void);
7312 static void xtensa_mark_zcl_first_insns (void);
7313 static void xtensa_mark_difference_of_two_symbols (void);
7314 static void xtensa_fix_a0_b_retw_frags (void);
7315 static void xtensa_fix_b_j_loop_end_frags (void);
7316 static void xtensa_fix_close_loop_end_frags (void);
7317 static void xtensa_fix_short_loop_frags (void);
7318 static void xtensa_sanity_check (void);
7319 static void xtensa_add_config_info (void);
7324 directive_balance ();
7325 xtensa_flush_pending_output ();
7327 past_xtensa_end
= TRUE
;
7329 xtensa_move_literals ();
7331 xtensa_reorder_segments ();
7332 xtensa_cleanup_align_frags ();
7333 xtensa_fix_target_frags ();
7334 if (workaround_a0_b_retw
&& has_a0_b_retw
)
7335 xtensa_fix_a0_b_retw_frags ();
7336 if (workaround_b_j_loop_end
)
7337 xtensa_fix_b_j_loop_end_frags ();
7339 /* "close_loop_end" should be processed BEFORE "short_loop". */
7340 if (workaround_close_loop_end
&& maybe_has_close_loop_end
)
7341 xtensa_fix_close_loop_end_frags ();
7343 if (workaround_short_loop
&& maybe_has_short_loop
)
7344 xtensa_fix_short_loop_frags ();
7346 xtensa_mark_narrow_branches ();
7347 xtensa_mark_zcl_first_insns ();
7349 xtensa_sanity_check ();
7351 xtensa_add_config_info ();
7353 xtensa_check_frag_count ();
7357 struct trampoline_frag
7359 struct trampoline_frag
*next
;
7360 bfd_boolean needs_jump_around
;
7365 struct trampoline_seg
7367 struct trampoline_seg
*next
;
7369 struct trampoline_frag trampoline_list
;
7372 static struct trampoline_seg trampoline_seg_list
;
7373 #define J_RANGE (128 * 1024)
7375 static int unreachable_count
= 0;
7379 xtensa_maybe_create_trampoline_frag (void)
7381 if (!use_trampolines
)
7384 /* We create an area for possible trampolines every 10 unreachable frags.
7385 These are preferred over the ones not preceded by an unreachable frag,
7386 because we don't have to jump around them. This function is called after
7387 each RELAX_UNREACHABLE frag is created. */
7389 if (++unreachable_count
> 10)
7391 xtensa_create_trampoline_frag (FALSE
);
7392 clear_frag_count ();
7393 unreachable_count
= 0;
7398 xtensa_check_frag_count (void)
7400 if (!use_trampolines
|| frag_now
->tc_frag_data
.is_no_transform
)
7403 /* We create an area for possible trampolines every 8000 frags or so. This
7404 is an estimate based on the max range of a "j" insn (+/-128K) divided
7405 by a typical frag byte count (16), minus a few for safety. This function
7406 is called after each source line is processed. */
7408 if (get_frag_count () > 8000)
7410 xtensa_create_trampoline_frag (TRUE
);
7411 clear_frag_count ();
7412 unreachable_count
= 0;
7415 /* We create an area for a possible literal pool every N (default 5000)
7417 xtensa_maybe_create_literal_pool_frag (TRUE
, TRUE
);
7420 static xtensa_insnbuf trampoline_buf
= NULL
;
7421 static xtensa_insnbuf trampoline_slotbuf
= NULL
;
7423 static xtensa_insnbuf litpool_buf
= NULL
;
7424 static xtensa_insnbuf litpool_slotbuf
= NULL
;
7426 #define TRAMPOLINE_FRAG_SIZE 3000
7429 xtensa_create_trampoline_frag (bfd_boolean needs_jump_around
)
7431 /* Emit a frag where we can place intermediate jump instructions,
7432 in case we need to jump farther than 128K bytes.
7433 Each jump instruction takes three bytes.
7434 We allocate enough for 1000 trampolines in each frag.
7435 If that's not enough, oh well. */
7437 struct trampoline_seg
*ts
= trampoline_seg_list
.next
;
7438 struct trampoline_frag
*tf
;
7441 int size
= TRAMPOLINE_FRAG_SIZE
;
7443 for ( ; ts
; ts
= ts
->next
)
7445 if (ts
->seg
== now_seg
)
7451 ts
= (struct trampoline_seg
*)xcalloc(sizeof (struct trampoline_seg
), 1);
7452 ts
->next
= trampoline_seg_list
.next
;
7453 trampoline_seg_list
.next
= ts
;
7457 frag_wane (frag_now
);
7459 xtensa_set_frag_assembly_state (frag_now
);
7460 varP
= frag_var (rs_machine_dependent
, size
, size
, RELAX_TRAMPOLINE
, NULL
, 0, NULL
);
7461 fragP
= (fragS
*)(varP
- SIZEOF_STRUCT_FRAG
);
7462 if (trampoline_buf
== NULL
)
7464 trampoline_buf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
7465 trampoline_slotbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
7467 tf
= (struct trampoline_frag
*)xmalloc(sizeof (struct trampoline_frag
));
7468 tf
->next
= ts
->trampoline_list
.next
;
7469 ts
->trampoline_list
.next
= tf
;
7470 tf
->needs_jump_around
= needs_jump_around
;
7476 static struct trampoline_seg
*
7477 find_trampoline_seg (asection
*seg
)
7479 struct trampoline_seg
*ts
= trampoline_seg_list
.next
;
7481 for ( ; ts
; ts
= ts
->next
)
7491 void dump_trampolines (void);
7494 dump_trampolines (void)
7496 struct trampoline_seg
*ts
= trampoline_seg_list
.next
;
7498 for ( ; ts
; ts
= ts
->next
)
7500 asection
*seg
= ts
->seg
;
7504 fprintf(stderr
, "SECTION %s\n", seg
->name
);
7505 struct trampoline_frag
*tf
= ts
->trampoline_list
.next
;
7506 for ( ; tf
; tf
= tf
->next
)
7508 if (tf
->fragP
== NULL
)
7510 fprintf(stderr
, " 0x%08x: fix=%d, jump_around=%s\n",
7511 (int)tf
->fragP
->fr_address
, (int)tf
->fragP
->fr_fix
,
7512 tf
->needs_jump_around
? "T" : "F");
7517 static void dump_litpools (void) __attribute__ ((unused
));
7520 dump_litpools (void)
7522 struct litpool_seg
*lps
= litpool_seg_list
.next
;
7523 struct litpool_frag
*lpf
;
7525 for ( ; lps
; lps
= lps
->next
)
7527 printf("litpool seg %s\n", lps
->seg
->name
);
7528 for ( lpf
= lps
->frag_list
.next
; lpf
->fragP
; lpf
= lpf
->next
)
7530 fragS
*litfrag
= lpf
->fragP
->fr_next
;
7532 while (litfrag
&& litfrag
->fr_subtype
!= RELAX_LITERAL_POOL_END
)
7534 if (litfrag
->fr_fix
== 4)
7536 litfrag
= litfrag
->fr_next
;
7538 printf(" %ld <%d:%d> (%d) [%d]: ",
7539 lpf
->addr
, lpf
->priority
, lpf
->original_priority
,
7540 lpf
->fragP
->fr_line
, count
);
7541 //dump_frag(lpf->fragP);
7547 xtensa_maybe_create_literal_pool_frag (bfd_boolean create
,
7548 bfd_boolean only_if_needed
)
7550 struct litpool_seg
*lps
= litpool_seg_list
.next
;
7552 struct litpool_frag
*lpf
;
7553 bfd_boolean needed
= FALSE
;
7555 if (use_literal_section
|| !auto_litpools
)
7558 for ( ; lps
; lps
= lps
->next
)
7560 if (lps
->seg
== now_seg
)
7566 lps
= (struct litpool_seg
*)xcalloc (sizeof (struct litpool_seg
), 1);
7567 lps
->next
= litpool_seg_list
.next
;
7568 litpool_seg_list
.next
= lps
;
7570 lps
->frag_list
.next
= &lps
->frag_list
;
7571 lps
->frag_list
.prev
= &lps
->frag_list
;
7580 if (past_xtensa_end
|| !use_transform() ||
7581 frag_now
->tc_frag_data
.is_no_transform
)
7585 if (auto_litpool_limit
<= 0)
7587 /* Don't create a litpool based only on frag count. */
7590 else if (lps
->frag_count
> auto_litpool_limit
)
7607 int size
= (only_if_needed
) ? 3 : 0; /* Space for a "j" insn. */
7608 /* Create a potential site for a literal pool. */
7609 frag_wane (frag_now
);
7611 xtensa_set_frag_assembly_state (frag_now
);
7613 fragP
->tc_frag_data
.lit_frchain
= frchain_now
;
7614 fragP
->tc_frag_data
.literal_frag
= fragP
;
7615 frag_var (rs_machine_dependent
, size
, size
,
7617 RELAX_LITERAL_POOL_CANDIDATE_BEGIN
:
7618 RELAX_LITERAL_POOL_BEGIN
,
7620 frag_now
->tc_frag_data
.lit_seg
= now_seg
;
7621 frag_variant (rs_machine_dependent
, 0, 0,
7622 RELAX_LITERAL_POOL_END
, NULL
, 0, NULL
);
7623 xtensa_set_frag_assembly_state (frag_now
);
7627 /* RELAX_LITERAL_POOL_BEGIN frag is being created;
7628 just record it here. */
7632 lpf
= (struct litpool_frag
*)xmalloc(sizeof (struct litpool_frag
));
7633 /* Insert at tail of circular list. */
7635 lps
->frag_list
.prev
->next
= lpf
;
7636 lpf
->next
= &lps
->frag_list
;
7637 lpf
->prev
= lps
->frag_list
.prev
;
7638 lps
->frag_list
.prev
= lpf
;
7640 lpf
->priority
= (needed
) ? (only_if_needed
) ? 3 : 2 : 1;
7641 lpf
->original_priority
= lpf
->priority
;
7643 lps
->frag_count
= 0;
7647 xtensa_cleanup_align_frags (void)
7652 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7653 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7656 /* Walk over all of the fragments in a subsection. */
7657 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7659 if ((fragP
->fr_type
== rs_align
7660 || fragP
->fr_type
== rs_align_code
7661 || (fragP
->fr_type
== rs_machine_dependent
7662 && (fragP
->fr_subtype
== RELAX_DESIRE_ALIGN
7663 || fragP
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)))
7664 && fragP
->fr_fix
== 0)
7666 fragS
*next
= fragP
->fr_next
;
7669 && next
->fr_fix
== 0
7670 && next
->fr_type
== rs_machine_dependent
7671 && next
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)
7674 next
= next
->fr_next
;
7677 /* If we don't widen branch targets, then they
7678 will be easier to align. */
7679 if (fragP
->tc_frag_data
.is_branch_target
7680 && fragP
->fr_opcode
== fragP
->fr_literal
7681 && fragP
->fr_type
== rs_machine_dependent
7682 && fragP
->fr_subtype
== RELAX_SLOTS
7683 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
7685 if (fragP
->fr_type
== rs_machine_dependent
7686 && fragP
->fr_subtype
== RELAX_UNREACHABLE
)
7687 fragP
->tc_frag_data
.is_unreachable
= TRUE
;
7693 /* Re-process all of the fragments looking to convert all of the
7694 RELAX_DESIRE_ALIGN_IF_TARGET fragments. If there is a branch
7695 target in the next fragment, convert this to RELAX_DESIRE_ALIGN.
7696 Otherwise, convert to a .fill 0. */
7699 xtensa_fix_target_frags (void)
7704 /* When this routine is called, all of the subsections are still intact
7705 so we walk over subsections instead of sections. */
7706 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7707 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7711 /* Walk over all of the fragments in a subsection. */
7712 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7714 if (fragP
->fr_type
== rs_machine_dependent
7715 && fragP
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)
7717 if (next_frag_is_branch_target (fragP
))
7718 fragP
->fr_subtype
= RELAX_DESIRE_ALIGN
;
7727 static bfd_boolean
is_narrow_branch_guaranteed_in_range (fragS
*, TInsn
*);
7730 xtensa_mark_narrow_branches (void)
7735 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7736 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7739 /* Walk over all of the fragments in a subsection. */
7740 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7742 if (fragP
->fr_type
== rs_machine_dependent
7743 && fragP
->fr_subtype
== RELAX_SLOTS
7744 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED
)
7748 vinsn_from_chars (&vinsn
, fragP
->fr_opcode
);
7749 tinsn_immed_from_frag (&vinsn
.slots
[0], fragP
, 0);
7751 if (vinsn
.num_slots
== 1
7752 && xtensa_opcode_is_branch (xtensa_default_isa
,
7753 vinsn
.slots
[0].opcode
) == 1
7754 && xg_get_single_size (vinsn
.slots
[0].opcode
) == 2
7755 && is_narrow_branch_guaranteed_in_range (fragP
,
7758 fragP
->fr_subtype
= RELAX_SLOTS
;
7759 fragP
->tc_frag_data
.slot_subtypes
[0] = RELAX_NARROW
;
7760 fragP
->tc_frag_data
.is_aligning_branch
= 1;
7768 /* A branch is typically widened only when its target is out of
7769 range. However, we would like to widen them to align a subsequent
7770 branch target when possible.
7772 Because the branch relaxation code is so convoluted, the optimal solution
7773 (combining the two cases) is difficult to get right in all circumstances.
7774 We therefore go with an "almost as good" solution, where we only
7775 use for alignment narrow branches that definitely will not expand to a
7776 jump and a branch. These functions find and mark these cases. */
7778 /* The range in bytes of BNEZ.N and BEQZ.N. The target operand is encoded
7779 as PC + 4 + imm6, where imm6 is a 6-bit immediate ranging from 0 to 63.
7780 We start counting beginning with the frag after the 2-byte branch, so the
7781 maximum offset is (4 - 2) + 63 = 65. */
7782 #define MAX_IMMED6 65
7784 static offsetT
unrelaxed_frag_max_size (fragS
*);
7787 is_narrow_branch_guaranteed_in_range (fragS
*fragP
, TInsn
*tinsn
)
7789 const expressionS
*exp
= &tinsn
->tok
[1];
7790 symbolS
*symbolP
= exp
->X_add_symbol
;
7791 offsetT max_distance
= exp
->X_add_number
;
7794 if (exp
->X_op
!= O_symbol
)
7797 target_frag
= symbol_get_frag (symbolP
);
7799 max_distance
+= (S_GET_VALUE (symbolP
) - target_frag
->fr_address
);
7800 if (is_branch_jmp_to_next (tinsn
, fragP
))
7803 /* The branch doesn't branch over it's own frag,
7804 but over the subsequent ones. */
7805 fragP
= fragP
->fr_next
;
7806 while (fragP
!= NULL
&& fragP
!= target_frag
&& max_distance
<= MAX_IMMED6
)
7808 max_distance
+= unrelaxed_frag_max_size (fragP
);
7809 fragP
= fragP
->fr_next
;
7811 if (max_distance
<= MAX_IMMED6
&& fragP
== target_frag
)
7818 xtensa_mark_zcl_first_insns (void)
7823 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7824 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7827 /* Walk over all of the fragments in a subsection. */
7828 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7830 if (fragP
->fr_type
== rs_machine_dependent
7831 && (fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
7832 || fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
))
7834 /* Find the loop frag. */
7835 fragS
*loop_frag
= next_non_empty_frag (fragP
);
7836 /* Find the first insn frag. */
7837 fragS
*targ_frag
= next_non_empty_frag (loop_frag
);
7839 /* Handle a corner case that comes up in hardware
7840 diagnostics. The original assembly looks like this:
7843 <empty_frag>--not found by next_non_empty_frag
7846 Depending on the start address, the assembler may or
7847 may not change it to look something like this:
7850 nop--frag isn't empty anymore
7853 So set up to check the alignment of the nop if it
7855 while (loop_frag
!= targ_frag
)
7857 if (loop_frag
->fr_type
== rs_machine_dependent
7858 && (loop_frag
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
7859 || loop_frag
->fr_subtype
7860 == RELAX_CHECK_ALIGN_NEXT_OPCODE
))
7861 targ_frag
= loop_frag
;
7863 loop_frag
= loop_frag
->fr_next
;
7866 /* Of course, sometimes (mostly for toy test cases) a
7867 zero-cost loop instruction is the last in a section. */
7870 targ_frag
->tc_frag_data
.is_first_loop_insn
= TRUE
;
7871 /* Do not widen a frag that is the first instruction of a
7872 zero-cost loop. It makes that loop harder to align. */
7873 if (targ_frag
->fr_type
== rs_machine_dependent
7874 && targ_frag
->fr_subtype
== RELAX_SLOTS
7875 && (targ_frag
->tc_frag_data
.slot_subtypes
[0]
7878 if (targ_frag
->tc_frag_data
.is_aligning_branch
)
7879 targ_frag
->tc_frag_data
.slot_subtypes
[0] = RELAX_IMMED
;
7882 frag_wane (targ_frag
);
7883 targ_frag
->tc_frag_data
.slot_subtypes
[0] = 0;
7887 if (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)
7895 /* When a difference-of-symbols expression is encoded as a uleb128 or
7896 sleb128 value, the linker is unable to adjust that value to account for
7897 link-time relaxation. Mark all the code between such symbols so that
7898 its size cannot be changed by linker relaxation. */
7901 xtensa_mark_difference_of_two_symbols (void)
7905 for (expr_sym
= expr_symbols
; expr_sym
;
7906 expr_sym
= symbol_get_tc (expr_sym
)->next_expr_symbol
)
7908 expressionS
*exp
= symbol_get_value_expression (expr_sym
);
7910 if (exp
->X_op
== O_subtract
)
7912 symbolS
*left
= exp
->X_add_symbol
;
7913 symbolS
*right
= exp
->X_op_symbol
;
7915 /* Difference of two symbols not in the same section
7916 are handled with relocations in the linker. */
7917 if (S_GET_SEGMENT (left
) == S_GET_SEGMENT (right
))
7923 if (symbol_get_frag (left
)->fr_address
7924 <= symbol_get_frag (right
)->fr_address
)
7926 start
= symbol_get_frag (left
);
7927 end
= symbol_get_frag (right
);
7931 start
= symbol_get_frag (right
);
7932 end
= symbol_get_frag (left
);
7935 if (start
->tc_frag_data
.no_transform_end
!= NULL
)
7936 walk
= start
->tc_frag_data
.no_transform_end
;
7941 walk
->tc_frag_data
.is_no_transform
= 1;
7942 walk
= walk
->fr_next
;
7944 while (walk
&& walk
->fr_address
< end
->fr_address
);
7946 start
->tc_frag_data
.no_transform_end
= walk
;
7953 /* Re-process all of the fragments looking to convert all of the
7954 RELAX_ADD_NOP_IF_A0_B_RETW. If the next instruction is a
7955 conditional branch or a retw/retw.n, convert this frag to one that
7956 will generate a NOP. In any case close it off with a .fill 0. */
7958 static bfd_boolean
next_instrs_are_b_retw (fragS
*);
7961 xtensa_fix_a0_b_retw_frags (void)
7966 /* When this routine is called, all of the subsections are still intact
7967 so we walk over subsections instead of sections. */
7968 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7969 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7973 /* Walk over all of the fragments in a subsection. */
7974 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7976 if (fragP
->fr_type
== rs_machine_dependent
7977 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_A0_B_RETW
)
7979 if (next_instrs_are_b_retw (fragP
))
7981 if (fragP
->tc_frag_data
.is_no_transform
)
7982 as_bad (_("instruction sequence (write a0, branch, retw) may trigger hardware errata"));
7984 relax_frag_add_nop (fragP
);
7994 next_instrs_are_b_retw (fragS
*fragP
)
7996 xtensa_opcode opcode
;
7998 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
7999 static xtensa_insnbuf insnbuf
= NULL
;
8000 static xtensa_insnbuf slotbuf
= NULL
;
8001 xtensa_isa isa
= xtensa_default_isa
;
8004 bfd_boolean branch_seen
= FALSE
;
8008 insnbuf
= xtensa_insnbuf_alloc (isa
);
8009 slotbuf
= xtensa_insnbuf_alloc (isa
);
8012 if (next_fragP
== NULL
)
8015 /* Check for the conditional branch. */
8016 xtensa_insnbuf_from_chars
8017 (isa
, insnbuf
, (unsigned char *) &next_fragP
->fr_literal
[offset
], 0);
8018 fmt
= xtensa_format_decode (isa
, insnbuf
);
8019 if (fmt
== XTENSA_UNDEFINED
)
8022 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
8024 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
8025 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
8027 branch_seen
= (branch_seen
8028 || xtensa_opcode_is_branch (isa
, opcode
) == 1);
8034 offset
+= xtensa_format_length (isa
, fmt
);
8035 if (offset
== next_fragP
->fr_fix
)
8037 next_fragP
= next_non_empty_frag (next_fragP
);
8041 if (next_fragP
== NULL
)
8044 /* Check for the retw/retw.n. */
8045 xtensa_insnbuf_from_chars
8046 (isa
, insnbuf
, (unsigned char *) &next_fragP
->fr_literal
[offset
], 0);
8047 fmt
= xtensa_format_decode (isa
, insnbuf
);
8049 /* Because RETW[.N] is not bundleable, a VLIW bundle here means that we
8050 have no problems. */
8051 if (fmt
== XTENSA_UNDEFINED
8052 || xtensa_format_num_slots (isa
, fmt
) != 1)
8055 xtensa_format_get_slot (isa
, fmt
, 0, insnbuf
, slotbuf
);
8056 opcode
= xtensa_opcode_decode (isa
, fmt
, 0, slotbuf
);
8058 if (opcode
== xtensa_retw_opcode
|| opcode
== xtensa_retw_n_opcode
)
8065 /* Re-process all of the fragments looking to convert all of the
8066 RELAX_ADD_NOP_IF_PRE_LOOP_END. If there is one instruction and a
8067 loop end label, convert this frag to one that will generate a NOP.
8068 In any case close it off with a .fill 0. */
8070 static bfd_boolean
next_instr_is_loop_end (fragS
*);
8073 xtensa_fix_b_j_loop_end_frags (void)
8078 /* When this routine is called, all of the subsections are still intact
8079 so we walk over subsections instead of sections. */
8080 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8081 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8085 /* Walk over all of the fragments in a subsection. */
8086 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8088 if (fragP
->fr_type
== rs_machine_dependent
8089 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_PRE_LOOP_END
)
8091 if (next_instr_is_loop_end (fragP
))
8093 if (fragP
->tc_frag_data
.is_no_transform
)
8094 as_bad (_("branching or jumping to a loop end may trigger hardware errata"));
8096 relax_frag_add_nop (fragP
);
8106 next_instr_is_loop_end (fragS
*fragP
)
8108 const fragS
*next_fragP
;
8110 if (next_frag_is_loop_target (fragP
))
8113 next_fragP
= next_non_empty_frag (fragP
);
8114 if (next_fragP
== NULL
)
8117 if (!next_frag_is_loop_target (next_fragP
))
8120 /* If the size is >= 3 then there is more than one instruction here.
8121 The hardware bug will not fire. */
8122 if (next_fragP
->fr_fix
> 3)
8129 /* Re-process all of the fragments looking to convert all of the
8130 RELAX_ADD_NOP_IF_CLOSE_LOOP_END. If there is an loop end that is
8131 not MY loop's loop end within 12 bytes, add enough nops here to
8132 make it at least 12 bytes away. In any case close it off with a
8135 static offsetT min_bytes_to_other_loop_end
8136 (fragS
*, fragS
*, offsetT
);
8139 xtensa_fix_close_loop_end_frags (void)
8144 /* When this routine is called, all of the subsections are still intact
8145 so we walk over subsections instead of sections. */
8146 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8147 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8151 fragS
*current_target
= NULL
;
8153 /* Walk over all of the fragments in a subsection. */
8154 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8156 if (fragP
->fr_type
== rs_machine_dependent
8157 && ((fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
)
8158 || (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)))
8159 current_target
= symbol_get_frag (fragP
->fr_symbol
);
8162 && fragP
->fr_type
== rs_machine_dependent
8163 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_CLOSE_LOOP_END
)
8166 int bytes_added
= 0;
8168 #define REQUIRED_LOOP_DIVIDING_BYTES 12
8169 /* Max out at 12. */
8170 min_bytes
= min_bytes_to_other_loop_end
8171 (fragP
->fr_next
, current_target
, REQUIRED_LOOP_DIVIDING_BYTES
);
8173 if (min_bytes
< REQUIRED_LOOP_DIVIDING_BYTES
)
8175 if (fragP
->tc_frag_data
.is_no_transform
)
8176 as_bad (_("loop end too close to another loop end may trigger hardware errata"));
8179 while (min_bytes
+ bytes_added
8180 < REQUIRED_LOOP_DIVIDING_BYTES
)
8184 if (fragP
->fr_var
< length
)
8185 as_fatal (_("fr_var %lu < length %d"),
8186 (long) fragP
->fr_var
, length
);
8189 assemble_nop (length
,
8190 fragP
->fr_literal
+ fragP
->fr_fix
);
8191 fragP
->fr_fix
+= length
;
8192 fragP
->fr_var
-= length
;
8194 bytes_added
+= length
;
8200 gas_assert (fragP
->fr_type
!= rs_machine_dependent
8201 || fragP
->fr_subtype
!= RELAX_ADD_NOP_IF_CLOSE_LOOP_END
);
8207 static offsetT
unrelaxed_frag_min_size (fragS
*);
8210 min_bytes_to_other_loop_end (fragS
*fragP
,
8211 fragS
*current_target
,
8215 fragS
*current_fragP
;
8217 for (current_fragP
= fragP
;
8219 current_fragP
= current_fragP
->fr_next
)
8221 if (current_fragP
->tc_frag_data
.is_loop_target
8222 && current_fragP
!= current_target
)
8225 offset
+= unrelaxed_frag_min_size (current_fragP
);
8227 if (offset
>= max_size
)
8235 unrelaxed_frag_min_size (fragS
*fragP
)
8237 offsetT size
= fragP
->fr_fix
;
8239 /* Add fill size. */
8240 if (fragP
->fr_type
== rs_fill
)
8241 size
+= fragP
->fr_offset
;
8248 unrelaxed_frag_max_size (fragS
*fragP
)
8250 offsetT size
= fragP
->fr_fix
;
8251 switch (fragP
->fr_type
)
8254 /* Empty frags created by the obstack allocation scheme
8255 end up with type 0. */
8260 size
+= fragP
->fr_offset
;
8268 /* No further adjustments needed. */
8270 case rs_machine_dependent
:
8271 if (fragP
->fr_subtype
!= RELAX_DESIRE_ALIGN
)
8272 size
+= fragP
->fr_var
;
8275 /* We had darn well better know how big it is. */
8284 /* Re-process all of the fragments looking to convert all
8285 of the RELAX_ADD_NOP_IF_SHORT_LOOP. If:
8288 1) the instruction size count to the loop end label
8289 is too short (<= 2 instructions),
8290 2) loop has a jump or branch in it
8293 1) workaround_all_short_loops is TRUE
8294 2) The generating loop was a 'loopgtz' or 'loopnez'
8295 3) the instruction size count to the loop end label is too short
8297 then convert this frag (and maybe the next one) to generate a NOP.
8298 In any case close it off with a .fill 0. */
8300 static int count_insns_to_loop_end (fragS
*, bfd_boolean
, int);
8301 static bfd_boolean
branch_before_loop_end (fragS
*);
8304 xtensa_fix_short_loop_frags (void)
8309 /* When this routine is called, all of the subsections are still intact
8310 so we walk over subsections instead of sections. */
8311 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8312 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8315 xtensa_opcode current_opcode
= XTENSA_UNDEFINED
;
8317 /* Walk over all of the fragments in a subsection. */
8318 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8320 if (fragP
->fr_type
== rs_machine_dependent
8321 && ((fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
)
8322 || (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)))
8325 fragS
*loop_frag
= next_non_empty_frag (fragP
);
8326 tinsn_from_chars (&t_insn
, loop_frag
->fr_opcode
, 0);
8327 current_opcode
= t_insn
.opcode
;
8328 gas_assert (xtensa_opcode_is_loop (xtensa_default_isa
,
8329 current_opcode
) == 1);
8332 if (fragP
->fr_type
== rs_machine_dependent
8333 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_SHORT_LOOP
)
8335 if (count_insns_to_loop_end (fragP
->fr_next
, TRUE
, 3) < 3
8336 && (branch_before_loop_end (fragP
->fr_next
)
8337 || (workaround_all_short_loops
8338 && current_opcode
!= XTENSA_UNDEFINED
8339 && current_opcode
!= xtensa_loop_opcode
)))
8341 if (fragP
->tc_frag_data
.is_no_transform
)
8342 as_bad (_("loop containing less than three instructions may trigger hardware errata"));
8344 relax_frag_add_nop (fragP
);
8353 static int unrelaxed_frag_min_insn_count (fragS
*);
8356 count_insns_to_loop_end (fragS
*base_fragP
,
8357 bfd_boolean count_relax_add
,
8360 fragS
*fragP
= NULL
;
8365 for (; fragP
&& !fragP
->tc_frag_data
.is_loop_target
; fragP
= fragP
->fr_next
)
8367 insn_count
+= unrelaxed_frag_min_insn_count (fragP
);
8368 if (insn_count
>= max_count
)
8371 if (count_relax_add
)
8373 if (fragP
->fr_type
== rs_machine_dependent
8374 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_SHORT_LOOP
)
8376 /* In order to add the appropriate number of
8377 NOPs, we count an instruction for downstream
8380 if (insn_count
>= max_count
)
8390 unrelaxed_frag_min_insn_count (fragS
*fragP
)
8392 xtensa_isa isa
= xtensa_default_isa
;
8393 static xtensa_insnbuf insnbuf
= NULL
;
8397 if (!fragP
->tc_frag_data
.is_insn
)
8401 insnbuf
= xtensa_insnbuf_alloc (isa
);
8403 /* Decode the fixed instructions. */
8404 while (offset
< fragP
->fr_fix
)
8408 xtensa_insnbuf_from_chars
8409 (isa
, insnbuf
, (unsigned char *) fragP
->fr_literal
+ offset
, 0);
8410 fmt
= xtensa_format_decode (isa
, insnbuf
);
8412 if (fmt
== XTENSA_UNDEFINED
)
8414 as_fatal (_("undecodable instruction in instruction frag"));
8417 offset
+= xtensa_format_length (isa
, fmt
);
8425 static bfd_boolean
unrelaxed_frag_has_b_j (fragS
*);
8428 branch_before_loop_end (fragS
*base_fragP
)
8432 for (fragP
= base_fragP
;
8433 fragP
&& !fragP
->tc_frag_data
.is_loop_target
;
8434 fragP
= fragP
->fr_next
)
8436 if (unrelaxed_frag_has_b_j (fragP
))
8444 unrelaxed_frag_has_b_j (fragS
*fragP
)
8446 static xtensa_insnbuf insnbuf
= NULL
;
8447 xtensa_isa isa
= xtensa_default_isa
;
8450 if (!fragP
->tc_frag_data
.is_insn
)
8454 insnbuf
= xtensa_insnbuf_alloc (isa
);
8456 /* Decode the fixed instructions. */
8457 while (offset
< fragP
->fr_fix
)
8462 xtensa_insnbuf_from_chars
8463 (isa
, insnbuf
, (unsigned char *) fragP
->fr_literal
+ offset
, 0);
8464 fmt
= xtensa_format_decode (isa
, insnbuf
);
8465 if (fmt
== XTENSA_UNDEFINED
)
8468 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
8470 xtensa_opcode opcode
=
8471 get_opcode_from_buf (fragP
->fr_literal
+ offset
, slot
);
8472 if (xtensa_opcode_is_branch (isa
, opcode
) == 1
8473 || xtensa_opcode_is_jump (isa
, opcode
) == 1)
8476 offset
+= xtensa_format_length (isa
, fmt
);
8482 /* Checks to be made after initial assembly but before relaxation. */
8484 static bfd_boolean
is_empty_loop (const TInsn
*, fragS
*);
8485 static bfd_boolean
is_local_forward_loop (const TInsn
*, fragS
*);
8488 xtensa_sanity_check (void)
8490 const char *file_name
;
8495 file_name
= as_where (&line
);
8496 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8497 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8501 /* Walk over all of the fragments in a subsection. */
8502 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8504 if (fragP
->fr_type
== rs_machine_dependent
8505 && fragP
->fr_subtype
== RELAX_SLOTS
8506 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED
)
8508 static xtensa_insnbuf insnbuf
= NULL
;
8511 if (fragP
->fr_opcode
!= NULL
)
8514 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
8515 tinsn_from_chars (&t_insn
, fragP
->fr_opcode
, 0);
8516 tinsn_immed_from_frag (&t_insn
, fragP
, 0);
8518 if (xtensa_opcode_is_loop (xtensa_default_isa
,
8519 t_insn
.opcode
) == 1)
8521 if (is_empty_loop (&t_insn
, fragP
))
8523 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
8524 as_bad (_("invalid empty loop"));
8526 if (!is_local_forward_loop (&t_insn
, fragP
))
8528 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
8529 as_bad (_("loop target does not follow "
8530 "loop instruction in section"));
8537 new_logical_line (file_name
, line
);
8541 #define LOOP_IMMED_OPN 1
8543 /* Return TRUE if the loop target is the next non-zero fragment. */
8546 is_empty_loop (const TInsn
*insn
, fragS
*fragP
)
8548 const expressionS
*exp
;
8552 if (insn
->insn_type
!= ITYPE_INSN
)
8555 if (xtensa_opcode_is_loop (xtensa_default_isa
, insn
->opcode
) != 1)
8558 if (insn
->ntok
<= LOOP_IMMED_OPN
)
8561 exp
= &insn
->tok
[LOOP_IMMED_OPN
];
8563 if (exp
->X_op
!= O_symbol
)
8566 symbolP
= exp
->X_add_symbol
;
8570 if (symbol_get_frag (symbolP
) == NULL
)
8573 if (S_GET_VALUE (symbolP
) != 0)
8576 /* Walk through the zero-size fragments from this one. If we find
8577 the target fragment, then this is a zero-size loop. */
8579 for (next_fragP
= fragP
->fr_next
;
8581 next_fragP
= next_fragP
->fr_next
)
8583 if (next_fragP
== symbol_get_frag (symbolP
))
8585 if (next_fragP
->fr_fix
!= 0)
8593 is_local_forward_loop (const TInsn
*insn
, fragS
*fragP
)
8595 const expressionS
*exp
;
8599 if (insn
->insn_type
!= ITYPE_INSN
)
8602 if (xtensa_opcode_is_loop (xtensa_default_isa
, insn
->opcode
) != 1)
8605 if (insn
->ntok
<= LOOP_IMMED_OPN
)
8608 exp
= &insn
->tok
[LOOP_IMMED_OPN
];
8610 if (exp
->X_op
!= O_symbol
)
8613 symbolP
= exp
->X_add_symbol
;
8617 if (symbol_get_frag (symbolP
) == NULL
)
8620 /* Walk through fragments until we find the target.
8621 If we do not find the target, then this is an invalid loop. */
8623 for (next_fragP
= fragP
->fr_next
;
8625 next_fragP
= next_fragP
->fr_next
)
8627 if (next_fragP
== symbol_get_frag (symbolP
))
8635 #define XTINFO_NAME "Xtensa_Info"
8636 #define XTINFO_NAMESZ 12
8637 #define XTINFO_TYPE 1
8640 xtensa_add_config_info (void)
8646 info_sec
= subseg_new (".xtensa.info", 0);
8647 bfd_set_section_flags (stdoutput
, info_sec
, SEC_HAS_CONTENTS
| SEC_READONLY
);
8649 data
= xmalloc (100);
8650 sprintf (data
, "USE_ABSOLUTE_LITERALS=%d\nABI=%d\n",
8651 XSHAL_USE_ABSOLUTE_LITERALS
, XSHAL_ABI
);
8652 sz
= strlen (data
) + 1;
8654 /* Add enough null terminators to pad to a word boundary. */
8657 while ((sz
& 3) != 0);
8659 /* Follow the standard note section layout:
8660 First write the length of the name string. */
8662 md_number_to_chars (p
, (valueT
) XTINFO_NAMESZ
, 4);
8664 /* Next comes the length of the "descriptor", i.e., the actual data. */
8666 md_number_to_chars (p
, (valueT
) sz
, 4);
8668 /* Write the note type. */
8670 md_number_to_chars (p
, (valueT
) XTINFO_TYPE
, 4);
8672 /* Write the name field. */
8673 p
= frag_more (XTINFO_NAMESZ
);
8674 memcpy (p
, XTINFO_NAME
, XTINFO_NAMESZ
);
8676 /* Finally, write the descriptor. */
8678 memcpy (p
, data
, sz
);
8684 /* Alignment Functions. */
8687 get_text_align_power (unsigned target_size
)
8689 if (target_size
<= 4)
8692 if (target_size
<= 8)
8695 if (target_size
<= 16)
8698 if (target_size
<= 32)
8701 if (target_size
<= 64)
8704 if (target_size
<= 128)
8707 if (target_size
<= 256)
8710 if (target_size
<= 512)
8713 if (target_size
<= 1024)
8722 get_text_align_max_fill_size (int align_pow
,
8723 bfd_boolean use_nops
,
8724 bfd_boolean use_no_density
)
8727 return (1 << align_pow
);
8729 return 3 * (1 << align_pow
);
8731 return 1 + (1 << align_pow
);
8735 /* Calculate the minimum bytes of fill needed at "address" to align a
8736 target instruction of size "target_size" so that it does not cross a
8737 power-of-two boundary specified by "align_pow". If "use_nops" is FALSE,
8738 the fill can be an arbitrary number of bytes. Otherwise, the space must
8739 be filled by NOP instructions. */
8742 get_text_align_fill_size (addressT address
,
8745 bfd_boolean use_nops
,
8746 bfd_boolean use_no_density
)
8748 addressT alignment
, fill
, fill_limit
, fill_step
;
8749 bfd_boolean skip_one
= FALSE
;
8751 alignment
= (1 << align_pow
);
8752 gas_assert (target_size
> 0 && alignment
>= (addressT
) target_size
);
8756 fill_limit
= alignment
;
8759 else if (!use_no_density
)
8761 /* Combine 2- and 3-byte NOPs to fill anything larger than one. */
8762 fill_limit
= alignment
* 2;
8768 /* Fill with 3-byte NOPs -- can only fill multiples of 3. */
8769 fill_limit
= alignment
* 3;
8773 /* Try all fill sizes until finding one that works. */
8774 for (fill
= 0; fill
< fill_limit
; fill
+= fill_step
)
8776 if (skip_one
&& fill
== 1)
8778 if ((address
+ fill
) >> align_pow
8779 == (address
+ fill
+ target_size
- 1) >> align_pow
)
8788 branch_align_power (segT sec
)
8790 /* If the Xtensa processor has a fetch width of X, and
8791 the section is aligned to at least that boundary, then a branch
8792 target need only fit within that aligned block of memory to avoid
8793 a stall. Otherwise, try to fit branch targets within 4-byte
8794 aligned blocks (which may be insufficient, e.g., if the section
8795 has no alignment, but it's good enough). */
8796 int fetch_align
= get_text_align_power(xtensa_fetch_width
);
8797 int sec_align
= get_recorded_alignment (sec
);
8799 if (sec_align
>= fetch_align
)
8806 /* This will assert if it is not possible. */
8809 get_text_align_nop_count (offsetT fill_size
, bfd_boolean use_no_density
)
8815 gas_assert (fill_size
% 3 == 0);
8816 return (fill_size
/ 3);
8819 gas_assert (fill_size
!= 1); /* Bad argument. */
8821 while (fill_size
> 1)
8824 if (fill_size
== 2 || fill_size
== 4)
8826 fill_size
-= insn_size
;
8829 gas_assert (fill_size
!= 1); /* Bad algorithm. */
8835 get_text_align_nth_nop_size (offsetT fill_size
,
8837 bfd_boolean use_no_density
)
8844 gas_assert (fill_size
!= 1); /* Bad argument. */
8846 while (fill_size
> 1)
8849 if (fill_size
== 2 || fill_size
== 4)
8851 fill_size
-= insn_size
;
8861 /* For the given fragment, find the appropriate address
8862 for it to begin at if we are using NOPs to align it. */
8865 get_noop_aligned_address (fragS
*fragP
, addressT address
)
8867 /* The rule is: get next fragment's FIRST instruction. Find
8868 the smallest number of bytes that need to be added to
8869 ensure that the next fragment's FIRST instruction will fit
8872 E.G., 2 bytes : 0, 1, 2 mod 4
8875 If the FIRST instruction MIGHT be relaxed,
8876 assume that it will become a 3-byte instruction.
8878 Note again here that LOOP instructions are not bundleable,
8879 and this relaxation only applies to LOOP opcodes. */
8882 int first_insn_size
;
8884 addressT pre_opcode_bytes
;
8887 xtensa_opcode opcode
;
8888 bfd_boolean is_loop
;
8890 gas_assert (fragP
->fr_type
== rs_machine_dependent
);
8891 gas_assert (fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
);
8893 /* Find the loop frag. */
8894 first_insn
= next_non_empty_frag (fragP
);
8895 /* Now find the first insn frag. */
8896 first_insn
= next_non_empty_frag (first_insn
);
8898 is_loop
= next_frag_opcode_is_loop (fragP
, &opcode
);
8899 gas_assert (is_loop
);
8900 loop_insn_size
= xg_get_single_size (opcode
);
8902 pre_opcode_bytes
= next_frag_pre_opcode_bytes (fragP
);
8903 pre_opcode_bytes
+= loop_insn_size
;
8905 /* For loops, the alignment depends on the size of the
8906 instruction following the loop, not the LOOP instruction. */
8908 if (first_insn
== NULL
)
8909 first_insn_size
= xtensa_fetch_width
;
8911 first_insn_size
= get_loop_align_size (frag_format_size (first_insn
));
8913 /* If it was 8, then we'll need a larger alignment for the section. */
8914 align_power
= get_text_align_power (first_insn_size
);
8915 record_alignment (now_seg
, align_power
);
8917 fill_size
= get_text_align_fill_size
8918 (address
+ pre_opcode_bytes
, align_power
, first_insn_size
, TRUE
,
8919 fragP
->tc_frag_data
.is_no_density
);
8921 return address
+ fill_size
;
8925 /* 3 mechanisms for relaxing an alignment:
8927 Align to a power of 2.
8928 Align so the next fragment's instruction does not cross a word boundary.
8929 Align the current instruction so that if the next instruction
8930 were 3 bytes, it would not cross a word boundary.
8934 zeros - This is easy; always insert zeros.
8935 nops - 3-byte and 2-byte instructions
8939 >=5 : 3-byte instruction + fn (n-3)
8940 widening - widen previous instructions. */
8943 get_aligned_diff (fragS
*fragP
, addressT address
, offsetT
*max_diff
)
8945 addressT target_address
, loop_insn_offset
;
8947 xtensa_opcode loop_opcode
;
8948 bfd_boolean is_loop
;
8951 offsetT branch_align
;
8954 gas_assert (fragP
->fr_type
== rs_machine_dependent
);
8955 switch (fragP
->fr_subtype
)
8957 case RELAX_DESIRE_ALIGN
:
8958 target_size
= next_frag_format_size (fragP
);
8959 if (target_size
== XTENSA_UNDEFINED
)
8961 align_power
= branch_align_power (now_seg
);
8962 branch_align
= 1 << align_power
;
8963 /* Don't count on the section alignment being as large as the target. */
8964 if (target_size
> branch_align
)
8965 target_size
= branch_align
;
8966 opt_diff
= get_text_align_fill_size (address
, align_power
,
8967 target_size
, FALSE
, FALSE
);
8969 *max_diff
= (opt_diff
+ branch_align
8970 - (target_size
+ ((address
+ opt_diff
) % branch_align
)));
8971 gas_assert (*max_diff
>= opt_diff
);
8974 case RELAX_ALIGN_NEXT_OPCODE
:
8975 /* The next non-empty frag after this one holds the LOOP instruction
8976 that needs to be aligned. The required alignment depends on the
8977 size of the next non-empty frag after the loop frag, i.e., the
8978 first instruction in the loop. */
8979 loop_frag
= next_non_empty_frag (fragP
);
8980 target_size
= get_loop_align_size (next_frag_format_size (loop_frag
));
8981 loop_insn_offset
= 0;
8982 is_loop
= next_frag_opcode_is_loop (fragP
, &loop_opcode
);
8983 gas_assert (is_loop
);
8985 /* If the loop has been expanded then the LOOP instruction
8986 could be at an offset from this fragment. */
8987 if (loop_frag
->tc_frag_data
.slot_subtypes
[0] != RELAX_IMMED
)
8988 loop_insn_offset
= get_expanded_loop_offset (loop_opcode
);
8990 /* In an ideal world, which is what we are shooting for here,
8991 we wouldn't need to use any NOPs immediately prior to the
8992 LOOP instruction. If this approach fails, relax_frag_loop_align
8993 will call get_noop_aligned_address. */
8995 address
+ loop_insn_offset
+ xg_get_single_size (loop_opcode
);
8996 align_power
= get_text_align_power (target_size
);
8997 opt_diff
= get_text_align_fill_size (target_address
, align_power
,
8998 target_size
, FALSE
, FALSE
);
9000 *max_diff
= xtensa_fetch_width
9001 - ((target_address
+ opt_diff
) % xtensa_fetch_width
)
9002 - target_size
+ opt_diff
;
9003 gas_assert (*max_diff
>= opt_diff
);
9014 /* md_relax_frag Hook and Helper Functions. */
9016 static long relax_frag_loop_align (fragS
*, long);
9017 static long relax_frag_for_align (fragS
*, long);
9018 static long relax_frag_immed
9019 (segT
, fragS
*, long, int, xtensa_format
, int, int *, bfd_boolean
);
9021 typedef struct cached_fixup cached_fixupS
;
9030 typedef struct fixup_cache fixup_cacheS
;
9033 cached_fixupS
*fixups
;
9041 static int fixup_order (const void *a
, const void *b
)
9043 const cached_fixupS
*pa
= a
;
9044 const cached_fixupS
*pb
= b
;
9046 if (pa
->addr
== pb
->addr
)
9048 if (pa
->target
== pb
->target
)
9050 if (pa
->fixP
->fx_r_type
== pb
->fixP
->fx_r_type
)
9052 return pa
->fixP
->fx_r_type
< pb
->fixP
->fx_r_type
? -1 : 1;
9054 return pa
->target
- pb
->target
;
9056 return pa
->addr
- pb
->addr
;
9059 static bfd_boolean
xtensa_make_cached_fixup (cached_fixupS
*o
, fixS
*fixP
)
9061 xtensa_isa isa
= xtensa_default_isa
;
9062 int addr
= fixP
->fx_frag
->fr_address
;
9065 symbolS
*s
= fixP
->fx_addsy
;
9068 xtensa_opcode opcode
;
9070 if (fixP
->fx_r_type
< BFD_RELOC_XTENSA_SLOT0_OP
||
9071 fixP
->fx_r_type
> BFD_RELOC_XTENSA_SLOT14_OP
)
9073 target
= S_GET_VALUE (s
);
9074 delta
= target
- addr
;
9076 if (abs(delta
) < J_RANGE
/ 2)
9079 xtensa_insnbuf_from_chars (isa
, trampoline_buf
,
9080 (unsigned char *) fixP
->fx_frag
->fr_literal
+
9082 fmt
= xtensa_format_decode (isa
, trampoline_buf
);
9083 gas_assert (fmt
!= XTENSA_UNDEFINED
);
9084 slot
= fixP
->tc_fix_data
.slot
;
9085 xtensa_format_get_slot (isa
, fmt
, slot
, trampoline_buf
, trampoline_slotbuf
);
9086 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, trampoline_slotbuf
);
9087 if (opcode
!= xtensa_j_opcode
)
9098 static void xtensa_realloc_fixup_cache (fixup_cacheS
*cache
, unsigned add
)
9100 if (cache
->n_fixups
+ add
> cache
->n_max
)
9102 cache
->n_max
= (cache
->n_fixups
+ add
) * 2;
9103 cache
->fixups
= xrealloc (cache
->fixups
,
9104 sizeof (*cache
->fixups
) * cache
->n_max
);
9108 static void xtensa_cache_relaxable_fixups (fixup_cacheS
*cache
,
9109 segment_info_type
*seginfo
)
9113 cache
->n_fixups
= 0;
9115 for (fixP
= seginfo
->fix_root
; fixP
; fixP
= fixP
->fx_next
)
9117 xtensa_realloc_fixup_cache (cache
, 1);
9119 if (xtensa_make_cached_fixup (cache
->fixups
+ cache
->n_fixups
, fixP
))
9122 qsort (cache
->fixups
, cache
->n_fixups
, sizeof (*cache
->fixups
), fixup_order
);
9125 static unsigned xtensa_find_first_cached_fixup (const fixup_cacheS
*cache
,
9129 unsigned b
= cache
->n_fixups
;
9133 unsigned c
= (a
+ b
) / 2;
9135 if (cache
->fixups
[c
].addr
< addr
)
9143 static void xtensa_delete_cached_fixup (fixup_cacheS
*cache
, unsigned i
)
9145 memmove (cache
->fixups
+ i
, cache
->fixups
+ i
+ 1,
9146 (cache
->n_fixups
- i
- 1) * sizeof (*cache
->fixups
));
9150 static bfd_boolean
xtensa_add_cached_fixup (fixup_cacheS
*cache
, fixS
*fixP
)
9155 if (!xtensa_make_cached_fixup (&o
, fixP
))
9157 xtensa_realloc_fixup_cache (cache
, 1);
9158 i
= xtensa_find_first_cached_fixup (cache
, o
.addr
);
9159 if (i
< cache
->n_fixups
)
9162 memmove (cache
->fixups
+ i
+ 1, cache
->fixups
+ i
,
9163 (cache
->n_fixups
- i
) * sizeof (*cache
->fixups
));
9165 cache
->fixups
[i
] = o
;
9170 /* Return the number of bytes added to this fragment, given that the
9171 input has been stretched already by "stretch". */
9174 xtensa_relax_frag (fragS
*fragP
, long stretch
, int *stretched_p
)
9176 xtensa_isa isa
= xtensa_default_isa
;
9177 int unreported
= fragP
->tc_frag_data
.unreported_expansion
;
9178 long new_stretch
= 0;
9179 const char *file_name
;
9182 static xtensa_insnbuf vbuf
= NULL
;
9183 int slot
, num_slots
;
9186 file_name
= as_where (&line
);
9187 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
9189 fragP
->tc_frag_data
.unreported_expansion
= 0;
9191 switch (fragP
->fr_subtype
)
9193 case RELAX_ALIGN_NEXT_OPCODE
:
9194 /* Always convert. */
9195 if (fragP
->tc_frag_data
.relax_seen
)
9196 new_stretch
= relax_frag_loop_align (fragP
, stretch
);
9199 case RELAX_LOOP_END
:
9203 case RELAX_LOOP_END_ADD_NOP
:
9204 /* Add a NOP and switch to .fill 0. */
9205 new_stretch
= relax_frag_add_nop (fragP
);
9209 case RELAX_DESIRE_ALIGN
:
9210 /* Do nothing. The narrowing before this frag will either align
9215 case RELAX_LITERAL_FINAL
:
9218 case RELAX_LITERAL_NR
:
9220 fragP
->fr_subtype
= RELAX_LITERAL_FINAL
;
9221 gas_assert (unreported
== lit_size
);
9222 memset (&fragP
->fr_literal
[fragP
->fr_fix
], 0, 4);
9223 fragP
->fr_var
-= lit_size
;
9224 fragP
->fr_fix
+= lit_size
;
9230 vbuf
= xtensa_insnbuf_alloc (isa
);
9232 xtensa_insnbuf_from_chars
9233 (isa
, vbuf
, (unsigned char *) fragP
->fr_opcode
, 0);
9234 fmt
= xtensa_format_decode (isa
, vbuf
);
9235 num_slots
= xtensa_format_num_slots (isa
, fmt
);
9237 for (slot
= 0; slot
< num_slots
; slot
++)
9239 switch (fragP
->tc_frag_data
.slot_subtypes
[slot
])
9242 if (fragP
->tc_frag_data
.relax_seen
)
9243 new_stretch
+= relax_frag_for_align (fragP
, stretch
);
9247 case RELAX_IMMED_STEP1
:
9248 case RELAX_IMMED_STEP2
:
9249 case RELAX_IMMED_STEP3
:
9250 /* Place the immediate. */
9251 new_stretch
+= relax_frag_immed
9252 (now_seg
, fragP
, stretch
,
9253 fragP
->tc_frag_data
.slot_subtypes
[slot
] - RELAX_IMMED
,
9254 fmt
, slot
, stretched_p
, FALSE
);
9258 /* This is OK; see the note in xg_assemble_vliw_tokens. */
9264 case RELAX_LITERAL_POOL_BEGIN
:
9265 if (fragP
->fr_var
!= 0)
9267 /* We have a converted "candidate" literal pool;
9268 assemble a jump around it. */
9270 if (!litpool_slotbuf
)
9272 litpool_buf
= xtensa_insnbuf_alloc (isa
);
9273 litpool_slotbuf
= xtensa_insnbuf_alloc (isa
);
9276 fragP
->tc_frag_data
.relax_seen
= FALSE
; /* Need another pass. */
9277 fragP
->tc_frag_data
.is_insn
= TRUE
;
9279 insn
.insn_type
= ITYPE_INSN
;
9280 insn
.opcode
= xtensa_j_opcode
;
9282 set_expr_symbol_offset (&insn
.tok
[0], fragP
->fr_symbol
,
9284 fmt
= xg_get_single_format (xtensa_j_opcode
);
9285 tinsn_to_slotbuf (fmt
, 0, &insn
, litpool_slotbuf
);
9286 xtensa_format_set_slot (isa
, fmt
, 0, litpool_buf
, litpool_slotbuf
);
9287 xtensa_insnbuf_to_chars (isa
, litpool_buf
,
9288 (unsigned char *)fragP
->fr_literal
+
9293 fix_new (fragP
, 0, 3, fragP
->fr_symbol
, 0, TRUE
,
9294 BFD_RELOC_XTENSA_SLOT0_OP
);
9298 case RELAX_LITERAL_POOL_END
:
9299 case RELAX_LITERAL_POOL_CANDIDATE_BEGIN
:
9300 case RELAX_MAYBE_UNREACHABLE
:
9301 case RELAX_MAYBE_DESIRE_ALIGN
:
9302 /* No relaxation required. */
9305 case RELAX_FILL_NOP
:
9306 case RELAX_UNREACHABLE
:
9307 if (fragP
->tc_frag_data
.relax_seen
)
9308 new_stretch
+= relax_frag_for_align (fragP
, stretch
);
9311 case RELAX_TRAMPOLINE
:
9312 if (fragP
->tc_frag_data
.relax_seen
)
9314 static fixup_cacheS fixup_cache
;
9315 segment_info_type
*seginfo
= seg_info (now_seg
);
9316 int trampaddr
= fragP
->fr_address
+ fragP
->fr_fix
;
9317 int searchaddr
= trampaddr
< J_RANGE
? 0 : trampaddr
- J_RANGE
;
9320 if (now_seg
!= fixup_cache
.seg
||
9321 fragP
== fixup_cache
.first_frag
||
9322 fixup_cache
.first_frag
== NULL
)
9324 xtensa_cache_relaxable_fixups (&fixup_cache
, seginfo
);
9325 fixup_cache
.seg
= now_seg
;
9326 fixup_cache
.first_frag
= fragP
;
9329 /* Scan for jumps that will not reach. */
9330 for (i
= xtensa_find_first_cached_fixup (&fixup_cache
, searchaddr
);
9331 i
< fixup_cache
.n_fixups
; ++i
)
9334 fixS
*fixP
= fixup_cache
.fixups
[i
].fixP
;
9335 int target
= fixup_cache
.fixups
[i
].target
;
9336 int addr
= fixup_cache
.fixups
[i
].addr
;
9337 int delta
= fixup_cache
.fixups
[i
].delta
+ stretch
;
9339 trampaddr
= fragP
->fr_address
+ fragP
->fr_fix
;
9341 if (addr
+ J_RANGE
< trampaddr
)
9343 if (addr
> trampaddr
+ J_RANGE
)
9345 if (abs (delta
) < J_RANGE
)
9348 slot
= fixP
->tc_fix_data
.slot
;
9350 if (delta
> J_RANGE
|| delta
< -1 * J_RANGE
)
9351 { /* Found an out-of-range jump; scan the list of trampolines for the best match. */
9352 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
9353 struct trampoline_frag
*tf
= ts
->trampoline_list
.next
;
9354 struct trampoline_frag
*prev
= &ts
->trampoline_list
;
9355 int lower
= (target
< addr
) ? target
: addr
;
9356 int upper
= (target
> addr
) ? target
: addr
;
9357 int midpoint
= lower
+ (upper
- lower
) / 2;
9359 if ((upper
- lower
) > 2 * J_RANGE
)
9361 /* One trampoline won't suffice; we need multiple jumps.
9362 Jump to the trampoline that's farthest, but still in
9363 range relative to the original "j" instruction. */
9364 for ( ; tf
; prev
= tf
, tf
= tf
->next
)
9366 int this_addr
= tf
->fragP
->fr_address
+ tf
->fragP
->fr_fix
;
9367 int next_addr
= (tf
->next
) ? tf
->next
->fragP
->fr_address
+ tf
->next
->fragP
->fr_fix
: 0 ;
9372 if (this_addr
- addr
< J_RANGE
)
9377 /* Backward jump. */
9378 if (next_addr
== 0 || addr
- next_addr
> J_RANGE
)
9385 struct trampoline_frag
*best_tf
= NULL
;
9388 for ( ; tf
; prev
= tf
, tf
= tf
->next
)
9390 int this_addr
= tf
->fragP
->fr_address
+ tf
->fragP
->fr_fix
;
9391 int this_delta
= abs (this_addr
- midpoint
);
9393 if (!best_tf
|| this_delta
< best_delta
)
9396 best_delta
= this_delta
;
9401 if (tf
->fragP
== fragP
)
9403 if (abs (addr
- trampaddr
) < J_RANGE
)
9404 { /* The trampoline is in range of original; fix it! */
9409 fragS
*fP
; /* The out-of-range jump. */
9411 new_stretch
+= init_trampoline_frag (tf
);
9412 offset
= fragP
->fr_fix
; /* Where to assemble the j insn. */
9413 lsym
= fragP
->fr_symbol
;
9415 /* Assemble a jump to the target label here. */
9417 insn
.insn_type
= ITYPE_INSN
;
9418 insn
.opcode
= xtensa_j_opcode
;
9420 set_expr_symbol_offset (&insn
.tok
[0], lsym
, offset
);
9421 fmt
= xg_get_single_format (xtensa_j_opcode
);
9422 tinsn_to_slotbuf (fmt
, 0, &insn
, trampoline_slotbuf
);
9423 xtensa_format_set_slot (isa
, fmt
, 0, trampoline_buf
, trampoline_slotbuf
);
9424 xtensa_insnbuf_to_chars (isa
, trampoline_buf
, (unsigned char *)fragP
->fr_literal
+ offset
, 3);
9427 /* Add a fix-up for the original j insn. */
9428 newfixP
= fix_new (fP
, fixP
->fx_where
, fixP
->fx_size
, lsym
, fragP
->fr_fix
- 3, TRUE
, fixP
->fx_r_type
);
9429 newfixP
->fx_no_overflow
= 1;
9430 newfixP
->tc_fix_data
.X_add_symbol
= lsym
;
9431 newfixP
->tc_fix_data
.X_add_number
= offset
;
9432 newfixP
->tc_fix_data
.slot
= slot
;
9434 xtensa_delete_cached_fixup (&fixup_cache
, i
);
9435 xtensa_add_cached_fixup (&fixup_cache
, newfixP
);
9437 /* Move the fix-up from the original j insn to this one. */
9438 fixP
->fx_frag
= fragP
;
9439 fixP
->fx_where
= fragP
->fr_fix
- 3;
9440 fixP
->tc_fix_data
.slot
= 0;
9442 xtensa_add_cached_fixup (&fixup_cache
, fixP
);
9444 /* re-do current fixup */
9447 /* Adjust the jump around this trampoline (if present). */
9448 if (tf
->fixP
!= NULL
)
9450 tf
->fixP
->fx_offset
+= 3;
9453 fragP
->tc_frag_data
.relax_seen
= FALSE
; /* Need another pass. */
9454 /* Do we have room for more? */
9455 if (fragP
->fr_var
< 3)
9456 { /* No, convert to fill. */
9458 fragP
->fr_subtype
= 0;
9459 /* Remove from the trampoline_list. */
9460 prev
->next
= tf
->next
;
9461 if (fragP
== fixup_cache
.first_frag
)
9462 fixup_cache
.first_frag
= NULL
;
9473 as_bad (_("bad relaxation state"));
9476 /* Tell gas we need another relaxation pass. */
9477 if (! fragP
->tc_frag_data
.relax_seen
)
9479 fragP
->tc_frag_data
.relax_seen
= TRUE
;
9483 new_logical_line (file_name
, line
);
9489 relax_frag_loop_align (fragS
*fragP
, long stretch
)
9491 addressT old_address
, old_next_address
, old_size
;
9492 addressT new_address
, new_next_address
, new_size
;
9495 /* All the frags with relax_frag_for_alignment prior to this one in the
9496 section have been done, hopefully eliminating the need for a NOP here.
9497 But, this will put it in if necessary. */
9499 /* Calculate the old address of this fragment and the next fragment. */
9500 old_address
= fragP
->fr_address
- stretch
;
9501 old_next_address
= (fragP
->fr_address
- stretch
+ fragP
->fr_fix
+
9502 fragP
->tc_frag_data
.text_expansion
[0]);
9503 old_size
= old_next_address
- old_address
;
9505 /* Calculate the new address of this fragment and the next fragment. */
9506 new_address
= fragP
->fr_address
;
9508 get_noop_aligned_address (fragP
, fragP
->fr_address
+ fragP
->fr_fix
);
9509 new_size
= new_next_address
- new_address
;
9511 growth
= new_size
- old_size
;
9513 /* Fix up the text_expansion field and return the new growth. */
9514 fragP
->tc_frag_data
.text_expansion
[0] += growth
;
9519 /* Add a NOP instruction. */
9522 relax_frag_add_nop (fragS
*fragP
)
9524 char *nop_buf
= fragP
->fr_literal
+ fragP
->fr_fix
;
9525 int length
= fragP
->tc_frag_data
.is_no_density
? 3 : 2;
9526 assemble_nop (length
, nop_buf
);
9527 fragP
->tc_frag_data
.is_insn
= TRUE
;
9529 if (fragP
->fr_var
< length
)
9531 as_fatal (_("fr_var (%ld) < length (%d)"), (long) fragP
->fr_var
, length
);
9535 fragP
->fr_fix
+= length
;
9536 fragP
->fr_var
-= length
;
9541 static long future_alignment_required (fragS
*, long);
9544 relax_frag_for_align (fragS
*fragP
, long stretch
)
9546 /* Overview of the relaxation procedure for alignment:
9547 We can widen with NOPs or by widening instructions or by filling
9548 bytes after jump instructions. Find the opportune places and widen
9549 them if necessary. */
9554 gas_assert (fragP
->fr_subtype
== RELAX_FILL_NOP
9555 || fragP
->fr_subtype
== RELAX_UNREACHABLE
9556 || (fragP
->fr_subtype
== RELAX_SLOTS
9557 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
));
9559 stretch_me
= future_alignment_required (fragP
, stretch
);
9560 diff
= stretch_me
- fragP
->tc_frag_data
.text_expansion
[0];
9566 /* We expanded on a previous pass. Can we shrink now? */
9567 long shrink
= fragP
->tc_frag_data
.text_expansion
[0] - stretch_me
;
9568 if (shrink
<= stretch
&& stretch
> 0)
9570 fragP
->tc_frag_data
.text_expansion
[0] = stretch_me
;
9576 /* Below here, diff > 0. */
9577 fragP
->tc_frag_data
.text_expansion
[0] = stretch_me
;
9583 /* Return the address of the next frag that should be aligned.
9585 By "address" we mean the address it _would_ be at if there
9586 is no action taken to align it between here and the target frag.
9587 In other words, if no narrows and no fill nops are used between
9588 here and the frag to align, _even_if_ some of the frags we use
9589 to align targets have already expanded on a previous relaxation
9592 Also, count each frag that may be used to help align the target.
9594 Return 0 if there are no frags left in the chain that need to be
9598 find_address_of_next_align_frag (fragS
**fragPP
,
9602 bfd_boolean
*paddable
)
9604 fragS
*fragP
= *fragPP
;
9605 addressT address
= fragP
->fr_address
;
9607 /* Do not reset the counts to 0. */
9611 /* Limit this to a small search. */
9612 if (*widens
>= (int) xtensa_fetch_width
)
9617 address
+= fragP
->fr_fix
;
9619 if (fragP
->fr_type
== rs_fill
)
9620 address
+= fragP
->fr_offset
* fragP
->fr_var
;
9621 else if (fragP
->fr_type
== rs_machine_dependent
)
9623 switch (fragP
->fr_subtype
)
9625 case RELAX_UNREACHABLE
:
9629 case RELAX_FILL_NOP
:
9631 if (!fragP
->tc_frag_data
.is_no_density
)
9636 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
9641 address
+= total_frag_text_expansion (fragP
);
9645 address
+= fragP
->tc_frag_data
.text_expansion
[0];
9648 case RELAX_ALIGN_NEXT_OPCODE
:
9649 case RELAX_DESIRE_ALIGN
:
9653 case RELAX_MAYBE_UNREACHABLE
:
9654 case RELAX_MAYBE_DESIRE_ALIGN
:
9659 /* Just punt if we don't know the type. */
9666 /* Just punt if we don't know the type. */
9670 fragP
= fragP
->fr_next
;
9678 static long bytes_to_stretch (fragS
*, int, int, int, int);
9681 future_alignment_required (fragS
*fragP
, long stretch ATTRIBUTE_UNUSED
)
9683 fragS
*this_frag
= fragP
;
9687 int narrow_nops
= 0;
9688 bfd_boolean paddable
= FALSE
;
9689 offsetT local_opt_diff
;
9692 int stretch_amount
= 0;
9693 int local_stretch_amount
;
9694 int global_stretch_amount
;
9696 address
= find_address_of_next_align_frag
9697 (&fragP
, &wide_nops
, &narrow_nops
, &num_widens
, &paddable
);
9701 if (this_frag
->tc_frag_data
.is_aligning_branch
)
9702 this_frag
->tc_frag_data
.slot_subtypes
[0] = RELAX_IMMED
;
9704 frag_wane (this_frag
);
9708 local_opt_diff
= get_aligned_diff (fragP
, address
, &max_diff
);
9709 opt_diff
= local_opt_diff
;
9710 gas_assert (opt_diff
>= 0);
9711 gas_assert (max_diff
>= opt_diff
);
9716 fragP
= fragP
->fr_next
;
9718 while (fragP
&& opt_diff
< max_diff
&& address
)
9720 /* We only use these to determine if we can exit early
9721 because there will be plenty of ways to align future
9723 int glob_widens
= 0;
9726 bfd_boolean glob_pad
= 0;
9727 address
= find_address_of_next_align_frag
9728 (&fragP
, &glob_widens
, &dnn
, &dw
, &glob_pad
);
9729 /* If there is a padable portion, then skip. */
9730 if (glob_pad
|| glob_widens
>= (1 << branch_align_power (now_seg
)))
9735 offsetT next_m_diff
;
9736 offsetT next_o_diff
;
9738 /* Downrange frags haven't had stretch added to them yet. */
9741 /* The address also includes any text expansion from this
9742 frag in a previous pass, but we don't want that. */
9743 address
-= this_frag
->tc_frag_data
.text_expansion
[0];
9745 /* Assume we are going to move at least opt_diff. In
9746 reality, we might not be able to, but assuming that
9747 we will helps catch cases where moving opt_diff pushes
9748 the next target from aligned to unaligned. */
9749 address
+= opt_diff
;
9751 next_o_diff
= get_aligned_diff (fragP
, address
, &next_m_diff
);
9753 /* Now cleanup for the adjustments to address. */
9754 next_o_diff
+= opt_diff
;
9755 next_m_diff
+= opt_diff
;
9756 if (next_o_diff
<= max_diff
&& next_o_diff
> opt_diff
)
9757 opt_diff
= next_o_diff
;
9758 if (next_m_diff
< max_diff
)
9759 max_diff
= next_m_diff
;
9760 fragP
= fragP
->fr_next
;
9764 /* If there are enough wideners in between, do it. */
9767 if (this_frag
->fr_subtype
== RELAX_UNREACHABLE
)
9769 gas_assert (opt_diff
<= (signed) xtensa_fetch_width
);
9774 local_stretch_amount
9775 = bytes_to_stretch (this_frag
, wide_nops
, narrow_nops
,
9776 num_widens
, local_opt_diff
);
9777 global_stretch_amount
9778 = bytes_to_stretch (this_frag
, wide_nops
, narrow_nops
,
9779 num_widens
, opt_diff
);
9780 /* If the condition below is true, then the frag couldn't
9781 stretch the correct amount for the global case, so we just
9782 optimize locally. We'll rely on the subsequent frags to get
9783 the correct alignment in the global case. */
9784 if (global_stretch_amount
< local_stretch_amount
)
9785 stretch_amount
= local_stretch_amount
;
9787 stretch_amount
= global_stretch_amount
;
9789 if (this_frag
->fr_subtype
== RELAX_SLOTS
9790 && this_frag
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
9791 gas_assert (stretch_amount
<= 1);
9792 else if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9794 if (this_frag
->tc_frag_data
.is_no_density
)
9795 gas_assert (stretch_amount
== 3 || stretch_amount
== 0);
9797 gas_assert (stretch_amount
<= 3);
9800 return stretch_amount
;
9804 /* The idea: widen everything you can to get a target or loop aligned,
9805 then start using NOPs.
9807 wide_nops = the number of wide NOPs available for aligning
9808 narrow_nops = the number of narrow NOPs available for aligning
9809 (a subset of wide_nops)
9810 widens = the number of narrow instructions that should be widened
9815 bytes_to_stretch (fragS
*this_frag
,
9824 int bytes_short
= desired_diff
- num_widens
;
9826 gas_assert (desired_diff
>= 0
9827 && desired_diff
< (signed) xtensa_fetch_width
);
9828 if (desired_diff
== 0)
9831 gas_assert (wide_nops
> 0 || num_widens
> 0);
9833 /* Always prefer widening to NOP-filling. */
9834 if (bytes_short
< 0)
9836 /* There are enough RELAX_NARROW frags after this one
9837 to align the target without widening this frag in any way. */
9841 if (bytes_short
== 0)
9843 /* Widen every narrow between here and the align target
9844 and the align target will be properly aligned. */
9845 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9851 /* From here we will need at least one NOP to get an alignment.
9852 However, we may not be able to align at all, in which case,
9854 nops_needed
= desired_diff
/ 3;
9856 /* If there aren't enough nops, don't widen. */
9857 if (nops_needed
> wide_nops
)
9860 /* First try it with all wide nops. */
9861 nop_bytes
= nops_needed
* 3;
9862 extra_bytes
= desired_diff
- nop_bytes
;
9864 if (nop_bytes
+ num_widens
>= desired_diff
)
9866 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9868 else if (num_widens
== extra_bytes
)
9873 /* Add a narrow nop. */
9877 if (narrow_nops
== 0 || nops_needed
> wide_nops
)
9880 if (nop_bytes
+ num_widens
>= desired_diff
&& extra_bytes
>= 0)
9882 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9883 return !this_frag
->tc_frag_data
.is_no_density
? 2 : 3;
9884 else if (num_widens
== extra_bytes
)
9889 /* Replace a wide nop with a narrow nop--we can get here if
9890 extra_bytes was negative in the previous conditional. */
9891 if (narrow_nops
== 1)
9895 if (nop_bytes
+ num_widens
>= desired_diff
)
9897 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9898 return !this_frag
->tc_frag_data
.is_no_density
? 2 : 3;
9899 else if (num_widens
== extra_bytes
)
9904 /* If we can't satisfy any of the above cases, then we can't align
9905 using padding or fill nops. */
9910 static struct trampoline_frag
*
9911 search_trampolines (TInsn
*tinsn
, fragS
*fragP
, bfd_boolean unreachable_only
)
9913 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
9914 struct trampoline_frag
*tf
= (ts
) ? ts
->trampoline_list
.next
: NULL
;
9915 struct trampoline_frag
*best_tf
= NULL
;
9918 symbolS
*sym
= tinsn
->tok
[0].X_add_symbol
;
9919 offsetT target
= S_GET_VALUE (sym
) + tinsn
->tok
[0].X_add_number
;
9920 offsetT addr
= fragP
->fr_address
;
9921 offsetT lower
= (addr
< target
) ? addr
: target
;
9922 offsetT upper
= (addr
> target
) ? addr
: target
;
9923 int delta
= upper
- lower
;
9924 offsetT midpoint
= lower
+ delta
/ 2;
9925 int this_delta
= -1;
9928 if (delta
> 2 * J_RANGE
)
9930 /* One trampoline won't do; we need multiple.
9931 Choose the farthest trampoline that's still in range of the original
9932 and let a later pass finish the job. */
9933 for ( ; tf
; tf
= tf
->next
)
9935 int next_addr
= (tf
->next
) ? tf
->next
->fragP
->fr_address
+ tf
->next
->fragP
->fr_fix
: 0;
9937 this_addr
= tf
->fragP
->fr_address
+ tf
->fragP
->fr_fix
;
9941 if (this_addr
- addr
< J_RANGE
)
9946 /* Backward jump. */
9947 if (next_addr
== 0 || addr
- next_addr
> J_RANGE
)
9951 if (abs (addr
- this_addr
) < J_RANGE
)
9956 for ( ; tf
; tf
= tf
->next
)
9958 this_addr
= tf
->fragP
->fr_address
+ tf
->fragP
->fr_fix
;
9959 this_delta
= abs (this_addr
- midpoint
);
9960 if (unreachable_only
&& tf
->needs_jump_around
)
9962 if (!best_tf
|| this_delta
< best_delta
)
9965 best_delta
= this_delta
;
9966 best_addr
= this_addr
;
9971 best_delta
< J_RANGE
&&
9972 abs(best_addr
- lower
) < J_RANGE
&&
9973 abs(best_addr
- upper
) < J_RANGE
)
9976 return NULL
; /* No suitable trampoline found. */
9980 static struct trampoline_frag
*
9981 get_best_trampoline (TInsn
*tinsn
, fragS
*fragP
)
9983 struct trampoline_frag
*tf
= NULL
;
9985 tf
= search_trampolines (tinsn
, fragP
, TRUE
); /* Try unreachable first. */
9988 tf
= search_trampolines (tinsn
, fragP
, FALSE
); /* Try ones needing a jump-around, too. */
9995 check_and_update_trampolines (void)
9997 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
9998 struct trampoline_frag
*tf
= ts
->trampoline_list
.next
;
9999 struct trampoline_frag
*prev
= &ts
->trampoline_list
;
10001 for ( ; tf
; prev
= tf
, tf
= tf
->next
)
10003 if (tf
->fragP
->fr_var
< 3)
10005 frag_wane (tf
->fragP
);
10006 prev
->next
= tf
->next
;
10014 init_trampoline_frag (struct trampoline_frag
*trampP
)
10016 fragS
*fp
= trampP
->fragP
;
10019 if (fp
->fr_fix
== 0)
10022 char label
[10 + 2 * sizeof(fp
)];
10023 sprintf (label
, ".L0_TR_%p", fp
);
10025 lsym
= (symbolS
*)local_symbol_make (label
, now_seg
, 0, fp
);
10026 fp
->fr_symbol
= lsym
;
10027 if (trampP
->needs_jump_around
)
10029 /* Add a jump around this block of jumps, in case
10030 control flows into this block. */
10034 xtensa_isa isa
= xtensa_default_isa
;
10036 fp
->tc_frag_data
.is_insn
= 1;
10037 /* Assemble a jump insn. */
10038 tinsn_init (&insn
);
10039 insn
.insn_type
= ITYPE_INSN
;
10040 insn
.opcode
= xtensa_j_opcode
;
10042 set_expr_symbol_offset (&insn
.tok
[0], lsym
, 3);
10043 fmt
= xg_get_single_format (xtensa_j_opcode
);
10044 tinsn_to_slotbuf (fmt
, 0, &insn
, trampoline_slotbuf
);
10045 xtensa_format_set_slot (isa
, fmt
, 0, trampoline_buf
, trampoline_slotbuf
);
10046 xtensa_insnbuf_to_chars (isa
, trampoline_buf
, (unsigned char *)fp
->fr_literal
, 3);
10050 fixP
= fix_new (fp
, 0, 3, lsym
, 3, TRUE
, BFD_RELOC_XTENSA_SLOT0_OP
);
10051 trampP
->fixP
= fixP
;
10059 add_jump_to_trampoline (struct trampoline_frag
*trampP
, fragS
*origfrag
)
10061 fragS
*tramp
= trampP
->fragP
;
10063 int offset
= tramp
->fr_fix
; /* Where to assemble the j insn. */
10069 xtensa_isa isa
= xtensa_default_isa
;
10072 lsym
= tramp
->fr_symbol
;
10073 /* Assemble a jump to the target label in the trampoline frag. */
10074 tsym
= origfrag
->tc_frag_data
.slot_symbols
[0];
10075 toffset
= origfrag
-> tc_frag_data
.slot_offsets
[0];
10076 tinsn_init (&insn
);
10077 insn
.insn_type
= ITYPE_INSN
;
10078 insn
.opcode
= xtensa_j_opcode
;
10080 set_expr_symbol_offset (&insn
.tok
[0], tsym
, toffset
);
10081 fmt
= xg_get_single_format (xtensa_j_opcode
);
10082 tinsn_to_slotbuf (fmt
, 0, &insn
, trampoline_slotbuf
);
10083 xtensa_format_set_slot (isa
, fmt
, 0, trampoline_buf
, trampoline_slotbuf
);
10084 xtensa_insnbuf_to_chars (isa
, trampoline_buf
, (unsigned char *)tramp
->fr_literal
+ offset
, 3);
10085 tramp
->fr_fix
+= 3;
10086 tramp
->fr_var
-= 3;
10088 /* add a fix-up for the trampoline jump. */
10089 fixP
= fix_new (tramp
, tramp
->fr_fix
- 3, 3, tsym
, toffset
, TRUE
, BFD_RELOC_XTENSA_SLOT0_OP
);
10090 /* Modify the jump at the start of this trampoline to point past the newly-added jump. */
10091 fixP
= trampP
->fixP
;
10093 fixP
->fx_offset
+= 3;
10094 /* Modify the original j to point here. */
10095 origfrag
->tc_frag_data
.slot_symbols
[0] = lsym
;
10096 origfrag
->tc_frag_data
.slot_offsets
[0] = tramp
->fr_fix
- 3;
10097 /* If trampoline is full, remove it from the list. */
10098 check_and_update_trampolines ();
10105 relax_frag_immed (segT segP
,
10112 bfd_boolean estimate_only
)
10116 bfd_boolean negatable_branch
= FALSE
;
10117 bfd_boolean branch_jmp_to_next
= FALSE
;
10118 bfd_boolean from_wide_insn
= FALSE
;
10119 xtensa_isa isa
= xtensa_default_isa
;
10121 offsetT frag_offset
;
10123 int num_text_bytes
, num_literal_bytes
;
10124 int literal_diff
, total_text_diff
, this_text_diff
;
10126 gas_assert (fragP
->fr_opcode
!= NULL
);
10128 xg_clear_vinsn (&cur_vinsn
);
10129 vinsn_from_chars (&cur_vinsn
, fragP
->fr_opcode
);
10130 if (cur_vinsn
.num_slots
> 1)
10131 from_wide_insn
= TRUE
;
10133 tinsn
= cur_vinsn
.slots
[slot
];
10134 tinsn_immed_from_frag (&tinsn
, fragP
, slot
);
10136 if (estimate_only
&& xtensa_opcode_is_loop (isa
, tinsn
.opcode
) == 1)
10139 if (workaround_b_j_loop_end
&& ! fragP
->tc_frag_data
.is_no_transform
)
10140 branch_jmp_to_next
= is_branch_jmp_to_next (&tinsn
, fragP
);
10142 negatable_branch
= (xtensa_opcode_is_branch (isa
, tinsn
.opcode
) == 1);
10144 old_size
= xtensa_format_length (isa
, fmt
);
10146 /* Special case: replace a branch to the next instruction with a NOP.
10147 This is required to work around a hardware bug in T1040.0 and also
10148 serves as an optimization. */
10150 if (branch_jmp_to_next
10151 && ((old_size
== 2) || (old_size
== 3))
10152 && !next_frag_is_loop_target (fragP
))
10155 /* Here is the fun stuff: Get the immediate field from this
10156 instruction. If it fits, we are done. If not, find the next
10157 instruction sequence that fits. */
10159 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
10160 istack_init (&istack
);
10161 num_steps
= xg_assembly_relax (&istack
, &tinsn
, segP
, fragP
, frag_offset
,
10162 min_steps
, stretch
);
10163 gas_assert (num_steps
>= min_steps
&& num_steps
<= RELAX_IMMED_MAXSTEPS
);
10165 fragP
->tc_frag_data
.slot_subtypes
[slot
] = (int) RELAX_IMMED
+ num_steps
;
10167 /* Figure out the number of bytes needed. */
10168 num_literal_bytes
= get_num_stack_literal_bytes (&istack
);
10170 = num_literal_bytes
- fragP
->tc_frag_data
.literal_expansion
[slot
];
10171 num_text_bytes
= get_num_stack_text_bytes (&istack
);
10173 if (from_wide_insn
)
10176 while (istack
.insn
[first
].opcode
== XTENSA_UNDEFINED
)
10179 num_text_bytes
+= old_size
;
10180 if (opcode_fits_format_slot (istack
.insn
[first
].opcode
, fmt
, slot
))
10181 num_text_bytes
-= xg_get_single_size (istack
.insn
[first
].opcode
);
10184 /* The first instruction in the relaxed sequence will go after
10185 the current wide instruction, and thus its symbolic immediates
10188 istack_init (&istack
);
10189 num_steps
= xg_assembly_relax (&istack
, &tinsn
, segP
, fragP
,
10190 frag_offset
+ old_size
,
10191 min_steps
, stretch
+ old_size
);
10192 gas_assert (num_steps
>= min_steps
&& num_steps
<= RELAX_IMMED_MAXSTEPS
);
10194 fragP
->tc_frag_data
.slot_subtypes
[slot
]
10195 = (int) RELAX_IMMED
+ num_steps
;
10197 num_literal_bytes
= get_num_stack_literal_bytes (&istack
);
10199 = num_literal_bytes
- fragP
->tc_frag_data
.literal_expansion
[slot
];
10201 num_text_bytes
= get_num_stack_text_bytes (&istack
) + old_size
;
10205 total_text_diff
= num_text_bytes
- old_size
;
10206 this_text_diff
= total_text_diff
- fragP
->tc_frag_data
.text_expansion
[slot
];
10208 /* It MUST get larger. If not, we could get an infinite loop. */
10209 gas_assert (num_text_bytes
>= 0);
10210 gas_assert (literal_diff
>= 0);
10211 gas_assert (total_text_diff
>= 0);
10213 fragP
->tc_frag_data
.text_expansion
[slot
] = total_text_diff
;
10214 fragP
->tc_frag_data
.literal_expansion
[slot
] = num_literal_bytes
;
10215 gas_assert (fragP
->tc_frag_data
.text_expansion
[slot
] >= 0);
10216 gas_assert (fragP
->tc_frag_data
.literal_expansion
[slot
] >= 0);
10218 /* Find the associated expandable literal for this. */
10219 if (literal_diff
!= 0)
10221 fragS
*lit_fragP
= fragP
->tc_frag_data
.literal_frags
[slot
];
10224 gas_assert (literal_diff
== 4);
10225 lit_fragP
->tc_frag_data
.unreported_expansion
+= literal_diff
;
10227 /* We expect that the literal section state has NOT been
10229 gas_assert (lit_fragP
->fr_type
== rs_machine_dependent
10230 && lit_fragP
->fr_subtype
== RELAX_LITERAL
);
10231 lit_fragP
->fr_subtype
= RELAX_LITERAL_NR
;
10233 /* We need to mark this section for another iteration
10239 if (negatable_branch
&& istack
.ninsn
> 1)
10240 update_next_frag_state (fragP
);
10242 /* If last insn is a jump, and it cannot reach its target, try to find a trampoline. */
10243 if (istack
.ninsn
> 2 &&
10244 istack
.insn
[istack
.ninsn
- 1].insn_type
== ITYPE_LABEL
&&
10245 istack
.insn
[istack
.ninsn
- 2].insn_type
== ITYPE_INSN
&&
10246 istack
.insn
[istack
.ninsn
- 2].opcode
== xtensa_j_opcode
)
10248 TInsn
*jinsn
= &istack
.insn
[istack
.ninsn
- 2];
10250 if (!xg_symbolic_immeds_fit (jinsn
, segP
, fragP
, fragP
->fr_offset
, total_text_diff
))
10252 struct trampoline_frag
*tf
= get_best_trampoline (jinsn
, fragP
);
10256 this_text_diff
+= init_trampoline_frag (tf
);
10257 this_text_diff
+= add_jump_to_trampoline (tf
, fragP
);
10261 /* If target symbol is undefined, assume it will reach once linked. */
10262 expressionS
*exp
= &istack
.insn
[istack
.ninsn
- 2].tok
[0];
10264 if (exp
->X_op
== O_symbol
&& S_IS_DEFINED (exp
->X_add_symbol
))
10266 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
10267 _("jump target out of range; no usable trampoline found"));
10273 return this_text_diff
;
10277 /* md_convert_frag Hook and Helper Functions. */
10279 static void convert_frag_align_next_opcode (fragS
*);
10280 static void convert_frag_narrow (segT
, fragS
*, xtensa_format
, int);
10281 static void convert_frag_fill_nop (fragS
*);
10282 static void convert_frag_immed (segT
, fragS
*, int, xtensa_format
, int);
10285 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, fragS
*fragp
)
10287 static xtensa_insnbuf vbuf
= NULL
;
10288 xtensa_isa isa
= xtensa_default_isa
;
10292 const char *file_name
;
10295 file_name
= as_where (&line
);
10296 new_logical_line (fragp
->fr_file
, fragp
->fr_line
);
10298 switch (fragp
->fr_subtype
)
10300 case RELAX_ALIGN_NEXT_OPCODE
:
10301 /* Always convert. */
10302 convert_frag_align_next_opcode (fragp
);
10305 case RELAX_DESIRE_ALIGN
:
10306 /* Do nothing. If not aligned already, too bad. */
10309 case RELAX_LITERAL
:
10310 case RELAX_LITERAL_FINAL
:
10315 vbuf
= xtensa_insnbuf_alloc (isa
);
10317 xtensa_insnbuf_from_chars
10318 (isa
, vbuf
, (unsigned char *) fragp
->fr_opcode
, 0);
10319 fmt
= xtensa_format_decode (isa
, vbuf
);
10320 num_slots
= xtensa_format_num_slots (isa
, fmt
);
10322 for (slot
= 0; slot
< num_slots
; slot
++)
10324 switch (fragp
->tc_frag_data
.slot_subtypes
[slot
])
10327 convert_frag_narrow (sec
, fragp
, fmt
, slot
);
10331 case RELAX_IMMED_STEP1
:
10332 case RELAX_IMMED_STEP2
:
10333 case RELAX_IMMED_STEP3
:
10334 /* Place the immediate. */
10337 fragp
->tc_frag_data
.slot_subtypes
[slot
] - RELAX_IMMED
,
10342 /* This is OK because some slots could have
10343 relaxations and others have none. */
10349 case RELAX_UNREACHABLE
:
10350 memset (&fragp
->fr_literal
[fragp
->fr_fix
], 0, fragp
->fr_var
);
10351 fragp
->fr_fix
+= fragp
->tc_frag_data
.text_expansion
[0];
10352 fragp
->fr_var
-= fragp
->tc_frag_data
.text_expansion
[0];
10356 case RELAX_MAYBE_UNREACHABLE
:
10357 case RELAX_MAYBE_DESIRE_ALIGN
:
10361 case RELAX_FILL_NOP
:
10362 convert_frag_fill_nop (fragp
);
10365 case RELAX_LITERAL_NR
:
10366 if (use_literal_section
)
10368 /* This should have been handled during relaxation. When
10369 relaxing a code segment, literals sometimes need to be
10370 added to the corresponding literal segment. If that
10371 literal segment has already been relaxed, then we end up
10372 in this situation. Marking the literal segments as data
10373 would make this happen less often (since GAS always relaxes
10374 code before data), but we could still get into trouble if
10375 there are instructions in a segment that is not marked as
10376 containing code. Until we can implement a better solution,
10377 cheat and adjust the addresses of all the following frags.
10378 This could break subsequent alignments, but the linker's
10379 literal coalescing will do that anyway. */
10382 fragp
->fr_subtype
= RELAX_LITERAL_FINAL
;
10383 gas_assert (fragp
->tc_frag_data
.unreported_expansion
== 4);
10384 memset (&fragp
->fr_literal
[fragp
->fr_fix
], 0, 4);
10385 fragp
->fr_var
-= 4;
10386 fragp
->fr_fix
+= 4;
10387 for (f
= fragp
->fr_next
; f
; f
= f
->fr_next
)
10388 f
->fr_address
+= 4;
10391 as_bad (_("invalid relaxation fragment result"));
10394 case RELAX_TRAMPOLINE
:
10399 new_logical_line (file_name
, line
);
10404 convert_frag_align_next_opcode (fragS
*fragp
)
10406 char *nop_buf
; /* Location for Writing. */
10407 bfd_boolean use_no_density
= fragp
->tc_frag_data
.is_no_density
;
10408 addressT aligned_address
;
10410 int nop
, nop_count
;
10412 aligned_address
= get_noop_aligned_address (fragp
, fragp
->fr_address
+
10414 fill_size
= aligned_address
- (fragp
->fr_address
+ fragp
->fr_fix
);
10415 nop_count
= get_text_align_nop_count (fill_size
, use_no_density
);
10416 nop_buf
= fragp
->fr_literal
+ fragp
->fr_fix
;
10418 for (nop
= 0; nop
< nop_count
; nop
++)
10421 nop_size
= get_text_align_nth_nop_size (fill_size
, nop
, use_no_density
);
10423 assemble_nop (nop_size
, nop_buf
);
10424 nop_buf
+= nop_size
;
10427 fragp
->fr_fix
+= fill_size
;
10428 fragp
->fr_var
-= fill_size
;
10433 convert_frag_narrow (segT segP
, fragS
*fragP
, xtensa_format fmt
, int slot
)
10435 TInsn tinsn
, single_target
;
10436 int size
, old_size
, diff
;
10437 offsetT frag_offset
;
10439 gas_assert (slot
== 0);
10440 tinsn_from_chars (&tinsn
, fragP
->fr_opcode
, 0);
10442 if (fragP
->tc_frag_data
.is_aligning_branch
== 1)
10444 gas_assert (fragP
->tc_frag_data
.text_expansion
[0] == 1
10445 || fragP
->tc_frag_data
.text_expansion
[0] == 0);
10446 convert_frag_immed (segP
, fragP
, fragP
->tc_frag_data
.text_expansion
[0],
10451 if (fragP
->tc_frag_data
.text_expansion
[0] == 0)
10453 /* No conversion. */
10458 gas_assert (fragP
->fr_opcode
!= NULL
);
10460 /* Frags in this relaxation state should only contain
10461 single instruction bundles. */
10462 tinsn_immed_from_frag (&tinsn
, fragP
, 0);
10464 /* Just convert it to a wide form.... */
10466 old_size
= xg_get_single_size (tinsn
.opcode
);
10468 tinsn_init (&single_target
);
10469 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
10471 if (! xg_is_single_relaxable_insn (&tinsn
, &single_target
, FALSE
))
10473 as_bad (_("unable to widen instruction"));
10477 size
= xg_get_single_size (single_target
.opcode
);
10478 xg_emit_insn_to_buf (&single_target
, fragP
->fr_opcode
, fragP
,
10479 frag_offset
, TRUE
);
10481 diff
= size
- old_size
;
10482 gas_assert (diff
>= 0);
10483 gas_assert (diff
<= fragP
->fr_var
);
10484 fragP
->fr_var
-= diff
;
10485 fragP
->fr_fix
+= diff
;
10493 convert_frag_fill_nop (fragS
*fragP
)
10495 char *loc
= &fragP
->fr_literal
[fragP
->fr_fix
];
10496 int size
= fragP
->tc_frag_data
.text_expansion
[0];
10497 gas_assert ((unsigned) size
== (fragP
->fr_next
->fr_address
10498 - fragP
->fr_address
- fragP
->fr_fix
));
10501 /* No conversion. */
10505 assemble_nop (size
, loc
);
10506 fragP
->tc_frag_data
.is_insn
= TRUE
;
10507 fragP
->fr_var
-= size
;
10508 fragP
->fr_fix
+= size
;
10513 static fixS
*fix_new_exp_in_seg
10514 (segT
, subsegT
, fragS
*, int, int, expressionS
*, int,
10515 bfd_reloc_code_real_type
);
10516 static void convert_frag_immed_finish_loop (segT
, fragS
*, TInsn
*);
10519 convert_frag_immed (segT segP
,
10525 char *immed_instr
= fragP
->fr_opcode
;
10527 bfd_boolean expanded
= FALSE
;
10528 bfd_boolean branch_jmp_to_next
= FALSE
;
10529 char *fr_opcode
= fragP
->fr_opcode
;
10530 xtensa_isa isa
= xtensa_default_isa
;
10531 bfd_boolean from_wide_insn
= FALSE
;
10533 bfd_boolean is_loop
;
10535 gas_assert (fr_opcode
!= NULL
);
10537 xg_clear_vinsn (&cur_vinsn
);
10539 vinsn_from_chars (&cur_vinsn
, fr_opcode
);
10540 if (cur_vinsn
.num_slots
> 1)
10541 from_wide_insn
= TRUE
;
10543 orig_tinsn
= cur_vinsn
.slots
[slot
];
10544 tinsn_immed_from_frag (&orig_tinsn
, fragP
, slot
);
10546 is_loop
= xtensa_opcode_is_loop (xtensa_default_isa
, orig_tinsn
.opcode
) == 1;
10548 if (workaround_b_j_loop_end
&& ! fragP
->tc_frag_data
.is_no_transform
)
10549 branch_jmp_to_next
= is_branch_jmp_to_next (&orig_tinsn
, fragP
);
10551 if (branch_jmp_to_next
&& !next_frag_is_loop_target (fragP
))
10553 /* Conversion just inserts a NOP and marks the fix as completed. */
10554 bytes
= xtensa_format_length (isa
, fmt
);
10557 cur_vinsn
.slots
[slot
].opcode
=
10558 xtensa_format_slot_nop_opcode (isa
, cur_vinsn
.format
, slot
);
10559 cur_vinsn
.slots
[slot
].ntok
= 0;
10563 bytes
+= fragP
->tc_frag_data
.text_expansion
[0];
10564 gas_assert (bytes
== 2 || bytes
== 3);
10565 build_nop (&cur_vinsn
.slots
[0], bytes
);
10566 fragP
->fr_fix
+= fragP
->tc_frag_data
.text_expansion
[0];
10568 vinsn_to_insnbuf (&cur_vinsn
, fr_opcode
, frag_now
, TRUE
);
10569 xtensa_insnbuf_to_chars
10570 (isa
, cur_vinsn
.insnbuf
, (unsigned char *) fr_opcode
, 0);
10575 /* Here is the fun stuff: Get the immediate field from this
10576 instruction. If it fits, we're done. If not, find the next
10577 instruction sequence that fits. */
10581 symbolS
*lit_sym
= NULL
;
10582 int total_size
= 0;
10583 int target_offset
= 0;
10586 symbolS
*gen_label
= NULL
;
10587 offsetT frag_offset
;
10588 bfd_boolean first
= TRUE
;
10590 /* It does not fit. Find something that does and
10591 convert immediately. */
10592 frag_offset
= fr_opcode
- fragP
->fr_literal
;
10593 istack_init (&istack
);
10594 xg_assembly_relax (&istack
, &orig_tinsn
,
10595 segP
, fragP
, frag_offset
, min_steps
, 0);
10597 old_size
= xtensa_format_length (isa
, fmt
);
10599 /* Assemble this right inline. */
10601 /* First, create the mapping from a label name to the REAL label. */
10603 for (i
= 0; i
< istack
.ninsn
; i
++)
10605 TInsn
*tinsn
= &istack
.insn
[i
];
10608 switch (tinsn
->insn_type
)
10610 case ITYPE_LITERAL
:
10611 if (lit_sym
!= NULL
)
10612 as_bad (_("multiple literals in expansion"));
10613 /* First find the appropriate space in the literal pool. */
10614 lit_frag
= fragP
->tc_frag_data
.literal_frags
[slot
];
10615 if (lit_frag
== NULL
)
10616 as_bad (_("no registered fragment for literal"));
10617 if (tinsn
->ntok
!= 1)
10618 as_bad (_("number of literal tokens != 1"));
10620 /* Set the literal symbol and add a fixup. */
10621 lit_sym
= lit_frag
->fr_symbol
;
10625 if (align_targets
&& !is_loop
)
10627 fragS
*unreach
= fragP
->fr_next
;
10628 while (!(unreach
->fr_type
== rs_machine_dependent
10629 && (unreach
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
10630 || unreach
->fr_subtype
== RELAX_UNREACHABLE
)))
10632 unreach
= unreach
->fr_next
;
10635 gas_assert (unreach
->fr_type
== rs_machine_dependent
10636 && (unreach
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
10637 || unreach
->fr_subtype
== RELAX_UNREACHABLE
));
10639 target_offset
+= unreach
->tc_frag_data
.text_expansion
[0];
10641 gas_assert (gen_label
== NULL
);
10642 gen_label
= symbol_new (FAKE_LABEL_NAME
, now_seg
,
10643 fr_opcode
- fragP
->fr_literal
10644 + target_offset
, fragP
);
10648 if (first
&& from_wide_insn
)
10650 target_offset
+= xtensa_format_length (isa
, fmt
);
10652 if (!opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10653 target_offset
+= xg_get_single_size (tinsn
->opcode
);
10656 target_offset
+= xg_get_single_size (tinsn
->opcode
);
10663 for (i
= 0; i
< istack
.ninsn
; i
++)
10665 TInsn
*tinsn
= &istack
.insn
[i
];
10669 bfd_reloc_code_real_type reloc_type
;
10671 switch (tinsn
->insn_type
)
10673 case ITYPE_LITERAL
:
10674 lit_frag
= fragP
->tc_frag_data
.literal_frags
[slot
];
10675 /* Already checked. */
10676 gas_assert (lit_frag
!= NULL
);
10677 gas_assert (lit_sym
!= NULL
);
10678 gas_assert (tinsn
->ntok
== 1);
10680 target_seg
= S_GET_SEGMENT (lit_sym
);
10681 gas_assert (target_seg
);
10682 reloc_type
= map_operator_to_reloc (tinsn
->tok
[0].X_op
, TRUE
);
10683 fix_new_exp_in_seg (target_seg
, 0, lit_frag
, 0, 4,
10684 &tinsn
->tok
[0], FALSE
, reloc_type
);
10691 xg_resolve_labels (tinsn
, gen_label
);
10692 xg_resolve_literals (tinsn
, lit_sym
);
10693 if (from_wide_insn
&& first
)
10696 if (opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10698 cur_vinsn
.slots
[slot
] = *tinsn
;
10702 cur_vinsn
.slots
[slot
].opcode
=
10703 xtensa_format_slot_nop_opcode (isa
, fmt
, slot
);
10704 cur_vinsn
.slots
[slot
].ntok
= 0;
10706 vinsn_to_insnbuf (&cur_vinsn
, immed_instr
, fragP
, TRUE
);
10707 xtensa_insnbuf_to_chars (isa
, cur_vinsn
.insnbuf
,
10708 (unsigned char *) immed_instr
, 0);
10709 fragP
->tc_frag_data
.is_insn
= TRUE
;
10710 size
= xtensa_format_length (isa
, fmt
);
10711 if (!opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10713 xg_emit_insn_to_buf
10714 (tinsn
, immed_instr
+ size
, fragP
,
10715 immed_instr
- fragP
->fr_literal
+ size
, TRUE
);
10716 size
+= xg_get_single_size (tinsn
->opcode
);
10721 size
= xg_get_single_size (tinsn
->opcode
);
10722 xg_emit_insn_to_buf (tinsn
, immed_instr
, fragP
,
10723 immed_instr
- fragP
->fr_literal
, TRUE
);
10725 immed_instr
+= size
;
10726 total_size
+= size
;
10731 diff
= total_size
- old_size
;
10732 gas_assert (diff
>= 0);
10735 gas_assert (diff
<= fragP
->fr_var
);
10736 fragP
->fr_var
-= diff
;
10737 fragP
->fr_fix
+= diff
;
10740 /* Check for undefined immediates in LOOP instructions. */
10744 sym
= orig_tinsn
.tok
[1].X_add_symbol
;
10745 if (sym
!= NULL
&& !S_IS_DEFINED (sym
))
10747 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym
));
10750 sym
= orig_tinsn
.tok
[1].X_op_symbol
;
10751 if (sym
!= NULL
&& !S_IS_DEFINED (sym
))
10753 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym
));
10758 if (expanded
&& xtensa_opcode_is_loop (isa
, orig_tinsn
.opcode
) == 1)
10759 convert_frag_immed_finish_loop (segP
, fragP
, &orig_tinsn
);
10761 if (expanded
&& is_direct_call_opcode (orig_tinsn
.opcode
))
10763 /* Add an expansion note on the expanded instruction. */
10764 fix_new_exp_in_seg (now_seg
, 0, fragP
, fr_opcode
- fragP
->fr_literal
, 4,
10765 &orig_tinsn
.tok
[0], TRUE
,
10766 BFD_RELOC_XTENSA_ASM_EXPAND
);
10771 /* Add a new fix expression into the desired segment. We have to
10772 switch to that segment to do this. */
10775 fix_new_exp_in_seg (segT new_seg
,
10776 subsegT new_subseg
,
10782 bfd_reloc_code_real_type r_type
)
10785 segT seg
= now_seg
;
10786 subsegT subseg
= now_subseg
;
10788 gas_assert (new_seg
!= 0);
10789 subseg_set (new_seg
, new_subseg
);
10791 new_fix
= fix_new_exp (frag
, where
, size
, exp
, pcrel
, r_type
);
10792 subseg_set (seg
, subseg
);
10797 /* Relax a loop instruction so that it can span loop >256 bytes.
10803 addi as, as, lo8 (label-.L1)
10804 addmi as, as, mid8 (label-.L1)
10815 convert_frag_immed_finish_loop (segT segP
, fragS
*fragP
, TInsn
*tinsn
)
10820 unsigned long target
;
10821 static xtensa_insnbuf insnbuf
= NULL
;
10822 unsigned int loop_length
, loop_length_hi
, loop_length_lo
;
10823 xtensa_isa isa
= xtensa_default_isa
;
10824 addressT loop_offset
;
10825 addressT addi_offset
= 9;
10826 addressT addmi_offset
= 12;
10831 insnbuf
= xtensa_insnbuf_alloc (isa
);
10833 /* Get the loop offset. */
10834 loop_offset
= get_expanded_loop_offset (tinsn
->opcode
);
10836 /* Validate that there really is a LOOP at the loop_offset. Because
10837 loops are not bundleable, we can assume that the instruction will be
10839 tinsn_from_chars (&loop_insn
, fragP
->fr_opcode
+ loop_offset
, 0);
10840 tinsn_immed_from_frag (&loop_insn
, fragP
, 0);
10842 gas_assert (xtensa_opcode_is_loop (isa
, loop_insn
.opcode
) == 1);
10843 addi_offset
+= loop_offset
;
10844 addmi_offset
+= loop_offset
;
10846 gas_assert (tinsn
->ntok
== 2);
10847 if (tinsn
->tok
[1].X_op
== O_constant
)
10848 target
= tinsn
->tok
[1].X_add_number
;
10849 else if (tinsn
->tok
[1].X_op
== O_symbol
)
10851 /* Find the fragment. */
10852 symbolS
*sym
= tinsn
->tok
[1].X_add_symbol
;
10853 gas_assert (S_GET_SEGMENT (sym
) == segP
10854 || S_GET_SEGMENT (sym
) == absolute_section
);
10855 target
= (S_GET_VALUE (sym
) + tinsn
->tok
[1].X_add_number
);
10859 as_bad (_("invalid expression evaluation type %d"), tinsn
->tok
[1].X_op
);
10863 loop_length
= target
- (fragP
->fr_address
+ fragP
->fr_fix
);
10864 loop_length_hi
= loop_length
& ~0x0ff;
10865 loop_length_lo
= loop_length
& 0x0ff;
10866 if (loop_length_lo
>= 128)
10868 loop_length_lo
-= 256;
10869 loop_length_hi
+= 256;
10872 /* Because addmi sign-extends the immediate, 'loop_length_hi' can be at most
10873 32512. If the loop is larger than that, then we just fail. */
10874 if (loop_length_hi
> 32512)
10875 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
10876 _("loop too long for LOOP instruction"));
10878 tinsn_from_chars (&addi_insn
, fragP
->fr_opcode
+ addi_offset
, 0);
10879 gas_assert (addi_insn
.opcode
== xtensa_addi_opcode
);
10881 tinsn_from_chars (&addmi_insn
, fragP
->fr_opcode
+ addmi_offset
, 0);
10882 gas_assert (addmi_insn
.opcode
== xtensa_addmi_opcode
);
10884 set_expr_const (&addi_insn
.tok
[2], loop_length_lo
);
10885 tinsn_to_insnbuf (&addi_insn
, insnbuf
);
10887 fragP
->tc_frag_data
.is_insn
= TRUE
;
10888 xtensa_insnbuf_to_chars
10889 (isa
, insnbuf
, (unsigned char *) fragP
->fr_opcode
+ addi_offset
, 0);
10891 set_expr_const (&addmi_insn
.tok
[2], loop_length_hi
);
10892 tinsn_to_insnbuf (&addmi_insn
, insnbuf
);
10893 xtensa_insnbuf_to_chars
10894 (isa
, insnbuf
, (unsigned char *) fragP
->fr_opcode
+ addmi_offset
, 0);
10896 /* Walk through all of the frags from here to the loop end
10897 and mark them as no_transform to keep them from being modified
10898 by the linker. If we ever have a relocation for the
10899 addi/addmi of the difference of two symbols we can remove this. */
10902 for (next_fragP
= fragP
; next_fragP
!= NULL
;
10903 next_fragP
= next_fragP
->fr_next
)
10905 next_fragP
->tc_frag_data
.is_no_transform
= TRUE
;
10906 if (next_fragP
->tc_frag_data
.is_loop_target
)
10908 if (target_count
== 2)
10914 /* A map that keeps information on a per-subsegment basis. This is
10915 maintained during initial assembly, but is invalid once the
10916 subsegments are smashed together. I.E., it cannot be used during
10919 typedef struct subseg_map_struct
10927 float total_freq
; /* fall-through + branch target frequency */
10928 float target_freq
; /* branch target frequency alone */
10930 struct subseg_map_struct
*next
;
10934 static subseg_map
*sseg_map
= NULL
;
10936 static subseg_map
*
10937 get_subseg_info (segT seg
, subsegT subseg
)
10939 subseg_map
*subseg_e
;
10941 for (subseg_e
= sseg_map
; subseg_e
; subseg_e
= subseg_e
->next
)
10943 if (seg
== subseg_e
->seg
&& subseg
== subseg_e
->subseg
)
10950 static subseg_map
*
10951 add_subseg_info (segT seg
, subsegT subseg
)
10953 subseg_map
*subseg_e
= (subseg_map
*) xmalloc (sizeof (subseg_map
));
10954 memset (subseg_e
, 0, sizeof (subseg_map
));
10955 subseg_e
->seg
= seg
;
10956 subseg_e
->subseg
= subseg
;
10957 subseg_e
->flags
= 0;
10958 /* Start off considering every branch target very important. */
10959 subseg_e
->target_freq
= 1.0;
10960 subseg_e
->total_freq
= 1.0;
10961 subseg_e
->next
= sseg_map
;
10962 sseg_map
= subseg_e
;
10968 get_last_insn_flags (segT seg
, subsegT subseg
)
10970 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
10972 return subseg_e
->flags
;
10978 set_last_insn_flags (segT seg
,
10983 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
10985 subseg_e
= add_subseg_info (seg
, subseg
);
10987 subseg_e
->flags
|= fl
;
10989 subseg_e
->flags
&= ~fl
;
10994 get_subseg_total_freq (segT seg
, subsegT subseg
)
10996 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
10998 return subseg_e
->total_freq
;
11004 get_subseg_target_freq (segT seg
, subsegT subseg
)
11006 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11008 return subseg_e
->target_freq
;
11014 set_subseg_freq (segT seg
, subsegT subseg
, float total_f
, float target_f
)
11016 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11018 subseg_e
= add_subseg_info (seg
, subseg
);
11019 subseg_e
->total_freq
= total_f
;
11020 subseg_e
->target_freq
= target_f
;
11024 /* Segment Lists and emit_state Stuff. */
11027 xtensa_move_seg_list_to_beginning (seg_list
*head
)
11032 segT literal_section
= head
->seg
;
11034 /* Move the literal section to the front of the section list. */
11035 gas_assert (literal_section
);
11036 if (literal_section
!= stdoutput
->sections
)
11038 bfd_section_list_remove (stdoutput
, literal_section
);
11039 bfd_section_list_prepend (stdoutput
, literal_section
);
11046 static void mark_literal_frags (seg_list
*);
11049 xtensa_move_literals (void)
11052 frchainS
*frchain_from
, *frchain_to
;
11053 fragS
*search_frag
, *next_frag
, *literal_pool
, *insert_after
;
11054 fragS
**frag_splice
;
11057 fixS
*fix
, *next_fix
, **fix_splice
;
11059 struct litpool_seg
*lps
;
11060 const char *init_name
= INIT_SECTION_NAME
;
11061 const char *fini_name
= FINI_SECTION_NAME
;
11062 int init_name_len
= strlen(init_name
);
11063 int fini_name_len
= strlen(fini_name
);
11065 mark_literal_frags (literal_head
->next
);
11067 if (use_literal_section
)
11070 /* Assign addresses (rough estimates) to the potential literal pool locations
11071 and create new ones if the gaps are too large. */
11073 for (lps
= litpool_seg_list
.next
; lps
; lps
= lps
->next
)
11075 frchainS
*frchP
= seg_info (lps
->seg
)->frchainP
;
11076 struct litpool_frag
*lpf
= lps
->frag_list
.next
;
11079 for ( ; frchP
; frchP
= frchP
->frch_next
)
11082 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
11084 if (lpf
&& fragP
== lpf
->fragP
)
11086 gas_assert(fragP
->fr_type
== rs_machine_dependent
&&
11087 (fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
||
11088 fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
));
11089 /* Found a litpool location. */
11093 if (fragP
->fr_type
== rs_machine_dependent
&&
11094 fragP
->fr_subtype
== RELAX_SLOTS
)
11097 for (slot
= 0; slot
< MAX_SLOTS
; slot
++)
11099 if (fragP
->tc_frag_data
.literal_frags
[slot
])
11101 /* L32R; point its literal to the nearest litpool
11102 preferring non-"candidate" positions to avoid
11103 the jump-around. */
11104 fragS
*litfrag
= fragP
->tc_frag_data
.literal_frags
[slot
];
11105 struct litpool_frag
*lp
= lpf
->prev
;
11110 while (lp
->fragP
->fr_subtype
==
11111 RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
11114 if (lp
->fragP
== NULL
)
11116 /* End of list; have to bite the bullet.
11117 Take the nearest. */
11121 /* Does it (conservatively) reach? */
11122 if (addr
- lp
->addr
<= 128 * 1024)
11124 if (lp
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
)
11126 /* Found a good one. */
11129 else if (lp
->prev
->fragP
&&
11130 addr
- lp
->prev
->addr
> 128 * 1024)
11132 /* This is still a "candidate" but the next one
11133 will be too far away, so revert to the nearest
11134 one, convert it and add the jump around. */
11138 char label
[10 + 2 * sizeof (fragS
*)];
11140 poolbeg
= lp
->fragP
;
11142 poolbeg
->fr_subtype
= RELAX_LITERAL_POOL_BEGIN
;
11143 poolend
= poolbeg
->fr_next
;
11144 gas_assert (poolend
->fr_type
== rs_machine_dependent
&&
11145 poolend
->fr_subtype
== RELAX_LITERAL_POOL_END
);
11146 /* Create a local symbol pointing to the
11147 end of the pool. */
11148 sprintf (label
, ".L0_LT_%p", poolbeg
);
11149 lsym
= (symbolS
*)local_symbol_make (label
, lps
->seg
,
11151 poolbeg
->fr_symbol
= lsym
;
11152 /* Rest is done in xtensa_relax_frag. */
11156 if (! litfrag
->tc_frag_data
.literal_frag
)
11158 /* Take earliest use of this literal to avoid
11160 litfrag
->tc_frag_data
.literal_frag
= lp
->fragP
;
11165 addr
+= fragP
->fr_fix
;
11166 if (fragP
->fr_type
== rs_fill
)
11167 addr
+= fragP
->fr_offset
;
11172 for (segment
= literal_head
->next
; segment
; segment
= segment
->next
)
11174 const char *seg_name
= segment_name (segment
->seg
);
11176 /* Keep the literals for .init and .fini in separate sections. */
11177 if ((!memcmp (seg_name
, init_name
, init_name_len
) &&
11178 !strcmp (seg_name
+ init_name_len
, ".literal")) ||
11179 (!memcmp (seg_name
, fini_name
, fini_name_len
) &&
11180 !strcmp (seg_name
+ fini_name_len
, ".literal")))
11183 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11184 search_frag
= frchain_from
->frch_root
;
11185 literal_pool
= NULL
;
11187 frag_splice
= &(frchain_from
->frch_root
);
11189 while (search_frag
&& !search_frag
->tc_frag_data
.literal_frag
)
11191 gas_assert (search_frag
->fr_fix
== 0
11192 || search_frag
->fr_type
== rs_align
);
11193 search_frag
= search_frag
->fr_next
;
11198 search_frag
= frchain_from
->frch_root
;
11199 as_bad_where (search_frag
->fr_file
, search_frag
->fr_line
,
11200 _("literal pool location required for text-section-literals; specify with .literal_position"));
11204 gas_assert (search_frag
->tc_frag_data
.literal_frag
->fr_subtype
11205 == RELAX_LITERAL_POOL_BEGIN
);
11206 xtensa_switch_section_emit_state (&state
, segment
->seg
, 0);
11208 /* Make sure that all the frags in this series are closed, and
11209 that there is at least one left over of zero-size. This
11210 prevents us from making a segment with an frchain without any
11212 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11213 xtensa_set_frag_assembly_state (frag_now
);
11214 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11215 xtensa_set_frag_assembly_state (frag_now
);
11217 while (search_frag
!= frag_now
)
11219 next_frag
= search_frag
->fr_next
;
11220 if (search_frag
->tc_frag_data
.literal_frag
)
11222 literal_pool
= search_frag
->tc_frag_data
.literal_frag
;
11223 gas_assert (literal_pool
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
);
11224 frchain_to
= literal_pool
->tc_frag_data
.lit_frchain
;
11225 gas_assert (frchain_to
);
11228 if (search_frag
->fr_type
== rs_fill
&& search_frag
->fr_fix
== 0)
11230 /* Skip empty fill frags. */
11231 *frag_splice
= next_frag
;
11232 search_frag
= next_frag
;
11236 if (search_frag
->fr_type
== rs_align
)
11238 /* Skip alignment frags, because the pool as a whole will be
11239 aligned if used, and we don't want to force alignment if the
11241 *frag_splice
= next_frag
;
11242 search_frag
= next_frag
;
11246 /* First, move the frag out of the literal section and
11247 to the appropriate place. */
11249 /* Insert an aligmnent frag at start of pool. */
11250 if (literal_pool
->fr_next
->fr_type
== rs_machine_dependent
&&
11251 literal_pool
->fr_next
->fr_subtype
== RELAX_LITERAL_POOL_END
)
11253 segT pool_seg
= literal_pool
->fr_next
->tc_frag_data
.lit_seg
;
11254 emit_state prev_state
;
11257 xtensa_switch_section_emit_state (&prev_state
, pool_seg
, 0);
11258 prev_frag
= frag_now
;
11259 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11260 align_frag
= frag_now
;
11261 frag_align (2, 0, 0);
11262 /* Splice it into the right place. */
11263 prev_frag
->fr_next
= align_frag
->fr_next
;
11264 align_frag
->fr_next
= literal_pool
->fr_next
;
11265 literal_pool
->fr_next
= align_frag
;
11266 /* Insert after this one. */
11267 literal_pool
->tc_frag_data
.literal_frag
= align_frag
;
11268 xtensa_restore_emit_state (&prev_state
);
11270 insert_after
= literal_pool
->tc_frag_data
.literal_frag
;
11271 dest_seg
= insert_after
->fr_next
->tc_frag_data
.lit_seg
;
11272 /* Skip align frag. */
11273 if (insert_after
->fr_next
->fr_type
== rs_align
)
11275 insert_after
= insert_after
->fr_next
;
11278 *frag_splice
= next_frag
;
11279 search_frag
->fr_next
= insert_after
->fr_next
;
11280 insert_after
->fr_next
= search_frag
;
11281 search_frag
->tc_frag_data
.lit_seg
= dest_seg
;
11282 literal_pool
->tc_frag_data
.literal_frag
= search_frag
;
11284 /* Now move any fixups associated with this frag to the
11286 fix
= frchain_from
->fix_root
;
11287 fix_splice
= &(frchain_from
->fix_root
);
11290 next_fix
= fix
->fx_next
;
11291 if (fix
->fx_frag
== search_frag
)
11293 *fix_splice
= next_fix
;
11294 fix
->fx_next
= frchain_to
->fix_root
;
11295 frchain_to
->fix_root
= fix
;
11296 if (frchain_to
->fix_tail
== NULL
)
11297 frchain_to
->fix_tail
= fix
;
11300 fix_splice
= &(fix
->fx_next
);
11303 search_frag
= next_frag
;
11306 if (frchain_from
->fix_root
!= NULL
)
11308 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11309 as_warn (_("fixes not all moved from %s"), segment
->seg
->name
);
11311 gas_assert (frchain_from
->fix_root
== NULL
);
11313 frchain_from
->fix_tail
= NULL
;
11314 xtensa_restore_emit_state (&state
);
11317 /* Now fix up the SEGMENT value for all the literal symbols. */
11318 for (lit
= literal_syms
; lit
; lit
= lit
->next
)
11320 symbolS
*lit_sym
= lit
->sym
;
11321 segT dseg
= symbol_get_frag (lit_sym
)->tc_frag_data
.lit_seg
;
11323 S_SET_SEGMENT (lit_sym
, dseg
);
11328 /* Walk over all the frags for segments in a list and mark them as
11329 containing literals. As clunky as this is, we can't rely on frag_var
11330 and frag_variant to get called in all situations. */
11333 mark_literal_frags (seg_list
*segment
)
11335 frchainS
*frchain_from
;
11336 fragS
*search_frag
;
11340 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11341 search_frag
= frchain_from
->frch_root
;
11342 while (search_frag
)
11344 search_frag
->tc_frag_data
.is_literal
= TRUE
;
11345 search_frag
= search_frag
->fr_next
;
11347 segment
= segment
->next
;
11353 xtensa_reorder_seg_list (seg_list
*head
, segT after
)
11355 /* Move all of the sections in the section list to come
11356 after "after" in the gnu segment list. */
11361 segT literal_section
= head
->seg
;
11363 /* Move the literal section after "after". */
11364 gas_assert (literal_section
);
11365 if (literal_section
!= after
)
11367 bfd_section_list_remove (stdoutput
, literal_section
);
11368 bfd_section_list_insert_after (stdoutput
, after
, literal_section
);
11376 /* Push all the literal segments to the end of the gnu list. */
11379 xtensa_reorder_segments (void)
11386 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
11392 /* Now that we have the last section, push all the literal
11393 sections to the end. */
11394 xtensa_reorder_seg_list (literal_head
, last_sec
);
11396 /* Now perform the final error check. */
11397 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
11399 gas_assert (new_count
== old_count
);
11403 /* Change the emit state (seg, subseg, and frag related stuff) to the
11404 correct location. Return a emit_state which can be passed to
11405 xtensa_restore_emit_state to return to current fragment. */
11408 xtensa_switch_to_literal_fragment (emit_state
*result
)
11410 if (directive_state
[directive_absolute_literals
])
11412 segT lit4_seg
= cache_literal_section (TRUE
);
11413 xtensa_switch_section_emit_state (result
, lit4_seg
, 0);
11416 xtensa_switch_to_non_abs_literal_fragment (result
);
11418 /* Do a 4-byte align here. */
11419 frag_align (2, 0, 0);
11420 record_alignment (now_seg
, 2);
11425 xtensa_switch_to_non_abs_literal_fragment (emit_state
*result
)
11427 static bfd_boolean recursive
= FALSE
;
11428 fragS
*pool_location
= get_literal_pool_location (now_seg
);
11430 bfd_boolean is_init
=
11431 (now_seg
&& !strcmp (segment_name (now_seg
), INIT_SECTION_NAME
));
11432 bfd_boolean is_fini
=
11433 (now_seg
&& !strcmp (segment_name (now_seg
), FINI_SECTION_NAME
));
11435 if (pool_location
== NULL
11436 && !use_literal_section
11438 && !is_init
&& ! is_fini
)
11440 if (!auto_litpools
)
11442 as_bad (_("literal pool location required for text-section-literals; specify with .literal_position"));
11445 /* When we mark a literal pool location, we want to put a frag in
11446 the literal pool that points to it. But to do that, we want to
11447 switch_to_literal_fragment. But literal sections don't have
11448 literal pools, so their location is always null, so we would
11449 recurse forever. This is kind of hacky, but it works. */
11452 xtensa_mark_literal_pool_location ();
11456 lit_seg
= cache_literal_section (FALSE
);
11457 xtensa_switch_section_emit_state (result
, lit_seg
, 0);
11459 if (!use_literal_section
11460 && !is_init
&& !is_fini
11461 && get_literal_pool_location (now_seg
) != pool_location
)
11463 /* Close whatever frag is there. */
11464 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11465 xtensa_set_frag_assembly_state (frag_now
);
11466 frag_now
->tc_frag_data
.literal_frag
= pool_location
;
11467 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11468 xtensa_set_frag_assembly_state (frag_now
);
11473 /* Call this function before emitting data into the literal section.
11474 This is a helper function for xtensa_switch_to_literal_fragment.
11475 This is similar to a .section new_now_seg subseg. */
11478 xtensa_switch_section_emit_state (emit_state
*state
,
11480 subsegT new_now_subseg
)
11482 state
->name
= now_seg
->name
;
11483 state
->now_seg
= now_seg
;
11484 state
->now_subseg
= now_subseg
;
11485 state
->generating_literals
= generating_literals
;
11486 generating_literals
++;
11487 subseg_set (new_now_seg
, new_now_subseg
);
11491 /* Use to restore the emitting into the normal place. */
11494 xtensa_restore_emit_state (emit_state
*state
)
11496 generating_literals
= state
->generating_literals
;
11497 subseg_set (state
->now_seg
, state
->now_subseg
);
11501 /* Predicate function used to look up a section in a particular group. */
11504 match_section_group (bfd
*abfd ATTRIBUTE_UNUSED
, asection
*sec
, void *inf
)
11506 const char *gname
= inf
;
11507 const char *group_name
= elf_group_name (sec
);
11509 return (group_name
== gname
11510 || (group_name
!= NULL
11512 && strcmp (group_name
, gname
) == 0));
11516 /* Get the literal section to be used for the current text section.
11517 The result may be cached in the default_lit_sections structure. */
11520 cache_literal_section (bfd_boolean use_abs_literals
)
11522 const char *text_name
, *group_name
= 0;
11523 const char *base_name
, *suffix
;
11526 segT seg
, current_section
;
11527 int current_subsec
;
11528 bfd_boolean linkonce
= FALSE
;
11530 /* Save the current section/subsection. */
11531 current_section
= now_seg
;
11532 current_subsec
= now_subseg
;
11534 /* Clear the cached values if they are no longer valid. */
11535 if (now_seg
!= default_lit_sections
.current_text_seg
)
11537 default_lit_sections
.current_text_seg
= now_seg
;
11538 default_lit_sections
.lit_seg
= NULL
;
11539 default_lit_sections
.lit4_seg
= NULL
;
11542 /* Check if the literal section is already cached. */
11543 if (use_abs_literals
)
11544 pcached
= &default_lit_sections
.lit4_seg
;
11546 pcached
= &default_lit_sections
.lit_seg
;
11551 text_name
= default_lit_sections
.lit_prefix
;
11552 if (! text_name
|| ! *text_name
)
11554 text_name
= segment_name (current_section
);
11555 group_name
= elf_group_name (current_section
);
11556 linkonce
= (current_section
->flags
& SEC_LINK_ONCE
) != 0;
11559 base_name
= use_abs_literals
? ".lit4" : ".literal";
11562 name
= xmalloc (strlen (base_name
) + strlen (group_name
) + 2);
11563 sprintf (name
, "%s.%s", base_name
, group_name
);
11565 else if (strncmp (text_name
, ".gnu.linkonce.", linkonce_len
) == 0)
11567 suffix
= strchr (text_name
+ linkonce_len
, '.');
11569 name
= xmalloc (linkonce_len
+ strlen (base_name
) + 1
11570 + (suffix
? strlen (suffix
) : 0));
11571 strcpy (name
, ".gnu.linkonce");
11572 strcat (name
, base_name
);
11574 strcat (name
, suffix
);
11579 /* If the section name begins or ends with ".text", then replace
11580 that portion instead of appending an additional suffix. */
11581 size_t len
= strlen (text_name
);
11583 && (strcmp (text_name
+ len
- 5, ".text") == 0
11584 || strncmp (text_name
, ".text", 5) == 0))
11587 name
= xmalloc (len
+ strlen (base_name
) + 1);
11588 if (strncmp (text_name
, ".text", 5) == 0)
11590 strcpy (name
, base_name
);
11591 strcat (name
, text_name
+ 5);
11595 strcpy (name
, text_name
);
11596 strcpy (name
+ len
, base_name
);
11600 /* Canonicalize section names to allow renaming literal sections.
11601 The group name, if any, came from the current text section and
11602 has already been canonicalized. */
11603 name
= tc_canonicalize_symbol_name (name
);
11605 seg
= bfd_get_section_by_name_if (stdoutput
, name
, match_section_group
,
11606 (void *) group_name
);
11611 seg
= subseg_force_new (name
, 0);
11613 if (! use_abs_literals
)
11615 /* Add the newly created literal segment to the list. */
11616 seg_list
*n
= (seg_list
*) xmalloc (sizeof (seg_list
));
11618 n
->next
= literal_head
->next
;
11619 literal_head
->next
= n
;
11622 flags
= (SEC_HAS_CONTENTS
| SEC_READONLY
| SEC_ALLOC
| SEC_LOAD
11623 | (linkonce
? (SEC_LINK_ONCE
| SEC_LINK_DUPLICATES_DISCARD
) : 0)
11624 | (use_abs_literals
? SEC_DATA
: SEC_CODE
));
11626 elf_group_name (seg
) = group_name
;
11628 bfd_set_section_flags (stdoutput
, seg
, flags
);
11629 bfd_set_section_alignment (stdoutput
, seg
, 2);
11633 subseg_set (current_section
, current_subsec
);
11638 /* Property Tables Stuff. */
11640 #define XTENSA_INSN_SEC_NAME ".xt.insn"
11641 #define XTENSA_LIT_SEC_NAME ".xt.lit"
11642 #define XTENSA_PROP_SEC_NAME ".xt.prop"
11644 typedef bfd_boolean (*frag_predicate
) (const fragS
*);
11645 typedef void (*frag_flags_fn
) (const fragS
*, frag_flags
*);
11647 static bfd_boolean
get_frag_is_literal (const fragS
*);
11648 static void xtensa_create_property_segments
11649 (frag_predicate
, frag_predicate
, const char *, xt_section_type
);
11650 static void xtensa_create_xproperty_segments
11651 (frag_flags_fn
, const char *, xt_section_type
);
11652 static bfd_boolean
exclude_section_from_property_tables (segT
);
11653 static bfd_boolean
section_has_property (segT
, frag_predicate
);
11654 static bfd_boolean
section_has_xproperty (segT
, frag_flags_fn
);
11655 static void add_xt_block_frags
11656 (segT
, xtensa_block_info
**, frag_predicate
, frag_predicate
);
11657 static bfd_boolean
xtensa_frag_flags_is_empty (const frag_flags
*);
11658 static void xtensa_frag_flags_init (frag_flags
*);
11659 static void get_frag_property_flags (const fragS
*, frag_flags
*);
11660 static flagword
frag_flags_to_number (const frag_flags
*);
11661 static void add_xt_prop_frags (segT
, xtensa_block_info
**, frag_flags_fn
);
11663 /* Set up property tables after relaxation. */
11666 xtensa_post_relax_hook (void)
11668 xtensa_move_seg_list_to_beginning (literal_head
);
11670 xtensa_find_unmarked_state_frags ();
11671 xtensa_mark_frags_for_org ();
11672 xtensa_mark_difference_of_two_symbols ();
11674 xtensa_create_property_segments (get_frag_is_literal
,
11676 XTENSA_LIT_SEC_NAME
,
11678 xtensa_create_xproperty_segments (get_frag_property_flags
,
11679 XTENSA_PROP_SEC_NAME
,
11682 if (warn_unaligned_branch_targets
)
11683 bfd_map_over_sections (stdoutput
, xtensa_find_unaligned_branch_targets
, 0);
11684 bfd_map_over_sections (stdoutput
, xtensa_find_unaligned_loops
, 0);
11688 /* This function is only meaningful after xtensa_move_literals. */
11691 get_frag_is_literal (const fragS
*fragP
)
11693 gas_assert (fragP
!= NULL
);
11694 return fragP
->tc_frag_data
.is_literal
;
11699 xtensa_create_property_segments (frag_predicate property_function
,
11700 frag_predicate end_property_function
,
11701 const char *section_name_base
,
11702 xt_section_type sec_type
)
11706 /* Walk over all of the current segments.
11707 Walk over each fragment
11708 For each non-empty fragment,
11709 Build a property record (append where possible). */
11711 for (seclist
= &stdoutput
->sections
;
11712 seclist
&& *seclist
;
11713 seclist
= &(*seclist
)->next
)
11715 segT sec
= *seclist
;
11717 if (exclude_section_from_property_tables (sec
))
11720 if (section_has_property (sec
, property_function
))
11722 segment_info_type
*xt_seg_info
;
11723 xtensa_block_info
**xt_blocks
;
11724 segT prop_sec
= xtensa_make_property_section (sec
, section_name_base
);
11726 prop_sec
->output_section
= prop_sec
;
11727 subseg_set (prop_sec
, 0);
11728 xt_seg_info
= seg_info (prop_sec
);
11729 xt_blocks
= &xt_seg_info
->tc_segment_info_data
.blocks
[sec_type
];
11731 /* Walk over all of the frchains here and add new sections. */
11732 add_xt_block_frags (sec
, xt_blocks
, property_function
,
11733 end_property_function
);
11737 /* Now we fill them out.... */
11739 for (seclist
= &stdoutput
->sections
;
11740 seclist
&& *seclist
;
11741 seclist
= &(*seclist
)->next
)
11743 segment_info_type
*seginfo
;
11744 xtensa_block_info
*block
;
11745 segT sec
= *seclist
;
11747 seginfo
= seg_info (sec
);
11748 block
= seginfo
->tc_segment_info_data
.blocks
[sec_type
];
11752 xtensa_block_info
*cur_block
;
11754 bfd_size_type rec_size
;
11756 for (cur_block
= block
; cur_block
; cur_block
= cur_block
->next
)
11759 rec_size
= num_recs
* 8;
11760 bfd_set_section_size (stdoutput
, sec
, rec_size
);
11767 subseg_set (sec
, 0);
11768 frag_data
= frag_more (rec_size
);
11770 for (i
= 0; i
< num_recs
; i
++)
11774 /* Write the fixup. */
11775 gas_assert (cur_block
);
11776 fix
= fix_new (frag_now
, i
* 8, 4,
11777 section_symbol (cur_block
->sec
),
11779 FALSE
, BFD_RELOC_32
);
11780 fix
->fx_file
= "<internal>";
11783 /* Write the length. */
11784 md_number_to_chars (&frag_data
[4 + i
* 8],
11785 cur_block
->size
, 4);
11786 cur_block
= cur_block
->next
;
11788 frag_wane (frag_now
);
11790 frag_wane (frag_now
);
11798 xtensa_create_xproperty_segments (frag_flags_fn flag_fn
,
11799 const char *section_name_base
,
11800 xt_section_type sec_type
)
11804 /* Walk over all of the current segments.
11805 Walk over each fragment.
11806 For each fragment that has instructions,
11807 build an instruction record (append where possible). */
11809 for (seclist
= &stdoutput
->sections
;
11810 seclist
&& *seclist
;
11811 seclist
= &(*seclist
)->next
)
11813 segT sec
= *seclist
;
11815 if (exclude_section_from_property_tables (sec
))
11818 if (section_has_xproperty (sec
, flag_fn
))
11820 segment_info_type
*xt_seg_info
;
11821 xtensa_block_info
**xt_blocks
;
11822 segT prop_sec
= xtensa_make_property_section (sec
, section_name_base
);
11824 prop_sec
->output_section
= prop_sec
;
11825 subseg_set (prop_sec
, 0);
11826 xt_seg_info
= seg_info (prop_sec
);
11827 xt_blocks
= &xt_seg_info
->tc_segment_info_data
.blocks
[sec_type
];
11829 /* Walk over all of the frchains here and add new sections. */
11830 add_xt_prop_frags (sec
, xt_blocks
, flag_fn
);
11834 /* Now we fill them out.... */
11836 for (seclist
= &stdoutput
->sections
;
11837 seclist
&& *seclist
;
11838 seclist
= &(*seclist
)->next
)
11840 segment_info_type
*seginfo
;
11841 xtensa_block_info
*block
;
11842 segT sec
= *seclist
;
11844 seginfo
= seg_info (sec
);
11845 block
= seginfo
->tc_segment_info_data
.blocks
[sec_type
];
11849 xtensa_block_info
*cur_block
;
11851 bfd_size_type rec_size
;
11853 for (cur_block
= block
; cur_block
; cur_block
= cur_block
->next
)
11856 rec_size
= num_recs
* (8 + 4);
11857 bfd_set_section_size (stdoutput
, sec
, rec_size
);
11858 /* elf_section_data (sec)->this_hdr.sh_entsize = 12; */
11865 subseg_set (sec
, 0);
11866 frag_data
= frag_more (rec_size
);
11868 for (i
= 0; i
< num_recs
; i
++)
11872 /* Write the fixup. */
11873 gas_assert (cur_block
);
11874 fix
= fix_new (frag_now
, i
* 12, 4,
11875 section_symbol (cur_block
->sec
),
11877 FALSE
, BFD_RELOC_32
);
11878 fix
->fx_file
= "<internal>";
11881 /* Write the length. */
11882 md_number_to_chars (&frag_data
[4 + i
* 12],
11883 cur_block
->size
, 4);
11884 md_number_to_chars (&frag_data
[8 + i
* 12],
11885 frag_flags_to_number (&cur_block
->flags
),
11886 sizeof (flagword
));
11887 cur_block
= cur_block
->next
;
11889 frag_wane (frag_now
);
11891 frag_wane (frag_now
);
11899 exclude_section_from_property_tables (segT sec
)
11901 flagword flags
= bfd_get_section_flags (stdoutput
, sec
);
11903 /* Sections that don't contribute to the memory footprint are excluded. */
11904 if ((flags
& SEC_DEBUGGING
)
11905 || !(flags
& SEC_ALLOC
)
11906 || (flags
& SEC_MERGE
))
11909 /* Linker cie and fde optimizations mess up property entries for
11910 eh_frame sections, but there is nothing inside them relevant to
11911 property tables anyway. */
11912 if (strcmp (sec
->name
, ".eh_frame") == 0)
11920 section_has_property (segT sec
, frag_predicate property_function
)
11922 segment_info_type
*seginfo
= seg_info (sec
);
11925 if (seginfo
&& seginfo
->frchainP
)
11927 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
11929 if (property_function (fragP
)
11930 && (fragP
->fr_type
!= rs_fill
|| fragP
->fr_fix
!= 0))
11939 section_has_xproperty (segT sec
, frag_flags_fn property_function
)
11941 segment_info_type
*seginfo
= seg_info (sec
);
11944 if (seginfo
&& seginfo
->frchainP
)
11946 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
11948 frag_flags prop_flags
;
11949 property_function (fragP
, &prop_flags
);
11950 if (!xtensa_frag_flags_is_empty (&prop_flags
))
11958 /* Two types of block sections exist right now: literal and insns. */
11961 add_xt_block_frags (segT sec
,
11962 xtensa_block_info
**xt_block
,
11963 frag_predicate property_function
,
11964 frag_predicate end_property_function
)
11968 /* Build it if needed. */
11969 while (*xt_block
!= NULL
)
11970 xt_block
= &(*xt_block
)->next
;
11971 /* We are either at NULL at the beginning or at the end. */
11973 /* Walk through the frags. */
11974 if (seg_info (sec
)->frchainP
)
11976 for (fragP
= seg_info (sec
)->frchainP
->frch_root
;
11978 fragP
= fragP
->fr_next
)
11980 if (property_function (fragP
)
11981 && (fragP
->fr_type
!= rs_fill
|| fragP
->fr_fix
!= 0))
11983 if (*xt_block
!= NULL
)
11985 if ((*xt_block
)->offset
+ (*xt_block
)->size
11986 == fragP
->fr_address
)
11987 (*xt_block
)->size
+= fragP
->fr_fix
;
11989 xt_block
= &((*xt_block
)->next
);
11991 if (*xt_block
== NULL
)
11993 xtensa_block_info
*new_block
= (xtensa_block_info
*)
11994 xmalloc (sizeof (xtensa_block_info
));
11995 new_block
->sec
= sec
;
11996 new_block
->offset
= fragP
->fr_address
;
11997 new_block
->size
= fragP
->fr_fix
;
11998 new_block
->next
= NULL
;
11999 xtensa_frag_flags_init (&new_block
->flags
);
12000 *xt_block
= new_block
;
12002 if (end_property_function
12003 && end_property_function (fragP
))
12005 xt_block
= &((*xt_block
)->next
);
12013 /* Break the encapsulation of add_xt_prop_frags here. */
12016 xtensa_frag_flags_is_empty (const frag_flags
*prop_flags
)
12018 if (prop_flags
->is_literal
12019 || prop_flags
->is_insn
12020 || prop_flags
->is_data
12021 || prop_flags
->is_unreachable
)
12028 xtensa_frag_flags_init (frag_flags
*prop_flags
)
12030 memset (prop_flags
, 0, sizeof (frag_flags
));
12035 get_frag_property_flags (const fragS
*fragP
, frag_flags
*prop_flags
)
12037 xtensa_frag_flags_init (prop_flags
);
12038 if (fragP
->tc_frag_data
.is_literal
)
12039 prop_flags
->is_literal
= TRUE
;
12040 if (fragP
->tc_frag_data
.is_specific_opcode
12041 || fragP
->tc_frag_data
.is_no_transform
)
12043 prop_flags
->is_no_transform
= TRUE
;
12044 if (xtensa_frag_flags_is_empty (prop_flags
))
12045 prop_flags
->is_data
= TRUE
;
12047 if (fragP
->tc_frag_data
.is_unreachable
)
12048 prop_flags
->is_unreachable
= TRUE
;
12049 else if (fragP
->tc_frag_data
.is_insn
)
12051 prop_flags
->is_insn
= TRUE
;
12052 if (fragP
->tc_frag_data
.is_loop_target
)
12053 prop_flags
->insn
.is_loop_target
= TRUE
;
12054 if (fragP
->tc_frag_data
.is_branch_target
)
12055 prop_flags
->insn
.is_branch_target
= TRUE
;
12056 if (fragP
->tc_frag_data
.is_no_density
)
12057 prop_flags
->insn
.is_no_density
= TRUE
;
12058 if (fragP
->tc_frag_data
.use_absolute_literals
)
12059 prop_flags
->insn
.is_abslit
= TRUE
;
12061 if (fragP
->tc_frag_data
.is_align
)
12063 prop_flags
->is_align
= TRUE
;
12064 prop_flags
->alignment
= fragP
->tc_frag_data
.alignment
;
12065 if (xtensa_frag_flags_is_empty (prop_flags
))
12066 prop_flags
->is_data
= TRUE
;
12072 frag_flags_to_number (const frag_flags
*prop_flags
)
12075 if (prop_flags
->is_literal
)
12076 num
|= XTENSA_PROP_LITERAL
;
12077 if (prop_flags
->is_insn
)
12078 num
|= XTENSA_PROP_INSN
;
12079 if (prop_flags
->is_data
)
12080 num
|= XTENSA_PROP_DATA
;
12081 if (prop_flags
->is_unreachable
)
12082 num
|= XTENSA_PROP_UNREACHABLE
;
12083 if (prop_flags
->insn
.is_loop_target
)
12084 num
|= XTENSA_PROP_INSN_LOOP_TARGET
;
12085 if (prop_flags
->insn
.is_branch_target
)
12087 num
|= XTENSA_PROP_INSN_BRANCH_TARGET
;
12088 num
= SET_XTENSA_PROP_BT_ALIGN (num
, prop_flags
->insn
.bt_align_priority
);
12091 if (prop_flags
->insn
.is_no_density
)
12092 num
|= XTENSA_PROP_INSN_NO_DENSITY
;
12093 if (prop_flags
->is_no_transform
)
12094 num
|= XTENSA_PROP_NO_TRANSFORM
;
12095 if (prop_flags
->insn
.is_no_reorder
)
12096 num
|= XTENSA_PROP_INSN_NO_REORDER
;
12097 if (prop_flags
->insn
.is_abslit
)
12098 num
|= XTENSA_PROP_INSN_ABSLIT
;
12100 if (prop_flags
->is_align
)
12102 num
|= XTENSA_PROP_ALIGN
;
12103 num
= SET_XTENSA_PROP_ALIGNMENT (num
, prop_flags
->alignment
);
12111 xtensa_frag_flags_combinable (const frag_flags
*prop_flags_1
,
12112 const frag_flags
*prop_flags_2
)
12114 /* Cannot combine with an end marker. */
12116 if (prop_flags_1
->is_literal
!= prop_flags_2
->is_literal
)
12118 if (prop_flags_1
->is_insn
!= prop_flags_2
->is_insn
)
12120 if (prop_flags_1
->is_data
!= prop_flags_2
->is_data
)
12123 if (prop_flags_1
->is_insn
)
12125 /* Properties of the beginning of the frag. */
12126 if (prop_flags_2
->insn
.is_loop_target
)
12128 if (prop_flags_2
->insn
.is_branch_target
)
12130 if (prop_flags_1
->insn
.is_no_density
!=
12131 prop_flags_2
->insn
.is_no_density
)
12133 if (prop_flags_1
->is_no_transform
!=
12134 prop_flags_2
->is_no_transform
)
12136 if (prop_flags_1
->insn
.is_no_reorder
!=
12137 prop_flags_2
->insn
.is_no_reorder
)
12139 if (prop_flags_1
->insn
.is_abslit
!=
12140 prop_flags_2
->insn
.is_abslit
)
12144 if (prop_flags_1
->is_align
)
12152 xt_block_aligned_size (const xtensa_block_info
*xt_block
)
12155 unsigned align_bits
;
12157 if (!xt_block
->flags
.is_align
)
12158 return xt_block
->size
;
12160 end_addr
= xt_block
->offset
+ xt_block
->size
;
12161 align_bits
= xt_block
->flags
.alignment
;
12162 end_addr
= ((end_addr
+ ((1 << align_bits
) -1)) >> align_bits
) << align_bits
;
12163 return end_addr
- xt_block
->offset
;
12168 xtensa_xt_block_combine (xtensa_block_info
*xt_block
,
12169 const xtensa_block_info
*xt_block_2
)
12171 if (xt_block
->sec
!= xt_block_2
->sec
)
12173 if (xt_block
->offset
+ xt_block_aligned_size (xt_block
)
12174 != xt_block_2
->offset
)
12177 if (xt_block_2
->size
== 0
12178 && (!xt_block_2
->flags
.is_unreachable
12179 || xt_block
->flags
.is_unreachable
))
12181 if (xt_block_2
->flags
.is_align
12182 && xt_block
->flags
.is_align
)
12184 /* Nothing needed. */
12185 if (xt_block
->flags
.alignment
>= xt_block_2
->flags
.alignment
)
12190 if (xt_block_2
->flags
.is_align
)
12192 /* Push alignment to previous entry. */
12193 xt_block
->flags
.is_align
= xt_block_2
->flags
.is_align
;
12194 xt_block
->flags
.alignment
= xt_block_2
->flags
.alignment
;
12199 if (!xtensa_frag_flags_combinable (&xt_block
->flags
,
12200 &xt_block_2
->flags
))
12203 xt_block
->size
+= xt_block_2
->size
;
12205 if (xt_block_2
->flags
.is_align
)
12207 xt_block
->flags
.is_align
= TRUE
;
12208 xt_block
->flags
.alignment
= xt_block_2
->flags
.alignment
;
12216 add_xt_prop_frags (segT sec
,
12217 xtensa_block_info
**xt_block
,
12218 frag_flags_fn property_function
)
12222 /* Build it if needed. */
12223 while (*xt_block
!= NULL
)
12225 xt_block
= &(*xt_block
)->next
;
12227 /* We are either at NULL at the beginning or at the end. */
12229 /* Walk through the frags. */
12230 if (seg_info (sec
)->frchainP
)
12232 for (fragP
= seg_info (sec
)->frchainP
->frch_root
; fragP
;
12233 fragP
= fragP
->fr_next
)
12235 xtensa_block_info tmp_block
;
12236 tmp_block
.sec
= sec
;
12237 tmp_block
.offset
= fragP
->fr_address
;
12238 tmp_block
.size
= fragP
->fr_fix
;
12239 tmp_block
.next
= NULL
;
12240 property_function (fragP
, &tmp_block
.flags
);
12242 if (!xtensa_frag_flags_is_empty (&tmp_block
.flags
))
12243 /* && fragP->fr_fix != 0) */
12245 if ((*xt_block
) == NULL
12246 || !xtensa_xt_block_combine (*xt_block
, &tmp_block
))
12248 xtensa_block_info
*new_block
;
12249 if ((*xt_block
) != NULL
)
12250 xt_block
= &(*xt_block
)->next
;
12251 new_block
= (xtensa_block_info
*)
12252 xmalloc (sizeof (xtensa_block_info
));
12253 *new_block
= tmp_block
;
12254 *xt_block
= new_block
;
12262 /* op_placement_info_table */
12264 /* op_placement_info makes it easier to determine which
12265 ops can go in which slots. */
12268 init_op_placement_info_table (void)
12270 xtensa_isa isa
= xtensa_default_isa
;
12271 xtensa_insnbuf ibuf
= xtensa_insnbuf_alloc (isa
);
12272 xtensa_opcode opcode
;
12275 int num_opcodes
= xtensa_isa_num_opcodes (isa
);
12277 op_placement_table
= (op_placement_info_table
)
12278 xmalloc (sizeof (op_placement_info
) * num_opcodes
);
12279 gas_assert (xtensa_isa_num_formats (isa
) < MAX_FORMATS
);
12281 for (opcode
= 0; opcode
< num_opcodes
; opcode
++)
12283 op_placement_info
*opi
= &op_placement_table
[opcode
];
12284 /* FIXME: Make tinsn allocation dynamic. */
12285 if (xtensa_opcode_num_operands (isa
, opcode
) > MAX_INSN_ARGS
)
12286 as_fatal (_("too many operands in instruction"));
12287 opi
->narrowest
= XTENSA_UNDEFINED
;
12288 opi
->narrowest_size
= 0x7F;
12289 opi
->narrowest_slot
= 0;
12291 opi
->num_formats
= 0;
12293 for (fmt
= 0; fmt
< xtensa_isa_num_formats (isa
); fmt
++)
12295 opi
->slots
[fmt
] = 0;
12296 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
12298 if (xtensa_opcode_encode (isa
, fmt
, slot
, ibuf
, opcode
) == 0)
12300 int fmt_length
= xtensa_format_length (isa
, fmt
);
12302 set_bit (fmt
, opi
->formats
);
12303 set_bit (slot
, opi
->slots
[fmt
]);
12304 if (fmt_length
< opi
->narrowest_size
12305 || (fmt_length
== opi
->narrowest_size
12306 && (xtensa_format_num_slots (isa
, fmt
)
12307 < xtensa_format_num_slots (isa
,
12310 opi
->narrowest
= fmt
;
12311 opi
->narrowest_size
= fmt_length
;
12312 opi
->narrowest_slot
= slot
;
12317 opi
->num_formats
++;
12320 xtensa_insnbuf_free (isa
, ibuf
);
12325 opcode_fits_format_slot (xtensa_opcode opcode
, xtensa_format fmt
, int slot
)
12327 return bit_is_set (slot
, op_placement_table
[opcode
].slots
[fmt
]);
12331 /* If the opcode is available in a single slot format, return its size. */
12334 xg_get_single_size (xtensa_opcode opcode
)
12336 return op_placement_table
[opcode
].narrowest_size
;
12340 static xtensa_format
12341 xg_get_single_format (xtensa_opcode opcode
)
12343 return op_placement_table
[opcode
].narrowest
;
12348 xg_get_single_slot (xtensa_opcode opcode
)
12350 return op_placement_table
[opcode
].narrowest_slot
;
12354 /* Instruction Stack Functions (from "xtensa-istack.h"). */
12357 istack_init (IStack
*stack
)
12364 istack_empty (IStack
*stack
)
12366 return (stack
->ninsn
== 0);
12371 istack_full (IStack
*stack
)
12373 return (stack
->ninsn
== MAX_ISTACK
);
12377 /* Return a pointer to the top IStack entry.
12378 It is an error to call this if istack_empty () is TRUE. */
12381 istack_top (IStack
*stack
)
12383 int rec
= stack
->ninsn
- 1;
12384 gas_assert (!istack_empty (stack
));
12385 return &stack
->insn
[rec
];
12389 /* Add a new TInsn to an IStack.
12390 It is an error to call this if istack_full () is TRUE. */
12393 istack_push (IStack
*stack
, TInsn
*insn
)
12395 int rec
= stack
->ninsn
;
12396 gas_assert (!istack_full (stack
));
12397 stack
->insn
[rec
] = *insn
;
12402 /* Clear space for the next TInsn on the IStack and return a pointer
12403 to it. It is an error to call this if istack_full () is TRUE. */
12406 istack_push_space (IStack
*stack
)
12408 int rec
= stack
->ninsn
;
12410 gas_assert (!istack_full (stack
));
12411 insn
= &stack
->insn
[rec
];
12418 /* Remove the last pushed instruction. It is an error to call this if
12419 istack_empty () returns TRUE. */
12422 istack_pop (IStack
*stack
)
12424 int rec
= stack
->ninsn
- 1;
12425 gas_assert (!istack_empty (stack
));
12427 tinsn_init (&stack
->insn
[rec
]);
12431 /* TInsn functions. */
12434 tinsn_init (TInsn
*dst
)
12436 memset (dst
, 0, sizeof (TInsn
));
12440 /* Return TRUE if ANY of the operands in the insn are symbolic. */
12443 tinsn_has_symbolic_operands (const TInsn
*insn
)
12446 int n
= insn
->ntok
;
12448 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12450 for (i
= 0; i
< n
; ++i
)
12452 switch (insn
->tok
[i
].X_op
)
12466 tinsn_has_invalid_symbolic_operands (const TInsn
*insn
)
12468 xtensa_isa isa
= xtensa_default_isa
;
12470 int n
= insn
->ntok
;
12472 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12474 for (i
= 0; i
< n
; ++i
)
12476 switch (insn
->tok
[i
].X_op
)
12484 /* Errors for these types are caught later. */
12489 /* Symbolic immediates are only allowed on the last immediate
12490 operand. At this time, CONST16 is the only opcode where we
12491 support non-PC-relative relocations. */
12492 if (i
!= get_relaxable_immed (insn
->opcode
)
12493 || (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) != 1
12494 && insn
->opcode
!= xtensa_const16_opcode
))
12496 as_bad (_("invalid symbolic operand"));
12505 /* For assembly code with complex expressions (e.g. subtraction),
12506 we have to build them in the literal pool so that
12507 their results are calculated correctly after relaxation.
12508 The relaxation only handles expressions that
12509 boil down to SYMBOL + OFFSET. */
12512 tinsn_has_complex_operands (const TInsn
*insn
)
12515 int n
= insn
->ntok
;
12516 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12517 for (i
= 0; i
< n
; ++i
)
12519 switch (insn
->tok
[i
].X_op
)
12535 /* Encode a TInsn opcode and its constant operands into slotbuf.
12536 Return TRUE if there is a symbol in the immediate field. This
12537 function assumes that:
12538 1) The number of operands are correct.
12539 2) The insn_type is ITYPE_INSN.
12540 3) The opcode can be encoded in the specified format and slot.
12541 4) Operands are either O_constant or O_symbol, and all constants fit. */
12544 tinsn_to_slotbuf (xtensa_format fmt
,
12547 xtensa_insnbuf slotbuf
)
12549 xtensa_isa isa
= xtensa_default_isa
;
12550 xtensa_opcode opcode
= tinsn
->opcode
;
12551 bfd_boolean has_fixup
= FALSE
;
12552 int noperands
= xtensa_opcode_num_operands (isa
, opcode
);
12555 gas_assert (tinsn
->insn_type
== ITYPE_INSN
);
12556 if (noperands
!= tinsn
->ntok
)
12557 as_fatal (_("operand number mismatch"));
12559 if (xtensa_opcode_encode (isa
, fmt
, slot
, slotbuf
, opcode
))
12561 as_bad (_("cannot encode opcode \"%s\" in the given format \"%s\""),
12562 xtensa_opcode_name (isa
, opcode
), xtensa_format_name (isa
, fmt
));
12566 for (i
= 0; i
< noperands
; i
++)
12568 expressionS
*exp
= &tinsn
->tok
[i
];
12571 const char *file_name
;
12577 if (xtensa_operand_is_visible (isa
, opcode
, i
) == 0)
12579 /* The register number has already been checked in
12580 expression_maybe_register, so we don't need to check here. */
12581 opnd_value
= exp
->X_add_number
;
12582 (void) xtensa_operand_encode (isa
, opcode
, i
, &opnd_value
);
12583 rc
= xtensa_operand_set_field (isa
, opcode
, i
, fmt
, slot
, slotbuf
,
12586 as_warn (_("xtensa-isa failure: %s"), xtensa_isa_error_msg (isa
));
12590 if (xtensa_operand_is_visible (isa
, opcode
, i
) == 0)
12592 file_name
= as_where (&line
);
12593 /* It is a constant and we called this function
12594 then we have to try to fit it. */
12595 xtensa_insnbuf_set_operand (slotbuf
, fmt
, slot
, opcode
, i
,
12596 exp
->X_add_number
, file_name
, line
);
12609 /* Encode a single TInsn into an insnbuf. If the opcode can only be encoded
12610 into a multi-slot instruction, fill the other slots with NOPs.
12611 Return TRUE if there is a symbol in the immediate field. See also the
12612 assumptions listed for tinsn_to_slotbuf. */
12615 tinsn_to_insnbuf (TInsn
*tinsn
, xtensa_insnbuf insnbuf
)
12617 static xtensa_insnbuf slotbuf
= 0;
12618 static vliw_insn vinsn
;
12619 xtensa_isa isa
= xtensa_default_isa
;
12620 bfd_boolean has_fixup
= FALSE
;
12625 slotbuf
= xtensa_insnbuf_alloc (isa
);
12626 xg_init_vinsn (&vinsn
);
12629 xg_clear_vinsn (&vinsn
);
12631 bundle_tinsn (tinsn
, &vinsn
);
12633 xtensa_format_encode (isa
, vinsn
.format
, insnbuf
);
12635 for (i
= 0; i
< vinsn
.num_slots
; i
++)
12637 /* Only one slot may have a fix-up because the rest contains NOPs. */
12639 tinsn_to_slotbuf (vinsn
.format
, i
, &vinsn
.slots
[i
], vinsn
.slotbuf
[i
]);
12640 xtensa_format_set_slot (isa
, vinsn
.format
, i
, insnbuf
, vinsn
.slotbuf
[i
]);
12647 /* Check the instruction arguments. Return TRUE on failure. */
12650 tinsn_check_arguments (const TInsn
*insn
)
12652 xtensa_isa isa
= xtensa_default_isa
;
12653 xtensa_opcode opcode
= insn
->opcode
;
12654 xtensa_regfile t1_regfile
, t2_regfile
;
12655 int t1_reg
, t2_reg
;
12656 int t1_base_reg
, t1_last_reg
;
12657 int t2_base_reg
, t2_last_reg
;
12658 char t1_inout
, t2_inout
;
12661 if (opcode
== XTENSA_UNDEFINED
)
12663 as_bad (_("invalid opcode"));
12667 if (xtensa_opcode_num_operands (isa
, opcode
) > insn
->ntok
)
12669 as_bad (_("too few operands"));
12673 if (xtensa_opcode_num_operands (isa
, opcode
) < insn
->ntok
)
12675 as_bad (_("too many operands"));
12679 /* Check registers. */
12680 for (j
= 0; j
< insn
->ntok
; j
++)
12682 if (xtensa_operand_is_register (isa
, insn
->opcode
, j
) != 1)
12685 t2_regfile
= xtensa_operand_regfile (isa
, insn
->opcode
, j
);
12686 t2_base_reg
= insn
->tok
[j
].X_add_number
;
12688 = t2_base_reg
+ xtensa_operand_num_regs (isa
, insn
->opcode
, j
);
12690 for (i
= 0; i
< insn
->ntok
; i
++)
12695 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) != 1)
12698 t1_regfile
= xtensa_operand_regfile (isa
, insn
->opcode
, i
);
12700 if (t1_regfile
!= t2_regfile
)
12703 t1_inout
= xtensa_operand_inout (isa
, insn
->opcode
, i
);
12704 t2_inout
= xtensa_operand_inout (isa
, insn
->opcode
, j
);
12706 t1_base_reg
= insn
->tok
[i
].X_add_number
;
12707 t1_last_reg
= (t1_base_reg
12708 + xtensa_operand_num_regs (isa
, insn
->opcode
, i
));
12710 for (t1_reg
= t1_base_reg
; t1_reg
< t1_last_reg
; t1_reg
++)
12712 for (t2_reg
= t2_base_reg
; t2_reg
< t2_last_reg
; t2_reg
++)
12714 if (t1_reg
!= t2_reg
)
12717 if (t1_inout
!= 'i' && t2_inout
!= 'i')
12719 as_bad (_("multiple writes to the same register"));
12730 /* Load an instruction from its encoded form. */
12733 tinsn_from_chars (TInsn
*tinsn
, char *f
, int slot
)
12737 xg_init_vinsn (&vinsn
);
12738 vinsn_from_chars (&vinsn
, f
);
12740 *tinsn
= vinsn
.slots
[slot
];
12741 xg_free_vinsn (&vinsn
);
12746 tinsn_from_insnbuf (TInsn
*tinsn
,
12747 xtensa_insnbuf slotbuf
,
12752 xtensa_isa isa
= xtensa_default_isa
;
12754 /* Find the immed. */
12755 tinsn_init (tinsn
);
12756 tinsn
->insn_type
= ITYPE_INSN
;
12757 tinsn
->is_specific_opcode
= FALSE
; /* must not be specific */
12758 tinsn
->opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
12759 tinsn
->ntok
= xtensa_opcode_num_operands (isa
, tinsn
->opcode
);
12760 for (i
= 0; i
< tinsn
->ntok
; i
++)
12762 set_expr_const (&tinsn
->tok
[i
],
12763 xtensa_insnbuf_get_operand (slotbuf
, fmt
, slot
,
12764 tinsn
->opcode
, i
));
12769 /* Read the value of the relaxable immed from the fr_symbol and fr_offset. */
12772 tinsn_immed_from_frag (TInsn
*tinsn
, fragS
*fragP
, int slot
)
12774 xtensa_opcode opcode
= tinsn
->opcode
;
12777 if (fragP
->tc_frag_data
.slot_symbols
[slot
])
12779 opnum
= get_relaxable_immed (opcode
);
12780 gas_assert (opnum
>= 0);
12781 set_expr_symbol_offset (&tinsn
->tok
[opnum
],
12782 fragP
->tc_frag_data
.slot_symbols
[slot
],
12783 fragP
->tc_frag_data
.slot_offsets
[slot
]);
12785 tinsn
->extra_arg
= fragP
->tc_frag_data
.free_reg
[slot
];
12790 get_num_stack_text_bytes (IStack
*istack
)
12793 int text_bytes
= 0;
12795 for (i
= 0; i
< istack
->ninsn
; i
++)
12797 TInsn
*tinsn
= &istack
->insn
[i
];
12798 if (tinsn
->insn_type
== ITYPE_INSN
)
12799 text_bytes
+= xg_get_single_size (tinsn
->opcode
);
12806 get_num_stack_literal_bytes (IStack
*istack
)
12811 for (i
= 0; i
< istack
->ninsn
; i
++)
12813 TInsn
*tinsn
= &istack
->insn
[i
];
12814 if (tinsn
->insn_type
== ITYPE_LITERAL
&& tinsn
->ntok
== 1)
12821 /* vliw_insn functions. */
12824 xg_init_vinsn (vliw_insn
*v
)
12827 xtensa_isa isa
= xtensa_default_isa
;
12829 xg_clear_vinsn (v
);
12831 v
->insnbuf
= xtensa_insnbuf_alloc (isa
);
12832 if (v
->insnbuf
== NULL
)
12833 as_fatal (_("out of memory"));
12835 for (i
= 0; i
< config_max_slots
; i
++)
12837 v
->slotbuf
[i
] = xtensa_insnbuf_alloc (isa
);
12838 if (v
->slotbuf
[i
] == NULL
)
12839 as_fatal (_("out of memory"));
12845 xg_clear_vinsn (vliw_insn
*v
)
12849 memset (v
, 0, offsetof (vliw_insn
, slots
)
12850 + sizeof(TInsn
) * config_max_slots
);
12852 v
->format
= XTENSA_UNDEFINED
;
12854 v
->inside_bundle
= FALSE
;
12856 if (xt_saved_debug_type
!= DEBUG_NONE
)
12857 debug_type
= xt_saved_debug_type
;
12859 for (i
= 0; i
< config_max_slots
; i
++)
12860 v
->slots
[i
].opcode
= XTENSA_UNDEFINED
;
12865 xg_copy_vinsn (vliw_insn
*dst
, vliw_insn
*src
)
12868 offsetof(vliw_insn
, slots
) + src
->num_slots
* sizeof(TInsn
));
12869 dst
->insnbuf
= src
->insnbuf
;
12870 memcpy (dst
->slotbuf
, src
->slotbuf
, src
->num_slots
* sizeof(xtensa_insnbuf
));
12875 vinsn_has_specific_opcodes (vliw_insn
*v
)
12879 for (i
= 0; i
< v
->num_slots
; i
++)
12881 if (v
->slots
[i
].is_specific_opcode
)
12889 xg_free_vinsn (vliw_insn
*v
)
12892 xtensa_insnbuf_free (xtensa_default_isa
, v
->insnbuf
);
12893 for (i
= 0; i
< config_max_slots
; i
++)
12894 xtensa_insnbuf_free (xtensa_default_isa
, v
->slotbuf
[i
]);
12898 /* Encode a vliw_insn into an insnbuf. Return TRUE if there are any symbolic
12899 operands. See also the assumptions listed for tinsn_to_slotbuf. */
12902 vinsn_to_insnbuf (vliw_insn
*vinsn
,
12905 bfd_boolean record_fixup
)
12907 xtensa_isa isa
= xtensa_default_isa
;
12908 xtensa_format fmt
= vinsn
->format
;
12909 xtensa_insnbuf insnbuf
= vinsn
->insnbuf
;
12911 bfd_boolean has_fixup
= FALSE
;
12913 xtensa_format_encode (isa
, fmt
, insnbuf
);
12915 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
12917 TInsn
*tinsn
= &vinsn
->slots
[slot
];
12918 expressionS
*extra_arg
= &tinsn
->extra_arg
;
12919 bfd_boolean tinsn_has_fixup
=
12920 tinsn_to_slotbuf (vinsn
->format
, slot
, tinsn
,
12921 vinsn
->slotbuf
[slot
]);
12923 xtensa_format_set_slot (isa
, fmt
, slot
,
12924 insnbuf
, vinsn
->slotbuf
[slot
]);
12925 if (extra_arg
->X_op
!= O_illegal
&& extra_arg
->X_op
!= O_register
)
12927 if (vinsn
->num_slots
!= 1)
12928 as_bad (_("TLS relocation not allowed in FLIX bundle"));
12929 else if (record_fixup
)
12930 /* Instructions that generate TLS relocations should always be
12931 relaxed in the front-end. If "record_fixup" is set, then this
12932 function is being called during back-end relaxation, so flag
12933 the unexpected behavior as an error. */
12934 as_bad (_("unexpected TLS relocation"));
12936 fix_new (fragP
, frag_offset
- fragP
->fr_literal
,
12937 xtensa_format_length (isa
, fmt
),
12938 extra_arg
->X_add_symbol
, extra_arg
->X_add_number
,
12939 FALSE
, map_operator_to_reloc (extra_arg
->X_op
, FALSE
));
12941 if (tinsn_has_fixup
)
12944 xtensa_opcode opcode
= tinsn
->opcode
;
12945 int noperands
= xtensa_opcode_num_operands (isa
, opcode
);
12948 for (i
= 0; i
< noperands
; i
++)
12950 expressionS
* exp
= &tinsn
->tok
[i
];
12956 if (get_relaxable_immed (opcode
) == i
)
12958 /* Add a fix record for the instruction, except if this
12959 function is being called prior to relaxation, i.e.,
12960 if record_fixup is false, and the instruction might
12961 be relaxed later. */
12963 || tinsn
->is_specific_opcode
12964 || !xg_is_relaxable_insn (tinsn
, 0))
12966 xg_add_opcode_fix (tinsn
, i
, fmt
, slot
, exp
, fragP
,
12967 frag_offset
- fragP
->fr_literal
);
12971 if (exp
->X_op
!= O_symbol
)
12972 as_bad (_("invalid operand"));
12973 tinsn
->symbol
= exp
->X_add_symbol
;
12974 tinsn
->offset
= exp
->X_add_number
;
12978 as_bad (_("symbolic operand not allowed"));
12986 as_bad (_("expression too complex"));
12998 vinsn_from_chars (vliw_insn
*vinsn
, char *f
)
13000 static xtensa_insnbuf insnbuf
= NULL
;
13001 static xtensa_insnbuf slotbuf
= NULL
;
13004 xtensa_isa isa
= xtensa_default_isa
;
13008 insnbuf
= xtensa_insnbuf_alloc (isa
);
13009 slotbuf
= xtensa_insnbuf_alloc (isa
);
13012 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) f
, 0);
13013 fmt
= xtensa_format_decode (isa
, insnbuf
);
13014 if (fmt
== XTENSA_UNDEFINED
)
13015 as_fatal (_("cannot decode instruction format"));
13016 vinsn
->format
= fmt
;
13017 vinsn
->num_slots
= xtensa_format_num_slots (isa
, fmt
);
13019 for (i
= 0; i
< vinsn
->num_slots
; i
++)
13021 TInsn
*tinsn
= &vinsn
->slots
[i
];
13022 xtensa_format_get_slot (isa
, fmt
, i
, insnbuf
, slotbuf
);
13023 tinsn_from_insnbuf (tinsn
, slotbuf
, fmt
, i
);
13028 /* Expression utilities. */
13030 /* Return TRUE if the expression is an integer constant. */
13033 expr_is_const (const expressionS
*s
)
13035 return (s
->X_op
== O_constant
);
13039 /* Get the expression constant.
13040 Calling this is illegal if expr_is_const () returns TRUE. */
13043 get_expr_const (const expressionS
*s
)
13045 gas_assert (expr_is_const (s
));
13046 return s
->X_add_number
;
13050 /* Set the expression to a constant value. */
13053 set_expr_const (expressionS
*s
, offsetT val
)
13055 s
->X_op
= O_constant
;
13056 s
->X_add_number
= val
;
13057 s
->X_add_symbol
= NULL
;
13058 s
->X_op_symbol
= NULL
;
13063 expr_is_register (const expressionS
*s
)
13065 return (s
->X_op
== O_register
);
13069 /* Get the expression constant.
13070 Calling this is illegal if expr_is_const () returns TRUE. */
13073 get_expr_register (const expressionS
*s
)
13075 gas_assert (expr_is_register (s
));
13076 return s
->X_add_number
;
13080 /* Set the expression to a symbol + constant offset. */
13083 set_expr_symbol_offset (expressionS
*s
, symbolS
*sym
, offsetT offset
)
13085 s
->X_op
= O_symbol
;
13086 s
->X_add_symbol
= sym
;
13087 s
->X_op_symbol
= NULL
; /* unused */
13088 s
->X_add_number
= offset
;
13092 /* Return TRUE if the two expressions are equal. */
13095 expr_is_equal (expressionS
*s1
, expressionS
*s2
)
13097 if (s1
->X_op
!= s2
->X_op
)
13099 if (s1
->X_add_symbol
!= s2
->X_add_symbol
)
13101 if (s1
->X_op_symbol
!= s2
->X_op_symbol
)
13103 if (s1
->X_add_number
!= s2
->X_add_number
)
13110 copy_expr (expressionS
*dst
, const expressionS
*src
)
13112 memcpy (dst
, src
, sizeof (expressionS
));
13116 /* Support for the "--rename-section" option. */
13118 struct rename_section_struct
13122 struct rename_section_struct
*next
;
13125 static struct rename_section_struct
*section_rename
;
13128 /* Parse the string "oldname=new_name(:oldname2=new_name2)*" and add
13129 entries to the section_rename list. Note: Specifying multiple
13130 renamings separated by colons is not documented and is retained only
13131 for backward compatibility. */
13134 build_section_rename (const char *arg
)
13136 struct rename_section_struct
*r
;
13137 char *this_arg
= NULL
;
13138 char *next_arg
= NULL
;
13140 for (this_arg
= xstrdup (arg
); this_arg
!= NULL
; this_arg
= next_arg
)
13142 char *old_name
, *new_name
;
13146 next_arg
= strchr (this_arg
, ':');
13154 old_name
= this_arg
;
13155 new_name
= strchr (this_arg
, '=');
13157 if (*old_name
== '\0')
13159 as_warn (_("ignoring extra '-rename-section' delimiter ':'"));
13162 if (!new_name
|| new_name
[1] == '\0')
13164 as_warn (_("ignoring invalid '-rename-section' specification: '%s'"),
13171 /* Check for invalid section renaming. */
13172 for (r
= section_rename
; r
!= NULL
; r
= r
->next
)
13174 if (strcmp (r
->old_name
, old_name
) == 0)
13175 as_bad (_("section %s renamed multiple times"), old_name
);
13176 if (strcmp (r
->new_name
, new_name
) == 0)
13177 as_bad (_("multiple sections remapped to output section %s"),
13182 r
= (struct rename_section_struct
*)
13183 xmalloc (sizeof (struct rename_section_struct
));
13184 r
->old_name
= xstrdup (old_name
);
13185 r
->new_name
= xstrdup (new_name
);
13186 r
->next
= section_rename
;
13187 section_rename
= r
;
13193 xtensa_section_rename (char *name
)
13195 struct rename_section_struct
*r
= section_rename
;
13197 for (r
= section_rename
; r
!= NULL
; r
= r
->next
)
13199 if (strcmp (r
->old_name
, name
) == 0)
13200 return r
->new_name
;