1 /* tc-xtensa.c -- Assemble Xtensa instructions.
2 Copyright (C) 2003-2017 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
24 #include "safe-ctype.h"
25 #include "tc-xtensa.h"
27 #include "xtensa-relax.h"
28 #include "dwarf2dbg.h"
29 #include "xtensa-istack.h"
30 #include "struc-symbol.h"
31 #include "xtensa-config.h"
32 #include "elf/xtensa.h"
34 /* Provide default values for new configuration settings. */
40 #define uint32 unsigned int
43 #define int32 signed int
48 Naming conventions (used somewhat inconsistently):
49 The xtensa_ functions are exported
50 The xg_ functions are internal
52 We also have a couple of different extensibility mechanisms.
53 1) The idiom replacement:
54 This is used when a line is first parsed to
55 replace an instruction pattern with another instruction
56 It is currently limited to replacements of instructions
57 with constant operands.
58 2) The xtensa-relax.c mechanism that has stronger instruction
59 replacement patterns. When an instruction's immediate field
60 does not fit the next instruction sequence is attempted.
61 In addition, "narrow" opcodes are supported this way. */
64 /* Define characters with special meanings to GAS. */
65 const char comment_chars
[] = "#";
66 const char line_comment_chars
[] = "#";
67 const char line_separator_chars
[] = ";";
68 const char EXP_CHARS
[] = "eE";
69 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
72 /* Flags to indicate whether the hardware supports the density and
73 absolute literals options. */
75 bfd_boolean density_supported
;
76 bfd_boolean absolute_literals_supported
;
78 static vliw_insn cur_vinsn
;
80 unsigned xtensa_num_pipe_stages
;
81 unsigned xtensa_fetch_width
;
83 static enum debug_info_type xt_saved_debug_type
= DEBUG_NONE
;
85 /* Some functions are only valid in the front end. This variable
86 allows us to assert that we haven't crossed over into the
88 static bfd_boolean past_xtensa_end
= FALSE
;
90 /* Flags for properties of the last instruction in a segment. */
91 #define FLAG_IS_A0_WRITER 0x1
92 #define FLAG_IS_BAD_LOOPEND 0x2
95 /* We define a special segment names ".literal" to place literals
96 into. The .fini and .init sections are special because they
97 contain code that is moved together by the linker. We give them
98 their own special .fini.literal and .init.literal sections. */
100 #define LITERAL_SECTION_NAME xtensa_section_rename (".literal")
101 #define LIT4_SECTION_NAME xtensa_section_rename (".lit4")
102 #define INIT_SECTION_NAME xtensa_section_rename (".init")
103 #define FINI_SECTION_NAME xtensa_section_rename (".fini")
106 /* This type is used for the directive_stack to keep track of the
107 state of the literal collection pools. If lit_prefix is set, it is
108 used to determine the literal section names; otherwise, the literal
109 sections are determined based on the current text section. The
110 lit_seg and lit4_seg fields cache these literal sections, with the
111 current_text_seg field used a tag to indicate whether the cached
114 typedef struct lit_state_struct
117 segT current_text_seg
;
122 static lit_state default_lit_sections
;
125 /* We keep a list of literal segments. The seg_list type is the node
126 for this list. The literal_head pointer is the head of the list,
127 with the literal_head_h dummy node at the start. */
129 typedef struct seg_list_struct
131 struct seg_list_struct
*next
;
135 static seg_list literal_head_h
;
136 static seg_list
*literal_head
= &literal_head_h
;
139 /* Lists of symbols. We keep a list of symbols that label the current
140 instruction, so that we can adjust the symbols when inserting alignment
141 for various instructions. We also keep a list of all the symbols on
142 literals, so that we can fix up those symbols when the literals are
143 later moved into the text sections. */
145 typedef struct sym_list_struct
147 struct sym_list_struct
*next
;
151 static sym_list
*insn_labels
= NULL
;
152 static sym_list
*free_insn_labels
= NULL
;
153 static sym_list
*saved_insn_labels
= NULL
;
155 static sym_list
*literal_syms
;
158 /* Flags to determine whether to prefer const16 or l32r
159 if both options are available. */
160 int prefer_const16
= 0;
163 /* Global flag to indicate when we are emitting literals. */
164 int generating_literals
= 0;
166 /* The following PROPERTY table definitions are copied from
167 <elf/xtensa.h> and must be kept in sync with the code there. */
169 /* Flags in the property tables to specify whether blocks of memory
170 are literals, instructions, data, or unreachable. For
171 instructions, blocks that begin loop targets and branch targets are
172 designated. Blocks that do not allow density, instruction
173 reordering or transformation are also specified. Finally, for
174 branch targets, branch target alignment priority is included.
175 Alignment of the next block is specified in the current block
176 and the size of the current block does not include any fill required
177 to align to the next block. */
179 #define XTENSA_PROP_LITERAL 0x00000001
180 #define XTENSA_PROP_INSN 0x00000002
181 #define XTENSA_PROP_DATA 0x00000004
182 #define XTENSA_PROP_UNREACHABLE 0x00000008
183 /* Instruction only properties at beginning of code. */
184 #define XTENSA_PROP_INSN_LOOP_TARGET 0x00000010
185 #define XTENSA_PROP_INSN_BRANCH_TARGET 0x00000020
186 /* Instruction only properties about code. */
187 #define XTENSA_PROP_INSN_NO_DENSITY 0x00000040
188 #define XTENSA_PROP_INSN_NO_REORDER 0x00000080
189 /* Historically, NO_TRANSFORM was a property of instructions,
190 but it should apply to literals under certain circumstances. */
191 #define XTENSA_PROP_NO_TRANSFORM 0x00000100
193 /* Branch target alignment information. This transmits information
194 to the linker optimization about the priority of aligning a
195 particular block for branch target alignment: None, low priority,
196 high priority, or required. These only need to be checked in
197 instruction blocks marked as XTENSA_PROP_INSN_BRANCH_TARGET.
200 switch (GET_XTENSA_PROP_BT_ALIGN (flags))
201 case XTENSA_PROP_BT_ALIGN_NONE:
202 case XTENSA_PROP_BT_ALIGN_LOW:
203 case XTENSA_PROP_BT_ALIGN_HIGH:
204 case XTENSA_PROP_BT_ALIGN_REQUIRE:
206 #define XTENSA_PROP_BT_ALIGN_MASK 0x00000600
208 /* No branch target alignment. */
209 #define XTENSA_PROP_BT_ALIGN_NONE 0x0
210 /* Low priority branch target alignment. */
211 #define XTENSA_PROP_BT_ALIGN_LOW 0x1
212 /* High priority branch target alignment. */
213 #define XTENSA_PROP_BT_ALIGN_HIGH 0x2
214 /* Required branch target alignment. */
215 #define XTENSA_PROP_BT_ALIGN_REQUIRE 0x3
217 #define SET_XTENSA_PROP_BT_ALIGN(flag, align) \
218 (((flag) & (~XTENSA_PROP_BT_ALIGN_MASK)) | \
219 (((align) << 9) & XTENSA_PROP_BT_ALIGN_MASK))
222 /* Alignment is specified in the block BEFORE the one that needs
223 alignment. Up to 5 bits. Use GET_XTENSA_PROP_ALIGNMENT(flags) to
224 get the required alignment specified as a power of 2. Use
225 SET_XTENSA_PROP_ALIGNMENT(flags, pow2) to set the required
226 alignment. Be careful of side effects since the SET will evaluate
227 flags twice. Also, note that the SIZE of a block in the property
228 table does not include the alignment size, so the alignment fill
229 must be calculated to determine if two blocks are contiguous.
230 TEXT_ALIGN is not currently implemented but is a placeholder for a
231 possible future implementation. */
233 #define XTENSA_PROP_ALIGN 0x00000800
235 #define XTENSA_PROP_ALIGNMENT_MASK 0x0001f000
237 #define SET_XTENSA_PROP_ALIGNMENT(flag, align) \
238 (((flag) & (~XTENSA_PROP_ALIGNMENT_MASK)) | \
239 (((align) << 12) & XTENSA_PROP_ALIGNMENT_MASK))
241 #define XTENSA_PROP_INSN_ABSLIT 0x00020000
244 /* Structure for saving instruction and alignment per-fragment data
245 that will be written to the object file. This structure is
246 equivalent to the actual data that will be written out to the file
247 but is easier to use. We provide a conversion to file flags
248 in frag_flags_to_number. */
250 typedef struct frag_flags_struct frag_flags
;
252 struct frag_flags_struct
254 /* is_literal should only be used after xtensa_move_literals.
255 If you need to check if you are generating a literal fragment,
256 then use the generating_literals global. */
258 unsigned is_literal
: 1;
259 unsigned is_insn
: 1;
260 unsigned is_data
: 1;
261 unsigned is_unreachable
: 1;
263 /* is_specific_opcode implies no_transform. */
264 unsigned is_no_transform
: 1;
268 unsigned is_loop_target
: 1;
269 unsigned is_branch_target
: 1; /* Branch targets have a priority. */
270 unsigned bt_align_priority
: 2;
272 unsigned is_no_density
: 1;
273 /* no_longcalls flag does not need to be placed in the object file. */
275 unsigned is_no_reorder
: 1;
277 /* Uses absolute literal addressing for l32r. */
278 unsigned is_abslit
: 1;
280 unsigned is_align
: 1;
281 unsigned alignment
: 5;
285 /* Structure for saving information about a block of property data
286 for frags that have the same flags. */
287 struct xtensa_block_info_struct
293 struct xtensa_block_info_struct
*next
;
297 /* Structure for saving the current state before emitting literals. */
298 typedef struct emit_state_struct
303 int generating_literals
;
307 /* Opcode placement information */
309 typedef unsigned long long bitfield
;
310 #define bit_is_set(bit, bf) ((bf) & (0x01ll << (bit)))
311 #define set_bit(bit, bf) ((bf) |= (0x01ll << (bit)))
312 #define clear_bit(bit, bf) ((bf) &= ~(0x01ll << (bit)))
314 #define MAX_FORMATS 32
316 typedef struct op_placement_info_struct
319 /* A number describing how restrictive the issue is for this
320 opcode. For example, an opcode that fits lots of different
321 formats has a high freedom, as does an opcode that fits
322 only one format but many slots in that format. The most
323 restrictive is the opcode that fits only one slot in one
326 xtensa_format narrowest
;
330 /* formats is a bitfield with the Nth bit set
331 if the opcode fits in the Nth xtensa_format. */
334 /* slots[N]'s Mth bit is set if the op fits in the
335 Mth slot of the Nth xtensa_format. */
336 bitfield slots
[MAX_FORMATS
];
338 /* A count of the number of slots in a given format
339 an op can fit (i.e., the bitcount of the slot field above). */
340 char slots_in_format
[MAX_FORMATS
];
342 } op_placement_info
, *op_placement_info_table
;
344 op_placement_info_table op_placement_table
;
347 /* Extra expression types. */
349 #define O_pltrel O_md1 /* like O_symbol but use a PLT reloc */
350 #define O_hi16 O_md2 /* use high 16 bits of symbolic value */
351 #define O_lo16 O_md3 /* use low 16 bits of symbolic value */
352 #define O_pcrel O_md4 /* value is a PC-relative offset */
353 #define O_tlsfunc O_md5 /* TLS_FUNC/TLSDESC_FN relocation */
354 #define O_tlsarg O_md6 /* TLS_ARG/TLSDESC_ARG relocation */
355 #define O_tlscall O_md7 /* TLS_CALL relocation */
356 #define O_tpoff O_md8 /* TPOFF relocation */
357 #define O_dtpoff O_md9 /* DTPOFF relocation */
359 struct suffix_reloc_map
363 bfd_reloc_code_real_type reloc
;
367 #define SUFFIX_MAP(str, reloc, op) { str, sizeof (str) - 1, reloc, op }
369 static struct suffix_reloc_map suffix_relocs
[] =
371 SUFFIX_MAP ("l", BFD_RELOC_LO16
, O_lo16
),
372 SUFFIX_MAP ("h", BFD_RELOC_HI16
, O_hi16
),
373 SUFFIX_MAP ("plt", BFD_RELOC_XTENSA_PLT
, O_pltrel
),
374 SUFFIX_MAP ("pcrel", BFD_RELOC_32_PCREL
, O_pcrel
),
375 SUFFIX_MAP ("tlsfunc", BFD_RELOC_XTENSA_TLS_FUNC
, O_tlsfunc
),
376 SUFFIX_MAP ("tlsarg", BFD_RELOC_XTENSA_TLS_ARG
, O_tlsarg
),
377 SUFFIX_MAP ("tlscall", BFD_RELOC_XTENSA_TLS_CALL
, O_tlscall
),
378 SUFFIX_MAP ("tpoff", BFD_RELOC_XTENSA_TLS_TPOFF
, O_tpoff
),
379 SUFFIX_MAP ("dtpoff", BFD_RELOC_XTENSA_TLS_DTPOFF
, O_dtpoff
),
393 directive_literal_prefix
,
395 directive_absolute_literals
,
396 directive_last_directive
402 bfd_boolean can_be_negated
;
405 const directive_infoS directive_info
[] =
408 { "literal", FALSE
},
410 { "transform", TRUE
},
411 { "freeregs", FALSE
},
412 { "longcalls", TRUE
},
413 { "literal_prefix", FALSE
},
414 { "schedule", TRUE
},
415 { "absolute-literals", TRUE
}
418 bfd_boolean directive_state
[] =
423 TRUE
, /* transform */
424 FALSE
, /* freeregs */
425 FALSE
, /* longcalls */
426 FALSE
, /* literal_prefix */
427 FALSE
, /* schedule */
428 FALSE
/* absolute_literals */
431 /* A circular list of all potential and actual literal pool locations
435 struct litpool_frag
*next
;
436 struct litpool_frag
*prev
;
439 short priority
; /* 1, 2, or 3 -- 1 is highest */
440 short original_priority
;
443 /* Map a segment to its litpool_frag list. */
446 struct litpool_seg
*next
;
448 struct litpool_frag frag_list
;
449 int frag_count
; /* since last litpool location */
452 static struct litpool_seg litpool_seg_list
;
455 /* Directive functions. */
457 static void xtensa_begin_directive (int);
458 static void xtensa_end_directive (int);
459 static void xtensa_literal_prefix (void);
460 static void xtensa_literal_position (int);
461 static void xtensa_literal_pseudo (int);
462 static void xtensa_frequency_pseudo (int);
463 static void xtensa_elf_cons (int);
464 static void xtensa_leb128 (int);
466 /* Parsing and Idiom Translation. */
468 static bfd_reloc_code_real_type
xtensa_elf_suffix (char **, expressionS
*);
470 /* Various Other Internal Functions. */
472 extern bfd_boolean
xg_is_single_relaxable_insn (TInsn
*, TInsn
*, bfd_boolean
);
473 static bfd_boolean
xg_build_to_insn (TInsn
*, TInsn
*, BuildInstr
*);
474 static void xtensa_mark_literal_pool_location (void);
475 static addressT
get_expanded_loop_offset (xtensa_opcode
);
476 static fragS
*get_literal_pool_location (segT
);
477 static void set_literal_pool_location (segT
, fragS
*);
478 static void xtensa_set_frag_assembly_state (fragS
*);
479 static void finish_vinsn (vliw_insn
*);
480 static bfd_boolean
emit_single_op (TInsn
*);
481 static int total_frag_text_expansion (fragS
*);
482 static bfd_boolean use_trampolines
= TRUE
;
483 static void xtensa_check_frag_count (void);
484 static void xtensa_create_trampoline_frag (bfd_boolean
);
485 static void xtensa_maybe_create_trampoline_frag (void);
486 struct trampoline_frag
;
487 static int init_trampoline_frag (fragS
*);
488 static fixS
*xg_append_jump (fragS
*fragP
, symbolS
*sym
, offsetT offset
);
489 static void xtensa_maybe_create_literal_pool_frag (bfd_boolean
, bfd_boolean
);
490 static bfd_boolean auto_litpools
= FALSE
;
491 static int auto_litpool_limit
= 10000;
493 /* Alignment Functions. */
495 static int get_text_align_power (unsigned);
496 static int get_text_align_max_fill_size (int, bfd_boolean
, bfd_boolean
);
497 static int branch_align_power (segT
);
499 /* Helpers for xtensa_relax_frag(). */
501 static long relax_frag_add_nop (fragS
*);
503 /* Accessors for additional per-subsegment information. */
505 static unsigned get_last_insn_flags (segT
, subsegT
);
506 static void set_last_insn_flags (segT
, subsegT
, unsigned, bfd_boolean
);
507 static float get_subseg_total_freq (segT
, subsegT
);
508 static float get_subseg_target_freq (segT
, subsegT
);
509 static void set_subseg_freq (segT
, subsegT
, float, float);
511 /* Segment list functions. */
513 static void xtensa_move_literals (void);
514 static void xtensa_reorder_segments (void);
515 static void xtensa_switch_to_literal_fragment (emit_state
*);
516 static void xtensa_switch_to_non_abs_literal_fragment (emit_state
*);
517 static void xtensa_switch_section_emit_state (emit_state
*, segT
, subsegT
);
518 static void xtensa_restore_emit_state (emit_state
*);
519 static segT
cache_literal_section (bfd_boolean
);
521 /* op_placement_info functions. */
523 static void init_op_placement_info_table (void);
524 extern bfd_boolean
opcode_fits_format_slot (xtensa_opcode
, xtensa_format
, int);
525 static int xg_get_single_size (xtensa_opcode
);
526 static xtensa_format
xg_get_single_format (xtensa_opcode
);
527 static int xg_get_single_slot (xtensa_opcode
);
529 /* TInsn and IStack functions. */
531 static bfd_boolean
tinsn_has_symbolic_operands (const TInsn
*);
532 static bfd_boolean
tinsn_has_invalid_symbolic_operands (const TInsn
*);
533 static bfd_boolean
tinsn_has_complex_operands (const TInsn
*);
534 static bfd_boolean
tinsn_to_insnbuf (TInsn
*, xtensa_insnbuf
);
535 static bfd_boolean
tinsn_check_arguments (const TInsn
*);
536 static void tinsn_from_chars (TInsn
*, char *, int);
537 static void tinsn_immed_from_frag (TInsn
*, fragS
*, int);
538 static int get_num_stack_text_bytes (IStack
*);
539 static int get_num_stack_literal_bytes (IStack
*);
540 static bfd_boolean
tinsn_to_slotbuf (xtensa_format
, int, TInsn
*, xtensa_insnbuf
);
542 /* vliw_insn functions. */
544 static void xg_init_vinsn (vliw_insn
*);
545 static void xg_copy_vinsn (vliw_insn
*, vliw_insn
*);
546 static void xg_clear_vinsn (vliw_insn
*);
547 static bfd_boolean
vinsn_has_specific_opcodes (vliw_insn
*);
548 static void xg_free_vinsn (vliw_insn
*);
549 static bfd_boolean vinsn_to_insnbuf
550 (vliw_insn
*, char *, fragS
*, bfd_boolean
);
551 static void vinsn_from_chars (vliw_insn
*, char *);
553 /* Expression Utilities. */
555 bfd_boolean
expr_is_const (const expressionS
*);
556 offsetT
get_expr_const (const expressionS
*);
557 void set_expr_const (expressionS
*, offsetT
);
558 bfd_boolean
expr_is_register (const expressionS
*);
559 offsetT
get_expr_register (const expressionS
*);
560 void set_expr_symbol_offset (expressionS
*, symbolS
*, offsetT
);
561 bfd_boolean
expr_is_equal (expressionS
*, expressionS
*);
562 static void copy_expr (expressionS
*, const expressionS
*);
564 /* Section renaming. */
566 static void build_section_rename (const char *);
569 /* ISA imported from bfd. */
570 extern xtensa_isa xtensa_default_isa
;
572 extern int target_big_endian
;
574 static xtensa_opcode xtensa_addi_opcode
;
575 static xtensa_opcode xtensa_addmi_opcode
;
576 static xtensa_opcode xtensa_call0_opcode
;
577 static xtensa_opcode xtensa_call4_opcode
;
578 static xtensa_opcode xtensa_call8_opcode
;
579 static xtensa_opcode xtensa_call12_opcode
;
580 static xtensa_opcode xtensa_callx0_opcode
;
581 static xtensa_opcode xtensa_callx4_opcode
;
582 static xtensa_opcode xtensa_callx8_opcode
;
583 static xtensa_opcode xtensa_callx12_opcode
;
584 static xtensa_opcode xtensa_const16_opcode
;
585 static xtensa_opcode xtensa_entry_opcode
;
586 static xtensa_opcode xtensa_extui_opcode
;
587 static xtensa_opcode xtensa_movi_opcode
;
588 static xtensa_opcode xtensa_movi_n_opcode
;
589 static xtensa_opcode xtensa_isync_opcode
;
590 static xtensa_opcode xtensa_j_opcode
;
591 static xtensa_opcode xtensa_jx_opcode
;
592 static xtensa_opcode xtensa_l32r_opcode
;
593 static xtensa_opcode xtensa_loop_opcode
;
594 static xtensa_opcode xtensa_loopnez_opcode
;
595 static xtensa_opcode xtensa_loopgtz_opcode
;
596 static xtensa_opcode xtensa_nop_opcode
;
597 static xtensa_opcode xtensa_nop_n_opcode
;
598 static xtensa_opcode xtensa_or_opcode
;
599 static xtensa_opcode xtensa_ret_opcode
;
600 static xtensa_opcode xtensa_ret_n_opcode
;
601 static xtensa_opcode xtensa_retw_opcode
;
602 static xtensa_opcode xtensa_retw_n_opcode
;
603 static xtensa_opcode xtensa_rsr_lcount_opcode
;
604 static xtensa_opcode xtensa_waiti_opcode
;
605 static int config_max_slots
= 0;
608 /* Command-line Options. */
610 bfd_boolean use_literal_section
= TRUE
;
611 enum flix_level produce_flix
= FLIX_ALL
;
612 static bfd_boolean align_targets
= TRUE
;
613 static bfd_boolean warn_unaligned_branch_targets
= FALSE
;
614 static bfd_boolean has_a0_b_retw
= FALSE
;
615 static bfd_boolean workaround_a0_b_retw
= FALSE
;
616 static bfd_boolean workaround_b_j_loop_end
= FALSE
;
617 static bfd_boolean workaround_short_loop
= FALSE
;
618 static bfd_boolean maybe_has_short_loop
= FALSE
;
619 static bfd_boolean workaround_close_loop_end
= FALSE
;
620 static bfd_boolean maybe_has_close_loop_end
= FALSE
;
621 static bfd_boolean enforce_three_byte_loop_align
= FALSE
;
623 /* When workaround_short_loops is TRUE, all loops with early exits must
624 have at least 3 instructions. workaround_all_short_loops is a modifier
625 to the workaround_short_loop flag. In addition to the
626 workaround_short_loop actions, all straightline loopgtz and loopnez
627 must have at least 3 instructions. */
629 static bfd_boolean workaround_all_short_loops
= FALSE
;
633 xtensa_setup_hw_workarounds (int earliest
, int latest
)
635 if (earliest
> latest
)
636 as_fatal (_("illegal range of target hardware versions"));
638 /* Enable all workarounds for pre-T1050.0 hardware. */
639 if (earliest
< 105000 || latest
< 105000)
641 workaround_a0_b_retw
|= TRUE
;
642 workaround_b_j_loop_end
|= TRUE
;
643 workaround_short_loop
|= TRUE
;
644 workaround_close_loop_end
|= TRUE
;
645 workaround_all_short_loops
|= TRUE
;
646 enforce_three_byte_loop_align
= TRUE
;
653 option_density
= OPTION_MD_BASE
,
657 option_no_generate_flix
,
664 option_no_link_relax
,
672 option_text_section_literals
,
673 option_no_text_section_literals
,
675 option_absolute_literals
,
676 option_no_absolute_literals
,
678 option_align_targets
,
679 option_no_align_targets
,
681 option_warn_unaligned_targets
,
686 option_workaround_a0_b_retw
,
687 option_no_workaround_a0_b_retw
,
689 option_workaround_b_j_loop_end
,
690 option_no_workaround_b_j_loop_end
,
692 option_workaround_short_loop
,
693 option_no_workaround_short_loop
,
695 option_workaround_all_short_loops
,
696 option_no_workaround_all_short_loops
,
698 option_workaround_close_loop_end
,
699 option_no_workaround_close_loop_end
,
701 option_no_workarounds
,
703 option_rename_section_name
,
706 option_prefer_const16
,
708 option_target_hardware
,
711 option_no_trampolines
,
713 option_auto_litpools
,
714 option_no_auto_litpools
,
715 option_auto_litpool_limit
,
718 const char *md_shortopts
= "";
720 struct option md_longopts
[] =
722 { "density", no_argument
, NULL
, option_density
},
723 { "no-density", no_argument
, NULL
, option_no_density
},
725 { "flix", no_argument
, NULL
, option_flix
},
726 { "no-generate-flix", no_argument
, NULL
, option_no_generate_flix
},
727 { "no-allow-flix", no_argument
, NULL
, option_no_flix
},
729 /* Both "relax" and "generics" are deprecated and treated as equivalent
730 to the "transform" option. */
731 { "relax", no_argument
, NULL
, option_relax
},
732 { "no-relax", no_argument
, NULL
, option_no_relax
},
733 { "generics", no_argument
, NULL
, option_generics
},
734 { "no-generics", no_argument
, NULL
, option_no_generics
},
736 { "transform", no_argument
, NULL
, option_transform
},
737 { "no-transform", no_argument
, NULL
, option_no_transform
},
738 { "text-section-literals", no_argument
, NULL
, option_text_section_literals
},
739 { "no-text-section-literals", no_argument
, NULL
,
740 option_no_text_section_literals
},
741 { "absolute-literals", no_argument
, NULL
, option_absolute_literals
},
742 { "no-absolute-literals", no_argument
, NULL
, option_no_absolute_literals
},
743 /* This option was changed from -align-target to -target-align
744 because it conflicted with the "-al" option. */
745 { "target-align", no_argument
, NULL
, option_align_targets
},
746 { "no-target-align", no_argument
, NULL
, option_no_align_targets
},
747 { "warn-unaligned-targets", no_argument
, NULL
,
748 option_warn_unaligned_targets
},
749 { "longcalls", no_argument
, NULL
, option_longcalls
},
750 { "no-longcalls", no_argument
, NULL
, option_no_longcalls
},
752 { "no-workaround-a0-b-retw", no_argument
, NULL
,
753 option_no_workaround_a0_b_retw
},
754 { "workaround-a0-b-retw", no_argument
, NULL
, option_workaround_a0_b_retw
},
756 { "no-workaround-b-j-loop-end", no_argument
, NULL
,
757 option_no_workaround_b_j_loop_end
},
758 { "workaround-b-j-loop-end", no_argument
, NULL
,
759 option_workaround_b_j_loop_end
},
761 { "no-workaround-short-loops", no_argument
, NULL
,
762 option_no_workaround_short_loop
},
763 { "workaround-short-loops", no_argument
, NULL
,
764 option_workaround_short_loop
},
766 { "no-workaround-all-short-loops", no_argument
, NULL
,
767 option_no_workaround_all_short_loops
},
768 { "workaround-all-short-loop", no_argument
, NULL
,
769 option_workaround_all_short_loops
},
771 { "prefer-l32r", no_argument
, NULL
, option_prefer_l32r
},
772 { "prefer-const16", no_argument
, NULL
, option_prefer_const16
},
774 { "no-workarounds", no_argument
, NULL
, option_no_workarounds
},
776 { "no-workaround-close-loop-end", no_argument
, NULL
,
777 option_no_workaround_close_loop_end
},
778 { "workaround-close-loop-end", no_argument
, NULL
,
779 option_workaround_close_loop_end
},
781 { "rename-section", required_argument
, NULL
, option_rename_section_name
},
783 { "link-relax", no_argument
, NULL
, option_link_relax
},
784 { "no-link-relax", no_argument
, NULL
, option_no_link_relax
},
786 { "target-hardware", required_argument
, NULL
, option_target_hardware
},
788 { "trampolines", no_argument
, NULL
, option_trampolines
},
789 { "no-trampolines", no_argument
, NULL
, option_no_trampolines
},
791 { "auto-litpools", no_argument
, NULL
, option_auto_litpools
},
792 { "no-auto-litpools", no_argument
, NULL
, option_no_auto_litpools
},
793 { "auto-litpool-limit", required_argument
, NULL
, option_auto_litpool_limit
},
795 { NULL
, no_argument
, NULL
, 0 }
798 size_t md_longopts_size
= sizeof md_longopts
;
802 md_parse_option (int c
, const char *arg
)
807 as_warn (_("--density option is ignored"));
809 case option_no_density
:
810 as_warn (_("--no-density option is ignored"));
812 case option_link_relax
:
815 case option_no_link_relax
:
819 produce_flix
= FLIX_ALL
;
821 case option_no_generate_flix
:
822 produce_flix
= FLIX_NO_GENERATE
;
825 produce_flix
= FLIX_NONE
;
827 case option_generics
:
828 as_warn (_("--generics is deprecated; use --transform instead"));
829 return md_parse_option (option_transform
, arg
);
830 case option_no_generics
:
831 as_warn (_("--no-generics is deprecated; use --no-transform instead"));
832 return md_parse_option (option_no_transform
, arg
);
834 as_warn (_("--relax is deprecated; use --transform instead"));
835 return md_parse_option (option_transform
, arg
);
836 case option_no_relax
:
837 as_warn (_("--no-relax is deprecated; use --no-transform instead"));
838 return md_parse_option (option_no_transform
, arg
);
839 case option_longcalls
:
840 directive_state
[directive_longcalls
] = TRUE
;
842 case option_no_longcalls
:
843 directive_state
[directive_longcalls
] = FALSE
;
845 case option_text_section_literals
:
846 use_literal_section
= FALSE
;
848 case option_no_text_section_literals
:
849 use_literal_section
= TRUE
;
851 case option_absolute_literals
:
852 if (!absolute_literals_supported
)
854 as_fatal (_("--absolute-literals option not supported in this Xtensa configuration"));
857 directive_state
[directive_absolute_literals
] = TRUE
;
859 case option_no_absolute_literals
:
860 directive_state
[directive_absolute_literals
] = FALSE
;
863 case option_workaround_a0_b_retw
:
864 workaround_a0_b_retw
= TRUE
;
866 case option_no_workaround_a0_b_retw
:
867 workaround_a0_b_retw
= FALSE
;
869 case option_workaround_b_j_loop_end
:
870 workaround_b_j_loop_end
= TRUE
;
872 case option_no_workaround_b_j_loop_end
:
873 workaround_b_j_loop_end
= FALSE
;
876 case option_workaround_short_loop
:
877 workaround_short_loop
= TRUE
;
879 case option_no_workaround_short_loop
:
880 workaround_short_loop
= FALSE
;
883 case option_workaround_all_short_loops
:
884 workaround_all_short_loops
= TRUE
;
886 case option_no_workaround_all_short_loops
:
887 workaround_all_short_loops
= FALSE
;
890 case option_workaround_close_loop_end
:
891 workaround_close_loop_end
= TRUE
;
893 case option_no_workaround_close_loop_end
:
894 workaround_close_loop_end
= FALSE
;
897 case option_no_workarounds
:
898 workaround_a0_b_retw
= FALSE
;
899 workaround_b_j_loop_end
= FALSE
;
900 workaround_short_loop
= FALSE
;
901 workaround_all_short_loops
= FALSE
;
902 workaround_close_loop_end
= FALSE
;
905 case option_align_targets
:
906 align_targets
= TRUE
;
908 case option_no_align_targets
:
909 align_targets
= FALSE
;
912 case option_warn_unaligned_targets
:
913 warn_unaligned_branch_targets
= TRUE
;
916 case option_rename_section_name
:
917 build_section_rename (arg
);
921 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
922 should be emitted or not. FIXME: Not implemented. */
925 case option_prefer_l32r
:
927 as_fatal (_("prefer-l32r conflicts with prefer-const16"));
931 case option_prefer_const16
:
933 as_fatal (_("prefer-const16 conflicts with prefer-l32r"));
937 case option_target_hardware
:
939 int earliest
, latest
= 0;
941 if (*arg
== 0 || *arg
== '-')
942 as_fatal (_("invalid target hardware version"));
944 earliest
= strtol (arg
, &end
, 0);
948 else if (*end
== '-')
951 as_fatal (_("invalid target hardware version"));
952 latest
= strtol (end
, &end
, 0);
955 as_fatal (_("invalid target hardware version"));
957 xtensa_setup_hw_workarounds (earliest
, latest
);
961 case option_transform
:
962 /* This option has no affect other than to use the defaults,
963 which are already set. */
966 case option_no_transform
:
967 /* This option turns off all transformations of any kind.
968 However, because we want to preserve the state of other
969 directives, we only change its own field. Thus, before
970 you perform any transformation, always check if transform
971 is available. If you use the functions we provide for this
972 purpose, you will be ok. */
973 directive_state
[directive_transform
] = FALSE
;
976 case option_trampolines
:
977 use_trampolines
= TRUE
;
980 case option_no_trampolines
:
981 use_trampolines
= FALSE
;
984 case option_auto_litpools
:
985 auto_litpools
= TRUE
;
986 use_literal_section
= FALSE
;
989 case option_no_auto_litpools
:
990 auto_litpools
= FALSE
;
991 auto_litpool_limit
= -1;
994 case option_auto_litpool_limit
:
998 if (auto_litpool_limit
< 0)
999 as_fatal (_("no-auto-litpools is incompatible with auto-litpool-limit"));
1000 if (*arg
== 0 || *arg
== '-')
1001 as_fatal (_("invalid auto-litpool-limit argument"));
1002 value
= strtol (arg
, &end
, 10);
1004 as_fatal (_("invalid auto-litpool-limit argument"));
1005 if (value
< 100 || value
> 10000)
1006 as_fatal (_("invalid auto-litpool-limit argument (range is 100-10000)"));
1007 auto_litpool_limit
= value
;
1008 auto_litpools
= TRUE
;
1009 use_literal_section
= FALSE
;
1020 md_show_usage (FILE *stream
)
1024 --[no-]text-section-literals\n\
1025 [Do not] put literals in the text section\n\
1026 --[no-]absolute-literals\n\
1027 [Do not] default to use non-PC-relative literals\n\
1028 --[no-]target-align [Do not] try to align branch targets\n\
1029 --[no-]longcalls [Do not] emit 32-bit call sequences\n\
1030 --[no-]transform [Do not] transform instructions\n\
1031 --flix both allow hand-written and generate flix bundles\n\
1032 --no-generate-flix allow hand-written but do not generate\n\
1034 --no-allow-flix neither allow hand-written nor generate\n\
1036 --rename-section old=new Rename section 'old' to 'new'\n\
1037 --[no-]trampolines [Do not] generate trampolines (jumps to jumps)\n\
1038 when jumps do not reach their targets\n\
1039 --[no-]auto-litpools [Do not] automatically create literal pools\n\
1040 --auto-litpool-limit=<value>\n\
1041 (range 100-10000) Maximum number of blocks of\n\
1042 instructions to emit between literal pool\n\
1043 locations; implies --auto-litpools flag\n", stream
);
1047 /* Functions related to the list of current label symbols. */
1050 xtensa_add_insn_label (symbolS
*sym
)
1054 if (!free_insn_labels
)
1055 l
= XNEW (sym_list
);
1058 l
= free_insn_labels
;
1059 free_insn_labels
= l
->next
;
1063 l
->next
= insn_labels
;
1069 xtensa_clear_insn_labels (void)
1073 for (pl
= &free_insn_labels
; *pl
!= NULL
; pl
= &(*pl
)->next
)
1081 xtensa_move_labels (fragS
*new_frag
, valueT new_offset
)
1085 for (lit
= insn_labels
; lit
; lit
= lit
->next
)
1087 symbolS
*lit_sym
= lit
->sym
;
1088 S_SET_VALUE (lit_sym
, new_offset
);
1089 symbol_set_frag (lit_sym
, new_frag
);
1094 /* Directive data and functions. */
1096 typedef struct state_stackS_struct
1098 directiveE directive
;
1099 bfd_boolean negated
;
1100 bfd_boolean old_state
;
1104 struct state_stackS_struct
*prev
;
1107 state_stackS
*directive_state_stack
;
1109 const pseudo_typeS md_pseudo_table
[] =
1111 { "align", s_align_bytes
, 0 }, /* Defaulting is invalid (0). */
1112 { "literal_position", xtensa_literal_position
, 0 },
1113 { "frame", s_ignore
, 0 }, /* Formerly used for STABS debugging. */
1114 { "long", xtensa_elf_cons
, 4 },
1115 { "word", xtensa_elf_cons
, 4 },
1116 { "4byte", xtensa_elf_cons
, 4 },
1117 { "short", xtensa_elf_cons
, 2 },
1118 { "2byte", xtensa_elf_cons
, 2 },
1119 { "sleb128", xtensa_leb128
, 1},
1120 { "uleb128", xtensa_leb128
, 0},
1121 { "begin", xtensa_begin_directive
, 0 },
1122 { "end", xtensa_end_directive
, 0 },
1123 { "literal", xtensa_literal_pseudo
, 0 },
1124 { "frequency", xtensa_frequency_pseudo
, 0 },
1130 use_transform (void)
1132 /* After md_end, you should be checking frag by frag, rather
1133 than state directives. */
1134 gas_assert (!past_xtensa_end
);
1135 return directive_state
[directive_transform
];
1140 do_align_targets (void)
1142 /* Do not use this function after md_end; just look at align_targets
1143 instead. There is no target-align directive, so alignment is either
1144 enabled for all frags or not done at all. */
1145 gas_assert (!past_xtensa_end
);
1146 return align_targets
&& use_transform ();
1151 directive_push (directiveE directive
, bfd_boolean negated
, const void *datum
)
1155 state_stackS
*stack
= XNEW (state_stackS
);
1157 file
= as_where (&line
);
1159 stack
->directive
= directive
;
1160 stack
->negated
= negated
;
1161 stack
->old_state
= directive_state
[directive
];
1164 stack
->datum
= datum
;
1165 stack
->prev
= directive_state_stack
;
1166 directive_state_stack
= stack
;
1168 directive_state
[directive
] = !negated
;
1173 directive_pop (directiveE
*directive
,
1174 bfd_boolean
*negated
,
1179 state_stackS
*top
= directive_state_stack
;
1181 if (!directive_state_stack
)
1183 as_bad (_("unmatched .end directive"));
1184 *directive
= directive_none
;
1188 directive_state
[directive_state_stack
->directive
] = top
->old_state
;
1189 *directive
= top
->directive
;
1190 *negated
= top
->negated
;
1193 *datum
= top
->datum
;
1194 directive_state_stack
= top
->prev
;
1200 directive_balance (void)
1202 while (directive_state_stack
)
1204 directiveE directive
;
1205 bfd_boolean negated
;
1210 directive_pop (&directive
, &negated
, &file
, &line
, &datum
);
1211 as_warn_where ((char *) file
, line
,
1212 _(".begin directive with no matching .end directive"));
1218 inside_directive (directiveE dir
)
1220 state_stackS
*top
= directive_state_stack
;
1222 while (top
&& top
->directive
!= dir
)
1225 return (top
!= NULL
);
1230 get_directive (directiveE
*directive
, bfd_boolean
*negated
)
1234 const char *directive_string
;
1236 if (strncmp (input_line_pointer
, "no-", 3) != 0)
1241 input_line_pointer
+= 3;
1244 len
= strspn (input_line_pointer
,
1245 "abcdefghijklmnopqrstuvwxyz_-/0123456789.");
1247 /* This code is a hack to make .begin [no-][generics|relax] exactly
1248 equivalent to .begin [no-]transform. We should remove it when
1249 we stop accepting those options. */
1251 if (strncmp (input_line_pointer
, "generics", strlen ("generics")) == 0)
1253 as_warn (_("[no-]generics is deprecated; use [no-]transform instead"));
1254 directive_string
= "transform";
1256 else if (strncmp (input_line_pointer
, "relax", strlen ("relax")) == 0)
1258 as_warn (_("[no-]relax is deprecated; use [no-]transform instead"));
1259 directive_string
= "transform";
1262 directive_string
= input_line_pointer
;
1264 for (i
= 0; i
< sizeof (directive_info
) / sizeof (*directive_info
); ++i
)
1266 if (strncmp (directive_string
, directive_info
[i
].name
, len
) == 0)
1268 input_line_pointer
+= len
;
1269 *directive
= (directiveE
) i
;
1270 if (*negated
&& !directive_info
[i
].can_be_negated
)
1271 as_bad (_("directive %s cannot be negated"),
1272 directive_info
[i
].name
);
1277 as_bad (_("unknown directive"));
1278 *directive
= (directiveE
) XTENSA_UNDEFINED
;
1283 xtensa_begin_directive (int ignore ATTRIBUTE_UNUSED
)
1285 directiveE directive
;
1286 bfd_boolean negated
;
1290 get_directive (&directive
, &negated
);
1291 if (directive
== (directiveE
) XTENSA_UNDEFINED
)
1293 discard_rest_of_line ();
1297 if (cur_vinsn
.inside_bundle
)
1298 as_bad (_("directives are not valid inside bundles"));
1302 case directive_literal
:
1303 if (!inside_directive (directive_literal
))
1305 /* Previous labels go with whatever follows this directive, not with
1306 the literal, so save them now. */
1307 saved_insn_labels
= insn_labels
;
1310 as_warn (_(".begin literal is deprecated; use .literal instead"));
1311 state
= XNEW (emit_state
);
1312 xtensa_switch_to_literal_fragment (state
);
1313 directive_push (directive_literal
, negated
, state
);
1316 case directive_literal_prefix
:
1317 /* Have to flush pending output because a movi relaxed to an l32r
1318 might produce a literal. */
1319 md_flush_pending_output ();
1320 /* Check to see if the current fragment is a literal
1321 fragment. If it is, then this operation is not allowed. */
1322 if (generating_literals
)
1324 as_bad (_("cannot set literal_prefix inside literal fragment"));
1328 /* Allocate the literal state for this section and push
1329 onto the directive stack. */
1330 ls
= XNEW (lit_state
);
1333 *ls
= default_lit_sections
;
1334 directive_push (directive_literal_prefix
, negated
, ls
);
1336 /* Process the new prefix. */
1337 xtensa_literal_prefix ();
1340 case directive_freeregs
:
1341 /* This information is currently unused, but we'll accept the statement
1342 and just discard the rest of the line. This won't check the syntax,
1343 but it will accept every correct freeregs directive. */
1344 input_line_pointer
+= strcspn (input_line_pointer
, "\n");
1345 directive_push (directive_freeregs
, negated
, 0);
1348 case directive_schedule
:
1349 md_flush_pending_output ();
1350 frag_var (rs_fill
, 0, 0, frag_now
->fr_subtype
,
1351 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
1352 directive_push (directive_schedule
, negated
, 0);
1353 xtensa_set_frag_assembly_state (frag_now
);
1356 case directive_density
:
1357 as_warn (_(".begin [no-]density is ignored"));
1360 case directive_absolute_literals
:
1361 md_flush_pending_output ();
1362 if (!absolute_literals_supported
&& !negated
)
1364 as_warn (_("Xtensa absolute literals option not supported; ignored"));
1367 xtensa_set_frag_assembly_state (frag_now
);
1368 directive_push (directive
, negated
, 0);
1372 md_flush_pending_output ();
1373 xtensa_set_frag_assembly_state (frag_now
);
1374 directive_push (directive
, negated
, 0);
1378 demand_empty_rest_of_line ();
1383 xtensa_end_directive (int ignore ATTRIBUTE_UNUSED
)
1385 directiveE begin_directive
, end_directive
;
1386 bfd_boolean begin_negated
, end_negated
;
1390 emit_state
**state_ptr
;
1393 if (cur_vinsn
.inside_bundle
)
1394 as_bad (_("directives are not valid inside bundles"));
1396 get_directive (&end_directive
, &end_negated
);
1398 md_flush_pending_output ();
1400 switch ((int) end_directive
)
1402 case XTENSA_UNDEFINED
:
1403 discard_rest_of_line ();
1406 case (int) directive_density
:
1407 as_warn (_(".end [no-]density is ignored"));
1408 demand_empty_rest_of_line ();
1411 case (int) directive_absolute_literals
:
1412 if (!absolute_literals_supported
&& !end_negated
)
1414 as_warn (_("Xtensa absolute literals option not supported; ignored"));
1415 demand_empty_rest_of_line ();
1424 state_ptr
= &state
; /* use state_ptr to avoid type-punning warning */
1425 directive_pop (&begin_directive
, &begin_negated
, &file
, &line
,
1426 (const void **) state_ptr
);
1428 if (begin_directive
!= directive_none
)
1430 if (begin_directive
!= end_directive
|| begin_negated
!= end_negated
)
1432 as_bad (_("does not match begin %s%s at %s:%d"),
1433 begin_negated
? "no-" : "",
1434 directive_info
[begin_directive
].name
, file
, line
);
1438 switch (end_directive
)
1440 case directive_literal
:
1441 frag_var (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
1442 xtensa_restore_emit_state (state
);
1443 xtensa_set_frag_assembly_state (frag_now
);
1445 if (!inside_directive (directive_literal
))
1447 /* Restore the list of current labels. */
1448 xtensa_clear_insn_labels ();
1449 insn_labels
= saved_insn_labels
;
1453 case directive_literal_prefix
:
1454 /* Restore the default collection sections from saved state. */
1455 s
= (lit_state
*) state
;
1457 default_lit_sections
= *s
;
1459 /* Free the state storage. */
1460 free (s
->lit_prefix
);
1464 case directive_schedule
:
1465 case directive_freeregs
:
1469 xtensa_set_frag_assembly_state (frag_now
);
1475 demand_empty_rest_of_line ();
1479 /* Place an aligned literal fragment at the current location. */
1482 xtensa_literal_position (int ignore ATTRIBUTE_UNUSED
)
1484 md_flush_pending_output ();
1486 if (inside_directive (directive_literal
))
1487 as_warn (_(".literal_position inside literal directive; ignoring"));
1488 xtensa_mark_literal_pool_location ();
1490 demand_empty_rest_of_line ();
1491 xtensa_clear_insn_labels ();
1495 /* Support .literal label, expr, ... */
1498 xtensa_literal_pseudo (int ignored ATTRIBUTE_UNUSED
)
1501 char *p
, *base_name
;
1505 if (inside_directive (directive_literal
))
1507 as_bad (_(".literal not allowed inside .begin literal region"));
1508 ignore_rest_of_line ();
1512 md_flush_pending_output ();
1514 /* Previous labels go with whatever follows this directive, not with
1515 the literal, so save them now. */
1516 saved_insn_labels
= insn_labels
;
1519 /* If we are using text-section literals, then this is the right value... */
1522 base_name
= input_line_pointer
;
1524 xtensa_switch_to_literal_fragment (&state
);
1526 /* ...but if we aren't using text-section-literals, then we
1527 need to put them in the section we just switched to. */
1528 if (use_literal_section
|| directive_state
[directive_absolute_literals
])
1531 /* FIXME, despite the previous comments, dest_seg is unused... */
1534 /* All literals are aligned to four-byte boundaries. */
1535 frag_align (2, 0, 0);
1536 record_alignment (now_seg
, 2);
1538 c
= get_symbol_name (&base_name
);
1539 /* Just after name is now '\0'. */
1540 p
= input_line_pointer
;
1542 SKIP_WHITESPACE_AFTER_NAME ();
1544 if (*input_line_pointer
!= ',' && *input_line_pointer
!= ':')
1546 as_bad (_("expected comma or colon after symbol name; "
1547 "rest of line ignored"));
1548 ignore_rest_of_line ();
1549 xtensa_restore_emit_state (&state
);
1557 input_line_pointer
++; /* skip ',' or ':' */
1559 xtensa_elf_cons (4);
1561 xtensa_restore_emit_state (&state
);
1563 /* Restore the list of current labels. */
1564 xtensa_clear_insn_labels ();
1565 insn_labels
= saved_insn_labels
;
1570 xtensa_literal_prefix (void)
1575 /* Parse the new prefix from the input_line_pointer. */
1577 len
= strspn (input_line_pointer
,
1578 "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
1579 "abcdefghijklmnopqrstuvwxyz_/0123456789.$");
1581 /* Get a null-terminated copy of the name. */
1582 name
= xmemdup0 (input_line_pointer
, len
);
1584 /* Skip the name in the input line. */
1585 input_line_pointer
+= len
;
1587 default_lit_sections
.lit_prefix
= name
;
1589 /* Clear cached literal sections, since the prefix has changed. */
1590 default_lit_sections
.lit_seg
= NULL
;
1591 default_lit_sections
.lit4_seg
= NULL
;
1595 /* Support ".frequency branch_target_frequency fall_through_frequency". */
1598 xtensa_frequency_pseudo (int ignored ATTRIBUTE_UNUSED
)
1600 float fall_through_f
, target_f
;
1602 fall_through_f
= (float) strtod (input_line_pointer
, &input_line_pointer
);
1603 if (fall_through_f
< 0)
1605 as_bad (_("fall through frequency must be greater than 0"));
1606 ignore_rest_of_line ();
1610 target_f
= (float) strtod (input_line_pointer
, &input_line_pointer
);
1613 as_bad (_("branch target frequency must be greater than 0"));
1614 ignore_rest_of_line ();
1618 set_subseg_freq (now_seg
, now_subseg
, target_f
+ fall_through_f
, target_f
);
1620 demand_empty_rest_of_line ();
1624 /* Like normal .long/.short/.word, except support @plt, etc.
1625 Clobbers input_line_pointer, checks end-of-line. */
1628 xtensa_elf_cons (int nbytes
)
1631 bfd_reloc_code_real_type reloc
;
1633 md_flush_pending_output ();
1635 if (cur_vinsn
.inside_bundle
)
1636 as_bad (_("directives are not valid inside bundles"));
1638 if (is_it_end_of_statement ())
1640 demand_empty_rest_of_line ();
1647 if (exp
.X_op
== O_symbol
1648 && *input_line_pointer
== '@'
1649 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, &exp
))
1652 reloc_howto_type
*reloc_howto
=
1653 bfd_reloc_type_lookup (stdoutput
, reloc
);
1655 if (reloc
== BFD_RELOC_UNUSED
|| !reloc_howto
)
1656 as_bad (_("unsupported relocation"));
1657 else if ((reloc
>= BFD_RELOC_XTENSA_SLOT0_OP
1658 && reloc
<= BFD_RELOC_XTENSA_SLOT14_OP
)
1659 || (reloc
>= BFD_RELOC_XTENSA_SLOT0_ALT
1660 && reloc
<= BFD_RELOC_XTENSA_SLOT14_ALT
))
1661 as_bad (_("opcode-specific %s relocation used outside "
1662 "an instruction"), reloc_howto
->name
);
1663 else if (nbytes
!= (int) bfd_get_reloc_size (reloc_howto
))
1664 as_bad (ngettext ("%s relocations do not fit in %d byte",
1665 "%s relocations do not fit in %d bytes",
1667 reloc_howto
->name
, nbytes
);
1668 else if (reloc
== BFD_RELOC_XTENSA_TLS_FUNC
1669 || reloc
== BFD_RELOC_XTENSA_TLS_ARG
1670 || reloc
== BFD_RELOC_XTENSA_TLS_CALL
)
1671 as_bad (_("invalid use of %s relocation"), reloc_howto
->name
);
1674 char *p
= frag_more ((int) nbytes
);
1675 xtensa_set_frag_assembly_state (frag_now
);
1676 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
,
1677 nbytes
, &exp
, reloc_howto
->pc_relative
, reloc
);
1682 xtensa_set_frag_assembly_state (frag_now
);
1683 emit_expr (&exp
, (unsigned int) nbytes
);
1686 while (*input_line_pointer
++ == ',');
1688 input_line_pointer
--; /* Put terminator back into stream. */
1689 demand_empty_rest_of_line ();
1692 static bfd_boolean is_leb128_expr
;
1695 xtensa_leb128 (int sign
)
1697 is_leb128_expr
= TRUE
;
1699 is_leb128_expr
= FALSE
;
1703 /* Parsing and Idiom Translation. */
1705 /* Parse @plt, etc. and return the desired relocation. */
1706 static bfd_reloc_code_real_type
1707 xtensa_elf_suffix (char **str_p
, expressionS
*exp_p
)
1717 return BFD_RELOC_NONE
;
1719 for (ch
= *str
, str2
= ident
;
1720 (str2
< ident
+ sizeof (ident
) - 1
1721 && (ISALNUM (ch
) || ch
== '@'));
1724 *str2
++ = (ISLOWER (ch
)) ? ch
: TOLOWER (ch
);
1731 for (i
= 0; i
< ARRAY_SIZE (suffix_relocs
); i
++)
1732 if (ch
== suffix_relocs
[i
].suffix
[0]
1733 && len
== suffix_relocs
[i
].length
1734 && memcmp (ident
, suffix_relocs
[i
].suffix
, suffix_relocs
[i
].length
) == 0)
1736 /* Now check for "identifier@suffix+constant". */
1737 if (*str
== '-' || *str
== '+')
1739 char *orig_line
= input_line_pointer
;
1740 expressionS new_exp
;
1742 input_line_pointer
= str
;
1743 expression (&new_exp
);
1744 if (new_exp
.X_op
== O_constant
)
1746 exp_p
->X_add_number
+= new_exp
.X_add_number
;
1747 str
= input_line_pointer
;
1750 if (&input_line_pointer
!= str_p
)
1751 input_line_pointer
= orig_line
;
1755 return suffix_relocs
[i
].reloc
;
1758 return BFD_RELOC_UNUSED
;
1762 /* Find the matching operator type. */
1764 map_suffix_reloc_to_operator (bfd_reloc_code_real_type reloc
)
1766 operatorT
operator = O_illegal
;
1769 for (i
= 0; i
< ARRAY_SIZE (suffix_relocs
); i
++)
1771 if (suffix_relocs
[i
].reloc
== reloc
)
1773 operator = suffix_relocs
[i
].operator;
1777 gas_assert (operator != O_illegal
);
1782 /* Find the matching reloc type. */
1783 static bfd_reloc_code_real_type
1784 map_operator_to_reloc (unsigned char operator, bfd_boolean is_literal
)
1787 bfd_reloc_code_real_type reloc
= BFD_RELOC_UNUSED
;
1789 for (i
= 0; i
< ARRAY_SIZE (suffix_relocs
); i
++)
1791 if (suffix_relocs
[i
].operator == operator)
1793 reloc
= suffix_relocs
[i
].reloc
;
1800 if (reloc
== BFD_RELOC_XTENSA_TLS_FUNC
)
1801 return BFD_RELOC_XTENSA_TLSDESC_FN
;
1802 else if (reloc
== BFD_RELOC_XTENSA_TLS_ARG
)
1803 return BFD_RELOC_XTENSA_TLSDESC_ARG
;
1806 if (reloc
== BFD_RELOC_UNUSED
)
1807 return BFD_RELOC_32
;
1814 expression_end (const char *name
)
1837 #define ERROR_REG_NUM ((unsigned) -1)
1840 tc_get_register (const char *prefix
)
1843 const char *next_expr
;
1844 const char *old_line_pointer
;
1847 old_line_pointer
= input_line_pointer
;
1849 if (*input_line_pointer
== '$')
1850 ++input_line_pointer
;
1852 /* Accept "sp" as a synonym for "a1". */
1853 if (input_line_pointer
[0] == 's' && input_line_pointer
[1] == 'p'
1854 && expression_end (input_line_pointer
+ 2))
1856 input_line_pointer
+= 2;
1857 return 1; /* AR[1] */
1860 while (*input_line_pointer
++ == *prefix
++)
1862 --input_line_pointer
;
1867 as_bad (_("bad register name: %s"), old_line_pointer
);
1868 return ERROR_REG_NUM
;
1871 if (!ISDIGIT ((unsigned char) *input_line_pointer
))
1873 as_bad (_("bad register number: %s"), input_line_pointer
);
1874 return ERROR_REG_NUM
;
1879 while (ISDIGIT ((int) *input_line_pointer
))
1880 reg
= reg
* 10 + *input_line_pointer
++ - '0';
1882 if (!(next_expr
= expression_end (input_line_pointer
)))
1884 as_bad (_("bad register name: %s"), old_line_pointer
);
1885 return ERROR_REG_NUM
;
1888 input_line_pointer
= (char *) next_expr
;
1895 expression_maybe_register (xtensa_opcode opc
, int opnd
, expressionS
*tok
)
1897 xtensa_isa isa
= xtensa_default_isa
;
1899 /* Check if this is an immediate operand. */
1900 if (xtensa_operand_is_register (isa
, opc
, opnd
) == 0)
1902 bfd_reloc_code_real_type reloc
;
1903 segT t
= expression (tok
);
1905 if (t
== absolute_section
1906 && xtensa_operand_is_PCrelative (isa
, opc
, opnd
) == 1)
1908 gas_assert (tok
->X_op
== O_constant
);
1909 tok
->X_op
= O_symbol
;
1910 tok
->X_add_symbol
= &abs_symbol
;
1913 if ((tok
->X_op
== O_constant
|| tok
->X_op
== O_symbol
)
1914 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, tok
))
1919 case BFD_RELOC_LO16
:
1920 if (tok
->X_op
== O_constant
)
1922 tok
->X_add_number
&= 0xffff;
1926 case BFD_RELOC_HI16
:
1927 if (tok
->X_op
== O_constant
)
1929 tok
->X_add_number
= ((unsigned) tok
->X_add_number
) >> 16;
1933 case BFD_RELOC_UNUSED
:
1934 as_bad (_("unsupported relocation"));
1936 case BFD_RELOC_32_PCREL
:
1937 as_bad (_("pcrel relocation not allowed in an instruction"));
1942 tok
->X_op
= map_suffix_reloc_to_operator (reloc
);
1947 xtensa_regfile opnd_rf
= xtensa_operand_regfile (isa
, opc
, opnd
);
1948 unsigned reg
= tc_get_register (xtensa_regfile_shortname (isa
, opnd_rf
));
1950 if (reg
!= ERROR_REG_NUM
) /* Already errored */
1953 if (xtensa_operand_encode (isa
, opc
, opnd
, &buf
))
1954 as_bad (_("register number out of range"));
1957 tok
->X_op
= O_register
;
1958 tok
->X_add_symbol
= 0;
1959 tok
->X_add_number
= reg
;
1964 /* Split up the arguments for an opcode or pseudo-op. */
1967 tokenize_arguments (char **args
, char *str
)
1969 char *old_input_line_pointer
;
1970 bfd_boolean saw_comma
= FALSE
;
1971 bfd_boolean saw_arg
= FALSE
;
1972 bfd_boolean saw_colon
= FALSE
;
1974 char *arg_end
, *arg
;
1977 /* Save and restore input_line_pointer around this function. */
1978 old_input_line_pointer
= input_line_pointer
;
1979 input_line_pointer
= str
;
1981 while (*input_line_pointer
)
1984 switch (*input_line_pointer
)
1991 input_line_pointer
++;
1992 if (saw_comma
|| saw_colon
|| !saw_arg
)
1998 input_line_pointer
++;
1999 if (saw_comma
|| saw_colon
|| !saw_arg
)
2005 if (!saw_comma
&& !saw_colon
&& saw_arg
)
2008 arg_end
= input_line_pointer
+ 1;
2009 while (!expression_end (arg_end
))
2012 arg_len
= arg_end
- input_line_pointer
;
2013 arg
= XNEWVEC (char, (saw_colon
? 1 : 0) + arg_len
+ 1);
2014 args
[num_args
] = arg
;
2018 strncpy (arg
, input_line_pointer
, arg_len
);
2019 arg
[arg_len
] = '\0';
2021 input_line_pointer
= arg_end
;
2031 if (saw_comma
|| saw_colon
)
2033 input_line_pointer
= old_input_line_pointer
;
2038 as_bad (_("extra comma"));
2040 as_bad (_("extra colon"));
2042 as_bad (_("missing argument"));
2044 as_bad (_("missing comma or colon"));
2045 input_line_pointer
= old_input_line_pointer
;
2050 /* Parse the arguments to an opcode. Return TRUE on error. */
2053 parse_arguments (TInsn
*insn
, int num_args
, char **arg_strings
)
2055 expressionS
*tok
, *last_tok
;
2056 xtensa_opcode opcode
= insn
->opcode
;
2057 bfd_boolean had_error
= TRUE
;
2058 xtensa_isa isa
= xtensa_default_isa
;
2059 int n
, num_regs
= 0;
2060 int opcode_operand_count
;
2061 int opnd_cnt
, last_opnd_cnt
;
2062 unsigned int next_reg
= 0;
2063 char *old_input_line_pointer
;
2065 if (insn
->insn_type
== ITYPE_LITERAL
)
2066 opcode_operand_count
= 1;
2068 opcode_operand_count
= xtensa_opcode_num_operands (isa
, opcode
);
2071 memset (tok
, 0, sizeof (*tok
) * MAX_INSN_ARGS
);
2073 /* Save and restore input_line_pointer around this function. */
2074 old_input_line_pointer
= input_line_pointer
;
2080 /* Skip invisible operands. */
2081 while (xtensa_operand_is_visible (isa
, opcode
, opnd_cnt
) == 0)
2087 for (n
= 0; n
< num_args
; n
++)
2089 input_line_pointer
= arg_strings
[n
];
2090 if (*input_line_pointer
== ':')
2092 xtensa_regfile opnd_rf
;
2093 input_line_pointer
++;
2096 gas_assert (opnd_cnt
> 0);
2098 opnd_rf
= xtensa_operand_regfile (isa
, opcode
, last_opnd_cnt
);
2100 != tc_get_register (xtensa_regfile_shortname (isa
, opnd_rf
)))
2101 as_warn (_("incorrect register number, ignoring"));
2106 if (opnd_cnt
>= opcode_operand_count
)
2108 as_warn (_("too many arguments"));
2111 gas_assert (opnd_cnt
< MAX_INSN_ARGS
);
2113 expression_maybe_register (opcode
, opnd_cnt
, tok
);
2114 next_reg
= tok
->X_add_number
+ 1;
2116 if (tok
->X_op
== O_illegal
|| tok
->X_op
== O_absent
)
2118 if (xtensa_operand_is_register (isa
, opcode
, opnd_cnt
) == 1)
2120 num_regs
= xtensa_operand_num_regs (isa
, opcode
, opnd_cnt
) - 1;
2121 /* minus 1 because we are seeing one right now */
2127 last_opnd_cnt
= opnd_cnt
;
2128 demand_empty_rest_of_line ();
2135 while (xtensa_operand_is_visible (isa
, opcode
, opnd_cnt
) == 0);
2139 if (num_regs
> 0 && ((int) next_reg
!= last_tok
->X_add_number
+ 1))
2142 insn
->ntok
= tok
- insn
->tok
;
2146 input_line_pointer
= old_input_line_pointer
;
2152 get_invisible_operands (TInsn
*insn
)
2154 xtensa_isa isa
= xtensa_default_isa
;
2155 static xtensa_insnbuf slotbuf
= NULL
;
2157 xtensa_opcode opc
= insn
->opcode
;
2158 int slot
, opnd
, fmt_found
;
2162 slotbuf
= xtensa_insnbuf_alloc (isa
);
2164 /* Find format/slot where this can be encoded. */
2167 for (fmt
= 0; fmt
< xtensa_isa_num_formats (isa
); fmt
++)
2169 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
2171 if (xtensa_opcode_encode (isa
, fmt
, slot
, slotbuf
, opc
) == 0)
2177 if (fmt_found
) break;
2182 as_bad (_("cannot encode opcode \"%s\""), xtensa_opcode_name (isa
, opc
));
2186 /* First encode all the visible operands
2187 (to deal with shared field operands). */
2188 for (opnd
= 0; opnd
< insn
->ntok
; opnd
++)
2190 if (xtensa_operand_is_visible (isa
, opc
, opnd
) == 1
2191 && (insn
->tok
[opnd
].X_op
== O_register
2192 || insn
->tok
[opnd
].X_op
== O_constant
))
2194 val
= insn
->tok
[opnd
].X_add_number
;
2195 xtensa_operand_encode (isa
, opc
, opnd
, &val
);
2196 xtensa_operand_set_field (isa
, opc
, opnd
, fmt
, slot
, slotbuf
, val
);
2200 /* Then pull out the values for the invisible ones. */
2201 for (opnd
= 0; opnd
< insn
->ntok
; opnd
++)
2203 if (xtensa_operand_is_visible (isa
, opc
, opnd
) == 0)
2205 xtensa_operand_get_field (isa
, opc
, opnd
, fmt
, slot
, slotbuf
, &val
);
2206 xtensa_operand_decode (isa
, opc
, opnd
, &val
);
2207 insn
->tok
[opnd
].X_add_number
= val
;
2208 if (xtensa_operand_is_register (isa
, opc
, opnd
) == 1)
2209 insn
->tok
[opnd
].X_op
= O_register
;
2211 insn
->tok
[opnd
].X_op
= O_constant
;
2220 xg_reverse_shift_count (char **cnt_argp
)
2222 char *cnt_arg
, *new_arg
;
2223 cnt_arg
= *cnt_argp
;
2225 /* replace the argument with "31-(argument)" */
2226 new_arg
= concat ("31-(", cnt_arg
, ")", (char *) NULL
);
2229 *cnt_argp
= new_arg
;
2233 /* If "arg" is a constant expression, return non-zero with the value
2237 xg_arg_is_constant (char *arg
, offsetT
*valp
)
2240 char *save_ptr
= input_line_pointer
;
2242 input_line_pointer
= arg
;
2244 input_line_pointer
= save_ptr
;
2246 if (exp
.X_op
== O_constant
)
2248 *valp
= exp
.X_add_number
;
2257 xg_replace_opname (char **popname
, const char *newop
)
2260 *popname
= xstrdup (newop
);
2265 xg_check_num_args (int *pnum_args
,
2270 int num_args
= *pnum_args
;
2272 if (num_args
< expected_num
)
2274 as_bad (_("not enough operands (%d) for '%s'; expected %d"),
2275 num_args
, opname
, expected_num
);
2279 if (num_args
> expected_num
)
2281 as_warn (_("too many operands (%d) for '%s'; expected %d"),
2282 num_args
, opname
, expected_num
);
2283 while (num_args
-- > expected_num
)
2285 free (arg_strings
[num_args
]);
2286 arg_strings
[num_args
] = 0;
2288 *pnum_args
= expected_num
;
2296 /* If the register is not specified as part of the opcode,
2297 then get it from the operand and move it to the opcode. */
2300 xg_translate_sysreg_op (char **popname
, int *pnum_args
, char **arg_strings
)
2302 xtensa_isa isa
= xtensa_default_isa
;
2304 char *opname
, *new_opname
;
2305 const char *sr_name
;
2306 int is_user
, is_write
;
2311 is_user
= (opname
[1] == 'u');
2312 is_write
= (opname
[0] == 'w');
2314 /* Opname == [rw]ur or [rwx]sr... */
2316 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
2319 /* Check if the argument is a symbolic register name. */
2320 sr
= xtensa_sysreg_lookup_name (isa
, arg_strings
[1]);
2321 /* Handle WSR to "INTSET" as a special case. */
2322 if (sr
== XTENSA_UNDEFINED
&& is_write
&& !is_user
2323 && !strcasecmp (arg_strings
[1], "intset"))
2324 sr
= xtensa_sysreg_lookup_name (isa
, "interrupt");
2325 if (sr
== XTENSA_UNDEFINED
2326 || (xtensa_sysreg_is_user (isa
, sr
) == 1) != is_user
)
2328 /* Maybe it's a register number.... */
2330 if (!xg_arg_is_constant (arg_strings
[1], &val
))
2332 as_bad (_("invalid register '%s' for '%s' instruction"),
2333 arg_strings
[1], opname
);
2336 sr
= xtensa_sysreg_lookup (isa
, val
, is_user
);
2337 if (sr
== XTENSA_UNDEFINED
)
2339 as_bad (_("invalid register number (%ld) for '%s' instruction"),
2340 (long) val
, opname
);
2345 /* Remove the last argument, which is now part of the opcode. */
2346 free (arg_strings
[1]);
2350 /* Translate the opcode. */
2351 sr_name
= xtensa_sysreg_name (isa
, sr
);
2352 /* Another special case for "WSR.INTSET".... */
2353 if (is_write
&& !is_user
&& !strcasecmp ("interrupt", sr_name
))
2355 new_opname
= concat (*popname
, ".", sr_name
, (char *) NULL
);
2357 *popname
= new_opname
;
2364 xtensa_translate_old_userreg_ops (char **popname
)
2366 xtensa_isa isa
= xtensa_default_isa
;
2368 char *opname
, *new_opname
;
2369 const char *sr_name
;
2370 bfd_boolean has_underbar
= FALSE
;
2373 if (opname
[0] == '_')
2375 has_underbar
= TRUE
;
2379 sr
= xtensa_sysreg_lookup_name (isa
, opname
+ 1);
2380 if (sr
!= XTENSA_UNDEFINED
)
2382 /* The new default name ("nnn") is different from the old default
2383 name ("URnnn"). The old default is handled below, and we don't
2384 want to recognize [RW]nnn, so do nothing if the name is the (new)
2386 static char namebuf
[10];
2387 sprintf (namebuf
, "%d", xtensa_sysreg_number (isa
, sr
));
2388 if (strcmp (namebuf
, opname
+ 1) == 0)
2396 /* Only continue if the reg name is "URnnn". */
2397 if (opname
[1] != 'u' || opname
[2] != 'r')
2399 val
= strtoul (opname
+ 3, &end
, 10);
2403 sr
= xtensa_sysreg_lookup (isa
, val
, 1);
2404 if (sr
== XTENSA_UNDEFINED
)
2406 as_bad (_("invalid register number (%ld) for '%s'"),
2407 (long) val
, opname
);
2412 /* Translate the opcode. */
2413 sr_name
= xtensa_sysreg_name (isa
, sr
);
2414 new_opname
= XNEWVEC (char, strlen (sr_name
) + 6);
2415 sprintf (new_opname
, "%s%cur.%s", (has_underbar
? "_" : ""),
2416 opname
[0], sr_name
);
2418 *popname
= new_opname
;
2425 xtensa_translate_zero_immed (const char *old_op
,
2435 gas_assert (opname
[0] != '_');
2437 if (strcmp (opname
, old_op
) != 0)
2440 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2442 if (xg_arg_is_constant (arg_strings
[1], &val
) && val
== 0)
2444 xg_replace_opname (popname
, new_op
);
2445 free (arg_strings
[1]);
2446 arg_strings
[1] = arg_strings
[2];
2455 /* If the instruction is an idiom (i.e., a built-in macro), translate it.
2456 Returns non-zero if an error was found. */
2459 xg_translate_idioms (char **popname
, int *pnum_args
, char **arg_strings
)
2461 char *opname
= *popname
;
2462 bfd_boolean has_underbar
= FALSE
;
2466 has_underbar
= TRUE
;
2470 if (strcmp (opname
, "mov") == 0)
2472 if (use_transform () && !has_underbar
&& density_supported
)
2473 xg_replace_opname (popname
, "mov.n");
2476 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
2478 xg_replace_opname (popname
, (has_underbar
? "_or" : "or"));
2479 arg_strings
[2] = xstrdup (arg_strings
[1]);
2485 if (strcmp (opname
, "bbsi.l") == 0)
2487 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2489 xg_replace_opname (popname
, (has_underbar
? "_bbsi" : "bbsi"));
2490 if (target_big_endian
)
2491 xg_reverse_shift_count (&arg_strings
[1]);
2495 if (strcmp (opname
, "bbci.l") == 0)
2497 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2499 xg_replace_opname (popname
, (has_underbar
? "_bbci" : "bbci"));
2500 if (target_big_endian
)
2501 xg_reverse_shift_count (&arg_strings
[1]);
2505 /* Don't do anything special with NOPs inside FLIX instructions. They
2506 are handled elsewhere. Real NOP instructions are always available
2507 in configurations with FLIX, so this should never be an issue but
2508 check for it anyway. */
2509 if (!cur_vinsn
.inside_bundle
&& xtensa_nop_opcode
== XTENSA_UNDEFINED
2510 && strcmp (opname
, "nop") == 0)
2512 if (use_transform () && !has_underbar
&& density_supported
)
2513 xg_replace_opname (popname
, "nop.n");
2516 if (xg_check_num_args (pnum_args
, 0, opname
, arg_strings
))
2518 xg_replace_opname (popname
, (has_underbar
? "_or" : "or"));
2519 arg_strings
[0] = xstrdup ("a1");
2520 arg_strings
[1] = xstrdup ("a1");
2521 arg_strings
[2] = xstrdup ("a1");
2527 /* Recognize [RW]UR and [RWX]SR. */
2528 if ((((opname
[0] == 'r' || opname
[0] == 'w')
2529 && (opname
[1] == 'u' || opname
[1] == 's'))
2530 || (opname
[0] == 'x' && opname
[1] == 's'))
2532 && opname
[3] == '\0')
2533 return xg_translate_sysreg_op (popname
, pnum_args
, arg_strings
);
2535 /* Backward compatibility for RUR and WUR: Recognize [RW]UR<nnn> and
2536 [RW]<name> if <name> is the non-default name of a user register. */
2537 if ((opname
[0] == 'r' || opname
[0] == 'w')
2538 && xtensa_opcode_lookup (xtensa_default_isa
, opname
) == XTENSA_UNDEFINED
)
2539 return xtensa_translate_old_userreg_ops (popname
);
2541 /* Relax branches that don't allow comparisons against an immediate value
2542 of zero to the corresponding branches with implicit zero immediates. */
2543 if (!has_underbar
&& use_transform ())
2545 if (xtensa_translate_zero_immed ("bnei", "bnez", popname
,
2546 pnum_args
, arg_strings
))
2549 if (xtensa_translate_zero_immed ("beqi", "beqz", popname
,
2550 pnum_args
, arg_strings
))
2553 if (xtensa_translate_zero_immed ("bgei", "bgez", popname
,
2554 pnum_args
, arg_strings
))
2557 if (xtensa_translate_zero_immed ("blti", "bltz", popname
,
2558 pnum_args
, arg_strings
))
2566 /* Functions for dealing with the Xtensa ISA. */
2568 /* Currently the assembler only allows us to use a single target per
2569 fragment. Because of this, only one operand for a given
2570 instruction may be symbolic. If there is a PC-relative operand,
2571 the last one is chosen. Otherwise, the result is the number of the
2572 last immediate operand, and if there are none of those, we fail and
2576 get_relaxable_immed (xtensa_opcode opcode
)
2578 int last_immed
= -1;
2581 if (opcode
== XTENSA_UNDEFINED
)
2584 noperands
= xtensa_opcode_num_operands (xtensa_default_isa
, opcode
);
2585 for (opi
= noperands
- 1; opi
>= 0; opi
--)
2587 if (xtensa_operand_is_visible (xtensa_default_isa
, opcode
, opi
) == 0)
2589 if (xtensa_operand_is_PCrelative (xtensa_default_isa
, opcode
, opi
) == 1)
2591 if (last_immed
== -1
2592 && xtensa_operand_is_register (xtensa_default_isa
, opcode
, opi
) == 0)
2599 static xtensa_opcode
2600 get_opcode_from_buf (const char *buf
, int slot
)
2602 static xtensa_insnbuf insnbuf
= NULL
;
2603 static xtensa_insnbuf slotbuf
= NULL
;
2604 xtensa_isa isa
= xtensa_default_isa
;
2609 insnbuf
= xtensa_insnbuf_alloc (isa
);
2610 slotbuf
= xtensa_insnbuf_alloc (isa
);
2613 xtensa_insnbuf_from_chars (isa
, insnbuf
, (const unsigned char *) buf
, 0);
2614 fmt
= xtensa_format_decode (isa
, insnbuf
);
2615 if (fmt
== XTENSA_UNDEFINED
)
2616 return XTENSA_UNDEFINED
;
2618 if (slot
>= xtensa_format_num_slots (isa
, fmt
))
2619 return XTENSA_UNDEFINED
;
2621 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
2622 return xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
2626 #ifdef TENSILICA_DEBUG
2628 /* For debugging, print out the mapping of opcode numbers to opcodes. */
2631 xtensa_print_insn_table (void)
2633 int num_opcodes
, num_operands
;
2634 xtensa_opcode opcode
;
2635 xtensa_isa isa
= xtensa_default_isa
;
2637 num_opcodes
= xtensa_isa_num_opcodes (xtensa_default_isa
);
2638 for (opcode
= 0; opcode
< num_opcodes
; opcode
++)
2641 fprintf (stderr
, "%d: %s: ", opcode
, xtensa_opcode_name (isa
, opcode
));
2642 num_operands
= xtensa_opcode_num_operands (isa
, opcode
);
2643 for (opn
= 0; opn
< num_operands
; opn
++)
2645 if (xtensa_operand_is_visible (isa
, opcode
, opn
) == 0)
2647 if (xtensa_operand_is_register (isa
, opcode
, opn
) == 1)
2649 xtensa_regfile opnd_rf
=
2650 xtensa_operand_regfile (isa
, opcode
, opn
);
2651 fprintf (stderr
, "%s ", xtensa_regfile_shortname (isa
, opnd_rf
));
2653 else if (xtensa_operand_is_PCrelative (isa
, opcode
, opn
) == 1)
2654 fputs ("[lLr] ", stderr
);
2656 fputs ("i ", stderr
);
2658 fprintf (stderr
, "\n");
2664 print_vliw_insn (xtensa_insnbuf vbuf
)
2666 xtensa_isa isa
= xtensa_default_isa
;
2667 xtensa_format f
= xtensa_format_decode (isa
, vbuf
);
2668 xtensa_insnbuf sbuf
= xtensa_insnbuf_alloc (isa
);
2671 fprintf (stderr
, "format = %d\n", f
);
2673 for (op
= 0; op
< xtensa_format_num_slots (isa
, f
); op
++)
2675 xtensa_opcode opcode
;
2679 xtensa_format_get_slot (isa
, f
, op
, vbuf
, sbuf
);
2680 opcode
= xtensa_opcode_decode (isa
, f
, op
, sbuf
);
2681 opname
= xtensa_opcode_name (isa
, opcode
);
2683 fprintf (stderr
, "op in slot %i is %s;\n", op
, opname
);
2684 fprintf (stderr
, " operands = ");
2686 operands
< xtensa_opcode_num_operands (isa
, opcode
);
2690 if (xtensa_operand_is_visible (isa
, opcode
, operands
) == 0)
2692 xtensa_operand_get_field (isa
, opcode
, operands
, f
, op
, sbuf
, &val
);
2693 xtensa_operand_decode (isa
, opcode
, operands
, &val
);
2694 fprintf (stderr
, "%d ", val
);
2696 fprintf (stderr
, "\n");
2698 xtensa_insnbuf_free (isa
, sbuf
);
2701 #endif /* TENSILICA_DEBUG */
2705 is_direct_call_opcode (xtensa_opcode opcode
)
2707 xtensa_isa isa
= xtensa_default_isa
;
2708 int n
, num_operands
;
2710 if (xtensa_opcode_is_call (isa
, opcode
) != 1)
2713 num_operands
= xtensa_opcode_num_operands (isa
, opcode
);
2714 for (n
= 0; n
< num_operands
; n
++)
2716 if (xtensa_operand_is_register (isa
, opcode
, n
) == 0
2717 && xtensa_operand_is_PCrelative (isa
, opcode
, n
) == 1)
2724 /* Convert from BFD relocation type code to slot and operand number.
2725 Returns non-zero on failure. */
2728 decode_reloc (bfd_reloc_code_real_type reloc
, int *slot
, bfd_boolean
*is_alt
)
2730 if (reloc
>= BFD_RELOC_XTENSA_SLOT0_OP
2731 && reloc
<= BFD_RELOC_XTENSA_SLOT14_OP
)
2733 *slot
= reloc
- BFD_RELOC_XTENSA_SLOT0_OP
;
2736 else if (reloc
>= BFD_RELOC_XTENSA_SLOT0_ALT
2737 && reloc
<= BFD_RELOC_XTENSA_SLOT14_ALT
)
2739 *slot
= reloc
- BFD_RELOC_XTENSA_SLOT0_ALT
;
2749 /* Convert from slot number to BFD relocation type code for the
2750 standard PC-relative relocations. Return BFD_RELOC_NONE on
2753 static bfd_reloc_code_real_type
2754 encode_reloc (int slot
)
2756 if (slot
< 0 || slot
> 14)
2757 return BFD_RELOC_NONE
;
2759 return BFD_RELOC_XTENSA_SLOT0_OP
+ slot
;
2763 /* Convert from slot numbers to BFD relocation type code for the
2764 "alternate" relocations. Return BFD_RELOC_NONE on failure. */
2766 static bfd_reloc_code_real_type
2767 encode_alt_reloc (int slot
)
2769 if (slot
< 0 || slot
> 14)
2770 return BFD_RELOC_NONE
;
2772 return BFD_RELOC_XTENSA_SLOT0_ALT
+ slot
;
2777 xtensa_insnbuf_set_operand (xtensa_insnbuf slotbuf
,
2780 xtensa_opcode opcode
,
2786 uint32 valbuf
= value
;
2788 if (xtensa_operand_encode (xtensa_default_isa
, opcode
, operand
, &valbuf
))
2790 if (xtensa_operand_is_PCrelative (xtensa_default_isa
, opcode
, operand
)
2792 as_bad_where ((char *) file
, line
,
2793 _("operand %d of '%s' has out of range value '%u'"),
2795 xtensa_opcode_name (xtensa_default_isa
, opcode
),
2798 as_bad_where ((char *) file
, line
,
2799 _("operand %d of '%s' has invalid value '%u'"),
2801 xtensa_opcode_name (xtensa_default_isa
, opcode
),
2806 xtensa_operand_set_field (xtensa_default_isa
, opcode
, operand
, fmt
, slot
,
2812 xtensa_insnbuf_get_operand (xtensa_insnbuf slotbuf
,
2815 xtensa_opcode opcode
,
2819 (void) xtensa_operand_get_field (xtensa_default_isa
, opcode
, opnum
,
2820 fmt
, slot
, slotbuf
, &val
);
2821 (void) xtensa_operand_decode (xtensa_default_isa
, opcode
, opnum
, &val
);
2826 /* Checks for rules from xtensa-relax tables. */
2828 /* The routine xg_instruction_matches_option_term must return TRUE
2829 when a given option term is true. The meaning of all of the option
2830 terms is given interpretation by this function. */
2833 xg_instruction_matches_option_term (TInsn
*insn
, const ReqOrOption
*option
)
2835 if (strcmp (option
->option_name
, "realnop") == 0
2836 || strncmp (option
->option_name
, "IsaUse", 6) == 0)
2838 /* These conditions were evaluated statically when building the
2839 relaxation table. There's no need to reevaluate them now. */
2842 else if (strcmp (option
->option_name
, "FREEREG") == 0)
2843 return insn
->extra_arg
.X_op
== O_register
;
2846 as_fatal (_("internal error: unknown option name '%s'"),
2847 option
->option_name
);
2853 xg_instruction_matches_or_options (TInsn
*insn
,
2854 const ReqOrOptionList
*or_option
)
2856 const ReqOrOption
*option
;
2857 /* Must match each of the AND terms. */
2858 for (option
= or_option
; option
!= NULL
; option
= option
->next
)
2860 if (xg_instruction_matches_option_term (insn
, option
))
2868 xg_instruction_matches_options (TInsn
*insn
, const ReqOptionList
*options
)
2870 const ReqOption
*req_options
;
2871 /* Must match each of the AND terms. */
2872 for (req_options
= options
;
2873 req_options
!= NULL
;
2874 req_options
= req_options
->next
)
2876 /* Must match one of the OR clauses. */
2877 if (!xg_instruction_matches_or_options (insn
,
2878 req_options
->or_option_terms
))
2885 /* Return the transition rule that matches or NULL if none matches. */
2888 xg_instruction_matches_rule (TInsn
*insn
, TransitionRule
*rule
)
2890 PreconditionList
*condition_l
;
2892 if (rule
->opcode
!= insn
->opcode
)
2895 for (condition_l
= rule
->conditions
;
2896 condition_l
!= NULL
;
2897 condition_l
= condition_l
->next
)
2901 Precondition
*cond
= condition_l
->precond
;
2906 /* The expression must be the constant. */
2907 gas_assert (cond
->op_num
< insn
->ntok
);
2908 exp1
= &insn
->tok
[cond
->op_num
];
2909 if (expr_is_const (exp1
))
2914 if (get_expr_const (exp1
) != cond
->op_data
)
2918 if (get_expr_const (exp1
) == cond
->op_data
)
2925 else if (expr_is_register (exp1
))
2930 if (get_expr_register (exp1
) != cond
->op_data
)
2934 if (get_expr_register (exp1
) == cond
->op_data
)
2946 gas_assert (cond
->op_num
< insn
->ntok
);
2947 gas_assert (cond
->op_data
< insn
->ntok
);
2948 exp1
= &insn
->tok
[cond
->op_num
];
2949 exp2
= &insn
->tok
[cond
->op_data
];
2954 if (!expr_is_equal (exp1
, exp2
))
2958 if (expr_is_equal (exp1
, exp2
))
2970 if (!xg_instruction_matches_options (insn
, rule
->options
))
2978 transition_rule_cmp (const TransitionRule
*a
, const TransitionRule
*b
)
2980 bfd_boolean a_greater
= FALSE
;
2981 bfd_boolean b_greater
= FALSE
;
2983 ReqOptionList
*l_a
= a
->options
;
2984 ReqOptionList
*l_b
= b
->options
;
2986 /* We only care if they both are the same except for
2987 a const16 vs. an l32r. */
2989 while (l_a
&& l_b
&& ((l_a
->next
== NULL
) == (l_b
->next
== NULL
)))
2991 ReqOrOptionList
*l_or_a
= l_a
->or_option_terms
;
2992 ReqOrOptionList
*l_or_b
= l_b
->or_option_terms
;
2993 while (l_or_a
&& l_or_b
&& ((l_a
->next
== NULL
) == (l_b
->next
== NULL
)))
2995 if (l_or_a
->is_true
!= l_or_b
->is_true
)
2997 if (strcmp (l_or_a
->option_name
, l_or_b
->option_name
) != 0)
2999 /* This is the case we care about. */
3000 if (strcmp (l_or_a
->option_name
, "IsaUseConst16") == 0
3001 && strcmp (l_or_b
->option_name
, "IsaUseL32R") == 0)
3008 else if (strcmp (l_or_a
->option_name
, "IsaUseL32R") == 0
3009 && strcmp (l_or_b
->option_name
, "IsaUseConst16") == 0)
3019 l_or_a
= l_or_a
->next
;
3020 l_or_b
= l_or_b
->next
;
3022 if (l_or_a
|| l_or_b
)
3031 /* Incomparable if the substitution was used differently in two cases. */
3032 if (a_greater
&& b_greater
)
3044 static TransitionRule
*
3045 xg_instruction_match (TInsn
*insn
)
3047 TransitionTable
*table
= xg_build_simplify_table (&transition_rule_cmp
);
3049 gas_assert (insn
->opcode
< table
->num_opcodes
);
3051 /* Walk through all of the possible transitions. */
3052 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3054 TransitionRule
*rule
= l
->rule
;
3055 if (xg_instruction_matches_rule (insn
, rule
))
3062 /* Various Other Internal Functions. */
3065 is_unique_insn_expansion (TransitionRule
*r
)
3067 if (!r
->to_instr
|| r
->to_instr
->next
!= NULL
)
3069 if (r
->to_instr
->typ
!= INSTR_INSTR
)
3075 /* Check if there is exactly one relaxation for INSN that converts it to
3076 another instruction of equal or larger size. If so, and if TARG is
3077 non-null, go ahead and generate the relaxed instruction into TARG. If
3078 NARROW_ONLY is true, then only consider relaxations that widen a narrow
3079 instruction, i.e., ignore relaxations that convert to an instruction of
3080 equal size. In some contexts where this function is used, only
3081 a single widening is allowed and the NARROW_ONLY argument is used to
3082 exclude cases like ADDI being "widened" to an ADDMI, which may
3083 later be relaxed to an ADDMI/ADDI pair. */
3086 xg_is_single_relaxable_insn (TInsn
*insn
, TInsn
*targ
, bfd_boolean narrow_only
)
3088 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3090 TransitionRule
*match
= 0;
3092 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3093 gas_assert (insn
->opcode
< table
->num_opcodes
);
3095 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3097 TransitionRule
*rule
= l
->rule
;
3099 if (xg_instruction_matches_rule (insn
, rule
)
3100 && is_unique_insn_expansion (rule
)
3101 && (xg_get_single_size (insn
->opcode
) + (narrow_only
? 1 : 0)
3102 <= xg_get_single_size (rule
->to_instr
->opcode
)))
3113 xg_build_to_insn (targ
, insn
, match
->to_instr
);
3118 /* Return the maximum number of bytes this opcode can expand to. */
3121 xg_get_max_insn_widen_size (xtensa_opcode opcode
)
3123 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3125 int max_size
= xg_get_single_size (opcode
);
3127 gas_assert (opcode
< table
->num_opcodes
);
3129 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
3131 TransitionRule
*rule
= l
->rule
;
3132 BuildInstr
*build_list
;
3137 build_list
= rule
->to_instr
;
3138 if (is_unique_insn_expansion (rule
))
3140 gas_assert (build_list
->typ
== INSTR_INSTR
);
3141 this_size
= xg_get_max_insn_widen_size (build_list
->opcode
);
3144 for (; build_list
!= NULL
; build_list
= build_list
->next
)
3146 switch (build_list
->typ
)
3149 this_size
+= xg_get_single_size (build_list
->opcode
);
3151 case INSTR_LITERAL_DEF
:
3152 case INSTR_LABEL_DEF
:
3157 if (this_size
> max_size
)
3158 max_size
= this_size
;
3164 /* Return the maximum number of literal bytes this opcode can generate. */
3167 xg_get_max_insn_widen_literal_size (xtensa_opcode opcode
)
3169 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3173 gas_assert (opcode
< table
->num_opcodes
);
3175 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
3177 TransitionRule
*rule
= l
->rule
;
3178 BuildInstr
*build_list
;
3183 build_list
= rule
->to_instr
;
3184 if (is_unique_insn_expansion (rule
))
3186 gas_assert (build_list
->typ
== INSTR_INSTR
);
3187 this_size
= xg_get_max_insn_widen_literal_size (build_list
->opcode
);
3190 for (; build_list
!= NULL
; build_list
= build_list
->next
)
3192 switch (build_list
->typ
)
3194 case INSTR_LITERAL_DEF
:
3195 /* Hard-coded 4-byte literal. */
3199 case INSTR_LABEL_DEF
:
3204 if (this_size
> max_size
)
3205 max_size
= this_size
;
3212 xg_is_relaxable_insn (TInsn
*insn
, int lateral_steps
)
3214 int steps_taken
= 0;
3215 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3218 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3219 gas_assert (insn
->opcode
< table
->num_opcodes
);
3221 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3223 TransitionRule
*rule
= l
->rule
;
3225 if (xg_instruction_matches_rule (insn
, rule
))
3227 if (steps_taken
== lateral_steps
)
3237 get_special_literal_symbol (void)
3239 static symbolS
*sym
= NULL
;
3242 sym
= symbol_find_or_make ("SPECIAL_LITERAL0\001");
3248 get_special_label_symbol (void)
3250 static symbolS
*sym
= NULL
;
3253 sym
= symbol_find_or_make ("SPECIAL_LABEL0\001");
3259 xg_valid_literal_expression (const expressionS
*exp
)
3281 /* This will check to see if the value can be converted into the
3282 operand type. It will return TRUE if it does not fit. */
3285 xg_check_operand (int32 value
, xtensa_opcode opcode
, int operand
)
3287 uint32 valbuf
= value
;
3288 if (xtensa_operand_encode (xtensa_default_isa
, opcode
, operand
, &valbuf
))
3294 /* Assumes: All immeds are constants. Check that all constants fit
3295 into their immeds; return FALSE if not. */
3298 xg_immeds_fit (const TInsn
*insn
)
3300 xtensa_isa isa
= xtensa_default_isa
;
3304 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3305 for (i
= 0; i
< n
; ++i
)
3307 const expressionS
*exp
= &insn
->tok
[i
];
3309 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
3316 if (xg_check_operand (exp
->X_add_number
, insn
->opcode
, i
))
3321 /* The symbol should have a fixup associated with it. */
3330 /* This should only be called after we have an initial
3331 estimate of the addresses. */
3334 xg_symbolic_immeds_fit (const TInsn
*insn
,
3340 xtensa_isa isa
= xtensa_default_isa
;
3348 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3350 for (i
= 0; i
< n
; ++i
)
3352 const expressionS
*exp
= &insn
->tok
[i
];
3354 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
3361 if (xg_check_operand (exp
->X_add_number
, insn
->opcode
, i
))
3367 /* Check for the worst case. */
3368 if (xg_check_operand (0xffff, insn
->opcode
, i
))
3373 /* We only allow symbols for PC-relative references.
3374 If pc_frag == 0, then we don't have frag locations yet. */
3376 || xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 0)
3379 /* If it is a weak symbol or a symbol in a different section,
3380 it cannot be known to fit at assembly time. */
3381 if (S_IS_WEAK (exp
->X_add_symbol
)
3382 || S_GET_SEGMENT (exp
->X_add_symbol
) != pc_seg
)
3384 /* For a direct call with --no-longcalls, be optimistic and
3385 assume it will be in range. If the symbol is weak and
3386 undefined, it may remain undefined at link-time, in which
3387 case it will have a zero value and almost certainly be out
3388 of range for a direct call; thus, relax for undefined weak
3389 symbols even if longcalls is not enabled. */
3390 if (is_direct_call_opcode (insn
->opcode
)
3391 && ! pc_frag
->tc_frag_data
.use_longcalls
3392 && (! S_IS_WEAK (exp
->X_add_symbol
)
3393 || S_IS_DEFINED (exp
->X_add_symbol
)))
3399 symbolP
= exp
->X_add_symbol
;
3400 sym_frag
= symbol_get_frag (symbolP
);
3401 target
= S_GET_VALUE (symbolP
) + exp
->X_add_number
;
3402 pc
= pc_frag
->fr_address
+ pc_offset
;
3404 /* If frag has yet to be reached on this pass, assume it
3405 will move by STRETCH just as we did. If this is not so,
3406 it will be because some frag between grows, and that will
3407 force another pass. Beware zero-length frags. There
3408 should be a faster way to do this. */
3411 && sym_frag
->relax_marker
!= pc_frag
->relax_marker
3412 && S_GET_SEGMENT (symbolP
) == pc_seg
)
3417 new_offset
= target
;
3418 xtensa_operand_do_reloc (isa
, insn
->opcode
, i
, &new_offset
, pc
);
3419 if (xg_check_operand (new_offset
, insn
->opcode
, i
))
3424 /* The symbol should have a fixup associated with it. */
3433 /* Return TRUE on success. */
3436 xg_build_to_insn (TInsn
*targ
, TInsn
*insn
, BuildInstr
*bi
)
3442 targ
->debug_line
= insn
->debug_line
;
3443 targ
->loc_directive_seen
= insn
->loc_directive_seen
;
3448 targ
->opcode
= bi
->opcode
;
3449 targ
->insn_type
= ITYPE_INSN
;
3450 targ
->is_specific_opcode
= FALSE
;
3452 for (; op
!= NULL
; op
= op
->next
)
3454 int op_num
= op
->op_num
;
3455 int op_data
= op
->op_data
;
3457 gas_assert (op
->op_num
< MAX_INSN_ARGS
);
3459 if (targ
->ntok
<= op_num
)
3460 targ
->ntok
= op_num
+ 1;
3465 set_expr_const (&targ
->tok
[op_num
], op_data
);
3468 gas_assert (op_data
< insn
->ntok
);
3469 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3472 if (insn
->extra_arg
.X_op
!= O_register
)
3474 copy_expr (&targ
->tok
[op_num
], &insn
->extra_arg
);
3477 sym
= get_special_literal_symbol ();
3478 set_expr_symbol_offset (&targ
->tok
[op_num
], sym
, 0);
3479 if (insn
->tok
[op_data
].X_op
== O_tlsfunc
3480 || insn
->tok
[op_data
].X_op
== O_tlsarg
)
3481 copy_expr (&targ
->extra_arg
, &insn
->tok
[op_data
]);
3484 sym
= get_special_label_symbol ();
3485 set_expr_symbol_offset (&targ
->tok
[op_num
], sym
, 0);
3487 case OP_OPERAND_HI16U
:
3488 case OP_OPERAND_LOW16U
:
3489 gas_assert (op_data
< insn
->ntok
);
3490 if (expr_is_const (&insn
->tok
[op_data
]))
3493 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3494 val
= xg_apply_userdef_op_fn (op
->typ
,
3497 targ
->tok
[op_num
].X_add_number
= val
;
3501 /* For const16 we can create relocations for these. */
3502 if (targ
->opcode
== XTENSA_UNDEFINED
3503 || (targ
->opcode
!= xtensa_const16_opcode
))
3505 gas_assert (op_data
< insn
->ntok
);
3506 /* Need to build a O_lo16 or O_hi16. */
3507 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3508 if (targ
->tok
[op_num
].X_op
== O_symbol
)
3510 if (op
->typ
== OP_OPERAND_HI16U
)
3511 targ
->tok
[op_num
].X_op
= O_hi16
;
3512 else if (op
->typ
== OP_OPERAND_LOW16U
)
3513 targ
->tok
[op_num
].X_op
= O_lo16
;
3520 /* currently handles:
3523 OP_OPERAND_F32MINUS */
3524 if (xg_has_userdef_op_fn (op
->typ
))
3526 gas_assert (op_data
< insn
->ntok
);
3527 if (expr_is_const (&insn
->tok
[op_data
]))
3530 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3531 val
= xg_apply_userdef_op_fn (op
->typ
,
3534 targ
->tok
[op_num
].X_add_number
= val
;
3537 return FALSE
; /* We cannot use a relocation for this. */
3546 case INSTR_LITERAL_DEF
:
3548 targ
->opcode
= XTENSA_UNDEFINED
;
3549 targ
->insn_type
= ITYPE_LITERAL
;
3550 targ
->is_specific_opcode
= FALSE
;
3551 for (; op
!= NULL
; op
= op
->next
)
3553 int op_num
= op
->op_num
;
3554 int op_data
= op
->op_data
;
3555 gas_assert (op
->op_num
< MAX_INSN_ARGS
);
3557 if (targ
->ntok
<= op_num
)
3558 targ
->ntok
= op_num
+ 1;
3563 gas_assert (op_data
< insn
->ntok
);
3564 /* We can only pass resolvable literals through. */
3565 if (!xg_valid_literal_expression (&insn
->tok
[op_data
]))
3567 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3579 case INSTR_LABEL_DEF
:
3581 targ
->opcode
= XTENSA_UNDEFINED
;
3582 targ
->insn_type
= ITYPE_LABEL
;
3583 targ
->is_specific_opcode
= FALSE
;
3584 /* Literal with no ops is a label? */
3585 gas_assert (op
== NULL
);
3596 /* Return TRUE on success. */
3599 xg_build_to_stack (IStack
*istack
, TInsn
*insn
, BuildInstr
*bi
)
3601 for (; bi
!= NULL
; bi
= bi
->next
)
3603 TInsn
*next_insn
= istack_push_space (istack
);
3605 if (!xg_build_to_insn (next_insn
, insn
, bi
))
3612 /* Return TRUE on valid expansion. */
3615 xg_expand_to_stack (IStack
*istack
, TInsn
*insn
, int lateral_steps
)
3617 int stack_size
= istack
->ninsn
;
3618 int steps_taken
= 0;
3619 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3622 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3623 gas_assert (insn
->opcode
< table
->num_opcodes
);
3625 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3627 TransitionRule
*rule
= l
->rule
;
3629 if (xg_instruction_matches_rule (insn
, rule
))
3631 if (lateral_steps
== steps_taken
)
3635 /* This is it. Expand the rule to the stack. */
3636 if (!xg_build_to_stack (istack
, insn
, rule
->to_instr
))
3639 /* Check to see if it fits. */
3640 for (i
= stack_size
; i
< istack
->ninsn
; i
++)
3642 TInsn
*tinsn
= &istack
->insn
[i
];
3644 if (tinsn
->insn_type
== ITYPE_INSN
3645 && !tinsn_has_symbolic_operands (tinsn
)
3646 && !xg_immeds_fit (tinsn
))
3648 istack
->ninsn
= stack_size
;
3661 /* Relax the assembly instruction at least "min_steps".
3662 Return the number of steps taken.
3664 For relaxation to correctly terminate, every relaxation chain must
3665 terminate in one of two ways:
3667 1. If the chain from one instruction to the next consists entirely of
3668 single instructions, then the chain *must* handle all possible
3669 immediates without failing. It must not ever fail because an
3670 immediate is out of range. The MOVI.N -> MOVI -> L32R relaxation
3671 chain is one example. L32R loads 32 bits, and there cannot be an
3672 immediate larger than 32 bits, so it satisfies this condition.
3673 Single instruction relaxation chains are as defined by
3674 xg_is_single_relaxable_instruction.
3676 2. Otherwise, the chain must end in a multi-instruction expansion: e.g.,
3677 BNEZ.N -> BNEZ -> BNEZ.W15 -> BENZ.N/J
3679 Strictly speaking, in most cases you can violate condition 1 and be OK
3680 -- in particular when the last two instructions have the same single
3681 size. But nevertheless, you should guarantee the above two conditions.
3683 We could fix this so that single-instruction expansions correctly
3684 terminate when they can't handle the range, but the error messages are
3685 worse, and it actually turns out that in every case but one (18-bit wide
3686 branches), you need a multi-instruction expansion to get the full range
3687 anyway. And because 18-bit branches are handled identically to 15-bit
3688 branches, there isn't any point in changing it. */
3691 xg_assembly_relax (IStack
*istack
,
3694 fragS
*pc_frag
, /* if pc_frag == 0, not pc-relative */
3695 offsetT pc_offset
, /* offset in fragment */
3696 int min_steps
, /* minimum conversion steps */
3697 long stretch
) /* number of bytes stretched so far */
3699 int steps_taken
= 0;
3701 /* Some of its immeds don't fit. Try to build a relaxed version.
3702 This may go through a couple of stages of single instruction
3703 transformations before we get there. */
3705 TInsn single_target
;
3707 int lateral_steps
= 0;
3708 int istack_size
= istack
->ninsn
;
3710 if (xg_symbolic_immeds_fit (insn
, pc_seg
, pc_frag
, pc_offset
, stretch
)
3711 && steps_taken
>= min_steps
)
3713 istack_push (istack
, insn
);
3716 current_insn
= *insn
;
3718 /* Walk through all of the single instruction expansions. */
3719 while (xg_is_single_relaxable_insn (¤t_insn
, &single_target
, FALSE
))
3722 if (xg_symbolic_immeds_fit (&single_target
, pc_seg
, pc_frag
, pc_offset
,
3725 if (steps_taken
>= min_steps
)
3727 istack_push (istack
, &single_target
);
3731 current_insn
= single_target
;
3734 /* Now check for a multi-instruction expansion. */
3735 while (xg_is_relaxable_insn (¤t_insn
, lateral_steps
))
3737 if (xg_symbolic_immeds_fit (¤t_insn
, pc_seg
, pc_frag
, pc_offset
,
3740 if (steps_taken
>= min_steps
)
3742 istack_push (istack
, ¤t_insn
);
3747 if (xg_expand_to_stack (istack
, ¤t_insn
, lateral_steps
))
3749 if (steps_taken
>= min_steps
)
3753 istack
->ninsn
= istack_size
;
3756 /* It's not going to work -- use the original. */
3757 istack_push (istack
, insn
);
3763 xg_finish_frag (char *last_insn
,
3764 enum xtensa_relax_statesE frag_state
,
3765 enum xtensa_relax_statesE slot0_state
,
3767 bfd_boolean is_insn
)
3769 /* Finish off this fragment so that it has at LEAST the desired
3770 max_growth. If it doesn't fit in this fragment, close this one
3771 and start a new one. In either case, return a pointer to the
3772 beginning of the growth area. */
3776 frag_grow (max_growth
);
3777 old_frag
= frag_now
;
3779 frag_now
->fr_opcode
= last_insn
;
3781 frag_now
->tc_frag_data
.is_insn
= TRUE
;
3783 frag_var (rs_machine_dependent
, max_growth
, max_growth
,
3784 frag_state
, frag_now
->fr_symbol
, frag_now
->fr_offset
, last_insn
);
3786 old_frag
->tc_frag_data
.slot_subtypes
[0] = slot0_state
;
3787 xtensa_set_frag_assembly_state (frag_now
);
3789 /* Just to make sure that we did not split it up. */
3790 gas_assert (old_frag
->fr_next
== frag_now
);
3794 /* Return TRUE if the target frag is one of the next non-empty frags. */
3797 is_next_frag_target (const fragS
*fragP
, const fragS
*target
)
3802 for (; fragP
; fragP
= fragP
->fr_next
)
3804 if (fragP
== target
)
3806 if (fragP
->fr_fix
!= 0)
3808 if (fragP
->fr_type
== rs_fill
&& fragP
->fr_offset
!= 0)
3810 if ((fragP
->fr_type
== rs_align
|| fragP
->fr_type
== rs_align_code
)
3811 && ((fragP
->fr_address
% (1 << fragP
->fr_offset
)) != 0))
3813 if (fragP
->fr_type
== rs_space
)
3821 is_branch_jmp_to_next (TInsn
*insn
, fragS
*fragP
)
3823 xtensa_isa isa
= xtensa_default_isa
;
3825 int num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
3830 if (xtensa_opcode_is_branch (isa
, insn
->opcode
) != 1
3831 && xtensa_opcode_is_jump (isa
, insn
->opcode
) != 1)
3834 for (i
= 0; i
< num_ops
; i
++)
3836 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1)
3842 if (target_op
== -1)
3845 if (insn
->ntok
<= target_op
)
3848 if (insn
->tok
[target_op
].X_op
!= O_symbol
)
3851 sym
= insn
->tok
[target_op
].X_add_symbol
;
3855 if (insn
->tok
[target_op
].X_add_number
!= 0)
3858 target_frag
= symbol_get_frag (sym
);
3859 if (target_frag
== NULL
)
3862 if (is_next_frag_target (fragP
->fr_next
, target_frag
)
3863 && S_GET_VALUE (sym
) == target_frag
->fr_address
)
3871 xg_add_branch_and_loop_targets (TInsn
*insn
)
3873 xtensa_isa isa
= xtensa_default_isa
;
3874 int num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
3876 if (xtensa_opcode_is_loop (isa
, insn
->opcode
) == 1)
3879 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1
3880 && insn
->tok
[i
].X_op
== O_symbol
)
3881 symbol_get_tc (insn
->tok
[i
].X_add_symbol
)->is_loop_target
= TRUE
;
3885 if (xtensa_opcode_is_branch (isa
, insn
->opcode
) == 1
3886 || xtensa_opcode_is_loop (isa
, insn
->opcode
) == 1)
3890 for (i
= 0; i
< insn
->ntok
&& i
< num_ops
; i
++)
3892 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1
3893 && insn
->tok
[i
].X_op
== O_symbol
)
3895 symbolS
*sym
= insn
->tok
[i
].X_add_symbol
;
3896 symbol_get_tc (sym
)->is_branch_target
= TRUE
;
3897 if (S_IS_DEFINED (sym
))
3898 symbol_get_frag (sym
)->tc_frag_data
.is_branch_target
= TRUE
;
3905 /* Return FALSE if no error. */
3908 xg_build_token_insn (BuildInstr
*instr_spec
, TInsn
*old_insn
, TInsn
*new_insn
)
3913 switch (instr_spec
->typ
)
3916 new_insn
->insn_type
= ITYPE_INSN
;
3917 new_insn
->opcode
= instr_spec
->opcode
;
3919 case INSTR_LITERAL_DEF
:
3920 new_insn
->insn_type
= ITYPE_LITERAL
;
3921 new_insn
->opcode
= XTENSA_UNDEFINED
;
3923 case INSTR_LABEL_DEF
:
3926 new_insn
->is_specific_opcode
= FALSE
;
3927 new_insn
->debug_line
= old_insn
->debug_line
;
3928 new_insn
->loc_directive_seen
= old_insn
->loc_directive_seen
;
3930 for (b_op
= instr_spec
->ops
; b_op
!= NULL
; b_op
= b_op
->next
)
3933 const expressionS
*src_exp
;
3939 /* The expression must be the constant. */
3940 gas_assert (b_op
->op_num
< MAX_INSN_ARGS
);
3941 exp
= &new_insn
->tok
[b_op
->op_num
];
3942 set_expr_const (exp
, b_op
->op_data
);
3946 gas_assert (b_op
->op_num
< MAX_INSN_ARGS
);
3947 gas_assert (b_op
->op_data
< (unsigned) old_insn
->ntok
);
3948 src_exp
= &old_insn
->tok
[b_op
->op_data
];
3949 exp
= &new_insn
->tok
[b_op
->op_num
];
3950 copy_expr (exp
, src_exp
);
3955 as_bad (_("can't handle generation of literal/labels yet"));
3959 as_bad (_("can't handle undefined OP TYPE"));
3964 new_insn
->ntok
= num_ops
;
3969 /* Return TRUE if it was simplified. */
3972 xg_simplify_insn (TInsn
*old_insn
, TInsn
*new_insn
)
3974 TransitionRule
*rule
;
3975 BuildInstr
*insn_spec
;
3977 if (old_insn
->is_specific_opcode
|| !density_supported
)
3980 rule
= xg_instruction_match (old_insn
);
3984 insn_spec
= rule
->to_instr
;
3985 /* There should only be one. */
3986 gas_assert (insn_spec
!= NULL
);
3987 gas_assert (insn_spec
->next
== NULL
);
3988 if (insn_spec
->next
!= NULL
)
3991 xg_build_token_insn (insn_spec
, old_insn
, new_insn
);
3997 /* xg_expand_assembly_insn: (1) Simplify the instruction, i.e., l32i ->
3998 l32i.n. (2) Check the number of operands. (3) Place the instruction
3999 tokens into the stack or relax it and place multiple
4000 instructions/literals onto the stack. Return FALSE if no error. */
4003 xg_expand_assembly_insn (IStack
*istack
, TInsn
*orig_insn
)
4007 bfd_boolean do_expand
;
4009 tinsn_init (&new_insn
);
4011 /* Narrow it if we can. xg_simplify_insn now does all the
4012 appropriate checking (e.g., for the density option). */
4013 if (xg_simplify_insn (orig_insn
, &new_insn
))
4014 orig_insn
= &new_insn
;
4016 noperands
= xtensa_opcode_num_operands (xtensa_default_isa
,
4018 if (orig_insn
->ntok
< noperands
)
4020 as_bad (ngettext ("found %d operand for '%s': Expected %d",
4021 "found %d operands for '%s': Expected %d",
4024 xtensa_opcode_name (xtensa_default_isa
, orig_insn
->opcode
),
4028 if (orig_insn
->ntok
> noperands
)
4029 as_warn (ngettext ("found %d operand for '%s': Expected %d",
4030 "found %d operands for '%s': Expected %d",
4033 xtensa_opcode_name (xtensa_default_isa
, orig_insn
->opcode
),
4036 /* If there are not enough operands, we will assert above. If there
4037 are too many, just cut out the extras here. */
4038 orig_insn
->ntok
= noperands
;
4040 if (tinsn_has_invalid_symbolic_operands (orig_insn
))
4043 /* Special case for extui opcode which has constraints not handled
4044 by the ordinary operand encoding checks. The number of operands
4045 and related syntax issues have already been checked. */
4046 if (orig_insn
->opcode
== xtensa_extui_opcode
)
4048 int shiftimm
= orig_insn
->tok
[2].X_add_number
;
4049 int maskimm
= orig_insn
->tok
[3].X_add_number
;
4050 if (shiftimm
+ maskimm
> 32)
4052 as_bad (_("immediate operands sum to greater than 32"));
4057 /* If the instruction will definitely need to be relaxed, it is better
4058 to expand it now for better scheduling. Decide whether to expand
4060 do_expand
= (!orig_insn
->is_specific_opcode
&& use_transform ());
4062 /* Calls should be expanded to longcalls only in the backend relaxation
4063 so that the assembly scheduler will keep the L32R/CALLX instructions
4065 if (is_direct_call_opcode (orig_insn
->opcode
))
4068 if (tinsn_has_symbolic_operands (orig_insn
))
4070 /* The values of symbolic operands are not known yet, so only expand
4071 now if an operand is "complex" (e.g., difference of symbols) and
4072 will have to be stored as a literal regardless of the value. */
4073 if (!tinsn_has_complex_operands (orig_insn
))
4076 else if (xg_immeds_fit (orig_insn
))
4080 xg_assembly_relax (istack
, orig_insn
, 0, 0, 0, 0, 0);
4082 istack_push (istack
, orig_insn
);
4088 /* Return TRUE if the section flags are marked linkonce
4089 or the name is .gnu.linkonce.*. */
4091 static int linkonce_len
= sizeof (".gnu.linkonce.") - 1;
4094 get_is_linkonce_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
)
4096 flagword flags
, link_once_flags
;
4098 flags
= bfd_get_section_flags (abfd
, sec
);
4099 link_once_flags
= (flags
& SEC_LINK_ONCE
);
4101 /* Flags might not be set yet. */
4102 if (!link_once_flags
4103 && strncmp (segment_name (sec
), ".gnu.linkonce.", linkonce_len
) == 0)
4104 link_once_flags
= SEC_LINK_ONCE
;
4106 return (link_once_flags
!= 0);
4111 xtensa_add_literal_sym (symbolS
*sym
)
4115 l
= XNEW (sym_list
);
4117 l
->next
= literal_syms
;
4123 xtensa_create_literal_symbol (segT sec
, fragS
*frag
)
4125 static int lit_num
= 0;
4126 static char name
[256];
4129 sprintf (name
, ".L_lit_sym%d", lit_num
);
4131 /* Create a local symbol. If it is in a linkonce section, we have to
4132 be careful to make sure that if it is used in a relocation that the
4133 symbol will be in the output file. */
4134 if (get_is_linkonce_section (stdoutput
, sec
))
4136 symbolP
= symbol_new (name
, sec
, 0, frag
);
4137 S_CLEAR_EXTERNAL (symbolP
);
4138 /* symbolP->local = 1; */
4141 symbolP
= symbol_new (name
, sec
, 0, frag
);
4143 xtensa_add_literal_sym (symbolP
);
4150 /* Currently all literals that are generated here are 32-bit L32R targets. */
4153 xg_assemble_literal (/* const */ TInsn
*insn
)
4156 symbolS
*lit_sym
= NULL
;
4157 bfd_reloc_code_real_type reloc
;
4158 bfd_boolean pcrel
= FALSE
;
4161 /* size = 4 for L32R. It could easily be larger when we move to
4162 larger constants. Add a parameter later. */
4163 offsetT litsize
= 4;
4164 offsetT litalign
= 2; /* 2^2 = 4 */
4165 expressionS saved_loc
;
4166 expressionS
* emit_val
;
4168 set_expr_symbol_offset (&saved_loc
, frag_now
->fr_symbol
, frag_now_fix ());
4170 gas_assert (insn
->insn_type
== ITYPE_LITERAL
);
4171 gas_assert (insn
->ntok
== 1); /* must be only one token here */
4173 xtensa_switch_to_literal_fragment (&state
);
4175 emit_val
= &insn
->tok
[0];
4176 if (emit_val
->X_op
== O_big
)
4178 int size
= emit_val
->X_add_number
* CHARS_PER_LITTLENUM
;
4181 /* This happens when someone writes a "movi a2, big_number". */
4182 as_bad_where (frag_now
->fr_file
, frag_now
->fr_line
,
4183 _("invalid immediate"));
4184 xtensa_restore_emit_state (&state
);
4189 /* Force a 4-byte align here. Note that this opens a new frag, so all
4190 literals done with this function have a frag to themselves. That's
4191 important for the way text section literals work. */
4192 frag_align (litalign
, 0, 0);
4193 record_alignment (now_seg
, litalign
);
4195 switch (emit_val
->X_op
)
4205 p
= frag_more (litsize
);
4206 xtensa_set_frag_assembly_state (frag_now
);
4207 reloc
= map_operator_to_reloc (emit_val
->X_op
, TRUE
);
4208 if (emit_val
->X_add_symbol
)
4209 emit_val
->X_op
= O_symbol
;
4211 emit_val
->X_op
= O_constant
;
4212 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
,
4213 litsize
, emit_val
, pcrel
, reloc
);
4217 emit_expr (emit_val
, litsize
);
4221 gas_assert (frag_now
->tc_frag_data
.literal_frag
== NULL
);
4222 frag_now
->tc_frag_data
.literal_frag
= get_literal_pool_location (now_seg
);
4223 frag_now
->fr_symbol
= xtensa_create_literal_symbol (now_seg
, frag_now
);
4224 lit_sym
= frag_now
->fr_symbol
;
4227 xtensa_restore_emit_state (&state
);
4233 xg_assemble_literal_space (/* const */ int size
, int slot
)
4236 /* We might have to do something about this alignment. It only
4237 takes effect if something is placed here. */
4238 offsetT litalign
= 2; /* 2^2 = 4 */
4239 fragS
*lit_saved_frag
;
4241 gas_assert (size
% 4 == 0);
4243 xtensa_switch_to_literal_fragment (&state
);
4245 /* Force a 4-byte align here. */
4246 frag_align (litalign
, 0, 0);
4247 record_alignment (now_seg
, litalign
);
4251 lit_saved_frag
= frag_now
;
4252 frag_now
->tc_frag_data
.literal_frag
= get_literal_pool_location (now_seg
);
4253 frag_now
->fr_symbol
= xtensa_create_literal_symbol (now_seg
, frag_now
);
4254 xg_finish_frag (0, RELAX_LITERAL
, 0, size
, FALSE
);
4257 xtensa_restore_emit_state (&state
);
4258 frag_now
->tc_frag_data
.literal_frags
[slot
] = lit_saved_frag
;
4262 /* Put in a fixup record based on the opcode.
4263 Return TRUE on success. */
4266 xg_add_opcode_fix (TInsn
*tinsn
,
4274 xtensa_opcode opcode
= tinsn
->opcode
;
4275 bfd_reloc_code_real_type reloc
;
4276 reloc_howto_type
*howto
;
4280 reloc
= BFD_RELOC_NONE
;
4282 /* First try the special cases for "alternate" relocs. */
4283 if (opcode
== xtensa_l32r_opcode
)
4285 if (fragP
->tc_frag_data
.use_absolute_literals
)
4286 reloc
= encode_alt_reloc (slot
);
4288 else if (opcode
== xtensa_const16_opcode
)
4290 if (exp
->X_op
== O_lo16
)
4292 reloc
= encode_reloc (slot
);
4293 exp
->X_op
= O_symbol
;
4295 else if (exp
->X_op
== O_hi16
)
4297 reloc
= encode_alt_reloc (slot
);
4298 exp
->X_op
= O_symbol
;
4302 if (opnum
!= get_relaxable_immed (opcode
))
4304 as_bad (_("invalid relocation for operand %i of '%s'"),
4305 opnum
+ 1, xtensa_opcode_name (xtensa_default_isa
, opcode
));
4309 /* Handle erroneous "@h" and "@l" expressions here before they propagate
4310 into the symbol table where the generic portions of the assembler
4311 won't know what to do with them. */
4312 if (exp
->X_op
== O_lo16
|| exp
->X_op
== O_hi16
)
4314 as_bad (_("invalid expression for operand %i of '%s'"),
4315 opnum
+ 1, xtensa_opcode_name (xtensa_default_isa
, opcode
));
4319 /* Next try the generic relocs. */
4320 if (reloc
== BFD_RELOC_NONE
)
4321 reloc
= encode_reloc (slot
);
4322 if (reloc
== BFD_RELOC_NONE
)
4324 as_bad (_("invalid relocation in instruction slot %i"), slot
);
4328 howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
4331 as_bad (_("undefined symbol for opcode \"%s\""),
4332 xtensa_opcode_name (xtensa_default_isa
, opcode
));
4336 fmt_length
= xtensa_format_length (xtensa_default_isa
, fmt
);
4337 the_fix
= fix_new_exp (fragP
, offset
, fmt_length
, exp
,
4338 howto
->pc_relative
, reloc
);
4339 the_fix
->fx_no_overflow
= 1;
4340 the_fix
->tc_fix_data
.X_add_symbol
= exp
->X_add_symbol
;
4341 the_fix
->tc_fix_data
.X_add_number
= exp
->X_add_number
;
4342 the_fix
->tc_fix_data
.slot
= slot
;
4349 xg_emit_insn_to_buf (TInsn
*tinsn
,
4353 bfd_boolean build_fix
)
4355 static xtensa_insnbuf insnbuf
= NULL
;
4356 bfd_boolean has_symbolic_immed
= FALSE
;
4357 bfd_boolean ok
= TRUE
;
4360 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
4362 has_symbolic_immed
= tinsn_to_insnbuf (tinsn
, insnbuf
);
4363 if (has_symbolic_immed
&& build_fix
)
4366 xtensa_format fmt
= xg_get_single_format (tinsn
->opcode
);
4367 int slot
= xg_get_single_slot (tinsn
->opcode
);
4368 int opnum
= get_relaxable_immed (tinsn
->opcode
);
4369 expressionS
*exp
= &tinsn
->tok
[opnum
];
4371 if (!xg_add_opcode_fix (tinsn
, opnum
, fmt
, slot
, exp
, fragP
, offset
))
4374 fragP
->tc_frag_data
.is_insn
= TRUE
;
4375 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
,
4376 (unsigned char *) buf
, 0);
4382 xg_resolve_literals (TInsn
*insn
, symbolS
*lit_sym
)
4384 symbolS
*sym
= get_special_literal_symbol ();
4388 gas_assert (insn
->insn_type
== ITYPE_INSN
);
4389 for (i
= 0; i
< insn
->ntok
; i
++)
4390 if (insn
->tok
[i
].X_add_symbol
== sym
)
4391 insn
->tok
[i
].X_add_symbol
= lit_sym
;
4397 xg_resolve_labels (TInsn
*insn
, symbolS
*label_sym
)
4399 symbolS
*sym
= get_special_label_symbol ();
4401 for (i
= 0; i
< insn
->ntok
; i
++)
4402 if (insn
->tok
[i
].X_add_symbol
== sym
)
4403 insn
->tok
[i
].X_add_symbol
= label_sym
;
4408 /* Return TRUE if the instruction can write to the specified
4409 integer register. */
4412 is_register_writer (const TInsn
*insn
, const char *regset
, int regnum
)
4416 xtensa_isa isa
= xtensa_default_isa
;
4418 num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
4420 for (i
= 0; i
< num_ops
; i
++)
4423 inout
= xtensa_operand_inout (isa
, insn
->opcode
, i
);
4424 if ((inout
== 'o' || inout
== 'm')
4425 && xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
4427 xtensa_regfile opnd_rf
=
4428 xtensa_operand_regfile (isa
, insn
->opcode
, i
);
4429 if (!strcmp (xtensa_regfile_shortname (isa
, opnd_rf
), regset
))
4431 if ((insn
->tok
[i
].X_op
== O_register
)
4432 && (insn
->tok
[i
].X_add_number
== regnum
))
4442 is_bad_loopend_opcode (const TInsn
*tinsn
)
4444 xtensa_opcode opcode
= tinsn
->opcode
;
4446 if (opcode
== XTENSA_UNDEFINED
)
4449 if (opcode
== xtensa_call0_opcode
4450 || opcode
== xtensa_callx0_opcode
4451 || opcode
== xtensa_call4_opcode
4452 || opcode
== xtensa_callx4_opcode
4453 || opcode
== xtensa_call8_opcode
4454 || opcode
== xtensa_callx8_opcode
4455 || opcode
== xtensa_call12_opcode
4456 || opcode
== xtensa_callx12_opcode
4457 || opcode
== xtensa_isync_opcode
4458 || opcode
== xtensa_ret_opcode
4459 || opcode
== xtensa_ret_n_opcode
4460 || opcode
== xtensa_retw_opcode
4461 || opcode
== xtensa_retw_n_opcode
4462 || opcode
== xtensa_waiti_opcode
4463 || opcode
== xtensa_rsr_lcount_opcode
)
4470 /* Labels that begin with ".Ln" or ".LM" are unaligned.
4471 This allows the debugger to add unaligned labels.
4472 Also, the assembler generates stabs labels that need
4473 not be aligned: FAKE_LABEL_NAME . {"F", "L", "endfunc"}. */
4476 is_unaligned_label (symbolS
*sym
)
4478 const char *name
= S_GET_NAME (sym
);
4479 static size_t fake_size
= 0;
4483 && name
[1] == 'L' && (name
[2] == 'n' || name
[2] == 'M'))
4486 /* FAKE_LABEL_NAME followed by "F", "L" or "endfunc" */
4488 fake_size
= strlen (FAKE_LABEL_NAME
);
4491 && strncmp (FAKE_LABEL_NAME
, name
, fake_size
) == 0
4492 && (name
[fake_size
] == 'F'
4493 || name
[fake_size
] == 'L'
4494 || (name
[fake_size
] == 'e'
4495 && strncmp ("endfunc", name
+fake_size
, 7) == 0)))
4503 next_non_empty_frag (const fragS
*fragP
)
4505 fragS
*next_fragP
= fragP
->fr_next
;
4507 /* Sometimes an empty will end up here due storage allocation issues.
4508 So we have to skip until we find something legit. */
4509 while (next_fragP
&& next_fragP
->fr_fix
== 0)
4510 next_fragP
= next_fragP
->fr_next
;
4512 if (next_fragP
== NULL
|| next_fragP
->fr_fix
== 0)
4520 next_frag_opcode_is_loop (const fragS
*fragP
, xtensa_opcode
*opcode
)
4522 xtensa_opcode out_opcode
;
4523 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
4525 if (next_fragP
== NULL
)
4528 out_opcode
= get_opcode_from_buf (next_fragP
->fr_literal
, 0);
4529 if (xtensa_opcode_is_loop (xtensa_default_isa
, out_opcode
) == 1)
4531 *opcode
= out_opcode
;
4539 frag_format_size (const fragS
*fragP
)
4541 static xtensa_insnbuf insnbuf
= NULL
;
4542 xtensa_isa isa
= xtensa_default_isa
;
4547 insnbuf
= xtensa_insnbuf_alloc (isa
);
4550 return XTENSA_UNDEFINED
;
4552 xtensa_insnbuf_from_chars (isa
, insnbuf
,
4553 (unsigned char *) fragP
->fr_literal
, 0);
4555 fmt
= xtensa_format_decode (isa
, insnbuf
);
4556 if (fmt
== XTENSA_UNDEFINED
)
4557 return XTENSA_UNDEFINED
;
4558 fmt_size
= xtensa_format_length (isa
, fmt
);
4560 /* If the next format won't be changing due to relaxation, just
4561 return the length of the first format. */
4562 if (fragP
->fr_opcode
!= fragP
->fr_literal
)
4565 /* If during relaxation we have to pull an instruction out of a
4566 multi-slot instruction, we will return the more conservative
4567 number. This works because alignment on bigger instructions
4568 is more restrictive than alignment on smaller instructions.
4569 This is more conservative than we would like, but it happens
4572 if (xtensa_format_num_slots (xtensa_default_isa
, fmt
) > 1)
4575 /* If we aren't doing one of our own relaxations or it isn't
4576 slot-based, then the insn size won't change. */
4577 if (fragP
->fr_type
!= rs_machine_dependent
)
4579 if (fragP
->fr_subtype
!= RELAX_SLOTS
)
4582 /* If an instruction is about to grow, return the longer size. */
4583 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP1
4584 || fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP2
4585 || fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP3
)
4587 /* For most frags at RELAX_IMMED_STEPX, with X > 0, the first
4588 instruction in the relaxed version is of length 3. (The case
4589 where we have to pull the instruction out of a FLIX bundle
4590 is handled conservatively above.) However, frags with opcodes
4591 that are expanding to wide branches end up having formats that
4592 are not determinable by the RELAX_IMMED_STEPX enumeration, and
4593 we can't tell directly what format the relaxer picked. This
4594 is a wart in the design of the relaxer that should someday be
4595 fixed, but would require major changes, or at least should
4596 be accompanied by major changes to make use of that data.
4598 In any event, we can tell that we are expanding from a single-slot
4599 format to a wider one with the logic below. */
4602 int relaxed_size
= fmt_size
+ fragP
->tc_frag_data
.text_expansion
[0];
4604 for (i
= 0; i
< xtensa_isa_num_formats (isa
); i
++)
4606 if (relaxed_size
== xtensa_format_length (isa
, i
))
4607 return relaxed_size
;
4613 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
4614 return 2 + fragP
->tc_frag_data
.text_expansion
[0];
4621 next_frag_format_size (const fragS
*fragP
)
4623 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
4624 return frag_format_size (next_fragP
);
4628 /* In early Xtensa Processors, for reasons that are unclear, the ISA
4629 required two-byte instructions to be treated as three-byte instructions
4630 for loop instruction alignment. This restriction was removed beginning
4631 with Xtensa LX. Now the only requirement on loop instruction alignment
4632 is that the first instruction of the loop must appear at an address that
4633 does not cross a fetch boundary. */
4636 get_loop_align_size (int insn_size
)
4638 if (insn_size
== XTENSA_UNDEFINED
)
4639 return xtensa_fetch_width
;
4641 if (enforce_three_byte_loop_align
&& insn_size
== 2)
4648 /* If the next legit fragment is an end-of-loop marker,
4649 switch its state so it will instantiate a NOP. */
4652 update_next_frag_state (fragS
*fragP
)
4654 fragS
*next_fragP
= fragP
->fr_next
;
4655 fragS
*new_target
= NULL
;
4659 /* We are guaranteed there will be one of these... */
4660 while (!(next_fragP
->fr_type
== rs_machine_dependent
4661 && (next_fragP
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
4662 || next_fragP
->fr_subtype
== RELAX_UNREACHABLE
)))
4663 next_fragP
= next_fragP
->fr_next
;
4665 gas_assert (next_fragP
->fr_type
== rs_machine_dependent
4666 && (next_fragP
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
4667 || next_fragP
->fr_subtype
== RELAX_UNREACHABLE
));
4669 /* ...and one of these. */
4670 new_target
= next_fragP
->fr_next
;
4671 while (!(new_target
->fr_type
== rs_machine_dependent
4672 && (new_target
->fr_subtype
== RELAX_MAYBE_DESIRE_ALIGN
4673 || new_target
->fr_subtype
== RELAX_DESIRE_ALIGN
)))
4674 new_target
= new_target
->fr_next
;
4676 gas_assert (new_target
->fr_type
== rs_machine_dependent
4677 && (new_target
->fr_subtype
== RELAX_MAYBE_DESIRE_ALIGN
4678 || new_target
->fr_subtype
== RELAX_DESIRE_ALIGN
));
4681 while (next_fragP
&& next_fragP
->fr_fix
== 0)
4683 if (next_fragP
->fr_type
== rs_machine_dependent
4684 && next_fragP
->fr_subtype
== RELAX_LOOP_END
)
4686 next_fragP
->fr_subtype
= RELAX_LOOP_END_ADD_NOP
;
4690 next_fragP
= next_fragP
->fr_next
;
4696 next_frag_is_branch_target (const fragS
*fragP
)
4698 /* Sometimes an empty will end up here due to storage allocation issues,
4699 so we have to skip until we find something legit. */
4700 for (fragP
= fragP
->fr_next
; fragP
; fragP
= fragP
->fr_next
)
4702 if (fragP
->tc_frag_data
.is_branch_target
)
4704 if (fragP
->fr_fix
!= 0)
4712 next_frag_is_loop_target (const fragS
*fragP
)
4714 /* Sometimes an empty will end up here due storage allocation issues.
4715 So we have to skip until we find something legit. */
4716 for (fragP
= fragP
->fr_next
; fragP
; fragP
= fragP
->fr_next
)
4718 if (fragP
->tc_frag_data
.is_loop_target
)
4720 if (fragP
->fr_fix
!= 0)
4727 /* As specified in the relaxation table, when a loop instruction is
4728 relaxed, there are 24 bytes between the loop instruction itself and
4729 the first instruction in the loop. */
4731 #define RELAXED_LOOP_INSN_BYTES 24
4734 next_frag_pre_opcode_bytes (const fragS
*fragp
)
4736 const fragS
*next_fragp
= fragp
->fr_next
;
4737 xtensa_opcode next_opcode
;
4739 if (!next_frag_opcode_is_loop (fragp
, &next_opcode
))
4742 /* Sometimes an empty will end up here due to storage allocation issues,
4743 so we have to skip until we find something legit. */
4744 while (next_fragp
->fr_fix
== 0)
4745 next_fragp
= next_fragp
->fr_next
;
4747 if (next_fragp
->fr_type
!= rs_machine_dependent
)
4750 /* There is some implicit knowledge encoded in here.
4751 The LOOP instructions that are NOT RELAX_IMMED have
4752 been relaxed. Note that we can assume that the LOOP
4753 instruction is in slot 0 because loops aren't bundleable. */
4754 if (next_fragp
->tc_frag_data
.slot_subtypes
[0] > RELAX_IMMED
)
4755 return get_expanded_loop_offset (next_opcode
) + RELAXED_LOOP_INSN_BYTES
;
4761 /* Mark a location where we can later insert literal frags. Update
4762 the section's literal_pool_loc, so subsequent literals can be
4763 placed nearest to their use. */
4766 xtensa_mark_literal_pool_location (void)
4768 /* Any labels pointing to the current location need
4769 to be adjusted to after the literal pool. */
4771 fragS
*pool_location
;
4773 if (use_literal_section
)
4776 /* We stash info in these frags so we can later move the literal's
4777 fixes into this frchain's fix list. */
4778 pool_location
= frag_now
;
4779 frag_now
->tc_frag_data
.lit_frchain
= frchain_now
;
4780 frag_now
->tc_frag_data
.literal_frag
= frag_now
;
4781 /* Just record this frag. */
4782 xtensa_maybe_create_literal_pool_frag (FALSE
, FALSE
);
4783 frag_variant (rs_machine_dependent
, 0, 0,
4784 RELAX_LITERAL_POOL_BEGIN
, NULL
, 0, NULL
);
4785 xtensa_set_frag_assembly_state (frag_now
);
4786 frag_now
->tc_frag_data
.lit_seg
= now_seg
;
4787 frag_variant (rs_machine_dependent
, 0, 0,
4788 RELAX_LITERAL_POOL_END
, NULL
, 0, NULL
);
4789 xtensa_set_frag_assembly_state (frag_now
);
4791 /* Now put a frag into the literal pool that points to this location. */
4792 set_literal_pool_location (now_seg
, pool_location
);
4793 xtensa_switch_to_non_abs_literal_fragment (&s
);
4794 frag_align (2, 0, 0);
4795 record_alignment (now_seg
, 2);
4797 /* Close whatever frag is there. */
4798 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
4799 xtensa_set_frag_assembly_state (frag_now
);
4800 frag_now
->tc_frag_data
.literal_frag
= pool_location
;
4801 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
4802 xtensa_restore_emit_state (&s
);
4803 xtensa_set_frag_assembly_state (frag_now
);
4807 /* Build a nop of the correct size into tinsn. */
4810 build_nop (TInsn
*tinsn
, int size
)
4816 tinsn
->opcode
= xtensa_nop_n_opcode
;
4818 if (tinsn
->opcode
== XTENSA_UNDEFINED
)
4819 as_fatal (_("opcode 'NOP.N' unavailable in this configuration"));
4823 if (xtensa_nop_opcode
== XTENSA_UNDEFINED
)
4825 tinsn
->opcode
= xtensa_or_opcode
;
4826 set_expr_const (&tinsn
->tok
[0], 1);
4827 set_expr_const (&tinsn
->tok
[1], 1);
4828 set_expr_const (&tinsn
->tok
[2], 1);
4832 tinsn
->opcode
= xtensa_nop_opcode
;
4834 gas_assert (tinsn
->opcode
!= XTENSA_UNDEFINED
);
4839 /* Assemble a NOP of the requested size in the buffer. User must have
4840 allocated "buf" with at least "size" bytes. */
4843 assemble_nop (int size
, char *buf
)
4845 static xtensa_insnbuf insnbuf
= NULL
;
4848 build_nop (&tinsn
, size
);
4851 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
4853 tinsn_to_insnbuf (&tinsn
, insnbuf
);
4854 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
,
4855 (unsigned char *) buf
, 0);
4859 /* Return the number of bytes for the offset of the expanded loop
4860 instruction. This should be incorporated into the relaxation
4861 specification but is hard-coded here. This is used to auto-align
4862 the loop instruction. It is invalid to call this function if the
4863 configuration does not have loops or if the opcode is not a loop
4867 get_expanded_loop_offset (xtensa_opcode opcode
)
4869 /* This is the OFFSET of the loop instruction in the expanded loop.
4870 This MUST correspond directly to the specification of the loop
4871 expansion. It will be validated on fragment conversion. */
4872 gas_assert (opcode
!= XTENSA_UNDEFINED
);
4873 if (opcode
== xtensa_loop_opcode
)
4875 if (opcode
== xtensa_loopnez_opcode
)
4877 if (opcode
== xtensa_loopgtz_opcode
)
4879 as_fatal (_("get_expanded_loop_offset: invalid opcode"));
4885 get_literal_pool_location (segT seg
)
4887 struct litpool_seg
*lps
= litpool_seg_list
.next
;
4888 struct litpool_frag
*lpf
;
4889 for ( ; lps
&& lps
->seg
->id
!= seg
->id
; lps
= lps
->next
)
4893 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4894 { /* Skip "candidates" for now. */
4895 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
&&
4899 /* Must convert a lower-priority pool. */
4900 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4902 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
)
4905 /* Still no match -- try for a low priority pool. */
4906 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4908 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
4912 return seg_info (seg
)->tc_segment_info_data
.literal_pool_loc
;
4917 set_literal_pool_location (segT seg
, fragS
*literal_pool_loc
)
4919 seg_info (seg
)->tc_segment_info_data
.literal_pool_loc
= literal_pool_loc
;
4923 /* Set frag assembly state should be called when a new frag is
4924 opened and after a frag has been closed. */
4927 xtensa_set_frag_assembly_state (fragS
*fragP
)
4929 if (!density_supported
)
4930 fragP
->tc_frag_data
.is_no_density
= TRUE
;
4932 /* This function is called from subsegs_finish, which is called
4933 after xtensa_end, so we can't use "use_transform" or
4934 "use_schedule" here. */
4935 if (!directive_state
[directive_transform
])
4936 fragP
->tc_frag_data
.is_no_transform
= TRUE
;
4937 if (directive_state
[directive_longcalls
])
4938 fragP
->tc_frag_data
.use_longcalls
= TRUE
;
4939 fragP
->tc_frag_data
.use_absolute_literals
=
4940 directive_state
[directive_absolute_literals
];
4941 fragP
->tc_frag_data
.is_assembly_state_set
= TRUE
;
4946 relaxable_section (asection
*sec
)
4948 return ((sec
->flags
& SEC_DEBUGGING
) == 0
4949 && strcmp (sec
->name
, ".eh_frame") != 0);
4954 xtensa_mark_frags_for_org (void)
4958 /* Walk over each fragment of all of the current segments. If we find
4959 a .org frag in any of the segments, mark all frags prior to it as
4960 "no transform", which will prevent linker optimizations from messing
4961 up the .org distance. This should be done after
4962 xtensa_find_unmarked_state_frags, because we don't want to worry here
4963 about that function trashing the data we save here. */
4965 for (seclist
= &stdoutput
->sections
;
4966 seclist
&& *seclist
;
4967 seclist
= &(*seclist
)->next
)
4969 segT sec
= *seclist
;
4970 segment_info_type
*seginfo
;
4973 flags
= bfd_get_section_flags (stdoutput
, sec
);
4974 if (flags
& SEC_DEBUGGING
)
4976 if (!(flags
& SEC_ALLOC
))
4979 seginfo
= seg_info (sec
);
4980 if (seginfo
&& seginfo
->frchainP
)
4982 fragS
*last_fragP
= seginfo
->frchainP
->frch_root
;
4983 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
;
4984 fragP
= fragP
->fr_next
)
4986 /* cvt_frag_to_fill has changed the fr_type of org frags to
4987 rs_fill, so use the value as cached in rs_subtype here. */
4988 if (fragP
->fr_subtype
== RELAX_ORG
)
4990 while (last_fragP
!= fragP
->fr_next
)
4992 last_fragP
->tc_frag_data
.is_no_transform
= TRUE
;
4993 last_fragP
= last_fragP
->fr_next
;
5003 xtensa_find_unmarked_state_frags (void)
5007 /* Walk over each fragment of all of the current segments. For each
5008 unmarked fragment, mark it with the same info as the previous
5010 for (seclist
= &stdoutput
->sections
;
5011 seclist
&& *seclist
;
5012 seclist
= &(*seclist
)->next
)
5014 segT sec
= *seclist
;
5015 segment_info_type
*seginfo
;
5018 flags
= bfd_get_section_flags (stdoutput
, sec
);
5019 if (flags
& SEC_DEBUGGING
)
5021 if (!(flags
& SEC_ALLOC
))
5024 seginfo
= seg_info (sec
);
5025 if (seginfo
&& seginfo
->frchainP
)
5027 fragS
*last_fragP
= 0;
5028 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
;
5029 fragP
= fragP
->fr_next
)
5031 if (fragP
->fr_fix
!= 0
5032 && !fragP
->tc_frag_data
.is_assembly_state_set
)
5034 if (last_fragP
== 0)
5036 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
5037 _("assembly state not set for first frag in section %s"),
5042 fragP
->tc_frag_data
.is_assembly_state_set
= TRUE
;
5043 fragP
->tc_frag_data
.is_no_density
=
5044 last_fragP
->tc_frag_data
.is_no_density
;
5045 fragP
->tc_frag_data
.is_no_transform
=
5046 last_fragP
->tc_frag_data
.is_no_transform
;
5047 fragP
->tc_frag_data
.use_longcalls
=
5048 last_fragP
->tc_frag_data
.use_longcalls
;
5049 fragP
->tc_frag_data
.use_absolute_literals
=
5050 last_fragP
->tc_frag_data
.use_absolute_literals
;
5053 if (fragP
->tc_frag_data
.is_assembly_state_set
)
5062 xtensa_find_unaligned_branch_targets (bfd
*abfd ATTRIBUTE_UNUSED
,
5064 void *unused ATTRIBUTE_UNUSED
)
5066 flagword flags
= bfd_get_section_flags (abfd
, sec
);
5067 segment_info_type
*seginfo
= seg_info (sec
);
5068 fragS
*frag
= seginfo
->frchainP
->frch_root
;
5070 if (flags
& SEC_CODE
)
5072 xtensa_isa isa
= xtensa_default_isa
;
5073 xtensa_insnbuf insnbuf
= xtensa_insnbuf_alloc (isa
);
5074 while (frag
!= NULL
)
5076 if (frag
->tc_frag_data
.is_branch_target
)
5079 addressT branch_align
, frag_addr
;
5082 xtensa_insnbuf_from_chars
5083 (isa
, insnbuf
, (unsigned char *) frag
->fr_literal
, 0);
5084 fmt
= xtensa_format_decode (isa
, insnbuf
);
5085 op_size
= xtensa_format_length (isa
, fmt
);
5086 branch_align
= 1 << branch_align_power (sec
);
5087 frag_addr
= frag
->fr_address
% branch_align
;
5088 if (frag_addr
+ op_size
> branch_align
)
5089 as_warn_where (frag
->fr_file
, frag
->fr_line
,
5090 _("unaligned branch target: %d bytes at 0x%lx"),
5091 op_size
, (long) frag
->fr_address
);
5093 frag
= frag
->fr_next
;
5095 xtensa_insnbuf_free (isa
, insnbuf
);
5101 xtensa_find_unaligned_loops (bfd
*abfd ATTRIBUTE_UNUSED
,
5103 void *unused ATTRIBUTE_UNUSED
)
5105 flagword flags
= bfd_get_section_flags (abfd
, sec
);
5106 segment_info_type
*seginfo
= seg_info (sec
);
5107 fragS
*frag
= seginfo
->frchainP
->frch_root
;
5108 xtensa_isa isa
= xtensa_default_isa
;
5110 if (flags
& SEC_CODE
)
5112 xtensa_insnbuf insnbuf
= xtensa_insnbuf_alloc (isa
);
5113 while (frag
!= NULL
)
5115 if (frag
->tc_frag_data
.is_first_loop_insn
)
5121 if (frag
->fr_fix
== 0)
5122 frag
= next_non_empty_frag (frag
);
5126 xtensa_insnbuf_from_chars
5127 (isa
, insnbuf
, (unsigned char *) frag
->fr_literal
, 0);
5128 fmt
= xtensa_format_decode (isa
, insnbuf
);
5129 op_size
= xtensa_format_length (isa
, fmt
);
5130 frag_addr
= frag
->fr_address
% xtensa_fetch_width
;
5132 if (frag_addr
+ op_size
> xtensa_fetch_width
)
5133 as_warn_where (frag
->fr_file
, frag
->fr_line
,
5134 _("unaligned loop: %d bytes at 0x%lx"),
5135 op_size
, (long) frag
->fr_address
);
5138 frag
= frag
->fr_next
;
5140 xtensa_insnbuf_free (isa
, insnbuf
);
5146 xg_apply_fix_value (fixS
*fixP
, valueT val
)
5148 xtensa_isa isa
= xtensa_default_isa
;
5149 static xtensa_insnbuf insnbuf
= NULL
;
5150 static xtensa_insnbuf slotbuf
= NULL
;
5153 bfd_boolean alt_reloc
;
5154 xtensa_opcode opcode
;
5155 char *const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
5157 if (decode_reloc (fixP
->fx_r_type
, &slot
, &alt_reloc
)
5159 as_fatal (_("unexpected fix"));
5163 insnbuf
= xtensa_insnbuf_alloc (isa
);
5164 slotbuf
= xtensa_insnbuf_alloc (isa
);
5167 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) fixpos
, 0);
5168 fmt
= xtensa_format_decode (isa
, insnbuf
);
5169 if (fmt
== XTENSA_UNDEFINED
)
5170 as_fatal (_("undecodable fix"));
5171 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5172 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
5173 if (opcode
== XTENSA_UNDEFINED
)
5174 as_fatal (_("undecodable fix"));
5176 /* CONST16 immediates are not PC-relative, despite the fact that we
5177 reuse the normal PC-relative operand relocations for the low part
5178 of a CONST16 operand. */
5179 if (opcode
== xtensa_const16_opcode
)
5182 xtensa_insnbuf_set_operand (slotbuf
, fmt
, slot
, opcode
,
5183 get_relaxable_immed (opcode
), val
,
5184 fixP
->fx_file
, fixP
->fx_line
);
5186 xtensa_format_set_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5187 xtensa_insnbuf_to_chars (isa
, insnbuf
, (unsigned char *) fixpos
, 0);
5193 /* External Functions and Other GAS Hooks. */
5196 xtensa_target_format (void)
5198 return (target_big_endian
? "elf32-xtensa-be" : "elf32-xtensa-le");
5203 xtensa_file_arch_init (bfd
*abfd
)
5205 bfd_set_private_flags (abfd
, 0x100 | 0x200);
5210 md_number_to_chars (char *buf
, valueT val
, int n
)
5212 if (target_big_endian
)
5213 number_to_chars_bigendian (buf
, val
, n
);
5215 number_to_chars_littleendian (buf
, val
, n
);
5219 xg_init_global_config (void)
5221 target_big_endian
= XCHAL_HAVE_BE
;
5223 density_supported
= XCHAL_HAVE_DENSITY
;
5224 absolute_literals_supported
= XSHAL_USE_ABSOLUTE_LITERALS
;
5225 xtensa_fetch_width
= XCHAL_INST_FETCH_WIDTH
;
5227 directive_state
[directive_density
] = XCHAL_HAVE_DENSITY
;
5228 directive_state
[directive_absolute_literals
] = XSHAL_USE_ABSOLUTE_LITERALS
;
5232 xtensa_init (int argc ATTRIBUTE_UNUSED
, char **argv ATTRIBUTE_UNUSED
)
5234 xg_init_global_config ();
5237 /* This function is called once, at assembler startup time. It should
5238 set up all the tables, etc. that the MD part of the assembler will
5244 segT current_section
= now_seg
;
5245 int current_subsec
= now_subseg
;
5249 xtensa_default_isa
= xtensa_isa_init (0, 0);
5250 isa
= xtensa_default_isa
;
5254 /* Set up the literal sections. */
5255 memset (&default_lit_sections
, 0, sizeof (default_lit_sections
));
5257 subseg_set (current_section
, current_subsec
);
5259 xtensa_addi_opcode
= xtensa_opcode_lookup (isa
, "addi");
5260 xtensa_addmi_opcode
= xtensa_opcode_lookup (isa
, "addmi");
5261 xtensa_call0_opcode
= xtensa_opcode_lookup (isa
, "call0");
5262 xtensa_call4_opcode
= xtensa_opcode_lookup (isa
, "call4");
5263 xtensa_call8_opcode
= xtensa_opcode_lookup (isa
, "call8");
5264 xtensa_call12_opcode
= xtensa_opcode_lookup (isa
, "call12");
5265 xtensa_callx0_opcode
= xtensa_opcode_lookup (isa
, "callx0");
5266 xtensa_callx4_opcode
= xtensa_opcode_lookup (isa
, "callx4");
5267 xtensa_callx8_opcode
= xtensa_opcode_lookup (isa
, "callx8");
5268 xtensa_callx12_opcode
= xtensa_opcode_lookup (isa
, "callx12");
5269 xtensa_const16_opcode
= xtensa_opcode_lookup (isa
, "const16");
5270 xtensa_entry_opcode
= xtensa_opcode_lookup (isa
, "entry");
5271 xtensa_extui_opcode
= xtensa_opcode_lookup (isa
, "extui");
5272 xtensa_movi_opcode
= xtensa_opcode_lookup (isa
, "movi");
5273 xtensa_movi_n_opcode
= xtensa_opcode_lookup (isa
, "movi.n");
5274 xtensa_isync_opcode
= xtensa_opcode_lookup (isa
, "isync");
5275 xtensa_j_opcode
= xtensa_opcode_lookup (isa
, "j");
5276 xtensa_jx_opcode
= xtensa_opcode_lookup (isa
, "jx");
5277 xtensa_l32r_opcode
= xtensa_opcode_lookup (isa
, "l32r");
5278 xtensa_loop_opcode
= xtensa_opcode_lookup (isa
, "loop");
5279 xtensa_loopnez_opcode
= xtensa_opcode_lookup (isa
, "loopnez");
5280 xtensa_loopgtz_opcode
= xtensa_opcode_lookup (isa
, "loopgtz");
5281 xtensa_nop_opcode
= xtensa_opcode_lookup (isa
, "nop");
5282 xtensa_nop_n_opcode
= xtensa_opcode_lookup (isa
, "nop.n");
5283 xtensa_or_opcode
= xtensa_opcode_lookup (isa
, "or");
5284 xtensa_ret_opcode
= xtensa_opcode_lookup (isa
, "ret");
5285 xtensa_ret_n_opcode
= xtensa_opcode_lookup (isa
, "ret.n");
5286 xtensa_retw_opcode
= xtensa_opcode_lookup (isa
, "retw");
5287 xtensa_retw_n_opcode
= xtensa_opcode_lookup (isa
, "retw.n");
5288 xtensa_rsr_lcount_opcode
= xtensa_opcode_lookup (isa
, "rsr.lcount");
5289 xtensa_waiti_opcode
= xtensa_opcode_lookup (isa
, "waiti");
5291 for (i
= 0; i
< xtensa_isa_num_formats (isa
); i
++)
5293 int format_slots
= xtensa_format_num_slots (isa
, i
);
5294 if (format_slots
> config_max_slots
)
5295 config_max_slots
= format_slots
;
5298 xg_init_vinsn (&cur_vinsn
);
5300 xtensa_num_pipe_stages
= xtensa_isa_num_pipe_stages (isa
);
5302 init_op_placement_info_table ();
5304 /* Set up the assembly state. */
5305 if (!frag_now
->tc_frag_data
.is_assembly_state_set
)
5306 xtensa_set_frag_assembly_state (frag_now
);
5310 /* TC_INIT_FIX_DATA hook */
5313 xtensa_init_fix_data (fixS
*x
)
5315 x
->tc_fix_data
.slot
= 0;
5316 x
->tc_fix_data
.X_add_symbol
= NULL
;
5317 x
->tc_fix_data
.X_add_number
= 0;
5321 /* tc_frob_label hook */
5324 xtensa_frob_label (symbolS
*sym
)
5328 if (cur_vinsn
.inside_bundle
)
5330 as_bad (_("labels are not valid inside bundles"));
5334 freq
= get_subseg_target_freq (now_seg
, now_subseg
);
5336 /* Since the label was already attached to a frag associated with the
5337 previous basic block, it now needs to be reset to the current frag. */
5338 symbol_set_frag (sym
, frag_now
);
5339 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5341 if (generating_literals
)
5342 xtensa_add_literal_sym (sym
);
5344 xtensa_add_insn_label (sym
);
5346 if (symbol_get_tc (sym
)->is_loop_target
)
5348 if ((get_last_insn_flags (now_seg
, now_subseg
)
5349 & FLAG_IS_BAD_LOOPEND
) != 0)
5350 as_bad (_("invalid last instruction for a zero-overhead loop"));
5352 xtensa_set_frag_assembly_state (frag_now
);
5353 frag_var (rs_machine_dependent
, 4, 4, RELAX_LOOP_END
,
5354 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
5356 xtensa_set_frag_assembly_state (frag_now
);
5357 xtensa_move_labels (frag_now
, 0);
5360 /* No target aligning in the absolute section. */
5361 if (now_seg
!= absolute_section
5362 && !is_unaligned_label (sym
)
5363 && !generating_literals
)
5365 xtensa_set_frag_assembly_state (frag_now
);
5367 if (do_align_targets ())
5368 frag_var (rs_machine_dependent
, 0, (int) freq
,
5369 RELAX_DESIRE_ALIGN_IF_TARGET
, frag_now
->fr_symbol
,
5370 frag_now
->fr_offset
, NULL
);
5372 frag_var (rs_fill
, 0, 0, frag_now
->fr_subtype
,
5373 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
5374 xtensa_set_frag_assembly_state (frag_now
);
5375 xtensa_move_labels (frag_now
, 0);
5378 /* We need to mark the following properties even if we aren't aligning. */
5380 /* If the label is already known to be a branch target, i.e., a
5381 forward branch, mark the frag accordingly. Backward branches
5382 are handled by xg_add_branch_and_loop_targets. */
5383 if (symbol_get_tc (sym
)->is_branch_target
)
5384 symbol_get_frag (sym
)->tc_frag_data
.is_branch_target
= TRUE
;
5386 /* Loops only go forward, so they can be identified here. */
5387 if (symbol_get_tc (sym
)->is_loop_target
)
5388 symbol_get_frag (sym
)->tc_frag_data
.is_loop_target
= TRUE
;
5390 dwarf2_emit_label (sym
);
5394 /* tc_unrecognized_line hook */
5397 xtensa_unrecognized_line (int ch
)
5402 if (cur_vinsn
.inside_bundle
== 0)
5404 /* PR8110: Cannot emit line number info inside a FLIX bundle
5405 when using --gstabs. Temporarily disable debug info. */
5406 generate_lineno_debug ();
5407 if (debug_type
== DEBUG_STABS
)
5409 xt_saved_debug_type
= debug_type
;
5410 debug_type
= DEBUG_NONE
;
5413 cur_vinsn
.inside_bundle
= 1;
5417 as_bad (_("extra opening brace"));
5423 if (cur_vinsn
.inside_bundle
)
5424 finish_vinsn (&cur_vinsn
);
5427 as_bad (_("extra closing brace"));
5432 as_bad (_("syntax error"));
5439 /* md_flush_pending_output hook */
5442 xtensa_flush_pending_output (void)
5444 /* This line fixes a bug where automatically generated gstabs info
5445 separates a function label from its entry instruction, ending up
5446 with the literal position between the function label and the entry
5447 instruction and crashing code. It only happens with --gstabs and
5448 --text-section-literals, and when several other obscure relaxation
5449 conditions are met. */
5450 if (outputting_stabs_line_debug
)
5453 if (cur_vinsn
.inside_bundle
)
5454 as_bad (_("missing closing brace"));
5456 /* If there is a non-zero instruction fragment, close it. */
5457 if (frag_now_fix () != 0 && frag_now
->tc_frag_data
.is_insn
)
5459 frag_wane (frag_now
);
5461 xtensa_set_frag_assembly_state (frag_now
);
5463 frag_now
->tc_frag_data
.is_insn
= FALSE
;
5465 xtensa_clear_insn_labels ();
5469 /* We had an error while parsing an instruction. The string might look
5470 like this: "insn arg1, arg2 }". If so, we need to see the closing
5471 brace and reset some fields. Otherwise, the vinsn never gets closed
5472 and the num_slots field will grow past the end of the array of slots,
5473 and bad things happen. */
5476 error_reset_cur_vinsn (void)
5478 if (cur_vinsn
.inside_bundle
)
5480 if (*input_line_pointer
== '}'
5481 || *(input_line_pointer
- 1) == '}'
5482 || *(input_line_pointer
- 2) == '}')
5483 xg_clear_vinsn (&cur_vinsn
);
5489 md_assemble (char *str
)
5491 xtensa_isa isa
= xtensa_default_isa
;
5494 bfd_boolean has_underbar
= FALSE
;
5495 char *arg_strings
[MAX_INSN_ARGS
];
5497 TInsn orig_insn
; /* Original instruction from the input. */
5499 tinsn_init (&orig_insn
);
5501 /* Split off the opcode. */
5502 opnamelen
= strspn (str
, "abcdefghijklmnopqrstuvwxyz_/0123456789.");
5503 opname
= xstrndup (str
, opnamelen
);
5505 num_args
= tokenize_arguments (arg_strings
, str
+ opnamelen
);
5508 as_bad (_("syntax error"));
5512 if (xg_translate_idioms (&opname
, &num_args
, arg_strings
))
5515 /* Check for an underbar prefix. */
5518 has_underbar
= TRUE
;
5522 orig_insn
.insn_type
= ITYPE_INSN
;
5524 orig_insn
.is_specific_opcode
= (has_underbar
|| !use_transform ());
5525 orig_insn
.opcode
= xtensa_opcode_lookup (isa
, opname
);
5527 /* Special case: Check for "CALLXn.TLS" pseudo op. If found, grab its
5528 extra argument and set the opcode to "CALLXn". */
5529 if (orig_insn
.opcode
== XTENSA_UNDEFINED
5530 && strncasecmp (opname
, "callx", 5) == 0)
5532 unsigned long window_size
;
5535 window_size
= strtoul (opname
+ 5, &suffix
, 10);
5536 if (suffix
!= opname
+ 5
5537 && (window_size
== 0
5540 || window_size
== 12)
5541 && strcasecmp (suffix
, ".tls") == 0)
5543 switch (window_size
)
5545 case 0: orig_insn
.opcode
= xtensa_callx0_opcode
; break;
5546 case 4: orig_insn
.opcode
= xtensa_callx4_opcode
; break;
5547 case 8: orig_insn
.opcode
= xtensa_callx8_opcode
; break;
5548 case 12: orig_insn
.opcode
= xtensa_callx12_opcode
; break;
5552 as_bad (_("wrong number of operands for '%s'"), opname
);
5555 bfd_reloc_code_real_type reloc
;
5556 char *old_input_line_pointer
;
5557 expressionS
*tok
= &orig_insn
.extra_arg
;
5559 old_input_line_pointer
= input_line_pointer
;
5560 input_line_pointer
= arg_strings
[num_args
- 1];
5563 if (tok
->X_op
== O_symbol
5564 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, tok
))
5565 == BFD_RELOC_XTENSA_TLS_CALL
))
5566 tok
->X_op
= map_suffix_reloc_to_operator (reloc
);
5568 as_bad (_("bad relocation expression for '%s'"), opname
);
5570 input_line_pointer
= old_input_line_pointer
;
5576 /* Special case: Check for "j.l" pseudo op. */
5577 if (orig_insn
.opcode
== XTENSA_UNDEFINED
5578 && strncasecmp (opname
, "j.l", 3) == 0)
5581 as_bad (_("wrong number of operands for '%s'"), opname
);
5584 char *old_input_line_pointer
;
5585 expressionS
*tok
= &orig_insn
.extra_arg
;
5587 old_input_line_pointer
= input_line_pointer
;
5588 input_line_pointer
= arg_strings
[num_args
- 1];
5590 expression_maybe_register (xtensa_jx_opcode
, 0, tok
);
5591 input_line_pointer
= old_input_line_pointer
;
5594 orig_insn
.opcode
= xtensa_j_opcode
;
5598 if (orig_insn
.opcode
== XTENSA_UNDEFINED
)
5600 xtensa_format fmt
= xtensa_format_lookup (isa
, opname
);
5601 if (fmt
== XTENSA_UNDEFINED
)
5603 as_bad (_("unknown opcode or format name '%s'"), opname
);
5604 error_reset_cur_vinsn ();
5607 if (!cur_vinsn
.inside_bundle
)
5609 as_bad (_("format names only valid inside bundles"));
5610 error_reset_cur_vinsn ();
5613 if (cur_vinsn
.format
!= XTENSA_UNDEFINED
)
5614 as_warn (_("multiple formats specified for one bundle; using '%s'"),
5616 cur_vinsn
.format
= fmt
;
5617 free (has_underbar
? opname
- 1 : opname
);
5618 error_reset_cur_vinsn ();
5622 /* Parse the arguments. */
5623 if (parse_arguments (&orig_insn
, num_args
, arg_strings
))
5625 as_bad (_("syntax error"));
5626 error_reset_cur_vinsn ();
5630 /* Free the opcode and argument strings, now that they've been parsed. */
5631 free (has_underbar
? opname
- 1 : opname
);
5633 while (num_args
-- > 0)
5634 free (arg_strings
[num_args
]);
5636 /* Get expressions for invisible operands. */
5637 if (get_invisible_operands (&orig_insn
))
5639 error_reset_cur_vinsn ();
5643 /* Check for the right number and type of arguments. */
5644 if (tinsn_check_arguments (&orig_insn
))
5646 error_reset_cur_vinsn ();
5650 /* Record the line number for each TInsn, because a FLIX bundle may be
5651 spread across multiple input lines and individual instructions may be
5652 moved around in some cases. */
5653 orig_insn
.loc_directive_seen
= dwarf2_loc_directive_seen
;
5654 dwarf2_where (&orig_insn
.debug_line
);
5655 dwarf2_consume_line_info ();
5657 xg_add_branch_and_loop_targets (&orig_insn
);
5659 /* Check that immediate value for ENTRY is >= 16. */
5660 if (orig_insn
.opcode
== xtensa_entry_opcode
&& orig_insn
.ntok
>= 3)
5662 expressionS
*exp
= &orig_insn
.tok
[2];
5663 if (exp
->X_op
== O_constant
&& exp
->X_add_number
< 16)
5664 as_warn (_("entry instruction with stack decrement < 16"));
5668 assemble_tokens (opcode, tok, ntok);
5669 expand the tokens from the orig_insn into the
5670 stack of instructions that will not expand
5671 unless required at relaxation time. */
5673 if (!cur_vinsn
.inside_bundle
)
5674 emit_single_op (&orig_insn
);
5675 else /* We are inside a bundle. */
5677 cur_vinsn
.slots
[cur_vinsn
.num_slots
] = orig_insn
;
5678 cur_vinsn
.num_slots
++;
5679 if (*input_line_pointer
== '}'
5680 || *(input_line_pointer
- 1) == '}'
5681 || *(input_line_pointer
- 2) == '}')
5682 finish_vinsn (&cur_vinsn
);
5685 /* We've just emitted a new instruction so clear the list of labels. */
5686 xtensa_clear_insn_labels ();
5688 xtensa_check_frag_count ();
5692 /* HANDLE_ALIGN hook */
5694 /* For a .align directive, we mark the previous block with the alignment
5695 information. This will be placed in the object file in the
5696 property section corresponding to this section. */
5699 xtensa_handle_align (fragS
*fragP
)
5702 && ! fragP
->tc_frag_data
.is_literal
5703 && (fragP
->fr_type
== rs_align
5704 || fragP
->fr_type
== rs_align_code
)
5705 && fragP
->fr_offset
> 0
5706 && now_seg
!= bss_section
)
5708 fragP
->tc_frag_data
.is_align
= TRUE
;
5709 fragP
->tc_frag_data
.alignment
= fragP
->fr_offset
;
5712 if (fragP
->fr_type
== rs_align_test
)
5715 count
= fragP
->fr_next
->fr_address
- fragP
->fr_address
- fragP
->fr_fix
;
5717 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
5718 _("unaligned entry instruction"));
5721 if (linkrelax
&& fragP
->fr_type
== rs_org
)
5722 fragP
->fr_subtype
= RELAX_ORG
;
5726 /* TC_FRAG_INIT hook */
5729 xtensa_frag_init (fragS
*frag
)
5731 xtensa_set_frag_assembly_state (frag
);
5736 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
5742 /* Round up a section size to the appropriate boundary. */
5745 md_section_align (segT segment ATTRIBUTE_UNUSED
, valueT size
)
5747 return size
; /* Byte alignment is fine. */
5752 md_pcrel_from (fixS
*fixP
)
5755 static xtensa_insnbuf insnbuf
= NULL
;
5756 static xtensa_insnbuf slotbuf
= NULL
;
5759 xtensa_opcode opcode
;
5762 xtensa_isa isa
= xtensa_default_isa
;
5763 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
5764 bfd_boolean alt_reloc
;
5766 if (fixP
->fx_r_type
== BFD_RELOC_XTENSA_ASM_EXPAND
)
5769 if (fixP
->fx_r_type
== BFD_RELOC_32_PCREL
)
5774 insnbuf
= xtensa_insnbuf_alloc (isa
);
5775 slotbuf
= xtensa_insnbuf_alloc (isa
);
5778 insn_p
= &fixP
->fx_frag
->fr_literal
[fixP
->fx_where
];
5779 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) insn_p
, 0);
5780 fmt
= xtensa_format_decode (isa
, insnbuf
);
5782 if (fmt
== XTENSA_UNDEFINED
)
5783 as_fatal (_("bad instruction format"));
5785 if (decode_reloc (fixP
->fx_r_type
, &slot
, &alt_reloc
) != 0)
5786 as_fatal (_("invalid relocation"));
5788 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5789 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
5791 /* Check for "alternate" relocations (operand not specified). None
5792 of the current uses for these are really PC-relative. */
5793 if (alt_reloc
|| opcode
== xtensa_const16_opcode
)
5795 if (opcode
!= xtensa_l32r_opcode
5796 && opcode
!= xtensa_const16_opcode
)
5797 as_fatal (_("invalid relocation for '%s' instruction"),
5798 xtensa_opcode_name (isa
, opcode
));
5802 opnum
= get_relaxable_immed (opcode
);
5804 if (xtensa_operand_is_PCrelative (isa
, opcode
, opnum
) != 1
5805 || xtensa_operand_do_reloc (isa
, opcode
, opnum
, &opnd_value
, addr
))
5807 as_bad_where (fixP
->fx_file
,
5809 _("invalid relocation for operand %d of '%s'"),
5810 opnum
, xtensa_opcode_name (isa
, opcode
));
5813 return 0 - opnd_value
;
5817 /* TC_FORCE_RELOCATION hook */
5820 xtensa_force_relocation (fixS
*fix
)
5822 switch (fix
->fx_r_type
)
5824 case BFD_RELOC_XTENSA_ASM_EXPAND
:
5825 case BFD_RELOC_XTENSA_SLOT0_ALT
:
5826 case BFD_RELOC_XTENSA_SLOT1_ALT
:
5827 case BFD_RELOC_XTENSA_SLOT2_ALT
:
5828 case BFD_RELOC_XTENSA_SLOT3_ALT
:
5829 case BFD_RELOC_XTENSA_SLOT4_ALT
:
5830 case BFD_RELOC_XTENSA_SLOT5_ALT
:
5831 case BFD_RELOC_XTENSA_SLOT6_ALT
:
5832 case BFD_RELOC_XTENSA_SLOT7_ALT
:
5833 case BFD_RELOC_XTENSA_SLOT8_ALT
:
5834 case BFD_RELOC_XTENSA_SLOT9_ALT
:
5835 case BFD_RELOC_XTENSA_SLOT10_ALT
:
5836 case BFD_RELOC_XTENSA_SLOT11_ALT
:
5837 case BFD_RELOC_XTENSA_SLOT12_ALT
:
5838 case BFD_RELOC_XTENSA_SLOT13_ALT
:
5839 case BFD_RELOC_XTENSA_SLOT14_ALT
:
5845 if (linkrelax
&& fix
->fx_addsy
5846 && relaxable_section (S_GET_SEGMENT (fix
->fx_addsy
)))
5849 return generic_force_reloc (fix
);
5853 /* TC_VALIDATE_FIX_SUB hook */
5856 xtensa_validate_fix_sub (fixS
*fix
)
5858 segT add_symbol_segment
, sub_symbol_segment
;
5860 /* The difference of two symbols should be resolved by the assembler when
5861 linkrelax is not set. If the linker may relax the section containing
5862 the symbols, then an Xtensa DIFF relocation must be generated so that
5863 the linker knows to adjust the difference value. */
5864 if (!linkrelax
|| fix
->fx_addsy
== NULL
)
5867 /* Make sure both symbols are in the same segment, and that segment is
5868 "normal" and relaxable. If the segment is not "normal", then the
5869 fix is not valid. If the segment is not "relaxable", then the fix
5870 should have been handled earlier. */
5871 add_symbol_segment
= S_GET_SEGMENT (fix
->fx_addsy
);
5872 if (! SEG_NORMAL (add_symbol_segment
) ||
5873 ! relaxable_section (add_symbol_segment
))
5875 sub_symbol_segment
= S_GET_SEGMENT (fix
->fx_subsy
);
5876 return (sub_symbol_segment
== add_symbol_segment
);
5880 /* NO_PSEUDO_DOT hook */
5882 /* This function has nothing to do with pseudo dots, but this is the
5883 nearest macro to where the check needs to take place. FIXME: This
5887 xtensa_check_inside_bundle (void)
5889 if (cur_vinsn
.inside_bundle
&& input_line_pointer
[-1] == '.')
5890 as_bad (_("directives are not valid inside bundles"));
5892 /* This function must always return FALSE because it is called via a
5893 macro that has nothing to do with bundling. */
5898 /* md_elf_section_change_hook */
5901 xtensa_elf_section_change_hook (void)
5903 /* Set up the assembly state. */
5904 if (!frag_now
->tc_frag_data
.is_assembly_state_set
)
5905 xtensa_set_frag_assembly_state (frag_now
);
5909 /* tc_fix_adjustable hook */
5912 xtensa_fix_adjustable (fixS
*fixP
)
5914 /* We need the symbol name for the VTABLE entries. */
5915 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
5916 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
5923 /* tc_symbol_new_hook */
5925 symbolS
*expr_symbols
= NULL
;
5928 xtensa_symbol_new_hook (symbolS
*sym
)
5930 if (is_leb128_expr
&& S_GET_SEGMENT (sym
) == expr_section
)
5932 symbol_get_tc (sym
)->next_expr_symbol
= expr_symbols
;
5939 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
5941 char *const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
5944 /* Subtracted symbols are only allowed for a few relocation types, and
5945 unless linkrelax is enabled, they should not make it to this point. */
5946 if (fixP
->fx_subsy
&& !(linkrelax
&& (fixP
->fx_r_type
== BFD_RELOC_32
5947 || fixP
->fx_r_type
== BFD_RELOC_16
5948 || fixP
->fx_r_type
== BFD_RELOC_8
)))
5949 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("expression too complex"));
5951 switch (fixP
->fx_r_type
)
5953 case BFD_RELOC_32_PCREL
:
5959 switch (fixP
->fx_r_type
)
5962 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF8
;
5963 fixP
->fx_signed
= 0;
5966 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF16
;
5967 fixP
->fx_signed
= 0;
5970 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF32
;
5971 fixP
->fx_signed
= 0;
5977 val
= (S_GET_VALUE (fixP
->fx_addsy
) + fixP
->fx_offset
5978 - S_GET_VALUE (fixP
->fx_subsy
));
5980 /* The difference value gets written out, and the DIFF reloc
5981 identifies the address of the subtracted symbol (i.e., the one
5982 with the lowest address). */
5984 fixP
->fx_offset
-= val
;
5985 fixP
->fx_subsy
= NULL
;
5987 else if (! fixP
->fx_addsy
)
5994 case BFD_RELOC_XTENSA_PLT
:
5995 md_number_to_chars (fixpos
, val
, fixP
->fx_size
);
5996 fixP
->fx_no_overflow
= 0; /* Use the standard overflow check. */
5999 case BFD_RELOC_XTENSA_TLSDESC_FN
:
6000 case BFD_RELOC_XTENSA_TLSDESC_ARG
:
6001 case BFD_RELOC_XTENSA_TLS_TPOFF
:
6002 case BFD_RELOC_XTENSA_TLS_DTPOFF
:
6003 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
6004 md_number_to_chars (fixpos
, 0, fixP
->fx_size
);
6005 fixP
->fx_no_overflow
= 0; /* Use the standard overflow check. */
6008 case BFD_RELOC_XTENSA_SLOT0_OP
:
6009 case BFD_RELOC_XTENSA_SLOT1_OP
:
6010 case BFD_RELOC_XTENSA_SLOT2_OP
:
6011 case BFD_RELOC_XTENSA_SLOT3_OP
:
6012 case BFD_RELOC_XTENSA_SLOT4_OP
:
6013 case BFD_RELOC_XTENSA_SLOT5_OP
:
6014 case BFD_RELOC_XTENSA_SLOT6_OP
:
6015 case BFD_RELOC_XTENSA_SLOT7_OP
:
6016 case BFD_RELOC_XTENSA_SLOT8_OP
:
6017 case BFD_RELOC_XTENSA_SLOT9_OP
:
6018 case BFD_RELOC_XTENSA_SLOT10_OP
:
6019 case BFD_RELOC_XTENSA_SLOT11_OP
:
6020 case BFD_RELOC_XTENSA_SLOT12_OP
:
6021 case BFD_RELOC_XTENSA_SLOT13_OP
:
6022 case BFD_RELOC_XTENSA_SLOT14_OP
:
6025 /* Write the tentative value of a PC-relative relocation to a
6026 local symbol into the instruction. The value will be ignored
6027 by the linker, and it makes the object file disassembly
6028 readable when all branch targets are encoded in relocations. */
6030 gas_assert (fixP
->fx_addsy
);
6031 if (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
6032 && !S_FORCE_RELOC (fixP
->fx_addsy
, 1))
6034 val
= (S_GET_VALUE (fixP
->fx_addsy
) + fixP
->fx_offset
6035 - md_pcrel_from (fixP
));
6036 (void) xg_apply_fix_value (fixP
, val
);
6039 else if (! fixP
->fx_addsy
)
6042 if (xg_apply_fix_value (fixP
, val
))
6047 case BFD_RELOC_XTENSA_ASM_EXPAND
:
6048 case BFD_RELOC_XTENSA_TLS_FUNC
:
6049 case BFD_RELOC_XTENSA_TLS_ARG
:
6050 case BFD_RELOC_XTENSA_TLS_CALL
:
6051 case BFD_RELOC_XTENSA_SLOT0_ALT
:
6052 case BFD_RELOC_XTENSA_SLOT1_ALT
:
6053 case BFD_RELOC_XTENSA_SLOT2_ALT
:
6054 case BFD_RELOC_XTENSA_SLOT3_ALT
:
6055 case BFD_RELOC_XTENSA_SLOT4_ALT
:
6056 case BFD_RELOC_XTENSA_SLOT5_ALT
:
6057 case BFD_RELOC_XTENSA_SLOT6_ALT
:
6058 case BFD_RELOC_XTENSA_SLOT7_ALT
:
6059 case BFD_RELOC_XTENSA_SLOT8_ALT
:
6060 case BFD_RELOC_XTENSA_SLOT9_ALT
:
6061 case BFD_RELOC_XTENSA_SLOT10_ALT
:
6062 case BFD_RELOC_XTENSA_SLOT11_ALT
:
6063 case BFD_RELOC_XTENSA_SLOT12_ALT
:
6064 case BFD_RELOC_XTENSA_SLOT13_ALT
:
6065 case BFD_RELOC_XTENSA_SLOT14_ALT
:
6066 /* These all need to be resolved at link-time. Do nothing now. */
6069 case BFD_RELOC_VTABLE_INHERIT
:
6070 case BFD_RELOC_VTABLE_ENTRY
:
6075 as_bad (_("unhandled local relocation fix %s"),
6076 bfd_get_reloc_code_name (fixP
->fx_r_type
));
6082 md_atof (int type
, char *litP
, int *sizeP
)
6084 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
6089 md_estimate_size_before_relax (fragS
*fragP
, segT seg ATTRIBUTE_UNUSED
)
6091 return total_frag_text_expansion (fragP
);
6095 /* Translate internal representation of relocation info to BFD target
6099 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
6103 reloc
= XNEW (arelent
);
6104 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
6105 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
6106 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6108 /* Make sure none of our internal relocations make it this far.
6109 They'd better have been fully resolved by this point. */
6110 gas_assert ((int) fixp
->fx_r_type
> 0);
6112 reloc
->addend
= fixp
->fx_offset
;
6114 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
6115 if (reloc
->howto
== NULL
)
6117 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
6118 _("cannot represent `%s' relocation in object file"),
6119 bfd_get_reloc_code_name (fixp
->fx_r_type
));
6120 free (reloc
->sym_ptr_ptr
);
6125 if (!fixp
->fx_pcrel
!= !reloc
->howto
->pc_relative
)
6126 as_fatal (_("internal error; cannot generate `%s' relocation"),
6127 bfd_get_reloc_code_name (fixp
->fx_r_type
));
6133 /* Checks for resource conflicts between instructions. */
6135 /* The func unit stuff could be implemented as bit-vectors rather
6136 than the iterative approach here. If it ends up being too
6137 slow, we will switch it. */
6140 new_resource_table (void *data
,
6143 unit_num_copies_func uncf
,
6144 opcode_num_units_func onuf
,
6145 opcode_funcUnit_use_unit_func ouuf
,
6146 opcode_funcUnit_use_stage_func ousf
)
6149 resource_table
*rt
= XNEW (resource_table
);
6151 rt
->cycles
= cycles
;
6152 rt
->allocated_cycles
= cycles
;
6154 rt
->unit_num_copies
= uncf
;
6155 rt
->opcode_num_units
= onuf
;
6156 rt
->opcode_unit_use
= ouuf
;
6157 rt
->opcode_unit_stage
= ousf
;
6159 rt
->units
= XCNEWVEC (unsigned char *, cycles
);
6160 for (i
= 0; i
< cycles
; i
++)
6161 rt
->units
[i
] = XCNEWVEC (unsigned char, nu
);
6168 clear_resource_table (resource_table
*rt
)
6171 for (i
= 0; i
< rt
->allocated_cycles
; i
++)
6172 for (j
= 0; j
< rt
->num_units
; j
++)
6173 rt
->units
[i
][j
] = 0;
6177 /* We never shrink it, just fake it into thinking so. */
6180 resize_resource_table (resource_table
*rt
, int cycles
)
6184 rt
->cycles
= cycles
;
6185 if (cycles
<= rt
->allocated_cycles
)
6188 old_cycles
= rt
->allocated_cycles
;
6189 rt
->allocated_cycles
= cycles
;
6191 rt
->units
= XRESIZEVEC (unsigned char *, rt
->units
, rt
->allocated_cycles
);
6192 for (i
= 0; i
< old_cycles
; i
++)
6193 rt
->units
[i
] = XRESIZEVEC (unsigned char, rt
->units
[i
], rt
->num_units
);
6194 for (i
= old_cycles
; i
< cycles
; i
++)
6195 rt
->units
[i
] = XCNEWVEC (unsigned char, rt
->num_units
);
6200 resources_available (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6203 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6205 for (i
= 0; i
< uses
; i
++)
6207 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6208 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6209 int copies_in_use
= rt
->units
[stage
+ cycle
][unit
];
6210 int copies
= (rt
->unit_num_copies
) (rt
->data
, unit
);
6211 if (copies_in_use
>= copies
)
6219 reserve_resources (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6222 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6224 for (i
= 0; i
< uses
; i
++)
6226 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6227 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6228 /* Note that this allows resources to be oversubscribed. That's
6229 essential to the way the optional scheduler works.
6230 resources_available reports when a resource is over-subscribed,
6231 so it's easy to tell. */
6232 rt
->units
[stage
+ cycle
][unit
]++;
6238 release_resources (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6241 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6243 for (i
= 0; i
< uses
; i
++)
6245 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6246 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6247 gas_assert (rt
->units
[stage
+ cycle
][unit
] > 0);
6248 rt
->units
[stage
+ cycle
][unit
]--;
6253 /* Wrapper functions make parameterized resource reservation
6257 opcode_funcUnit_use_unit (void *data
, xtensa_opcode opcode
, int idx
)
6259 xtensa_funcUnit_use
*use
= xtensa_opcode_funcUnit_use (data
, opcode
, idx
);
6265 opcode_funcUnit_use_stage (void *data
, xtensa_opcode opcode
, int idx
)
6267 xtensa_funcUnit_use
*use
= xtensa_opcode_funcUnit_use (data
, opcode
, idx
);
6272 /* Note that this function does not check issue constraints, but
6273 solely whether the hardware is available to execute the given
6274 instructions together. It also doesn't check if the tinsns
6275 write the same state, or access the same tieports. That is
6276 checked by check_t1_t2_reads_and_writes. */
6279 resources_conflict (vliw_insn
*vinsn
)
6282 static resource_table
*rt
= NULL
;
6284 /* This is the most common case by far. Optimize it. */
6285 if (vinsn
->num_slots
== 1)
6290 xtensa_isa isa
= xtensa_default_isa
;
6291 rt
= new_resource_table
6292 (isa
, xtensa_num_pipe_stages
,
6293 xtensa_isa_num_funcUnits (isa
),
6294 (unit_num_copies_func
) xtensa_funcUnit_num_copies
,
6295 (opcode_num_units_func
) xtensa_opcode_num_funcUnit_uses
,
6296 opcode_funcUnit_use_unit
,
6297 opcode_funcUnit_use_stage
);
6300 clear_resource_table (rt
);
6302 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6304 if (!resources_available (rt
, vinsn
->slots
[i
].opcode
, 0))
6306 reserve_resources (rt
, vinsn
->slots
[i
].opcode
, 0);
6313 /* finish_vinsn, emit_single_op and helper functions. */
6315 static bfd_boolean
find_vinsn_conflicts (vliw_insn
*);
6316 static xtensa_format
xg_find_narrowest_format (vliw_insn
*);
6317 static void xg_assemble_vliw_tokens (vliw_insn
*);
6320 /* We have reached the end of a bundle; emit into the frag. */
6323 finish_vinsn (vliw_insn
*vinsn
)
6329 if (find_vinsn_conflicts (vinsn
))
6331 xg_clear_vinsn (vinsn
);
6335 /* First, find a format that works. */
6336 if (vinsn
->format
== XTENSA_UNDEFINED
)
6337 vinsn
->format
= xg_find_narrowest_format (vinsn
);
6339 slots
= xtensa_format_num_slots (xtensa_default_isa
, vinsn
->format
);
6341 && produce_flix
== FLIX_NONE
)
6343 as_bad (_("The option \"--no-allow-flix\" prohibits multi-slot flix."));
6344 xg_clear_vinsn (vinsn
);
6348 if (vinsn
->format
== XTENSA_UNDEFINED
)
6350 as_bad (_("couldn't find a valid instruction format"));
6351 fprintf (stderr
, _(" ops were: "));
6352 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6353 fprintf (stderr
, _(" %s;"),
6354 xtensa_opcode_name (xtensa_default_isa
,
6355 vinsn
->slots
[i
].opcode
));
6356 fprintf (stderr
, _("\n"));
6357 xg_clear_vinsn (vinsn
);
6361 if (vinsn
->num_slots
!= slots
)
6363 as_bad (_("mismatch for format '%s': #slots = %d, #opcodes = %d"),
6364 xtensa_format_name (xtensa_default_isa
, vinsn
->format
),
6365 slots
, vinsn
->num_slots
);
6366 xg_clear_vinsn (vinsn
);
6370 if (resources_conflict (vinsn
))
6372 as_bad (_("illegal resource usage in bundle"));
6373 fprintf (stderr
, " ops were: ");
6374 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6375 fprintf (stderr
, " %s;",
6376 xtensa_opcode_name (xtensa_default_isa
,
6377 vinsn
->slots
[i
].opcode
));
6378 fprintf (stderr
, "\n");
6379 xg_clear_vinsn (vinsn
);
6383 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6385 if (vinsn
->slots
[i
].opcode
!= XTENSA_UNDEFINED
)
6387 symbolS
*lit_sym
= NULL
;
6389 bfd_boolean e
= FALSE
;
6390 bfd_boolean saved_density
= density_supported
;
6392 /* We don't want to narrow ops inside multi-slot bundles. */
6393 if (vinsn
->num_slots
> 1)
6394 density_supported
= FALSE
;
6396 istack_init (&slotstack
);
6397 if (vinsn
->slots
[i
].opcode
== xtensa_nop_opcode
)
6399 vinsn
->slots
[i
].opcode
=
6400 xtensa_format_slot_nop_opcode (xtensa_default_isa
,
6402 vinsn
->slots
[i
].ntok
= 0;
6405 if (xg_expand_assembly_insn (&slotstack
, &vinsn
->slots
[i
]))
6411 density_supported
= saved_density
;
6415 xg_clear_vinsn (vinsn
);
6419 for (j
= 0; j
< slotstack
.ninsn
; j
++)
6421 TInsn
*insn
= &slotstack
.insn
[j
];
6422 if (insn
->insn_type
== ITYPE_LITERAL
)
6424 gas_assert (lit_sym
== NULL
);
6425 lit_sym
= xg_assemble_literal (insn
);
6429 gas_assert (insn
->insn_type
== ITYPE_INSN
);
6431 xg_resolve_literals (insn
, lit_sym
);
6432 if (j
!= slotstack
.ninsn
- 1)
6433 emit_single_op (insn
);
6437 if (vinsn
->num_slots
> 1)
6439 if (opcode_fits_format_slot
6440 (slotstack
.insn
[slotstack
.ninsn
- 1].opcode
,
6443 vinsn
->slots
[i
] = slotstack
.insn
[slotstack
.ninsn
- 1];
6447 emit_single_op (&slotstack
.insn
[slotstack
.ninsn
- 1]);
6448 if (vinsn
->format
== XTENSA_UNDEFINED
)
6449 vinsn
->slots
[i
].opcode
= xtensa_nop_opcode
;
6451 vinsn
->slots
[i
].opcode
6452 = xtensa_format_slot_nop_opcode (xtensa_default_isa
,
6455 vinsn
->slots
[i
].ntok
= 0;
6460 vinsn
->slots
[0] = slotstack
.insn
[slotstack
.ninsn
- 1];
6461 vinsn
->format
= XTENSA_UNDEFINED
;
6466 /* Now check resource conflicts on the modified bundle. */
6467 if (resources_conflict (vinsn
))
6469 as_bad (_("illegal resource usage in bundle"));
6470 fprintf (stderr
, " ops were: ");
6471 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6472 fprintf (stderr
, " %s;",
6473 xtensa_opcode_name (xtensa_default_isa
,
6474 vinsn
->slots
[i
].opcode
));
6475 fprintf (stderr
, "\n");
6476 xg_clear_vinsn (vinsn
);
6480 /* First, find a format that works. */
6481 if (vinsn
->format
== XTENSA_UNDEFINED
)
6482 vinsn
->format
= xg_find_narrowest_format (vinsn
);
6484 xg_assemble_vliw_tokens (vinsn
);
6486 xg_clear_vinsn (vinsn
);
6488 xtensa_check_frag_count ();
6492 /* Given an vliw instruction, what conflicts are there in register
6493 usage and in writes to states and queues?
6495 This function does two things:
6496 1. Reports an error when a vinsn contains illegal combinations
6497 of writes to registers states or queues.
6498 2. Marks individual tinsns as not relaxable if the combination
6499 contains antidependencies.
6501 Job 2 handles things like swap semantics in instructions that need
6502 to be relaxed. For example,
6506 normally would be relaxed to
6511 _but_, if the above instruction is bundled with an a0 reader, e.g.,
6513 { addi a0, a1, 10000 ; add a2, a0, a4 ; }
6515 then we can't relax it into
6518 { add a0, a1, a0 ; add a2, a0, a4 ; }
6520 because the value of a0 is trashed before the second add can read it. */
6522 static char check_t1_t2_reads_and_writes (TInsn
*, TInsn
*);
6525 find_vinsn_conflicts (vliw_insn
*vinsn
)
6529 xtensa_isa isa
= xtensa_default_isa
;
6531 gas_assert (!past_xtensa_end
);
6533 for (i
= 0 ; i
< vinsn
->num_slots
; i
++)
6535 TInsn
*op1
= &vinsn
->slots
[i
];
6536 if (op1
->is_specific_opcode
)
6537 op1
->keep_wide
= TRUE
;
6539 op1
->keep_wide
= FALSE
;
6542 for (i
= 0 ; i
< vinsn
->num_slots
; i
++)
6544 TInsn
*op1
= &vinsn
->slots
[i
];
6546 if (xtensa_opcode_is_branch (isa
, op1
->opcode
) == 1)
6549 for (j
= 0; j
< vinsn
->num_slots
; j
++)
6553 TInsn
*op2
= &vinsn
->slots
[j
];
6554 char conflict_type
= check_t1_t2_reads_and_writes (op1
, op2
);
6555 switch (conflict_type
)
6558 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same register"),
6559 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6560 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6563 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same state"),
6564 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6565 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6568 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same port"),
6569 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6570 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6573 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) both have volatile port accesses"),
6574 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6575 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6578 /* Everything is OK. */
6581 op2
->is_specific_opcode
= (op2
->is_specific_opcode
6582 || conflict_type
== 'a');
6589 as_bad (_("multiple branches or jumps in the same bundle"));
6597 /* Check how the state used by t1 and t2 relate.
6600 case A: t1 reads a register t2 writes (an antidependency within a bundle)
6601 case B: no relationship between what is read and written (both could
6602 read the same reg though)
6603 case C: t1 writes a register t2 writes (a register conflict within a
6605 case D: t1 writes a state that t2 also writes
6606 case E: t1 writes a tie queue that t2 also writes
6607 case F: two volatile queue accesses
6611 check_t1_t2_reads_and_writes (TInsn
*t1
, TInsn
*t2
)
6613 xtensa_isa isa
= xtensa_default_isa
;
6614 xtensa_regfile t1_regfile
, t2_regfile
;
6616 int t1_base_reg
, t1_last_reg
;
6617 int t2_base_reg
, t2_last_reg
;
6618 char t1_inout
, t2_inout
;
6620 char conflict
= 'b';
6625 bfd_boolean t1_volatile
= FALSE
;
6626 bfd_boolean t2_volatile
= FALSE
;
6628 /* Check registers. */
6629 for (j
= 0; j
< t2
->ntok
; j
++)
6631 if (xtensa_operand_is_register (isa
, t2
->opcode
, j
) != 1)
6634 t2_regfile
= xtensa_operand_regfile (isa
, t2
->opcode
, j
);
6635 t2_base_reg
= t2
->tok
[j
].X_add_number
;
6636 t2_last_reg
= t2_base_reg
+ xtensa_operand_num_regs (isa
, t2
->opcode
, j
);
6638 for (i
= 0; i
< t1
->ntok
; i
++)
6640 if (xtensa_operand_is_register (isa
, t1
->opcode
, i
) != 1)
6643 t1_regfile
= xtensa_operand_regfile (isa
, t1
->opcode
, i
);
6645 if (t1_regfile
!= t2_regfile
)
6648 t1_inout
= xtensa_operand_inout (isa
, t1
->opcode
, i
);
6649 t2_inout
= xtensa_operand_inout (isa
, t2
->opcode
, j
);
6651 if (xtensa_operand_is_known_reg (isa
, t1
->opcode
, i
) == 0
6652 || xtensa_operand_is_known_reg (isa
, t2
->opcode
, j
) == 0)
6654 if (t1_inout
== 'm' || t1_inout
== 'o'
6655 || t2_inout
== 'm' || t2_inout
== 'o')
6662 t1_base_reg
= t1
->tok
[i
].X_add_number
;
6663 t1_last_reg
= (t1_base_reg
6664 + xtensa_operand_num_regs (isa
, t1
->opcode
, i
));
6666 for (t1_reg
= t1_base_reg
; t1_reg
< t1_last_reg
; t1_reg
++)
6668 for (t2_reg
= t2_base_reg
; t2_reg
< t2_last_reg
; t2_reg
++)
6670 if (t1_reg
!= t2_reg
)
6673 if (t2_inout
== 'i' && (t1_inout
== 'm' || t1_inout
== 'o'))
6679 if (t1_inout
== 'i' && (t2_inout
== 'm' || t2_inout
== 'o'))
6685 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6693 t1_states
= xtensa_opcode_num_stateOperands (isa
, t1
->opcode
);
6694 t2_states
= xtensa_opcode_num_stateOperands (isa
, t2
->opcode
);
6695 for (j
= 0; j
< t2_states
; j
++)
6697 xtensa_state t2_so
= xtensa_stateOperand_state (isa
, t2
->opcode
, j
);
6698 t2_inout
= xtensa_stateOperand_inout (isa
, t2
->opcode
, j
);
6699 for (i
= 0; i
< t1_states
; i
++)
6701 xtensa_state t1_so
= xtensa_stateOperand_state (isa
, t1
->opcode
, i
);
6702 t1_inout
= xtensa_stateOperand_inout (isa
, t1
->opcode
, i
);
6703 if (t1_so
!= t2_so
|| xtensa_state_is_shared_or (isa
, t1_so
) == 1)
6706 if (t2_inout
== 'i' && (t1_inout
== 'm' || t1_inout
== 'o'))
6712 if (t1_inout
== 'i' && (t2_inout
== 'm' || t2_inout
== 'o'))
6718 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6723 /* Check tieports. */
6724 t1_interfaces
= xtensa_opcode_num_interfaceOperands (isa
, t1
->opcode
);
6725 t2_interfaces
= xtensa_opcode_num_interfaceOperands (isa
, t2
->opcode
);
6726 for (j
= 0; j
< t2_interfaces
; j
++)
6728 xtensa_interface t2_int
6729 = xtensa_interfaceOperand_interface (isa
, t2
->opcode
, j
);
6730 int t2_class
= xtensa_interface_class_id (isa
, t2_int
);
6732 t2_inout
= xtensa_interface_inout (isa
, t2_int
);
6733 if (xtensa_interface_has_side_effect (isa
, t2_int
) == 1)
6736 for (i
= 0; i
< t1_interfaces
; i
++)
6738 xtensa_interface t1_int
6739 = xtensa_interfaceOperand_interface (isa
, t1
->opcode
, j
);
6740 int t1_class
= xtensa_interface_class_id (isa
, t1_int
);
6742 t1_inout
= xtensa_interface_inout (isa
, t1_int
);
6743 if (xtensa_interface_has_side_effect (isa
, t1_int
) == 1)
6746 if (t1_volatile
&& t2_volatile
&& (t1_class
== t2_class
))
6749 if (t1_int
!= t2_int
)
6752 if (t2_inout
== 'i' && t1_inout
== 'o')
6758 if (t1_inout
== 'i' && t2_inout
== 'o')
6764 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6773 static xtensa_format
6774 xg_find_narrowest_format (vliw_insn
*vinsn
)
6776 /* Right now we assume that the ops within the vinsn are properly
6777 ordered for the slots that the programmer wanted them in. In
6778 other words, we don't rearrange the ops in hopes of finding a
6779 better format. The scheduler handles that. */
6781 xtensa_isa isa
= xtensa_default_isa
;
6782 xtensa_format format
;
6783 xtensa_opcode nop_opcode
= xtensa_nop_opcode
;
6785 if (vinsn
->num_slots
== 1)
6786 return xg_get_single_format (vinsn
->slots
[0].opcode
);
6788 for (format
= 0; format
< xtensa_isa_num_formats (isa
); format
++)
6791 xg_copy_vinsn (&v_copy
, vinsn
);
6792 if (xtensa_format_num_slots (isa
, format
) == v_copy
.num_slots
)
6796 for (slot
= 0; slot
< v_copy
.num_slots
; slot
++)
6798 if (v_copy
.slots
[slot
].opcode
== nop_opcode
)
6800 v_copy
.slots
[slot
].opcode
=
6801 xtensa_format_slot_nop_opcode (isa
, format
, slot
);
6802 v_copy
.slots
[slot
].ntok
= 0;
6805 if (opcode_fits_format_slot (v_copy
.slots
[slot
].opcode
,
6808 else if (v_copy
.num_slots
> 1)
6811 /* Try the widened version. */
6812 if (!v_copy
.slots
[slot
].keep_wide
6813 && !v_copy
.slots
[slot
].is_specific_opcode
6814 && xg_is_single_relaxable_insn (&v_copy
.slots
[slot
],
6816 && opcode_fits_format_slot (widened
.opcode
,
6819 v_copy
.slots
[slot
] = widened
;
6824 if (fit
== v_copy
.num_slots
)
6826 xg_copy_vinsn (vinsn
, &v_copy
);
6827 xtensa_format_encode (isa
, format
, vinsn
->insnbuf
);
6828 vinsn
->format
= format
;
6834 if (format
== xtensa_isa_num_formats (isa
))
6835 return XTENSA_UNDEFINED
;
6841 /* Return the additional space needed in a frag
6842 for possible relaxations of any ops in a VLIW insn.
6843 Also fill out the relaxations that might be required of
6844 each tinsn in the vinsn. */
6847 relaxation_requirements (vliw_insn
*vinsn
, bfd_boolean
*pfinish_frag
)
6849 bfd_boolean finish_frag
= FALSE
;
6850 int extra_space
= 0;
6853 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
6855 TInsn
*tinsn
= &vinsn
->slots
[slot
];
6856 if (!tinsn_has_symbolic_operands (tinsn
))
6858 /* A narrow instruction could be widened later to help
6859 alignment issues. */
6860 if (xg_is_single_relaxable_insn (tinsn
, 0, TRUE
)
6861 && !tinsn
->is_specific_opcode
6862 && vinsn
->num_slots
== 1)
6864 /* Difference in bytes between narrow and wide insns... */
6866 tinsn
->subtype
= RELAX_NARROW
;
6871 if (workaround_b_j_loop_end
6872 && tinsn
->opcode
== xtensa_jx_opcode
6873 && use_transform ())
6875 /* Add 2 of these. */
6876 extra_space
+= 3; /* for the nop size */
6877 tinsn
->subtype
= RELAX_ADD_NOP_IF_PRE_LOOP_END
;
6880 /* Need to assemble it with space for the relocation. */
6881 if (xg_is_relaxable_insn (tinsn
, 0)
6882 && !tinsn
->is_specific_opcode
)
6884 int max_size
= xg_get_max_insn_widen_size (tinsn
->opcode
);
6885 int max_literal_size
=
6886 xg_get_max_insn_widen_literal_size (tinsn
->opcode
);
6888 tinsn
->literal_space
= max_literal_size
;
6890 tinsn
->subtype
= RELAX_IMMED
;
6891 extra_space
+= max_size
;
6895 /* A fix record will be added for this instruction prior
6896 to relaxation, so make it end the frag. */
6901 *pfinish_frag
= finish_frag
;
6907 bundle_tinsn (TInsn
*tinsn
, vliw_insn
*vinsn
)
6909 xtensa_isa isa
= xtensa_default_isa
;
6910 int slot
, chosen_slot
;
6912 vinsn
->format
= xg_get_single_format (tinsn
->opcode
);
6913 gas_assert (vinsn
->format
!= XTENSA_UNDEFINED
);
6914 vinsn
->num_slots
= xtensa_format_num_slots (isa
, vinsn
->format
);
6916 chosen_slot
= xg_get_single_slot (tinsn
->opcode
);
6917 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
6919 if (slot
== chosen_slot
)
6920 vinsn
->slots
[slot
] = *tinsn
;
6923 vinsn
->slots
[slot
].opcode
=
6924 xtensa_format_slot_nop_opcode (isa
, vinsn
->format
, slot
);
6925 vinsn
->slots
[slot
].ntok
= 0;
6926 vinsn
->slots
[slot
].insn_type
= ITYPE_INSN
;
6933 emit_single_op (TInsn
*orig_insn
)
6936 IStack istack
; /* put instructions into here */
6937 symbolS
*lit_sym
= NULL
;
6938 symbolS
*label_sym
= NULL
;
6940 istack_init (&istack
);
6942 /* Special-case for "movi aX, foo" which is guaranteed to need relaxing.
6943 Because the scheduling and bundling characteristics of movi and
6944 l32r or const16 are so different, we can do much better if we relax
6945 it prior to scheduling and bundling, rather than after. */
6946 if ((orig_insn
->opcode
== xtensa_movi_opcode
6947 || orig_insn
->opcode
== xtensa_movi_n_opcode
)
6948 && !cur_vinsn
.inside_bundle
6949 && (orig_insn
->tok
[1].X_op
== O_symbol
6950 || orig_insn
->tok
[1].X_op
== O_pltrel
6951 || orig_insn
->tok
[1].X_op
== O_tlsfunc
6952 || orig_insn
->tok
[1].X_op
== O_tlsarg
6953 || orig_insn
->tok
[1].X_op
== O_tpoff
6954 || orig_insn
->tok
[1].X_op
== O_dtpoff
)
6955 && !orig_insn
->is_specific_opcode
&& use_transform ())
6956 xg_assembly_relax (&istack
, orig_insn
, now_seg
, frag_now
, 0, 1, 0);
6958 if (xg_expand_assembly_insn (&istack
, orig_insn
))
6961 for (i
= 0; i
< istack
.ninsn
; i
++)
6963 TInsn
*insn
= &istack
.insn
[i
];
6964 switch (insn
->insn_type
)
6967 gas_assert (lit_sym
== NULL
);
6968 lit_sym
= xg_assemble_literal (insn
);
6972 static int relaxed_sym_idx
= 0;
6973 char *label
= XNEWVEC (char, strlen (FAKE_LABEL_NAME
) + 12);
6974 sprintf (label
, "%s_rl_%x", FAKE_LABEL_NAME
, relaxed_sym_idx
++);
6976 gas_assert (label_sym
== NULL
);
6977 label_sym
= symbol_find_or_make (label
);
6978 gas_assert (label_sym
);
6986 xg_resolve_literals (insn
, lit_sym
);
6988 xg_resolve_labels (insn
, label_sym
);
6990 bundle_tinsn (insn
, &v
);
7005 total_frag_text_expansion (fragS
*fragP
)
7008 int total_expansion
= 0;
7010 for (slot
= 0; slot
< config_max_slots
; slot
++)
7011 total_expansion
+= fragP
->tc_frag_data
.text_expansion
[slot
];
7013 return total_expansion
;
7017 /* Emit a vliw instruction to the current fragment. */
7020 xg_assemble_vliw_tokens (vliw_insn
*vinsn
)
7022 bfd_boolean finish_frag
;
7023 bfd_boolean is_jump
= FALSE
;
7024 bfd_boolean is_branch
= FALSE
;
7025 xtensa_isa isa
= xtensa_default_isa
;
7030 struct dwarf2_line_info debug_line
;
7031 bfd_boolean loc_directive_seen
= FALSE
;
7034 memset (&debug_line
, 0, sizeof (struct dwarf2_line_info
));
7036 if (generating_literals
)
7038 static int reported
= 0;
7040 as_bad_where (frag_now
->fr_file
, frag_now
->fr_line
,
7041 _("cannot assemble into a literal fragment"));
7048 if (frag_now_fix () != 0
7049 && (! frag_now
->tc_frag_data
.is_insn
7050 || (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7051 || (!use_transform ()) != frag_now
->tc_frag_data
.is_no_transform
7052 || (directive_state
[directive_longcalls
]
7053 != frag_now
->tc_frag_data
.use_longcalls
)
7054 || (directive_state
[directive_absolute_literals
]
7055 != frag_now
->tc_frag_data
.use_absolute_literals
)))
7057 frag_wane (frag_now
);
7059 xtensa_set_frag_assembly_state (frag_now
);
7062 if (workaround_a0_b_retw
7063 && vinsn
->num_slots
== 1
7064 && (get_last_insn_flags (now_seg
, now_subseg
) & FLAG_IS_A0_WRITER
) != 0
7065 && xtensa_opcode_is_branch (isa
, vinsn
->slots
[0].opcode
) == 1
7066 && use_transform ())
7068 has_a0_b_retw
= TRUE
;
7070 /* Mark this fragment with the special RELAX_ADD_NOP_IF_A0_B_RETW.
7071 After the first assembly pass we will check all of them and
7072 add a nop if needed. */
7073 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7074 frag_var (rs_machine_dependent
, 4, 4,
7075 RELAX_ADD_NOP_IF_A0_B_RETW
,
7076 frag_now
->fr_symbol
,
7077 frag_now
->fr_offset
,
7079 xtensa_set_frag_assembly_state (frag_now
);
7080 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7081 frag_var (rs_machine_dependent
, 4, 4,
7082 RELAX_ADD_NOP_IF_A0_B_RETW
,
7083 frag_now
->fr_symbol
,
7084 frag_now
->fr_offset
,
7086 xtensa_set_frag_assembly_state (frag_now
);
7089 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
7091 tinsn
= &vinsn
->slots
[slot
];
7093 /* See if the instruction implies an aligned section. */
7094 if (xtensa_opcode_is_loop (isa
, tinsn
->opcode
) == 1)
7095 record_alignment (now_seg
, 2);
7097 /* Determine the best line number for debug info. */
7098 if ((tinsn
->loc_directive_seen
|| !loc_directive_seen
)
7099 && (tinsn
->debug_line
.filenum
!= debug_line
.filenum
7100 || tinsn
->debug_line
.line
< debug_line
.line
7101 || tinsn
->debug_line
.column
< debug_line
.column
))
7102 debug_line
= tinsn
->debug_line
;
7103 if (tinsn
->loc_directive_seen
)
7104 loc_directive_seen
= TRUE
;
7107 /* Special cases for instructions that force an alignment... */
7108 /* None of these opcodes are bundle-able. */
7109 if (xtensa_opcode_is_loop (isa
, vinsn
->slots
[0].opcode
) == 1)
7113 /* Remember the symbol that marks the end of the loop in the frag
7114 that marks the start of the loop. This way we can easily find
7115 the end of the loop at the beginning, without adding special code
7116 to mark the loop instructions themselves. */
7117 symbolS
*target_sym
= NULL
;
7118 if (vinsn
->slots
[0].tok
[1].X_op
== O_symbol
)
7119 target_sym
= vinsn
->slots
[0].tok
[1].X_add_symbol
;
7121 xtensa_set_frag_assembly_state (frag_now
);
7122 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7124 max_fill
= get_text_align_max_fill_size
7125 (get_text_align_power (xtensa_fetch_width
),
7126 TRUE
, frag_now
->tc_frag_data
.is_no_density
);
7128 if (use_transform ())
7129 frag_var (rs_machine_dependent
, max_fill
, max_fill
,
7130 RELAX_ALIGN_NEXT_OPCODE
, target_sym
, 0, NULL
);
7132 frag_var (rs_machine_dependent
, 0, 0,
7133 RELAX_CHECK_ALIGN_NEXT_OPCODE
, target_sym
, 0, NULL
);
7134 xtensa_set_frag_assembly_state (frag_now
);
7137 if (vinsn
->slots
[0].opcode
== xtensa_entry_opcode
7138 && !vinsn
->slots
[0].is_specific_opcode
)
7140 xtensa_mark_literal_pool_location ();
7141 xtensa_move_labels (frag_now
, 0);
7142 frag_var (rs_align_test
, 1, 1, 0, NULL
, 2, NULL
);
7145 if (vinsn
->num_slots
== 1)
7147 if (workaround_a0_b_retw
&& use_transform ())
7148 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_A0_WRITER
,
7149 is_register_writer (&vinsn
->slots
[0], "a", 0));
7151 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_BAD_LOOPEND
,
7152 is_bad_loopend_opcode (&vinsn
->slots
[0]));
7155 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_BAD_LOOPEND
, FALSE
);
7157 insn_size
= xtensa_format_length (isa
, vinsn
->format
);
7159 extra_space
= relaxation_requirements (vinsn
, &finish_frag
);
7161 /* vinsn_to_insnbuf will produce the error. */
7162 if (vinsn
->format
!= XTENSA_UNDEFINED
)
7164 f
= frag_more (insn_size
+ extra_space
);
7165 xtensa_set_frag_assembly_state (frag_now
);
7166 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7169 vinsn_to_insnbuf (vinsn
, f
, frag_now
, FALSE
);
7170 if (vinsn
->format
== XTENSA_UNDEFINED
)
7173 xtensa_insnbuf_to_chars (isa
, vinsn
->insnbuf
, (unsigned char *) f
, 0);
7175 if (debug_type
== DEBUG_DWARF2
|| loc_directive_seen
)
7176 dwarf2_gen_line_info (frag_now_fix () - (insn_size
+ extra_space
),
7179 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
7181 tinsn
= &vinsn
->slots
[slot
];
7182 frag_now
->tc_frag_data
.slot_subtypes
[slot
] = tinsn
->subtype
;
7183 frag_now
->tc_frag_data
.slot_symbols
[slot
] = tinsn
->symbol
;
7184 frag_now
->tc_frag_data
.slot_offsets
[slot
] = tinsn
->offset
;
7185 frag_now
->tc_frag_data
.literal_frags
[slot
] = tinsn
->literal_frag
;
7186 if (tinsn
->opcode
== xtensa_l32r_opcode
)
7188 frag_now
->tc_frag_data
.literal_frags
[slot
] =
7189 tinsn
->tok
[1].X_add_symbol
->sy_frag
;
7191 if (tinsn
->literal_space
!= 0)
7192 xg_assemble_literal_space (tinsn
->literal_space
, slot
);
7193 frag_now
->tc_frag_data
.free_reg
[slot
] = tinsn
->extra_arg
;
7195 if (tinsn
->subtype
== RELAX_NARROW
)
7196 gas_assert (vinsn
->num_slots
== 1);
7197 if (xtensa_opcode_is_jump (isa
, tinsn
->opcode
) == 1)
7199 if (xtensa_opcode_is_branch (isa
, tinsn
->opcode
) == 1)
7202 if (tinsn
->subtype
|| tinsn
->symbol
|| tinsn
->offset
7203 || tinsn
->literal_frag
|| is_jump
|| is_branch
)
7207 if (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7208 frag_now
->tc_frag_data
.is_specific_opcode
= TRUE
;
7212 frag_variant (rs_machine_dependent
,
7213 extra_space
, extra_space
, RELAX_SLOTS
,
7214 frag_now
->fr_symbol
, frag_now
->fr_offset
, f
);
7215 xtensa_set_frag_assembly_state (frag_now
);
7218 /* Special cases for loops:
7219 close_loop_end should be inserted AFTER short_loop.
7220 Make sure that CLOSE loops are processed BEFORE short_loops
7221 when converting them. */
7223 /* "short_loop": Add a NOP if the loop is < 4 bytes. */
7224 if (xtensa_opcode_is_loop (isa
, vinsn
->slots
[0].opcode
) == 1
7225 && !vinsn
->slots
[0].is_specific_opcode
)
7227 if (workaround_short_loop
&& use_transform ())
7229 maybe_has_short_loop
= TRUE
;
7230 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7231 frag_var (rs_machine_dependent
, 4, 4,
7232 RELAX_ADD_NOP_IF_SHORT_LOOP
,
7233 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7234 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7235 frag_var (rs_machine_dependent
, 4, 4,
7236 RELAX_ADD_NOP_IF_SHORT_LOOP
,
7237 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7240 /* "close_loop_end": Add up to 12 bytes of NOPs to keep a
7241 loop at least 12 bytes away from another loop's end. */
7242 if (workaround_close_loop_end
&& use_transform ())
7244 maybe_has_close_loop_end
= TRUE
;
7245 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7246 frag_var (rs_machine_dependent
, 12, 12,
7247 RELAX_ADD_NOP_IF_CLOSE_LOOP_END
,
7248 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7252 if (use_transform ())
7256 gas_assert (finish_frag
);
7257 frag_var (rs_machine_dependent
,
7258 xtensa_fetch_width
, xtensa_fetch_width
,
7260 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7261 xtensa_set_frag_assembly_state (frag_now
);
7262 xtensa_maybe_create_trampoline_frag ();
7263 /* Always create one here. */
7264 xtensa_maybe_create_literal_pool_frag (TRUE
, FALSE
);
7266 else if (is_branch
&& do_align_targets ())
7268 gas_assert (finish_frag
);
7269 frag_var (rs_machine_dependent
,
7270 xtensa_fetch_width
, xtensa_fetch_width
,
7271 RELAX_MAYBE_UNREACHABLE
,
7272 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7273 xtensa_set_frag_assembly_state (frag_now
);
7274 frag_var (rs_machine_dependent
,
7276 RELAX_MAYBE_DESIRE_ALIGN
,
7277 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7278 xtensa_set_frag_assembly_state (frag_now
);
7282 /* Now, if the original opcode was a call... */
7283 if (do_align_targets ()
7284 && xtensa_opcode_is_call (isa
, vinsn
->slots
[0].opcode
) == 1)
7286 float freq
= get_subseg_total_freq (now_seg
, now_subseg
);
7287 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7288 frag_var (rs_machine_dependent
, 4, (int) freq
, RELAX_DESIRE_ALIGN
,
7289 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7290 xtensa_set_frag_assembly_state (frag_now
);
7293 if (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7295 frag_wane (frag_now
);
7297 xtensa_set_frag_assembly_state (frag_now
);
7302 /* xtensa_end and helper functions. */
7304 static void xtensa_cleanup_align_frags (void);
7305 static void xtensa_fix_target_frags (void);
7306 static void xtensa_mark_narrow_branches (void);
7307 static void xtensa_mark_zcl_first_insns (void);
7308 static void xtensa_mark_difference_of_two_symbols (void);
7309 static void xtensa_fix_a0_b_retw_frags (void);
7310 static void xtensa_fix_b_j_loop_end_frags (void);
7311 static void xtensa_fix_close_loop_end_frags (void);
7312 static void xtensa_fix_short_loop_frags (void);
7313 static void xtensa_sanity_check (void);
7314 static void xtensa_add_config_info (void);
7319 directive_balance ();
7320 xtensa_flush_pending_output ();
7322 past_xtensa_end
= TRUE
;
7324 xtensa_move_literals ();
7326 xtensa_reorder_segments ();
7327 xtensa_cleanup_align_frags ();
7328 xtensa_fix_target_frags ();
7329 if (workaround_a0_b_retw
&& has_a0_b_retw
)
7330 xtensa_fix_a0_b_retw_frags ();
7331 if (workaround_b_j_loop_end
)
7332 xtensa_fix_b_j_loop_end_frags ();
7334 /* "close_loop_end" should be processed BEFORE "short_loop". */
7335 if (workaround_close_loop_end
&& maybe_has_close_loop_end
)
7336 xtensa_fix_close_loop_end_frags ();
7338 if (workaround_short_loop
&& maybe_has_short_loop
)
7339 xtensa_fix_short_loop_frags ();
7341 xtensa_mark_narrow_branches ();
7342 xtensa_mark_zcl_first_insns ();
7344 xtensa_sanity_check ();
7346 xtensa_add_config_info ();
7348 xtensa_check_frag_count ();
7351 struct trampoline_chain_entry
7357 /* Trampoline chain for a given (sym, offset) pair is a sorted array
7358 of locations of trampoline jumps leading there. Jumps are represented
7359 as pairs (sym, offset): trampoline frag symbol and offset of the jump
7361 struct trampoline_chain
7363 struct trampoline_chain_entry target
;
7364 struct trampoline_chain_entry
*entry
;
7367 bfd_boolean needs_sorting
;
7370 struct trampoline_chain_index
7372 struct trampoline_chain
*entry
;
7375 bfd_boolean needs_sorting
;
7378 struct trampoline_index
7385 struct trampoline_seg
7387 struct trampoline_seg
*next
;
7389 /* Trampolines ordered by their frag fr_address */
7390 struct trampoline_index index
;
7391 /* Known trampoline chains ordered by (sym, offset) pair */
7392 struct trampoline_chain_index chain_index
;
7395 static struct trampoline_seg trampoline_seg_list
;
7396 #define J_RANGE (128 * 1024)
7397 #define J_MARGIN 4096
7399 static int unreachable_count
= 0;
7403 xtensa_maybe_create_trampoline_frag (void)
7405 if (!use_trampolines
)
7408 /* We create an area for possible trampolines every 10 unreachable frags.
7409 These are preferred over the ones not preceded by an unreachable frag,
7410 because we don't have to jump around them. This function is called after
7411 each RELAX_UNREACHABLE frag is created. */
7413 if (++unreachable_count
> 10)
7415 xtensa_create_trampoline_frag (FALSE
);
7416 clear_frag_count ();
7417 unreachable_count
= 0;
7422 xtensa_check_frag_count (void)
7424 if (!use_trampolines
|| frag_now
->tc_frag_data
.is_no_transform
)
7427 /* We create an area for possible trampolines every 8000 frags or so. This
7428 is an estimate based on the max range of a "j" insn (+/-128K) divided
7429 by a typical frag byte count (16), minus a few for safety. This function
7430 is called after each source line is processed. */
7432 if (get_frag_count () > 8000)
7434 xtensa_create_trampoline_frag (TRUE
);
7435 clear_frag_count ();
7436 unreachable_count
= 0;
7439 /* We create an area for a possible literal pool every N (default 5000)
7441 xtensa_maybe_create_literal_pool_frag (TRUE
, TRUE
);
7444 static xtensa_insnbuf trampoline_buf
= NULL
;
7445 static xtensa_insnbuf trampoline_slotbuf
= NULL
;
7447 static xtensa_insnbuf litpool_buf
= NULL
;
7448 static xtensa_insnbuf litpool_slotbuf
= NULL
;
7450 #define TRAMPOLINE_FRAG_SIZE 3000
7452 static struct trampoline_seg
*
7453 find_trampoline_seg (asection
*seg
)
7455 struct trampoline_seg
*ts
= trampoline_seg_list
.next
;
7456 static struct trampoline_seg
*mr
;
7458 if (mr
&& mr
->seg
== seg
)
7461 for ( ; ts
; ts
= ts
->next
)
7473 static size_t xg_find_trampoline (const struct trampoline_index
*idx
,
7477 size_t b
= idx
->n_entries
;
7481 size_t c
= (a
+ b
) / 2;
7483 if (idx
->entry
[c
]->fr_address
<= addr
)
7491 static void xg_add_trampoline_to_index (struct trampoline_index
*idx
,
7494 if (idx
->n_entries
== idx
->n_max
)
7496 idx
->n_max
= (idx
->n_entries
+ 1) * 2;
7497 idx
->entry
= xrealloc (idx
->entry
,
7498 sizeof (*idx
->entry
) * idx
->n_max
);
7500 idx
->entry
[idx
->n_entries
] = fragP
;
7504 static void xg_remove_trampoline_from_index (struct trampoline_index
*idx
,
7507 gas_assert (i
< idx
->n_entries
);
7508 memmove (idx
->entry
+ i
, idx
->entry
+ i
+ 1,
7509 (idx
->n_entries
- i
- 1) * sizeof (*idx
->entry
));
7513 static void xg_add_trampoline_to_seg (struct trampoline_seg
*ts
,
7516 xg_add_trampoline_to_index (&ts
->index
, fragP
);
7520 xtensa_create_trampoline_frag (bfd_boolean needs_jump_around
)
7522 /* Emit a frag where we can place intermediate jump instructions,
7523 in case we need to jump farther than 128K bytes.
7524 Each jump instruction takes three bytes.
7525 We allocate enough for 1000 trampolines in each frag.
7526 If that's not enough, oh well. */
7528 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
7531 int size
= TRAMPOLINE_FRAG_SIZE
;
7535 ts
= XCNEW(struct trampoline_seg
);
7536 ts
->next
= trampoline_seg_list
.next
;
7537 trampoline_seg_list
.next
= ts
;
7541 frag_wane (frag_now
);
7543 xtensa_set_frag_assembly_state (frag_now
);
7544 varP
= frag_var (rs_machine_dependent
, size
, size
, RELAX_TRAMPOLINE
, NULL
, 0, NULL
);
7545 fragP
= (fragS
*)(varP
- SIZEOF_STRUCT_FRAG
);
7546 if (trampoline_buf
== NULL
)
7548 trampoline_buf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
7549 trampoline_slotbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
7551 fragP
->tc_frag_data
.needs_jump_around
= needs_jump_around
;
7552 xg_add_trampoline_to_seg (ts
, fragP
);
7555 static bfd_boolean
xg_is_trampoline_frag_full (const fragS
*fragP
)
7557 return fragP
->fr_var
< 3;
7560 static int xg_order_trampoline_chain_entry (const void *a
, const void *b
)
7562 const struct trampoline_chain_entry
*pa
= a
;
7563 const struct trampoline_chain_entry
*pb
= b
;
7565 if (pa
->sym
== pb
->sym
||
7566 S_GET_VALUE (pa
->sym
) == S_GET_VALUE (pb
->sym
))
7567 if (pa
->offset
== pb
->offset
)
7570 return pa
->offset
< pb
->offset
? -1 : 1;
7572 return S_GET_VALUE (pa
->sym
) < S_GET_VALUE (pb
->sym
) ? -1 : 1;
7575 static void xg_sort_trampoline_chain (struct trampoline_chain
*tc
)
7577 qsort (tc
->entry
, tc
->n_entries
, sizeof (*tc
->entry
),
7578 xg_order_trampoline_chain_entry
);
7579 tc
->needs_sorting
= FALSE
;
7582 /* Find entry index in the given chain with maximal address <= source. */
7583 static size_t xg_find_chain_entry (struct trampoline_chain
*tc
,
7587 size_t b
= tc
->n_entries
;
7589 if (tc
->needs_sorting
)
7590 xg_sort_trampoline_chain (tc
);
7594 size_t c
= (a
+ b
) / 2;
7595 struct trampoline_chain_entry
*e
= tc
->entry
+ c
;
7597 if (S_GET_VALUE(e
->sym
) + e
->offset
<= source
)
7605 /* Find the best jump target for the source in the given trampoline chain.
7606 The best jump target is the one that results in the shortest path to the
7607 final target, it's the location of the jump closest to the final target,
7608 but within the J_RANGE - J_MARGIN from the source. */
7609 static struct trampoline_chain_entry
*
7610 xg_get_best_chain_entry (struct trampoline_chain
*tc
, addressT source
)
7612 addressT target
= S_GET_VALUE(tc
->target
.sym
) + tc
->target
.offset
;
7613 size_t i
= xg_find_chain_entry (tc
, source
);
7614 struct trampoline_chain_entry
*e
= tc
->entry
+ i
;
7615 int step
= target
< source
? -1 : 1;
7616 addressT chained_target
;
7619 if (target
> source
&&
7620 S_GET_VALUE(e
->sym
) + e
->offset
<= source
&&
7621 i
+ 1 < tc
->n_entries
)
7624 while (i
+ step
< tc
->n_entries
)
7626 struct trampoline_chain_entry
*next
= tc
->entry
+ i
+ step
;
7628 chained_target
= S_GET_VALUE(next
->sym
) + next
->offset
;
7629 off
= source
- chained_target
;
7631 if (labs (off
) >= J_RANGE
- J_MARGIN
)
7638 chained_target
= S_GET_VALUE(e
->sym
) + e
->offset
;
7639 off
= source
- chained_target
;
7641 if (labs (off
) < J_MARGIN
||
7642 labs (off
) >= J_RANGE
- J_MARGIN
)
7644 return tc
->entry
+ i
;
7647 static int xg_order_trampoline_chain (const void *a
, const void *b
)
7649 const struct trampoline_chain
*pa
= a
;
7650 const struct trampoline_chain
*pb
= b
;
7652 return xg_order_trampoline_chain_entry (&pa
->target
, &pb
->target
);
7655 static struct trampoline_chain
*
7656 xg_get_trampoline_chain (struct trampoline_seg
*ts
,
7660 struct trampoline_chain_index
*idx
= &ts
->chain_index
;
7661 struct trampoline_chain c
;
7663 if (idx
->needs_sorting
)
7665 qsort (idx
->entry
, idx
->n_entries
, sizeof (*idx
->entry
),
7666 xg_order_trampoline_chain
);
7667 idx
->needs_sorting
= FALSE
;
7670 c
.target
.offset
= offset
;
7671 return bsearch (&c
, idx
->entry
, idx
->n_entries
,
7672 sizeof (struct trampoline_chain
),
7673 xg_order_trampoline_chain
);
7676 /* Find trampoline chain in the given trampoline segment that is going
7677 to the *sym + *offset. If found, replace *sym and *offset with the
7678 best jump target in that chain. */
7679 static struct trampoline_chain
*
7680 xg_find_best_eq_target (struct trampoline_seg
*ts
,
7681 addressT source
, symbolS
**sym
,
7684 struct trampoline_chain
*tc
= xg_get_trampoline_chain (ts
, *sym
, *offset
);
7688 struct trampoline_chain_entry
*e
= xg_get_best_chain_entry (tc
, source
);
7691 *offset
= e
->offset
;
7696 static void xg_add_location_to_chain (struct trampoline_chain
*tc
,
7697 symbolS
*sym
, addressT offset
)
7699 struct trampoline_chain_entry
*e
;
7701 if (tc
->n_entries
== tc
->n_max
)
7703 tc
->n_max
= (tc
->n_max
+ 1) * 2;
7704 tc
->entry
= xrealloc (tc
->entry
, sizeof (*tc
->entry
) * tc
->n_max
);
7706 e
= tc
->entry
+ tc
->n_entries
;
7710 tc
->needs_sorting
= TRUE
;
7713 static struct trampoline_chain
*
7714 xg_create_trampoline_chain (struct trampoline_seg
*ts
,
7715 symbolS
*sym
, addressT offset
)
7717 struct trampoline_chain_index
*idx
= &ts
->chain_index
;
7718 struct trampoline_chain
*tc
;
7720 if (idx
->n_entries
== idx
->n_max
)
7722 idx
->n_max
= (idx
->n_max
+ 1) * 2;
7723 idx
->entry
= xrealloc (idx
->entry
,
7724 sizeof (*idx
->entry
) * idx
->n_max
);
7727 tc
= idx
->entry
+ idx
->n_entries
;
7728 tc
->target
.sym
= sym
;
7729 tc
->target
.offset
= offset
;
7733 xg_add_location_to_chain (tc
, sym
, offset
);
7736 idx
->needs_sorting
= TRUE
;
7741 void dump_trampolines (void);
7744 dump_trampolines (void)
7746 struct trampoline_seg
*ts
= trampoline_seg_list
.next
;
7748 for ( ; ts
; ts
= ts
->next
)
7751 asection
*seg
= ts
->seg
;
7755 fprintf(stderr
, "SECTION %s\n", seg
->name
);
7757 for (i
= 0; i
< ts
->index
.n_entries
; ++i
)
7759 fragS
*tf
= ts
->index
.entry
[i
];
7761 fprintf(stderr
, " 0x%08x: fix=%d, jump_around=%s\n",
7762 (int)tf
->fr_address
, (int)tf
->fr_fix
,
7763 tf
->tc_frag_data
.needs_jump_around
? "T" : "F");
7768 static void dump_litpools (void) __attribute__ ((unused
));
7771 dump_litpools (void)
7773 struct litpool_seg
*lps
= litpool_seg_list
.next
;
7774 struct litpool_frag
*lpf
;
7776 for ( ; lps
; lps
= lps
->next
)
7778 printf("litpool seg %s\n", lps
->seg
->name
);
7779 for ( lpf
= lps
->frag_list
.next
; lpf
->fragP
; lpf
= lpf
->next
)
7781 fragS
*litfrag
= lpf
->fragP
->fr_next
;
7783 while (litfrag
&& litfrag
->fr_subtype
!= RELAX_LITERAL_POOL_END
)
7785 if (litfrag
->fr_fix
== 4)
7787 litfrag
= litfrag
->fr_next
;
7789 printf(" %ld <%d:%d> (%d) [%d]: ",
7790 lpf
->addr
, lpf
->priority
, lpf
->original_priority
,
7791 lpf
->fragP
->fr_line
, count
);
7792 //dump_frag(lpf->fragP);
7798 xtensa_maybe_create_literal_pool_frag (bfd_boolean create
,
7799 bfd_boolean only_if_needed
)
7801 struct litpool_seg
*lps
= litpool_seg_list
.next
;
7803 struct litpool_frag
*lpf
;
7804 bfd_boolean needed
= FALSE
;
7806 if (use_literal_section
|| !auto_litpools
)
7809 for ( ; lps
; lps
= lps
->next
)
7811 if (lps
->seg
== now_seg
)
7817 lps
= XCNEW (struct litpool_seg
);
7818 lps
->next
= litpool_seg_list
.next
;
7819 litpool_seg_list
.next
= lps
;
7821 lps
->frag_list
.next
= &lps
->frag_list
;
7822 lps
->frag_list
.prev
= &lps
->frag_list
;
7823 /* Put candidate literal pool at the beginning of every section,
7824 so that even when section starts with literal load there's a
7825 literal pool available. */
7826 lps
->frag_count
= auto_litpool_limit
;
7835 if (past_xtensa_end
|| !use_transform() ||
7836 frag_now
->tc_frag_data
.is_no_transform
)
7840 if (auto_litpool_limit
<= 0)
7842 /* Don't create a litpool based only on frag count. */
7845 else if (lps
->frag_count
> auto_litpool_limit
)
7862 int size
= (only_if_needed
) ? 3 : 0; /* Space for a "j" insn. */
7863 /* Create a potential site for a literal pool. */
7864 frag_wane (frag_now
);
7866 xtensa_set_frag_assembly_state (frag_now
);
7868 fragP
->tc_frag_data
.lit_frchain
= frchain_now
;
7869 fragP
->tc_frag_data
.literal_frag
= fragP
;
7870 frag_var (rs_machine_dependent
, size
, size
,
7872 RELAX_LITERAL_POOL_CANDIDATE_BEGIN
:
7873 RELAX_LITERAL_POOL_BEGIN
,
7875 frag_now
->tc_frag_data
.lit_seg
= now_seg
;
7876 frag_variant (rs_machine_dependent
, 0, 0,
7877 RELAX_LITERAL_POOL_END
, NULL
, 0, NULL
);
7878 xtensa_set_frag_assembly_state (frag_now
);
7882 /* RELAX_LITERAL_POOL_BEGIN frag is being created;
7883 just record it here. */
7887 lpf
= XNEW (struct litpool_frag
);
7888 /* Insert at tail of circular list. */
7890 lps
->frag_list
.prev
->next
= lpf
;
7891 lpf
->next
= &lps
->frag_list
;
7892 lpf
->prev
= lps
->frag_list
.prev
;
7893 lps
->frag_list
.prev
= lpf
;
7895 lpf
->priority
= (needed
) ? (only_if_needed
) ? 3 : 2 : 1;
7896 lpf
->original_priority
= lpf
->priority
;
7898 lps
->frag_count
= 0;
7902 xtensa_cleanup_align_frags (void)
7907 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7908 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7911 /* Walk over all of the fragments in a subsection. */
7912 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7914 if ((fragP
->fr_type
== rs_align
7915 || fragP
->fr_type
== rs_align_code
7916 || (fragP
->fr_type
== rs_machine_dependent
7917 && (fragP
->fr_subtype
== RELAX_DESIRE_ALIGN
7918 || fragP
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)))
7919 && fragP
->fr_fix
== 0)
7921 fragS
*next
= fragP
->fr_next
;
7924 && next
->fr_fix
== 0
7925 && next
->fr_type
== rs_machine_dependent
7926 && next
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)
7929 next
= next
->fr_next
;
7932 /* If we don't widen branch targets, then they
7933 will be easier to align. */
7934 if (fragP
->tc_frag_data
.is_branch_target
7935 && fragP
->fr_opcode
== fragP
->fr_literal
7936 && fragP
->fr_type
== rs_machine_dependent
7937 && fragP
->fr_subtype
== RELAX_SLOTS
7938 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
7940 if (fragP
->fr_type
== rs_machine_dependent
7941 && fragP
->fr_subtype
== RELAX_UNREACHABLE
)
7942 fragP
->tc_frag_data
.is_unreachable
= TRUE
;
7948 /* Re-process all of the fragments looking to convert all of the
7949 RELAX_DESIRE_ALIGN_IF_TARGET fragments. If there is a branch
7950 target in the next fragment, convert this to RELAX_DESIRE_ALIGN.
7951 Otherwise, convert to a .fill 0. */
7954 xtensa_fix_target_frags (void)
7959 /* When this routine is called, all of the subsections are still intact
7960 so we walk over subsections instead of sections. */
7961 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7962 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7966 /* Walk over all of the fragments in a subsection. */
7967 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7969 if (fragP
->fr_type
== rs_machine_dependent
7970 && fragP
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)
7972 if (next_frag_is_branch_target (fragP
))
7973 fragP
->fr_subtype
= RELAX_DESIRE_ALIGN
;
7982 static bfd_boolean
is_narrow_branch_guaranteed_in_range (fragS
*, TInsn
*);
7985 xtensa_mark_narrow_branches (void)
7990 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7991 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7994 /* Walk over all of the fragments in a subsection. */
7995 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7997 if (fragP
->fr_type
== rs_machine_dependent
7998 && fragP
->fr_subtype
== RELAX_SLOTS
7999 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED
)
8003 vinsn_from_chars (&vinsn
, fragP
->fr_opcode
);
8004 tinsn_immed_from_frag (&vinsn
.slots
[0], fragP
, 0);
8006 if (vinsn
.num_slots
== 1
8007 && xtensa_opcode_is_branch (xtensa_default_isa
,
8008 vinsn
.slots
[0].opcode
) == 1
8009 && xg_get_single_size (vinsn
.slots
[0].opcode
) == 2
8010 && is_narrow_branch_guaranteed_in_range (fragP
,
8013 fragP
->fr_subtype
= RELAX_SLOTS
;
8014 fragP
->tc_frag_data
.slot_subtypes
[0] = RELAX_NARROW
;
8015 fragP
->tc_frag_data
.is_aligning_branch
= 1;
8023 /* A branch is typically widened only when its target is out of
8024 range. However, we would like to widen them to align a subsequent
8025 branch target when possible.
8027 Because the branch relaxation code is so convoluted, the optimal solution
8028 (combining the two cases) is difficult to get right in all circumstances.
8029 We therefore go with an "almost as good" solution, where we only
8030 use for alignment narrow branches that definitely will not expand to a
8031 jump and a branch. These functions find and mark these cases. */
8033 /* The range in bytes of BNEZ.N and BEQZ.N. The target operand is encoded
8034 as PC + 4 + imm6, where imm6 is a 6-bit immediate ranging from 0 to 63.
8035 We start counting beginning with the frag after the 2-byte branch, so the
8036 maximum offset is (4 - 2) + 63 = 65. */
8037 #define MAX_IMMED6 65
8039 static offsetT
unrelaxed_frag_max_size (fragS
*);
8042 is_narrow_branch_guaranteed_in_range (fragS
*fragP
, TInsn
*tinsn
)
8044 const expressionS
*exp
= &tinsn
->tok
[1];
8045 symbolS
*symbolP
= exp
->X_add_symbol
;
8046 offsetT max_distance
= exp
->X_add_number
;
8049 if (exp
->X_op
!= O_symbol
)
8052 target_frag
= symbol_get_frag (symbolP
);
8054 max_distance
+= (S_GET_VALUE (symbolP
) - target_frag
->fr_address
);
8055 if (is_branch_jmp_to_next (tinsn
, fragP
))
8058 /* The branch doesn't branch over it's own frag,
8059 but over the subsequent ones. */
8060 fragP
= fragP
->fr_next
;
8061 while (fragP
!= NULL
&& fragP
!= target_frag
&& max_distance
<= MAX_IMMED6
)
8063 max_distance
+= unrelaxed_frag_max_size (fragP
);
8064 fragP
= fragP
->fr_next
;
8066 if (max_distance
<= MAX_IMMED6
&& fragP
== target_frag
)
8073 xtensa_mark_zcl_first_insns (void)
8078 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8079 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8082 /* Walk over all of the fragments in a subsection. */
8083 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8085 if (fragP
->fr_type
== rs_machine_dependent
8086 && (fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
8087 || fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
))
8089 /* Find the loop frag. */
8090 fragS
*loop_frag
= next_non_empty_frag (fragP
);
8091 /* Find the first insn frag. */
8092 fragS
*targ_frag
= next_non_empty_frag (loop_frag
);
8094 /* Handle a corner case that comes up in hardware
8095 diagnostics. The original assembly looks like this:
8098 <empty_frag>--not found by next_non_empty_frag
8101 Depending on the start address, the assembler may or
8102 may not change it to look something like this:
8105 nop--frag isn't empty anymore
8108 So set up to check the alignment of the nop if it
8110 while (loop_frag
!= targ_frag
)
8112 if (loop_frag
->fr_type
== rs_machine_dependent
8113 && (loop_frag
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
8114 || loop_frag
->fr_subtype
8115 == RELAX_CHECK_ALIGN_NEXT_OPCODE
))
8116 targ_frag
= loop_frag
;
8118 loop_frag
= loop_frag
->fr_next
;
8121 /* Of course, sometimes (mostly for toy test cases) a
8122 zero-cost loop instruction is the last in a section. */
8125 targ_frag
->tc_frag_data
.is_first_loop_insn
= TRUE
;
8126 /* Do not widen a frag that is the first instruction of a
8127 zero-cost loop. It makes that loop harder to align. */
8128 if (targ_frag
->fr_type
== rs_machine_dependent
8129 && targ_frag
->fr_subtype
== RELAX_SLOTS
8130 && (targ_frag
->tc_frag_data
.slot_subtypes
[0]
8133 if (targ_frag
->tc_frag_data
.is_aligning_branch
)
8134 targ_frag
->tc_frag_data
.slot_subtypes
[0] = RELAX_IMMED
;
8137 frag_wane (targ_frag
);
8138 targ_frag
->tc_frag_data
.slot_subtypes
[0] = 0;
8142 if (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)
8150 /* When a difference-of-symbols expression is encoded as a uleb128 or
8151 sleb128 value, the linker is unable to adjust that value to account for
8152 link-time relaxation. Mark all the code between such symbols so that
8153 its size cannot be changed by linker relaxation. */
8156 xtensa_mark_difference_of_two_symbols (void)
8160 for (expr_sym
= expr_symbols
; expr_sym
;
8161 expr_sym
= symbol_get_tc (expr_sym
)->next_expr_symbol
)
8163 expressionS
*exp
= symbol_get_value_expression (expr_sym
);
8165 if (exp
->X_op
== O_subtract
)
8167 symbolS
*left
= exp
->X_add_symbol
;
8168 symbolS
*right
= exp
->X_op_symbol
;
8170 /* Difference of two symbols not in the same section
8171 are handled with relocations in the linker. */
8172 if (S_GET_SEGMENT (left
) == S_GET_SEGMENT (right
))
8178 if (symbol_get_frag (left
)->fr_address
8179 <= symbol_get_frag (right
)->fr_address
)
8181 start
= symbol_get_frag (left
);
8182 end
= symbol_get_frag (right
);
8186 start
= symbol_get_frag (right
);
8187 end
= symbol_get_frag (left
);
8190 if (start
->tc_frag_data
.no_transform_end
!= NULL
)
8191 walk
= start
->tc_frag_data
.no_transform_end
;
8196 walk
->tc_frag_data
.is_no_transform
= 1;
8197 walk
= walk
->fr_next
;
8199 while (walk
&& walk
->fr_address
< end
->fr_address
);
8201 start
->tc_frag_data
.no_transform_end
= walk
;
8208 /* Re-process all of the fragments looking to convert all of the
8209 RELAX_ADD_NOP_IF_A0_B_RETW. If the next instruction is a
8210 conditional branch or a retw/retw.n, convert this frag to one that
8211 will generate a NOP. In any case close it off with a .fill 0. */
8213 static bfd_boolean
next_instrs_are_b_retw (fragS
*);
8216 xtensa_fix_a0_b_retw_frags (void)
8221 /* When this routine is called, all of the subsections are still intact
8222 so we walk over subsections instead of sections. */
8223 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8224 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8228 /* Walk over all of the fragments in a subsection. */
8229 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8231 if (fragP
->fr_type
== rs_machine_dependent
8232 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_A0_B_RETW
)
8234 if (next_instrs_are_b_retw (fragP
))
8236 if (fragP
->tc_frag_data
.is_no_transform
)
8237 as_bad (_("instruction sequence (write a0, branch, retw) may trigger hardware errata"));
8239 relax_frag_add_nop (fragP
);
8249 next_instrs_are_b_retw (fragS
*fragP
)
8251 xtensa_opcode opcode
;
8253 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
8254 static xtensa_insnbuf insnbuf
= NULL
;
8255 static xtensa_insnbuf slotbuf
= NULL
;
8256 xtensa_isa isa
= xtensa_default_isa
;
8259 bfd_boolean branch_seen
= FALSE
;
8263 insnbuf
= xtensa_insnbuf_alloc (isa
);
8264 slotbuf
= xtensa_insnbuf_alloc (isa
);
8267 if (next_fragP
== NULL
)
8270 /* Check for the conditional branch. */
8271 xtensa_insnbuf_from_chars
8272 (isa
, insnbuf
, (unsigned char *) &next_fragP
->fr_literal
[offset
], 0);
8273 fmt
= xtensa_format_decode (isa
, insnbuf
);
8274 if (fmt
== XTENSA_UNDEFINED
)
8277 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
8279 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
8280 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
8282 branch_seen
= (branch_seen
8283 || xtensa_opcode_is_branch (isa
, opcode
) == 1);
8289 offset
+= xtensa_format_length (isa
, fmt
);
8290 if (offset
== next_fragP
->fr_fix
)
8292 next_fragP
= next_non_empty_frag (next_fragP
);
8296 if (next_fragP
== NULL
)
8299 /* Check for the retw/retw.n. */
8300 xtensa_insnbuf_from_chars
8301 (isa
, insnbuf
, (unsigned char *) &next_fragP
->fr_literal
[offset
], 0);
8302 fmt
= xtensa_format_decode (isa
, insnbuf
);
8304 /* Because RETW[.N] is not bundleable, a VLIW bundle here means that we
8305 have no problems. */
8306 if (fmt
== XTENSA_UNDEFINED
8307 || xtensa_format_num_slots (isa
, fmt
) != 1)
8310 xtensa_format_get_slot (isa
, fmt
, 0, insnbuf
, slotbuf
);
8311 opcode
= xtensa_opcode_decode (isa
, fmt
, 0, slotbuf
);
8313 if (opcode
== xtensa_retw_opcode
|| opcode
== xtensa_retw_n_opcode
)
8320 /* Re-process all of the fragments looking to convert all of the
8321 RELAX_ADD_NOP_IF_PRE_LOOP_END. If there is one instruction and a
8322 loop end label, convert this frag to one that will generate a NOP.
8323 In any case close it off with a .fill 0. */
8325 static bfd_boolean
next_instr_is_loop_end (fragS
*);
8328 xtensa_fix_b_j_loop_end_frags (void)
8333 /* When this routine is called, all of the subsections are still intact
8334 so we walk over subsections instead of sections. */
8335 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8336 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8340 /* Walk over all of the fragments in a subsection. */
8341 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8343 if (fragP
->fr_type
== rs_machine_dependent
8344 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_PRE_LOOP_END
)
8346 if (next_instr_is_loop_end (fragP
))
8348 if (fragP
->tc_frag_data
.is_no_transform
)
8349 as_bad (_("branching or jumping to a loop end may trigger hardware errata"));
8351 relax_frag_add_nop (fragP
);
8361 next_instr_is_loop_end (fragS
*fragP
)
8363 const fragS
*next_fragP
;
8365 if (next_frag_is_loop_target (fragP
))
8368 next_fragP
= next_non_empty_frag (fragP
);
8369 if (next_fragP
== NULL
)
8372 if (!next_frag_is_loop_target (next_fragP
))
8375 /* If the size is >= 3 then there is more than one instruction here.
8376 The hardware bug will not fire. */
8377 if (next_fragP
->fr_fix
> 3)
8384 /* Re-process all of the fragments looking to convert all of the
8385 RELAX_ADD_NOP_IF_CLOSE_LOOP_END. If there is an loop end that is
8386 not MY loop's loop end within 12 bytes, add enough nops here to
8387 make it at least 12 bytes away. In any case close it off with a
8390 static offsetT min_bytes_to_other_loop_end
8391 (fragS
*, fragS
*, offsetT
);
8394 xtensa_fix_close_loop_end_frags (void)
8399 /* When this routine is called, all of the subsections are still intact
8400 so we walk over subsections instead of sections. */
8401 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8402 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8406 fragS
*current_target
= NULL
;
8408 /* Walk over all of the fragments in a subsection. */
8409 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8411 if (fragP
->fr_type
== rs_machine_dependent
8412 && ((fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
)
8413 || (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)))
8414 current_target
= symbol_get_frag (fragP
->fr_symbol
);
8417 && fragP
->fr_type
== rs_machine_dependent
8418 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_CLOSE_LOOP_END
)
8421 int bytes_added
= 0;
8423 #define REQUIRED_LOOP_DIVIDING_BYTES 12
8424 /* Max out at 12. */
8425 min_bytes
= min_bytes_to_other_loop_end
8426 (fragP
->fr_next
, current_target
, REQUIRED_LOOP_DIVIDING_BYTES
);
8428 if (min_bytes
< REQUIRED_LOOP_DIVIDING_BYTES
)
8430 if (fragP
->tc_frag_data
.is_no_transform
)
8431 as_bad (_("loop end too close to another loop end may trigger hardware errata"));
8434 while (min_bytes
+ bytes_added
8435 < REQUIRED_LOOP_DIVIDING_BYTES
)
8439 if (fragP
->fr_var
< length
)
8440 as_fatal (_("fr_var %lu < length %d"),
8441 (long) fragP
->fr_var
, length
);
8444 assemble_nop (length
,
8445 fragP
->fr_literal
+ fragP
->fr_fix
);
8446 fragP
->fr_fix
+= length
;
8447 fragP
->fr_var
-= length
;
8449 bytes_added
+= length
;
8455 gas_assert (fragP
->fr_type
!= rs_machine_dependent
8456 || fragP
->fr_subtype
!= RELAX_ADD_NOP_IF_CLOSE_LOOP_END
);
8462 static offsetT
unrelaxed_frag_min_size (fragS
*);
8465 min_bytes_to_other_loop_end (fragS
*fragP
,
8466 fragS
*current_target
,
8470 fragS
*current_fragP
;
8472 for (current_fragP
= fragP
;
8474 current_fragP
= current_fragP
->fr_next
)
8476 if (current_fragP
->tc_frag_data
.is_loop_target
8477 && current_fragP
!= current_target
)
8480 offset
+= unrelaxed_frag_min_size (current_fragP
);
8482 if (offset
>= max_size
)
8490 unrelaxed_frag_min_size (fragS
*fragP
)
8492 offsetT size
= fragP
->fr_fix
;
8494 /* Add fill size. */
8495 if (fragP
->fr_type
== rs_fill
)
8496 size
+= fragP
->fr_offset
;
8503 unrelaxed_frag_max_size (fragS
*fragP
)
8505 offsetT size
= fragP
->fr_fix
;
8506 switch (fragP
->fr_type
)
8509 /* Empty frags created by the obstack allocation scheme
8510 end up with type 0. */
8515 size
+= fragP
->fr_offset
;
8523 /* No further adjustments needed. */
8525 case rs_machine_dependent
:
8526 if (fragP
->fr_subtype
!= RELAX_DESIRE_ALIGN
)
8527 size
+= fragP
->fr_var
;
8530 /* We had darn well better know how big it is. */
8539 /* Re-process all of the fragments looking to convert all
8540 of the RELAX_ADD_NOP_IF_SHORT_LOOP. If:
8543 1) the instruction size count to the loop end label
8544 is too short (<= 2 instructions),
8545 2) loop has a jump or branch in it
8548 1) workaround_all_short_loops is TRUE
8549 2) The generating loop was a 'loopgtz' or 'loopnez'
8550 3) the instruction size count to the loop end label is too short
8552 then convert this frag (and maybe the next one) to generate a NOP.
8553 In any case close it off with a .fill 0. */
8555 static int count_insns_to_loop_end (fragS
*, bfd_boolean
, int);
8556 static bfd_boolean
branch_before_loop_end (fragS
*);
8559 xtensa_fix_short_loop_frags (void)
8564 /* When this routine is called, all of the subsections are still intact
8565 so we walk over subsections instead of sections. */
8566 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8567 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8570 xtensa_opcode current_opcode
= XTENSA_UNDEFINED
;
8572 /* Walk over all of the fragments in a subsection. */
8573 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8575 if (fragP
->fr_type
== rs_machine_dependent
8576 && ((fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
)
8577 || (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)))
8580 fragS
*loop_frag
= next_non_empty_frag (fragP
);
8581 tinsn_from_chars (&t_insn
, loop_frag
->fr_opcode
, 0);
8582 current_opcode
= t_insn
.opcode
;
8583 gas_assert (xtensa_opcode_is_loop (xtensa_default_isa
,
8584 current_opcode
) == 1);
8587 if (fragP
->fr_type
== rs_machine_dependent
8588 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_SHORT_LOOP
)
8590 if (count_insns_to_loop_end (fragP
->fr_next
, TRUE
, 3) < 3
8591 && (branch_before_loop_end (fragP
->fr_next
)
8592 || (workaround_all_short_loops
8593 && current_opcode
!= XTENSA_UNDEFINED
8594 && current_opcode
!= xtensa_loop_opcode
)))
8596 if (fragP
->tc_frag_data
.is_no_transform
)
8597 as_bad (_("loop containing less than three instructions may trigger hardware errata"));
8599 relax_frag_add_nop (fragP
);
8608 static int unrelaxed_frag_min_insn_count (fragS
*);
8611 count_insns_to_loop_end (fragS
*base_fragP
,
8612 bfd_boolean count_relax_add
,
8615 fragS
*fragP
= NULL
;
8620 for (; fragP
&& !fragP
->tc_frag_data
.is_loop_target
; fragP
= fragP
->fr_next
)
8622 insn_count
+= unrelaxed_frag_min_insn_count (fragP
);
8623 if (insn_count
>= max_count
)
8626 if (count_relax_add
)
8628 if (fragP
->fr_type
== rs_machine_dependent
8629 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_SHORT_LOOP
)
8631 /* In order to add the appropriate number of
8632 NOPs, we count an instruction for downstream
8635 if (insn_count
>= max_count
)
8645 unrelaxed_frag_min_insn_count (fragS
*fragP
)
8647 xtensa_isa isa
= xtensa_default_isa
;
8648 static xtensa_insnbuf insnbuf
= NULL
;
8652 if (!fragP
->tc_frag_data
.is_insn
)
8656 insnbuf
= xtensa_insnbuf_alloc (isa
);
8658 /* Decode the fixed instructions. */
8659 while (offset
< fragP
->fr_fix
)
8663 xtensa_insnbuf_from_chars
8664 (isa
, insnbuf
, (unsigned char *) fragP
->fr_literal
+ offset
, 0);
8665 fmt
= xtensa_format_decode (isa
, insnbuf
);
8667 if (fmt
== XTENSA_UNDEFINED
)
8669 as_fatal (_("undecodable instruction in instruction frag"));
8672 offset
+= xtensa_format_length (isa
, fmt
);
8680 static bfd_boolean
unrelaxed_frag_has_b_j (fragS
*);
8683 branch_before_loop_end (fragS
*base_fragP
)
8687 for (fragP
= base_fragP
;
8688 fragP
&& !fragP
->tc_frag_data
.is_loop_target
;
8689 fragP
= fragP
->fr_next
)
8691 if (unrelaxed_frag_has_b_j (fragP
))
8699 unrelaxed_frag_has_b_j (fragS
*fragP
)
8701 static xtensa_insnbuf insnbuf
= NULL
;
8702 xtensa_isa isa
= xtensa_default_isa
;
8705 if (!fragP
->tc_frag_data
.is_insn
)
8709 insnbuf
= xtensa_insnbuf_alloc (isa
);
8711 /* Decode the fixed instructions. */
8712 while (offset
< fragP
->fr_fix
)
8717 xtensa_insnbuf_from_chars
8718 (isa
, insnbuf
, (unsigned char *) fragP
->fr_literal
+ offset
, 0);
8719 fmt
= xtensa_format_decode (isa
, insnbuf
);
8720 if (fmt
== XTENSA_UNDEFINED
)
8723 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
8725 xtensa_opcode opcode
=
8726 get_opcode_from_buf (fragP
->fr_literal
+ offset
, slot
);
8727 if (xtensa_opcode_is_branch (isa
, opcode
) == 1
8728 || xtensa_opcode_is_jump (isa
, opcode
) == 1)
8731 offset
+= xtensa_format_length (isa
, fmt
);
8737 /* Checks to be made after initial assembly but before relaxation. */
8739 static bfd_boolean
is_empty_loop (const TInsn
*, fragS
*);
8740 static bfd_boolean
is_local_forward_loop (const TInsn
*, fragS
*);
8743 xtensa_sanity_check (void)
8745 const char *file_name
;
8750 file_name
= as_where (&line
);
8751 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8752 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8756 /* Walk over all of the fragments in a subsection. */
8757 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8759 if (fragP
->fr_type
== rs_machine_dependent
8760 && fragP
->fr_subtype
== RELAX_SLOTS
8761 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED
)
8763 static xtensa_insnbuf insnbuf
= NULL
;
8766 if (fragP
->fr_opcode
!= NULL
)
8769 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
8770 tinsn_from_chars (&t_insn
, fragP
->fr_opcode
, 0);
8771 tinsn_immed_from_frag (&t_insn
, fragP
, 0);
8773 if (xtensa_opcode_is_loop (xtensa_default_isa
,
8774 t_insn
.opcode
) == 1)
8776 if (is_empty_loop (&t_insn
, fragP
))
8778 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
8779 as_bad (_("invalid empty loop"));
8781 if (!is_local_forward_loop (&t_insn
, fragP
))
8783 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
8784 as_bad (_("loop target does not follow "
8785 "loop instruction in section"));
8792 new_logical_line (file_name
, line
);
8796 #define LOOP_IMMED_OPN 1
8798 /* Return TRUE if the loop target is the next non-zero fragment. */
8801 is_empty_loop (const TInsn
*insn
, fragS
*fragP
)
8803 const expressionS
*exp
;
8807 if (insn
->insn_type
!= ITYPE_INSN
)
8810 if (xtensa_opcode_is_loop (xtensa_default_isa
, insn
->opcode
) != 1)
8813 if (insn
->ntok
<= LOOP_IMMED_OPN
)
8816 exp
= &insn
->tok
[LOOP_IMMED_OPN
];
8818 if (exp
->X_op
!= O_symbol
)
8821 symbolP
= exp
->X_add_symbol
;
8825 if (symbol_get_frag (symbolP
) == NULL
)
8828 if (S_GET_VALUE (symbolP
) != 0)
8831 /* Walk through the zero-size fragments from this one. If we find
8832 the target fragment, then this is a zero-size loop. */
8834 for (next_fragP
= fragP
->fr_next
;
8836 next_fragP
= next_fragP
->fr_next
)
8838 if (next_fragP
== symbol_get_frag (symbolP
))
8840 if (next_fragP
->fr_fix
!= 0)
8848 is_local_forward_loop (const TInsn
*insn
, fragS
*fragP
)
8850 const expressionS
*exp
;
8854 if (insn
->insn_type
!= ITYPE_INSN
)
8857 if (xtensa_opcode_is_loop (xtensa_default_isa
, insn
->opcode
) != 1)
8860 if (insn
->ntok
<= LOOP_IMMED_OPN
)
8863 exp
= &insn
->tok
[LOOP_IMMED_OPN
];
8865 if (exp
->X_op
!= O_symbol
)
8868 symbolP
= exp
->X_add_symbol
;
8872 if (symbol_get_frag (symbolP
) == NULL
)
8875 /* Walk through fragments until we find the target.
8876 If we do not find the target, then this is an invalid loop. */
8878 for (next_fragP
= fragP
->fr_next
;
8880 next_fragP
= next_fragP
->fr_next
)
8882 if (next_fragP
== symbol_get_frag (symbolP
))
8890 #define XTINFO_NAME "Xtensa_Info"
8891 #define XTINFO_NAMESZ 12
8892 #define XTINFO_TYPE 1
8895 xtensa_add_config_info (void)
8901 info_sec
= subseg_new (".xtensa.info", 0);
8902 bfd_set_section_flags (stdoutput
, info_sec
, SEC_HAS_CONTENTS
| SEC_READONLY
);
8904 data
= XNEWVEC (char, 100);
8905 sprintf (data
, "USE_ABSOLUTE_LITERALS=%d\nABI=%d\n",
8906 XSHAL_USE_ABSOLUTE_LITERALS
, XSHAL_ABI
);
8907 sz
= strlen (data
) + 1;
8909 /* Add enough null terminators to pad to a word boundary. */
8912 while ((sz
& 3) != 0);
8914 /* Follow the standard note section layout:
8915 First write the length of the name string. */
8917 md_number_to_chars (p
, (valueT
) XTINFO_NAMESZ
, 4);
8919 /* Next comes the length of the "descriptor", i.e., the actual data. */
8921 md_number_to_chars (p
, (valueT
) sz
, 4);
8923 /* Write the note type. */
8925 md_number_to_chars (p
, (valueT
) XTINFO_TYPE
, 4);
8927 /* Write the name field. */
8928 p
= frag_more (XTINFO_NAMESZ
);
8929 memcpy (p
, XTINFO_NAME
, XTINFO_NAMESZ
);
8931 /* Finally, write the descriptor. */
8933 memcpy (p
, data
, sz
);
8939 /* Alignment Functions. */
8942 get_text_align_power (unsigned target_size
)
8944 if (target_size
<= 4)
8947 if (target_size
<= 8)
8950 if (target_size
<= 16)
8953 if (target_size
<= 32)
8956 if (target_size
<= 64)
8959 if (target_size
<= 128)
8962 if (target_size
<= 256)
8965 if (target_size
<= 512)
8968 if (target_size
<= 1024)
8977 get_text_align_max_fill_size (int align_pow
,
8978 bfd_boolean use_nops
,
8979 bfd_boolean use_no_density
)
8982 return (1 << align_pow
);
8984 return 3 * (1 << align_pow
);
8986 return 1 + (1 << align_pow
);
8990 /* Calculate the minimum bytes of fill needed at "address" to align a
8991 target instruction of size "target_size" so that it does not cross a
8992 power-of-two boundary specified by "align_pow". If "use_nops" is FALSE,
8993 the fill can be an arbitrary number of bytes. Otherwise, the space must
8994 be filled by NOP instructions. */
8997 get_text_align_fill_size (addressT address
,
9000 bfd_boolean use_nops
,
9001 bfd_boolean use_no_density
)
9003 addressT alignment
, fill
, fill_limit
, fill_step
;
9004 bfd_boolean skip_one
= FALSE
;
9006 alignment
= (1 << align_pow
);
9007 gas_assert (target_size
> 0 && alignment
>= (addressT
) target_size
);
9011 fill_limit
= alignment
;
9014 else if (!use_no_density
)
9016 /* Combine 2- and 3-byte NOPs to fill anything larger than one. */
9017 fill_limit
= alignment
* 2;
9023 /* Fill with 3-byte NOPs -- can only fill multiples of 3. */
9024 fill_limit
= alignment
* 3;
9028 /* Try all fill sizes until finding one that works. */
9029 for (fill
= 0; fill
< fill_limit
; fill
+= fill_step
)
9031 if (skip_one
&& fill
== 1)
9033 if ((address
+ fill
) >> align_pow
9034 == (address
+ fill
+ target_size
- 1) >> align_pow
)
9043 branch_align_power (segT sec
)
9045 /* If the Xtensa processor has a fetch width of X, and
9046 the section is aligned to at least that boundary, then a branch
9047 target need only fit within that aligned block of memory to avoid
9048 a stall. Otherwise, try to fit branch targets within 4-byte
9049 aligned blocks (which may be insufficient, e.g., if the section
9050 has no alignment, but it's good enough). */
9051 int fetch_align
= get_text_align_power(xtensa_fetch_width
);
9052 int sec_align
= get_recorded_alignment (sec
);
9054 if (sec_align
>= fetch_align
)
9061 /* This will assert if it is not possible. */
9064 get_text_align_nop_count (offsetT fill_size
, bfd_boolean use_no_density
)
9070 gas_assert (fill_size
% 3 == 0);
9071 return (fill_size
/ 3);
9074 gas_assert (fill_size
!= 1); /* Bad argument. */
9076 while (fill_size
> 1)
9079 if (fill_size
== 2 || fill_size
== 4)
9081 fill_size
-= insn_size
;
9084 gas_assert (fill_size
!= 1); /* Bad algorithm. */
9090 get_text_align_nth_nop_size (offsetT fill_size
,
9092 bfd_boolean use_no_density
)
9099 gas_assert (fill_size
!= 1); /* Bad argument. */
9101 while (fill_size
> 1)
9104 if (fill_size
== 2 || fill_size
== 4)
9106 fill_size
-= insn_size
;
9116 /* For the given fragment, find the appropriate address
9117 for it to begin at if we are using NOPs to align it. */
9120 get_noop_aligned_address (fragS
*fragP
, addressT address
)
9122 /* The rule is: get next fragment's FIRST instruction. Find
9123 the smallest number of bytes that need to be added to
9124 ensure that the next fragment's FIRST instruction will fit
9127 E.G., 2 bytes : 0, 1, 2 mod 4
9130 If the FIRST instruction MIGHT be relaxed,
9131 assume that it will become a 3-byte instruction.
9133 Note again here that LOOP instructions are not bundleable,
9134 and this relaxation only applies to LOOP opcodes. */
9137 int first_insn_size
;
9139 addressT pre_opcode_bytes
;
9142 xtensa_opcode opcode
;
9143 bfd_boolean is_loop
;
9145 gas_assert (fragP
->fr_type
== rs_machine_dependent
);
9146 gas_assert (fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
);
9148 /* Find the loop frag. */
9149 first_insn
= next_non_empty_frag (fragP
);
9150 /* Now find the first insn frag. */
9151 first_insn
= next_non_empty_frag (first_insn
);
9153 is_loop
= next_frag_opcode_is_loop (fragP
, &opcode
);
9154 gas_assert (is_loop
);
9155 loop_insn_size
= xg_get_single_size (opcode
);
9157 pre_opcode_bytes
= next_frag_pre_opcode_bytes (fragP
);
9158 pre_opcode_bytes
+= loop_insn_size
;
9160 /* For loops, the alignment depends on the size of the
9161 instruction following the loop, not the LOOP instruction. */
9163 if (first_insn
== NULL
)
9164 first_insn_size
= xtensa_fetch_width
;
9166 first_insn_size
= get_loop_align_size (frag_format_size (first_insn
));
9168 /* If it was 8, then we'll need a larger alignment for the section. */
9169 align_power
= get_text_align_power (first_insn_size
);
9170 record_alignment (now_seg
, align_power
);
9172 fill_size
= get_text_align_fill_size
9173 (address
+ pre_opcode_bytes
, align_power
, first_insn_size
, TRUE
,
9174 fragP
->tc_frag_data
.is_no_density
);
9176 return address
+ fill_size
;
9180 /* 3 mechanisms for relaxing an alignment:
9182 Align to a power of 2.
9183 Align so the next fragment's instruction does not cross a word boundary.
9184 Align the current instruction so that if the next instruction
9185 were 3 bytes, it would not cross a word boundary.
9189 zeros - This is easy; always insert zeros.
9190 nops - 3-byte and 2-byte instructions
9194 >=5 : 3-byte instruction + fn (n-3)
9195 widening - widen previous instructions. */
9198 get_aligned_diff (fragS
*fragP
, addressT address
, offsetT
*max_diff
)
9200 addressT target_address
, loop_insn_offset
;
9202 xtensa_opcode loop_opcode
;
9203 bfd_boolean is_loop
;
9206 offsetT branch_align
;
9209 gas_assert (fragP
->fr_type
== rs_machine_dependent
);
9210 switch (fragP
->fr_subtype
)
9212 case RELAX_DESIRE_ALIGN
:
9213 target_size
= next_frag_format_size (fragP
);
9214 if (target_size
== XTENSA_UNDEFINED
)
9216 align_power
= branch_align_power (now_seg
);
9217 branch_align
= 1 << align_power
;
9218 /* Don't count on the section alignment being as large as the target. */
9219 if (target_size
> branch_align
)
9220 target_size
= branch_align
;
9221 opt_diff
= get_text_align_fill_size (address
, align_power
,
9222 target_size
, FALSE
, FALSE
);
9224 *max_diff
= (opt_diff
+ branch_align
9225 - (target_size
+ ((address
+ opt_diff
) % branch_align
)));
9226 gas_assert (*max_diff
>= opt_diff
);
9229 case RELAX_ALIGN_NEXT_OPCODE
:
9230 /* The next non-empty frag after this one holds the LOOP instruction
9231 that needs to be aligned. The required alignment depends on the
9232 size of the next non-empty frag after the loop frag, i.e., the
9233 first instruction in the loop. */
9234 loop_frag
= next_non_empty_frag (fragP
);
9235 target_size
= get_loop_align_size (next_frag_format_size (loop_frag
));
9236 loop_insn_offset
= 0;
9237 is_loop
= next_frag_opcode_is_loop (fragP
, &loop_opcode
);
9238 gas_assert (is_loop
);
9240 /* If the loop has been expanded then the LOOP instruction
9241 could be at an offset from this fragment. */
9242 if (loop_frag
->tc_frag_data
.slot_subtypes
[0] != RELAX_IMMED
)
9243 loop_insn_offset
= get_expanded_loop_offset (loop_opcode
);
9245 /* In an ideal world, which is what we are shooting for here,
9246 we wouldn't need to use any NOPs immediately prior to the
9247 LOOP instruction. If this approach fails, relax_frag_loop_align
9248 will call get_noop_aligned_address. */
9250 address
+ loop_insn_offset
+ xg_get_single_size (loop_opcode
);
9251 align_power
= get_text_align_power (target_size
);
9252 opt_diff
= get_text_align_fill_size (target_address
, align_power
,
9253 target_size
, FALSE
, FALSE
);
9255 *max_diff
= xtensa_fetch_width
9256 - ((target_address
+ opt_diff
) % xtensa_fetch_width
)
9257 - target_size
+ opt_diff
;
9258 gas_assert (*max_diff
>= opt_diff
);
9269 /* md_relax_frag Hook and Helper Functions. */
9271 static long relax_frag_loop_align (fragS
*, long);
9272 static long relax_frag_for_align (fragS
*, long);
9273 static long relax_frag_immed
9274 (segT
, fragS
*, long, int, xtensa_format
, int, int *, bfd_boolean
);
9276 /* Get projected address for the first fulcrum on a path from source to
9278 static addressT
xg_get_fulcrum (addressT source
, addressT target
)
9280 offsetT delta
= target
- source
;
9283 n
= (labs (delta
) + J_RANGE
- J_MARGIN
- 1) / (J_RANGE
- J_MARGIN
);
9284 return source
+ delta
/ n
;
9287 /* Given trampoline index, source and target of a jump find the best
9288 candidate trampoline for the first fulcrum. The best trampoline is
9289 the one in the reach of "j' instruction from the source, closest to
9290 the projected fulcrum address, and preferrably w/o a jump around or
9291 with already initialized jump around. */
9292 static size_t xg_find_best_trampoline (struct trampoline_index
*idx
,
9293 addressT source
, addressT target
)
9295 addressT fulcrum
= xg_get_fulcrum (source
, target
);
9298 size_t base_tr
= xg_find_trampoline (idx
, fulcrum
);
9301 /* Check trampoline frags around the base_tr to find the best. */
9302 for (dist
= 0; checked
; ++dist
)
9305 size_t tr
= base_tr
- dist
;
9309 /* Trampolines are checked in the following order:
9310 base_tr, base_tr + 1, base_tr - 1, base_tr + 2, base_tr - 2 */
9311 for (i
= 0; i
< 2; ++i
, tr
= base_tr
+ dist
+ 1)
9312 if (tr
< idx
->n_entries
)
9314 fragS
*trampoline_frag
= idx
->entry
[tr
];
9317 /* Don't check trampolines outside source - target interval. */
9318 if ((trampoline_frag
->fr_address
< source
&&
9319 trampoline_frag
->fr_address
< target
) ||
9320 (trampoline_frag
->fr_address
> source
&&
9321 trampoline_frag
->fr_address
> target
))
9324 off
= trampoline_frag
->fr_address
- fulcrum
;
9325 /* Stop if some trampoline is found and the search is more than
9326 J_RANGE / 4 from the projected fulcrum. A trampoline w/o jump
9327 around is nice, but it shouldn't have much overhead. */
9328 if (best
< idx
->n_entries
&& labs (off
) > J_RANGE
/ 4)
9331 off
= trampoline_frag
->fr_address
- source
;
9332 if (labs (off
) < J_RANGE
- J_MARGIN
)
9335 /* Stop if a trampoline w/o jump around is found or initialized
9336 trampoline with jump around is found. */
9337 if (!trampoline_frag
->tc_frag_data
.needs_jump_around
||
9338 trampoline_frag
->fr_fix
)
9340 else if (best
>= idx
->n_entries
)
9346 if (best
< idx
->n_entries
)
9349 as_fatal (_("cannot find suitable trampoline"));
9352 static fixS
*xg_relax_fixup (struct trampoline_index
*idx
, fixS
*fixP
)
9354 symbolS
*s
= fixP
->fx_addsy
;
9355 addressT source
= fixP
->fx_frag
->fr_address
;
9356 addressT target
= S_GET_VALUE (s
) + fixP
->fx_offset
;
9357 size_t tr
= xg_find_best_trampoline (idx
, source
, target
);
9358 fragS
*trampoline_frag
= idx
->entry
[tr
];
9361 init_trampoline_frag (trampoline_frag
);
9362 newfixP
= xg_append_jump (trampoline_frag
,
9363 fixP
->fx_addsy
, fixP
->fx_offset
);
9365 /* Adjust the fixup for the original "j" instruction to
9366 point to the newly added jump. */
9367 fixP
->fx_addsy
= trampoline_frag
->fr_symbol
;
9368 fixP
->fx_offset
= trampoline_frag
->fr_fix
- 3;
9369 fixP
->tc_fix_data
.X_add_symbol
= trampoline_frag
->fr_symbol
;
9370 fixP
->tc_fix_data
.X_add_number
= trampoline_frag
->fr_fix
- 3;
9372 trampoline_frag
->tc_frag_data
.relax_seen
= FALSE
;
9374 if (xg_is_trampoline_frag_full (trampoline_frag
))
9375 xg_remove_trampoline_from_index (idx
, tr
);
9380 static bfd_boolean
xg_is_relaxable_fixup (fixS
*fixP
)
9382 xtensa_isa isa
= xtensa_default_isa
;
9383 addressT addr
= fixP
->fx_frag
->fr_address
;
9386 symbolS
*s
= fixP
->fx_addsy
;
9389 xtensa_opcode opcode
;
9391 if (fixP
->fx_r_type
< BFD_RELOC_XTENSA_SLOT0_OP
||
9392 fixP
->fx_r_type
> BFD_RELOC_XTENSA_SLOT14_OP
)
9395 target
= S_GET_VALUE (s
) + fixP
->fx_offset
;
9396 delta
= target
- addr
;
9398 if (labs (delta
) < J_RANGE
- J_MARGIN
)
9401 xtensa_insnbuf_from_chars (isa
, trampoline_buf
,
9402 (unsigned char *) fixP
->fx_frag
->fr_literal
+
9404 fmt
= xtensa_format_decode (isa
, trampoline_buf
);
9405 gas_assert (fmt
!= XTENSA_UNDEFINED
);
9406 slot
= fixP
->tc_fix_data
.slot
;
9407 xtensa_format_get_slot (isa
, fmt
, slot
, trampoline_buf
, trampoline_slotbuf
);
9408 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, trampoline_slotbuf
);
9409 return opcode
== xtensa_j_opcode
;
9412 static void xg_relax_fixups (struct trampoline_seg
*ts
)
9414 struct trampoline_index
*idx
= &ts
->index
;
9415 segment_info_type
*seginfo
= seg_info (now_seg
);
9418 for (fx
= seginfo
->fix_root
; fx
; fx
= fx
->fx_next
)
9421 struct trampoline_chain
*tc
= NULL
;
9423 if (xg_is_relaxable_fixup (fixP
))
9425 tc
= xg_find_best_eq_target (ts
, fixP
->fx_frag
->fr_address
,
9426 &fixP
->fx_addsy
, &fixP
->fx_offset
);
9428 tc
= xg_create_trampoline_chain (ts
, fixP
->fx_addsy
,
9433 while (xg_is_relaxable_fixup (fixP
))
9435 fixP
= xg_relax_fixup (idx
, fixP
);
9436 xg_add_location_to_chain (tc
, fixP
->fx_frag
->fr_symbol
,
9442 /* Given a trampoline frag relax all jumps that might want to use this
9443 trampoline. Only do real work once per relaxation cycle, when
9444 xg_relax_trampoline is called for the first trampoline in the now_seg.
9445 Don't use stretch, don't update new_stretch: place fulcrums with a
9446 slack to tolerate code movement. In the worst case if a jump between
9447 two trampolines wouldn't reach the next relaxation pass will fix it. */
9448 static void xg_relax_trampoline (fragS
*fragP
, long stretch ATTRIBUTE_UNUSED
,
9449 long *new_stretch ATTRIBUTE_UNUSED
)
9451 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
9453 if (ts
->index
.n_entries
&& ts
->index
.entry
[0] == fragP
)
9454 xg_relax_fixups (ts
);
9457 /* Return the number of bytes added to this fragment, given that the
9458 input has been stretched already by "stretch". */
9461 xtensa_relax_frag (fragS
*fragP
, long stretch
, int *stretched_p
)
9463 xtensa_isa isa
= xtensa_default_isa
;
9464 int unreported
= fragP
->tc_frag_data
.unreported_expansion
;
9465 long new_stretch
= 0;
9466 const char *file_name
;
9469 static xtensa_insnbuf vbuf
= NULL
;
9470 int slot
, num_slots
;
9473 file_name
= as_where (&line
);
9474 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
9476 fragP
->tc_frag_data
.unreported_expansion
= 0;
9478 switch (fragP
->fr_subtype
)
9480 case RELAX_ALIGN_NEXT_OPCODE
:
9481 /* Always convert. */
9482 if (fragP
->tc_frag_data
.relax_seen
)
9483 new_stretch
= relax_frag_loop_align (fragP
, stretch
);
9486 case RELAX_LOOP_END
:
9490 case RELAX_LOOP_END_ADD_NOP
:
9491 /* Add a NOP and switch to .fill 0. */
9492 new_stretch
= relax_frag_add_nop (fragP
);
9496 case RELAX_DESIRE_ALIGN
:
9497 /* Do nothing. The narrowing before this frag will either align
9502 case RELAX_LITERAL_FINAL
:
9505 case RELAX_LITERAL_NR
:
9507 fragP
->fr_subtype
= RELAX_LITERAL_FINAL
;
9508 gas_assert (unreported
== lit_size
);
9509 memset (&fragP
->fr_literal
[fragP
->fr_fix
], 0, 4);
9510 fragP
->fr_var
-= lit_size
;
9511 fragP
->fr_fix
+= lit_size
;
9517 vbuf
= xtensa_insnbuf_alloc (isa
);
9519 xtensa_insnbuf_from_chars
9520 (isa
, vbuf
, (unsigned char *) fragP
->fr_opcode
, 0);
9521 fmt
= xtensa_format_decode (isa
, vbuf
);
9522 num_slots
= xtensa_format_num_slots (isa
, fmt
);
9524 for (slot
= 0; slot
< num_slots
; slot
++)
9526 switch (fragP
->tc_frag_data
.slot_subtypes
[slot
])
9529 if (fragP
->tc_frag_data
.relax_seen
)
9530 new_stretch
+= relax_frag_for_align (fragP
, stretch
);
9534 case RELAX_IMMED_STEP1
:
9535 case RELAX_IMMED_STEP2
:
9536 case RELAX_IMMED_STEP3
:
9537 /* Place the immediate. */
9538 new_stretch
+= relax_frag_immed
9539 (now_seg
, fragP
, stretch
,
9540 fragP
->tc_frag_data
.slot_subtypes
[slot
] - RELAX_IMMED
,
9541 fmt
, slot
, stretched_p
, FALSE
);
9545 /* This is OK; see the note in xg_assemble_vliw_tokens. */
9551 case RELAX_LITERAL_POOL_BEGIN
:
9552 if (fragP
->fr_var
!= 0)
9554 /* We have a converted "candidate" literal pool;
9555 assemble a jump around it. */
9557 if (!litpool_slotbuf
)
9559 litpool_buf
= xtensa_insnbuf_alloc (isa
);
9560 litpool_slotbuf
= xtensa_insnbuf_alloc (isa
);
9563 fragP
->tc_frag_data
.relax_seen
= FALSE
; /* Need another pass. */
9564 fragP
->tc_frag_data
.is_insn
= TRUE
;
9566 insn
.insn_type
= ITYPE_INSN
;
9567 insn
.opcode
= xtensa_j_opcode
;
9569 set_expr_symbol_offset (&insn
.tok
[0], fragP
->fr_symbol
,
9571 fmt
= xg_get_single_format (xtensa_j_opcode
);
9572 tinsn_to_slotbuf (fmt
, 0, &insn
, litpool_slotbuf
);
9573 xtensa_format_set_slot (isa
, fmt
, 0, litpool_buf
, litpool_slotbuf
);
9574 xtensa_insnbuf_to_chars (isa
, litpool_buf
,
9575 (unsigned char *)fragP
->fr_literal
+
9580 fix_new (fragP
, 0, 3, fragP
->fr_symbol
, 0, TRUE
,
9581 BFD_RELOC_XTENSA_SLOT0_OP
);
9585 case RELAX_LITERAL_POOL_END
:
9586 case RELAX_LITERAL_POOL_CANDIDATE_BEGIN
:
9587 case RELAX_MAYBE_UNREACHABLE
:
9588 case RELAX_MAYBE_DESIRE_ALIGN
:
9589 /* No relaxation required. */
9592 case RELAX_FILL_NOP
:
9593 case RELAX_UNREACHABLE
:
9594 if (fragP
->tc_frag_data
.relax_seen
)
9595 new_stretch
+= relax_frag_for_align (fragP
, stretch
);
9598 case RELAX_TRAMPOLINE
:
9599 if (fragP
->tc_frag_data
.relax_seen
)
9600 xg_relax_trampoline (fragP
, stretch
, &new_stretch
);
9604 as_bad (_("bad relaxation state"));
9607 /* Tell gas we need another relaxation pass. */
9608 if (! fragP
->tc_frag_data
.relax_seen
)
9610 fragP
->tc_frag_data
.relax_seen
= TRUE
;
9614 new_logical_line (file_name
, line
);
9620 relax_frag_loop_align (fragS
*fragP
, long stretch
)
9622 addressT old_address
, old_next_address
, old_size
;
9623 addressT new_address
, new_next_address
, new_size
;
9626 /* All the frags with relax_frag_for_alignment prior to this one in the
9627 section have been done, hopefully eliminating the need for a NOP here.
9628 But, this will put it in if necessary. */
9630 /* Calculate the old address of this fragment and the next fragment. */
9631 old_address
= fragP
->fr_address
- stretch
;
9632 old_next_address
= (fragP
->fr_address
- stretch
+ fragP
->fr_fix
+
9633 fragP
->tc_frag_data
.text_expansion
[0]);
9634 old_size
= old_next_address
- old_address
;
9636 /* Calculate the new address of this fragment and the next fragment. */
9637 new_address
= fragP
->fr_address
;
9639 get_noop_aligned_address (fragP
, fragP
->fr_address
+ fragP
->fr_fix
);
9640 new_size
= new_next_address
- new_address
;
9642 growth
= new_size
- old_size
;
9644 /* Fix up the text_expansion field and return the new growth. */
9645 fragP
->tc_frag_data
.text_expansion
[0] += growth
;
9650 /* Add a NOP instruction. */
9653 relax_frag_add_nop (fragS
*fragP
)
9655 char *nop_buf
= fragP
->fr_literal
+ fragP
->fr_fix
;
9656 int length
= fragP
->tc_frag_data
.is_no_density
? 3 : 2;
9657 assemble_nop (length
, nop_buf
);
9658 fragP
->tc_frag_data
.is_insn
= TRUE
;
9660 if (fragP
->fr_var
< length
)
9662 as_fatal (_("fr_var (%ld) < length (%d)"), (long) fragP
->fr_var
, length
);
9666 fragP
->fr_fix
+= length
;
9667 fragP
->fr_var
-= length
;
9672 static long future_alignment_required (fragS
*, long);
9675 relax_frag_for_align (fragS
*fragP
, long stretch
)
9677 /* Overview of the relaxation procedure for alignment:
9678 We can widen with NOPs or by widening instructions or by filling
9679 bytes after jump instructions. Find the opportune places and widen
9680 them if necessary. */
9685 gas_assert (fragP
->fr_subtype
== RELAX_FILL_NOP
9686 || fragP
->fr_subtype
== RELAX_UNREACHABLE
9687 || (fragP
->fr_subtype
== RELAX_SLOTS
9688 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
));
9690 stretch_me
= future_alignment_required (fragP
, stretch
);
9691 diff
= stretch_me
- fragP
->tc_frag_data
.text_expansion
[0];
9697 /* We expanded on a previous pass. Can we shrink now? */
9698 long shrink
= fragP
->tc_frag_data
.text_expansion
[0] - stretch_me
;
9699 if (shrink
<= stretch
&& stretch
> 0)
9701 fragP
->tc_frag_data
.text_expansion
[0] = stretch_me
;
9707 /* Below here, diff > 0. */
9708 fragP
->tc_frag_data
.text_expansion
[0] = stretch_me
;
9714 /* Return the address of the next frag that should be aligned.
9716 By "address" we mean the address it _would_ be at if there
9717 is no action taken to align it between here and the target frag.
9718 In other words, if no narrows and no fill nops are used between
9719 here and the frag to align, _even_if_ some of the frags we use
9720 to align targets have already expanded on a previous relaxation
9723 Also, count each frag that may be used to help align the target.
9725 Return 0 if there are no frags left in the chain that need to be
9729 find_address_of_next_align_frag (fragS
**fragPP
,
9733 bfd_boolean
*paddable
)
9735 fragS
*fragP
= *fragPP
;
9736 addressT address
= fragP
->fr_address
;
9738 /* Do not reset the counts to 0. */
9742 /* Limit this to a small search. */
9743 if (*widens
>= (int) xtensa_fetch_width
)
9748 address
+= fragP
->fr_fix
;
9750 if (fragP
->fr_type
== rs_fill
)
9751 address
+= fragP
->fr_offset
* fragP
->fr_var
;
9752 else if (fragP
->fr_type
== rs_machine_dependent
)
9754 switch (fragP
->fr_subtype
)
9756 case RELAX_UNREACHABLE
:
9760 case RELAX_FILL_NOP
:
9762 if (!fragP
->tc_frag_data
.is_no_density
)
9767 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
9772 address
+= total_frag_text_expansion (fragP
);
9776 address
+= fragP
->tc_frag_data
.text_expansion
[0];
9779 case RELAX_ALIGN_NEXT_OPCODE
:
9780 case RELAX_DESIRE_ALIGN
:
9784 case RELAX_MAYBE_UNREACHABLE
:
9785 case RELAX_MAYBE_DESIRE_ALIGN
:
9790 /* Just punt if we don't know the type. */
9797 /* Just punt if we don't know the type. */
9801 fragP
= fragP
->fr_next
;
9809 static long bytes_to_stretch (fragS
*, int, int, int, int);
9812 future_alignment_required (fragS
*fragP
, long stretch ATTRIBUTE_UNUSED
)
9814 fragS
*this_frag
= fragP
;
9818 int narrow_nops
= 0;
9819 bfd_boolean paddable
= FALSE
;
9820 offsetT local_opt_diff
;
9823 int stretch_amount
= 0;
9824 int local_stretch_amount
;
9825 int global_stretch_amount
;
9827 address
= find_address_of_next_align_frag
9828 (&fragP
, &wide_nops
, &narrow_nops
, &num_widens
, &paddable
);
9832 if (this_frag
->tc_frag_data
.is_aligning_branch
)
9833 this_frag
->tc_frag_data
.slot_subtypes
[0] = RELAX_IMMED
;
9835 frag_wane (this_frag
);
9839 local_opt_diff
= get_aligned_diff (fragP
, address
, &max_diff
);
9840 opt_diff
= local_opt_diff
;
9841 gas_assert (opt_diff
>= 0);
9842 gas_assert (max_diff
>= opt_diff
);
9847 fragP
= fragP
->fr_next
;
9849 while (fragP
&& opt_diff
< max_diff
&& address
)
9851 /* We only use these to determine if we can exit early
9852 because there will be plenty of ways to align future
9854 int glob_widens
= 0;
9857 bfd_boolean glob_pad
= 0;
9858 address
= find_address_of_next_align_frag
9859 (&fragP
, &glob_widens
, &dnn
, &dw
, &glob_pad
);
9860 /* If there is a padable portion, then skip. */
9861 if (glob_pad
|| glob_widens
>= (1 << branch_align_power (now_seg
)))
9866 offsetT next_m_diff
;
9867 offsetT next_o_diff
;
9869 /* Downrange frags haven't had stretch added to them yet. */
9872 /* The address also includes any text expansion from this
9873 frag in a previous pass, but we don't want that. */
9874 address
-= this_frag
->tc_frag_data
.text_expansion
[0];
9876 /* Assume we are going to move at least opt_diff. In
9877 reality, we might not be able to, but assuming that
9878 we will helps catch cases where moving opt_diff pushes
9879 the next target from aligned to unaligned. */
9880 address
+= opt_diff
;
9882 next_o_diff
= get_aligned_diff (fragP
, address
, &next_m_diff
);
9884 /* Now cleanup for the adjustments to address. */
9885 next_o_diff
+= opt_diff
;
9886 next_m_diff
+= opt_diff
;
9887 if (next_o_diff
<= max_diff
&& next_o_diff
> opt_diff
)
9888 opt_diff
= next_o_diff
;
9889 if (next_m_diff
< max_diff
)
9890 max_diff
= next_m_diff
;
9891 fragP
= fragP
->fr_next
;
9895 /* If there are enough wideners in between, do it. */
9898 if (this_frag
->fr_subtype
== RELAX_UNREACHABLE
)
9900 gas_assert (opt_diff
<= (signed) xtensa_fetch_width
);
9905 local_stretch_amount
9906 = bytes_to_stretch (this_frag
, wide_nops
, narrow_nops
,
9907 num_widens
, local_opt_diff
);
9908 global_stretch_amount
9909 = bytes_to_stretch (this_frag
, wide_nops
, narrow_nops
,
9910 num_widens
, opt_diff
);
9911 /* If the condition below is true, then the frag couldn't
9912 stretch the correct amount for the global case, so we just
9913 optimize locally. We'll rely on the subsequent frags to get
9914 the correct alignment in the global case. */
9915 if (global_stretch_amount
< local_stretch_amount
)
9916 stretch_amount
= local_stretch_amount
;
9918 stretch_amount
= global_stretch_amount
;
9920 if (this_frag
->fr_subtype
== RELAX_SLOTS
9921 && this_frag
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
9922 gas_assert (stretch_amount
<= 1);
9923 else if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9925 if (this_frag
->tc_frag_data
.is_no_density
)
9926 gas_assert (stretch_amount
== 3 || stretch_amount
== 0);
9928 gas_assert (stretch_amount
<= 3);
9931 return stretch_amount
;
9935 /* The idea: widen everything you can to get a target or loop aligned,
9936 then start using NOPs.
9938 wide_nops = the number of wide NOPs available for aligning
9939 narrow_nops = the number of narrow NOPs available for aligning
9940 (a subset of wide_nops)
9941 widens = the number of narrow instructions that should be widened
9946 bytes_to_stretch (fragS
*this_frag
,
9955 int bytes_short
= desired_diff
- num_widens
;
9957 gas_assert (desired_diff
>= 0
9958 && desired_diff
< (signed) xtensa_fetch_width
);
9959 if (desired_diff
== 0)
9962 gas_assert (wide_nops
> 0 || num_widens
> 0);
9964 /* Always prefer widening to NOP-filling. */
9965 if (bytes_short
< 0)
9967 /* There are enough RELAX_NARROW frags after this one
9968 to align the target without widening this frag in any way. */
9972 if (bytes_short
== 0)
9974 /* Widen every narrow between here and the align target
9975 and the align target will be properly aligned. */
9976 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9982 /* From here we will need at least one NOP to get an alignment.
9983 However, we may not be able to align at all, in which case,
9985 nops_needed
= desired_diff
/ 3;
9987 /* If there aren't enough nops, don't widen. */
9988 if (nops_needed
> wide_nops
)
9991 /* First try it with all wide nops. */
9992 nop_bytes
= nops_needed
* 3;
9993 extra_bytes
= desired_diff
- nop_bytes
;
9995 if (nop_bytes
+ num_widens
>= desired_diff
)
9997 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9999 else if (num_widens
== extra_bytes
)
10004 /* Add a narrow nop. */
10008 if (narrow_nops
== 0 || nops_needed
> wide_nops
)
10011 if (nop_bytes
+ num_widens
>= desired_diff
&& extra_bytes
>= 0)
10013 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
10014 return !this_frag
->tc_frag_data
.is_no_density
? 2 : 3;
10015 else if (num_widens
== extra_bytes
)
10020 /* Replace a wide nop with a narrow nop--we can get here if
10021 extra_bytes was negative in the previous conditional. */
10022 if (narrow_nops
== 1)
10026 if (nop_bytes
+ num_widens
>= desired_diff
)
10028 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
10029 return !this_frag
->tc_frag_data
.is_no_density
? 2 : 3;
10030 else if (num_widens
== extra_bytes
)
10035 /* If we can't satisfy any of the above cases, then we can't align
10036 using padding or fill nops. */
10042 xg_find_best_trampoline_for_tinsn (TInsn
*tinsn
, fragS
*fragP
)
10044 symbolS
*sym
= tinsn
->tok
[0].X_add_symbol
;
10045 addressT source
= fragP
->fr_address
;
10046 addressT target
= S_GET_VALUE (sym
) + tinsn
->tok
[0].X_add_number
;
10047 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
10050 if (!ts
|| !ts
->index
.n_entries
)
10053 i
= xg_find_best_trampoline (&ts
->index
, source
, target
);
10055 return ts
->index
.entry
[i
];
10059 /* Append jump to sym + offset to the end of the trampoline frag fragP.
10060 Adjust fragP's jump around if it's present. Adjust fragP's fr_fix/fr_var
10061 and finish the frag if it's full (but don't remove it from the trampoline
10062 frag index). Return fixup for the newly created jump. */
10063 static fixS
*xg_append_jump (fragS
*fragP
, symbolS
*sym
, offsetT offset
)
10068 xtensa_isa isa
= xtensa_default_isa
;
10070 gas_assert (fragP
->fr_var
>= 3);
10071 tinsn_init (&insn
);
10072 insn
.insn_type
= ITYPE_INSN
;
10073 insn
.opcode
= xtensa_j_opcode
;
10075 set_expr_symbol_offset (&insn
.tok
[0], sym
, offset
);
10076 fmt
= xg_get_single_format (xtensa_j_opcode
);
10077 tinsn_to_slotbuf (fmt
, 0, &insn
, trampoline_slotbuf
);
10078 xtensa_format_set_slot (isa
, fmt
, 0, trampoline_buf
, trampoline_slotbuf
);
10079 xtensa_insnbuf_to_chars (isa
, trampoline_buf
,
10080 (unsigned char *)fragP
->fr_literal
+ fragP
->fr_fix
, 3);
10081 fixP
= fix_new (fragP
, fragP
->fr_fix
, 3, sym
, offset
, TRUE
,
10082 BFD_RELOC_XTENSA_SLOT0_OP
);
10083 fixP
->tc_fix_data
.slot
= 0;
10085 fragP
->fr_fix
+= 3;
10086 fragP
->fr_var
-= 3;
10088 /* Adjust the jump around this trampoline (if present). */
10089 if (fragP
->tc_frag_data
.jump_around_fix
)
10090 fragP
->tc_frag_data
.jump_around_fix
->fx_offset
+= 3;
10092 /* Do we have room for more? */
10093 if (xg_is_trampoline_frag_full (fragP
))
10096 fragP
->fr_subtype
= 0;
10104 init_trampoline_frag (fragS
*fp
)
10108 if (fp
->fr_fix
== 0)
10111 char label
[10 + 2 * sizeof(fp
)];
10113 sprintf (label
, ".L0_TR_%p", fp
);
10114 lsym
= (symbolS
*)local_symbol_make (label
, now_seg
, 0, fp
);
10115 fp
->fr_symbol
= lsym
;
10116 if (fp
->tc_frag_data
.needs_jump_around
)
10118 fp
->tc_frag_data
.jump_around_fix
= xg_append_jump (fp
, lsym
, 3);
10126 xg_get_single_symbol_slot (fragS
*fragP
)
10131 for (i
= 0; i
< MAX_SLOTS
; ++i
)
10132 if (fragP
->tc_frag_data
.slot_symbols
[i
])
10134 gas_assert (slot
== -1);
10138 gas_assert (slot
>= 0 && slot
< MAX_SLOTS
);
10144 add_jump_to_trampoline (fragS
*tramp
, fragS
*origfrag
)
10146 int slot
= xg_get_single_symbol_slot (origfrag
);
10149 /* Assemble a jump to the target label in the trampoline frag. */
10150 fixP
= xg_append_jump (tramp
,
10151 origfrag
->tc_frag_data
.slot_symbols
[slot
],
10152 origfrag
->tc_frag_data
.slot_offsets
[slot
]);
10154 /* Modify the original j to point here. */
10155 origfrag
->tc_frag_data
.slot_symbols
[slot
] = tramp
->fr_symbol
;
10156 origfrag
->tc_frag_data
.slot_offsets
[slot
] = tramp
->fr_fix
- 3;
10158 /* If trampoline is full, remove it from the list. */
10159 if (xg_is_trampoline_frag_full (tramp
))
10161 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
10162 size_t tr
= xg_find_trampoline (&ts
->index
, tramp
->fr_address
);
10164 gas_assert (ts
->index
.entry
[tr
] == tramp
);
10165 xg_remove_trampoline_from_index (&ts
->index
, tr
);
10173 relax_frag_immed (segT segP
,
10180 bfd_boolean estimate_only
)
10184 bfd_boolean negatable_branch
= FALSE
;
10185 bfd_boolean branch_jmp_to_next
= FALSE
;
10186 bfd_boolean from_wide_insn
= FALSE
;
10187 xtensa_isa isa
= xtensa_default_isa
;
10189 offsetT frag_offset
;
10191 int num_text_bytes
, num_literal_bytes
;
10192 int literal_diff
, total_text_diff
, this_text_diff
;
10194 gas_assert (fragP
->fr_opcode
!= NULL
);
10196 xg_clear_vinsn (&cur_vinsn
);
10197 vinsn_from_chars (&cur_vinsn
, fragP
->fr_opcode
);
10198 if (cur_vinsn
.num_slots
> 1)
10199 from_wide_insn
= TRUE
;
10201 tinsn
= cur_vinsn
.slots
[slot
];
10202 tinsn_immed_from_frag (&tinsn
, fragP
, slot
);
10204 if (estimate_only
&& xtensa_opcode_is_loop (isa
, tinsn
.opcode
) == 1)
10207 if (workaround_b_j_loop_end
&& ! fragP
->tc_frag_data
.is_no_transform
)
10208 branch_jmp_to_next
= is_branch_jmp_to_next (&tinsn
, fragP
);
10210 negatable_branch
= (xtensa_opcode_is_branch (isa
, tinsn
.opcode
) == 1);
10212 old_size
= xtensa_format_length (isa
, fmt
);
10214 /* Special case: replace a branch to the next instruction with a NOP.
10215 This is required to work around a hardware bug in T1040.0 and also
10216 serves as an optimization. */
10218 if (branch_jmp_to_next
10219 && ((old_size
== 2) || (old_size
== 3))
10220 && !next_frag_is_loop_target (fragP
))
10223 /* Here is the fun stuff: Get the immediate field from this
10224 instruction. If it fits, we are done. If not, find the next
10225 instruction sequence that fits. */
10227 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
10228 istack_init (&istack
);
10229 num_steps
= xg_assembly_relax (&istack
, &tinsn
, segP
, fragP
, frag_offset
,
10230 min_steps
, stretch
);
10231 gas_assert (num_steps
>= min_steps
&& num_steps
<= RELAX_IMMED_MAXSTEPS
);
10233 fragP
->tc_frag_data
.slot_subtypes
[slot
] = (int) RELAX_IMMED
+ num_steps
;
10235 /* Figure out the number of bytes needed. */
10236 num_literal_bytes
= get_num_stack_literal_bytes (&istack
);
10238 = num_literal_bytes
- fragP
->tc_frag_data
.literal_expansion
[slot
];
10239 num_text_bytes
= get_num_stack_text_bytes (&istack
);
10241 if (from_wide_insn
)
10244 while (istack
.insn
[first
].opcode
== XTENSA_UNDEFINED
)
10247 num_text_bytes
+= old_size
;
10248 if (opcode_fits_format_slot (istack
.insn
[first
].opcode
, fmt
, slot
))
10249 num_text_bytes
-= xg_get_single_size (istack
.insn
[first
].opcode
);
10252 /* The first instruction in the relaxed sequence will go after
10253 the current wide instruction, and thus its symbolic immediates
10256 istack_init (&istack
);
10257 num_steps
= xg_assembly_relax (&istack
, &tinsn
, segP
, fragP
,
10258 frag_offset
+ old_size
,
10259 min_steps
, stretch
+ old_size
);
10260 gas_assert (num_steps
>= min_steps
&& num_steps
<= RELAX_IMMED_MAXSTEPS
);
10262 fragP
->tc_frag_data
.slot_subtypes
[slot
]
10263 = (int) RELAX_IMMED
+ num_steps
;
10265 num_literal_bytes
= get_num_stack_literal_bytes (&istack
);
10267 = num_literal_bytes
- fragP
->tc_frag_data
.literal_expansion
[slot
];
10269 num_text_bytes
= get_num_stack_text_bytes (&istack
) + old_size
;
10273 total_text_diff
= num_text_bytes
- old_size
;
10274 this_text_diff
= total_text_diff
- fragP
->tc_frag_data
.text_expansion
[slot
];
10276 /* It MUST get larger. If not, we could get an infinite loop. */
10277 gas_assert (num_text_bytes
>= 0);
10278 gas_assert (literal_diff
>= 0);
10279 gas_assert (total_text_diff
>= 0);
10281 fragP
->tc_frag_data
.text_expansion
[slot
] = total_text_diff
;
10282 fragP
->tc_frag_data
.literal_expansion
[slot
] = num_literal_bytes
;
10283 gas_assert (fragP
->tc_frag_data
.text_expansion
[slot
] >= 0);
10284 gas_assert (fragP
->tc_frag_data
.literal_expansion
[slot
] >= 0);
10286 /* Find the associated expandable literal for this. */
10287 if (literal_diff
!= 0)
10289 fragS
*lit_fragP
= fragP
->tc_frag_data
.literal_frags
[slot
];
10292 gas_assert (literal_diff
== 4);
10293 lit_fragP
->tc_frag_data
.unreported_expansion
+= literal_diff
;
10295 /* We expect that the literal section state has NOT been
10297 gas_assert (lit_fragP
->fr_type
== rs_machine_dependent
10298 && lit_fragP
->fr_subtype
== RELAX_LITERAL
);
10299 lit_fragP
->fr_subtype
= RELAX_LITERAL_NR
;
10301 /* We need to mark this section for another iteration
10307 if (negatable_branch
&& istack
.ninsn
> 1)
10308 update_next_frag_state (fragP
);
10310 /* If last insn is a jump, and it cannot reach its target, try to find a trampoline. */
10311 if (istack
.ninsn
> 2 &&
10312 istack
.insn
[istack
.ninsn
- 1].insn_type
== ITYPE_LABEL
&&
10313 istack
.insn
[istack
.ninsn
- 2].insn_type
== ITYPE_INSN
&&
10314 istack
.insn
[istack
.ninsn
- 2].opcode
== xtensa_j_opcode
)
10316 TInsn
*jinsn
= &istack
.insn
[istack
.ninsn
- 2];
10317 struct trampoline_seg
*ts
= find_trampoline_seg (segP
);
10318 struct trampoline_chain
*tc
= NULL
;
10321 !xg_symbolic_immeds_fit (jinsn
, segP
, fragP
, fragP
->fr_offset
,
10324 int s
= xg_get_single_symbol_slot (fragP
);
10325 addressT offset
= fragP
->tc_frag_data
.slot_offsets
[s
];
10327 tc
= xg_find_best_eq_target (ts
, fragP
->fr_address
,
10328 &fragP
->tc_frag_data
.slot_symbols
[s
],
10332 tc
= xg_create_trampoline_chain (ts
,
10333 fragP
->tc_frag_data
.slot_symbols
[s
],
10335 fragP
->tc_frag_data
.slot_offsets
[s
] = offset
;
10336 tinsn_immed_from_frag (jinsn
, fragP
, s
);
10339 if (!xg_symbolic_immeds_fit (jinsn
, segP
, fragP
, fragP
->fr_offset
,
10342 fragS
*tf
= xg_find_best_trampoline_for_tinsn (jinsn
, fragP
);
10348 this_text_diff
+= init_trampoline_frag (tf
) + 3;
10349 fixP
= add_jump_to_trampoline (tf
, fragP
);
10350 xg_add_location_to_chain (tc
, fixP
->fx_frag
->fr_symbol
,
10352 fragP
->tc_frag_data
.relax_seen
= FALSE
;
10356 /* If target symbol is undefined, assume it will reach once linked. */
10357 expressionS
*exp
= &istack
.insn
[istack
.ninsn
- 2].tok
[0];
10359 if (exp
->X_op
== O_symbol
&& S_IS_DEFINED (exp
->X_add_symbol
))
10361 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
10362 _("jump target out of range; no usable trampoline found"));
10368 return this_text_diff
;
10372 /* md_convert_frag Hook and Helper Functions. */
10374 static void convert_frag_align_next_opcode (fragS
*);
10375 static void convert_frag_narrow (segT
, fragS
*, xtensa_format
, int);
10376 static void convert_frag_fill_nop (fragS
*);
10377 static void convert_frag_immed (segT
, fragS
*, int, xtensa_format
, int);
10380 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, fragS
*fragp
)
10382 static xtensa_insnbuf vbuf
= NULL
;
10383 xtensa_isa isa
= xtensa_default_isa
;
10387 const char *file_name
;
10390 file_name
= as_where (&line
);
10391 new_logical_line (fragp
->fr_file
, fragp
->fr_line
);
10393 switch (fragp
->fr_subtype
)
10395 case RELAX_ALIGN_NEXT_OPCODE
:
10396 /* Always convert. */
10397 convert_frag_align_next_opcode (fragp
);
10400 case RELAX_DESIRE_ALIGN
:
10401 /* Do nothing. If not aligned already, too bad. */
10404 case RELAX_LITERAL
:
10405 case RELAX_LITERAL_FINAL
:
10410 vbuf
= xtensa_insnbuf_alloc (isa
);
10412 xtensa_insnbuf_from_chars
10413 (isa
, vbuf
, (unsigned char *) fragp
->fr_opcode
, 0);
10414 fmt
= xtensa_format_decode (isa
, vbuf
);
10415 num_slots
= xtensa_format_num_slots (isa
, fmt
);
10417 for (slot
= 0; slot
< num_slots
; slot
++)
10419 switch (fragp
->tc_frag_data
.slot_subtypes
[slot
])
10422 convert_frag_narrow (sec
, fragp
, fmt
, slot
);
10426 case RELAX_IMMED_STEP1
:
10427 case RELAX_IMMED_STEP2
:
10428 case RELAX_IMMED_STEP3
:
10429 /* Place the immediate. */
10432 fragp
->tc_frag_data
.slot_subtypes
[slot
] - RELAX_IMMED
,
10437 /* This is OK because some slots could have
10438 relaxations and others have none. */
10444 case RELAX_UNREACHABLE
:
10445 memset (&fragp
->fr_literal
[fragp
->fr_fix
], 0, fragp
->fr_var
);
10446 fragp
->fr_fix
+= fragp
->tc_frag_data
.text_expansion
[0];
10447 fragp
->fr_var
-= fragp
->tc_frag_data
.text_expansion
[0];
10451 case RELAX_MAYBE_UNREACHABLE
:
10452 case RELAX_MAYBE_DESIRE_ALIGN
:
10456 case RELAX_FILL_NOP
:
10457 convert_frag_fill_nop (fragp
);
10460 case RELAX_LITERAL_NR
:
10461 if (use_literal_section
)
10463 /* This should have been handled during relaxation. When
10464 relaxing a code segment, literals sometimes need to be
10465 added to the corresponding literal segment. If that
10466 literal segment has already been relaxed, then we end up
10467 in this situation. Marking the literal segments as data
10468 would make this happen less often (since GAS always relaxes
10469 code before data), but we could still get into trouble if
10470 there are instructions in a segment that is not marked as
10471 containing code. Until we can implement a better solution,
10472 cheat and adjust the addresses of all the following frags.
10473 This could break subsequent alignments, but the linker's
10474 literal coalescing will do that anyway. */
10477 fragp
->fr_subtype
= RELAX_LITERAL_FINAL
;
10478 gas_assert (fragp
->tc_frag_data
.unreported_expansion
== 4);
10479 memset (&fragp
->fr_literal
[fragp
->fr_fix
], 0, 4);
10480 fragp
->fr_var
-= 4;
10481 fragp
->fr_fix
+= 4;
10482 for (f
= fragp
->fr_next
; f
; f
= f
->fr_next
)
10483 f
->fr_address
+= 4;
10486 as_bad (_("invalid relaxation fragment result"));
10489 case RELAX_TRAMPOLINE
:
10494 new_logical_line (file_name
, line
);
10499 convert_frag_align_next_opcode (fragS
*fragp
)
10501 char *nop_buf
; /* Location for Writing. */
10502 bfd_boolean use_no_density
= fragp
->tc_frag_data
.is_no_density
;
10503 addressT aligned_address
;
10505 int nop
, nop_count
;
10507 aligned_address
= get_noop_aligned_address (fragp
, fragp
->fr_address
+
10509 fill_size
= aligned_address
- (fragp
->fr_address
+ fragp
->fr_fix
);
10510 nop_count
= get_text_align_nop_count (fill_size
, use_no_density
);
10511 nop_buf
= fragp
->fr_literal
+ fragp
->fr_fix
;
10513 for (nop
= 0; nop
< nop_count
; nop
++)
10516 nop_size
= get_text_align_nth_nop_size (fill_size
, nop
, use_no_density
);
10518 assemble_nop (nop_size
, nop_buf
);
10519 nop_buf
+= nop_size
;
10522 fragp
->fr_fix
+= fill_size
;
10523 fragp
->fr_var
-= fill_size
;
10528 convert_frag_narrow (segT segP
, fragS
*fragP
, xtensa_format fmt
, int slot
)
10530 TInsn tinsn
, single_target
;
10531 int size
, old_size
, diff
;
10532 offsetT frag_offset
;
10534 gas_assert (slot
== 0);
10535 tinsn_from_chars (&tinsn
, fragP
->fr_opcode
, 0);
10537 if (fragP
->tc_frag_data
.is_aligning_branch
== 1)
10539 gas_assert (fragP
->tc_frag_data
.text_expansion
[0] == 1
10540 || fragP
->tc_frag_data
.text_expansion
[0] == 0);
10541 convert_frag_immed (segP
, fragP
, fragP
->tc_frag_data
.text_expansion
[0],
10546 if (fragP
->tc_frag_data
.text_expansion
[0] == 0)
10548 /* No conversion. */
10553 gas_assert (fragP
->fr_opcode
!= NULL
);
10555 /* Frags in this relaxation state should only contain
10556 single instruction bundles. */
10557 tinsn_immed_from_frag (&tinsn
, fragP
, 0);
10559 /* Just convert it to a wide form.... */
10561 old_size
= xg_get_single_size (tinsn
.opcode
);
10563 tinsn_init (&single_target
);
10564 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
10566 if (! xg_is_single_relaxable_insn (&tinsn
, &single_target
, FALSE
))
10568 as_bad (_("unable to widen instruction"));
10572 size
= xg_get_single_size (single_target
.opcode
);
10573 xg_emit_insn_to_buf (&single_target
, fragP
->fr_opcode
, fragP
,
10574 frag_offset
, TRUE
);
10576 diff
= size
- old_size
;
10577 gas_assert (diff
>= 0);
10578 gas_assert (diff
<= fragP
->fr_var
);
10579 fragP
->fr_var
-= diff
;
10580 fragP
->fr_fix
+= diff
;
10588 convert_frag_fill_nop (fragS
*fragP
)
10590 char *loc
= &fragP
->fr_literal
[fragP
->fr_fix
];
10591 int size
= fragP
->tc_frag_data
.text_expansion
[0];
10592 gas_assert ((unsigned) size
== (fragP
->fr_next
->fr_address
10593 - fragP
->fr_address
- fragP
->fr_fix
));
10596 /* No conversion. */
10600 assemble_nop (size
, loc
);
10601 fragP
->tc_frag_data
.is_insn
= TRUE
;
10602 fragP
->fr_var
-= size
;
10603 fragP
->fr_fix
+= size
;
10608 static fixS
*fix_new_exp_in_seg
10609 (segT
, subsegT
, fragS
*, int, int, expressionS
*, int,
10610 bfd_reloc_code_real_type
);
10611 static void convert_frag_immed_finish_loop (segT
, fragS
*, TInsn
*);
10614 convert_frag_immed (segT segP
,
10620 char *immed_instr
= fragP
->fr_opcode
;
10622 bfd_boolean expanded
= FALSE
;
10623 bfd_boolean branch_jmp_to_next
= FALSE
;
10624 char *fr_opcode
= fragP
->fr_opcode
;
10625 xtensa_isa isa
= xtensa_default_isa
;
10626 bfd_boolean from_wide_insn
= FALSE
;
10628 bfd_boolean is_loop
;
10630 gas_assert (fr_opcode
!= NULL
);
10632 xg_clear_vinsn (&cur_vinsn
);
10634 vinsn_from_chars (&cur_vinsn
, fr_opcode
);
10635 if (cur_vinsn
.num_slots
> 1)
10636 from_wide_insn
= TRUE
;
10638 orig_tinsn
= cur_vinsn
.slots
[slot
];
10639 tinsn_immed_from_frag (&orig_tinsn
, fragP
, slot
);
10641 is_loop
= xtensa_opcode_is_loop (xtensa_default_isa
, orig_tinsn
.opcode
) == 1;
10643 if (workaround_b_j_loop_end
&& ! fragP
->tc_frag_data
.is_no_transform
)
10644 branch_jmp_to_next
= is_branch_jmp_to_next (&orig_tinsn
, fragP
);
10646 if (branch_jmp_to_next
&& !next_frag_is_loop_target (fragP
))
10648 /* Conversion just inserts a NOP and marks the fix as completed. */
10649 bytes
= xtensa_format_length (isa
, fmt
);
10652 cur_vinsn
.slots
[slot
].opcode
=
10653 xtensa_format_slot_nop_opcode (isa
, cur_vinsn
.format
, slot
);
10654 cur_vinsn
.slots
[slot
].ntok
= 0;
10658 bytes
+= fragP
->tc_frag_data
.text_expansion
[0];
10659 gas_assert (bytes
== 2 || bytes
== 3);
10660 build_nop (&cur_vinsn
.slots
[0], bytes
);
10661 fragP
->fr_fix
+= fragP
->tc_frag_data
.text_expansion
[0];
10663 vinsn_to_insnbuf (&cur_vinsn
, fr_opcode
, frag_now
, TRUE
);
10664 xtensa_insnbuf_to_chars
10665 (isa
, cur_vinsn
.insnbuf
, (unsigned char *) fr_opcode
, 0);
10670 /* Here is the fun stuff: Get the immediate field from this
10671 instruction. If it fits, we're done. If not, find the next
10672 instruction sequence that fits. */
10676 symbolS
*lit_sym
= NULL
;
10677 int total_size
= 0;
10678 int target_offset
= 0;
10681 symbolS
*gen_label
= NULL
;
10682 offsetT frag_offset
;
10683 bfd_boolean first
= TRUE
;
10685 /* It does not fit. Find something that does and
10686 convert immediately. */
10687 frag_offset
= fr_opcode
- fragP
->fr_literal
;
10688 istack_init (&istack
);
10689 xg_assembly_relax (&istack
, &orig_tinsn
,
10690 segP
, fragP
, frag_offset
, min_steps
, 0);
10692 old_size
= xtensa_format_length (isa
, fmt
);
10694 /* Assemble this right inline. */
10696 /* First, create the mapping from a label name to the REAL label. */
10698 for (i
= 0; i
< istack
.ninsn
; i
++)
10700 TInsn
*tinsn
= &istack
.insn
[i
];
10703 switch (tinsn
->insn_type
)
10705 case ITYPE_LITERAL
:
10706 if (lit_sym
!= NULL
)
10707 as_bad (_("multiple literals in expansion"));
10708 /* First find the appropriate space in the literal pool. */
10709 lit_frag
= fragP
->tc_frag_data
.literal_frags
[slot
];
10710 if (lit_frag
== NULL
)
10711 as_bad (_("no registered fragment for literal"));
10712 if (tinsn
->ntok
!= 1)
10713 as_bad (_("number of literal tokens != 1"));
10715 /* Set the literal symbol and add a fixup. */
10716 lit_sym
= lit_frag
->fr_symbol
;
10720 if (align_targets
&& !is_loop
)
10722 fragS
*unreach
= fragP
->fr_next
;
10723 while (!(unreach
->fr_type
== rs_machine_dependent
10724 && (unreach
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
10725 || unreach
->fr_subtype
== RELAX_UNREACHABLE
)))
10727 unreach
= unreach
->fr_next
;
10730 gas_assert (unreach
->fr_type
== rs_machine_dependent
10731 && (unreach
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
10732 || unreach
->fr_subtype
== RELAX_UNREACHABLE
));
10734 target_offset
+= unreach
->tc_frag_data
.text_expansion
[0];
10736 gas_assert (gen_label
== NULL
);
10737 gen_label
= symbol_new (FAKE_LABEL_NAME
, now_seg
,
10738 fr_opcode
- fragP
->fr_literal
10739 + target_offset
, fragP
);
10743 if (first
&& from_wide_insn
)
10745 target_offset
+= xtensa_format_length (isa
, fmt
);
10747 if (!opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10748 target_offset
+= xg_get_single_size (tinsn
->opcode
);
10751 target_offset
+= xg_get_single_size (tinsn
->opcode
);
10758 for (i
= 0; i
< istack
.ninsn
; i
++)
10760 TInsn
*tinsn
= &istack
.insn
[i
];
10764 bfd_reloc_code_real_type reloc_type
;
10766 switch (tinsn
->insn_type
)
10768 case ITYPE_LITERAL
:
10769 lit_frag
= fragP
->tc_frag_data
.literal_frags
[slot
];
10770 /* Already checked. */
10771 gas_assert (lit_frag
!= NULL
);
10772 gas_assert (lit_sym
!= NULL
);
10773 gas_assert (tinsn
->ntok
== 1);
10775 target_seg
= S_GET_SEGMENT (lit_sym
);
10776 gas_assert (target_seg
);
10777 reloc_type
= map_operator_to_reloc (tinsn
->tok
[0].X_op
, TRUE
);
10778 fix_new_exp_in_seg (target_seg
, 0, lit_frag
, 0, 4,
10779 &tinsn
->tok
[0], FALSE
, reloc_type
);
10786 xg_resolve_labels (tinsn
, gen_label
);
10787 xg_resolve_literals (tinsn
, lit_sym
);
10788 if (from_wide_insn
&& first
)
10791 if (opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10793 cur_vinsn
.slots
[slot
] = *tinsn
;
10797 cur_vinsn
.slots
[slot
].opcode
=
10798 xtensa_format_slot_nop_opcode (isa
, fmt
, slot
);
10799 cur_vinsn
.slots
[slot
].ntok
= 0;
10801 vinsn_to_insnbuf (&cur_vinsn
, immed_instr
, fragP
, TRUE
);
10802 xtensa_insnbuf_to_chars (isa
, cur_vinsn
.insnbuf
,
10803 (unsigned char *) immed_instr
, 0);
10804 fragP
->tc_frag_data
.is_insn
= TRUE
;
10805 size
= xtensa_format_length (isa
, fmt
);
10806 if (!opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10808 xg_emit_insn_to_buf
10809 (tinsn
, immed_instr
+ size
, fragP
,
10810 immed_instr
- fragP
->fr_literal
+ size
, TRUE
);
10811 size
+= xg_get_single_size (tinsn
->opcode
);
10816 size
= xg_get_single_size (tinsn
->opcode
);
10817 xg_emit_insn_to_buf (tinsn
, immed_instr
, fragP
,
10818 immed_instr
- fragP
->fr_literal
, TRUE
);
10820 immed_instr
+= size
;
10821 total_size
+= size
;
10826 diff
= total_size
- old_size
;
10827 gas_assert (diff
>= 0);
10830 gas_assert (diff
<= fragP
->fr_var
);
10831 fragP
->fr_var
-= diff
;
10832 fragP
->fr_fix
+= diff
;
10835 /* Check for undefined immediates in LOOP instructions. */
10839 sym
= orig_tinsn
.tok
[1].X_add_symbol
;
10840 if (sym
!= NULL
&& !S_IS_DEFINED (sym
))
10842 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym
));
10845 sym
= orig_tinsn
.tok
[1].X_op_symbol
;
10846 if (sym
!= NULL
&& !S_IS_DEFINED (sym
))
10848 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym
));
10853 if (expanded
&& xtensa_opcode_is_loop (isa
, orig_tinsn
.opcode
) == 1)
10854 convert_frag_immed_finish_loop (segP
, fragP
, &orig_tinsn
);
10856 if (expanded
&& is_direct_call_opcode (orig_tinsn
.opcode
))
10858 /* Add an expansion note on the expanded instruction. */
10859 fix_new_exp_in_seg (now_seg
, 0, fragP
, fr_opcode
- fragP
->fr_literal
, 4,
10860 &orig_tinsn
.tok
[0], TRUE
,
10861 BFD_RELOC_XTENSA_ASM_EXPAND
);
10866 /* Add a new fix expression into the desired segment. We have to
10867 switch to that segment to do this. */
10870 fix_new_exp_in_seg (segT new_seg
,
10871 subsegT new_subseg
,
10877 bfd_reloc_code_real_type r_type
)
10880 segT seg
= now_seg
;
10881 subsegT subseg
= now_subseg
;
10883 gas_assert (new_seg
!= 0);
10884 subseg_set (new_seg
, new_subseg
);
10886 new_fix
= fix_new_exp (frag
, where
, size
, exp
, pcrel
, r_type
);
10887 subseg_set (seg
, subseg
);
10892 /* Relax a loop instruction so that it can span loop >256 bytes.
10898 addi as, as, lo8 (label-.L1)
10899 addmi as, as, mid8 (label-.L1)
10910 convert_frag_immed_finish_loop (segT segP
, fragS
*fragP
, TInsn
*tinsn
)
10915 unsigned long target
;
10916 static xtensa_insnbuf insnbuf
= NULL
;
10917 unsigned int loop_length
, loop_length_hi
, loop_length_lo
;
10918 xtensa_isa isa
= xtensa_default_isa
;
10919 addressT loop_offset
;
10920 addressT addi_offset
= 9;
10921 addressT addmi_offset
= 12;
10926 insnbuf
= xtensa_insnbuf_alloc (isa
);
10928 /* Get the loop offset. */
10929 loop_offset
= get_expanded_loop_offset (tinsn
->opcode
);
10931 /* Validate that there really is a LOOP at the loop_offset. Because
10932 loops are not bundleable, we can assume that the instruction will be
10934 tinsn_from_chars (&loop_insn
, fragP
->fr_opcode
+ loop_offset
, 0);
10935 tinsn_immed_from_frag (&loop_insn
, fragP
, 0);
10937 gas_assert (xtensa_opcode_is_loop (isa
, loop_insn
.opcode
) == 1);
10938 addi_offset
+= loop_offset
;
10939 addmi_offset
+= loop_offset
;
10941 gas_assert (tinsn
->ntok
== 2);
10942 if (tinsn
->tok
[1].X_op
== O_constant
)
10943 target
= tinsn
->tok
[1].X_add_number
;
10944 else if (tinsn
->tok
[1].X_op
== O_symbol
)
10946 /* Find the fragment. */
10947 symbolS
*sym
= tinsn
->tok
[1].X_add_symbol
;
10948 gas_assert (S_GET_SEGMENT (sym
) == segP
10949 || S_GET_SEGMENT (sym
) == absolute_section
);
10950 target
= (S_GET_VALUE (sym
) + tinsn
->tok
[1].X_add_number
);
10954 as_bad (_("invalid expression evaluation type %d"), tinsn
->tok
[1].X_op
);
10958 loop_length
= target
- (fragP
->fr_address
+ fragP
->fr_fix
);
10959 loop_length_hi
= loop_length
& ~0x0ff;
10960 loop_length_lo
= loop_length
& 0x0ff;
10961 if (loop_length_lo
>= 128)
10963 loop_length_lo
-= 256;
10964 loop_length_hi
+= 256;
10967 /* Because addmi sign-extends the immediate, 'loop_length_hi' can be at most
10968 32512. If the loop is larger than that, then we just fail. */
10969 if (loop_length_hi
> 32512)
10970 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
10971 _("loop too long for LOOP instruction"));
10973 tinsn_from_chars (&addi_insn
, fragP
->fr_opcode
+ addi_offset
, 0);
10974 gas_assert (addi_insn
.opcode
== xtensa_addi_opcode
);
10976 tinsn_from_chars (&addmi_insn
, fragP
->fr_opcode
+ addmi_offset
, 0);
10977 gas_assert (addmi_insn
.opcode
== xtensa_addmi_opcode
);
10979 set_expr_const (&addi_insn
.tok
[2], loop_length_lo
);
10980 tinsn_to_insnbuf (&addi_insn
, insnbuf
);
10982 fragP
->tc_frag_data
.is_insn
= TRUE
;
10983 xtensa_insnbuf_to_chars
10984 (isa
, insnbuf
, (unsigned char *) fragP
->fr_opcode
+ addi_offset
, 0);
10986 set_expr_const (&addmi_insn
.tok
[2], loop_length_hi
);
10987 tinsn_to_insnbuf (&addmi_insn
, insnbuf
);
10988 xtensa_insnbuf_to_chars
10989 (isa
, insnbuf
, (unsigned char *) fragP
->fr_opcode
+ addmi_offset
, 0);
10991 /* Walk through all of the frags from here to the loop end
10992 and mark them as no_transform to keep them from being modified
10993 by the linker. If we ever have a relocation for the
10994 addi/addmi of the difference of two symbols we can remove this. */
10997 for (next_fragP
= fragP
; next_fragP
!= NULL
;
10998 next_fragP
= next_fragP
->fr_next
)
11000 next_fragP
->tc_frag_data
.is_no_transform
= TRUE
;
11001 if (next_fragP
->tc_frag_data
.is_loop_target
)
11003 if (target_count
== 2)
11009 /* A map that keeps information on a per-subsegment basis. This is
11010 maintained during initial assembly, but is invalid once the
11011 subsegments are smashed together. I.E., it cannot be used during
11014 typedef struct subseg_map_struct
11022 float total_freq
; /* fall-through + branch target frequency */
11023 float target_freq
; /* branch target frequency alone */
11025 struct subseg_map_struct
*next
;
11029 static subseg_map
*sseg_map
= NULL
;
11031 static subseg_map
*
11032 get_subseg_info (segT seg
, subsegT subseg
)
11034 subseg_map
*subseg_e
;
11036 for (subseg_e
= sseg_map
; subseg_e
; subseg_e
= subseg_e
->next
)
11038 if (seg
== subseg_e
->seg
&& subseg
== subseg_e
->subseg
)
11045 static subseg_map
*
11046 add_subseg_info (segT seg
, subsegT subseg
)
11048 subseg_map
*subseg_e
= XNEW (subseg_map
);
11049 memset (subseg_e
, 0, sizeof (subseg_map
));
11050 subseg_e
->seg
= seg
;
11051 subseg_e
->subseg
= subseg
;
11052 subseg_e
->flags
= 0;
11053 /* Start off considering every branch target very important. */
11054 subseg_e
->target_freq
= 1.0;
11055 subseg_e
->total_freq
= 1.0;
11056 subseg_e
->next
= sseg_map
;
11057 sseg_map
= subseg_e
;
11063 get_last_insn_flags (segT seg
, subsegT subseg
)
11065 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11067 return subseg_e
->flags
;
11073 set_last_insn_flags (segT seg
,
11078 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11080 subseg_e
= add_subseg_info (seg
, subseg
);
11082 subseg_e
->flags
|= fl
;
11084 subseg_e
->flags
&= ~fl
;
11089 get_subseg_total_freq (segT seg
, subsegT subseg
)
11091 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11093 return subseg_e
->total_freq
;
11099 get_subseg_target_freq (segT seg
, subsegT subseg
)
11101 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11103 return subseg_e
->target_freq
;
11109 set_subseg_freq (segT seg
, subsegT subseg
, float total_f
, float target_f
)
11111 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11113 subseg_e
= add_subseg_info (seg
, subseg
);
11114 subseg_e
->total_freq
= total_f
;
11115 subseg_e
->target_freq
= target_f
;
11119 /* Segment Lists and emit_state Stuff. */
11122 xtensa_move_seg_list_to_beginning (seg_list
*head
)
11127 segT literal_section
= head
->seg
;
11129 /* Move the literal section to the front of the section list. */
11130 gas_assert (literal_section
);
11131 if (literal_section
!= stdoutput
->sections
)
11133 bfd_section_list_remove (stdoutput
, literal_section
);
11134 bfd_section_list_prepend (stdoutput
, literal_section
);
11141 static void mark_literal_frags (seg_list
*);
11144 xg_promote_candidate_litpool (struct litpool_seg
*lps
,
11145 struct litpool_frag
*lp
)
11150 char label
[10 + 2 * sizeof (fragS
*)];
11152 poolbeg
= lp
->fragP
;
11154 poolbeg
->fr_subtype
= RELAX_LITERAL_POOL_BEGIN
;
11155 poolend
= poolbeg
->fr_next
;
11156 gas_assert (poolend
->fr_type
== rs_machine_dependent
&&
11157 poolend
->fr_subtype
== RELAX_LITERAL_POOL_END
);
11158 /* Create a local symbol pointing to the
11159 end of the pool. */
11160 sprintf (label
, ".L0_LT_%p", poolbeg
);
11161 lsym
= (symbolS
*)local_symbol_make (label
, lps
->seg
,
11163 poolbeg
->fr_symbol
= lsym
;
11164 /* Rest is done in xtensa_relax_frag. */
11168 xtensa_move_literals (void)
11171 frchainS
*frchain_from
, *frchain_to
;
11172 fragS
*search_frag
, *next_frag
, *literal_pool
, *insert_after
;
11173 fragS
**frag_splice
;
11176 fixS
*fix
, *next_fix
, **fix_splice
;
11178 struct litpool_seg
*lps
;
11179 const char *init_name
= INIT_SECTION_NAME
;
11180 const char *fini_name
= FINI_SECTION_NAME
;
11181 int init_name_len
= strlen(init_name
);
11182 int fini_name_len
= strlen(fini_name
);
11184 mark_literal_frags (literal_head
->next
);
11186 if (use_literal_section
)
11189 /* Assign addresses (rough estimates) to the potential literal pool locations
11190 and create new ones if the gaps are too large. */
11192 for (lps
= litpool_seg_list
.next
; lps
; lps
= lps
->next
)
11194 frchainS
*frchP
= seg_info (lps
->seg
)->frchainP
;
11195 struct litpool_frag
*lpf
= lps
->frag_list
.next
;
11198 for ( ; frchP
; frchP
= frchP
->frch_next
)
11201 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
11203 if (lpf
&& fragP
== lpf
->fragP
)
11205 gas_assert(fragP
->fr_type
== rs_machine_dependent
&&
11206 (fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
||
11207 fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
));
11208 /* Found a litpool location. */
11212 if (fragP
->fr_type
== rs_machine_dependent
&&
11213 fragP
->fr_subtype
== RELAX_SLOTS
)
11216 for (slot
= 0; slot
< MAX_SLOTS
; slot
++)
11218 if (fragP
->tc_frag_data
.literal_frags
[slot
])
11220 /* L32R; point its literal to the nearest litpool
11221 preferring non-"candidate" positions to avoid
11222 the jump-around. */
11223 fragS
*litfrag
= fragP
->tc_frag_data
.literal_frags
[slot
];
11224 struct litpool_frag
*lp
= lpf
->prev
;
11229 while (lp
->fragP
->fr_subtype
==
11230 RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
11233 if (lp
->fragP
== NULL
)
11235 /* End of list; have to bite the bullet.
11236 Take the nearest. */
11240 /* Does it (conservatively) reach? */
11241 if (addr
- lp
->addr
<= 128 * 1024)
11243 if (lp
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
)
11245 /* Found a good one. */
11248 else if (lp
->prev
->fragP
&&
11249 addr
- lp
->prev
->addr
> 128 * 1024)
11251 /* This is still a "candidate" but the next one
11252 will be too far away, so revert to the nearest
11253 one, convert it and add the jump around. */
11260 /* Convert candidate and add the jump around. */
11261 if (lp
->fragP
->fr_subtype
==
11262 RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
11263 xg_promote_candidate_litpool (lps
, lp
);
11265 if (! litfrag
->tc_frag_data
.literal_frag
)
11267 /* Take earliest use of this literal to avoid
11269 litfrag
->tc_frag_data
.literal_frag
= lp
->fragP
;
11274 addr
+= fragP
->fr_fix
;
11275 if (fragP
->fr_type
== rs_fill
)
11276 addr
+= fragP
->fr_offset
;
11281 for (segment
= literal_head
->next
; segment
; segment
= segment
->next
)
11283 const char *seg_name
= segment_name (segment
->seg
);
11285 /* Keep the literals for .init and .fini in separate sections. */
11286 if ((!memcmp (seg_name
, init_name
, init_name_len
) &&
11287 !strcmp (seg_name
+ init_name_len
, ".literal")) ||
11288 (!memcmp (seg_name
, fini_name
, fini_name_len
) &&
11289 !strcmp (seg_name
+ fini_name_len
, ".literal")))
11292 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11293 search_frag
= frchain_from
->frch_root
;
11294 literal_pool
= NULL
;
11296 frag_splice
= &(frchain_from
->frch_root
);
11298 while (search_frag
&& !search_frag
->tc_frag_data
.literal_frag
)
11300 gas_assert (search_frag
->fr_fix
== 0
11301 || search_frag
->fr_type
== rs_align
);
11302 search_frag
= search_frag
->fr_next
;
11307 search_frag
= frchain_from
->frch_root
;
11308 as_bad_where (search_frag
->fr_file
, search_frag
->fr_line
,
11309 _("literal pool location required for text-section-literals; specify with .literal_position"));
11313 gas_assert (search_frag
->tc_frag_data
.literal_frag
->fr_subtype
11314 == RELAX_LITERAL_POOL_BEGIN
);
11315 xtensa_switch_section_emit_state (&state
, segment
->seg
, 0);
11317 /* Make sure that all the frags in this series are closed, and
11318 that there is at least one left over of zero-size. This
11319 prevents us from making a segment with an frchain without any
11321 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11322 xtensa_set_frag_assembly_state (frag_now
);
11323 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11324 xtensa_set_frag_assembly_state (frag_now
);
11326 while (search_frag
!= frag_now
)
11328 next_frag
= search_frag
->fr_next
;
11329 if (search_frag
->tc_frag_data
.literal_frag
)
11331 literal_pool
= search_frag
->tc_frag_data
.literal_frag
;
11332 gas_assert (literal_pool
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
);
11333 frchain_to
= literal_pool
->tc_frag_data
.lit_frchain
;
11334 gas_assert (frchain_to
);
11337 if (search_frag
->fr_type
== rs_fill
&& search_frag
->fr_fix
== 0)
11339 /* Skip empty fill frags. */
11340 *frag_splice
= next_frag
;
11341 search_frag
= next_frag
;
11345 if (search_frag
->fr_type
== rs_align
)
11347 /* Skip alignment frags, because the pool as a whole will be
11348 aligned if used, and we don't want to force alignment if the
11350 *frag_splice
= next_frag
;
11351 search_frag
= next_frag
;
11355 /* First, move the frag out of the literal section and
11356 to the appropriate place. */
11358 /* Insert an alignment frag at start of pool. */
11359 if (literal_pool
->fr_next
->fr_type
== rs_machine_dependent
&&
11360 literal_pool
->fr_next
->fr_subtype
== RELAX_LITERAL_POOL_END
)
11362 segT pool_seg
= literal_pool
->fr_next
->tc_frag_data
.lit_seg
;
11363 emit_state prev_state
;
11366 xtensa_switch_section_emit_state (&prev_state
, pool_seg
, 0);
11367 prev_frag
= frag_now
;
11368 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11369 align_frag
= frag_now
;
11370 frag_align (2, 0, 0);
11371 /* Splice it into the right place. */
11372 prev_frag
->fr_next
= align_frag
->fr_next
;
11373 align_frag
->fr_next
= literal_pool
->fr_next
;
11374 literal_pool
->fr_next
= align_frag
;
11375 /* Insert after this one. */
11376 literal_pool
->tc_frag_data
.literal_frag
= align_frag
;
11377 xtensa_restore_emit_state (&prev_state
);
11379 insert_after
= literal_pool
->tc_frag_data
.literal_frag
;
11380 dest_seg
= insert_after
->fr_next
->tc_frag_data
.lit_seg
;
11381 /* Skip align frag. */
11382 if (insert_after
->fr_next
->fr_type
== rs_align
)
11384 insert_after
= insert_after
->fr_next
;
11387 *frag_splice
= next_frag
;
11388 search_frag
->fr_next
= insert_after
->fr_next
;
11389 insert_after
->fr_next
= search_frag
;
11390 search_frag
->tc_frag_data
.lit_seg
= dest_seg
;
11391 literal_pool
->tc_frag_data
.literal_frag
= search_frag
;
11393 /* Now move any fixups associated with this frag to the
11395 fix
= frchain_from
->fix_root
;
11396 fix_splice
= &(frchain_from
->fix_root
);
11399 next_fix
= fix
->fx_next
;
11400 if (fix
->fx_frag
== search_frag
)
11402 *fix_splice
= next_fix
;
11403 fix
->fx_next
= frchain_to
->fix_root
;
11404 frchain_to
->fix_root
= fix
;
11405 if (frchain_to
->fix_tail
== NULL
)
11406 frchain_to
->fix_tail
= fix
;
11409 fix_splice
= &(fix
->fx_next
);
11412 search_frag
= next_frag
;
11415 if (frchain_from
->fix_root
!= NULL
)
11417 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11418 as_warn (_("fixes not all moved from %s"), segment
->seg
->name
);
11420 gas_assert (frchain_from
->fix_root
== NULL
);
11422 frchain_from
->fix_tail
= NULL
;
11423 xtensa_restore_emit_state (&state
);
11426 /* Now fix up the SEGMENT value for all the literal symbols. */
11427 for (lit
= literal_syms
; lit
; lit
= lit
->next
)
11429 symbolS
*lit_sym
= lit
->sym
;
11430 segT dseg
= symbol_get_frag (lit_sym
)->tc_frag_data
.lit_seg
;
11432 S_SET_SEGMENT (lit_sym
, dseg
);
11437 /* Walk over all the frags for segments in a list and mark them as
11438 containing literals. As clunky as this is, we can't rely on frag_var
11439 and frag_variant to get called in all situations. */
11442 mark_literal_frags (seg_list
*segment
)
11444 frchainS
*frchain_from
;
11445 fragS
*search_frag
;
11449 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11450 search_frag
= frchain_from
->frch_root
;
11451 while (search_frag
)
11453 search_frag
->tc_frag_data
.is_literal
= TRUE
;
11454 search_frag
= search_frag
->fr_next
;
11456 segment
= segment
->next
;
11462 xtensa_reorder_seg_list (seg_list
*head
, segT after
)
11464 /* Move all of the sections in the section list to come
11465 after "after" in the gnu segment list. */
11470 segT literal_section
= head
->seg
;
11472 /* Move the literal section after "after". */
11473 gas_assert (literal_section
);
11474 if (literal_section
!= after
)
11476 bfd_section_list_remove (stdoutput
, literal_section
);
11477 bfd_section_list_insert_after (stdoutput
, after
, literal_section
);
11485 /* Push all the literal segments to the end of the gnu list. */
11488 xtensa_reorder_segments (void)
11495 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
11501 /* Now that we have the last section, push all the literal
11502 sections to the end. */
11503 xtensa_reorder_seg_list (literal_head
, last_sec
);
11505 /* Now perform the final error check. */
11506 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
11508 gas_assert (new_count
== old_count
);
11512 /* Change the emit state (seg, subseg, and frag related stuff) to the
11513 correct location. Return a emit_state which can be passed to
11514 xtensa_restore_emit_state to return to current fragment. */
11517 xtensa_switch_to_literal_fragment (emit_state
*result
)
11519 if (directive_state
[directive_absolute_literals
])
11521 segT lit4_seg
= cache_literal_section (TRUE
);
11522 xtensa_switch_section_emit_state (result
, lit4_seg
, 0);
11525 xtensa_switch_to_non_abs_literal_fragment (result
);
11527 /* Do a 4-byte align here. */
11528 frag_align (2, 0, 0);
11529 record_alignment (now_seg
, 2);
11534 xtensa_switch_to_non_abs_literal_fragment (emit_state
*result
)
11536 fragS
*pool_location
= get_literal_pool_location (now_seg
);
11538 bfd_boolean is_init
=
11539 (now_seg
&& !strcmp (segment_name (now_seg
), INIT_SECTION_NAME
));
11540 bfd_boolean is_fini
=
11541 (now_seg
&& !strcmp (segment_name (now_seg
), FINI_SECTION_NAME
));
11543 if (pool_location
== NULL
11544 && !use_literal_section
11545 && !is_init
&& ! is_fini
)
11547 if (!auto_litpools
)
11549 as_bad (_("literal pool location required for text-section-literals; specify with .literal_position"));
11551 xtensa_maybe_create_literal_pool_frag (TRUE
, TRUE
);
11552 pool_location
= get_literal_pool_location (now_seg
);
11555 lit_seg
= cache_literal_section (FALSE
);
11556 xtensa_switch_section_emit_state (result
, lit_seg
, 0);
11558 if (!use_literal_section
11559 && !is_init
&& !is_fini
11560 && get_literal_pool_location (now_seg
) != pool_location
)
11562 /* Close whatever frag is there. */
11563 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11564 xtensa_set_frag_assembly_state (frag_now
);
11565 frag_now
->tc_frag_data
.literal_frag
= pool_location
;
11566 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11567 xtensa_set_frag_assembly_state (frag_now
);
11572 /* Call this function before emitting data into the literal section.
11573 This is a helper function for xtensa_switch_to_literal_fragment.
11574 This is similar to a .section new_now_seg subseg. */
11577 xtensa_switch_section_emit_state (emit_state
*state
,
11579 subsegT new_now_subseg
)
11581 state
->name
= now_seg
->name
;
11582 state
->now_seg
= now_seg
;
11583 state
->now_subseg
= now_subseg
;
11584 state
->generating_literals
= generating_literals
;
11585 generating_literals
++;
11586 subseg_set (new_now_seg
, new_now_subseg
);
11590 /* Use to restore the emitting into the normal place. */
11593 xtensa_restore_emit_state (emit_state
*state
)
11595 generating_literals
= state
->generating_literals
;
11596 subseg_set (state
->now_seg
, state
->now_subseg
);
11600 /* Predicate function used to look up a section in a particular group. */
11603 match_section_group (bfd
*abfd ATTRIBUTE_UNUSED
, asection
*sec
, void *inf
)
11605 const char *gname
= inf
;
11606 const char *group_name
= elf_group_name (sec
);
11608 return (group_name
== gname
11609 || (group_name
!= NULL
11611 && strcmp (group_name
, gname
) == 0));
11615 /* Get the literal section to be used for the current text section.
11616 The result may be cached in the default_lit_sections structure. */
11619 cache_literal_section (bfd_boolean use_abs_literals
)
11621 const char *text_name
, *group_name
= 0;
11622 const char *base_name
, *suffix
;
11625 segT seg
, current_section
;
11626 int current_subsec
;
11627 bfd_boolean linkonce
= FALSE
;
11629 /* Save the current section/subsection. */
11630 current_section
= now_seg
;
11631 current_subsec
= now_subseg
;
11633 /* Clear the cached values if they are no longer valid. */
11634 if (now_seg
!= default_lit_sections
.current_text_seg
)
11636 default_lit_sections
.current_text_seg
= now_seg
;
11637 default_lit_sections
.lit_seg
= NULL
;
11638 default_lit_sections
.lit4_seg
= NULL
;
11641 /* Check if the literal section is already cached. */
11642 if (use_abs_literals
)
11643 pcached
= &default_lit_sections
.lit4_seg
;
11645 pcached
= &default_lit_sections
.lit_seg
;
11650 text_name
= default_lit_sections
.lit_prefix
;
11651 if (! text_name
|| ! *text_name
)
11653 text_name
= segment_name (current_section
);
11654 group_name
= elf_group_name (current_section
);
11655 linkonce
= (current_section
->flags
& SEC_LINK_ONCE
) != 0;
11658 base_name
= use_abs_literals
? ".lit4" : ".literal";
11661 name
= concat (base_name
, ".", group_name
, (char *) NULL
);
11663 else if (strncmp (text_name
, ".gnu.linkonce.", linkonce_len
) == 0)
11665 suffix
= strchr (text_name
+ linkonce_len
, '.');
11667 name
= concat (".gnu.linkonce", base_name
, suffix
? suffix
: "",
11673 /* If the section name begins or ends with ".text", then replace
11674 that portion instead of appending an additional suffix. */
11675 size_t len
= strlen (text_name
);
11677 && (strcmp (text_name
+ len
- 5, ".text") == 0
11678 || strncmp (text_name
, ".text", 5) == 0))
11681 name
= XNEWVEC (char, len
+ strlen (base_name
) + 1);
11682 if (strncmp (text_name
, ".text", 5) == 0)
11684 strcpy (name
, base_name
);
11685 strcat (name
, text_name
+ 5);
11689 strcpy (name
, text_name
);
11690 strcpy (name
+ len
, base_name
);
11694 /* Canonicalize section names to allow renaming literal sections.
11695 The group name, if any, came from the current text section and
11696 has already been canonicalized. */
11697 name
= tc_canonicalize_symbol_name (name
);
11699 seg
= bfd_get_section_by_name_if (stdoutput
, name
, match_section_group
,
11700 (void *) group_name
);
11705 seg
= subseg_force_new (name
, 0);
11707 if (! use_abs_literals
)
11709 /* Add the newly created literal segment to the list. */
11710 seg_list
*n
= XNEW (seg_list
);
11712 n
->next
= literal_head
->next
;
11713 literal_head
->next
= n
;
11716 flags
= (SEC_HAS_CONTENTS
| SEC_READONLY
| SEC_ALLOC
| SEC_LOAD
11717 | (linkonce
? (SEC_LINK_ONCE
| SEC_LINK_DUPLICATES_DISCARD
) : 0)
11718 | (use_abs_literals
? SEC_DATA
: SEC_CODE
));
11720 elf_group_name (seg
) = group_name
;
11722 bfd_set_section_flags (stdoutput
, seg
, flags
);
11723 bfd_set_section_alignment (stdoutput
, seg
, 2);
11727 subseg_set (current_section
, current_subsec
);
11732 /* Property Tables Stuff. */
11734 #define XTENSA_INSN_SEC_NAME ".xt.insn"
11735 #define XTENSA_LIT_SEC_NAME ".xt.lit"
11736 #define XTENSA_PROP_SEC_NAME ".xt.prop"
11738 typedef bfd_boolean (*frag_predicate
) (const fragS
*);
11739 typedef void (*frag_flags_fn
) (const fragS
*, frag_flags
*);
11741 static bfd_boolean
get_frag_is_literal (const fragS
*);
11742 static void xtensa_create_property_segments
11743 (frag_predicate
, frag_predicate
, const char *, xt_section_type
);
11744 static void xtensa_create_xproperty_segments
11745 (frag_flags_fn
, const char *, xt_section_type
);
11746 static bfd_boolean
exclude_section_from_property_tables (segT
);
11747 static bfd_boolean
section_has_property (segT
, frag_predicate
);
11748 static bfd_boolean
section_has_xproperty (segT
, frag_flags_fn
);
11749 static void add_xt_block_frags
11750 (segT
, xtensa_block_info
**, frag_predicate
, frag_predicate
);
11751 static bfd_boolean
xtensa_frag_flags_is_empty (const frag_flags
*);
11752 static void xtensa_frag_flags_init (frag_flags
*);
11753 static void get_frag_property_flags (const fragS
*, frag_flags
*);
11754 static flagword
frag_flags_to_number (const frag_flags
*);
11755 static void add_xt_prop_frags (segT
, xtensa_block_info
**, frag_flags_fn
);
11757 /* Set up property tables after relaxation. */
11760 xtensa_post_relax_hook (void)
11762 xtensa_move_seg_list_to_beginning (literal_head
);
11764 xtensa_find_unmarked_state_frags ();
11765 xtensa_mark_frags_for_org ();
11766 xtensa_mark_difference_of_two_symbols ();
11768 xtensa_create_property_segments (get_frag_is_literal
,
11770 XTENSA_LIT_SEC_NAME
,
11772 xtensa_create_xproperty_segments (get_frag_property_flags
,
11773 XTENSA_PROP_SEC_NAME
,
11776 if (warn_unaligned_branch_targets
)
11777 bfd_map_over_sections (stdoutput
, xtensa_find_unaligned_branch_targets
, 0);
11778 bfd_map_over_sections (stdoutput
, xtensa_find_unaligned_loops
, 0);
11782 /* This function is only meaningful after xtensa_move_literals. */
11785 get_frag_is_literal (const fragS
*fragP
)
11787 gas_assert (fragP
!= NULL
);
11788 return fragP
->tc_frag_data
.is_literal
;
11793 xtensa_create_property_segments (frag_predicate property_function
,
11794 frag_predicate end_property_function
,
11795 const char *section_name_base
,
11796 xt_section_type sec_type
)
11800 /* Walk over all of the current segments.
11801 Walk over each fragment
11802 For each non-empty fragment,
11803 Build a property record (append where possible). */
11805 for (seclist
= &stdoutput
->sections
;
11806 seclist
&& *seclist
;
11807 seclist
= &(*seclist
)->next
)
11809 segT sec
= *seclist
;
11811 if (exclude_section_from_property_tables (sec
))
11814 if (section_has_property (sec
, property_function
))
11816 segment_info_type
*xt_seg_info
;
11817 xtensa_block_info
**xt_blocks
;
11818 segT prop_sec
= xtensa_make_property_section (sec
, section_name_base
);
11820 prop_sec
->output_section
= prop_sec
;
11821 subseg_set (prop_sec
, 0);
11822 xt_seg_info
= seg_info (prop_sec
);
11823 xt_blocks
= &xt_seg_info
->tc_segment_info_data
.blocks
[sec_type
];
11825 /* Walk over all of the frchains here and add new sections. */
11826 add_xt_block_frags (sec
, xt_blocks
, property_function
,
11827 end_property_function
);
11831 /* Now we fill them out.... */
11833 for (seclist
= &stdoutput
->sections
;
11834 seclist
&& *seclist
;
11835 seclist
= &(*seclist
)->next
)
11837 segment_info_type
*seginfo
;
11838 xtensa_block_info
*block
;
11839 segT sec
= *seclist
;
11841 seginfo
= seg_info (sec
);
11842 block
= seginfo
->tc_segment_info_data
.blocks
[sec_type
];
11846 xtensa_block_info
*cur_block
;
11848 bfd_size_type rec_size
;
11850 for (cur_block
= block
; cur_block
; cur_block
= cur_block
->next
)
11853 rec_size
= num_recs
* 8;
11854 bfd_set_section_size (stdoutput
, sec
, rec_size
);
11861 subseg_set (sec
, 0);
11862 frag_data
= frag_more (rec_size
);
11864 for (i
= 0; i
< num_recs
; i
++)
11868 /* Write the fixup. */
11869 gas_assert (cur_block
);
11870 fix
= fix_new (frag_now
, i
* 8, 4,
11871 section_symbol (cur_block
->sec
),
11873 FALSE
, BFD_RELOC_32
);
11874 fix
->fx_file
= "<internal>";
11877 /* Write the length. */
11878 md_number_to_chars (&frag_data
[4 + i
* 8],
11879 cur_block
->size
, 4);
11880 cur_block
= cur_block
->next
;
11882 frag_wane (frag_now
);
11884 frag_wane (frag_now
);
11892 xtensa_create_xproperty_segments (frag_flags_fn flag_fn
,
11893 const char *section_name_base
,
11894 xt_section_type sec_type
)
11898 /* Walk over all of the current segments.
11899 Walk over each fragment.
11900 For each fragment that has instructions,
11901 build an instruction record (append where possible). */
11903 for (seclist
= &stdoutput
->sections
;
11904 seclist
&& *seclist
;
11905 seclist
= &(*seclist
)->next
)
11907 segT sec
= *seclist
;
11909 if (exclude_section_from_property_tables (sec
))
11912 if (section_has_xproperty (sec
, flag_fn
))
11914 segment_info_type
*xt_seg_info
;
11915 xtensa_block_info
**xt_blocks
;
11916 segT prop_sec
= xtensa_make_property_section (sec
, section_name_base
);
11918 prop_sec
->output_section
= prop_sec
;
11919 subseg_set (prop_sec
, 0);
11920 xt_seg_info
= seg_info (prop_sec
);
11921 xt_blocks
= &xt_seg_info
->tc_segment_info_data
.blocks
[sec_type
];
11923 /* Walk over all of the frchains here and add new sections. */
11924 add_xt_prop_frags (sec
, xt_blocks
, flag_fn
);
11928 /* Now we fill them out.... */
11930 for (seclist
= &stdoutput
->sections
;
11931 seclist
&& *seclist
;
11932 seclist
= &(*seclist
)->next
)
11934 segment_info_type
*seginfo
;
11935 xtensa_block_info
*block
;
11936 segT sec
= *seclist
;
11938 seginfo
= seg_info (sec
);
11939 block
= seginfo
->tc_segment_info_data
.blocks
[sec_type
];
11943 xtensa_block_info
*cur_block
;
11945 bfd_size_type rec_size
;
11947 for (cur_block
= block
; cur_block
; cur_block
= cur_block
->next
)
11950 rec_size
= num_recs
* (8 + 4);
11951 bfd_set_section_size (stdoutput
, sec
, rec_size
);
11952 /* elf_section_data (sec)->this_hdr.sh_entsize = 12; */
11959 subseg_set (sec
, 0);
11960 frag_data
= frag_more (rec_size
);
11962 for (i
= 0; i
< num_recs
; i
++)
11966 /* Write the fixup. */
11967 gas_assert (cur_block
);
11968 fix
= fix_new (frag_now
, i
* 12, 4,
11969 section_symbol (cur_block
->sec
),
11971 FALSE
, BFD_RELOC_32
);
11972 fix
->fx_file
= "<internal>";
11975 /* Write the length. */
11976 md_number_to_chars (&frag_data
[4 + i
* 12],
11977 cur_block
->size
, 4);
11978 md_number_to_chars (&frag_data
[8 + i
* 12],
11979 frag_flags_to_number (&cur_block
->flags
),
11980 sizeof (flagword
));
11981 cur_block
= cur_block
->next
;
11983 frag_wane (frag_now
);
11985 frag_wane (frag_now
);
11993 exclude_section_from_property_tables (segT sec
)
11995 flagword flags
= bfd_get_section_flags (stdoutput
, sec
);
11997 /* Sections that don't contribute to the memory footprint are excluded. */
11998 if ((flags
& SEC_DEBUGGING
)
11999 || !(flags
& SEC_ALLOC
)
12000 || (flags
& SEC_MERGE
))
12003 /* Linker cie and fde optimizations mess up property entries for
12004 eh_frame sections, but there is nothing inside them relevant to
12005 property tables anyway. */
12006 if (strcmp (sec
->name
, ".eh_frame") == 0)
12014 section_has_property (segT sec
, frag_predicate property_function
)
12016 segment_info_type
*seginfo
= seg_info (sec
);
12019 if (seginfo
&& seginfo
->frchainP
)
12021 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
12023 if (property_function (fragP
)
12024 && (fragP
->fr_type
!= rs_fill
|| fragP
->fr_fix
!= 0))
12033 section_has_xproperty (segT sec
, frag_flags_fn property_function
)
12035 segment_info_type
*seginfo
= seg_info (sec
);
12038 if (seginfo
&& seginfo
->frchainP
)
12040 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
12042 frag_flags prop_flags
;
12043 property_function (fragP
, &prop_flags
);
12044 if (!xtensa_frag_flags_is_empty (&prop_flags
))
12052 /* Two types of block sections exist right now: literal and insns. */
12055 add_xt_block_frags (segT sec
,
12056 xtensa_block_info
**xt_block
,
12057 frag_predicate property_function
,
12058 frag_predicate end_property_function
)
12062 /* Build it if needed. */
12063 while (*xt_block
!= NULL
)
12064 xt_block
= &(*xt_block
)->next
;
12065 /* We are either at NULL at the beginning or at the end. */
12067 /* Walk through the frags. */
12068 if (seg_info (sec
)->frchainP
)
12070 for (fragP
= seg_info (sec
)->frchainP
->frch_root
;
12072 fragP
= fragP
->fr_next
)
12074 if (property_function (fragP
)
12075 && (fragP
->fr_type
!= rs_fill
|| fragP
->fr_fix
!= 0))
12077 if (*xt_block
!= NULL
)
12079 if ((*xt_block
)->offset
+ (*xt_block
)->size
12080 == fragP
->fr_address
)
12081 (*xt_block
)->size
+= fragP
->fr_fix
;
12083 xt_block
= &((*xt_block
)->next
);
12085 if (*xt_block
== NULL
)
12087 xtensa_block_info
*new_block
= XNEW (xtensa_block_info
);
12088 new_block
->sec
= sec
;
12089 new_block
->offset
= fragP
->fr_address
;
12090 new_block
->size
= fragP
->fr_fix
;
12091 new_block
->next
= NULL
;
12092 xtensa_frag_flags_init (&new_block
->flags
);
12093 *xt_block
= new_block
;
12095 if (end_property_function
12096 && end_property_function (fragP
))
12098 xt_block
= &((*xt_block
)->next
);
12106 /* Break the encapsulation of add_xt_prop_frags here. */
12109 xtensa_frag_flags_is_empty (const frag_flags
*prop_flags
)
12111 if (prop_flags
->is_literal
12112 || prop_flags
->is_insn
12113 || prop_flags
->is_data
12114 || prop_flags
->is_unreachable
)
12121 xtensa_frag_flags_init (frag_flags
*prop_flags
)
12123 memset (prop_flags
, 0, sizeof (frag_flags
));
12128 get_frag_property_flags (const fragS
*fragP
, frag_flags
*prop_flags
)
12130 xtensa_frag_flags_init (prop_flags
);
12131 if (fragP
->tc_frag_data
.is_literal
)
12132 prop_flags
->is_literal
= TRUE
;
12133 if (fragP
->tc_frag_data
.is_specific_opcode
12134 || fragP
->tc_frag_data
.is_no_transform
)
12136 prop_flags
->is_no_transform
= TRUE
;
12137 if (xtensa_frag_flags_is_empty (prop_flags
))
12138 prop_flags
->is_data
= TRUE
;
12140 if (fragP
->tc_frag_data
.is_unreachable
)
12141 prop_flags
->is_unreachable
= TRUE
;
12142 else if (fragP
->tc_frag_data
.is_insn
)
12144 prop_flags
->is_insn
= TRUE
;
12145 if (fragP
->tc_frag_data
.is_loop_target
)
12146 prop_flags
->insn
.is_loop_target
= TRUE
;
12147 if (fragP
->tc_frag_data
.is_branch_target
)
12148 prop_flags
->insn
.is_branch_target
= TRUE
;
12149 if (fragP
->tc_frag_data
.is_no_density
)
12150 prop_flags
->insn
.is_no_density
= TRUE
;
12151 if (fragP
->tc_frag_data
.use_absolute_literals
)
12152 prop_flags
->insn
.is_abslit
= TRUE
;
12154 if (fragP
->tc_frag_data
.is_align
)
12156 prop_flags
->is_align
= TRUE
;
12157 prop_flags
->alignment
= fragP
->tc_frag_data
.alignment
;
12158 if (xtensa_frag_flags_is_empty (prop_flags
))
12159 prop_flags
->is_data
= TRUE
;
12165 frag_flags_to_number (const frag_flags
*prop_flags
)
12168 if (prop_flags
->is_literal
)
12169 num
|= XTENSA_PROP_LITERAL
;
12170 if (prop_flags
->is_insn
)
12171 num
|= XTENSA_PROP_INSN
;
12172 if (prop_flags
->is_data
)
12173 num
|= XTENSA_PROP_DATA
;
12174 if (prop_flags
->is_unreachable
)
12175 num
|= XTENSA_PROP_UNREACHABLE
;
12176 if (prop_flags
->insn
.is_loop_target
)
12177 num
|= XTENSA_PROP_INSN_LOOP_TARGET
;
12178 if (prop_flags
->insn
.is_branch_target
)
12180 num
|= XTENSA_PROP_INSN_BRANCH_TARGET
;
12181 num
= SET_XTENSA_PROP_BT_ALIGN (num
, prop_flags
->insn
.bt_align_priority
);
12184 if (prop_flags
->insn
.is_no_density
)
12185 num
|= XTENSA_PROP_INSN_NO_DENSITY
;
12186 if (prop_flags
->is_no_transform
)
12187 num
|= XTENSA_PROP_NO_TRANSFORM
;
12188 if (prop_flags
->insn
.is_no_reorder
)
12189 num
|= XTENSA_PROP_INSN_NO_REORDER
;
12190 if (prop_flags
->insn
.is_abslit
)
12191 num
|= XTENSA_PROP_INSN_ABSLIT
;
12193 if (prop_flags
->is_align
)
12195 num
|= XTENSA_PROP_ALIGN
;
12196 num
= SET_XTENSA_PROP_ALIGNMENT (num
, prop_flags
->alignment
);
12204 xtensa_frag_flags_combinable (const frag_flags
*prop_flags_1
,
12205 const frag_flags
*prop_flags_2
)
12207 /* Cannot combine with an end marker. */
12209 if (prop_flags_1
->is_literal
!= prop_flags_2
->is_literal
)
12211 if (prop_flags_1
->is_insn
!= prop_flags_2
->is_insn
)
12213 if (prop_flags_1
->is_data
!= prop_flags_2
->is_data
)
12216 if (prop_flags_1
->is_insn
)
12218 /* Properties of the beginning of the frag. */
12219 if (prop_flags_2
->insn
.is_loop_target
)
12221 if (prop_flags_2
->insn
.is_branch_target
)
12223 if (prop_flags_1
->insn
.is_no_density
!=
12224 prop_flags_2
->insn
.is_no_density
)
12226 if (prop_flags_1
->is_no_transform
!=
12227 prop_flags_2
->is_no_transform
)
12229 if (prop_flags_1
->insn
.is_no_reorder
!=
12230 prop_flags_2
->insn
.is_no_reorder
)
12232 if (prop_flags_1
->insn
.is_abslit
!=
12233 prop_flags_2
->insn
.is_abslit
)
12237 if (prop_flags_1
->is_align
)
12245 xt_block_aligned_size (const xtensa_block_info
*xt_block
)
12248 unsigned align_bits
;
12250 if (!xt_block
->flags
.is_align
)
12251 return xt_block
->size
;
12253 end_addr
= xt_block
->offset
+ xt_block
->size
;
12254 align_bits
= xt_block
->flags
.alignment
;
12255 end_addr
= ((end_addr
+ ((1 << align_bits
) -1)) >> align_bits
) << align_bits
;
12256 return end_addr
- xt_block
->offset
;
12261 xtensa_xt_block_combine (xtensa_block_info
*xt_block
,
12262 const xtensa_block_info
*xt_block_2
)
12264 if (xt_block
->sec
!= xt_block_2
->sec
)
12266 if (xt_block
->offset
+ xt_block_aligned_size (xt_block
)
12267 != xt_block_2
->offset
)
12270 if (xt_block_2
->size
== 0
12271 && (!xt_block_2
->flags
.is_unreachable
12272 || xt_block
->flags
.is_unreachable
))
12274 if (xt_block_2
->flags
.is_align
12275 && xt_block
->flags
.is_align
)
12277 /* Nothing needed. */
12278 if (xt_block
->flags
.alignment
>= xt_block_2
->flags
.alignment
)
12283 if (xt_block_2
->flags
.is_align
)
12285 /* Push alignment to previous entry. */
12286 xt_block
->flags
.is_align
= xt_block_2
->flags
.is_align
;
12287 xt_block
->flags
.alignment
= xt_block_2
->flags
.alignment
;
12292 if (!xtensa_frag_flags_combinable (&xt_block
->flags
,
12293 &xt_block_2
->flags
))
12296 xt_block
->size
+= xt_block_2
->size
;
12298 if (xt_block_2
->flags
.is_align
)
12300 xt_block
->flags
.is_align
= TRUE
;
12301 xt_block
->flags
.alignment
= xt_block_2
->flags
.alignment
;
12309 add_xt_prop_frags (segT sec
,
12310 xtensa_block_info
**xt_block
,
12311 frag_flags_fn property_function
)
12315 /* Build it if needed. */
12316 while (*xt_block
!= NULL
)
12318 xt_block
= &(*xt_block
)->next
;
12320 /* We are either at NULL at the beginning or at the end. */
12322 /* Walk through the frags. */
12323 if (seg_info (sec
)->frchainP
)
12325 for (fragP
= seg_info (sec
)->frchainP
->frch_root
; fragP
;
12326 fragP
= fragP
->fr_next
)
12328 xtensa_block_info tmp_block
;
12329 tmp_block
.sec
= sec
;
12330 tmp_block
.offset
= fragP
->fr_address
;
12331 tmp_block
.size
= fragP
->fr_fix
;
12332 tmp_block
.next
= NULL
;
12333 property_function (fragP
, &tmp_block
.flags
);
12335 if (!xtensa_frag_flags_is_empty (&tmp_block
.flags
))
12336 /* && fragP->fr_fix != 0) */
12338 if ((*xt_block
) == NULL
12339 || !xtensa_xt_block_combine (*xt_block
, &tmp_block
))
12341 xtensa_block_info
*new_block
;
12342 if ((*xt_block
) != NULL
)
12343 xt_block
= &(*xt_block
)->next
;
12344 new_block
= XNEW (xtensa_block_info
);
12345 *new_block
= tmp_block
;
12346 *xt_block
= new_block
;
12354 /* op_placement_info_table */
12356 /* op_placement_info makes it easier to determine which
12357 ops can go in which slots. */
12360 init_op_placement_info_table (void)
12362 xtensa_isa isa
= xtensa_default_isa
;
12363 xtensa_insnbuf ibuf
= xtensa_insnbuf_alloc (isa
);
12364 xtensa_opcode opcode
;
12367 int num_opcodes
= xtensa_isa_num_opcodes (isa
);
12369 op_placement_table
= XNEWVEC (op_placement_info
, num_opcodes
);
12370 gas_assert (xtensa_isa_num_formats (isa
) < MAX_FORMATS
);
12372 for (opcode
= 0; opcode
< num_opcodes
; opcode
++)
12374 op_placement_info
*opi
= &op_placement_table
[opcode
];
12375 /* FIXME: Make tinsn allocation dynamic. */
12376 if (xtensa_opcode_num_operands (isa
, opcode
) > MAX_INSN_ARGS
)
12377 as_fatal (_("too many operands in instruction"));
12378 opi
->narrowest
= XTENSA_UNDEFINED
;
12379 opi
->narrowest_size
= 0x7F;
12380 opi
->narrowest_slot
= 0;
12382 opi
->num_formats
= 0;
12384 for (fmt
= 0; fmt
< xtensa_isa_num_formats (isa
); fmt
++)
12386 opi
->slots
[fmt
] = 0;
12387 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
12389 if (xtensa_opcode_encode (isa
, fmt
, slot
, ibuf
, opcode
) == 0)
12391 int fmt_length
= xtensa_format_length (isa
, fmt
);
12393 set_bit (fmt
, opi
->formats
);
12394 set_bit (slot
, opi
->slots
[fmt
]);
12395 if (fmt_length
< opi
->narrowest_size
12396 || (fmt_length
== opi
->narrowest_size
12397 && (xtensa_format_num_slots (isa
, fmt
)
12398 < xtensa_format_num_slots (isa
,
12401 opi
->narrowest
= fmt
;
12402 opi
->narrowest_size
= fmt_length
;
12403 opi
->narrowest_slot
= slot
;
12408 opi
->num_formats
++;
12411 xtensa_insnbuf_free (isa
, ibuf
);
12416 opcode_fits_format_slot (xtensa_opcode opcode
, xtensa_format fmt
, int slot
)
12418 return bit_is_set (slot
, op_placement_table
[opcode
].slots
[fmt
]);
12422 /* If the opcode is available in a single slot format, return its size. */
12425 xg_get_single_size (xtensa_opcode opcode
)
12427 return op_placement_table
[opcode
].narrowest_size
;
12431 static xtensa_format
12432 xg_get_single_format (xtensa_opcode opcode
)
12434 return op_placement_table
[opcode
].narrowest
;
12439 xg_get_single_slot (xtensa_opcode opcode
)
12441 return op_placement_table
[opcode
].narrowest_slot
;
12445 /* Instruction Stack Functions (from "xtensa-istack.h"). */
12448 istack_init (IStack
*stack
)
12455 istack_empty (IStack
*stack
)
12457 return (stack
->ninsn
== 0);
12462 istack_full (IStack
*stack
)
12464 return (stack
->ninsn
== MAX_ISTACK
);
12468 /* Return a pointer to the top IStack entry.
12469 It is an error to call this if istack_empty () is TRUE. */
12472 istack_top (IStack
*stack
)
12474 int rec
= stack
->ninsn
- 1;
12475 gas_assert (!istack_empty (stack
));
12476 return &stack
->insn
[rec
];
12480 /* Add a new TInsn to an IStack.
12481 It is an error to call this if istack_full () is TRUE. */
12484 istack_push (IStack
*stack
, TInsn
*insn
)
12486 int rec
= stack
->ninsn
;
12487 gas_assert (!istack_full (stack
));
12488 stack
->insn
[rec
] = *insn
;
12493 /* Clear space for the next TInsn on the IStack and return a pointer
12494 to it. It is an error to call this if istack_full () is TRUE. */
12497 istack_push_space (IStack
*stack
)
12499 int rec
= stack
->ninsn
;
12501 gas_assert (!istack_full (stack
));
12502 insn
= &stack
->insn
[rec
];
12509 /* Remove the last pushed instruction. It is an error to call this if
12510 istack_empty () returns TRUE. */
12513 istack_pop (IStack
*stack
)
12515 int rec
= stack
->ninsn
- 1;
12516 gas_assert (!istack_empty (stack
));
12518 tinsn_init (&stack
->insn
[rec
]);
12522 /* TInsn functions. */
12525 tinsn_init (TInsn
*dst
)
12527 memset (dst
, 0, sizeof (TInsn
));
12531 /* Return TRUE if ANY of the operands in the insn are symbolic. */
12534 tinsn_has_symbolic_operands (const TInsn
*insn
)
12537 int n
= insn
->ntok
;
12539 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12541 for (i
= 0; i
< n
; ++i
)
12543 switch (insn
->tok
[i
].X_op
)
12557 tinsn_has_invalid_symbolic_operands (const TInsn
*insn
)
12559 xtensa_isa isa
= xtensa_default_isa
;
12561 int n
= insn
->ntok
;
12563 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12565 for (i
= 0; i
< n
; ++i
)
12567 switch (insn
->tok
[i
].X_op
)
12575 /* Errors for these types are caught later. */
12580 /* Symbolic immediates are only allowed on the last immediate
12581 operand. At this time, CONST16 is the only opcode where we
12582 support non-PC-relative relocations. */
12583 if (i
!= get_relaxable_immed (insn
->opcode
)
12584 || (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) != 1
12585 && insn
->opcode
!= xtensa_const16_opcode
))
12587 as_bad (_("invalid symbolic operand"));
12596 /* For assembly code with complex expressions (e.g. subtraction),
12597 we have to build them in the literal pool so that
12598 their results are calculated correctly after relaxation.
12599 The relaxation only handles expressions that
12600 boil down to SYMBOL + OFFSET. */
12603 tinsn_has_complex_operands (const TInsn
*insn
)
12606 int n
= insn
->ntok
;
12607 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12608 for (i
= 0; i
< n
; ++i
)
12610 switch (insn
->tok
[i
].X_op
)
12626 /* Encode a TInsn opcode and its constant operands into slotbuf.
12627 Return TRUE if there is a symbol in the immediate field. This
12628 function assumes that:
12629 1) The number of operands are correct.
12630 2) The insn_type is ITYPE_INSN.
12631 3) The opcode can be encoded in the specified format and slot.
12632 4) Operands are either O_constant or O_symbol, and all constants fit. */
12635 tinsn_to_slotbuf (xtensa_format fmt
,
12638 xtensa_insnbuf slotbuf
)
12640 xtensa_isa isa
= xtensa_default_isa
;
12641 xtensa_opcode opcode
= tinsn
->opcode
;
12642 bfd_boolean has_fixup
= FALSE
;
12643 int noperands
= xtensa_opcode_num_operands (isa
, opcode
);
12646 gas_assert (tinsn
->insn_type
== ITYPE_INSN
);
12647 if (noperands
!= tinsn
->ntok
)
12648 as_fatal (_("operand number mismatch"));
12650 if (xtensa_opcode_encode (isa
, fmt
, slot
, slotbuf
, opcode
))
12652 as_bad (_("cannot encode opcode \"%s\" in the given format \"%s\""),
12653 xtensa_opcode_name (isa
, opcode
), xtensa_format_name (isa
, fmt
));
12657 for (i
= 0; i
< noperands
; i
++)
12659 expressionS
*exp
= &tinsn
->tok
[i
];
12662 const char *file_name
;
12668 if (xtensa_operand_is_visible (isa
, opcode
, i
) == 0)
12670 /* The register number has already been checked in
12671 expression_maybe_register, so we don't need to check here. */
12672 opnd_value
= exp
->X_add_number
;
12673 (void) xtensa_operand_encode (isa
, opcode
, i
, &opnd_value
);
12674 rc
= xtensa_operand_set_field (isa
, opcode
, i
, fmt
, slot
, slotbuf
,
12677 as_warn (_("xtensa-isa failure: %s"), xtensa_isa_error_msg (isa
));
12681 if (xtensa_operand_is_visible (isa
, opcode
, i
) == 0)
12683 file_name
= as_where (&line
);
12684 /* It is a constant and we called this function
12685 then we have to try to fit it. */
12686 xtensa_insnbuf_set_operand (slotbuf
, fmt
, slot
, opcode
, i
,
12687 exp
->X_add_number
, file_name
, line
);
12700 /* Encode a single TInsn into an insnbuf. If the opcode can only be encoded
12701 into a multi-slot instruction, fill the other slots with NOPs.
12702 Return TRUE if there is a symbol in the immediate field. See also the
12703 assumptions listed for tinsn_to_slotbuf. */
12706 tinsn_to_insnbuf (TInsn
*tinsn
, xtensa_insnbuf insnbuf
)
12708 static xtensa_insnbuf slotbuf
= 0;
12709 static vliw_insn vinsn
;
12710 xtensa_isa isa
= xtensa_default_isa
;
12711 bfd_boolean has_fixup
= FALSE
;
12716 slotbuf
= xtensa_insnbuf_alloc (isa
);
12717 xg_init_vinsn (&vinsn
);
12720 xg_clear_vinsn (&vinsn
);
12722 bundle_tinsn (tinsn
, &vinsn
);
12724 xtensa_format_encode (isa
, vinsn
.format
, insnbuf
);
12726 for (i
= 0; i
< vinsn
.num_slots
; i
++)
12728 /* Only one slot may have a fix-up because the rest contains NOPs. */
12730 tinsn_to_slotbuf (vinsn
.format
, i
, &vinsn
.slots
[i
], vinsn
.slotbuf
[i
]);
12731 xtensa_format_set_slot (isa
, vinsn
.format
, i
, insnbuf
, vinsn
.slotbuf
[i
]);
12738 /* Check the instruction arguments. Return TRUE on failure. */
12741 tinsn_check_arguments (const TInsn
*insn
)
12743 xtensa_isa isa
= xtensa_default_isa
;
12744 xtensa_opcode opcode
= insn
->opcode
;
12745 xtensa_regfile t1_regfile
, t2_regfile
;
12746 int t1_reg
, t2_reg
;
12747 int t1_base_reg
, t1_last_reg
;
12748 int t2_base_reg
, t2_last_reg
;
12749 char t1_inout
, t2_inout
;
12752 if (opcode
== XTENSA_UNDEFINED
)
12754 as_bad (_("invalid opcode"));
12758 if (xtensa_opcode_num_operands (isa
, opcode
) > insn
->ntok
)
12760 as_bad (_("too few operands"));
12764 if (xtensa_opcode_num_operands (isa
, opcode
) < insn
->ntok
)
12766 as_bad (_("too many operands"));
12770 /* Check registers. */
12771 for (j
= 0; j
< insn
->ntok
; j
++)
12773 if (xtensa_operand_is_register (isa
, insn
->opcode
, j
) != 1)
12776 t2_regfile
= xtensa_operand_regfile (isa
, insn
->opcode
, j
);
12777 t2_base_reg
= insn
->tok
[j
].X_add_number
;
12779 = t2_base_reg
+ xtensa_operand_num_regs (isa
, insn
->opcode
, j
);
12781 for (i
= 0; i
< insn
->ntok
; i
++)
12786 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) != 1)
12789 t1_regfile
= xtensa_operand_regfile (isa
, insn
->opcode
, i
);
12791 if (t1_regfile
!= t2_regfile
)
12794 t1_inout
= xtensa_operand_inout (isa
, insn
->opcode
, i
);
12795 t2_inout
= xtensa_operand_inout (isa
, insn
->opcode
, j
);
12797 t1_base_reg
= insn
->tok
[i
].X_add_number
;
12798 t1_last_reg
= (t1_base_reg
12799 + xtensa_operand_num_regs (isa
, insn
->opcode
, i
));
12801 for (t1_reg
= t1_base_reg
; t1_reg
< t1_last_reg
; t1_reg
++)
12803 for (t2_reg
= t2_base_reg
; t2_reg
< t2_last_reg
; t2_reg
++)
12805 if (t1_reg
!= t2_reg
)
12808 if (t1_inout
!= 'i' && t2_inout
!= 'i')
12810 as_bad (_("multiple writes to the same register"));
12821 /* Load an instruction from its encoded form. */
12824 tinsn_from_chars (TInsn
*tinsn
, char *f
, int slot
)
12828 xg_init_vinsn (&vinsn
);
12829 vinsn_from_chars (&vinsn
, f
);
12831 *tinsn
= vinsn
.slots
[slot
];
12832 xg_free_vinsn (&vinsn
);
12837 tinsn_from_insnbuf (TInsn
*tinsn
,
12838 xtensa_insnbuf slotbuf
,
12843 xtensa_isa isa
= xtensa_default_isa
;
12845 /* Find the immed. */
12846 tinsn_init (tinsn
);
12847 tinsn
->insn_type
= ITYPE_INSN
;
12848 tinsn
->is_specific_opcode
= FALSE
; /* must not be specific */
12849 tinsn
->opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
12850 tinsn
->ntok
= xtensa_opcode_num_operands (isa
, tinsn
->opcode
);
12851 for (i
= 0; i
< tinsn
->ntok
; i
++)
12853 set_expr_const (&tinsn
->tok
[i
],
12854 xtensa_insnbuf_get_operand (slotbuf
, fmt
, slot
,
12855 tinsn
->opcode
, i
));
12860 /* Read the value of the relaxable immed from the fr_symbol and fr_offset. */
12863 tinsn_immed_from_frag (TInsn
*tinsn
, fragS
*fragP
, int slot
)
12865 xtensa_opcode opcode
= tinsn
->opcode
;
12868 if (fragP
->tc_frag_data
.slot_symbols
[slot
])
12870 opnum
= get_relaxable_immed (opcode
);
12871 gas_assert (opnum
>= 0);
12872 set_expr_symbol_offset (&tinsn
->tok
[opnum
],
12873 fragP
->tc_frag_data
.slot_symbols
[slot
],
12874 fragP
->tc_frag_data
.slot_offsets
[slot
]);
12876 tinsn
->extra_arg
= fragP
->tc_frag_data
.free_reg
[slot
];
12881 get_num_stack_text_bytes (IStack
*istack
)
12884 int text_bytes
= 0;
12886 for (i
= 0; i
< istack
->ninsn
; i
++)
12888 TInsn
*tinsn
= &istack
->insn
[i
];
12889 if (tinsn
->insn_type
== ITYPE_INSN
)
12890 text_bytes
+= xg_get_single_size (tinsn
->opcode
);
12897 get_num_stack_literal_bytes (IStack
*istack
)
12902 for (i
= 0; i
< istack
->ninsn
; i
++)
12904 TInsn
*tinsn
= &istack
->insn
[i
];
12905 if (tinsn
->insn_type
== ITYPE_LITERAL
&& tinsn
->ntok
== 1)
12912 /* vliw_insn functions. */
12915 xg_init_vinsn (vliw_insn
*v
)
12918 xtensa_isa isa
= xtensa_default_isa
;
12920 xg_clear_vinsn (v
);
12922 v
->insnbuf
= xtensa_insnbuf_alloc (isa
);
12923 if (v
->insnbuf
== NULL
)
12924 as_fatal (_("out of memory"));
12926 for (i
= 0; i
< config_max_slots
; i
++)
12928 v
->slotbuf
[i
] = xtensa_insnbuf_alloc (isa
);
12929 if (v
->slotbuf
[i
] == NULL
)
12930 as_fatal (_("out of memory"));
12936 xg_clear_vinsn (vliw_insn
*v
)
12940 memset (v
, 0, offsetof (vliw_insn
, slots
)
12941 + sizeof(TInsn
) * config_max_slots
);
12943 v
->format
= XTENSA_UNDEFINED
;
12945 v
->inside_bundle
= FALSE
;
12947 if (xt_saved_debug_type
!= DEBUG_NONE
)
12948 debug_type
= xt_saved_debug_type
;
12950 for (i
= 0; i
< config_max_slots
; i
++)
12951 v
->slots
[i
].opcode
= XTENSA_UNDEFINED
;
12956 xg_copy_vinsn (vliw_insn
*dst
, vliw_insn
*src
)
12959 offsetof(vliw_insn
, slots
) + src
->num_slots
* sizeof(TInsn
));
12960 dst
->insnbuf
= src
->insnbuf
;
12961 memcpy (dst
->slotbuf
, src
->slotbuf
, src
->num_slots
* sizeof(xtensa_insnbuf
));
12966 vinsn_has_specific_opcodes (vliw_insn
*v
)
12970 for (i
= 0; i
< v
->num_slots
; i
++)
12972 if (v
->slots
[i
].is_specific_opcode
)
12980 xg_free_vinsn (vliw_insn
*v
)
12983 xtensa_insnbuf_free (xtensa_default_isa
, v
->insnbuf
);
12984 for (i
= 0; i
< config_max_slots
; i
++)
12985 xtensa_insnbuf_free (xtensa_default_isa
, v
->slotbuf
[i
]);
12989 /* Encode a vliw_insn into an insnbuf. Return TRUE if there are any symbolic
12990 operands. See also the assumptions listed for tinsn_to_slotbuf. */
12993 vinsn_to_insnbuf (vliw_insn
*vinsn
,
12996 bfd_boolean record_fixup
)
12998 xtensa_isa isa
= xtensa_default_isa
;
12999 xtensa_format fmt
= vinsn
->format
;
13000 xtensa_insnbuf insnbuf
= vinsn
->insnbuf
;
13002 bfd_boolean has_fixup
= FALSE
;
13004 xtensa_format_encode (isa
, fmt
, insnbuf
);
13006 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
13008 TInsn
*tinsn
= &vinsn
->slots
[slot
];
13009 expressionS
*extra_arg
= &tinsn
->extra_arg
;
13010 bfd_boolean tinsn_has_fixup
=
13011 tinsn_to_slotbuf (vinsn
->format
, slot
, tinsn
,
13012 vinsn
->slotbuf
[slot
]);
13014 xtensa_format_set_slot (isa
, fmt
, slot
,
13015 insnbuf
, vinsn
->slotbuf
[slot
]);
13016 if (extra_arg
->X_op
!= O_illegal
&& extra_arg
->X_op
!= O_register
)
13018 if (vinsn
->num_slots
!= 1)
13019 as_bad (_("TLS relocation not allowed in FLIX bundle"));
13020 else if (record_fixup
)
13021 /* Instructions that generate TLS relocations should always be
13022 relaxed in the front-end. If "record_fixup" is set, then this
13023 function is being called during back-end relaxation, so flag
13024 the unexpected behavior as an error. */
13025 as_bad (_("unexpected TLS relocation"));
13027 fix_new (fragP
, frag_offset
- fragP
->fr_literal
,
13028 xtensa_format_length (isa
, fmt
),
13029 extra_arg
->X_add_symbol
, extra_arg
->X_add_number
,
13030 FALSE
, map_operator_to_reloc (extra_arg
->X_op
, FALSE
));
13032 if (tinsn_has_fixup
)
13035 xtensa_opcode opcode
= tinsn
->opcode
;
13036 int noperands
= xtensa_opcode_num_operands (isa
, opcode
);
13039 for (i
= 0; i
< noperands
; i
++)
13041 expressionS
* exp
= &tinsn
->tok
[i
];
13047 if (get_relaxable_immed (opcode
) == i
)
13049 /* Add a fix record for the instruction, except if this
13050 function is being called prior to relaxation, i.e.,
13051 if record_fixup is false, and the instruction might
13052 be relaxed later. */
13054 || tinsn
->is_specific_opcode
13055 || !xg_is_relaxable_insn (tinsn
, 0))
13057 xg_add_opcode_fix (tinsn
, i
, fmt
, slot
, exp
, fragP
,
13058 frag_offset
- fragP
->fr_literal
);
13062 if (exp
->X_op
!= O_symbol
)
13063 as_bad (_("invalid operand"));
13064 tinsn
->symbol
= exp
->X_add_symbol
;
13065 tinsn
->offset
= exp
->X_add_number
;
13069 as_bad (_("symbolic operand not allowed"));
13077 as_bad (_("expression too complex"));
13089 vinsn_from_chars (vliw_insn
*vinsn
, char *f
)
13091 static xtensa_insnbuf insnbuf
= NULL
;
13092 static xtensa_insnbuf slotbuf
= NULL
;
13095 xtensa_isa isa
= xtensa_default_isa
;
13099 insnbuf
= xtensa_insnbuf_alloc (isa
);
13100 slotbuf
= xtensa_insnbuf_alloc (isa
);
13103 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) f
, 0);
13104 fmt
= xtensa_format_decode (isa
, insnbuf
);
13105 if (fmt
== XTENSA_UNDEFINED
)
13106 as_fatal (_("cannot decode instruction format"));
13107 vinsn
->format
= fmt
;
13108 vinsn
->num_slots
= xtensa_format_num_slots (isa
, fmt
);
13110 for (i
= 0; i
< vinsn
->num_slots
; i
++)
13112 TInsn
*tinsn
= &vinsn
->slots
[i
];
13113 xtensa_format_get_slot (isa
, fmt
, i
, insnbuf
, slotbuf
);
13114 tinsn_from_insnbuf (tinsn
, slotbuf
, fmt
, i
);
13119 /* Expression utilities. */
13121 /* Return TRUE if the expression is an integer constant. */
13124 expr_is_const (const expressionS
*s
)
13126 return (s
->X_op
== O_constant
);
13130 /* Get the expression constant.
13131 Calling this is illegal if expr_is_const () returns TRUE. */
13134 get_expr_const (const expressionS
*s
)
13136 gas_assert (expr_is_const (s
));
13137 return s
->X_add_number
;
13141 /* Set the expression to a constant value. */
13144 set_expr_const (expressionS
*s
, offsetT val
)
13146 s
->X_op
= O_constant
;
13147 s
->X_add_number
= val
;
13148 s
->X_add_symbol
= NULL
;
13149 s
->X_op_symbol
= NULL
;
13154 expr_is_register (const expressionS
*s
)
13156 return (s
->X_op
== O_register
);
13160 /* Get the expression constant.
13161 Calling this is illegal if expr_is_const () returns TRUE. */
13164 get_expr_register (const expressionS
*s
)
13166 gas_assert (expr_is_register (s
));
13167 return s
->X_add_number
;
13171 /* Set the expression to a symbol + constant offset. */
13174 set_expr_symbol_offset (expressionS
*s
, symbolS
*sym
, offsetT offset
)
13176 s
->X_op
= O_symbol
;
13177 s
->X_add_symbol
= sym
;
13178 s
->X_op_symbol
= NULL
; /* unused */
13179 s
->X_add_number
= offset
;
13183 /* Return TRUE if the two expressions are equal. */
13186 expr_is_equal (expressionS
*s1
, expressionS
*s2
)
13188 if (s1
->X_op
!= s2
->X_op
)
13190 if (s1
->X_add_symbol
!= s2
->X_add_symbol
)
13192 if (s1
->X_op_symbol
!= s2
->X_op_symbol
)
13194 if (s1
->X_add_number
!= s2
->X_add_number
)
13201 copy_expr (expressionS
*dst
, const expressionS
*src
)
13203 memcpy (dst
, src
, sizeof (expressionS
));
13207 /* Support for the "--rename-section" option. */
13209 struct rename_section_struct
13211 const char *old_name
;
13213 struct rename_section_struct
*next
;
13216 static struct rename_section_struct
*section_rename
;
13219 /* Parse the string "oldname=new_name(:oldname2=new_name2)*" and add
13220 entries to the section_rename list. Note: Specifying multiple
13221 renamings separated by colons is not documented and is retained only
13222 for backward compatibility. */
13225 build_section_rename (const char *arg
)
13227 struct rename_section_struct
*r
;
13228 char *this_arg
= NULL
;
13229 char *next_arg
= NULL
;
13231 for (this_arg
= xstrdup (arg
); this_arg
!= NULL
; this_arg
= next_arg
)
13233 char *old_name
, *new_name
;
13237 next_arg
= strchr (this_arg
, ':');
13245 old_name
= this_arg
;
13246 new_name
= strchr (this_arg
, '=');
13248 if (*old_name
== '\0')
13250 as_warn (_("ignoring extra '-rename-section' delimiter ':'"));
13253 if (!new_name
|| new_name
[1] == '\0')
13255 as_warn (_("ignoring invalid '-rename-section' specification: '%s'"),
13262 /* Check for invalid section renaming. */
13263 for (r
= section_rename
; r
!= NULL
; r
= r
->next
)
13265 if (strcmp (r
->old_name
, old_name
) == 0)
13266 as_bad (_("section %s renamed multiple times"), old_name
);
13267 if (strcmp (r
->new_name
, new_name
) == 0)
13268 as_bad (_("multiple sections remapped to output section %s"),
13273 r
= XNEW (struct rename_section_struct
);
13274 r
->old_name
= xstrdup (old_name
);
13275 r
->new_name
= xstrdup (new_name
);
13276 r
->next
= section_rename
;
13277 section_rename
= r
;
13283 xtensa_section_rename (const char *name
)
13285 struct rename_section_struct
*r
= section_rename
;
13287 for (r
= section_rename
; r
!= NULL
; r
= r
->next
)
13289 if (strcmp (r
->old_name
, name
) == 0)
13290 return r
->new_name
;
13293 return (char *) name
;