]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - gas/testsuite/gas/arm/group-reloc-ldc.d
* include/elf/arm.h: Correct names of R_ARM_LDC_G{0,1,2}
[thirdparty/binutils-gdb.git] / gas / testsuite / gas / arm / group-reloc-ldc.d
1 #objdump: -dr --prefix-addresses --show-raw-insn
2 #name: Group relocation tests (ldc)
3
4 .*: +file format .*arm.*
5
6 Disassembly of section .text:
7 0[0-9a-f]+ <[^>]+> ed900085 ldc 0, cr0, \[r0, #532\]
8 0: R_ARM_LDC_PC_G0 f
9 0[0-9a-f]+ <[^>]+> ed900085 ldc 0, cr0, \[r0, #532\]
10 4: R_ARM_LDC_PC_G1 f
11 0[0-9a-f]+ <[^>]+> ed900085 ldc 0, cr0, \[r0, #532\]
12 8: R_ARM_LDC_PC_G2 f
13 0[0-9a-f]+ <[^>]+> ed900085 ldc 0, cr0, \[r0, #532\]
14 c: R_ARM_LDC_SB_G0 f
15 0[0-9a-f]+ <[^>]+> ed900085 ldc 0, cr0, \[r0, #532\]
16 10: R_ARM_LDC_SB_G1 f
17 0[0-9a-f]+ <[^>]+> ed900085 ldc 0, cr0, \[r0, #532\]
18 14: R_ARM_LDC_SB_G2 f
19 0[0-9a-f]+ <[^>]+> ed800085 stc 0, cr0, \[r0, #532\]
20 18: R_ARM_LDC_PC_G0 f
21 0[0-9a-f]+ <[^>]+> ed800085 stc 0, cr0, \[r0, #532\]
22 1c: R_ARM_LDC_PC_G1 f
23 0[0-9a-f]+ <[^>]+> ed800085 stc 0, cr0, \[r0, #532\]
24 20: R_ARM_LDC_PC_G2 f
25 0[0-9a-f]+ <[^>]+> ed800085 stc 0, cr0, \[r0, #532\]
26 24: R_ARM_LDC_SB_G0 f
27 0[0-9a-f]+ <[^>]+> ed800085 stc 0, cr0, \[r0, #532\]
28 28: R_ARM_LDC_SB_G1 f
29 0[0-9a-f]+ <[^>]+> ed800085 stc 0, cr0, \[r0, #532\]
30 2c: R_ARM_LDC_SB_G2 f
31 0[0-9a-f]+ <[^>]+> ed100085 ldc 0, cr0, \[r0, #-532\]
32 30: R_ARM_LDC_PC_G0 f
33 0[0-9a-f]+ <[^>]+> ed100085 ldc 0, cr0, \[r0, #-532\]
34 34: R_ARM_LDC_PC_G1 f
35 0[0-9a-f]+ <[^>]+> ed100085 ldc 0, cr0, \[r0, #-532\]
36 38: R_ARM_LDC_PC_G2 f
37 0[0-9a-f]+ <[^>]+> ed100085 ldc 0, cr0, \[r0, #-532\]
38 3c: R_ARM_LDC_SB_G0 f
39 0[0-9a-f]+ <[^>]+> ed100085 ldc 0, cr0, \[r0, #-532\]
40 40: R_ARM_LDC_SB_G1 f
41 0[0-9a-f]+ <[^>]+> ed100085 ldc 0, cr0, \[r0, #-532\]
42 44: R_ARM_LDC_SB_G2 f
43 0[0-9a-f]+ <[^>]+> ed000085 stc 0, cr0, \[r0, #-532\]
44 48: R_ARM_LDC_PC_G0 f
45 0[0-9a-f]+ <[^>]+> ed000085 stc 0, cr0, \[r0, #-532\]
46 4c: R_ARM_LDC_PC_G1 f
47 0[0-9a-f]+ <[^>]+> ed000085 stc 0, cr0, \[r0, #-532\]
48 50: R_ARM_LDC_PC_G2 f
49 0[0-9a-f]+ <[^>]+> ed000085 stc 0, cr0, \[r0, #-532\]
50 54: R_ARM_LDC_SB_G0 f
51 0[0-9a-f]+ <[^>]+> ed000085 stc 0, cr0, \[r0, #-532\]
52 58: R_ARM_LDC_SB_G1 f
53 0[0-9a-f]+ <[^>]+> ed000085 stc 0, cr0, \[r0, #-532\]
54 5c: R_ARM_LDC_SB_G2 f
55 0[0-9a-f]+ <[^>]+> edd00085 ldcl 0, cr0, \[r0, #532\]
56 60: R_ARM_LDC_PC_G0 f
57 0[0-9a-f]+ <[^>]+> edd00085 ldcl 0, cr0, \[r0, #532\]
58 64: R_ARM_LDC_PC_G1 f
59 0[0-9a-f]+ <[^>]+> edd00085 ldcl 0, cr0, \[r0, #532\]
60 68: R_ARM_LDC_PC_G2 f
61 0[0-9a-f]+ <[^>]+> edd00085 ldcl 0, cr0, \[r0, #532\]
62 6c: R_ARM_LDC_SB_G0 f
63 0[0-9a-f]+ <[^>]+> edd00085 ldcl 0, cr0, \[r0, #532\]
64 70: R_ARM_LDC_SB_G1 f
65 0[0-9a-f]+ <[^>]+> edd00085 ldcl 0, cr0, \[r0, #532\]
66 74: R_ARM_LDC_SB_G2 f
67 0[0-9a-f]+ <[^>]+> edc00085 stcl 0, cr0, \[r0, #532\]
68 78: R_ARM_LDC_PC_G0 f
69 0[0-9a-f]+ <[^>]+> edc00085 stcl 0, cr0, \[r0, #532\]
70 7c: R_ARM_LDC_PC_G1 f
71 0[0-9a-f]+ <[^>]+> edc00085 stcl 0, cr0, \[r0, #532\]
72 80: R_ARM_LDC_PC_G2 f
73 0[0-9a-f]+ <[^>]+> edc00085 stcl 0, cr0, \[r0, #532\]
74 84: R_ARM_LDC_SB_G0 f
75 0[0-9a-f]+ <[^>]+> edc00085 stcl 0, cr0, \[r0, #532\]
76 88: R_ARM_LDC_SB_G1 f
77 0[0-9a-f]+ <[^>]+> edc00085 stcl 0, cr0, \[r0, #532\]
78 8c: R_ARM_LDC_SB_G2 f
79 0[0-9a-f]+ <[^>]+> ed500085 ldcl 0, cr0, \[r0, #-532\]
80 90: R_ARM_LDC_PC_G0 f
81 0[0-9a-f]+ <[^>]+> ed500085 ldcl 0, cr0, \[r0, #-532\]
82 94: R_ARM_LDC_PC_G1 f
83 0[0-9a-f]+ <[^>]+> ed500085 ldcl 0, cr0, \[r0, #-532\]
84 98: R_ARM_LDC_PC_G2 f
85 0[0-9a-f]+ <[^>]+> ed500085 ldcl 0, cr0, \[r0, #-532\]
86 9c: R_ARM_LDC_SB_G0 f
87 0[0-9a-f]+ <[^>]+> ed500085 ldcl 0, cr0, \[r0, #-532\]
88 a0: R_ARM_LDC_SB_G1 f
89 0[0-9a-f]+ <[^>]+> ed500085 ldcl 0, cr0, \[r0, #-532\]
90 a4: R_ARM_LDC_SB_G2 f
91 0[0-9a-f]+ <[^>]+> ed400085 stcl 0, cr0, \[r0, #-532\]
92 a8: R_ARM_LDC_PC_G0 f
93 0[0-9a-f]+ <[^>]+> ed400085 stcl 0, cr0, \[r0, #-532\]
94 ac: R_ARM_LDC_PC_G1 f
95 0[0-9a-f]+ <[^>]+> ed400085 stcl 0, cr0, \[r0, #-532\]
96 b0: R_ARM_LDC_PC_G2 f
97 0[0-9a-f]+ <[^>]+> ed400085 stcl 0, cr0, \[r0, #-532\]
98 b4: R_ARM_LDC_SB_G0 f
99 0[0-9a-f]+ <[^>]+> ed400085 stcl 0, cr0, \[r0, #-532\]
100 b8: R_ARM_LDC_SB_G1 f
101 0[0-9a-f]+ <[^>]+> ed400085 stcl 0, cr0, \[r0, #-532\]
102 bc: R_ARM_LDC_SB_G2 f
103 0[0-9a-f]+ <[^>]+> fd900085 ldc2 0, cr0, \[r0, #532\]
104 c0: R_ARM_LDC_PC_G0 f
105 0[0-9a-f]+ <[^>]+> fd900085 ldc2 0, cr0, \[r0, #532\]
106 c4: R_ARM_LDC_PC_G1 f
107 0[0-9a-f]+ <[^>]+> fd900085 ldc2 0, cr0, \[r0, #532\]
108 c8: R_ARM_LDC_PC_G2 f
109 0[0-9a-f]+ <[^>]+> fd900085 ldc2 0, cr0, \[r0, #532\]
110 cc: R_ARM_LDC_SB_G0 f
111 0[0-9a-f]+ <[^>]+> fd900085 ldc2 0, cr0, \[r0, #532\]
112 d0: R_ARM_LDC_SB_G1 f
113 0[0-9a-f]+ <[^>]+> fd900085 ldc2 0, cr0, \[r0, #532\]
114 d4: R_ARM_LDC_SB_G2 f
115 0[0-9a-f]+ <[^>]+> fd800085 stc2 0, cr0, \[r0, #532\]
116 d8: R_ARM_LDC_PC_G0 f
117 0[0-9a-f]+ <[^>]+> fd800085 stc2 0, cr0, \[r0, #532\]
118 dc: R_ARM_LDC_PC_G1 f
119 0[0-9a-f]+ <[^>]+> fd800085 stc2 0, cr0, \[r0, #532\]
120 e0: R_ARM_LDC_PC_G2 f
121 0[0-9a-f]+ <[^>]+> fd800085 stc2 0, cr0, \[r0, #532\]
122 e4: R_ARM_LDC_SB_G0 f
123 0[0-9a-f]+ <[^>]+> fd800085 stc2 0, cr0, \[r0, #532\]
124 e8: R_ARM_LDC_SB_G1 f
125 0[0-9a-f]+ <[^>]+> fd800085 stc2 0, cr0, \[r0, #532\]
126 ec: R_ARM_LDC_SB_G2 f
127 0[0-9a-f]+ <[^>]+> fd100085 ldc2 0, cr0, \[r0, #-532\]
128 f0: R_ARM_LDC_PC_G0 f
129 0[0-9a-f]+ <[^>]+> fd100085 ldc2 0, cr0, \[r0, #-532\]
130 f4: R_ARM_LDC_PC_G1 f
131 0[0-9a-f]+ <[^>]+> fd100085 ldc2 0, cr0, \[r0, #-532\]
132 f8: R_ARM_LDC_PC_G2 f
133 0[0-9a-f]+ <[^>]+> fd100085 ldc2 0, cr0, \[r0, #-532\]
134 fc: R_ARM_LDC_SB_G0 f
135 0[0-9a-f]+ <[^>]+> fd100085 ldc2 0, cr0, \[r0, #-532\]
136 100: R_ARM_LDC_SB_G1 f
137 0[0-9a-f]+ <[^>]+> fd100085 ldc2 0, cr0, \[r0, #-532\]
138 104: R_ARM_LDC_SB_G2 f
139 0[0-9a-f]+ <[^>]+> fd000085 stc2 0, cr0, \[r0, #-532\]
140 108: R_ARM_LDC_PC_G0 f
141 0[0-9a-f]+ <[^>]+> fd000085 stc2 0, cr0, \[r0, #-532\]
142 10c: R_ARM_LDC_PC_G1 f
143 0[0-9a-f]+ <[^>]+> fd000085 stc2 0, cr0, \[r0, #-532\]
144 110: R_ARM_LDC_PC_G2 f
145 0[0-9a-f]+ <[^>]+> fd000085 stc2 0, cr0, \[r0, #-532\]
146 114: R_ARM_LDC_SB_G0 f
147 0[0-9a-f]+ <[^>]+> fd000085 stc2 0, cr0, \[r0, #-532\]
148 118: R_ARM_LDC_SB_G1 f
149 0[0-9a-f]+ <[^>]+> fd000085 stc2 0, cr0, \[r0, #-532\]
150 11c: R_ARM_LDC_SB_G2 f
151 0[0-9a-f]+ <[^>]+> fdd00085 ldc2l 0, cr0, \[r0, #532\]
152 120: R_ARM_LDC_PC_G0 f
153 0[0-9a-f]+ <[^>]+> fdd00085 ldc2l 0, cr0, \[r0, #532\]
154 124: R_ARM_LDC_PC_G1 f
155 0[0-9a-f]+ <[^>]+> fdd00085 ldc2l 0, cr0, \[r0, #532\]
156 128: R_ARM_LDC_PC_G2 f
157 0[0-9a-f]+ <[^>]+> fdd00085 ldc2l 0, cr0, \[r0, #532\]
158 12c: R_ARM_LDC_SB_G0 f
159 0[0-9a-f]+ <[^>]+> fdd00085 ldc2l 0, cr0, \[r0, #532\]
160 130: R_ARM_LDC_SB_G1 f
161 0[0-9a-f]+ <[^>]+> fdd00085 ldc2l 0, cr0, \[r0, #532\]
162 134: R_ARM_LDC_SB_G2 f
163 0[0-9a-f]+ <[^>]+> fdc00085 stc2l 0, cr0, \[r0, #532\]
164 138: R_ARM_LDC_PC_G0 f
165 0[0-9a-f]+ <[^>]+> fdc00085 stc2l 0, cr0, \[r0, #532\]
166 13c: R_ARM_LDC_PC_G1 f
167 0[0-9a-f]+ <[^>]+> fdc00085 stc2l 0, cr0, \[r0, #532\]
168 140: R_ARM_LDC_PC_G2 f
169 0[0-9a-f]+ <[^>]+> fdc00085 stc2l 0, cr0, \[r0, #532\]
170 144: R_ARM_LDC_SB_G0 f
171 0[0-9a-f]+ <[^>]+> fdc00085 stc2l 0, cr0, \[r0, #532\]
172 148: R_ARM_LDC_SB_G1 f
173 0[0-9a-f]+ <[^>]+> fdc00085 stc2l 0, cr0, \[r0, #532\]
174 14c: R_ARM_LDC_SB_G2 f
175 0[0-9a-f]+ <[^>]+> fd500085 ldc2l 0, cr0, \[r0, #-532\]
176 150: R_ARM_LDC_PC_G0 f
177 0[0-9a-f]+ <[^>]+> fd500085 ldc2l 0, cr0, \[r0, #-532\]
178 154: R_ARM_LDC_PC_G1 f
179 0[0-9a-f]+ <[^>]+> fd500085 ldc2l 0, cr0, \[r0, #-532\]
180 158: R_ARM_LDC_PC_G2 f
181 0[0-9a-f]+ <[^>]+> fd500085 ldc2l 0, cr0, \[r0, #-532\]
182 15c: R_ARM_LDC_SB_G0 f
183 0[0-9a-f]+ <[^>]+> fd500085 ldc2l 0, cr0, \[r0, #-532\]
184 160: R_ARM_LDC_SB_G1 f
185 0[0-9a-f]+ <[^>]+> fd500085 ldc2l 0, cr0, \[r0, #-532\]
186 164: R_ARM_LDC_SB_G2 f
187 0[0-9a-f]+ <[^>]+> fd400085 stc2l 0, cr0, \[r0, #-532\]
188 168: R_ARM_LDC_PC_G0 f
189 0[0-9a-f]+ <[^>]+> fd400085 stc2l 0, cr0, \[r0, #-532\]
190 16c: R_ARM_LDC_PC_G1 f
191 0[0-9a-f]+ <[^>]+> fd400085 stc2l 0, cr0, \[r0, #-532\]
192 170: R_ARM_LDC_PC_G2 f
193 0[0-9a-f]+ <[^>]+> fd400085 stc2l 0, cr0, \[r0, #-532\]
194 174: R_ARM_LDC_SB_G0 f
195 0[0-9a-f]+ <[^>]+> fd400085 stc2l 0, cr0, \[r0, #-532\]
196 178: R_ARM_LDC_SB_G1 f
197 0[0-9a-f]+ <[^>]+> fd400085 stc2l 0, cr0, \[r0, #-532\]
198 17c: R_ARM_LDC_SB_G2 f
199 0[0-9a-f]+ <[^>]+> ed900185 ldfs f0, \[r0, #532\]
200 180: R_ARM_LDC_PC_G0 f
201 0[0-9a-f]+ <[^>]+> ed900185 ldfs f0, \[r0, #532\]
202 184: R_ARM_LDC_PC_G1 f
203 0[0-9a-f]+ <[^>]+> ed900185 ldfs f0, \[r0, #532\]
204 188: R_ARM_LDC_PC_G2 f
205 0[0-9a-f]+ <[^>]+> ed900185 ldfs f0, \[r0, #532\]
206 18c: R_ARM_LDC_SB_G0 f
207 0[0-9a-f]+ <[^>]+> ed900185 ldfs f0, \[r0, #532\]
208 190: R_ARM_LDC_SB_G1 f
209 0[0-9a-f]+ <[^>]+> ed900185 ldfs f0, \[r0, #532\]
210 194: R_ARM_LDC_SB_G2 f
211 0[0-9a-f]+ <[^>]+> ed800185 stfs f0, \[r0, #532\]
212 198: R_ARM_LDC_PC_G0 f
213 0[0-9a-f]+ <[^>]+> ed800185 stfs f0, \[r0, #532\]
214 19c: R_ARM_LDC_PC_G1 f
215 0[0-9a-f]+ <[^>]+> ed800185 stfs f0, \[r0, #532\]
216 1a0: R_ARM_LDC_PC_G2 f
217 0[0-9a-f]+ <[^>]+> ed800185 stfs f0, \[r0, #532\]
218 1a4: R_ARM_LDC_SB_G0 f
219 0[0-9a-f]+ <[^>]+> ed800185 stfs f0, \[r0, #532\]
220 1a8: R_ARM_LDC_SB_G1 f
221 0[0-9a-f]+ <[^>]+> ed800185 stfs f0, \[r0, #532\]
222 1ac: R_ARM_LDC_SB_G2 f
223 0[0-9a-f]+ <[^>]+> ed100185 ldfs f0, \[r0, #-532\]
224 1b0: R_ARM_LDC_PC_G0 f
225 0[0-9a-f]+ <[^>]+> ed100185 ldfs f0, \[r0, #-532\]
226 1b4: R_ARM_LDC_PC_G1 f
227 0[0-9a-f]+ <[^>]+> ed100185 ldfs f0, \[r0, #-532\]
228 1b8: R_ARM_LDC_PC_G2 f
229 0[0-9a-f]+ <[^>]+> ed100185 ldfs f0, \[r0, #-532\]
230 1bc: R_ARM_LDC_SB_G0 f
231 0[0-9a-f]+ <[^>]+> ed100185 ldfs f0, \[r0, #-532\]
232 1c0: R_ARM_LDC_SB_G1 f
233 0[0-9a-f]+ <[^>]+> ed100185 ldfs f0, \[r0, #-532\]
234 1c4: R_ARM_LDC_SB_G2 f
235 0[0-9a-f]+ <[^>]+> ed000185 stfs f0, \[r0, #-532\]
236 1c8: R_ARM_LDC_PC_G0 f
237 0[0-9a-f]+ <[^>]+> ed000185 stfs f0, \[r0, #-532\]
238 1cc: R_ARM_LDC_PC_G1 f
239 0[0-9a-f]+ <[^>]+> ed000185 stfs f0, \[r0, #-532\]
240 1d0: R_ARM_LDC_PC_G2 f
241 0[0-9a-f]+ <[^>]+> ed000185 stfs f0, \[r0, #-532\]
242 1d4: R_ARM_LDC_SB_G0 f
243 0[0-9a-f]+ <[^>]+> ed000185 stfs f0, \[r0, #-532\]
244 1d8: R_ARM_LDC_SB_G1 f
245 0[0-9a-f]+ <[^>]+> ed000185 stfs f0, \[r0, #-532\]
246 1dc: R_ARM_LDC_SB_G2 f
247 0[0-9a-f]+ <[^>]+> ed908185 ldfd f0, \[r0, #532\]
248 1e0: R_ARM_LDC_PC_G0 f
249 0[0-9a-f]+ <[^>]+> ed908185 ldfd f0, \[r0, #532\]
250 1e4: R_ARM_LDC_PC_G1 f
251 0[0-9a-f]+ <[^>]+> ed908185 ldfd f0, \[r0, #532\]
252 1e8: R_ARM_LDC_PC_G2 f
253 0[0-9a-f]+ <[^>]+> ed908185 ldfd f0, \[r0, #532\]
254 1ec: R_ARM_LDC_SB_G0 f
255 0[0-9a-f]+ <[^>]+> ed908185 ldfd f0, \[r0, #532\]
256 1f0: R_ARM_LDC_SB_G1 f
257 0[0-9a-f]+ <[^>]+> ed908185 ldfd f0, \[r0, #532\]
258 1f4: R_ARM_LDC_SB_G2 f
259 0[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\]
260 1f8: R_ARM_LDC_PC_G0 f
261 0[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\]
262 1fc: R_ARM_LDC_PC_G1 f
263 0[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\]
264 200: R_ARM_LDC_PC_G2 f
265 0[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\]
266 204: R_ARM_LDC_SB_G0 f
267 0[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\]
268 208: R_ARM_LDC_SB_G1 f
269 0[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\]
270 20c: R_ARM_LDC_SB_G2 f
271 0[0-9a-f]+ <[^>]+> ed108185 ldfd f0, \[r0, #-532\]
272 210: R_ARM_LDC_PC_G0 f
273 0[0-9a-f]+ <[^>]+> ed108185 ldfd f0, \[r0, #-532\]
274 214: R_ARM_LDC_PC_G1 f
275 0[0-9a-f]+ <[^>]+> ed108185 ldfd f0, \[r0, #-532\]
276 218: R_ARM_LDC_PC_G2 f
277 0[0-9a-f]+ <[^>]+> ed108185 ldfd f0, \[r0, #-532\]
278 21c: R_ARM_LDC_SB_G0 f
279 0[0-9a-f]+ <[^>]+> ed108185 ldfd f0, \[r0, #-532\]
280 220: R_ARM_LDC_SB_G1 f
281 0[0-9a-f]+ <[^>]+> ed108185 ldfd f0, \[r0, #-532\]
282 224: R_ARM_LDC_SB_G2 f
283 0[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\]
284 228: R_ARM_LDC_PC_G0 f
285 0[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\]
286 22c: R_ARM_LDC_PC_G1 f
287 0[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\]
288 230: R_ARM_LDC_PC_G2 f
289 0[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\]
290 234: R_ARM_LDC_SB_G0 f
291 0[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\]
292 238: R_ARM_LDC_SB_G1 f
293 0[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\]
294 23c: R_ARM_LDC_SB_G2 f
295 0[0-9a-f]+ <[^>]+> edd00185 ldfe f0, \[r0, #532\]
296 240: R_ARM_LDC_PC_G0 f
297 0[0-9a-f]+ <[^>]+> edd00185 ldfe f0, \[r0, #532\]
298 244: R_ARM_LDC_PC_G1 f
299 0[0-9a-f]+ <[^>]+> edd00185 ldfe f0, \[r0, #532\]
300 248: R_ARM_LDC_PC_G2 f
301 0[0-9a-f]+ <[^>]+> edd00185 ldfe f0, \[r0, #532\]
302 24c: R_ARM_LDC_SB_G0 f
303 0[0-9a-f]+ <[^>]+> edd00185 ldfe f0, \[r0, #532\]
304 250: R_ARM_LDC_SB_G1 f
305 0[0-9a-f]+ <[^>]+> edd00185 ldfe f0, \[r0, #532\]
306 254: R_ARM_LDC_SB_G2 f
307 0[0-9a-f]+ <[^>]+> edc00185 stfe f0, \[r0, #532\]
308 258: R_ARM_LDC_PC_G0 f
309 0[0-9a-f]+ <[^>]+> edc00185 stfe f0, \[r0, #532\]
310 25c: R_ARM_LDC_PC_G1 f
311 0[0-9a-f]+ <[^>]+> edc00185 stfe f0, \[r0, #532\]
312 260: R_ARM_LDC_PC_G2 f
313 0[0-9a-f]+ <[^>]+> edc00185 stfe f0, \[r0, #532\]
314 264: R_ARM_LDC_SB_G0 f
315 0[0-9a-f]+ <[^>]+> edc00185 stfe f0, \[r0, #532\]
316 268: R_ARM_LDC_SB_G1 f
317 0[0-9a-f]+ <[^>]+> edc00185 stfe f0, \[r0, #532\]
318 26c: R_ARM_LDC_SB_G2 f
319 0[0-9a-f]+ <[^>]+> ed500185 ldfe f0, \[r0, #-532\]
320 270: R_ARM_LDC_PC_G0 f
321 0[0-9a-f]+ <[^>]+> ed500185 ldfe f0, \[r0, #-532\]
322 274: R_ARM_LDC_PC_G1 f
323 0[0-9a-f]+ <[^>]+> ed500185 ldfe f0, \[r0, #-532\]
324 278: R_ARM_LDC_PC_G2 f
325 0[0-9a-f]+ <[^>]+> ed500185 ldfe f0, \[r0, #-532\]
326 27c: R_ARM_LDC_SB_G0 f
327 0[0-9a-f]+ <[^>]+> ed500185 ldfe f0, \[r0, #-532\]
328 280: R_ARM_LDC_SB_G1 f
329 0[0-9a-f]+ <[^>]+> ed500185 ldfe f0, \[r0, #-532\]
330 284: R_ARM_LDC_SB_G2 f
331 0[0-9a-f]+ <[^>]+> ed400185 stfe f0, \[r0, #-532\]
332 288: R_ARM_LDC_PC_G0 f
333 0[0-9a-f]+ <[^>]+> ed400185 stfe f0, \[r0, #-532\]
334 28c: R_ARM_LDC_PC_G1 f
335 0[0-9a-f]+ <[^>]+> ed400185 stfe f0, \[r0, #-532\]
336 290: R_ARM_LDC_PC_G2 f
337 0[0-9a-f]+ <[^>]+> ed400185 stfe f0, \[r0, #-532\]
338 294: R_ARM_LDC_SB_G0 f
339 0[0-9a-f]+ <[^>]+> ed400185 stfe f0, \[r0, #-532\]
340 298: R_ARM_LDC_SB_G1 f
341 0[0-9a-f]+ <[^>]+> ed400185 stfe f0, \[r0, #-532\]
342 29c: R_ARM_LDC_SB_G2 f
343 0[0-9a-f]+ <[^>]+> edd08185 ldfp f0, \[r0, #532\]
344 2a0: R_ARM_LDC_PC_G0 f
345 0[0-9a-f]+ <[^>]+> edd08185 ldfp f0, \[r0, #532\]
346 2a4: R_ARM_LDC_PC_G1 f
347 0[0-9a-f]+ <[^>]+> edd08185 ldfp f0, \[r0, #532\]
348 2a8: R_ARM_LDC_PC_G2 f
349 0[0-9a-f]+ <[^>]+> edd08185 ldfp f0, \[r0, #532\]
350 2ac: R_ARM_LDC_SB_G0 f
351 0[0-9a-f]+ <[^>]+> edd08185 ldfp f0, \[r0, #532\]
352 2b0: R_ARM_LDC_SB_G1 f
353 0[0-9a-f]+ <[^>]+> edd08185 ldfp f0, \[r0, #532\]
354 2b4: R_ARM_LDC_SB_G2 f
355 0[0-9a-f]+ <[^>]+> edc08185 stfp f0, \[r0, #532\]
356 2b8: R_ARM_LDC_PC_G0 f
357 0[0-9a-f]+ <[^>]+> edc08185 stfp f0, \[r0, #532\]
358 2bc: R_ARM_LDC_PC_G1 f
359 0[0-9a-f]+ <[^>]+> edc08185 stfp f0, \[r0, #532\]
360 2c0: R_ARM_LDC_PC_G2 f
361 0[0-9a-f]+ <[^>]+> edc08185 stfp f0, \[r0, #532\]
362 2c4: R_ARM_LDC_SB_G0 f
363 0[0-9a-f]+ <[^>]+> edc08185 stfp f0, \[r0, #532\]
364 2c8: R_ARM_LDC_SB_G1 f
365 0[0-9a-f]+ <[^>]+> edc08185 stfp f0, \[r0, #532\]
366 2cc: R_ARM_LDC_SB_G2 f
367 0[0-9a-f]+ <[^>]+> ed508185 ldfp f0, \[r0, #-532\]
368 2d0: R_ARM_LDC_PC_G0 f
369 0[0-9a-f]+ <[^>]+> ed508185 ldfp f0, \[r0, #-532\]
370 2d4: R_ARM_LDC_PC_G1 f
371 0[0-9a-f]+ <[^>]+> ed508185 ldfp f0, \[r0, #-532\]
372 2d8: R_ARM_LDC_PC_G2 f
373 0[0-9a-f]+ <[^>]+> ed508185 ldfp f0, \[r0, #-532\]
374 2dc: R_ARM_LDC_SB_G0 f
375 0[0-9a-f]+ <[^>]+> ed508185 ldfp f0, \[r0, #-532\]
376 2e0: R_ARM_LDC_SB_G1 f
377 0[0-9a-f]+ <[^>]+> ed508185 ldfp f0, \[r0, #-532\]
378 2e4: R_ARM_LDC_SB_G2 f
379 0[0-9a-f]+ <[^>]+> ed408185 stfp f0, \[r0, #-532\]
380 2e8: R_ARM_LDC_PC_G0 f
381 0[0-9a-f]+ <[^>]+> ed408185 stfp f0, \[r0, #-532\]
382 2ec: R_ARM_LDC_PC_G1 f
383 0[0-9a-f]+ <[^>]+> ed408185 stfp f0, \[r0, #-532\]
384 2f0: R_ARM_LDC_PC_G2 f
385 0[0-9a-f]+ <[^>]+> ed408185 stfp f0, \[r0, #-532\]
386 2f4: R_ARM_LDC_SB_G0 f
387 0[0-9a-f]+ <[^>]+> ed408185 stfp f0, \[r0, #-532\]
388 2f8: R_ARM_LDC_SB_G1 f
389 0[0-9a-f]+ <[^>]+> ed408185 stfp f0, \[r0, #-532\]
390 2fc: R_ARM_LDC_SB_G2 f
391 0[0-9a-f]+ <[^>]+> ed900a85 flds s0, \[r0, #532\]
392 300: R_ARM_LDC_PC_G0 f
393 0[0-9a-f]+ <[^>]+> ed900a85 flds s0, \[r0, #532\]
394 304: R_ARM_LDC_PC_G1 f
395 0[0-9a-f]+ <[^>]+> ed900a85 flds s0, \[r0, #532\]
396 308: R_ARM_LDC_PC_G2 f
397 0[0-9a-f]+ <[^>]+> ed900a85 flds s0, \[r0, #532\]
398 30c: R_ARM_LDC_SB_G0 f
399 0[0-9a-f]+ <[^>]+> ed900a85 flds s0, \[r0, #532\]
400 310: R_ARM_LDC_SB_G1 f
401 0[0-9a-f]+ <[^>]+> ed900a85 flds s0, \[r0, #532\]
402 314: R_ARM_LDC_SB_G2 f
403 0[0-9a-f]+ <[^>]+> ed800a85 fsts s0, \[r0, #532\]
404 318: R_ARM_LDC_PC_G0 f
405 0[0-9a-f]+ <[^>]+> ed800a85 fsts s0, \[r0, #532\]
406 31c: R_ARM_LDC_PC_G1 f
407 0[0-9a-f]+ <[^>]+> ed800a85 fsts s0, \[r0, #532\]
408 320: R_ARM_LDC_PC_G2 f
409 0[0-9a-f]+ <[^>]+> ed800a85 fsts s0, \[r0, #532\]
410 324: R_ARM_LDC_SB_G0 f
411 0[0-9a-f]+ <[^>]+> ed800a85 fsts s0, \[r0, #532\]
412 328: R_ARM_LDC_SB_G1 f
413 0[0-9a-f]+ <[^>]+> ed800a85 fsts s0, \[r0, #532\]
414 32c: R_ARM_LDC_SB_G2 f
415 0[0-9a-f]+ <[^>]+> ed100a85 flds s0, \[r0, #-532\]
416 330: R_ARM_LDC_PC_G0 f
417 0[0-9a-f]+ <[^>]+> ed100a85 flds s0, \[r0, #-532\]
418 334: R_ARM_LDC_PC_G1 f
419 0[0-9a-f]+ <[^>]+> ed100a85 flds s0, \[r0, #-532\]
420 338: R_ARM_LDC_PC_G2 f
421 0[0-9a-f]+ <[^>]+> ed100a85 flds s0, \[r0, #-532\]
422 33c: R_ARM_LDC_SB_G0 f
423 0[0-9a-f]+ <[^>]+> ed100a85 flds s0, \[r0, #-532\]
424 340: R_ARM_LDC_SB_G1 f
425 0[0-9a-f]+ <[^>]+> ed100a85 flds s0, \[r0, #-532\]
426 344: R_ARM_LDC_SB_G2 f
427 0[0-9a-f]+ <[^>]+> ed000a85 fsts s0, \[r0, #-532\]
428 348: R_ARM_LDC_PC_G0 f
429 0[0-9a-f]+ <[^>]+> ed000a85 fsts s0, \[r0, #-532\]
430 34c: R_ARM_LDC_PC_G1 f
431 0[0-9a-f]+ <[^>]+> ed000a85 fsts s0, \[r0, #-532\]
432 350: R_ARM_LDC_PC_G2 f
433 0[0-9a-f]+ <[^>]+> ed000a85 fsts s0, \[r0, #-532\]
434 354: R_ARM_LDC_SB_G0 f
435 0[0-9a-f]+ <[^>]+> ed000a85 fsts s0, \[r0, #-532\]
436 358: R_ARM_LDC_SB_G1 f
437 0[0-9a-f]+ <[^>]+> ed000a85 fsts s0, \[r0, #-532\]
438 35c: R_ARM_LDC_SB_G2 f
439 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
440 360: R_ARM_LDC_PC_G0 f
441 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
442 364: R_ARM_LDC_PC_G1 f
443 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
444 368: R_ARM_LDC_PC_G2 f
445 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
446 36c: R_ARM_LDC_SB_G0 f
447 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
448 370: R_ARM_LDC_SB_G1 f
449 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
450 374: R_ARM_LDC_SB_G2 f
451 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
452 378: R_ARM_LDC_PC_G0 f
453 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
454 37c: R_ARM_LDC_PC_G1 f
455 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
456 380: R_ARM_LDC_PC_G2 f
457 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
458 384: R_ARM_LDC_SB_G0 f
459 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
460 388: R_ARM_LDC_SB_G1 f
461 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
462 38c: R_ARM_LDC_SB_G2 f
463 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
464 390: R_ARM_LDC_PC_G0 f
465 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
466 394: R_ARM_LDC_PC_G1 f
467 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
468 398: R_ARM_LDC_PC_G2 f
469 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
470 39c: R_ARM_LDC_SB_G0 f
471 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
472 3a0: R_ARM_LDC_SB_G1 f
473 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
474 3a4: R_ARM_LDC_SB_G2 f
475 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
476 3a8: R_ARM_LDC_PC_G0 f
477 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
478 3ac: R_ARM_LDC_PC_G1 f
479 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
480 3b0: R_ARM_LDC_PC_G2 f
481 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
482 3b4: R_ARM_LDC_SB_G0 f
483 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
484 3b8: R_ARM_LDC_SB_G1 f
485 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
486 3bc: R_ARM_LDC_SB_G2 f
487 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
488 3c0: R_ARM_LDC_PC_G0 f
489 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
490 3c4: R_ARM_LDC_PC_G1 f
491 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
492 3c8: R_ARM_LDC_PC_G2 f
493 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
494 3cc: R_ARM_LDC_SB_G0 f
495 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
496 3d0: R_ARM_LDC_SB_G1 f
497 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
498 3d4: R_ARM_LDC_SB_G2 f
499 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
500 3d8: R_ARM_LDC_PC_G0 f
501 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
502 3dc: R_ARM_LDC_PC_G1 f
503 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
504 3e0: R_ARM_LDC_PC_G2 f
505 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
506 3e4: R_ARM_LDC_SB_G0 f
507 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
508 3e8: R_ARM_LDC_SB_G1 f
509 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
510 3ec: R_ARM_LDC_SB_G2 f
511 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
512 3f0: R_ARM_LDC_PC_G0 f
513 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
514 3f4: R_ARM_LDC_PC_G1 f
515 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
516 3f8: R_ARM_LDC_PC_G2 f
517 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
518 3fc: R_ARM_LDC_SB_G0 f
519 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
520 400: R_ARM_LDC_SB_G1 f
521 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
522 404: R_ARM_LDC_SB_G2 f
523 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
524 408: R_ARM_LDC_PC_G0 f
525 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
526 40c: R_ARM_LDC_PC_G1 f
527 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
528 410: R_ARM_LDC_PC_G2 f
529 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
530 414: R_ARM_LDC_SB_G0 f
531 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
532 418: R_ARM_LDC_SB_G1 f
533 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
534 41c: R_ARM_LDC_SB_G2 f
535 0[0-9a-f]+ <[^>]+> ed900485 cfldrs mvf0, \[r0, #532\]
536 420: R_ARM_LDC_PC_G0 f
537 0[0-9a-f]+ <[^>]+> ed900485 cfldrs mvf0, \[r0, #532\]
538 424: R_ARM_LDC_PC_G1 f
539 0[0-9a-f]+ <[^>]+> ed900485 cfldrs mvf0, \[r0, #532\]
540 428: R_ARM_LDC_PC_G2 f
541 0[0-9a-f]+ <[^>]+> ed900485 cfldrs mvf0, \[r0, #532\]
542 42c: R_ARM_LDC_SB_G0 f
543 0[0-9a-f]+ <[^>]+> ed900485 cfldrs mvf0, \[r0, #532\]
544 430: R_ARM_LDC_SB_G1 f
545 0[0-9a-f]+ <[^>]+> ed900485 cfldrs mvf0, \[r0, #532\]
546 434: R_ARM_LDC_SB_G2 f
547 0[0-9a-f]+ <[^>]+> ed800485 cfstrs mvf0, \[r0, #532\]
548 438: R_ARM_LDC_PC_G0 f
549 0[0-9a-f]+ <[^>]+> ed800485 cfstrs mvf0, \[r0, #532\]
550 43c: R_ARM_LDC_PC_G1 f
551 0[0-9a-f]+ <[^>]+> ed800485 cfstrs mvf0, \[r0, #532\]
552 440: R_ARM_LDC_PC_G2 f
553 0[0-9a-f]+ <[^>]+> ed800485 cfstrs mvf0, \[r0, #532\]
554 444: R_ARM_LDC_SB_G0 f
555 0[0-9a-f]+ <[^>]+> ed800485 cfstrs mvf0, \[r0, #532\]
556 448: R_ARM_LDC_SB_G1 f
557 0[0-9a-f]+ <[^>]+> ed800485 cfstrs mvf0, \[r0, #532\]
558 44c: R_ARM_LDC_SB_G2 f
559 0[0-9a-f]+ <[^>]+> ed100485 cfldrs mvf0, \[r0, #-532\]
560 450: R_ARM_LDC_PC_G0 f
561 0[0-9a-f]+ <[^>]+> ed100485 cfldrs mvf0, \[r0, #-532\]
562 454: R_ARM_LDC_PC_G1 f
563 0[0-9a-f]+ <[^>]+> ed100485 cfldrs mvf0, \[r0, #-532\]
564 458: R_ARM_LDC_PC_G2 f
565 0[0-9a-f]+ <[^>]+> ed100485 cfldrs mvf0, \[r0, #-532\]
566 45c: R_ARM_LDC_SB_G0 f
567 0[0-9a-f]+ <[^>]+> ed100485 cfldrs mvf0, \[r0, #-532\]
568 460: R_ARM_LDC_SB_G1 f
569 0[0-9a-f]+ <[^>]+> ed100485 cfldrs mvf0, \[r0, #-532\]
570 464: R_ARM_LDC_SB_G2 f
571 0[0-9a-f]+ <[^>]+> ed000485 cfstrs mvf0, \[r0, #-532\]
572 468: R_ARM_LDC_PC_G0 f
573 0[0-9a-f]+ <[^>]+> ed000485 cfstrs mvf0, \[r0, #-532\]
574 46c: R_ARM_LDC_PC_G1 f
575 0[0-9a-f]+ <[^>]+> ed000485 cfstrs mvf0, \[r0, #-532\]
576 470: R_ARM_LDC_PC_G2 f
577 0[0-9a-f]+ <[^>]+> ed000485 cfstrs mvf0, \[r0, #-532\]
578 474: R_ARM_LDC_SB_G0 f
579 0[0-9a-f]+ <[^>]+> ed000485 cfstrs mvf0, \[r0, #-532\]
580 478: R_ARM_LDC_SB_G1 f
581 0[0-9a-f]+ <[^>]+> ed000485 cfstrs mvf0, \[r0, #-532\]
582 47c: R_ARM_LDC_SB_G2 f
583 0[0-9a-f]+ <[^>]+> edd00485 cfldrd mvd0, \[r0, #532\]
584 480: R_ARM_LDC_PC_G0 f
585 0[0-9a-f]+ <[^>]+> edd00485 cfldrd mvd0, \[r0, #532\]
586 484: R_ARM_LDC_PC_G1 f
587 0[0-9a-f]+ <[^>]+> edd00485 cfldrd mvd0, \[r0, #532\]
588 488: R_ARM_LDC_PC_G2 f
589 0[0-9a-f]+ <[^>]+> edd00485 cfldrd mvd0, \[r0, #532\]
590 48c: R_ARM_LDC_SB_G0 f
591 0[0-9a-f]+ <[^>]+> edd00485 cfldrd mvd0, \[r0, #532\]
592 490: R_ARM_LDC_SB_G1 f
593 0[0-9a-f]+ <[^>]+> edd00485 cfldrd mvd0, \[r0, #532\]
594 494: R_ARM_LDC_SB_G2 f
595 0[0-9a-f]+ <[^>]+> edc00485 cfstrd mvd0, \[r0, #532\]
596 498: R_ARM_LDC_PC_G0 f
597 0[0-9a-f]+ <[^>]+> edc00485 cfstrd mvd0, \[r0, #532\]
598 49c: R_ARM_LDC_PC_G1 f
599 0[0-9a-f]+ <[^>]+> edc00485 cfstrd mvd0, \[r0, #532\]
600 4a0: R_ARM_LDC_PC_G2 f
601 0[0-9a-f]+ <[^>]+> edc00485 cfstrd mvd0, \[r0, #532\]
602 4a4: R_ARM_LDC_SB_G0 f
603 0[0-9a-f]+ <[^>]+> edc00485 cfstrd mvd0, \[r0, #532\]
604 4a8: R_ARM_LDC_SB_G1 f
605 0[0-9a-f]+ <[^>]+> edc00485 cfstrd mvd0, \[r0, #532\]
606 4ac: R_ARM_LDC_SB_G2 f
607 0[0-9a-f]+ <[^>]+> ed500485 cfldrd mvd0, \[r0, #-532\]
608 4b0: R_ARM_LDC_PC_G0 f
609 0[0-9a-f]+ <[^>]+> ed500485 cfldrd mvd0, \[r0, #-532\]
610 4b4: R_ARM_LDC_PC_G1 f
611 0[0-9a-f]+ <[^>]+> ed500485 cfldrd mvd0, \[r0, #-532\]
612 4b8: R_ARM_LDC_PC_G2 f
613 0[0-9a-f]+ <[^>]+> ed500485 cfldrd mvd0, \[r0, #-532\]
614 4bc: R_ARM_LDC_SB_G0 f
615 0[0-9a-f]+ <[^>]+> ed500485 cfldrd mvd0, \[r0, #-532\]
616 4c0: R_ARM_LDC_SB_G1 f
617 0[0-9a-f]+ <[^>]+> ed500485 cfldrd mvd0, \[r0, #-532\]
618 4c4: R_ARM_LDC_SB_G2 f
619 0[0-9a-f]+ <[^>]+> ed400485 cfstrd mvd0, \[r0, #-532\]
620 4c8: R_ARM_LDC_PC_G0 f
621 0[0-9a-f]+ <[^>]+> ed400485 cfstrd mvd0, \[r0, #-532\]
622 4cc: R_ARM_LDC_PC_G1 f
623 0[0-9a-f]+ <[^>]+> ed400485 cfstrd mvd0, \[r0, #-532\]
624 4d0: R_ARM_LDC_PC_G2 f
625 0[0-9a-f]+ <[^>]+> ed400485 cfstrd mvd0, \[r0, #-532\]
626 4d4: R_ARM_LDC_SB_G0 f
627 0[0-9a-f]+ <[^>]+> ed400485 cfstrd mvd0, \[r0, #-532\]
628 4d8: R_ARM_LDC_SB_G1 f
629 0[0-9a-f]+ <[^>]+> ed400485 cfstrd mvd0, \[r0, #-532\]
630 4dc: R_ARM_LDC_SB_G2 f
631 0[0-9a-f]+ <[^>]+> ed900585 cfldr32 mvfx0, \[r0, #532\]
632 4e0: R_ARM_LDC_PC_G0 f
633 0[0-9a-f]+ <[^>]+> ed900585 cfldr32 mvfx0, \[r0, #532\]
634 4e4: R_ARM_LDC_PC_G1 f
635 0[0-9a-f]+ <[^>]+> ed900585 cfldr32 mvfx0, \[r0, #532\]
636 4e8: R_ARM_LDC_PC_G2 f
637 0[0-9a-f]+ <[^>]+> ed900585 cfldr32 mvfx0, \[r0, #532\]
638 4ec: R_ARM_LDC_SB_G0 f
639 0[0-9a-f]+ <[^>]+> ed900585 cfldr32 mvfx0, \[r0, #532\]
640 4f0: R_ARM_LDC_SB_G1 f
641 0[0-9a-f]+ <[^>]+> ed900585 cfldr32 mvfx0, \[r0, #532\]
642 4f4: R_ARM_LDC_SB_G2 f
643 0[0-9a-f]+ <[^>]+> ed800585 cfstr32 mvfx0, \[r0, #532\]
644 4f8: R_ARM_LDC_PC_G0 f
645 0[0-9a-f]+ <[^>]+> ed800585 cfstr32 mvfx0, \[r0, #532\]
646 4fc: R_ARM_LDC_PC_G1 f
647 0[0-9a-f]+ <[^>]+> ed800585 cfstr32 mvfx0, \[r0, #532\]
648 500: R_ARM_LDC_PC_G2 f
649 0[0-9a-f]+ <[^>]+> ed800585 cfstr32 mvfx0, \[r0, #532\]
650 504: R_ARM_LDC_SB_G0 f
651 0[0-9a-f]+ <[^>]+> ed800585 cfstr32 mvfx0, \[r0, #532\]
652 508: R_ARM_LDC_SB_G1 f
653 0[0-9a-f]+ <[^>]+> ed800585 cfstr32 mvfx0, \[r0, #532\]
654 50c: R_ARM_LDC_SB_G2 f
655 0[0-9a-f]+ <[^>]+> ed100585 cfldr32 mvfx0, \[r0, #-532\]
656 510: R_ARM_LDC_PC_G0 f
657 0[0-9a-f]+ <[^>]+> ed100585 cfldr32 mvfx0, \[r0, #-532\]
658 514: R_ARM_LDC_PC_G1 f
659 0[0-9a-f]+ <[^>]+> ed100585 cfldr32 mvfx0, \[r0, #-532\]
660 518: R_ARM_LDC_PC_G2 f
661 0[0-9a-f]+ <[^>]+> ed100585 cfldr32 mvfx0, \[r0, #-532\]
662 51c: R_ARM_LDC_SB_G0 f
663 0[0-9a-f]+ <[^>]+> ed100585 cfldr32 mvfx0, \[r0, #-532\]
664 520: R_ARM_LDC_SB_G1 f
665 0[0-9a-f]+ <[^>]+> ed100585 cfldr32 mvfx0, \[r0, #-532\]
666 524: R_ARM_LDC_SB_G2 f
667 0[0-9a-f]+ <[^>]+> ed000585 cfstr32 mvfx0, \[r0, #-532\]
668 528: R_ARM_LDC_PC_G0 f
669 0[0-9a-f]+ <[^>]+> ed000585 cfstr32 mvfx0, \[r0, #-532\]
670 52c: R_ARM_LDC_PC_G1 f
671 0[0-9a-f]+ <[^>]+> ed000585 cfstr32 mvfx0, \[r0, #-532\]
672 530: R_ARM_LDC_PC_G2 f
673 0[0-9a-f]+ <[^>]+> ed000585 cfstr32 mvfx0, \[r0, #-532\]
674 534: R_ARM_LDC_SB_G0 f
675 0[0-9a-f]+ <[^>]+> ed000585 cfstr32 mvfx0, \[r0, #-532\]
676 538: R_ARM_LDC_SB_G1 f
677 0[0-9a-f]+ <[^>]+> ed000585 cfstr32 mvfx0, \[r0, #-532\]
678 53c: R_ARM_LDC_SB_G2 f
679 0[0-9a-f]+ <[^>]+> edd00585 cfldr64 mvdx0, \[r0, #532\]
680 540: R_ARM_LDC_PC_G0 f
681 0[0-9a-f]+ <[^>]+> edd00585 cfldr64 mvdx0, \[r0, #532\]
682 544: R_ARM_LDC_PC_G1 f
683 0[0-9a-f]+ <[^>]+> edd00585 cfldr64 mvdx0, \[r0, #532\]
684 548: R_ARM_LDC_PC_G2 f
685 0[0-9a-f]+ <[^>]+> edd00585 cfldr64 mvdx0, \[r0, #532\]
686 54c: R_ARM_LDC_SB_G0 f
687 0[0-9a-f]+ <[^>]+> edd00585 cfldr64 mvdx0, \[r0, #532\]
688 550: R_ARM_LDC_SB_G1 f
689 0[0-9a-f]+ <[^>]+> edd00585 cfldr64 mvdx0, \[r0, #532\]
690 554: R_ARM_LDC_SB_G2 f
691 0[0-9a-f]+ <[^>]+> edc00585 cfstr64 mvdx0, \[r0, #532\]
692 558: R_ARM_LDC_PC_G0 f
693 0[0-9a-f]+ <[^>]+> edc00585 cfstr64 mvdx0, \[r0, #532\]
694 55c: R_ARM_LDC_PC_G1 f
695 0[0-9a-f]+ <[^>]+> edc00585 cfstr64 mvdx0, \[r0, #532\]
696 560: R_ARM_LDC_PC_G2 f
697 0[0-9a-f]+ <[^>]+> edc00585 cfstr64 mvdx0, \[r0, #532\]
698 564: R_ARM_LDC_SB_G0 f
699 0[0-9a-f]+ <[^>]+> edc00585 cfstr64 mvdx0, \[r0, #532\]
700 568: R_ARM_LDC_SB_G1 f
701 0[0-9a-f]+ <[^>]+> edc00585 cfstr64 mvdx0, \[r0, #532\]
702 56c: R_ARM_LDC_SB_G2 f
703 0[0-9a-f]+ <[^>]+> ed500585 cfldr64 mvdx0, \[r0, #-532\]
704 570: R_ARM_LDC_PC_G0 f
705 0[0-9a-f]+ <[^>]+> ed500585 cfldr64 mvdx0, \[r0, #-532\]
706 574: R_ARM_LDC_PC_G1 f
707 0[0-9a-f]+ <[^>]+> ed500585 cfldr64 mvdx0, \[r0, #-532\]
708 578: R_ARM_LDC_PC_G2 f
709 0[0-9a-f]+ <[^>]+> ed500585 cfldr64 mvdx0, \[r0, #-532\]
710 57c: R_ARM_LDC_SB_G0 f
711 0[0-9a-f]+ <[^>]+> ed500585 cfldr64 mvdx0, \[r0, #-532\]
712 580: R_ARM_LDC_SB_G1 f
713 0[0-9a-f]+ <[^>]+> ed500585 cfldr64 mvdx0, \[r0, #-532\]
714 584: R_ARM_LDC_SB_G2 f
715 0[0-9a-f]+ <[^>]+> ed400585 cfstr64 mvdx0, \[r0, #-532\]
716 588: R_ARM_LDC_PC_G0 f
717 0[0-9a-f]+ <[^>]+> ed400585 cfstr64 mvdx0, \[r0, #-532\]
718 58c: R_ARM_LDC_PC_G1 f
719 0[0-9a-f]+ <[^>]+> ed400585 cfstr64 mvdx0, \[r0, #-532\]
720 590: R_ARM_LDC_PC_G2 f
721 0[0-9a-f]+ <[^>]+> ed400585 cfstr64 mvdx0, \[r0, #-532\]
722 594: R_ARM_LDC_SB_G0 f
723 0[0-9a-f]+ <[^>]+> ed400585 cfstr64 mvdx0, \[r0, #-532\]
724 598: R_ARM_LDC_SB_G1 f
725 0[0-9a-f]+ <[^>]+> ed400585 cfstr64 mvdx0, \[r0, #-532\]
726 59c: R_ARM_LDC_SB_G2 f