2 // Detect WAW violations. Cases taken from DV tables.
25 // AR[FPSR].sf0.controls
30 // AR[FPSR].sf1.controls
35 // AR[FPSR].sf2.controls
40 // AR[FPSR].sf3.controls
46 fcmp.eq.s0 p1, p2 = f3, f4
47 fcmp.eq.s0 p3, p4 = f3, f4 // no DV here
49 fcmp.eq.s0 p1, p2 = f3, f4
54 fcmp.eq.s1 p1, p2 = f3, f4
55 fcmp.eq.s1 p3, p4 = f3, f4 // no DV here
57 fcmp.eq.s1 p1, p2 = f3, f4
62 fcmp.eq.s2 p1, p2 = f3, f4
63 fcmp.eq.s2 p3, p4 = f3, f4 // no DV here
65 fcmp.eq.s2 p1, p2 = f3, f4
70 fcmp.eq.s3 p1, p2 = f3, f4
71 fcmp.eq.s3 p3, p4 = f3, f4 // no DV here
73 fcmp.eq.s3 p1, p2 = f3, f4
77 // AR[FPSR].traps/rv plus all controls/flags
102 // AR[RNAT] (see also AR[BSPSTORE])
142 // CR[EOI] (and InService)
188 // CR[IRR%] (and others)
218 // CR[IVR] (no explicit writers)
227 mov cr.lrr1 = r0 // no DV here
256 ptc.e r1 // no DVs here
258 ptc.e r0 // (and others)
264 ptc.g r0, r1 // NOTE: GAS automatically emits stops after
265 ptc.ga r2, r3 // ptc.g/ptc.ga, so this conflict is no
266 ;; // longer possible in GAS-generated assembly
270 itr.d dtr[r0] = r1 // (and others)
314 mov pkr[r2] = r1 // no DV here
331 cmp.eq p1, p0 = r0, r1
332 cmp.eq p1, p0 = r2, r3
334 fcmp.eq p1, p2 = f2, f3
335 fcmp.eq p1, p3 = f2, f3
337 cmp.eq.and p1, p2 = r0, r1
338 cmp.eq.or p1, p3 = r2, r3
340 cmp.eq.or p1, p3 = r2, r3
341 cmp.eq.and p1, p2 = r0, r1
343 cmp.eq.and p1, p2 = r0, r1
344 cmp.eq.and p1, p3 = r2, r3 // no DV here
346 cmp.eq.or p1, p2 = r0, r1
347 cmp.eq.or p1, p3 = r2, r3 // no DV here
354 cmp.eq p63, p0 = r0, r1
355 cmp.eq p63, p0 = r2, r3
357 fcmp.eq p63, p2 = f2, f3
358 fcmp.eq p63, p3 = f2, f3
360 cmp.eq.and p63, p2 = r0, r1
361 cmp.eq.or p63, p3 = r2, r3
363 cmp.eq.or p63, p3 = r2, r3
364 cmp.eq.and p63, p2 = r0, r1
366 cmp.eq.and p63, p2 = r0, r1
367 cmp.eq.and p63, p3 = r2, r3 // no DV here
369 cmp.eq.or p63, p2 = r0, r1
370 cmp.eq.or p63, p3 = r2, r3 // no DV here
384 bsw.0 // GAS automatically emits a stop after bsw.n
385 bsw.0 // so this conflict is avoided
393 // PSR.da (rfi is the only writer)
394 // PSR.db (and others)
400 // PSR.dd (rfi is the only writer)
424 // PSR.ed (rfi is the only writer)
430 // PSR.ia (no DV semantics)
436 // PSR.id (rfi is the only writer)
437 // PSR.is (br.ia and rfi are the only writers)
438 // PSR.it (rfi is the only writer)
439 // PSR.lp (see PSR.db)
441 // PSR.mc (rfi is the only writer)
456 mov f34 = f35 // no DV here
473 mov f4 = f5 // no DV here
486 // PSR.ri (no DV semantics)
487 // PSR.rt (see PSR.db)
500 // PSR.ss (rfi is the only writer)
501 // PSR.tb (see PSR.db)
516 // PR, additional cases (or.andcm and and.orcm interaction)
517 cmp.eq.or.andcm p6, p7 = 1, r32
518 cmp.eq.or.andcm p6, p7 = 5, r36 // no DV here
520 cmp.eq.and.orcm p6, p7 = 1, r32
521 cmp.eq.and.orcm p6, p7 = 5, r36 // no DV here
523 cmp.eq.or.andcm p63, p7 = 1, r32
524 cmp.eq.or.andcm p63, p7 = 5, r36 // no DV here
526 cmp.eq.or.andcm p6, p63 = 1, r32
527 cmp.eq.or.andcm p6, p63 = 5, r36 // no DV here
529 cmp.eq.and.orcm p63, p7 = 1, r32
530 cmp.eq.and.orcm p63, p7 = 5, r36 // no DV here
532 cmp.eq.and.orcm p6, p63 = 1, r32
533 cmp.eq.and.orcm p6, p63 = 5, r36 // no DV here
535 cmp.eq.or.andcm p6, p7 = 1, r32
536 cmp.eq.and.orcm p6, p7 = 5, r36
538 cmp.eq.or.andcm p63, p7 = 1, r32
539 cmp.eq.and.orcm p63, p7 = 5, r36
541 cmp.eq.or.andcm p6, p63 = 1, r32
542 cmp.eq.and.orcm p6, p63 = 5, r36
546 cmp.eq p21, p0 = r0, r1
547 cmp.eq p21, p0 = r2, r3
549 fcmp.eq p21, p22 = f2, f3
550 fcmp.eq p21, p23 = f2, f3
552 cmp.eq.and p21, p22 = r0, r1
553 cmp.eq.or p21, p23 = r2, r3
555 cmp.eq.or p21, p23 = r2, r3
556 cmp.eq.and p21, p22 = r0, r1
558 cmp.eq.and p21, p22 = r0, r1
559 cmp.eq.and p21, p23 = r2, r3 // no DV here
561 cmp.eq.or p21, p22 = r0, r1
562 cmp.eq.or p21, p23 = r2, r3 // no DV here