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1 .text
2 .type _start,@function
3 _start:
4
5 pmpyshr2 r4 = r5, r6, 0
6 pmpyshr2.u r4 = r5, r6, 16
7
8 pmpy2.r r4 = r5, r6
9 pmpy2.l r4 = r5, r6
10
11 mix1.r r4 = r5, r6
12 mix2.r r4 = r5, r6
13 mix4.r r4 = r5, r6
14 mix1.l r4 = r5, r6
15 mix2.l r4 = r5, r6
16 mix4.l r4 = r5, r6
17
18 pack2.uss r4 = r5, r6
19 pack2.sss r4 = r5, r6
20 pack4.sss r4 = r5, r6
21
22 unpack1.h r4 = r5, r6
23 unpack2.h r4 = r5, r6
24 unpack4.h r4 = r5, r6
25 unpack1.l r4 = r5, r6
26 unpack2.l r4 = r5, r6
27 unpack4.l r4 = r5, r6
28
29 pmin1.u r4 = r5, r6
30 pmax1.u r4 = r5, r6
31
32 pmin2 r4 = r5, r6
33 pmax2 r4 = r5, r6
34
35 psad1 r4 = r5, r6
36
37 mux1 r4 = r5, @rev
38 mux1 r4 = r5, @mix
39 mux1 r4 = r5, @shuf
40 mux1 r4 = r5, @alt
41 mux1 r4 = r5, @brcst
42
43 mux2 r4 = r5, 0
44 mux2 r4 = r5, 0xff
45 mux2 r4 = r5, 0xaa
46
47 pshr2 r4 = r5, r6
48 pshr2 r4 = r5, 0
49 pshr2 r4 = r5, 8
50 pshr2 r4 = r5, 31
51
52 pshr4 r4 = r5, r6
53 pshr4 r4 = r5, 0
54 pshr4 r4 = r5, 8
55 pshr4 r4 = r5, 31
56
57 pshr2.u r4 = r5, r6
58 pshr2.u r4 = r5, 0
59 pshr2.u r4 = r5, 8
60 pshr2.u r4 = r5, 31
61
62 pshr4.u r4 = r5, r6
63 pshr4.u r4 = r5, 0
64 pshr4.u r4 = r5, 8
65 pshr4.u r4 = r5, 31
66
67 shr r4 = r5, r6
68 shr.u r4 = r5, r6
69
70 pshl2 r4 = r5, r6
71 pshl2 r4 = r5, 0
72 pshl2 r4 = r5, 8
73 pshl2 r4 = r5, 31
74
75 pshl4 r4 = r5, r6
76 pshl4 r4 = r5, 0
77 pshl4 r4 = r5, 8
78 pshl4 r4 = r5, 31
79
80 shl r4 = r5, r6
81
82 popcnt r4 = r5
83
84 shrp r4 = r5, r6, 0
85 shrp r4 = r5, r6, 12
86 shrp r4 = r5, r6, 63
87
88 extr r4 = r5, 0, 16
89 extr r4 = r5, 0, 63
90 extr r4 = r5, 10, 40
91
92 extr.u r4 = r5, 0, 16
93 extr.u r4 = r5, 0, 63
94 extr.u r4 = r5, 10, 40
95
96 dep.z r4 = r5, 0, 16
97 dep.z r4 = r5, 0, 63
98 dep.z r4 = r5, 10, 40
99 dep.z r4 = 0, 0, 16
100 dep.z r4 = 127, 0, 63
101 dep.z r4 = -128, 5, 50
102 dep.z r4 = 0x55, 10, 40
103
104 dep r4 = 0, r5, 0, 16
105 dep r4 = -1, r5, 0, 63
106 // Insert padding NOPs to force the same template selection as IAS.
107 nop.m 0
108 nop.f 0
109 dep r4 = r5, r6, 10, 7
110
111 movl r4 = 0
112 movl r4 = 0xffffffffffffffff
113 movl r4 = 0x1234567890abcdef
114
115 break.i 0
116 break.i 0x1fffff
117
118 nop.i 0
119 nop.i 0x1fffff
120
121 chk.s.i r4, _start
122
123 mov r4 = b0
124 mov b0 = r4
125
126 mov pr = r4, 0
127 mov pr = r4, 0x1234
128 mov pr = r4, 0x1ffff
129
130 mov pr.rot = 0
131 // ??? This was originally 0x3ffffff, but that generates an assembler warning
132 // that the testsuite infrastructure isn't set up to ignore.
133 mov pr.rot = 0x3ff0000
134 mov pr.rot = -0x4000000
135
136 zxt1 r4 = r5
137 zxt2 r4 = r5
138 zxt4 r4 = r5
139
140 sxt1 r4 = r5
141 sxt2 r4 = r5
142 sxt4 r4 = r5
143
144 czx1.l r4 = r5
145 czx2.l r4 = r5
146 czx1.r r4 = r5
147 czx2.r r4 = r5
148
149 tbit.z p2, p3 = r4, 0
150 tbit.z.unc p2, p3 = r4, 1
151 tbit.z.and p2, p3 = r4, 2
152 tbit.z.or p2, p3 = r4, 3
153 tbit.z.or.andcm p2, p3 = r4, 4
154 tbit.z.orcm p2, p3 = r4, 5
155 tbit.z.andcm p2, p3 = r4, 6
156 tbit.z.and.orcm p2, p3 = r4, 7
157 tbit.nz p2, p3 = r4, 8
158 tbit.nz.unc p2, p3 = r4, 9
159 tbit.nz.and p2, p3 = r4, 10
160 tbit.nz.or p2, p3 = r4, 11
161 tbit.nz.or.andcm p2, p3 = r4, 12
162 tbit.nz.orcm p2, p3 = r4, 13
163 tbit.nz.andcm p2, p3 = r4, 14
164 tbit.nz.and.orcm p2, p3 = r4, 15
165
166 tnat.z p2, p3 = r4
167 tnat.z.unc p2, p3 = r4
168 tnat.z.and p2, p3 = r4
169 tnat.z.or p2, p3 = r4
170 tnat.z.or.andcm p2, p3 = r4
171 tnat.z.orcm p2, p3 = r4
172 tnat.z.andcm p2, p3 = r4
173 tnat.z.and.orcm p2, p3 = r4
174 tnat.nz p2, p3 = r4
175 tnat.nz.unc p2, p3 = r4
176 tnat.nz.and p2, p3 = r4
177 tnat.nz.or p2, p3 = r4
178 tnat.nz.or.andcm p2, p3 = r4
179 tnat.nz.orcm p2, p3 = r4
180 tnat.nz.andcm p2, p3 = r4
181 tnat.nz.and.orcm p2, p3 = r4
182
183 mov b3 = r4, .L1
184 mov.imp b3 = r4, .L1
185 .space 240
186 .L1:
187 mov.sptk b3 = r4, .L2
188 mov.sptk.imp b3 = r4, .L2
189 .space 240
190 .L2:
191 mov.dptk b3 = r4, .L3
192 mov.dptk.imp b3 = r4, .L3
193 .space 240
194 .L3:
195
196 mov.ret b3 = r4, .L4
197 mov.ret.imp b3 = r4, .L4
198 .space 240
199 .L4:
200 mov.ret.sptk b3 = r4, .L5
201 mov.ret.sptk.imp b3 = r4, .L5
202 .space 240
203 .L5:
204 mov.ret.dptk b3 = r4, .L6
205 mov.ret.dptk.imp b3 = r4, .L6
206 .space 240
207 .L6:
208
209 # instructions added by SDM2.1:
210
211 hint @pause
212 hint.i 0
213 hint.i @pause
214 hint.i 0x1fffff
215 (p7) hint @pause
216 (p7) hint.i 0
217 (p7) hint.i @pause
218 (p7) hint.i 0x1fffff
219 (p7) hint @pause
220 (p7) hint.i 0
221 (p7) hint.i @pause
222 (p7) hint.i 0x1fffff
223
224 # instructions added by SDM2.2:
225
226 tf.z p2, p3 = 39
227 tf.z.unc p2, p3 = 39
228 tf.z.and p2, p3 = 39
229 tf.z.or p2, p3 = 39
230 tf.z.or.andcm p2, p3 = 39
231 tf.z.orcm p2, p3 = 39
232 tf.z.andcm p2, p3 = 39
233 tf.z.and.orcm p2, p3 = 39
234 tf.nz p2, p3 = 39
235 tf.nz.unc p2, p3 = 39
236 tf.nz.and p2, p3 = 39
237 tf.nz.or p2, p3 = 39
238 tf.nz.or.andcm p2, p3 = 39
239 tf.nz.orcm p2, p3 = 39
240 tf.nz.andcm p2, p3 = 39
241 tf.nz.and.orcm p2, p3 = 39
242
243 (p7) tf.z p2, p3 = 39
244 (p7) tf.z.unc p2, p3 = 39
245 (p7) tf.z.and p2, p3 = 39
246 (p7) tf.z.or p2, p3 = 39
247 (p7) tf.z.or.andcm p2, p3 = 39
248 (p7) tf.z.orcm p2, p3 = 39
249 (p7) tf.z.andcm p2, p3 = 39
250 (p7) tf.z.and.orcm p2, p3 = 39
251 (p7) tf.nz p2, p3 = 39
252 (p7) tf.nz.unc p2, p3 = 39
253 (p7) tf.nz.and p2, p3 = 39
254 (p7) tf.nz.or p2, p3 = 39
255 (p7) tf.nz.or.andcm p2, p3 = 39
256 (p7) tf.nz.orcm p2, p3 = 39
257 (p7) tf.nz.andcm p2, p3 = 39
258 (p7) tf.nz.and.orcm p2, p3 = 39