gcc/common/config/i386/i386-cpuinfo.h

   1 /* Get CPU type and Features for x86 processors.
   2    Copyright (C) 2012-2024 Free Software Foundation, Inc.
   3    Contributed by Sriraman Tallam (tmsriram@google.com)
   4
   5 This file is part of GCC.
   6
   7 GCC is free software; you can redistribute it and/or modify it under
   8 the terms of the GNU General Public License as published by the Free
   9 Software Foundation; either version 3, or (at your option) any later
  10 version.
  11
  12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  15 for more details.
  16
  17 Under Section 7 of GPL version 3, you are granted additional
  18 permissions described in the GCC Runtime Library Exception, version
  19 3.1, as published by the Free Software Foundation.
  20
  21 You should have received a copy of the GNU General Public License and
  22 a copy of the GCC Runtime Library Exception along with this program;
  23 see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  24 <http://www.gnu.org/licenses/>.  */
  25
  26 /* Processor Vendor and Models. */
  27
  28 enum processor_vendor
  29 {
  30   VENDOR_INTEL = 1,
  31   VENDOR_AMD,
  32   VENDOR_ZHAOXIN,
  33   VENDOR_OTHER,
  34   VENDOR_CENTAUR,
  35   VENDOR_CYRIX,
  36   VENDOR_NSC,
  37
  38   /* Maximum values must be at the end of this enum.  */
  39   VENDOR_MAX,
  40   BUILTIN_VENDOR_MAX = VENDOR_OTHER
  41 };
  42
  43 /* Any new types or subtypes have to be inserted at the end. */
  44
  45 enum processor_types
  46 {
  47   INTEL_BONNELL = 1,
  48   INTEL_CORE2,
  49   INTEL_COREI7,
  50   AMDFAM10H,
  51   AMDFAM15H,
  52   INTEL_SILVERMONT,
  53   AMD_BTVER1 = 8,
  54   AMD_BTVER2,
  55   AMDFAM17H,
  56   INTEL_GOLDMONT = 12,
  57   INTEL_GOLDMONT_PLUS,
  58   INTEL_TREMONT,
  59   AMDFAM19H,
  60   ZHAOXIN_FAM7H,
  61   INTEL_SIERRAFOREST,
  62   INTEL_GRANDRIDGE,
  63   INTEL_CLEARWATERFOREST,
  64   AMDFAM1AH,
  65   CPU_TYPE_MAX,
  66   BUILTIN_CPU_TYPE_MAX = CPU_TYPE_MAX
  67 };
  68
  69 enum processor_subtypes
  70 {
  71   INTEL_COREI7_NEHALEM = 1,
  72   INTEL_COREI7_WESTMERE,
  73   INTEL_COREI7_SANDYBRIDGE,
  74   AMDFAM10H_BARCELONA,
  75   AMDFAM10H_SHANGHAI,
  76   AMDFAM10H_ISTANBUL,
  77   AMDFAM15H_BDVER1,
  78   AMDFAM15H_BDVER2,
  79   AMDFAM15H_BDVER3,
  80   AMDFAM15H_BDVER4,
  81   AMDFAM17H_ZNVER1,
  82   INTEL_COREI7_IVYBRIDGE,
  83   INTEL_COREI7_HASWELL,
  84   INTEL_COREI7_BROADWELL,
  85   INTEL_COREI7_SKYLAKE,
  86   INTEL_COREI7_SKYLAKE_AVX512,
  87   INTEL_COREI7_CANNONLAKE,
  88   INTEL_COREI7_ICELAKE_CLIENT,
  89   INTEL_COREI7_ICELAKE_SERVER,
  90   AMDFAM17H_ZNVER2,
  91   INTEL_COREI7_CASCADELAKE,
  92   INTEL_COREI7_TIGERLAKE,
  93   INTEL_COREI7_COOPERLAKE,
  94   INTEL_COREI7_SAPPHIRERAPIDS,
  95   INTEL_COREI7_ALDERLAKE,
  96   AMDFAM19H_ZNVER3,
  97   INTEL_COREI7_ROCKETLAKE,
  98   ZHAOXIN_FAM7H_LUJIAZUI,
  99   AMDFAM19H_ZNVER4,
 100   INTEL_COREI7_GRANITERAPIDS,
 101   INTEL_COREI7_GRANITERAPIDS_D,
 102   INTEL_COREI7_ARROWLAKE,
 103   INTEL_COREI7_ARROWLAKE_S,
 104   INTEL_COREI7_PANTHERLAKE,
 105   ZHAOXIN_FAM7H_YONGFENG,
 106   AMDFAM1AH_ZNVER5,
 107   CPU_SUBTYPE_MAX
 108 };
 109
 110 /* Priority of i386 features, greater value is higher priority.   This is
 111    used to decide the order in which function dispatch must happen.  For
 112    instance, a version specialized for SSE4.2 should be checked for dispatch
 113    before a version for SSE3.  */
 114 enum feature_priority
 115 {
 116   P_NONE = 0,
 117   P_MMX,
 118   P_SSE,
 119   P_SSE2,
 120   P_X86_64_BASELINE,
 121   P_SSE3,
 122   P_SSSE3,
 123   P_PROC_SSSE3,
 124   P_SSE4_A,
 125   P_PROC_SSE4_A,
 126   P_SSE4_1,
 127   P_SSE4_2,
 128   P_PROC_SSE4_2,
 129   P_POPCNT,
 130   P_X86_64_V2,
 131   P_AES,
 132   P_PCLMUL,
 133   P_AVX,
 134   P_PROC_AVX,
 135   P_BMI,
 136   P_PROC_BMI,
 137   P_FMA4,
 138   P_XOP,
 139   P_PROC_XOP,
 140   P_FMA,
 141   P_PROC_FMA,
 142   P_BMI2,
 143   P_AVX2,
 144   P_PROC_AVX2,
 145   P_X86_64_V3,
 146   P_AVX512F,
 147   P_PROC_AVX512F,
 148   P_X86_64_V4,
 149   P_AVX10_1_256,
 150   P_AVX10_1_512,
 151   P_PROC_AVX10_1_512,
 152   P_PROC_DYNAMIC
 153 };
 154
 155 /* ISA Features supported. New features have to be inserted at the end.  */
 156
 157 enum processor_features
 158 {
 159   FEATURE_CMOV = 0,
 160   FEATURE_MMX,
 161   FEATURE_POPCNT,
 162   FEATURE_SSE,
 163   FEATURE_SSE2,
 164   FEATURE_SSE3,
 165   FEATURE_SSSE3,
 166   FEATURE_SSE4_1,
 167   FEATURE_SSE4_2,
 168   FEATURE_AVX,
 169   FEATURE_AVX2,
 170   FEATURE_SSE4_A,
 171   FEATURE_FMA4,
 172   FEATURE_XOP,
 173   FEATURE_FMA,
 174   FEATURE_AVX512F,
 175   FEATURE_BMI,
 176   FEATURE_BMI2,
 177   FEATURE_AES,
 178   FEATURE_PCLMUL,
 179   FEATURE_AVX512VL,
 180   FEATURE_AVX512BW,
 181   FEATURE_AVX512DQ,
 182   FEATURE_AVX512CD,
 183   FEATURE_AVX512VBMI = 26,
 184   FEATURE_AVX512IFMA,
 185   FEATURE_AVX512VPOPCNTDQ = 30,
 186   FEATURE_AVX512VBMI2,
 187   FEATURE_GFNI,
 188   FEATURE_VPCLMULQDQ,
 189   FEATURE_AVX512VNNI,
 190   FEATURE_AVX512BITALG,
 191   FEATURE_AVX512BF16,
 192   FEATURE_AVX512VP2INTERSECT,
 193   FEATURE_3DNOW,
 194   FEATURE_3DNOWP,
 195   FEATURE_ADX,
 196   FEATURE_ABM,
 197   FEATURE_CLDEMOTE,
 198   FEATURE_CLFLUSHOPT,
 199   FEATURE_CLWB,
 200   FEATURE_CLZERO,
 201   FEATURE_CMPXCHG16B,
 202   FEATURE_CMPXCHG8B,
 203   FEATURE_ENQCMD,
 204   FEATURE_F16C,
 205   FEATURE_FSGSBASE,
 206   FEATURE_FXSAVE,
 207   FEATURE_HLE,
 208   FEATURE_IBT,
 209   FEATURE_LAHF_LM,
 210   FEATURE_LM,
 211   FEATURE_LWP,
 212   FEATURE_LZCNT,
 213   FEATURE_MOVBE,
 214   FEATURE_MOVDIR64B,
 215   FEATURE_MOVDIRI,
 216   FEATURE_MWAITX,
 217   FEATURE_OSXSAVE,
 218   FEATURE_PCONFIG,
 219   FEATURE_PKU,
 220   FEATURE_PRFCHW = 66,
 221   FEATURE_PTWRITE,
 222   FEATURE_RDPID,
 223   FEATURE_RDRND,
 224   FEATURE_RDSEED,
 225   FEATURE_RTM,
 226   FEATURE_SERIALIZE,
 227   FEATURE_SGX,
 228   FEATURE_SHA,
 229   FEATURE_SHSTK,
 230   FEATURE_TBM,
 231   FEATURE_TSXLDTRK,
 232   FEATURE_VAES,
 233   FEATURE_WAITPKG,
 234   FEATURE_WBNOINVD,
 235   FEATURE_XSAVE,
 236   FEATURE_XSAVEC,
 237   FEATURE_XSAVEOPT,
 238   FEATURE_XSAVES,
 239   FEATURE_AMX_TILE,
 240   FEATURE_AMX_INT8,
 241   FEATURE_AMX_BF16,
 242   FEATURE_UINTR,
 243   FEATURE_HRESET,
 244   FEATURE_KL,
 245   FEATURE_AESKLE,
 246   FEATURE_WIDEKL,
 247   FEATURE_AVXVNNI,
 248   FEATURE_AVX512FP16,
 249   FEATURE_X86_64_BASELINE,
 250   FEATURE_X86_64_V2,
 251   FEATURE_X86_64_V3,
 252   FEATURE_X86_64_V4,
 253   FEATURE_AVXIFMA,
 254   FEATURE_AVXVNNIINT8,
 255   FEATURE_AVXNECONVERT,
 256   FEATURE_CMPCCXADD,
 257   FEATURE_AMX_FP16,
 258   FEATURE_PREFETCHI,
 259   FEATURE_RAOINT,
 260   FEATURE_AMX_COMPLEX,
 261   FEATURE_AVXVNNIINT16,
 262   FEATURE_SM3,
 263   FEATURE_SHA512,
 264   FEATURE_SM4,
 265   FEATURE_APX_F,
 266   FEATURE_USER_MSR,
 267   FEATURE_AVX10_1_256,
 268   FEATURE_AVX10_1_512,
 269   CPU_FEATURE_MAX
 270 };
 271
 272 /* Size of __cpu_features2 array in libgcc/config/i386/cpuinfo.c.  */
 273 #define SIZE_OF_CPU_FEATURES ((CPU_FEATURE_MAX - 1) / 32)
 274
 275 /* These are the values for vendor types, cpu types and subtypes.  Cpu
 276    types and subtypes should be subtracted by the corresponding start
 277    value.  */
 278
 279 #define M_CPU_TYPE_START (BUILTIN_VENDOR_MAX)
 280 #define M_CPU_SUBTYPE_START \
 281   (M_CPU_TYPE_START + BUILTIN_CPU_TYPE_MAX)
 282 #define M_VENDOR(a) (a)
 283 #define M_CPU_TYPE(a) (M_CPU_TYPE_START + a)
 284 #define M_CPU_SUBTYPE(a) (M_CPU_SUBTYPE_START + a)