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1 /* Definitions of target machine for GNU compiler, for ARM with a.out
2 Copyright (C) 1995-2021 Free Software Foundation, Inc.
3 Contributed by Richard Earnshaw (rearnsha@armltd.co.uk).
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 Under Section 7 of GPL version 3, you are granted additional
18 permissions described in the GCC Runtime Library Exception, version
19 3.1, as published by the Free Software Foundation.
20
21 You should have received a copy of the GNU General Public License and
22 a copy of the GCC Runtime Library Exception along with this program;
23 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
24 <http://www.gnu.org/licenses/>. */
25
26 #ifndef ASM_APP_ON
27 #define ASM_APP_ON ""
28 #endif
29 #ifndef ASM_APP_OFF
30 #define ASM_APP_OFF ""
31 #endif
32
33 /* Switch to the text or data segment. */
34 #define TEXT_SECTION_ASM_OP "\t.text"
35 #define DATA_SECTION_ASM_OP "\t.data"
36 #define BSS_SECTION_ASM_OP "\t.bss"
37
38 /* Note: If USER_LABEL_PREFIX or LOCAL_LABEL_PREFIX are changed,
39 make sure that this change is reflected in the function
40 coff_arm_is_local_label_name() in bfd/coff-arm.c. */
41 #ifndef REGISTER_PREFIX
42 #define REGISTER_PREFIX ""
43 #endif
44
45 #ifndef USER_LABEL_PREFIX
46 #define USER_LABEL_PREFIX "_"
47 #endif
48
49 #ifndef LOCAL_LABEL_PREFIX
50 #define LOCAL_LABEL_PREFIX ""
51 #endif
52
53 /* The assembler's names for the registers. Note that the ?xx registers are
54 there so that VFPv3/NEON registers D16-D31 have the same spacing as D0-D15
55 (each of which is overlaid on two S registers), although there are no
56 actual single-precision registers which correspond to D16-D31. New register
57 p0 is added which is used for MVE predicated cases. */
58
59 #ifndef REGISTER_NAMES
60 #define REGISTER_NAMES \
61 { \
62 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
63 "r8", "r9", "r10", "fp", "ip", "sp", "lr", "pc", \
64 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
65 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", \
66 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", \
67 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", \
68 "d16", "?16", "d17", "?17", "d18", "?18", "d19", "?19", \
69 "d20", "?20", "d21", "?21", "d22", "?22", "d23", "?23", \
70 "d24", "?24", "d25", "?25", "d26", "?26", "d27", "?27", \
71 "d28", "?28", "d29", "?29", "d30", "?30", "d31", "?31", \
72 "wr0", "wr1", "wr2", "wr3", \
73 "wr4", "wr5", "wr6", "wr7", \
74 "wr8", "wr9", "wr10", "wr11", \
75 "wr12", "wr13", "wr14", "wr15", \
76 "wcgr0", "wcgr1", "wcgr2", "wcgr3", \
77 "cc", "vfpcc", "sfp", "afp", "apsrq", "apsrge", "p0" \
78 }
79 #endif
80
81 #ifndef ADDITIONAL_REGISTER_NAMES
82 #define ADDITIONAL_REGISTER_NAMES \
83 { \
84 {"a1", 0}, \
85 {"a2", 1}, \
86 {"a3", 2}, \
87 {"a4", 3}, \
88 {"v1", 4}, \
89 {"v2", 5}, \
90 {"v3", 6}, \
91 {"v4", 7}, \
92 {"v5", 8}, \
93 {"v6", 9}, \
94 {"rfp", 9}, /* Historical. */ \
95 {"sb", 9}, /* Historical. */ \
96 {"v7", 10}, \
97 {"sl", 10}, /* Historical. */ \
98 {"r11", 11}, /* fp */ \
99 {"r12", 12}, /* ip */ \
100 {"r13", 13}, /* sp */ \
101 {"r14", 14}, /* lr */ \
102 {"r15", 15} /* pc */ \
103 }
104 #endif
105
106 #ifndef OVERLAPPING_REGISTER_NAMES
107 #define OVERLAPPING_REGISTER_NAMES \
108 { \
109 {"d0", FIRST_VFP_REGNUM + 0, 2}, \
110 {"d1", FIRST_VFP_REGNUM + 2, 2}, \
111 {"d2", FIRST_VFP_REGNUM + 4, 2}, \
112 {"d3", FIRST_VFP_REGNUM + 6, 2}, \
113 {"d4", FIRST_VFP_REGNUM + 8, 2}, \
114 {"d5", FIRST_VFP_REGNUM + 10, 2}, \
115 {"d6", FIRST_VFP_REGNUM + 12, 2}, \
116 {"d7", FIRST_VFP_REGNUM + 14, 2}, \
117 {"d8", FIRST_VFP_REGNUM + 16, 2}, \
118 {"d9", FIRST_VFP_REGNUM + 18, 2}, \
119 {"d10", FIRST_VFP_REGNUM + 20, 2}, \
120 {"d11", FIRST_VFP_REGNUM + 22, 2}, \
121 {"d12", FIRST_VFP_REGNUM + 24, 2}, \
122 {"d13", FIRST_VFP_REGNUM + 26, 2}, \
123 {"d14", FIRST_VFP_REGNUM + 28, 2}, \
124 {"d15", FIRST_VFP_REGNUM + 30, 2}, \
125 {"q0", FIRST_VFP_REGNUM + 0, 4}, \
126 {"q1", FIRST_VFP_REGNUM + 4, 4}, \
127 {"q2", FIRST_VFP_REGNUM + 8, 4}, \
128 {"q3", FIRST_VFP_REGNUM + 12, 4}, \
129 {"q4", FIRST_VFP_REGNUM + 16, 4}, \
130 {"q5", FIRST_VFP_REGNUM + 20, 4}, \
131 {"q6", FIRST_VFP_REGNUM + 24, 4}, \
132 {"q7", FIRST_VFP_REGNUM + 28, 4}, \
133 {"q8", FIRST_VFP_REGNUM + 32, 4}, \
134 {"q9", FIRST_VFP_REGNUM + 36, 4}, \
135 {"q10", FIRST_VFP_REGNUM + 40, 4}, \
136 {"q11", FIRST_VFP_REGNUM + 44, 4}, \
137 {"q12", FIRST_VFP_REGNUM + 48, 4}, \
138 {"q13", FIRST_VFP_REGNUM + 52, 4}, \
139 {"q14", FIRST_VFP_REGNUM + 56, 4}, \
140 {"q15", FIRST_VFP_REGNUM + 60, 4} \
141 }
142 #endif
143
144 #ifndef NO_DOLLAR_IN_LABEL
145 #define NO_DOLLAR_IN_LABEL 1
146 #endif
147
148 /* Generate DBX debugging information. riscix.h will undefine this because
149 the native assembler does not support stabs. */
150 #define DBX_DEBUGGING_INFO 1
151
152 /* Acorn dbx moans about continuation chars, so don't use any. */
153 #ifndef DBX_CONTIN_LENGTH
154 #define DBX_CONTIN_LENGTH 0
155 #endif
156
157 /* Output a function label definition. */
158 #ifndef ASM_DECLARE_FUNCTION_NAME
159 #define ASM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL) \
160 do \
161 { \
162 ARM_DECLARE_FUNCTION_NAME (STREAM, NAME, DECL); \
163 ASM_OUTPUT_LABEL (STREAM, NAME); \
164 } \
165 while (0)
166 #endif
167
168 /* Globalizing directive for a label. */
169 #define GLOBAL_ASM_OP "\t.global\t"
170
171 /* Make an internal label into a string. */
172 #ifndef ASM_GENERATE_INTERNAL_LABEL
173 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
174 sprintf (STRING, "*%s%s%u", LOCAL_LABEL_PREFIX, PREFIX, (unsigned int)(NUM))
175 #endif
176
177 /* Output an element of a dispatch table. */
178 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
179 do \
180 { \
181 gcc_assert (!TARGET_THUMB2); \
182 asm_fprintf (STREAM, "\t.word\t%LL%d\n", VALUE); \
183 } \
184 while (0)
185
186
187 /* Thumb-2 always uses addr_diff_elf so that the Table Branch instructions
188 can be used. For non-pic code where the offsets do not suitable for
189 TBB/TBH the elements are output as absolute labels. */
190 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
191 do \
192 { \
193 if (TARGET_ARM) \
194 asm_fprintf (STREAM, "\tb\t%LL%d\n", VALUE); \
195 else if (TARGET_THUMB1) \
196 { \
197 if (flag_pic || optimize_size) \
198 { \
199 switch (GET_MODE(body)) \
200 { \
201 case E_QImode: \
202 asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n", \
203 VALUE, REL); \
204 break; \
205 case E_HImode: /* TBH */ \
206 asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n", \
207 VALUE, REL); \
208 break; \
209 case E_SImode: \
210 asm_fprintf (STREAM, "\t.word\t%LL%d-%LL%d\n", \
211 VALUE, REL); \
212 break; \
213 default: \
214 gcc_unreachable(); \
215 } \
216 } \
217 else \
218 asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE); \
219 } \
220 else /* Thumb-2 */ \
221 { \
222 switch (GET_MODE(body)) \
223 { \
224 case E_QImode: /* TBB */ \
225 asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n", \
226 VALUE, REL); \
227 break; \
228 case E_HImode: /* TBH */ \
229 asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n", \
230 VALUE, REL); \
231 break; \
232 case E_SImode: \
233 if (flag_pic) \
234 asm_fprintf (STREAM, "\t.word\t%LL%d+1-%LL%d\n", VALUE, REL); \
235 else \
236 asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE); \
237 break; \
238 default: \
239 gcc_unreachable(); \
240 } \
241 } \
242 } \
243 while (0)
244
245
246 #undef ASM_OUTPUT_ASCII
247 #define ASM_OUTPUT_ASCII(STREAM, PTR, LEN) \
248 output_ascii_pseudo_op (STREAM, (const unsigned char *) (PTR), LEN)
249
250 /* Output a gap. In fact we fill it with nulls. */
251 #undef ASM_OUTPUT_SKIP
252 #define ASM_OUTPUT_SKIP(STREAM, NBYTES) \
253 fprintf (STREAM, "\t.space\t%d\n", (int) (NBYTES))
254
255 /* Align output to a power of two. Horrible /bin/as. */
256 #ifndef ASM_OUTPUT_ALIGN
257 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
258 do \
259 { \
260 register int amount = 1 << (POWER); \
261 \
262 if (amount == 2) \
263 fprintf (STREAM, "\t.even\n"); \
264 else if (amount != 1) \
265 fprintf (STREAM, "\t.align\t%d\n", amount - 4); \
266 } \
267 while (0)
268 #endif
269
270 /* Output a common block. */
271 #ifndef ASM_OUTPUT_COMMON
272 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
273 do \
274 { \
275 fprintf (STREAM, "\t.comm\t"); \
276 assemble_name (STREAM, NAME); \
277 asm_fprintf (STREAM, ", %d\t%@ %d\n", \
278 (int)(ROUNDED), (int)(SIZE)); \
279 } \
280 while (0)
281 #endif
282
283 /* Output a local common block. /bin/as can't do this, so hack a
284 `.space' into the bss segment. Note that this is *bad* practice,
285 which is guaranteed NOT to work since it doesn't define STATIC
286 COMMON space but merely STATIC BSS space. */
287 #ifndef ASM_OUTPUT_ALIGNED_LOCAL
288 #define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN) \
289 do \
290 { \
291 switch_to_section (bss_section); \
292 ASM_OUTPUT_ALIGN (STREAM, floor_log2 (ALIGN / BITS_PER_UNIT)); \
293 ASM_OUTPUT_LABEL (STREAM, NAME); \
294 fprintf (STREAM, "\t.space\t%d\n", (int)(SIZE)); \
295 } \
296 while (0)
297 #endif
298
299 /* Output a zero-initialized block. */
300 #ifndef ASM_OUTPUT_ALIGNED_BSS
301 #define ASM_OUTPUT_ALIGNED_BSS(STREAM, DECL, NAME, SIZE, ALIGN) \
302 asm_output_aligned_bss (STREAM, DECL, NAME, SIZE, ALIGN)
303 #endif
304
305 #ifndef ASM_COMMENT_START
306 #define ASM_COMMENT_START "@"
307 #endif
308
309 /* This works for GAS and some other assemblers. */
310 #define SET_ASM_OP "\t.set\t"