gdb/aarch64-fbsd-nat.c

   1 /* Native-dependent code for FreeBSD/aarch64.
   2
   3    Copyright (C) 2017-2023 Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 #include "defs.h"
  21 #include "arch-utils.h"
  22 #include "inferior.h"
  23 #include "regcache.h"
  24 #include "target.h"
  25 #include "nat/aarch64-hw-point.h"
  26
  27 #include "elf/common.h"
  28
  29 #include <sys/param.h>
  30 #include <sys/ptrace.h>
  31 #include <machine/armreg.h>
  32 #include <machine/reg.h>
  33
  34 #include "fbsd-nat.h"
  35 #include "aarch64-tdep.h"
  36 #include "aarch64-fbsd-tdep.h"
  37 #include "aarch64-nat.h"
  38 #include "inf-ptrace.h"
  39
  40 #if __FreeBSD_version >= 1400005
  41 #define HAVE_DBREG
  42
  43 #include <unordered_set>
  44 #endif
  45
  46 #ifdef HAVE_DBREG
  47 struct aarch64_fbsd_nat_target final
  48   : public aarch64_nat_target<fbsd_nat_target>
  49 #else
  50 struct aarch64_fbsd_nat_target final : public fbsd_nat_target
  51 #endif
  52 {
  53   void fetch_registers (struct regcache *, int) override;
  54   void store_registers (struct regcache *, int) override;
  55
  56   const struct target_desc *read_description () override;
  57
  58 #ifdef HAVE_DBREG
  59   /* Hardware breakpoints and watchpoints.  */
  60   bool stopped_by_watchpoint () override;
  61   bool stopped_data_address (CORE_ADDR *) override;
  62   bool stopped_by_hw_breakpoint () override;
  63   bool supports_stopped_by_hw_breakpoint () override;
  64
  65   void post_startup_inferior (ptid_t) override;
  66   void post_attach (int pid) override;
  67
  68   void low_new_fork (ptid_t parent, pid_t child) override;
  69   void low_delete_thread (thread_info *) override;
  70   void low_prepare_to_resume (thread_info *) override;
  71
  72 private:
  73   void probe_debug_regs (int pid);
  74   static bool debug_regs_probed;
  75 #endif
  76 };
  77
  78 static aarch64_fbsd_nat_target the_aarch64_fbsd_nat_target;
  79
  80 /* Fetch register REGNUM from the inferior.  If REGNUM is -1, do this
  81    for all registers.  */
  82
  83 void
  84 aarch64_fbsd_nat_target::fetch_registers (struct regcache *regcache,
  85                                           int regnum)
  86 {
  87   fetch_register_set<struct reg> (regcache, regnum, PT_GETREGS,
  88                                   &aarch64_fbsd_gregset);
  89   fetch_register_set<struct fpreg> (regcache, regnum, PT_GETFPREGS,
  90                                     &aarch64_fbsd_fpregset);
  91
  92   gdbarch *gdbarch = regcache->arch ();
  93   aarch64_gdbarch_tdep *tdep = gdbarch_tdep<aarch64_gdbarch_tdep> (gdbarch);
  94   if (tdep->has_tls ())
  95     fetch_regset<uint64_t> (regcache, regnum, NT_ARM_TLS,
  96                             &aarch64_fbsd_tls_regset, tdep->tls_regnum_base);
  97 }
  98
  99 /* Store register REGNUM back into the inferior.  If REGNUM is -1, do
 100    this for all registers.  */
 101
 102 void
 103 aarch64_fbsd_nat_target::store_registers (struct regcache *regcache,
 104                                           int regnum)
 105 {
 106   store_register_set<struct reg> (regcache, regnum, PT_GETREGS, PT_SETREGS,
 107                                   &aarch64_fbsd_gregset);
 108   store_register_set<struct fpreg> (regcache, regnum, PT_GETFPREGS,
 109                                     PT_SETFPREGS, &aarch64_fbsd_fpregset);
 110
 111   gdbarch *gdbarch = regcache->arch ();
 112   aarch64_gdbarch_tdep *tdep = gdbarch_tdep<aarch64_gdbarch_tdep> (gdbarch);
 113   if (tdep->has_tls ())
 114     store_regset<uint64_t> (regcache, regnum, NT_ARM_TLS,
 115                             &aarch64_fbsd_tls_regset, tdep->tls_regnum_base);
 116 }
 117
 118 /* Implement the target read_description method.  */
 119
 120 const struct target_desc *
 121 aarch64_fbsd_nat_target::read_description ()
 122 {
 123   aarch64_features features;
 124   features.tls = have_regset (inferior_ptid, NT_ARM_TLS)? 1 : 0;
 125   return aarch64_read_description (features);
 126 }
 127
 128 #ifdef HAVE_DBREG
 129 bool aarch64_fbsd_nat_target::debug_regs_probed;
 130
 131 /* Set of threads which need to update debug registers on next resume.  */
 132
 133 static std::unordered_set<lwpid_t> aarch64_debug_pending_threads;
 134
 135 /* Implement the "stopped_data_address" target_ops method.  */
 136
 137 bool
 138 aarch64_fbsd_nat_target::stopped_data_address (CORE_ADDR *addr_p)
 139 {
 140   siginfo_t siginfo;
 141   struct aarch64_debug_reg_state *state;
 142
 143   if (!fbsd_nat_get_siginfo (inferior_ptid, &siginfo))
 144     return false;
 145
 146   /* This must be a hardware breakpoint.  */
 147   if (siginfo.si_signo != SIGTRAP
 148       || siginfo.si_code != TRAP_TRACE
 149       || siginfo.si_trapno != EXCP_WATCHPT_EL0)
 150     return false;
 151
 152   const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr;
 153
 154   /* Check if the address matches any watched address.  */
 155   state = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 156   return aarch64_stopped_data_address (state, addr_trap, addr_p);
 157 }
 158
 159 /* Implement the "stopped_by_watchpoint" target_ops method.  */
 160
 161 bool
 162 aarch64_fbsd_nat_target::stopped_by_watchpoint ()
 163 {
 164   CORE_ADDR addr;
 165
 166   return stopped_data_address (&addr);
 167 }
 168
 169 /* Implement the "stopped_by_hw_breakpoint" target_ops method.  */
 170
 171 bool
 172 aarch64_fbsd_nat_target::stopped_by_hw_breakpoint ()
 173 {
 174   siginfo_t siginfo;
 175   struct aarch64_debug_reg_state *state;
 176
 177   if (!fbsd_nat_get_siginfo (inferior_ptid, &siginfo))
 178     return false;
 179
 180   /* This must be a hardware breakpoint.  */
 181   if (siginfo.si_signo != SIGTRAP
 182       || siginfo.si_code != TRAP_TRACE
 183       || siginfo.si_trapno != EXCP_WATCHPT_EL0)
 184     return false;
 185
 186   return !stopped_by_watchpoint();
 187 }
 188
 189 /* Implement the "supports_stopped_by_hw_breakpoint" target_ops method.  */
 190
 191 bool
 192 aarch64_fbsd_nat_target::supports_stopped_by_hw_breakpoint ()
 193 {
 194   return true;
 195 }
 196
 197 /* Fetch the hardware debug register capability information.  */
 198
 199 void
 200 aarch64_fbsd_nat_target::probe_debug_regs (int pid)
 201 {
 202   if (!debug_regs_probed)
 203     {
 204       struct dbreg reg;
 205
 206       debug_regs_probed = true;
 207       aarch64_num_bp_regs = 0;
 208       aarch64_num_wp_regs = 0;
 209
 210       if (ptrace(PT_GETDBREGS, pid, (PTRACE_TYPE_ARG3) &reg, 0) == 0)
 211         {
 212           switch (reg.db_debug_ver)
 213             {
 214             case AARCH64_DEBUG_ARCH_V8:
 215             case AARCH64_DEBUG_ARCH_V8_1:
 216             case AARCH64_DEBUG_ARCH_V8_2:
 217             case AARCH64_DEBUG_ARCH_V8_4:
 218               break;
 219             default:
 220               return;
 221             }
 222
 223           aarch64_num_bp_regs = reg.db_nbkpts;
 224           if (aarch64_num_bp_regs > AARCH64_HBP_MAX_NUM)
 225             {
 226               warning (_("Unexpected number of hardware breakpoint registers"
 227                          " reported by ptrace, got %d, expected %d."),
 228                        aarch64_num_bp_regs, AARCH64_HBP_MAX_NUM);
 229               aarch64_num_bp_regs = AARCH64_HBP_MAX_NUM;
 230             }
 231           aarch64_num_wp_regs = reg.db_nwtpts;
 232           if (aarch64_num_wp_regs > AARCH64_HWP_MAX_NUM)
 233             {
 234               warning (_("Unexpected number of hardware watchpoint registers"
 235                          " reported by ptrace, got %d, expected %d."),
 236                        aarch64_num_wp_regs, AARCH64_HWP_MAX_NUM);
 237               aarch64_num_wp_regs = AARCH64_HWP_MAX_NUM;
 238             }
 239         }
 240     }
 241 }
 242
 243 /* Implement the virtual inf_ptrace_target::post_startup_inferior method.  */
 244
 245 void
 246 aarch64_fbsd_nat_target::post_startup_inferior (ptid_t ptid)
 247 {
 248   aarch64_remove_debug_reg_state (ptid.pid ());
 249   probe_debug_regs (ptid.pid ());
 250   fbsd_nat_target::post_startup_inferior (ptid);
 251 }
 252
 253 /* Implement the "post_attach" target_ops method.  */
 254
 255 void
 256 aarch64_fbsd_nat_target::post_attach (int pid)
 257 {
 258   aarch64_remove_debug_reg_state (pid);
 259   probe_debug_regs (pid);
 260   fbsd_nat_target::post_attach (pid);
 261 }
 262
 263 /* Implement the virtual fbsd_nat_target::low_new_fork method.  */
 264
 265 void
 266 aarch64_fbsd_nat_target::low_new_fork (ptid_t parent, pid_t child)
 267 {
 268   struct aarch64_debug_reg_state *parent_state, *child_state;
 269
 270   /* If there is no parent state, no watchpoints nor breakpoints have
 271      been set, so there is nothing to do.  */
 272   parent_state = aarch64_lookup_debug_reg_state (parent.pid ());
 273   if (parent_state == nullptr)
 274     return;
 275
 276   /* The kernel clears debug registers in the new child process after
 277      fork, but GDB core assumes the child inherits the watchpoints/hw
 278      breakpoints of the parent, and will remove them all from the
 279      forked off process.  Copy the debug registers mirrors into the
 280      new process so that all breakpoints and watchpoints can be
 281      removed together.  */
 282
 283   child_state = aarch64_get_debug_reg_state (child);
 284   *child_state = *parent_state;
 285 }
 286
 287 /* Mark debug register state "dirty" for all threads belonging to the
 288    current inferior.  */
 289
 290 void
 291 aarch64_notify_debug_reg_change (ptid_t ptid,
 292                                  int is_watchpoint, unsigned int idx)
 293 {
 294   for (thread_info *tp : current_inferior ()->non_exited_threads ())
 295     {
 296       if (tp->ptid.lwp_p ())
 297         aarch64_debug_pending_threads.emplace (tp->ptid.lwp ());
 298     }
 299 }
 300
 301 /* Implement the virtual fbsd_nat_target::low_delete_thread method.  */
 302
 303 void
 304 aarch64_fbsd_nat_target::low_delete_thread (thread_info *tp)
 305 {
 306   gdb_assert(tp->ptid.lwp_p ());
 307   aarch64_debug_pending_threads.erase (tp->ptid.lwp ());
 308 }
 309
 310 /* Implement the virtual fbsd_nat_target::low_prepare_to_resume method.  */
 311
 312 void
 313 aarch64_fbsd_nat_target::low_prepare_to_resume (thread_info *tp)
 314 {
 315   gdb_assert(tp->ptid.lwp_p ());
 316
 317   if (aarch64_debug_pending_threads.erase (tp->ptid.lwp ()) == 0)
 318     return;
 319
 320   struct aarch64_debug_reg_state *state =
 321     aarch64_lookup_debug_reg_state (tp->ptid.pid ());
 322   gdb_assert(state != nullptr);
 323
 324   struct dbreg reg;
 325   memset (&reg, 0, sizeof(reg));
 326   for (int i = 0; i < aarch64_num_bp_regs; i++)
 327     {
 328       reg.db_breakregs[i].dbr_addr = state->dr_addr_bp[i];
 329       reg.db_breakregs[i].dbr_ctrl = state->dr_ctrl_bp[i];
 330     }
 331   for (int i = 0; i < aarch64_num_wp_regs; i++)
 332     {
 333       reg.db_watchregs[i].dbw_addr = state->dr_addr_wp[i];
 334       reg.db_watchregs[i].dbw_ctrl = state->dr_ctrl_wp[i];
 335     }
 336   if (ptrace(PT_SETDBREGS, tp->ptid.lwp (), (PTRACE_TYPE_ARG3) &reg, 0) != 0)
 337     error (_("Failed to set hardware debug registers"));
 338 }
 339 #else
 340 /* A stub that should never be called.  */
 341 void
 342 aarch64_notify_debug_reg_change (ptid_t ptid,
 343                                  int is_watchpoint, unsigned int idx)
 344 {
 345   gdb_assert (true);
 346 }
 347 #endif
 348
 349 void _initialize_aarch64_fbsd_nat ();
 350 void
 351 _initialize_aarch64_fbsd_nat ()
 352 {
 353 #ifdef HAVE_DBREG
 354   aarch64_initialize_hw_point ();
 355 #endif
 356   add_inf_child_target (&the_aarch64_fbsd_nat_target);
 357 }