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1 /* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
2
3 Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
4 2002, 2003, 2005 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
22
23 #include "defs.h"
24 #include "doublest.h"
25 #include "frame.h"
26 #include "frame-unwind.h"
27 #include "frame-base.h"
28 #include "dwarf2-frame.h"
29 #include "inferior.h"
30 #include "symtab.h"
31 #include "value.h"
32 #include "gdbcmd.h"
33 #include "gdbcore.h"
34 #include "dis-asm.h"
35 #include "symfile.h"
36 #include "objfiles.h"
37 #include "gdb_string.h"
38 #include "linespec.h"
39 #include "regcache.h"
40 #include "reggroups.h"
41 #include "arch-utils.h"
42 #include "osabi.h"
43 #include "block.h"
44 #include "infcall.h"
45
46 #include "elf-bfd.h"
47
48 #include "alpha-tdep.h"
49
50 \f
51 /* Return the name of the REGNO register.
52
53 An empty name corresponds to a register number that used to
54 be used for a virtual register. That virtual register has
55 been removed, but the index is still reserved to maintain
56 compatibility with existing remote alpha targets. */
57
58 static const char *
59 alpha_register_name (int regno)
60 {
61 static const char * const register_names[] =
62 {
63 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
64 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
65 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
66 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
67 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
68 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
69 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
70 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
71 "pc", "", "unique"
72 };
73
74 if (regno < 0)
75 return NULL;
76 if (regno >= (sizeof(register_names) / sizeof(*register_names)))
77 return NULL;
78 return register_names[regno];
79 }
80
81 static int
82 alpha_cannot_fetch_register (int regno)
83 {
84 return (regno == ALPHA_ZERO_REGNUM
85 || strlen (alpha_register_name (regno)) == 0);
86 }
87
88 static int
89 alpha_cannot_store_register (int regno)
90 {
91 return (regno == ALPHA_ZERO_REGNUM
92 || strlen (alpha_register_name (regno)) == 0);
93 }
94
95 static struct type *
96 alpha_register_type (struct gdbarch *gdbarch, int regno)
97 {
98 if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM)
99 return builtin_type_void_data_ptr;
100 if (regno == ALPHA_PC_REGNUM)
101 return builtin_type_void_func_ptr;
102
103 /* Don't need to worry about little vs big endian until
104 some jerk tries to port to alpha-unicosmk. */
105 if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31)
106 return builtin_type_ieee_double_little;
107
108 return builtin_type_int64;
109 }
110
111 /* Is REGNUM a member of REGGROUP? */
112
113 static int
114 alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
115 struct reggroup *group)
116 {
117 /* Filter out any registers eliminated, but whose regnum is
118 reserved for backward compatibility, e.g. the vfp. */
119 if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0')
120 return 0;
121
122 if (group == all_reggroup)
123 return 1;
124
125 /* Zero should not be saved or restored. Technically it is a general
126 register (just as $f31 would be a float if we represented it), but
127 there's no point displaying it during "info regs", so leave it out
128 of all groups except for "all". */
129 if (regnum == ALPHA_ZERO_REGNUM)
130 return 0;
131
132 /* All other registers are saved and restored. */
133 if (group == save_reggroup || group == restore_reggroup)
134 return 1;
135
136 /* All other groups are non-overlapping. */
137
138 /* Since this is really a PALcode memory slot... */
139 if (regnum == ALPHA_UNIQUE_REGNUM)
140 return group == system_reggroup;
141
142 /* Force the FPCR to be considered part of the floating point state. */
143 if (regnum == ALPHA_FPCR_REGNUM)
144 return group == float_reggroup;
145
146 if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31)
147 return group == float_reggroup;
148 else
149 return group == general_reggroup;
150 }
151
152 static int
153 alpha_register_byte (int regno)
154 {
155 return (regno * 8);
156 }
157
158 /* The following represents exactly the conversion performed by
159 the LDS instruction. This applies to both single-precision
160 floating point and 32-bit integers. */
161
162 static void
163 alpha_lds (void *out, const void *in)
164 {
165 ULONGEST mem = extract_unsigned_integer (in, 4);
166 ULONGEST frac = (mem >> 0) & 0x7fffff;
167 ULONGEST sign = (mem >> 31) & 1;
168 ULONGEST exp_msb = (mem >> 30) & 1;
169 ULONGEST exp_low = (mem >> 23) & 0x7f;
170 ULONGEST exp, reg;
171
172 exp = (exp_msb << 10) | exp_low;
173 if (exp_msb)
174 {
175 if (exp_low == 0x7f)
176 exp = 0x7ff;
177 }
178 else
179 {
180 if (exp_low != 0x00)
181 exp |= 0x380;
182 }
183
184 reg = (sign << 63) | (exp << 52) | (frac << 29);
185 store_unsigned_integer (out, 8, reg);
186 }
187
188 /* Similarly, this represents exactly the conversion performed by
189 the STS instruction. */
190
191 static void
192 alpha_sts (void *out, const void *in)
193 {
194 ULONGEST reg, mem;
195
196 reg = extract_unsigned_integer (in, 8);
197 mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff);
198 store_unsigned_integer (out, 4, mem);
199 }
200
201 /* The alpha needs a conversion between register and memory format if the
202 register is a floating point register and memory format is float, as the
203 register format must be double or memory format is an integer with 4
204 bytes or less, as the representation of integers in floating point
205 registers is different. */
206
207 static int
208 alpha_convert_register_p (int regno, struct type *type)
209 {
210 return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31);
211 }
212
213 static void
214 alpha_register_to_value (struct frame_info *frame, int regnum,
215 struct type *valtype, gdb_byte *out)
216 {
217 char in[MAX_REGISTER_SIZE];
218 frame_register_read (frame, regnum, in);
219 switch (TYPE_LENGTH (valtype))
220 {
221 case 4:
222 alpha_sts (out, in);
223 break;
224 case 8:
225 memcpy (out, in, 8);
226 break;
227 default:
228 error (_("Cannot retrieve value from floating point register"));
229 }
230 }
231
232 static void
233 alpha_value_to_register (struct frame_info *frame, int regnum,
234 struct type *valtype, const gdb_byte *in)
235 {
236 char out[MAX_REGISTER_SIZE];
237 switch (TYPE_LENGTH (valtype))
238 {
239 case 4:
240 alpha_lds (out, in);
241 break;
242 case 8:
243 memcpy (out, in, 8);
244 break;
245 default:
246 error (_("Cannot store value in floating point register"));
247 }
248 put_frame_register (frame, regnum, out);
249 }
250
251 \f
252 /* The alpha passes the first six arguments in the registers, the rest on
253 the stack. The register arguments are stored in ARG_REG_BUFFER, and
254 then moved into the register file; this simplifies the passing of a
255 large struct which extends from the registers to the stack, plus avoids
256 three ptrace invocations per word.
257
258 We don't bother tracking which register values should go in integer
259 regs or fp regs; we load the same values into both.
260
261 If the called function is returning a structure, the address of the
262 structure to be returned is passed as a hidden first argument. */
263
264 static CORE_ADDR
265 alpha_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
266 struct regcache *regcache, CORE_ADDR bp_addr,
267 int nargs, struct value **args, CORE_ADDR sp,
268 int struct_return, CORE_ADDR struct_addr)
269 {
270 int i;
271 int accumulate_size = struct_return ? 8 : 0;
272 struct alpha_arg
273 {
274 char *contents;
275 int len;
276 int offset;
277 };
278 struct alpha_arg *alpha_args
279 = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg));
280 struct alpha_arg *m_arg;
281 char arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
282 int required_arg_regs;
283 CORE_ADDR func_addr = find_function_addr (function, NULL);
284
285 /* The ABI places the address of the called function in T12. */
286 regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr);
287
288 /* Set the return address register to point to the entry point
289 of the program, where a breakpoint lies in wait. */
290 regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr);
291
292 /* Lay out the arguments in memory. */
293 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
294 {
295 struct value *arg = args[i];
296 struct type *arg_type = check_typedef (value_type (arg));
297
298 /* Cast argument to long if necessary as the compiler does it too. */
299 switch (TYPE_CODE (arg_type))
300 {
301 case TYPE_CODE_INT:
302 case TYPE_CODE_BOOL:
303 case TYPE_CODE_CHAR:
304 case TYPE_CODE_RANGE:
305 case TYPE_CODE_ENUM:
306 if (TYPE_LENGTH (arg_type) == 4)
307 {
308 /* 32-bit values must be sign-extended to 64 bits
309 even if the base data type is unsigned. */
310 arg_type = builtin_type_int32;
311 arg = value_cast (arg_type, arg);
312 }
313 if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE)
314 {
315 arg_type = builtin_type_int64;
316 arg = value_cast (arg_type, arg);
317 }
318 break;
319
320 case TYPE_CODE_FLT:
321 /* "float" arguments loaded in registers must be passed in
322 register format, aka "double". */
323 if (accumulate_size < sizeof (arg_reg_buffer)
324 && TYPE_LENGTH (arg_type) == 4)
325 {
326 arg_type = builtin_type_ieee_double_little;
327 arg = value_cast (arg_type, arg);
328 }
329 /* Tru64 5.1 has a 128-bit long double, and passes this by
330 invisible reference. No one else uses this data type. */
331 else if (TYPE_LENGTH (arg_type) == 16)
332 {
333 /* Allocate aligned storage. */
334 sp = (sp & -16) - 16;
335
336 /* Write the real data into the stack. */
337 write_memory (sp, value_contents (arg), 16);
338
339 /* Construct the indirection. */
340 arg_type = lookup_pointer_type (arg_type);
341 arg = value_from_pointer (arg_type, sp);
342 }
343 break;
344
345 case TYPE_CODE_COMPLEX:
346 /* ??? The ABI says that complex values are passed as two
347 separate scalar values. This distinction only matters
348 for complex float. However, GCC does not implement this. */
349
350 /* Tru64 5.1 has a 128-bit long double, and passes this by
351 invisible reference. */
352 if (TYPE_LENGTH (arg_type) == 32)
353 {
354 /* Allocate aligned storage. */
355 sp = (sp & -16) - 16;
356
357 /* Write the real data into the stack. */
358 write_memory (sp, value_contents (arg), 32);
359
360 /* Construct the indirection. */
361 arg_type = lookup_pointer_type (arg_type);
362 arg = value_from_pointer (arg_type, sp);
363 }
364 break;
365
366 default:
367 break;
368 }
369 m_arg->len = TYPE_LENGTH (arg_type);
370 m_arg->offset = accumulate_size;
371 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
372 m_arg->contents = value_contents_writeable (arg);
373 }
374
375 /* Determine required argument register loads, loading an argument register
376 is expensive as it uses three ptrace calls. */
377 required_arg_regs = accumulate_size / 8;
378 if (required_arg_regs > ALPHA_NUM_ARG_REGS)
379 required_arg_regs = ALPHA_NUM_ARG_REGS;
380
381 /* Make room for the arguments on the stack. */
382 if (accumulate_size < sizeof(arg_reg_buffer))
383 accumulate_size = 0;
384 else
385 accumulate_size -= sizeof(arg_reg_buffer);
386 sp -= accumulate_size;
387
388 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
389 sp &= ~15;
390
391 /* `Push' arguments on the stack. */
392 for (i = nargs; m_arg--, --i >= 0;)
393 {
394 char *contents = m_arg->contents;
395 int offset = m_arg->offset;
396 int len = m_arg->len;
397
398 /* Copy the bytes destined for registers into arg_reg_buffer. */
399 if (offset < sizeof(arg_reg_buffer))
400 {
401 if (offset + len <= sizeof(arg_reg_buffer))
402 {
403 memcpy (arg_reg_buffer + offset, contents, len);
404 continue;
405 }
406 else
407 {
408 int tlen = sizeof(arg_reg_buffer) - offset;
409 memcpy (arg_reg_buffer + offset, contents, tlen);
410 offset += tlen;
411 contents += tlen;
412 len -= tlen;
413 }
414 }
415
416 /* Everything else goes to the stack. */
417 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
418 }
419 if (struct_return)
420 store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr);
421
422 /* Load the argument registers. */
423 for (i = 0; i < required_arg_regs; i++)
424 {
425 regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i,
426 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
427 regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i,
428 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
429 }
430
431 /* Finally, update the stack pointer. */
432 regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp);
433
434 return sp;
435 }
436
437 /* Extract from REGCACHE the value about to be returned from a function
438 and copy it into VALBUF. */
439
440 static void
441 alpha_extract_return_value (struct type *valtype, struct regcache *regcache,
442 gdb_byte *valbuf)
443 {
444 int length = TYPE_LENGTH (valtype);
445 char raw_buffer[ALPHA_REGISTER_SIZE];
446 ULONGEST l;
447
448 switch (TYPE_CODE (valtype))
449 {
450 case TYPE_CODE_FLT:
451 switch (length)
452 {
453 case 4:
454 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer);
455 alpha_sts (valbuf, raw_buffer);
456 break;
457
458 case 8:
459 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
460 break;
461
462 case 16:
463 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
464 read_memory (l, valbuf, 16);
465 break;
466
467 default:
468 internal_error (__FILE__, __LINE__, _("unknown floating point width"));
469 }
470 break;
471
472 case TYPE_CODE_COMPLEX:
473 switch (length)
474 {
475 case 8:
476 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
477 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
478 break;
479
480 case 16:
481 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
482 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM+1,
483 (char *)valbuf + 8);
484 break;
485
486 case 32:
487 regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l);
488 read_memory (l, valbuf, 32);
489 break;
490
491 default:
492 internal_error (__FILE__, __LINE__, _("unknown floating point width"));
493 }
494 break;
495
496 default:
497 /* Assume everything else degenerates to an integer. */
498 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
499 store_unsigned_integer (valbuf, length, l);
500 break;
501 }
502 }
503
504 /* Extract from REGCACHE the address of a structure about to be returned
505 from a function. */
506
507 static CORE_ADDR
508 alpha_extract_struct_value_address (struct regcache *regcache)
509 {
510 ULONGEST addr;
511 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr);
512 return addr;
513 }
514
515 /* Insert the given value into REGCACHE as if it was being
516 returned by a function. */
517
518 static void
519 alpha_store_return_value (struct type *valtype, struct regcache *regcache,
520 const gdb_byte *valbuf)
521 {
522 int length = TYPE_LENGTH (valtype);
523 char raw_buffer[ALPHA_REGISTER_SIZE];
524 ULONGEST l;
525
526 switch (TYPE_CODE (valtype))
527 {
528 case TYPE_CODE_FLT:
529 switch (length)
530 {
531 case 4:
532 alpha_lds (raw_buffer, valbuf);
533 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer);
534 break;
535
536 case 8:
537 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
538 break;
539
540 case 16:
541 /* FIXME: 128-bit long doubles are returned like structures:
542 by writing into indirect storage provided by the caller
543 as the first argument. */
544 error (_("Cannot set a 128-bit long double return value."));
545
546 default:
547 internal_error (__FILE__, __LINE__, _("unknown floating point width"));
548 }
549 break;
550
551 case TYPE_CODE_COMPLEX:
552 switch (length)
553 {
554 case 8:
555 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
556 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
557 break;
558
559 case 16:
560 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
561 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM+1,
562 (const char *)valbuf + 8);
563 break;
564
565 case 32:
566 /* FIXME: 128-bit long doubles are returned like structures:
567 by writing into indirect storage provided by the caller
568 as the first argument. */
569 error (_("Cannot set a 128-bit long double return value."));
570
571 default:
572 internal_error (__FILE__, __LINE__, _("unknown floating point width"));
573 }
574 break;
575
576 default:
577 /* Assume everything else degenerates to an integer. */
578 /* 32-bit values must be sign-extended to 64 bits
579 even if the base data type is unsigned. */
580 if (length == 4)
581 valtype = builtin_type_int32;
582 l = unpack_long (valtype, valbuf);
583 regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l);
584 break;
585 }
586 }
587
588 \f
589 static const unsigned char *
590 alpha_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
591 {
592 static const unsigned char alpha_breakpoint[] =
593 { 0x80, 0, 0, 0 }; /* call_pal bpt */
594
595 *lenptr = sizeof(alpha_breakpoint);
596 return (alpha_breakpoint);
597 }
598
599 \f
600 /* This returns the PC of the first insn after the prologue.
601 If we can't find the prologue, then return 0. */
602
603 CORE_ADDR
604 alpha_after_prologue (CORE_ADDR pc)
605 {
606 struct symtab_and_line sal;
607 CORE_ADDR func_addr, func_end;
608
609 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
610 return 0;
611
612 sal = find_pc_line (func_addr, 0);
613 if (sal.end < func_end)
614 return sal.end;
615
616 /* The line after the prologue is after the end of the function. In this
617 case, tell the caller to find the prologue the hard way. */
618 return 0;
619 }
620
621 /* Read an instruction from memory at PC, looking through breakpoints. */
622
623 unsigned int
624 alpha_read_insn (CORE_ADDR pc)
625 {
626 char buf[4];
627 int status;
628
629 status = deprecated_read_memory_nobpt (pc, buf, 4);
630 if (status)
631 memory_error (status, pc);
632 return extract_unsigned_integer (buf, 4);
633 }
634
635 /* To skip prologues, I use this predicate. Returns either PC itself
636 if the code at PC does not look like a function prologue; otherwise
637 returns an address that (if we're lucky) follows the prologue. If
638 LENIENT, then we must skip everything which is involved in setting
639 up the frame (it's OK to skip more, just so long as we don't skip
640 anything which might clobber the registers which are being saved. */
641
642 static CORE_ADDR
643 alpha_skip_prologue (CORE_ADDR pc)
644 {
645 unsigned long inst;
646 int offset;
647 CORE_ADDR post_prologue_pc;
648 char buf[4];
649
650 /* Silently return the unaltered pc upon memory errors.
651 This could happen on OSF/1 if decode_line_1 tries to skip the
652 prologue for quickstarted shared library functions when the
653 shared library is not yet mapped in.
654 Reading target memory is slow over serial lines, so we perform
655 this check only if the target has shared libraries (which all
656 Alpha targets do). */
657 if (target_read_memory (pc, buf, 4))
658 return pc;
659
660 /* See if we can determine the end of the prologue via the symbol table.
661 If so, then return either PC, or the PC after the prologue, whichever
662 is greater. */
663
664 post_prologue_pc = alpha_after_prologue (pc);
665 if (post_prologue_pc != 0)
666 return max (pc, post_prologue_pc);
667
668 /* Can't determine prologue from the symbol table, need to examine
669 instructions. */
670
671 /* Skip the typical prologue instructions. These are the stack adjustment
672 instruction and the instructions that save registers on the stack
673 or in the gcc frame. */
674 for (offset = 0; offset < 100; offset += 4)
675 {
676 inst = alpha_read_insn (pc + offset);
677
678 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
679 continue;
680 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
681 continue;
682 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
683 continue;
684 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
685 continue;
686
687 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
688 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
689 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
690 continue;
691
692 if (inst == 0x47de040f) /* bis sp,sp,fp */
693 continue;
694 if (inst == 0x47fe040f) /* bis zero,sp,fp */
695 continue;
696
697 break;
698 }
699 return pc + offset;
700 }
701
702 \f
703 /* Figure out where the longjmp will land.
704 We expect the first arg to be a pointer to the jmp_buf structure from
705 which we extract the PC (JB_PC) that we will land at. The PC is copied
706 into the "pc". This routine returns true on success. */
707
708 static int
709 alpha_get_longjmp_target (CORE_ADDR *pc)
710 {
711 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
712 CORE_ADDR jb_addr;
713 char raw_buffer[ALPHA_REGISTER_SIZE];
714
715 jb_addr = read_register (ALPHA_A0_REGNUM);
716
717 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
718 raw_buffer, tdep->jb_elt_size))
719 return 0;
720
721 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size);
722 return 1;
723 }
724
725 \f
726 /* Frame unwinder for signal trampolines. We use alpha tdep bits that
727 describe the location and shape of the sigcontext structure. After
728 that, all registers are in memory, so it's easy. */
729 /* ??? Shouldn't we be able to do this generically, rather than with
730 OSABI data specific to Alpha? */
731
732 struct alpha_sigtramp_unwind_cache
733 {
734 CORE_ADDR sigcontext_addr;
735 };
736
737 static struct alpha_sigtramp_unwind_cache *
738 alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
739 void **this_prologue_cache)
740 {
741 struct alpha_sigtramp_unwind_cache *info;
742 struct gdbarch_tdep *tdep;
743
744 if (*this_prologue_cache)
745 return *this_prologue_cache;
746
747 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache);
748 *this_prologue_cache = info;
749
750 tdep = gdbarch_tdep (current_gdbarch);
751 info->sigcontext_addr = tdep->sigcontext_addr (next_frame);
752
753 return info;
754 }
755
756 /* Return the address of REGNUM in a sigtramp frame. Since this is
757 all arithmetic, it doesn't seem worthwhile to cache it. */
758
759 static CORE_ADDR
760 alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, int regnum)
761 {
762 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
763
764 if (regnum >= 0 && regnum < 32)
765 return sigcontext_addr + tdep->sc_regs_offset + regnum * 8;
766 else if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 32)
767 return sigcontext_addr + tdep->sc_fpregs_offset + regnum * 8;
768 else if (regnum == ALPHA_PC_REGNUM)
769 return sigcontext_addr + tdep->sc_pc_offset;
770
771 return 0;
772 }
773
774 /* Given a GDB frame, determine the address of the calling function's
775 frame. This will be used to create a new GDB frame struct. */
776
777 static void
778 alpha_sigtramp_frame_this_id (struct frame_info *next_frame,
779 void **this_prologue_cache,
780 struct frame_id *this_id)
781 {
782 struct alpha_sigtramp_unwind_cache *info
783 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
784 struct gdbarch_tdep *tdep;
785 CORE_ADDR stack_addr, code_addr;
786
787 /* If the OSABI couldn't locate the sigcontext, give up. */
788 if (info->sigcontext_addr == 0)
789 return;
790
791 /* If we have dynamic signal trampolines, find their start.
792 If we do not, then we must assume there is a symbol record
793 that can provide the start address. */
794 tdep = gdbarch_tdep (current_gdbarch);
795 if (tdep->dynamic_sigtramp_offset)
796 {
797 int offset;
798 code_addr = frame_pc_unwind (next_frame);
799 offset = tdep->dynamic_sigtramp_offset (code_addr);
800 if (offset >= 0)
801 code_addr -= offset;
802 else
803 code_addr = 0;
804 }
805 else
806 code_addr = frame_func_unwind (next_frame);
807
808 /* The stack address is trivially read from the sigcontext. */
809 stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr,
810 ALPHA_SP_REGNUM);
811 stack_addr = get_frame_memory_unsigned (next_frame, stack_addr,
812 ALPHA_REGISTER_SIZE);
813
814 *this_id = frame_id_build (stack_addr, code_addr);
815 }
816
817 /* Retrieve the value of REGNUM in FRAME. Don't give up! */
818
819 static void
820 alpha_sigtramp_frame_prev_register (struct frame_info *next_frame,
821 void **this_prologue_cache,
822 int regnum, int *optimizedp,
823 enum lval_type *lvalp, CORE_ADDR *addrp,
824 int *realnump, gdb_byte *bufferp)
825 {
826 struct alpha_sigtramp_unwind_cache *info
827 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
828 CORE_ADDR addr;
829
830 if (info->sigcontext_addr != 0)
831 {
832 /* All integer and fp registers are stored in memory. */
833 addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum);
834 if (addr != 0)
835 {
836 *optimizedp = 0;
837 *lvalp = lval_memory;
838 *addrp = addr;
839 *realnump = -1;
840 if (bufferp != NULL)
841 get_frame_memory (next_frame, addr, bufferp, ALPHA_REGISTER_SIZE);
842 return;
843 }
844 }
845
846 /* This extra register may actually be in the sigcontext, but our
847 current description of it in alpha_sigtramp_frame_unwind_cache
848 doesn't include it. Too bad. Fall back on whatever's in the
849 outer frame. */
850 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
851 realnump, bufferp);
852 }
853
854 static const struct frame_unwind alpha_sigtramp_frame_unwind = {
855 SIGTRAMP_FRAME,
856 alpha_sigtramp_frame_this_id,
857 alpha_sigtramp_frame_prev_register
858 };
859
860 static const struct frame_unwind *
861 alpha_sigtramp_frame_sniffer (struct frame_info *next_frame)
862 {
863 CORE_ADDR pc = frame_pc_unwind (next_frame);
864 char *name;
865
866 /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead
867 look at tramp-frame.h and other simplier per-architecture
868 sigtramp unwinders. */
869
870 /* We shouldn't even bother to try if the OSABI didn't register a
871 sigcontext_addr handler or pc_in_sigtramp hander. */
872 if (gdbarch_tdep (current_gdbarch)->sigcontext_addr == NULL)
873 return NULL;
874 if (gdbarch_tdep (current_gdbarch)->pc_in_sigtramp == NULL)
875 return NULL;
876
877 /* Otherwise we should be in a signal frame. */
878 find_pc_partial_function (pc, &name, NULL, NULL);
879 if (gdbarch_tdep (current_gdbarch)->pc_in_sigtramp (pc, name))
880 return &alpha_sigtramp_frame_unwind;
881
882 return NULL;
883 }
884 \f
885 /* Fallback alpha frame unwinder. Uses instruction scanning and knows
886 something about the traditional layout of alpha stack frames. */
887
888 struct alpha_heuristic_unwind_cache
889 {
890 CORE_ADDR *saved_regs;
891 CORE_ADDR vfp;
892 CORE_ADDR start_pc;
893 int return_reg;
894 };
895
896 /* Heuristic_proc_start may hunt through the text section for a long
897 time across a 2400 baud serial line. Allows the user to limit this
898 search. */
899 static unsigned int heuristic_fence_post = 0;
900
901 /* Attempt to locate the start of the function containing PC. We assume that
902 the previous function ends with an about_to_return insn. Not foolproof by
903 any means, since gcc is happy to put the epilogue in the middle of a
904 function. But we're guessing anyway... */
905
906 static CORE_ADDR
907 alpha_heuristic_proc_start (CORE_ADDR pc)
908 {
909 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
910 CORE_ADDR last_non_nop = pc;
911 CORE_ADDR fence = pc - heuristic_fence_post;
912 CORE_ADDR orig_pc = pc;
913 CORE_ADDR func;
914
915 if (pc == 0)
916 return 0;
917
918 /* First see if we can find the start of the function from minimal
919 symbol information. This can succeed with a binary that doesn't
920 have debug info, but hasn't been stripped. */
921 func = get_pc_function_start (pc);
922 if (func)
923 return func;
924
925 if (heuristic_fence_post == UINT_MAX
926 || fence < tdep->vm_min_address)
927 fence = tdep->vm_min_address;
928
929 /* Search back for previous return; also stop at a 0, which might be
930 seen for instance before the start of a code section. Don't include
931 nops, since this usually indicates padding between functions. */
932 for (pc -= 4; pc >= fence; pc -= 4)
933 {
934 unsigned int insn = alpha_read_insn (pc);
935 switch (insn)
936 {
937 case 0: /* invalid insn */
938 case 0x6bfa8001: /* ret $31,($26),1 */
939 return last_non_nop;
940
941 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
942 case 0x47ff041f: /* nop: bis $31,$31,$31 */
943 break;
944
945 default:
946 last_non_nop = pc;
947 break;
948 }
949 }
950
951 /* It's not clear to me why we reach this point when stopping quietly,
952 but with this test, at least we don't print out warnings for every
953 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
954 if (stop_soon == NO_STOP_QUIETLY)
955 {
956 static int blurb_printed = 0;
957
958 if (fence == tdep->vm_min_address)
959 warning (_("Hit beginning of text section without finding \
960 enclosing function for address 0x%s"), paddr_nz (orig_pc));
961 else
962 warning (_("Hit heuristic-fence-post without finding \
963 enclosing function for address 0x%s"), paddr_nz (orig_pc));
964
965 if (!blurb_printed)
966 {
967 printf_filtered (_("\
968 This warning occurs if you are debugging a function without any symbols\n\
969 (for example, in a stripped executable). In that case, you may wish to\n\
970 increase the size of the search with the `set heuristic-fence-post' command.\n\
971 \n\
972 Otherwise, you told GDB there was a function where there isn't one, or\n\
973 (more likely) you have encountered a bug in GDB.\n"));
974 blurb_printed = 1;
975 }
976 }
977
978 return 0;
979 }
980
981 static struct alpha_heuristic_unwind_cache *
982 alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame,
983 void **this_prologue_cache,
984 CORE_ADDR start_pc)
985 {
986 struct alpha_heuristic_unwind_cache *info;
987 ULONGEST val;
988 CORE_ADDR limit_pc, cur_pc;
989 int frame_reg, frame_size, return_reg, reg;
990
991 if (*this_prologue_cache)
992 return *this_prologue_cache;
993
994 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache);
995 *this_prologue_cache = info;
996 info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS);
997
998 limit_pc = frame_pc_unwind (next_frame);
999 if (start_pc == 0)
1000 start_pc = alpha_heuristic_proc_start (limit_pc);
1001 info->start_pc = start_pc;
1002
1003 frame_reg = ALPHA_SP_REGNUM;
1004 frame_size = 0;
1005 return_reg = -1;
1006
1007 /* If we've identified a likely place to start, do code scanning. */
1008 if (start_pc != 0)
1009 {
1010 /* Limit the forward search to 50 instructions. */
1011 if (start_pc + 200 < limit_pc)
1012 limit_pc = start_pc + 200;
1013
1014 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4)
1015 {
1016 unsigned int word = alpha_read_insn (cur_pc);
1017
1018 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
1019 {
1020 if (word & 0x8000)
1021 {
1022 /* Consider only the first stack allocation instruction
1023 to contain the static size of the frame. */
1024 if (frame_size == 0)
1025 frame_size = (-word) & 0xffff;
1026 }
1027 else
1028 {
1029 /* Exit loop if a positive stack adjustment is found, which
1030 usually means that the stack cleanup code in the function
1031 epilogue is reached. */
1032 break;
1033 }
1034 }
1035 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1036 {
1037 reg = (word & 0x03e00000) >> 21;
1038
1039 /* Ignore this instruction if we have already encountered
1040 an instruction saving the same register earlier in the
1041 function code. The current instruction does not tell
1042 us where the original value upon function entry is saved.
1043 All it says is that the function we are scanning reused
1044 that register for some computation of its own, and is now
1045 saving its result. */
1046 if (info->saved_regs[reg])
1047 continue;
1048
1049 if (reg == 31)
1050 continue;
1051
1052 /* Do not compute the address where the register was saved yet,
1053 because we don't know yet if the offset will need to be
1054 relative to $sp or $fp (we can not compute the address
1055 relative to $sp if $sp is updated during the execution of
1056 the current subroutine, for instance when doing some alloca).
1057 So just store the offset for the moment, and compute the
1058 address later when we know whether this frame has a frame
1059 pointer or not. */
1060 /* Hack: temporarily add one, so that the offset is non-zero
1061 and we can tell which registers have save offsets below. */
1062 info->saved_regs[reg] = (word & 0xffff) + 1;
1063
1064 /* Starting with OSF/1-3.2C, the system libraries are shipped
1065 without local symbols, but they still contain procedure
1066 descriptors without a symbol reference. GDB is currently
1067 unable to find these procedure descriptors and uses
1068 heuristic_proc_desc instead.
1069 As some low level compiler support routines (__div*, __add*)
1070 use a non-standard return address register, we have to
1071 add some heuristics to determine the return address register,
1072 or stepping over these routines will fail.
1073 Usually the return address register is the first register
1074 saved on the stack, but assembler optimization might
1075 rearrange the register saves.
1076 So we recognize only a few registers (t7, t9, ra) within
1077 the procedure prologue as valid return address registers.
1078 If we encounter a return instruction, we extract the
1079 the return address register from it.
1080
1081 FIXME: Rewriting GDB to access the procedure descriptors,
1082 e.g. via the minimal symbol table, might obviate this hack. */
1083 if (return_reg == -1
1084 && cur_pc < (start_pc + 80)
1085 && (reg == ALPHA_T7_REGNUM
1086 || reg == ALPHA_T9_REGNUM
1087 || reg == ALPHA_RA_REGNUM))
1088 return_reg = reg;
1089 }
1090 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1091 return_reg = (word >> 16) & 0x1f;
1092 else if (word == 0x47de040f) /* bis sp,sp,fp */
1093 frame_reg = ALPHA_GCC_FP_REGNUM;
1094 else if (word == 0x47fe040f) /* bis zero,sp,fp */
1095 frame_reg = ALPHA_GCC_FP_REGNUM;
1096 }
1097
1098 /* If we haven't found a valid return address register yet, keep
1099 searching in the procedure prologue. */
1100 if (return_reg == -1)
1101 {
1102 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
1103 {
1104 unsigned int word = alpha_read_insn (cur_pc);
1105
1106 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1107 {
1108 reg = (word & 0x03e00000) >> 21;
1109 if (reg == ALPHA_T7_REGNUM
1110 || reg == ALPHA_T9_REGNUM
1111 || reg == ALPHA_RA_REGNUM)
1112 {
1113 return_reg = reg;
1114 break;
1115 }
1116 }
1117 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1118 {
1119 return_reg = (word >> 16) & 0x1f;
1120 break;
1121 }
1122
1123 cur_pc += 4;
1124 }
1125 }
1126 }
1127
1128 /* Failing that, do default to the customary RA. */
1129 if (return_reg == -1)
1130 return_reg = ALPHA_RA_REGNUM;
1131 info->return_reg = return_reg;
1132
1133 frame_unwind_unsigned_register (next_frame, frame_reg, &val);
1134 info->vfp = val + frame_size;
1135
1136 /* Convert offsets to absolute addresses. See above about adding
1137 one to the offsets to make all detected offsets non-zero. */
1138 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
1139 if (info->saved_regs[reg])
1140 info->saved_regs[reg] += val - 1;
1141
1142 return info;
1143 }
1144
1145 /* Given a GDB frame, determine the address of the calling function's
1146 frame. This will be used to create a new GDB frame struct. */
1147
1148 static void
1149 alpha_heuristic_frame_this_id (struct frame_info *next_frame,
1150 void **this_prologue_cache,
1151 struct frame_id *this_id)
1152 {
1153 struct alpha_heuristic_unwind_cache *info
1154 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
1155
1156 *this_id = frame_id_build (info->vfp, info->start_pc);
1157 }
1158
1159 /* Retrieve the value of REGNUM in FRAME. Don't give up! */
1160
1161 static void
1162 alpha_heuristic_frame_prev_register (struct frame_info *next_frame,
1163 void **this_prologue_cache,
1164 int regnum, int *optimizedp,
1165 enum lval_type *lvalp, CORE_ADDR *addrp,
1166 int *realnump, gdb_byte *bufferp)
1167 {
1168 struct alpha_heuristic_unwind_cache *info
1169 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
1170
1171 /* The PC of the previous frame is stored in the link register of
1172 the current frame. Frob regnum so that we pull the value from
1173 the correct place. */
1174 if (regnum == ALPHA_PC_REGNUM)
1175 regnum = info->return_reg;
1176
1177 /* For all registers known to be saved in the current frame,
1178 do the obvious and pull the value out. */
1179 if (info->saved_regs[regnum])
1180 {
1181 *optimizedp = 0;
1182 *lvalp = lval_memory;
1183 *addrp = info->saved_regs[regnum];
1184 *realnump = -1;
1185 if (bufferp != NULL)
1186 get_frame_memory (next_frame, *addrp, bufferp, ALPHA_REGISTER_SIZE);
1187 return;
1188 }
1189
1190 /* The stack pointer of the previous frame is computed by popping
1191 the current stack frame. */
1192 if (regnum == ALPHA_SP_REGNUM)
1193 {
1194 *optimizedp = 0;
1195 *lvalp = not_lval;
1196 *addrp = 0;
1197 *realnump = -1;
1198 if (bufferp != NULL)
1199 store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp);
1200 return;
1201 }
1202
1203 /* Otherwise assume the next frame has the same register value. */
1204 frame_register_unwind (next_frame, regnum, optimizedp, lvalp, addrp,
1205 realnump, bufferp);
1206 }
1207
1208 static const struct frame_unwind alpha_heuristic_frame_unwind = {
1209 NORMAL_FRAME,
1210 alpha_heuristic_frame_this_id,
1211 alpha_heuristic_frame_prev_register
1212 };
1213
1214 static const struct frame_unwind *
1215 alpha_heuristic_frame_sniffer (struct frame_info *next_frame)
1216 {
1217 return &alpha_heuristic_frame_unwind;
1218 }
1219
1220 static CORE_ADDR
1221 alpha_heuristic_frame_base_address (struct frame_info *next_frame,
1222 void **this_prologue_cache)
1223 {
1224 struct alpha_heuristic_unwind_cache *info
1225 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
1226
1227 return info->vfp;
1228 }
1229
1230 static const struct frame_base alpha_heuristic_frame_base = {
1231 &alpha_heuristic_frame_unwind,
1232 alpha_heuristic_frame_base_address,
1233 alpha_heuristic_frame_base_address,
1234 alpha_heuristic_frame_base_address
1235 };
1236
1237 /* Just like reinit_frame_cache, but with the right arguments to be
1238 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
1239
1240 static void
1241 reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c)
1242 {
1243 reinit_frame_cache ();
1244 }
1245
1246 \f
1247 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1248 dummy frame. The frame ID's base needs to match the TOS value
1249 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1250 breakpoint. */
1251
1252 static struct frame_id
1253 alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
1254 {
1255 ULONGEST base;
1256 frame_unwind_unsigned_register (next_frame, ALPHA_SP_REGNUM, &base);
1257 return frame_id_build (base, frame_pc_unwind (next_frame));
1258 }
1259
1260 static CORE_ADDR
1261 alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1262 {
1263 ULONGEST pc;
1264 frame_unwind_unsigned_register (next_frame, ALPHA_PC_REGNUM, &pc);
1265 return pc;
1266 }
1267
1268 \f
1269 /* Helper routines for alpha*-nat.c files to move register sets to and
1270 from core files. The UNIQUE pointer is allowed to be NULL, as most
1271 targets don't supply this value in their core files. */
1272
1273 void
1274 alpha_supply_int_regs (int regno, const void *r0_r30,
1275 const void *pc, const void *unique)
1276 {
1277 int i;
1278
1279 for (i = 0; i < 31; ++i)
1280 if (regno == i || regno == -1)
1281 regcache_raw_supply (current_regcache, i, (const char *)r0_r30 + i*8);
1282
1283 if (regno == ALPHA_ZERO_REGNUM || regno == -1)
1284 regcache_raw_supply (current_regcache, ALPHA_ZERO_REGNUM, NULL);
1285
1286 if (regno == ALPHA_PC_REGNUM || regno == -1)
1287 regcache_raw_supply (current_regcache, ALPHA_PC_REGNUM, pc);
1288
1289 if (regno == ALPHA_UNIQUE_REGNUM || regno == -1)
1290 regcache_raw_supply (current_regcache, ALPHA_UNIQUE_REGNUM, unique);
1291 }
1292
1293 void
1294 alpha_fill_int_regs (int regno, void *r0_r30, void *pc, void *unique)
1295 {
1296 int i;
1297
1298 for (i = 0; i < 31; ++i)
1299 if (regno == i || regno == -1)
1300 regcache_raw_collect (current_regcache, i, (char *)r0_r30 + i*8);
1301
1302 if (regno == ALPHA_PC_REGNUM || regno == -1)
1303 regcache_raw_collect (current_regcache, ALPHA_PC_REGNUM, pc);
1304
1305 if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1))
1306 regcache_raw_collect (current_regcache, ALPHA_UNIQUE_REGNUM, unique);
1307 }
1308
1309 void
1310 alpha_supply_fp_regs (int regno, const void *f0_f30, const void *fpcr)
1311 {
1312 int i;
1313
1314 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1315 if (regno == i || regno == -1)
1316 regcache_raw_supply (current_regcache, i,
1317 (const char *)f0_f30 + (i - ALPHA_FP0_REGNUM) * 8);
1318
1319 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
1320 regcache_raw_supply (current_regcache, ALPHA_FPCR_REGNUM, fpcr);
1321 }
1322
1323 void
1324 alpha_fill_fp_regs (int regno, void *f0_f30, void *fpcr)
1325 {
1326 int i;
1327
1328 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1329 if (regno == i || regno == -1)
1330 regcache_raw_collect (current_regcache, i,
1331 (char *)f0_f30 + (i - ALPHA_FP0_REGNUM) * 8);
1332
1333 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
1334 regcache_raw_collect (current_regcache, ALPHA_FPCR_REGNUM, fpcr);
1335 }
1336
1337 \f
1338
1339 /* Return nonzero if the G_floating register value in REG is equal to
1340 zero for FP control instructions. */
1341
1342 static int
1343 fp_register_zero_p (LONGEST reg)
1344 {
1345 /* Check that all bits except the sign bit are zero. */
1346 const LONGEST zero_mask = ((LONGEST) 1 << 63) ^ -1;
1347
1348 return ((reg & zero_mask) == 0);
1349 }
1350
1351 /* Return the value of the sign bit for the G_floating register
1352 value held in REG. */
1353
1354 static int
1355 fp_register_sign_bit (LONGEST reg)
1356 {
1357 const LONGEST sign_mask = (LONGEST) 1 << 63;
1358
1359 return ((reg & sign_mask) != 0);
1360 }
1361
1362 /* alpha_software_single_step() is called just before we want to resume
1363 the inferior, if we want to single-step it but there is no hardware
1364 or kernel single-step support (NetBSD on Alpha, for example). We find
1365 the target of the coming instruction and breakpoint it.
1366
1367 single_step is also called just after the inferior stops. If we had
1368 set up a simulated single-step, we undo our damage. */
1369
1370 static CORE_ADDR
1371 alpha_next_pc (CORE_ADDR pc)
1372 {
1373 unsigned int insn;
1374 unsigned int op;
1375 int regno;
1376 int offset;
1377 LONGEST rav;
1378 char reg[8];
1379
1380 insn = alpha_read_insn (pc);
1381
1382 /* Opcode is top 6 bits. */
1383 op = (insn >> 26) & 0x3f;
1384
1385 if (op == 0x1a)
1386 {
1387 /* Jump format: target PC is:
1388 RB & ~3 */
1389 return (read_register ((insn >> 16) & 0x1f) & ~3);
1390 }
1391
1392 if ((op & 0x30) == 0x30)
1393 {
1394 /* Branch format: target PC is:
1395 (new PC) + (4 * sext(displacement)) */
1396 if (op == 0x30 || /* BR */
1397 op == 0x34) /* BSR */
1398 {
1399 branch_taken:
1400 offset = (insn & 0x001fffff);
1401 if (offset & 0x00100000)
1402 offset |= 0xffe00000;
1403 offset *= 4;
1404 return (pc + 4 + offset);
1405 }
1406
1407 /* Need to determine if branch is taken; read RA. */
1408 regno = (insn >> 21) & 0x1f;
1409 switch (op)
1410 {
1411 case 0x31: /* FBEQ */
1412 case 0x36: /* FBGE */
1413 case 0x37: /* FBGT */
1414 case 0x33: /* FBLE */
1415 case 0x32: /* FBLT */
1416 case 0x35: /* FBNE */
1417 regno += FP0_REGNUM;
1418 }
1419
1420 regcache_cooked_read (current_regcache, regno, reg);
1421 rav = extract_signed_integer (reg, 8);
1422
1423 switch (op)
1424 {
1425 case 0x38: /* BLBC */
1426 if ((rav & 1) == 0)
1427 goto branch_taken;
1428 break;
1429 case 0x3c: /* BLBS */
1430 if (rav & 1)
1431 goto branch_taken;
1432 break;
1433 case 0x39: /* BEQ */
1434 if (rav == 0)
1435 goto branch_taken;
1436 break;
1437 case 0x3d: /* BNE */
1438 if (rav != 0)
1439 goto branch_taken;
1440 break;
1441 case 0x3a: /* BLT */
1442 if (rav < 0)
1443 goto branch_taken;
1444 break;
1445 case 0x3b: /* BLE */
1446 if (rav <= 0)
1447 goto branch_taken;
1448 break;
1449 case 0x3f: /* BGT */
1450 if (rav > 0)
1451 goto branch_taken;
1452 break;
1453 case 0x3e: /* BGE */
1454 if (rav >= 0)
1455 goto branch_taken;
1456 break;
1457
1458 /* Floating point branches. */
1459
1460 case 0x31: /* FBEQ */
1461 if (fp_register_zero_p (rav))
1462 goto branch_taken;
1463 break;
1464 case 0x36: /* FBGE */
1465 if (fp_register_sign_bit (rav) == 0 || fp_register_zero_p (rav))
1466 goto branch_taken;
1467 break;
1468 case 0x37: /* FBGT */
1469 if (fp_register_sign_bit (rav) == 0 && ! fp_register_zero_p (rav))
1470 goto branch_taken;
1471 break;
1472 case 0x33: /* FBLE */
1473 if (fp_register_sign_bit (rav) == 1 || fp_register_zero_p (rav))
1474 goto branch_taken;
1475 break;
1476 case 0x32: /* FBLT */
1477 if (fp_register_sign_bit (rav) == 1 && ! fp_register_zero_p (rav))
1478 goto branch_taken;
1479 break;
1480 case 0x35: /* FBNE */
1481 if (! fp_register_zero_p (rav))
1482 goto branch_taken;
1483 break;
1484 }
1485 }
1486
1487 /* Not a branch or branch not taken; target PC is:
1488 pc + 4 */
1489 return (pc + 4);
1490 }
1491
1492 void
1493 alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p)
1494 {
1495 static CORE_ADDR next_pc;
1496 CORE_ADDR pc;
1497
1498 if (insert_breakpoints_p)
1499 {
1500 pc = read_pc ();
1501 next_pc = alpha_next_pc (pc);
1502
1503 insert_single_step_breakpoint (next_pc);
1504 }
1505 else
1506 {
1507 remove_single_step_breakpoints ();
1508 write_pc (next_pc);
1509 }
1510 }
1511
1512 \f
1513 /* Initialize the current architecture based on INFO. If possible, re-use an
1514 architecture from ARCHES, which is a list of architectures already created
1515 during this debugging session.
1516
1517 Called e.g. at program startup, when reading a core file, and when reading
1518 a binary file. */
1519
1520 static struct gdbarch *
1521 alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1522 {
1523 struct gdbarch_tdep *tdep;
1524 struct gdbarch *gdbarch;
1525
1526 /* Try to determine the ABI of the object we are loading. */
1527 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
1528 {
1529 /* If it's an ECOFF file, assume it's OSF/1. */
1530 if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour)
1531 info.osabi = GDB_OSABI_OSF1;
1532 }
1533
1534 /* Find a candidate among extant architectures. */
1535 arches = gdbarch_list_lookup_by_info (arches, &info);
1536 if (arches != NULL)
1537 return arches->gdbarch;
1538
1539 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1540 gdbarch = gdbarch_alloc (&info, tdep);
1541
1542 /* Lowest text address. This is used by heuristic_proc_start()
1543 to decide when to stop looking. */
1544 tdep->vm_min_address = (CORE_ADDR) 0x120000000LL;
1545
1546 tdep->dynamic_sigtramp_offset = NULL;
1547 tdep->sigcontext_addr = NULL;
1548 tdep->sc_pc_offset = 2 * 8;
1549 tdep->sc_regs_offset = 4 * 8;
1550 tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8;
1551
1552 tdep->jb_pc = -1; /* longjmp support not enabled by default */
1553
1554 /* Type sizes */
1555 set_gdbarch_short_bit (gdbarch, 16);
1556 set_gdbarch_int_bit (gdbarch, 32);
1557 set_gdbarch_long_bit (gdbarch, 64);
1558 set_gdbarch_long_long_bit (gdbarch, 64);
1559 set_gdbarch_float_bit (gdbarch, 32);
1560 set_gdbarch_double_bit (gdbarch, 64);
1561 set_gdbarch_long_double_bit (gdbarch, 64);
1562 set_gdbarch_ptr_bit (gdbarch, 64);
1563
1564 /* Register info */
1565 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS);
1566 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM);
1567 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM);
1568 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM);
1569
1570 set_gdbarch_register_name (gdbarch, alpha_register_name);
1571 set_gdbarch_deprecated_register_byte (gdbarch, alpha_register_byte);
1572 set_gdbarch_register_type (gdbarch, alpha_register_type);
1573
1574 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register);
1575 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register);
1576
1577 set_gdbarch_convert_register_p (gdbarch, alpha_convert_register_p);
1578 set_gdbarch_register_to_value (gdbarch, alpha_register_to_value);
1579 set_gdbarch_value_to_register (gdbarch, alpha_value_to_register);
1580
1581 set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p);
1582
1583 /* Prologue heuristics. */
1584 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue);
1585
1586 /* Disassembler. */
1587 set_gdbarch_print_insn (gdbarch, print_insn_alpha);
1588
1589 /* Call info. */
1590
1591 set_gdbarch_deprecated_use_struct_convention (gdbarch, always_use_struct_convention);
1592 set_gdbarch_extract_return_value (gdbarch, alpha_extract_return_value);
1593 set_gdbarch_store_return_value (gdbarch, alpha_store_return_value);
1594 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, alpha_extract_struct_value_address);
1595
1596 /* Settings for calling functions in the inferior. */
1597 set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call);
1598
1599 /* Methods for saving / extracting a dummy frame's ID. */
1600 set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id);
1601
1602 /* Return the unwound PC value. */
1603 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc);
1604
1605 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1606 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
1607
1608 set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc);
1609 set_gdbarch_decr_pc_after_break (gdbarch, 4);
1610 set_gdbarch_cannot_step_breakpoint (gdbarch, 1);
1611
1612 /* Hook in ABI-specific overrides, if they have been registered. */
1613 gdbarch_init_osabi (info, gdbarch);
1614
1615 /* Now that we have tuned the configuration, set a few final things
1616 based on what the OS ABI has told us. */
1617
1618 if (tdep->jb_pc >= 0)
1619 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target);
1620
1621 frame_unwind_append_sniffer (gdbarch, alpha_sigtramp_frame_sniffer);
1622 frame_unwind_append_sniffer (gdbarch, alpha_heuristic_frame_sniffer);
1623
1624 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base);
1625
1626 return gdbarch;
1627 }
1628
1629 void
1630 alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1631 {
1632 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
1633 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
1634 }
1635
1636 extern initialize_file_ftype _initialize_alpha_tdep; /* -Wmissing-prototypes */
1637
1638 void
1639 _initialize_alpha_tdep (void)
1640 {
1641 struct cmd_list_element *c;
1642
1643 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
1644
1645 /* Let the user set the fence post for heuristic_proc_start. */
1646
1647 /* We really would like to have both "0" and "unlimited" work, but
1648 command.c doesn't deal with that. So make it a var_zinteger
1649 because the user can always use "999999" or some such for unlimited. */
1650 /* We need to throw away the frame cache when we set this, since it
1651 might change our ability to get backtraces. */
1652 add_setshow_zinteger_cmd ("heuristic-fence-post", class_support,
1653 &heuristic_fence_post, _("\
1654 Set the distance searched for the start of a function."), _("\
1655 Show the distance searched for the start of a function."), _("\
1656 If you are debugging a stripped executable, GDB needs to search through the\n\
1657 program for the start of a function. This command sets the distance of the\n\
1658 search. The only need to set it is when debugging a stripped executable."),
1659 reinit_frame_cache_sfunc,
1660 NULL, /* FIXME: i18n: The distance searched for the start of a function is \"%d\". */
1661 &setlist, &showlist);
1662 }