gdb/config/pa/tm-hppa.h

   1 /* Parameters for execution on any Hewlett-Packard PA-RISC machine.
   2    Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1995
   3    Free Software Foundation, Inc.
   4
   5    Contributed by the Center for Software Science at the
   6    University of Utah (pa-gdb-bugs@cs.utah.edu).
   7
   8 This file is part of GDB.
   9
  10 This program is free software; you can redistribute it and/or modify
  11 it under the terms of the GNU General Public License as published by
  12 the Free Software Foundation; either version 2 of the License, or
  13 (at your option) any later version.
  14
  15 This program is distributed in the hope that it will be useful,
  16 but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 GNU General Public License for more details.
  19
  20 You should have received a copy of the GNU General Public License
  21 along with this program; if not, write to the Free Software
  22 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  23
  24 /* Target system byte order. */
  25
  26 #define TARGET_BYTE_ORDER       BIG_ENDIAN
  27
  28 /* Get at various relevent fields of an instruction word. */
  29
  30 #define MASK_5 0x1f
  31 #define MASK_11 0x7ff
  32 #define MASK_14 0x3fff
  33 #define MASK_21 0x1fffff
  34
  35 /* This macro gets bit fields using HP's numbering (MSB = 0) */
  36
  37 #define GET_FIELD(X, FROM, TO) \
  38   ((X) >> 31 - (TO) & (1 << ((TO) - (FROM) + 1)) - 1)
  39
  40 /* Watch out for NaNs */
  41
  42 #define IEEE_FLOAT
  43
  44 /* On the PA, any pass-by-value structure > 8 bytes is actually
  45    passed via a pointer regardless of its type or the compiler
  46    used.  */
  47
  48 #define REG_STRUCT_HAS_ADDR(gcc_p,type) \
  49   (TYPE_LENGTH (type) > 8)
  50
  51 /* Offset from address of function to start of its code.
  52    Zero on most machines.  */
  53
  54 #define FUNCTION_START_OFFSET 0
  55
  56 /* Advance PC across any function entry prologue instructions
  57    to reach some "real" code.  */
  58
  59 #define SKIP_PROLOGUE(pc) pc = skip_prologue (pc)
  60
  61 /* If PC is in some function-call trampoline code, return the PC
  62    where the function itself actually starts.  If not, return NULL.  */
  63
  64 #define SKIP_TRAMPOLINE_CODE(pc) skip_trampoline_code (pc, NULL)
  65
  66 /* Return non-zero if we are in an appropriate trampoline. */
  67
  68 #define IN_SOLIB_CALL_TRAMPOLINE(pc, name) \
  69    in_solib_call_trampoline (pc, name)
  70
  71 #define IN_SOLIB_RETURN_TRAMPOLINE(pc, name) \
  72   in_solib_return_trampoline (pc, name)
  73
  74 /* Immediately after a function call, return the saved pc.
  75    Can't go through the frames for this because on some machines
  76    the new frame is not set up until the new function executes
  77    some instructions.  */
  78
  79 #undef  SAVED_PC_AFTER_CALL
  80 #define SAVED_PC_AFTER_CALL(frame) saved_pc_after_call (frame)
  81
  82 /* Stack grows upward */
  83
  84 #define INNER_THAN >
  85
  86 /* Sequence of bytes for breakpoint instruction.  */
  87
  88 #define BREAKPOINT {0x00, 0x01, 0x00, 0x04}
  89
  90 /* Amount PC must be decremented by after a breakpoint.
  91    This is often the number of bytes in BREAKPOINT
  92    but not always.
  93
  94    Not on the PA-RISC */
  95
  96 #define DECR_PC_AFTER_BREAK 0
  97
  98 /* return instruction is bv r0(rp) or bv,n r0(rp)*/
  99
 100 #define ABOUT_TO_RETURN(pc) ((read_memory_integer (pc, 4) | 0x2) == 0xE840C002)
 101
 102 /* Say how long (ordinary) registers are.  This is a piece of bogosity
 103    used in push_word and a few other places; REGISTER_RAW_SIZE is the
 104    real way to know how big a register is.  */
 105
 106 #define REGISTER_SIZE 4
 107
 108 /* Number of machine registers */
 109
 110 #define NUM_REGS 128
 111
 112 /* Initializer for an array of names of registers.
 113    There should be NUM_REGS strings in this initializer.  */
 114
 115 #define REGISTER_NAMES  \
 116  {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9",        \
 117   "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
 118   "r20", "r21", "r22", "r23", "r24", "r25", "r26", "dp", "ret0", "ret1", \
 119   "sp", "r31", "sar", "pcoqh", "pcsqh", "pcoqt", "pcsqt", \
 120   "eiem", "iir", "isr", "ior", "ipsw", "goto", "sr4", "sr0", "sr1", "sr2", \
 121   "sr3", "sr5", "sr6", "sr7", "cr0", "cr8", "cr9", "ccr", "cr12", "cr13", \
 122   "cr24", "cr25", "cr26", "mpsfu_high", "mpsfu_low", "mpsfu_ovflo", "pad", \
 123   "fpsr", "fpe1", "fpe2", "fpe3", "fpe4", "fpe5", "fpe6", "fpe7", \
 124   "fr4", "fr4R", "fr5", "fr5R", "fr6", "fr6R", "fr7", "fr7R", \
 125   "fr8", "fr8R", "fr9", "fr9R", "fr10", "fr10R", "fr11", "fr11R", \
 126   "fr12", "fr12R", "fr13", "fr13R", "fr14", "fr14R", "fr15", "fr15R", \
 127   "fr16", "fr16R", "fr17", "fr17R", "fr18", "fr18R", "fr19", "fr19R", \
 128   "fr20", "fr20R", "fr21", "fr21R", "fr22", "fr22R", "fr23", "fr23R", \
 129   "fr24", "fr24R", "fr25", "fr25R", "fr26", "fr26R", "fr27", "fr27R", \
 130   "fr28", "fr28R", "fr29", "fr29R", "fr30", "fr30R", "fr31", "fr31R"}
 131
 132 /* Register numbers of various important registers.
 133    Note that some of these values are "real" register numbers,
 134    and correspond to the general registers of the machine,
 135    and some are "phony" register numbers which are too large
 136    to be actual register numbers as far as the user is concerned
 137    but do serve to get the desired values when passed to read_register.  */
 138
 139 #define R0_REGNUM 0             /* Doesn't actually exist, used as base for
 140                                    other r registers.  */
 141 #define FLAGS_REGNUM 0          /* Various status flags */
 142 #define RP_REGNUM 2             /* return pointer */
 143 #define FP_REGNUM 3             /* Contains address of executing stack */
 144                                 /* frame */
 145 #define SP_REGNUM 30            /* Contains address of top of stack */
 146 #define SAR_REGNUM 32           /* Shift Amount Register */
 147 #define IPSW_REGNUM 41          /* Interrupt Processor Status Word */
 148 #define PCOQ_HEAD_REGNUM 33     /* instruction offset queue head */
 149 #define PCSQ_HEAD_REGNUM 34     /* instruction space queue head */
 150 #define PCOQ_TAIL_REGNUM 35     /* instruction offset queue tail */
 151 #define PCSQ_TAIL_REGNUM 36     /* instruction space queue tail */
 152 #define EIEM_REGNUM 37          /* External Interrupt Enable Mask */
 153 #define IIR_REGNUM 38           /* Interrupt Instruction Register */
 154 #define IOR_REGNUM 40           /* Interrupt Offset Register */
 155 #define SR4_REGNUM 43           /* space register 4 */
 156 #define RCR_REGNUM 51           /* Recover Counter (also known as cr0) */
 157 #define CCR_REGNUM 54           /* Coprocessor Configuration Register */
 158 #define TR0_REGNUM 57           /* Temporary Registers (cr24 -> cr31) */
 159 #define FP0_REGNUM 64           /* floating point reg. 0 */
 160 #define FP4_REGNUM 72
 161
 162 /* compatibility with the rest of gdb. */
 163 #define PC_REGNUM PCOQ_HEAD_REGNUM
 164 #define NPC_REGNUM PCOQ_TAIL_REGNUM
 165
 166 /*
 167  * Processor Status Word Masks
 168  */
 169
 170 #define PSW_T   0x01000000      /* Taken Branch Trap Enable */
 171 #define PSW_H   0x00800000      /* Higher-Privilege Transfer Trap Enable */
 172 #define PSW_L   0x00400000      /* Lower-Privilege Transfer Trap Enable */
 173 #define PSW_N   0x00200000      /* PC Queue Front Instruction Nullified */
 174 #define PSW_X   0x00100000      /* Data Memory Break Disable */
 175 #define PSW_B   0x00080000      /* Taken Branch in Previous Cycle */
 176 #define PSW_C   0x00040000      /* Code Address Translation Enable */
 177 #define PSW_V   0x00020000      /* Divide Step Correction */
 178 #define PSW_M   0x00010000      /* High-Priority Machine Check Disable */
 179 #define PSW_CB  0x0000ff00      /* Carry/Borrow Bits */
 180 #define PSW_R   0x00000010      /* Recovery Counter Enable */
 181 #define PSW_Q   0x00000008      /* Interruption State Collection Enable */
 182 #define PSW_P   0x00000004      /* Protection ID Validation Enable */
 183 #define PSW_D   0x00000002      /* Data Address Translation Enable */
 184 #define PSW_I   0x00000001      /* External, Power Failure, Low-Priority */
 185                                 /* Machine Check Interruption Enable */
 186
 187 /* When fetching register values from an inferior or a core file,
 188    clean them up using this macro.  BUF is a char pointer to
 189    the raw value of the register in the registers[] array.  */
 190
 191 #define CLEAN_UP_REGISTER_VALUE(regno, buf) \
 192   do {  \
 193     if ((regno) == PCOQ_HEAD_REGNUM || (regno) == PCOQ_TAIL_REGNUM) \
 194       (buf)[3] &= ~0x3; \
 195   } while (0)
 196
 197 /* Define DO_REGISTERS_INFO() to do machine-specific formatting
 198    of register dumps. */
 199
 200 #define DO_REGISTERS_INFO(_regnum, fp) pa_do_registers_info (_regnum, fp)
 201
 202 /* PA specific macro to see if the current instruction is nullified. */
 203 #ifndef INSTRUCTION_NULLIFIED
 204 #define INSTRUCTION_NULLIFIED ((int)read_register (IPSW_REGNUM) & 0x00200000)
 205 #endif
 206
 207 /* Number of bytes of storage in the actual machine representation
 208    for register N.  On the PA-RISC, all regs are 4 bytes, including
 209    the FP registers (they're accessed as two 4 byte halves).  */
 210
 211 #define REGISTER_RAW_SIZE(N) 4
 212
 213 /* Total amount of space needed to store our copies of the machine's
 214    register state, the array `registers'.  */
 215 #define REGISTER_BYTES (NUM_REGS * 4)
 216
 217 /* Index within `registers' of the first byte of the space for
 218    register N.  */
 219
 220 #define REGISTER_BYTE(N) (N) * 4
 221
 222 /* Number of bytes of storage in the program's representation
 223    for register N. */
 224
 225 #define REGISTER_VIRTUAL_SIZE(N) REGISTER_RAW_SIZE(N)
 226
 227 /* Largest value REGISTER_RAW_SIZE can have.  */
 228
 229 #define MAX_REGISTER_RAW_SIZE 4
 230
 231 /* Largest value REGISTER_VIRTUAL_SIZE can have.  */
 232
 233 #define MAX_REGISTER_VIRTUAL_SIZE 8
 234
 235 /* Return the GDB type object for the "standard" data type
 236    of data in register N.  */
 237
 238 #define REGISTER_VIRTUAL_TYPE(N) \
 239  ((N) < FP4_REGNUM ? builtin_type_int : builtin_type_float)
 240
 241 /* Store the address of the place in which to copy the structure the
 242    subroutine will return.  This is called from call_function. */
 243
 244 #define STORE_STRUCT_RETURN(ADDR, SP) {write_register (28, (ADDR)); }
 245
 246 /* Extract from an array REGBUF containing the (raw) register state
 247    a function return value of type TYPE, and copy that, in virtual format,
 248    into VALBUF.
 249
 250    FIXME: Not sure what to do for soft float here.  */
 251
 252 #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
 253   { \
 254     if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
 255       memcpy ((VALBUF), \
 256               ((char *)(REGBUF)) + REGISTER_BYTE (FP4_REGNUM), \
 257               TYPE_LENGTH (TYPE)); \
 258     else \
 259       memcpy ((VALBUF), \
 260               (char *)(REGBUF) + REGISTER_BYTE (28) + \
 261               (TYPE_LENGTH (TYPE) >= 4 ? 0 : 4 - TYPE_LENGTH (TYPE)), \
 262               TYPE_LENGTH (TYPE)); \
 263   }
 264
 265 /* Write into appropriate registers a function return value
 266    of type TYPE, given in virtual format.
 267
 268    For software floating point the return value goes into the integer
 269    registers.  But we don't have any flag to key this on, so we always
 270    store the value into the integer registers, and if it's a float value,
 271    then we put it in the float registers too.  */
 272
 273 #define STORE_RETURN_VALUE(TYPE,VALBUF) \
 274   write_register_bytes (REGISTER_BYTE (28),(VALBUF), TYPE_LENGTH (TYPE)) ; \
 275   if (!SOFT_FLOAT) \
 276     write_register_bytes ((TYPE_CODE(TYPE) == TYPE_CODE_FLT \
 277                            ? REGISTER_BYTE (FP4_REGNUM) \
 278                            : REGISTER_BYTE (28)),               \
 279                           (VALBUF), TYPE_LENGTH (TYPE))
 280
 281 /* Extract from an array REGBUF containing the (raw) register state
 282    the address in which a function should return its structure value,
 283    as a CORE_ADDR (or an expression that can be used as one).  */
 284
 285 #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
 286   (*(int *)((REGBUF) + REGISTER_BYTE (28)))
 287
 288 /*
 289  * This macro defines the register numbers (from REGISTER_NAMES) that
 290  * are effectively unavailable to the user through ptrace().  It allows
 291  * us to include the whole register set in REGISTER_NAMES (inorder to
 292  * better support remote debugging).  If it is used in
 293  * fetch/store_inferior_registers() gdb will not complain about I/O errors
 294  * on fetching these registers.  If all registers in REGISTER_NAMES
 295  * are available, then return false (0).
 296  */
 297
 298 #define CANNOT_STORE_REGISTER(regno)            \
 299                    ((regno) == 0) ||     \
 300                    ((regno) == PCSQ_HEAD_REGNUM) || \
 301                    ((regno) >= PCSQ_TAIL_REGNUM && (regno) < IPSW_REGNUM) ||  \
 302                    ((regno) > IPSW_REGNUM && (regno) < FP4_REGNUM)
 303
 304 #define INIT_EXTRA_FRAME_INFO(fromleaf, frame) init_extra_frame_info (fromleaf, frame)
 305
 306 /* Describe the pointer in each stack frame to the previous stack frame
 307    (its caller).  */
 308
 309 /* FRAME_CHAIN takes a frame's nominal address
 310    and produces the frame's chain-pointer.
 311
 312    FRAME_CHAIN_COMBINE takes the chain pointer and the frame's nominal address
 313    and produces the nominal address of the caller frame.
 314
 315    However, if FRAME_CHAIN_VALID returns zero,
 316    it means the given frame is the outermost one and has no caller.
 317    In that case, FRAME_CHAIN_COMBINE is not used.  */
 318
 319 /* In the case of the PA-RISC, the frame's nominal address
 320    is the address of a 4-byte word containing the calling frame's
 321    address (previous FP).  */
 322
 323 #define FRAME_CHAIN(thisframe) frame_chain (thisframe)
 324
 325 #define FRAME_CHAIN_VALID(chain, thisframe) \
 326   frame_chain_valid (chain, thisframe)
 327
 328 #define FRAME_CHAIN_COMBINE(chain, thisframe) (chain)
 329
 330 /* Define other aspects of the stack frame.  */
 331
 332 /* A macro that tells us whether the function invocation represented
 333    by FI does not have a frame on the stack associated with it.  If it
 334    does not, FRAMELESS is set to 1, else 0.  */
 335 #define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
 336   (FRAMELESS) = frameless_function_invocation(FI)
 337
 338 #define FRAME_SAVED_PC(FRAME) frame_saved_pc (FRAME)
 339
 340 #define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
 341
 342 #define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
 343 /* Set VAL to the number of args passed to frame described by FI.
 344    Can set VAL to -1, meaning no way to tell.  */
 345
 346 /* We can't tell how many args there are
 347    now that the C compiler delays popping them.  */
 348 #define FRAME_NUM_ARGS(val,fi) (val = -1)
 349
 350 /* Return number of bytes at start of arglist that are not really args.  */
 351
 352 #define FRAME_ARGS_SKIP 0
 353
 354 #define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
 355   hppa_frame_find_saved_regs (frame_info, &frame_saved_regs)
 356
 357 \f
 358 /* Things needed for making the inferior call functions.  */
 359
 360 /* Push an empty stack frame, to record the current PC, etc. */
 361
 362 #define PUSH_DUMMY_FRAME push_dummy_frame (&inf_status)
 363
 364 /* Discard from the stack the innermost frame,
 365    restoring all saved registers.  */
 366 #define POP_FRAME  hppa_pop_frame ()
 367
 368 #define INSTRUCTION_SIZE 4
 369
 370 #ifndef PA_LEVEL_0
 371
 372 /* Non-level zero PA's have space registers (but they don't always have
 373    floating-point, do they????  */
 374
 375 /* This sequence of words is the instructions
 376
 377 ; Call stack frame has already been built by gdb. Since we could be calling
 378 ; a varargs function, and we do not have the benefit of a stub to put things in
 379 ; the right place, we load the first 4 word of arguments into both the general
 380 ; and fp registers.
 381 call_dummy
 382         ldw -36(sp), arg0
 383         ldw -40(sp), arg1
 384         ldw -44(sp), arg2
 385         ldw -48(sp), arg3
 386         ldo -36(sp), r1
 387         fldws 0(0, r1), fr4
 388         fldds -4(0, r1), fr5
 389         fldws -8(0, r1), fr6
 390         fldds -12(0, r1), fr7
 391         ldil 0, r22                     ; FUNC_LDIL_OFFSET must point here
 392         ldo 0(r22), r22                 ; FUNC_LDO_OFFSET must point here
 393         ldsid (0,r22), r4
 394         ldil 0, r1                      ; SR4EXPORT_LDIL_OFFSET must point here
 395         ldo 0(r1), r1                   ; SR4EXPORT_LDO_OFFSET must point here
 396         ldsid (0,r1), r20
 397         combt,=,n r4, r20, text_space   ; If target is in data space, do a
 398         ble 0(sr5, r22)                 ; "normal" procedure call
 399         copy r31, r2
 400         break 4, 8
 401         mtsp r21, sr0
 402         ble,n 0(sr0, r22)
 403 text_space                              ; Otherwise, go through _sr4export,
 404         ble (sr4, r1)                   ; which will return back here.
 405         stw r31,-24(r30)
 406         break 4, 8
 407         mtsp r21, sr0
 408         ble,n 0(sr0, r22)
 409         nop                             ; To avoid kernel bugs
 410         nop                             ; and keep the dummy 8 byte aligned
 411
 412    The dummy decides if the target is in text space or data space. If
 413    it's in data space, there's no problem because the target can
 414    return back to the dummy. However, if the target is in text space,
 415    the dummy calls the secret, undocumented routine _sr4export, which
 416    calls a function in text space and can return to any space. Instead
 417    of including fake instructions to represent saved registers, we
 418    know that the frame is associated with the call dummy and treat it
 419    specially.
 420
 421    The trailing NOPs are needed to avoid a bug in HPUX, BSD and OSF1
 422    kernels.   If the memory at the location pointed to by the PC is
 423    0xffffffff then a ptrace step call will fail (even if the instruction
 424    is nullified).
 425
 426    The code to pop a dummy frame single steps three instructions
 427    starting with the last mtsp.  This includes the nullified "instruction"
 428    following the ble (which is uninitialized junk).  If the
 429    "instruction" following the last BLE is 0xffffffff, then the ptrace
 430    will fail and the dummy frame is not correctly popped.
 431
 432    By placing a NOP in the delay slot of the BLE instruction we can be
 433    sure that we never try to execute a 0xffffffff instruction and
 434    avoid the kernel bug.  The second NOP is needed to keep the call
 435    dummy 8 byte aligned.  */
 436
 437 /* Define offsets into the call dummy for the target function address */
 438 #define FUNC_LDIL_OFFSET (INSTRUCTION_SIZE * 9)
 439 #define FUNC_LDO_OFFSET (INSTRUCTION_SIZE * 10)
 440
 441 /* Define offsets into the call dummy for the _sr4export address */
 442 #define SR4EXPORT_LDIL_OFFSET (INSTRUCTION_SIZE * 12)
 443 #define SR4EXPORT_LDO_OFFSET (INSTRUCTION_SIZE * 13)
 444
 445 #define CALL_DUMMY {0x4BDA3FB9, 0x4BD93FB1, 0x4BD83FA9, 0x4BD73FA1,\
 446                     0x37C13FB9, 0x24201004, 0x2C391005, 0x24311006,\
 447                     0x2C291007, 0x22C00000, 0x36D60000, 0x02C010A4,\
 448                     0x20200000, 0x34210000, 0x002010b4, 0x82842022,\
 449                     0xe6c06000, 0x081f0242, 0x00010004, 0x00151820,\
 450                     0xe6c00002, 0xe4202000, 0x6bdf3fd1, 0x00010004,\
 451                     0x00151820, 0xe6c00002, 0x08000240, 0x08000240}
 452
 453 #define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 28)
 454
 455 #else /* defined PA_LEVEL_0 */
 456
 457 /* This is the call dummy for a level 0 PA.  Level 0's don't have space
 458    registers (or floating point??), so we skip all that inter-space call stuff,
 459    and avoid touching the fp regs.
 460
 461 call_dummy
 462
 463         ldw -36(%sp), %arg0
 464         ldw -40(%sp), %arg1
 465         ldw -44(%sp), %arg2
 466         ldw -48(%sp), %arg3
 467         ldil 0, %r31                    ; FUNC_LDIL_OFFSET must point here
 468         ldo 0(%r31), %r31               ; FUNC_LDO_OFFSET must point here
 469         ble 0(%sr0, %r31)
 470         copy %r31, %r2
 471         break 4, 8
 472         nop                             ; restore_pc_queue expects these
 473         bv,n 0(%r22)                    ; instructions to be here...
 474         nop
 475 */
 476
 477 /* Define offsets into the call dummy for the target function address */
 478 #define FUNC_LDIL_OFFSET (INSTRUCTION_SIZE * 4)
 479 #define FUNC_LDO_OFFSET (INSTRUCTION_SIZE * 5)
 480
 481 #define CALL_DUMMY {0x4bda3fb9, 0x4bd93fb1, 0x4bd83fa9, 0x4bd73fa1,\
 482                     0x23e00000, 0x37ff0000, 0xe7e00000, 0x081f0242,\
 483                     0x00010004, 0x08000240, 0xeac0c002, 0x08000240}
 484
 485 #define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 12)
 486
 487 #endif
 488
 489 #define CALL_DUMMY_START_OFFSET 0
 490
 491 /*
 492  * Insert the specified number of args and function address
 493  * into a call sequence of the above form stored at DUMMYNAME.
 494  *
 495  * On the hppa we need to call the stack dummy through $$dyncall.
 496  * Therefore our version of FIX_CALL_DUMMY takes an extra argument,
 497  * real_pc, which is the location where gdb should start up the
 498  * inferior to do the function call.
 499  */
 500
 501 #define FIX_CALL_DUMMY hppa_fix_call_dummy
 502
 503 CORE_ADDR hppa_fix_call_dummy();
 504
 505 #define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
 506     sp = hppa_push_arguments(nargs, args, sp, struct_return, struct_addr)
 507 \f
 508 /* The low two bits of the PC on the PA contain the privilege level.  Some
 509    genius implementing a (non-GCC) compiler apparently decided this means
 510    that "addresses" in a text section therefore include a privilege level,
 511    and thus symbol tables should contain these bits.  This seems like a
 512    bonehead thing to do--anyway, it seems to work for our purposes to just
 513    ignore those bits.  */
 514 #define SMASH_TEXT_ADDRESS(addr) ((addr) &= ~0x3)
 515
 516 #define GDB_TARGET_IS_HPPA
 517
 518 #define BELIEVE_PCC_PROMOTION 1
 519
 520 /*
 521  * Unwind table and descriptor.
 522  */
 523
 524 struct unwind_table_entry {
 525   unsigned int region_start;
 526   unsigned int region_end;
 527
 528   unsigned int Cannot_unwind         :  1;
 529   unsigned int Millicode             :  1;
 530   unsigned int Millicode_save_sr0    :  1;
 531   unsigned int Region_description    :  2;
 532   unsigned int reserved1             :  1;
 533   unsigned int Entry_SR              :  1;
 534   unsigned int Entry_FR              :  4; /* number saved */
 535   unsigned int Entry_GR              :  5; /* number saved */
 536   unsigned int Args_stored           :  1;
 537   unsigned int Variable_Frame        :  1;
 538   unsigned int Separate_Package_Body :  1;
 539   unsigned int Frame_Extension_Millicode:1;
 540   unsigned int Stack_Overflow_Check  :  1;
 541   unsigned int Two_Instruction_SP_Increment:1;
 542   unsigned int Ada_Region            :  1;
 543 /* Use this field to store a stub unwind type.  */
 544 #define stub_type reserved2
 545   unsigned int reserved2             :  4;
 546   unsigned int Save_SP               :  1;
 547   unsigned int Save_RP               :  1;
 548   unsigned int Save_MRP_in_frame     :  1;
 549   unsigned int extn_ptr_defined      :  1;
 550   unsigned int Cleanup_defined       :  1;
 551
 552   unsigned int MPE_XL_interrupt_marker: 1;
 553   unsigned int HP_UX_interrupt_marker:  1;
 554   unsigned int Large_frame           :  1;
 555   unsigned int reserved4             :  2;
 556   unsigned int Total_frame_size      : 27;
 557 };
 558
 559 /* HP linkers also generate unwinds for various linker-generated stubs.
 560    GDB reads in the stubs from the $UNWIND_END$ subspace, then
 561    "converts" them into normal unwind entries using some of the reserved
 562    fields to store the stub type.  */
 563
 564 struct stub_unwind_entry
 565 {
 566   /* The offset within the executable for the associated stub.  */
 567   unsigned stub_offset;
 568
 569   /* The type of stub this unwind entry describes.  */
 570   char type;
 571
 572   /* Unknown.  Not needed by GDB at this time.  */
 573   char prs_info;
 574
 575   /* Length (in instructions) of the associated stub.  */
 576   short stub_length;
 577 };
 578
 579 /* Sizes (in bytes) of the native unwind entries.  */
 580 #define UNWIND_ENTRY_SIZE 16
 581 #define STUB_UNWIND_ENTRY_SIZE 8
 582
 583 /* The gaps represent linker stubs used in MPE and space for future
 584    expansion.  */
 585 enum unwind_stub_types
 586 {
 587   LONG_BRANCH = 1,
 588   PARAMETER_RELOCATION = 2,
 589   EXPORT = 10,
 590   IMPORT = 11,
 591 };
 592
 593
 594 /* Info about the unwind table associated with an object file.  This is hung
 595    off of the objfile->obj_private pointer, and is allocated in the objfile's
 596    psymbol obstack.  This allows us to have unique unwind info for each
 597    executable and shared library that we are debugging.  */
 598
 599 struct obj_unwind_info {
 600   struct unwind_table_entry *table; /* Pointer to unwind info */
 601   struct unwind_table_entry *cache; /* Pointer to last entry we found */
 602   int last;                     /* Index of last entry */
 603 };
 604
 605 #define OBJ_UNWIND_INFO(obj) ((struct obj_unwind_info *)obj->obj_private)
 606
 607 extern CORE_ADDR target_read_pc PARAMS ((int));
 608 extern void target_write_pc PARAMS ((CORE_ADDR, int));
 609 extern CORE_ADDR skip_trampoline_code PARAMS ((CORE_ADDR, char *));
 610
 611 #define TARGET_READ_PC(pid) target_read_pc (pid)
 612 #define TARGET_WRITE_PC(v,pid) target_write_pc (v,pid)
 613
 614 /* For a number of horrible reasons we may have to adjust the location
 615    of variables on the stack.  Ugh.  */
 616 #define HPREAD_ADJUST_STACK_ADDRESS(ADDR) hpread_adjust_stack_address(ADDR)
 617
 618 extern int hpread_adjust_stack_address PARAMS ((CORE_ADDR));