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1 /* Target machine sub-parameters for SPARC64, for GDB, the GNU debugger.
2 This is included by other tm-*.h files to define SPARC64 cpu-related info.
3 Copyright 1994, 1995, 1996, 1998 Free Software Foundation, Inc.
4 This is (obviously) based on the SPARC Vn (n<9) port.
5 Contributed by Doug Evans (dje@cygnus.com).
6 Further modified by Bob Manson (manson@cygnus.com).
8 This file is part of GDB.
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
25 #define GDB_MULTI_ARCH 2
27 #ifndef GDB_TARGET_IS_SPARC64
28 #define GDB_TARGET_IS_SPARC64 1
31 #include "sparc/tm-sparc.h"
33 /* Eeeew. Ok, we have to assume (for now) that the processor really is
34 in sparc64 mode. While this is the same instruction sequence as
35 on the Sparc, the stack frames are offset by +2047 (and the arguments
36 are 8 bytes instead of 4). */
38 std %f10, [ %fp + 0x7a7 ]
39 std %f8, [ %fp + 0x79f ]
40 std %f6, [ %fp + 0x797 ]
41 std %f4, [ %fp + 0x78f ]
42 std %f2, [ %fp + 0x787 ]
43 std %f0, [ %fp + 0x77f ]
44 std %g6, [ %fp + 0x777 ]
45 std %g4, [ %fp + 0x76f ]
46 std %g2, [ %fp + 0x767 ]
47 std %g0, [ %fp + 0x75f ]
48 std %fp, [ %fp + 0x757 ]
49 std %i4, [ %fp + 0x74f ]
50 std %i2, [ %fp + 0x747 ]
51 std %i0, [ %fp + 0x73f ]
57 st %o0, [ %fp + 0x72b ]
59 st %o0, [ %fp + 0x727 ]
61 st %o0, [ %fp + 0x723 ]
63 st %o0, [ %fp + 0x71f ]
64 ldx [ %sp + 0x8a7 ], %o5
65 ldx [ %sp + 0x89f ], %o4
66 ldx [ %sp + 0x897 ], %o3
67 ldx [ %sp + 0x88f ], %o2
68 ldx [ %sp + 0x887 ], %o1
70 ldx [ %sp + 0x87f ], %o0
77 #if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
79 * The following defines must go away for MULTI_ARCH.
82 #ifndef DO_CALL_DUMMY_ON_STACK
85 * These defines will suffice for the AT_ENTRY_POINT call dummy method.
89 #define CALL_DUMMY {0}
90 #undef CALL_DUMMY_LENGTH
91 #define CALL_DUMMY_LENGTH 0
92 #undef CALL_DUMMY_CALL_OFFSET
93 #define CALL_DUMMY_CALL_OFFSET 0
94 #undef CALL_DUMMY_START_OFFSET
95 #define CALL_DUMMY_START_OFFSET 0
96 #undef CALL_DUMMY_BREAKPOINT_OFFSET
97 #define CALL_DUMMY_BREAKPOINT_OFFSET 0
98 #undef CALL_DUMMY_BREAKPOINT_OFFSET_P
99 #define CALL_DUMMY_BREAKPOINT_OFFSET_P 1
100 #undef CALL_DUMMY_LOCATION
101 #define CALL_DUMMY_LOCATION AT_ENTRY_POINT
102 #undef CALL_DUMMY_STACK_ADJUST
103 #define CALL_DUMMY_STACK_ADJUST 128
104 #undef SIZEOF_CALL_DUMMY_WORDS
105 #define SIZEOF_CALL_DUMMY_WORDS 0
106 #undef CALL_DUMMY_ADDRESS
107 #define CALL_DUMMY_ADDRESS() entry_point_address()
108 #undef FIX_CALL_DUMMY
109 #define FIX_CALL_DUMMY(DUMMYNAME, PC, FUN, NARGS, ARGS, TYPE, GCC_P)
110 #undef PUSH_RETURN_ADDRESS
111 #define PUSH_RETURN_ADDRESS(PC, SP) sparc_at_entry_push_return_address (PC, SP)
113 sparc_at_entry_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
);
115 #undef STORE_STRUCT_RETURN
116 #define STORE_STRUCT_RETURN(ADDR, SP) \
117 sparc_at_entry_store_struct_return (ADDR, SP)
119 sparc_at_entry_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
);
124 * Old call dummy method, with CALL_DUMMY on the stack.
128 #define CALL_DUMMY { 0x9de3bec0fd3fa7f7LL, 0xf93fa7eff53fa7e7LL,\
129 0xf13fa7dfed3fa7d7LL, 0xe93fa7cfe53fa7c7LL,\
130 0xe13fa7bfdd3fa7b7LL, 0xd93fa7afd53fa7a7LL,\
131 0xd13fa79fcd3fa797LL, 0xc93fa78fc53fa787LL,\
132 0xc13fa77fcc3fa777LL, 0xc83fa76fc43fa767LL,\
133 0xc03fa75ffc3fa757LL, 0xf83fa74ff43fa747LL,\
134 0xf03fa73f01000000LL, 0x0100000001000000LL,\
135 0x0100000091580000LL, 0xd027a72b93500000LL,\
136 0xd027a72791480000LL, 0xd027a72391400000LL,\
137 0xd027a71fda5ba8a7LL, 0xd85ba89fd65ba897LL,\
138 0xd45ba88fd25ba887LL, 0x9fc02000d05ba87fLL,\
139 0x0100000091d02001LL, 0x0100000001000000LL }
142 /* 128 is to reserve space to write the %i/%l registers that will be restored
144 #undef CALL_DUMMY_STACK_ADJUST
145 #define CALL_DUMMY_STACK_ADJUST 128
147 /* Size of the call dummy in bytes. */
148 #undef CALL_DUMMY_LENGTH
149 #define CALL_DUMMY_LENGTH 192
151 /* Offset within CALL_DUMMY of the 'call' instruction. */
152 #undef CALL_DUMMY_START_OFFSET
153 #define CALL_DUMMY_START_OFFSET 148
155 /* Offset within CALL_DUMMY of the 'call' instruction. */
156 #undef CALL_DUMMY_CALL_OFFSET
157 #define CALL_DUMMY_CALL_OFFSET (CALL_DUMMY_START_OFFSET + (5 * 4))
159 /* Offset within CALL_DUMMY of the 'ta 1' instruction. */
160 #undef CALL_DUMMY_BREAKPOINT_OFFSET
161 #define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + (8 * 4))
163 /* Let's GDB know that it can make a call_dummy breakpoint. */
164 #undef CALL_DUMMY_BREAKPOINT_OFFSET_P
165 #define CALL_DUMMY_BREAKPOINT_OFFSET_P 1
167 /* Call dummy will be located on the stack. */
168 #undef CALL_DUMMY_LOCATION
169 #define CALL_DUMMY_LOCATION ON_STACK
171 /* Insert the function address into the call dummy. */
172 #undef FIX_CALL_DUMMY
173 #define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
174 sparc_fix_call_dummy (dummyname, pc, fun, type, gcc_p)
175 void sparc_fix_call_dummy (char *dummy
, CORE_ADDR pc
, CORE_ADDR fun
,
176 struct type
*value_type
, int using_gcc
);
179 /* The remainder of these will accept the default definition. */
180 #undef SIZEOF_CALL_DUMMY_WORDS
181 #undef PUSH_RETURN_ADDRESS
182 #undef CALL_DUMMY_ADDRESS
183 #undef STORE_STRUCT_RETURN
187 /* Does the specified function use the "struct returning" convention
188 or the "value returning" convention? The "value returning" convention
189 almost invariably returns the entire value in registers. The
190 "struct returning" convention often returns the entire value in
191 memory, and passes a pointer (out of or into the function) saying
192 where the value (is or should go).
194 Since this sometimes depends on whether it was compiled with GCC,
195 this is also an argument. This is used in call_function to build a
196 stack, and in value_being_returned to print return values.
198 On Sparc64, we only pass pointers to structs if they're larger then
199 32 bytes. Otherwise they're stored in %o0-%o3 (floating-point
200 values go into %fp0-%fp3). */
202 #undef USE_STRUCT_CONVENTION
203 #define USE_STRUCT_CONVENTION(gcc_p, type) (TYPE_LENGTH (type) > 32)
205 CORE_ADDR
sparc64_push_arguments (int,
206 struct value
**, CORE_ADDR
, int, CORE_ADDR
);
207 #undef PUSH_ARGUMENTS
208 #define PUSH_ARGUMENTS(A,B,C,D,E) \
209 (sparc64_push_arguments ((A), (B), (C), (D), (E)))
211 /* Store the address of the place in which to copy the structure the
212 subroutine will return. This is called from call_function. */
213 /* FIXME: V9 uses %o0 for this. */
215 #undef STORE_STRUCT_RETURN
216 #define STORE_STRUCT_RETURN(ADDR, SP) \
217 { target_write_memory ((SP)+(16*8), (char *)&(ADDR), 8); }
219 /* Stack must be aligned on 128-bit boundaries when synthesizing
223 #define STACK_ALIGN(ADDR) (((ADDR) + 15 ) & -16)
225 /* Initializer for an array of names of registers.
226 There should be NUM_REGS strings in this initializer. */
227 /* Some of these registers are only accessible from priviledged mode.
228 They are here for kernel debuggers, etc. */
229 /* FIXME: icc and xcc are currently considered separate registers.
230 This may have to change and consider them as just one (ccr).
231 Let's postpone this as long as we can. It's nice to be able to set
232 them individually. */
233 /* FIXME: fcc0-3 are currently separate, even though they are also part of
234 fsr. May have to remove them but let's postpone this as long as
235 possible. It's nice to be able to set them individually. */
236 /* FIXME: Whether to include f33, f35, etc. here is not clear.
237 There are advantages and disadvantages. */
239 #undef REGISTER_NAMES
240 #define REGISTER_NAMES \
241 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
242 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \
243 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
244 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7", \
246 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
247 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
248 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \
249 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \
250 "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46", \
251 "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62", \
253 "pc", "npc", "ccr", "fsr", "fprs", "y", "asi", \
254 "ver", "tick", "pil", "pstate", \
255 "tstate", "tba", "tl", "tt", "tpc", "tnpc", "wstate", \
256 "cwp", "cansave", "canrestore", "cleanwin", "otherwin", \
257 "asr16", "asr17", "asr18", "asr19", "asr20", "asr21", \
258 "asr22", "asr23", "asr24", "asr25", "asr26", "asr27", \
259 "asr28", "asr29", "asr30", "asr31", \
260 /* These are here at the end to simplify removing them if we have to. */ \
261 "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3" \
264 #undef REG_STRUCT_HAS_ADDR
265 #define REG_STRUCT_HAS_ADDR(gcc_p,type) (TYPE_LENGTH (type) > 32)
267 extern CORE_ADDR
sparc64_read_sp ();
268 extern CORE_ADDR
sparc64_read_fp ();
269 extern void sparc64_write_sp (CORE_ADDR
);
270 extern void sparc64_write_fp (CORE_ADDR
);
272 #define TARGET_READ_SP() (sparc64_read_sp ())
273 #define TARGET_READ_FP() (sparc64_read_fp ())
274 #define TARGET_WRITE_SP(X) (sparc64_write_sp (X))
275 #define TARGET_WRITE_FP(X) (sparc64_write_fp (X))
277 #undef EXTRACT_RETURN_VALUE
278 #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
279 sp64_extract_return_value(TYPE, REGBUF, VALBUF, 0)
280 extern void sp64_extract_return_value (struct type
*, char[], char *, int);
282 /* Register numbers of various important registers.
283 Note that some of these values are "real" register numbers,
284 and correspond to the general registers of the machine,
285 and some are "phony" register numbers which are too large
286 to be actual register numbers as far as the user is concerned
287 but do serve to get the desired values when passed to read_register. */
289 #if 0 /* defined in tm-sparc.h, replicated
291 #define G0_REGNUM 0 /* %g0 */
292 #define G1_REGNUM 1 /* %g1 */
293 #define O0_REGNUM 8 /* %o0 */
294 #define SP_REGNUM 14 /* Contains address of top of stack, \
295 which is also the bottom of the frame. */
296 #define RP_REGNUM 15 /* Contains return address value, *before* \
297 any windows get switched. */
298 #define O7_REGNUM 15 /* Last local reg not saved on stack frame */
299 #define L0_REGNUM 16 /* First local reg that's saved on stack frame
300 rather than in machine registers */
301 #define I0_REGNUM 24 /* %i0 */
302 #define FP_REGNUM 30 /* Contains address of executing stack frame */
303 #define I7_REGNUM 31 /* Last local reg saved on stack frame */
304 #define FP0_REGNUM 32 /* Floating point register 0 */
307 /*#define FP_MAX_REGNUM 80*/ /* 1 + last fp reg number */
309 /* #undef v8 misc. regs */
320 /* v9 misc. and priv. regs */
322 #define C0_REGNUM 80 /* Start of control registers */
324 #define PC_REGNUM (C0_REGNUM + 0) /* Current PC */
325 #define NPC_REGNUM (C0_REGNUM + 1) /* Next PC */
326 #define CCR_REGNUM (C0_REGNUM + 2) /* Condition Code Register (%xcc,%icc) */
327 #define FSR_REGNUM (C0_REGNUM + 3) /* Floating Point State */
328 #define FPRS_REGNUM (C0_REGNUM + 4) /* Floating Point Registers State */
329 #define Y_REGNUM (C0_REGNUM + 5) /* Temp register for multiplication, etc. */
330 #define ASI_REGNUM (C0_REGNUM + 6) /* Alternate Space Identifier */
331 #define VER_REGNUM (C0_REGNUM + 7) /* Version register */
332 #define TICK_REGNUM (C0_REGNUM + 8) /* Tick register */
333 #define PIL_REGNUM (C0_REGNUM + 9) /* Processor Interrupt Level */
334 #define PSTATE_REGNUM (C0_REGNUM + 10) /* Processor State */
335 #define TSTATE_REGNUM (C0_REGNUM + 11) /* Trap State */
336 #define TBA_REGNUM (C0_REGNUM + 12) /* Trap Base Address */
337 #define TL_REGNUM (C0_REGNUM + 13) /* Trap Level */
338 #define TT_REGNUM (C0_REGNUM + 14) /* Trap Type */
339 #define TPC_REGNUM (C0_REGNUM + 15) /* Trap pc */
340 #define TNPC_REGNUM (C0_REGNUM + 16) /* Trap npc */
341 #define WSTATE_REGNUM (C0_REGNUM + 17) /* Window State */
342 #define CWP_REGNUM (C0_REGNUM + 18) /* Current Window Pointer */
343 #define CANSAVE_REGNUM (C0_REGNUM + 19) /* Savable Windows */
344 #define CANRESTORE_REGNUM (C0_REGNUM + 20) /* Restorable Windows */
345 #define CLEANWIN_REGNUM (C0_REGNUM + 21) /* Clean Windows */
346 #define OTHERWIN_REGNUM (C0_REGNUM + 22) /* Other Windows */
347 #define ASR_REGNUM(n) (C0_REGNUM+(23-16)+(n)) /* Ancillary State Register
349 #define ICC_REGNUM (C0_REGNUM + 39) /* 32 bit condition codes */
350 #define XCC_REGNUM (C0_REGNUM + 40) /* 64 bit condition codes */
351 #define FCC0_REGNUM (C0_REGNUM + 41) /* fp cc reg 0 */
352 #define FCC1_REGNUM (C0_REGNUM + 42) /* fp cc reg 1 */
353 #define FCC2_REGNUM (C0_REGNUM + 43) /* fp cc reg 2 */
354 #define FCC3_REGNUM (C0_REGNUM + 44) /* fp cc reg 3 */
356 /* Number of machine registers. */
361 /* Total amount of space needed to store our copies of the machine's
362 register state, the array `registers'.
363 Some of the registers aren't 64 bits, but it's a lot simpler just to assume
364 they all are (since most of them are). */
365 #undef REGISTER_BYTES
366 #define REGISTER_BYTES (32*8+32*8+45*8)
368 /* Index within `registers' of the first byte of the space for
371 #define REGISTER_BYTE(N) \
373 : (N) < 64 ? 32*8 + ((N)-32)*4 \
374 : (N) < C0_REGNUM ? 32*8 + 32*4 + ((N)-64)*8 \
375 : 64*8 + ((N)-C0_REGNUM)*8)
377 /* Say how long (ordinary) registers are. This is a piece of bogosity
378 used in push_word and a few other places; REGISTER_RAW_SIZE is the
379 real way to know how big a register is. */
382 #define REGISTER_SIZE 8
384 /* Number of bytes of storage in the actual machine representation
387 #undef REGISTER_RAW_SIZE
388 #define REGISTER_RAW_SIZE(N) \
389 ((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
391 /* Number of bytes of storage in the program's representation
394 #undef REGISTER_VIRTUAL_SIZE
395 #define REGISTER_VIRTUAL_SIZE(N) \
396 ((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
398 /* Largest value REGISTER_RAW_SIZE can have. */
399 /* tm-sparc.h defines this as 8, but play it safe. */
401 #undef MAX_REGISTER_RAW_SIZE
402 #define MAX_REGISTER_RAW_SIZE 8
404 /* Largest value REGISTER_VIRTUAL_SIZE can have. */
405 /* tm-sparc.h defines this as 8, but play it safe. */
407 #undef MAX_REGISTER_VIRTUAL_SIZE
408 #define MAX_REGISTER_VIRTUAL_SIZE 8
410 /* Return the GDB type object for the "standard" data type
411 of data in register N. */
413 #undef REGISTER_VIRTUAL_TYPE
414 #define REGISTER_VIRTUAL_TYPE(N) \
415 ((N) < 32 ? builtin_type_long_long \
416 : (N) < 64 ? builtin_type_float \
417 : (N) < 80 ? builtin_type_double \
418 : builtin_type_long_long)
420 /* We use to support both 32 bit and 64 bit pointers.
421 We can't anymore because TARGET_PTR_BIT must now be a constant. */
422 #undef TARGET_PTR_BIT
423 #define TARGET_PTR_BIT 64
425 /* Longs are 64 bits. */
426 #undef TARGET_LONG_BIT
427 #define TARGET_LONG_BIT 64
429 #undef TARGET_LONG_LONG_BIT
430 #define TARGET_LONG_LONG_BIT 64
432 /* Return number of bytes at start of arglist that are not really args. */
434 #undef FRAME_ARGS_SKIP
435 #define FRAME_ARGS_SKIP 136
437 #endif /* GDB_MULTI_ARCH */
439 /* Offsets into jmp_buf.
440 FIXME: This was borrowed from the v8 stuff and will probably have to change
443 #define JB_ELEMENT_SIZE 8 /* Size of each element in jmp_buf */
445 #define JB_ONSSTACK 0
455 /* Figure out where the longjmp will land. We expect that we have
456 just entered longjmp and haven't yet setup the stack frame, so the
457 args are still in the output regs. %o0 (O0_REGNUM) points at the
458 jmp_buf structure from which we extract the pc (JB_PC) that we will
459 land at. The pc is copied into ADDR. This routine returns true on
462 extern int get_longjmp_target (CORE_ADDR
*);
464 #define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
466 #undef TM_PRINT_INSN_MACH
467 #define TM_PRINT_INSN_MACH bfd_mach_sparc_v9a