gdb/config/sparc/tm-sparc.h

   1 /* Target machine sub-parameters for SPARC, for GDB, the GNU debugger.
   2    This is included by other tm-*.h files to define SPARC cpu-related info.
   3    Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
   4    1998, 1999, 2000, 2001, 2002, 2003
   5    Free Software Foundation, Inc.
   6    Contributed by Michael Tiemann (tiemann@mcc.com)
   7
   8    This file is part of GDB.
   9
  10    This program is free software; you can redistribute it and/or modify
  11    it under the terms of the GNU General Public License as published by
  12    the Free Software Foundation; either version 2 of the License, or
  13    (at your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful,
  16    but WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18    GNU General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 59 Temple Place - Suite 330,
  23    Boston, MA 02111-1307, USA.  */
  24
  25 #define GDB_MULTI_ARCH GDB_MULTI_ARCH_PARTIAL
  26
  27 #include "regcache.h"
  28
  29 struct type;
  30 struct value;
  31 struct frame_info;
  32
  33 /*
  34  * The following enums are purely for the convenience of the GDB
  35  * developer, when debugging GDB.
  36  */
  37
  38 enum {  /* Sparc general registers, for all sparc versions.  */
  39   G0_REGNUM, G1_REGNUM, G2_REGNUM, G3_REGNUM,
  40   G4_REGNUM, G5_REGNUM, G6_REGNUM, G7_REGNUM,
  41   O0_REGNUM, O1_REGNUM, O2_REGNUM, O3_REGNUM,
  42   O4_REGNUM, O5_REGNUM, O6_REGNUM, O7_REGNUM,
  43   L0_REGNUM, L1_REGNUM, L2_REGNUM, L3_REGNUM,
  44   L4_REGNUM, L5_REGNUM, L6_REGNUM, L7_REGNUM,
  45   I0_REGNUM, I1_REGNUM, I2_REGNUM, I3_REGNUM,
  46   I4_REGNUM, I5_REGNUM, I6_REGNUM, I7_REGNUM,
  47   FP0_REGNUM            /* Floating point register 0 */
  48 };
  49
  50 enum {  /* Sparc general registers, alternate names.  */
  51   R0_REGNUM,  R1_REGNUM,  R2_REGNUM,  R3_REGNUM,
  52   R4_REGNUM,  R5_REGNUM,  R6_REGNUM,  R7_REGNUM,
  53   R8_REGNUM,  R9_REGNUM,  R10_REGNUM, R11_REGNUM,
  54   R12_REGNUM, R13_REGNUM, R14_REGNUM, R15_REGNUM,
  55   R16_REGNUM, R17_REGNUM, R18_REGNUM, R19_REGNUM,
  56   R20_REGNUM, R21_REGNUM, R22_REGNUM, R23_REGNUM,
  57   R24_REGNUM, R25_REGNUM, R26_REGNUM, R27_REGNUM,
  58   R28_REGNUM, R29_REGNUM, R30_REGNUM, R31_REGNUM
  59 };
  60
  61 enum {                  /* Sparc32 control registers.  */
  62   PS_REGNUM  = 65,      /* PC, NPC, and Y are omitted because */
  63   WIM_REGNUM = 66,      /* they have different values depending on */
  64   TBR_REGNUM = 67,      /* 32-bit / 64-bit mode.  */
  65   FPS_REGNUM = 70,
  66   CPS_REGNUM = 71
  67 };
  68
  69 /* v9 misc. and priv. regs */
  70
  71 /* Note: specifying values explicitly for documentation purposes.  */
  72 enum {  /* Sparc64 control registers, excluding Y, PC, and NPC.  */
  73   CCR_REGNUM = 82,              /* Condition Code Register (%xcc,%icc) */
  74   FSR_REGNUM = 83,              /* Floating Point State */
  75   FPRS_REGNUM = 84,             /* Floating Point Registers State */
  76   ASI_REGNUM = 86,              /* Alternate Space Identifier */
  77   VER_REGNUM = 87,              /* Version register */
  78   TICK_REGNUM = 88,             /* Tick register */
  79   PIL_REGNUM = 89,              /* Processor Interrupt Level */
  80   PSTATE_REGNUM = 90,           /* Processor State */
  81   TSTATE_REGNUM = 91,           /* Trap State */
  82   TBA_REGNUM = 92,              /* Trap Base Address */
  83   TL_REGNUM = 93,               /* Trap Level */
  84   TT_REGNUM = 94,               /* Trap Type */
  85   TPC_REGNUM = 95,              /* Trap pc */
  86   TNPC_REGNUM = 96,             /* Trap npc */
  87   WSTATE_REGNUM = 97,           /* Window State */
  88   CWP_REGNUM = 98,              /* Current Window Pointer */
  89   CANSAVE_REGNUM = 99,          /* Savable Windows */
  90   CANRESTORE_REGNUM = 100,      /* Restorable Windows */
  91   CLEANWIN_REGNUM = 101,        /* Clean Windows */
  92   OTHERWIN_REGNUM = 102,        /* Other Windows */
  93   ASR16_REGNUM = 103,           /* Ancillary State Registers */
  94   ASR17_REGNUM = 104,
  95   ASR18_REGNUM = 105,
  96   ASR19_REGNUM = 106,
  97   ASR20_REGNUM = 107,
  98   ASR21_REGNUM = 108,
  99   ASR22_REGNUM = 109,
 100   ASR23_REGNUM = 110,
 101   ASR24_REGNUM = 111,
 102   ASR25_REGNUM = 112,
 103   ASR26_REGNUM = 113,
 104   ASR27_REGNUM = 114,
 105   ASR28_REGNUM = 115,
 106   ASR29_REGNUM = 116,
 107   ASR30_REGNUM = 117,
 108   ASR31_REGNUM = 118,
 109   ICC_REGNUM   = 119,           /* 32 bit condition codes */
 110   XCC_REGNUM   = 120,           /* 64 bit condition codes */
 111   FCC0_REGNUM  = 121,           /* fp cc reg 0 */
 112   FCC1_REGNUM  = 122,           /* fp cc reg 1 */
 113   FCC2_REGNUM  = 123,           /* fp cc reg 2 */
 114   FCC3_REGNUM  = 124            /* fp cc reg 3 */
 115 };
 116
 117 /*
 118  * Make sparc target multi-archable: April 2000
 119  */
 120
 121 /* Multi-arch definition of TARGET_IS_SPARC64, TARGET_ELF64 */
 122 #undef  GDB_TARGET_IS_SPARC64
 123 #define GDB_TARGET_IS_SPARC64 \
 124      (sparc_intreg_size () == 8)
 125 #undef  TARGET_ELF64
 126 #define TARGET_ELF64 \
 127      (sparc_intreg_size () == 8)
 128 extern int sparc_intreg_size (void);
 129
 130 /*
 131  * The following defines should ONLY appear for MULTI_ARCH.
 132  */
 133
 134 /* Multi-arch the nPC and Y registers.  */
 135 #define Y_REGNUM              (sparc_y_regnum ())
 136
 137 /* On the Sun 4 under SunOS, the compile will leave a fake insn which
 138    encodes the structure size being returned.  If we detect such
 139    a fake insn, step past it.  */
 140
 141 #define PC_ADJUST(PC) sparc_pc_adjust (PC)
 142 extern CORE_ADDR sparc_pc_adjust (CORE_ADDR);
 143
 144 /* If an argument is declared "register", Sun cc will keep it in a register,
 145    never saving it onto the stack.  So we better not believe the "p" symbol
 146    descriptor stab.  */
 147
 148 #define USE_REGISTER_NOT_ARG
 149
 150 /* For acc, there's no need to correct LBRAC entries by guessing how
 151    they should work.  In fact, this is harmful because the LBRAC
 152    entries now all appear at the end of the function, not intermixed
 153    with the SLINE entries.  n_opt_found detects acc for Solaris binaries;
 154    function_stab_type detects acc for SunOS4 binaries.
 155
 156    For binary from SunOS4 /bin/cc, need to correct LBRAC's.
 157
 158    For gcc, like acc, don't correct.  */
 159
 160 #define SUN_FIXED_LBRAC_BUG \
 161   (n_opt_found \
 162    || function_stab_type == N_STSYM \
 163    || function_stab_type == N_GSYM \
 164    || processing_gcc_compilation)
 165
 166 /* Do variables in the debug stabs occur after the N_LBRAC or before it?
 167    acc: after, gcc: before, SunOS4 /bin/cc: before.  */
 168
 169 #define VARIABLES_INSIDE_BLOCK(desc, gcc_p) \
 170   (!(gcc_p) \
 171    && (n_opt_found \
 172        || function_stab_type == N_STSYM \
 173        || function_stab_type == N_GSYM))
 174
 175 /* Sequence of bytes for breakpoint instruction (ta 1). */
 176
 177 extern const unsigned char *sparc_breakpoint_from_pc (CORE_ADDR *pc, int *len);
 178 #define BREAKPOINT_FROM_PC(PC,LEN) sparc_breakpoint_from_pc ((PC), (LEN))
 179
 180 /* Register numbers of various important registers.
 181    Note that some of these values are "real" register numbers,
 182    and correspond to the general registers of the machine,
 183    and some are "phony" register numbers which are too large
 184    to be actual register numbers as far as the user is concerned
 185    but do serve to get the desired values when passed to read_register.  */
 186
 187 #define G0_REGNUM 0             /* %g0 */
 188 #define G1_REGNUM 1             /* %g1 */
 189 #define O0_REGNUM 8             /* %o0 */
 190 #define RP_REGNUM 15            /* Contains return address value, *before* \
 191                                    any windows get switched.  */
 192 #define O7_REGNUM 15            /* Last local reg not saved on stack frame */
 193 #define L0_REGNUM 16            /* First local reg that's saved on stack frame
 194                                    rather than in machine registers */
 195 #define I0_REGNUM 24            /* %i0 */
 196 #define I7_REGNUM 31            /* Last local reg saved on stack frame */
 197 #define PS_REGNUM 65            /* Contains processor status */
 198 #define PS_FLAG_CARRY 0x100000  /* Carry bit in PS */
 199 #define WIM_REGNUM 66           /* Window Invalid Mask (not really supported) */
 200 #define TBR_REGNUM 67           /* Trap Base Register (not really supported) */
 201 #define FPS_REGNUM 70           /* Floating point status register */
 202 #define CPS_REGNUM 71           /* Coprocessor status register */
 203
 204 /* Writing to %g0 is a noop (not an error or exception or anything like
 205    that, however).  */
 206
 207 #define CANNOT_STORE_REGISTER(regno) ((regno) == G0_REGNUM)
 208
 209 #define PRINT_EXTRA_FRAME_INFO(FI) \
 210      sparc_print_extra_frame_info (FI)
 211 extern void sparc_print_extra_frame_info (struct frame_info *);
 212
 213 /* DEPRECATED_INIT_EXTRA_FRAME_INFO needs the PC to detect flat
 214    frames.  */
 215
 216 /* NOTE: cagney/2002-12-08: Add local declaration of
 217    init_frame_pc_noop() because it isn't possible to include
 218    "arch-utils.h" here.  */
 219 extern CORE_ADDR init_frame_pc_noop (int fromleaf, struct frame_info *prev);
 220 #define DEPRECATED_INIT_FRAME_PC(FROMLEAF, PREV)        (init_frame_pc_noop (FROMLEAF, PREV))
 221 #define DEPRECATED_INIT_FRAME_PC_FIRST(FROMLEAF, PREV) \
 222   ((FROMLEAF) ? DEPRECATED_SAVED_PC_AFTER_CALL ((PREV)->next) : \
 223               (PREV)->next ? DEPRECATED_FRAME_SAVED_PC ((PREV)->next) : read_pc ())
 224
 225 /* Define other aspects of the stack frame.  */
 226
 227 /* The location of I0 w.r.t SP.  This is actually dependent on how the
 228    system's window overflow/underflow routines are written.  Most
 229    vendors save the L regs followed by the I regs (at the higher
 230    address).  Some vendors get it wrong.  */
 231
 232 #define FRAME_SAVED_L0  0
 233 #define FRAME_SAVED_I0  (8 * REGISTER_RAW_SIZE (L0_REGNUM))
 234
 235 #define FRAME_STRUCT_ARGS_ADDRESS(FI) (get_frame_base (FI))
 236
 237 /* Things needed for making the inferior call functions.  */
 238 /*
 239  * First of all, let me give my opinion of what the DUMMY_FRAME
 240  * actually looks like.
 241  *
 242  *               |                                 |
 243  *               |                                 |
 244  *               + - - - - - - - - - - - - - - - - +<-- fp (level 0)
 245  *               |                                 |
 246  *               |                                 |
 247  *               |                                 |
 248  *               |                                 |
 249  *               |  Frame of innermost program     |
 250  *               |           function              |
 251  *               |                                 |
 252  *               |                                 |
 253  *               |                                 |
 254  *               |                                 |
 255  *               |                                 |
 256  *               |---------------------------------|<-- sp (level 0), fp (c)
 257  *               |                                 |
 258  *     DUMMY     |             fp0-31              |
 259  *               |                                 |
 260  *               |             ------              |<-- fp - 0x80
 261  *     FRAME     |              g0-7               |<-- fp - 0xa0
 262  *               |              i0-7               |<-- fp - 0xc0
 263  *               |             other               |<-- fp - 0xe0
 264  *               |               ?                 |
 265  *               |               ?                 |
 266  *               |---------------------------------|<-- sp' = fp - 0x140
 267  *               |                                 |
 268  * xcution start |                                 |
 269  * sp' + 0x94 -->|        CALL_DUMMY (x code)      |
 270  *               |                                 |
 271  *               |                                 |
 272  *               |---------------------------------|<-- sp'' = fp - 0x200
 273  *               |  align sp to 8 byte boundary    |
 274  *               |     ==> args to fn <==          |
 275  *  Room for     |                                 |
 276  * i & l's + agg | CALL_DUMMY_STACK_ADJUST = 0x0x44|
 277  *               |---------------------------------|<-- final sp (variable)
 278  *               |                                 |
 279  *               |   Where function called will    |
 280  *               |           build frame.          |
 281  *               |                                 |
 282  *               |                                 |
 283  *
 284  *   I understand everything in this picture except what the space
 285  * between fp - 0xe0 and fp - 0x140 is used for.  Oh, and I don't
 286  * understand why there's a large chunk of CALL_DUMMY that never gets
 287  * executed (its function is superceeded by
 288  * DEPRECATED_PUSH_DUMMY_FRAME; they are designed to do the same
 289  * thing).
 290  *
 291  *   DEPRECATED_PUSH_DUMMY_FRAME saves the registers above sp' and
 292  * pushes the * register file stack down one.
 293  *
 294  *   call_function then writes CALL_DUMMY, pushes the args onto the
 295  * stack, and adjusts the stack pointer.
 296
 297    call_function_by_hand then starts execution (in the middle of
 298    CALL_DUMMY, as directed by call_function).  */
 299
 300 #ifndef CALL_DUMMY
 301 /* This sequence of words is the instructions
 302
 303    00:   bc 10 00 01     mov  %g1, %fp
 304    04:   9d e3 80 00     save  %sp, %g0, %sp
 305    08:   bc 10 00 02     mov  %g2, %fp
 306    0c:   be 10 00 03     mov  %g3, %i7
 307    10:   da 03 a0 58     ld  [ %sp + 0x58 ], %o5
 308    14:   d8 03 a0 54     ld  [ %sp + 0x54 ], %o4
 309    18:   d6 03 a0 50     ld  [ %sp + 0x50 ], %o3
 310    1c:   d4 03 a0 4c     ld  [ %sp + 0x4c ], %o2
 311    20:   d2 03 a0 48     ld  [ %sp + 0x48 ], %o1
 312    24:   40 00 00 00     call  <fun>
 313    28:   d0 03 a0 44     ld  [ %sp + 0x44 ], %o0
 314    2c:   01 00 00 00     nop
 315    30:   91 d0 20 01     ta  1
 316    34:   01 00 00 00     nop
 317
 318    NOTES:
 319    * the first four instructions are necessary only on the simulator.
 320    * this is a multiple of 8 (not only 4) bytes.
 321    * the `call' insn is a relative, not an absolute call.
 322    * the `nop' at the end is needed to keep the trap from
 323      clobbering things (if NPC pointed to garbage instead).
 324  */
 325
 326 #endif /* CALL_DUMMY */
 327
 328 /* Sparc has no reliable single step ptrace call */
 329
 330 #define SOFTWARE_SINGLE_STEP_P() 1
 331 extern void sparc_software_single_step (enum target_signal, int);
 332 #define SOFTWARE_SINGLE_STEP(sig,bp_p) sparc_software_single_step (sig,bp_p)
 333
 334 /* We need more arguments in a frame specification for the
 335    "frame" or "info frame" command.  */
 336
 337 #define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv)
 338 extern struct frame_info *setup_arbitrary_frame (int, CORE_ADDR *);
 339
 340 extern void sparc_do_registers_info (int regnum, int all);
 341 #undef DEPRECATED_DO_REGISTERS_INFO
 342 #define DEPRECATED_DO_REGISTERS_INFO(REGNUM,ALL) sparc_do_registers_info (REGNUM, ALL)
 343
 344 /* Optimization for storing registers to the inferior.  The hook
 345    DO_DEFERRED_STORES
 346    actually executes any deferred stores.  It is called any time
 347    we are going to proceed the child, or read its registers.
 348    The hook CLEAR_DEFERRED_STORES is called when we want to throw
 349    away the inferior process, e.g. when it dies or we kill it.
 350    FIXME, this does not handle remote debugging cleanly.  */
 351
 352 extern int deferred_stores;
 353 #define DO_DEFERRED_STORES      \
 354   if (deferred_stores)          \
 355     target_store_registers (-2);
 356 #define CLEAR_DEFERRED_STORES   \
 357   deferred_stores = 0;
 358
 359 /* Select the sparc disassembler */
 360
 361 #define TM_PRINT_INSN_MACH bfd_mach_sparc
 362
 363 #define DEPRECATED_EXTRA_STACK_ALIGNMENT_NEEDED 1