]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - gdb/frv-tdep.c
2003-03-12 Andrew Cagney <cagney@redhat.com>
[thirdparty/binutils-gdb.git] / gdb / frv-tdep.c
1 /* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
2 Copyright 2002, 2003 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 #include "defs.h"
22 #include "inferior.h"
23 #include "symfile.h" /* for entry_point_address */
24 #include "gdbcore.h"
25 #include "arch-utils.h"
26 #include "regcache.h"
27
28 extern void _initialize_frv_tdep (void);
29
30 static gdbarch_init_ftype frv_gdbarch_init;
31
32 static gdbarch_register_name_ftype frv_register_name;
33 static gdbarch_register_raw_size_ftype frv_register_raw_size;
34 static gdbarch_register_virtual_size_ftype frv_register_virtual_size;
35 static gdbarch_register_virtual_type_ftype frv_register_virtual_type;
36 static gdbarch_register_byte_ftype frv_register_byte;
37 static gdbarch_breakpoint_from_pc_ftype frv_breakpoint_from_pc;
38 static gdbarch_frame_chain_ftype frv_frame_chain;
39 static gdbarch_skip_prologue_ftype frv_skip_prologue;
40 static gdbarch_deprecated_extract_return_value_ftype frv_extract_return_value;
41 static gdbarch_deprecated_extract_struct_value_address_ftype frv_extract_struct_value_address;
42 static gdbarch_use_struct_convention_ftype frv_use_struct_convention;
43 static gdbarch_frameless_function_invocation_ftype frv_frameless_function_invocation;
44 static gdbarch_init_extra_frame_info_ftype stupid_useless_init_extra_frame_info;
45 static gdbarch_store_struct_return_ftype frv_store_struct_return;
46 static gdbarch_push_arguments_ftype frv_push_arguments;
47 static gdbarch_push_return_address_ftype frv_push_return_address;
48 static gdbarch_pop_frame_ftype frv_pop_frame;
49 static gdbarch_saved_pc_after_call_ftype frv_saved_pc_after_call;
50
51 static void frv_pop_frame_regular (struct frame_info *frame);
52
53 /* Register numbers. You can change these as needed, but don't forget
54 to update the simulator accordingly. */
55 enum {
56 /* The total number of registers we know exist. */
57 frv_num_regs = 147,
58
59 /* Register numbers 0 -- 63 are always reserved for general-purpose
60 registers. The chip at hand may have less. */
61 first_gpr_regnum = 0,
62 sp_regnum = 1,
63 fp_regnum = 2,
64 struct_return_regnum = 3,
65 last_gpr_regnum = 63,
66
67 /* Register numbers 64 -- 127 are always reserved for floating-point
68 registers. The chip at hand may have less. */
69 first_fpr_regnum = 64,
70 last_fpr_regnum = 127,
71
72 /* Register numbers 128 on up are always reserved for special-purpose
73 registers. */
74 first_spr_regnum = 128,
75 pc_regnum = 128,
76 psr_regnum = 129,
77 ccr_regnum = 130,
78 cccr_regnum = 131,
79 tbr_regnum = 135,
80 brr_regnum = 136,
81 dbar0_regnum = 137,
82 dbar1_regnum = 138,
83 dbar2_regnum = 139,
84 dbar3_regnum = 140,
85 lr_regnum = 145,
86 lcr_regnum = 146,
87 last_spr_regnum = 146
88 };
89
90 static LONGEST frv_call_dummy_words[] =
91 {0};
92
93
94 /* The contents of this structure can only be trusted after we've
95 frv_frame_init_saved_regs on the frame. */
96 struct frame_extra_info
97 {
98 /* The offset from our frame pointer to our caller's stack
99 pointer. */
100 int fp_to_callers_sp_offset;
101
102 /* Non-zero if we've saved our return address on the stack yet.
103 Zero if it's still sitting in the link register. */
104 int lr_saved_on_stack;
105 };
106
107
108 /* A structure describing a particular variant of the FRV.
109 We allocate and initialize one of these structures when we create
110 the gdbarch object for a variant.
111
112 At the moment, all the FR variants we support differ only in which
113 registers are present; the portable code of GDB knows that
114 registers whose names are the empty string don't exist, so the
115 `register_names' array captures all the per-variant information we
116 need.
117
118 in the future, if we need to have per-variant maps for raw size,
119 virtual type, etc., we should replace register_names with an array
120 of structures, each of which gives all the necessary info for one
121 register. Don't stick parallel arrays in here --- that's so
122 Fortran. */
123 struct gdbarch_tdep
124 {
125 /* How many general-purpose registers does this variant have? */
126 int num_gprs;
127
128 /* How many floating-point registers does this variant have? */
129 int num_fprs;
130
131 /* How many hardware watchpoints can it support? */
132 int num_hw_watchpoints;
133
134 /* How many hardware breakpoints can it support? */
135 int num_hw_breakpoints;
136
137 /* Register names. */
138 char **register_names;
139 };
140
141 #define CURRENT_VARIANT (gdbarch_tdep (current_gdbarch))
142
143
144 /* Allocate a new variant structure, and set up default values for all
145 the fields. */
146 static struct gdbarch_tdep *
147 new_variant (void)
148 {
149 struct gdbarch_tdep *var;
150 int r;
151 char buf[20];
152
153 var = xmalloc (sizeof (*var));
154 memset (var, 0, sizeof (*var));
155
156 var->num_gprs = 64;
157 var->num_fprs = 64;
158 var->num_hw_watchpoints = 0;
159 var->num_hw_breakpoints = 0;
160
161 /* By default, don't supply any general-purpose or floating-point
162 register names. */
163 var->register_names = (char **) xmalloc (frv_num_regs * sizeof (char *));
164 for (r = 0; r < frv_num_regs; r++)
165 var->register_names[r] = "";
166
167 /* Do, however, supply default names for the special-purpose
168 registers. */
169 for (r = first_spr_regnum; r <= last_spr_regnum; ++r)
170 {
171 sprintf (buf, "x%d", r);
172 var->register_names[r] = xstrdup (buf);
173 }
174
175 var->register_names[pc_regnum] = "pc";
176 var->register_names[lr_regnum] = "lr";
177 var->register_names[lcr_regnum] = "lcr";
178
179 var->register_names[psr_regnum] = "psr";
180 var->register_names[ccr_regnum] = "ccr";
181 var->register_names[cccr_regnum] = "cccr";
182 var->register_names[tbr_regnum] = "tbr";
183
184 /* Debug registers. */
185 var->register_names[brr_regnum] = "brr";
186 var->register_names[dbar0_regnum] = "dbar0";
187 var->register_names[dbar1_regnum] = "dbar1";
188 var->register_names[dbar2_regnum] = "dbar2";
189 var->register_names[dbar3_regnum] = "dbar3";
190
191 return var;
192 }
193
194
195 /* Indicate that the variant VAR has NUM_GPRS general-purpose
196 registers, and fill in the names array appropriately. */
197 static void
198 set_variant_num_gprs (struct gdbarch_tdep *var, int num_gprs)
199 {
200 int r;
201
202 var->num_gprs = num_gprs;
203
204 for (r = 0; r < num_gprs; ++r)
205 {
206 char buf[20];
207
208 sprintf (buf, "gr%d", r);
209 var->register_names[first_gpr_regnum + r] = xstrdup (buf);
210 }
211 }
212
213
214 /* Indicate that the variant VAR has NUM_FPRS floating-point
215 registers, and fill in the names array appropriately. */
216 static void
217 set_variant_num_fprs (struct gdbarch_tdep *var, int num_fprs)
218 {
219 int r;
220
221 var->num_fprs = num_fprs;
222
223 for (r = 0; r < num_fprs; ++r)
224 {
225 char buf[20];
226
227 sprintf (buf, "fr%d", r);
228 var->register_names[first_fpr_regnum + r] = xstrdup (buf);
229 }
230 }
231
232
233 static const char *
234 frv_register_name (int reg)
235 {
236 if (reg < 0)
237 return "?toosmall?";
238 if (reg >= frv_num_regs)
239 return "?toolarge?";
240
241 return CURRENT_VARIANT->register_names[reg];
242 }
243
244
245 static int
246 frv_register_raw_size (int reg)
247 {
248 return 4;
249 }
250
251 static int
252 frv_register_virtual_size (int reg)
253 {
254 return 4;
255 }
256
257 static struct type *
258 frv_register_virtual_type (int reg)
259 {
260 if (reg >= 64 && reg <= 127)
261 return builtin_type_float;
262 else
263 return builtin_type_int;
264 }
265
266 static int
267 frv_register_byte (int reg)
268 {
269 return (reg * 4);
270 }
271
272 static const unsigned char *
273 frv_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenp)
274 {
275 static unsigned char breakpoint[] = {0xc0, 0x70, 0x00, 0x01};
276 *lenp = sizeof (breakpoint);
277 return breakpoint;
278 }
279
280 static CORE_ADDR
281 frv_frame_chain (struct frame_info *frame)
282 {
283 CORE_ADDR saved_fp_addr;
284
285 if (frame->saved_regs && frame->saved_regs[fp_regnum] != 0)
286 saved_fp_addr = frame->saved_regs[fp_regnum];
287 else
288 /* Just assume it was saved in the usual place. */
289 saved_fp_addr = frame->frame;
290
291 return read_memory_integer (saved_fp_addr, 4);
292 }
293
294 static CORE_ADDR
295 frv_frame_saved_pc (struct frame_info *frame)
296 {
297 frv_frame_init_saved_regs (frame);
298
299 /* Perhaps the prologue analyzer recorded where it was stored.
300 (As of 14 Oct 2001, it never does.) */
301 if (frame->saved_regs && frame->saved_regs[pc_regnum] != 0)
302 return read_memory_integer (frame->saved_regs[pc_regnum], 4);
303
304 /* If the prologue analyzer tells us the link register was saved on
305 the stack, get it from there. */
306 if (frame->extra_info->lr_saved_on_stack)
307 return read_memory_integer (frame->frame + 8, 4);
308
309 /* Otherwise, it's still in LR.
310 However, if FRAME isn't the youngest frame, this is kind of
311 suspicious --- if this frame called somebody else, then its LR
312 has certainly been overwritten. */
313 if (! frame->next)
314 return read_register (lr_regnum);
315
316 /* By default, assume it's saved in the standard place, relative to
317 the frame pointer. */
318 return read_memory_integer (frame->frame + 8, 4);
319 }
320
321
322 /* Return true if REG is a caller-saves ("scratch") register,
323 false otherwise. */
324 static int
325 is_caller_saves_reg (int reg)
326 {
327 return ((4 <= reg && reg <= 7)
328 || (14 <= reg && reg <= 15)
329 || (32 <= reg && reg <= 47));
330 }
331
332
333 /* Return true if REG is a callee-saves register, false otherwise. */
334 static int
335 is_callee_saves_reg (int reg)
336 {
337 return ((16 <= reg && reg <= 31)
338 || (48 <= reg && reg <= 63));
339 }
340
341
342 /* Return true if REG is an argument register, false otherwise. */
343 static int
344 is_argument_reg (int reg)
345 {
346 return (8 <= reg && reg <= 13);
347 }
348
349
350 /* Scan an FR-V prologue, starting at PC, until frame->PC.
351 If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
352 We assume FRAME's saved_regs array has already been allocated and cleared.
353 Return the first PC value after the prologue.
354
355 Note that, for unoptimized code, we almost don't need this function
356 at all; all arguments and locals live on the stack, so we just need
357 the FP to find everything. The catch: structures passed by value
358 have their addresses living in registers; they're never spilled to
359 the stack. So if you ever want to be able to get to these
360 arguments in any frame but the top, you'll need to do this serious
361 prologue analysis. */
362 static CORE_ADDR
363 frv_analyze_prologue (CORE_ADDR pc, struct frame_info *frame)
364 {
365 /* When writing out instruction bitpatterns, we use the following
366 letters to label instruction fields:
367 P - The parallel bit. We don't use this.
368 J - The register number of GRj in the instruction description.
369 K - The register number of GRk in the instruction description.
370 I - The register number of GRi.
371 S - a signed imediate offset.
372 U - an unsigned immediate offset.
373
374 The dots below the numbers indicate where hex digit boundaries
375 fall, to make it easier to check the numbers. */
376
377 /* Non-zero iff we've seen the instruction that initializes the
378 frame pointer for this function's frame. */
379 int fp_set = 0;
380
381 /* If fp_set is non_zero, then this is the distance from
382 the stack pointer to frame pointer: fp = sp + fp_offset. */
383 int fp_offset = 0;
384
385 /* Total size of frame prior to any alloca operations. */
386 int framesize = 0;
387
388 /* The number of the general-purpose register we saved the return
389 address ("link register") in, or -1 if we haven't moved it yet. */
390 int lr_save_reg = -1;
391
392 /* Non-zero iff we've saved the LR onto the stack. */
393 int lr_saved_on_stack = 0;
394
395 /* If gr_saved[i] is non-zero, then we've noticed that general
396 register i has been saved at gr_sp_offset[i] from the stack
397 pointer. */
398 char gr_saved[64];
399 int gr_sp_offset[64];
400
401 memset (gr_saved, 0, sizeof (gr_saved));
402
403 while (! frame || pc < frame->pc)
404 {
405 LONGEST op = read_memory_integer (pc, 4);
406
407 /* The tests in this chain of ifs should be in order of
408 decreasing selectivity, so that more particular patterns get
409 to fire before less particular patterns. */
410
411 /* Setting the FP from the SP:
412 ori sp, 0, fp
413 P 000010 0100010 000001 000000000000 = 0x04881000
414 0 111111 1111111 111111 111111111111 = 0x7fffffff
415 . . . . . . . .
416 We treat this as part of the prologue. */
417 if ((op & 0x7fffffff) == 0x04881000)
418 {
419 fp_set = 1;
420 fp_offset = 0;
421 }
422
423 /* Move the link register to the scratch register grJ, before saving:
424 movsg lr, grJ
425 P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
426 0 111111 1111111 111111 111111 000000 = 0x7fffffc0
427 . . . . . . . .
428 We treat this as part of the prologue. */
429 else if ((op & 0x7fffffc0) == 0x080d01c0)
430 {
431 int gr_j = op & 0x3f;
432
433 /* If we're moving it to a scratch register, that's fine. */
434 if (is_caller_saves_reg (gr_j))
435 lr_save_reg = gr_j;
436 /* Otherwise it's not a prologue instruction that we
437 recognize. */
438 else
439 break;
440 }
441
442 /* To save multiple callee-saves registers on the stack, at
443 offset zero:
444
445 std grK,@(sp,gr0)
446 P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
447 0 000000 1111111 111111 111111 111111 = 0x01ffffff
448
449 stq grK,@(sp,gr0)
450 P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
451 0 000000 1111111 111111 111111 111111 = 0x01ffffff
452 . . . . . . . .
453 We treat this as part of the prologue, and record the register's
454 saved address in the frame structure. */
455 else if ((op & 0x01ffffff) == 0x000c10c0
456 || (op & 0x01ffffff) == 0x000c1100)
457 {
458 int gr_k = ((op >> 25) & 0x3f);
459 int ope = ((op >> 6) & 0x3f);
460 int count;
461 int i;
462
463 /* Is it an std or an stq? */
464 if (ope == 0x03)
465 count = 2;
466 else
467 count = 4;
468
469 /* Is it really a callee-saves register? */
470 if (is_callee_saves_reg (gr_k))
471 {
472 for (i = 0; i < count; i++)
473 {
474 gr_saved[gr_k + i] = 1;
475 gr_sp_offset[gr_k + i] = 4 * i;
476 }
477 }
478 else
479 /* It's not a prologue instruction. */
480 break;
481 }
482
483 /* Adjusting the stack pointer. (The stack pointer is GR1.)
484 addi sp, S, sp
485 P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
486 0 111111 1111111 111111 000000000000 = 0x7ffff000
487 . . . . . . . .
488 We treat this as part of the prologue. */
489 else if ((op & 0x7ffff000) == 0x02401000)
490 {
491 /* Sign-extend the twelve-bit field.
492 (Isn't there a better way to do this?) */
493 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
494
495 framesize -= s;
496 }
497
498 /* Setting the FP to a constant distance from the SP:
499 addi sp, S, fp
500 P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000
501 0 111111 1111111 111111 000000000000 = 0x7ffff000
502 . . . . . . . .
503 We treat this as part of the prologue. */
504 else if ((op & 0x7ffff000) == 0x04401000)
505 {
506 /* Sign-extend the twelve-bit field.
507 (Isn't there a better way to do this?) */
508 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
509 fp_set = 1;
510 fp_offset = s;
511 }
512
513 /* To spill an argument register to a scratch register:
514 ori GRi, 0, GRk
515 P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000
516 0 000000 1111111 000000 111111111111 = 0x01fc0fff
517 . . . . . . . .
518 For the time being, we treat this as a prologue instruction,
519 assuming that GRi is an argument register. This one's kind
520 of suspicious, because it seems like it could be part of a
521 legitimate body instruction. But we only come here when the
522 source info wasn't helpful, so we have to do the best we can.
523 Hopefully once GCC and GDB agree on how to emit line number
524 info for prologues, then this code will never come into play. */
525 else if ((op & 0x01fc0fff) == 0x00880000)
526 {
527 int gr_i = ((op >> 12) & 0x3f);
528
529 /* If the source isn't an arg register, then this isn't a
530 prologue instruction. */
531 if (! is_argument_reg (gr_i))
532 break;
533 }
534
535 /* To spill 16-bit values to the stack:
536 sthi GRk, @(fp, s)
537 P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000
538 0 000000 1111111 111111 000000000000 = 0x01fff000
539 . . . . . . . .
540 And for 8-bit values, we use STB instructions.
541 stbi GRk, @(fp, s)
542 P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000
543 0 000000 1111111 111111 000000000000 = 0x01fff000
544 . . . . . . . .
545 We check that GRk is really an argument register, and treat
546 all such as part of the prologue. */
547 else if ( (op & 0x01fff000) == 0x01442000
548 || (op & 0x01fff000) == 0x01402000)
549 {
550 int gr_k = ((op >> 25) & 0x3f);
551
552 if (! is_argument_reg (gr_k))
553 break; /* Source isn't an arg register. */
554 }
555
556 /* To save multiple callee-saves register on the stack, at a
557 non-zero offset:
558
559 stdi GRk, @(sp, s)
560 P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000
561 0 000000 1111111 111111 000000000000 = 0x01fff000
562 . . . . . . . .
563 stqi GRk, @(sp, s)
564 P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000
565 0 000000 1111111 111111 000000000000 = 0x01fff000
566 . . . . . . . .
567 We treat this as part of the prologue, and record the register's
568 saved address in the frame structure. */
569 else if ((op & 0x01fff000) == 0x014c1000
570 || (op & 0x01fff000) == 0x01501000)
571 {
572 int gr_k = ((op >> 25) & 0x3f);
573 int count;
574 int i;
575
576 /* Is it a stdi or a stqi? */
577 if ((op & 0x01fff000) == 0x014c1000)
578 count = 2;
579 else
580 count = 4;
581
582 /* Is it really a callee-saves register? */
583 if (is_callee_saves_reg (gr_k))
584 {
585 /* Sign-extend the twelve-bit field.
586 (Isn't there a better way to do this?) */
587 int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
588
589 for (i = 0; i < count; i++)
590 {
591 gr_saved[gr_k + i] = 1;
592 gr_sp_offset[gr_k + i] = s + (4 * i);
593 }
594 }
595 else
596 /* It's not a prologue instruction. */
597 break;
598 }
599
600 /* Storing any kind of integer register at any constant offset
601 from any other register.
602
603 st GRk, @(GRi, gr0)
604 P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080
605 0 000000 1111111 000000 111111 111111 = 0x01fc0fff
606 . . . . . . . .
607 sti GRk, @(GRi, d12)
608 P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000
609 0 000000 1111111 000000 000000000000 = 0x01fc0000
610 . . . . . . . .
611 These could be almost anything, but a lot of prologue
612 instructions fall into this pattern, so let's decode the
613 instruction once, and then work at a higher level. */
614 else if (((op & 0x01fc0fff) == 0x000c0080)
615 || ((op & 0x01fc0000) == 0x01480000))
616 {
617 int gr_k = ((op >> 25) & 0x3f);
618 int gr_i = ((op >> 12) & 0x3f);
619 int offset;
620
621 /* Are we storing with gr0 as an offset, or using an
622 immediate value? */
623 if ((op & 0x01fc0fff) == 0x000c0080)
624 offset = 0;
625 else
626 offset = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
627
628 /* If the address isn't relative to the SP or FP, it's not a
629 prologue instruction. */
630 if (gr_i != sp_regnum && gr_i != fp_regnum)
631 break;
632
633 /* Saving the old FP in the new frame (relative to the SP). */
634 if (gr_k == fp_regnum && gr_i == sp_regnum)
635 ;
636
637 /* Saving callee-saves register(s) on the stack, relative to
638 the SP. */
639 else if (gr_i == sp_regnum
640 && is_callee_saves_reg (gr_k))
641 {
642 gr_saved[gr_k] = 1;
643 gr_sp_offset[gr_k] = offset;
644 }
645
646 /* Saving the scratch register holding the return address. */
647 else if (lr_save_reg != -1
648 && gr_k == lr_save_reg)
649 lr_saved_on_stack = 1;
650
651 /* Spilling int-sized arguments to the stack. */
652 else if (is_argument_reg (gr_k))
653 ;
654
655 /* It's not a store instruction we recognize, so this must
656 be the end of the prologue. */
657 else
658 break;
659 }
660
661 /* It's not any instruction we recognize, so this must be the end
662 of the prologue. */
663 else
664 break;
665
666 pc += 4;
667 }
668
669 if (frame)
670 {
671 frame->extra_info->lr_saved_on_stack = lr_saved_on_stack;
672
673 /* If we know the relationship between the stack and frame
674 pointers, record the addresses of the registers we noticed.
675 Note that we have to do this as a separate step at the end,
676 because instructions may save relative to the SP, but we need
677 their addresses relative to the FP. */
678 if (fp_set)
679 {
680 int i;
681
682 for (i = 0; i < 64; i++)
683 if (gr_saved[i])
684 frame->saved_regs[i] = (frame->frame
685 - fp_offset + gr_sp_offset[i]);
686
687 frame->extra_info->fp_to_callers_sp_offset = framesize - fp_offset;
688 }
689 }
690
691 return pc;
692 }
693
694
695 static CORE_ADDR
696 frv_skip_prologue (CORE_ADDR pc)
697 {
698 CORE_ADDR func_addr, func_end, new_pc;
699
700 new_pc = pc;
701
702 /* If the line table has entry for a line *within* the function
703 (i.e., not in the prologue, and not past the end), then that's
704 our location. */
705 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
706 {
707 struct symtab_and_line sal;
708
709 sal = find_pc_line (func_addr, 0);
710
711 if (sal.line != 0 && sal.end < func_end)
712 {
713 new_pc = sal.end;
714 }
715 }
716
717 /* The FR-V prologue is at least five instructions long (twenty bytes).
718 If we didn't find a real source location past that, then
719 do a full analysis of the prologue. */
720 if (new_pc < pc + 20)
721 new_pc = frv_analyze_prologue (pc, 0);
722
723 return new_pc;
724 }
725
726 static void
727 frv_frame_init_saved_regs (struct frame_info *frame)
728 {
729 if (frame->saved_regs)
730 return;
731
732 frame_saved_regs_zalloc (frame);
733 frame->saved_regs[fp_regnum] = frame->frame;
734
735 /* Find the beginning of this function, so we can analyze its
736 prologue. */
737 {
738 CORE_ADDR func_addr, func_end;
739
740 if (find_pc_partial_function (frame->pc, NULL, &func_addr, &func_end))
741 frv_analyze_prologue (func_addr, frame);
742 }
743 }
744
745 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
746 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
747 and TYPE is the type (which is known to be struct, union or array).
748
749 The frv returns all structs in memory. */
750
751 static int
752 frv_use_struct_convention (int gcc_p, struct type *type)
753 {
754 return 1;
755 }
756
757 static void
758 frv_extract_return_value (struct type *type, char *regbuf, char *valbuf)
759 {
760 memcpy (valbuf, (regbuf
761 + frv_register_byte (8)
762 + (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0)),
763 TYPE_LENGTH (type));
764 }
765
766 static CORE_ADDR
767 frv_extract_struct_value_address (char *regbuf)
768 {
769 return extract_address (regbuf + frv_register_byte (struct_return_regnum),
770 4);
771 }
772
773 static void
774 frv_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
775 {
776 write_register (struct_return_regnum, addr);
777 }
778
779 static int
780 frv_frameless_function_invocation (struct frame_info *frame)
781 {
782 return frameless_look_for_prologue (frame);
783 }
784
785 static CORE_ADDR
786 frv_saved_pc_after_call (struct frame_info *frame)
787 {
788 return read_register (lr_regnum);
789 }
790
791 static void
792 frv_init_extra_frame_info (int fromleaf, struct frame_info *frame)
793 {
794 frame_extra_info_zalloc (frame, sizeof (struct frame_extra_info));
795 frame->extra_info->fp_to_callers_sp_offset = 0;
796 frame->extra_info->lr_saved_on_stack = 0;
797 }
798
799 #define ROUND_UP(n,a) (((n)+(a)-1) & ~((a)-1))
800 #define ROUND_DOWN(n,a) ((n) & ~((a)-1))
801
802 static CORE_ADDR
803 frv_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
804 int struct_return, CORE_ADDR struct_addr)
805 {
806 int argreg;
807 int argnum;
808 char *val;
809 char valbuf[4];
810 struct value *arg;
811 struct type *arg_type;
812 int len;
813 enum type_code typecode;
814 CORE_ADDR regval;
815 int stack_space;
816 int stack_offset;
817
818 #if 0
819 printf("Push %d args at sp = %x, struct_return=%d (%x)\n",
820 nargs, (int) sp, struct_return, struct_addr);
821 #endif
822
823 stack_space = 0;
824 for (argnum = 0; argnum < nargs; ++argnum)
825 stack_space += ROUND_UP (TYPE_LENGTH (VALUE_TYPE (args[argnum])), 4);
826
827 stack_space -= (6 * 4);
828 if (stack_space > 0)
829 sp -= stack_space;
830
831 /* Make sure stack is dword aligned. */
832 sp = ROUND_DOWN (sp, 8);
833
834 stack_offset = 0;
835
836 argreg = 8;
837
838 if (struct_return)
839 write_register (struct_return_regnum, struct_addr);
840
841 for (argnum = 0; argnum < nargs; ++argnum)
842 {
843 arg = args[argnum];
844 arg_type = check_typedef (VALUE_TYPE (arg));
845 len = TYPE_LENGTH (arg_type);
846 typecode = TYPE_CODE (arg_type);
847
848 if (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)
849 {
850 store_address (valbuf, 4, VALUE_ADDRESS (arg));
851 typecode = TYPE_CODE_PTR;
852 len = 4;
853 val = valbuf;
854 }
855 else
856 {
857 val = (char *) VALUE_CONTENTS (arg);
858 }
859
860 while (len > 0)
861 {
862 int partial_len = (len < 4 ? len : 4);
863
864 if (argreg < 14)
865 {
866 regval = extract_address (val, partial_len);
867 #if 0
868 printf(" Argnum %d data %x -> reg %d\n",
869 argnum, (int) regval, argreg);
870 #endif
871 write_register (argreg, regval);
872 ++argreg;
873 }
874 else
875 {
876 #if 0
877 printf(" Argnum %d data %x -> offset %d (%x)\n",
878 argnum, *((int *)val), stack_offset, (int) (sp + stack_offset));
879 #endif
880 write_memory (sp + stack_offset, val, partial_len);
881 stack_offset += ROUND_UP(partial_len, 4);
882 }
883 len -= partial_len;
884 val += partial_len;
885 }
886 }
887 return sp;
888 }
889
890 static CORE_ADDR
891 frv_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
892 {
893 write_register (lr_regnum, CALL_DUMMY_ADDRESS ());
894 return sp;
895 }
896
897 static void
898 frv_store_return_value (struct type *type, char *valbuf)
899 {
900 int length = TYPE_LENGTH (type);
901 int reg8_offset = frv_register_byte (8);
902
903 if (length <= 4)
904 deprecated_write_register_bytes (reg8_offset + (4 - length), valbuf,
905 length);
906 else if (length == 8)
907 deprecated_write_register_bytes (reg8_offset, valbuf, length);
908 else
909 internal_error (__FILE__, __LINE__,
910 "Don't know how to return a %d-byte value.", length);
911 }
912
913 static void
914 frv_pop_frame (void)
915 {
916 generic_pop_current_frame (frv_pop_frame_regular);
917 }
918
919 static void
920 frv_pop_frame_regular (struct frame_info *frame)
921 {
922 CORE_ADDR fp;
923 int regno;
924
925 fp = frame->frame;
926
927 frv_frame_init_saved_regs (frame);
928
929 write_register (pc_regnum, frv_frame_saved_pc (frame));
930 for (regno = 0; regno < frv_num_regs; ++regno)
931 {
932 if (frame->saved_regs[regno]
933 && regno != pc_regnum
934 && regno != sp_regnum)
935 {
936 write_register (regno,
937 read_memory_integer (frame->saved_regs[regno], 4));
938 }
939 }
940 write_register (sp_regnum, fp + frame->extra_info->fp_to_callers_sp_offset);
941 flush_cached_frames ();
942 }
943
944
945 static void
946 frv_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
947 CORE_ADDR *targ_addr, int *targ_len)
948 {
949 *targ_addr = memaddr;
950 *targ_len = nr_bytes;
951 }
952
953
954 /* Hardware watchpoint / breakpoint support for the FR500
955 and FR400. */
956
957 int
958 frv_check_watch_resources (int type, int cnt, int ot)
959 {
960 struct gdbarch_tdep *var = CURRENT_VARIANT;
961
962 /* Watchpoints not supported on simulator. */
963 if (strcmp (target_shortname, "sim") == 0)
964 return 0;
965
966 if (type == bp_hardware_breakpoint)
967 {
968 if (var->num_hw_breakpoints == 0)
969 return 0;
970 else if (cnt <= var->num_hw_breakpoints)
971 return 1;
972 }
973 else
974 {
975 if (var->num_hw_watchpoints == 0)
976 return 0;
977 else if (ot)
978 return -1;
979 else if (cnt <= var->num_hw_watchpoints)
980 return 1;
981 }
982 return -1;
983 }
984
985
986 CORE_ADDR
987 frv_stopped_data_address (void)
988 {
989 CORE_ADDR brr, dbar0, dbar1, dbar2, dbar3;
990
991 brr = read_register (brr_regnum);
992 dbar0 = read_register (dbar0_regnum);
993 dbar1 = read_register (dbar1_regnum);
994 dbar2 = read_register (dbar2_regnum);
995 dbar3 = read_register (dbar3_regnum);
996
997 if (brr & (1<<11))
998 return dbar0;
999 else if (brr & (1<<10))
1000 return dbar1;
1001 else if (brr & (1<<9))
1002 return dbar2;
1003 else if (brr & (1<<8))
1004 return dbar3;
1005 else
1006 return 0;
1007 }
1008
1009 static struct gdbarch *
1010 frv_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1011 {
1012 struct gdbarch *gdbarch;
1013 struct gdbarch_tdep *var;
1014
1015 /* Check to see if we've already built an appropriate architecture
1016 object for this executable. */
1017 arches = gdbarch_list_lookup_by_info (arches, &info);
1018 if (arches)
1019 return arches->gdbarch;
1020
1021 /* Select the right tdep structure for this variant. */
1022 var = new_variant ();
1023 switch (info.bfd_arch_info->mach)
1024 {
1025 case bfd_mach_frv:
1026 case bfd_mach_frvsimple:
1027 case bfd_mach_fr500:
1028 case bfd_mach_frvtomcat:
1029 set_variant_num_gprs (var, 64);
1030 set_variant_num_fprs (var, 64);
1031 break;
1032
1033 case bfd_mach_fr400:
1034 set_variant_num_gprs (var, 32);
1035 set_variant_num_fprs (var, 32);
1036 break;
1037
1038 default:
1039 /* Never heard of this variant. */
1040 return 0;
1041 }
1042
1043 gdbarch = gdbarch_alloc (&info, var);
1044
1045 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
1046 ready to unwind the PC first (see frame.c:get_prev_frame()). */
1047 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
1048
1049 set_gdbarch_short_bit (gdbarch, 16);
1050 set_gdbarch_int_bit (gdbarch, 32);
1051 set_gdbarch_long_bit (gdbarch, 32);
1052 set_gdbarch_long_long_bit (gdbarch, 64);
1053 set_gdbarch_float_bit (gdbarch, 32);
1054 set_gdbarch_double_bit (gdbarch, 64);
1055 set_gdbarch_long_double_bit (gdbarch, 64);
1056 set_gdbarch_ptr_bit (gdbarch, 32);
1057
1058 set_gdbarch_num_regs (gdbarch, frv_num_regs);
1059 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
1060 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
1061 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
1062
1063 set_gdbarch_register_name (gdbarch, frv_register_name);
1064 set_gdbarch_register_size (gdbarch, 4);
1065 set_gdbarch_register_bytes (gdbarch, frv_num_regs * 4);
1066 set_gdbarch_register_byte (gdbarch, frv_register_byte);
1067 set_gdbarch_register_raw_size (gdbarch, frv_register_raw_size);
1068 set_gdbarch_deprecated_max_register_raw_size (gdbarch, 4);
1069 set_gdbarch_register_virtual_size (gdbarch, frv_register_virtual_size);
1070 set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 4);
1071 set_gdbarch_register_virtual_type (gdbarch, frv_register_virtual_type);
1072
1073 set_gdbarch_skip_prologue (gdbarch, frv_skip_prologue);
1074 set_gdbarch_breakpoint_from_pc (gdbarch, frv_breakpoint_from_pc);
1075
1076 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1077 set_gdbarch_frame_args_skip (gdbarch, 0);
1078 set_gdbarch_frameless_function_invocation (gdbarch, frv_frameless_function_invocation);
1079
1080 set_gdbarch_saved_pc_after_call (gdbarch, frv_saved_pc_after_call);
1081
1082 set_gdbarch_frame_chain (gdbarch, frv_frame_chain);
1083 set_gdbarch_deprecated_frame_saved_pc (gdbarch, frv_frame_saved_pc);
1084
1085 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, frv_frame_init_saved_regs);
1086
1087 set_gdbarch_use_struct_convention (gdbarch, frv_use_struct_convention);
1088 set_gdbarch_deprecated_extract_return_value (gdbarch, frv_extract_return_value);
1089
1090 set_gdbarch_store_struct_return (gdbarch, frv_store_struct_return);
1091 set_gdbarch_deprecated_store_return_value (gdbarch, frv_store_return_value);
1092 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, frv_extract_struct_value_address);
1093
1094 /* Settings for calling functions in the inferior. */
1095 set_gdbarch_call_dummy_length (gdbarch, 0);
1096 set_gdbarch_push_arguments (gdbarch, frv_push_arguments);
1097 set_gdbarch_push_return_address (gdbarch, frv_push_return_address);
1098 set_gdbarch_pop_frame (gdbarch, frv_pop_frame);
1099
1100 set_gdbarch_call_dummy_p (gdbarch, 1);
1101 set_gdbarch_call_dummy_words (gdbarch, frv_call_dummy_words);
1102 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (frv_call_dummy_words));
1103 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
1104 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, frv_init_extra_frame_info);
1105
1106 /* Settings that should be unnecessary. */
1107 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1108
1109 set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
1110 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
1111 set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
1112 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
1113 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
1114
1115 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
1116 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
1117 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
1118 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch, deprecated_pc_in_call_dummy_at_entry_point);
1119 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
1120 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
1121
1122 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1123 set_gdbarch_function_start_offset (gdbarch, 0);
1124 set_gdbarch_register_convertible (gdbarch, generic_register_convertible_not);
1125
1126 set_gdbarch_remote_translate_xfer_address
1127 (gdbarch, frv_remote_translate_xfer_address);
1128
1129 /* Hardware watchpoint / breakpoint support. */
1130 switch (info.bfd_arch_info->mach)
1131 {
1132 case bfd_mach_frv:
1133 case bfd_mach_frvsimple:
1134 case bfd_mach_fr500:
1135 case bfd_mach_frvtomcat:
1136 /* fr500-style hardware debugging support. */
1137 var->num_hw_watchpoints = 4;
1138 var->num_hw_breakpoints = 4;
1139 break;
1140
1141 case bfd_mach_fr400:
1142 /* fr400-style hardware debugging support. */
1143 var->num_hw_watchpoints = 2;
1144 var->num_hw_breakpoints = 4;
1145 break;
1146
1147 default:
1148 /* Otherwise, assume we don't have hardware debugging support. */
1149 var->num_hw_watchpoints = 0;
1150 var->num_hw_breakpoints = 0;
1151 break;
1152 }
1153
1154 return gdbarch;
1155 }
1156
1157 void
1158 _initialize_frv_tdep (void)
1159 {
1160 register_gdbarch_init (bfd_arch_frv, frv_gdbarch_init);
1161
1162 tm_print_insn = print_insn_frv;
1163 }
1164
1165 \f