gdb/gdbserver/linux-arm-low.c

   1 /* GNU/Linux/ARM specific low level interface, for the remote server for GDB.
   2    Copyright (C) 1995-2018 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "server.h"
  20 #include "linux-low.h"
  21 #include "arch/arm.h"
  22 #include "arch/arm-linux.h"
  23 #include "arch/arm-get-next-pcs.h"
  24 #include "linux-aarch32-low.h"
  25
  26 #include <sys/uio.h>
  27 /* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h.
  28    On Bionic elf.h and linux/elf.h have conflicting definitions.  */
  29 #ifndef ELFMAG0
  30 #include <elf.h>
  31 #endif
  32 #include "nat/gdb_ptrace.h"
  33 #include <signal.h>
  34 #include <sys/syscall.h>
  35
  36 /* Defined in auto-generated files.  */
  37 void init_registers_arm (void);
  38 extern const struct target_desc *tdesc_arm;
  39
  40 void init_registers_arm_with_iwmmxt (void);
  41 extern const struct target_desc *tdesc_arm_with_iwmmxt;
  42
  43 void init_registers_arm_with_vfpv2 (void);
  44 extern const struct target_desc *tdesc_arm_with_vfpv2;
  45
  46 void init_registers_arm_with_vfpv3 (void);
  47 extern const struct target_desc *tdesc_arm_with_vfpv3;
  48
  49 #ifndef PTRACE_GET_THREAD_AREA
  50 #define PTRACE_GET_THREAD_AREA 22
  51 #endif
  52
  53 #ifndef PTRACE_GETWMMXREGS
  54 # define PTRACE_GETWMMXREGS 18
  55 # define PTRACE_SETWMMXREGS 19
  56 #endif
  57
  58 #ifndef PTRACE_GETVFPREGS
  59 # define PTRACE_GETVFPREGS 27
  60 # define PTRACE_SETVFPREGS 28
  61 #endif
  62
  63 #ifndef PTRACE_GETHBPREGS
  64 #define PTRACE_GETHBPREGS 29
  65 #define PTRACE_SETHBPREGS 30
  66 #endif
  67
  68 /* Information describing the hardware breakpoint capabilities.  */
  69 static struct
  70 {
  71   unsigned char arch;
  72   unsigned char max_wp_length;
  73   unsigned char wp_count;
  74   unsigned char bp_count;
  75 } arm_linux_hwbp_cap;
  76
  77 /* Enum describing the different types of ARM hardware break-/watch-points.  */
  78 typedef enum
  79 {
  80   arm_hwbp_break = 0,
  81   arm_hwbp_load = 1,
  82   arm_hwbp_store = 2,
  83   arm_hwbp_access = 3
  84 } arm_hwbp_type;
  85
  86 /* Type describing an ARM Hardware Breakpoint Control register value.  */
  87 typedef unsigned int arm_hwbp_control_t;
  88
  89 /* Structure used to keep track of hardware break-/watch-points.  */
  90 struct arm_linux_hw_breakpoint
  91 {
  92   /* Address to break on, or being watched.  */
  93   unsigned int address;
  94   /* Control register for break-/watch- point.  */
  95   arm_hwbp_control_t control;
  96 };
  97
  98 /* Since we cannot dynamically allocate subfields of arch_process_info,
  99    assume a maximum number of supported break-/watchpoints.  */
 100 #define MAX_BPTS 32
 101 #define MAX_WPTS 32
 102
 103 /* Per-process arch-specific data we want to keep.  */
 104 struct arch_process_info
 105 {
 106   /* Hardware breakpoints for this process.  */
 107   struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
 108   /* Hardware watchpoints for this process.  */
 109   struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
 110 };
 111
 112 /* Per-thread arch-specific data we want to keep.  */
 113 struct arch_lwp_info
 114 {
 115   /* Non-zero if our copy differs from what's recorded in the thread.  */
 116   char bpts_changed[MAX_BPTS];
 117   char wpts_changed[MAX_WPTS];
 118   /* Cached stopped data address.  */
 119   CORE_ADDR stopped_data_address;
 120 };
 121
 122 /* These are in <asm/elf.h> in current kernels.  */
 123 #define HWCAP_VFP       64
 124 #define HWCAP_IWMMXT    512
 125 #define HWCAP_NEON      4096
 126 #define HWCAP_VFPv3     8192
 127 #define HWCAP_VFPv3D16  16384
 128
 129 #ifdef HAVE_SYS_REG_H
 130 #include <sys/reg.h>
 131 #endif
 132
 133 #define arm_num_regs 26
 134
 135 static int arm_regmap[] = {
 136   0, 4, 8, 12, 16, 20, 24, 28,
 137   32, 36, 40, 44, 48, 52, 56, 60,
 138   -1, -1, -1, -1, -1, -1, -1, -1, -1,
 139   64
 140 };
 141
 142 /* Forward declarations needed for get_next_pcs ops.  */
 143 static ULONGEST get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
 144                                                            int len,
 145                                                            int byte_order);
 146
 147 static CORE_ADDR get_next_pcs_addr_bits_remove (struct arm_get_next_pcs *self,
 148                                                 CORE_ADDR val);
 149
 150 static CORE_ADDR get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self);
 151
 152 static int get_next_pcs_is_thumb (struct arm_get_next_pcs *self);
 153
 154 /* get_next_pcs operations.  */
 155 static struct arm_get_next_pcs_ops get_next_pcs_ops = {
 156   get_next_pcs_read_memory_unsigned_integer,
 157   get_next_pcs_syscall_next_pc,
 158   get_next_pcs_addr_bits_remove,
 159   get_next_pcs_is_thumb,
 160   arm_linux_get_next_pcs_fixup,
 161 };
 162
 163 static int
 164 arm_cannot_store_register (int regno)
 165 {
 166   return (regno >= arm_num_regs);
 167 }
 168
 169 static int
 170 arm_cannot_fetch_register (int regno)
 171 {
 172   return (regno >= arm_num_regs);
 173 }
 174
 175 static void
 176 arm_fill_wmmxregset (struct regcache *regcache, void *buf)
 177 {
 178   int i;
 179
 180   if (regcache->tdesc != tdesc_arm_with_iwmmxt)
 181     return;
 182
 183   for (i = 0; i < 16; i++)
 184     collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
 185
 186   /* We only have access to wcssf, wcasf, and wcgr0-wcgr3.  */
 187   for (i = 0; i < 6; i++)
 188     collect_register (regcache, arm_num_regs + i + 16,
 189                       (char *) buf + 16 * 8 + i * 4);
 190 }
 191
 192 static void
 193 arm_store_wmmxregset (struct regcache *regcache, const void *buf)
 194 {
 195   int i;
 196
 197   if (regcache->tdesc != tdesc_arm_with_iwmmxt)
 198     return;
 199
 200   for (i = 0; i < 16; i++)
 201     supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
 202
 203   /* We only have access to wcssf, wcasf, and wcgr0-wcgr3.  */
 204   for (i = 0; i < 6; i++)
 205     supply_register (regcache, arm_num_regs + i + 16,
 206                      (char *) buf + 16 * 8 + i * 4);
 207 }
 208
 209 static void
 210 arm_fill_vfpregset (struct regcache *regcache, void *buf)
 211 {
 212   int num;
 213
 214   if (regcache->tdesc == tdesc_arm_with_neon
 215       || regcache->tdesc == tdesc_arm_with_vfpv3)
 216     num = 32;
 217   else if (regcache->tdesc == tdesc_arm_with_vfpv2)
 218     num = 16;
 219   else
 220     return;
 221
 222   arm_fill_vfpregset_num (regcache, buf, num);
 223 }
 224
 225 /* Wrapper of UNMAKE_THUMB_ADDR for get_next_pcs.  */
 226 static CORE_ADDR
 227 get_next_pcs_addr_bits_remove (struct arm_get_next_pcs *self, CORE_ADDR val)
 228 {
 229   return UNMAKE_THUMB_ADDR (val);
 230 }
 231
 232 static void
 233 arm_store_vfpregset (struct regcache *regcache, const void *buf)
 234 {
 235   int num;
 236
 237   if (regcache->tdesc == tdesc_arm_with_neon
 238       || regcache->tdesc == tdesc_arm_with_vfpv3)
 239     num = 32;
 240   else if (regcache->tdesc == tdesc_arm_with_vfpv2)
 241     num = 16;
 242   else
 243     return;
 244
 245   arm_store_vfpregset_num (regcache, buf, num);
 246 }
 247
 248 /* Wrapper of arm_is_thumb_mode for get_next_pcs.  */
 249 static int
 250 get_next_pcs_is_thumb (struct arm_get_next_pcs *self)
 251 {
 252   return arm_is_thumb_mode ();
 253 }
 254
 255 /* Read memory from the inferiror.
 256    BYTE_ORDER is ignored and there to keep compatiblity with GDB's
 257    read_memory_unsigned_integer. */
 258 static ULONGEST
 259 get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
 260                                            int len,
 261                                            int byte_order)
 262 {
 263   ULONGEST res;
 264
 265   res = 0;
 266   target_read_memory (memaddr, (unsigned char *) &res, len);
 267
 268   return res;
 269 }
 270
 271 /* Fetch the thread-local storage pointer for libthread_db.  */
 272
 273 ps_err_e
 274 ps_get_thread_area (struct ps_prochandle *ph,
 275                     lwpid_t lwpid, int idx, void **base)
 276 {
 277   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 278     return PS_ERR;
 279
 280   /* IDX is the bias from the thread pointer to the beginning of the
 281      thread descriptor.  It has to be subtracted due to implementation
 282      quirks in libthread_db.  */
 283   *base = (void *) ((char *)*base - idx);
 284
 285   return PS_OK;
 286 }
 287
 288
 289 /* Query Hardware Breakpoint information for the target we are attached to
 290    (using PID as ptrace argument) and set up arm_linux_hwbp_cap.  */
 291 static void
 292 arm_linux_init_hwbp_cap (int pid)
 293 {
 294   unsigned int val;
 295
 296   if (ptrace (PTRACE_GETHBPREGS, pid, 0, &val) < 0)
 297     return;
 298
 299   arm_linux_hwbp_cap.arch = (unsigned char)((val >> 24) & 0xff);
 300   if (arm_linux_hwbp_cap.arch == 0)
 301     return;
 302
 303   arm_linux_hwbp_cap.max_wp_length = (unsigned char)((val >> 16) & 0xff);
 304   arm_linux_hwbp_cap.wp_count = (unsigned char)((val >> 8) & 0xff);
 305   arm_linux_hwbp_cap.bp_count = (unsigned char)(val & 0xff);
 306
 307   if (arm_linux_hwbp_cap.wp_count > MAX_WPTS)
 308     internal_error (__FILE__, __LINE__, "Unsupported number of watchpoints");
 309   if (arm_linux_hwbp_cap.bp_count > MAX_BPTS)
 310     internal_error (__FILE__, __LINE__, "Unsupported number of breakpoints");
 311 }
 312
 313 /* How many hardware breakpoints are available?  */
 314 static int
 315 arm_linux_get_hw_breakpoint_count (void)
 316 {
 317   return arm_linux_hwbp_cap.bp_count;
 318 }
 319
 320 /* How many hardware watchpoints are available?  */
 321 static int
 322 arm_linux_get_hw_watchpoint_count (void)
 323 {
 324   return arm_linux_hwbp_cap.wp_count;
 325 }
 326
 327 /* Maximum length of area watched by hardware watchpoint.  */
 328 static int
 329 arm_linux_get_hw_watchpoint_max_length (void)
 330 {
 331   return arm_linux_hwbp_cap.max_wp_length;
 332 }
 333
 334 /* Initialize an ARM hardware break-/watch-point control register value.
 335    BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
 336    type of break-/watch-point; ENABLE indicates whether the point is enabled.
 337    */
 338 static arm_hwbp_control_t
 339 arm_hwbp_control_initialize (unsigned byte_address_select,
 340                              arm_hwbp_type hwbp_type,
 341                              int enable)
 342 {
 343   gdb_assert ((byte_address_select & ~0xffU) == 0);
 344   gdb_assert (hwbp_type != arm_hwbp_break
 345               || ((byte_address_select & 0xfU) != 0));
 346
 347   return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
 348 }
 349
 350 /* Does the breakpoint control value CONTROL have the enable bit set?  */
 351 static int
 352 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
 353 {
 354   return control & 0x1;
 355 }
 356
 357 /* Is the breakpoint control value CONTROL initialized?  */
 358 static int
 359 arm_hwbp_control_is_initialized (arm_hwbp_control_t control)
 360 {
 361   return control != 0;
 362 }
 363
 364 /* Change a breakpoint control word so that it is in the disabled state.  */
 365 static arm_hwbp_control_t
 366 arm_hwbp_control_disable (arm_hwbp_control_t control)
 367 {
 368   return control & ~0x1;
 369 }
 370
 371 /* Are two break-/watch-points equal?  */
 372 static int
 373 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
 374                                const struct arm_linux_hw_breakpoint *p2)
 375 {
 376   return p1->address == p2->address && p1->control == p2->control;
 377 }
 378
 379 /* Convert a raw breakpoint type to an enum arm_hwbp_type.  */
 380
 381 static arm_hwbp_type
 382 raw_bkpt_type_to_arm_hwbp_type (enum raw_bkpt_type raw_type)
 383 {
 384   switch (raw_type)
 385     {
 386     case raw_bkpt_type_hw:
 387       return arm_hwbp_break;
 388     case raw_bkpt_type_write_wp:
 389       return arm_hwbp_store;
 390     case raw_bkpt_type_read_wp:
 391       return arm_hwbp_load;
 392     case raw_bkpt_type_access_wp:
 393       return arm_hwbp_access;
 394     default:
 395       gdb_assert_not_reached ("unhandled raw type");
 396     }
 397 }
 398
 399 /* Initialize the hardware breakpoint structure P for a breakpoint or
 400    watchpoint at ADDR to LEN.  The type of watchpoint is given in TYPE.
 401    Returns -1 if TYPE is unsupported, or -2 if the particular combination
 402    of ADDR and LEN cannot be implemented.  Otherwise, returns 0 if TYPE
 403    represents a breakpoint and 1 if type represents a watchpoint.  */
 404 static int
 405 arm_linux_hw_point_initialize (enum raw_bkpt_type raw_type, CORE_ADDR addr,
 406                                int len, struct arm_linux_hw_breakpoint *p)
 407 {
 408   arm_hwbp_type hwbp_type;
 409   unsigned mask;
 410
 411   hwbp_type = raw_bkpt_type_to_arm_hwbp_type (raw_type);
 412
 413   if (hwbp_type == arm_hwbp_break)
 414     {
 415       /* For breakpoints, the length field encodes the mode.  */
 416       switch (len)
 417         {
 418         case 2:  /* 16-bit Thumb mode breakpoint */
 419         case 3:  /* 32-bit Thumb mode breakpoint */
 420           mask = 0x3;
 421           addr &= ~1;
 422           break;
 423         case 4:  /* 32-bit ARM mode breakpoint */
 424           mask = 0xf;
 425           addr &= ~3;
 426           break;
 427         default:
 428           /* Unsupported. */
 429           return -2;
 430         }
 431     }
 432   else
 433     {
 434       CORE_ADDR max_wp_length = arm_linux_get_hw_watchpoint_max_length ();
 435       CORE_ADDR aligned_addr;
 436
 437       /* Can not set watchpoints for zero or negative lengths.  */
 438       if (len <= 0)
 439         return -2;
 440       /* The current ptrace interface can only handle watchpoints that are a
 441          power of 2.  */
 442       if ((len & (len - 1)) != 0)
 443         return -2;
 444
 445       /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
 446          range covered by a watchpoint.  */
 447       aligned_addr = addr & ~(max_wp_length - 1);
 448       if (aligned_addr + max_wp_length < addr + len)
 449         return -2;
 450
 451       mask = (1 << len) - 1;
 452     }
 453
 454   p->address = (unsigned int) addr;
 455   p->control = arm_hwbp_control_initialize (mask, hwbp_type, 1);
 456
 457   return hwbp_type != arm_hwbp_break;
 458 }
 459
 460 /* Callback to mark a watch-/breakpoint to be updated in all threads of
 461    the current process.  */
 462
 463 static void
 464 update_registers_callback (thread_info *thread, int watch, int i)
 465 {
 466   struct lwp_info *lwp = get_thread_lwp (thread);
 467
 468   /* The actual update is done later just before resuming the lwp,
 469      we just mark that the registers need updating.  */
 470   if (watch)
 471     lwp->arch_private->wpts_changed[i] = 1;
 472   else
 473     lwp->arch_private->bpts_changed[i] = 1;
 474
 475   /* If the lwp isn't stopped, force it to momentarily pause, so
 476      we can update its breakpoint registers.  */
 477   if (!lwp->stopped)
 478     linux_stop_lwp (lwp);
 479 }
 480
 481 static int
 482 arm_supports_z_point_type (char z_type)
 483 {
 484   switch (z_type)
 485     {
 486     case Z_PACKET_SW_BP:
 487     case Z_PACKET_HW_BP:
 488     case Z_PACKET_WRITE_WP:
 489     case Z_PACKET_READ_WP:
 490     case Z_PACKET_ACCESS_WP:
 491       return 1;
 492     default:
 493       /* Leave the handling of sw breakpoints with the gdb client.  */
 494       return 0;
 495     }
 496 }
 497
 498 /* Insert hardware break-/watchpoint.  */
 499 static int
 500 arm_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
 501                   int len, struct raw_breakpoint *bp)
 502 {
 503   struct process_info *proc = current_process ();
 504   struct arm_linux_hw_breakpoint p, *pts;
 505   int watch, i, count;
 506
 507   watch = arm_linux_hw_point_initialize (type, addr, len, &p);
 508   if (watch < 0)
 509     {
 510       /* Unsupported.  */
 511       return watch == -1 ? 1 : -1;
 512     }
 513
 514   if (watch)
 515     {
 516       count = arm_linux_get_hw_watchpoint_count ();
 517       pts = proc->priv->arch_private->wpts;
 518     }
 519   else
 520     {
 521       count = arm_linux_get_hw_breakpoint_count ();
 522       pts = proc->priv->arch_private->bpts;
 523     }
 524
 525   for (i = 0; i < count; i++)
 526     if (!arm_hwbp_control_is_enabled (pts[i].control))
 527       {
 528         pts[i] = p;
 529
 530         /* Only update the threads of the current process.  */
 531         for_each_thread (current_thread->id.pid (), [&] (thread_info *thread)
 532           {
 533             update_registers_callback (thread, watch, i);
 534           });
 535
 536         return 0;
 537       }
 538
 539   /* We're out of watchpoints.  */
 540   return -1;
 541 }
 542
 543 /* Remove hardware break-/watchpoint.  */
 544 static int
 545 arm_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
 546                   int len, struct raw_breakpoint *bp)
 547 {
 548   struct process_info *proc = current_process ();
 549   struct arm_linux_hw_breakpoint p, *pts;
 550   int watch, i, count;
 551
 552   watch = arm_linux_hw_point_initialize (type, addr, len, &p);
 553   if (watch < 0)
 554     {
 555       /* Unsupported.  */
 556       return -1;
 557     }
 558
 559   if (watch)
 560     {
 561       count = arm_linux_get_hw_watchpoint_count ();
 562       pts = proc->priv->arch_private->wpts;
 563     }
 564   else
 565     {
 566       count = arm_linux_get_hw_breakpoint_count ();
 567       pts = proc->priv->arch_private->bpts;
 568     }
 569
 570   for (i = 0; i < count; i++)
 571     if (arm_linux_hw_breakpoint_equal (&p, pts + i))
 572       {
 573         pts[i].control = arm_hwbp_control_disable (pts[i].control);
 574
 575         /* Only update the threads of the current process.  */
 576         for_each_thread (current_thread->id.pid (), [&] (thread_info *thread)
 577           {
 578             update_registers_callback (thread, watch, i);
 579           });
 580
 581         return 0;
 582       }
 583
 584   /* No watchpoint matched.  */
 585   return -1;
 586 }
 587
 588 /* Return whether current thread is stopped due to a watchpoint.  */
 589 static int
 590 arm_stopped_by_watchpoint (void)
 591 {
 592   struct lwp_info *lwp = get_thread_lwp (current_thread);
 593   siginfo_t siginfo;
 594
 595   /* We must be able to set hardware watchpoints.  */
 596   if (arm_linux_get_hw_watchpoint_count () == 0)
 597     return 0;
 598
 599   /* Retrieve siginfo.  */
 600   errno = 0;
 601   ptrace (PTRACE_GETSIGINFO, lwpid_of (current_thread), 0, &siginfo);
 602   if (errno != 0)
 603     return 0;
 604
 605   /* This must be a hardware breakpoint.  */
 606   if (siginfo.si_signo != SIGTRAP
 607       || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
 608     return 0;
 609
 610   /* If we are in a positive slot then we're looking at a breakpoint and not
 611      a watchpoint.  */
 612   if (siginfo.si_errno >= 0)
 613     return 0;
 614
 615   /* Cache stopped data address for use by arm_stopped_data_address.  */
 616   lwp->arch_private->stopped_data_address
 617     = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
 618
 619   return 1;
 620 }
 621
 622 /* Return data address that triggered watchpoint.  Called only if
 623    arm_stopped_by_watchpoint returned true.  */
 624 static CORE_ADDR
 625 arm_stopped_data_address (void)
 626 {
 627   struct lwp_info *lwp = get_thread_lwp (current_thread);
 628   return lwp->arch_private->stopped_data_address;
 629 }
 630
 631 /* Called when a new process is created.  */
 632 static struct arch_process_info *
 633 arm_new_process (void)
 634 {
 635   struct arch_process_info *info = XCNEW (struct arch_process_info);
 636   return info;
 637 }
 638
 639 /* Called when a process is being deleted.  */
 640
 641 static void
 642 arm_delete_process (struct arch_process_info *info)
 643 {
 644   xfree (info);
 645 }
 646
 647 /* Called when a new thread is detected.  */
 648 static void
 649 arm_new_thread (struct lwp_info *lwp)
 650 {
 651   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
 652   int i;
 653
 654   for (i = 0; i < MAX_BPTS; i++)
 655     info->bpts_changed[i] = 1;
 656   for (i = 0; i < MAX_WPTS; i++)
 657     info->wpts_changed[i] = 1;
 658
 659   lwp->arch_private = info;
 660 }
 661
 662 /* Function to call when a thread is being deleted.  */
 663
 664 static void
 665 arm_delete_thread (struct arch_lwp_info *arch_lwp)
 666 {
 667   xfree (arch_lwp);
 668 }
 669
 670 static void
 671 arm_new_fork (struct process_info *parent, struct process_info *child)
 672 {
 673   struct arch_process_info *parent_proc_info;
 674   struct arch_process_info *child_proc_info;
 675   struct lwp_info *child_lwp;
 676   struct arch_lwp_info *child_lwp_info;
 677   int i;
 678
 679   /* These are allocated by linux_add_process.  */
 680   gdb_assert (parent->priv != NULL
 681               && parent->priv->arch_private != NULL);
 682   gdb_assert (child->priv != NULL
 683               && child->priv->arch_private != NULL);
 684
 685   parent_proc_info = parent->priv->arch_private;
 686   child_proc_info = child->priv->arch_private;
 687
 688   /* Linux kernel before 2.6.33 commit
 689      72f674d203cd230426437cdcf7dd6f681dad8b0d
 690      will inherit hardware debug registers from parent
 691      on fork/vfork/clone.  Newer Linux kernels create such tasks with
 692      zeroed debug registers.
 693
 694      GDB core assumes the child inherits the watchpoints/hw
 695      breakpoints of the parent, and will remove them all from the
 696      forked off process.  Copy the debug registers mirrors into the
 697      new process so that all breakpoints and watchpoints can be
 698      removed together.  The debug registers mirror will become zeroed
 699      in the end before detaching the forked off process, thus making
 700      this compatible with older Linux kernels too.  */
 701
 702   *child_proc_info = *parent_proc_info;
 703
 704   /* Mark all the hardware breakpoints and watchpoints as changed to
 705      make sure that the registers will be updated.  */
 706   child_lwp = find_lwp_pid (ptid_t (child->pid));
 707   child_lwp_info = child_lwp->arch_private;
 708   for (i = 0; i < MAX_BPTS; i++)
 709     child_lwp_info->bpts_changed[i] = 1;
 710   for (i = 0; i < MAX_WPTS; i++)
 711     child_lwp_info->wpts_changed[i] = 1;
 712 }
 713
 714 /* Called when resuming a thread.
 715    If the debug regs have changed, update the thread's copies.  */
 716 static void
 717 arm_prepare_to_resume (struct lwp_info *lwp)
 718 {
 719   struct thread_info *thread = get_lwp_thread (lwp);
 720   int pid = lwpid_of (thread);
 721   struct process_info *proc = find_process_pid (pid_of (thread));
 722   struct arch_process_info *proc_info = proc->priv->arch_private;
 723   struct arch_lwp_info *lwp_info = lwp->arch_private;
 724   int i;
 725
 726   for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
 727     if (lwp_info->bpts_changed[i])
 728       {
 729         errno = 0;
 730
 731         if (arm_hwbp_control_is_enabled (proc_info->bpts[i].control))
 732           if (ptrace (PTRACE_SETHBPREGS, pid,
 733                       (PTRACE_TYPE_ARG3) ((i << 1) + 1),
 734                       &proc_info->bpts[i].address) < 0)
 735             perror_with_name ("Unexpected error setting breakpoint address");
 736
 737         if (arm_hwbp_control_is_initialized (proc_info->bpts[i].control))
 738           if (ptrace (PTRACE_SETHBPREGS, pid,
 739                       (PTRACE_TYPE_ARG3) ((i << 1) + 2),
 740                       &proc_info->bpts[i].control) < 0)
 741             perror_with_name ("Unexpected error setting breakpoint");
 742
 743         lwp_info->bpts_changed[i] = 0;
 744       }
 745
 746   for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
 747     if (lwp_info->wpts_changed[i])
 748       {
 749         errno = 0;
 750
 751         if (arm_hwbp_control_is_enabled (proc_info->wpts[i].control))
 752           if (ptrace (PTRACE_SETHBPREGS, pid,
 753                       (PTRACE_TYPE_ARG3) -((i << 1) + 1),
 754                       &proc_info->wpts[i].address) < 0)
 755             perror_with_name ("Unexpected error setting watchpoint address");
 756
 757         if (arm_hwbp_control_is_initialized (proc_info->wpts[i].control))
 758           if (ptrace (PTRACE_SETHBPREGS, pid,
 759                       (PTRACE_TYPE_ARG3) -((i << 1) + 2),
 760                       &proc_info->wpts[i].control) < 0)
 761             perror_with_name ("Unexpected error setting watchpoint");
 762
 763         lwp_info->wpts_changed[i] = 0;
 764       }
 765 }
 766
 767 /* Find the next pc for a sigreturn or rt_sigreturn syscall.  In
 768    addition, set IS_THUMB depending on whether we will return to ARM
 769    or Thumb code.
 770    See arm-linux.h for stack layout details.  */
 771 static CORE_ADDR
 772 arm_sigreturn_next_pc (struct regcache *regcache, int svc_number,
 773                        int *is_thumb)
 774 {
 775   unsigned long sp;
 776   unsigned long sp_data;
 777   /* Offset of PC register.  */
 778   int pc_offset = 0;
 779   CORE_ADDR next_pc = 0;
 780   uint32_t cpsr;
 781
 782   gdb_assert (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn);
 783
 784   collect_register_by_name (regcache, "sp", &sp);
 785   (*the_target->read_memory) (sp, (unsigned char *) &sp_data, 4);
 786
 787   pc_offset = arm_linux_sigreturn_next_pc_offset
 788     (sp, sp_data, svc_number, __NR_sigreturn == svc_number ? 1 : 0);
 789
 790   (*the_target->read_memory) (sp + pc_offset, (unsigned char *) &next_pc, 4);
 791
 792   /* Set IS_THUMB according the CPSR saved on the stack.  */
 793   (*the_target->read_memory) (sp + pc_offset + 4, (unsigned char *) &cpsr, 4);
 794   *is_thumb = ((cpsr & CPSR_T) != 0);
 795
 796   return next_pc;
 797 }
 798
 799 /* When PC is at a syscall instruction, return the PC of the next
 800    instruction to be executed.  */
 801 static CORE_ADDR
 802 get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self)
 803 {
 804   CORE_ADDR next_pc = 0;
 805   CORE_ADDR pc = regcache_read_pc (self->regcache);
 806   int is_thumb = arm_is_thumb_mode ();
 807   ULONGEST svc_number = 0;
 808   struct regcache *regcache = self->regcache;
 809
 810   if (is_thumb)
 811     {
 812       collect_register (regcache, 7, &svc_number);
 813       next_pc = pc + 2;
 814     }
 815   else
 816     {
 817       unsigned long this_instr;
 818       unsigned long svc_operand;
 819
 820       target_read_memory (pc, (unsigned char *) &this_instr, 4);
 821       svc_operand = (0x00ffffff & this_instr);
 822
 823       if (svc_operand)  /* OABI.  */
 824         {
 825           svc_number = svc_operand - 0x900000;
 826         }
 827       else /* EABI.  */
 828         {
 829           collect_register (regcache, 7, &svc_number);
 830         }
 831
 832       next_pc = pc + 4;
 833     }
 834
 835   /* This is a sigreturn or sigreturn_rt syscall.  */
 836   if (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn)
 837     {
 838       /* SIGRETURN or RT_SIGRETURN may affect the arm thumb mode, so
 839          update IS_THUMB.   */
 840       next_pc = arm_sigreturn_next_pc (regcache, svc_number, &is_thumb);
 841     }
 842
 843   /* Addresses for calling Thumb functions have the bit 0 set.  */
 844   if (is_thumb)
 845     next_pc = MAKE_THUMB_ADDR (next_pc);
 846
 847   return next_pc;
 848 }
 849
 850 static int
 851 arm_get_hwcap (unsigned long *valp)
 852 {
 853   unsigned char *data = (unsigned char *) alloca (8);
 854   int offset = 0;
 855
 856   while ((*the_target->read_auxv) (offset, data, 8) == 8)
 857     {
 858       unsigned int *data_p = (unsigned int *)data;
 859       if (data_p[0] == AT_HWCAP)
 860         {
 861           *valp = data_p[1];
 862           return 1;
 863         }
 864
 865       offset += 8;
 866     }
 867
 868   *valp = 0;
 869   return 0;
 870 }
 871
 872 static const struct target_desc *
 873 arm_read_description (void)
 874 {
 875   int pid = lwpid_of (current_thread);
 876   unsigned long arm_hwcap = 0;
 877
 878   /* Query hardware watchpoint/breakpoint capabilities.  */
 879   arm_linux_init_hwbp_cap (pid);
 880
 881   if (arm_get_hwcap (&arm_hwcap) == 0)
 882     return tdesc_arm;
 883
 884   if (arm_hwcap & HWCAP_IWMMXT)
 885     return tdesc_arm_with_iwmmxt;
 886
 887   if (arm_hwcap & HWCAP_VFP)
 888     {
 889       const struct target_desc *result;
 890       char *buf;
 891
 892       /* NEON implies either no VFP, or VFPv3-D32.  We only support
 893          it with VFP.  */
 894       if (arm_hwcap & HWCAP_NEON)
 895         result = tdesc_arm_with_neon;
 896       else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 897         result = tdesc_arm_with_vfpv3;
 898       else
 899         result = tdesc_arm_with_vfpv2;
 900
 901       /* Now make sure that the kernel supports reading these
 902          registers.  Support was added in 2.6.30.  */
 903       errno = 0;
 904       buf = (char *) xmalloc (32 * 8 + 4);
 905       if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
 906           && errno == EIO)
 907         result = tdesc_arm;
 908
 909       free (buf);
 910
 911       return result;
 912     }
 913
 914   /* The default configuration uses legacy FPA registers, probably
 915      simulated.  */
 916   return tdesc_arm;
 917 }
 918
 919 static void
 920 arm_arch_setup (void)
 921 {
 922   int tid = lwpid_of (current_thread);
 923   int gpregs[18];
 924   struct iovec iov;
 925
 926   current_process ()->tdesc = arm_read_description ();
 927
 928   iov.iov_base = gpregs;
 929   iov.iov_len = sizeof (gpregs);
 930
 931   /* Check if PTRACE_GETREGSET works.  */
 932   if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) == 0)
 933     have_ptrace_getregset = 1;
 934   else
 935     have_ptrace_getregset = 0;
 936 }
 937
 938 /* Fetch the next possible PCs after the current instruction executes.  */
 939
 940 static std::vector<CORE_ADDR>
 941 arm_gdbserver_get_next_pcs (struct regcache *regcache)
 942 {
 943   struct arm_get_next_pcs next_pcs_ctx;
 944
 945   arm_get_next_pcs_ctor (&next_pcs_ctx,
 946                          &get_next_pcs_ops,
 947                          /* Byte order is ignored assumed as host.  */
 948                          0,
 949                          0,
 950                          1,
 951                          regcache);
 952
 953   return arm_get_next_pcs (&next_pcs_ctx);
 954 }
 955
 956 /* Support for hardware single step.  */
 957
 958 static int
 959 arm_supports_hardware_single_step (void)
 960 {
 961   return 0;
 962 }
 963
 964 /* Implementation of linux_target_ops method "get_syscall_trapinfo".  */
 965
 966 static void
 967 arm_get_syscall_trapinfo (struct regcache *regcache, int *sysno)
 968 {
 969   if (arm_is_thumb_mode ())
 970     collect_register_by_name (regcache, "r7", sysno);
 971   else
 972     {
 973       unsigned long pc;
 974       unsigned long insn;
 975
 976       collect_register_by_name (regcache, "pc", &pc);
 977
 978       if ((*the_target->read_memory) (pc - 4, (unsigned char *) &insn, 4))
 979         *sysno = UNKNOWN_SYSCALL;
 980       else
 981         {
 982           unsigned long svc_operand = (0x00ffffff & insn);
 983
 984           if (svc_operand)
 985             {
 986               /* OABI */
 987               *sysno = svc_operand - 0x900000;
 988             }
 989           else
 990             {
 991               /* EABI */
 992               collect_register_by_name (regcache, "r7", sysno);
 993             }
 994         }
 995     }
 996 }
 997
 998 /* Register sets without using PTRACE_GETREGSET.  */
 999
1000 static struct regset_info arm_regsets[] = {
1001   { PTRACE_GETREGS, PTRACE_SETREGS, 0, 18 * 4,
1002     GENERAL_REGS,
1003     arm_fill_gregset, arm_store_gregset },
1004   { PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, 16 * 8 + 6 * 4,
1005     EXTENDED_REGS,
1006     arm_fill_wmmxregset, arm_store_wmmxregset },
1007   { PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, 32 * 8 + 4,
1008     EXTENDED_REGS,
1009     arm_fill_vfpregset, arm_store_vfpregset },
1010   NULL_REGSET
1011 };
1012
1013 static struct regsets_info arm_regsets_info =
1014   {
1015     arm_regsets, /* regsets */
1016     0, /* num_regsets */
1017     NULL, /* disabled_regsets */
1018   };
1019
1020 static struct usrregs_info arm_usrregs_info =
1021   {
1022     arm_num_regs,
1023     arm_regmap,
1024   };
1025
1026 static struct regs_info regs_info_arm =
1027   {
1028     NULL, /* regset_bitmap */
1029     &arm_usrregs_info,
1030     &arm_regsets_info
1031   };
1032
1033 static const struct regs_info *
1034 arm_regs_info (void)
1035 {
1036   const struct target_desc *tdesc = current_process ()->tdesc;
1037
1038   if (have_ptrace_getregset == 1
1039       && (tdesc == tdesc_arm_with_neon || tdesc == tdesc_arm_with_vfpv3))
1040     return &regs_info_aarch32;
1041   else
1042     return &regs_info_arm;
1043 }
1044
1045 struct linux_target_ops the_low_target = {
1046   arm_arch_setup,
1047   arm_regs_info,
1048   arm_cannot_fetch_register,
1049   arm_cannot_store_register,
1050   NULL, /* fetch_register */
1051   linux_get_pc_32bit,
1052   linux_set_pc_32bit,
1053   arm_breakpoint_kind_from_pc,
1054   arm_sw_breakpoint_from_kind,
1055   arm_gdbserver_get_next_pcs,
1056   0,
1057   arm_breakpoint_at,
1058   arm_supports_z_point_type,
1059   arm_insert_point,
1060   arm_remove_point,
1061   arm_stopped_by_watchpoint,
1062   arm_stopped_data_address,
1063   NULL, /* collect_ptrace_register */
1064   NULL, /* supply_ptrace_register */
1065   NULL, /* siginfo_fixup */
1066   arm_new_process,
1067   arm_delete_process,
1068   arm_new_thread,
1069   arm_delete_thread,
1070   arm_new_fork,
1071   arm_prepare_to_resume,
1072   NULL, /* process_qsupported */
1073   NULL, /* supports_tracepoints */
1074   NULL, /* get_thread_area */
1075   NULL, /* install_fast_tracepoint_jump_pad */
1076   NULL, /* emit_ops */
1077   NULL, /* get_min_fast_tracepoint_insn_len */
1078   NULL, /* supports_range_stepping */
1079   arm_breakpoint_kind_from_current_state,
1080   arm_supports_hardware_single_step,
1081   arm_get_syscall_trapinfo,
1082 };
1083
1084 void
1085 initialize_low_arch (void)
1086 {
1087   /* Initialize the Linux target descriptions.  */
1088   init_registers_arm ();
1089   init_registers_arm_with_iwmmxt ();
1090   init_registers_arm_with_vfpv2 ();
1091   init_registers_arm_with_vfpv3 ();
1092
1093   initialize_low_arch_aarch32 ();
1094
1095   initialize_regsets_info (&arm_regsets_info);
1096 }