gdb/gdbserver/linux-mips-low.c

   1 /* GNU/Linux/MIPS specific low level interface, for the remote server for GDB.
   2    Copyright (C) 1995-2015 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "server.h"
  20 #include "linux-low.h"
  21
  22 #include "nat/gdb_ptrace.h"
  23 #include <endian.h>
  24
  25 #include "nat/mips-linux-watch.h"
  26 #include "gdb_proc_service.h"
  27
  28 /* Defined in auto-generated file mips-linux.c.  */
  29 void init_registers_mips_linux (void);
  30 extern const struct target_desc *tdesc_mips_linux;
  31
  32 /* Defined in auto-generated file mips-dsp-linux.c.  */
  33 void init_registers_mips_dsp_linux (void);
  34 extern const struct target_desc *tdesc_mips_dsp_linux;
  35
  36 /* Defined in auto-generated file mips64-linux.c.  */
  37 void init_registers_mips64_linux (void);
  38 extern const struct target_desc *tdesc_mips64_linux;
  39
  40 /* Defined in auto-generated file mips64-dsp-linux.c.  */
  41 void init_registers_mips64_dsp_linux (void);
  42 extern const struct target_desc *tdesc_mips64_dsp_linux;
  43
  44 #ifdef __mips64
  45 #define tdesc_mips_linux tdesc_mips64_linux
  46 #define tdesc_mips_dsp_linux tdesc_mips64_dsp_linux
  47 #endif
  48
  49 #ifndef PTRACE_GET_THREAD_AREA
  50 #define PTRACE_GET_THREAD_AREA 25
  51 #endif
  52
  53 #ifdef HAVE_SYS_REG_H
  54 #include <sys/reg.h>
  55 #endif
  56
  57 #define mips_num_regs 73
  58 #define mips_dsp_num_regs 80
  59
  60 #include <asm/ptrace.h>
  61
  62 #ifndef DSP_BASE
  63 #define DSP_BASE 71
  64 #define DSP_CONTROL 77
  65 #endif
  66
  67 union mips_register
  68 {
  69   unsigned char buf[8];
  70
  71   /* Deliberately signed, for proper sign extension.  */
  72   int reg32;
  73   long long reg64;
  74 };
  75
  76 /* Return the ptrace ``address'' of register REGNO. */
  77
  78 #define mips_base_regs                                                  \
  79   -1,  1,  2,  3,  4,  5,  6,  7,                                       \
  80   8,  9,  10, 11, 12, 13, 14, 15,                                       \
  81   16, 17, 18, 19, 20, 21, 22, 23,                                       \
  82   24, 25, 26, 27, 28, 29, 30, 31,                                       \
  83                                                                         \
  84   -1, MMLO, MMHI, BADVADDR, CAUSE, PC,                                  \
  85                                                                         \
  86   FPR_BASE,      FPR_BASE + 1,  FPR_BASE + 2,  FPR_BASE + 3,            \
  87   FPR_BASE + 4,  FPR_BASE + 5,  FPR_BASE + 6,  FPR_BASE + 7,            \
  88   FPR_BASE + 8,  FPR_BASE + 9,  FPR_BASE + 10, FPR_BASE + 11,           \
  89   FPR_BASE + 12, FPR_BASE + 13, FPR_BASE + 14, FPR_BASE + 15,           \
  90   FPR_BASE + 16, FPR_BASE + 17, FPR_BASE + 18, FPR_BASE + 19,           \
  91   FPR_BASE + 20, FPR_BASE + 21, FPR_BASE + 22, FPR_BASE + 23,           \
  92   FPR_BASE + 24, FPR_BASE + 25, FPR_BASE + 26, FPR_BASE + 27,           \
  93   FPR_BASE + 28, FPR_BASE + 29, FPR_BASE + 30, FPR_BASE + 31,           \
  94   FPC_CSR, FPC_EIR
  95
  96 #define mips_dsp_regs                                                   \
  97   DSP_BASE,      DSP_BASE + 1,  DSP_BASE + 2,  DSP_BASE + 3,            \
  98   DSP_BASE + 4,  DSP_BASE + 5,                                          \
  99   DSP_CONTROL
 100
 101 static int mips_regmap[mips_num_regs] = {
 102   mips_base_regs,
 103   0
 104 };
 105
 106 static int mips_dsp_regmap[mips_dsp_num_regs] = {
 107   mips_base_regs,
 108   mips_dsp_regs,
 109   0
 110 };
 111
 112 /* DSP registers are not in any regset and can only be accessed
 113    individually.  */
 114
 115 static unsigned char mips_dsp_regset_bitmap[(mips_dsp_num_regs + 7) / 8] = {
 116   0xfe, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x80
 117 };
 118
 119 static int have_dsp = -1;
 120
 121 /* Try peeking at an arbitrarily chosen DSP register and pick the available
 122    user register set accordingly.  */
 123
 124 static const struct target_desc *
 125 mips_read_description (void)
 126 {
 127   if (have_dsp < 0)
 128     {
 129       int pid = lwpid_of (current_thread);
 130
 131       errno = 0;
 132       ptrace (PTRACE_PEEKUSER, pid, DSP_CONTROL, 0);
 133       switch (errno)
 134         {
 135         case 0:
 136           have_dsp = 1;
 137           break;
 138         case EIO:
 139           have_dsp = 0;
 140           break;
 141         default:
 142           perror_with_name ("ptrace");
 143           break;
 144         }
 145     }
 146
 147   return have_dsp ? tdesc_mips_dsp_linux : tdesc_mips_linux;
 148 }
 149
 150 static void
 151 mips_arch_setup (void)
 152 {
 153   current_process ()->tdesc = mips_read_description ();
 154 }
 155
 156 static struct usrregs_info *
 157 get_usrregs_info (void)
 158 {
 159   const struct regs_info *regs_info = the_low_target.regs_info ();
 160
 161   return regs_info->usrregs;
 162 }
 163
 164 /* Per-process arch-specific data we want to keep.  */
 165
 166 struct arch_process_info
 167 {
 168   /* -1 if the kernel and/or CPU do not support watch registers.
 169       1 if watch_readback is valid and we can read style, num_valid
 170         and the masks.
 171       0 if we need to read the watch_readback.  */
 172
 173   int watch_readback_valid;
 174
 175   /* Cached watch register read values.  */
 176
 177   struct pt_watch_regs watch_readback;
 178
 179   /* Current watchpoint requests for this process.  */
 180
 181   struct mips_watchpoint *current_watches;
 182
 183   /* The current set of watch register values for writing the
 184      registers.  */
 185
 186   struct pt_watch_regs watch_mirror;
 187 };
 188
 189 /* Per-thread arch-specific data we want to keep.  */
 190
 191 struct arch_lwp_info
 192 {
 193   /* Non-zero if our copy differs from what's recorded in the thread.  */
 194   int watch_registers_changed;
 195 };
 196
 197 /* From mips-linux-nat.c.  */
 198
 199 /* Pseudo registers can not be read.  ptrace does not provide a way to
 200    read (or set) PS_REGNUM, and there's no point in reading or setting
 201    ZERO_REGNUM.  We also can not set BADVADDR, CAUSE, or FCRIR via
 202    ptrace().  */
 203
 204 static int
 205 mips_cannot_fetch_register (int regno)
 206 {
 207   const struct target_desc *tdesc;
 208
 209   if (get_usrregs_info ()->regmap[regno] == -1)
 210     return 1;
 211
 212   tdesc = current_process ()->tdesc;
 213
 214   if (find_regno (tdesc, "r0") == regno)
 215     return 1;
 216
 217   return 0;
 218 }
 219
 220 static int
 221 mips_cannot_store_register (int regno)
 222 {
 223   const struct target_desc *tdesc;
 224
 225   if (get_usrregs_info ()->regmap[regno] == -1)
 226     return 1;
 227
 228   tdesc = current_process ()->tdesc;
 229
 230   if (find_regno (tdesc, "r0") == regno)
 231     return 1;
 232
 233   if (find_regno (tdesc, "cause") == regno)
 234     return 1;
 235
 236   if (find_regno (tdesc, "badvaddr") == regno)
 237     return 1;
 238
 239   if (find_regno (tdesc, "fir") == regno)
 240     return 1;
 241
 242   return 0;
 243 }
 244
 245 static CORE_ADDR
 246 mips_get_pc (struct regcache *regcache)
 247 {
 248   union mips_register pc;
 249   collect_register_by_name (regcache, "pc", pc.buf);
 250   return register_size (regcache->tdesc, 0) == 4 ? pc.reg32 : pc.reg64;
 251 }
 252
 253 static void
 254 mips_set_pc (struct regcache *regcache, CORE_ADDR pc)
 255 {
 256   union mips_register newpc;
 257   if (register_size (regcache->tdesc, 0) == 4)
 258     newpc.reg32 = pc;
 259   else
 260     newpc.reg64 = pc;
 261
 262   supply_register_by_name (regcache, "pc", newpc.buf);
 263 }
 264
 265 /* Correct in either endianness.  */
 266 static const unsigned int mips_breakpoint = 0x0005000d;
 267 #define mips_breakpoint_len 4
 268
 269 /* We only place breakpoints in empty marker functions, and thread locking
 270    is outside of the function.  So rather than importing software single-step,
 271    we can just run until exit.  */
 272 static CORE_ADDR
 273 mips_reinsert_addr (void)
 274 {
 275   struct regcache *regcache = get_thread_regcache (current_thread, 1);
 276   union mips_register ra;
 277   collect_register_by_name (regcache, "r31", ra.buf);
 278   return register_size (regcache->tdesc, 0) == 4 ? ra.reg32 : ra.reg64;
 279 }
 280
 281 static int
 282 mips_breakpoint_at (CORE_ADDR where)
 283 {
 284   unsigned int insn;
 285
 286   (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
 287   if (insn == mips_breakpoint)
 288     return 1;
 289
 290   /* If necessary, recognize more trap instructions here.  GDB only uses the
 291      one.  */
 292   return 0;
 293 }
 294
 295 /* Mark the watch registers of lwp, represented by ENTRY, as changed,
 296    if the lwp's process id is *PID_P.  */
 297
 298 static int
 299 update_watch_registers_callback (struct inferior_list_entry *entry,
 300                                  void *pid_p)
 301 {
 302   struct thread_info *thread = (struct thread_info *) entry;
 303   struct lwp_info *lwp = get_thread_lwp (thread);
 304   int pid = *(int *) pid_p;
 305
 306   /* Only update the threads of this process.  */
 307   if (pid_of (thread) == pid)
 308     {
 309       /* The actual update is done later just before resuming the lwp,
 310          we just mark that the registers need updating.  */
 311       lwp->arch_private->watch_registers_changed = 1;
 312
 313       /* If the lwp isn't stopped, force it to momentarily pause, so
 314          we can update its watch registers.  */
 315       if (!lwp->stopped)
 316         linux_stop_lwp (lwp);
 317     }
 318
 319   return 0;
 320 }
 321
 322 /* This is the implementation of linux_target_ops method
 323    new_process.  */
 324
 325 static struct arch_process_info *
 326 mips_linux_new_process (void)
 327 {
 328   struct arch_process_info *info = xcalloc (1, sizeof (*info));
 329
 330   return info;
 331 }
 332
 333 /* This is the implementation of linux_target_ops method new_thread.
 334    Mark the watch registers as changed, so the threads' copies will
 335    be updated.  */
 336
 337 static void
 338 mips_linux_new_thread (struct lwp_info *lwp)
 339 {
 340   struct arch_lwp_info *info = xcalloc (1, sizeof (*info));
 341
 342   info->watch_registers_changed = 1;
 343
 344   lwp->arch_private = info;
 345 }
 346
 347 /* Create a new mips_watchpoint and add it to the list.  */
 348
 349 static void
 350 mips_add_watchpoint (struct arch_process_info *private, CORE_ADDR addr,
 351                      int len, int watch_type)
 352 {
 353   struct mips_watchpoint *new_watch;
 354   struct mips_watchpoint **pw;
 355
 356   new_watch = xmalloc (sizeof (struct mips_watchpoint));
 357   new_watch->addr = addr;
 358   new_watch->len = len;
 359   new_watch->type = watch_type;
 360   new_watch->next = NULL;
 361
 362   pw = &private->current_watches;
 363   while (*pw != NULL)
 364     pw = &(*pw)->next;
 365   *pw = new_watch;
 366 }
 367
 368 /* Hook to call when a new fork is attached.  */
 369
 370 static void
 371 mips_linux_new_fork (struct process_info *parent,
 372                         struct process_info *child)
 373 {
 374   struct arch_process_info *parent_private;
 375   struct arch_process_info *child_private;
 376   struct mips_watchpoint *wp;
 377
 378   /* These are allocated by linux_add_process.  */
 379   gdb_assert (parent->priv != NULL
 380               && parent->priv->arch_private != NULL);
 381   gdb_assert (child->priv != NULL
 382               && child->priv->arch_private != NULL);
 383
 384   /* Linux kernel before 2.6.33 commit
 385      72f674d203cd230426437cdcf7dd6f681dad8b0d
 386      will inherit hardware debug registers from parent
 387      on fork/vfork/clone.  Newer Linux kernels create such tasks with
 388      zeroed debug registers.
 389
 390      GDB core assumes the child inherits the watchpoints/hw
 391      breakpoints of the parent, and will remove them all from the
 392      forked off process.  Copy the debug registers mirrors into the
 393      new process so that all breakpoints and watchpoints can be
 394      removed together.  The debug registers mirror will become zeroed
 395      in the end before detaching the forked off process, thus making
 396      this compatible with older Linux kernels too.  */
 397
 398   parent_private = parent->priv->arch_private;
 399   child_private = child->priv->arch_private;
 400
 401   child_private->watch_readback_valid = parent_private->watch_readback_valid;
 402   child_private->watch_readback = parent_private->watch_readback;
 403
 404   for (wp = parent_private->current_watches; wp != NULL; wp = wp->next)
 405     mips_add_watchpoint (child_private, wp->addr, wp->len, wp->type);
 406
 407   child_private->watch_mirror = parent_private->watch_mirror;
 408 }
 409 /* This is the implementation of linux_target_ops method
 410    prepare_to_resume.  If the watch regs have changed, update the
 411    thread's copies.  */
 412
 413 static void
 414 mips_linux_prepare_to_resume (struct lwp_info *lwp)
 415 {
 416   ptid_t ptid = ptid_of (get_lwp_thread (lwp));
 417   struct process_info *proc = find_process_pid (ptid_get_pid (ptid));
 418   struct arch_process_info *priv = proc->priv->arch_private;
 419
 420   if (lwp->arch_private->watch_registers_changed)
 421     {
 422       /* Only update the watch registers if we have set or unset a
 423          watchpoint already.  */
 424       if (mips_linux_watch_get_num_valid (&priv->watch_mirror) > 0)
 425         {
 426           /* Write the mirrored watch register values.  */
 427           int tid = ptid_get_lwp (ptid);
 428
 429           if (-1 == ptrace (PTRACE_SET_WATCH_REGS, tid,
 430                             &priv->watch_mirror))
 431             perror_with_name ("Couldn't write watch register");
 432         }
 433
 434       lwp->arch_private->watch_registers_changed = 0;
 435     }
 436 }
 437
 438 static int
 439 mips_supports_z_point_type (char z_type)
 440 {
 441   switch (z_type)
 442     {
 443     case Z_PACKET_WRITE_WP:
 444     case Z_PACKET_READ_WP:
 445     case Z_PACKET_ACCESS_WP:
 446       return 1;
 447     default:
 448       return 0;
 449     }
 450 }
 451
 452 /* This is the implementation of linux_target_ops method
 453    insert_point.  */
 454
 455 static int
 456 mips_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
 457                    int len, struct raw_breakpoint *bp)
 458 {
 459   struct process_info *proc = current_process ();
 460   struct arch_process_info *priv = proc->priv->arch_private;
 461   struct pt_watch_regs regs;
 462   int pid;
 463   long lwpid;
 464   enum target_hw_bp_type watch_type;
 465   uint32_t irw;
 466
 467   lwpid = lwpid_of (current_thread);
 468   if (!mips_linux_read_watch_registers (lwpid,
 469                                         &priv->watch_readback,
 470                                         &priv->watch_readback_valid,
 471                                         0))
 472     return -1;
 473
 474   if (len <= 0)
 475     return -1;
 476
 477   regs = priv->watch_readback;
 478   /* Add the current watches.  */
 479   mips_linux_watch_populate_regs (priv->current_watches, &regs);
 480
 481   /* Now try to add the new watch.  */
 482   watch_type = raw_bkpt_type_to_target_hw_bp_type (type);
 483   irw = mips_linux_watch_type_to_irw (watch_type);
 484   if (!mips_linux_watch_try_one_watch (&regs, addr, len, irw))
 485     return -1;
 486
 487   /* It fit.  Stick it on the end of the list.  */
 488   mips_add_watchpoint (priv, addr, len, watch_type);
 489
 490   priv->watch_mirror = regs;
 491
 492   /* Only update the threads of this process.  */
 493   pid = pid_of (proc);
 494   find_inferior (&all_threads, update_watch_registers_callback, &pid);
 495
 496   return 0;
 497 }
 498
 499 /* This is the implementation of linux_target_ops method
 500    remove_point.  */
 501
 502 static int
 503 mips_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
 504                    int len, struct raw_breakpoint *bp)
 505 {
 506   struct process_info *proc = current_process ();
 507   struct arch_process_info *priv = proc->priv->arch_private;
 508
 509   int deleted_one;
 510   int pid;
 511   enum target_hw_bp_type watch_type;
 512
 513   struct mips_watchpoint **pw;
 514   struct mips_watchpoint *w;
 515
 516   /* Search for a known watch that matches.  Then unlink and free it.  */
 517   watch_type = raw_bkpt_type_to_target_hw_bp_type (type);
 518   deleted_one = 0;
 519   pw = &priv->current_watches;
 520   while ((w = *pw))
 521     {
 522       if (w->addr == addr && w->len == len && w->type == watch_type)
 523         {
 524           *pw = w->next;
 525           free (w);
 526           deleted_one = 1;
 527           break;
 528         }
 529       pw = &(w->next);
 530     }
 531
 532   if (!deleted_one)
 533     return -1;  /* We don't know about it, fail doing nothing.  */
 534
 535   /* At this point watch_readback is known to be valid because we
 536      could not have added the watch without reading it.  */
 537   gdb_assert (priv->watch_readback_valid == 1);
 538
 539   priv->watch_mirror = priv->watch_readback;
 540   mips_linux_watch_populate_regs (priv->current_watches,
 541                                   &priv->watch_mirror);
 542
 543   /* Only update the threads of this process.  */
 544   pid = pid_of (proc);
 545   find_inferior (&all_threads, update_watch_registers_callback, &pid);
 546   return 0;
 547 }
 548
 549 /* This is the implementation of linux_target_ops method
 550    stopped_by_watchpoint.  The watchhi R and W bits indicate
 551    the watch register triggered. */
 552
 553 static int
 554 mips_stopped_by_watchpoint (void)
 555 {
 556   struct process_info *proc = current_process ();
 557   struct arch_process_info *priv = proc->priv->arch_private;
 558   int n;
 559   int num_valid;
 560   long lwpid = lwpid_of (current_thread);
 561
 562   if (!mips_linux_read_watch_registers (lwpid,
 563                                         &priv->watch_readback,
 564                                         &priv->watch_readback_valid,
 565                                         1))
 566     return 0;
 567
 568   num_valid = mips_linux_watch_get_num_valid (&priv->watch_readback);
 569
 570   for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
 571     if (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 572         & (R_MASK | W_MASK))
 573       return 1;
 574
 575   return 0;
 576 }
 577
 578 /* This is the implementation of linux_target_ops method
 579    stopped_data_address.  */
 580
 581 static CORE_ADDR
 582 mips_stopped_data_address (void)
 583 {
 584   struct process_info *proc = current_process ();
 585   struct arch_process_info *priv = proc->priv->arch_private;
 586   int n;
 587   int num_valid;
 588   long lwpid = lwpid_of (current_thread);
 589
 590   /* On MIPS we don't know the low order 3 bits of the data address.
 591      GDB does not support remote targets that can't report the
 592      watchpoint address.  So, make our best guess; return the starting
 593      address of a watchpoint request which overlaps the one that
 594      triggered.  */
 595
 596   if (!mips_linux_read_watch_registers (lwpid,
 597                                         &priv->watch_readback,
 598                                         &priv->watch_readback_valid,
 599                                         0))
 600     return 0;
 601
 602   num_valid = mips_linux_watch_get_num_valid (&priv->watch_readback);
 603
 604   for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
 605     if (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 606         & (R_MASK | W_MASK))
 607       {
 608         CORE_ADDR t_low, t_hi;
 609         int t_irw;
 610         struct mips_watchpoint *watch;
 611
 612         t_low = mips_linux_watch_get_watchlo (&priv->watch_readback, n);
 613         t_irw = t_low & IRW_MASK;
 614         t_hi = (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 615                 | IRW_MASK);
 616         t_low &= ~(CORE_ADDR)t_hi;
 617
 618         for (watch = priv->current_watches;
 619              watch != NULL;
 620              watch = watch->next)
 621           {
 622             CORE_ADDR addr = watch->addr;
 623             CORE_ADDR last_byte = addr + watch->len - 1;
 624
 625             if ((t_irw & mips_linux_watch_type_to_irw (watch->type)) == 0)
 626               {
 627                 /* Different type.  */
 628                 continue;
 629               }
 630             /* Check for overlap of even a single byte.  */
 631             if (last_byte >= t_low && addr <= t_low + t_hi)
 632               return addr;
 633           }
 634       }
 635
 636   /* Shouldn't happen.  */
 637   return 0;
 638 }
 639
 640 /* Fetch the thread-local storage pointer for libthread_db.  */
 641
 642 ps_err_e
 643 ps_get_thread_area (const struct ps_prochandle *ph,
 644                     lwpid_t lwpid, int idx, void **base)
 645 {
 646   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 647     return PS_ERR;
 648
 649   /* IDX is the bias from the thread pointer to the beginning of the
 650      thread descriptor.  It has to be subtracted due to implementation
 651      quirks in libthread_db.  */
 652   *base = (void *) ((char *)*base - idx);
 653
 654   return PS_OK;
 655 }
 656
 657 #ifdef HAVE_PTRACE_GETREGS
 658
 659 static void
 660 mips_collect_register (struct regcache *regcache,
 661                        int use_64bit, int regno, union mips_register *reg)
 662 {
 663   union mips_register tmp_reg;
 664
 665   if (use_64bit)
 666     {
 667       collect_register (regcache, regno, &tmp_reg.reg64);
 668       *reg = tmp_reg;
 669     }
 670   else
 671     {
 672       collect_register (regcache, regno, &tmp_reg.reg32);
 673       reg->reg64 = tmp_reg.reg32;
 674     }
 675 }
 676
 677 static void
 678 mips_supply_register (struct regcache *regcache,
 679                       int use_64bit, int regno, const union mips_register *reg)
 680 {
 681   int offset = 0;
 682
 683   /* For big-endian 32-bit targets, ignore the high four bytes of each
 684      eight-byte slot.  */
 685   if (__BYTE_ORDER == __BIG_ENDIAN && !use_64bit)
 686     offset = 4;
 687
 688   supply_register (regcache, regno, reg->buf + offset);
 689 }
 690
 691 static void
 692 mips_collect_register_32bit (struct regcache *regcache,
 693                              int use_64bit, int regno, unsigned char *buf)
 694 {
 695   union mips_register tmp_reg;
 696   int reg32;
 697
 698   mips_collect_register (regcache, use_64bit, regno, &tmp_reg);
 699   reg32 = tmp_reg.reg64;
 700   memcpy (buf, &reg32, 4);
 701 }
 702
 703 static void
 704 mips_supply_register_32bit (struct regcache *regcache,
 705                             int use_64bit, int regno, const unsigned char *buf)
 706 {
 707   union mips_register tmp_reg;
 708   int reg32;
 709
 710   memcpy (&reg32, buf, 4);
 711   tmp_reg.reg64 = reg32;
 712   mips_supply_register (regcache, use_64bit, regno, &tmp_reg);
 713 }
 714
 715 static void
 716 mips_fill_gregset (struct regcache *regcache, void *buf)
 717 {
 718   union mips_register *regset = buf;
 719   int i, use_64bit;
 720   const struct target_desc *tdesc = regcache->tdesc;
 721
 722   use_64bit = (register_size (tdesc, 0) == 8);
 723
 724   for (i = 1; i < 32; i++)
 725     mips_collect_register (regcache, use_64bit, i, regset + i);
 726
 727   mips_collect_register (regcache, use_64bit,
 728                          find_regno (tdesc, "lo"), regset + 32);
 729   mips_collect_register (regcache, use_64bit,
 730                          find_regno (tdesc, "hi"), regset + 33);
 731   mips_collect_register (regcache, use_64bit,
 732                          find_regno (tdesc, "pc"), regset + 34);
 733   mips_collect_register (regcache, use_64bit,
 734                          find_regno (tdesc, "badvaddr"), regset + 35);
 735   mips_collect_register (regcache, use_64bit,
 736                          find_regno (tdesc, "status"), regset + 36);
 737   mips_collect_register (regcache, use_64bit,
 738                          find_regno (tdesc, "cause"), regset + 37);
 739
 740   mips_collect_register (regcache, use_64bit,
 741                          find_regno (tdesc, "restart"), regset + 0);
 742 }
 743
 744 static void
 745 mips_store_gregset (struct regcache *regcache, const void *buf)
 746 {
 747   const union mips_register *regset = buf;
 748   int i, use_64bit;
 749
 750   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 751
 752   for (i = 0; i < 32; i++)
 753     mips_supply_register (regcache, use_64bit, i, regset + i);
 754
 755   mips_supply_register (regcache, use_64bit,
 756                         find_regno (regcache->tdesc, "lo"), regset + 32);
 757   mips_supply_register (regcache, use_64bit,
 758                         find_regno (regcache->tdesc, "hi"), regset + 33);
 759   mips_supply_register (regcache, use_64bit,
 760                         find_regno (regcache->tdesc, "pc"), regset + 34);
 761   mips_supply_register (regcache, use_64bit,
 762                         find_regno (regcache->tdesc, "badvaddr"), regset + 35);
 763   mips_supply_register (regcache, use_64bit,
 764                         find_regno (regcache->tdesc, "status"), regset + 36);
 765   mips_supply_register (regcache, use_64bit,
 766                         find_regno (regcache->tdesc, "cause"), regset + 37);
 767
 768   mips_supply_register (regcache, use_64bit,
 769                         find_regno (regcache->tdesc, "restart"), regset + 0);
 770 }
 771
 772 static void
 773 mips_fill_fpregset (struct regcache *regcache, void *buf)
 774 {
 775   union mips_register *regset = buf;
 776   int i, use_64bit, first_fp, big_endian;
 777
 778   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 779   first_fp = find_regno (regcache->tdesc, "f0");
 780   big_endian = (__BYTE_ORDER == __BIG_ENDIAN);
 781
 782   /* See GDB for a discussion of this peculiar layout.  */
 783   for (i = 0; i < 32; i++)
 784     if (use_64bit)
 785       collect_register (regcache, first_fp + i, regset[i].buf);
 786     else
 787       collect_register (regcache, first_fp + i,
 788                         regset[i & ~1].buf + 4 * (big_endian != (i & 1)));
 789
 790   mips_collect_register_32bit (regcache, use_64bit,
 791                                find_regno (regcache->tdesc, "fcsr"), regset[32].buf);
 792   mips_collect_register_32bit (regcache, use_64bit,
 793                                find_regno (regcache->tdesc, "fir"),
 794                                regset[32].buf + 4);
 795 }
 796
 797 static void
 798 mips_store_fpregset (struct regcache *regcache, const void *buf)
 799 {
 800   const union mips_register *regset = buf;
 801   int i, use_64bit, first_fp, big_endian;
 802
 803   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 804   first_fp = find_regno (regcache->tdesc, "f0");
 805   big_endian = (__BYTE_ORDER == __BIG_ENDIAN);
 806
 807   /* See GDB for a discussion of this peculiar layout.  */
 808   for (i = 0; i < 32; i++)
 809     if (use_64bit)
 810       supply_register (regcache, first_fp + i, regset[i].buf);
 811     else
 812       supply_register (regcache, first_fp + i,
 813                        regset[i & ~1].buf + 4 * (big_endian != (i & 1)));
 814
 815   mips_supply_register_32bit (regcache, use_64bit,
 816                               find_regno (regcache->tdesc, "fcsr"),
 817                               regset[32].buf);
 818   mips_supply_register_32bit (regcache, use_64bit,
 819                               find_regno (regcache->tdesc, "fir"),
 820                               regset[32].buf + 4);
 821 }
 822 #endif /* HAVE_PTRACE_GETREGS */
 823
 824 static struct regset_info mips_regsets[] = {
 825 #ifdef HAVE_PTRACE_GETREGS
 826   { PTRACE_GETREGS, PTRACE_SETREGS, 0, 38 * 8, GENERAL_REGS,
 827     mips_fill_gregset, mips_store_gregset },
 828   { PTRACE_GETFPREGS, PTRACE_SETFPREGS, 0, 33 * 8, FP_REGS,
 829     mips_fill_fpregset, mips_store_fpregset },
 830 #endif /* HAVE_PTRACE_GETREGS */
 831   { 0, 0, 0, -1, -1, NULL, NULL }
 832 };
 833
 834 static struct regsets_info mips_regsets_info =
 835   {
 836     mips_regsets, /* regsets */
 837     0, /* num_regsets */
 838     NULL, /* disabled_regsets */
 839   };
 840
 841 static struct usrregs_info mips_dsp_usrregs_info =
 842   {
 843     mips_dsp_num_regs,
 844     mips_dsp_regmap,
 845   };
 846
 847 static struct usrregs_info mips_usrregs_info =
 848   {
 849     mips_num_regs,
 850     mips_regmap,
 851   };
 852
 853 static struct regs_info dsp_regs_info =
 854   {
 855     mips_dsp_regset_bitmap,
 856     &mips_dsp_usrregs_info,
 857     &mips_regsets_info
 858   };
 859
 860 static struct regs_info regs_info =
 861   {
 862     NULL, /* regset_bitmap */
 863     &mips_usrregs_info,
 864     &mips_regsets_info
 865   };
 866
 867 static const struct regs_info *
 868 mips_regs_info (void)
 869 {
 870   if (have_dsp)
 871     return &dsp_regs_info;
 872   else
 873     return &regs_info;
 874 }
 875
 876 struct linux_target_ops the_low_target = {
 877   mips_arch_setup,
 878   mips_regs_info,
 879   mips_cannot_fetch_register,
 880   mips_cannot_store_register,
 881   NULL, /* fetch_register */
 882   mips_get_pc,
 883   mips_set_pc,
 884   (const unsigned char *) &mips_breakpoint,
 885   mips_breakpoint_len,
 886   mips_reinsert_addr,
 887   0,
 888   mips_breakpoint_at,
 889   mips_supports_z_point_type,
 890   mips_insert_point,
 891   mips_remove_point,
 892   mips_stopped_by_watchpoint,
 893   mips_stopped_data_address,
 894   NULL,
 895   NULL,
 896   NULL, /* siginfo_fixup */
 897   mips_linux_new_process,
 898   mips_linux_new_thread,
 899   mips_linux_new_fork,
 900   mips_linux_prepare_to_resume
 901 };
 902
 903 void
 904 initialize_low_arch (void)
 905 {
 906   /* Initialize the Linux target descriptions.  */
 907   init_registers_mips_linux ();
 908   init_registers_mips_dsp_linux ();
 909   init_registers_mips64_linux ();
 910   init_registers_mips64_dsp_linux ();
 911
 912   initialize_regsets_info (&mips_regsets_info);
 913 }