gdb/gdbserver/linux-mips-low.c

   1 /* GNU/Linux/MIPS specific low level interface, for the remote server for GDB.
   2    Copyright (C) 1995-2017 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "server.h"
  20 #include "linux-low.h"
  21
  22 #include "nat/gdb_ptrace.h"
  23 #include <endian.h>
  24
  25 #include "nat/mips-linux-watch.h"
  26 #include "gdb_proc_service.h"
  27
  28 /* Defined in auto-generated file mips-linux.c.  */
  29 void init_registers_mips_linux (void);
  30 extern const struct target_desc *tdesc_mips_linux;
  31
  32 /* Defined in auto-generated file mips-dsp-linux.c.  */
  33 void init_registers_mips_dsp_linux (void);
  34 extern const struct target_desc *tdesc_mips_dsp_linux;
  35
  36 /* Defined in auto-generated file mips64-linux.c.  */
  37 void init_registers_mips64_linux (void);
  38 extern const struct target_desc *tdesc_mips64_linux;
  39
  40 /* Defined in auto-generated file mips64-dsp-linux.c.  */
  41 void init_registers_mips64_dsp_linux (void);
  42 extern const struct target_desc *tdesc_mips64_dsp_linux;
  43
  44 #ifdef __mips64
  45 #define tdesc_mips_linux tdesc_mips64_linux
  46 #define tdesc_mips_dsp_linux tdesc_mips64_dsp_linux
  47 #endif
  48
  49 #ifndef PTRACE_GET_THREAD_AREA
  50 #define PTRACE_GET_THREAD_AREA 25
  51 #endif
  52
  53 #ifdef HAVE_SYS_REG_H
  54 #include <sys/reg.h>
  55 #endif
  56
  57 #define mips_num_regs 73
  58 #define mips_dsp_num_regs 80
  59
  60 #include <asm/ptrace.h>
  61
  62 #ifndef DSP_BASE
  63 #define DSP_BASE 71
  64 #define DSP_CONTROL 77
  65 #endif
  66
  67 union mips_register
  68 {
  69   unsigned char buf[8];
  70
  71   /* Deliberately signed, for proper sign extension.  */
  72   int reg32;
  73   long long reg64;
  74 };
  75
  76 /* Return the ptrace ``address'' of register REGNO. */
  77
  78 #define mips_base_regs                                                  \
  79   -1,  1,  2,  3,  4,  5,  6,  7,                                       \
  80   8,  9,  10, 11, 12, 13, 14, 15,                                       \
  81   16, 17, 18, 19, 20, 21, 22, 23,                                       \
  82   24, 25, 26, 27, 28, 29, 30, 31,                                       \
  83                                                                         \
  84   -1, MMLO, MMHI, BADVADDR, CAUSE, PC,                                  \
  85                                                                         \
  86   FPR_BASE,      FPR_BASE + 1,  FPR_BASE + 2,  FPR_BASE + 3,            \
  87   FPR_BASE + 4,  FPR_BASE + 5,  FPR_BASE + 6,  FPR_BASE + 7,            \
  88   FPR_BASE + 8,  FPR_BASE + 9,  FPR_BASE + 10, FPR_BASE + 11,           \
  89   FPR_BASE + 12, FPR_BASE + 13, FPR_BASE + 14, FPR_BASE + 15,           \
  90   FPR_BASE + 16, FPR_BASE + 17, FPR_BASE + 18, FPR_BASE + 19,           \
  91   FPR_BASE + 20, FPR_BASE + 21, FPR_BASE + 22, FPR_BASE + 23,           \
  92   FPR_BASE + 24, FPR_BASE + 25, FPR_BASE + 26, FPR_BASE + 27,           \
  93   FPR_BASE + 28, FPR_BASE + 29, FPR_BASE + 30, FPR_BASE + 31,           \
  94   FPC_CSR, FPC_EIR
  95
  96 #define mips_dsp_regs                                                   \
  97   DSP_BASE,      DSP_BASE + 1,  DSP_BASE + 2,  DSP_BASE + 3,            \
  98   DSP_BASE + 4,  DSP_BASE + 5,                                          \
  99   DSP_CONTROL
 100
 101 static int mips_regmap[mips_num_regs] = {
 102   mips_base_regs,
 103   0
 104 };
 105
 106 static int mips_dsp_regmap[mips_dsp_num_regs] = {
 107   mips_base_regs,
 108   mips_dsp_regs,
 109   0
 110 };
 111
 112 /* DSP registers are not in any regset and can only be accessed
 113    individually.  */
 114
 115 static unsigned char mips_dsp_regset_bitmap[(mips_dsp_num_regs + 7) / 8] = {
 116   0xfe, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x80
 117 };
 118
 119 static int have_dsp = -1;
 120
 121 /* Try peeking at an arbitrarily chosen DSP register and pick the available
 122    user register set accordingly.  */
 123
 124 static const struct target_desc *
 125 mips_read_description (void)
 126 {
 127   if (have_dsp < 0)
 128     {
 129       int pid = lwpid_of (current_thread);
 130
 131       errno = 0;
 132       ptrace (PTRACE_PEEKUSER, pid, DSP_CONTROL, 0);
 133       switch (errno)
 134         {
 135         case 0:
 136           have_dsp = 1;
 137           break;
 138         case EIO:
 139           have_dsp = 0;
 140           break;
 141         default:
 142           perror_with_name ("ptrace");
 143           break;
 144         }
 145     }
 146
 147   return have_dsp ? tdesc_mips_dsp_linux : tdesc_mips_linux;
 148 }
 149
 150 static void
 151 mips_arch_setup (void)
 152 {
 153   current_process ()->tdesc = mips_read_description ();
 154 }
 155
 156 static struct usrregs_info *
 157 get_usrregs_info (void)
 158 {
 159   const struct regs_info *regs_info = the_low_target.regs_info ();
 160
 161   return regs_info->usrregs;
 162 }
 163
 164 /* Per-process arch-specific data we want to keep.  */
 165
 166 struct arch_process_info
 167 {
 168   /* -1 if the kernel and/or CPU do not support watch registers.
 169       1 if watch_readback is valid and we can read style, num_valid
 170         and the masks.
 171       0 if we need to read the watch_readback.  */
 172
 173   int watch_readback_valid;
 174
 175   /* Cached watch register read values.  */
 176
 177   struct pt_watch_regs watch_readback;
 178
 179   /* Current watchpoint requests for this process.  */
 180
 181   struct mips_watchpoint *current_watches;
 182
 183   /* The current set of watch register values for writing the
 184      registers.  */
 185
 186   struct pt_watch_regs watch_mirror;
 187 };
 188
 189 /* Per-thread arch-specific data we want to keep.  */
 190
 191 struct arch_lwp_info
 192 {
 193   /* Non-zero if our copy differs from what's recorded in the thread.  */
 194   int watch_registers_changed;
 195 };
 196
 197 /* From mips-linux-nat.c.  */
 198
 199 /* Pseudo registers can not be read.  ptrace does not provide a way to
 200    read (or set) PS_REGNUM, and there's no point in reading or setting
 201    ZERO_REGNUM.  We also can not set BADVADDR, CAUSE, or FCRIR via
 202    ptrace().  */
 203
 204 static int
 205 mips_cannot_fetch_register (int regno)
 206 {
 207   const struct target_desc *tdesc;
 208
 209   if (get_usrregs_info ()->regmap[regno] == -1)
 210     return 1;
 211
 212   tdesc = current_process ()->tdesc;
 213
 214   if (find_regno (tdesc, "r0") == regno)
 215     return 1;
 216
 217   return 0;
 218 }
 219
 220 static int
 221 mips_cannot_store_register (int regno)
 222 {
 223   const struct target_desc *tdesc;
 224
 225   if (get_usrregs_info ()->regmap[regno] == -1)
 226     return 1;
 227
 228   tdesc = current_process ()->tdesc;
 229
 230   if (find_regno (tdesc, "r0") == regno)
 231     return 1;
 232
 233   if (find_regno (tdesc, "cause") == regno)
 234     return 1;
 235
 236   if (find_regno (tdesc, "badvaddr") == regno)
 237     return 1;
 238
 239   if (find_regno (tdesc, "fir") == regno)
 240     return 1;
 241
 242   return 0;
 243 }
 244
 245 static CORE_ADDR
 246 mips_get_pc (struct regcache *regcache)
 247 {
 248   union mips_register pc;
 249   collect_register_by_name (regcache, "pc", pc.buf);
 250   return register_size (regcache->tdesc, 0) == 4 ? pc.reg32 : pc.reg64;
 251 }
 252
 253 static void
 254 mips_set_pc (struct regcache *regcache, CORE_ADDR pc)
 255 {
 256   union mips_register newpc;
 257   if (register_size (regcache->tdesc, 0) == 4)
 258     newpc.reg32 = pc;
 259   else
 260     newpc.reg64 = pc;
 261
 262   supply_register_by_name (regcache, "pc", newpc.buf);
 263 }
 264
 265 /* Correct in either endianness.  */
 266 static const unsigned int mips_breakpoint = 0x0005000d;
 267 #define mips_breakpoint_len 4
 268
 269 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind".  */
 270
 271 static const gdb_byte *
 272 mips_sw_breakpoint_from_kind (int kind, int *size)
 273 {
 274   *size = mips_breakpoint_len;
 275   return (const gdb_byte *) &mips_breakpoint;
 276 }
 277
 278 static int
 279 mips_breakpoint_at (CORE_ADDR where)
 280 {
 281   unsigned int insn;
 282
 283   (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
 284   if (insn == mips_breakpoint)
 285     return 1;
 286
 287   /* If necessary, recognize more trap instructions here.  GDB only uses the
 288      one.  */
 289   return 0;
 290 }
 291
 292 /* Mark the watch registers of lwp, represented by ENTRY, as changed,
 293    if the lwp's process id is *PID_P.  */
 294
 295 static int
 296 update_watch_registers_callback (struct inferior_list_entry *entry,
 297                                  void *pid_p)
 298 {
 299   struct thread_info *thread = (struct thread_info *) entry;
 300   struct lwp_info *lwp = get_thread_lwp (thread);
 301   int pid = *(int *) pid_p;
 302
 303   /* Only update the threads of this process.  */
 304   if (pid_of (thread) == pid)
 305     {
 306       /* The actual update is done later just before resuming the lwp,
 307          we just mark that the registers need updating.  */
 308       lwp->arch_private->watch_registers_changed = 1;
 309
 310       /* If the lwp isn't stopped, force it to momentarily pause, so
 311          we can update its watch registers.  */
 312       if (!lwp->stopped)
 313         linux_stop_lwp (lwp);
 314     }
 315
 316   return 0;
 317 }
 318
 319 /* This is the implementation of linux_target_ops method
 320    new_process.  */
 321
 322 static struct arch_process_info *
 323 mips_linux_new_process (void)
 324 {
 325   struct arch_process_info *info = XCNEW (struct arch_process_info);
 326
 327   return info;
 328 }
 329
 330 /* This is the implementation of linux_target_ops method
 331    delete_process.  */
 332
 333 static void
 334 mips_linux_delete_process (struct arch_process_info *info)
 335 {
 336   xfree (info);
 337 }
 338
 339 /* This is the implementation of linux_target_ops method new_thread.
 340    Mark the watch registers as changed, so the threads' copies will
 341    be updated.  */
 342
 343 static void
 344 mips_linux_new_thread (struct lwp_info *lwp)
 345 {
 346   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
 347
 348   info->watch_registers_changed = 1;
 349
 350   lwp->arch_private = info;
 351 }
 352
 353 /* Function to call when a thread is being deleted.  */
 354
 355 static void
 356 mips_linux_delete_thread (struct arch_lwp_info *arch_lwp)
 357 {
 358   xfree (arch_lwp);
 359 }
 360
 361 /* Create a new mips_watchpoint and add it to the list.  */
 362
 363 static void
 364 mips_add_watchpoint (struct arch_process_info *priv, CORE_ADDR addr, int len,
 365                      enum target_hw_bp_type watch_type)
 366 {
 367   struct mips_watchpoint *new_watch;
 368   struct mips_watchpoint **pw;
 369
 370   new_watch = XNEW (struct mips_watchpoint);
 371   new_watch->addr = addr;
 372   new_watch->len = len;
 373   new_watch->type = watch_type;
 374   new_watch->next = NULL;
 375
 376   pw = &priv->current_watches;
 377   while (*pw != NULL)
 378     pw = &(*pw)->next;
 379   *pw = new_watch;
 380 }
 381
 382 /* Hook to call when a new fork is attached.  */
 383
 384 static void
 385 mips_linux_new_fork (struct process_info *parent,
 386                         struct process_info *child)
 387 {
 388   struct arch_process_info *parent_private;
 389   struct arch_process_info *child_private;
 390   struct mips_watchpoint *wp;
 391
 392   /* These are allocated by linux_add_process.  */
 393   gdb_assert (parent->priv != NULL
 394               && parent->priv->arch_private != NULL);
 395   gdb_assert (child->priv != NULL
 396               && child->priv->arch_private != NULL);
 397
 398   /* Linux kernel before 2.6.33 commit
 399      72f674d203cd230426437cdcf7dd6f681dad8b0d
 400      will inherit hardware debug registers from parent
 401      on fork/vfork/clone.  Newer Linux kernels create such tasks with
 402      zeroed debug registers.
 403
 404      GDB core assumes the child inherits the watchpoints/hw
 405      breakpoints of the parent, and will remove them all from the
 406      forked off process.  Copy the debug registers mirrors into the
 407      new process so that all breakpoints and watchpoints can be
 408      removed together.  The debug registers mirror will become zeroed
 409      in the end before detaching the forked off process, thus making
 410      this compatible with older Linux kernels too.  */
 411
 412   parent_private = parent->priv->arch_private;
 413   child_private = child->priv->arch_private;
 414
 415   child_private->watch_readback_valid = parent_private->watch_readback_valid;
 416   child_private->watch_readback = parent_private->watch_readback;
 417
 418   for (wp = parent_private->current_watches; wp != NULL; wp = wp->next)
 419     mips_add_watchpoint (child_private, wp->addr, wp->len, wp->type);
 420
 421   child_private->watch_mirror = parent_private->watch_mirror;
 422 }
 423 /* This is the implementation of linux_target_ops method
 424    prepare_to_resume.  If the watch regs have changed, update the
 425    thread's copies.  */
 426
 427 static void
 428 mips_linux_prepare_to_resume (struct lwp_info *lwp)
 429 {
 430   ptid_t ptid = ptid_of (get_lwp_thread (lwp));
 431   struct process_info *proc = find_process_pid (ptid_get_pid (ptid));
 432   struct arch_process_info *priv = proc->priv->arch_private;
 433
 434   if (lwp->arch_private->watch_registers_changed)
 435     {
 436       /* Only update the watch registers if we have set or unset a
 437          watchpoint already.  */
 438       if (mips_linux_watch_get_num_valid (&priv->watch_mirror) > 0)
 439         {
 440           /* Write the mirrored watch register values.  */
 441           int tid = ptid_get_lwp (ptid);
 442
 443           if (-1 == ptrace (PTRACE_SET_WATCH_REGS, tid,
 444                             &priv->watch_mirror, NULL))
 445             perror_with_name ("Couldn't write watch register");
 446         }
 447
 448       lwp->arch_private->watch_registers_changed = 0;
 449     }
 450 }
 451
 452 static int
 453 mips_supports_z_point_type (char z_type)
 454 {
 455   switch (z_type)
 456     {
 457     case Z_PACKET_WRITE_WP:
 458     case Z_PACKET_READ_WP:
 459     case Z_PACKET_ACCESS_WP:
 460       return 1;
 461     default:
 462       return 0;
 463     }
 464 }
 465
 466 /* This is the implementation of linux_target_ops method
 467    insert_point.  */
 468
 469 static int
 470 mips_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
 471                    int len, struct raw_breakpoint *bp)
 472 {
 473   struct process_info *proc = current_process ();
 474   struct arch_process_info *priv = proc->priv->arch_private;
 475   struct pt_watch_regs regs;
 476   int pid;
 477   long lwpid;
 478   enum target_hw_bp_type watch_type;
 479   uint32_t irw;
 480
 481   lwpid = lwpid_of (current_thread);
 482   if (!mips_linux_read_watch_registers (lwpid,
 483                                         &priv->watch_readback,
 484                                         &priv->watch_readback_valid,
 485                                         0))
 486     return -1;
 487
 488   if (len <= 0)
 489     return -1;
 490
 491   regs = priv->watch_readback;
 492   /* Add the current watches.  */
 493   mips_linux_watch_populate_regs (priv->current_watches, &regs);
 494
 495   /* Now try to add the new watch.  */
 496   watch_type = raw_bkpt_type_to_target_hw_bp_type (type);
 497   irw = mips_linux_watch_type_to_irw (watch_type);
 498   if (!mips_linux_watch_try_one_watch (&regs, addr, len, irw))
 499     return -1;
 500
 501   /* It fit.  Stick it on the end of the list.  */
 502   mips_add_watchpoint (priv, addr, len, watch_type);
 503
 504   priv->watch_mirror = regs;
 505
 506   /* Only update the threads of this process.  */
 507   pid = pid_of (proc);
 508   find_inferior (&all_threads, update_watch_registers_callback, &pid);
 509
 510   return 0;
 511 }
 512
 513 /* This is the implementation of linux_target_ops method
 514    remove_point.  */
 515
 516 static int
 517 mips_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
 518                    int len, struct raw_breakpoint *bp)
 519 {
 520   struct process_info *proc = current_process ();
 521   struct arch_process_info *priv = proc->priv->arch_private;
 522
 523   int deleted_one;
 524   int pid;
 525   enum target_hw_bp_type watch_type;
 526
 527   struct mips_watchpoint **pw;
 528   struct mips_watchpoint *w;
 529
 530   /* Search for a known watch that matches.  Then unlink and free it.  */
 531   watch_type = raw_bkpt_type_to_target_hw_bp_type (type);
 532   deleted_one = 0;
 533   pw = &priv->current_watches;
 534   while ((w = *pw))
 535     {
 536       if (w->addr == addr && w->len == len && w->type == watch_type)
 537         {
 538           *pw = w->next;
 539           free (w);
 540           deleted_one = 1;
 541           break;
 542         }
 543       pw = &(w->next);
 544     }
 545
 546   if (!deleted_one)
 547     return -1;  /* We don't know about it, fail doing nothing.  */
 548
 549   /* At this point watch_readback is known to be valid because we
 550      could not have added the watch without reading it.  */
 551   gdb_assert (priv->watch_readback_valid == 1);
 552
 553   priv->watch_mirror = priv->watch_readback;
 554   mips_linux_watch_populate_regs (priv->current_watches,
 555                                   &priv->watch_mirror);
 556
 557   /* Only update the threads of this process.  */
 558   pid = pid_of (proc);
 559   find_inferior (&all_threads, update_watch_registers_callback, &pid);
 560   return 0;
 561 }
 562
 563 /* This is the implementation of linux_target_ops method
 564    stopped_by_watchpoint.  The watchhi R and W bits indicate
 565    the watch register triggered. */
 566
 567 static int
 568 mips_stopped_by_watchpoint (void)
 569 {
 570   struct process_info *proc = current_process ();
 571   struct arch_process_info *priv = proc->priv->arch_private;
 572   int n;
 573   int num_valid;
 574   long lwpid = lwpid_of (current_thread);
 575
 576   if (!mips_linux_read_watch_registers (lwpid,
 577                                         &priv->watch_readback,
 578                                         &priv->watch_readback_valid,
 579                                         1))
 580     return 0;
 581
 582   num_valid = mips_linux_watch_get_num_valid (&priv->watch_readback);
 583
 584   for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
 585     if (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 586         & (R_MASK | W_MASK))
 587       return 1;
 588
 589   return 0;
 590 }
 591
 592 /* This is the implementation of linux_target_ops method
 593    stopped_data_address.  */
 594
 595 static CORE_ADDR
 596 mips_stopped_data_address (void)
 597 {
 598   struct process_info *proc = current_process ();
 599   struct arch_process_info *priv = proc->priv->arch_private;
 600   int n;
 601   int num_valid;
 602   long lwpid = lwpid_of (current_thread);
 603
 604   /* On MIPS we don't know the low order 3 bits of the data address.
 605      GDB does not support remote targets that can't report the
 606      watchpoint address.  So, make our best guess; return the starting
 607      address of a watchpoint request which overlaps the one that
 608      triggered.  */
 609
 610   if (!mips_linux_read_watch_registers (lwpid,
 611                                         &priv->watch_readback,
 612                                         &priv->watch_readback_valid,
 613                                         0))
 614     return 0;
 615
 616   num_valid = mips_linux_watch_get_num_valid (&priv->watch_readback);
 617
 618   for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
 619     if (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 620         & (R_MASK | W_MASK))
 621       {
 622         CORE_ADDR t_low, t_hi;
 623         int t_irw;
 624         struct mips_watchpoint *watch;
 625
 626         t_low = mips_linux_watch_get_watchlo (&priv->watch_readback, n);
 627         t_irw = t_low & IRW_MASK;
 628         t_hi = (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 629                 | IRW_MASK);
 630         t_low &= ~(CORE_ADDR)t_hi;
 631
 632         for (watch = priv->current_watches;
 633              watch != NULL;
 634              watch = watch->next)
 635           {
 636             CORE_ADDR addr = watch->addr;
 637             CORE_ADDR last_byte = addr + watch->len - 1;
 638
 639             if ((t_irw & mips_linux_watch_type_to_irw (watch->type)) == 0)
 640               {
 641                 /* Different type.  */
 642                 continue;
 643               }
 644             /* Check for overlap of even a single byte.  */
 645             if (last_byte >= t_low && addr <= t_low + t_hi)
 646               return addr;
 647           }
 648       }
 649
 650   /* Shouldn't happen.  */
 651   return 0;
 652 }
 653
 654 /* Fetch the thread-local storage pointer for libthread_db.  */
 655
 656 ps_err_e
 657 ps_get_thread_area (struct ps_prochandle *ph,
 658                     lwpid_t lwpid, int idx, void **base)
 659 {
 660   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 661     return PS_ERR;
 662
 663   /* IDX is the bias from the thread pointer to the beginning of the
 664      thread descriptor.  It has to be subtracted due to implementation
 665      quirks in libthread_db.  */
 666   *base = (void *) ((char *)*base - idx);
 667
 668   return PS_OK;
 669 }
 670
 671 #ifdef HAVE_PTRACE_GETREGS
 672
 673 static void
 674 mips_collect_register (struct regcache *regcache,
 675                        int use_64bit, int regno, union mips_register *reg)
 676 {
 677   union mips_register tmp_reg;
 678
 679   if (use_64bit)
 680     {
 681       collect_register (regcache, regno, &tmp_reg.reg64);
 682       *reg = tmp_reg;
 683     }
 684   else
 685     {
 686       collect_register (regcache, regno, &tmp_reg.reg32);
 687       reg->reg64 = tmp_reg.reg32;
 688     }
 689 }
 690
 691 static void
 692 mips_supply_register (struct regcache *regcache,
 693                       int use_64bit, int regno, const union mips_register *reg)
 694 {
 695   int offset = 0;
 696
 697   /* For big-endian 32-bit targets, ignore the high four bytes of each
 698      eight-byte slot.  */
 699   if (__BYTE_ORDER == __BIG_ENDIAN && !use_64bit)
 700     offset = 4;
 701
 702   supply_register (regcache, regno, reg->buf + offset);
 703 }
 704
 705 static void
 706 mips_collect_register_32bit (struct regcache *regcache,
 707                              int use_64bit, int regno, unsigned char *buf)
 708 {
 709   union mips_register tmp_reg;
 710   int reg32;
 711
 712   mips_collect_register (regcache, use_64bit, regno, &tmp_reg);
 713   reg32 = tmp_reg.reg64;
 714   memcpy (buf, &reg32, 4);
 715 }
 716
 717 static void
 718 mips_supply_register_32bit (struct regcache *regcache,
 719                             int use_64bit, int regno, const unsigned char *buf)
 720 {
 721   union mips_register tmp_reg;
 722   int reg32;
 723
 724   memcpy (&reg32, buf, 4);
 725   tmp_reg.reg64 = reg32;
 726   mips_supply_register (regcache, use_64bit, regno, &tmp_reg);
 727 }
 728
 729 static void
 730 mips_fill_gregset (struct regcache *regcache, void *buf)
 731 {
 732   union mips_register *regset = (union mips_register *) buf;
 733   int i, use_64bit;
 734   const struct target_desc *tdesc = regcache->tdesc;
 735
 736   use_64bit = (register_size (tdesc, 0) == 8);
 737
 738   for (i = 1; i < 32; i++)
 739     mips_collect_register (regcache, use_64bit, i, regset + i);
 740
 741   mips_collect_register (regcache, use_64bit,
 742                          find_regno (tdesc, "lo"), regset + 32);
 743   mips_collect_register (regcache, use_64bit,
 744                          find_regno (tdesc, "hi"), regset + 33);
 745   mips_collect_register (regcache, use_64bit,
 746                          find_regno (tdesc, "pc"), regset + 34);
 747   mips_collect_register (regcache, use_64bit,
 748                          find_regno (tdesc, "badvaddr"), regset + 35);
 749   mips_collect_register (regcache, use_64bit,
 750                          find_regno (tdesc, "status"), regset + 36);
 751   mips_collect_register (regcache, use_64bit,
 752                          find_regno (tdesc, "cause"), regset + 37);
 753
 754   mips_collect_register (regcache, use_64bit,
 755                          find_regno (tdesc, "restart"), regset + 0);
 756 }
 757
 758 static void
 759 mips_store_gregset (struct regcache *regcache, const void *buf)
 760 {
 761   const union mips_register *regset = (const union mips_register *) buf;
 762   int i, use_64bit;
 763
 764   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 765
 766   for (i = 0; i < 32; i++)
 767     mips_supply_register (regcache, use_64bit, i, regset + i);
 768
 769   mips_supply_register (regcache, use_64bit,
 770                         find_regno (regcache->tdesc, "lo"), regset + 32);
 771   mips_supply_register (regcache, use_64bit,
 772                         find_regno (regcache->tdesc, "hi"), regset + 33);
 773   mips_supply_register (regcache, use_64bit,
 774                         find_regno (regcache->tdesc, "pc"), regset + 34);
 775   mips_supply_register (regcache, use_64bit,
 776                         find_regno (regcache->tdesc, "badvaddr"), regset + 35);
 777   mips_supply_register (regcache, use_64bit,
 778                         find_regno (regcache->tdesc, "status"), regset + 36);
 779   mips_supply_register (regcache, use_64bit,
 780                         find_regno (regcache->tdesc, "cause"), regset + 37);
 781
 782   mips_supply_register (regcache, use_64bit,
 783                         find_regno (regcache->tdesc, "restart"), regset + 0);
 784 }
 785
 786 static void
 787 mips_fill_fpregset (struct regcache *regcache, void *buf)
 788 {
 789   union mips_register *regset = (union mips_register *) buf;
 790   int i, use_64bit, first_fp, big_endian;
 791
 792   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 793   first_fp = find_regno (regcache->tdesc, "f0");
 794   big_endian = (__BYTE_ORDER == __BIG_ENDIAN);
 795
 796   /* See GDB for a discussion of this peculiar layout.  */
 797   for (i = 0; i < 32; i++)
 798     if (use_64bit)
 799       collect_register (regcache, first_fp + i, regset[i].buf);
 800     else
 801       collect_register (regcache, first_fp + i,
 802                         regset[i & ~1].buf + 4 * (big_endian != (i & 1)));
 803
 804   mips_collect_register_32bit (regcache, use_64bit,
 805                                find_regno (regcache->tdesc, "fcsr"), regset[32].buf);
 806   mips_collect_register_32bit (regcache, use_64bit,
 807                                find_regno (regcache->tdesc, "fir"),
 808                                regset[32].buf + 4);
 809 }
 810
 811 static void
 812 mips_store_fpregset (struct regcache *regcache, const void *buf)
 813 {
 814   const union mips_register *regset = (const union mips_register *) buf;
 815   int i, use_64bit, first_fp, big_endian;
 816
 817   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 818   first_fp = find_regno (regcache->tdesc, "f0");
 819   big_endian = (__BYTE_ORDER == __BIG_ENDIAN);
 820
 821   /* See GDB for a discussion of this peculiar layout.  */
 822   for (i = 0; i < 32; i++)
 823     if (use_64bit)
 824       supply_register (regcache, first_fp + i, regset[i].buf);
 825     else
 826       supply_register (regcache, first_fp + i,
 827                        regset[i & ~1].buf + 4 * (big_endian != (i & 1)));
 828
 829   mips_supply_register_32bit (regcache, use_64bit,
 830                               find_regno (regcache->tdesc, "fcsr"),
 831                               regset[32].buf);
 832   mips_supply_register_32bit (regcache, use_64bit,
 833                               find_regno (regcache->tdesc, "fir"),
 834                               regset[32].buf + 4);
 835 }
 836 #endif /* HAVE_PTRACE_GETREGS */
 837
 838 static struct regset_info mips_regsets[] = {
 839 #ifdef HAVE_PTRACE_GETREGS
 840   { PTRACE_GETREGS, PTRACE_SETREGS, 0, 38 * 8, GENERAL_REGS,
 841     mips_fill_gregset, mips_store_gregset },
 842   { PTRACE_GETFPREGS, PTRACE_SETFPREGS, 0, 33 * 8, FP_REGS,
 843     mips_fill_fpregset, mips_store_fpregset },
 844 #endif /* HAVE_PTRACE_GETREGS */
 845   NULL_REGSET
 846 };
 847
 848 static struct regsets_info mips_regsets_info =
 849   {
 850     mips_regsets, /* regsets */
 851     0, /* num_regsets */
 852     NULL, /* disabled_regsets */
 853   };
 854
 855 static struct usrregs_info mips_dsp_usrregs_info =
 856   {
 857     mips_dsp_num_regs,
 858     mips_dsp_regmap,
 859   };
 860
 861 static struct usrregs_info mips_usrregs_info =
 862   {
 863     mips_num_regs,
 864     mips_regmap,
 865   };
 866
 867 static struct regs_info dsp_regs_info =
 868   {
 869     mips_dsp_regset_bitmap,
 870     &mips_dsp_usrregs_info,
 871     &mips_regsets_info
 872   };
 873
 874 static struct regs_info regs_info =
 875   {
 876     NULL, /* regset_bitmap */
 877     &mips_usrregs_info,
 878     &mips_regsets_info
 879   };
 880
 881 static const struct regs_info *
 882 mips_regs_info (void)
 883 {
 884   if (have_dsp)
 885     return &dsp_regs_info;
 886   else
 887     return &regs_info;
 888 }
 889
 890 struct linux_target_ops the_low_target = {
 891   mips_arch_setup,
 892   mips_regs_info,
 893   mips_cannot_fetch_register,
 894   mips_cannot_store_register,
 895   NULL, /* fetch_register */
 896   mips_get_pc,
 897   mips_set_pc,
 898   NULL, /* breakpoint_kind_from_pc */
 899   mips_sw_breakpoint_from_kind,
 900   NULL, /* get_next_pcs */
 901   0,
 902   mips_breakpoint_at,
 903   mips_supports_z_point_type,
 904   mips_insert_point,
 905   mips_remove_point,
 906   mips_stopped_by_watchpoint,
 907   mips_stopped_data_address,
 908   NULL,
 909   NULL,
 910   NULL, /* siginfo_fixup */
 911   mips_linux_new_process,
 912   mips_linux_delete_process,
 913   mips_linux_new_thread,
 914   mips_linux_delete_thread,
 915   mips_linux_new_fork,
 916   mips_linux_prepare_to_resume
 917 };
 918
 919 void
 920 initialize_low_arch (void)
 921 {
 922   /* Initialize the Linux target descriptions.  */
 923   init_registers_mips_linux ();
 924   init_registers_mips_dsp_linux ();
 925   init_registers_mips64_linux ();
 926   init_registers_mips64_dsp_linux ();
 927
 928   initialize_regsets_info (&mips_regsets_info);
 929 }