]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - gdb/i387-tdep.c
2012-03-05 Pedro Alves <palves@redhat.com>
[thirdparty/binutils-gdb.git] / gdb / i387-tdep.c
1 /* Intel 387 floating point stuff.
2
3 Copyright (C) 1988-1989, 1991-1994, 1998-2005, 2007-2012 Free
4 Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 #include "defs.h"
22 #include "doublest.h"
23 #include "floatformat.h"
24 #include "frame.h"
25 #include "gdbcore.h"
26 #include "inferior.h"
27 #include "language.h"
28 #include "regcache.h"
29 #include "value.h"
30
31 #include "gdb_assert.h"
32 #include "gdb_string.h"
33
34 #include "i386-tdep.h"
35 #include "i387-tdep.h"
36 #include "i386-xstate.h"
37
38 /* Print the floating point number specified by RAW. */
39
40 static void
41 print_i387_value (struct gdbarch *gdbarch,
42 const gdb_byte *raw, struct ui_file *file)
43 {
44 DOUBLEST value;
45
46 /* Using extract_typed_floating here might affect the representation
47 of certain numbers such as NaNs, even if GDB is running natively.
48 This is fine since our caller already detects such special
49 numbers and we print the hexadecimal representation anyway. */
50 value = extract_typed_floating (raw, i387_ext_type (gdbarch));
51
52 /* We try to print 19 digits. The last digit may or may not contain
53 garbage, but we'd better print one too many. We need enough room
54 to print the value, 1 position for the sign, 1 for the decimal
55 point, 19 for the digits and 6 for the exponent adds up to 27. */
56 #ifdef PRINTF_HAS_LONG_DOUBLE
57 fprintf_filtered (file, " %-+27.19Lg", (long double) value);
58 #else
59 fprintf_filtered (file, " %-+27.19g", (double) value);
60 #endif
61 }
62
63 /* Print the classification for the register contents RAW. */
64
65 static void
66 print_i387_ext (struct gdbarch *gdbarch,
67 const gdb_byte *raw, struct ui_file *file)
68 {
69 int sign;
70 int integer;
71 unsigned int exponent;
72 unsigned long fraction[2];
73
74 sign = raw[9] & 0x80;
75 integer = raw[7] & 0x80;
76 exponent = (((raw[9] & 0x7f) << 8) | raw[8]);
77 fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]);
78 fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16)
79 | (raw[5] << 8) | raw[4]);
80
81 if (exponent == 0x7fff && integer)
82 {
83 if (fraction[0] == 0x00000000 && fraction[1] == 0x00000000)
84 /* Infinity. */
85 fprintf_filtered (file, " %cInf", (sign ? '-' : '+'));
86 else if (sign && fraction[0] == 0x00000000 && fraction[1] == 0x40000000)
87 /* Real Indefinite (QNaN). */
88 fputs_unfiltered (" Real Indefinite (QNaN)", file);
89 else if (fraction[1] & 0x40000000)
90 /* QNaN. */
91 fputs_filtered (" QNaN", file);
92 else
93 /* SNaN. */
94 fputs_filtered (" SNaN", file);
95 }
96 else if (exponent < 0x7fff && exponent > 0x0000 && integer)
97 /* Normal. */
98 print_i387_value (gdbarch, raw, file);
99 else if (exponent == 0x0000)
100 {
101 /* Denormal or zero. */
102 print_i387_value (gdbarch, raw, file);
103
104 if (integer)
105 /* Pseudo-denormal. */
106 fputs_filtered (" Pseudo-denormal", file);
107 else if (fraction[0] || fraction[1])
108 /* Denormal. */
109 fputs_filtered (" Denormal", file);
110 }
111 else
112 /* Unsupported. */
113 fputs_filtered (" Unsupported", file);
114 }
115
116 /* Print the status word STATUS. If STATUS_P is false, then STATUS
117 was unavailable. */
118
119 static void
120 print_i387_status_word (int status_p,
121 unsigned int status, struct ui_file *file)
122 {
123 fprintf_filtered (file, "Status Word: ");
124 if (!status_p)
125 {
126 fprintf_filtered (file, "%s\n", _("<unavailable>"));
127 return;
128 }
129
130 fprintf_filtered (file, "%s", hex_string_custom (status, 4));
131 fputs_filtered (" ", file);
132 fprintf_filtered (file, " %s", (status & 0x0001) ? "IE" : " ");
133 fprintf_filtered (file, " %s", (status & 0x0002) ? "DE" : " ");
134 fprintf_filtered (file, " %s", (status & 0x0004) ? "ZE" : " ");
135 fprintf_filtered (file, " %s", (status & 0x0008) ? "OE" : " ");
136 fprintf_filtered (file, " %s", (status & 0x0010) ? "UE" : " ");
137 fprintf_filtered (file, " %s", (status & 0x0020) ? "PE" : " ");
138 fputs_filtered (" ", file);
139 fprintf_filtered (file, " %s", (status & 0x0080) ? "ES" : " ");
140 fputs_filtered (" ", file);
141 fprintf_filtered (file, " %s", (status & 0x0040) ? "SF" : " ");
142 fputs_filtered (" ", file);
143 fprintf_filtered (file, " %s", (status & 0x0100) ? "C0" : " ");
144 fprintf_filtered (file, " %s", (status & 0x0200) ? "C1" : " ");
145 fprintf_filtered (file, " %s", (status & 0x0400) ? "C2" : " ");
146 fprintf_filtered (file, " %s", (status & 0x4000) ? "C3" : " ");
147
148 fputs_filtered ("\n", file);
149
150 fprintf_filtered (file,
151 " TOP: %d\n", ((status >> 11) & 7));
152 }
153
154 /* Print the control word CONTROL. If CONTROL_P is false, then
155 CONTROL was unavailable. */
156
157 static void
158 print_i387_control_word (int control_p,
159 unsigned int control, struct ui_file *file)
160 {
161 fprintf_filtered (file, "Control Word: ");
162 if (!control_p)
163 {
164 fprintf_filtered (file, "%s\n", _("<unavailable>"));
165 return;
166 }
167
168 fprintf_filtered (file, "%s", hex_string_custom (control, 4));
169 fputs_filtered (" ", file);
170 fprintf_filtered (file, " %s", (control & 0x0001) ? "IM" : " ");
171 fprintf_filtered (file, " %s", (control & 0x0002) ? "DM" : " ");
172 fprintf_filtered (file, " %s", (control & 0x0004) ? "ZM" : " ");
173 fprintf_filtered (file, " %s", (control & 0x0008) ? "OM" : " ");
174 fprintf_filtered (file, " %s", (control & 0x0010) ? "UM" : " ");
175 fprintf_filtered (file, " %s", (control & 0x0020) ? "PM" : " ");
176
177 fputs_filtered ("\n", file);
178
179 fputs_filtered (" PC: ", file);
180 switch ((control >> 8) & 3)
181 {
182 case 0:
183 fputs_filtered ("Single Precision (24-bits)\n", file);
184 break;
185 case 1:
186 fputs_filtered ("Reserved\n", file);
187 break;
188 case 2:
189 fputs_filtered ("Double Precision (53-bits)\n", file);
190 break;
191 case 3:
192 fputs_filtered ("Extended Precision (64-bits)\n", file);
193 break;
194 }
195
196 fputs_filtered (" RC: ", file);
197 switch ((control >> 10) & 3)
198 {
199 case 0:
200 fputs_filtered ("Round to nearest\n", file);
201 break;
202 case 1:
203 fputs_filtered ("Round down\n", file);
204 break;
205 case 2:
206 fputs_filtered ("Round up\n", file);
207 break;
208 case 3:
209 fputs_filtered ("Round toward zero\n", file);
210 break;
211 }
212 }
213
214 /* Print out the i387 floating point state. Note that we ignore FRAME
215 in the code below. That's OK since floating-point registers are
216 never saved on the stack. */
217
218 void
219 i387_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
220 struct frame_info *frame, const char *args)
221 {
222 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
223 ULONGEST fctrl;
224 int fctrl_p;
225 ULONGEST fstat;
226 int fstat_p;
227 ULONGEST ftag;
228 int ftag_p;
229 ULONGEST fiseg;
230 int fiseg_p;
231 ULONGEST fioff;
232 int fioff_p;
233 ULONGEST foseg;
234 int foseg_p;
235 ULONGEST fooff;
236 int fooff_p;
237 ULONGEST fop;
238 int fop_p;
239 int fpreg;
240 int fpreg_p;
241 int top;
242 int top_p;
243
244 gdb_assert (gdbarch == get_frame_arch (frame));
245
246 fctrl_p = read_frame_register_unsigned (frame,
247 I387_FCTRL_REGNUM (tdep), &fctrl);
248 fstat_p = read_frame_register_unsigned (frame,
249 I387_FSTAT_REGNUM (tdep), &fstat);
250 ftag_p = read_frame_register_unsigned (frame,
251 I387_FTAG_REGNUM (tdep), &ftag);
252 fiseg_p = read_frame_register_unsigned (frame,
253 I387_FISEG_REGNUM (tdep), &fiseg);
254 fioff_p = read_frame_register_unsigned (frame,
255 I387_FIOFF_REGNUM (tdep), &fioff);
256 foseg_p = read_frame_register_unsigned (frame,
257 I387_FOSEG_REGNUM (tdep), &foseg);
258 fooff_p = read_frame_register_unsigned (frame,
259 I387_FOOFF_REGNUM (tdep), &fooff);
260 fop_p = read_frame_register_unsigned (frame,
261 I387_FOP_REGNUM (tdep), &fop);
262
263 if (fstat_p)
264 {
265 top = ((fstat >> 11) & 7);
266
267 for (fpreg = 7; fpreg >= 0; fpreg--)
268 {
269 struct value *regval;
270 int regnum;
271 int i;
272 int tag = -1;
273
274 fprintf_filtered (file, "%sR%d: ", fpreg == top ? "=>" : " ", fpreg);
275
276 if (ftag_p)
277 {
278 tag = (ftag >> (fpreg * 2)) & 3;
279
280 switch (tag)
281 {
282 case 0:
283 fputs_filtered ("Valid ", file);
284 break;
285 case 1:
286 fputs_filtered ("Zero ", file);
287 break;
288 case 2:
289 fputs_filtered ("Special ", file);
290 break;
291 case 3:
292 fputs_filtered ("Empty ", file);
293 break;
294 }
295 }
296 else
297 fputs_filtered ("Unknown ", file);
298
299 regnum = (fpreg + 8 - top) % 8 + I387_ST0_REGNUM (tdep);
300 regval = get_frame_register_value (frame, regnum);
301
302 if (value_entirely_available (regval))
303 {
304 const char *raw = value_contents (regval);
305
306 fputs_filtered ("0x", file);
307 for (i = 9; i >= 0; i--)
308 fprintf_filtered (file, "%02x", raw[i]);
309
310 if (tag != -1 && tag != 3)
311 print_i387_ext (gdbarch, raw, file);
312 }
313 else
314 fprintf_filtered (file, "%s", _("<unavailable>"));
315
316 fputs_filtered ("\n", file);
317 }
318 }
319
320 fputs_filtered ("\n", file);
321 print_i387_status_word (fstat_p, fstat, file);
322 print_i387_control_word (fctrl_p, fctrl, file);
323 fprintf_filtered (file, "Tag Word: %s\n",
324 ftag_p ? hex_string_custom (ftag, 4) : _("<unavailable>"));
325 fprintf_filtered (file, "Instruction Pointer: %s:",
326 fiseg_p ? hex_string_custom (fiseg, 2) : _("<unavailable>"));
327 fprintf_filtered (file, "%s\n",
328 fioff_p ? hex_string_custom (fioff, 8) : _("<unavailable>"));
329 fprintf_filtered (file, "Operand Pointer: %s:",
330 foseg_p ? hex_string_custom (foseg, 2) : _("<unavailable>"));
331 fprintf_filtered (file, "%s\n",
332 fooff_p ? hex_string_custom (fooff, 8) : _("<unavailable>"));
333 fprintf_filtered (file, "Opcode: %s\n",
334 fop_p
335 ? (hex_string_custom (fop ? (fop | 0xd800) : 0, 4))
336 : _("<unavailable>"));
337 }
338 \f
339
340 /* Return nonzero if a value of type TYPE stored in register REGNUM
341 needs any special handling. */
342
343 int
344 i387_convert_register_p (struct gdbarch *gdbarch, int regnum,
345 struct type *type)
346 {
347 if (i386_fp_regnum_p (gdbarch, regnum))
348 {
349 /* Floating point registers must be converted unless we are
350 accessing them in their hardware type. */
351 if (type == i387_ext_type (gdbarch))
352 return 0;
353 else
354 return 1;
355 }
356
357 return 0;
358 }
359
360 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
361 return its contents in TO. */
362
363 int
364 i387_register_to_value (struct frame_info *frame, int regnum,
365 struct type *type, gdb_byte *to,
366 int *optimizedp, int *unavailablep)
367 {
368 struct gdbarch *gdbarch = get_frame_arch (frame);
369 gdb_byte from[I386_MAX_REGISTER_SIZE];
370
371 gdb_assert (i386_fp_regnum_p (gdbarch, regnum));
372
373 /* We only support floating-point values. */
374 if (TYPE_CODE (type) != TYPE_CODE_FLT)
375 {
376 warning (_("Cannot convert floating-point register value "
377 "to non-floating-point type."));
378 *optimizedp = *unavailablep = 0;
379 return 0;
380 }
381
382 /* Convert to TYPE. */
383 if (!get_frame_register_bytes (frame, regnum, 0, TYPE_LENGTH (type),
384 from, optimizedp, unavailablep))
385 return 0;
386
387 convert_typed_floating (from, i387_ext_type (gdbarch), to, type);
388 *optimizedp = *unavailablep = 0;
389 return 1;
390 }
391
392 /* Write the contents FROM of a value of type TYPE into register
393 REGNUM in frame FRAME. */
394
395 void
396 i387_value_to_register (struct frame_info *frame, int regnum,
397 struct type *type, const gdb_byte *from)
398 {
399 struct gdbarch *gdbarch = get_frame_arch (frame);
400 gdb_byte to[I386_MAX_REGISTER_SIZE];
401
402 gdb_assert (i386_fp_regnum_p (gdbarch, regnum));
403
404 /* We only support floating-point values. */
405 if (TYPE_CODE (type) != TYPE_CODE_FLT)
406 {
407 warning (_("Cannot convert non-floating-point type "
408 "to floating-point register value."));
409 return;
410 }
411
412 /* Convert from TYPE. */
413 convert_typed_floating (from, type, to, i387_ext_type (gdbarch));
414 put_frame_register (frame, regnum, to);
415 }
416 \f
417
418 /* Handle FSAVE and FXSAVE formats. */
419
420 /* At fsave_offset[REGNUM] you'll find the offset to the location in
421 the data structure used by the "fsave" instruction where GDB
422 register REGNUM is stored. */
423
424 static int fsave_offset[] =
425 {
426 28 + 0 * 10, /* %st(0) ... */
427 28 + 1 * 10,
428 28 + 2 * 10,
429 28 + 3 * 10,
430 28 + 4 * 10,
431 28 + 5 * 10,
432 28 + 6 * 10,
433 28 + 7 * 10, /* ... %st(7). */
434 0, /* `fctrl' (16 bits). */
435 4, /* `fstat' (16 bits). */
436 8, /* `ftag' (16 bits). */
437 16, /* `fiseg' (16 bits). */
438 12, /* `fioff'. */
439 24, /* `foseg' (16 bits). */
440 20, /* `fooff'. */
441 18 /* `fop' (bottom 11 bits). */
442 };
443
444 #define FSAVE_ADDR(tdep, fsave, regnum) \
445 (fsave + fsave_offset[regnum - I387_ST0_REGNUM (tdep)])
446 \f
447
448 /* Fill register REGNUM in REGCACHE with the appropriate value from
449 *FSAVE. This function masks off any of the reserved bits in
450 *FSAVE. */
451
452 void
453 i387_supply_fsave (struct regcache *regcache, int regnum, const void *fsave)
454 {
455 struct gdbarch *gdbarch = get_regcache_arch (regcache);
456 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
457 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
458 const gdb_byte *regs = fsave;
459 int i;
460
461 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
462
463 for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
464 if (regnum == -1 || regnum == i)
465 {
466 if (fsave == NULL)
467 {
468 regcache_raw_supply (regcache, i, NULL);
469 continue;
470 }
471
472 /* Most of the FPU control registers occupy only 16 bits in the
473 fsave area. Give those a special treatment. */
474 if (i >= I387_FCTRL_REGNUM (tdep)
475 && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
476 {
477 gdb_byte val[4];
478
479 memcpy (val, FSAVE_ADDR (tdep, regs, i), 2);
480 val[2] = val[3] = 0;
481 if (i == I387_FOP_REGNUM (tdep))
482 val[1] &= ((1 << 3) - 1);
483 regcache_raw_supply (regcache, i, val);
484 }
485 else
486 regcache_raw_supply (regcache, i, FSAVE_ADDR (tdep, regs, i));
487 }
488
489 /* Provide dummy values for the SSE registers. */
490 for (i = I387_XMM0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
491 if (regnum == -1 || regnum == i)
492 regcache_raw_supply (regcache, i, NULL);
493 if (regnum == -1 || regnum == I387_MXCSR_REGNUM (tdep))
494 {
495 gdb_byte buf[4];
496
497 store_unsigned_integer (buf, 4, byte_order, 0x1f80);
498 regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), buf);
499 }
500 }
501
502 /* Fill register REGNUM (if it is a floating-point register) in *FSAVE
503 with the value from REGCACHE. If REGNUM is -1, do this for all
504 registers. This function doesn't touch any of the reserved bits in
505 *FSAVE. */
506
507 void
508 i387_collect_fsave (const struct regcache *regcache, int regnum, void *fsave)
509 {
510 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
511 gdb_byte *regs = fsave;
512 int i;
513
514 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
515
516 for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
517 if (regnum == -1 || regnum == i)
518 {
519 /* Most of the FPU control registers occupy only 16 bits in
520 the fsave area. Give those a special treatment. */
521 if (i >= I387_FCTRL_REGNUM (tdep)
522 && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
523 {
524 gdb_byte buf[4];
525
526 regcache_raw_collect (regcache, i, buf);
527
528 if (i == I387_FOP_REGNUM (tdep))
529 {
530 /* The opcode occupies only 11 bits. Make sure we
531 don't touch the other bits. */
532 buf[1] &= ((1 << 3) - 1);
533 buf[1] |= ((FSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
534 }
535 memcpy (FSAVE_ADDR (tdep, regs, i), buf, 2);
536 }
537 else
538 regcache_raw_collect (regcache, i, FSAVE_ADDR (tdep, regs, i));
539 }
540 }
541 \f
542
543 /* At fxsave_offset[REGNUM] you'll find the offset to the location in
544 the data structure used by the "fxsave" instruction where GDB
545 register REGNUM is stored. */
546
547 static int fxsave_offset[] =
548 {
549 32, /* %st(0) through ... */
550 48,
551 64,
552 80,
553 96,
554 112,
555 128,
556 144, /* ... %st(7) (80 bits each). */
557 0, /* `fctrl' (16 bits). */
558 2, /* `fstat' (16 bits). */
559 4, /* `ftag' (16 bits). */
560 12, /* `fiseg' (16 bits). */
561 8, /* `fioff'. */
562 20, /* `foseg' (16 bits). */
563 16, /* `fooff'. */
564 6, /* `fop' (bottom 11 bits). */
565 160 + 0 * 16, /* %xmm0 through ... */
566 160 + 1 * 16,
567 160 + 2 * 16,
568 160 + 3 * 16,
569 160 + 4 * 16,
570 160 + 5 * 16,
571 160 + 6 * 16,
572 160 + 7 * 16,
573 160 + 8 * 16,
574 160 + 9 * 16,
575 160 + 10 * 16,
576 160 + 11 * 16,
577 160 + 12 * 16,
578 160 + 13 * 16,
579 160 + 14 * 16,
580 160 + 15 * 16, /* ... %xmm15 (128 bits each). */
581 };
582
583 #define FXSAVE_ADDR(tdep, fxsave, regnum) \
584 (fxsave + fxsave_offset[regnum - I387_ST0_REGNUM (tdep)])
585
586 /* We made an unfortunate choice in putting %mxcsr after the SSE
587 registers %xmm0-%xmm7 instead of before, since it makes supporting
588 the registers %xmm8-%xmm15 on AMD64 a bit involved. Therefore we
589 don't include the offset for %mxcsr here above. */
590
591 #define FXSAVE_MXCSR_ADDR(fxsave) (fxsave + 24)
592
593 static int i387_tag (const gdb_byte *raw);
594 \f
595
596 /* Fill register REGNUM in REGCACHE with the appropriate
597 floating-point or SSE register value from *FXSAVE. This function
598 masks off any of the reserved bits in *FXSAVE. */
599
600 void
601 i387_supply_fxsave (struct regcache *regcache, int regnum, const void *fxsave)
602 {
603 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
604 const gdb_byte *regs = fxsave;
605 int i;
606
607 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
608 gdb_assert (tdep->num_xmm_regs > 0);
609
610 for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
611 if (regnum == -1 || regnum == i)
612 {
613 if (regs == NULL)
614 {
615 regcache_raw_supply (regcache, i, NULL);
616 continue;
617 }
618
619 /* Most of the FPU control registers occupy only 16 bits in
620 the fxsave area. Give those a special treatment. */
621 if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep)
622 && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
623 {
624 gdb_byte val[4];
625
626 memcpy (val, FXSAVE_ADDR (tdep, regs, i), 2);
627 val[2] = val[3] = 0;
628 if (i == I387_FOP_REGNUM (tdep))
629 val[1] &= ((1 << 3) - 1);
630 else if (i== I387_FTAG_REGNUM (tdep))
631 {
632 /* The fxsave area contains a simplified version of
633 the tag word. We have to look at the actual 80-bit
634 FP data to recreate the traditional i387 tag word. */
635
636 unsigned long ftag = 0;
637 int fpreg;
638 int top;
639
640 top = ((FXSAVE_ADDR (tdep, regs,
641 I387_FSTAT_REGNUM (tdep)))[1] >> 3);
642 top &= 0x7;
643
644 for (fpreg = 7; fpreg >= 0; fpreg--)
645 {
646 int tag;
647
648 if (val[0] & (1 << fpreg))
649 {
650 int thisreg = (fpreg + 8 - top) % 8
651 + I387_ST0_REGNUM (tdep);
652 tag = i387_tag (FXSAVE_ADDR (tdep, regs, thisreg));
653 }
654 else
655 tag = 3; /* Empty */
656
657 ftag |= tag << (2 * fpreg);
658 }
659 val[0] = ftag & 0xff;
660 val[1] = (ftag >> 8) & 0xff;
661 }
662 regcache_raw_supply (regcache, i, val);
663 }
664 else
665 regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i));
666 }
667
668 if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
669 {
670 if (regs == NULL)
671 regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), NULL);
672 else
673 regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep),
674 FXSAVE_MXCSR_ADDR (regs));
675 }
676 }
677
678 /* Fill register REGNUM (if it is a floating-point or SSE register) in
679 *FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for
680 all registers. This function doesn't touch any of the reserved
681 bits in *FXSAVE. */
682
683 void
684 i387_collect_fxsave (const struct regcache *regcache, int regnum, void *fxsave)
685 {
686 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
687 gdb_byte *regs = fxsave;
688 int i;
689
690 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
691 gdb_assert (tdep->num_xmm_regs > 0);
692
693 for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
694 if (regnum == -1 || regnum == i)
695 {
696 /* Most of the FPU control registers occupy only 16 bits in
697 the fxsave area. Give those a special treatment. */
698 if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep)
699 && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
700 {
701 gdb_byte buf[4];
702
703 regcache_raw_collect (regcache, i, buf);
704
705 if (i == I387_FOP_REGNUM (tdep))
706 {
707 /* The opcode occupies only 11 bits. Make sure we
708 don't touch the other bits. */
709 buf[1] &= ((1 << 3) - 1);
710 buf[1] |= ((FXSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
711 }
712 else if (i == I387_FTAG_REGNUM (tdep))
713 {
714 /* Converting back is much easier. */
715
716 unsigned short ftag;
717 int fpreg;
718
719 ftag = (buf[1] << 8) | buf[0];
720 buf[0] = 0;
721 buf[1] = 0;
722
723 for (fpreg = 7; fpreg >= 0; fpreg--)
724 {
725 int tag = (ftag >> (fpreg * 2)) & 3;
726
727 if (tag != 3)
728 buf[0] |= (1 << fpreg);
729 }
730 }
731 memcpy (FXSAVE_ADDR (tdep, regs, i), buf, 2);
732 }
733 else
734 regcache_raw_collect (regcache, i, FXSAVE_ADDR (tdep, regs, i));
735 }
736
737 if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
738 regcache_raw_collect (regcache, I387_MXCSR_REGNUM (tdep),
739 FXSAVE_MXCSR_ADDR (regs));
740 }
741
742 /* `xstate_bv' is at byte offset 512. */
743 #define XSAVE_XSTATE_BV_ADDR(xsave) (xsave + 512)
744
745 /* At xsave_avxh_offset[REGNUM] you'll find the offset to the location in
746 the upper 128bit of AVX register data structure used by the "xsave"
747 instruction where GDB register REGNUM is stored. */
748
749 static int xsave_avxh_offset[] =
750 {
751 576 + 0 * 16, /* Upper 128bit of %ymm0 through ... */
752 576 + 1 * 16,
753 576 + 2 * 16,
754 576 + 3 * 16,
755 576 + 4 * 16,
756 576 + 5 * 16,
757 576 + 6 * 16,
758 576 + 7 * 16,
759 576 + 8 * 16,
760 576 + 9 * 16,
761 576 + 10 * 16,
762 576 + 11 * 16,
763 576 + 12 * 16,
764 576 + 13 * 16,
765 576 + 14 * 16,
766 576 + 15 * 16 /* Upper 128bit of ... %ymm15 (128 bits each). */
767 };
768
769 #define XSAVE_AVXH_ADDR(tdep, xsave, regnum) \
770 (xsave + xsave_avxh_offset[regnum - I387_YMM0H_REGNUM (tdep)])
771
772 /* Similar to i387_supply_fxsave, but use XSAVE extended state. */
773
774 void
775 i387_supply_xsave (struct regcache *regcache, int regnum,
776 const void *xsave)
777 {
778 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
779 const gdb_byte *regs = xsave;
780 int i;
781 unsigned int clear_bv;
782 static const gdb_byte zero[MAX_REGISTER_SIZE] = { 0 };
783 const gdb_byte *p;
784 enum
785 {
786 none = 0x0,
787 x87 = 0x1,
788 sse = 0x2,
789 avxh = 0x4,
790 all = x87 | sse | avxh
791 } regclass;
792
793 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
794 gdb_assert (tdep->num_xmm_regs > 0);
795
796 if (regnum == -1)
797 regclass = all;
798 else if (regnum >= I387_YMM0H_REGNUM (tdep)
799 && regnum < I387_YMMENDH_REGNUM (tdep))
800 regclass = avxh;
801 else if (regnum >= I387_XMM0_REGNUM(tdep)
802 && regnum < I387_MXCSR_REGNUM (tdep))
803 regclass = sse;
804 else if (regnum >= I387_ST0_REGNUM (tdep)
805 && regnum < I387_FCTRL_REGNUM (tdep))
806 regclass = x87;
807 else
808 regclass = none;
809
810 if (regs != NULL && regclass != none)
811 {
812 /* Get `xstat_bv'. */
813 const gdb_byte *xstate_bv_p = XSAVE_XSTATE_BV_ADDR (regs);
814
815 /* The supported bits in `xstat_bv' are 1 byte. Clear part in
816 vector registers if its bit in xstat_bv is zero. */
817 clear_bv = (~(*xstate_bv_p)) & tdep->xcr0;
818 }
819 else
820 clear_bv = I386_XSTATE_AVX_MASK;
821
822 /* With the delayed xsave mechanism, in between the program
823 starting, and the program accessing the vector registers for the
824 first time, the register's values are invalid. The kernel
825 initializes register states to zero when they are set the first
826 time in a program. This means that from the user-space programs'
827 perspective, it's the same as if the registers have always been
828 zero from the start of the program. Therefore, the debugger
829 should provide the same illusion to the user.
830
831 Note however, the case when REGS is NULL is a different case.
832 That case means we do not have access to the x87 states, so we
833 should mark the registers as unavailable (by supplying NULL). */
834
835 switch (regclass)
836 {
837 case none:
838 break;
839
840 case avxh:
841 if ((clear_bv & I386_XSTATE_AVX))
842 regcache_raw_supply (regcache, regnum, regs == NULL ? NULL : zero);
843 else
844 regcache_raw_supply (regcache, regnum,
845 XSAVE_AVXH_ADDR (tdep, regs, regnum));
846 return;
847
848 case sse:
849 if ((clear_bv & I386_XSTATE_SSE))
850 regcache_raw_supply (regcache, regnum, regs == NULL ? NULL : zero);
851 else
852 regcache_raw_supply (regcache, regnum,
853 FXSAVE_ADDR (tdep, regs, regnum));
854 return;
855
856 case x87:
857 if ((clear_bv & I386_XSTATE_X87))
858 regcache_raw_supply (regcache, regnum, regs == NULL ? NULL : zero);
859 else
860 regcache_raw_supply (regcache, regnum,
861 FXSAVE_ADDR (tdep, regs, regnum));
862 return;
863
864 case all:
865 /* Handle the upper YMM registers. */
866 if ((tdep->xcr0 & I386_XSTATE_AVX))
867 {
868 if ((clear_bv & I386_XSTATE_AVX))
869 {
870 for (i = I387_YMM0H_REGNUM (tdep);
871 i < I387_YMMENDH_REGNUM (tdep);
872 i++)
873 regcache_raw_supply (regcache, i, regs == NULL ? NULL : zero);
874 }
875 else
876 {
877 for (i = I387_YMM0H_REGNUM (tdep);
878 i < I387_YMMENDH_REGNUM (tdep);
879 i++)
880 regcache_raw_supply (regcache, i,
881 XSAVE_AVXH_ADDR (tdep, regs, i));
882 }
883 }
884
885 /* Handle the XMM registers. */
886 if ((tdep->xcr0 & I386_XSTATE_SSE))
887 {
888 if ((clear_bv & I386_XSTATE_SSE))
889 {
890 for (i = I387_XMM0_REGNUM (tdep);
891 i < I387_MXCSR_REGNUM (tdep);
892 i++)
893 regcache_raw_supply (regcache, i, regs == NULL ? NULL : zero);
894 }
895 else
896 {
897 for (i = I387_XMM0_REGNUM (tdep);
898 i < I387_MXCSR_REGNUM (tdep); i++)
899 regcache_raw_supply (regcache, i,
900 FXSAVE_ADDR (tdep, regs, i));
901 }
902 }
903
904 /* Handle the x87 registers. */
905 if ((tdep->xcr0 & I386_XSTATE_X87))
906 {
907 if ((clear_bv & I386_XSTATE_X87))
908 {
909 for (i = I387_ST0_REGNUM (tdep);
910 i < I387_FCTRL_REGNUM (tdep);
911 i++)
912 regcache_raw_supply (regcache, i, regs == NULL ? NULL : zero);
913 }
914 else
915 {
916 for (i = I387_ST0_REGNUM (tdep);
917 i < I387_FCTRL_REGNUM (tdep);
918 i++)
919 regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i));
920 }
921 }
922 break;
923 }
924
925 /* Only handle x87 control registers. */
926 for (i = I387_FCTRL_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
927 if (regnum == -1 || regnum == i)
928 {
929 if (regs == NULL)
930 {
931 regcache_raw_supply (regcache, i, NULL);
932 continue;
933 }
934
935 /* Most of the FPU control registers occupy only 16 bits in
936 the xsave extended state. Give those a special treatment. */
937 if (i != I387_FIOFF_REGNUM (tdep)
938 && i != I387_FOOFF_REGNUM (tdep))
939 {
940 gdb_byte val[4];
941
942 memcpy (val, FXSAVE_ADDR (tdep, regs, i), 2);
943 val[2] = val[3] = 0;
944 if (i == I387_FOP_REGNUM (tdep))
945 val[1] &= ((1 << 3) - 1);
946 else if (i== I387_FTAG_REGNUM (tdep))
947 {
948 /* The fxsave area contains a simplified version of
949 the tag word. We have to look at the actual 80-bit
950 FP data to recreate the traditional i387 tag word. */
951
952 unsigned long ftag = 0;
953 int fpreg;
954 int top;
955
956 top = ((FXSAVE_ADDR (tdep, regs,
957 I387_FSTAT_REGNUM (tdep)))[1] >> 3);
958 top &= 0x7;
959
960 for (fpreg = 7; fpreg >= 0; fpreg--)
961 {
962 int tag;
963
964 if (val[0] & (1 << fpreg))
965 {
966 int thisreg = (fpreg + 8 - top) % 8
967 + I387_ST0_REGNUM (tdep);
968 tag = i387_tag (FXSAVE_ADDR (tdep, regs, thisreg));
969 }
970 else
971 tag = 3; /* Empty */
972
973 ftag |= tag << (2 * fpreg);
974 }
975 val[0] = ftag & 0xff;
976 val[1] = (ftag >> 8) & 0xff;
977 }
978 regcache_raw_supply (regcache, i, val);
979 }
980 else
981 regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i));
982 }
983
984 if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
985 {
986 p = regs == NULL ? NULL : FXSAVE_MXCSR_ADDR (regs);
987 regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), p);
988 }
989 }
990
991 /* Similar to i387_collect_fxsave, but use XSAVE extended state. */
992
993 void
994 i387_collect_xsave (const struct regcache *regcache, int regnum,
995 void *xsave, int gcore)
996 {
997 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
998 gdb_byte *regs = xsave;
999 int i;
1000 enum
1001 {
1002 none = 0x0,
1003 check = 0x1,
1004 x87 = 0x2 | check,
1005 sse = 0x4 | check,
1006 avxh = 0x8 | check,
1007 all = x87 | sse | avxh
1008 } regclass;
1009
1010 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
1011 gdb_assert (tdep->num_xmm_regs > 0);
1012
1013 if (regnum == -1)
1014 regclass = all;
1015 else if (regnum >= I387_YMM0H_REGNUM (tdep)
1016 && regnum < I387_YMMENDH_REGNUM (tdep))
1017 regclass = avxh;
1018 else if (regnum >= I387_XMM0_REGNUM(tdep)
1019 && regnum < I387_MXCSR_REGNUM (tdep))
1020 regclass = sse;
1021 else if (regnum >= I387_ST0_REGNUM (tdep)
1022 && regnum < I387_FCTRL_REGNUM (tdep))
1023 regclass = x87;
1024 else
1025 regclass = none;
1026
1027 if (gcore)
1028 {
1029 /* Clear XSAVE extended state. */
1030 memset (regs, 0, I386_XSTATE_SIZE (tdep->xcr0));
1031
1032 /* Update XCR0 and `xstate_bv' with XCR0 for gcore. */
1033 if (tdep->xsave_xcr0_offset != -1)
1034 memcpy (regs + tdep->xsave_xcr0_offset, &tdep->xcr0, 8);
1035 memcpy (XSAVE_XSTATE_BV_ADDR (regs), &tdep->xcr0, 8);
1036 }
1037
1038 if ((regclass & check))
1039 {
1040 gdb_byte raw[I386_MAX_REGISTER_SIZE];
1041 gdb_byte *xstate_bv_p = XSAVE_XSTATE_BV_ADDR (regs);
1042 unsigned int xstate_bv = 0;
1043 /* The supported bits in `xstat_bv' are 1 byte. */
1044 unsigned int clear_bv = (~(*xstate_bv_p)) & tdep->xcr0;
1045 gdb_byte *p;
1046
1047 /* Clear register set if its bit in xstat_bv is zero. */
1048 if (clear_bv)
1049 {
1050 if ((clear_bv & I386_XSTATE_AVX))
1051 for (i = I387_YMM0H_REGNUM (tdep);
1052 i < I387_YMMENDH_REGNUM (tdep); i++)
1053 memset (XSAVE_AVXH_ADDR (tdep, regs, i), 0, 16);
1054
1055 if ((clear_bv & I386_XSTATE_SSE))
1056 for (i = I387_XMM0_REGNUM (tdep);
1057 i < I387_MXCSR_REGNUM (tdep); i++)
1058 memset (FXSAVE_ADDR (tdep, regs, i), 0, 16);
1059
1060 if ((clear_bv & I386_XSTATE_X87))
1061 for (i = I387_ST0_REGNUM (tdep);
1062 i < I387_FCTRL_REGNUM (tdep); i++)
1063 memset (FXSAVE_ADDR (tdep, regs, i), 0, 10);
1064 }
1065
1066 if (regclass == all)
1067 {
1068 /* Check if any upper YMM registers are changed. */
1069 if ((tdep->xcr0 & I386_XSTATE_AVX))
1070 for (i = I387_YMM0H_REGNUM (tdep);
1071 i < I387_YMMENDH_REGNUM (tdep); i++)
1072 {
1073 regcache_raw_collect (regcache, i, raw);
1074 p = XSAVE_AVXH_ADDR (tdep, regs, i);
1075 if (memcmp (raw, p, 16))
1076 {
1077 xstate_bv |= I386_XSTATE_AVX;
1078 memcpy (p, raw, 16);
1079 }
1080 }
1081
1082 /* Check if any SSE registers are changed. */
1083 if ((tdep->xcr0 & I386_XSTATE_SSE))
1084 for (i = I387_XMM0_REGNUM (tdep);
1085 i < I387_MXCSR_REGNUM (tdep); i++)
1086 {
1087 regcache_raw_collect (regcache, i, raw);
1088 p = FXSAVE_ADDR (tdep, regs, i);
1089 if (memcmp (raw, p, 16))
1090 {
1091 xstate_bv |= I386_XSTATE_SSE;
1092 memcpy (p, raw, 16);
1093 }
1094 }
1095
1096 /* Check if any X87 registers are changed. */
1097 if ((tdep->xcr0 & I386_XSTATE_X87))
1098 for (i = I387_ST0_REGNUM (tdep);
1099 i < I387_FCTRL_REGNUM (tdep); i++)
1100 {
1101 regcache_raw_collect (regcache, i, raw);
1102 p = FXSAVE_ADDR (tdep, regs, i);
1103 if (memcmp (raw, p, 10))
1104 {
1105 xstate_bv |= I386_XSTATE_X87;
1106 memcpy (p, raw, 10);
1107 }
1108 }
1109 }
1110 else
1111 {
1112 /* Check if REGNUM is changed. */
1113 regcache_raw_collect (regcache, regnum, raw);
1114
1115 switch (regclass)
1116 {
1117 default:
1118 internal_error (__FILE__, __LINE__,
1119 _("invalid i387 regclass"));
1120
1121 case avxh:
1122 /* This is an upper YMM register. */
1123 p = XSAVE_AVXH_ADDR (tdep, regs, regnum);
1124 if (memcmp (raw, p, 16))
1125 {
1126 xstate_bv |= I386_XSTATE_AVX;
1127 memcpy (p, raw, 16);
1128 }
1129 break;
1130
1131 case sse:
1132 /* This is an SSE register. */
1133 p = FXSAVE_ADDR (tdep, regs, regnum);
1134 if (memcmp (raw, p, 16))
1135 {
1136 xstate_bv |= I386_XSTATE_SSE;
1137 memcpy (p, raw, 16);
1138 }
1139 break;
1140
1141 case x87:
1142 /* This is an x87 register. */
1143 p = FXSAVE_ADDR (tdep, regs, regnum);
1144 if (memcmp (raw, p, 10))
1145 {
1146 xstate_bv |= I386_XSTATE_X87;
1147 memcpy (p, raw, 10);
1148 }
1149 break;
1150 }
1151 }
1152
1153 /* Update the corresponding bits in `xstate_bv' if any SSE/AVX
1154 registers are changed. */
1155 if (xstate_bv)
1156 {
1157 /* The supported bits in `xstat_bv' are 1 byte. */
1158 *xstate_bv_p |= (gdb_byte) xstate_bv;
1159
1160 switch (regclass)
1161 {
1162 default:
1163 internal_error (__FILE__, __LINE__,
1164 _("invalid i387 regclass"));
1165
1166 case all:
1167 break;
1168
1169 case x87:
1170 case sse:
1171 case avxh:
1172 /* Register REGNUM has been updated. Return. */
1173 return;
1174 }
1175 }
1176 else
1177 {
1178 /* Return if REGNUM isn't changed. */
1179 if (regclass != all)
1180 return;
1181 }
1182 }
1183
1184 /* Only handle x87 control registers. */
1185 for (i = I387_FCTRL_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
1186 if (regnum == -1 || regnum == i)
1187 {
1188 /* Most of the FPU control registers occupy only 16 bits in
1189 the xsave extended state. Give those a special treatment. */
1190 if (i != I387_FIOFF_REGNUM (tdep)
1191 && i != I387_FOOFF_REGNUM (tdep))
1192 {
1193 gdb_byte buf[4];
1194
1195 regcache_raw_collect (regcache, i, buf);
1196
1197 if (i == I387_FOP_REGNUM (tdep))
1198 {
1199 /* The opcode occupies only 11 bits. Make sure we
1200 don't touch the other bits. */
1201 buf[1] &= ((1 << 3) - 1);
1202 buf[1] |= ((FXSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
1203 }
1204 else if (i == I387_FTAG_REGNUM (tdep))
1205 {
1206 /* Converting back is much easier. */
1207
1208 unsigned short ftag;
1209 int fpreg;
1210
1211 ftag = (buf[1] << 8) | buf[0];
1212 buf[0] = 0;
1213 buf[1] = 0;
1214
1215 for (fpreg = 7; fpreg >= 0; fpreg--)
1216 {
1217 int tag = (ftag >> (fpreg * 2)) & 3;
1218
1219 if (tag != 3)
1220 buf[0] |= (1 << fpreg);
1221 }
1222 }
1223 memcpy (FXSAVE_ADDR (tdep, regs, i), buf, 2);
1224 }
1225 else
1226 regcache_raw_collect (regcache, i, FXSAVE_ADDR (tdep, regs, i));
1227 }
1228
1229 if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
1230 regcache_raw_collect (regcache, I387_MXCSR_REGNUM (tdep),
1231 FXSAVE_MXCSR_ADDR (regs));
1232 }
1233
1234 /* Recreate the FTW (tag word) valid bits from the 80-bit FP data in
1235 *RAW. */
1236
1237 static int
1238 i387_tag (const gdb_byte *raw)
1239 {
1240 int integer;
1241 unsigned int exponent;
1242 unsigned long fraction[2];
1243
1244 integer = raw[7] & 0x80;
1245 exponent = (((raw[9] & 0x7f) << 8) | raw[8]);
1246 fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]);
1247 fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16)
1248 | (raw[5] << 8) | raw[4]);
1249
1250 if (exponent == 0x7fff)
1251 {
1252 /* Special. */
1253 return (2);
1254 }
1255 else if (exponent == 0x0000)
1256 {
1257 if (fraction[0] == 0x0000 && fraction[1] == 0x0000 && !integer)
1258 {
1259 /* Zero. */
1260 return (1);
1261 }
1262 else
1263 {
1264 /* Special. */
1265 return (2);
1266 }
1267 }
1268 else
1269 {
1270 if (integer)
1271 {
1272 /* Valid. */
1273 return (0);
1274 }
1275 else
1276 {
1277 /* Special. */
1278 return (2);
1279 }
1280 }
1281 }
1282
1283 /* Prepare the FPU stack in REGCACHE for a function return. */
1284
1285 void
1286 i387_return_value (struct gdbarch *gdbarch, struct regcache *regcache)
1287 {
1288 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1289 ULONGEST fstat;
1290
1291 /* Set the top of the floating-point register stack to 7. The
1292 actual value doesn't really matter, but 7 is what a normal
1293 function return would end up with if the program started out with
1294 a freshly initialized FPU. */
1295 regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM (tdep), &fstat);
1296 fstat |= (7 << 11);
1297 regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM (tdep), fstat);
1298
1299 /* Mark %st(1) through %st(7) as empty. Since we set the top of the
1300 floating-point register stack to 7, the appropriate value for the
1301 tag word is 0x3fff. */
1302 regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM (tdep), 0x3fff);
1303
1304 }