1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
4 2009, 2010, 2011 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "arch-utils.h"
25 #include "floatformat.h"
28 #include "reggroups.h"
30 #include "frame-base.h"
31 #include "frame-unwind.h"
34 #include "gdb_assert.h"
36 #include "elf/common.h" /* for DT_PLTGOT value */
41 #include "ia64-tdep.h"
44 #ifdef HAVE_LIBUNWIND_IA64_H
45 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
46 #include "libunwind-frame.h"
47 #include "libunwind-ia64.h"
49 /* Note: KERNEL_START is supposed to be an address which is not going
50 to ever contain any valid unwind info. For ia64 linux, the choice
51 of 0xc000000000000000 is fairly safe since that's uncached space.
53 We use KERNEL_START as follows: after obtaining the kernel's
54 unwind table via getunwind(), we project its unwind data into
55 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
56 when ia64_access_mem() sees a memory access to this
57 address-range, we redirect it to ktab instead.
59 None of this hackery is needed with a modern kernel/libcs
60 which uses the kernel virtual DSO to provide access to the
61 kernel's unwind info. In that case, ktab_size remains 0 and
62 hence the value of KERNEL_START doesn't matter. */
64 #define KERNEL_START 0xc000000000000000ULL
66 static size_t ktab_size
= 0;
67 struct ia64_table_entry
69 uint64_t start_offset
;
74 static struct ia64_table_entry
*ktab
= NULL
;
78 /* An enumeration of the different IA-64 instruction types. */
80 typedef enum instruction_type
82 A
, /* Integer ALU ; I-unit or M-unit */
83 I
, /* Non-ALU integer; I-unit */
84 M
, /* Memory ; M-unit */
85 F
, /* Floating-point ; F-unit */
86 B
, /* Branch ; B-unit */
87 L
, /* Extended (L+X) ; I-unit */
88 X
, /* Extended (L+X) ; I-unit */
89 undefined
/* undefined or reserved */
92 /* We represent IA-64 PC addresses as the value of the instruction
93 pointer or'd with some bit combination in the low nibble which
94 represents the slot number in the bundle addressed by the
95 instruction pointer. The problem is that the Linux kernel
96 multiplies its slot numbers (for exceptions) by one while the
97 disassembler multiplies its slot numbers by 6. In addition, I've
98 heard it said that the simulator uses 1 as the multiplier.
100 I've fixed the disassembler so that the bytes_per_line field will
101 be the slot multiplier. If bytes_per_line comes in as zero, it
102 is set to six (which is how it was set up initially). -- objdump
103 displays pretty disassembly dumps with this value. For our purposes,
104 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
105 never want to also display the raw bytes the way objdump does. */
107 #define SLOT_MULTIPLIER 1
109 /* Length in bytes of an instruction bundle. */
111 #define BUNDLE_LEN 16
113 /* See the saved memory layout comment for ia64_memory_insert_breakpoint. */
115 #if BREAKPOINT_MAX < BUNDLE_LEN - 2
116 # error "BREAKPOINT_MAX < BUNDLE_LEN - 2"
119 static gdbarch_init_ftype ia64_gdbarch_init
;
121 static gdbarch_register_name_ftype ia64_register_name
;
122 static gdbarch_register_type_ftype ia64_register_type
;
123 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
124 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
125 static struct type
*is_float_or_hfa_type (struct type
*t
);
126 static CORE_ADDR
ia64_find_global_pointer (struct gdbarch
*gdbarch
,
129 #define NUM_IA64_RAW_REGS 462
131 static int sp_regnum
= IA64_GR12_REGNUM
;
132 static int fp_regnum
= IA64_VFP_REGNUM
;
133 static int lr_regnum
= IA64_VRAP_REGNUM
;
135 /* NOTE: we treat the register stack registers r32-r127 as
136 pseudo-registers because they may not be accessible via the ptrace
137 register get/set interfaces. */
139 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
,
140 VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
141 V127_REGNUM
= V32_REGNUM
+ 95,
142 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16,
143 VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
145 /* Array of register names; There should be ia64_num_regs strings in
148 static char *ia64_register_names
[] =
149 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
150 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
151 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
152 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
156 "", "", "", "", "", "", "", "",
157 "", "", "", "", "", "", "", "",
158 "", "", "", "", "", "", "", "",
159 "", "", "", "", "", "", "", "",
160 "", "", "", "", "", "", "", "",
161 "", "", "", "", "", "", "", "",
162 "", "", "", "", "", "", "", "",
163 "", "", "", "", "", "", "", "",
164 "", "", "", "", "", "", "", "",
166 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
167 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
168 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
169 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
170 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
171 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
172 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
173 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
174 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
175 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
176 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
177 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
178 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
179 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
180 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
181 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
183 "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "",
188 "", "", "", "", "", "", "", "",
189 "", "", "", "", "", "", "", "",
190 "", "", "", "", "", "", "", "",
192 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
196 "pr", "ip", "psr", "cfm",
198 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
199 "", "", "", "", "", "", "", "",
200 "rsc", "bsp", "bspstore", "rnat",
202 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
203 "ccv", "", "", "", "unat", "", "", "",
204 "fpsr", "", "", "", "itc",
205 "", "", "", "", "", "", "", "", "", "",
206 "", "", "", "", "", "", "", "", "",
208 "", "", "", "", "", "", "", "", "", "",
209 "", "", "", "", "", "", "", "", "", "",
210 "", "", "", "", "", "", "", "", "", "",
211 "", "", "", "", "", "", "", "", "", "",
212 "", "", "", "", "", "", "", "", "", "",
213 "", "", "", "", "", "", "", "", "", "",
215 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
216 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
217 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
218 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
219 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
220 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
221 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
222 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
223 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
224 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
225 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
226 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
227 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
228 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
229 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
230 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
234 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
235 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
236 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
237 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
238 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
239 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
240 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
241 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
242 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
243 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
244 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
245 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
247 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
248 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
249 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
250 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
251 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
252 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
253 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
254 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
257 struct ia64_frame_cache
259 CORE_ADDR base
; /* frame pointer base for frame */
260 CORE_ADDR pc
; /* function start pc for frame */
261 CORE_ADDR saved_sp
; /* stack pointer for frame */
262 CORE_ADDR bsp
; /* points at r32 for the current frame */
263 CORE_ADDR cfm
; /* cfm value for current frame */
264 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
266 int sof
; /* Size of frame (decoded from cfm value). */
267 int sol
; /* Size of locals (decoded from cfm value). */
268 int sor
; /* Number of rotating registers (decoded from
270 CORE_ADDR after_prologue
;
271 /* Address of first instruction after the last
272 prologue instruction; Note that there may
273 be instructions from the function's body
274 intermingled with the prologue. */
275 int mem_stack_frame_size
;
276 /* Size of the memory stack frame (may be zero),
277 or -1 if it has not been determined yet. */
278 int fp_reg
; /* Register number (if any) used a frame pointer
279 for this frame. 0 if no register is being used
280 as the frame pointer. */
282 /* Saved registers. */
283 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
288 floatformat_valid (const struct floatformat
*fmt
, const void *from
)
293 static const struct floatformat floatformat_ia64_ext_little
=
295 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
296 floatformat_intbit_yes
, "floatformat_ia64_ext_little", floatformat_valid
, NULL
299 static const struct floatformat floatformat_ia64_ext_big
=
301 floatformat_big
, 82, 46, 47, 17, 65535, 0x1ffff, 64, 64,
302 floatformat_intbit_yes
, "floatformat_ia64_ext_big", floatformat_valid
305 static const struct floatformat
*floatformats_ia64_ext
[2] =
307 &floatformat_ia64_ext_big
,
308 &floatformat_ia64_ext_little
312 ia64_ext_type (struct gdbarch
*gdbarch
)
314 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
316 if (!tdep
->ia64_ext_type
)
318 = arch_float_type (gdbarch
, 128, "builtin_type_ia64_ext",
319 floatformats_ia64_ext
);
321 return tdep
->ia64_ext_type
;
325 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
326 struct reggroup
*group
)
331 if (group
== all_reggroup
)
333 vector_p
= TYPE_VECTOR (register_type (gdbarch
, regnum
));
334 float_p
= TYPE_CODE (register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
;
335 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
336 if (group
== float_reggroup
)
338 if (group
== vector_reggroup
)
340 if (group
== general_reggroup
)
341 return (!vector_p
&& !float_p
);
342 if (group
== save_reggroup
|| group
== restore_reggroup
)
348 ia64_register_name (struct gdbarch
*gdbarch
, int reg
)
350 return ia64_register_names
[reg
];
354 ia64_register_type (struct gdbarch
*arch
, int reg
)
356 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
357 return ia64_ext_type (arch
);
359 return builtin_type (arch
)->builtin_long
;
363 ia64_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
365 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
366 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
371 /* Extract ``len'' bits from an instruction bundle starting at
375 extract_bit_field (const char *bundle
, int from
, int len
)
377 long long result
= 0LL;
379 int from_byte
= from
/ 8;
380 int to_byte
= to
/ 8;
381 unsigned char *b
= (unsigned char *) bundle
;
387 if (from_byte
== to_byte
)
388 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
389 result
= c
>> (from
% 8);
390 lshift
= 8 - (from
% 8);
392 for (i
= from_byte
+1; i
< to_byte
; i
++)
394 result
|= ((long long) b
[i
]) << lshift
;
398 if (from_byte
< to_byte
&& (to
% 8 != 0))
401 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
402 result
|= ((long long) c
) << lshift
;
408 /* Replace the specified bits in an instruction bundle. */
411 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
414 int from_byte
= from
/ 8;
415 int to_byte
= to
/ 8;
416 unsigned char *b
= (unsigned char *) bundle
;
419 if (from_byte
== to_byte
)
421 unsigned char left
, right
;
423 left
= (c
>> (to
% 8)) << (to
% 8);
424 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
425 c
= (unsigned char) (val
& 0xff);
426 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
434 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
435 c
= c
| (val
<< (from
% 8));
437 val
>>= 8 - from
% 8;
439 for (i
= from_byte
+1; i
< to_byte
; i
++)
448 unsigned char cv
= (unsigned char) val
;
450 c
= c
>> (to
% 8) << (to
% 8);
451 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
457 /* Return the contents of slot N (for N = 0, 1, or 2) in
458 and instruction bundle. */
461 slotN_contents (char *bundle
, int slotnum
)
463 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
466 /* Store an instruction in an instruction bundle. */
469 replace_slotN_contents (char *bundle
, long long instr
, int slotnum
)
471 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
474 static const enum instruction_type template_encoding_table
[32][3] =
476 { M
, I
, I
}, /* 00 */
477 { M
, I
, I
}, /* 01 */
478 { M
, I
, I
}, /* 02 */
479 { M
, I
, I
}, /* 03 */
480 { M
, L
, X
}, /* 04 */
481 { M
, L
, X
}, /* 05 */
482 { undefined
, undefined
, undefined
}, /* 06 */
483 { undefined
, undefined
, undefined
}, /* 07 */
484 { M
, M
, I
}, /* 08 */
485 { M
, M
, I
}, /* 09 */
486 { M
, M
, I
}, /* 0A */
487 { M
, M
, I
}, /* 0B */
488 { M
, F
, I
}, /* 0C */
489 { M
, F
, I
}, /* 0D */
490 { M
, M
, F
}, /* 0E */
491 { M
, M
, F
}, /* 0F */
492 { M
, I
, B
}, /* 10 */
493 { M
, I
, B
}, /* 11 */
494 { M
, B
, B
}, /* 12 */
495 { M
, B
, B
}, /* 13 */
496 { undefined
, undefined
, undefined
}, /* 14 */
497 { undefined
, undefined
, undefined
}, /* 15 */
498 { B
, B
, B
}, /* 16 */
499 { B
, B
, B
}, /* 17 */
500 { M
, M
, B
}, /* 18 */
501 { M
, M
, B
}, /* 19 */
502 { undefined
, undefined
, undefined
}, /* 1A */
503 { undefined
, undefined
, undefined
}, /* 1B */
504 { M
, F
, B
}, /* 1C */
505 { M
, F
, B
}, /* 1D */
506 { undefined
, undefined
, undefined
}, /* 1E */
507 { undefined
, undefined
, undefined
}, /* 1F */
510 /* Fetch and (partially) decode an instruction at ADDR and return the
511 address of the next instruction to fetch. */
514 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
516 char bundle
[BUNDLE_LEN
];
517 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
521 /* Warn about slot numbers greater than 2. We used to generate
522 an error here on the assumption that the user entered an invalid
523 address. But, sometimes GDB itself requests an invalid address.
524 This can (easily) happen when execution stops in a function for
525 which there are no symbols. The prologue scanner will attempt to
526 find the beginning of the function - if the nearest symbol
527 happens to not be aligned on a bundle boundary (16 bytes), the
528 resulting starting address will cause GDB to think that the slot
531 So we warn about it and set the slot number to zero. It is
532 not necessarily a fatal condition, particularly if debugging
533 at the assembly language level. */
536 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
537 "Using slot 0 instead"));
543 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
548 *instr
= slotN_contents (bundle
, slotnum
);
549 template = extract_bit_field (bundle
, 0, 5);
550 *it
= template_encoding_table
[(int)template][slotnum
];
552 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
555 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
560 /* There are 5 different break instructions (break.i, break.b,
561 break.m, break.f, and break.x), but they all have the same
562 encoding. (The five bit template in the low five bits of the
563 instruction bundle distinguishes one from another.)
565 The runtime architecture manual specifies that break instructions
566 used for debugging purposes must have the upper two bits of the 21
567 bit immediate set to a 0 and a 1 respectively. A breakpoint
568 instruction encodes the most significant bit of its 21 bit
569 immediate at bit 36 of the 41 bit instruction. The penultimate msb
570 is at bit 25 which leads to the pattern below.
572 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
573 it turns out that 0x80000 was used as the syscall break in the early
574 simulators. So I changed the pattern slightly to do "break.i 0x080001"
575 instead. But that didn't work either (I later found out that this
576 pattern was used by the simulator that I was using.) So I ended up
577 using the pattern seen below.
579 SHADOW_CONTENTS has byte-based addressing (PLACED_ADDRESS and SHADOW_LEN)
580 while we need bit-based addressing as the instructions length is 41 bits and
581 we must not modify/corrupt the adjacent slots in the same bundle.
582 Fortunately we may store larger memory incl. the adjacent bits with the
583 original memory content (not the possibly already stored breakpoints there).
584 We need to be careful in ia64_memory_remove_breakpoint to always restore
585 only the specific bits of this instruction ignoring any adjacent stored
588 We use the original addressing with the low nibble in the range <0..2> which
589 gets incorrectly interpreted by generic non-ia64 breakpoint_restore_shadows
590 as the direct byte offset of SHADOW_CONTENTS. We store whole BUNDLE_LEN
591 bytes just without these two possibly skipped bytes to not to exceed to the
594 If we would like to store the whole bundle to SHADOW_CONTENTS we would have
595 to store already the base address (`address & ~0x0f') into PLACED_ADDRESS.
596 In such case there is no other place where to store
597 SLOTNUM (`adress & 0x0f', value in the range <0..2>). We need to know
598 SLOTNUM in ia64_memory_remove_breakpoint.
600 There is one special case where we need to be extra careful:
601 L-X instructions, which are instructions that occupy 2 slots
602 (The L part is always in slot 1, and the X part is always in
603 slot 2). We must refuse to insert breakpoints for an address
604 that points at slot 2 of a bundle where an L-X instruction is
605 present, since there is logically no instruction at that address.
606 However, to make things more interesting, the opcode of L-X
607 instructions is located in slot 2. This means that, to insert
608 a breakpoint at an address that points to slot 1, we actually
609 need to write the breakpoint in slot 2! Slot 1 is actually
610 the extended operand, so writing the breakpoint there would not
611 have the desired effect. Another side-effect of this issue
612 is that we need to make sure that the shadow contents buffer
613 does save byte 15 of our instruction bundle (this is the tail
614 end of slot 2, which wouldn't be saved if we were to insert
615 the breakpoint in slot 1).
617 ia64 16-byte bundle layout:
618 | 5 bits | slot 0 with 41 bits | slot 1 with 41 bits | slot 2 with 41 bits |
620 The current addressing used by the code below:
621 original PC placed_address placed_size required covered
622 == bp_tgt->shadow_len reqd \subset covered
623 0xABCDE0 0xABCDE0 0x10 <0x0...0x5> <0x0..0xF>
624 0xABCDE1 0xABCDE1 0xF <0x5...0xA> <0x1..0xF>
625 0xABCDE2 0xABCDE2 0xE <0xA...0xF> <0x2..0xF>
627 L-X instructions are treated a little specially, as explained above:
628 0xABCDE1 0xABCDE1 0xF <0xA...0xF> <0x1..0xF>
630 `objdump -d' and some other tools show a bit unjustified offsets:
631 original PC byte where starts the instruction objdump offset
632 0xABCDE0 0xABCDE0 0xABCDE0
633 0xABCDE1 0xABCDE5 0xABCDE6
634 0xABCDE2 0xABCDEA 0xABCDEC
637 #define IA64_BREAKPOINT 0x00003333300LL
640 ia64_memory_insert_breakpoint (struct gdbarch
*gdbarch
,
641 struct bp_target_info
*bp_tgt
)
643 CORE_ADDR addr
= bp_tgt
->placed_address
;
644 gdb_byte bundle
[BUNDLE_LEN
];
645 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
646 long long instr_breakpoint
;
649 struct cleanup
*cleanup
;
652 error (_("Can't insert breakpoint for slot numbers greater than 2."));
656 /* Enable the automatic memory restoration from breakpoints while
657 we read our instruction bundle for the purpose of SHADOW_CONTENTS.
658 Otherwise, we could possibly store into the shadow parts of the adjacent
659 placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
660 breakpoint instruction bits region. */
661 cleanup
= make_show_memory_breakpoints_cleanup (0);
662 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
665 do_cleanups (cleanup
);
669 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
670 for addressing the SHADOW_CONTENTS placement. */
671 shadow_slotnum
= slotnum
;
673 /* Always cover the last byte of the bundle in case we are inserting
674 a breakpoint on an L-X instruction. */
675 bp_tgt
->shadow_len
= BUNDLE_LEN
- shadow_slotnum
;
677 template = extract_bit_field (bundle
, 0, 5);
678 if (template_encoding_table
[template][slotnum
] == X
)
680 /* X unit types can only be used in slot 2, and are actually
681 part of a 2-slot L-X instruction. We cannot break at this
682 address, as this is the second half of an instruction that
683 lives in slot 1 of that bundle. */
684 gdb_assert (slotnum
== 2);
685 error (_("Can't insert breakpoint for non-existing slot X"));
687 if (template_encoding_table
[template][slotnum
] == L
)
689 /* L unit types can only be used in slot 1. But the associated
690 opcode for that instruction is in slot 2, so bump the slot number
692 gdb_assert (slotnum
== 1);
696 /* Store the whole bundle, except for the initial skipped bytes by the slot
697 number interpreted as bytes offset in PLACED_ADDRESS. */
698 memcpy (bp_tgt
->shadow_contents
, bundle
+ shadow_slotnum
,
701 /* Re-read the same bundle as above except that, this time, read it in order
702 to compute the new bundle inside which we will be inserting the
703 breakpoint. Therefore, disable the automatic memory restoration from
704 breakpoints while we read our instruction bundle. Otherwise, the general
705 restoration mechanism kicks in and we would possibly remove parts of the
706 adjacent placed breakpoints. It is due to our SHADOW_CONTENTS overlapping
707 the real breakpoint instruction bits region. */
708 make_show_memory_breakpoints_cleanup (1);
709 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
712 do_cleanups (cleanup
);
716 /* Breakpoints already present in the code will get deteacted and not get
717 reinserted by bp_loc_is_permanent. Multiple breakpoints at the same
718 location cannot induce the internal error as they are optimized into
719 a single instance by update_global_location_list. */
720 instr_breakpoint
= slotN_contents (bundle
, slotnum
);
721 if (instr_breakpoint
== IA64_BREAKPOINT
)
722 internal_error (__FILE__
, __LINE__
,
723 _("Address %s already contains a breakpoint."),
724 paddress (gdbarch
, bp_tgt
->placed_address
));
725 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
727 bp_tgt
->placed_size
= bp_tgt
->shadow_len
;
729 val
= target_write_memory (addr
+ shadow_slotnum
, bundle
+ shadow_slotnum
,
732 do_cleanups (cleanup
);
737 ia64_memory_remove_breakpoint (struct gdbarch
*gdbarch
,
738 struct bp_target_info
*bp_tgt
)
740 CORE_ADDR addr
= bp_tgt
->placed_address
;
741 gdb_byte bundle_mem
[BUNDLE_LEN
], bundle_saved
[BUNDLE_LEN
];
742 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
743 long long instr_breakpoint
, instr_saved
;
746 struct cleanup
*cleanup
;
750 /* Disable the automatic memory restoration from breakpoints while
751 we read our instruction bundle. Otherwise, the general restoration
752 mechanism kicks in and we would possibly remove parts of the adjacent
753 placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
754 breakpoint instruction bits region. */
755 cleanup
= make_show_memory_breakpoints_cleanup (1);
756 val
= target_read_memory (addr
, bundle_mem
, BUNDLE_LEN
);
759 do_cleanups (cleanup
);
763 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
764 for addressing the SHADOW_CONTENTS placement. */
765 shadow_slotnum
= slotnum
;
767 template = extract_bit_field (bundle_mem
, 0, 5);
768 if (template_encoding_table
[template][slotnum
] == X
)
770 /* X unit types can only be used in slot 2, and are actually
771 part of a 2-slot L-X instruction. We refuse to insert
772 breakpoints at this address, so there should be no reason
773 for us attempting to remove one there, except if the program's
774 code somehow got modified in memory. */
775 gdb_assert (slotnum
== 2);
776 warning (_("Cannot remove breakpoint at address %s from non-existing "
777 "X-type slot, memory has changed underneath"),
778 paddress (gdbarch
, bp_tgt
->placed_address
));
779 do_cleanups (cleanup
);
782 if (template_encoding_table
[template][slotnum
] == L
)
784 /* L unit types can only be used in slot 1. But the breakpoint
785 was actually saved using slot 2, so update the slot number
787 gdb_assert (slotnum
== 1);
791 gdb_assert (bp_tgt
->placed_size
== BUNDLE_LEN
- shadow_slotnum
);
792 gdb_assert (bp_tgt
->placed_size
== bp_tgt
->shadow_len
);
794 instr_breakpoint
= slotN_contents (bundle_mem
, slotnum
);
795 if (instr_breakpoint
!= IA64_BREAKPOINT
)
797 warning (_("Cannot remove breakpoint at address %s, "
798 "no break instruction at such address."),
799 paddress (gdbarch
, bp_tgt
->placed_address
));
800 do_cleanups (cleanup
);
804 /* Extract the original saved instruction from SLOTNUM normalizing its
805 bit-shift for INSTR_SAVED. */
806 memcpy (bundle_saved
, bundle_mem
, BUNDLE_LEN
);
807 memcpy (bundle_saved
+ shadow_slotnum
, bp_tgt
->shadow_contents
,
809 instr_saved
= slotN_contents (bundle_saved
, slotnum
);
811 /* In BUNDLE_MEM, be careful to modify only the bits belonging to SLOTNUM
812 and not any of the other ones that are stored in SHADOW_CONTENTS. */
813 replace_slotN_contents (bundle_mem
, instr_saved
, slotnum
);
814 val
= target_write_memory (addr
, bundle_mem
, BUNDLE_LEN
);
816 do_cleanups (cleanup
);
820 /* As gdbarch_breakpoint_from_pc ranges have byte granularity and ia64
821 instruction slots ranges are bit-granular (41 bits) we have to provide an
822 extended range as described for ia64_memory_insert_breakpoint. We also take
823 care of preserving the `break' instruction 21-bit (or 62-bit) parameter to
824 make a match for permanent breakpoints. */
826 static const gdb_byte
*
827 ia64_breakpoint_from_pc (struct gdbarch
*gdbarch
,
828 CORE_ADDR
*pcptr
, int *lenptr
)
830 CORE_ADDR addr
= *pcptr
;
831 static gdb_byte bundle
[BUNDLE_LEN
];
832 int slotnum
= (int) (*pcptr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
833 long long instr_fetched
;
836 struct cleanup
*cleanup
;
839 error (_("Can't insert breakpoint for slot numbers greater than 2."));
843 /* Enable the automatic memory restoration from breakpoints while
844 we read our instruction bundle to match bp_loc_is_permanent. */
845 cleanup
= make_show_memory_breakpoints_cleanup (0);
846 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
847 do_cleanups (cleanup
);
849 /* The memory might be unreachable. This can happen, for instance,
850 when the user inserts a breakpoint at an invalid address. */
854 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
855 for addressing the SHADOW_CONTENTS placement. */
856 shadow_slotnum
= slotnum
;
858 /* Cover always the last byte of the bundle for the L-X slot case. */
859 *lenptr
= BUNDLE_LEN
- shadow_slotnum
;
861 /* Check for L type instruction in slot 1, if present then bump up the slot
862 number to the slot 2. */
863 template = extract_bit_field (bundle
, 0, 5);
864 if (template_encoding_table
[template][slotnum
] == X
)
866 gdb_assert (slotnum
== 2);
867 error (_("Can't insert breakpoint for non-existing slot X"));
869 if (template_encoding_table
[template][slotnum
] == L
)
871 gdb_assert (slotnum
== 1);
875 /* A break instruction has its all its opcode bits cleared except for
876 the parameter value. For L+X slot pair we are at the X slot (slot 2) so
877 we should not touch the L slot - the upper 41 bits of the parameter. */
878 instr_fetched
= slotN_contents (bundle
, slotnum
);
879 instr_fetched
&= 0x1003ffffc0LL
;
880 replace_slotN_contents (bundle
, instr_fetched
, slotnum
);
882 return bundle
+ shadow_slotnum
;
886 ia64_read_pc (struct regcache
*regcache
)
888 ULONGEST psr_value
, pc_value
;
891 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
892 regcache_cooked_read_unsigned (regcache
, IA64_IP_REGNUM
, &pc_value
);
893 slot_num
= (psr_value
>> 41) & 3;
895 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
899 ia64_write_pc (struct regcache
*regcache
, CORE_ADDR new_pc
)
901 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
904 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
905 psr_value
&= ~(3LL << 41);
906 psr_value
|= (ULONGEST
)(slot_num
& 0x3) << 41;
910 regcache_cooked_write_unsigned (regcache
, IA64_PSR_REGNUM
, psr_value
);
911 regcache_cooked_write_unsigned (regcache
, IA64_IP_REGNUM
, new_pc
);
914 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
916 /* Returns the address of the slot that's NSLOTS slots away from
917 the address ADDR. NSLOTS may be positive or negative. */
919 rse_address_add(CORE_ADDR addr
, int nslots
)
922 int mandatory_nat_slots
= nslots
/ 63;
923 int direction
= nslots
< 0 ? -1 : 1;
925 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
927 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
928 new_addr
+= 8 * direction
;
930 if (IS_NaT_COLLECTION_ADDR(new_addr
))
931 new_addr
+= 8 * direction
;
936 static enum register_status
937 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
938 int regnum
, gdb_byte
*buf
)
940 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
941 enum register_status status
;
943 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
945 #ifdef HAVE_LIBUNWIND_IA64_H
946 /* First try and use the libunwind special reg accessor,
947 otherwise fallback to standard logic. */
948 if (!libunwind_is_initialized ()
949 || libunwind_get_reg_special (gdbarch
, regcache
, regnum
, buf
) != 0)
952 /* The fallback position is to assume that r32-r127 are
953 found sequentially in memory starting at $bof. This
954 isn't always true, but without libunwind, this is the
956 enum register_status status
;
961 status
= regcache_cooked_read_unsigned (regcache
,
962 IA64_BSP_REGNUM
, &bsp
);
963 if (status
!= REG_VALID
)
966 status
= regcache_cooked_read_unsigned (regcache
,
967 IA64_CFM_REGNUM
, &cfm
);
968 if (status
!= REG_VALID
)
971 /* The bsp points at the end of the register frame so we
972 subtract the size of frame from it to get start of
974 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
976 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
978 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
979 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8, byte_order
);
980 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
984 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
988 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
992 status
= regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
993 if (status
!= REG_VALID
)
995 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
996 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
997 byte_order
, unatN_val
);
999 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1001 ULONGEST natN_val
= 0;
1004 CORE_ADDR gr_addr
= 0;
1005 status
= regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1006 if (status
!= REG_VALID
)
1008 status
= regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1009 if (status
!= REG_VALID
)
1012 /* The bsp points at the end of the register frame so we
1013 subtract the size of frame from it to get start of register frame. */
1014 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1016 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
1017 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
1021 /* Compute address of nat collection bits. */
1022 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1023 CORE_ADDR nat_collection
;
1025 /* If our nat collection address is bigger than bsp, we have to get
1026 the nat collection from rnat. Otherwise, we fetch the nat
1027 collection from the computed address. */
1028 if (nat_addr
>= bsp
)
1029 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
,
1032 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
1033 nat_bit
= (gr_addr
>> 3) & 0x3f;
1034 natN_val
= (nat_collection
>> nat_bit
) & 1;
1037 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1038 byte_order
, natN_val
);
1040 else if (regnum
== VBOF_REGNUM
)
1042 /* A virtual register frame start is provided for user convenience.
1043 It can be calculated as the bsp - sof (sizeof frame). */
1047 status
= regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1048 if (status
!= REG_VALID
)
1050 status
= regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1051 if (status
!= REG_VALID
)
1054 /* The bsp points at the end of the register frame so we
1055 subtract the size of frame from it to get beginning of frame. */
1056 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1057 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1060 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1066 status
= regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
1067 if (status
!= REG_VALID
)
1069 status
= regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1070 if (status
!= REG_VALID
)
1073 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1075 /* Fetch predicate register rename base from current frame
1076 marker for this frame. */
1077 int rrb_pr
= (cfm
>> 32) & 0x3f;
1079 /* Adjust the register number to account for register rotation. */
1080 regnum
= VP16_REGNUM
1081 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1083 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
1084 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1085 byte_order
, prN_val
);
1088 memset (buf
, 0, register_size (gdbarch
, regnum
));
1094 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1095 int regnum
, const gdb_byte
*buf
)
1097 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1099 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
1104 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1105 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1107 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1109 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
1111 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
1112 write_memory (reg_addr
, (void *) buf
, 8);
1115 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1117 ULONGEST unatN_val
, unat
, unatN_mask
;
1118 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
1119 unatN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
,
1122 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
1124 unat
&= ~unatN_mask
;
1125 else if (unatN_val
== 1)
1127 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
1129 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1134 CORE_ADDR gr_addr
= 0;
1135 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1136 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1138 /* The bsp points at the end of the register frame so we
1139 subtract the size of frame from it to get start of register frame. */
1140 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1142 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
1143 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
1145 natN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
,
1149 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
1151 /* Compute address of nat collection bits. */
1152 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1153 CORE_ADDR nat_collection
;
1154 int natN_bit
= (gr_addr
>> 3) & 0x3f;
1155 ULONGEST natN_mask
= (1LL << natN_bit
);
1156 /* If our nat collection address is bigger than bsp, we have to get
1157 the nat collection from rnat. Otherwise, we fetch the nat
1158 collection from the computed address. */
1159 if (nat_addr
>= bsp
)
1161 regcache_cooked_read_unsigned (regcache
,
1165 nat_collection
|= natN_mask
;
1167 nat_collection
&= ~natN_mask
;
1168 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
,
1174 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
1176 nat_collection
|= natN_mask
;
1178 nat_collection
&= ~natN_mask
;
1179 store_unsigned_integer (nat_buf
, register_size (gdbarch
, regnum
),
1180 byte_order
, nat_collection
);
1181 write_memory (nat_addr
, nat_buf
, 8);
1185 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1192 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
1193 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1195 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1197 /* Fetch predicate register rename base from current frame
1198 marker for this frame. */
1199 int rrb_pr
= (cfm
>> 32) & 0x3f;
1201 /* Adjust the register number to account for register rotation. */
1202 regnum
= VP16_REGNUM
1203 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1205 prN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1207 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
1210 else if (prN_val
== 1)
1212 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
1216 /* The ia64 needs to convert between various ieee floating-point formats
1217 and the special ia64 floating point register format. */
1220 ia64_convert_register_p (struct gdbarch
*gdbarch
, int regno
, struct type
*type
)
1222 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
1223 && type
!= ia64_ext_type (gdbarch
));
1227 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
1228 struct type
*valtype
, gdb_byte
*out
,
1229 int *optimizedp
, int *unavailablep
)
1231 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1232 char in
[MAX_REGISTER_SIZE
];
1234 /* Convert to TYPE. */
1235 if (!get_frame_register_bytes (frame
, regnum
, 0,
1236 register_size (gdbarch
, regnum
),
1237 in
, optimizedp
, unavailablep
))
1240 convert_typed_floating (in
, ia64_ext_type (gdbarch
), out
, valtype
);
1241 *optimizedp
= *unavailablep
= 0;
1246 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
1247 struct type
*valtype
, const gdb_byte
*in
)
1249 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1250 char out
[MAX_REGISTER_SIZE
];
1251 convert_typed_floating (in
, valtype
, out
, ia64_ext_type (gdbarch
));
1252 put_frame_register (frame
, regnum
, out
);
1256 /* Limit the number of skipped non-prologue instructions since examining
1257 of the prologue is expensive. */
1258 static int max_skip_non_prologue_insns
= 40;
1260 /* Given PC representing the starting address of a function, and
1261 LIM_PC which is the (sloppy) limit to which to scan when looking
1262 for a prologue, attempt to further refine this limit by using
1263 the line data in the symbol table. If successful, a better guess
1264 on where the prologue ends is returned, otherwise the previous
1265 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
1266 which will be set to indicate whether the returned limit may be
1267 used with no further scanning in the event that the function is
1270 /* FIXME: cagney/2004-02-14: This function and logic have largely been
1271 superseded by skip_prologue_using_sal. */
1274 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
1276 struct symtab_and_line prologue_sal
;
1277 CORE_ADDR start_pc
= pc
;
1280 /* The prologue can not possibly go past the function end itself,
1281 so we can already adjust LIM_PC accordingly. */
1282 if (find_pc_partial_function (pc
, NULL
, NULL
, &end_pc
) && end_pc
< lim_pc
)
1285 /* Start off not trusting the limit. */
1288 prologue_sal
= find_pc_line (pc
, 0);
1289 if (prologue_sal
.line
!= 0)
1292 CORE_ADDR addr
= prologue_sal
.end
;
1294 /* Handle the case in which compiler's optimizer/scheduler
1295 has moved instructions into the prologue. We scan ahead
1296 in the function looking for address ranges whose corresponding
1297 line number is less than or equal to the first one that we
1298 found for the function. (It can be less than when the
1299 scheduler puts a body instruction before the first prologue
1301 for (i
= 2 * max_skip_non_prologue_insns
;
1302 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
1305 struct symtab_and_line sal
;
1307 sal
= find_pc_line (addr
, 0);
1310 if (sal
.line
<= prologue_sal
.line
1311 && sal
.symtab
== prologue_sal
.symtab
)
1318 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
1320 lim_pc
= prologue_sal
.end
;
1321 if (start_pc
== get_pc_function_start (lim_pc
))
1328 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1329 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1330 || (14 <= (_regnum_) && (_regnum_) <= 31))
1331 #define imm9(_instr_) \
1332 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1333 | (((_instr_) & 0x00008000000LL) >> 20) \
1334 | (((_instr_) & 0x00000001fc0LL) >> 6))
1336 /* Allocate and initialize a frame cache. */
1338 static struct ia64_frame_cache
*
1339 ia64_alloc_frame_cache (void)
1341 struct ia64_frame_cache
*cache
;
1344 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1350 cache
->prev_cfm
= 0;
1356 cache
->frameless
= 1;
1358 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1359 cache
->saved_regs
[i
] = 0;
1365 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
,
1366 struct frame_info
*this_frame
,
1367 struct ia64_frame_cache
*cache
)
1370 CORE_ADDR last_prologue_pc
= pc
;
1371 instruction_type it
;
1376 int unat_save_reg
= 0;
1377 int pr_save_reg
= 0;
1378 int mem_stack_frame_size
= 0;
1380 CORE_ADDR spill_addr
= 0;
1383 char reg_contents
[256];
1389 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1391 memset (instores
, 0, sizeof instores
);
1392 memset (infpstores
, 0, sizeof infpstores
);
1393 memset (reg_contents
, 0, sizeof reg_contents
);
1395 if (cache
->after_prologue
!= 0
1396 && cache
->after_prologue
<= lim_pc
)
1397 return cache
->after_prologue
;
1399 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1400 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1402 /* We want to check if we have a recognizable function start before we
1403 look ahead for a prologue. */
1404 if (pc
< lim_pc
&& next_pc
1405 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1407 /* alloc - start of a regular function. */
1408 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
1409 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1410 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1411 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1413 /* Verify that the current cfm matches what we think is the
1414 function start. If we have somehow jumped within a function,
1415 we do not want to interpret the prologue and calculate the
1416 addresses of various registers such as the return address.
1417 We will instead treat the frame as frameless. */
1419 (sof
== (cache
->cfm
& 0x7f) &&
1420 sol
== ((cache
->cfm
>> 7) & 0x7f)))
1424 last_prologue_pc
= next_pc
;
1429 /* Look for a leaf routine. */
1430 if (pc
< lim_pc
&& next_pc
1431 && (it
== I
|| it
== M
)
1432 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1434 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1435 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1436 | ((instr
& 0x001f8000000LL
) >> 20)
1437 | ((instr
& 0x000000fe000LL
) >> 13));
1438 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1439 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1440 int qp
= (int) (instr
& 0x0000000003fLL
);
1441 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1443 /* mov r2, r12 - beginning of leaf routine. */
1445 last_prologue_pc
= next_pc
;
1449 /* If we don't recognize a regular function or leaf routine, we are
1455 last_prologue_pc
= lim_pc
;
1459 /* Loop, looking for prologue instructions, keeping track of
1460 where preserved registers were spilled. */
1463 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1467 if (it
== B
&& ((instr
& 0x1e1f800003fLL
) != 0x04000000000LL
))
1469 /* Exit loop upon hitting a non-nop branch instruction. */
1474 else if (((instr
& 0x3fLL
) != 0LL) &&
1475 (frameless
|| ret_reg
!= 0))
1477 /* Exit loop upon hitting a predicated instruction if
1478 we already have the return register or if we are frameless. */
1483 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1486 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1487 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1488 int qp
= (int) (instr
& 0x0000000003f);
1490 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1493 last_prologue_pc
= next_pc
;
1496 else if ((it
== I
|| it
== M
)
1497 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1499 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1500 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1501 | ((instr
& 0x001f8000000LL
) >> 20)
1502 | ((instr
& 0x000000fe000LL
) >> 13));
1503 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1504 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1505 int qp
= (int) (instr
& 0x0000000003fLL
);
1507 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1511 last_prologue_pc
= next_pc
;
1513 else if (qp
== 0 && rN
== 12 && rM
== 12)
1515 /* adds r12, -mem_stack_frame_size, r12 */
1516 mem_stack_frame_size
-= imm
;
1517 last_prologue_pc
= next_pc
;
1519 else if (qp
== 0 && rN
== 2
1520 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1522 char buf
[MAX_REGISTER_SIZE
];
1523 CORE_ADDR saved_sp
= 0;
1524 /* adds r2, spilloffset, rFramePointer
1526 adds r2, spilloffset, r12
1528 Get ready for stf.spill or st8.spill instructions.
1529 The address to start spilling at is loaded into r2.
1530 FIXME: Why r2? That's what gcc currently uses; it
1531 could well be different for other compilers. */
1533 /* Hmm... whether or not this will work will depend on
1534 where the pc is. If it's still early in the prologue
1535 this'll be wrong. FIXME */
1538 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1539 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1540 get_frame_register (this_frame
, sp_regnum
, buf
);
1541 saved_sp
= extract_unsigned_integer (buf
, 8, byte_order
);
1543 spill_addr
= saved_sp
1544 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1547 last_prologue_pc
= next_pc
;
1549 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
-32] &&
1550 rN
< 256 && imm
== 0)
1552 /* mov rN, rM where rM is an input register. */
1553 reg_contents
[rN
] = rM
;
1554 last_prologue_pc
= next_pc
;
1556 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1560 last_prologue_pc
= next_pc
;
1565 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1566 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1568 /* stf.spill [rN] = fM, imm9
1570 stf.spill [rN] = fM */
1572 int imm
= imm9(instr
);
1573 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1574 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1575 int qp
= (int) (instr
& 0x0000000003fLL
);
1576 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1577 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1579 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1581 if ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1584 spill_addr
= 0; /* last one; must be done. */
1585 last_prologue_pc
= next_pc
;
1588 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1589 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1595 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1596 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1597 int qp
= (int) (instr
& 0x0000000003fLL
);
1598 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1600 /* We have something like "mov.m r3 = ar.unat". Remember the
1601 r3 (or whatever) and watch for a store of this register... */
1603 last_prologue_pc
= next_pc
;
1606 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1609 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1610 int qp
= (int) (instr
& 0x0000000003fLL
);
1611 if (qp
== 0 && isScratch (rN
))
1614 last_prologue_pc
= next_pc
;
1618 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1619 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1623 st8 [rN] = rM, imm9 */
1624 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1625 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1626 int qp
= (int) (instr
& 0x0000000003fLL
);
1627 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1628 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1629 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1631 /* We've found a spill of either the UNAT register or the PR
1632 register. (Well, not exactly; what we've actually found is
1633 a spill of the register that UNAT or PR was moved to).
1634 Record that fact and move on... */
1635 if (rM
== unat_save_reg
)
1637 /* Track UNAT register. */
1638 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1643 /* Track PR register. */
1644 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1647 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1648 /* st8 [rN] = rM, imm9 */
1649 spill_addr
+= imm9(instr
);
1651 spill_addr
= 0; /* Must be done spilling. */
1652 last_prologue_pc
= next_pc
;
1654 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1656 /* Allow up to one store of each input register. */
1657 instores
[rM
-32] = 1;
1658 last_prologue_pc
= next_pc
;
1660 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1661 !instores
[indirect
-32])
1663 /* Allow an indirect store of an input register. */
1664 instores
[indirect
-32] = 1;
1665 last_prologue_pc
= next_pc
;
1668 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1675 Note that the st8 case is handled in the clause above.
1677 Advance over stores of input registers. One store per input
1678 register is permitted. */
1679 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1680 int qp
= (int) (instr
& 0x0000000003fLL
);
1681 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1682 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1684 instores
[rM
-32] = 1;
1685 last_prologue_pc
= next_pc
;
1687 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1688 !instores
[indirect
-32])
1690 /* Allow an indirect store of an input register. */
1691 instores
[indirect
-32] = 1;
1692 last_prologue_pc
= next_pc
;
1695 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1702 Advance over stores of floating point input registers. Again
1703 one store per register is permitted. */
1704 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1705 int qp
= (int) (instr
& 0x0000000003fLL
);
1706 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1708 infpstores
[fM
-8] = 1;
1709 last_prologue_pc
= next_pc
;
1713 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1714 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1716 /* st8.spill [rN] = rM
1718 st8.spill [rN] = rM, imm9 */
1719 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1720 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1721 int qp
= (int) (instr
& 0x0000000003fLL
);
1722 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1724 /* We've found a spill of one of the preserved general purpose
1725 regs. Record the spill address and advance the spill
1726 register if appropriate. */
1727 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1728 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1729 /* st8.spill [rN] = rM, imm9 */
1730 spill_addr
+= imm9(instr
);
1732 spill_addr
= 0; /* Done spilling. */
1733 last_prologue_pc
= next_pc
;
1740 /* If not frameless and we aren't called by skip_prologue, then we need
1741 to calculate registers for the previous frame which will be needed
1744 if (!frameless
&& this_frame
)
1746 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1747 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1749 /* Extract the size of the rotating portion of the stack
1750 frame and the register rename base from the current
1756 rrb_gr
= (cfm
>> 18) & 0x7f;
1758 /* Find the bof (beginning of frame). */
1759 bof
= rse_address_add (cache
->bsp
, -sof
);
1761 for (i
= 0, addr
= bof
;
1765 if (IS_NaT_COLLECTION_ADDR (addr
))
1769 if (i
+32 == cfm_reg
)
1770 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1771 if (i
+32 == ret_reg
)
1772 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1774 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1777 /* For the previous argument registers we require the previous bof.
1778 If we can't find the previous cfm, then we can do nothing. */
1780 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1782 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
],
1785 else if (cfm_reg
!= 0)
1787 get_frame_register (this_frame
, cfm_reg
, buf
);
1788 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
1790 cache
->prev_cfm
= cfm
;
1794 sor
= ((cfm
>> 14) & 0xf) * 8;
1796 sol
= (cfm
>> 7) & 0x7f;
1797 rrb_gr
= (cfm
>> 18) & 0x7f;
1799 /* The previous bof only requires subtraction of the sol (size of
1800 locals) due to the overlap between output and input of
1801 subsequent frames. */
1802 bof
= rse_address_add (bof
, -sol
);
1804 for (i
= 0, addr
= bof
;
1808 if (IS_NaT_COLLECTION_ADDR (addr
))
1813 cache
->saved_regs
[IA64_GR32_REGNUM
1814 + ((i
+ (sor
- rrb_gr
)) % sor
)]
1817 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1823 /* Try and trust the lim_pc value whenever possible. */
1824 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1825 last_prologue_pc
= lim_pc
;
1827 cache
->frameless
= frameless
;
1828 cache
->after_prologue
= last_prologue_pc
;
1829 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1830 cache
->fp_reg
= fp_reg
;
1832 return last_prologue_pc
;
1836 ia64_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1838 struct ia64_frame_cache cache
;
1840 cache
.after_prologue
= 0;
1844 /* Call examine_prologue with - as third argument since we don't
1845 have a next frame pointer to send. */
1846 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1850 /* Normal frames. */
1852 static struct ia64_frame_cache
*
1853 ia64_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
1855 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1856 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1857 struct ia64_frame_cache
*cache
;
1859 CORE_ADDR cfm
, sof
, sol
, bsp
, psr
;
1865 cache
= ia64_alloc_frame_cache ();
1866 *this_cache
= cache
;
1868 get_frame_register (this_frame
, sp_regnum
, buf
);
1869 cache
->saved_sp
= extract_unsigned_integer (buf
, 8, byte_order
);
1871 /* We always want the bsp to point to the end of frame.
1872 This way, we can always get the beginning of frame (bof)
1873 by subtracting frame size. */
1874 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
1875 cache
->bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
1877 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
1878 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
1880 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
1881 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
1883 cache
->sof
= (cfm
& 0x7f);
1884 cache
->sol
= (cfm
>> 7) & 0x7f;
1885 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1889 cache
->pc
= get_frame_func (this_frame
);
1892 examine_prologue (cache
->pc
, get_frame_pc (this_frame
), this_frame
, cache
);
1894 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1900 ia64_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
1901 struct frame_id
*this_id
)
1903 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1904 struct ia64_frame_cache
*cache
=
1905 ia64_frame_cache (this_frame
, this_cache
);
1907 /* If outermost frame, mark with null frame id. */
1908 if (cache
->base
!= 0)
1909 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1910 if (gdbarch_debug
>= 1)
1911 fprintf_unfiltered (gdb_stdlog
,
1912 "regular frame id: code %s, stack %s, "
1913 "special %s, this_frame %s\n",
1914 paddress (gdbarch
, this_id
->code_addr
),
1915 paddress (gdbarch
, this_id
->stack_addr
),
1916 paddress (gdbarch
, cache
->bsp
),
1917 host_address_to_string (this_frame
));
1920 static struct value
*
1921 ia64_frame_prev_register (struct frame_info
*this_frame
, void **this_cache
,
1924 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1925 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1926 struct ia64_frame_cache
*cache
= ia64_frame_cache (this_frame
, this_cache
);
1929 gdb_assert (regnum
>= 0);
1931 if (!target_has_registers
)
1932 error (_("No registers."));
1934 if (regnum
== gdbarch_sp_regnum (gdbarch
))
1935 return frame_unwind_got_constant (this_frame
, regnum
, cache
->base
);
1937 else if (regnum
== IA64_BSP_REGNUM
)
1940 CORE_ADDR prev_cfm
, bsp
, prev_bsp
;
1942 /* We want to calculate the previous bsp as the end of the previous
1943 register stack frame. This corresponds to what the hardware bsp
1944 register will be if we pop the frame back which is why we might
1945 have been called. We know the beginning of the current frame is
1946 cache->bsp - cache->sof. This value in the previous frame points
1947 to the start of the output registers. We can calculate the end of
1948 that frame by adding the size of output:
1949 (sof (size of frame) - sol (size of locals)). */
1950 val
= ia64_frame_prev_register (this_frame
, this_cache
, IA64_CFM_REGNUM
);
1951 prev_cfm
= extract_unsigned_integer (value_contents_all (val
),
1953 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1955 rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1957 return frame_unwind_got_constant (this_frame
, regnum
, prev_bsp
);
1960 else if (regnum
== IA64_CFM_REGNUM
)
1962 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1965 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
1967 if (cache
->prev_cfm
)
1968 return frame_unwind_got_constant (this_frame
, regnum
, cache
->prev_cfm
);
1970 if (cache
->frameless
)
1971 return frame_unwind_got_register (this_frame
, IA64_PFS_REGNUM
,
1973 return frame_unwind_got_register (this_frame
, regnum
, 0);
1976 else if (regnum
== IA64_VFP_REGNUM
)
1978 /* If the function in question uses an automatic register (r32-r127)
1979 for the frame pointer, it'll be found by ia64_find_saved_register()
1980 above. If the function lacks one of these frame pointers, we can
1981 still provide a value since we know the size of the frame. */
1982 return frame_unwind_got_constant (this_frame
, regnum
, cache
->base
);
1985 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1987 struct value
*pr_val
;
1990 pr_val
= ia64_frame_prev_register (this_frame
, this_cache
,
1992 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1994 /* Fetch predicate register rename base from current frame
1995 marker for this frame. */
1996 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1998 /* Adjust the register number to account for register rotation. */
1999 regnum
= VP16_REGNUM
+ ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
2001 prN
= extract_bit_field (value_contents_all (pr_val
),
2002 regnum
- VP0_REGNUM
, 1);
2003 return frame_unwind_got_constant (this_frame
, regnum
, prN
);
2006 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
2008 struct value
*unat_val
;
2010 unat_val
= ia64_frame_prev_register (this_frame
, this_cache
,
2012 unatN
= extract_bit_field (value_contents_all (unat_val
),
2013 regnum
- IA64_NAT0_REGNUM
, 1);
2014 return frame_unwind_got_constant (this_frame
, regnum
, unatN
);
2017 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2020 /* Find address of general register corresponding to nat bit we're
2024 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
+ IA64_GR0_REGNUM
];
2028 /* Compute address of nat collection bits. */
2029 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
2031 CORE_ADDR nat_collection
;
2034 /* If our nat collection address is bigger than bsp, we have to get
2035 the nat collection from rnat. Otherwise, we fetch the nat
2036 collection from the computed address. */
2037 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2038 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2039 if (nat_addr
>= bsp
)
2041 get_frame_register (this_frame
, IA64_RNAT_REGNUM
, buf
);
2042 nat_collection
= extract_unsigned_integer (buf
, 8, byte_order
);
2045 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
2046 nat_bit
= (gr_addr
>> 3) & 0x3f;
2047 natval
= (nat_collection
>> nat_bit
) & 1;
2050 return frame_unwind_got_constant (this_frame
, regnum
, natval
);
2053 else if (regnum
== IA64_IP_REGNUM
)
2056 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2060 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
2061 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2063 else if (cache
->frameless
)
2065 get_frame_register (this_frame
, IA64_BR0_REGNUM
, buf
);
2066 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2069 return frame_unwind_got_constant (this_frame
, regnum
, pc
);
2072 else if (regnum
== IA64_PSR_REGNUM
)
2074 /* We don't know how to get the complete previous PSR, but we need it
2075 for the slot information when we unwind the pc (pc is formed of IP
2076 register plus slot information from PSR). To get the previous
2077 slot information, we mask it off the return address. */
2078 ULONGEST slot_num
= 0;
2081 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2083 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
2084 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
2088 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
2089 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2091 else if (cache
->frameless
)
2093 get_frame_register (this_frame
, IA64_BR0_REGNUM
, buf
);
2094 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2096 psr
&= ~(3LL << 41);
2097 slot_num
= pc
& 0x3LL
;
2098 psr
|= (CORE_ADDR
)slot_num
<< 41;
2099 return frame_unwind_got_constant (this_frame
, regnum
, psr
);
2102 else if (regnum
== IA64_BR0_REGNUM
)
2104 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
2107 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2109 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2112 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
)
2113 || (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2117 if (regnum
>= V32_REGNUM
)
2118 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2119 addr
= cache
->saved_regs
[regnum
];
2121 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2123 if (cache
->frameless
)
2125 struct value
*reg_val
;
2126 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
2128 /* FIXME: brobecker/2008-05-01: Doesn't this seem redundant
2129 with the same code above? */
2130 if (regnum
>= V32_REGNUM
)
2131 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2132 reg_val
= ia64_frame_prev_register (this_frame
, this_cache
,
2134 prev_cfm
= extract_unsigned_integer (value_contents_all (reg_val
),
2136 reg_val
= ia64_frame_prev_register (this_frame
, this_cache
,
2138 prev_bsp
= extract_unsigned_integer (value_contents_all (reg_val
),
2140 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
2142 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
2143 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2146 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2149 else /* All other registers. */
2153 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
2155 /* Fetch floating point register rename base from current
2156 frame marker for this frame. */
2157 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
2159 /* Adjust the floating point register number to account for
2160 register rotation. */
2161 regnum
= IA64_FR32_REGNUM
2162 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
2165 /* If we have stored a memory address, access the register. */
2166 addr
= cache
->saved_regs
[regnum
];
2168 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2169 /* Otherwise, punt and get the current value of the register. */
2171 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
2175 static const struct frame_unwind ia64_frame_unwind
=
2178 &ia64_frame_this_id
,
2179 &ia64_frame_prev_register
,
2181 default_frame_sniffer
2184 /* Signal trampolines. */
2187 ia64_sigtramp_frame_init_saved_regs (struct frame_info
*this_frame
,
2188 struct ia64_frame_cache
*cache
)
2190 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2191 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2193 if (tdep
->sigcontext_register_address
)
2197 cache
->saved_regs
[IA64_VRAP_REGNUM
]
2198 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2200 cache
->saved_regs
[IA64_CFM_REGNUM
]
2201 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2203 cache
->saved_regs
[IA64_PSR_REGNUM
]
2204 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2206 cache
->saved_regs
[IA64_BSP_REGNUM
]
2207 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2209 cache
->saved_regs
[IA64_RNAT_REGNUM
]
2210 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2212 cache
->saved_regs
[IA64_CCV_REGNUM
]
2213 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2215 cache
->saved_regs
[IA64_UNAT_REGNUM
]
2216 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2218 cache
->saved_regs
[IA64_FPSR_REGNUM
]
2219 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2221 cache
->saved_regs
[IA64_PFS_REGNUM
]
2222 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2224 cache
->saved_regs
[IA64_LC_REGNUM
]
2225 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2228 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
2229 cache
->saved_regs
[regno
] =
2230 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2231 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
2232 cache
->saved_regs
[regno
] =
2233 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2234 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
2235 cache
->saved_regs
[regno
] =
2236 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2240 static struct ia64_frame_cache
*
2241 ia64_sigtramp_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2243 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2244 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2245 struct ia64_frame_cache
*cache
;
2253 cache
= ia64_alloc_frame_cache ();
2255 get_frame_register (this_frame
, sp_regnum
, buf
);
2256 /* Note that frame size is hard-coded below. We cannot calculate it
2257 via prologue examination. */
2258 cache
->base
= extract_unsigned_integer (buf
, 8, byte_order
) + 16;
2260 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2261 cache
->bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2263 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
2264 cache
->cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
2265 cache
->sof
= cache
->cfm
& 0x7f;
2267 ia64_sigtramp_frame_init_saved_regs (this_frame
, cache
);
2269 *this_cache
= cache
;
2274 ia64_sigtramp_frame_this_id (struct frame_info
*this_frame
,
2275 void **this_cache
, struct frame_id
*this_id
)
2277 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2278 struct ia64_frame_cache
*cache
=
2279 ia64_sigtramp_frame_cache (this_frame
, this_cache
);
2281 (*this_id
) = frame_id_build_special (cache
->base
,
2282 get_frame_pc (this_frame
),
2284 if (gdbarch_debug
>= 1)
2285 fprintf_unfiltered (gdb_stdlog
,
2286 "sigtramp frame id: code %s, stack %s, "
2287 "special %s, this_frame %s\n",
2288 paddress (gdbarch
, this_id
->code_addr
),
2289 paddress (gdbarch
, this_id
->stack_addr
),
2290 paddress (gdbarch
, cache
->bsp
),
2291 host_address_to_string (this_frame
));
2294 static struct value
*
2295 ia64_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
2296 void **this_cache
, int regnum
)
2298 char buf
[MAX_REGISTER_SIZE
];
2300 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2301 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2302 struct ia64_frame_cache
*cache
=
2303 ia64_sigtramp_frame_cache (this_frame
, this_cache
);
2305 gdb_assert (regnum
>= 0);
2307 if (!target_has_registers
)
2308 error (_("No registers."));
2310 if (regnum
== IA64_IP_REGNUM
)
2313 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2317 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
2318 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2321 return frame_unwind_got_constant (this_frame
, regnum
, pc
);
2324 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
)
2325 || (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2329 if (regnum
>= V32_REGNUM
)
2330 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2331 addr
= cache
->saved_regs
[regnum
];
2333 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2335 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2338 else /* All other registers not listed above. */
2340 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2343 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2345 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2350 ia64_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
2351 struct frame_info
*this_frame
,
2354 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
2355 if (tdep
->pc_in_sigtramp
)
2357 CORE_ADDR pc
= get_frame_pc (this_frame
);
2359 if (tdep
->pc_in_sigtramp (pc
))
2366 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2369 ia64_sigtramp_frame_this_id
,
2370 ia64_sigtramp_frame_prev_register
,
2372 ia64_sigtramp_frame_sniffer
2378 ia64_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
2380 struct ia64_frame_cache
*cache
= ia64_frame_cache (this_frame
, this_cache
);
2385 static const struct frame_base ia64_frame_base
=
2388 ia64_frame_base_address
,
2389 ia64_frame_base_address
,
2390 ia64_frame_base_address
2393 #ifdef HAVE_LIBUNWIND_IA64_H
2395 struct ia64_unwind_table_entry
2397 unw_word_t start_offset
;
2398 unw_word_t end_offset
;
2399 unw_word_t info_offset
;
2402 static __inline__
uint64_t
2403 ia64_rse_slot_num (uint64_t addr
)
2405 return (addr
>> 3) & 0x3f;
2408 /* Skip over a designated number of registers in the backing
2409 store, remembering every 64th position is for NAT. */
2410 static __inline__
uint64_t
2411 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2413 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2417 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2420 /* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2421 number to a libunwind register number. */
2423 ia64_gdb2uw_regnum (int regnum
)
2425 if (regnum
== sp_regnum
)
2427 else if (regnum
== IA64_BSP_REGNUM
)
2428 return UNW_IA64_BSP
;
2429 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2430 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2431 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2432 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2433 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2434 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2435 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2437 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2438 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2439 else if (regnum
== IA64_PR_REGNUM
)
2441 else if (regnum
== IA64_IP_REGNUM
)
2443 else if (regnum
== IA64_CFM_REGNUM
)
2444 return UNW_IA64_CFM
;
2445 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2446 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2447 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2448 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2453 /* Gdb libunwind-frame callback function to convert from a libunwind register
2454 number to a ia64 gdb register number. */
2456 ia64_uw2gdb_regnum (int uw_regnum
)
2458 if (uw_regnum
== UNW_IA64_SP
)
2460 else if (uw_regnum
== UNW_IA64_BSP
)
2461 return IA64_BSP_REGNUM
;
2462 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2463 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2464 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2465 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2466 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2467 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2468 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2469 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2470 else if (uw_regnum
== UNW_IA64_PR
)
2471 return IA64_PR_REGNUM
;
2472 else if (uw_regnum
== UNW_REG_IP
)
2473 return IA64_IP_REGNUM
;
2474 else if (uw_regnum
== UNW_IA64_CFM
)
2475 return IA64_CFM_REGNUM
;
2476 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2477 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2478 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2479 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2484 /* Gdb libunwind-frame callback function to reveal if register is a float
2487 ia64_is_fpreg (int uw_regnum
)
2489 return unw_is_fpreg (uw_regnum
);
2492 /* Libunwind callback accessor function for general registers. */
2494 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2495 int write
, void *arg
)
2497 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2498 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2499 struct frame_info
*this_frame
= arg
;
2500 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2501 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2502 long new_sof
, old_sof
;
2503 char buf
[MAX_REGISTER_SIZE
];
2505 /* We never call any libunwind routines that need to write registers. */
2506 gdb_assert (!write
);
2511 /* Libunwind expects to see the pc value which means the slot number
2512 from the psr must be merged with the ip word address. */
2513 get_frame_register (this_frame
, IA64_IP_REGNUM
, buf
);
2514 ip
= extract_unsigned_integer (buf
, 8, byte_order
);
2515 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
2516 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
2517 *val
= ip
| ((psr
>> 41) & 0x3);
2520 case UNW_IA64_AR_BSP
:
2521 /* Libunwind expects to see the beginning of the current
2522 register frame so we must account for the fact that
2523 ptrace() will return a value for bsp that points *after*
2524 the current register frame. */
2525 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2526 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2527 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
2528 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
2529 sof
= gdbarch_tdep (gdbarch
)->size_of_register_frame (this_frame
, cfm
);
2530 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2533 case UNW_IA64_AR_BSPSTORE
:
2534 /* Libunwind wants bspstore to be after the current register frame.
2535 This is what ptrace() and gdb treats as the regular bsp value. */
2536 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2537 *val
= extract_unsigned_integer (buf
, 8, byte_order
);
2541 /* For all other registers, just unwind the value directly. */
2542 get_frame_register (this_frame
, regnum
, buf
);
2543 *val
= extract_unsigned_integer (buf
, 8, byte_order
);
2547 if (gdbarch_debug
>= 1)
2548 fprintf_unfiltered (gdb_stdlog
,
2549 " access_reg: from cache: %4s=%s\n",
2550 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2551 ? ia64_register_names
[regnum
] : "r??"),
2552 paddress (gdbarch
, *val
));
2556 /* Libunwind callback accessor function for floating-point registers. */
2558 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2559 unw_fpreg_t
*val
, int write
, void *arg
)
2561 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2562 struct frame_info
*this_frame
= arg
;
2564 /* We never call any libunwind routines that need to write registers. */
2565 gdb_assert (!write
);
2567 get_frame_register (this_frame
, regnum
, (char *) val
);
2572 /* Libunwind callback accessor function for top-level rse registers. */
2574 ia64_access_rse_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2575 unw_word_t
*val
, int write
, void *arg
)
2577 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2578 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2579 struct regcache
*regcache
= arg
;
2580 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
2581 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2582 long new_sof
, old_sof
;
2583 char buf
[MAX_REGISTER_SIZE
];
2585 /* We never call any libunwind routines that need to write registers. */
2586 gdb_assert (!write
);
2591 /* Libunwind expects to see the pc value which means the slot number
2592 from the psr must be merged with the ip word address. */
2593 regcache_cooked_read (regcache
, IA64_IP_REGNUM
, buf
);
2594 ip
= extract_unsigned_integer (buf
, 8, byte_order
);
2595 regcache_cooked_read (regcache
, IA64_PSR_REGNUM
, buf
);
2596 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
2597 *val
= ip
| ((psr
>> 41) & 0x3);
2600 case UNW_IA64_AR_BSP
:
2601 /* Libunwind expects to see the beginning of the current
2602 register frame so we must account for the fact that
2603 ptrace() will return a value for bsp that points *after*
2604 the current register frame. */
2605 regcache_cooked_read (regcache
, IA64_BSP_REGNUM
, buf
);
2606 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2607 regcache_cooked_read (regcache
, IA64_CFM_REGNUM
, buf
);
2608 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
2610 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2613 case UNW_IA64_AR_BSPSTORE
:
2614 /* Libunwind wants bspstore to be after the current register frame.
2615 This is what ptrace() and gdb treats as the regular bsp value. */
2616 regcache_cooked_read (regcache
, IA64_BSP_REGNUM
, buf
);
2617 *val
= extract_unsigned_integer (buf
, 8, byte_order
);
2621 /* For all other registers, just unwind the value directly. */
2622 regcache_cooked_read (regcache
, regnum
, buf
);
2623 *val
= extract_unsigned_integer (buf
, 8, byte_order
);
2627 if (gdbarch_debug
>= 1)
2628 fprintf_unfiltered (gdb_stdlog
,
2629 " access_rse_reg: from cache: %4s=%s\n",
2630 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2631 ? ia64_register_names
[regnum
] : "r??"),
2632 paddress (gdbarch
, *val
));
2637 /* Libunwind callback accessor function for top-level fp registers. */
2639 ia64_access_rse_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2640 unw_fpreg_t
*val
, int write
, void *arg
)
2642 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2643 struct regcache
*regcache
= arg
;
2645 /* We never call any libunwind routines that need to write registers. */
2646 gdb_assert (!write
);
2648 regcache_cooked_read (regcache
, regnum
, (char *) val
);
2653 /* Libunwind callback accessor function for accessing memory. */
2655 ia64_access_mem (unw_addr_space_t as
,
2656 unw_word_t addr
, unw_word_t
*val
,
2657 int write
, void *arg
)
2659 if (addr
- KERNEL_START
< ktab_size
)
2661 unw_word_t
*laddr
= (unw_word_t
*) ((char *) ktab
2662 + (addr
- KERNEL_START
));
2671 /* XXX do we need to normalize byte-order here? */
2673 return target_write_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2675 return target_read_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2678 /* Call low-level function to access the kernel unwind table. */
2680 getunwind_table (gdb_byte
**buf_p
)
2684 /* FIXME drow/2005-09-10: This code used to call
2685 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2686 for the currently running ia64-linux kernel. That data should
2687 come from the core file and be accessed via the auxv vector; if
2688 we want to preserve fall back to the running kernel's table, then
2689 we should find a way to override the corefile layer's
2690 xfer_partial method. */
2692 x
= target_read_alloc (¤t_target
, TARGET_OBJECT_UNWIND_TABLE
,
2698 /* Get the kernel unwind table. */
2700 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2702 static struct ia64_table_entry
*etab
;
2709 size
= getunwind_table (&ktab_buf
);
2711 return -UNW_ENOINFO
;
2713 ktab
= (struct ia64_table_entry
*) ktab_buf
;
2716 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2717 etab
->info_offset
+= KERNEL_START
;
2720 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2721 return -UNW_ENOINFO
;
2723 di
->format
= UNW_INFO_FORMAT_TABLE
;
2725 di
->start_ip
= ktab
[0].start_offset
;
2726 di
->end_ip
= etab
[-1].end_offset
;
2727 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2728 di
->u
.ti
.segbase
= 0;
2729 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2730 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2732 if (gdbarch_debug
>= 1)
2733 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2734 "segbase=%s, length=%s, gp=%s\n",
2735 (char *) di
->u
.ti
.name_ptr
,
2736 hex_string (di
->u
.ti
.segbase
),
2737 pulongest (di
->u
.ti
.table_len
),
2738 hex_string (di
->gp
));
2742 /* Find the unwind table entry for a specified address. */
2744 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2745 unw_dyn_info_t
*dip
, void **buf
)
2747 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2748 Elf_Internal_Ehdr
*ehdr
;
2749 unw_word_t segbase
= 0;
2750 CORE_ADDR load_base
;
2754 bfd
= objfile
->obfd
;
2756 ehdr
= elf_tdata (bfd
)->elf_header
;
2757 phdr
= elf_tdata (bfd
)->phdr
;
2759 load_base
= ANOFFSET (objfile
->section_offsets
, SECT_OFF_TEXT (objfile
));
2761 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2763 switch (phdr
[i
].p_type
)
2766 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2771 case PT_IA_64_UNWIND
:
2772 p_unwind
= phdr
+ i
;
2780 if (!p_text
|| !p_unwind
)
2781 return -UNW_ENOINFO
;
2783 /* Verify that the segment that contains the IP also contains
2784 the static unwind table. If not, we may be in the Linux kernel's
2785 DSO gate page in which case the unwind table is another segment.
2786 Otherwise, we are dealing with runtime-generated code, for which we
2787 have no info here. */
2788 segbase
= p_text
->p_vaddr
+ load_base
;
2790 if ((p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2793 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2795 if (phdr
[i
].p_type
== PT_LOAD
2796 && (p_unwind
->p_vaddr
- phdr
[i
].p_vaddr
) < phdr
[i
].p_memsz
)
2799 /* Get the segbase from the section containing the
2801 segbase
= phdr
[i
].p_vaddr
+ load_base
;
2805 return -UNW_ENOINFO
;
2808 dip
->start_ip
= p_text
->p_vaddr
+ load_base
;
2809 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2810 dip
->gp
= ia64_find_global_pointer (get_objfile_arch (objfile
), ip
);
2811 dip
->format
= UNW_INFO_FORMAT_REMOTE_TABLE
;
2812 dip
->u
.rti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2813 dip
->u
.rti
.segbase
= segbase
;
2814 dip
->u
.rti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2815 dip
->u
.rti
.table_data
= p_unwind
->p_vaddr
+ load_base
;
2820 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2822 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2823 int need_unwind_info
, void *arg
)
2825 struct obj_section
*sec
= find_pc_section (ip
);
2832 /* XXX This only works if the host and the target architecture are
2833 both ia64 and if the have (more or less) the same kernel
2835 if (get_kernel_table (ip
, &di
) < 0)
2836 return -UNW_ENOINFO
;
2838 if (gdbarch_debug
>= 1)
2839 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: %s -> "
2840 "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s,"
2841 "length=%s,data=%s)\n",
2842 hex_string (ip
), (char *)di
.u
.ti
.name_ptr
,
2843 hex_string (di
.u
.ti
.segbase
),
2844 hex_string (di
.start_ip
), hex_string (di
.end_ip
),
2846 pulongest (di
.u
.ti
.table_len
),
2847 hex_string ((CORE_ADDR
)di
.u
.ti
.table_data
));
2851 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2855 if (gdbarch_debug
>= 1)
2856 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: %s -> "
2857 "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s,"
2858 "length=%s,data=%s)\n",
2859 hex_string (ip
), (char *)di
.u
.rti
.name_ptr
,
2860 hex_string (di
.u
.rti
.segbase
),
2861 hex_string (di
.start_ip
), hex_string (di
.end_ip
),
2863 pulongest (di
.u
.rti
.table_len
),
2864 hex_string (di
.u
.rti
.table_data
));
2867 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
,
2870 /* We no longer need the dyn info storage so free it. */
2876 /* Libunwind callback accessor function for cleanup. */
2878 ia64_put_unwind_info (unw_addr_space_t as
,
2879 unw_proc_info_t
*pip
, void *arg
)
2881 /* Nothing required for now. */
2884 /* Libunwind callback accessor function to get head of the dynamic
2885 unwind-info registration list. */
2887 ia64_get_dyn_info_list (unw_addr_space_t as
,
2888 unw_word_t
*dilap
, void *arg
)
2890 struct obj_section
*text_sec
;
2891 struct objfile
*objfile
;
2892 unw_word_t ip
, addr
;
2896 if (!libunwind_is_initialized ())
2897 return -UNW_ENOINFO
;
2899 for (objfile
= object_files
; objfile
; objfile
= objfile
->next
)
2903 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2904 ip
= obj_section_addr (text_sec
);
2905 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2908 addr
= libunwind_find_dyn_list (as
, &di
, arg
);
2909 /* We no longer need the dyn info storage so free it. */
2914 if (gdbarch_debug
>= 1)
2915 fprintf_unfiltered (gdb_stdlog
,
2916 "dynamic unwind table in objfile %s "
2918 bfd_get_filename (objfile
->obfd
),
2919 hex_string (addr
), hex_string (di
.gp
));
2925 return -UNW_ENOINFO
;
2929 /* Frame interface functions for libunwind. */
2932 ia64_libunwind_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
2933 struct frame_id
*this_id
)
2935 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2936 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2937 struct frame_id id
= outer_frame_id
;
2941 libunwind_frame_this_id (this_frame
, this_cache
, &id
);
2942 if (frame_id_eq (id
, outer_frame_id
))
2944 (*this_id
) = outer_frame_id
;
2948 /* We must add the bsp as the special address for frame comparison
2950 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2951 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2953 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2955 if (gdbarch_debug
>= 1)
2956 fprintf_unfiltered (gdb_stdlog
,
2957 "libunwind frame id: code %s, stack %s, "
2958 "special %s, this_frame %s\n",
2959 paddress (gdbarch
, id
.code_addr
),
2960 paddress (gdbarch
, id
.stack_addr
),
2961 paddress (gdbarch
, bsp
),
2962 host_address_to_string (this_frame
));
2965 static struct value
*
2966 ia64_libunwind_frame_prev_register (struct frame_info
*this_frame
,
2967 void **this_cache
, int regnum
)
2970 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2971 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2974 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2975 reg
= IA64_PR_REGNUM
;
2976 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2977 reg
= IA64_UNAT_REGNUM
;
2979 /* Let libunwind do most of the work. */
2980 val
= libunwind_frame_prev_register (this_frame
, this_cache
, reg
);
2982 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2986 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2990 unsigned char buf
[MAX_REGISTER_SIZE
];
2992 /* Fetch predicate register rename base from current frame
2993 marker for this frame. */
2994 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
2995 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
2996 rrb_pr
= (cfm
>> 32) & 0x3f;
2998 /* Adjust the register number to account for register rotation. */
2999 regnum
= VP16_REGNUM
+ ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
3001 prN_val
= extract_bit_field (value_contents_all (val
),
3002 regnum
- VP0_REGNUM
, 1);
3003 return frame_unwind_got_constant (this_frame
, regnum
, prN_val
);
3006 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
3010 unatN_val
= extract_bit_field (value_contents_all (val
),
3011 regnum
- IA64_NAT0_REGNUM
, 1);
3012 return frame_unwind_got_constant (this_frame
, regnum
, unatN_val
);
3015 else if (regnum
== IA64_BSP_REGNUM
)
3017 struct value
*cfm_val
;
3018 CORE_ADDR prev_bsp
, prev_cfm
;
3020 /* We want to calculate the previous bsp as the end of the previous
3021 register stack frame. This corresponds to what the hardware bsp
3022 register will be if we pop the frame back which is why we might
3023 have been called. We know that libunwind will pass us back the
3024 beginning of the current frame so we should just add sof to it. */
3025 prev_bsp
= extract_unsigned_integer (value_contents_all (val
),
3027 cfm_val
= libunwind_frame_prev_register (this_frame
, this_cache
,
3029 prev_cfm
= extract_unsigned_integer (value_contents_all (cfm_val
),
3031 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
3033 return frame_unwind_got_constant (this_frame
, regnum
, prev_bsp
);
3040 ia64_libunwind_frame_sniffer (const struct frame_unwind
*self
,
3041 struct frame_info
*this_frame
,
3044 if (libunwind_is_initialized ()
3045 && libunwind_frame_sniffer (self
, this_frame
, this_cache
))
3051 static const struct frame_unwind ia64_libunwind_frame_unwind
=
3054 ia64_libunwind_frame_this_id
,
3055 ia64_libunwind_frame_prev_register
,
3057 ia64_libunwind_frame_sniffer
,
3058 libunwind_frame_dealloc_cache
3062 ia64_libunwind_sigtramp_frame_this_id (struct frame_info
*this_frame
,
3064 struct frame_id
*this_id
)
3066 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
3067 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3070 struct frame_id id
= outer_frame_id
;
3073 libunwind_frame_this_id (this_frame
, this_cache
, &id
);
3074 if (frame_id_eq (id
, outer_frame_id
))
3076 (*this_id
) = outer_frame_id
;
3080 /* We must add the bsp as the special address for frame comparison
3082 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
3083 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
3085 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
3086 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
3088 if (gdbarch_debug
>= 1)
3089 fprintf_unfiltered (gdb_stdlog
,
3090 "libunwind sigtramp frame id: code %s, "
3091 "stack %s, special %s, this_frame %s\n",
3092 paddress (gdbarch
, id
.code_addr
),
3093 paddress (gdbarch
, id
.stack_addr
),
3094 paddress (gdbarch
, bsp
),
3095 host_address_to_string (this_frame
));
3098 static struct value
*
3099 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
3100 void **this_cache
, int regnum
)
3102 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
3103 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3104 struct value
*prev_ip_val
;
3107 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
3108 method of getting previous registers. */
3109 prev_ip_val
= libunwind_frame_prev_register (this_frame
, this_cache
,
3111 prev_ip
= extract_unsigned_integer (value_contents_all (prev_ip_val
),
3116 void *tmp_cache
= NULL
;
3117 return ia64_sigtramp_frame_prev_register (this_frame
, &tmp_cache
,
3121 return ia64_libunwind_frame_prev_register (this_frame
, this_cache
, regnum
);
3125 ia64_libunwind_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
3126 struct frame_info
*this_frame
,
3129 if (libunwind_is_initialized ())
3131 if (libunwind_sigtramp_frame_sniffer (self
, this_frame
, this_cache
))
3136 return ia64_sigtramp_frame_sniffer (self
, this_frame
, this_cache
);
3139 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind
=
3142 ia64_libunwind_sigtramp_frame_this_id
,
3143 ia64_libunwind_sigtramp_frame_prev_register
,
3145 ia64_libunwind_sigtramp_frame_sniffer
3148 /* Set of libunwind callback acccessor functions. */
3149 static unw_accessors_t ia64_unw_accessors
=
3151 ia64_find_proc_info_x
,
3152 ia64_put_unwind_info
,
3153 ia64_get_dyn_info_list
,
3161 /* Set of special libunwind callback acccessor functions specific for accessing
3162 the rse registers. At the top of the stack, we want libunwind to figure out
3163 how to read r32 - r127. Though usually they are found sequentially in
3164 memory starting from $bof, this is not always true. */
3165 static unw_accessors_t ia64_unw_rse_accessors
=
3167 ia64_find_proc_info_x
,
3168 ia64_put_unwind_info
,
3169 ia64_get_dyn_info_list
,
3171 ia64_access_rse_reg
,
3172 ia64_access_rse_fpreg
,
3177 /* Set of ia64 gdb libunwind-frame callbacks and data for generic
3178 libunwind-frame code to use. */
3179 static struct libunwind_descr ia64_libunwind_descr
=
3184 &ia64_unw_accessors
,
3185 &ia64_unw_rse_accessors
,
3188 #endif /* HAVE_LIBUNWIND_IA64_H */
3191 ia64_use_struct_convention (struct type
*type
)
3193 struct type
*float_elt_type
;
3195 /* Don't use the struct convention for anything but structure,
3196 union, or array types. */
3197 if (!(TYPE_CODE (type
) == TYPE_CODE_STRUCT
3198 || TYPE_CODE (type
) == TYPE_CODE_UNION
3199 || TYPE_CODE (type
) == TYPE_CODE_ARRAY
))
3202 /* HFAs are structures (or arrays) consisting entirely of floating
3203 point values of the same length. Up to 8 of these are returned
3204 in registers. Don't use the struct convention when this is the
3206 float_elt_type
= is_float_or_hfa_type (type
);
3207 if (float_elt_type
!= NULL
3208 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
3211 /* Other structs of length 32 or less are returned in r8-r11.
3212 Don't use the struct convention for those either. */
3213 return TYPE_LENGTH (type
) > 32;
3216 /* Return non-zero if TYPE is a structure or union type. */
3219 ia64_struct_type_p (const struct type
*type
)
3221 return (TYPE_CODE (type
) == TYPE_CODE_STRUCT
3222 || TYPE_CODE (type
) == TYPE_CODE_UNION
);
3226 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
3229 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
3230 struct type
*float_elt_type
;
3232 float_elt_type
= is_float_or_hfa_type (type
);
3233 if (float_elt_type
!= NULL
)
3235 char from
[MAX_REGISTER_SIZE
];
3237 int regnum
= IA64_FR8_REGNUM
;
3238 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3242 regcache_cooked_read (regcache
, regnum
, from
);
3243 convert_typed_floating (from
, ia64_ext_type (gdbarch
),
3244 (char *)valbuf
+ offset
, float_elt_type
);
3245 offset
+= TYPE_LENGTH (float_elt_type
);
3249 else if (!ia64_struct_type_p (type
) && TYPE_LENGTH (type
) < 8)
3251 /* This is an integral value, and its size is less than 8 bytes.
3252 These values are LSB-aligned, so extract the relevant bytes,
3253 and copy them into VALBUF. */
3254 /* brobecker/2005-12-30: Actually, all integral values are LSB aligned,
3255 so I suppose we should also add handling here for integral values
3256 whose size is greater than 8. But I wasn't able to create such
3257 a type, neither in C nor in Ada, so not worrying about these yet. */
3258 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3261 regcache_cooked_read_unsigned (regcache
, IA64_GR8_REGNUM
, &val
);
3262 store_unsigned_integer (valbuf
, TYPE_LENGTH (type
), byte_order
, val
);
3268 int regnum
= IA64_GR8_REGNUM
;
3269 int reglen
= TYPE_LENGTH (register_type (gdbarch
, IA64_GR8_REGNUM
));
3270 int n
= TYPE_LENGTH (type
) / reglen
;
3271 int m
= TYPE_LENGTH (type
) % reglen
;
3276 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3277 memcpy ((char *)valbuf
+ offset
, &val
, reglen
);
3284 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3285 memcpy ((char *)valbuf
+ offset
, &val
, m
);
3291 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
,
3292 const gdb_byte
*valbuf
)
3294 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
3295 struct type
*float_elt_type
;
3297 float_elt_type
= is_float_or_hfa_type (type
);
3298 if (float_elt_type
!= NULL
)
3300 char to
[MAX_REGISTER_SIZE
];
3302 int regnum
= IA64_FR8_REGNUM
;
3303 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3307 convert_typed_floating ((char *)valbuf
+ offset
, float_elt_type
,
3308 to
, ia64_ext_type (gdbarch
));
3309 regcache_cooked_write (regcache
, regnum
, to
);
3310 offset
+= TYPE_LENGTH (float_elt_type
);
3318 int regnum
= IA64_GR8_REGNUM
;
3319 int reglen
= TYPE_LENGTH (register_type (gdbarch
, IA64_GR8_REGNUM
));
3320 int n
= TYPE_LENGTH (type
) / reglen
;
3321 int m
= TYPE_LENGTH (type
) % reglen
;
3326 memcpy (&val
, (char *)valbuf
+ offset
, reglen
);
3327 regcache_cooked_write_unsigned (regcache
, regnum
, val
);
3334 memcpy (&val
, (char *)valbuf
+ offset
, m
);
3335 regcache_cooked_write_unsigned (regcache
, regnum
, val
);
3340 static enum return_value_convention
3341 ia64_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
3342 struct type
*valtype
, struct regcache
*regcache
,
3343 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
3345 int struct_return
= ia64_use_struct_convention (valtype
);
3347 if (writebuf
!= NULL
)
3349 gdb_assert (!struct_return
);
3350 ia64_store_return_value (valtype
, regcache
, writebuf
);
3353 if (readbuf
!= NULL
)
3355 gdb_assert (!struct_return
);
3356 ia64_extract_return_value (valtype
, regcache
, readbuf
);
3360 return RETURN_VALUE_STRUCT_CONVENTION
;
3362 return RETURN_VALUE_REGISTER_CONVENTION
;
3366 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
3368 switch (TYPE_CODE (t
))
3372 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
3379 case TYPE_CODE_ARRAY
:
3381 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
3384 case TYPE_CODE_STRUCT
:
3388 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3389 if (!is_float_or_hfa_type_recurse
3390 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
3401 /* Determine if the given type is one of the floating point types or
3402 and HFA (which is a struct, array, or combination thereof whose
3403 bottom-most elements are all of the same floating point type). */
3405 static struct type
*
3406 is_float_or_hfa_type (struct type
*t
)
3408 struct type
*et
= 0;
3410 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
3414 /* Return 1 if the alignment of T is such that the next even slot
3415 should be used. Return 0, if the next available slot should
3416 be used. (See section 8.5.1 of the IA-64 Software Conventions
3417 and Runtime manual). */
3420 slot_alignment_is_next_even (struct type
*t
)
3422 switch (TYPE_CODE (t
))
3426 if (TYPE_LENGTH (t
) > 8)
3430 case TYPE_CODE_ARRAY
:
3432 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
3433 case TYPE_CODE_STRUCT
:
3437 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3438 if (slot_alignment_is_next_even
3439 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
3448 /* Attempt to find (and return) the global pointer for the given
3451 This is a rather nasty bit of code searchs for the .dynamic section
3452 in the objfile corresponding to the pc of the function we're trying
3453 to call. Once it finds the addresses at which the .dynamic section
3454 lives in the child process, it scans the Elf64_Dyn entries for a
3455 DT_PLTGOT tag. If it finds one of these, the corresponding
3456 d_un.d_ptr value is the global pointer. */
3459 ia64_find_global_pointer_from_dynamic_section (struct gdbarch
*gdbarch
,
3462 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3463 struct obj_section
*faddr_sect
;
3465 faddr_sect
= find_pc_section (faddr
);
3466 if (faddr_sect
!= NULL
)
3468 struct obj_section
*osect
;
3470 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3472 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
3476 if (osect
< faddr_sect
->objfile
->sections_end
)
3478 CORE_ADDR addr
, endaddr
;
3480 addr
= obj_section_addr (osect
);
3481 endaddr
= obj_section_endaddr (osect
);
3483 while (addr
< endaddr
)
3489 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3492 tag
= extract_signed_integer (buf
, sizeof (buf
), byte_order
);
3494 if (tag
== DT_PLTGOT
)
3496 CORE_ADDR global_pointer
;
3498 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
3501 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
),
3505 return global_pointer
;
3518 /* Attempt to find (and return) the global pointer for the given
3519 function. We first try the find_global_pointer_from_solib routine
3520 from the gdbarch tdep vector, if provided. And if that does not
3521 work, then we try ia64_find_global_pointer_from_dynamic_section. */
3524 ia64_find_global_pointer (struct gdbarch
*gdbarch
, CORE_ADDR faddr
)
3526 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3529 if (tdep
->find_global_pointer_from_solib
)
3530 addr
= tdep
->find_global_pointer_from_solib (gdbarch
, faddr
);
3532 addr
= ia64_find_global_pointer_from_dynamic_section (gdbarch
, faddr
);
3536 /* Given a function's address, attempt to find (and return) the
3537 corresponding (canonical) function descriptor. Return 0 if
3540 find_extant_func_descr (struct gdbarch
*gdbarch
, CORE_ADDR faddr
)
3542 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3543 struct obj_section
*faddr_sect
;
3545 /* Return early if faddr is already a function descriptor. */
3546 faddr_sect
= find_pc_section (faddr
);
3547 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
3550 if (faddr_sect
!= NULL
)
3552 struct obj_section
*osect
;
3553 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3555 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
3559 if (osect
< faddr_sect
->objfile
->sections_end
)
3561 CORE_ADDR addr
, endaddr
;
3563 addr
= obj_section_addr (osect
);
3564 endaddr
= obj_section_endaddr (osect
);
3566 while (addr
< endaddr
)
3572 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3575 faddr2
= extract_signed_integer (buf
, sizeof (buf
), byte_order
);
3577 if (faddr
== faddr2
)
3587 /* Attempt to find a function descriptor corresponding to the
3588 given address. If none is found, construct one on the
3589 stack using the address at fdaptr. */
3592 find_func_descr (struct regcache
*regcache
, CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
3594 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
3595 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3598 fdesc
= find_extant_func_descr (gdbarch
, faddr
);
3602 ULONGEST global_pointer
;
3608 global_pointer
= ia64_find_global_pointer (gdbarch
, faddr
);
3610 if (global_pointer
== 0)
3611 regcache_cooked_read_unsigned (regcache
,
3612 IA64_GR1_REGNUM
, &global_pointer
);
3614 store_unsigned_integer (buf
, 8, byte_order
, faddr
);
3615 store_unsigned_integer (buf
+ 8, 8, byte_order
, global_pointer
);
3617 write_memory (fdesc
, buf
, 16);
3623 /* Use the following routine when printing out function pointers
3624 so the user can see the function address rather than just the
3625 function descriptor. */
3627 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
3628 struct target_ops
*targ
)
3630 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3631 struct obj_section
*s
;
3634 s
= find_pc_section (addr
);
3636 /* check if ADDR points to a function descriptor. */
3637 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
3638 return read_memory_unsigned_integer (addr
, 8, byte_order
);
3640 /* Normally, functions live inside a section that is executable.
3641 So, if ADDR points to a non-executable section, then treat it
3642 as a function descriptor and return the target address iff
3643 the target address itself points to a section that is executable.
3644 Check first the memory of the whole length of 8 bytes is readable. */
3645 if (s
&& (s
->the_bfd_section
->flags
& SEC_CODE
) == 0
3646 && target_read_memory (addr
, buf
, 8) == 0)
3648 CORE_ADDR pc
= extract_unsigned_integer (buf
, 8, byte_order
);
3649 struct obj_section
*pc_section
= find_pc_section (pc
);
3651 if (pc_section
&& (pc_section
->the_bfd_section
->flags
& SEC_CODE
))
3655 /* There are also descriptors embedded in vtables. */
3658 struct minimal_symbol
*minsym
;
3660 minsym
= lookup_minimal_symbol_by_pc (addr
);
3662 if (minsym
&& is_vtable_name (SYMBOL_LINKAGE_NAME (minsym
)))
3663 return read_memory_unsigned_integer (addr
, 8, byte_order
);
3670 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3675 /* The default "allocate_new_rse_frame" ia64_infcall_ops routine for ia64. */
3678 ia64_allocate_new_rse_frame (struct regcache
*regcache
, ULONGEST bsp
, int sof
)
3680 ULONGEST cfm
, pfs
, new_bsp
;
3682 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
3684 new_bsp
= rse_address_add (bsp
, sof
);
3685 regcache_cooked_write_unsigned (regcache
, IA64_BSP_REGNUM
, new_bsp
);
3687 regcache_cooked_read_unsigned (regcache
, IA64_PFS_REGNUM
, &pfs
);
3688 pfs
&= 0xc000000000000000LL
;
3689 pfs
|= (cfm
& 0xffffffffffffLL
);
3690 regcache_cooked_write_unsigned (regcache
, IA64_PFS_REGNUM
, pfs
);
3692 cfm
&= 0xc000000000000000LL
;
3694 regcache_cooked_write_unsigned (regcache
, IA64_CFM_REGNUM
, cfm
);
3697 /* The default "store_argument_in_slot" ia64_infcall_ops routine for
3701 ia64_store_argument_in_slot (struct regcache
*regcache
, CORE_ADDR bsp
,
3702 int slotnum
, gdb_byte
*buf
)
3704 write_memory (rse_address_add (bsp
, slotnum
), buf
, 8);
3707 /* The default "set_function_addr" ia64_infcall_ops routine for ia64. */
3710 ia64_set_function_addr (struct regcache
*regcache
, CORE_ADDR func_addr
)
3712 /* Nothing needed. */
3716 ia64_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
3717 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3718 int nargs
, struct value
**args
, CORE_ADDR sp
,
3719 int struct_return
, CORE_ADDR struct_addr
)
3721 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3722 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3727 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3730 CORE_ADDR funcdescaddr
, pc
, global_pointer
;
3731 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
3735 /* Count the number of slots needed for the arguments. */
3736 for (argno
= 0; argno
< nargs
; argno
++)
3739 type
= check_typedef (value_type (arg
));
3740 len
= TYPE_LENGTH (type
);
3742 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3745 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
3748 nslots
+= (len
+ 7) / 8;
3751 /* Divvy up the slots between the RSE and the memory stack. */
3752 rseslots
= (nslots
> 8) ? 8 : nslots
;
3753 memslots
= nslots
- rseslots
;
3755 /* Allocate a new RSE frame. */
3756 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
3757 tdep
->infcall_ops
.allocate_new_rse_frame (regcache
, bsp
, rseslots
);
3759 /* We will attempt to find function descriptors in the .opd segment,
3760 but if we can't we'll construct them ourselves. That being the
3761 case, we'll need to reserve space on the stack for them. */
3762 funcdescaddr
= sp
- nfuncargs
* 16;
3763 funcdescaddr
&= ~0xfLL
;
3765 /* Adjust the stack pointer to it's new value. The calling conventions
3766 require us to have 16 bytes of scratch, plus whatever space is
3767 necessary for the memory slots and our function descriptors. */
3768 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3769 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3771 /* Place the arguments where they belong. The arguments will be
3772 either placed in the RSE backing store or on the memory stack.
3773 In addition, floating point arguments or HFAs are placed in
3774 floating point registers. */
3776 floatreg
= IA64_FR8_REGNUM
;
3777 for (argno
= 0; argno
< nargs
; argno
++)
3779 struct type
*float_elt_type
;
3782 type
= check_typedef (value_type (arg
));
3783 len
= TYPE_LENGTH (type
);
3785 /* Special handling for function parameters. */
3787 && TYPE_CODE (type
) == TYPE_CODE_PTR
3788 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
3791 ULONGEST faddr
= extract_unsigned_integer (value_contents (arg
),
3793 store_unsigned_integer (val_buf
, 8, byte_order
,
3794 find_func_descr (regcache
, faddr
,
3796 if (slotnum
< rseslots
)
3797 tdep
->infcall_ops
.store_argument_in_slot (regcache
, bsp
,
3800 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3807 /* Skip odd slot if necessary... */
3808 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3816 memset (val_buf
, 0, 8);
3817 if (!ia64_struct_type_p (type
) && len
< 8)
3819 /* Integral types are LSB-aligned, so we have to be careful
3820 to insert the argument on the correct side of the buffer.
3821 This is why we use store_unsigned_integer. */
3822 store_unsigned_integer
3823 (val_buf
, 8, byte_order
,
3824 extract_unsigned_integer (value_contents (arg
), len
,
3829 /* This is either an 8bit integral type, or an aggregate.
3830 For 8bit integral type, there is no problem, we just
3831 copy the value over.
3833 For aggregates, the only potentially tricky portion
3834 is to write the last one if it is less than 8 bytes.
3835 In this case, the data is Byte0-aligned. Happy news,
3836 this means that we don't need to differentiate the
3837 handling of 8byte blocks and less-than-8bytes blocks. */
3838 memcpy (val_buf
, value_contents (arg
) + argoffset
,
3839 (len
> 8) ? 8 : len
);
3842 if (slotnum
< rseslots
)
3843 tdep
->infcall_ops
.store_argument_in_slot (regcache
, bsp
,
3846 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3853 /* Handle floating point types (including HFAs). */
3854 float_elt_type
= is_float_or_hfa_type (type
);
3855 if (float_elt_type
!= NULL
)
3858 len
= TYPE_LENGTH (type
);
3859 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3861 char to
[MAX_REGISTER_SIZE
];
3862 convert_typed_floating (value_contents (arg
) + argoffset
,
3864 ia64_ext_type (gdbarch
));
3865 regcache_cooked_write (regcache
, floatreg
, (void *)to
);
3867 argoffset
+= TYPE_LENGTH (float_elt_type
);
3868 len
-= TYPE_LENGTH (float_elt_type
);
3873 /* Store the struct return value in r8 if necessary. */
3876 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
,
3877 (ULONGEST
) struct_addr
);
3880 global_pointer
= ia64_find_global_pointer (gdbarch
, func_addr
);
3882 if (global_pointer
!= 0)
3883 regcache_cooked_write_unsigned (regcache
, IA64_GR1_REGNUM
, global_pointer
);
3885 /* The following is not necessary on HP-UX, because we're using
3886 a dummy code sequence pushed on the stack to make the call, and
3887 this sequence doesn't need b0 to be set in order for our dummy
3888 breakpoint to be hit. Nonetheless, this doesn't interfere, and
3889 it's needed for other OSes, so we do this unconditionaly. */
3890 regcache_cooked_write_unsigned (regcache
, IA64_BR0_REGNUM
, bp_addr
);
3892 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
3894 tdep
->infcall_ops
.set_function_addr (regcache
, func_addr
);
3899 static const struct ia64_infcall_ops ia64_infcall_ops
=
3901 ia64_allocate_new_rse_frame
,
3902 ia64_store_argument_in_slot
,
3903 ia64_set_function_addr
3906 static struct frame_id
3907 ia64_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
3909 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3913 get_frame_register (this_frame
, sp_regnum
, buf
);
3914 sp
= extract_unsigned_integer (buf
, 8, byte_order
);
3916 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
3917 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
3919 if (gdbarch_debug
>= 1)
3920 fprintf_unfiltered (gdb_stdlog
,
3921 "dummy frame id: code %s, stack %s, special %s\n",
3922 paddress (gdbarch
, get_frame_pc (this_frame
)),
3923 paddress (gdbarch
, sp
), paddress (gdbarch
, bsp
));
3925 return frame_id_build_special (sp
, get_frame_pc (this_frame
), bsp
);
3929 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3931 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3933 CORE_ADDR ip
, psr
, pc
;
3935 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3936 ip
= extract_unsigned_integer (buf
, 8, byte_order
);
3937 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3938 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
3940 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3945 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3947 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3948 return print_insn_ia64 (memaddr
, info
);
3951 /* The default "size_of_register_frame" gdbarch_tdep routine for ia64. */
3954 ia64_size_of_register_frame (struct frame_info
*this_frame
, ULONGEST cfm
)
3956 return (cfm
& 0x7f);
3959 static struct gdbarch
*
3960 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3962 struct gdbarch
*gdbarch
;
3963 struct gdbarch_tdep
*tdep
;
3965 /* If there is already a candidate, use it. */
3966 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3968 return arches
->gdbarch
;
3970 tdep
= xzalloc (sizeof (struct gdbarch_tdep
));
3971 gdbarch
= gdbarch_alloc (&info
, tdep
);
3973 tdep
->size_of_register_frame
= ia64_size_of_register_frame
;
3975 /* According to the ia64 specs, instructions that store long double
3976 floats in memory use a long-double format different than that
3977 used in the floating registers. The memory format matches the
3978 x86 extended float format which is 80 bits. An OS may choose to
3979 use this format (e.g. GNU/Linux) or choose to use a different
3980 format for storing long doubles (e.g. HPUX). In the latter case,
3981 the setting of the format may be moved/overridden in an
3982 OS-specific tdep file. */
3983 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
3985 set_gdbarch_short_bit (gdbarch
, 16);
3986 set_gdbarch_int_bit (gdbarch
, 32);
3987 set_gdbarch_long_bit (gdbarch
, 64);
3988 set_gdbarch_long_long_bit (gdbarch
, 64);
3989 set_gdbarch_float_bit (gdbarch
, 32);
3990 set_gdbarch_double_bit (gdbarch
, 64);
3991 set_gdbarch_long_double_bit (gdbarch
, 128);
3992 set_gdbarch_ptr_bit (gdbarch
, 64);
3994 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3995 set_gdbarch_num_pseudo_regs (gdbarch
,
3996 LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3997 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
3998 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
4000 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
4001 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
4003 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
4004 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
4005 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
4006 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
4007 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
4008 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
4009 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
4011 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
4013 set_gdbarch_return_value (gdbarch
, ia64_return_value
);
4015 set_gdbarch_memory_insert_breakpoint (gdbarch
,
4016 ia64_memory_insert_breakpoint
);
4017 set_gdbarch_memory_remove_breakpoint (gdbarch
,
4018 ia64_memory_remove_breakpoint
);
4019 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
4020 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
4021 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
4023 /* Settings for calling functions in the inferior. */
4024 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
4025 tdep
->infcall_ops
= ia64_infcall_ops
;
4026 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
4027 set_gdbarch_dummy_id (gdbarch
, ia64_dummy_id
);
4029 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
4030 #ifdef HAVE_LIBUNWIND_IA64_H
4031 frame_unwind_append_unwinder (gdbarch
,
4032 &ia64_libunwind_sigtramp_frame_unwind
);
4033 frame_unwind_append_unwinder (gdbarch
, &ia64_libunwind_frame_unwind
);
4034 frame_unwind_append_unwinder (gdbarch
, &ia64_sigtramp_frame_unwind
);
4035 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
4037 frame_unwind_append_unwinder (gdbarch
, &ia64_sigtramp_frame_unwind
);
4039 frame_unwind_append_unwinder (gdbarch
, &ia64_frame_unwind
);
4040 frame_base_set_default (gdbarch
, &ia64_frame_base
);
4042 /* Settings that should be unnecessary. */
4043 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
4045 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
4046 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
4047 ia64_convert_from_func_ptr_addr
);
4049 /* The virtual table contains 16-byte descriptors, not pointers to
4051 set_gdbarch_vtable_function_descriptors (gdbarch
, 1);
4053 /* Hook in ABI-specific overrides, if they have been registered. */
4054 gdbarch_init_osabi (info
, gdbarch
);
4059 extern initialize_file_ftype _initialize_ia64_tdep
; /* -Wmissing-prototypes */
4062 _initialize_ia64_tdep (void)
4064 gdbarch_register (bfd_arch_ia64
, ia64_gdbarch_init
, NULL
);